| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Target Register Enum Values *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | |
| 10 | #ifdef GET_REGINFO_ENUM |
| 11 | #undef GET_REGINFO_ENUM |
| 12 | |
| 13 | namespace llvm { |
| 14 | |
| 15 | class MCRegisterClass; |
| 16 | extern const MCRegisterClass AArch64MCRegisterClasses[]; |
| 17 | |
| 18 | namespace AArch64 { |
| 19 | enum : unsigned { |
| 20 | NoRegister, |
| 21 | FFR = 1, |
| 22 | FP = 2, |
| 23 | FPCR = 3, |
| 24 | FPMR = 4, |
| 25 | FPSR = 5, |
| 26 | LR = 6, |
| 27 | NZCV = 7, |
| 28 | SP = 8, |
| 29 | VG = 9, |
| 30 | WSP = 10, |
| 31 | WSP_HI = 11, |
| 32 | WZR = 12, |
| 33 | WZR_HI = 13, |
| 34 | XZR = 14, |
| 35 | ZA = 15, |
| 36 | B0 = 16, |
| 37 | B1 = 17, |
| 38 | B2 = 18, |
| 39 | B3 = 19, |
| 40 | B4 = 20, |
| 41 | B5 = 21, |
| 42 | B6 = 22, |
| 43 | B7 = 23, |
| 44 | B8 = 24, |
| 45 | B9 = 25, |
| 46 | B10 = 26, |
| 47 | B11 = 27, |
| 48 | B12 = 28, |
| 49 | B13 = 29, |
| 50 | B14 = 30, |
| 51 | B15 = 31, |
| 52 | B16 = 32, |
| 53 | B17 = 33, |
| 54 | B18 = 34, |
| 55 | B19 = 35, |
| 56 | B20 = 36, |
| 57 | B21 = 37, |
| 58 | B22 = 38, |
| 59 | B23 = 39, |
| 60 | B24 = 40, |
| 61 | B25 = 41, |
| 62 | B26 = 42, |
| 63 | B27 = 43, |
| 64 | B28 = 44, |
| 65 | B29 = 45, |
| 66 | B30 = 46, |
| 67 | B31 = 47, |
| 68 | D0 = 48, |
| 69 | D1 = 49, |
| 70 | D2 = 50, |
| 71 | D3 = 51, |
| 72 | D4 = 52, |
| 73 | D5 = 53, |
| 74 | D6 = 54, |
| 75 | D7 = 55, |
| 76 | D8 = 56, |
| 77 | D9 = 57, |
| 78 | D10 = 58, |
| 79 | D11 = 59, |
| 80 | D12 = 60, |
| 81 | D13 = 61, |
| 82 | D14 = 62, |
| 83 | D15 = 63, |
| 84 | D16 = 64, |
| 85 | D17 = 65, |
| 86 | D18 = 66, |
| 87 | D19 = 67, |
| 88 | D20 = 68, |
| 89 | D21 = 69, |
| 90 | D22 = 70, |
| 91 | D23 = 71, |
| 92 | D24 = 72, |
| 93 | D25 = 73, |
| 94 | D26 = 74, |
| 95 | D27 = 75, |
| 96 | D28 = 76, |
| 97 | D29 = 77, |
| 98 | D30 = 78, |
| 99 | D31 = 79, |
| 100 | H0 = 80, |
| 101 | H1 = 81, |
| 102 | H2 = 82, |
| 103 | H3 = 83, |
| 104 | H4 = 84, |
| 105 | H5 = 85, |
| 106 | H6 = 86, |
| 107 | H7 = 87, |
| 108 | H8 = 88, |
| 109 | H9 = 89, |
| 110 | H10 = 90, |
| 111 | H11 = 91, |
| 112 | H12 = 92, |
| 113 | H13 = 93, |
| 114 | H14 = 94, |
| 115 | H15 = 95, |
| 116 | H16 = 96, |
| 117 | H17 = 97, |
| 118 | H18 = 98, |
| 119 | H19 = 99, |
| 120 | H20 = 100, |
| 121 | H21 = 101, |
| 122 | H22 = 102, |
| 123 | H23 = 103, |
| 124 | H24 = 104, |
| 125 | H25 = 105, |
| 126 | H26 = 106, |
| 127 | H27 = 107, |
| 128 | H28 = 108, |
| 129 | H29 = 109, |
| 130 | H30 = 110, |
| 131 | H31 = 111, |
| 132 | P0 = 112, |
| 133 | P1 = 113, |
| 134 | P2 = 114, |
| 135 | P3 = 115, |
| 136 | P4 = 116, |
| 137 | P5 = 117, |
| 138 | P6 = 118, |
| 139 | P7 = 119, |
| 140 | P8 = 120, |
| 141 | P9 = 121, |
| 142 | P10 = 122, |
| 143 | P11 = 123, |
| 144 | P12 = 124, |
| 145 | P13 = 125, |
| 146 | P14 = 126, |
| 147 | P15 = 127, |
| 148 | PN0 = 128, |
| 149 | PN1 = 129, |
| 150 | PN2 = 130, |
| 151 | PN3 = 131, |
| 152 | PN4 = 132, |
| 153 | PN5 = 133, |
| 154 | PN6 = 134, |
| 155 | PN7 = 135, |
| 156 | PN8 = 136, |
| 157 | PN9 = 137, |
| 158 | PN10 = 138, |
| 159 | PN11 = 139, |
| 160 | PN12 = 140, |
| 161 | PN13 = 141, |
| 162 | PN14 = 142, |
| 163 | PN15 = 143, |
| 164 | Q0 = 144, |
| 165 | Q1 = 145, |
| 166 | Q2 = 146, |
| 167 | Q3 = 147, |
| 168 | Q4 = 148, |
| 169 | Q5 = 149, |
| 170 | Q6 = 150, |
| 171 | Q7 = 151, |
| 172 | Q8 = 152, |
| 173 | Q9 = 153, |
| 174 | Q10 = 154, |
| 175 | Q11 = 155, |
| 176 | Q12 = 156, |
| 177 | Q13 = 157, |
| 178 | Q14 = 158, |
| 179 | Q15 = 159, |
| 180 | Q16 = 160, |
| 181 | Q17 = 161, |
| 182 | Q18 = 162, |
| 183 | Q19 = 163, |
| 184 | Q20 = 164, |
| 185 | Q21 = 165, |
| 186 | Q22 = 166, |
| 187 | Q23 = 167, |
| 188 | Q24 = 168, |
| 189 | Q25 = 169, |
| 190 | Q26 = 170, |
| 191 | Q27 = 171, |
| 192 | Q28 = 172, |
| 193 | Q29 = 173, |
| 194 | Q30 = 174, |
| 195 | Q31 = 175, |
| 196 | S0 = 176, |
| 197 | S1 = 177, |
| 198 | S2 = 178, |
| 199 | S3 = 179, |
| 200 | S4 = 180, |
| 201 | S5 = 181, |
| 202 | S6 = 182, |
| 203 | S7 = 183, |
| 204 | S8 = 184, |
| 205 | S9 = 185, |
| 206 | S10 = 186, |
| 207 | S11 = 187, |
| 208 | S12 = 188, |
| 209 | S13 = 189, |
| 210 | S14 = 190, |
| 211 | S15 = 191, |
| 212 | S16 = 192, |
| 213 | S17 = 193, |
| 214 | S18 = 194, |
| 215 | S19 = 195, |
| 216 | S20 = 196, |
| 217 | S21 = 197, |
| 218 | S22 = 198, |
| 219 | S23 = 199, |
| 220 | S24 = 200, |
| 221 | S25 = 201, |
| 222 | S26 = 202, |
| 223 | S27 = 203, |
| 224 | S28 = 204, |
| 225 | S29 = 205, |
| 226 | S30 = 206, |
| 227 | S31 = 207, |
| 228 | W0 = 208, |
| 229 | W1 = 209, |
| 230 | W2 = 210, |
| 231 | W3 = 211, |
| 232 | W4 = 212, |
| 233 | W5 = 213, |
| 234 | W6 = 214, |
| 235 | W7 = 215, |
| 236 | W8 = 216, |
| 237 | W9 = 217, |
| 238 | W10 = 218, |
| 239 | W11 = 219, |
| 240 | W12 = 220, |
| 241 | W13 = 221, |
| 242 | W14 = 222, |
| 243 | W15 = 223, |
| 244 | W16 = 224, |
| 245 | W17 = 225, |
| 246 | W18 = 226, |
| 247 | W19 = 227, |
| 248 | W20 = 228, |
| 249 | W21 = 229, |
| 250 | W22 = 230, |
| 251 | W23 = 231, |
| 252 | W24 = 232, |
| 253 | W25 = 233, |
| 254 | W26 = 234, |
| 255 | W27 = 235, |
| 256 | W28 = 236, |
| 257 | W29 = 237, |
| 258 | W30 = 238, |
| 259 | X0 = 239, |
| 260 | X1 = 240, |
| 261 | X2 = 241, |
| 262 | X3 = 242, |
| 263 | X4 = 243, |
| 264 | X5 = 244, |
| 265 | X6 = 245, |
| 266 | X7 = 246, |
| 267 | X8 = 247, |
| 268 | X9 = 248, |
| 269 | X10 = 249, |
| 270 | X11 = 250, |
| 271 | X12 = 251, |
| 272 | X13 = 252, |
| 273 | X14 = 253, |
| 274 | X15 = 254, |
| 275 | X16 = 255, |
| 276 | X17 = 256, |
| 277 | X18 = 257, |
| 278 | X19 = 258, |
| 279 | X20 = 259, |
| 280 | X21 = 260, |
| 281 | X22 = 261, |
| 282 | X23 = 262, |
| 283 | X24 = 263, |
| 284 | X25 = 264, |
| 285 | X26 = 265, |
| 286 | X27 = 266, |
| 287 | X28 = 267, |
| 288 | Z0 = 268, |
| 289 | Z1 = 269, |
| 290 | Z2 = 270, |
| 291 | Z3 = 271, |
| 292 | Z4 = 272, |
| 293 | Z5 = 273, |
| 294 | Z6 = 274, |
| 295 | Z7 = 275, |
| 296 | Z8 = 276, |
| 297 | Z9 = 277, |
| 298 | Z10 = 278, |
| 299 | Z11 = 279, |
| 300 | Z12 = 280, |
| 301 | Z13 = 281, |
| 302 | Z14 = 282, |
| 303 | Z15 = 283, |
| 304 | Z16 = 284, |
| 305 | Z17 = 285, |
| 306 | Z18 = 286, |
| 307 | Z19 = 287, |
| 308 | Z20 = 288, |
| 309 | Z21 = 289, |
| 310 | Z22 = 290, |
| 311 | Z23 = 291, |
| 312 | Z24 = 292, |
| 313 | Z25 = 293, |
| 314 | Z26 = 294, |
| 315 | Z27 = 295, |
| 316 | Z28 = 296, |
| 317 | Z29 = 297, |
| 318 | Z30 = 298, |
| 319 | Z31 = 299, |
| 320 | ZAB0 = 300, |
| 321 | ZAD0 = 301, |
| 322 | ZAD1 = 302, |
| 323 | ZAD2 = 303, |
| 324 | ZAD3 = 304, |
| 325 | ZAD4 = 305, |
| 326 | ZAD5 = 306, |
| 327 | ZAD6 = 307, |
| 328 | ZAD7 = 308, |
| 329 | ZAH0 = 309, |
| 330 | ZAH1 = 310, |
| 331 | ZAQ0 = 311, |
| 332 | ZAQ1 = 312, |
| 333 | ZAQ2 = 313, |
| 334 | ZAQ3 = 314, |
| 335 | ZAQ4 = 315, |
| 336 | ZAQ5 = 316, |
| 337 | ZAQ6 = 317, |
| 338 | ZAQ7 = 318, |
| 339 | ZAQ8 = 319, |
| 340 | ZAQ9 = 320, |
| 341 | ZAQ10 = 321, |
| 342 | ZAQ11 = 322, |
| 343 | ZAQ12 = 323, |
| 344 | ZAQ13 = 324, |
| 345 | ZAQ14 = 325, |
| 346 | ZAQ15 = 326, |
| 347 | ZAS0 = 327, |
| 348 | ZAS1 = 328, |
| 349 | ZAS2 = 329, |
| 350 | ZAS3 = 330, |
| 351 | ZT0 = 331, |
| 352 | B0_HI = 332, |
| 353 | B1_HI = 333, |
| 354 | B2_HI = 334, |
| 355 | B3_HI = 335, |
| 356 | B4_HI = 336, |
| 357 | B5_HI = 337, |
| 358 | B6_HI = 338, |
| 359 | B7_HI = 339, |
| 360 | B8_HI = 340, |
| 361 | B9_HI = 341, |
| 362 | B10_HI = 342, |
| 363 | B11_HI = 343, |
| 364 | B12_HI = 344, |
| 365 | B13_HI = 345, |
| 366 | B14_HI = 346, |
| 367 | B15_HI = 347, |
| 368 | B16_HI = 348, |
| 369 | B17_HI = 349, |
| 370 | B18_HI = 350, |
| 371 | B19_HI = 351, |
| 372 | B20_HI = 352, |
| 373 | B21_HI = 353, |
| 374 | B22_HI = 354, |
| 375 | B23_HI = 355, |
| 376 | B24_HI = 356, |
| 377 | B25_HI = 357, |
| 378 | B26_HI = 358, |
| 379 | B27_HI = 359, |
| 380 | B28_HI = 360, |
| 381 | B29_HI = 361, |
| 382 | B30_HI = 362, |
| 383 | B31_HI = 363, |
| 384 | D0_HI = 364, |
| 385 | D1_HI = 365, |
| 386 | D2_HI = 366, |
| 387 | D3_HI = 367, |
| 388 | D4_HI = 368, |
| 389 | D5_HI = 369, |
| 390 | D6_HI = 370, |
| 391 | D7_HI = 371, |
| 392 | D8_HI = 372, |
| 393 | D9_HI = 373, |
| 394 | D10_HI = 374, |
| 395 | D11_HI = 375, |
| 396 | D12_HI = 376, |
| 397 | D13_HI = 377, |
| 398 | D14_HI = 378, |
| 399 | D15_HI = 379, |
| 400 | D16_HI = 380, |
| 401 | D17_HI = 381, |
| 402 | D18_HI = 382, |
| 403 | D19_HI = 383, |
| 404 | D20_HI = 384, |
| 405 | D21_HI = 385, |
| 406 | D22_HI = 386, |
| 407 | D23_HI = 387, |
| 408 | D24_HI = 388, |
| 409 | D25_HI = 389, |
| 410 | D26_HI = 390, |
| 411 | D27_HI = 391, |
| 412 | D28_HI = 392, |
| 413 | D29_HI = 393, |
| 414 | D30_HI = 394, |
| 415 | D31_HI = 395, |
| 416 | H0_HI = 396, |
| 417 | H1_HI = 397, |
| 418 | H2_HI = 398, |
| 419 | H3_HI = 399, |
| 420 | H4_HI = 400, |
| 421 | H5_HI = 401, |
| 422 | H6_HI = 402, |
| 423 | H7_HI = 403, |
| 424 | H8_HI = 404, |
| 425 | H9_HI = 405, |
| 426 | H10_HI = 406, |
| 427 | H11_HI = 407, |
| 428 | H12_HI = 408, |
| 429 | H13_HI = 409, |
| 430 | H14_HI = 410, |
| 431 | H15_HI = 411, |
| 432 | H16_HI = 412, |
| 433 | H17_HI = 413, |
| 434 | H18_HI = 414, |
| 435 | H19_HI = 415, |
| 436 | H20_HI = 416, |
| 437 | H21_HI = 417, |
| 438 | H22_HI = 418, |
| 439 | H23_HI = 419, |
| 440 | H24_HI = 420, |
| 441 | H25_HI = 421, |
| 442 | H26_HI = 422, |
| 443 | H27_HI = 423, |
| 444 | H28_HI = 424, |
| 445 | H29_HI = 425, |
| 446 | H30_HI = 426, |
| 447 | H31_HI = 427, |
| 448 | Q0_HI = 428, |
| 449 | Q1_HI = 429, |
| 450 | Q2_HI = 430, |
| 451 | Q3_HI = 431, |
| 452 | Q4_HI = 432, |
| 453 | Q5_HI = 433, |
| 454 | Q6_HI = 434, |
| 455 | Q7_HI = 435, |
| 456 | Q8_HI = 436, |
| 457 | Q9_HI = 437, |
| 458 | Q10_HI = 438, |
| 459 | Q11_HI = 439, |
| 460 | Q12_HI = 440, |
| 461 | Q13_HI = 441, |
| 462 | Q14_HI = 442, |
| 463 | Q15_HI = 443, |
| 464 | Q16_HI = 444, |
| 465 | Q17_HI = 445, |
| 466 | Q18_HI = 446, |
| 467 | Q19_HI = 447, |
| 468 | Q20_HI = 448, |
| 469 | Q21_HI = 449, |
| 470 | Q22_HI = 450, |
| 471 | Q23_HI = 451, |
| 472 | Q24_HI = 452, |
| 473 | Q25_HI = 453, |
| 474 | Q26_HI = 454, |
| 475 | Q27_HI = 455, |
| 476 | Q28_HI = 456, |
| 477 | Q29_HI = 457, |
| 478 | Q30_HI = 458, |
| 479 | Q31_HI = 459, |
| 480 | S0_HI = 460, |
| 481 | S1_HI = 461, |
| 482 | S2_HI = 462, |
| 483 | S3_HI = 463, |
| 484 | S4_HI = 464, |
| 485 | S5_HI = 465, |
| 486 | S6_HI = 466, |
| 487 | S7_HI = 467, |
| 488 | S8_HI = 468, |
| 489 | S9_HI = 469, |
| 490 | S10_HI = 470, |
| 491 | S11_HI = 471, |
| 492 | S12_HI = 472, |
| 493 | S13_HI = 473, |
| 494 | S14_HI = 474, |
| 495 | S15_HI = 475, |
| 496 | S16_HI = 476, |
| 497 | S17_HI = 477, |
| 498 | S18_HI = 478, |
| 499 | S19_HI = 479, |
| 500 | S20_HI = 480, |
| 501 | S21_HI = 481, |
| 502 | S22_HI = 482, |
| 503 | S23_HI = 483, |
| 504 | S24_HI = 484, |
| 505 | S25_HI = 485, |
| 506 | S26_HI = 486, |
| 507 | S27_HI = 487, |
| 508 | S28_HI = 488, |
| 509 | S29_HI = 489, |
| 510 | S30_HI = 490, |
| 511 | S31_HI = 491, |
| 512 | W0_HI = 492, |
| 513 | W1_HI = 493, |
| 514 | W2_HI = 494, |
| 515 | W3_HI = 495, |
| 516 | W4_HI = 496, |
| 517 | W5_HI = 497, |
| 518 | W6_HI = 498, |
| 519 | W7_HI = 499, |
| 520 | W8_HI = 500, |
| 521 | W9_HI = 501, |
| 522 | W10_HI = 502, |
| 523 | W11_HI = 503, |
| 524 | W12_HI = 504, |
| 525 | W13_HI = 505, |
| 526 | W14_HI = 506, |
| 527 | W15_HI = 507, |
| 528 | W16_HI = 508, |
| 529 | W17_HI = 509, |
| 530 | W18_HI = 510, |
| 531 | W19_HI = 511, |
| 532 | W20_HI = 512, |
| 533 | W21_HI = 513, |
| 534 | W22_HI = 514, |
| 535 | W23_HI = 515, |
| 536 | W24_HI = 516, |
| 537 | W25_HI = 517, |
| 538 | W26_HI = 518, |
| 539 | W27_HI = 519, |
| 540 | W28_HI = 520, |
| 541 | W29_HI = 521, |
| 542 | W30_HI = 522, |
| 543 | D0_D1 = 523, |
| 544 | D1_D2 = 524, |
| 545 | D2_D3 = 525, |
| 546 | D3_D4 = 526, |
| 547 | D4_D5 = 527, |
| 548 | D5_D6 = 528, |
| 549 | D6_D7 = 529, |
| 550 | D7_D8 = 530, |
| 551 | D8_D9 = 531, |
| 552 | D9_D10 = 532, |
| 553 | D10_D11 = 533, |
| 554 | D11_D12 = 534, |
| 555 | D12_D13 = 535, |
| 556 | D13_D14 = 536, |
| 557 | D14_D15 = 537, |
| 558 | D15_D16 = 538, |
| 559 | D16_D17 = 539, |
| 560 | D17_D18 = 540, |
| 561 | D18_D19 = 541, |
| 562 | D19_D20 = 542, |
| 563 | D20_D21 = 543, |
| 564 | D21_D22 = 544, |
| 565 | D22_D23 = 545, |
| 566 | D23_D24 = 546, |
| 567 | D24_D25 = 547, |
| 568 | D25_D26 = 548, |
| 569 | D26_D27 = 549, |
| 570 | D27_D28 = 550, |
| 571 | D28_D29 = 551, |
| 572 | D29_D30 = 552, |
| 573 | D30_D31 = 553, |
| 574 | D31_D0 = 554, |
| 575 | D0_D1_D2_D3 = 555, |
| 576 | D1_D2_D3_D4 = 556, |
| 577 | D2_D3_D4_D5 = 557, |
| 578 | D3_D4_D5_D6 = 558, |
| 579 | D4_D5_D6_D7 = 559, |
| 580 | D5_D6_D7_D8 = 560, |
| 581 | D6_D7_D8_D9 = 561, |
| 582 | D7_D8_D9_D10 = 562, |
| 583 | D8_D9_D10_D11 = 563, |
| 584 | D9_D10_D11_D12 = 564, |
| 585 | D10_D11_D12_D13 = 565, |
| 586 | D11_D12_D13_D14 = 566, |
| 587 | D12_D13_D14_D15 = 567, |
| 588 | D13_D14_D15_D16 = 568, |
| 589 | D14_D15_D16_D17 = 569, |
| 590 | D15_D16_D17_D18 = 570, |
| 591 | D16_D17_D18_D19 = 571, |
| 592 | D17_D18_D19_D20 = 572, |
| 593 | D18_D19_D20_D21 = 573, |
| 594 | D19_D20_D21_D22 = 574, |
| 595 | D20_D21_D22_D23 = 575, |
| 596 | D21_D22_D23_D24 = 576, |
| 597 | D22_D23_D24_D25 = 577, |
| 598 | D23_D24_D25_D26 = 578, |
| 599 | D24_D25_D26_D27 = 579, |
| 600 | D25_D26_D27_D28 = 580, |
| 601 | D26_D27_D28_D29 = 581, |
| 602 | D27_D28_D29_D30 = 582, |
| 603 | D28_D29_D30_D31 = 583, |
| 604 | D29_D30_D31_D0 = 584, |
| 605 | D30_D31_D0_D1 = 585, |
| 606 | D31_D0_D1_D2 = 586, |
| 607 | D0_D1_D2 = 587, |
| 608 | D1_D2_D3 = 588, |
| 609 | D2_D3_D4 = 589, |
| 610 | D3_D4_D5 = 590, |
| 611 | D4_D5_D6 = 591, |
| 612 | D5_D6_D7 = 592, |
| 613 | D6_D7_D8 = 593, |
| 614 | D7_D8_D9 = 594, |
| 615 | D8_D9_D10 = 595, |
| 616 | D9_D10_D11 = 596, |
| 617 | D10_D11_D12 = 597, |
| 618 | D11_D12_D13 = 598, |
| 619 | D12_D13_D14 = 599, |
| 620 | D13_D14_D15 = 600, |
| 621 | D14_D15_D16 = 601, |
| 622 | D15_D16_D17 = 602, |
| 623 | D16_D17_D18 = 603, |
| 624 | D17_D18_D19 = 604, |
| 625 | D18_D19_D20 = 605, |
| 626 | D19_D20_D21 = 606, |
| 627 | D20_D21_D22 = 607, |
| 628 | D21_D22_D23 = 608, |
| 629 | D22_D23_D24 = 609, |
| 630 | D23_D24_D25 = 610, |
| 631 | D24_D25_D26 = 611, |
| 632 | D25_D26_D27 = 612, |
| 633 | D26_D27_D28 = 613, |
| 634 | D27_D28_D29 = 614, |
| 635 | D28_D29_D30 = 615, |
| 636 | D29_D30_D31 = 616, |
| 637 | D30_D31_D0 = 617, |
| 638 | D31_D0_D1 = 618, |
| 639 | P0_P1 = 619, |
| 640 | P1_P2 = 620, |
| 641 | P2_P3 = 621, |
| 642 | P3_P4 = 622, |
| 643 | P4_P5 = 623, |
| 644 | P5_P6 = 624, |
| 645 | P6_P7 = 625, |
| 646 | P7_P8 = 626, |
| 647 | P8_P9 = 627, |
| 648 | P9_P10 = 628, |
| 649 | P10_P11 = 629, |
| 650 | P11_P12 = 630, |
| 651 | P12_P13 = 631, |
| 652 | P13_P14 = 632, |
| 653 | P14_P15 = 633, |
| 654 | P15_P0 = 634, |
| 655 | Q0_Q1 = 635, |
| 656 | Q1_Q2 = 636, |
| 657 | Q2_Q3 = 637, |
| 658 | Q3_Q4 = 638, |
| 659 | Q4_Q5 = 639, |
| 660 | Q5_Q6 = 640, |
| 661 | Q6_Q7 = 641, |
| 662 | Q7_Q8 = 642, |
| 663 | Q8_Q9 = 643, |
| 664 | Q9_Q10 = 644, |
| 665 | Q10_Q11 = 645, |
| 666 | Q11_Q12 = 646, |
| 667 | Q12_Q13 = 647, |
| 668 | Q13_Q14 = 648, |
| 669 | Q14_Q15 = 649, |
| 670 | Q15_Q16 = 650, |
| 671 | Q16_Q17 = 651, |
| 672 | Q17_Q18 = 652, |
| 673 | Q18_Q19 = 653, |
| 674 | Q19_Q20 = 654, |
| 675 | Q20_Q21 = 655, |
| 676 | Q21_Q22 = 656, |
| 677 | Q22_Q23 = 657, |
| 678 | Q23_Q24 = 658, |
| 679 | Q24_Q25 = 659, |
| 680 | Q25_Q26 = 660, |
| 681 | Q26_Q27 = 661, |
| 682 | Q27_Q28 = 662, |
| 683 | Q28_Q29 = 663, |
| 684 | Q29_Q30 = 664, |
| 685 | Q30_Q31 = 665, |
| 686 | Q31_Q0 = 666, |
| 687 | Q0_Q1_Q2_Q3 = 667, |
| 688 | Q1_Q2_Q3_Q4 = 668, |
| 689 | Q2_Q3_Q4_Q5 = 669, |
| 690 | Q3_Q4_Q5_Q6 = 670, |
| 691 | Q4_Q5_Q6_Q7 = 671, |
| 692 | Q5_Q6_Q7_Q8 = 672, |
| 693 | Q6_Q7_Q8_Q9 = 673, |
| 694 | Q7_Q8_Q9_Q10 = 674, |
| 695 | Q8_Q9_Q10_Q11 = 675, |
| 696 | Q9_Q10_Q11_Q12 = 676, |
| 697 | Q10_Q11_Q12_Q13 = 677, |
| 698 | Q11_Q12_Q13_Q14 = 678, |
| 699 | Q12_Q13_Q14_Q15 = 679, |
| 700 | Q13_Q14_Q15_Q16 = 680, |
| 701 | Q14_Q15_Q16_Q17 = 681, |
| 702 | Q15_Q16_Q17_Q18 = 682, |
| 703 | Q16_Q17_Q18_Q19 = 683, |
| 704 | Q17_Q18_Q19_Q20 = 684, |
| 705 | Q18_Q19_Q20_Q21 = 685, |
| 706 | Q19_Q20_Q21_Q22 = 686, |
| 707 | Q20_Q21_Q22_Q23 = 687, |
| 708 | Q21_Q22_Q23_Q24 = 688, |
| 709 | Q22_Q23_Q24_Q25 = 689, |
| 710 | Q23_Q24_Q25_Q26 = 690, |
| 711 | Q24_Q25_Q26_Q27 = 691, |
| 712 | Q25_Q26_Q27_Q28 = 692, |
| 713 | Q26_Q27_Q28_Q29 = 693, |
| 714 | Q27_Q28_Q29_Q30 = 694, |
| 715 | Q28_Q29_Q30_Q31 = 695, |
| 716 | Q29_Q30_Q31_Q0 = 696, |
| 717 | Q30_Q31_Q0_Q1 = 697, |
| 718 | Q31_Q0_Q1_Q2 = 698, |
| 719 | Q0_Q1_Q2 = 699, |
| 720 | Q1_Q2_Q3 = 700, |
| 721 | Q2_Q3_Q4 = 701, |
| 722 | Q3_Q4_Q5 = 702, |
| 723 | Q4_Q5_Q6 = 703, |
| 724 | Q5_Q6_Q7 = 704, |
| 725 | Q6_Q7_Q8 = 705, |
| 726 | Q7_Q8_Q9 = 706, |
| 727 | Q8_Q9_Q10 = 707, |
| 728 | Q9_Q10_Q11 = 708, |
| 729 | Q10_Q11_Q12 = 709, |
| 730 | Q11_Q12_Q13 = 710, |
| 731 | Q12_Q13_Q14 = 711, |
| 732 | Q13_Q14_Q15 = 712, |
| 733 | Q14_Q15_Q16 = 713, |
| 734 | Q15_Q16_Q17 = 714, |
| 735 | Q16_Q17_Q18 = 715, |
| 736 | Q17_Q18_Q19 = 716, |
| 737 | Q18_Q19_Q20 = 717, |
| 738 | Q19_Q20_Q21 = 718, |
| 739 | Q20_Q21_Q22 = 719, |
| 740 | Q21_Q22_Q23 = 720, |
| 741 | Q22_Q23_Q24 = 721, |
| 742 | Q23_Q24_Q25 = 722, |
| 743 | Q24_Q25_Q26 = 723, |
| 744 | Q25_Q26_Q27 = 724, |
| 745 | Q26_Q27_Q28 = 725, |
| 746 | Q27_Q28_Q29 = 726, |
| 747 | Q28_Q29_Q30 = 727, |
| 748 | Q29_Q30_Q31 = 728, |
| 749 | Q30_Q31_Q0 = 729, |
| 750 | Q31_Q0_Q1 = 730, |
| 751 | X22_X23_X24_X25_X26_X27_X28_FP = 731, |
| 752 | X0_X1_X2_X3_X4_X5_X6_X7 = 732, |
| 753 | X2_X3_X4_X5_X6_X7_X8_X9 = 733, |
| 754 | X4_X5_X6_X7_X8_X9_X10_X11 = 734, |
| 755 | X6_X7_X8_X9_X10_X11_X12_X13 = 735, |
| 756 | X8_X9_X10_X11_X12_X13_X14_X15 = 736, |
| 757 | X10_X11_X12_X13_X14_X15_X16_X17 = 737, |
| 758 | X12_X13_X14_X15_X16_X17_X18_X19 = 738, |
| 759 | X14_X15_X16_X17_X18_X19_X20_X21 = 739, |
| 760 | X16_X17_X18_X19_X20_X21_X22_X23 = 740, |
| 761 | X18_X19_X20_X21_X22_X23_X24_X25 = 741, |
| 762 | X20_X21_X22_X23_X24_X25_X26_X27 = 742, |
| 763 | W30_WZR = 743, |
| 764 | W0_W1 = 744, |
| 765 | W2_W3 = 745, |
| 766 | W4_W5 = 746, |
| 767 | W6_W7 = 747, |
| 768 | W8_W9 = 748, |
| 769 | W10_W11 = 749, |
| 770 | W12_W13 = 750, |
| 771 | W14_W15 = 751, |
| 772 | W16_W17 = 752, |
| 773 | W18_W19 = 753, |
| 774 | W20_W21 = 754, |
| 775 | W22_W23 = 755, |
| 776 | W24_W25 = 756, |
| 777 | W26_W27 = 757, |
| 778 | W28_W29 = 758, |
| 779 | LR_XZR = 759, |
| 780 | X28_FP = 760, |
| 781 | X0_X1 = 761, |
| 782 | X2_X3 = 762, |
| 783 | X4_X5 = 763, |
| 784 | X6_X7 = 764, |
| 785 | X8_X9 = 765, |
| 786 | X10_X11 = 766, |
| 787 | X12_X13 = 767, |
| 788 | X14_X15 = 768, |
| 789 | X16_X17 = 769, |
| 790 | X18_X19 = 770, |
| 791 | X20_X21 = 771, |
| 792 | X22_X23 = 772, |
| 793 | X24_X25 = 773, |
| 794 | X26_X27 = 774, |
| 795 | Z0_Z1 = 775, |
| 796 | Z1_Z2 = 776, |
| 797 | Z2_Z3 = 777, |
| 798 | Z3_Z4 = 778, |
| 799 | Z4_Z5 = 779, |
| 800 | Z5_Z6 = 780, |
| 801 | Z6_Z7 = 781, |
| 802 | Z7_Z8 = 782, |
| 803 | Z8_Z9 = 783, |
| 804 | Z9_Z10 = 784, |
| 805 | Z10_Z11 = 785, |
| 806 | Z11_Z12 = 786, |
| 807 | Z12_Z13 = 787, |
| 808 | Z13_Z14 = 788, |
| 809 | Z14_Z15 = 789, |
| 810 | Z15_Z16 = 790, |
| 811 | Z16_Z17 = 791, |
| 812 | Z17_Z18 = 792, |
| 813 | Z18_Z19 = 793, |
| 814 | Z19_Z20 = 794, |
| 815 | Z20_Z21 = 795, |
| 816 | Z21_Z22 = 796, |
| 817 | Z22_Z23 = 797, |
| 818 | Z23_Z24 = 798, |
| 819 | Z24_Z25 = 799, |
| 820 | Z25_Z26 = 800, |
| 821 | Z26_Z27 = 801, |
| 822 | Z27_Z28 = 802, |
| 823 | Z28_Z29 = 803, |
| 824 | Z29_Z30 = 804, |
| 825 | Z30_Z31 = 805, |
| 826 | Z31_Z0 = 806, |
| 827 | Z0_Z1_Z2_Z3 = 807, |
| 828 | Z1_Z2_Z3_Z4 = 808, |
| 829 | Z2_Z3_Z4_Z5 = 809, |
| 830 | Z3_Z4_Z5_Z6 = 810, |
| 831 | Z4_Z5_Z6_Z7 = 811, |
| 832 | Z5_Z6_Z7_Z8 = 812, |
| 833 | Z6_Z7_Z8_Z9 = 813, |
| 834 | Z7_Z8_Z9_Z10 = 814, |
| 835 | Z8_Z9_Z10_Z11 = 815, |
| 836 | Z9_Z10_Z11_Z12 = 816, |
| 837 | Z10_Z11_Z12_Z13 = 817, |
| 838 | Z11_Z12_Z13_Z14 = 818, |
| 839 | Z12_Z13_Z14_Z15 = 819, |
| 840 | Z13_Z14_Z15_Z16 = 820, |
| 841 | Z14_Z15_Z16_Z17 = 821, |
| 842 | Z15_Z16_Z17_Z18 = 822, |
| 843 | Z16_Z17_Z18_Z19 = 823, |
| 844 | Z17_Z18_Z19_Z20 = 824, |
| 845 | Z18_Z19_Z20_Z21 = 825, |
| 846 | Z19_Z20_Z21_Z22 = 826, |
| 847 | Z20_Z21_Z22_Z23 = 827, |
| 848 | Z21_Z22_Z23_Z24 = 828, |
| 849 | Z22_Z23_Z24_Z25 = 829, |
| 850 | Z23_Z24_Z25_Z26 = 830, |
| 851 | Z24_Z25_Z26_Z27 = 831, |
| 852 | Z25_Z26_Z27_Z28 = 832, |
| 853 | Z26_Z27_Z28_Z29 = 833, |
| 854 | Z27_Z28_Z29_Z30 = 834, |
| 855 | Z28_Z29_Z30_Z31 = 835, |
| 856 | Z29_Z30_Z31_Z0 = 836, |
| 857 | Z30_Z31_Z0_Z1 = 837, |
| 858 | Z31_Z0_Z1_Z2 = 838, |
| 859 | Z0_Z1_Z2 = 839, |
| 860 | Z1_Z2_Z3 = 840, |
| 861 | Z2_Z3_Z4 = 841, |
| 862 | Z3_Z4_Z5 = 842, |
| 863 | Z4_Z5_Z6 = 843, |
| 864 | Z5_Z6_Z7 = 844, |
| 865 | Z6_Z7_Z8 = 845, |
| 866 | Z7_Z8_Z9 = 846, |
| 867 | Z8_Z9_Z10 = 847, |
| 868 | Z9_Z10_Z11 = 848, |
| 869 | Z10_Z11_Z12 = 849, |
| 870 | Z11_Z12_Z13 = 850, |
| 871 | Z12_Z13_Z14 = 851, |
| 872 | Z13_Z14_Z15 = 852, |
| 873 | Z14_Z15_Z16 = 853, |
| 874 | Z15_Z16_Z17 = 854, |
| 875 | Z16_Z17_Z18 = 855, |
| 876 | Z17_Z18_Z19 = 856, |
| 877 | Z18_Z19_Z20 = 857, |
| 878 | Z19_Z20_Z21 = 858, |
| 879 | Z20_Z21_Z22 = 859, |
| 880 | Z21_Z22_Z23 = 860, |
| 881 | Z22_Z23_Z24 = 861, |
| 882 | Z23_Z24_Z25 = 862, |
| 883 | Z24_Z25_Z26 = 863, |
| 884 | Z25_Z26_Z27 = 864, |
| 885 | Z26_Z27_Z28 = 865, |
| 886 | Z27_Z28_Z29 = 866, |
| 887 | Z28_Z29_Z30 = 867, |
| 888 | Z29_Z30_Z31 = 868, |
| 889 | Z30_Z31_Z0 = 869, |
| 890 | Z31_Z0_Z1 = 870, |
| 891 | Z16_Z24 = 871, |
| 892 | Z17_Z25 = 872, |
| 893 | Z18_Z26 = 873, |
| 894 | Z19_Z27 = 874, |
| 895 | Z20_Z28 = 875, |
| 896 | Z21_Z29 = 876, |
| 897 | Z22_Z30 = 877, |
| 898 | Z23_Z31 = 878, |
| 899 | Z0_Z8 = 879, |
| 900 | Z1_Z9 = 880, |
| 901 | Z2_Z10 = 881, |
| 902 | Z3_Z11 = 882, |
| 903 | Z4_Z12 = 883, |
| 904 | Z5_Z13 = 884, |
| 905 | Z6_Z14 = 885, |
| 906 | Z7_Z15 = 886, |
| 907 | Z16_Z20_Z24_Z28 = 887, |
| 908 | Z17_Z21_Z25_Z29 = 888, |
| 909 | Z18_Z22_Z26_Z30 = 889, |
| 910 | Z19_Z23_Z27_Z31 = 890, |
| 911 | Z0_Z4_Z8_Z12 = 891, |
| 912 | Z1_Z5_Z9_Z13 = 892, |
| 913 | Z2_Z6_Z10_Z14 = 893, |
| 914 | Z3_Z7_Z11_Z15 = 894, |
| 915 | NUM_TARGET_REGS // 895 |
| 916 | }; |
| 917 | } // end namespace AArch64 |
| 918 | |
| 919 | // Register classes |
| 920 | |
| 921 | namespace AArch64 { |
| 922 | enum { |
| 923 | W_HI_DummyRCRegClassID = 0, |
| 924 | B_HI_DummyRCRegClassID = 1, |
| 925 | D_HI_DummyRCRegClassID = 2, |
| 926 | H_HI_DummyRCRegClassID = 3, |
| 927 | Q_HI_DummyRCRegClassID = 4, |
| 928 | S_HI_DummyRCRegClassID = 5, |
| 929 | FPR8RegClassID = 6, |
| 930 | FPR16RegClassID = 7, |
| 931 | PPRorPNRRegClassID = 8, |
| 932 | FPR16_loRegClassID = 9, |
| 933 | PNRRegClassID = 10, |
| 934 | PPRRegClassID = 11, |
| 935 | PNR_3bRegClassID = 12, |
| 936 | PNR_p8to15RegClassID = 13, |
| 937 | PPRMul2RegClassID = 14, |
| 938 | PPR_3bRegClassID = 15, |
| 939 | PPR_p8to15RegClassID = 16, |
| 940 | PPRMul2_and_PPR_3bRegClassID = 17, |
| 941 | PPRMul2_and_PPR_p8to15RegClassID = 18, |
| 942 | PPR2RegClassID = 19, |
| 943 | PPR2Mul2RegClassID = 20, |
| 944 | PPR2_with_psub1_in_PPRMul2RegClassID = 21, |
| 945 | PPR2_with_psub1_in_PPR_3bRegClassID = 22, |
| 946 | PPR2_with_psub1_in_PPR_p8to15RegClassID = 23, |
| 947 | PPR2_with_psub_in_PNR_3bRegClassID = 24, |
| 948 | PPR2_with_psub_in_PNR_p8to15RegClassID = 25, |
| 949 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID = 26, |
| 950 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID = 27, |
| 951 | PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClassID = 28, |
| 952 | PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClassID = 29, |
| 953 | PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID = 30, |
| 954 | PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID = 31, |
| 955 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClassID = 32, |
| 956 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClassID = 33, |
| 957 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID = 34, |
| 958 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID = 35, |
| 959 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID = 36, |
| 960 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID = 37, |
| 961 | GPR32allRegClassID = 38, |
| 962 | FPR32RegClassID = 39, |
| 963 | GPR32RegClassID = 40, |
| 964 | GPR32spRegClassID = 41, |
| 965 | GPR32commonRegClassID = 42, |
| 966 | FPR32_with_hsub_in_FPR16_loRegClassID = 43, |
| 967 | GPR32argRegClassID = 44, |
| 968 | MatrixIndexGPR32_12_15RegClassID = 45, |
| 969 | MatrixIndexGPR32_8_11RegClassID = 46, |
| 970 | CCRRegClassID = 47, |
| 971 | GPR32sponlyRegClassID = 48, |
| 972 | WSeqPairsClassRegClassID = 49, |
| 973 | WSeqPairsClass_with_subo32_in_GPR32commonRegClassID = 50, |
| 974 | WSeqPairsClass_with_sube32_in_GPR32argRegClassID = 51, |
| 975 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID = 52, |
| 976 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID = 53, |
| 977 | GPR64allRegClassID = 54, |
| 978 | FPR64RegClassID = 55, |
| 979 | GPR64RegClassID = 56, |
| 980 | GPR64spRegClassID = 57, |
| 981 | GPR64commonRegClassID = 58, |
| 982 | GPR64noipRegClassID = 59, |
| 983 | GPR64common_and_GPR64noipRegClassID = 60, |
| 984 | tcGPR64RegClassID = 61, |
| 985 | tcGPRnotx16RegClassID = 62, |
| 986 | tcGPRnotx16x17RegClassID = 63, |
| 987 | FPR64_loRegClassID = 64, |
| 988 | GPR64argRegClassID = 65, |
| 989 | FIXED_REGSRegClassID = 66, |
| 990 | GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 67, |
| 991 | GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 68, |
| 992 | FIXED_REGS_with_sub_32RegClassID = 69, |
| 993 | tcGPRx16x17RegClassID = 70, |
| 994 | FIXED_REGS_and_GPR64RegClassID = 71, |
| 995 | GPR64sponlyRegClassID = 72, |
| 996 | tcGPRx17RegClassID = 73, |
| 997 | DDRegClassID = 74, |
| 998 | DD_with_dsub0_in_FPR64_loRegClassID = 75, |
| 999 | DD_with_dsub1_in_FPR64_loRegClassID = 76, |
| 1000 | XSeqPairsClassRegClassID = 77, |
| 1001 | DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID = 78, |
| 1002 | XSeqPairsClass_with_subo64_in_GPR64commonRegClassID = 79, |
| 1003 | XSeqPairsClass_with_subo64_in_GPR64noipRegClassID = 80, |
| 1004 | XSeqPairsClass_with_sube64_in_GPR64noipRegClassID = 81, |
| 1005 | XSeqPairsClass_with_sube64_in_tcGPR64RegClassID = 82, |
| 1006 | XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID = 83, |
| 1007 | XSeqPairsClass_with_subo64_in_tcGPR64RegClassID = 84, |
| 1008 | XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID = 85, |
| 1009 | XSeqPairsClass_with_sube64_in_GPR64argRegClassID = 86, |
| 1010 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 87, |
| 1011 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 88, |
| 1012 | XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClassID = 89, |
| 1013 | XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID = 90, |
| 1014 | FPR128RegClassID = 91, |
| 1015 | ZPRRegClassID = 92, |
| 1016 | FPR128_loRegClassID = 93, |
| 1017 | MPR128RegClassID = 94, |
| 1018 | ZPRMul2RegClassID = 95, |
| 1019 | ZPR_4bRegClassID = 96, |
| 1020 | FPR128_0to7RegClassID = 97, |
| 1021 | ZPRMul2_HiRegClassID = 98, |
| 1022 | ZPRMul2_LoRegClassID = 99, |
| 1023 | ZPRMul4RegClassID = 100, |
| 1024 | ZPR_3bRegClassID = 101, |
| 1025 | ZPR_KRegClassID = 102, |
| 1026 | ZPRMul2_Hi_and_ZPRMul4RegClassID = 103, |
| 1027 | ZPRMul2_Lo_and_ZPRMul4RegClassID = 104, |
| 1028 | ZPRMul2_and_ZPR_3bRegClassID = 105, |
| 1029 | ZPRMul2_and_ZPR_KRegClassID = 106, |
| 1030 | ZPRMul4_and_ZPR_3bRegClassID = 107, |
| 1031 | ZPRMul4_and_ZPR_KRegClassID = 108, |
| 1032 | DDDRegClassID = 109, |
| 1033 | DDD_with_dsub0_in_FPR64_loRegClassID = 110, |
| 1034 | DDD_with_dsub1_in_FPR64_loRegClassID = 111, |
| 1035 | DDD_with_dsub2_in_FPR64_loRegClassID = 112, |
| 1036 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID = 113, |
| 1037 | DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID = 114, |
| 1038 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID = 115, |
| 1039 | DDDDRegClassID = 116, |
| 1040 | DDDD_with_dsub0_in_FPR64_loRegClassID = 117, |
| 1041 | DDDD_with_dsub1_in_FPR64_loRegClassID = 118, |
| 1042 | DDDD_with_dsub2_in_FPR64_loRegClassID = 119, |
| 1043 | DDDD_with_dsub3_in_FPR64_loRegClassID = 120, |
| 1044 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID = 121, |
| 1045 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID = 122, |
| 1046 | DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 123, |
| 1047 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID = 124, |
| 1048 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 125, |
| 1049 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 126, |
| 1050 | QQRegClassID = 127, |
| 1051 | ZPR2RegClassID = 128, |
| 1052 | ZPR2StridedOrContiguousRegClassID = 129, |
| 1053 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID = 130, |
| 1054 | QQ_with_dsub1_in_FPR64_loRegClassID = 131, |
| 1055 | QQ_with_qsub0_in_FPR128_loRegClassID = 132, |
| 1056 | ZPR2Mul2RegClassID = 133, |
| 1057 | ZPR2StridedRegClassID = 134, |
| 1058 | ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID = 135, |
| 1059 | ZPR2_with_dsub1_in_FPR64_loRegClassID = 136, |
| 1060 | ZPR2_with_zsub1_in_ZPRMul2RegClassID = 137, |
| 1061 | ZPR2_with_zsub_in_FPR128_loRegClassID = 138, |
| 1062 | QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClassID = 139, |
| 1063 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID = 140, |
| 1064 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID = 141, |
| 1065 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID = 142, |
| 1066 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID = 143, |
| 1067 | ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID = 144, |
| 1068 | QQ_with_qsub0_in_FPR128_0to7RegClassID = 145, |
| 1069 | QQ_with_qsub1_in_FPR128_0to7RegClassID = 146, |
| 1070 | ZPR2Mul2_HiRegClassID = 147, |
| 1071 | ZPR2Mul2_LoRegClassID = 148, |
| 1072 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID = 149, |
| 1073 | ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID = 150, |
| 1074 | ZPR2Strided_with_dsub_in_FPR64_loRegClassID = 151, |
| 1075 | ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID = 152, |
| 1076 | ZPR2_with_qsub1_in_FPR128_0to7RegClassID = 153, |
| 1077 | ZPR2_with_zsub0_in_ZPRMul4RegClassID = 154, |
| 1078 | ZPR2_with_zsub0_in_ZPR_KRegClassID = 155, |
| 1079 | ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 156, |
| 1080 | ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID = 157, |
| 1081 | ZPR2_with_zsub1_in_ZPRMul4RegClassID = 158, |
| 1082 | ZPR2_with_zsub1_in_ZPR_KRegClassID = 159, |
| 1083 | ZPR2_with_zsub_in_FPR128_0to7RegClassID = 160, |
| 1084 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID = 161, |
| 1085 | QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClassID = 162, |
| 1086 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID = 163, |
| 1087 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID = 164, |
| 1088 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 165, |
| 1089 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 166, |
| 1090 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID = 167, |
| 1091 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID = 168, |
| 1092 | ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 169, |
| 1093 | ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 170, |
| 1094 | ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 171, |
| 1095 | ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 172, |
| 1096 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID = 173, |
| 1097 | ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID = 174, |
| 1098 | ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClassID = 175, |
| 1099 | ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID = 176, |
| 1100 | ZPR2Strided_with_zsub0_in_ZPR_KRegClassID = 177, |
| 1101 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID = 178, |
| 1102 | ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 179, |
| 1103 | ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 180, |
| 1104 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID = 181, |
| 1105 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID = 182, |
| 1106 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID = 183, |
| 1107 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID = 184, |
| 1108 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID = 185, |
| 1109 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 186, |
| 1110 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID = 187, |
| 1111 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 188, |
| 1112 | ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 189, |
| 1113 | ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 190, |
| 1114 | ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID = 191, |
| 1115 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID = 192, |
| 1116 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID = 193, |
| 1117 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID = 194, |
| 1118 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID = 195, |
| 1119 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 196, |
| 1120 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID = 197, |
| 1121 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID = 198, |
| 1122 | ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID = 199, |
| 1123 | ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 200, |
| 1124 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 201, |
| 1125 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 202, |
| 1126 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 203, |
| 1127 | MPR64RegClassID = 204, |
| 1128 | QQQRegClassID = 205, |
| 1129 | ZPR3RegClassID = 206, |
| 1130 | QQQ_with_dsub1_in_FPR64_loRegClassID = 207, |
| 1131 | QQQ_with_dsub2_in_FPR64_loRegClassID = 208, |
| 1132 | QQQ_with_qsub0_in_FPR128_loRegClassID = 209, |
| 1133 | ZPR3_with_dsub1_in_FPR64_loRegClassID = 210, |
| 1134 | ZPR3_with_dsub2_in_FPR64_loRegClassID = 211, |
| 1135 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 212, |
| 1136 | ZPR3_with_zsub1_in_ZPRMul2RegClassID = 213, |
| 1137 | ZPR3_with_zsub_in_FPR128_loRegClassID = 214, |
| 1138 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID = 215, |
| 1139 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID = 216, |
| 1140 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID = 217, |
| 1141 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID = 218, |
| 1142 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID = 219, |
| 1143 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID = 220, |
| 1144 | QQQ_with_qsub0_in_FPR128_0to7RegClassID = 221, |
| 1145 | QQQ_with_qsub1_in_FPR128_0to7RegClassID = 222, |
| 1146 | QQQ_with_qsub2_in_FPR128_0to7RegClassID = 223, |
| 1147 | ZPR3_with_qsub1_in_FPR128_0to7RegClassID = 224, |
| 1148 | ZPR3_with_qsub2_in_FPR128_0to7RegClassID = 225, |
| 1149 | ZPR3_with_zsub0_in_ZPRMul4RegClassID = 226, |
| 1150 | ZPR3_with_zsub0_in_ZPR_KRegClassID = 227, |
| 1151 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID = 228, |
| 1152 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID = 229, |
| 1153 | ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID = 230, |
| 1154 | ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID = 231, |
| 1155 | ZPR3_with_zsub1_in_ZPRMul4RegClassID = 232, |
| 1156 | ZPR3_with_zsub1_in_ZPR_KRegClassID = 233, |
| 1157 | ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID = 234, |
| 1158 | ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID = 235, |
| 1159 | ZPR3_with_zsub2_in_ZPRMul4RegClassID = 236, |
| 1160 | ZPR3_with_zsub2_in_ZPR_KRegClassID = 237, |
| 1161 | ZPR3_with_zsub_in_FPR128_0to7RegClassID = 238, |
| 1162 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID = 239, |
| 1163 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID = 240, |
| 1164 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClassID = 241, |
| 1165 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID = 242, |
| 1166 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID = 243, |
| 1167 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID = 244, |
| 1168 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID = 245, |
| 1169 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID = 246, |
| 1170 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID = 247, |
| 1171 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID = 248, |
| 1172 | ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID = 249, |
| 1173 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID = 250, |
| 1174 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID = 251, |
| 1175 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID = 252, |
| 1176 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 253, |
| 1177 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID = 254, |
| 1178 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 255, |
| 1179 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 256, |
| 1180 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 257, |
| 1181 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 258, |
| 1182 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 259, |
| 1183 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 260, |
| 1184 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 261, |
| 1185 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 262, |
| 1186 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 263, |
| 1187 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID = 264, |
| 1188 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClassID = 265, |
| 1189 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID = 266, |
| 1190 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID = 267, |
| 1191 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID = 268, |
| 1192 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID = 269, |
| 1193 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 270, |
| 1194 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 271, |
| 1195 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 272, |
| 1196 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID = 273, |
| 1197 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 274, |
| 1198 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 275, |
| 1199 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID = 276, |
| 1200 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID = 277, |
| 1201 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID = 278, |
| 1202 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID = 279, |
| 1203 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 280, |
| 1204 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID = 281, |
| 1205 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 282, |
| 1206 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID = 283, |
| 1207 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID = 284, |
| 1208 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID = 285, |
| 1209 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID = 286, |
| 1210 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID = 287, |
| 1211 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID = 288, |
| 1212 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID = 289, |
| 1213 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 290, |
| 1214 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 291, |
| 1215 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 292, |
| 1216 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID = 293, |
| 1217 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID = 294, |
| 1218 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID = 295, |
| 1219 | QQQQRegClassID = 296, |
| 1220 | ZPR4RegClassID = 297, |
| 1221 | QQQQ_with_dsub1_in_FPR64_loRegClassID = 298, |
| 1222 | QQQQ_with_dsub2_in_FPR64_loRegClassID = 299, |
| 1223 | QQQQ_with_dsub3_in_FPR64_loRegClassID = 300, |
| 1224 | QQQQ_with_qsub0_in_FPR128_loRegClassID = 301, |
| 1225 | ZPR4StridedOrContiguousRegClassID = 302, |
| 1226 | ZPR4_with_dsub1_in_FPR64_loRegClassID = 303, |
| 1227 | ZPR4_with_dsub2_in_FPR64_loRegClassID = 304, |
| 1228 | ZPR4_with_dsub3_in_FPR64_loRegClassID = 305, |
| 1229 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 306, |
| 1230 | ZPR4_with_zsub1_in_ZPRMul2RegClassID = 307, |
| 1231 | ZPR4_with_zsub_in_FPR128_loRegClassID = 308, |
| 1232 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID = 309, |
| 1233 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID = 310, |
| 1234 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID = 311, |
| 1235 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID = 312, |
| 1236 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID = 313, |
| 1237 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID = 314, |
| 1238 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID = 315, |
| 1239 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID = 316, |
| 1240 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID = 317, |
| 1241 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID = 318, |
| 1242 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID = 319, |
| 1243 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID = 320, |
| 1244 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID = 321, |
| 1245 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID = 322, |
| 1246 | QQQQ_with_qsub0_in_FPR128_0to7RegClassID = 323, |
| 1247 | QQQQ_with_qsub1_in_FPR128_0to7RegClassID = 324, |
| 1248 | QQQQ_with_qsub2_in_FPR128_0to7RegClassID = 325, |
| 1249 | QQQQ_with_qsub3_in_FPR128_0to7RegClassID = 326, |
| 1250 | ZPR4Mul4RegClassID = 327, |
| 1251 | ZPR4StridedRegClassID = 328, |
| 1252 | ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID = 329, |
| 1253 | ZPR4_with_qsub1_in_FPR128_0to7RegClassID = 330, |
| 1254 | ZPR4_with_qsub2_in_FPR128_0to7RegClassID = 331, |
| 1255 | ZPR4_with_qsub3_in_FPR128_0to7RegClassID = 332, |
| 1256 | ZPR4_with_zsub0_in_ZPR_KRegClassID = 333, |
| 1257 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID = 334, |
| 1258 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID = 335, |
| 1259 | ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID = 336, |
| 1260 | ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID = 337, |
| 1261 | ZPR4_with_zsub1_in_ZPRMul4RegClassID = 338, |
| 1262 | ZPR4_with_zsub1_in_ZPR_KRegClassID = 339, |
| 1263 | ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID = 340, |
| 1264 | ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID = 341, |
| 1265 | ZPR4_with_zsub2_in_ZPRMul4RegClassID = 342, |
| 1266 | ZPR4_with_zsub2_in_ZPR_KRegClassID = 343, |
| 1267 | ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID = 344, |
| 1268 | ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID = 345, |
| 1269 | ZPR4_with_zsub3_in_ZPRMul4RegClassID = 346, |
| 1270 | ZPR4_with_zsub3_in_ZPR_KRegClassID = 347, |
| 1271 | ZPR4_with_zsub_in_FPR128_0to7RegClassID = 348, |
| 1272 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID = 349, |
| 1273 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID = 350, |
| 1274 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID = 351, |
| 1275 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClassID = 352, |
| 1276 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID = 353, |
| 1277 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID = 354, |
| 1278 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID = 355, |
| 1279 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID = 356, |
| 1280 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID = 357, |
| 1281 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID = 358, |
| 1282 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID = 359, |
| 1283 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID = 360, |
| 1284 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID = 361, |
| 1285 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID = 362, |
| 1286 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID = 363, |
| 1287 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID = 364, |
| 1288 | ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID = 365, |
| 1289 | ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID = 366, |
| 1290 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID = 367, |
| 1291 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID = 368, |
| 1292 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID = 369, |
| 1293 | ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID = 370, |
| 1294 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID = 371, |
| 1295 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID = 372, |
| 1296 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID = 373, |
| 1297 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 374, |
| 1298 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 375, |
| 1299 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID = 376, |
| 1300 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID = 377, |
| 1301 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID = 378, |
| 1302 | ZPR4Strided_with_dsub_in_FPR64_loRegClassID = 379, |
| 1303 | ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID = 380, |
| 1304 | ZPR4Strided_with_zsub1_in_ZPR_KRegClassID = 381, |
| 1305 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID = 382, |
| 1306 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID = 383, |
| 1307 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 384, |
| 1308 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 385, |
| 1309 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 386, |
| 1310 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 387, |
| 1311 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID = 388, |
| 1312 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 389, |
| 1313 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 390, |
| 1314 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 391, |
| 1315 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 392, |
| 1316 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID = 393, |
| 1317 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID = 394, |
| 1318 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 395, |
| 1319 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 396, |
| 1320 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 397, |
| 1321 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 398, |
| 1322 | ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 399, |
| 1323 | ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 400, |
| 1324 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID = 401, |
| 1325 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClassID = 402, |
| 1326 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID = 403, |
| 1327 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID = 404, |
| 1328 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID = 405, |
| 1329 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID = 406, |
| 1330 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID = 407, |
| 1331 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID = 408, |
| 1332 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID = 409, |
| 1333 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID = 410, |
| 1334 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID = 411, |
| 1335 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 412, |
| 1336 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 413, |
| 1337 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 414, |
| 1338 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID = 415, |
| 1339 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 416, |
| 1340 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID = 417, |
| 1341 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 418, |
| 1342 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 419, |
| 1343 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 420, |
| 1344 | ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClassID = 421, |
| 1345 | ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClassID = 422, |
| 1346 | ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClassID = 423, |
| 1347 | ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClassID = 424, |
| 1348 | ZPR4Strided_with_zsub0_in_ZPRMul4RegClassID = 425, |
| 1349 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID = 426, |
| 1350 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClassID = 427, |
| 1351 | ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID = 428, |
| 1352 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID = 429, |
| 1353 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID = 430, |
| 1354 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID = 431, |
| 1355 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID = 432, |
| 1356 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 433, |
| 1357 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID = 434, |
| 1358 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID = 435, |
| 1359 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID = 436, |
| 1360 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID = 437, |
| 1361 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClassID = 438, |
| 1362 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID = 439, |
| 1363 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID = 440, |
| 1364 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID = 441, |
| 1365 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID = 442, |
| 1366 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID = 443, |
| 1367 | ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 444, |
| 1368 | ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID = 445, |
| 1369 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID = 446, |
| 1370 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID = 447, |
| 1371 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID = 448, |
| 1372 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID = 449, |
| 1373 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 450, |
| 1374 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 451, |
| 1375 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID = 452, |
| 1376 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID = 453, |
| 1377 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID = 454, |
| 1378 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID = 455, |
| 1379 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID = 456, |
| 1380 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID = 457, |
| 1381 | GPR64x8ClassRegClassID = 458, |
| 1382 | GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID = 459, |
| 1383 | GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 460, |
| 1384 | GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 461, |
| 1385 | GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 462, |
| 1386 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 463, |
| 1387 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 464, |
| 1388 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 465, |
| 1389 | GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID = 466, |
| 1390 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 467, |
| 1391 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 468, |
| 1392 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 469, |
| 1393 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 470, |
| 1394 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 471, |
| 1395 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 472, |
| 1396 | GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID = 473, |
| 1397 | GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID = 474, |
| 1398 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 475, |
| 1399 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 476, |
| 1400 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 477, |
| 1401 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 478, |
| 1402 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 479, |
| 1403 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 480, |
| 1404 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 481, |
| 1405 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 482, |
| 1406 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 483, |
| 1407 | GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID = 484, |
| 1408 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 485, |
| 1409 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 486, |
| 1410 | GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID = 487, |
| 1411 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 488, |
| 1412 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 489, |
| 1413 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 490, |
| 1414 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 491, |
| 1415 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 492, |
| 1416 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 493, |
| 1417 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 494, |
| 1418 | GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID = 495, |
| 1419 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 496, |
| 1420 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 497, |
| 1421 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 498, |
| 1422 | GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID = 499, |
| 1423 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 500, |
| 1424 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 501, |
| 1425 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 502, |
| 1426 | GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID = 503, |
| 1427 | GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID = 504, |
| 1428 | GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID = 505, |
| 1429 | GPR64x8Class_with_sub_32_in_GPR32argRegClassID = 506, |
| 1430 | MPR32RegClassID = 507, |
| 1431 | GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID = 508, |
| 1432 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 509, |
| 1433 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 510, |
| 1434 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 511, |
| 1435 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 512, |
| 1436 | GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 513, |
| 1437 | GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID = 514, |
| 1438 | GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 515, |
| 1439 | GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 516, |
| 1440 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 517, |
| 1441 | GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClassID = 518, |
| 1442 | GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 519, |
| 1443 | GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClassID = 520, |
| 1444 | GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 521, |
| 1445 | GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClassID = 522, |
| 1446 | GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID = 523, |
| 1447 | GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClassID = 524, |
| 1448 | GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID = 525, |
| 1449 | ZTRRegClassID = 526, |
| 1450 | MPR16RegClassID = 527, |
| 1451 | MPRRegClassID = 528, |
| 1452 | MPR8RegClassID = 529, |
| 1453 | |
| 1454 | }; |
| 1455 | } // end namespace AArch64 |
| 1456 | |
| 1457 | |
| 1458 | // Register alternate name indices |
| 1459 | |
| 1460 | namespace AArch64 { |
| 1461 | enum { |
| 1462 | NoRegAltName, // 0 |
| 1463 | vlist1, // 1 |
| 1464 | vreg, // 2 |
| 1465 | NUM_TARGET_REG_ALT_NAMES = 3 |
| 1466 | }; |
| 1467 | } // end namespace AArch64 |
| 1468 | |
| 1469 | |
| 1470 | // Subregister indices |
| 1471 | |
| 1472 | namespace AArch64 { |
| 1473 | enum : uint16_t { |
| 1474 | NoSubRegister, |
| 1475 | bsub, // 1 |
| 1476 | bsub_hi, // 2 |
| 1477 | dsub, // 3 |
| 1478 | dsub0, // 4 |
| 1479 | dsub1, // 5 |
| 1480 | dsub2, // 6 |
| 1481 | dsub3, // 7 |
| 1482 | dsub_hi, // 8 |
| 1483 | hsub, // 9 |
| 1484 | hsub_hi, // 10 |
| 1485 | psub, // 11 |
| 1486 | psub0, // 12 |
| 1487 | psub1, // 13 |
| 1488 | qsub0, // 14 |
| 1489 | qsub1, // 15 |
| 1490 | qsub2, // 16 |
| 1491 | qsub3, // 17 |
| 1492 | ssub, // 18 |
| 1493 | ssub_hi, // 19 |
| 1494 | sub_32, // 20 |
| 1495 | sub_32_hi, // 21 |
| 1496 | sube32, // 22 |
| 1497 | sube64, // 23 |
| 1498 | subo32, // 24 |
| 1499 | subo64, // 25 |
| 1500 | x8sub_0, // 26 |
| 1501 | x8sub_1, // 27 |
| 1502 | x8sub_2, // 28 |
| 1503 | x8sub_3, // 29 |
| 1504 | x8sub_4, // 30 |
| 1505 | x8sub_5, // 31 |
| 1506 | x8sub_6, // 32 |
| 1507 | x8sub_7, // 33 |
| 1508 | zasubb, // 34 |
| 1509 | zasubd0, // 35 |
| 1510 | zasubd1, // 36 |
| 1511 | zasubh0, // 37 |
| 1512 | zasubh1, // 38 |
| 1513 | zasubq0, // 39 |
| 1514 | zasubq1, // 40 |
| 1515 | zasubs0, // 41 |
| 1516 | zasubs1, // 42 |
| 1517 | zsub, // 43 |
| 1518 | zsub0, // 44 |
| 1519 | zsub1, // 45 |
| 1520 | zsub2, // 46 |
| 1521 | zsub3, // 47 |
| 1522 | zsub_hi, // 48 |
| 1523 | zasubd1_then_zasubq0, // 49 |
| 1524 | zasubd1_then_zasubq1, // 50 |
| 1525 | zasubs1_then_zasubd0, // 51 |
| 1526 | zasubs1_then_zasubd1, // 52 |
| 1527 | zasubs1_then_zasubq0, // 53 |
| 1528 | zasubs1_then_zasubq1, // 54 |
| 1529 | zasubs1_then_zasubd1_then_zasubq0, // 55 |
| 1530 | zasubs1_then_zasubd1_then_zasubq1, // 56 |
| 1531 | zasubh1_then_zasubd0, // 57 |
| 1532 | zasubh1_then_zasubd1, // 58 |
| 1533 | zasubh1_then_zasubq0, // 59 |
| 1534 | zasubh1_then_zasubq1, // 60 |
| 1535 | zasubh1_then_zasubs0, // 61 |
| 1536 | zasubh1_then_zasubs1, // 62 |
| 1537 | zasubh1_then_zasubd1_then_zasubq0, // 63 |
| 1538 | zasubh1_then_zasubd1_then_zasubq1, // 64 |
| 1539 | zasubh1_then_zasubs1_then_zasubd0, // 65 |
| 1540 | zasubh1_then_zasubs1_then_zasubd1, // 66 |
| 1541 | zasubh1_then_zasubs1_then_zasubq0, // 67 |
| 1542 | zasubh1_then_zasubs1_then_zasubq1, // 68 |
| 1543 | zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, // 69 |
| 1544 | zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, // 70 |
| 1545 | dsub1_then_bsub, // 71 |
| 1546 | dsub1_then_bsub_hi, // 72 |
| 1547 | dsub1_then_hsub, // 73 |
| 1548 | dsub1_then_hsub_hi, // 74 |
| 1549 | dsub1_then_ssub, // 75 |
| 1550 | dsub1_then_ssub_hi, // 76 |
| 1551 | dsub3_then_bsub, // 77 |
| 1552 | dsub3_then_bsub_hi, // 78 |
| 1553 | dsub3_then_hsub, // 79 |
| 1554 | dsub3_then_hsub_hi, // 80 |
| 1555 | dsub3_then_ssub, // 81 |
| 1556 | dsub3_then_ssub_hi, // 82 |
| 1557 | dsub2_then_bsub, // 83 |
| 1558 | dsub2_then_bsub_hi, // 84 |
| 1559 | dsub2_then_hsub, // 85 |
| 1560 | dsub2_then_hsub_hi, // 86 |
| 1561 | dsub2_then_ssub, // 87 |
| 1562 | dsub2_then_ssub_hi, // 88 |
| 1563 | psub1_then_psub, // 89 |
| 1564 | qsub1_then_dsub_hi, // 90 |
| 1565 | qsub3_then_dsub_hi, // 91 |
| 1566 | qsub2_then_dsub_hi, // 92 |
| 1567 | x8sub_7_then_sub_32, // 93 |
| 1568 | x8sub_7_then_sub_32_hi, // 94 |
| 1569 | x8sub_6_then_sub_32, // 95 |
| 1570 | x8sub_6_then_sub_32_hi, // 96 |
| 1571 | x8sub_5_then_sub_32, // 97 |
| 1572 | x8sub_5_then_sub_32_hi, // 98 |
| 1573 | x8sub_4_then_sub_32, // 99 |
| 1574 | x8sub_4_then_sub_32_hi, // 100 |
| 1575 | x8sub_3_then_sub_32, // 101 |
| 1576 | x8sub_3_then_sub_32_hi, // 102 |
| 1577 | x8sub_2_then_sub_32, // 103 |
| 1578 | x8sub_2_then_sub_32_hi, // 104 |
| 1579 | x8sub_1_then_sub_32, // 105 |
| 1580 | x8sub_1_then_sub_32_hi, // 106 |
| 1581 | subo64_then_sub_32, // 107 |
| 1582 | subo64_then_sub_32_hi, // 108 |
| 1583 | zsub1_then_zsub_hi, // 109 |
| 1584 | zsub3_then_zsub_hi, // 110 |
| 1585 | zsub2_then_zsub_hi, // 111 |
| 1586 | dsub0_dsub1, // 112 |
| 1587 | dsub0_dsub1_dsub2, // 113 |
| 1588 | dsub1_dsub2, // 114 |
| 1589 | dsub1_dsub2_dsub3, // 115 |
| 1590 | dsub2_dsub3, // 116 |
| 1591 | dsub_dsub1, // 117 |
| 1592 | dsub_dsub1_dsub2_dsub3, // 118 |
| 1593 | dsub_dsub1_dsub2, // 119 |
| 1594 | qsub0_qsub1, // 120 |
| 1595 | qsub0_qsub1_qsub2, // 121 |
| 1596 | qsub1_qsub2, // 122 |
| 1597 | qsub1_qsub2_qsub3, // 123 |
| 1598 | qsub2_qsub3, // 124 |
| 1599 | sub_32_x8sub_1_then_sub_32, // 125 |
| 1600 | x8sub_0_x8sub_1, // 126 |
| 1601 | x8sub_2_x8sub_3, // 127 |
| 1602 | x8sub_4_x8sub_5, // 128 |
| 1603 | x8sub_6_x8sub_7, // 129 |
| 1604 | x8sub_6_then_sub_32_x8sub_7_then_sub_32, // 130 |
| 1605 | x8sub_4_then_sub_32_x8sub_5_then_sub_32, // 131 |
| 1606 | x8sub_2_then_sub_32_x8sub_3_then_sub_32, // 132 |
| 1607 | sub_32_subo64_then_sub_32, // 133 |
| 1608 | zsub_qsub1, // 134 |
| 1609 | zsub_qsub1_qsub2_qsub3, // 135 |
| 1610 | zsub_qsub1_qsub2, // 136 |
| 1611 | zsub0_zsub1, // 137 |
| 1612 | zsub0_zsub1_zsub2, // 138 |
| 1613 | zsub1_zsub2, // 139 |
| 1614 | zsub1_zsub2_zsub3, // 140 |
| 1615 | zsub2_zsub3, // 141 |
| 1616 | zsub0_zsub2, // 142 |
| 1617 | zsub1_zsub3, // 143 |
| 1618 | NUM_TARGET_SUBREGS |
| 1619 | }; |
| 1620 | } // end namespace AArch64 |
| 1621 | |
| 1622 | // Register pressure sets enum. |
| 1623 | namespace AArch64 { |
| 1624 | enum RegisterPressureSets { |
| 1625 | ZTR = 0, |
| 1626 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 = 1, |
| 1627 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b = 2, |
| 1628 | tcGPRx17 = 3, |
| 1629 | XSeqPairsClass_with_subo64_in_FIXED_REGS = 4, |
| 1630 | MatrixIndexGPR32_12_15 = 5, |
| 1631 | MatrixIndexGPR32_8_11 = 6, |
| 1632 | ZPRMul4_and_ZPR_K = 7, |
| 1633 | PPRMul2_and_PPR_3b = 8, |
| 1634 | PPRMul2_and_PPR_p8to15 = 9, |
| 1635 | FIXED_REGS = 10, |
| 1636 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 11, |
| 1637 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 12, |
| 1638 | ZPRMul2_Hi = 13, |
| 1639 | ZPRMul2_Lo = 14, |
| 1640 | ZPRMul4 = 15, |
| 1641 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 = 16, |
| 1642 | ZPRMul2_Lo_and_ZPRMul4 = 17, |
| 1643 | ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 = 18, |
| 1644 | GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 = 19, |
| 1645 | GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 20, |
| 1646 | PPRMul2 = 21, |
| 1647 | PPRMul2_with_PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b = 22, |
| 1648 | ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 23, |
| 1649 | PNR_3b = 24, |
| 1650 | PNR_p8to15 = 25, |
| 1651 | ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 = 26, |
| 1652 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 27, |
| 1653 | FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 28, |
| 1654 | ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 29, |
| 1655 | ZPRMul2_Hi_with_ZPRMul4 = 30, |
| 1656 | ZPRMul2_Hi_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 31, |
| 1657 | ZPRMul2_Lo_with_ZPRMul4 = 32, |
| 1658 | ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 = 33, |
| 1659 | ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4 = 34, |
| 1660 | ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 = 35, |
| 1661 | ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 = 36, |
| 1662 | ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 = 37, |
| 1663 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 38, |
| 1664 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 39, |
| 1665 | PPRMul2_with_PNR_3b = 40, |
| 1666 | PPRMul2_with_PNR_p8to15 = 41, |
| 1667 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 42, |
| 1668 | ZPRMul2_Lo_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 43, |
| 1669 | ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 44, |
| 1670 | ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 45, |
| 1671 | ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 46, |
| 1672 | ZPRMul2_Lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 47, |
| 1673 | ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 48, |
| 1674 | ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K = 49, |
| 1675 | ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 50, |
| 1676 | ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 51, |
| 1677 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 52, |
| 1678 | FPR128_0to7_with_QQQQ_with_qsub3_in_FPR128_0to7 = 53, |
| 1679 | GPR64x8Class_with_x8sub_0_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 54, |
| 1680 | ZPRMul2_Hi_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 = 55, |
| 1681 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 = 56, |
| 1682 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 57, |
| 1683 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 = 58, |
| 1684 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 59, |
| 1685 | QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 60, |
| 1686 | QQQQ_with_qsub3_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 61, |
| 1687 | PPRorPNR = 62, |
| 1688 | ZPRMul2 = 63, |
| 1689 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 = 64, |
| 1690 | ZPR2_with_zsub1_in_ZPRMul4 = 65, |
| 1691 | ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b = 66, |
| 1692 | ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 = 67, |
| 1693 | ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 = 68, |
| 1694 | ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 = 69, |
| 1695 | ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 = 70, |
| 1696 | ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 71, |
| 1697 | ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 = 72, |
| 1698 | ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 73, |
| 1699 | ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 = 74, |
| 1700 | ZPRMul4_with_FPR128_0to7 = 75, |
| 1701 | ZPRMul4_with_QQ_with_qsub1_in_FPR128_0to7 = 76, |
| 1702 | ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 77, |
| 1703 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 78, |
| 1704 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 = 79, |
| 1705 | FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 80, |
| 1706 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 81, |
| 1707 | GPR64x8Class_with_x8sub_6_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 = 82, |
| 1708 | ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 = 83, |
| 1709 | ZPRMul4_with_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 84, |
| 1710 | ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 85, |
| 1711 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 86, |
| 1712 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 87, |
| 1713 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 88, |
| 1714 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 89, |
| 1715 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 90, |
| 1716 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 91, |
| 1717 | ZPRMul2_Hi_with_QQQ_with_qsub2_in_FPR128_0to7 = 92, |
| 1718 | ZPRMul4_with_ZPR_K = 93, |
| 1719 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 = 94, |
| 1720 | GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 = 95, |
| 1721 | ZPRMul2_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 96, |
| 1722 | ZPRMul2_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 97, |
| 1723 | ZPRMul2_Hi_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 98, |
| 1724 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 99, |
| 1725 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 100, |
| 1726 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 = 101, |
| 1727 | ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 102, |
| 1728 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 = 103, |
| 1729 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 104, |
| 1730 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K = 105, |
| 1731 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 106, |
| 1732 | ZPRMul2_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 = 107, |
| 1733 | ZPRMul2_with_ZPRMul2_Lo_and_ZPRMul4 = 108, |
| 1734 | ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 = 109, |
| 1735 | ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 = 110, |
| 1736 | ZPRMul2_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 = 111, |
| 1737 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 = 112, |
| 1738 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 = 113, |
| 1739 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 = 114, |
| 1740 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 = 115, |
| 1741 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4 = 116, |
| 1742 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 117, |
| 1743 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 = 118, |
| 1744 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 119, |
| 1745 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 120, |
| 1746 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 121, |
| 1747 | ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K = 122, |
| 1748 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 123, |
| 1749 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 = 124, |
| 1750 | ZPRMul2_with_QQQQ_with_qsub3_in_FPR128_0to7 = 125, |
| 1751 | ZPRMul2_with_ZPR_K = 126, |
| 1752 | ZPRMul4_with_FPR16_lo = 127, |
| 1753 | ZPRMul4_with_DD_with_dsub1_in_FPR64_lo = 128, |
| 1754 | ZPRMul4_with_ZPR4_with_zsub2_in_ZPRMul2_Hi = 129, |
| 1755 | ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi = 130, |
| 1756 | FPR16_lo = 131, |
| 1757 | ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K = 132, |
| 1758 | ZPR2_with_zsub1_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 = 133, |
| 1759 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 134, |
| 1760 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 = 135, |
| 1761 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 = 136, |
| 1762 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 = 137, |
| 1763 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 = 138, |
| 1764 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K = 139, |
| 1765 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 140, |
| 1766 | FPR128_0to7_with_ZPR_K = 141, |
| 1767 | ZPRMul2_Hi_with_QQQQ_with_qsub3_in_FPR128_0to7 = 142, |
| 1768 | ZPR_K = 143, |
| 1769 | ZPRMul4_with_DDD_with_dsub2_in_FPR64_lo = 144, |
| 1770 | DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 145, |
| 1771 | DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 146, |
| 1772 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 147, |
| 1773 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR_K = 148, |
| 1774 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 = 149, |
| 1775 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 = 150, |
| 1776 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 151, |
| 1777 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K = 152, |
| 1778 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K = 153, |
| 1779 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 154, |
| 1780 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 155, |
| 1781 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 = 156, |
| 1782 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K = 157, |
| 1783 | FPR16_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 = 158, |
| 1784 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR_K = 159, |
| 1785 | ZPRMul2_with_ZPR4_with_zsub1_in_ZPR_K = 160, |
| 1786 | ZPRMul2_with_ZPR4_with_zsub1_in_ZPRMul2_Hi = 161, |
| 1787 | ZPRMul2_with_ZPR4_with_zsub3_in_ZPRMul2_Hi = 162, |
| 1788 | FPR16_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 = 163, |
| 1789 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K = 164, |
| 1790 | ZPR3_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi = 165, |
| 1791 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K = 166, |
| 1792 | GPR64x8Class_with_x8sub_0_in_tcGPR64 = 167, |
| 1793 | ZPRMul2_with_FPR16_lo = 168, |
| 1794 | FPR16_lo_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K = 169, |
| 1795 | DD_with_dsub1_in_FPR64_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 = 170, |
| 1796 | DDD_with_dsub2_in_FPR64_lo_with_ZPR2_with_zsub1_in_ZPRMul4 = 171, |
| 1797 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K = 172, |
| 1798 | ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi = 173, |
| 1799 | ZPR3_with_zsub1_in_ZPRMul4_with_ZPR_K = 174, |
| 1800 | FPR128_0to7_with_ZPR4_with_zsub1_in_ZPR_K = 175, |
| 1801 | QQ_with_qsub1_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi = 176, |
| 1802 | QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub3_in_ZPRMul2_Hi = 177, |
| 1803 | FPR16_lo_with_ZPR3_with_zsub1_in_ZPRMul4 = 178, |
| 1804 | FPR16_lo_with_ZPR3_with_zsub2_in_ZPRMul4 = 179, |
| 1805 | DDD_with_dsub2_in_FPR64_lo_with_ZPR3_with_zsub1_in_ZPRMul4 = 180, |
| 1806 | DDDD_with_dsub3_in_FPR64_lo_with_ZPR3_with_zsub2_in_ZPRMul4 = 181, |
| 1807 | QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi = 182, |
| 1808 | ZPR3_with_zsub0_in_ZPRMul4_with_ZPR_K = 183, |
| 1809 | ZPRMul2_Hi_with_ZPR3_with_zsub1_in_ZPRMul4 = 184, |
| 1810 | ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K = 185, |
| 1811 | ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi = 186, |
| 1812 | GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 187, |
| 1813 | FPR8 = 188, |
| 1814 | GPR32 = 189, |
| 1815 | }; |
| 1816 | } // end namespace AArch64 |
| 1817 | |
| 1818 | } // end namespace llvm |
| 1819 | |
| 1820 | #endif // GET_REGINFO_ENUM |
| 1821 | |
| 1822 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 1823 | |* *| |
| 1824 | |* MC Register Information *| |
| 1825 | |* *| |
| 1826 | |* Automatically generated file, do not edit! *| |
| 1827 | |* *| |
| 1828 | \*===----------------------------------------------------------------------===*/ |
| 1829 | |
| 1830 | |
| 1831 | #ifdef GET_REGINFO_MC_DESC |
| 1832 | #undef GET_REGINFO_MC_DESC |
| 1833 | |
| 1834 | namespace llvm { |
| 1835 | |
| 1836 | extern const int16_t AArch64RegDiffLists[] = { |
| 1837 | /* 0 */ -18, 22, -20, -10, -285, 0, |
| 1838 | /* 6 */ -10, 22, -20, -10, -285, 0, |
| 1839 | /* 12 */ -18, 26, -20, -10, -285, 0, |
| 1840 | /* 18 */ -10, 26, -20, -10, -285, 0, |
| 1841 | /* 24 */ -18, 22, -18, -10, -285, 0, |
| 1842 | /* 30 */ -10, 22, -18, -10, -285, 0, |
| 1843 | /* 36 */ -18, 26, -18, -10, -285, 0, |
| 1844 | /* 42 */ -10, 26, -18, -10, -285, 0, |
| 1845 | /* 48 */ -18, 22, -20, -9, -285, 0, |
| 1846 | /* 54 */ -10, 22, -20, -9, -285, 0, |
| 1847 | /* 60 */ -18, 26, -20, -9, -285, 0, |
| 1848 | /* 66 */ -10, 26, -20, -9, -285, 0, |
| 1849 | /* 72 */ -18, 22, -18, -9, -285, 0, |
| 1850 | /* 78 */ -10, 22, -18, -9, -285, 0, |
| 1851 | /* 84 */ -18, 26, -18, -9, -285, 0, |
| 1852 | /* 90 */ -10, 26, -18, -9, -285, 0, |
| 1853 | /* 96 */ -505, -226, 0, |
| 1854 | /* 99 */ -96, 128, -96, -64, 316, 64, 64, -96, 0, |
| 1855 | /* 108 */ -523, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 189, 64, -95, 30, 32, 32, 48, 64, -63, 64, -95, 0, |
| 1856 | /* 156 */ -539, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 125, 64, -95, 30, 32, 32, 49, 64, -95, 30, 32, 32, 76, 64, -63, 64, -95, 0, |
| 1857 | /* 218 */ -507, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 92, 64, -63, 64, -95, 0, |
| 1858 | /* 252 */ -523, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 157, 64, -63, 30, 32, 32, 48, 64, -95, 64, -63, 0, |
| 1859 | /* 300 */ -539, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 93, 64, -63, 30, 32, 32, 17, 64, -63, 30, 32, 32, 76, 64, -95, 64, -63, 0, |
| 1860 | /* 362 */ -507, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 92, 64, -95, 64, -63, 0, |
| 1861 | /* 396 */ -523, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 157, 64, -63, -2, 32, 32, 48, 64, -63, 64, -63, 0, |
| 1862 | /* 444 */ -523, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, 189, 64, -63, -2, 32, 32, 48, 64, -63, 64, -63, 0, |
| 1863 | /* 492 */ -507, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 60, 64, -63, 64, -63, 0, |
| 1864 | /* 526 */ -539, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 93, 64, -63, -2, 32, 32, 49, 64, -63, -2, 32, 32, 76, 64, -63, 64, -63, 0, |
| 1865 | /* 588 */ -539, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 125, 64, -63, -2, 32, 32, 49, 64, -63, -2, 32, 32, 76, 64, -63, 64, -63, 0, |
| 1866 | /* 650 */ -507, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, 92, 64, -63, 64, -63, 0, |
| 1867 | /* 684 */ -555, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 158, 31, 64, 48, -31, 0, |
| 1868 | /* 717 */ -571, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 94, 31, 64, 17, 31, 64, 76, -31, 0, |
| 1869 | /* 759 */ -539, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 93, -31, 0, |
| 1870 | /* 783 */ 31, 491, 2, -29, 0, |
| 1871 | /* 788 */ -235, 756, 2, -29, 0, |
| 1872 | /* 793 */ 31, 504, 17, -29, 0, |
| 1873 | /* 798 */ 31, 505, 17, -29, 0, |
| 1874 | /* 803 */ -253, 493, -29, 0, |
| 1875 | /* 807 */ -253, 521, -29, 0, |
| 1876 | /* 811 */ -253, 522, -29, 0, |
| 1877 | /* 815 */ -519, 758, -29, 0, |
| 1878 | /* 819 */ -3, 0, |
| 1879 | /* 821 */ -2, 0, |
| 1880 | /* 823 */ -483, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 235, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1881 | /* 856 */ -484, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 236, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1882 | /* 889 */ -485, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 237, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1883 | /* 922 */ -486, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 238, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1884 | /* 955 */ -487, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 239, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1885 | /* 988 */ -488, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 240, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1886 | /* 1021 */ -489, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 241, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1887 | /* 1054 */ -490, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 242, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1888 | /* 1087 */ -491, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 243, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1889 | /* 1120 */ -492, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 244, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1890 | /* 1153 */ -493, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, 245, 17, 1, 1, 1, -17, -1, -1, 0, |
| 1891 | /* 1186 */ -470, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -252, -31, 284, -518, 235, 284, 234, 17, 1, 1, -14, -2, -1, -1, 0, |
| 1892 | /* 1219 */ -536, 1, 0, |
| 1893 | /* 1222 */ -535, 1, 0, |
| 1894 | /* 1225 */ -534, 1, 0, |
| 1895 | /* 1228 */ -533, 1, 0, |
| 1896 | /* 1231 */ -532, 1, 0, |
| 1897 | /* 1234 */ -531, 1, 0, |
| 1898 | /* 1237 */ -530, 1, 0, |
| 1899 | /* 1240 */ -529, 1, 0, |
| 1900 | /* 1243 */ -528, 1, 0, |
| 1901 | /* 1246 */ -527, 1, 0, |
| 1902 | /* 1249 */ -526, 1, 0, |
| 1903 | /* 1252 */ -525, 1, 0, |
| 1904 | /* 1255 */ -524, 1, 0, |
| 1905 | /* 1258 */ -523, 1, 0, |
| 1906 | /* 1261 */ -522, 1, 0, |
| 1907 | /* 1264 */ 63, -33, 34, -33, 1, 80, 63, -33, 34, -33, 1, 108, 63, -33, 34, -33, 1, 0, |
| 1908 | /* 1282 */ 64, -32, 63, -33, 1, 49, 64, -32, 63, -33, 1, 77, 64, -32, 63, -33, 1, 0, |
| 1909 | /* 1300 */ -33, 1, 144, -33, 1, 172, -33, 1, 0, |
| 1910 | /* 1309 */ 31, 503, 17, -30, 1, 0, |
| 1911 | /* 1315 */ 31, 504, 17, -30, 1, 0, |
| 1912 | /* 1321 */ -253, 520, -30, 1, 0, |
| 1913 | /* 1326 */ -253, 521, -30, 1, 0, |
| 1914 | /* 1331 */ -2, 1, 0, |
| 1915 | /* 1334 */ 31, 502, 17, -31, 1, 1, 0, |
| 1916 | /* 1341 */ 31, 503, 17, -31, 1, 1, 0, |
| 1917 | /* 1348 */ -253, 519, -31, 1, 1, 0, |
| 1918 | /* 1354 */ -253, 520, -31, 1, 1, 0, |
| 1919 | /* 1360 */ 31, 494, 17, -32, 1, 1, 1, 0, |
| 1920 | /* 1368 */ 31, 495, 17, -32, 1, 1, 1, 0, |
| 1921 | /* 1376 */ 31, 496, 17, -32, 1, 1, 1, 0, |
| 1922 | /* 1384 */ 31, 497, 17, -32, 1, 1, 1, 0, |
| 1923 | /* 1392 */ 31, 498, 17, -32, 1, 1, 1, 0, |
| 1924 | /* 1400 */ 31, 499, 17, -32, 1, 1, 1, 0, |
| 1925 | /* 1408 */ 31, 500, 17, -32, 1, 1, 1, 0, |
| 1926 | /* 1416 */ 31, 501, 17, -32, 1, 1, 1, 0, |
| 1927 | /* 1424 */ 31, 502, 17, -32, 1, 1, 1, 0, |
| 1928 | /* 1432 */ -253, 511, -32, 1, 1, 1, 0, |
| 1929 | /* 1439 */ -253, 512, -32, 1, 1, 1, 0, |
| 1930 | /* 1446 */ -253, 513, -32, 1, 1, 1, 0, |
| 1931 | /* 1453 */ -253, 514, -32, 1, 1, 1, 0, |
| 1932 | /* 1460 */ -253, 515, -32, 1, 1, 1, 0, |
| 1933 | /* 1467 */ -253, 516, -32, 1, 1, 1, 0, |
| 1934 | /* 1474 */ -253, 517, -32, 1, 1, 1, 0, |
| 1935 | /* 1481 */ -253, 518, -32, 1, 1, 1, 0, |
| 1936 | /* 1488 */ -253, 519, -32, 1, 1, 1, 0, |
| 1937 | /* 1495 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1938 | /* 1511 */ 1, 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1939 | /* 1527 */ 1, 1, 1, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1940 | /* 1543 */ 1, 1, 1, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1941 | /* 1559 */ 1, 1, 1, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1942 | /* 1575 */ 1, 1, 1, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1943 | /* 1591 */ 1, 1, 1, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1944 | /* 1607 */ 1, 1, 1, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1945 | /* 1623 */ 1, 1, 1, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1946 | /* 1639 */ 1, 1, 1, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1947 | /* 1655 */ 1, 1, 1, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1948 | /* 1671 */ 1, 1, 1, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1949 | /* 1687 */ 1, 1, 1, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1950 | /* 1703 */ 1, 1, 1, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1951 | /* 1719 */ 1, 1, 1, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1952 | /* 1735 */ 1, 1, 1, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1953 | /* 1751 */ 1, 1, 1, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1954 | /* 1767 */ 1, 1, 1, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1955 | /* 1783 */ 1, 1, 1, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1956 | /* 1799 */ 1, 1, 1, 65, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1957 | /* 1815 */ 1, 1, 1, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1958 | /* 1831 */ 1, 1, 1, 69, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1959 | /* 1847 */ 1, 1, 1, 71, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1960 | /* 1863 */ 1, 1, 1, 73, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1961 | /* 1879 */ 1, 1, 1, 75, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1962 | /* 1895 */ 1, 1, 1, 77, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1963 | /* 1911 */ 1, 1, 1, 79, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1964 | /* 1927 */ 1, 1, 1, 81, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1965 | /* 1943 */ 1, 1, 1, 83, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1966 | /* 1959 */ 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1967 | /* 1975 */ 1, 1, 30, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1968 | /* 1987 */ 1, 1, 32, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1969 | /* 1999 */ 1, 1, 34, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1970 | /* 2011 */ 1, 1, 36, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1971 | /* 2023 */ 1, 1, 38, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1972 | /* 2035 */ 1, 1, 40, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1973 | /* 2047 */ 1, 1, 42, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1974 | /* 2059 */ 1, 1, 44, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1975 | /* 2071 */ 1, 1, 46, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1976 | /* 2083 */ 1, 1, 48, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1977 | /* 2095 */ 1, 1, 50, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1978 | /* 2107 */ 1, 1, 52, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1979 | /* 2119 */ 1, 1, 54, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1980 | /* 2131 */ 1, 1, 56, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1981 | /* 2143 */ 1, 1, 58, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1982 | /* 2155 */ 1, 1, 60, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1983 | /* 2167 */ 1, 1, 62, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1984 | /* 2179 */ 1, 1, 64, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1985 | /* 2191 */ 1, 1, 66, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1986 | /* 2203 */ 1, 1, 68, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1987 | /* 2215 */ 1, 1, 70, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1988 | /* 2227 */ 1, 1, 72, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1989 | /* 2239 */ 1, 1, 74, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1990 | /* 2251 */ 1, 1, 76, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1991 | /* 2263 */ 1, 1, 78, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1992 | /* 2275 */ 1, 1, 80, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1993 | /* 2287 */ 1, 1, 82, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1994 | /* 2299 */ 1, 1, 84, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1995 | /* 2311 */ 29, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1996 | /* 2327 */ 1, 1, 86, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1997 | /* 2339 */ 1, 1, 88, 1, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1998 | /* 2351 */ 1, 1, 1, 1, 1, 1, 1, 22, 1, 1, 1, 1, 1, 1, 1, 0, |
| 1999 | /* 2367 */ 1, 226, 1, 1, 1, 1, 1, 1, 23, 1, 1, 1, 1, 1, 1, 0, |
| 2000 | /* 2383 */ 1, 31, 1, 1, 1, 1, 1, 0, |
| 2001 | /* 2391 */ 1, 33, 1, 1, 1, 1, 1, 0, |
| 2002 | /* 2399 */ 1, 35, 1, 1, 1, 1, 1, 0, |
| 2003 | /* 2407 */ 1, 37, 1, 1, 1, 1, 1, 0, |
| 2004 | /* 2415 */ 1, 39, 1, 1, 1, 1, 1, 0, |
| 2005 | /* 2423 */ 1, 41, 1, 1, 1, 1, 1, 0, |
| 2006 | /* 2431 */ 1, 43, 1, 1, 1, 1, 1, 0, |
| 2007 | /* 2439 */ 1, 45, 1, 1, 1, 1, 1, 0, |
| 2008 | /* 2447 */ 1, 47, 1, 1, 1, 1, 1, 0, |
| 2009 | /* 2455 */ 1, 49, 1, 1, 1, 1, 1, 0, |
| 2010 | /* 2463 */ 1, 51, 1, 1, 1, 1, 1, 0, |
| 2011 | /* 2471 */ 1, 53, 1, 1, 1, 1, 1, 0, |
| 2012 | /* 2479 */ 1, 55, 1, 1, 1, 1, 1, 0, |
| 2013 | /* 2487 */ 1, 57, 1, 1, 1, 1, 1, 0, |
| 2014 | /* 2495 */ 1, 59, 1, 1, 1, 1, 1, 0, |
| 2015 | /* 2503 */ 1, 61, 1, 1, 1, 1, 1, 0, |
| 2016 | /* 2511 */ 1, 63, 1, 1, 1, 1, 1, 0, |
| 2017 | /* 2519 */ 1, 65, 1, 1, 1, 1, 1, 0, |
| 2018 | /* 2527 */ 1, 67, 1, 1, 1, 1, 1, 0, |
| 2019 | /* 2535 */ 1, 69, 1, 1, 1, 1, 1, 0, |
| 2020 | /* 2543 */ 1, 71, 1, 1, 1, 1, 1, 0, |
| 2021 | /* 2551 */ 1, 73, 1, 1, 1, 1, 1, 0, |
| 2022 | /* 2559 */ 1, 75, 1, 1, 1, 1, 1, 0, |
| 2023 | /* 2567 */ 1, 77, 1, 1, 1, 1, 1, 0, |
| 2024 | /* 2575 */ 1, 79, 1, 1, 1, 1, 1, 0, |
| 2025 | /* 2583 */ 1, 81, 1, 1, 1, 1, 1, 0, |
| 2026 | /* 2591 */ 1, 83, 1, 1, 1, 1, 1, 0, |
| 2027 | /* 2599 */ 1, 29, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 0, |
| 2028 | /* 2615 */ 1, 87, 1, 1, 1, 1, 1, 0, |
| 2029 | /* 2623 */ 30, 1, 1, 1, 1, 88, 1, 1, 1, 1, 1, 0, |
| 2030 | /* 2635 */ 1, 89, 1, 1, 1, 1, 1, 0, |
| 2031 | /* 2643 */ 1, 91, 1, 1, 1, 1, 1, 0, |
| 2032 | /* 2651 */ 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 45, 1, 1, 1, 0, |
| 2033 | /* 2671 */ 1, 1, 1, 83, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 47, 1, 1, 1, 0, |
| 2034 | /* 2691 */ 1, 1, 1, 81, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 49, 1, 1, 1, 0, |
| 2035 | /* 2711 */ 1, 1, 1, 79, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 51, 1, 1, 1, 0, |
| 2036 | /* 2731 */ 1, 1, 1, 77, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 53, 1, 1, 1, 0, |
| 2037 | /* 2751 */ 1, 1, 1, 75, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 55, 1, 1, 1, 0, |
| 2038 | /* 2771 */ 1, 1, 1, 73, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 57, 1, 1, 1, 0, |
| 2039 | /* 2791 */ 1, 1, 1, 71, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 59, 1, 1, 1, 0, |
| 2040 | /* 2811 */ 1, 1, 1, 69, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 61, 1, 1, 1, 0, |
| 2041 | /* 2831 */ 1, 1, 1, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 63, 1, 1, 1, 0, |
| 2042 | /* 2851 */ 1, 1, 1, 65, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 65, 1, 1, 1, 0, |
| 2043 | /* 2871 */ 1, 1, 1, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 67, 1, 1, 1, 0, |
| 2044 | /* 2891 */ 1, 1, 1, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 69, 1, 1, 1, 0, |
| 2045 | /* 2911 */ 1, 1, 1, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 71, 1, 1, 1, 0, |
| 2046 | /* 2931 */ 1, 1, 1, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 73, 1, 1, 1, 0, |
| 2047 | /* 2951 */ 1, 1, 1, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 75, 1, 1, 1, 0, |
| 2048 | /* 2971 */ 1, 1, 1, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 77, 1, 1, 1, 0, |
| 2049 | /* 2991 */ 1, 1, 1, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 79, 1, 1, 1, 0, |
| 2050 | /* 3011 */ 1, 1, 1, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 81, 1, 1, 1, 0, |
| 2051 | /* 3031 */ 1, 1, 1, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 83, 1, 1, 1, 0, |
| 2052 | /* 3051 */ 1, 1, 1, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 1, 0, |
| 2053 | /* 3071 */ 1, 1, 1, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2054 | /* 3091 */ 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 45, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2055 | /* 3115 */ 1, 1, 1, 83, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 47, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2056 | /* 3139 */ 1, 1, 1, 81, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 49, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2057 | /* 3163 */ 1, 1, 1, 79, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 51, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2058 | /* 3187 */ 1, 1, 1, 77, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 53, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2059 | /* 3211 */ 1, 1, 1, 75, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 55, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2060 | /* 3235 */ 1, 1, 1, 73, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 57, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2061 | /* 3259 */ 1, 1, 1, 71, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 59, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2062 | /* 3283 */ 1, 1, 1, 69, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 61, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2063 | /* 3307 */ 1, 1, 1, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 63, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2064 | /* 3331 */ 1, 1, 1, 65, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 65, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2065 | /* 3355 */ 1, 1, 1, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 67, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2066 | /* 3379 */ 1, 1, 1, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 69, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2067 | /* 3403 */ 1, 1, 1, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 71, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2068 | /* 3427 */ 1, 1, 1, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 73, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2069 | /* 3451 */ 1, 1, 1, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 75, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2070 | /* 3475 */ 1, 1, 1, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 77, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2071 | /* 3499 */ 1, 1, 1, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 79, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2072 | /* 3523 */ 1, 1, 1, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 81, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2073 | /* 3547 */ 1, 1, 1, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 83, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2074 | /* 3571 */ 1, 1, 1, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2075 | /* 3595 */ 1, 1, 1, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 87, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2076 | /* 3619 */ 1, 1, 1, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 89, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2077 | /* 3643 */ 1, 1, 1, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 91, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2078 | /* 3667 */ 1, 1, 1, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 93, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2079 | /* 3691 */ 1, 1, 1, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 95, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2080 | /* 3715 */ 1, 1, 1, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 97, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2081 | /* 3739 */ 1, 1, 1, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 99, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2082 | /* 3763 */ 1, 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 101, 1, 1, 1, 87, 1, 1, 1, 0, |
| 2083 | /* 3787 */ 1, 1, 1, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 89, 1, 1, 1, 0, |
| 2084 | /* 3807 */ 1, 1, 1, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 91, 1, 1, 1, 0, |
| 2085 | /* 3827 */ 1, 1, 1, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 93, 1, 1, 1, 0, |
| 2086 | /* 3847 */ 1, 1, 1, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 95, 1, 1, 1, 0, |
| 2087 | /* 3867 */ 1, 1, 1, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 97, 1, 1, 1, 0, |
| 2088 | /* 3887 */ 1, 1, 1, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 99, 1, 1, 1, 0, |
| 2089 | /* 3907 */ 1, 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 101, 1, 1, 1, 0, |
| 2090 | /* 3927 */ 31, 493, 17, -41, 9, 1, 1, 0, |
| 2091 | /* 3935 */ 31, 494, 17, -41, 9, 1, 1, 0, |
| 2092 | /* 3943 */ -253, 510, -41, 9, 1, 1, 0, |
| 2093 | /* 3950 */ -253, 511, -41, 9, 1, 1, 0, |
| 2094 | /* 3957 */ 29, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 17, 29, 1, 1, 0, |
| 2095 | /* 3977 */ 29, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 1, 1, 1, 17, 29, 1, 1, 59, 29, 1, 1, 0, |
| 2096 | /* 4001 */ 32, 1, 1, 0, |
| 2097 | /* 4005 */ 34, 1, 1, 0, |
| 2098 | /* 4009 */ 36, 1, 1, 0, |
| 2099 | /* 4013 */ 38, 1, 1, 0, |
| 2100 | /* 4017 */ 40, 1, 1, 0, |
| 2101 | /* 4021 */ 42, 1, 1, 0, |
| 2102 | /* 4025 */ 44, 1, 1, 0, |
| 2103 | /* 4029 */ 1, 1, 88, 1, 1, 1, 1, 1, 1, 1, 1, 46, 1, 1, 0, |
| 2104 | /* 4044 */ 1, 1, 86, 1, 1, 1, 1, 1, 1, 1, 1, 48, 1, 1, 0, |
| 2105 | /* 4059 */ 1, 1, 84, 1, 1, 1, 1, 1, 1, 1, 1, 50, 1, 1, 0, |
| 2106 | /* 4074 */ 1, 1, 82, 1, 1, 1, 1, 1, 1, 1, 1, 52, 1, 1, 0, |
| 2107 | /* 4089 */ 1, 1, 80, 1, 1, 1, 1, 1, 1, 1, 1, 54, 1, 1, 0, |
| 2108 | /* 4104 */ 1, 1, 78, 1, 1, 1, 1, 1, 1, 1, 1, 56, 1, 1, 0, |
| 2109 | /* 4119 */ 1, 1, 76, 1, 1, 1, 1, 1, 1, 1, 1, 58, 1, 1, 0, |
| 2110 | /* 4134 */ 1, 1, 74, 1, 1, 1, 1, 1, 1, 1, 1, 60, 1, 1, 0, |
| 2111 | /* 4149 */ 1, 1, 72, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 1, 0, |
| 2112 | /* 4164 */ 1, 1, 70, 1, 1, 1, 1, 1, 1, 1, 1, 64, 1, 1, 0, |
| 2113 | /* 4179 */ 1, 1, 68, 1, 1, 1, 1, 1, 1, 1, 1, 66, 1, 1, 0, |
| 2114 | /* 4194 */ 1, 1, 66, 1, 1, 1, 1, 1, 1, 1, 1, 68, 1, 1, 0, |
| 2115 | /* 4209 */ 1, 1, 64, 1, 1, 1, 1, 1, 1, 1, 1, 70, 1, 1, 0, |
| 2116 | /* 4224 */ 1, 1, 62, 1, 1, 1, 1, 1, 1, 1, 1, 72, 1, 1, 0, |
| 2117 | /* 4239 */ 1, 1, 60, 1, 1, 1, 1, 1, 1, 1, 1, 74, 1, 1, 0, |
| 2118 | /* 4254 */ 1, 1, 58, 1, 1, 1, 1, 1, 1, 1, 1, 76, 1, 1, 0, |
| 2119 | /* 4269 */ 1, 1, 56, 1, 1, 1, 1, 1, 1, 1, 1, 78, 1, 1, 0, |
| 2120 | /* 4284 */ 1, 1, 54, 1, 1, 1, 1, 1, 1, 1, 1, 80, 1, 1, 0, |
| 2121 | /* 4299 */ 1, 1, 52, 1, 1, 1, 1, 1, 1, 1, 1, 82, 1, 1, 0, |
| 2122 | /* 4314 */ 1, 1, 50, 1, 1, 1, 1, 1, 1, 1, 1, 84, 1, 1, 0, |
| 2123 | /* 4329 */ 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 0, |
| 2124 | /* 4345 */ 1, 1, 48, 1, 1, 1, 1, 1, 1, 1, 1, 86, 1, 1, 0, |
| 2125 | /* 4360 */ 1, 1, 46, 1, 1, 1, 1, 1, 1, 1, 1, 88, 1, 1, 0, |
| 2126 | /* 4375 */ 1, 30, 1, 1, 1, 1, 1, 1, 88, 1, 1, 0, |
| 2127 | /* 4387 */ 1, 1, 88, 1, 1, 1, 1, 1, 1, 1, 1, 46, 1, 1, 88, 1, 1, 0, |
| 2128 | /* 4405 */ 1, 1, 86, 1, 1, 1, 1, 1, 1, 1, 1, 48, 1, 1, 88, 1, 1, 0, |
| 2129 | /* 4423 */ 1, 1, 84, 1, 1, 1, 1, 1, 1, 1, 1, 50, 1, 1, 88, 1, 1, 0, |
| 2130 | /* 4441 */ 1, 1, 82, 1, 1, 1, 1, 1, 1, 1, 1, 52, 1, 1, 88, 1, 1, 0, |
| 2131 | /* 4459 */ 1, 1, 80, 1, 1, 1, 1, 1, 1, 1, 1, 54, 1, 1, 88, 1, 1, 0, |
| 2132 | /* 4477 */ 1, 1, 78, 1, 1, 1, 1, 1, 1, 1, 1, 56, 1, 1, 88, 1, 1, 0, |
| 2133 | /* 4495 */ 1, 1, 76, 1, 1, 1, 1, 1, 1, 1, 1, 58, 1, 1, 88, 1, 1, 0, |
| 2134 | /* 4513 */ 1, 1, 74, 1, 1, 1, 1, 1, 1, 1, 1, 60, 1, 1, 88, 1, 1, 0, |
| 2135 | /* 4531 */ 1, 1, 72, 1, 1, 1, 1, 1, 1, 1, 1, 62, 1, 1, 88, 1, 1, 0, |
| 2136 | /* 4549 */ 1, 1, 70, 1, 1, 1, 1, 1, 1, 1, 1, 64, 1, 1, 88, 1, 1, 0, |
| 2137 | /* 4567 */ 1, 1, 68, 1, 1, 1, 1, 1, 1, 1, 1, 66, 1, 1, 88, 1, 1, 0, |
| 2138 | /* 4585 */ 1, 1, 66, 1, 1, 1, 1, 1, 1, 1, 1, 68, 1, 1, 88, 1, 1, 0, |
| 2139 | /* 4603 */ 1, 1, 64, 1, 1, 1, 1, 1, 1, 1, 1, 70, 1, 1, 88, 1, 1, 0, |
| 2140 | /* 4621 */ 1, 1, 62, 1, 1, 1, 1, 1, 1, 1, 1, 72, 1, 1, 88, 1, 1, 0, |
| 2141 | /* 4639 */ 1, 1, 60, 1, 1, 1, 1, 1, 1, 1, 1, 74, 1, 1, 88, 1, 1, 0, |
| 2142 | /* 4657 */ 1, 1, 58, 1, 1, 1, 1, 1, 1, 1, 1, 76, 1, 1, 88, 1, 1, 0, |
| 2143 | /* 4675 */ 1, 1, 56, 1, 1, 1, 1, 1, 1, 1, 1, 78, 1, 1, 88, 1, 1, 0, |
| 2144 | /* 4693 */ 1, 1, 54, 1, 1, 1, 1, 1, 1, 1, 1, 80, 1, 1, 88, 1, 1, 0, |
| 2145 | /* 4711 */ 1, 1, 52, 1, 1, 1, 1, 1, 1, 1, 1, 82, 1, 1, 88, 1, 1, 0, |
| 2146 | /* 4729 */ 1, 1, 50, 1, 1, 1, 1, 1, 1, 1, 1, 84, 1, 1, 88, 1, 1, 0, |
| 2147 | /* 4747 */ 1, 1, 48, 1, 1, 1, 1, 1, 1, 1, 1, 86, 1, 1, 88, 1, 1, 0, |
| 2148 | /* 4765 */ 1, 1, 46, 1, 1, 1, 1, 1, 1, 1, 1, 88, 1, 1, 88, 1, 1, 0, |
| 2149 | /* 4783 */ 1, 1, 44, 1, 1, 1, 1, 1, 1, 1, 1, 90, 1, 1, 88, 1, 1, 0, |
| 2150 | /* 4801 */ 1, 1, 42, 1, 1, 1, 1, 1, 1, 1, 1, 92, 1, 1, 88, 1, 1, 0, |
| 2151 | /* 4819 */ 1, 1, 40, 1, 1, 1, 1, 1, 1, 1, 1, 94, 1, 1, 88, 1, 1, 0, |
| 2152 | /* 4837 */ 1, 1, 38, 1, 1, 1, 1, 1, 1, 1, 1, 96, 1, 1, 88, 1, 1, 0, |
| 2153 | /* 4855 */ 1, 1, 36, 1, 1, 1, 1, 1, 1, 1, 1, 98, 1, 1, 88, 1, 1, 0, |
| 2154 | /* 4873 */ 1, 1, 34, 1, 1, 1, 1, 1, 1, 1, 1, 100, 1, 1, 88, 1, 1, 0, |
| 2155 | /* 4891 */ 1, 1, 32, 1, 1, 1, 1, 1, 1, 1, 1, 102, 1, 1, 88, 1, 1, 0, |
| 2156 | /* 4909 */ 1, 1, 30, 1, 1, 1, 1, 1, 1, 1, 1, 104, 1, 1, 88, 1, 1, 0, |
| 2157 | /* 4927 */ 1, 1, 44, 1, 1, 1, 1, 1, 1, 1, 1, 90, 1, 1, 0, |
| 2158 | /* 4942 */ 31, 1, 1, 1, 91, 1, 1, 0, |
| 2159 | /* 4950 */ 1, 1, 42, 1, 1, 1, 1, 1, 1, 1, 1, 92, 1, 1, 0, |
| 2160 | /* 4965 */ 1, 1, 40, 1, 1, 1, 1, 1, 1, 1, 1, 94, 1, 1, 0, |
| 2161 | /* 4980 */ 1, 1, 38, 1, 1, 1, 1, 1, 1, 1, 1, 96, 1, 1, 0, |
| 2162 | /* 4995 */ 1, 1, 36, 1, 1, 1, 1, 1, 1, 1, 1, 98, 1, 1, 0, |
| 2163 | /* 5010 */ 1, 1, 34, 1, 1, 1, 1, 1, 1, 1, 1, 100, 1, 1, 0, |
| 2164 | /* 5025 */ 1, 1, 32, 1, 1, 1, 1, 1, 1, 1, 1, 102, 1, 1, 0, |
| 2165 | /* 5040 */ 1, 1, 30, 1, 1, 1, 1, 1, 1, 1, 1, 104, 1, 1, 0, |
| 2166 | /* 5055 */ 2, 1, 0, |
| 2167 | /* 5058 */ 1, 5, 1, 0, |
| 2168 | /* 5062 */ 31, 492, 17, -42, 10, 1, 0, |
| 2169 | /* 5069 */ 31, 493, 17, -42, 10, 1, 0, |
| 2170 | /* 5076 */ -253, 509, -42, 10, 1, 0, |
| 2171 | /* 5082 */ -253, 510, -42, 10, 1, 0, |
| 2172 | /* 5088 */ 1, 28, 1, 0, |
| 2173 | /* 5092 */ 1, 29, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 17, 1, 29, 1, 0, |
| 2174 | /* 5112 */ 1, 29, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 1, 1, 1, 17, 1, 29, 1, 59, 1, 29, 1, 0, |
| 2175 | /* 5136 */ 30, 1, 1, 1, 1, 88, 1, 1, 1, 1, 1, 17, 30, 1, 0, |
| 2176 | /* 5151 */ 30, 1, 1, 1, 1, 88, 1, 1, 1, 1, 1, 17, 30, 1, 59, 30, 1, 0, |
| 2177 | /* 5169 */ 32, 1, 0, |
| 2178 | /* 5172 */ 34, 1, 0, |
| 2179 | /* 5175 */ 36, 1, 0, |
| 2180 | /* 5178 */ 38, 1, 0, |
| 2181 | /* 5181 */ 40, 1, 0, |
| 2182 | /* 5184 */ 42, 1, 0, |
| 2183 | /* 5187 */ 44, 1, 0, |
| 2184 | /* 5190 */ 46, 1, 0, |
| 2185 | /* 5193 */ 1, 91, 1, 1, 1, 1, 1, 47, 1, 0, |
| 2186 | /* 5203 */ -555, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 158, -1, 64, 48, 1, 0, |
| 2187 | /* 5236 */ -555, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, 190, -1, 64, 48, 1, 0, |
| 2188 | /* 5269 */ 1, 89, 1, 1, 1, 1, 1, 49, 1, 0, |
| 2189 | /* 5279 */ 50, 1, 0, |
| 2190 | /* 5282 */ 1, 87, 1, 1, 1, 1, 1, 51, 1, 0, |
| 2191 | /* 5292 */ 52, 1, 0, |
| 2192 | /* 5295 */ 1, 85, 1, 1, 1, 1, 1, 53, 1, 0, |
| 2193 | /* 5305 */ 54, 1, 0, |
| 2194 | /* 5308 */ 1, 83, 1, 1, 1, 1, 1, 55, 1, 0, |
| 2195 | /* 5318 */ 56, 1, 0, |
| 2196 | /* 5321 */ 1, 81, 1, 1, 1, 1, 1, 57, 1, 0, |
| 2197 | /* 5331 */ 58, 1, 0, |
| 2198 | /* 5334 */ 1, 79, 1, 1, 1, 1, 1, 59, 1, 0, |
| 2199 | /* 5344 */ 60, 1, 0, |
| 2200 | /* 5347 */ 1, 77, 1, 1, 1, 1, 1, 61, 1, 0, |
| 2201 | /* 5357 */ -539, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 61, 1, 0, |
| 2202 | /* 5381 */ 62, 1, 0, |
| 2203 | /* 5384 */ 1, 75, 1, 1, 1, 1, 1, 63, 1, 0, |
| 2204 | /* 5394 */ 64, 1, 0, |
| 2205 | /* 5397 */ 1, 73, 1, 1, 1, 1, 1, 65, 1, 0, |
| 2206 | /* 5407 */ 66, 1, 0, |
| 2207 | /* 5410 */ 1, 71, 1, 1, 1, 1, 1, 67, 1, 0, |
| 2208 | /* 5420 */ 68, 1, 0, |
| 2209 | /* 5423 */ 1, 69, 1, 1, 1, 1, 1, 69, 1, 0, |
| 2210 | /* 5433 */ 70, 1, 0, |
| 2211 | /* 5436 */ 1, 67, 1, 1, 1, 1, 1, 71, 1, 0, |
| 2212 | /* 5446 */ 72, 1, 0, |
| 2213 | /* 5449 */ 1, 65, 1, 1, 1, 1, 1, 73, 1, 0, |
| 2214 | /* 5459 */ 74, 1, 0, |
| 2215 | /* 5462 */ 1, 63, 1, 1, 1, 1, 1, 75, 1, 0, |
| 2216 | /* 5472 */ -571, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 94, -1, 64, 49, -1, 64, 76, 1, 0, |
| 2217 | /* 5514 */ -571, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 126, -1, 64, 49, -1, 64, 76, 1, 0, |
| 2218 | /* 5556 */ 1, 61, 1, 1, 1, 1, 1, 77, 1, 0, |
| 2219 | /* 5566 */ 78, 1, 0, |
| 2220 | /* 5569 */ 1, 59, 1, 1, 1, 1, 1, 79, 1, 0, |
| 2221 | /* 5579 */ 80, 1, 0, |
| 2222 | /* 5582 */ 1, 57, 1, 1, 1, 1, 1, 81, 1, 0, |
| 2223 | /* 5592 */ 82, 1, 0, |
| 2224 | /* 5595 */ 1, 55, 1, 1, 1, 1, 1, 83, 1, 0, |
| 2225 | /* 5605 */ 84, 1, 0, |
| 2226 | /* 5608 */ 1, 53, 1, 1, 1, 1, 1, 85, 1, 0, |
| 2227 | /* 5618 */ 86, 1, 0, |
| 2228 | /* 5621 */ 1, 51, 1, 1, 1, 1, 1, 87, 1, 0, |
| 2229 | /* 5631 */ 88, 1, 0, |
| 2230 | /* 5634 */ 1, 49, 1, 1, 1, 1, 1, 89, 1, 0, |
| 2231 | /* 5644 */ 1, 91, 1, 1, 1, 1, 1, 47, 1, 89, 1, 0, |
| 2232 | /* 5656 */ 1, 89, 1, 1, 1, 1, 1, 49, 1, 89, 1, 0, |
| 2233 | /* 5668 */ 1, 87, 1, 1, 1, 1, 1, 51, 1, 89, 1, 0, |
| 2234 | /* 5680 */ 1, 85, 1, 1, 1, 1, 1, 53, 1, 89, 1, 0, |
| 2235 | /* 5692 */ 1, 83, 1, 1, 1, 1, 1, 55, 1, 89, 1, 0, |
| 2236 | /* 5704 */ 1, 81, 1, 1, 1, 1, 1, 57, 1, 89, 1, 0, |
| 2237 | /* 5716 */ 1, 79, 1, 1, 1, 1, 1, 59, 1, 89, 1, 0, |
| 2238 | /* 5728 */ 1, 77, 1, 1, 1, 1, 1, 61, 1, 89, 1, 0, |
| 2239 | /* 5740 */ 1, 75, 1, 1, 1, 1, 1, 63, 1, 89, 1, 0, |
| 2240 | /* 5752 */ 1, 73, 1, 1, 1, 1, 1, 65, 1, 89, 1, 0, |
| 2241 | /* 5764 */ 1, 71, 1, 1, 1, 1, 1, 67, 1, 89, 1, 0, |
| 2242 | /* 5776 */ 1, 69, 1, 1, 1, 1, 1, 69, 1, 89, 1, 0, |
| 2243 | /* 5788 */ 1, 67, 1, 1, 1, 1, 1, 71, 1, 89, 1, 0, |
| 2244 | /* 5800 */ 1, 65, 1, 1, 1, 1, 1, 73, 1, 89, 1, 0, |
| 2245 | /* 5812 */ 1, 63, 1, 1, 1, 1, 1, 75, 1, 89, 1, 0, |
| 2246 | /* 5824 */ 1, 61, 1, 1, 1, 1, 1, 77, 1, 89, 1, 0, |
| 2247 | /* 5836 */ 1, 59, 1, 1, 1, 1, 1, 79, 1, 89, 1, 0, |
| 2248 | /* 5848 */ 1, 57, 1, 1, 1, 1, 1, 81, 1, 89, 1, 0, |
| 2249 | /* 5860 */ 1, 55, 1, 1, 1, 1, 1, 83, 1, 89, 1, 0, |
| 2250 | /* 5872 */ 1, 53, 1, 1, 1, 1, 1, 85, 1, 89, 1, 0, |
| 2251 | /* 5884 */ 1, 51, 1, 1, 1, 1, 1, 87, 1, 89, 1, 0, |
| 2252 | /* 5896 */ 1, 49, 1, 1, 1, 1, 1, 89, 1, 89, 1, 0, |
| 2253 | /* 5908 */ 1, 47, 1, 1, 1, 1, 1, 91, 1, 89, 1, 0, |
| 2254 | /* 5920 */ 1, 45, 1, 1, 1, 1, 1, 93, 1, 89, 1, 0, |
| 2255 | /* 5932 */ 1, 43, 1, 1, 1, 1, 1, 95, 1, 89, 1, 0, |
| 2256 | /* 5944 */ 1, 41, 1, 1, 1, 1, 1, 97, 1, 89, 1, 0, |
| 2257 | /* 5956 */ 1, 39, 1, 1, 1, 1, 1, 99, 1, 89, 1, 0, |
| 2258 | /* 5968 */ 1, 37, 1, 1, 1, 1, 1, 101, 1, 89, 1, 0, |
| 2259 | /* 5980 */ 1, 35, 1, 1, 1, 1, 1, 103, 1, 89, 1, 0, |
| 2260 | /* 5992 */ 1, 33, 1, 1, 1, 1, 1, 105, 1, 89, 1, 0, |
| 2261 | /* 6004 */ 1, 31, 1, 1, 1, 1, 1, 107, 1, 89, 1, 0, |
| 2262 | /* 6016 */ 90, 1, 0, |
| 2263 | /* 6019 */ 1, 47, 1, 1, 1, 1, 1, 91, 1, 0, |
| 2264 | /* 6029 */ 92, 1, 0, |
| 2265 | /* 6032 */ 1, 45, 1, 1, 1, 1, 1, 93, 1, 0, |
| 2266 | /* 6042 */ -539, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, 93, 1, 0, |
| 2267 | /* 6066 */ 94, 1, 0, |
| 2268 | /* 6069 */ 1, 43, 1, 1, 1, 1, 1, 95, 1, 0, |
| 2269 | /* 6079 */ 1, 41, 1, 1, 1, 1, 1, 97, 1, 0, |
| 2270 | /* 6089 */ 1, 39, 1, 1, 1, 1, 1, 99, 1, 0, |
| 2271 | /* 6099 */ 1, 37, 1, 1, 1, 1, 1, 101, 1, 0, |
| 2272 | /* 6109 */ 1, 35, 1, 1, 1, 1, 1, 103, 1, 0, |
| 2273 | /* 6119 */ 1, 33, 1, 1, 1, 1, 1, 105, 1, 0, |
| 2274 | /* 6129 */ 1, 31, 1, 1, 1, 1, 1, 107, 1, 0, |
| 2275 | /* 6139 */ -16, 506, 1, 0, |
| 2276 | /* 6143 */ 4, 4, 4, 58, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 36, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2277 | /* 6167 */ 4, 4, 4, 56, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 38, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2278 | /* 6191 */ 4, 4, 4, 54, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 40, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2279 | /* 6215 */ 4, 4, 4, 52, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 42, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2280 | /* 6239 */ 4, 4, 4, 26, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 68, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2281 | /* 6263 */ 4, 4, 4, 24, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 70, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2282 | /* 6287 */ 4, 4, 4, 22, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 72, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2283 | /* 6311 */ 4, 4, 4, 20, 1, 1, 10, 1, 1, 10, 1, 1, 10, 1, 1, 74, 4, 4, 4, 78, 4, 4, 4, 0, |
| 2284 | /* 6335 */ -603, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 415, 4, 0, |
| 2285 | /* 6382 */ -623, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -156, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 439, 4, 0, |
| 2286 | /* 6429 */ 6, 0, |
| 2287 | /* 6431 */ 285, 9, 18, -26, 10, 8, -14, 10, 8, 6, -26, 10, 8, -14, 10, 8, -15, 18, -26, 10, 8, -14, 10, 8, 6, -26, 10, 8, -14, 10, 8, 0, |
| 2288 | /* 6463 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2289 | /* 6496 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2290 | /* 6530 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2291 | /* 6565 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2292 | /* 6600 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2293 | /* 6623 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 64, 8, 0, |
| 2294 | /* 6636 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2295 | /* 6669 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2296 | /* 6703 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2297 | /* 6738 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2298 | /* 6773 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2299 | /* 6796 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 72, 8, 0, |
| 2300 | /* 6809 */ 8, 70, 1, 1, 22, 1, 1, 40, 8, 82, 8, 0, |
| 2301 | /* 6821 */ 8, 68, 1, 1, 22, 1, 1, 42, 8, 82, 8, 0, |
| 2302 | /* 6833 */ 8, 66, 1, 1, 22, 1, 1, 44, 8, 82, 8, 0, |
| 2303 | /* 6845 */ 8, 64, 1, 1, 22, 1, 1, 46, 8, 82, 8, 0, |
| 2304 | /* 6857 */ 8, 62, 1, 1, 22, 1, 1, 48, 8, 82, 8, 0, |
| 2305 | /* 6869 */ 8, 60, 1, 1, 22, 1, 1, 50, 8, 82, 8, 0, |
| 2306 | /* 6881 */ 8, 58, 1, 1, 22, 1, 1, 52, 8, 82, 8, 0, |
| 2307 | /* 6893 */ 8, 56, 1, 1, 22, 1, 1, 54, 8, 82, 8, 0, |
| 2308 | /* 6905 */ 8, 38, 1, 1, 22, 1, 1, 72, 8, 82, 8, 0, |
| 2309 | /* 6917 */ 8, 36, 1, 1, 22, 1, 1, 74, 8, 82, 8, 0, |
| 2310 | /* 6929 */ 8, 34, 1, 1, 22, 1, 1, 76, 8, 82, 8, 0, |
| 2311 | /* 6941 */ 8, 32, 1, 1, 22, 1, 1, 78, 8, 82, 8, 0, |
| 2312 | /* 6953 */ 8, 30, 1, 1, 22, 1, 1, 80, 8, 82, 8, 0, |
| 2313 | /* 6965 */ 8, 28, 1, 1, 22, 1, 1, 82, 8, 82, 8, 0, |
| 2314 | /* 6977 */ 8, 26, 1, 1, 22, 1, 1, 84, 8, 82, 8, 0, |
| 2315 | /* 6989 */ 8, 24, 1, 1, 22, 1, 1, 86, 8, 82, 8, 0, |
| 2316 | /* 7001 */ 31, 491, 17, -43, 11, 0, |
| 2317 | /* 7007 */ 31, 492, 17, -43, 11, 0, |
| 2318 | /* 7013 */ -253, 508, -43, 11, 0, |
| 2319 | /* 7018 */ -253, 509, -43, 11, 0, |
| 2320 | /* 7023 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2321 | /* 7056 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2322 | /* 7090 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2323 | /* 7125 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2324 | /* 7160 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2325 | /* 7183 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 40, 12, 0, |
| 2326 | /* 7196 */ -412, 96, 124, 255, 31, 33, -32, 62, -33, 34, -33, 1, 49, 31, 33, -32, 62, -33, 34, -33, 1, 77, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2327 | /* 7229 */ -220, -128, 96, 124, 255, 31, 33, -32, 62, -33, 34, -33, 1, 49, 31, 33, -32, 62, -33, 34, -33, 1, 77, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2328 | /* 7263 */ -252, 96, -128, 96, 124, 255, 31, 33, -32, 62, -33, 34, -33, 1, 49, 31, 33, -32, 62, -33, 34, -33, 1, 77, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2329 | /* 7298 */ 64, 96, -128, 96, 124, 255, 31, 33, -32, 62, -33, 34, -33, 1, 49, 31, 33, -32, 62, -33, 34, -33, 1, 77, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2330 | /* 7333 */ -220, 124, 367, 31, 33, -32, 62, -33, 34, -33, 1, 77, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2331 | /* 7356 */ -160, 507, 31, 33, -32, 62, -33, 34, -33, 1, 41, 12, 0, |
| 2332 | /* 7369 */ -412, 96, 124, 254, 1, 63, 1, -33, 1, 62, -33, 1, 49, 1, 63, 1, -33, 1, 62, -33, 1, 77, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2333 | /* 7402 */ -220, -128, 96, 124, 254, 1, 63, 1, -33, 1, 62, -33, 1, 49, 1, 63, 1, -33, 1, 62, -33, 1, 77, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2334 | /* 7436 */ -252, 96, -128, 96, 124, 254, 1, 63, 1, -33, 1, 62, -33, 1, 49, 1, 63, 1, -33, 1, 62, -33, 1, 77, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2335 | /* 7471 */ 64, 96, -128, 96, 124, 254, 1, 63, 1, -33, 1, 62, -33, 1, 49, 1, 63, 1, -33, 1, 62, -33, 1, 77, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2336 | /* 7506 */ -220, 124, 366, 1, 63, 1, -33, 1, 62, -33, 1, 77, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2337 | /* 7529 */ -160, 506, 1, 63, 1, -33, 1, 62, -33, 1, 42, 12, 0, |
| 2338 | /* 7542 */ -412, 96, 124, 254, 1, 62, 1, -33, 34, -33, 1, 29, 50, 1, 62, 1, -33, 34, -33, 1, 29, 78, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2339 | /* 7575 */ -220, -128, 96, 124, 254, 1, 62, 1, -33, 34, -33, 1, 29, 50, 1, 62, 1, -33, 34, -33, 1, 29, 78, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2340 | /* 7609 */ -252, 96, -128, 96, 124, 254, 1, 62, 1, -33, 34, -33, 1, 29, 50, 1, 62, 1, -33, 34, -33, 1, 29, 78, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2341 | /* 7644 */ 64, 96, -128, 96, 124, 254, 1, 62, 1, -33, 34, -33, 1, 29, 50, 1, 62, 1, -33, 34, -33, 1, 29, 78, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2342 | /* 7679 */ -220, 124, 366, 1, 62, 1, -33, 34, -33, 1, 29, 78, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2343 | /* 7702 */ -160, 506, 1, 62, 1, -33, 34, -33, 1, 29, 43, 12, 0, |
| 2344 | /* 7715 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2345 | /* 7748 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2346 | /* 7782 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2347 | /* 7817 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2348 | /* 7852 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2349 | /* 7875 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 48, 12, 0, |
| 2350 | /* 7888 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2351 | /* 7921 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2352 | /* 7955 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2353 | /* 7990 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2354 | /* 8025 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2355 | /* 8048 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 64, 12, 0, |
| 2356 | /* 8061 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2357 | /* 8094 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2358 | /* 8128 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2359 | /* 8163 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2360 | /* 8198 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2361 | /* 8221 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 72, 12, 0, |
| 2362 | /* 8234 */ -16, 507, 15, 0, |
| 2363 | /* 8238 */ -507, 16, -31, 16, 0, |
| 2364 | /* 8243 */ -507, 16, -15, 16, 0, |
| 2365 | /* 8248 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2366 | /* 8281 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2367 | /* 8315 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2368 | /* 8350 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2369 | /* 8385 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2370 | /* 8408 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 40, 16, 0, |
| 2371 | /* 8421 */ -412, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2372 | /* 8454 */ -220, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2373 | /* 8488 */ -252, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2374 | /* 8523 */ 64, 96, -128, 96, 124, 254, 1, 62, -33, 34, -33, 34, -33, 1, 79, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2375 | /* 8558 */ -220, 124, 366, 1, 62, -33, 34, -33, 34, -33, 1, 107, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2376 | /* 8581 */ -160, 506, 1, 62, -33, 34, -33, 34, -33, 1, 48, 16, 0, |
| 2377 | /* 8594 */ 2, 729, 16, 0, |
| 2378 | /* 8598 */ -232, 737, 16, 0, |
| 2379 | /* 8602 */ 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 17, 1, 1, 29, 0, |
| 2380 | /* 8622 */ 1, 1, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 85, 1, 1, 17, 1, 1, 29, 59, 1, 1, 29, 0, |
| 2381 | /* 8646 */ 1, 232, 29, 0, |
| 2382 | /* 8650 */ 63, 1, -33, 1, 30, 50, 63, 1, -33, 1, 30, 78, 63, 1, -33, 1, 30, 0, |
| 2383 | /* 8668 */ 1, 30, 1, 1, 1, 1, 1, 1, 88, 1, 1, 17, 1, 30, 0, |
| 2384 | /* 8683 */ 1, 30, 1, 1, 1, 1, 1, 1, 88, 1, 1, 17, 1, 30, 59, 1, 30, 0, |
| 2385 | /* 8701 */ -32, 31, 113, -32, 31, 141, -32, 31, 0, |
| 2386 | /* 8710 */ 31, 1, 1, 1, 91, 1, 1, 17, 31, 0, |
| 2387 | /* 8720 */ 31, 1, 1, 1, 91, 1, 1, 17, 31, 59, 31, 0, |
| 2388 | /* 8732 */ 32, 0, |
| 2389 | /* 8734 */ 34, 0, |
| 2390 | /* 8736 */ 36, 0, |
| 2391 | /* 8738 */ 38, 0, |
| 2392 | /* 8740 */ 40, 0, |
| 2393 | /* 8742 */ 42, 0, |
| 2394 | /* 8744 */ 44, 0, |
| 2395 | /* 8746 */ 46, 0, |
| 2396 | /* 8748 */ 94, 1, 1, 48, 0, |
| 2397 | /* 8753 */ 92, 1, 1, 50, 0, |
| 2398 | /* 8758 */ 90, 1, 1, 52, 0, |
| 2399 | /* 8763 */ 88, 1, 1, 54, 0, |
| 2400 | /* 8768 */ 86, 1, 1, 56, 0, |
| 2401 | /* 8773 */ 84, 1, 1, 58, 0, |
| 2402 | /* 8778 */ 82, 1, 1, 60, 0, |
| 2403 | /* 8783 */ 80, 1, 1, 62, 0, |
| 2404 | /* 8788 */ -611, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -152, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 0, |
| 2405 | /* 8811 */ -587, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -152, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 0, |
| 2406 | /* 8834 */ 78, 1, 1, 64, 0, |
| 2407 | /* 8839 */ -475, 128, -96, -64, 316, 64, 64, -443, 128, -96, -64, 316, 64, 64, 0, |
| 2408 | /* 8854 */ -475, 128, -96, -64, 316, 64, 64, -411, 128, -96, -64, 316, 64, 64, 0, |
| 2409 | /* 8869 */ -96, -64, 316, 64, 0, |
| 2410 | /* 8874 */ 76, 1, 1, 66, 0, |
| 2411 | /* 8879 */ 74, 1, 1, 68, 0, |
| 2412 | /* 8884 */ 72, 1, 1, 70, 0, |
| 2413 | /* 8889 */ 70, 1, 1, 72, 0, |
| 2414 | /* 8894 */ 68, 1, 1, 74, 0, |
| 2415 | /* 8899 */ 66, 1, 1, 76, 0, |
| 2416 | /* 8904 */ 64, 1, 1, 78, 0, |
| 2417 | /* 8909 */ 62, 1, 1, 80, 0, |
| 2418 | /* 8914 */ 60, 1, 1, 82, 0, |
| 2419 | /* 8919 */ 58, 1, 1, 84, 0, |
| 2420 | /* 8924 */ 56, 1, 1, 86, 0, |
| 2421 | /* 8929 */ 54, 1, 1, 88, 0, |
| 2422 | /* 8934 */ 52, 1, 1, 90, 0, |
| 2423 | /* 8939 */ 94, 1, 1, 48, 90, 0, |
| 2424 | /* 8945 */ 92, 1, 1, 50, 90, 0, |
| 2425 | /* 8951 */ 90, 1, 1, 52, 90, 0, |
| 2426 | /* 8957 */ 88, 1, 1, 54, 90, 0, |
| 2427 | /* 8963 */ 86, 1, 1, 56, 90, 0, |
| 2428 | /* 8969 */ 84, 1, 1, 58, 90, 0, |
| 2429 | /* 8975 */ 82, 1, 1, 60, 90, 0, |
| 2430 | /* 8981 */ 80, 1, 1, 62, 90, 0, |
| 2431 | /* 8987 */ 78, 1, 1, 64, 90, 0, |
| 2432 | /* 8993 */ 76, 1, 1, 66, 90, 0, |
| 2433 | /* 8999 */ 74, 1, 1, 68, 90, 0, |
| 2434 | /* 9005 */ 72, 1, 1, 70, 90, 0, |
| 2435 | /* 9011 */ 70, 1, 1, 72, 90, 0, |
| 2436 | /* 9017 */ 68, 1, 1, 74, 90, 0, |
| 2437 | /* 9023 */ 66, 1, 1, 76, 90, 0, |
| 2438 | /* 9029 */ 64, 1, 1, 78, 90, 0, |
| 2439 | /* 9035 */ 62, 1, 1, 80, 90, 0, |
| 2440 | /* 9041 */ 60, 1, 1, 82, 90, 0, |
| 2441 | /* 9047 */ 58, 1, 1, 84, 90, 0, |
| 2442 | /* 9053 */ 56, 1, 1, 86, 90, 0, |
| 2443 | /* 9059 */ 54, 1, 1, 88, 90, 0, |
| 2444 | /* 9065 */ 52, 1, 1, 90, 90, 0, |
| 2445 | /* 9071 */ 50, 1, 1, 92, 90, 0, |
| 2446 | /* 9077 */ 48, 1, 1, 94, 90, 0, |
| 2447 | /* 9083 */ 46, 1, 1, 96, 90, 0, |
| 2448 | /* 9089 */ 44, 1, 1, 98, 90, 0, |
| 2449 | /* 9095 */ 42, 1, 1, 100, 90, 0, |
| 2450 | /* 9101 */ 40, 1, 1, 102, 90, 0, |
| 2451 | /* 9107 */ 38, 1, 1, 104, 90, 0, |
| 2452 | /* 9113 */ 36, 1, 1, 106, 90, 0, |
| 2453 | /* 9119 */ 34, 1, 1, 108, 90, 0, |
| 2454 | /* 9125 */ 32, 1, 1, 110, 90, 0, |
| 2455 | /* 9131 */ 50, 1, 1, 92, 0, |
| 2456 | /* 9136 */ 48, 1, 1, 94, 0, |
| 2457 | /* 9141 */ 46, 1, 1, 96, 0, |
| 2458 | /* 9146 */ 44, 1, 1, 98, 0, |
| 2459 | /* 9151 */ 42, 1, 1, 100, 0, |
| 2460 | /* 9156 */ 40, 1, 1, 102, 0, |
| 2461 | /* 9161 */ 38, 1, 1, 104, 0, |
| 2462 | /* 9166 */ 36, 1, 1, 106, 0, |
| 2463 | /* 9171 */ 34, 1, 1, 108, 0, |
| 2464 | /* 9176 */ 32, 1, 1, 110, 0, |
| 2465 | /* 9181 */ -507, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -159, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 94, 112, 0, |
| 2466 | /* 9206 */ -507, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, -191, -124, -96, 128, -96, -64, 316, 64, 64, -96, 64, 126, 112, 0, |
| 2467 | /* 9231 */ 112, 140, 0, |
| 2468 | /* 9234 */ -491, -96, 128, -96, -64, 316, 64, 64, -96, -219, -96, 128, -96, -64, 316, 64, 64, -96, 158, 0, |
| 2469 | /* 9254 */ -491, -96, 128, -96, -64, 316, 64, 64, -96, -251, -96, 128, -96, -64, 316, 64, 64, -96, 190, 0, |
| 2470 | /* 9274 */ 233, 0, |
| 2471 | /* 9276 */ -493, -31, 284, -518, 235, 284, 237, 0, |
| 2472 | /* 9284 */ -509, -31, 284, -252, -31, 284, 238, 0, |
| 2473 | /* 9292 */ -510, -31, 284, -252, -31, 284, 239, 0, |
| 2474 | /* 9300 */ -511, -31, 284, -252, -31, 284, 240, 0, |
| 2475 | /* 9308 */ -512, -31, 284, -252, -31, 284, 241, 0, |
| 2476 | /* 9316 */ -513, -31, 284, -252, -31, 284, 242, 0, |
| 2477 | /* 9324 */ -514, -31, 284, -252, -31, 284, 243, 0, |
| 2478 | /* 9332 */ -515, -31, 284, -252, -31, 284, 244, 0, |
| 2479 | /* 9340 */ -516, -31, 284, -252, -31, 284, 245, 0, |
| 2480 | /* 9348 */ -517, -31, 284, -252, -31, 284, 246, 0, |
| 2481 | /* 9356 */ -518, -31, 284, -252, -31, 284, 247, 0, |
| 2482 | /* 9364 */ -519, -31, 284, -252, -31, 284, 248, 0, |
| 2483 | /* 9372 */ -520, -31, 284, -252, -31, 284, 249, 0, |
| 2484 | /* 9380 */ -521, -31, 284, -252, -31, 284, 250, 0, |
| 2485 | /* 9388 */ -522, -31, 284, -252, -31, 284, 251, 0, |
| 2486 | /* 9396 */ -31, 284, 0, |
| 2487 | /* 9399 */ 232, 284, 0, |
| 2488 | /* 9402 */ 235, 284, 0, |
| 2489 | /* 9405 */ -64, 316, 0, |
| 2490 | /* 9408 */ -753, 232, 284, -508, -2, 1, 730, 0, |
| 2491 | /* 9416 */ 1, 745, 0, |
| 2492 | /* 9419 */ -516, 753, 0, |
| 2493 | }; |
| 2494 | |
| 2495 | extern const LaneBitmask AArch64LaneMaskLists[] = { |
| 2496 | /* 0 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), |
| 2497 | /* 2 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000004), |
| 2498 | /* 7 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000000004), |
| 2499 | /* 17 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), |
| 2500 | /* 37 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000004), |
| 2501 | /* 52 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), |
| 2502 | /* 55 */ LaneBitmask(0x0000008000000000), LaneBitmask(0x0000000000000010), |
| 2503 | /* 57 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), |
| 2504 | /* 61 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), |
| 2505 | /* 69 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), |
| 2506 | /* 85 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), |
| 2507 | /* 97 */ LaneBitmask(0x0200000000000000), LaneBitmask(0x0400000000000000), LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), |
| 2508 | /* 101 */ LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000100), |
| 2509 | /* 103 */ LaneBitmask(0x0000000000000100), LaneBitmask(0x0000000000000200), |
| 2510 | /* 105 */ LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), |
| 2511 | /* 107 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000001000), |
| 2512 | /* 113 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0800000000000000), LaneBitmask(0x0000000000001000), |
| 2513 | /* 125 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0800000000000000), LaneBitmask(0x2000000000000000), LaneBitmask(0x1000000000000000), LaneBitmask(0x0000000000001000), |
| 2514 | /* 149 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0800000000000000), LaneBitmask(0x2000000000000000), LaneBitmask(0x0000000000001000), |
| 2515 | /* 167 */ LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), |
| 2516 | /* 171 */ LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), LaneBitmask(0x0000000000040000), |
| 2517 | /* 179 */ LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), LaneBitmask(0x0000000000040000), LaneBitmask(0x0000000000080000), LaneBitmask(0x0000000000100000), LaneBitmask(0x0000000000200000), LaneBitmask(0x0000000000400000), LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000001000000), LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000004000000), |
| 2518 | /* 195 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), |
| 2519 | /* 203 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), |
| 2520 | /* 219 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), |
| 2521 | /* 231 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), |
| 2522 | /* 247 */ LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), |
| 2523 | /* 263 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), |
| 2524 | /* 275 */ LaneBitmask(0x0000000000000010), LaneBitmask(0x0000008000000000), |
| 2525 | /* 277 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), |
| 2526 | /* 287 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), |
| 2527 | /* 307 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), |
| 2528 | /* 322 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), |
| 2529 | /* 342 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), |
| 2530 | /* 357 */ LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), |
| 2531 | /* 377 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0080000000000000), LaneBitmask(0x0020000000000000), LaneBitmask(0x0008000000000000), LaneBitmask(0x0002000000000000), LaneBitmask(0x0000800000000000), LaneBitmask(0x0000200000000000), LaneBitmask(0x0000080000000000), LaneBitmask(0x0000000000000080), LaneBitmask(0x0100000000000000), LaneBitmask(0x0040000000000000), LaneBitmask(0x0010000000000000), LaneBitmask(0x0004000000000000), LaneBitmask(0x0001000000000000), LaneBitmask(0x0000400000000000), LaneBitmask(0x0000100000000000), |
| 2532 | /* 393 */ LaneBitmask(0x0000080000000000), LaneBitmask(0x0000100000000000), LaneBitmask(0x0000000000000040), LaneBitmask(0x0080000000000000), LaneBitmask(0x0020000000000000), LaneBitmask(0x0008000000000000), LaneBitmask(0x0002000000000000), LaneBitmask(0x0000800000000000), LaneBitmask(0x0000200000000000), LaneBitmask(0x0000000000000080), LaneBitmask(0x0100000000000000), LaneBitmask(0x0040000000000000), LaneBitmask(0x0010000000000000), LaneBitmask(0x0004000000000000), LaneBitmask(0x0001000000000000), LaneBitmask(0x0000400000000000), |
| 2533 | /* 409 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0200000000000000), LaneBitmask(0x0000000000000080), LaneBitmask(0x0400000000000000), |
| 2534 | /* 413 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0200000000000000), LaneBitmask(0x0400000000000000), |
| 2535 | /* 417 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), |
| 2536 | /* 429 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x2000000000000000), LaneBitmask(0x1000000000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), |
| 2537 | /* 453 */ LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x2000000000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), |
| 2538 | /* 471 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), LaneBitmask(0x2000000000000000), LaneBitmask(0x1000000000000000), |
| 2539 | /* 495 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), LaneBitmask(0x2000000000000000), |
| 2540 | /* 513 */ LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000001000000000), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000004), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x1000000000000000), LaneBitmask(0x0000000000001000), LaneBitmask(0x0800000000000000), LaneBitmask(0x2000000000000000), |
| 2541 | /* 537 */ LaneBitmask(0xFFFFFFFFFFFFFFFF), |
| 2542 | }; |
| 2543 | |
| 2544 | extern const uint16_t AArch64SubRegIdxLists[] = { |
| 2545 | /* 0 */ 1, 2, |
| 2546 | /* 2 */ 3, 18, 9, 1, 2, 10, 19, 8, |
| 2547 | /* 10 */ 9, 1, 2, 10, |
| 2548 | /* 14 */ 11, |
| 2549 | /* 15 */ 18, 9, 1, 2, 10, 19, |
| 2550 | /* 21 */ 20, 21, |
| 2551 | /* 23 */ 22, 24, |
| 2552 | /* 25 */ 39, 40, |
| 2553 | /* 27 */ 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, |
| 2554 | /* 37 */ 35, 39, 40, 36, 49, 50, |
| 2555 | /* 43 */ 41, 35, 39, 40, 36, 49, 50, 42, 51, 53, 54, 52, 55, 56, |
| 2556 | /* 57 */ 34, 37, 41, 35, 39, 40, 36, 49, 50, 42, 51, 53, 54, 52, 55, 56, 38, 61, 57, 59, 60, 58, 63, 64, 62, 65, 67, 68, 66, 69, 70, |
| 2557 | /* 88 */ 4, 18, 9, 1, 2, 10, 19, 5, 75, 73, 71, 72, 74, 76, |
| 2558 | /* 102 */ 12, 11, 13, 89, |
| 2559 | /* 106 */ 44, 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, 45, 15, 5, 75, 73, 71, 72, 74, 76, 90, 109, |
| 2560 | /* 128 */ 4, 18, 9, 1, 2, 10, 19, 5, 75, 73, 71, 72, 74, 76, 6, 87, 85, 83, 84, 86, 88, 112, 114, |
| 2561 | /* 151 */ 4, 18, 9, 1, 2, 10, 19, 5, 75, 73, 71, 72, 74, 76, 6, 87, 85, 83, 84, 86, 88, 7, 81, 79, 77, 78, 80, 82, 112, 113, 114, 115, 116, |
| 2562 | /* 184 */ 14, 3, 18, 9, 1, 2, 10, 19, 8, 15, 5, 75, 73, 71, 72, 74, 76, 90, 117, |
| 2563 | /* 203 */ 14, 3, 18, 9, 1, 2, 10, 19, 8, 15, 5, 75, 73, 71, 72, 74, 76, 90, 16, 6, 87, 85, 83, 84, 86, 88, 92, 114, 117, 119, 120, 122, |
| 2564 | /* 235 */ 14, 3, 18, 9, 1, 2, 10, 19, 8, 15, 5, 75, 73, 71, 72, 74, 76, 90, 16, 6, 87, 85, 83, 84, 86, 88, 92, 17, 7, 81, 79, 77, 78, 80, 82, 91, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, |
| 2565 | /* 282 */ 26, 20, 21, 27, 105, 106, 28, 103, 104, 29, 101, 102, 30, 99, 100, 31, 97, 98, 32, 95, 96, 33, 93, 94, 125, 126, 127, 128, 129, 130, 131, 132, |
| 2566 | /* 314 */ 23, 20, 21, 25, 107, 108, 133, |
| 2567 | /* 321 */ 44, 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, 45, 15, 5, 75, 73, 71, 72, 74, 76, 90, 109, 117, 134, |
| 2568 | /* 345 */ 44, 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, 45, 15, 5, 75, 73, 71, 72, 74, 76, 90, 109, 46, 16, 6, 87, 85, 83, 84, 86, 88, 92, 111, 114, 117, 119, 122, 134, 136, 137, 139, |
| 2569 | /* 386 */ 44, 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, 45, 15, 5, 75, 73, 71, 72, 74, 76, 90, 109, 46, 16, 6, 87, 85, 83, 84, 86, 88, 92, 111, 47, 17, 7, 81, 79, 77, 78, 80, 82, 91, 110, 114, 115, 116, 117, 118, 119, 122, 123, 124, 134, 135, 136, 137, 138, 139, 140, 141, |
| 2570 | /* 447 */ 44, 43, 3, 18, 9, 1, 2, 10, 19, 8, 48, 45, 15, 5, 75, 73, 71, 72, 74, 76, 90, 109, 46, 16, 6, 87, 85, 83, 84, 86, 88, 92, 111, 47, 17, 7, 81, 79, 77, 78, 80, 82, 91, 110, 142, 143, |
| 2571 | }; |
| 2572 | |
| 2573 | |
| 2574 | #ifdef __GNUC__ |
| 2575 | #pragma GCC diagnostic push |
| 2576 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 2577 | #endif |
| 2578 | extern const char AArch64RegStrings[] = { |
| 2579 | /* 0 */ "B10\000" |
| 2580 | /* 4 */ "D7_D8_D9_D10\000" |
| 2581 | /* 17 */ "H10\000" |
| 2582 | /* 21 */ "PN10\000" |
| 2583 | /* 26 */ "P9_P10\000" |
| 2584 | /* 33 */ "ZAQ10\000" |
| 2585 | /* 39 */ "Q7_Q8_Q9_Q10\000" |
| 2586 | /* 52 */ "S10\000" |
| 2587 | /* 56 */ "W10\000" |
| 2588 | /* 60 */ "X10\000" |
| 2589 | /* 64 */ "Z2_Z10\000" |
| 2590 | /* 71 */ "Z7_Z8_Z9_Z10\000" |
| 2591 | /* 84 */ "B20\000" |
| 2592 | /* 88 */ "D17_D18_D19_D20\000" |
| 2593 | /* 104 */ "H20\000" |
| 2594 | /* 108 */ "Q17_Q18_Q19_Q20\000" |
| 2595 | /* 124 */ "S20\000" |
| 2596 | /* 128 */ "W20\000" |
| 2597 | /* 132 */ "X20\000" |
| 2598 | /* 136 */ "Z17_Z18_Z19_Z20\000" |
| 2599 | /* 152 */ "B30\000" |
| 2600 | /* 156 */ "D27_D28_D29_D30\000" |
| 2601 | /* 172 */ "H30\000" |
| 2602 | /* 176 */ "Q27_Q28_Q29_Q30\000" |
| 2603 | /* 192 */ "S30\000" |
| 2604 | /* 196 */ "W30\000" |
| 2605 | /* 200 */ "Z22_Z30\000" |
| 2606 | /* 208 */ "Z18_Z22_Z26_Z30\000" |
| 2607 | /* 224 */ "Z27_Z28_Z29_Z30\000" |
| 2608 | /* 240 */ "ZAB0\000" |
| 2609 | /* 245 */ "ZAD0\000" |
| 2610 | /* 250 */ "D29_D30_D31_D0\000" |
| 2611 | /* 265 */ "ZAH0\000" |
| 2612 | /* 270 */ "PN0\000" |
| 2613 | /* 274 */ "P15_P0\000" |
| 2614 | /* 281 */ "ZAQ0\000" |
| 2615 | /* 286 */ "Q29_Q30_Q31_Q0\000" |
| 2616 | /* 301 */ "ZAS0\000" |
| 2617 | /* 306 */ "ZT0\000" |
| 2618 | /* 310 */ "W0\000" |
| 2619 | /* 313 */ "X0\000" |
| 2620 | /* 316 */ "Z29_Z30_Z31_Z0\000" |
| 2621 | /* 331 */ "B11\000" |
| 2622 | /* 335 */ "D8_D9_D10_D11\000" |
| 2623 | /* 349 */ "H11\000" |
| 2624 | /* 353 */ "PN11\000" |
| 2625 | /* 358 */ "P10_P11\000" |
| 2626 | /* 366 */ "ZAQ11\000" |
| 2627 | /* 372 */ "Q8_Q9_Q10_Q11\000" |
| 2628 | /* 386 */ "S11\000" |
| 2629 | /* 390 */ "W10_W11\000" |
| 2630 | /* 398 */ "X4_X5_X6_X7_X8_X9_X10_X11\000" |
| 2631 | /* 424 */ "Z8_Z9_Z10_Z11\000" |
| 2632 | /* 438 */ "Z3_Z11\000" |
| 2633 | /* 445 */ "B21\000" |
| 2634 | /* 449 */ "D18_D19_D20_D21\000" |
| 2635 | /* 465 */ "H21\000" |
| 2636 | /* 469 */ "Q18_Q19_Q20_Q21\000" |
| 2637 | /* 485 */ "S21\000" |
| 2638 | /* 489 */ "W20_W21\000" |
| 2639 | /* 497 */ "X14_X15_X16_X17_X18_X19_X20_X21\000" |
| 2640 | /* 529 */ "Z18_Z19_Z20_Z21\000" |
| 2641 | /* 545 */ "B31\000" |
| 2642 | /* 549 */ "D28_D29_D30_D31\000" |
| 2643 | /* 565 */ "H31\000" |
| 2644 | /* 569 */ "Q28_Q29_Q30_Q31\000" |
| 2645 | /* 585 */ "S31\000" |
| 2646 | /* 589 */ "Z28_Z29_Z30_Z31\000" |
| 2647 | /* 605 */ "Z23_Z31\000" |
| 2648 | /* 613 */ "Z19_Z23_Z27_Z31\000" |
| 2649 | /* 629 */ "B1\000" |
| 2650 | /* 632 */ "ZAD1\000" |
| 2651 | /* 637 */ "D30_D31_D0_D1\000" |
| 2652 | /* 651 */ "ZAH1\000" |
| 2653 | /* 656 */ "PN1\000" |
| 2654 | /* 660 */ "P0_P1\000" |
| 2655 | /* 666 */ "ZAQ1\000" |
| 2656 | /* 671 */ "Q30_Q31_Q0_Q1\000" |
| 2657 | /* 685 */ "ZAS1\000" |
| 2658 | /* 690 */ "W0_W1\000" |
| 2659 | /* 696 */ "X0_X1\000" |
| 2660 | /* 702 */ "Z30_Z31_Z0_Z1\000" |
| 2661 | /* 716 */ "B12\000" |
| 2662 | /* 720 */ "D9_D10_D11_D12\000" |
| 2663 | /* 735 */ "H12\000" |
| 2664 | /* 739 */ "PN12\000" |
| 2665 | /* 744 */ "P11_P12\000" |
| 2666 | /* 752 */ "ZAQ12\000" |
| 2667 | /* 758 */ "Q9_Q10_Q11_Q12\000" |
| 2668 | /* 773 */ "S12\000" |
| 2669 | /* 777 */ "W12\000" |
| 2670 | /* 781 */ "X12\000" |
| 2671 | /* 785 */ "Z9_Z10_Z11_Z12\000" |
| 2672 | /* 800 */ "Z4_Z12\000" |
| 2673 | /* 807 */ "Z0_Z4_Z8_Z12\000" |
| 2674 | /* 820 */ "B22\000" |
| 2675 | /* 824 */ "D19_D20_D21_D22\000" |
| 2676 | /* 840 */ "H22\000" |
| 2677 | /* 844 */ "Q19_Q20_Q21_Q22\000" |
| 2678 | /* 860 */ "S22\000" |
| 2679 | /* 864 */ "W22\000" |
| 2680 | /* 868 */ "X22\000" |
| 2681 | /* 872 */ "Z19_Z20_Z21_Z22\000" |
| 2682 | /* 888 */ "B2\000" |
| 2683 | /* 891 */ "ZAD2\000" |
| 2684 | /* 896 */ "D31_D0_D1_D2\000" |
| 2685 | /* 909 */ "H2\000" |
| 2686 | /* 912 */ "PN2\000" |
| 2687 | /* 916 */ "P1_P2\000" |
| 2688 | /* 922 */ "ZAQ2\000" |
| 2689 | /* 927 */ "Q31_Q0_Q1_Q2\000" |
| 2690 | /* 940 */ "ZAS2\000" |
| 2691 | /* 945 */ "W2\000" |
| 2692 | /* 948 */ "X2\000" |
| 2693 | /* 951 */ "Z31_Z0_Z1_Z2\000" |
| 2694 | /* 964 */ "B13\000" |
| 2695 | /* 968 */ "D10_D11_D12_D13\000" |
| 2696 | /* 984 */ "H13\000" |
| 2697 | /* 988 */ "PN13\000" |
| 2698 | /* 993 */ "P12_P13\000" |
| 2699 | /* 1001 */ "ZAQ13\000" |
| 2700 | /* 1007 */ "Q10_Q11_Q12_Q13\000" |
| 2701 | /* 1023 */ "S13\000" |
| 2702 | /* 1027 */ "W12_W13\000" |
| 2703 | /* 1035 */ "X6_X7_X8_X9_X10_X11_X12_X13\000" |
| 2704 | /* 1063 */ "Z10_Z11_Z12_Z13\000" |
| 2705 | /* 1079 */ "Z5_Z13\000" |
| 2706 | /* 1086 */ "Z1_Z5_Z9_Z13\000" |
| 2707 | /* 1099 */ "B23\000" |
| 2708 | /* 1103 */ "D20_D21_D22_D23\000" |
| 2709 | /* 1119 */ "H23\000" |
| 2710 | /* 1123 */ "Q20_Q21_Q22_Q23\000" |
| 2711 | /* 1139 */ "S23\000" |
| 2712 | /* 1143 */ "W22_W23\000" |
| 2713 | /* 1151 */ "X16_X17_X18_X19_X20_X21_X22_X23\000" |
| 2714 | /* 1183 */ "Z20_Z21_Z22_Z23\000" |
| 2715 | /* 1199 */ "B3\000" |
| 2716 | /* 1202 */ "ZAD3\000" |
| 2717 | /* 1207 */ "D0_D1_D2_D3\000" |
| 2718 | /* 1219 */ "H3\000" |
| 2719 | /* 1222 */ "PN3\000" |
| 2720 | /* 1226 */ "P2_P3\000" |
| 2721 | /* 1232 */ "ZAQ3\000" |
| 2722 | /* 1237 */ "Q0_Q1_Q2_Q3\000" |
| 2723 | /* 1249 */ "ZAS3\000" |
| 2724 | /* 1254 */ "W2_W3\000" |
| 2725 | /* 1260 */ "X2_X3\000" |
| 2726 | /* 1266 */ "Z0_Z1_Z2_Z3\000" |
| 2727 | /* 1278 */ "B14\000" |
| 2728 | /* 1282 */ "D11_D12_D13_D14\000" |
| 2729 | /* 1298 */ "H14\000" |
| 2730 | /* 1302 */ "PN14\000" |
| 2731 | /* 1307 */ "P13_P14\000" |
| 2732 | /* 1315 */ "ZAQ14\000" |
| 2733 | /* 1321 */ "Q11_Q12_Q13_Q14\000" |
| 2734 | /* 1337 */ "S14\000" |
| 2735 | /* 1341 */ "W14\000" |
| 2736 | /* 1345 */ "X14\000" |
| 2737 | /* 1349 */ "Z2_Z6_Z10_Z14\000" |
| 2738 | /* 1363 */ "Z11_Z12_Z13_Z14\000" |
| 2739 | /* 1379 */ "Z6_Z14\000" |
| 2740 | /* 1386 */ "B24\000" |
| 2741 | /* 1390 */ "D21_D22_D23_D24\000" |
| 2742 | /* 1406 */ "H24\000" |
| 2743 | /* 1410 */ "Q21_Q22_Q23_Q24\000" |
| 2744 | /* 1426 */ "S24\000" |
| 2745 | /* 1430 */ "W24\000" |
| 2746 | /* 1434 */ "X24\000" |
| 2747 | /* 1438 */ "Z21_Z22_Z23_Z24\000" |
| 2748 | /* 1454 */ "Z16_Z24\000" |
| 2749 | /* 1462 */ "B4\000" |
| 2750 | /* 1465 */ "ZAD4\000" |
| 2751 | /* 1470 */ "D1_D2_D3_D4\000" |
| 2752 | /* 1482 */ "H4\000" |
| 2753 | /* 1485 */ "PN4\000" |
| 2754 | /* 1489 */ "P3_P4\000" |
| 2755 | /* 1495 */ "ZAQ4\000" |
| 2756 | /* 1500 */ "Q1_Q2_Q3_Q4\000" |
| 2757 | /* 1512 */ "S4\000" |
| 2758 | /* 1515 */ "W4\000" |
| 2759 | /* 1518 */ "X4\000" |
| 2760 | /* 1521 */ "Z1_Z2_Z3_Z4\000" |
| 2761 | /* 1533 */ "B15\000" |
| 2762 | /* 1537 */ "D12_D13_D14_D15\000" |
| 2763 | /* 1553 */ "H15\000" |
| 2764 | /* 1557 */ "PN15\000" |
| 2765 | /* 1562 */ "P14_P15\000" |
| 2766 | /* 1570 */ "ZAQ15\000" |
| 2767 | /* 1576 */ "Q12_Q13_Q14_Q15\000" |
| 2768 | /* 1592 */ "S15\000" |
| 2769 | /* 1596 */ "W14_W15\000" |
| 2770 | /* 1604 */ "X8_X9_X10_X11_X12_X13_X14_X15\000" |
| 2771 | /* 1634 */ "Z3_Z7_Z11_Z15\000" |
| 2772 | /* 1648 */ "Z12_Z13_Z14_Z15\000" |
| 2773 | /* 1664 */ "Z7_Z15\000" |
| 2774 | /* 1671 */ "B25\000" |
| 2775 | /* 1675 */ "D22_D23_D24_D25\000" |
| 2776 | /* 1691 */ "H25\000" |
| 2777 | /* 1695 */ "Q22_Q23_Q24_Q25\000" |
| 2778 | /* 1711 */ "S25\000" |
| 2779 | /* 1715 */ "W24_W25\000" |
| 2780 | /* 1723 */ "X18_X19_X20_X21_X22_X23_X24_X25\000" |
| 2781 | /* 1755 */ "Z22_Z23_Z24_Z25\000" |
| 2782 | /* 1771 */ "Z17_Z25\000" |
| 2783 | /* 1779 */ "B5\000" |
| 2784 | /* 1782 */ "ZAD5\000" |
| 2785 | /* 1787 */ "D2_D3_D4_D5\000" |
| 2786 | /* 1799 */ "H5\000" |
| 2787 | /* 1802 */ "PN5\000" |
| 2788 | /* 1806 */ "P4_P5\000" |
| 2789 | /* 1812 */ "ZAQ5\000" |
| 2790 | /* 1817 */ "Q2_Q3_Q4_Q5\000" |
| 2791 | /* 1829 */ "S5\000" |
| 2792 | /* 1832 */ "W4_W5\000" |
| 2793 | /* 1838 */ "X4_X5\000" |
| 2794 | /* 1844 */ "Z2_Z3_Z4_Z5\000" |
| 2795 | /* 1856 */ "B16\000" |
| 2796 | /* 1860 */ "D13_D14_D15_D16\000" |
| 2797 | /* 1876 */ "H16\000" |
| 2798 | /* 1880 */ "Q13_Q14_Q15_Q16\000" |
| 2799 | /* 1896 */ "S16\000" |
| 2800 | /* 1900 */ "W16\000" |
| 2801 | /* 1904 */ "X16\000" |
| 2802 | /* 1908 */ "Z13_Z14_Z15_Z16\000" |
| 2803 | /* 1924 */ "B26\000" |
| 2804 | /* 1928 */ "D23_D24_D25_D26\000" |
| 2805 | /* 1944 */ "H26\000" |
| 2806 | /* 1948 */ "Q23_Q24_Q25_Q26\000" |
| 2807 | /* 1964 */ "S26\000" |
| 2808 | /* 1968 */ "W26\000" |
| 2809 | /* 1972 */ "X26\000" |
| 2810 | /* 1976 */ "Z23_Z24_Z25_Z26\000" |
| 2811 | /* 1992 */ "Z18_Z26\000" |
| 2812 | /* 2000 */ "B6\000" |
| 2813 | /* 2003 */ "ZAD6\000" |
| 2814 | /* 2008 */ "D3_D4_D5_D6\000" |
| 2815 | /* 2020 */ "H6\000" |
| 2816 | /* 2023 */ "PN6\000" |
| 2817 | /* 2027 */ "P5_P6\000" |
| 2818 | /* 2033 */ "ZAQ6\000" |
| 2819 | /* 2038 */ "Q3_Q4_Q5_Q6\000" |
| 2820 | /* 2050 */ "S6\000" |
| 2821 | /* 2053 */ "W6\000" |
| 2822 | /* 2056 */ "X6\000" |
| 2823 | /* 2059 */ "Z3_Z4_Z5_Z6\000" |
| 2824 | /* 2071 */ "B17\000" |
| 2825 | /* 2075 */ "D14_D15_D16_D17\000" |
| 2826 | /* 2091 */ "H17\000" |
| 2827 | /* 2095 */ "Q14_Q15_Q16_Q17\000" |
| 2828 | /* 2111 */ "S17\000" |
| 2829 | /* 2115 */ "W16_W17\000" |
| 2830 | /* 2123 */ "X10_X11_X12_X13_X14_X15_X16_X17\000" |
| 2831 | /* 2155 */ "Z14_Z15_Z16_Z17\000" |
| 2832 | /* 2171 */ "B27\000" |
| 2833 | /* 2175 */ "D24_D25_D26_D27\000" |
| 2834 | /* 2191 */ "H27\000" |
| 2835 | /* 2195 */ "Q24_Q25_Q26_Q27\000" |
| 2836 | /* 2211 */ "S27\000" |
| 2837 | /* 2215 */ "W26_W27\000" |
| 2838 | /* 2223 */ "X20_X21_X22_X23_X24_X25_X26_X27\000" |
| 2839 | /* 2255 */ "Z24_Z25_Z26_Z27\000" |
| 2840 | /* 2271 */ "Z19_Z27\000" |
| 2841 | /* 2279 */ "B7\000" |
| 2842 | /* 2282 */ "ZAD7\000" |
| 2843 | /* 2287 */ "D4_D5_D6_D7\000" |
| 2844 | /* 2299 */ "H7\000" |
| 2845 | /* 2302 */ "PN7\000" |
| 2846 | /* 2306 */ "P6_P7\000" |
| 2847 | /* 2312 */ "ZAQ7\000" |
| 2848 | /* 2317 */ "Q4_Q5_Q6_Q7\000" |
| 2849 | /* 2329 */ "S7\000" |
| 2850 | /* 2332 */ "W6_W7\000" |
| 2851 | /* 2338 */ "X0_X1_X2_X3_X4_X5_X6_X7\000" |
| 2852 | /* 2362 */ "Z4_Z5_Z6_Z7\000" |
| 2853 | /* 2374 */ "B18\000" |
| 2854 | /* 2378 */ "D15_D16_D17_D18\000" |
| 2855 | /* 2394 */ "H18\000" |
| 2856 | /* 2398 */ "Q15_Q16_Q17_Q18\000" |
| 2857 | /* 2414 */ "S18\000" |
| 2858 | /* 2418 */ "W18\000" |
| 2859 | /* 2422 */ "X18\000" |
| 2860 | /* 2426 */ "Z15_Z16_Z17_Z18\000" |
| 2861 | /* 2442 */ "B28\000" |
| 2862 | /* 2446 */ "D25_D26_D27_D28\000" |
| 2863 | /* 2462 */ "H28\000" |
| 2864 | /* 2466 */ "Q25_Q26_Q27_Q28\000" |
| 2865 | /* 2482 */ "S28\000" |
| 2866 | /* 2486 */ "W28\000" |
| 2867 | /* 2490 */ "X28\000" |
| 2868 | /* 2494 */ "Z20_Z28\000" |
| 2869 | /* 2502 */ "Z16_Z20_Z24_Z28\000" |
| 2870 | /* 2518 */ "Z25_Z26_Z27_Z28\000" |
| 2871 | /* 2534 */ "B8\000" |
| 2872 | /* 2537 */ "D5_D6_D7_D8\000" |
| 2873 | /* 2549 */ "H8\000" |
| 2874 | /* 2552 */ "PN8\000" |
| 2875 | /* 2556 */ "P7_P8\000" |
| 2876 | /* 2562 */ "ZAQ8\000" |
| 2877 | /* 2567 */ "Q5_Q6_Q7_Q8\000" |
| 2878 | /* 2579 */ "S8\000" |
| 2879 | /* 2582 */ "W8\000" |
| 2880 | /* 2585 */ "X8\000" |
| 2881 | /* 2588 */ "Z0_Z8\000" |
| 2882 | /* 2594 */ "Z5_Z6_Z7_Z8\000" |
| 2883 | /* 2606 */ "B19\000" |
| 2884 | /* 2610 */ "D16_D17_D18_D19\000" |
| 2885 | /* 2626 */ "H19\000" |
| 2886 | /* 2630 */ "Q16_Q17_Q18_Q19\000" |
| 2887 | /* 2646 */ "S19\000" |
| 2888 | /* 2650 */ "W18_W19\000" |
| 2889 | /* 2658 */ "X12_X13_X14_X15_X16_X17_X18_X19\000" |
| 2890 | /* 2690 */ "Z16_Z17_Z18_Z19\000" |
| 2891 | /* 2706 */ "B29\000" |
| 2892 | /* 2710 */ "D26_D27_D28_D29\000" |
| 2893 | /* 2726 */ "H29\000" |
| 2894 | /* 2730 */ "Q26_Q27_Q28_Q29\000" |
| 2895 | /* 2746 */ "S29\000" |
| 2896 | /* 2750 */ "W28_W29\000" |
| 2897 | /* 2758 */ "Z21_Z29\000" |
| 2898 | /* 2766 */ "Z17_Z21_Z25_Z29\000" |
| 2899 | /* 2782 */ "Z26_Z27_Z28_Z29\000" |
| 2900 | /* 2798 */ "B9\000" |
| 2901 | /* 2801 */ "D6_D7_D8_D9\000" |
| 2902 | /* 2813 */ "H9\000" |
| 2903 | /* 2816 */ "PN9\000" |
| 2904 | /* 2820 */ "P8_P9\000" |
| 2905 | /* 2826 */ "ZAQ9\000" |
| 2906 | /* 2831 */ "Q6_Q7_Q8_Q9\000" |
| 2907 | /* 2843 */ "S9\000" |
| 2908 | /* 2846 */ "W8_W9\000" |
| 2909 | /* 2852 */ "X2_X3_X4_X5_X6_X7_X8_X9\000" |
| 2910 | /* 2876 */ "Z1_Z9\000" |
| 2911 | /* 2882 */ "Z6_Z7_Z8_Z9\000" |
| 2912 | /* 2894 */ "ZA\000" |
| 2913 | /* 2897 */ "VG\000" |
| 2914 | /* 2900 */ "B10_HI\000" |
| 2915 | /* 2907 */ "D10_HI\000" |
| 2916 | /* 2914 */ "H10_HI\000" |
| 2917 | /* 2921 */ "Q10_HI\000" |
| 2918 | /* 2928 */ "S10_HI\000" |
| 2919 | /* 2935 */ "W10_HI\000" |
| 2920 | /* 2942 */ "B20_HI\000" |
| 2921 | /* 2949 */ "D20_HI\000" |
| 2922 | /* 2956 */ "H20_HI\000" |
| 2923 | /* 2963 */ "Q20_HI\000" |
| 2924 | /* 2970 */ "S20_HI\000" |
| 2925 | /* 2977 */ "W20_HI\000" |
| 2926 | /* 2984 */ "B30_HI\000" |
| 2927 | /* 2991 */ "D30_HI\000" |
| 2928 | /* 2998 */ "H30_HI\000" |
| 2929 | /* 3005 */ "Q30_HI\000" |
| 2930 | /* 3012 */ "S30_HI\000" |
| 2931 | /* 3019 */ "W30_HI\000" |
| 2932 | /* 3026 */ "B0_HI\000" |
| 2933 | /* 3032 */ "D0_HI\000" |
| 2934 | /* 3038 */ "H0_HI\000" |
| 2935 | /* 3044 */ "Q0_HI\000" |
| 2936 | /* 3050 */ "S0_HI\000" |
| 2937 | /* 3056 */ "W0_HI\000" |
| 2938 | /* 3062 */ "B11_HI\000" |
| 2939 | /* 3069 */ "D11_HI\000" |
| 2940 | /* 3076 */ "H11_HI\000" |
| 2941 | /* 3083 */ "Q11_HI\000" |
| 2942 | /* 3090 */ "S11_HI\000" |
| 2943 | /* 3097 */ "W11_HI\000" |
| 2944 | /* 3104 */ "B21_HI\000" |
| 2945 | /* 3111 */ "D21_HI\000" |
| 2946 | /* 3118 */ "H21_HI\000" |
| 2947 | /* 3125 */ "Q21_HI\000" |
| 2948 | /* 3132 */ "S21_HI\000" |
| 2949 | /* 3139 */ "W21_HI\000" |
| 2950 | /* 3146 */ "B31_HI\000" |
| 2951 | /* 3153 */ "D31_HI\000" |
| 2952 | /* 3160 */ "H31_HI\000" |
| 2953 | /* 3167 */ "Q31_HI\000" |
| 2954 | /* 3174 */ "S31_HI\000" |
| 2955 | /* 3181 */ "B1_HI\000" |
| 2956 | /* 3187 */ "D1_HI\000" |
| 2957 | /* 3193 */ "H1_HI\000" |
| 2958 | /* 3199 */ "Q1_HI\000" |
| 2959 | /* 3205 */ "S1_HI\000" |
| 2960 | /* 3211 */ "W1_HI\000" |
| 2961 | /* 3217 */ "B12_HI\000" |
| 2962 | /* 3224 */ "D12_HI\000" |
| 2963 | /* 3231 */ "H12_HI\000" |
| 2964 | /* 3238 */ "Q12_HI\000" |
| 2965 | /* 3245 */ "S12_HI\000" |
| 2966 | /* 3252 */ "W12_HI\000" |
| 2967 | /* 3259 */ "B22_HI\000" |
| 2968 | /* 3266 */ "D22_HI\000" |
| 2969 | /* 3273 */ "H22_HI\000" |
| 2970 | /* 3280 */ "Q22_HI\000" |
| 2971 | /* 3287 */ "S22_HI\000" |
| 2972 | /* 3294 */ "W22_HI\000" |
| 2973 | /* 3301 */ "B2_HI\000" |
| 2974 | /* 3307 */ "D2_HI\000" |
| 2975 | /* 3313 */ "H2_HI\000" |
| 2976 | /* 3319 */ "Q2_HI\000" |
| 2977 | /* 3325 */ "S2_HI\000" |
| 2978 | /* 3331 */ "W2_HI\000" |
| 2979 | /* 3337 */ "B13_HI\000" |
| 2980 | /* 3344 */ "D13_HI\000" |
| 2981 | /* 3351 */ "H13_HI\000" |
| 2982 | /* 3358 */ "Q13_HI\000" |
| 2983 | /* 3365 */ "S13_HI\000" |
| 2984 | /* 3372 */ "W13_HI\000" |
| 2985 | /* 3379 */ "B23_HI\000" |
| 2986 | /* 3386 */ "D23_HI\000" |
| 2987 | /* 3393 */ "H23_HI\000" |
| 2988 | /* 3400 */ "Q23_HI\000" |
| 2989 | /* 3407 */ "S23_HI\000" |
| 2990 | /* 3414 */ "W23_HI\000" |
| 2991 | /* 3421 */ "B3_HI\000" |
| 2992 | /* 3427 */ "D3_HI\000" |
| 2993 | /* 3433 */ "H3_HI\000" |
| 2994 | /* 3439 */ "Q3_HI\000" |
| 2995 | /* 3445 */ "S3_HI\000" |
| 2996 | /* 3451 */ "W3_HI\000" |
| 2997 | /* 3457 */ "B14_HI\000" |
| 2998 | /* 3464 */ "D14_HI\000" |
| 2999 | /* 3471 */ "H14_HI\000" |
| 3000 | /* 3478 */ "Q14_HI\000" |
| 3001 | /* 3485 */ "S14_HI\000" |
| 3002 | /* 3492 */ "W14_HI\000" |
| 3003 | /* 3499 */ "B24_HI\000" |
| 3004 | /* 3506 */ "D24_HI\000" |
| 3005 | /* 3513 */ "H24_HI\000" |
| 3006 | /* 3520 */ "Q24_HI\000" |
| 3007 | /* 3527 */ "S24_HI\000" |
| 3008 | /* 3534 */ "W24_HI\000" |
| 3009 | /* 3541 */ "B4_HI\000" |
| 3010 | /* 3547 */ "D4_HI\000" |
| 3011 | /* 3553 */ "H4_HI\000" |
| 3012 | /* 3559 */ "Q4_HI\000" |
| 3013 | /* 3565 */ "S4_HI\000" |
| 3014 | /* 3571 */ "W4_HI\000" |
| 3015 | /* 3577 */ "B15_HI\000" |
| 3016 | /* 3584 */ "D15_HI\000" |
| 3017 | /* 3591 */ "H15_HI\000" |
| 3018 | /* 3598 */ "Q15_HI\000" |
| 3019 | /* 3605 */ "S15_HI\000" |
| 3020 | /* 3612 */ "W15_HI\000" |
| 3021 | /* 3619 */ "B25_HI\000" |
| 3022 | /* 3626 */ "D25_HI\000" |
| 3023 | /* 3633 */ "H25_HI\000" |
| 3024 | /* 3640 */ "Q25_HI\000" |
| 3025 | /* 3647 */ "S25_HI\000" |
| 3026 | /* 3654 */ "W25_HI\000" |
| 3027 | /* 3661 */ "B5_HI\000" |
| 3028 | /* 3667 */ "D5_HI\000" |
| 3029 | /* 3673 */ "H5_HI\000" |
| 3030 | /* 3679 */ "Q5_HI\000" |
| 3031 | /* 3685 */ "S5_HI\000" |
| 3032 | /* 3691 */ "W5_HI\000" |
| 3033 | /* 3697 */ "B16_HI\000" |
| 3034 | /* 3704 */ "D16_HI\000" |
| 3035 | /* 3711 */ "H16_HI\000" |
| 3036 | /* 3718 */ "Q16_HI\000" |
| 3037 | /* 3725 */ "S16_HI\000" |
| 3038 | /* 3732 */ "W16_HI\000" |
| 3039 | /* 3739 */ "B26_HI\000" |
| 3040 | /* 3746 */ "D26_HI\000" |
| 3041 | /* 3753 */ "H26_HI\000" |
| 3042 | /* 3760 */ "Q26_HI\000" |
| 3043 | /* 3767 */ "S26_HI\000" |
| 3044 | /* 3774 */ "W26_HI\000" |
| 3045 | /* 3781 */ "B6_HI\000" |
| 3046 | /* 3787 */ "D6_HI\000" |
| 3047 | /* 3793 */ "H6_HI\000" |
| 3048 | /* 3799 */ "Q6_HI\000" |
| 3049 | /* 3805 */ "S6_HI\000" |
| 3050 | /* 3811 */ "W6_HI\000" |
| 3051 | /* 3817 */ "B17_HI\000" |
| 3052 | /* 3824 */ "D17_HI\000" |
| 3053 | /* 3831 */ "H17_HI\000" |
| 3054 | /* 3838 */ "Q17_HI\000" |
| 3055 | /* 3845 */ "S17_HI\000" |
| 3056 | /* 3852 */ "W17_HI\000" |
| 3057 | /* 3859 */ "B27_HI\000" |
| 3058 | /* 3866 */ "D27_HI\000" |
| 3059 | /* 3873 */ "H27_HI\000" |
| 3060 | /* 3880 */ "Q27_HI\000" |
| 3061 | /* 3887 */ "S27_HI\000" |
| 3062 | /* 3894 */ "W27_HI\000" |
| 3063 | /* 3901 */ "B7_HI\000" |
| 3064 | /* 3907 */ "D7_HI\000" |
| 3065 | /* 3913 */ "H7_HI\000" |
| 3066 | /* 3919 */ "Q7_HI\000" |
| 3067 | /* 3925 */ "S7_HI\000" |
| 3068 | /* 3931 */ "W7_HI\000" |
| 3069 | /* 3937 */ "B18_HI\000" |
| 3070 | /* 3944 */ "D18_HI\000" |
| 3071 | /* 3951 */ "H18_HI\000" |
| 3072 | /* 3958 */ "Q18_HI\000" |
| 3073 | /* 3965 */ "S18_HI\000" |
| 3074 | /* 3972 */ "W18_HI\000" |
| 3075 | /* 3979 */ "B28_HI\000" |
| 3076 | /* 3986 */ "D28_HI\000" |
| 3077 | /* 3993 */ "H28_HI\000" |
| 3078 | /* 4000 */ "Q28_HI\000" |
| 3079 | /* 4007 */ "S28_HI\000" |
| 3080 | /* 4014 */ "W28_HI\000" |
| 3081 | /* 4021 */ "B8_HI\000" |
| 3082 | /* 4027 */ "D8_HI\000" |
| 3083 | /* 4033 */ "H8_HI\000" |
| 3084 | /* 4039 */ "Q8_HI\000" |
| 3085 | /* 4045 */ "S8_HI\000" |
| 3086 | /* 4051 */ "W8_HI\000" |
| 3087 | /* 4057 */ "B19_HI\000" |
| 3088 | /* 4064 */ "D19_HI\000" |
| 3089 | /* 4071 */ "H19_HI\000" |
| 3090 | /* 4078 */ "Q19_HI\000" |
| 3091 | /* 4085 */ "S19_HI\000" |
| 3092 | /* 4092 */ "W19_HI\000" |
| 3093 | /* 4099 */ "B29_HI\000" |
| 3094 | /* 4106 */ "D29_HI\000" |
| 3095 | /* 4113 */ "H29_HI\000" |
| 3096 | /* 4120 */ "Q29_HI\000" |
| 3097 | /* 4127 */ "S29_HI\000" |
| 3098 | /* 4134 */ "W29_HI\000" |
| 3099 | /* 4141 */ "B9_HI\000" |
| 3100 | /* 4147 */ "D9_HI\000" |
| 3101 | /* 4153 */ "H9_HI\000" |
| 3102 | /* 4159 */ "Q9_HI\000" |
| 3103 | /* 4165 */ "S9_HI\000" |
| 3104 | /* 4171 */ "W9_HI\000" |
| 3105 | /* 4177 */ "WSP_HI\000" |
| 3106 | /* 4184 */ "WZR_HI\000" |
| 3107 | /* 4191 */ "X22_X23_X24_X25_X26_X27_X28_FP\000" |
| 3108 | /* 4222 */ "WSP\000" |
| 3109 | /* 4226 */ "FPCR\000" |
| 3110 | /* 4231 */ "FFR\000" |
| 3111 | /* 4235 */ "LR\000" |
| 3112 | /* 4238 */ "FPMR\000" |
| 3113 | /* 4243 */ "FPSR\000" |
| 3114 | /* 4248 */ "W30_WZR\000" |
| 3115 | /* 4256 */ "LR_XZR\000" |
| 3116 | /* 4263 */ "NZCV\000" |
| 3117 | }; |
| 3118 | #ifdef __GNUC__ |
| 3119 | #pragma GCC diagnostic pop |
| 3120 | #endif |
| 3121 | |
| 3122 | extern const MCRegisterDesc AArch64RegDesc[] = { // Descriptors |
| 3123 | { 3, 0, 0, 0, 0, 0, 0, 0 }, |
| 3124 | { 4231, 5, 5, 2, 20480, 537, 0, 0 }, |
| 3125 | { 4219, 9402, 816, 21, 4997121, 99, 0, 0 }, |
| 3126 | { 4226, 5, 5, 2, 20483, 537, 0, 0 }, |
| 3127 | { 4238, 5, 5, 2, 20484, 537, 0, 0 }, |
| 3128 | { 4243, 5, 5, 2, 20485, 537, 0, 0 }, |
| 3129 | { 4235, 9399, 9420, 21, 4997126, 99, 0, 0 }, |
| 3130 | { 4263, 5, 5, 2, 20488, 537, 0, 0 }, |
| 3131 | { 4223, 5055, 5, 21, 4997129, 99, 0, 0 }, |
| 3132 | { 2897, 5, 5, 2, 20491, 537, 0, 0 }, |
| 3133 | { 4222, 5, 821, 2, 20489, 537, 0, 0 }, |
| 3134 | { 4177, 5, 819, 2, 20490, 537, 0, 1 }, |
| 3135 | { 4252, 5, 8594, 2, 20492, 537, 1, 0 }, |
| 3136 | { 4184, 5, 9416, 2, 20493, 537, 0, 1 }, |
| 3137 | { 4259, 1331, 9417, 21, 4997132, 99, 1, 0 }, |
| 3138 | { 2894, 6431, 5, 57, 6123534, 179, 0, 0 }, |
| 3139 | { 242, 5, 7298, 2, 20510, 537, 0, 0 }, |
| 3140 | { 629, 5, 7471, 2, 20511, 537, 0, 0 }, |
| 3141 | { 888, 5, 7644, 2, 20512, 537, 0, 0 }, |
| 3142 | { 1199, 5, 8163, 2, 20513, 537, 0, 0 }, |
| 3143 | { 1462, 5, 6738, 2, 20514, 537, 0, 0 }, |
| 3144 | { 1779, 5, 6738, 2, 20515, 537, 0, 0 }, |
| 3145 | { 2000, 5, 6738, 2, 20516, 537, 0, 0 }, |
| 3146 | { 2279, 5, 6738, 2, 20517, 537, 0, 0 }, |
| 3147 | { 2534, 5, 7990, 2, 20518, 537, 0, 0 }, |
| 3148 | { 2798, 5, 7990, 2, 20519, 537, 0, 0 }, |
| 3149 | { 0, 5, 7990, 2, 20520, 537, 0, 0 }, |
| 3150 | { 331, 5, 7990, 2, 20521, 537, 0, 0 }, |
| 3151 | { 716, 5, 6565, 2, 20522, 537, 0, 0 }, |
| 3152 | { 964, 5, 6565, 2, 20523, 537, 0, 0 }, |
| 3153 | { 1278, 5, 6565, 2, 20524, 537, 0, 0 }, |
| 3154 | { 1533, 5, 6565, 2, 20525, 537, 0, 0 }, |
| 3155 | { 1856, 5, 8523, 2, 20526, 537, 0, 0 }, |
| 3156 | { 2071, 5, 8523, 2, 20527, 537, 0, 0 }, |
| 3157 | { 2374, 5, 8523, 2, 20528, 537, 0, 0 }, |
| 3158 | { 2606, 5, 8523, 2, 20529, 537, 0, 0 }, |
| 3159 | { 84, 5, 7817, 2, 20530, 537, 0, 0 }, |
| 3160 | { 445, 5, 7817, 2, 20531, 537, 0, 0 }, |
| 3161 | { 820, 5, 7817, 2, 20532, 537, 0, 0 }, |
| 3162 | { 1099, 5, 7817, 2, 20533, 537, 0, 0 }, |
| 3163 | { 1386, 5, 8350, 2, 20534, 537, 0, 0 }, |
| 3164 | { 1671, 5, 8350, 2, 20535, 537, 0, 0 }, |
| 3165 | { 1924, 5, 8350, 2, 20536, 537, 0, 0 }, |
| 3166 | { 2171, 5, 8350, 2, 20537, 537, 0, 0 }, |
| 3167 | { 2442, 5, 7125, 2, 20538, 537, 0, 0 }, |
| 3168 | { 2706, 5, 7125, 2, 20539, 537, 0, 0 }, |
| 3169 | { 152, 5, 7125, 2, 20540, 537, 0, 0 }, |
| 3170 | { 545, 5, 7125, 2, 20541, 537, 0, 0 }, |
| 3171 | { 247, 8847, 7197, 15, 16388126, 57, 0, 0 }, |
| 3172 | { 634, 8847, 7370, 15, 16404511, 57, 0, 0 }, |
| 3173 | { 893, 8847, 7543, 15, 16420896, 57, 0, 0 }, |
| 3174 | { 1204, 8847, 8062, 15, 16437281, 57, 0, 0 }, |
| 3175 | { 1467, 8847, 6637, 15, 16453666, 57, 0, 0 }, |
| 3176 | { 1784, 8847, 6637, 15, 16470051, 57, 0, 0 }, |
| 3177 | { 2005, 8847, 6637, 15, 16486436, 57, 0, 0 }, |
| 3178 | { 2284, 8847, 6637, 15, 16547877, 57, 0, 0 }, |
| 3179 | { 2546, 8847, 7889, 15, 16609318, 57, 0, 0 }, |
| 3180 | { 2810, 8847, 7889, 15, 16670759, 57, 0, 0 }, |
| 3181 | { 13, 8847, 7889, 15, 16732200, 57, 0, 0 }, |
| 3182 | { 345, 8847, 7889, 15, 16793641, 57, 0, 0 }, |
| 3183 | { 731, 8847, 6464, 15, 16855082, 57, 0, 0 }, |
| 3184 | { 980, 8847, 6464, 15, 16916523, 57, 0, 0 }, |
| 3185 | { 1294, 8847, 6464, 15, 16977964, 57, 0, 0 }, |
| 3186 | { 1549, 8847, 6464, 15, 17039405, 57, 0, 0 }, |
| 3187 | { 1872, 8847, 8422, 15, 17100846, 57, 0, 0 }, |
| 3188 | { 2087, 8847, 8422, 15, 17162287, 57, 0, 0 }, |
| 3189 | { 2390, 8847, 8422, 15, 17223728, 57, 0, 0 }, |
| 3190 | { 2622, 8847, 8422, 15, 17285169, 57, 0, 0 }, |
| 3191 | { 100, 8847, 7716, 15, 17346610, 57, 0, 0 }, |
| 3192 | { 461, 8847, 7716, 15, 17408051, 57, 0, 0 }, |
| 3193 | { 836, 8847, 7716, 15, 17469492, 57, 0, 0 }, |
| 3194 | { 1115, 8847, 7716, 15, 17530933, 57, 0, 0 }, |
| 3195 | { 1402, 8847, 8249, 15, 17592374, 57, 0, 0 }, |
| 3196 | { 1687, 8847, 8249, 15, 17653815, 57, 0, 0 }, |
| 3197 | { 1940, 8847, 8249, 15, 17715256, 57, 0, 0 }, |
| 3198 | { 2187, 8847, 8249, 15, 17842233, 57, 0, 0 }, |
| 3199 | { 2458, 8847, 7024, 15, 17903674, 57, 0, 0 }, |
| 3200 | { 2722, 8847, 7024, 15, 20226107, 57, 0, 0 }, |
| 3201 | { 168, 8847, 7024, 15, 20320316, 57, 0, 0 }, |
| 3202 | { 561, 8847, 7024, 15, 20381757, 57, 0, 0 }, |
| 3203 | { 267, 9405, 7264, 0, 35766302, 0, 0, 0 }, |
| 3204 | { 653, 9405, 7437, 0, 35774495, 0, 0, 0 }, |
| 3205 | { 909, 9405, 7610, 0, 35782688, 0, 0, 0 }, |
| 3206 | { 1219, 9405, 8129, 0, 35790881, 0, 0, 0 }, |
| 3207 | { 1482, 9405, 6704, 0, 35799074, 0, 0, 0 }, |
| 3208 | { 1799, 9405, 6704, 0, 35807267, 0, 0, 0 }, |
| 3209 | { 2020, 9405, 6704, 0, 35815460, 0, 0, 0 }, |
| 3210 | { 2299, 9405, 6704, 0, 35823653, 0, 0, 0 }, |
| 3211 | { 2549, 9405, 7956, 0, 35844134, 0, 0, 0 }, |
| 3212 | { 2813, 9405, 7956, 0, 35864615, 0, 0, 0 }, |
| 3213 | { 17, 9405, 7956, 0, 35885096, 0, 0, 0 }, |
| 3214 | { 349, 9405, 7956, 0, 35905577, 0, 0, 0 }, |
| 3215 | { 735, 9405, 6531, 0, 35926058, 0, 0, 0 }, |
| 3216 | { 984, 9405, 6531, 0, 35946539, 0, 0, 0 }, |
| 3217 | { 1298, 9405, 6531, 0, 35967020, 0, 0, 0 }, |
| 3218 | { 1553, 9405, 6531, 0, 35987501, 0, 0, 0 }, |
| 3219 | { 1876, 9405, 8489, 0, 36081710, 0, 0, 0 }, |
| 3220 | { 2091, 9405, 8489, 0, 36360239, 0, 0, 0 }, |
| 3221 | { 2394, 9405, 8489, 0, 36380720, 0, 0, 0 }, |
| 3222 | { 2626, 9405, 8489, 0, 36401201, 0, 0, 0 }, |
| 3223 | { 104, 9405, 7783, 0, 36421682, 0, 0, 0 }, |
| 3224 | { 465, 9405, 7783, 0, 36442163, 0, 0, 0 }, |
| 3225 | { 840, 9405, 7783, 0, 36462644, 0, 0, 0 }, |
| 3226 | { 1119, 9405, 7783, 0, 36483125, 0, 0, 0 }, |
| 3227 | { 1406, 9405, 8316, 0, 36503606, 0, 0, 0 }, |
| 3228 | { 1691, 9405, 8316, 0, 36524087, 0, 0, 0 }, |
| 3229 | { 1944, 9405, 8316, 0, 36544568, 0, 0, 0 }, |
| 3230 | { 2191, 9405, 8316, 0, 36565049, 0, 0, 0 }, |
| 3231 | { 2462, 9405, 7091, 0, 36585530, 0, 0, 0 }, |
| 3232 | { 2726, 9405, 7091, 0, 36606011, 0, 0, 0 }, |
| 3233 | { 172, 9405, 7091, 0, 37412924, 0, 0, 0 }, |
| 3234 | { 565, 9405, 7091, 0, 37433405, 0, 0, 0 }, |
| 3235 | { 278, 8241, 8235, 14, 20638, 56, 0, 0 }, |
| 3236 | { 663, 8241, 6140, 14, 20639, 56, 0, 0 }, |
| 3237 | { 919, 8241, 6140, 14, 20640, 56, 0, 0 }, |
| 3238 | { 1229, 8241, 6140, 14, 20641, 56, 0, 0 }, |
| 3239 | { 1492, 8241, 6140, 14, 20642, 56, 0, 0 }, |
| 3240 | { 1809, 8241, 6140, 14, 20643, 56, 0, 0 }, |
| 3241 | { 2030, 8241, 6140, 14, 20644, 56, 0, 0 }, |
| 3242 | { 2309, 8241, 6140, 14, 20645, 56, 0, 0 }, |
| 3243 | { 2559, 8241, 6140, 14, 20646, 56, 0, 0 }, |
| 3244 | { 2823, 8241, 6140, 14, 20647, 56, 0, 0 }, |
| 3245 | { 29, 8241, 6140, 14, 20648, 56, 0, 0 }, |
| 3246 | { 362, 8241, 6140, 14, 20649, 56, 0, 0 }, |
| 3247 | { 748, 8241, 6140, 14, 20650, 56, 0, 0 }, |
| 3248 | { 997, 8241, 6140, 14, 20651, 56, 0, 0 }, |
| 3249 | { 1311, 8241, 6140, 14, 20652, 56, 0, 0 }, |
| 3250 | { 1566, 8241, 6140, 14, 20653, 56, 0, 0 }, |
| 3251 | { 270, 5, 8234, 2, 20638, 537, 0, 0 }, |
| 3252 | { 656, 5, 6139, 2, 20639, 537, 0, 0 }, |
| 3253 | { 912, 5, 6139, 2, 20640, 537, 0, 0 }, |
| 3254 | { 1222, 5, 6139, 2, 20641, 537, 0, 0 }, |
| 3255 | { 1485, 5, 6139, 2, 20642, 537, 0, 0 }, |
| 3256 | { 1802, 5, 6139, 2, 20643, 537, 0, 0 }, |
| 3257 | { 2023, 5, 6139, 2, 20644, 537, 0, 0 }, |
| 3258 | { 2302, 5, 6139, 2, 20645, 537, 0, 0 }, |
| 3259 | { 2552, 5, 6139, 2, 20646, 537, 0, 0 }, |
| 3260 | { 2816, 5, 6139, 2, 20647, 537, 0, 0 }, |
| 3261 | { 21, 5, 6139, 2, 20648, 537, 0, 0 }, |
| 3262 | { 353, 5, 6139, 2, 20649, 537, 0, 0 }, |
| 3263 | { 739, 5, 6139, 2, 20650, 537, 0, 0 }, |
| 3264 | { 988, 5, 6139, 2, 20651, 537, 0, 0 }, |
| 3265 | { 1302, 5, 6139, 2, 20652, 537, 0, 0 }, |
| 3266 | { 1557, 5, 6139, 2, 20653, 537, 0, 0 }, |
| 3267 | { 283, 99, 7334, 2, 37584926, 2, 0, 0 }, |
| 3268 | { 668, 99, 7507, 2, 37564447, 2, 0, 0 }, |
| 3269 | { 924, 99, 7680, 2, 37543968, 2, 0, 0 }, |
| 3270 | { 1234, 99, 8199, 2, 37523489, 2, 0, 0 }, |
| 3271 | { 1497, 99, 6774, 2, 37503010, 2, 0, 0 }, |
| 3272 | { 1814, 99, 6774, 2, 37482531, 2, 0, 0 }, |
| 3273 | { 2035, 99, 6774, 2, 37462052, 2, 0, 0 }, |
| 3274 | { 2314, 99, 6774, 2, 37441573, 2, 0, 0 }, |
| 3275 | { 2564, 99, 8026, 2, 37421094, 2, 0, 0 }, |
| 3276 | { 2828, 99, 8026, 2, 37400615, 2, 0, 0 }, |
| 3277 | { 35, 99, 8026, 2, 36593704, 2, 0, 0 }, |
| 3278 | { 368, 99, 8026, 2, 36573225, 2, 0, 0 }, |
| 3279 | { 754, 99, 6601, 2, 36552746, 2, 0, 0 }, |
| 3280 | { 1003, 99, 6601, 2, 36532267, 2, 0, 0 }, |
| 3281 | { 1317, 99, 6601, 2, 36511788, 2, 0, 0 }, |
| 3282 | { 1572, 99, 6601, 2, 36491309, 2, 0, 0 }, |
| 3283 | { 1892, 99, 8559, 2, 36470830, 2, 0, 0 }, |
| 3284 | { 2107, 99, 8559, 2, 36450351, 2, 0, 0 }, |
| 3285 | { 2410, 99, 8559, 2, 36429872, 2, 0, 0 }, |
| 3286 | { 2642, 99, 8559, 2, 36409393, 2, 0, 0 }, |
| 3287 | { 120, 99, 7853, 2, 36388914, 2, 0, 0 }, |
| 3288 | { 481, 99, 7853, 2, 36368435, 2, 0, 0 }, |
| 3289 | { 856, 99, 7853, 2, 36347956, 2, 0, 0 }, |
| 3290 | { 1135, 99, 7853, 2, 36184117, 2, 0, 0 }, |
| 3291 | { 1422, 99, 8386, 2, 35975222, 2, 0, 0 }, |
| 3292 | { 1707, 99, 8386, 2, 35954743, 2, 0, 0 }, |
| 3293 | { 1960, 99, 8386, 2, 35934264, 2, 0, 0 }, |
| 3294 | { 2207, 99, 8386, 2, 35913785, 2, 0, 0 }, |
| 3295 | { 2478, 99, 7161, 2, 35893306, 2, 0, 0 }, |
| 3296 | { 2742, 99, 7161, 2, 35872827, 2, 0, 0 }, |
| 3297 | { 188, 99, 7161, 2, 35852348, 2, 0, 0 }, |
| 3298 | { 581, 99, 7161, 2, 35831869, 2, 0, 0 }, |
| 3299 | { 303, 8869, 7230, 10, 21172254, 52, 0, 0 }, |
| 3300 | { 687, 8869, 7403, 10, 21184543, 52, 0, 0 }, |
| 3301 | { 942, 8869, 7576, 10, 21196832, 52, 0, 0 }, |
| 3302 | { 1251, 8869, 8095, 10, 21209121, 52, 0, 0 }, |
| 3303 | { 1512, 8869, 6670, 10, 21221410, 52, 0, 0 }, |
| 3304 | { 1829, 8869, 6670, 10, 21233699, 52, 0, 0 }, |
| 3305 | { 2050, 8869, 6670, 10, 21245988, 52, 0, 0 }, |
| 3306 | { 2329, 8869, 6670, 10, 21258277, 52, 0, 0 }, |
| 3307 | { 2579, 8869, 7922, 10, 21434406, 52, 0, 0 }, |
| 3308 | { 2843, 8869, 7922, 10, 21622823, 52, 0, 0 }, |
| 3309 | { 52, 8869, 7922, 10, 21676072, 52, 0, 0 }, |
| 3310 | { 386, 8869, 7922, 10, 21729321, 52, 0, 0 }, |
| 3311 | { 773, 8869, 6497, 10, 21782570, 52, 0, 0 }, |
| 3312 | { 1023, 8869, 6497, 10, 21835819, 52, 0, 0 }, |
| 3313 | { 1337, 8869, 6497, 10, 21889068, 52, 0, 0 }, |
| 3314 | { 1592, 8869, 6497, 10, 22040621, 52, 0, 0 }, |
| 3315 | { 1896, 8869, 8455, 10, 22093870, 52, 0, 0 }, |
| 3316 | { 2111, 8869, 8455, 10, 22147119, 52, 0, 0 }, |
| 3317 | { 2414, 8869, 8455, 10, 22200368, 52, 0, 0 }, |
| 3318 | { 2646, 8869, 8455, 10, 22253617, 52, 0, 0 }, |
| 3319 | { 124, 8869, 7749, 10, 22306866, 52, 0, 0 }, |
| 3320 | { 485, 8869, 7749, 10, 22360115, 52, 0, 0 }, |
| 3321 | { 860, 8869, 7749, 10, 22573108, 52, 0, 0 }, |
| 3322 | { 1139, 8869, 7749, 10, 22798389, 52, 0, 0 }, |
| 3323 | { 1426, 8869, 8282, 10, 22851638, 52, 0, 0 }, |
| 3324 | { 1711, 8869, 8282, 10, 22904887, 52, 0, 0 }, |
| 3325 | { 1964, 8869, 8282, 10, 22958136, 52, 0, 0 }, |
| 3326 | { 2211, 8869, 8282, 10, 23011385, 52, 0, 0 }, |
| 3327 | { 2482, 8869, 7057, 10, 23064634, 52, 0, 0 }, |
| 3328 | { 2746, 8869, 7057, 10, 24641595, 52, 0, 0 }, |
| 3329 | { 192, 8869, 7057, 10, 24694844, 52, 0, 0 }, |
| 3330 | { 585, 8869, 7057, 10, 24846397, 52, 0, 0 }, |
| 3331 | { 310, 5, 798, 2, 20686, 537, 0, 0 }, |
| 3332 | { 693, 5, 793, 2, 20687, 537, 0, 0 }, |
| 3333 | { 945, 5, 1315, 2, 20688, 537, 0, 0 }, |
| 3334 | { 1257, 5, 1309, 2, 20689, 537, 0, 0 }, |
| 3335 | { 1515, 5, 1341, 2, 20690, 537, 0, 0 }, |
| 3336 | { 1835, 5, 1334, 2, 20691, 537, 0, 0 }, |
| 3337 | { 2053, 5, 1424, 2, 20692, 537, 0, 0 }, |
| 3338 | { 2335, 5, 1416, 2, 20693, 537, 0, 0 }, |
| 3339 | { 2582, 5, 1416, 2, 20694, 537, 0, 0 }, |
| 3340 | { 2849, 5, 1408, 2, 20695, 537, 0, 0 }, |
| 3341 | { 56, 5, 1408, 2, 20696, 537, 0, 0 }, |
| 3342 | { 394, 5, 1400, 2, 20697, 537, 0, 0 }, |
| 3343 | { 777, 5, 1400, 2, 20698, 537, 0, 0 }, |
| 3344 | { 1031, 5, 1392, 2, 20699, 537, 0, 0 }, |
| 3345 | { 1341, 5, 1392, 2, 20700, 537, 0, 0 }, |
| 3346 | { 1600, 5, 1384, 2, 20701, 537, 0, 0 }, |
| 3347 | { 1900, 5, 1384, 2, 20702, 537, 0, 0 }, |
| 3348 | { 2119, 5, 1376, 2, 20703, 537, 0, 0 }, |
| 3349 | { 2418, 5, 1376, 2, 20704, 537, 0, 0 }, |
| 3350 | { 2654, 5, 1368, 2, 20705, 537, 0, 0 }, |
| 3351 | { 128, 5, 1368, 2, 20706, 537, 0, 0 }, |
| 3352 | { 493, 5, 1360, 2, 20707, 537, 0, 0 }, |
| 3353 | { 864, 5, 3935, 2, 20708, 537, 0, 0 }, |
| 3354 | { 1147, 5, 3927, 2, 20709, 537, 0, 0 }, |
| 3355 | { 1430, 5, 5069, 2, 20710, 537, 0, 0 }, |
| 3356 | { 1719, 5, 5062, 2, 20711, 537, 0, 0 }, |
| 3357 | { 1968, 5, 7007, 2, 20712, 537, 0, 0 }, |
| 3358 | { 2219, 5, 7001, 2, 20713, 537, 0, 0 }, |
| 3359 | { 2486, 5, 783, 2, 20714, 537, 0, 0 }, |
| 3360 | { 2754, 5, 788, 2, 20481, 537, 0, 0 }, |
| 3361 | { 196, 5, 8598, 2, 20486, 537, 0, 0 }, |
| 3362 | { 313, 9396, 812, 21, 35307726, 99, 0, 0 }, |
| 3363 | { 699, 9396, 808, 21, 35307727, 99, 0, 0 }, |
| 3364 | { 948, 9396, 1327, 21, 35307728, 99, 0, 0 }, |
| 3365 | { 1263, 9396, 1322, 21, 35307729, 99, 0, 0 }, |
| 3366 | { 1518, 9396, 1355, 21, 35307730, 99, 0, 0 }, |
| 3367 | { 1841, 9396, 1349, 21, 35307731, 99, 0, 0 }, |
| 3368 | { 2056, 9396, 1489, 21, 35307732, 99, 0, 0 }, |
| 3369 | { 2359, 9396, 1482, 21, 35307733, 99, 0, 0 }, |
| 3370 | { 2585, 9396, 1482, 21, 35307734, 99, 0, 0 }, |
| 3371 | { 2873, 9396, 1475, 21, 35307735, 99, 0, 0 }, |
| 3372 | { 60, 9396, 1475, 21, 35307736, 99, 0, 0 }, |
| 3373 | { 420, 9396, 1468, 21, 35307737, 99, 0, 0 }, |
| 3374 | { 781, 9396, 1468, 21, 35307738, 99, 0, 0 }, |
| 3375 | { 1059, 9396, 1461, 21, 35307739, 99, 0, 0 }, |
| 3376 | { 1345, 9396, 1461, 21, 35307740, 99, 0, 0 }, |
| 3377 | { 1630, 9396, 1454, 21, 35307741, 99, 0, 0 }, |
| 3378 | { 1904, 9396, 1454, 21, 35307742, 99, 0, 0 }, |
| 3379 | { 2151, 9396, 1447, 21, 35307743, 99, 0, 0 }, |
| 3380 | { 2422, 9396, 1447, 21, 35307744, 99, 0, 0 }, |
| 3381 | { 2686, 9396, 1440, 21, 35307745, 99, 0, 0 }, |
| 3382 | { 132, 9396, 1440, 21, 35307746, 99, 0, 0 }, |
| 3383 | { 525, 9396, 1433, 21, 35307747, 99, 0, 0 }, |
| 3384 | { 868, 9396, 3951, 21, 35307748, 99, 0, 0 }, |
| 3385 | { 1179, 9396, 3944, 21, 35307749, 99, 0, 0 }, |
| 3386 | { 1434, 9396, 5083, 21, 35307750, 99, 0, 0 }, |
| 3387 | { 1751, 9396, 5077, 21, 35307751, 99, 0, 0 }, |
| 3388 | { 1972, 9396, 7019, 21, 35307752, 99, 0, 0 }, |
| 3389 | { 2251, 9396, 7014, 21, 35307753, 99, 0, 0 }, |
| 3390 | { 2490, 9396, 804, 21, 35307754, 99, 0, 0 }, |
| 3391 | { 328, 8800, 7357, 27, 37376030, 107, 0, 0 }, |
| 3392 | { 713, 8800, 7530, 27, 37351455, 107, 0, 0 }, |
| 3393 | { 961, 8800, 7703, 27, 37326880, 107, 0, 0 }, |
| 3394 | { 1275, 8800, 8222, 27, 37302305, 107, 0, 0 }, |
| 3395 | { 1530, 8800, 6797, 27, 37277730, 107, 0, 0 }, |
| 3396 | { 1853, 8800, 6797, 27, 37253155, 107, 0, 0 }, |
| 3397 | { 2068, 8800, 6797, 27, 37228580, 107, 0, 0 }, |
| 3398 | { 2371, 8800, 6797, 27, 37204005, 107, 0, 0 }, |
| 3399 | { 2591, 8800, 8049, 27, 37179430, 107, 0, 0 }, |
| 3400 | { 2879, 8800, 8049, 27, 37154855, 107, 0, 0 }, |
| 3401 | { 67, 8800, 8049, 27, 37130280, 107, 0, 0 }, |
| 3402 | { 434, 8800, 8049, 27, 37105705, 107, 0, 0 }, |
| 3403 | { 796, 8800, 6624, 27, 37081130, 107, 0, 0 }, |
| 3404 | { 1075, 8800, 6624, 27, 37056555, 107, 0, 0 }, |
| 3405 | { 1359, 8800, 6624, 27, 37031980, 107, 0, 0 }, |
| 3406 | { 1644, 8800, 6624, 27, 37007405, 107, 0, 0 }, |
| 3407 | { 1920, 8800, 8582, 27, 36982830, 107, 0, 0 }, |
| 3408 | { 2167, 8800, 8582, 27, 36958255, 107, 0, 0 }, |
| 3409 | { 2438, 8800, 8582, 27, 36933680, 107, 0, 0 }, |
| 3410 | { 2702, 8800, 8582, 27, 36909105, 107, 0, 0 }, |
| 3411 | { 148, 8800, 7876, 27, 36884530, 107, 0, 0 }, |
| 3412 | { 541, 8800, 7876, 27, 36859955, 107, 0, 0 }, |
| 3413 | { 884, 8800, 7876, 27, 36835380, 107, 0, 0 }, |
| 3414 | { 1195, 8800, 7876, 27, 36810805, 107, 0, 0 }, |
| 3415 | { 1450, 8800, 8409, 27, 36786230, 107, 0, 0 }, |
| 3416 | { 1767, 8800, 8409, 27, 36761655, 107, 0, 0 }, |
| 3417 | { 1988, 8800, 8409, 27, 36737080, 107, 0, 0 }, |
| 3418 | { 2267, 8800, 8409, 27, 36712505, 107, 0, 0 }, |
| 3419 | { 2498, 8800, 7184, 27, 36687930, 107, 0, 0 }, |
| 3420 | { 2762, 8800, 7184, 27, 36663355, 107, 0, 0 }, |
| 3421 | { 204, 8800, 7184, 27, 36638780, 107, 0, 0 }, |
| 3422 | { 601, 8800, 7184, 27, 36614205, 107, 0, 0 }, |
| 3423 | { 240, 6432, 4, 58, 6123534, 179, 0, 0 }, |
| 3424 | { 245, 6460, 85, 25, 4997134, 105, 0, 0 }, |
| 3425 | { 632, 6460, 37, 25, 4997142, 105, 0, 0 }, |
| 3426 | { 891, 6460, 61, 25, 4997138, 105, 0, 0 }, |
| 3427 | { 1202, 6460, 13, 25, 4997146, 105, 0, 0 }, |
| 3428 | { 1465, 6460, 73, 25, 4997136, 105, 0, 0 }, |
| 3429 | { 1782, 6460, 25, 25, 4997144, 105, 0, 0 }, |
| 3430 | { 2003, 6460, 49, 25, 4997140, 105, 0, 0 }, |
| 3431 | { 2282, 6460, 1, 25, 4997148, 105, 0, 0 }, |
| 3432 | { 265, 6448, 51, 43, 6156302, 171, 0, 0 }, |
| 3433 | { 651, 6448, 3, 43, 6156310, 171, 0, 0 }, |
| 3434 | { 281, 5, 90, 2, 20494, 537, 0, 0 }, |
| 3435 | { 666, 5, 42, 2, 20502, 537, 0, 0 }, |
| 3436 | { 922, 5, 66, 2, 20498, 537, 0, 0 }, |
| 3437 | { 1232, 5, 18, 2, 20506, 537, 0, 0 }, |
| 3438 | { 1495, 5, 78, 2, 20496, 537, 0, 0 }, |
| 3439 | { 1812, 5, 30, 2, 20504, 537, 0, 0 }, |
| 3440 | { 2033, 5, 54, 2, 20500, 537, 0, 0 }, |
| 3441 | { 2312, 5, 6, 2, 20508, 537, 0, 0 }, |
| 3442 | { 2562, 5, 84, 2, 20495, 537, 0, 0 }, |
| 3443 | { 2826, 5, 36, 2, 20503, 537, 0, 0 }, |
| 3444 | { 33, 5, 60, 2, 20499, 537, 0, 0 }, |
| 3445 | { 366, 5, 12, 2, 20507, 537, 0, 0 }, |
| 3446 | { 752, 5, 72, 2, 20497, 537, 0, 0 }, |
| 3447 | { 1001, 5, 24, 2, 20505, 537, 0, 0 }, |
| 3448 | { 1315, 5, 48, 2, 20501, 537, 0, 0 }, |
| 3449 | { 1570, 5, 0, 2, 20509, 537, 0, 0 }, |
| 3450 | { 301, 6456, 74, 37, 5586958, 167, 0, 0 }, |
| 3451 | { 685, 6456, 26, 37, 5586966, 167, 0, 0 }, |
| 3452 | { 940, 6456, 50, 37, 5586962, 167, 0, 0 }, |
| 3453 | { 1249, 6456, 2, 37, 5586970, 167, 0, 0 }, |
| 3454 | { 306, 5, 5, 2, 20776, 537, 0, 0 }, |
| 3455 | { 3026, 5, 7263, 2, 20542, 537, 0, 1 }, |
| 3456 | { 3181, 5, 7436, 2, 20545, 537, 0, 1 }, |
| 3457 | { 3301, 5, 7609, 2, 20548, 537, 0, 1 }, |
| 3458 | { 3421, 5, 8128, 2, 20551, 537, 0, 1 }, |
| 3459 | { 3541, 5, 6703, 2, 20554, 537, 0, 1 }, |
| 3460 | { 3661, 5, 6703, 2, 20557, 537, 0, 1 }, |
| 3461 | { 3781, 5, 6703, 2, 20560, 537, 0, 1 }, |
| 3462 | { 3901, 5, 6703, 2, 20563, 537, 0, 1 }, |
| 3463 | { 4021, 5, 7955, 2, 20566, 537, 0, 1 }, |
| 3464 | { 4141, 5, 7955, 2, 20569, 537, 0, 1 }, |
| 3465 | { 2900, 5, 7955, 2, 20572, 537, 0, 1 }, |
| 3466 | { 3062, 5, 7955, 2, 20575, 537, 0, 1 }, |
| 3467 | { 3217, 5, 6530, 2, 20578, 537, 0, 1 }, |
| 3468 | { 3337, 5, 6530, 2, 20581, 537, 0, 1 }, |
| 3469 | { 3457, 5, 6530, 2, 20584, 537, 0, 1 }, |
| 3470 | { 3577, 5, 6530, 2, 20587, 537, 0, 1 }, |
| 3471 | { 3697, 5, 8488, 2, 20590, 537, 0, 1 }, |
| 3472 | { 3817, 5, 8488, 2, 20593, 537, 0, 1 }, |
| 3473 | { 3937, 5, 8488, 2, 20596, 537, 0, 1 }, |
| 3474 | { 4057, 5, 8488, 2, 20599, 537, 0, 1 }, |
| 3475 | { 2942, 5, 7782, 2, 20602, 537, 0, 1 }, |
| 3476 | { 3104, 5, 7782, 2, 20605, 537, 0, 1 }, |
| 3477 | { 3259, 5, 7782, 2, 20608, 537, 0, 1 }, |
| 3478 | { 3379, 5, 7782, 2, 20611, 537, 0, 1 }, |
| 3479 | { 3499, 5, 8315, 2, 20614, 537, 0, 1 }, |
| 3480 | { 3619, 5, 8315, 2, 20617, 537, 0, 1 }, |
| 3481 | { 3739, 5, 8315, 2, 20620, 537, 0, 1 }, |
| 3482 | { 3859, 5, 8315, 2, 20623, 537, 0, 1 }, |
| 3483 | { 3979, 5, 7090, 2, 20626, 537, 0, 1 }, |
| 3484 | { 4099, 5, 7090, 2, 20629, 537, 0, 1 }, |
| 3485 | { 2984, 5, 7090, 2, 20632, 537, 0, 1 }, |
| 3486 | { 3146, 5, 7090, 2, 20635, 537, 0, 1 }, |
| 3487 | { 3032, 5, 7333, 2, 20654, 537, 0, 1 }, |
| 3488 | { 3187, 5, 7506, 2, 20655, 537, 0, 1 }, |
| 3489 | { 3307, 5, 7679, 2, 20656, 537, 0, 1 }, |
| 3490 | { 3427, 5, 8198, 2, 20657, 537, 0, 1 }, |
| 3491 | { 3547, 5, 6773, 2, 20658, 537, 0, 1 }, |
| 3492 | { 3667, 5, 6773, 2, 20659, 537, 0, 1 }, |
| 3493 | { 3787, 5, 6773, 2, 20660, 537, 0, 1 }, |
| 3494 | { 3907, 5, 6773, 2, 20661, 537, 0, 1 }, |
| 3495 | { 4027, 5, 8025, 2, 20662, 537, 0, 1 }, |
| 3496 | { 4147, 5, 8025, 2, 20663, 537, 0, 1 }, |
| 3497 | { 2907, 5, 8025, 2, 20664, 537, 0, 1 }, |
| 3498 | { 3069, 5, 8025, 2, 20665, 537, 0, 1 }, |
| 3499 | { 3224, 5, 6600, 2, 20666, 537, 0, 1 }, |
| 3500 | { 3344, 5, 6600, 2, 20667, 537, 0, 1 }, |
| 3501 | { 3464, 5, 6600, 2, 20668, 537, 0, 1 }, |
| 3502 | { 3584, 5, 6600, 2, 20669, 537, 0, 1 }, |
| 3503 | { 3704, 5, 8558, 2, 20670, 537, 0, 1 }, |
| 3504 | { 3824, 5, 8558, 2, 20671, 537, 0, 1 }, |
| 3505 | { 3944, 5, 8558, 2, 20672, 537, 0, 1 }, |
| 3506 | { 4064, 5, 8558, 2, 20673, 537, 0, 1 }, |
| 3507 | { 2949, 5, 7852, 2, 20674, 537, 0, 1 }, |
| 3508 | { 3111, 5, 7852, 2, 20675, 537, 0, 1 }, |
| 3509 | { 3266, 5, 7852, 2, 20676, 537, 0, 1 }, |
| 3510 | { 3386, 5, 7852, 2, 20677, 537, 0, 1 }, |
| 3511 | { 3506, 5, 8385, 2, 20678, 537, 0, 1 }, |
| 3512 | { 3626, 5, 8385, 2, 20679, 537, 0, 1 }, |
| 3513 | { 3746, 5, 8385, 2, 20680, 537, 0, 1 }, |
| 3514 | { 3866, 5, 8385, 2, 20681, 537, 0, 1 }, |
| 3515 | { 3986, 5, 7160, 2, 20682, 537, 0, 1 }, |
| 3516 | { 4106, 5, 7160, 2, 20683, 537, 0, 1 }, |
| 3517 | { 2991, 5, 7160, 2, 20684, 537, 0, 1 }, |
| 3518 | { 3153, 5, 7160, 2, 20685, 537, 0, 1 }, |
| 3519 | { 3038, 5, 7229, 2, 20543, 537, 0, 1 }, |
| 3520 | { 3193, 5, 7402, 2, 20546, 537, 0, 1 }, |
| 3521 | { 3313, 5, 7575, 2, 20549, 537, 0, 1 }, |
| 3522 | { 3433, 5, 8094, 2, 20552, 537, 0, 1 }, |
| 3523 | { 3553, 5, 6669, 2, 20555, 537, 0, 1 }, |
| 3524 | { 3673, 5, 6669, 2, 20558, 537, 0, 1 }, |
| 3525 | { 3793, 5, 6669, 2, 20561, 537, 0, 1 }, |
| 3526 | { 3913, 5, 6669, 2, 20564, 537, 0, 1 }, |
| 3527 | { 4033, 5, 7921, 2, 20567, 537, 0, 1 }, |
| 3528 | { 4153, 5, 7921, 2, 20570, 537, 0, 1 }, |
| 3529 | { 2914, 5, 7921, 2, 20573, 537, 0, 1 }, |
| 3530 | { 3076, 5, 7921, 2, 20576, 537, 0, 1 }, |
| 3531 | { 3231, 5, 6496, 2, 20579, 537, 0, 1 }, |
| 3532 | { 3351, 5, 6496, 2, 20582, 537, 0, 1 }, |
| 3533 | { 3471, 5, 6496, 2, 20585, 537, 0, 1 }, |
| 3534 | { 3591, 5, 6496, 2, 20588, 537, 0, 1 }, |
| 3535 | { 3711, 5, 8454, 2, 20591, 537, 0, 1 }, |
| 3536 | { 3831, 5, 8454, 2, 20594, 537, 0, 1 }, |
| 3537 | { 3951, 5, 8454, 2, 20597, 537, 0, 1 }, |
| 3538 | { 4071, 5, 8454, 2, 20600, 537, 0, 1 }, |
| 3539 | { 2956, 5, 7748, 2, 20603, 537, 0, 1 }, |
| 3540 | { 3118, 5, 7748, 2, 20606, 537, 0, 1 }, |
| 3541 | { 3273, 5, 7748, 2, 20609, 537, 0, 1 }, |
| 3542 | { 3393, 5, 7748, 2, 20612, 537, 0, 1 }, |
| 3543 | { 3513, 5, 8281, 2, 20615, 537, 0, 1 }, |
| 3544 | { 3633, 5, 8281, 2, 20618, 537, 0, 1 }, |
| 3545 | { 3753, 5, 8281, 2, 20621, 537, 0, 1 }, |
| 3546 | { 3873, 5, 8281, 2, 20624, 537, 0, 1 }, |
| 3547 | { 3993, 5, 7056, 2, 20627, 537, 0, 1 }, |
| 3548 | { 4113, 5, 7056, 2, 20630, 537, 0, 1 }, |
| 3549 | { 2998, 5, 7056, 2, 20633, 537, 0, 1 }, |
| 3550 | { 3160, 5, 7056, 2, 20636, 537, 0, 1 }, |
| 3551 | { 3044, 5, 7356, 2, 20744, 537, 0, 1 }, |
| 3552 | { 3199, 5, 7529, 2, 20745, 537, 0, 1 }, |
| 3553 | { 3319, 5, 7702, 2, 20746, 537, 0, 1 }, |
| 3554 | { 3439, 5, 8221, 2, 20747, 537, 0, 1 }, |
| 3555 | { 3559, 5, 6796, 2, 20748, 537, 0, 1 }, |
| 3556 | { 3679, 5, 6796, 2, 20749, 537, 0, 1 }, |
| 3557 | { 3799, 5, 6796, 2, 20750, 537, 0, 1 }, |
| 3558 | { 3919, 5, 6796, 2, 20751, 537, 0, 1 }, |
| 3559 | { 4039, 5, 8048, 2, 20752, 537, 0, 1 }, |
| 3560 | { 4159, 5, 8048, 2, 20753, 537, 0, 1 }, |
| 3561 | { 2921, 5, 8048, 2, 20754, 537, 0, 1 }, |
| 3562 | { 3083, 5, 8048, 2, 20755, 537, 0, 1 }, |
| 3563 | { 3238, 5, 6623, 2, 20756, 537, 0, 1 }, |
| 3564 | { 3358, 5, 6623, 2, 20757, 537, 0, 1 }, |
| 3565 | { 3478, 5, 6623, 2, 20758, 537, 0, 1 }, |
| 3566 | { 3598, 5, 6623, 2, 20759, 537, 0, 1 }, |
| 3567 | { 3718, 5, 8581, 2, 20760, 537, 0, 1 }, |
| 3568 | { 3838, 5, 8581, 2, 20761, 537, 0, 1 }, |
| 3569 | { 3958, 5, 8581, 2, 20762, 537, 0, 1 }, |
| 3570 | { 4078, 5, 8581, 2, 20763, 537, 0, 1 }, |
| 3571 | { 2963, 5, 7875, 2, 20764, 537, 0, 1 }, |
| 3572 | { 3125, 5, 7875, 2, 20765, 537, 0, 1 }, |
| 3573 | { 3280, 5, 7875, 2, 20766, 537, 0, 1 }, |
| 3574 | { 3400, 5, 7875, 2, 20767, 537, 0, 1 }, |
| 3575 | { 3520, 5, 8408, 2, 20768, 537, 0, 1 }, |
| 3576 | { 3640, 5, 8408, 2, 20769, 537, 0, 1 }, |
| 3577 | { 3760, 5, 8408, 2, 20770, 537, 0, 1 }, |
| 3578 | { 3880, 5, 8408, 2, 20771, 537, 0, 1 }, |
| 3579 | { 4000, 5, 7183, 2, 20772, 537, 0, 1 }, |
| 3580 | { 4120, 5, 7183, 2, 20773, 537, 0, 1 }, |
| 3581 | { 3005, 5, 7183, 2, 20774, 537, 0, 1 }, |
| 3582 | { 3167, 5, 7183, 2, 20775, 537, 0, 1 }, |
| 3583 | { 3050, 5, 7196, 2, 20544, 537, 0, 1 }, |
| 3584 | { 3205, 5, 7369, 2, 20547, 537, 0, 1 }, |
| 3585 | { 3325, 5, 7542, 2, 20550, 537, 0, 1 }, |
| 3586 | { 3445, 5, 8061, 2, 20553, 537, 0, 1 }, |
| 3587 | { 3565, 5, 6636, 2, 20556, 537, 0, 1 }, |
| 3588 | { 3685, 5, 6636, 2, 20559, 537, 0, 1 }, |
| 3589 | { 3805, 5, 6636, 2, 20562, 537, 0, 1 }, |
| 3590 | { 3925, 5, 6636, 2, 20565, 537, 0, 1 }, |
| 3591 | { 4045, 5, 7888, 2, 20568, 537, 0, 1 }, |
| 3592 | { 4165, 5, 7888, 2, 20571, 537, 0, 1 }, |
| 3593 | { 2928, 5, 7888, 2, 20574, 537, 0, 1 }, |
| 3594 | { 3090, 5, 7888, 2, 20577, 537, 0, 1 }, |
| 3595 | { 3245, 5, 6463, 2, 20580, 537, 0, 1 }, |
| 3596 | { 3365, 5, 6463, 2, 20583, 537, 0, 1 }, |
| 3597 | { 3485, 5, 6463, 2, 20586, 537, 0, 1 }, |
| 3598 | { 3605, 5, 6463, 2, 20589, 537, 0, 1 }, |
| 3599 | { 3725, 5, 8421, 2, 20592, 537, 0, 1 }, |
| 3600 | { 3845, 5, 8421, 2, 20595, 537, 0, 1 }, |
| 3601 | { 3965, 5, 8421, 2, 20598, 537, 0, 1 }, |
| 3602 | { 4085, 5, 8421, 2, 20601, 537, 0, 1 }, |
| 3603 | { 2970, 5, 7715, 2, 20604, 537, 0, 1 }, |
| 3604 | { 3132, 5, 7715, 2, 20607, 537, 0, 1 }, |
| 3605 | { 3287, 5, 7715, 2, 20610, 537, 0, 1 }, |
| 3606 | { 3407, 5, 7715, 2, 20613, 537, 0, 1 }, |
| 3607 | { 3527, 5, 8248, 2, 20616, 537, 0, 1 }, |
| 3608 | { 3647, 5, 8248, 2, 20619, 537, 0, 1 }, |
| 3609 | { 3767, 5, 8248, 2, 20622, 537, 0, 1 }, |
| 3610 | { 3887, 5, 8248, 2, 20625, 537, 0, 1 }, |
| 3611 | { 4007, 5, 7023, 2, 20628, 537, 0, 1 }, |
| 3612 | { 4127, 5, 7023, 2, 20631, 537, 0, 1 }, |
| 3613 | { 3012, 5, 7023, 2, 20634, 537, 0, 1 }, |
| 3614 | { 3174, 5, 7023, 2, 20637, 537, 0, 1 }, |
| 3615 | { 3056, 5, 811, 2, 20715, 537, 0, 1 }, |
| 3616 | { 3211, 5, 807, 2, 20716, 537, 0, 1 }, |
| 3617 | { 3331, 5, 1326, 2, 20717, 537, 0, 1 }, |
| 3618 | { 3451, 5, 1321, 2, 20718, 537, 0, 1 }, |
| 3619 | { 3571, 5, 1354, 2, 20719, 537, 0, 1 }, |
| 3620 | { 3691, 5, 1348, 2, 20720, 537, 0, 1 }, |
| 3621 | { 3811, 5, 1488, 2, 20721, 537, 0, 1 }, |
| 3622 | { 3931, 5, 1481, 2, 20722, 537, 0, 1 }, |
| 3623 | { 4051, 5, 1481, 2, 20723, 537, 0, 1 }, |
| 3624 | { 4171, 5, 1474, 2, 20724, 537, 0, 1 }, |
| 3625 | { 2935, 5, 1474, 2, 20725, 537, 0, 1 }, |
| 3626 | { 3097, 5, 1467, 2, 20726, 537, 0, 1 }, |
| 3627 | { 3252, 5, 1467, 2, 20727, 537, 0, 1 }, |
| 3628 | { 3372, 5, 1460, 2, 20728, 537, 0, 1 }, |
| 3629 | { 3492, 5, 1460, 2, 20729, 537, 0, 1 }, |
| 3630 | { 3612, 5, 1453, 2, 20730, 537, 0, 1 }, |
| 3631 | { 3732, 5, 1453, 2, 20731, 537, 0, 1 }, |
| 3632 | { 3852, 5, 1446, 2, 20732, 537, 0, 1 }, |
| 3633 | { 3972, 5, 1446, 2, 20733, 537, 0, 1 }, |
| 3634 | { 4092, 5, 1439, 2, 20734, 537, 0, 1 }, |
| 3635 | { 2977, 5, 1439, 2, 20735, 537, 0, 1 }, |
| 3636 | { 3139, 5, 1432, 2, 20736, 537, 0, 1 }, |
| 3637 | { 3294, 5, 3950, 2, 20737, 537, 0, 1 }, |
| 3638 | { 3414, 5, 3943, 2, 20738, 537, 0, 1 }, |
| 3639 | { 3534, 5, 5082, 2, 20739, 537, 0, 1 }, |
| 3640 | { 3654, 5, 5076, 2, 20740, 537, 0, 1 }, |
| 3641 | { 3774, 5, 7018, 2, 20741, 537, 0, 1 }, |
| 3642 | { 3894, 5, 7013, 2, 20742, 537, 0, 1 }, |
| 3643 | { 4014, 5, 803, 2, 20743, 537, 0, 1 }, |
| 3644 | { 4134, 5, 815, 2, 20482, 537, 0, 1 }, |
| 3645 | { 3019, 5, 9419, 2, 20487, 537, 0, 1 }, |
| 3646 | { 645, 8854, 1282, 88, 9760798, 195, 0, 0 }, |
| 3647 | { 903, 8854, 8650, 88, 9793567, 195, 0, 0 }, |
| 3648 | { 1213, 8854, 1264, 88, 9826336, 195, 0, 0 }, |
| 3649 | { 1476, 8854, 1264, 88, 9859105, 195, 0, 0 }, |
| 3650 | { 1793, 8854, 1264, 88, 9891874, 195, 0, 0 }, |
| 3651 | { 2014, 8854, 1264, 88, 9924643, 195, 0, 0 }, |
| 3652 | { 2293, 8854, 1264, 88, 9957412, 195, 0, 0 }, |
| 3653 | { 2543, 8854, 1264, 88, 9990181, 195, 0, 0 }, |
| 3654 | { 2807, 8854, 1264, 88, 10022950, 195, 0, 0 }, |
| 3655 | { 10, 8854, 1264, 88, 10055719, 195, 0, 0 }, |
| 3656 | { 341, 8854, 1264, 88, 10088488, 195, 0, 0 }, |
| 3657 | { 727, 8854, 1264, 88, 10121257, 195, 0, 0 }, |
| 3658 | { 976, 8854, 1264, 88, 10154026, 195, 0, 0 }, |
| 3659 | { 1290, 8854, 1264, 88, 10186795, 195, 0, 0 }, |
| 3660 | { 1545, 8854, 1264, 88, 10219564, 195, 0, 0 }, |
| 3661 | { 1868, 8854, 1264, 88, 10252333, 195, 0, 0 }, |
| 3662 | { 2083, 8854, 1264, 88, 10285102, 195, 0, 0 }, |
| 3663 | { 2386, 8854, 1264, 88, 10317871, 195, 0, 0 }, |
| 3664 | { 2618, 8854, 1264, 88, 10350640, 195, 0, 0 }, |
| 3665 | { 96, 8854, 1264, 88, 10383409, 195, 0, 0 }, |
| 3666 | { 457, 8854, 1264, 88, 10416178, 195, 0, 0 }, |
| 3667 | { 832, 8854, 1264, 88, 10448947, 195, 0, 0 }, |
| 3668 | { 1111, 8854, 1264, 88, 10481716, 195, 0, 0 }, |
| 3669 | { 1398, 8854, 1264, 88, 10514485, 195, 0, 0 }, |
| 3670 | { 1683, 8854, 1264, 88, 10547254, 195, 0, 0 }, |
| 3671 | { 1936, 8854, 1264, 88, 10580023, 195, 0, 0 }, |
| 3672 | { 2183, 8854, 1264, 88, 10612792, 195, 0, 0 }, |
| 3673 | { 2454, 8854, 1264, 88, 10678329, 195, 0, 0 }, |
| 3674 | { 2718, 8854, 1264, 88, 10711098, 195, 0, 0 }, |
| 3675 | { 164, 8854, 1264, 88, 10793019, 195, 0, 0 }, |
| 3676 | { 557, 8854, 1264, 88, 10825788, 195, 0, 0 }, |
| 3677 | { 258, 8839, 1264, 88, 20242462, 61, 0, 0 }, |
| 3678 | { 1207, 492, 9231, 151, 6189086, 231, 0, 0 }, |
| 3679 | { 1470, 492, 9231, 151, 6254623, 231, 0, 0 }, |
| 3680 | { 1787, 492, 9231, 151, 6320160, 231, 0, 0 }, |
| 3681 | { 2008, 492, 9231, 151, 6385697, 231, 0, 0 }, |
| 3682 | { 2287, 492, 9231, 151, 6451234, 231, 0, 0 }, |
| 3683 | { 2537, 492, 9231, 151, 6516771, 231, 0, 0 }, |
| 3684 | { 2801, 492, 9231, 151, 6582308, 231, 0, 0 }, |
| 3685 | { 4, 492, 9231, 151, 6647845, 231, 0, 0 }, |
| 3686 | { 335, 492, 9231, 151, 6713382, 231, 0, 0 }, |
| 3687 | { 720, 492, 9231, 151, 6778919, 231, 0, 0 }, |
| 3688 | { 968, 492, 9231, 151, 6844456, 231, 0, 0 }, |
| 3689 | { 1282, 492, 9231, 151, 6909993, 231, 0, 0 }, |
| 3690 | { 1537, 492, 9231, 151, 6975530, 231, 0, 0 }, |
| 3691 | { 1860, 492, 9231, 151, 7041067, 231, 0, 0 }, |
| 3692 | { 2075, 492, 9231, 151, 7106604, 231, 0, 0 }, |
| 3693 | { 2378, 492, 9231, 151, 7172141, 231, 0, 0 }, |
| 3694 | { 2610, 492, 9231, 151, 7237678, 231, 0, 0 }, |
| 3695 | { 88, 492, 9231, 151, 7303215, 231, 0, 0 }, |
| 3696 | { 449, 492, 9231, 151, 7368752, 231, 0, 0 }, |
| 3697 | { 824, 492, 9231, 151, 7434289, 231, 0, 0 }, |
| 3698 | { 1103, 492, 9231, 151, 7499826, 231, 0, 0 }, |
| 3699 | { 1390, 492, 9231, 151, 7565363, 231, 0, 0 }, |
| 3700 | { 1675, 492, 9231, 151, 7630900, 231, 0, 0 }, |
| 3701 | { 1928, 492, 9231, 151, 7696437, 231, 0, 0 }, |
| 3702 | { 2175, 492, 9231, 151, 7761974, 231, 0, 0 }, |
| 3703 | { 2446, 492, 9231, 151, 7827511, 231, 0, 0 }, |
| 3704 | { 2710, 492, 9231, 151, 7893048, 231, 0, 0 }, |
| 3705 | { 156, 492, 9231, 151, 7958585, 231, 0, 0 }, |
| 3706 | { 549, 492, 9231, 151, 8024122, 231, 0, 0 }, |
| 3707 | { 250, 650, 9231, 151, 9465886, 247, 0, 0 }, |
| 3708 | { 637, 218, 9231, 151, 10645534, 203, 0, 0 }, |
| 3709 | { 896, 362, 9231, 151, 17731614, 69, 0, 0 }, |
| 3710 | { 900, 5357, 8701, 128, 8089630, 263, 0, 0 }, |
| 3711 | { 1210, 5357, 1300, 128, 8138783, 263, 0, 0 }, |
| 3712 | { 1473, 5357, 1300, 128, 8187936, 263, 0, 0 }, |
| 3713 | { 1790, 5357, 1300, 128, 8237089, 263, 0, 0 }, |
| 3714 | { 2011, 5357, 1300, 128, 8286242, 263, 0, 0 }, |
| 3715 | { 2290, 5357, 1300, 128, 8335395, 263, 0, 0 }, |
| 3716 | { 2540, 5357, 1300, 128, 8384548, 263, 0, 0 }, |
| 3717 | { 2804, 5357, 1300, 128, 8433701, 263, 0, 0 }, |
| 3718 | { 7, 5357, 1300, 128, 8482854, 263, 0, 0 }, |
| 3719 | { 338, 5357, 1300, 128, 8532007, 263, 0, 0 }, |
| 3720 | { 723, 5357, 1300, 128, 8581160, 263, 0, 0 }, |
| 3721 | { 972, 5357, 1300, 128, 8630313, 263, 0, 0 }, |
| 3722 | { 1286, 5357, 1300, 128, 8679466, 263, 0, 0 }, |
| 3723 | { 1541, 5357, 1300, 128, 8728619, 263, 0, 0 }, |
| 3724 | { 1864, 5357, 1300, 128, 8777772, 263, 0, 0 }, |
| 3725 | { 2079, 5357, 1300, 128, 8826925, 263, 0, 0 }, |
| 3726 | { 2382, 5357, 1300, 128, 8876078, 263, 0, 0 }, |
| 3727 | { 2614, 5357, 1300, 128, 8925231, 263, 0, 0 }, |
| 3728 | { 92, 5357, 1300, 128, 8974384, 263, 0, 0 }, |
| 3729 | { 453, 5357, 1300, 128, 9023537, 263, 0, 0 }, |
| 3730 | { 828, 5357, 1300, 128, 9072690, 263, 0, 0 }, |
| 3731 | { 1107, 5357, 1300, 128, 9121843, 263, 0, 0 }, |
| 3732 | { 1394, 5357, 1300, 128, 9170996, 263, 0, 0 }, |
| 3733 | { 1679, 5357, 1300, 128, 9220149, 263, 0, 0 }, |
| 3734 | { 1932, 5357, 1300, 128, 9269302, 263, 0, 0 }, |
| 3735 | { 2179, 5357, 1300, 128, 9318455, 263, 0, 0 }, |
| 3736 | { 2450, 5357, 1300, 128, 9367608, 263, 0, 0 }, |
| 3737 | { 2714, 5357, 1300, 128, 9416761, 263, 0, 0 }, |
| 3738 | { 160, 5357, 1300, 128, 9531450, 263, 0, 0 }, |
| 3739 | { 553, 5357, 1300, 128, 9580603, 263, 0, 0 }, |
| 3740 | { 254, 6042, 1300, 128, 10743838, 219, 0, 0 }, |
| 3741 | { 641, 759, 1300, 128, 17920030, 85, 0, 0 }, |
| 3742 | { 660, 8243, 5, 102, 4997278, 275, 0, 0 }, |
| 3743 | { 916, 8243, 5, 102, 4997279, 275, 0, 0 }, |
| 3744 | { 1226, 8243, 5, 102, 4997280, 275, 0, 0 }, |
| 3745 | { 1489, 8243, 5, 102, 4997281, 275, 0, 0 }, |
| 3746 | { 1806, 8243, 5, 102, 4997282, 275, 0, 0 }, |
| 3747 | { 2027, 8243, 5, 102, 4997283, 275, 0, 0 }, |
| 3748 | { 2306, 8243, 5, 102, 4997284, 275, 0, 0 }, |
| 3749 | { 2556, 8243, 5, 102, 4997285, 275, 0, 0 }, |
| 3750 | { 2820, 8243, 5, 102, 4997286, 275, 0, 0 }, |
| 3751 | { 26, 8243, 5, 102, 4997287, 275, 0, 0 }, |
| 3752 | { 358, 8243, 5, 102, 4997288, 275, 0, 0 }, |
| 3753 | { 744, 8243, 5, 102, 4997289, 275, 0, 0 }, |
| 3754 | { 993, 8243, 5, 102, 4997290, 275, 0, 0 }, |
| 3755 | { 1307, 8243, 5, 102, 4997291, 275, 0, 0 }, |
| 3756 | { 1562, 8243, 5, 102, 4997292, 275, 0, 0 }, |
| 3757 | { 274, 8238, 5, 102, 33734814, 55, 0, 0 }, |
| 3758 | { 679, 9234, 1288, 184, 25104414, 277, 0, 0 }, |
| 3759 | { 934, 9234, 8656, 184, 25063455, 277, 0, 0 }, |
| 3760 | { 1243, 9234, 1270, 184, 25022496, 277, 0, 0 }, |
| 3761 | { 1506, 9234, 1270, 184, 24981537, 277, 0, 0 }, |
| 3762 | { 1823, 9234, 1270, 184, 24940578, 277, 0, 0 }, |
| 3763 | { 2044, 9234, 1270, 184, 24899619, 277, 0, 0 }, |
| 3764 | { 2323, 9234, 1270, 184, 24858660, 277, 0, 0 }, |
| 3765 | { 2573, 9234, 1270, 184, 24707109, 277, 0, 0 }, |
| 3766 | { 2837, 9234, 1270, 184, 24653862, 277, 0, 0 }, |
| 3767 | { 45, 9234, 1270, 184, 23076903, 277, 0, 0 }, |
| 3768 | { 378, 9234, 1270, 184, 23023656, 277, 0, 0 }, |
| 3769 | { 765, 9234, 1270, 184, 22970409, 277, 0, 0 }, |
| 3770 | { 1015, 9234, 1270, 184, 22917162, 277, 0, 0 }, |
| 3771 | { 1329, 9234, 1270, 184, 22863915, 277, 0, 0 }, |
| 3772 | { 1584, 9234, 1270, 184, 22810668, 277, 0, 0 }, |
| 3773 | { 1888, 9234, 1270, 184, 22757421, 277, 0, 0 }, |
| 3774 | { 2103, 9234, 1270, 184, 22372398, 277, 0, 0 }, |
| 3775 | { 2406, 9234, 1270, 184, 22319151, 277, 0, 0 }, |
| 3776 | { 2638, 9234, 1270, 184, 22265904, 277, 0, 0 }, |
| 3777 | { 116, 9234, 1270, 184, 22212657, 277, 0, 0 }, |
| 3778 | { 477, 9234, 1270, 184, 22159410, 277, 0, 0 }, |
| 3779 | { 852, 9234, 1270, 184, 22106163, 277, 0, 0 }, |
| 3780 | { 1131, 9234, 1270, 184, 22052916, 277, 0, 0 }, |
| 3781 | { 1418, 9234, 1270, 184, 21901365, 277, 0, 0 }, |
| 3782 | { 1703, 9234, 1270, 184, 21848118, 277, 0, 0 }, |
| 3783 | { 1956, 9234, 1270, 184, 21794871, 277, 0, 0 }, |
| 3784 | { 2203, 9234, 1270, 184, 21741624, 277, 0, 0 }, |
| 3785 | { 2474, 9234, 1270, 184, 21688377, 277, 0, 0 }, |
| 3786 | { 2738, 9234, 1270, 184, 21635130, 277, 0, 0 }, |
| 3787 | { 184, 9234, 1270, 184, 21581883, 277, 0, 0 }, |
| 3788 | { 577, 9234, 1270, 184, 21270588, 277, 0, 0 }, |
| 3789 | { 294, 9254, 1270, 184, 35676190, 7, 0, 0 }, |
| 3790 | { 1237, 396, 9232, 235, 16003102, 322, 0, 0 }, |
| 3791 | { 1500, 396, 9232, 235, 15921183, 322, 0, 0 }, |
| 3792 | { 1817, 396, 9232, 235, 15839264, 322, 0, 0 }, |
| 3793 | { 2038, 396, 9232, 235, 15757345, 322, 0, 0 }, |
| 3794 | { 2317, 396, 9232, 235, 15675426, 322, 0, 0 }, |
| 3795 | { 2567, 396, 9232, 235, 15593507, 322, 0, 0 }, |
| 3796 | { 2831, 396, 9232, 235, 15511588, 322, 0, 0 }, |
| 3797 | { 39, 396, 9232, 235, 12578853, 322, 0, 0 }, |
| 3798 | { 372, 396, 9232, 235, 12496934, 322, 0, 0 }, |
| 3799 | { 758, 396, 9232, 235, 12415015, 322, 0, 0 }, |
| 3800 | { 1007, 396, 9232, 235, 12333096, 322, 0, 0 }, |
| 3801 | { 1321, 396, 9232, 235, 12251177, 322, 0, 0 }, |
| 3802 | { 1576, 396, 9232, 235, 12169258, 322, 0, 0 }, |
| 3803 | { 1880, 396, 9232, 235, 12087339, 322, 0, 0 }, |
| 3804 | { 2095, 396, 9232, 235, 12005420, 322, 0, 0 }, |
| 3805 | { 2398, 396, 9232, 235, 11923501, 322, 0, 0 }, |
| 3806 | { 2630, 396, 9232, 235, 11841582, 322, 0, 0 }, |
| 3807 | { 108, 396, 9232, 235, 11759663, 322, 0, 0 }, |
| 3808 | { 469, 396, 9232, 235, 11677744, 322, 0, 0 }, |
| 3809 | { 844, 396, 9232, 235, 11595825, 322, 0, 0 }, |
| 3810 | { 1123, 396, 9232, 235, 11513906, 322, 0, 0 }, |
| 3811 | { 1410, 396, 9232, 235, 11431987, 322, 0, 0 }, |
| 3812 | { 1695, 396, 9232, 235, 11350068, 322, 0, 0 }, |
| 3813 | { 1948, 396, 9232, 235, 11268149, 322, 0, 0 }, |
| 3814 | { 2195, 396, 9232, 235, 11186230, 322, 0, 0 }, |
| 3815 | { 2466, 396, 9232, 235, 11104311, 322, 0, 0 }, |
| 3816 | { 2730, 396, 9232, 235, 11022392, 322, 0, 0 }, |
| 3817 | { 176, 396, 9232, 235, 10940473, 322, 0, 0 }, |
| 3818 | { 569, 396, 9232, 235, 10858554, 322, 0, 0 }, |
| 3819 | { 286, 444, 9232, 235, 16207902, 357, 0, 0 }, |
| 3820 | { 671, 108, 9232, 235, 20856862, 287, 0, 0 }, |
| 3821 | { 927, 252, 9232, 235, 35233822, 17, 0, 0 }, |
| 3822 | { 931, 5203, 8704, 203, 20643870, 342, 0, 0 }, |
| 3823 | { 1240, 5203, 1303, 203, 20582431, 342, 0, 0 }, |
| 3824 | { 1503, 5203, 1303, 203, 20520992, 342, 0, 0 }, |
| 3825 | { 1820, 5203, 1303, 203, 20459553, 342, 0, 0 }, |
| 3826 | { 2041, 5203, 1303, 203, 20398114, 342, 0, 0 }, |
| 3827 | { 2320, 5203, 1303, 203, 20336675, 342, 0, 0 }, |
| 3828 | { 2570, 5203, 1303, 203, 20275236, 342, 0, 0 }, |
| 3829 | { 2834, 5203, 1303, 203, 20181029, 342, 0, 0 }, |
| 3830 | { 42, 5203, 1303, 203, 17858598, 342, 0, 0 }, |
| 3831 | { 375, 5203, 1303, 203, 17797159, 342, 0, 0 }, |
| 3832 | { 761, 5203, 1303, 203, 17670184, 342, 0, 0 }, |
| 3833 | { 1011, 5203, 1303, 203, 17608745, 342, 0, 0 }, |
| 3834 | { 1325, 5203, 1303, 203, 17547306, 342, 0, 0 }, |
| 3835 | { 1580, 5203, 1303, 203, 17485867, 342, 0, 0 }, |
| 3836 | { 1884, 5203, 1303, 203, 17424428, 342, 0, 0 }, |
| 3837 | { 2099, 5203, 1303, 203, 17362989, 342, 0, 0 }, |
| 3838 | { 2402, 5203, 1303, 203, 17301550, 342, 0, 0 }, |
| 3839 | { 2634, 5203, 1303, 203, 17240111, 342, 0, 0 }, |
| 3840 | { 112, 5203, 1303, 203, 17178672, 342, 0, 0 }, |
| 3841 | { 473, 5203, 1303, 203, 17117233, 342, 0, 0 }, |
| 3842 | { 848, 5203, 1303, 203, 17055794, 342, 0, 0 }, |
| 3843 | { 1127, 5203, 1303, 203, 16994355, 342, 0, 0 }, |
| 3844 | { 1414, 5203, 1303, 203, 16932916, 342, 0, 0 }, |
| 3845 | { 1699, 5203, 1303, 203, 16871477, 342, 0, 0 }, |
| 3846 | { 1952, 5203, 1303, 203, 16810038, 342, 0, 0 }, |
| 3847 | { 2199, 5203, 1303, 203, 16748599, 342, 0, 0 }, |
| 3848 | { 2470, 5203, 1303, 203, 16687160, 342, 0, 0 }, |
| 3849 | { 2734, 5203, 1303, 203, 16625721, 342, 0, 0 }, |
| 3850 | { 180, 5203, 1303, 203, 16564282, 342, 0, 0 }, |
| 3851 | { 573, 5203, 1303, 203, 16502843, 342, 0, 0 }, |
| 3852 | { 290, 5236, 1303, 203, 21037086, 307, 0, 0 }, |
| 3853 | { 675, 684, 1303, 203, 35504158, 37, 0, 0 }, |
| 3854 | { 4191, 1186, 5, 282, 9695233, 393, 0, 0 }, |
| 3855 | { 2338, 1153, 5, 282, 9629902, 377, 0, 0 }, |
| 3856 | { 2852, 1120, 5, 282, 9629904, 377, 0, 0 }, |
| 3857 | { 398, 1087, 5, 282, 9629906, 377, 0, 0 }, |
| 3858 | { 1035, 1054, 5, 282, 9629908, 377, 0, 0 }, |
| 3859 | { 1604, 1021, 5, 282, 9629910, 377, 0, 0 }, |
| 3860 | { 2123, 988, 5, 282, 9629912, 377, 0, 0 }, |
| 3861 | { 2658, 955, 5, 282, 9629914, 377, 0, 0 }, |
| 3862 | { 497, 922, 5, 282, 9629916, 377, 0, 0 }, |
| 3863 | { 1151, 889, 5, 282, 9629918, 377, 0, 0 }, |
| 3864 | { 1723, 856, 5, 282, 9629920, 377, 0, 0 }, |
| 3865 | { 2223, 823, 5, 282, 9629922, 377, 0, 0 }, |
| 3866 | { 4248, 96, 8241, 23, 26333190, 103, 0, 0 }, |
| 3867 | { 690, 1219, 795, 23, 4997326, 103, 0, 0 }, |
| 3868 | { 1254, 1222, 1311, 23, 4997328, 103, 0, 0 }, |
| 3869 | { 1832, 1225, 1336, 23, 4997330, 103, 0, 0 }, |
| 3870 | { 2332, 1228, 1362, 23, 4997332, 103, 0, 0 }, |
| 3871 | { 2846, 1231, 1362, 23, 4997334, 103, 0, 0 }, |
| 3872 | { 390, 1234, 1362, 23, 4997336, 103, 0, 0 }, |
| 3873 | { 1027, 1237, 1362, 23, 4997338, 103, 0, 0 }, |
| 3874 | { 1596, 1240, 1362, 23, 4997340, 103, 0, 0 }, |
| 3875 | { 2115, 1243, 1362, 23, 4997342, 103, 0, 0 }, |
| 3876 | { 2650, 1246, 1362, 23, 4997344, 103, 0, 0 }, |
| 3877 | { 489, 1249, 1362, 23, 4997346, 103, 0, 0 }, |
| 3878 | { 1143, 1252, 3929, 23, 4997348, 103, 0, 0 }, |
| 3879 | { 1715, 1255, 5064, 23, 4997350, 103, 0, 0 }, |
| 3880 | { 2215, 1258, 7003, 23, 4997352, 103, 0, 0 }, |
| 3881 | { 2750, 1261, 785, 23, 37986305, 101, 0, 0 }, |
| 3882 | { 4256, 9408, 5, 314, 20717574, 413, 0, 0 }, |
| 3883 | { 4215, 9276, 786, 314, 35414017, 97, 0, 0 }, |
| 3884 | { 696, 9388, 786, 314, 20840654, 409, 0, 0 }, |
| 3885 | { 1260, 9380, 1312, 314, 20840656, 409, 0, 0 }, |
| 3886 | { 1838, 9372, 1337, 314, 20840658, 409, 0, 0 }, |
| 3887 | { 2356, 9364, 1363, 314, 20840660, 409, 0, 0 }, |
| 3888 | { 2870, 9356, 1363, 314, 20840662, 409, 0, 0 }, |
| 3889 | { 416, 9348, 1363, 314, 20840664, 409, 0, 0 }, |
| 3890 | { 1055, 9340, 1363, 314, 20840666, 409, 0, 0 }, |
| 3891 | { 1626, 9332, 1363, 314, 20840668, 409, 0, 0 }, |
| 3892 | { 2147, 9324, 1363, 314, 20840670, 409, 0, 0 }, |
| 3893 | { 2682, 9316, 1363, 314, 20840672, 409, 0, 0 }, |
| 3894 | { 521, 9308, 1363, 314, 20840674, 409, 0, 0 }, |
| 3895 | { 1175, 9300, 3930, 314, 20840676, 409, 0, 0 }, |
| 3896 | { 1747, 9292, 5065, 314, 20840678, 409, 0, 0 }, |
| 3897 | { 2247, 9284, 7004, 314, 20840680, 409, 0, 0 }, |
| 3898 | { 710, 9181, 1294, 321, 24592414, 417, 0, 0 }, |
| 3899 | { 958, 9181, 8662, 321, 24543263, 417, 0, 0 }, |
| 3900 | { 1272, 9181, 1276, 321, 24494112, 417, 0, 0 }, |
| 3901 | { 1527, 9181, 1276, 321, 24444961, 417, 0, 0 }, |
| 3902 | { 1850, 9181, 1276, 321, 24395810, 417, 0, 0 }, |
| 3903 | { 2065, 9181, 1276, 321, 24346659, 417, 0, 0 }, |
| 3904 | { 2368, 9181, 1276, 321, 24297508, 417, 0, 0 }, |
| 3905 | { 2600, 9181, 1276, 321, 24248357, 417, 0, 0 }, |
| 3906 | { 2888, 9181, 1276, 321, 24199206, 417, 0, 0 }, |
| 3907 | { 77, 9181, 1276, 321, 24150055, 417, 0, 0 }, |
| 3908 | { 430, 9181, 1276, 321, 24100904, 417, 0, 0 }, |
| 3909 | { 792, 9181, 1276, 321, 24051753, 417, 0, 0 }, |
| 3910 | { 1071, 9181, 1276, 321, 24002602, 417, 0, 0 }, |
| 3911 | { 1371, 9181, 1276, 321, 23953451, 417, 0, 0 }, |
| 3912 | { 1656, 9181, 1276, 321, 23904300, 417, 0, 0 }, |
| 3913 | { 1916, 9181, 1276, 321, 23855149, 417, 0, 0 }, |
| 3914 | { 2163, 9181, 1276, 321, 23805998, 417, 0, 0 }, |
| 3915 | { 2434, 9181, 1276, 321, 23756847, 417, 0, 0 }, |
| 3916 | { 2698, 9181, 1276, 321, 23707696, 417, 0, 0 }, |
| 3917 | { 144, 9181, 1276, 321, 23658545, 417, 0, 0 }, |
| 3918 | { 537, 9181, 1276, 321, 23609394, 417, 0, 0 }, |
| 3919 | { 880, 9181, 1276, 321, 23560243, 417, 0, 0 }, |
| 3920 | { 1191, 9181, 1276, 321, 23511092, 417, 0, 0 }, |
| 3921 | { 1446, 9181, 1276, 321, 23461941, 417, 0, 0 }, |
| 3922 | { 1763, 9181, 1276, 321, 23412790, 417, 0, 0 }, |
| 3923 | { 1984, 9181, 1276, 321, 23363639, 417, 0, 0 }, |
| 3924 | { 2263, 9181, 1276, 321, 23314488, 417, 0, 0 }, |
| 3925 | { 2526, 9181, 1276, 321, 23265337, 417, 0, 0 }, |
| 3926 | { 2790, 9181, 1276, 321, 23216186, 417, 0, 0 }, |
| 3927 | { 232, 9181, 1276, 321, 23167035, 417, 0, 0 }, |
| 3928 | { 597, 9181, 1276, 321, 23117884, 417, 0, 0 }, |
| 3929 | { 324, 9206, 1276, 321, 35717150, 113, 0, 0 }, |
| 3930 | { 1266, 526, 5, 386, 15413278, 471, 0, 0 }, |
| 3931 | { 1521, 526, 5, 386, 15314975, 471, 0, 0 }, |
| 3932 | { 1844, 526, 5, 386, 15216672, 471, 0, 0 }, |
| 3933 | { 2059, 526, 5, 386, 15118369, 471, 0, 0 }, |
| 3934 | { 2362, 526, 5, 386, 15020066, 471, 0, 0 }, |
| 3935 | { 2594, 526, 5, 386, 14921763, 471, 0, 0 }, |
| 3936 | { 2882, 526, 5, 386, 14823460, 471, 0, 0 }, |
| 3937 | { 71, 526, 5, 386, 14725157, 471, 0, 0 }, |
| 3938 | { 424, 526, 5, 386, 14626854, 471, 0, 0 }, |
| 3939 | { 785, 526, 5, 386, 14528551, 471, 0, 0 }, |
| 3940 | { 1063, 526, 5, 386, 14430248, 471, 0, 0 }, |
| 3941 | { 1363, 526, 5, 386, 14331945, 471, 0, 0 }, |
| 3942 | { 1648, 526, 5, 386, 14233642, 471, 0, 0 }, |
| 3943 | { 1908, 526, 5, 386, 14135339, 471, 0, 0 }, |
| 3944 | { 2155, 526, 5, 386, 14037036, 471, 0, 0 }, |
| 3945 | { 2426, 526, 5, 386, 13938733, 471, 0, 0 }, |
| 3946 | { 2690, 526, 5, 386, 13840430, 471, 0, 0 }, |
| 3947 | { 136, 526, 5, 386, 13742127, 471, 0, 0 }, |
| 3948 | { 529, 526, 5, 386, 13643824, 471, 0, 0 }, |
| 3949 | { 872, 526, 5, 386, 13545521, 471, 0, 0 }, |
| 3950 | { 1183, 526, 5, 386, 13447218, 471, 0, 0 }, |
| 3951 | { 1438, 526, 5, 386, 13348915, 471, 0, 0 }, |
| 3952 | { 1755, 526, 5, 386, 13250612, 471, 0, 0 }, |
| 3953 | { 1976, 526, 5, 386, 13152309, 471, 0, 0 }, |
| 3954 | { 2255, 526, 5, 386, 13054006, 471, 0, 0 }, |
| 3955 | { 2518, 526, 5, 386, 12955703, 471, 0, 0 }, |
| 3956 | { 2782, 526, 5, 386, 12857400, 471, 0, 0 }, |
| 3957 | { 224, 526, 5, 386, 12759097, 471, 0, 0 }, |
| 3958 | { 589, 526, 5, 386, 12660794, 471, 0, 0 }, |
| 3959 | { 316, 588, 5, 386, 16289822, 513, 0, 0 }, |
| 3960 | { 702, 156, 5, 386, 20938782, 429, 0, 0 }, |
| 3961 | { 951, 300, 5, 386, 35315742, 125, 0, 0 }, |
| 3962 | { 955, 5472, 8707, 345, 20107294, 495, 0, 0 }, |
| 3963 | { 1269, 5472, 1279, 345, 20033567, 495, 0, 0 }, |
| 3964 | { 1524, 5472, 1279, 345, 19959840, 495, 0, 0 }, |
| 3965 | { 1847, 5472, 1279, 345, 19886113, 495, 0, 0 }, |
| 3966 | { 2062, 5472, 1279, 345, 19812386, 495, 0, 0 }, |
| 3967 | { 2365, 5472, 1279, 345, 19738659, 495, 0, 0 }, |
| 3968 | { 2597, 5472, 1279, 345, 19664932, 495, 0, 0 }, |
| 3969 | { 2885, 5472, 1279, 345, 19591205, 495, 0, 0 }, |
| 3970 | { 74, 5472, 1279, 345, 19517478, 495, 0, 0 }, |
| 3971 | { 427, 5472, 1279, 345, 19443751, 495, 0, 0 }, |
| 3972 | { 788, 5472, 1279, 345, 19370024, 495, 0, 0 }, |
| 3973 | { 1067, 5472, 1279, 345, 19296297, 495, 0, 0 }, |
| 3974 | { 1367, 5472, 1279, 345, 19222570, 495, 0, 0 }, |
| 3975 | { 1652, 5472, 1279, 345, 19148843, 495, 0, 0 }, |
| 3976 | { 1912, 5472, 1279, 345, 19075116, 495, 0, 0 }, |
| 3977 | { 2159, 5472, 1279, 345, 19001389, 495, 0, 0 }, |
| 3978 | { 2430, 5472, 1279, 345, 18927662, 495, 0, 0 }, |
| 3979 | { 2694, 5472, 1279, 345, 18853935, 495, 0, 0 }, |
| 3980 | { 140, 5472, 1279, 345, 18780208, 495, 0, 0 }, |
| 3981 | { 533, 5472, 1279, 345, 18706481, 495, 0, 0 }, |
| 3982 | { 876, 5472, 1279, 345, 18632754, 495, 0, 0 }, |
| 3983 | { 1187, 5472, 1279, 345, 18559027, 495, 0, 0 }, |
| 3984 | { 1442, 5472, 1279, 345, 18485300, 495, 0, 0 }, |
| 3985 | { 1759, 5472, 1279, 345, 18411573, 495, 0, 0 }, |
| 3986 | { 1980, 5472, 1279, 345, 18337846, 495, 0, 0 }, |
| 3987 | { 2259, 5472, 1279, 345, 18264119, 495, 0, 0 }, |
| 3988 | { 2522, 5472, 1279, 345, 18190392, 495, 0, 0 }, |
| 3989 | { 2786, 5472, 1279, 345, 18116665, 495, 0, 0 }, |
| 3990 | { 228, 5472, 1279, 345, 18042938, 495, 0, 0 }, |
| 3991 | { 593, 5472, 1279, 345, 17969211, 495, 0, 0 }, |
| 3992 | { 320, 5514, 1279, 345, 21098526, 453, 0, 0 }, |
| 3993 | { 706, 717, 1279, 345, 35565598, 149, 0, 0 }, |
| 3994 | { 1454, 8811, 8241, 106, 28233774, 417, 0, 0 }, |
| 3995 | { 1771, 8811, 8241, 106, 28184623, 417, 0, 0 }, |
| 3996 | { 1992, 8811, 8241, 106, 28135472, 417, 0, 0 }, |
| 3997 | { 2271, 8811, 8241, 106, 28086321, 417, 0, 0 }, |
| 3998 | { 2494, 8811, 7054, 106, 28037170, 417, 0, 0 }, |
| 3999 | { 2758, 8811, 7054, 106, 27988019, 417, 0, 0 }, |
| 4000 | { 200, 8811, 7054, 106, 27938868, 417, 0, 0 }, |
| 4001 | { 605, 8811, 7054, 106, 27889717, 417, 0, 0 }, |
| 4002 | { 2588, 8788, 7054, 106, 28626974, 417, 0, 0 }, |
| 4003 | { 2876, 8788, 7054, 106, 28577823, 417, 0, 0 }, |
| 4004 | { 64, 8788, 7054, 106, 28528672, 417, 0, 0 }, |
| 4005 | { 438, 8788, 7054, 106, 28479521, 417, 0, 0 }, |
| 4006 | { 800, 8788, 6461, 106, 28430370, 417, 0, 0 }, |
| 4007 | { 1079, 8788, 6461, 106, 28381219, 417, 0, 0 }, |
| 4008 | { 1379, 8788, 6461, 106, 28332068, 417, 0, 0 }, |
| 4009 | { 1664, 8788, 6461, 106, 28282917, 417, 0, 0 }, |
| 4010 | { 2502, 6335, 5, 447, 25456686, 471, 0, 0 }, |
| 4011 | { 2766, 6335, 5, 447, 25358383, 471, 0, 0 }, |
| 4012 | { 208, 6335, 5, 447, 25260080, 471, 0, 0 }, |
| 4013 | { 613, 6335, 5, 447, 25161777, 471, 0, 0 }, |
| 4014 | { 807, 6382, 5, 447, 25849886, 471, 0, 0 }, |
| 4015 | { 1086, 6382, 5, 447, 25751583, 471, 0, 0 }, |
| 4016 | { 1349, 6382, 5, 447, 25653280, 471, 0, 0 }, |
| 4017 | { 1634, 6382, 5, 447, 25554977, 471, 0, 0 }, |
| 4018 | }; |
| 4019 | |
| 4020 | extern const MCPhysReg AArch64RegUnitRoots[][2] = { |
| 4021 | { AArch64::FFR }, |
| 4022 | { AArch64::W29 }, |
| 4023 | { AArch64::W29_HI }, |
| 4024 | { AArch64::FPCR }, |
| 4025 | { AArch64::FPMR }, |
| 4026 | { AArch64::FPSR }, |
| 4027 | { AArch64::W30 }, |
| 4028 | { AArch64::W30_HI }, |
| 4029 | { AArch64::NZCV }, |
| 4030 | { AArch64::WSP }, |
| 4031 | { AArch64::WSP_HI }, |
| 4032 | { AArch64::VG }, |
| 4033 | { AArch64::WZR }, |
| 4034 | { AArch64::WZR_HI }, |
| 4035 | { AArch64::ZAQ0 }, |
| 4036 | { AArch64::ZAQ8 }, |
| 4037 | { AArch64::ZAQ4 }, |
| 4038 | { AArch64::ZAQ12 }, |
| 4039 | { AArch64::ZAQ2 }, |
| 4040 | { AArch64::ZAQ10 }, |
| 4041 | { AArch64::ZAQ6 }, |
| 4042 | { AArch64::ZAQ14 }, |
| 4043 | { AArch64::ZAQ1 }, |
| 4044 | { AArch64::ZAQ9 }, |
| 4045 | { AArch64::ZAQ5 }, |
| 4046 | { AArch64::ZAQ13 }, |
| 4047 | { AArch64::ZAQ3 }, |
| 4048 | { AArch64::ZAQ11 }, |
| 4049 | { AArch64::ZAQ7 }, |
| 4050 | { AArch64::ZAQ15 }, |
| 4051 | { AArch64::B0 }, |
| 4052 | { AArch64::B1 }, |
| 4053 | { AArch64::B2 }, |
| 4054 | { AArch64::B3 }, |
| 4055 | { AArch64::B4 }, |
| 4056 | { AArch64::B5 }, |
| 4057 | { AArch64::B6 }, |
| 4058 | { AArch64::B7 }, |
| 4059 | { AArch64::B8 }, |
| 4060 | { AArch64::B9 }, |
| 4061 | { AArch64::B10 }, |
| 4062 | { AArch64::B11 }, |
| 4063 | { AArch64::B12 }, |
| 4064 | { AArch64::B13 }, |
| 4065 | { AArch64::B14 }, |
| 4066 | { AArch64::B15 }, |
| 4067 | { AArch64::B16 }, |
| 4068 | { AArch64::B17 }, |
| 4069 | { AArch64::B18 }, |
| 4070 | { AArch64::B19 }, |
| 4071 | { AArch64::B20 }, |
| 4072 | { AArch64::B21 }, |
| 4073 | { AArch64::B22 }, |
| 4074 | { AArch64::B23 }, |
| 4075 | { AArch64::B24 }, |
| 4076 | { AArch64::B25 }, |
| 4077 | { AArch64::B26 }, |
| 4078 | { AArch64::B27 }, |
| 4079 | { AArch64::B28 }, |
| 4080 | { AArch64::B29 }, |
| 4081 | { AArch64::B30 }, |
| 4082 | { AArch64::B31 }, |
| 4083 | { AArch64::B0_HI }, |
| 4084 | { AArch64::H0_HI }, |
| 4085 | { AArch64::S0_HI }, |
| 4086 | { AArch64::B1_HI }, |
| 4087 | { AArch64::H1_HI }, |
| 4088 | { AArch64::S1_HI }, |
| 4089 | { AArch64::B2_HI }, |
| 4090 | { AArch64::H2_HI }, |
| 4091 | { AArch64::S2_HI }, |
| 4092 | { AArch64::B3_HI }, |
| 4093 | { AArch64::H3_HI }, |
| 4094 | { AArch64::S3_HI }, |
| 4095 | { AArch64::B4_HI }, |
| 4096 | { AArch64::H4_HI }, |
| 4097 | { AArch64::S4_HI }, |
| 4098 | { AArch64::B5_HI }, |
| 4099 | { AArch64::H5_HI }, |
| 4100 | { AArch64::S5_HI }, |
| 4101 | { AArch64::B6_HI }, |
| 4102 | { AArch64::H6_HI }, |
| 4103 | { AArch64::S6_HI }, |
| 4104 | { AArch64::B7_HI }, |
| 4105 | { AArch64::H7_HI }, |
| 4106 | { AArch64::S7_HI }, |
| 4107 | { AArch64::B8_HI }, |
| 4108 | { AArch64::H8_HI }, |
| 4109 | { AArch64::S8_HI }, |
| 4110 | { AArch64::B9_HI }, |
| 4111 | { AArch64::H9_HI }, |
| 4112 | { AArch64::S9_HI }, |
| 4113 | { AArch64::B10_HI }, |
| 4114 | { AArch64::H10_HI }, |
| 4115 | { AArch64::S10_HI }, |
| 4116 | { AArch64::B11_HI }, |
| 4117 | { AArch64::H11_HI }, |
| 4118 | { AArch64::S11_HI }, |
| 4119 | { AArch64::B12_HI }, |
| 4120 | { AArch64::H12_HI }, |
| 4121 | { AArch64::S12_HI }, |
| 4122 | { AArch64::B13_HI }, |
| 4123 | { AArch64::H13_HI }, |
| 4124 | { AArch64::S13_HI }, |
| 4125 | { AArch64::B14_HI }, |
| 4126 | { AArch64::H14_HI }, |
| 4127 | { AArch64::S14_HI }, |
| 4128 | { AArch64::B15_HI }, |
| 4129 | { AArch64::H15_HI }, |
| 4130 | { AArch64::S15_HI }, |
| 4131 | { AArch64::B16_HI }, |
| 4132 | { AArch64::H16_HI }, |
| 4133 | { AArch64::S16_HI }, |
| 4134 | { AArch64::B17_HI }, |
| 4135 | { AArch64::H17_HI }, |
| 4136 | { AArch64::S17_HI }, |
| 4137 | { AArch64::B18_HI }, |
| 4138 | { AArch64::H18_HI }, |
| 4139 | { AArch64::S18_HI }, |
| 4140 | { AArch64::B19_HI }, |
| 4141 | { AArch64::H19_HI }, |
| 4142 | { AArch64::S19_HI }, |
| 4143 | { AArch64::B20_HI }, |
| 4144 | { AArch64::H20_HI }, |
| 4145 | { AArch64::S20_HI }, |
| 4146 | { AArch64::B21_HI }, |
| 4147 | { AArch64::H21_HI }, |
| 4148 | { AArch64::S21_HI }, |
| 4149 | { AArch64::B22_HI }, |
| 4150 | { AArch64::H22_HI }, |
| 4151 | { AArch64::S22_HI }, |
| 4152 | { AArch64::B23_HI }, |
| 4153 | { AArch64::H23_HI }, |
| 4154 | { AArch64::S23_HI }, |
| 4155 | { AArch64::B24_HI }, |
| 4156 | { AArch64::H24_HI }, |
| 4157 | { AArch64::S24_HI }, |
| 4158 | { AArch64::B25_HI }, |
| 4159 | { AArch64::H25_HI }, |
| 4160 | { AArch64::S25_HI }, |
| 4161 | { AArch64::B26_HI }, |
| 4162 | { AArch64::H26_HI }, |
| 4163 | { AArch64::S26_HI }, |
| 4164 | { AArch64::B27_HI }, |
| 4165 | { AArch64::H27_HI }, |
| 4166 | { AArch64::S27_HI }, |
| 4167 | { AArch64::B28_HI }, |
| 4168 | { AArch64::H28_HI }, |
| 4169 | { AArch64::S28_HI }, |
| 4170 | { AArch64::B29_HI }, |
| 4171 | { AArch64::H29_HI }, |
| 4172 | { AArch64::S29_HI }, |
| 4173 | { AArch64::B30_HI }, |
| 4174 | { AArch64::H30_HI }, |
| 4175 | { AArch64::S30_HI }, |
| 4176 | { AArch64::B31_HI }, |
| 4177 | { AArch64::H31_HI }, |
| 4178 | { AArch64::S31_HI }, |
| 4179 | { AArch64::PN0 }, |
| 4180 | { AArch64::PN1 }, |
| 4181 | { AArch64::PN2 }, |
| 4182 | { AArch64::PN3 }, |
| 4183 | { AArch64::PN4 }, |
| 4184 | { AArch64::PN5 }, |
| 4185 | { AArch64::PN6 }, |
| 4186 | { AArch64::PN7 }, |
| 4187 | { AArch64::PN8 }, |
| 4188 | { AArch64::PN9 }, |
| 4189 | { AArch64::PN10 }, |
| 4190 | { AArch64::PN11 }, |
| 4191 | { AArch64::PN12 }, |
| 4192 | { AArch64::PN13 }, |
| 4193 | { AArch64::PN14 }, |
| 4194 | { AArch64::PN15 }, |
| 4195 | { AArch64::D0_HI }, |
| 4196 | { AArch64::D1_HI }, |
| 4197 | { AArch64::D2_HI }, |
| 4198 | { AArch64::D3_HI }, |
| 4199 | { AArch64::D4_HI }, |
| 4200 | { AArch64::D5_HI }, |
| 4201 | { AArch64::D6_HI }, |
| 4202 | { AArch64::D7_HI }, |
| 4203 | { AArch64::D8_HI }, |
| 4204 | { AArch64::D9_HI }, |
| 4205 | { AArch64::D10_HI }, |
| 4206 | { AArch64::D11_HI }, |
| 4207 | { AArch64::D12_HI }, |
| 4208 | { AArch64::D13_HI }, |
| 4209 | { AArch64::D14_HI }, |
| 4210 | { AArch64::D15_HI }, |
| 4211 | { AArch64::D16_HI }, |
| 4212 | { AArch64::D17_HI }, |
| 4213 | { AArch64::D18_HI }, |
| 4214 | { AArch64::D19_HI }, |
| 4215 | { AArch64::D20_HI }, |
| 4216 | { AArch64::D21_HI }, |
| 4217 | { AArch64::D22_HI }, |
| 4218 | { AArch64::D23_HI }, |
| 4219 | { AArch64::D24_HI }, |
| 4220 | { AArch64::D25_HI }, |
| 4221 | { AArch64::D26_HI }, |
| 4222 | { AArch64::D27_HI }, |
| 4223 | { AArch64::D28_HI }, |
| 4224 | { AArch64::D29_HI }, |
| 4225 | { AArch64::D30_HI }, |
| 4226 | { AArch64::D31_HI }, |
| 4227 | { AArch64::W0 }, |
| 4228 | { AArch64::W1 }, |
| 4229 | { AArch64::W2 }, |
| 4230 | { AArch64::W3 }, |
| 4231 | { AArch64::W4 }, |
| 4232 | { AArch64::W5 }, |
| 4233 | { AArch64::W6 }, |
| 4234 | { AArch64::W7 }, |
| 4235 | { AArch64::W8 }, |
| 4236 | { AArch64::W9 }, |
| 4237 | { AArch64::W10 }, |
| 4238 | { AArch64::W11 }, |
| 4239 | { AArch64::W12 }, |
| 4240 | { AArch64::W13 }, |
| 4241 | { AArch64::W14 }, |
| 4242 | { AArch64::W15 }, |
| 4243 | { AArch64::W16 }, |
| 4244 | { AArch64::W17 }, |
| 4245 | { AArch64::W18 }, |
| 4246 | { AArch64::W19 }, |
| 4247 | { AArch64::W20 }, |
| 4248 | { AArch64::W21 }, |
| 4249 | { AArch64::W22 }, |
| 4250 | { AArch64::W23 }, |
| 4251 | { AArch64::W24 }, |
| 4252 | { AArch64::W25 }, |
| 4253 | { AArch64::W26 }, |
| 4254 | { AArch64::W27 }, |
| 4255 | { AArch64::W28 }, |
| 4256 | { AArch64::W0_HI }, |
| 4257 | { AArch64::W1_HI }, |
| 4258 | { AArch64::W2_HI }, |
| 4259 | { AArch64::W3_HI }, |
| 4260 | { AArch64::W4_HI }, |
| 4261 | { AArch64::W5_HI }, |
| 4262 | { AArch64::W6_HI }, |
| 4263 | { AArch64::W7_HI }, |
| 4264 | { AArch64::W8_HI }, |
| 4265 | { AArch64::W9_HI }, |
| 4266 | { AArch64::W10_HI }, |
| 4267 | { AArch64::W11_HI }, |
| 4268 | { AArch64::W12_HI }, |
| 4269 | { AArch64::W13_HI }, |
| 4270 | { AArch64::W14_HI }, |
| 4271 | { AArch64::W15_HI }, |
| 4272 | { AArch64::W16_HI }, |
| 4273 | { AArch64::W17_HI }, |
| 4274 | { AArch64::W18_HI }, |
| 4275 | { AArch64::W19_HI }, |
| 4276 | { AArch64::W20_HI }, |
| 4277 | { AArch64::W21_HI }, |
| 4278 | { AArch64::W22_HI }, |
| 4279 | { AArch64::W23_HI }, |
| 4280 | { AArch64::W24_HI }, |
| 4281 | { AArch64::W25_HI }, |
| 4282 | { AArch64::W26_HI }, |
| 4283 | { AArch64::W27_HI }, |
| 4284 | { AArch64::W28_HI }, |
| 4285 | { AArch64::Q0_HI }, |
| 4286 | { AArch64::Q1_HI }, |
| 4287 | { AArch64::Q2_HI }, |
| 4288 | { AArch64::Q3_HI }, |
| 4289 | { AArch64::Q4_HI }, |
| 4290 | { AArch64::Q5_HI }, |
| 4291 | { AArch64::Q6_HI }, |
| 4292 | { AArch64::Q7_HI }, |
| 4293 | { AArch64::Q8_HI }, |
| 4294 | { AArch64::Q9_HI }, |
| 4295 | { AArch64::Q10_HI }, |
| 4296 | { AArch64::Q11_HI }, |
| 4297 | { AArch64::Q12_HI }, |
| 4298 | { AArch64::Q13_HI }, |
| 4299 | { AArch64::Q14_HI }, |
| 4300 | { AArch64::Q15_HI }, |
| 4301 | { AArch64::Q16_HI }, |
| 4302 | { AArch64::Q17_HI }, |
| 4303 | { AArch64::Q18_HI }, |
| 4304 | { AArch64::Q19_HI }, |
| 4305 | { AArch64::Q20_HI }, |
| 4306 | { AArch64::Q21_HI }, |
| 4307 | { AArch64::Q22_HI }, |
| 4308 | { AArch64::Q23_HI }, |
| 4309 | { AArch64::Q24_HI }, |
| 4310 | { AArch64::Q25_HI }, |
| 4311 | { AArch64::Q26_HI }, |
| 4312 | { AArch64::Q27_HI }, |
| 4313 | { AArch64::Q28_HI }, |
| 4314 | { AArch64::Q29_HI }, |
| 4315 | { AArch64::Q30_HI }, |
| 4316 | { AArch64::Q31_HI }, |
| 4317 | { AArch64::ZT0 }, |
| 4318 | }; |
| 4319 | |
| 4320 | namespace { // Register classes... |
| 4321 | // W_HI_DummyRC Register Class... |
| 4322 | const MCPhysReg W_HI_DummyRC[] = { |
| 4323 | AArch64::W0_HI, AArch64::W1_HI, AArch64::W2_HI, AArch64::W3_HI, AArch64::W4_HI, AArch64::W5_HI, AArch64::W6_HI, AArch64::W7_HI, AArch64::W8_HI, AArch64::W9_HI, AArch64::W10_HI, AArch64::W11_HI, AArch64::W12_HI, AArch64::W13_HI, AArch64::W14_HI, AArch64::W15_HI, AArch64::W16_HI, AArch64::W17_HI, AArch64::W18_HI, AArch64::W19_HI, AArch64::W20_HI, AArch64::W21_HI, AArch64::W22_HI, AArch64::W23_HI, AArch64::W24_HI, AArch64::W25_HI, AArch64::W26_HI, AArch64::W27_HI, AArch64::W28_HI, AArch64::W29_HI, AArch64::W30_HI, AArch64::WZR_HI, AArch64::WSP_HI, |
| 4324 | }; |
| 4325 | |
| 4326 | // W_HI_DummyRC Bit set. |
| 4327 | const uint8_t W_HI_DummyRCBits[] = { |
| 4328 | 0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, |
| 4329 | }; |
| 4330 | |
| 4331 | // B_HI_DummyRC Register Class... |
| 4332 | const MCPhysReg B_HI_DummyRC[] = { |
| 4333 | AArch64::B0_HI, AArch64::B1_HI, AArch64::B2_HI, AArch64::B3_HI, AArch64::B4_HI, AArch64::B5_HI, AArch64::B6_HI, AArch64::B7_HI, AArch64::B8_HI, AArch64::B9_HI, AArch64::B10_HI, AArch64::B11_HI, AArch64::B12_HI, AArch64::B13_HI, AArch64::B14_HI, AArch64::B15_HI, AArch64::B16_HI, AArch64::B17_HI, AArch64::B18_HI, AArch64::B19_HI, AArch64::B20_HI, AArch64::B21_HI, AArch64::B22_HI, AArch64::B23_HI, AArch64::B24_HI, AArch64::B25_HI, AArch64::B26_HI, AArch64::B27_HI, AArch64::B28_HI, AArch64::B29_HI, AArch64::B30_HI, AArch64::B31_HI, |
| 4334 | }; |
| 4335 | |
| 4336 | // B_HI_DummyRC Bit set. |
| 4337 | const uint8_t B_HI_DummyRCBits[] = { |
| 4338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 4339 | }; |
| 4340 | |
| 4341 | // D_HI_DummyRC Register Class... |
| 4342 | const MCPhysReg D_HI_DummyRC[] = { |
| 4343 | AArch64::D0_HI, AArch64::D1_HI, AArch64::D2_HI, AArch64::D3_HI, AArch64::D4_HI, AArch64::D5_HI, AArch64::D6_HI, AArch64::D7_HI, AArch64::D8_HI, AArch64::D9_HI, AArch64::D10_HI, AArch64::D11_HI, AArch64::D12_HI, AArch64::D13_HI, AArch64::D14_HI, AArch64::D15_HI, AArch64::D16_HI, AArch64::D17_HI, AArch64::D18_HI, AArch64::D19_HI, AArch64::D20_HI, AArch64::D21_HI, AArch64::D22_HI, AArch64::D23_HI, AArch64::D24_HI, AArch64::D25_HI, AArch64::D26_HI, AArch64::D27_HI, AArch64::D28_HI, AArch64::D29_HI, AArch64::D30_HI, AArch64::D31_HI, |
| 4344 | }; |
| 4345 | |
| 4346 | // D_HI_DummyRC Bit set. |
| 4347 | const uint8_t D_HI_DummyRCBits[] = { |
| 4348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 4349 | }; |
| 4350 | |
| 4351 | // H_HI_DummyRC Register Class... |
| 4352 | const MCPhysReg H_HI_DummyRC[] = { |
| 4353 | AArch64::H0_HI, AArch64::H1_HI, AArch64::H2_HI, AArch64::H3_HI, AArch64::H4_HI, AArch64::H5_HI, AArch64::H6_HI, AArch64::H7_HI, AArch64::H8_HI, AArch64::H9_HI, AArch64::H10_HI, AArch64::H11_HI, AArch64::H12_HI, AArch64::H13_HI, AArch64::H14_HI, AArch64::H15_HI, AArch64::H16_HI, AArch64::H17_HI, AArch64::H18_HI, AArch64::H19_HI, AArch64::H20_HI, AArch64::H21_HI, AArch64::H22_HI, AArch64::H23_HI, AArch64::H24_HI, AArch64::H25_HI, AArch64::H26_HI, AArch64::H27_HI, AArch64::H28_HI, AArch64::H29_HI, AArch64::H30_HI, AArch64::H31_HI, |
| 4354 | }; |
| 4355 | |
| 4356 | // H_HI_DummyRC Bit set. |
| 4357 | const uint8_t H_HI_DummyRCBits[] = { |
| 4358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 4359 | }; |
| 4360 | |
| 4361 | // Q_HI_DummyRC Register Class... |
| 4362 | const MCPhysReg Q_HI_DummyRC[] = { |
| 4363 | AArch64::Q0_HI, AArch64::Q1_HI, AArch64::Q2_HI, AArch64::Q3_HI, AArch64::Q4_HI, AArch64::Q5_HI, AArch64::Q6_HI, AArch64::Q7_HI, AArch64::Q8_HI, AArch64::Q9_HI, AArch64::Q10_HI, AArch64::Q11_HI, AArch64::Q12_HI, AArch64::Q13_HI, AArch64::Q14_HI, AArch64::Q15_HI, AArch64::Q16_HI, AArch64::Q17_HI, AArch64::Q18_HI, AArch64::Q19_HI, AArch64::Q20_HI, AArch64::Q21_HI, AArch64::Q22_HI, AArch64::Q23_HI, AArch64::Q24_HI, AArch64::Q25_HI, AArch64::Q26_HI, AArch64::Q27_HI, AArch64::Q28_HI, AArch64::Q29_HI, AArch64::Q30_HI, AArch64::Q31_HI, |
| 4364 | }; |
| 4365 | |
| 4366 | // Q_HI_DummyRC Bit set. |
| 4367 | const uint8_t Q_HI_DummyRCBits[] = { |
| 4368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 4369 | }; |
| 4370 | |
| 4371 | // S_HI_DummyRC Register Class... |
| 4372 | const MCPhysReg S_HI_DummyRC[] = { |
| 4373 | AArch64::S0_HI, AArch64::S1_HI, AArch64::S2_HI, AArch64::S3_HI, AArch64::S4_HI, AArch64::S5_HI, AArch64::S6_HI, AArch64::S7_HI, AArch64::S8_HI, AArch64::S9_HI, AArch64::S10_HI, AArch64::S11_HI, AArch64::S12_HI, AArch64::S13_HI, AArch64::S14_HI, AArch64::S15_HI, AArch64::S16_HI, AArch64::S17_HI, AArch64::S18_HI, AArch64::S19_HI, AArch64::S20_HI, AArch64::S21_HI, AArch64::S22_HI, AArch64::S23_HI, AArch64::S24_HI, AArch64::S25_HI, AArch64::S26_HI, AArch64::S27_HI, AArch64::S28_HI, AArch64::S29_HI, AArch64::S30_HI, AArch64::S31_HI, |
| 4374 | }; |
| 4375 | |
| 4376 | // S_HI_DummyRC Bit set. |
| 4377 | const uint8_t S_HI_DummyRCBits[] = { |
| 4378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 4379 | }; |
| 4380 | |
| 4381 | // FPR8 Register Class... |
| 4382 | const MCPhysReg FPR8[] = { |
| 4383 | AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, |
| 4384 | }; |
| 4385 | |
| 4386 | // FPR8 Bit set. |
| 4387 | const uint8_t FPR8Bits[] = { |
| 4388 | 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 4389 | }; |
| 4390 | |
| 4391 | // FPR16 Register Class... |
| 4392 | const MCPhysReg FPR16[] = { |
| 4393 | AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, |
| 4394 | }; |
| 4395 | |
| 4396 | // FPR16 Bit set. |
| 4397 | const uint8_t FPR16Bits[] = { |
| 4398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 4399 | }; |
| 4400 | |
| 4401 | // PPRorPNR Register Class... |
| 4402 | const MCPhysReg PPRorPNR[] = { |
| 4403 | AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::PN0, AArch64::PN1, AArch64::PN2, AArch64::PN3, AArch64::PN4, AArch64::PN5, AArch64::PN6, AArch64::PN7, AArch64::PN8, AArch64::PN9, AArch64::PN10, AArch64::PN11, AArch64::PN12, AArch64::PN13, AArch64::PN14, AArch64::PN15, |
| 4404 | }; |
| 4405 | |
| 4406 | // PPRorPNR Bit set. |
| 4407 | const uint8_t PPRorPNRBits[] = { |
| 4408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 4409 | }; |
| 4410 | |
| 4411 | // FPR16_lo Register Class... |
| 4412 | const MCPhysReg FPR16_lo[] = { |
| 4413 | AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, |
| 4414 | }; |
| 4415 | |
| 4416 | // FPR16_lo Bit set. |
| 4417 | const uint8_t FPR16_loBits[] = { |
| 4418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 4419 | }; |
| 4420 | |
| 4421 | // PNR Register Class... |
| 4422 | const MCPhysReg PNR[] = { |
| 4423 | AArch64::PN0, AArch64::PN1, AArch64::PN2, AArch64::PN3, AArch64::PN4, AArch64::PN5, AArch64::PN6, AArch64::PN7, AArch64::PN8, AArch64::PN9, AArch64::PN10, AArch64::PN11, AArch64::PN12, AArch64::PN13, AArch64::PN14, AArch64::PN15, |
| 4424 | }; |
| 4425 | |
| 4426 | // PNR Bit set. |
| 4427 | const uint8_t PNRBits[] = { |
| 4428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 4429 | }; |
| 4430 | |
| 4431 | // PPR Register Class... |
| 4432 | const MCPhysReg PPR[] = { |
| 4433 | AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, |
| 4434 | }; |
| 4435 | |
| 4436 | // PPR Bit set. |
| 4437 | const uint8_t PPRBits[] = { |
| 4438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 4439 | }; |
| 4440 | |
| 4441 | // PNR_3b Register Class... |
| 4442 | const MCPhysReg PNR_3b[] = { |
| 4443 | AArch64::PN0, AArch64::PN1, AArch64::PN2, AArch64::PN3, AArch64::PN4, AArch64::PN5, AArch64::PN6, AArch64::PN7, |
| 4444 | }; |
| 4445 | |
| 4446 | // PNR_3b Bit set. |
| 4447 | const uint8_t PNR_3bBits[] = { |
| 4448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 4449 | }; |
| 4450 | |
| 4451 | // PNR_p8to15 Register Class... |
| 4452 | const MCPhysReg PNR_p8to15[] = { |
| 4453 | AArch64::PN8, AArch64::PN9, AArch64::PN10, AArch64::PN11, AArch64::PN12, AArch64::PN13, AArch64::PN14, AArch64::PN15, |
| 4454 | }; |
| 4455 | |
| 4456 | // PNR_p8to15 Bit set. |
| 4457 | const uint8_t PNR_p8to15Bits[] = { |
| 4458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 4459 | }; |
| 4460 | |
| 4461 | // PPRMul2 Register Class... |
| 4462 | const MCPhysReg PPRMul2[] = { |
| 4463 | AArch64::P0, AArch64::P2, AArch64::P4, AArch64::P6, AArch64::P8, AArch64::P10, AArch64::P12, AArch64::P14, |
| 4464 | }; |
| 4465 | |
| 4466 | // PPRMul2 Bit set. |
| 4467 | const uint8_t PPRMul2Bits[] = { |
| 4468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| 4469 | }; |
| 4470 | |
| 4471 | // PPR_3b Register Class... |
| 4472 | const MCPhysReg PPR_3b[] = { |
| 4473 | AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, |
| 4474 | }; |
| 4475 | |
| 4476 | // PPR_3b Bit set. |
| 4477 | const uint8_t PPR_3bBits[] = { |
| 4478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 4479 | }; |
| 4480 | |
| 4481 | // PPR_p8to15 Register Class... |
| 4482 | const MCPhysReg PPR_p8to15[] = { |
| 4483 | AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, |
| 4484 | }; |
| 4485 | |
| 4486 | // PPR_p8to15 Bit set. |
| 4487 | const uint8_t PPR_p8to15Bits[] = { |
| 4488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 4489 | }; |
| 4490 | |
| 4491 | // PPRMul2_and_PPR_3b Register Class... |
| 4492 | const MCPhysReg PPRMul2_and_PPR_3b[] = { |
| 4493 | AArch64::P0, AArch64::P2, AArch64::P4, AArch64::P6, |
| 4494 | }; |
| 4495 | |
| 4496 | // PPRMul2_and_PPR_3b Bit set. |
| 4497 | const uint8_t PPRMul2_and_PPR_3bBits[] = { |
| 4498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 4499 | }; |
| 4500 | |
| 4501 | // PPRMul2_and_PPR_p8to15 Register Class... |
| 4502 | const MCPhysReg PPRMul2_and_PPR_p8to15[] = { |
| 4503 | AArch64::P8, AArch64::P10, AArch64::P12, AArch64::P14, |
| 4504 | }; |
| 4505 | |
| 4506 | // PPRMul2_and_PPR_p8to15 Bit set. |
| 4507 | const uint8_t PPRMul2_and_PPR_p8to15Bits[] = { |
| 4508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 4509 | }; |
| 4510 | |
| 4511 | // PPR2 Register Class... |
| 4512 | const MCPhysReg PPR2[] = { |
| 4513 | AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P7_P8, AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, AArch64::P15_P0, |
| 4514 | }; |
| 4515 | |
| 4516 | // PPR2 Bit set. |
| 4517 | const uint8_t PPR2Bits[] = { |
| 4518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 4519 | }; |
| 4520 | |
| 4521 | // PPR2Mul2 Register Class... |
| 4522 | const MCPhysReg PPR2Mul2[] = { |
| 4523 | AArch64::P0_P1, AArch64::P2_P3, AArch64::P4_P5, AArch64::P6_P7, AArch64::P8_P9, AArch64::P10_P11, AArch64::P12_P13, AArch64::P14_P15, |
| 4524 | }; |
| 4525 | |
| 4526 | // PPR2Mul2 Bit set. |
| 4527 | const uint8_t PPR2Mul2Bits[] = { |
| 4528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0xaa, 0x02, |
| 4529 | }; |
| 4530 | |
| 4531 | // PPR2_with_psub1_in_PPRMul2 Register Class... |
| 4532 | const MCPhysReg PPR2_with_psub1_in_PPRMul2[] = { |
| 4533 | AArch64::P1_P2, AArch64::P3_P4, AArch64::P5_P6, AArch64::P7_P8, AArch64::P9_P10, AArch64::P11_P12, AArch64::P13_P14, AArch64::P15_P0, |
| 4534 | }; |
| 4535 | |
| 4536 | // PPR2_with_psub1_in_PPRMul2 Bit set. |
| 4537 | const uint8_t PPR2_with_psub1_in_PPRMul2Bits[] = { |
| 4538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, |
| 4539 | }; |
| 4540 | |
| 4541 | // PPR2_with_psub1_in_PPR_3b Register Class... |
| 4542 | const MCPhysReg PPR2_with_psub1_in_PPR_3b[] = { |
| 4543 | AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P15_P0, |
| 4544 | }; |
| 4545 | |
| 4546 | // PPR2_with_psub1_in_PPR_3b Bit set. |
| 4547 | const uint8_t PPR2_with_psub1_in_PPR_3bBits[] = { |
| 4548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x04, |
| 4549 | }; |
| 4550 | |
| 4551 | // PPR2_with_psub1_in_PPR_p8to15 Register Class... |
| 4552 | const MCPhysReg PPR2_with_psub1_in_PPR_p8to15[] = { |
| 4553 | AArch64::P7_P8, AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, |
| 4554 | }; |
| 4555 | |
| 4556 | // PPR2_with_psub1_in_PPR_p8to15 Bit set. |
| 4557 | const uint8_t PPR2_with_psub1_in_PPR_p8to15Bits[] = { |
| 4558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, |
| 4559 | }; |
| 4560 | |
| 4561 | // PPR2_with_psub_in_PNR_3b Register Class... |
| 4562 | const MCPhysReg PPR2_with_psub_in_PNR_3b[] = { |
| 4563 | AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P7_P8, |
| 4564 | }; |
| 4565 | |
| 4566 | // PPR2_with_psub_in_PNR_3b Bit set. |
| 4567 | const uint8_t PPR2_with_psub_in_PNR_3bBits[] = { |
| 4568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 4569 | }; |
| 4570 | |
| 4571 | // PPR2_with_psub_in_PNR_p8to15 Register Class... |
| 4572 | const MCPhysReg PPR2_with_psub_in_PNR_p8to15[] = { |
| 4573 | AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, AArch64::P15_P0, |
| 4574 | }; |
| 4575 | |
| 4576 | // PPR2_with_psub_in_PNR_p8to15 Bit set. |
| 4577 | const uint8_t PPR2_with_psub_in_PNR_p8to15Bits[] = { |
| 4578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 4579 | }; |
| 4580 | |
| 4581 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b Register Class... |
| 4582 | const MCPhysReg PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b[] = { |
| 4583 | AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, |
| 4584 | }; |
| 4585 | |
| 4586 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b Bit set. |
| 4587 | const uint8_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bBits[] = { |
| 4588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 4589 | }; |
| 4590 | |
| 4591 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 Register Class... |
| 4592 | const MCPhysReg PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15[] = { |
| 4593 | AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, |
| 4594 | }; |
| 4595 | |
| 4596 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 Bit set. |
| 4597 | const uint8_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits[] = { |
| 4598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 4599 | }; |
| 4600 | |
| 4601 | // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b Register Class... |
| 4602 | const MCPhysReg PPR2Mul2_and_PPR2_with_psub_in_PNR_3b[] = { |
| 4603 | AArch64::P0_P1, AArch64::P2_P3, AArch64::P4_P5, AArch64::P6_P7, |
| 4604 | }; |
| 4605 | |
| 4606 | // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b Bit set. |
| 4607 | const uint8_t PPR2Mul2_and_PPR2_with_psub_in_PNR_3bBits[] = { |
| 4608 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x02, |
| 4609 | }; |
| 4610 | |
| 4611 | // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 Register Class... |
| 4612 | const MCPhysReg PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15[] = { |
| 4613 | AArch64::P8_P9, AArch64::P10_P11, AArch64::P12_P13, AArch64::P14_P15, |
| 4614 | }; |
| 4615 | |
| 4616 | // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 Bit set. |
| 4617 | const uint8_t PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15Bits[] = { |
| 4618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x02, |
| 4619 | }; |
| 4620 | |
| 4621 | // PPR2_with_psub1_in_PPRMul2_and_PPR_3b Register Class... |
| 4622 | const MCPhysReg PPR2_with_psub1_in_PPRMul2_and_PPR_3b[] = { |
| 4623 | AArch64::P1_P2, AArch64::P3_P4, AArch64::P5_P6, AArch64::P15_P0, |
| 4624 | }; |
| 4625 | |
| 4626 | // PPR2_with_psub1_in_PPRMul2_and_PPR_3b Bit set. |
| 4627 | const uint8_t PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits[] = { |
| 4628 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, 0x04, |
| 4629 | }; |
| 4630 | |
| 4631 | // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 Register Class... |
| 4632 | const MCPhysReg PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15[] = { |
| 4633 | AArch64::P7_P8, AArch64::P9_P10, AArch64::P11_P12, AArch64::P13_P14, |
| 4634 | }; |
| 4635 | |
| 4636 | // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 Bit set. |
| 4637 | const uint8_t PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits[] = { |
| 4638 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x54, 0x01, |
| 4639 | }; |
| 4640 | |
| 4641 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 Register Class... |
| 4642 | const MCPhysReg PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2[] = { |
| 4643 | AArch64::P1_P2, AArch64::P3_P4, AArch64::P5_P6, AArch64::P7_P8, |
| 4644 | }; |
| 4645 | |
| 4646 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 Bit set. |
| 4647 | const uint8_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2Bits[] = { |
| 4648 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, |
| 4649 | }; |
| 4650 | |
| 4651 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 Register Class... |
| 4652 | const MCPhysReg PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2[] = { |
| 4653 | AArch64::P9_P10, AArch64::P11_P12, AArch64::P13_P14, AArch64::P15_P0, |
| 4654 | }; |
| 4655 | |
| 4656 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 Bit set. |
| 4657 | const uint8_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2Bits[] = { |
| 4658 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, |
| 4659 | }; |
| 4660 | |
| 4661 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b Register Class... |
| 4662 | const MCPhysReg PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b[] = { |
| 4663 | AArch64::P1_P2, AArch64::P3_P4, AArch64::P5_P6, |
| 4664 | }; |
| 4665 | |
| 4666 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b Bit set. |
| 4667 | const uint8_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits[] = { |
| 4668 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, |
| 4669 | }; |
| 4670 | |
| 4671 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 Register Class... |
| 4672 | const MCPhysReg PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15[] = { |
| 4673 | AArch64::P9_P10, AArch64::P11_P12, AArch64::P13_P14, |
| 4674 | }; |
| 4675 | |
| 4676 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 Bit set. |
| 4677 | const uint8_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits[] = { |
| 4678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, |
| 4679 | }; |
| 4680 | |
| 4681 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 Register Class... |
| 4682 | const MCPhysReg PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15[] = { |
| 4683 | AArch64::P7_P8, |
| 4684 | }; |
| 4685 | |
| 4686 | // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 Bit set. |
| 4687 | const uint8_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits[] = { |
| 4688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 4689 | }; |
| 4690 | |
| 4691 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b Register Class... |
| 4692 | const MCPhysReg PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b[] = { |
| 4693 | AArch64::P15_P0, |
| 4694 | }; |
| 4695 | |
| 4696 | // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b Bit set. |
| 4697 | const uint8_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits[] = { |
| 4698 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 4699 | }; |
| 4700 | |
| 4701 | // GPR32all Register Class... |
| 4702 | const MCPhysReg GPR32all[] = { |
| 4703 | AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::WSP, |
| 4704 | }; |
| 4705 | |
| 4706 | // GPR32all Bit set. |
| 4707 | const uint8_t GPR32allBits[] = { |
| 4708 | 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, |
| 4709 | }; |
| 4710 | |
| 4711 | // FPR32 Register Class... |
| 4712 | const MCPhysReg FPR32[] = { |
| 4713 | AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, |
| 4714 | }; |
| 4715 | |
| 4716 | // FPR32 Bit set. |
| 4717 | const uint8_t FPR32Bits[] = { |
| 4718 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 4719 | }; |
| 4720 | |
| 4721 | // GPR32 Register Class... |
| 4722 | const MCPhysReg GPR32[] = { |
| 4723 | AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, |
| 4724 | }; |
| 4725 | |
| 4726 | // GPR32 Bit set. |
| 4727 | const uint8_t GPR32Bits[] = { |
| 4728 | 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, |
| 4729 | }; |
| 4730 | |
| 4731 | // GPR32sp Register Class... |
| 4732 | const MCPhysReg GPR32sp[] = { |
| 4733 | AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, |
| 4734 | }; |
| 4735 | |
| 4736 | // GPR32sp Bit set. |
| 4737 | const uint8_t GPR32spBits[] = { |
| 4738 | 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, |
| 4739 | }; |
| 4740 | |
| 4741 | // GPR32common Register Class... |
| 4742 | const MCPhysReg GPR32common[] = { |
| 4743 | AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, |
| 4744 | }; |
| 4745 | |
| 4746 | // GPR32common Bit set. |
| 4747 | const uint8_t GPR32commonBits[] = { |
| 4748 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x7f, |
| 4749 | }; |
| 4750 | |
| 4751 | // FPR32_with_hsub_in_FPR16_lo Register Class... |
| 4752 | const MCPhysReg FPR32_with_hsub_in_FPR16_lo[] = { |
| 4753 | AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, |
| 4754 | }; |
| 4755 | |
| 4756 | // FPR32_with_hsub_in_FPR16_lo Bit set. |
| 4757 | const uint8_t FPR32_with_hsub_in_FPR16_loBits[] = { |
| 4758 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 4759 | }; |
| 4760 | |
| 4761 | // GPR32arg Register Class... |
| 4762 | const MCPhysReg GPR32arg[] = { |
| 4763 | AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, |
| 4764 | }; |
| 4765 | |
| 4766 | // GPR32arg Bit set. |
| 4767 | const uint8_t GPR32argBits[] = { |
| 4768 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 4769 | }; |
| 4770 | |
| 4771 | // MatrixIndexGPR32_12_15 Register Class... |
| 4772 | const MCPhysReg MatrixIndexGPR32_12_15[] = { |
| 4773 | AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, |
| 4774 | }; |
| 4775 | |
| 4776 | // MatrixIndexGPR32_12_15 Bit set. |
| 4777 | const uint8_t MatrixIndexGPR32_12_15Bits[] = { |
| 4778 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, |
| 4779 | }; |
| 4780 | |
| 4781 | // MatrixIndexGPR32_8_11 Register Class... |
| 4782 | const MCPhysReg MatrixIndexGPR32_8_11[] = { |
| 4783 | AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, |
| 4784 | }; |
| 4785 | |
| 4786 | // MatrixIndexGPR32_8_11 Bit set. |
| 4787 | const uint8_t MatrixIndexGPR32_8_11Bits[] = { |
| 4788 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, |
| 4789 | }; |
| 4790 | |
| 4791 | // CCR Register Class... |
| 4792 | const MCPhysReg CCR[] = { |
| 4793 | AArch64::NZCV, |
| 4794 | }; |
| 4795 | |
| 4796 | // CCR Bit set. |
| 4797 | const uint8_t CCRBits[] = { |
| 4798 | 0x80, |
| 4799 | }; |
| 4800 | |
| 4801 | // GPR32sponly Register Class... |
| 4802 | const MCPhysReg GPR32sponly[] = { |
| 4803 | AArch64::WSP, |
| 4804 | }; |
| 4805 | |
| 4806 | // GPR32sponly Bit set. |
| 4807 | const uint8_t GPR32sponlyBits[] = { |
| 4808 | 0x00, 0x04, |
| 4809 | }; |
| 4810 | |
| 4811 | // WSeqPairsClass Register Class... |
| 4812 | const MCPhysReg WSeqPairsClass[] = { |
| 4813 | AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, AArch64::W8_W9, AArch64::W10_W11, AArch64::W12_W13, AArch64::W14_W15, AArch64::W16_W17, AArch64::W18_W19, AArch64::W20_W21, AArch64::W22_W23, AArch64::W24_W25, AArch64::W26_W27, AArch64::W28_W29, AArch64::W30_WZR, |
| 4814 | }; |
| 4815 | |
| 4816 | // WSeqPairsClass Bit set. |
| 4817 | const uint8_t WSeqPairsClassBits[] = { |
| 4818 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 4819 | }; |
| 4820 | |
| 4821 | // WSeqPairsClass_with_subo32_in_GPR32common Register Class... |
| 4822 | const MCPhysReg WSeqPairsClass_with_subo32_in_GPR32common[] = { |
| 4823 | AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, AArch64::W8_W9, AArch64::W10_W11, AArch64::W12_W13, AArch64::W14_W15, AArch64::W16_W17, AArch64::W18_W19, AArch64::W20_W21, AArch64::W22_W23, AArch64::W24_W25, AArch64::W26_W27, AArch64::W28_W29, |
| 4824 | }; |
| 4825 | |
| 4826 | // WSeqPairsClass_with_subo32_in_GPR32common Bit set. |
| 4827 | const uint8_t WSeqPairsClass_with_subo32_in_GPR32commonBits[] = { |
| 4828 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, |
| 4829 | }; |
| 4830 | |
| 4831 | // WSeqPairsClass_with_sube32_in_GPR32arg Register Class... |
| 4832 | const MCPhysReg WSeqPairsClass_with_sube32_in_GPR32arg[] = { |
| 4833 | AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, |
| 4834 | }; |
| 4835 | |
| 4836 | // WSeqPairsClass_with_sube32_in_GPR32arg Bit set. |
| 4837 | const uint8_t WSeqPairsClass_with_sube32_in_GPR32argBits[] = { |
| 4838 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, |
| 4839 | }; |
| 4840 | |
| 4841 | // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 Register Class... |
| 4842 | const MCPhysReg WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15[] = { |
| 4843 | AArch64::W12_W13, AArch64::W14_W15, |
| 4844 | }; |
| 4845 | |
| 4846 | // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 Bit set. |
| 4847 | const uint8_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits[] = { |
| 4848 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, |
| 4849 | }; |
| 4850 | |
| 4851 | // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 Register Class... |
| 4852 | const MCPhysReg WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11[] = { |
| 4853 | AArch64::W8_W9, AArch64::W10_W11, |
| 4854 | }; |
| 4855 | |
| 4856 | // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 Bit set. |
| 4857 | const uint8_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 4858 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, |
| 4859 | }; |
| 4860 | |
| 4861 | // GPR64all Register Class... |
| 4862 | const MCPhysReg GPR64all[] = { |
| 4863 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, AArch64::SP, |
| 4864 | }; |
| 4865 | |
| 4866 | // GPR64all Bit set. |
| 4867 | const uint8_t GPR64allBits[] = { |
| 4868 | 0x44, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, |
| 4869 | }; |
| 4870 | |
| 4871 | // FPR64 Register Class... |
| 4872 | const MCPhysReg FPR64[] = { |
| 4873 | AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, |
| 4874 | }; |
| 4875 | |
| 4876 | // FPR64 Bit set. |
| 4877 | const uint8_t FPR64Bits[] = { |
| 4878 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 4879 | }; |
| 4880 | |
| 4881 | // GPR64 Register Class... |
| 4882 | const MCPhysReg GPR64[] = { |
| 4883 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, |
| 4884 | }; |
| 4885 | |
| 4886 | // GPR64 Bit set. |
| 4887 | const uint8_t GPR64Bits[] = { |
| 4888 | 0x44, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, |
| 4889 | }; |
| 4890 | |
| 4891 | // GPR64sp Register Class... |
| 4892 | const MCPhysReg GPR64sp[] = { |
| 4893 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, |
| 4894 | }; |
| 4895 | |
| 4896 | // GPR64sp Bit set. |
| 4897 | const uint8_t GPR64spBits[] = { |
| 4898 | 0x44, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, |
| 4899 | }; |
| 4900 | |
| 4901 | // GPR64common Register Class... |
| 4902 | const MCPhysReg GPR64common[] = { |
| 4903 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, |
| 4904 | }; |
| 4905 | |
| 4906 | // GPR64common Bit set. |
| 4907 | const uint8_t GPR64commonBits[] = { |
| 4908 | 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x0f, |
| 4909 | }; |
| 4910 | |
| 4911 | // GPR64noip Register Class... |
| 4912 | const MCPhysReg GPR64noip[] = { |
| 4913 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::XZR, |
| 4914 | }; |
| 4915 | |
| 4916 | // GPR64noip Bit set. |
| 4917 | const uint8_t GPR64noipBits[] = { |
| 4918 | 0x04, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, 0xfe, 0x0f, |
| 4919 | }; |
| 4920 | |
| 4921 | // GPR64common_and_GPR64noip Register Class... |
| 4922 | const MCPhysReg GPR64common_and_GPR64noip[] = { |
| 4923 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, |
| 4924 | }; |
| 4925 | |
| 4926 | // GPR64common_and_GPR64noip Bit set. |
| 4927 | const uint8_t GPR64common_and_GPR64noipBits[] = { |
| 4928 | 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, 0xfe, 0x0f, |
| 4929 | }; |
| 4930 | |
| 4931 | // tcGPR64 Register Class... |
| 4932 | const MCPhysReg tcGPR64[] = { |
| 4933 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, |
| 4934 | }; |
| 4935 | |
| 4936 | // tcGPR64 Bit set. |
| 4937 | const uint8_t tcGPR64Bits[] = { |
| 4938 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0x03, |
| 4939 | }; |
| 4940 | |
| 4941 | // tcGPRnotx16 Register Class... |
| 4942 | const MCPhysReg tcGPRnotx16[] = { |
| 4943 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X17, AArch64::X18, |
| 4944 | }; |
| 4945 | |
| 4946 | // tcGPRnotx16 Bit set. |
| 4947 | const uint8_t tcGPRnotx16Bits[] = { |
| 4948 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, 0x03, |
| 4949 | }; |
| 4950 | |
| 4951 | // tcGPRnotx16x17 Register Class... |
| 4952 | const MCPhysReg tcGPRnotx16x17[] = { |
| 4953 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, |
| 4954 | }; |
| 4955 | |
| 4956 | // tcGPRnotx16x17 Bit set. |
| 4957 | const uint8_t tcGPRnotx16x17Bits[] = { |
| 4958 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, 0x02, |
| 4959 | }; |
| 4960 | |
| 4961 | // FPR64_lo Register Class... |
| 4962 | const MCPhysReg FPR64_lo[] = { |
| 4963 | AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, |
| 4964 | }; |
| 4965 | |
| 4966 | // FPR64_lo Bit set. |
| 4967 | const uint8_t FPR64_loBits[] = { |
| 4968 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 4969 | }; |
| 4970 | |
| 4971 | // GPR64arg Register Class... |
| 4972 | const MCPhysReg GPR64arg[] = { |
| 4973 | AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, |
| 4974 | }; |
| 4975 | |
| 4976 | // GPR64arg Bit set. |
| 4977 | const uint8_t GPR64argBits[] = { |
| 4978 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 4979 | }; |
| 4980 | |
| 4981 | // FIXED_REGS Register Class... |
| 4982 | const MCPhysReg FIXED_REGS[] = { |
| 4983 | AArch64::FP, AArch64::SP, AArch64::VG, AArch64::FFR, |
| 4984 | }; |
| 4985 | |
| 4986 | // FIXED_REGS Bit set. |
| 4987 | const uint8_t FIXED_REGSBits[] = { |
| 4988 | 0x06, 0x03, |
| 4989 | }; |
| 4990 | |
| 4991 | // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... |
| 4992 | const MCPhysReg GPR64_with_sub_32_in_MatrixIndexGPR32_12_15[] = { |
| 4993 | AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, |
| 4994 | }; |
| 4995 | |
| 4996 | // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. |
| 4997 | const uint8_t GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { |
| 4998 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 4999 | }; |
| 5000 | |
| 5001 | // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 5002 | const MCPhysReg GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 5003 | AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, |
| 5004 | }; |
| 5005 | |
| 5006 | // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 5007 | const uint8_t GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 5008 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, |
| 5009 | }; |
| 5010 | |
| 5011 | // FIXED_REGS_with_sub_32 Register Class... |
| 5012 | const MCPhysReg FIXED_REGS_with_sub_32[] = { |
| 5013 | AArch64::FP, AArch64::SP, |
| 5014 | }; |
| 5015 | |
| 5016 | // FIXED_REGS_with_sub_32 Bit set. |
| 5017 | const uint8_t FIXED_REGS_with_sub_32Bits[] = { |
| 5018 | 0x04, 0x01, |
| 5019 | }; |
| 5020 | |
| 5021 | // tcGPRx16x17 Register Class... |
| 5022 | const MCPhysReg tcGPRx16x17[] = { |
| 5023 | AArch64::X16, AArch64::X17, |
| 5024 | }; |
| 5025 | |
| 5026 | // tcGPRx16x17 Bit set. |
| 5027 | const uint8_t tcGPRx16x17Bits[] = { |
| 5028 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, |
| 5029 | }; |
| 5030 | |
| 5031 | // FIXED_REGS_and_GPR64 Register Class... |
| 5032 | const MCPhysReg FIXED_REGS_and_GPR64[] = { |
| 5033 | AArch64::FP, |
| 5034 | }; |
| 5035 | |
| 5036 | // FIXED_REGS_and_GPR64 Bit set. |
| 5037 | const uint8_t FIXED_REGS_and_GPR64Bits[] = { |
| 5038 | 0x04, |
| 5039 | }; |
| 5040 | |
| 5041 | // GPR64sponly Register Class... |
| 5042 | const MCPhysReg GPR64sponly[] = { |
| 5043 | AArch64::SP, |
| 5044 | }; |
| 5045 | |
| 5046 | // GPR64sponly Bit set. |
| 5047 | const uint8_t GPR64sponlyBits[] = { |
| 5048 | 0x00, 0x01, |
| 5049 | }; |
| 5050 | |
| 5051 | // tcGPRx17 Register Class... |
| 5052 | const MCPhysReg tcGPRx17[] = { |
| 5053 | AArch64::X17, |
| 5054 | }; |
| 5055 | |
| 5056 | // tcGPRx17 Bit set. |
| 5057 | const uint8_t tcGPRx17Bits[] = { |
| 5058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, |
| 5059 | }; |
| 5060 | |
| 5061 | // DD Register Class... |
| 5062 | const MCPhysReg DD[] = { |
| 5063 | AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16, AArch64::D16_D17, AArch64::D17_D18, AArch64::D18_D19, AArch64::D19_D20, AArch64::D20_D21, AArch64::D21_D22, AArch64::D22_D23, AArch64::D23_D24, AArch64::D24_D25, AArch64::D25_D26, AArch64::D26_D27, AArch64::D27_D28, AArch64::D28_D29, AArch64::D29_D30, AArch64::D30_D31, AArch64::D31_D0, |
| 5064 | }; |
| 5065 | |
| 5066 | // DD Bit set. |
| 5067 | const uint8_t DDBits[] = { |
| 5068 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 5069 | }; |
| 5070 | |
| 5071 | // DD_with_dsub0_in_FPR64_lo Register Class... |
| 5072 | const MCPhysReg DD_with_dsub0_in_FPR64_lo[] = { |
| 5073 | AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16, |
| 5074 | }; |
| 5075 | |
| 5076 | // DD_with_dsub0_in_FPR64_lo Bit set. |
| 5077 | const uint8_t DD_with_dsub0_in_FPR64_loBits[] = { |
| 5078 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 5079 | }; |
| 5080 | |
| 5081 | // DD_with_dsub1_in_FPR64_lo Register Class... |
| 5082 | const MCPhysReg DD_with_dsub1_in_FPR64_lo[] = { |
| 5083 | AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D31_D0, |
| 5084 | }; |
| 5085 | |
| 5086 | // DD_with_dsub1_in_FPR64_lo Bit set. |
| 5087 | const uint8_t DD_with_dsub1_in_FPR64_loBits[] = { |
| 5088 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 5089 | }; |
| 5090 | |
| 5091 | // XSeqPairsClass Register Class... |
| 5092 | const MCPhysReg XSeqPairsClass[] = { |
| 5093 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, AArch64::LR_XZR, |
| 5094 | }; |
| 5095 | |
| 5096 | // XSeqPairsClass Bit set. |
| 5097 | const uint8_t XSeqPairsClassBits[] = { |
| 5098 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 5099 | }; |
| 5100 | |
| 5101 | // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo Register Class... |
| 5102 | const MCPhysReg DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo[] = { |
| 5103 | AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, |
| 5104 | }; |
| 5105 | |
| 5106 | // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo Bit set. |
| 5107 | const uint8_t DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits[] = { |
| 5108 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 5109 | }; |
| 5110 | |
| 5111 | // XSeqPairsClass_with_subo64_in_GPR64common Register Class... |
| 5112 | const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64common[] = { |
| 5113 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, |
| 5114 | }; |
| 5115 | |
| 5116 | // XSeqPairsClass_with_subo64_in_GPR64common Bit set. |
| 5117 | const uint8_t XSeqPairsClass_with_subo64_in_GPR64commonBits[] = { |
| 5118 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, |
| 5119 | }; |
| 5120 | |
| 5121 | // XSeqPairsClass_with_subo64_in_GPR64noip Register Class... |
| 5122 | const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64noip[] = { |
| 5123 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, AArch64::LR_XZR, |
| 5124 | }; |
| 5125 | |
| 5126 | // XSeqPairsClass_with_subo64_in_GPR64noip Bit set. |
| 5127 | const uint8_t XSeqPairsClass_with_subo64_in_GPR64noipBits[] = { |
| 5128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7d, |
| 5129 | }; |
| 5130 | |
| 5131 | // XSeqPairsClass_with_sube64_in_GPR64noip Register Class... |
| 5132 | const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64noip[] = { |
| 5133 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, |
| 5134 | }; |
| 5135 | |
| 5136 | // XSeqPairsClass_with_sube64_in_GPR64noip Bit set. |
| 5137 | const uint8_t XSeqPairsClass_with_sube64_in_GPR64noipBits[] = { |
| 5138 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7d, |
| 5139 | }; |
| 5140 | |
| 5141 | // XSeqPairsClass_with_sube64_in_tcGPR64 Register Class... |
| 5142 | const MCPhysReg XSeqPairsClass_with_sube64_in_tcGPR64[] = { |
| 5143 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, |
| 5144 | }; |
| 5145 | |
| 5146 | // XSeqPairsClass_with_sube64_in_tcGPR64 Bit set. |
| 5147 | const uint8_t XSeqPairsClass_with_sube64_in_tcGPR64Bits[] = { |
| 5148 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, |
| 5149 | }; |
| 5150 | |
| 5151 | // XSeqPairsClass_with_sube64_in_tcGPRnotx16 Register Class... |
| 5152 | const MCPhysReg XSeqPairsClass_with_sube64_in_tcGPRnotx16[] = { |
| 5153 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, |
| 5154 | }; |
| 5155 | |
| 5156 | // XSeqPairsClass_with_sube64_in_tcGPRnotx16 Bit set. |
| 5157 | const uint8_t XSeqPairsClass_with_sube64_in_tcGPRnotx16Bits[] = { |
| 5158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x05, |
| 5159 | }; |
| 5160 | |
| 5161 | // XSeqPairsClass_with_subo64_in_tcGPR64 Register Class... |
| 5162 | const MCPhysReg XSeqPairsClass_with_subo64_in_tcGPR64[] = { |
| 5163 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, |
| 5164 | }; |
| 5165 | |
| 5166 | // XSeqPairsClass_with_subo64_in_tcGPR64 Bit set. |
| 5167 | const uint8_t XSeqPairsClass_with_subo64_in_tcGPR64Bits[] = { |
| 5168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x03, |
| 5169 | }; |
| 5170 | |
| 5171 | // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 Register Class... |
| 5172 | const MCPhysReg XSeqPairsClass_with_subo64_in_tcGPRnotx16x17[] = { |
| 5173 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, |
| 5174 | }; |
| 5175 | |
| 5176 | // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 Bit set. |
| 5177 | const uint8_t XSeqPairsClass_with_subo64_in_tcGPRnotx16x17Bits[] = { |
| 5178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, |
| 5179 | }; |
| 5180 | |
| 5181 | // XSeqPairsClass_with_sube64_in_GPR64arg Register Class... |
| 5182 | const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64arg[] = { |
| 5183 | AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, |
| 5184 | }; |
| 5185 | |
| 5186 | // XSeqPairsClass_with_sube64_in_GPR64arg Bit set. |
| 5187 | const uint8_t XSeqPairsClass_with_sube64_in_GPR64argBits[] = { |
| 5188 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, |
| 5189 | }; |
| 5190 | |
| 5191 | // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... |
| 5192 | const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15[] = { |
| 5193 | AArch64::X12_X13, AArch64::X14_X15, |
| 5194 | }; |
| 5195 | |
| 5196 | // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. |
| 5197 | const uint8_t XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { |
| 5198 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, |
| 5199 | }; |
| 5200 | |
| 5201 | // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 5202 | const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 5203 | AArch64::X8_X9, AArch64::X10_X11, |
| 5204 | }; |
| 5205 | |
| 5206 | // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 5207 | const uint8_t XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 5208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, |
| 5209 | }; |
| 5210 | |
| 5211 | // XSeqPairsClass_with_sube64_in_tcGPRx16x17 Register Class... |
| 5212 | const MCPhysReg XSeqPairsClass_with_sube64_in_tcGPRx16x17[] = { |
| 5213 | AArch64::X16_X17, |
| 5214 | }; |
| 5215 | |
| 5216 | // XSeqPairsClass_with_sube64_in_tcGPRx16x17 Bit set. |
| 5217 | const uint8_t XSeqPairsClass_with_sube64_in_tcGPRx16x17Bits[] = { |
| 5218 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, |
| 5219 | }; |
| 5220 | |
| 5221 | // XSeqPairsClass_with_subo64_in_FIXED_REGS Register Class... |
| 5222 | const MCPhysReg XSeqPairsClass_with_subo64_in_FIXED_REGS[] = { |
| 5223 | AArch64::X28_FP, |
| 5224 | }; |
| 5225 | |
| 5226 | // XSeqPairsClass_with_subo64_in_FIXED_REGS Bit set. |
| 5227 | const uint8_t XSeqPairsClass_with_subo64_in_FIXED_REGSBits[] = { |
| 5228 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, |
| 5229 | }; |
| 5230 | |
| 5231 | // FPR128 Register Class... |
| 5232 | const MCPhysReg FPR128[] = { |
| 5233 | AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, |
| 5234 | }; |
| 5235 | |
| 5236 | // FPR128 Bit set. |
| 5237 | const uint8_t FPR128Bits[] = { |
| 5238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
| 5239 | }; |
| 5240 | |
| 5241 | // ZPR Register Class... |
| 5242 | const MCPhysReg ZPR[] = { |
| 5243 | AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, |
| 5244 | }; |
| 5245 | |
| 5246 | // ZPR Bit set. |
| 5247 | const uint8_t ZPRBits[] = { |
| 5248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, |
| 5249 | }; |
| 5250 | |
| 5251 | // FPR128_lo Register Class... |
| 5252 | const MCPhysReg FPR128_lo[] = { |
| 5253 | AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, |
| 5254 | }; |
| 5255 | |
| 5256 | // FPR128_lo Bit set. |
| 5257 | const uint8_t FPR128_loBits[] = { |
| 5258 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, |
| 5259 | }; |
| 5260 | |
| 5261 | // MPR128 Register Class... |
| 5262 | const MCPhysReg MPR128[] = { |
| 5263 | AArch64::ZAQ0, AArch64::ZAQ1, AArch64::ZAQ2, AArch64::ZAQ3, AArch64::ZAQ4, AArch64::ZAQ5, AArch64::ZAQ6, AArch64::ZAQ7, AArch64::ZAQ8, AArch64::ZAQ9, AArch64::ZAQ10, AArch64::ZAQ11, AArch64::ZAQ12, AArch64::ZAQ13, AArch64::ZAQ14, AArch64::ZAQ15, |
| 5264 | }; |
| 5265 | |
| 5266 | // MPR128 Bit set. |
| 5267 | const uint8_t MPR128Bits[] = { |
| 5268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 5269 | }; |
| 5270 | |
| 5271 | // ZPRMul2 Register Class... |
| 5272 | const MCPhysReg ZPRMul2[] = { |
| 5273 | AArch64::Z0, AArch64::Z2, AArch64::Z4, AArch64::Z6, AArch64::Z8, AArch64::Z10, AArch64::Z12, AArch64::Z14, AArch64::Z16, AArch64::Z18, AArch64::Z20, AArch64::Z22, AArch64::Z24, AArch64::Z26, AArch64::Z28, AArch64::Z30, |
| 5274 | }; |
| 5275 | |
| 5276 | // ZPRMul2 Bit set. |
| 5277 | const uint8_t ZPRMul2Bits[] = { |
| 5278 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, |
| 5279 | }; |
| 5280 | |
| 5281 | // ZPR_4b Register Class... |
| 5282 | const MCPhysReg ZPR_4b[] = { |
| 5283 | AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, |
| 5284 | }; |
| 5285 | |
| 5286 | // ZPR_4b Bit set. |
| 5287 | const uint8_t ZPR_4bBits[] = { |
| 5288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, |
| 5289 | }; |
| 5290 | |
| 5291 | // FPR128_0to7 Register Class... |
| 5292 | const MCPhysReg FPR128_0to7[] = { |
| 5293 | AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, |
| 5294 | }; |
| 5295 | |
| 5296 | // FPR128_0to7 Bit set. |
| 5297 | const uint8_t FPR128_0to7Bits[] = { |
| 5298 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
| 5299 | }; |
| 5300 | |
| 5301 | // ZPRMul2_Hi Register Class... |
| 5302 | const MCPhysReg ZPRMul2_Hi[] = { |
| 5303 | AArch64::Z16, AArch64::Z18, AArch64::Z20, AArch64::Z22, AArch64::Z24, AArch64::Z26, AArch64::Z28, AArch64::Z30, |
| 5304 | }; |
| 5305 | |
| 5306 | // ZPRMul2_Hi Bit set. |
| 5307 | const uint8_t ZPRMul2_HiBits[] = { |
| 5308 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, |
| 5309 | }; |
| 5310 | |
| 5311 | // ZPRMul2_Lo Register Class... |
| 5312 | const MCPhysReg ZPRMul2_Lo[] = { |
| 5313 | AArch64::Z0, AArch64::Z2, AArch64::Z4, AArch64::Z6, AArch64::Z8, AArch64::Z10, AArch64::Z12, AArch64::Z14, |
| 5314 | }; |
| 5315 | |
| 5316 | // ZPRMul2_Lo Bit set. |
| 5317 | const uint8_t ZPRMul2_LoBits[] = { |
| 5318 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, |
| 5319 | }; |
| 5320 | |
| 5321 | // ZPRMul4 Register Class... |
| 5322 | const MCPhysReg ZPRMul4[] = { |
| 5323 | AArch64::Z0, AArch64::Z4, AArch64::Z8, AArch64::Z12, AArch64::Z16, AArch64::Z20, AArch64::Z24, AArch64::Z28, |
| 5324 | }; |
| 5325 | |
| 5326 | // ZPRMul4 Bit set. |
| 5327 | const uint8_t ZPRMul4Bits[] = { |
| 5328 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, 0x01, |
| 5329 | }; |
| 5330 | |
| 5331 | // ZPR_3b Register Class... |
| 5332 | const MCPhysReg ZPR_3b[] = { |
| 5333 | AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, |
| 5334 | }; |
| 5335 | |
| 5336 | // ZPR_3b Bit set. |
| 5337 | const uint8_t ZPR_3bBits[] = { |
| 5338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, |
| 5339 | }; |
| 5340 | |
| 5341 | // ZPR_K Register Class... |
| 5342 | const MCPhysReg ZPR_K[] = { |
| 5343 | AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, |
| 5344 | }; |
| 5345 | |
| 5346 | // ZPR_K Bit set. |
| 5347 | const uint8_t ZPR_KBits[] = { |
| 5348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0f, |
| 5349 | }; |
| 5350 | |
| 5351 | // ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 5352 | const MCPhysReg ZPRMul2_Hi_and_ZPRMul4[] = { |
| 5353 | AArch64::Z16, AArch64::Z20, AArch64::Z24, AArch64::Z28, |
| 5354 | }; |
| 5355 | |
| 5356 | // ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 5357 | const uint8_t ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 5358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, |
| 5359 | }; |
| 5360 | |
| 5361 | // ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 5362 | const MCPhysReg ZPRMul2_Lo_and_ZPRMul4[] = { |
| 5363 | AArch64::Z0, AArch64::Z4, AArch64::Z8, AArch64::Z12, |
| 5364 | }; |
| 5365 | |
| 5366 | // ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 5367 | const uint8_t ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 5368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, |
| 5369 | }; |
| 5370 | |
| 5371 | // ZPRMul2_and_ZPR_3b Register Class... |
| 5372 | const MCPhysReg ZPRMul2_and_ZPR_3b[] = { |
| 5373 | AArch64::Z0, AArch64::Z2, AArch64::Z4, AArch64::Z6, |
| 5374 | }; |
| 5375 | |
| 5376 | // ZPRMul2_and_ZPR_3b Bit set. |
| 5377 | const uint8_t ZPRMul2_and_ZPR_3bBits[] = { |
| 5378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, |
| 5379 | }; |
| 5380 | |
| 5381 | // ZPRMul2_and_ZPR_K Register Class... |
| 5382 | const MCPhysReg ZPRMul2_and_ZPR_K[] = { |
| 5383 | AArch64::Z20, AArch64::Z22, AArch64::Z28, AArch64::Z30, |
| 5384 | }; |
| 5385 | |
| 5386 | // ZPRMul2_and_ZPR_K Bit set. |
| 5387 | const uint8_t ZPRMul2_and_ZPR_KBits[] = { |
| 5388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, |
| 5389 | }; |
| 5390 | |
| 5391 | // ZPRMul4_and_ZPR_3b Register Class... |
| 5392 | const MCPhysReg ZPRMul4_and_ZPR_3b[] = { |
| 5393 | AArch64::Z0, AArch64::Z4, |
| 5394 | }; |
| 5395 | |
| 5396 | // ZPRMul4_and_ZPR_3b Bit set. |
| 5397 | const uint8_t ZPRMul4_and_ZPR_3bBits[] = { |
| 5398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01, |
| 5399 | }; |
| 5400 | |
| 5401 | // ZPRMul4_and_ZPR_K Register Class... |
| 5402 | const MCPhysReg ZPRMul4_and_ZPR_K[] = { |
| 5403 | AArch64::Z20, AArch64::Z28, |
| 5404 | }; |
| 5405 | |
| 5406 | // ZPRMul4_and_ZPR_K Bit set. |
| 5407 | const uint8_t ZPRMul4_and_ZPR_KBits[] = { |
| 5408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, |
| 5409 | }; |
| 5410 | |
| 5411 | // DDD Register Class... |
| 5412 | const MCPhysReg DDD[] = { |
| 5413 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D15_D16_D17, AArch64::D16_D17_D18, AArch64::D17_D18_D19, AArch64::D18_D19_D20, AArch64::D19_D20_D21, AArch64::D20_D21_D22, AArch64::D21_D22_D23, AArch64::D22_D23_D24, AArch64::D23_D24_D25, AArch64::D24_D25_D26, AArch64::D25_D26_D27, AArch64::D26_D27_D28, AArch64::D27_D28_D29, AArch64::D28_D29_D30, AArch64::D29_D30_D31, AArch64::D30_D31_D0, AArch64::D31_D0_D1, |
| 5414 | }; |
| 5415 | |
| 5416 | // DDD Bit set. |
| 5417 | const uint8_t DDDBits[] = { |
| 5418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 5419 | }; |
| 5420 | |
| 5421 | // DDD_with_dsub0_in_FPR64_lo Register Class... |
| 5422 | const MCPhysReg DDD_with_dsub0_in_FPR64_lo[] = { |
| 5423 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D15_D16_D17, |
| 5424 | }; |
| 5425 | |
| 5426 | // DDD_with_dsub0_in_FPR64_lo Bit set. |
| 5427 | const uint8_t DDD_with_dsub0_in_FPR64_loBits[] = { |
| 5428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 5429 | }; |
| 5430 | |
| 5431 | // DDD_with_dsub1_in_FPR64_lo Register Class... |
| 5432 | const MCPhysReg DDD_with_dsub1_in_FPR64_lo[] = { |
| 5433 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D31_D0_D1, |
| 5434 | }; |
| 5435 | |
| 5436 | // DDD_with_dsub1_in_FPR64_lo Bit set. |
| 5437 | const uint8_t DDD_with_dsub1_in_FPR64_loBits[] = { |
| 5438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 5439 | }; |
| 5440 | |
| 5441 | // DDD_with_dsub2_in_FPR64_lo Register Class... |
| 5442 | const MCPhysReg DDD_with_dsub2_in_FPR64_lo[] = { |
| 5443 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D30_D31_D0, AArch64::D31_D0_D1, |
| 5444 | }; |
| 5445 | |
| 5446 | // DDD_with_dsub2_in_FPR64_lo Bit set. |
| 5447 | const uint8_t DDD_with_dsub2_in_FPR64_loBits[] = { |
| 5448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x06, |
| 5449 | }; |
| 5450 | |
| 5451 | // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo Register Class... |
| 5452 | const MCPhysReg DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo[] = { |
| 5453 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, |
| 5454 | }; |
| 5455 | |
| 5456 | // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo Bit set. |
| 5457 | const uint8_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits[] = { |
| 5458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 5459 | }; |
| 5460 | |
| 5461 | // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Register Class... |
| 5462 | const MCPhysReg DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo[] = { |
| 5463 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D31_D0_D1, |
| 5464 | }; |
| 5465 | |
| 5466 | // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Bit set. |
| 5467 | const uint8_t DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits[] = { |
| 5468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x04, |
| 5469 | }; |
| 5470 | |
| 5471 | // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Register Class... |
| 5472 | const MCPhysReg DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo[] = { |
| 5473 | AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, |
| 5474 | }; |
| 5475 | |
| 5476 | // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Bit set. |
| 5477 | const uint8_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits[] = { |
| 5478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, |
| 5479 | }; |
| 5480 | |
| 5481 | // DDDD Register Class... |
| 5482 | const MCPhysReg DDDD[] = { |
| 5483 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D15_D16_D17_D18, AArch64::D16_D17_D18_D19, AArch64::D17_D18_D19_D20, AArch64::D18_D19_D20_D21, AArch64::D19_D20_D21_D22, AArch64::D20_D21_D22_D23, AArch64::D21_D22_D23_D24, AArch64::D22_D23_D24_D25, AArch64::D23_D24_D25_D26, AArch64::D24_D25_D26_D27, AArch64::D25_D26_D27_D28, AArch64::D26_D27_D28_D29, AArch64::D27_D28_D29_D30, AArch64::D28_D29_D30_D31, AArch64::D29_D30_D31_D0, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, |
| 5484 | }; |
| 5485 | |
| 5486 | // DDDD Bit set. |
| 5487 | const uint8_t DDDDBits[] = { |
| 5488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 5489 | }; |
| 5490 | |
| 5491 | // DDDD_with_dsub0_in_FPR64_lo Register Class... |
| 5492 | const MCPhysReg DDDD_with_dsub0_in_FPR64_lo[] = { |
| 5493 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D15_D16_D17_D18, |
| 5494 | }; |
| 5495 | |
| 5496 | // DDDD_with_dsub0_in_FPR64_lo Bit set. |
| 5497 | const uint8_t DDDD_with_dsub0_in_FPR64_loBits[] = { |
| 5498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 5499 | }; |
| 5500 | |
| 5501 | // DDDD_with_dsub1_in_FPR64_lo Register Class... |
| 5502 | const MCPhysReg DDDD_with_dsub1_in_FPR64_lo[] = { |
| 5503 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D31_D0_D1_D2, |
| 5504 | }; |
| 5505 | |
| 5506 | // DDDD_with_dsub1_in_FPR64_lo Bit set. |
| 5507 | const uint8_t DDDD_with_dsub1_in_FPR64_loBits[] = { |
| 5508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 5509 | }; |
| 5510 | |
| 5511 | // DDDD_with_dsub2_in_FPR64_lo Register Class... |
| 5512 | const MCPhysReg DDDD_with_dsub2_in_FPR64_lo[] = { |
| 5513 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, |
| 5514 | }; |
| 5515 | |
| 5516 | // DDDD_with_dsub2_in_FPR64_lo Bit set. |
| 5517 | const uint8_t DDDD_with_dsub2_in_FPR64_loBits[] = { |
| 5518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x06, |
| 5519 | }; |
| 5520 | |
| 5521 | // DDDD_with_dsub3_in_FPR64_lo Register Class... |
| 5522 | const MCPhysReg DDDD_with_dsub3_in_FPR64_lo[] = { |
| 5523 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D29_D30_D31_D0, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, |
| 5524 | }; |
| 5525 | |
| 5526 | // DDDD_with_dsub3_in_FPR64_lo Bit set. |
| 5527 | const uint8_t DDDD_with_dsub3_in_FPR64_loBits[] = { |
| 5528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x07, |
| 5529 | }; |
| 5530 | |
| 5531 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo Register Class... |
| 5532 | const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo[] = { |
| 5533 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, |
| 5534 | }; |
| 5535 | |
| 5536 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo Bit set. |
| 5537 | const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits[] = { |
| 5538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 5539 | }; |
| 5540 | |
| 5541 | // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Register Class... |
| 5542 | const MCPhysReg DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo[] = { |
| 5543 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D31_D0_D1_D2, |
| 5544 | }; |
| 5545 | |
| 5546 | // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Bit set. |
| 5547 | const uint8_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits[] = { |
| 5548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x04, |
| 5549 | }; |
| 5550 | |
| 5551 | // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... |
| 5552 | const MCPhysReg DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { |
| 5553 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, |
| 5554 | }; |
| 5555 | |
| 5556 | // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. |
| 5557 | const uint8_t DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { |
| 5558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x06, |
| 5559 | }; |
| 5560 | |
| 5561 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Register Class... |
| 5562 | const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo[] = { |
| 5563 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, |
| 5564 | }; |
| 5565 | |
| 5566 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Bit set. |
| 5567 | const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits[] = { |
| 5568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, |
| 5569 | }; |
| 5570 | |
| 5571 | // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... |
| 5572 | const MCPhysReg DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { |
| 5573 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D31_D0_D1_D2, |
| 5574 | }; |
| 5575 | |
| 5576 | // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. |
| 5577 | const uint8_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { |
| 5578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x04, |
| 5579 | }; |
| 5580 | |
| 5581 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... |
| 5582 | const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { |
| 5583 | AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, |
| 5584 | }; |
| 5585 | |
| 5586 | // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. |
| 5587 | const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { |
| 5588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, |
| 5589 | }; |
| 5590 | |
| 5591 | // QQ Register Class... |
| 5592 | const MCPhysReg QQ[] = { |
| 5593 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, AArch64::Q16_Q17, AArch64::Q17_Q18, AArch64::Q18_Q19, AArch64::Q19_Q20, AArch64::Q20_Q21, AArch64::Q21_Q22, AArch64::Q22_Q23, AArch64::Q23_Q24, AArch64::Q24_Q25, AArch64::Q25_Q26, AArch64::Q26_Q27, AArch64::Q27_Q28, AArch64::Q28_Q29, AArch64::Q29_Q30, AArch64::Q30_Q31, AArch64::Q31_Q0, |
| 5594 | }; |
| 5595 | |
| 5596 | // QQ Bit set. |
| 5597 | const uint8_t QQBits[] = { |
| 5598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 5599 | }; |
| 5600 | |
| 5601 | // ZPR2 Register Class... |
| 5602 | const MCPhysReg ZPR2[] = { |
| 5603 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z15_Z16, AArch64::Z16_Z17, AArch64::Z17_Z18, AArch64::Z18_Z19, AArch64::Z19_Z20, AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z23_Z24, AArch64::Z24_Z25, AArch64::Z25_Z26, AArch64::Z26_Z27, AArch64::Z27_Z28, AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, AArch64::Z31_Z0, |
| 5604 | }; |
| 5605 | |
| 5606 | // ZPR2 Bit set. |
| 5607 | const uint8_t ZPR2Bits[] = { |
| 5608 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, |
| 5609 | }; |
| 5610 | |
| 5611 | // ZPR2StridedOrContiguous Register Class... |
| 5612 | const MCPhysReg ZPR2StridedOrContiguous[] = { |
| 5613 | AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, AArch64::Z16_Z24, AArch64::Z17_Z25, AArch64::Z18_Z26, AArch64::Z19_Z27, AArch64::Z20_Z28, AArch64::Z21_Z29, AArch64::Z22_Z30, AArch64::Z23_Z31, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5614 | }; |
| 5615 | |
| 5616 | // ZPR2StridedOrContiguous Bit set. |
| 5617 | const uint8_t ZPR2StridedOrContiguousBits[] = { |
| 5618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 5619 | }; |
| 5620 | |
| 5621 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 Register Class... |
| 5622 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2[] = { |
| 5623 | AArch64::Z0_Z8, AArch64::Z2_Z10, AArch64::Z4_Z12, AArch64::Z6_Z14, AArch64::Z16_Z24, AArch64::Z18_Z26, AArch64::Z20_Z28, AArch64::Z22_Z30, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5624 | }; |
| 5625 | |
| 5626 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 Bit set. |
| 5627 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2Bits[] = { |
| 5628 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 5629 | }; |
| 5630 | |
| 5631 | // QQ_with_dsub1_in_FPR64_lo Register Class... |
| 5632 | const MCPhysReg QQ_with_dsub1_in_FPR64_lo[] = { |
| 5633 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q31_Q0, |
| 5634 | }; |
| 5635 | |
| 5636 | // QQ_with_dsub1_in_FPR64_lo Bit set. |
| 5637 | const uint8_t QQ_with_dsub1_in_FPR64_loBits[] = { |
| 5638 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 5639 | }; |
| 5640 | |
| 5641 | // QQ_with_qsub0_in_FPR128_lo Register Class... |
| 5642 | const MCPhysReg QQ_with_qsub0_in_FPR128_lo[] = { |
| 5643 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, |
| 5644 | }; |
| 5645 | |
| 5646 | // QQ_with_qsub0_in_FPR128_lo Bit set. |
| 5647 | const uint8_t QQ_with_qsub0_in_FPR128_loBits[] = { |
| 5648 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 5649 | }; |
| 5650 | |
| 5651 | // ZPR2Mul2 Register Class... |
| 5652 | const MCPhysReg ZPR2Mul2[] = { |
| 5653 | AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5654 | }; |
| 5655 | |
| 5656 | // ZPR2Mul2 Bit set. |
| 5657 | const uint8_t ZPR2Mul2Bits[] = { |
| 5658 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x2a, |
| 5659 | }; |
| 5660 | |
| 5661 | // ZPR2Strided Register Class... |
| 5662 | const MCPhysReg ZPR2Strided[] = { |
| 5663 | AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, AArch64::Z16_Z24, AArch64::Z17_Z25, AArch64::Z18_Z26, AArch64::Z19_Z27, AArch64::Z20_Z28, AArch64::Z21_Z29, AArch64::Z22_Z30, AArch64::Z23_Z31, |
| 5664 | }; |
| 5665 | |
| 5666 | // ZPR2Strided Bit set. |
| 5667 | const uint8_t ZPR2StridedBits[] = { |
| 5668 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 5669 | }; |
| 5670 | |
| 5671 | // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo Register Class... |
| 5672 | const MCPhysReg ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo[] = { |
| 5673 | AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, |
| 5674 | }; |
| 5675 | |
| 5676 | // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo Bit set. |
| 5677 | const uint8_t ZPR2StridedOrContiguous_with_dsub_in_FPR64_loBits[] = { |
| 5678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 5679 | }; |
| 5680 | |
| 5681 | // ZPR2_with_dsub1_in_FPR64_lo Register Class... |
| 5682 | const MCPhysReg ZPR2_with_dsub1_in_FPR64_lo[] = { |
| 5683 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z31_Z0, |
| 5684 | }; |
| 5685 | |
| 5686 | // ZPR2_with_dsub1_in_FPR64_lo Bit set. |
| 5687 | const uint8_t ZPR2_with_dsub1_in_FPR64_loBits[] = { |
| 5688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, 0x00, 0x40, |
| 5689 | }; |
| 5690 | |
| 5691 | // ZPR2_with_zsub1_in_ZPRMul2 Register Class... |
| 5692 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2[] = { |
| 5693 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z7_Z8, AArch64::Z9_Z10, AArch64::Z11_Z12, AArch64::Z13_Z14, AArch64::Z15_Z16, AArch64::Z17_Z18, AArch64::Z19_Z20, AArch64::Z21_Z22, AArch64::Z23_Z24, AArch64::Z25_Z26, AArch64::Z27_Z28, AArch64::Z29_Z30, AArch64::Z31_Z0, |
| 5694 | }; |
| 5695 | |
| 5696 | // ZPR2_with_zsub1_in_ZPRMul2 Bit set. |
| 5697 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2Bits[] = { |
| 5698 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, |
| 5699 | }; |
| 5700 | |
| 5701 | // ZPR2_with_zsub_in_FPR128_lo Register Class... |
| 5702 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo[] = { |
| 5703 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z15_Z16, |
| 5704 | }; |
| 5705 | |
| 5706 | // ZPR2_with_zsub_in_FPR128_lo Bit set. |
| 5707 | const uint8_t ZPR2_with_zsub_in_FPR128_loBits[] = { |
| 5708 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 5709 | }; |
| 5710 | |
| 5711 | // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo Register Class... |
| 5712 | const MCPhysReg QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo[] = { |
| 5713 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, |
| 5714 | }; |
| 5715 | |
| 5716 | // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo Bit set. |
| 5717 | const uint8_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loBits[] = { |
| 5718 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 5719 | }; |
| 5720 | |
| 5721 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo Register Class... |
| 5722 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo[] = { |
| 5723 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, |
| 5724 | }; |
| 5725 | |
| 5726 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo Bit set. |
| 5727 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loBits[] = { |
| 5728 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, |
| 5729 | }; |
| 5730 | |
| 5731 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi Register Class... |
| 5732 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi[] = { |
| 5733 | AArch64::Z16_Z24, AArch64::Z18_Z26, AArch64::Z20_Z28, AArch64::Z22_Z30, AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5734 | }; |
| 5735 | |
| 5736 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi Bit set. |
| 5737 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits[] = { |
| 5738 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 5739 | }; |
| 5740 | |
| 5741 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo Register Class... |
| 5742 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo[] = { |
| 5743 | AArch64::Z0_Z8, AArch64::Z2_Z10, AArch64::Z4_Z12, AArch64::Z6_Z14, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, |
| 5744 | }; |
| 5745 | |
| 5746 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo Bit set. |
| 5747 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits[] = { |
| 5748 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 5749 | }; |
| 5750 | |
| 5751 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 Register Class... |
| 5752 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4[] = { |
| 5753 | AArch64::Z0_Z8, AArch64::Z4_Z12, AArch64::Z16_Z24, AArch64::Z20_Z28, AArch64::Z0_Z1, AArch64::Z4_Z5, AArch64::Z8_Z9, AArch64::Z12_Z13, AArch64::Z16_Z17, AArch64::Z20_Z21, AArch64::Z24_Z25, AArch64::Z28_Z29, |
| 5754 | }; |
| 5755 | |
| 5756 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 Bit set. |
| 5757 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4Bits[] = { |
| 5758 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 5759 | }; |
| 5760 | |
| 5761 | // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 Register Class... |
| 5762 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7[] = { |
| 5763 | AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, |
| 5764 | }; |
| 5765 | |
| 5766 | // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 Bit set. |
| 5767 | const uint8_t ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7Bits[] = { |
| 5768 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 5769 | }; |
| 5770 | |
| 5771 | // QQ_with_qsub0_in_FPR128_0to7 Register Class... |
| 5772 | const MCPhysReg QQ_with_qsub0_in_FPR128_0to7[] = { |
| 5773 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, |
| 5774 | }; |
| 5775 | |
| 5776 | // QQ_with_qsub0_in_FPR128_0to7 Bit set. |
| 5777 | const uint8_t QQ_with_qsub0_in_FPR128_0to7Bits[] = { |
| 5778 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 5779 | }; |
| 5780 | |
| 5781 | // QQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 5782 | const MCPhysReg QQ_with_qsub1_in_FPR128_0to7[] = { |
| 5783 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q31_Q0, |
| 5784 | }; |
| 5785 | |
| 5786 | // QQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 5787 | const uint8_t QQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 5788 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x00, 0x00, 0x04, |
| 5789 | }; |
| 5790 | |
| 5791 | // ZPR2Mul2_Hi Register Class... |
| 5792 | const MCPhysReg ZPR2Mul2_Hi[] = { |
| 5793 | AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5794 | }; |
| 5795 | |
| 5796 | // ZPR2Mul2_Hi Bit set. |
| 5797 | const uint8_t ZPR2Mul2_HiBits[] = { |
| 5798 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 5799 | }; |
| 5800 | |
| 5801 | // ZPR2Mul2_Lo Register Class... |
| 5802 | const MCPhysReg ZPR2Mul2_Lo[] = { |
| 5803 | AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, |
| 5804 | }; |
| 5805 | |
| 5806 | // ZPR2Mul2_Lo Bit set. |
| 5807 | const uint8_t ZPR2Mul2_LoBits[] = { |
| 5808 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 5809 | }; |
| 5810 | |
| 5811 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b Register Class... |
| 5812 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b[] = { |
| 5813 | AArch64::Z0_Z8, AArch64::Z2_Z10, AArch64::Z4_Z12, AArch64::Z6_Z14, AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, |
| 5814 | }; |
| 5815 | |
| 5816 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b Bit set. |
| 5817 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 5818 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 5819 | }; |
| 5820 | |
| 5821 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K Register Class... |
| 5822 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K[] = { |
| 5823 | AArch64::Z20_Z28, AArch64::Z21_Z29, AArch64::Z22_Z30, AArch64::Z23_Z31, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5824 | }; |
| 5825 | |
| 5826 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K Bit set. |
| 5827 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KBits[] = { |
| 5828 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 5829 | }; |
| 5830 | |
| 5831 | // ZPR2Strided_with_dsub_in_FPR64_lo Register Class... |
| 5832 | const MCPhysReg ZPR2Strided_with_dsub_in_FPR64_lo[] = { |
| 5833 | AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, |
| 5834 | }; |
| 5835 | |
| 5836 | // ZPR2Strided_with_dsub_in_FPR64_lo Bit set. |
| 5837 | const uint8_t ZPR2Strided_with_dsub_in_FPR64_loBits[] = { |
| 5838 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 5839 | }; |
| 5840 | |
| 5841 | // ZPR2Strided_with_zsub0_in_ZPRMul2 Register Class... |
| 5842 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2[] = { |
| 5843 | AArch64::Z0_Z8, AArch64::Z2_Z10, AArch64::Z4_Z12, AArch64::Z6_Z14, AArch64::Z16_Z24, AArch64::Z18_Z26, AArch64::Z20_Z28, AArch64::Z22_Z30, |
| 5844 | }; |
| 5845 | |
| 5846 | // ZPR2Strided_with_zsub0_in_ZPRMul2 Bit set. |
| 5847 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2Bits[] = { |
| 5848 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 5849 | }; |
| 5850 | |
| 5851 | // ZPR2_with_qsub1_in_FPR128_0to7 Register Class... |
| 5852 | const MCPhysReg ZPR2_with_qsub1_in_FPR128_0to7[] = { |
| 5853 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z31_Z0, |
| 5854 | }; |
| 5855 | |
| 5856 | // ZPR2_with_qsub1_in_FPR128_0to7 Bit set. |
| 5857 | const uint8_t ZPR2_with_qsub1_in_FPR128_0to7Bits[] = { |
| 5858 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x40, |
| 5859 | }; |
| 5860 | |
| 5861 | // ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 5862 | const MCPhysReg ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 5863 | AArch64::Z0_Z1, AArch64::Z4_Z5, AArch64::Z8_Z9, AArch64::Z12_Z13, AArch64::Z16_Z17, AArch64::Z20_Z21, AArch64::Z24_Z25, AArch64::Z28_Z29, |
| 5864 | }; |
| 5865 | |
| 5866 | // ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 5867 | const uint8_t ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 5868 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, |
| 5869 | }; |
| 5870 | |
| 5871 | // ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 5872 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K[] = { |
| 5873 | AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z23_Z24, AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, AArch64::Z31_Z0, |
| 5874 | }; |
| 5875 | |
| 5876 | // ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 5877 | const uint8_t ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 5878 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x78, |
| 5879 | }; |
| 5880 | |
| 5881 | // ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 5882 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 5883 | AArch64::Z15_Z16, AArch64::Z17_Z18, AArch64::Z19_Z20, AArch64::Z21_Z22, AArch64::Z23_Z24, AArch64::Z25_Z26, AArch64::Z27_Z28, AArch64::Z29_Z30, |
| 5884 | }; |
| 5885 | |
| 5886 | // ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 5887 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 5888 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x55, 0x15, |
| 5889 | }; |
| 5890 | |
| 5891 | // ZPR2_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 5892 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_Lo[] = { |
| 5893 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z7_Z8, AArch64::Z9_Z10, AArch64::Z11_Z12, AArch64::Z13_Z14, AArch64::Z31_Z0, |
| 5894 | }; |
| 5895 | |
| 5896 | // ZPR2_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 5897 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 5898 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, 0x00, 0x40, |
| 5899 | }; |
| 5900 | |
| 5901 | // ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 5902 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 5903 | AArch64::Z3_Z4, AArch64::Z7_Z8, AArch64::Z11_Z12, AArch64::Z15_Z16, AArch64::Z19_Z20, AArch64::Z23_Z24, AArch64::Z27_Z28, AArch64::Z31_Z0, |
| 5904 | }; |
| 5905 | |
| 5906 | // ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 5907 | const uint8_t ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 5908 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x44, 0x44, |
| 5909 | }; |
| 5910 | |
| 5911 | // ZPR2_with_zsub1_in_ZPR_K Register Class... |
| 5912 | const MCPhysReg ZPR2_with_zsub1_in_ZPR_K[] = { |
| 5913 | AArch64::Z19_Z20, AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z27_Z28, AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, |
| 5914 | }; |
| 5915 | |
| 5916 | // ZPR2_with_zsub1_in_ZPR_K Bit set. |
| 5917 | const uint8_t ZPR2_with_zsub1_in_ZPR_KBits[] = { |
| 5918 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x3c, |
| 5919 | }; |
| 5920 | |
| 5921 | // ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 5922 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 5923 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, |
| 5924 | }; |
| 5925 | |
| 5926 | // ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 5927 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 5928 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 5929 | }; |
| 5930 | |
| 5931 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 Register Class... |
| 5932 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2[] = { |
| 5933 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z7_Z8, AArch64::Z9_Z10, AArch64::Z11_Z12, AArch64::Z13_Z14, AArch64::Z15_Z16, |
| 5934 | }; |
| 5935 | |
| 5936 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 Bit set. |
| 5937 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2Bits[] = { |
| 5938 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| 5939 | }; |
| 5940 | |
| 5941 | // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 5942 | const MCPhysReg QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7[] = { |
| 5943 | AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, |
| 5944 | }; |
| 5945 | |
| 5946 | // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 5947 | const uint8_t QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 5948 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 5949 | }; |
| 5950 | |
| 5951 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 Register Class... |
| 5952 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7[] = { |
| 5953 | AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, |
| 5954 | }; |
| 5955 | |
| 5956 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 Bit set. |
| 5957 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7Bits[] = { |
| 5958 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, |
| 5959 | }; |
| 5960 | |
| 5961 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 5962 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo[] = { |
| 5963 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z7_Z8, AArch64::Z9_Z10, AArch64::Z11_Z12, AArch64::Z13_Z14, |
| 5964 | }; |
| 5965 | |
| 5966 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 5967 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 5968 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, |
| 5969 | }; |
| 5970 | |
| 5971 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 5972 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 5973 | AArch64::Z16_Z24, AArch64::Z20_Z28, AArch64::Z16_Z17, AArch64::Z20_Z21, AArch64::Z24_Z25, AArch64::Z28_Z29, |
| 5974 | }; |
| 5975 | |
| 5976 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 5977 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 5978 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 5979 | }; |
| 5980 | |
| 5981 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 5982 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 5983 | AArch64::Z0_Z8, AArch64::Z4_Z12, AArch64::Z0_Z1, AArch64::Z4_Z5, AArch64::Z8_Z9, AArch64::Z12_Z13, |
| 5984 | }; |
| 5985 | |
| 5986 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 5987 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 5988 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 5989 | }; |
| 5990 | |
| 5991 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K Register Class... |
| 5992 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K[] = { |
| 5993 | AArch64::Z20_Z28, AArch64::Z22_Z30, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 5994 | }; |
| 5995 | |
| 5996 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K Bit set. |
| 5997 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KBits[] = { |
| 5998 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, |
| 5999 | }; |
| 6000 | |
| 6001 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K Register Class... |
| 6002 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K[] = { |
| 6003 | AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, |
| 6004 | }; |
| 6005 | |
| 6006 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K Bit set. |
| 6007 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KBits[] = { |
| 6008 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x38, |
| 6009 | }; |
| 6010 | |
| 6011 | // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6012 | const MCPhysReg ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6013 | AArch64::Z16_Z17, AArch64::Z20_Z21, AArch64::Z24_Z25, AArch64::Z28_Z29, |
| 6014 | }; |
| 6015 | |
| 6016 | // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6017 | const uint8_t ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6018 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 6019 | }; |
| 6020 | |
| 6021 | // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6022 | const MCPhysReg ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6023 | AArch64::Z0_Z1, AArch64::Z4_Z5, AArch64::Z8_Z9, AArch64::Z12_Z13, |
| 6024 | }; |
| 6025 | |
| 6026 | // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6027 | const uint8_t ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6028 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 6029 | }; |
| 6030 | |
| 6031 | // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 6032 | const MCPhysReg ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 6033 | AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z28_Z29, AArch64::Z30_Z31, |
| 6034 | }; |
| 6035 | |
| 6036 | // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 6037 | const uint8_t ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 6038 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28, |
| 6039 | }; |
| 6040 | |
| 6041 | // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 6042 | const MCPhysReg ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 6043 | AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, |
| 6044 | }; |
| 6045 | |
| 6046 | // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 6047 | const uint8_t ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 6048 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 6049 | }; |
| 6050 | |
| 6051 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b Register Class... |
| 6052 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b[] = { |
| 6053 | AArch64::Z0_Z8, AArch64::Z4_Z12, AArch64::Z0_Z1, AArch64::Z4_Z5, |
| 6054 | }; |
| 6055 | |
| 6056 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b Bit set. |
| 6057 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 6058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 6059 | }; |
| 6060 | |
| 6061 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi Register Class... |
| 6062 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2_Hi[] = { |
| 6063 | AArch64::Z16_Z24, AArch64::Z18_Z26, AArch64::Z20_Z28, AArch64::Z22_Z30, |
| 6064 | }; |
| 6065 | |
| 6066 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi Bit set. |
| 6067 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2_HiBits[] = { |
| 6068 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 6069 | }; |
| 6070 | |
| 6071 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo Register Class... |
| 6072 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2_Lo[] = { |
| 6073 | AArch64::Z0_Z8, AArch64::Z2_Z10, AArch64::Z4_Z12, AArch64::Z6_Z14, |
| 6074 | }; |
| 6075 | |
| 6076 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo Bit set. |
| 6077 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2_LoBits[] = { |
| 6078 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 6079 | }; |
| 6080 | |
| 6081 | // ZPR2Strided_with_zsub0_in_ZPRMul4 Register Class... |
| 6082 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul4[] = { |
| 6083 | AArch64::Z0_Z8, AArch64::Z4_Z12, AArch64::Z16_Z24, AArch64::Z20_Z28, |
| 6084 | }; |
| 6085 | |
| 6086 | // ZPR2Strided_with_zsub0_in_ZPRMul4 Bit set. |
| 6087 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul4Bits[] = { |
| 6088 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 6089 | }; |
| 6090 | |
| 6091 | // ZPR2Strided_with_zsub0_in_ZPR_K Register Class... |
| 6092 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPR_K[] = { |
| 6093 | AArch64::Z20_Z28, AArch64::Z21_Z29, AArch64::Z22_Z30, AArch64::Z23_Z31, |
| 6094 | }; |
| 6095 | |
| 6096 | // ZPR2Strided_with_zsub0_in_ZPR_K Bit set. |
| 6097 | const uint8_t ZPR2Strided_with_zsub0_in_ZPR_KBits[] = { |
| 6098 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 6099 | }; |
| 6100 | |
| 6101 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 Register Class... |
| 6102 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2[] = { |
| 6103 | AArch64::Z21_Z22, AArch64::Z23_Z24, AArch64::Z29_Z30, AArch64::Z31_Z0, |
| 6104 | }; |
| 6105 | |
| 6106 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 Bit set. |
| 6107 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits[] = { |
| 6108 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x50, |
| 6109 | }; |
| 6110 | |
| 6111 | // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 6112 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 6113 | AArch64::Z15_Z16, AArch64::Z19_Z20, AArch64::Z23_Z24, AArch64::Z27_Z28, |
| 6114 | }; |
| 6115 | |
| 6116 | // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 6117 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 6118 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x44, 0x04, |
| 6119 | }; |
| 6120 | |
| 6121 | // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 6122 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 6123 | AArch64::Z3_Z4, AArch64::Z7_Z8, AArch64::Z11_Z12, AArch64::Z31_Z0, |
| 6124 | }; |
| 6125 | |
| 6126 | // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 6127 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 6128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, 0x00, 0x40, |
| 6129 | }; |
| 6130 | |
| 6131 | // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b Register Class... |
| 6132 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b[] = { |
| 6133 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z31_Z0, |
| 6134 | }; |
| 6135 | |
| 6136 | // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b Bit set. |
| 6137 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 6138 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x40, |
| 6139 | }; |
| 6140 | |
| 6141 | // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K Register Class... |
| 6142 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K[] = { |
| 6143 | AArch64::Z19_Z20, AArch64::Z21_Z22, AArch64::Z27_Z28, AArch64::Z29_Z30, |
| 6144 | }; |
| 6145 | |
| 6146 | // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K Bit set. |
| 6147 | const uint8_t ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits[] = { |
| 6148 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x14, |
| 6149 | }; |
| 6150 | |
| 6151 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 Register Class... |
| 6152 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2[] = { |
| 6153 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, AArch64::Z7_Z8, |
| 6154 | }; |
| 6155 | |
| 6156 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 Bit set. |
| 6157 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2Bits[] = { |
| 6158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 6159 | }; |
| 6160 | |
| 6161 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 6162 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 6163 | AArch64::Z3_Z4, AArch64::Z7_Z8, AArch64::Z11_Z12, AArch64::Z15_Z16, |
| 6164 | }; |
| 6165 | |
| 6166 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 6167 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 6168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, |
| 6169 | }; |
| 6170 | |
| 6171 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K Register Class... |
| 6172 | const MCPhysReg ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K[] = { |
| 6173 | AArch64::Z20_Z28, AArch64::Z20_Z21, AArch64::Z28_Z29, |
| 6174 | }; |
| 6175 | |
| 6176 | // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K Bit set. |
| 6177 | const uint8_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KBits[] = { |
| 6178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 6179 | }; |
| 6180 | |
| 6181 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 6182 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 6183 | AArch64::Z21_Z22, AArch64::Z23_Z24, AArch64::Z29_Z30, |
| 6184 | }; |
| 6185 | |
| 6186 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 6187 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 6188 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x10, |
| 6189 | }; |
| 6190 | |
| 6191 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b Register Class... |
| 6192 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b[] = { |
| 6193 | AArch64::Z1_Z2, AArch64::Z3_Z4, AArch64::Z5_Z6, |
| 6194 | }; |
| 6195 | |
| 6196 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b Bit set. |
| 6197 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 6198 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, |
| 6199 | }; |
| 6200 | |
| 6201 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 6202 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 6203 | AArch64::Z3_Z4, AArch64::Z7_Z8, AArch64::Z11_Z12, |
| 6204 | }; |
| 6205 | |
| 6206 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 6207 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 6208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, |
| 6209 | }; |
| 6210 | |
| 6211 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 6212 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 6213 | AArch64::Z16_Z24, AArch64::Z20_Z28, |
| 6214 | }; |
| 6215 | |
| 6216 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 6217 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 6218 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 6219 | }; |
| 6220 | |
| 6221 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 6222 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 6223 | AArch64::Z0_Z8, AArch64::Z4_Z12, |
| 6224 | }; |
| 6225 | |
| 6226 | // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 6227 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 6228 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 6229 | }; |
| 6230 | |
| 6231 | // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K Register Class... |
| 6232 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K[] = { |
| 6233 | AArch64::Z20_Z28, AArch64::Z22_Z30, |
| 6234 | }; |
| 6235 | |
| 6236 | // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K Bit set. |
| 6237 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KBits[] = { |
| 6238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, |
| 6239 | }; |
| 6240 | |
| 6241 | // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b Register Class... |
| 6242 | const MCPhysReg ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b[] = { |
| 6243 | AArch64::Z0_Z1, AArch64::Z4_Z5, |
| 6244 | }; |
| 6245 | |
| 6246 | // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b Bit set. |
| 6247 | const uint8_t ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 6248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 6249 | }; |
| 6250 | |
| 6251 | // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K Register Class... |
| 6252 | const MCPhysReg ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K[] = { |
| 6253 | AArch64::Z20_Z21, AArch64::Z28_Z29, |
| 6254 | }; |
| 6255 | |
| 6256 | // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K Bit set. |
| 6257 | const uint8_t ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KBits[] = { |
| 6258 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, |
| 6259 | }; |
| 6260 | |
| 6261 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K Register Class... |
| 6262 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K[] = { |
| 6263 | AArch64::Z21_Z22, AArch64::Z29_Z30, |
| 6264 | }; |
| 6265 | |
| 6266 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K Bit set. |
| 6267 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits[] = { |
| 6268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, |
| 6269 | }; |
| 6270 | |
| 6271 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 6272 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 6273 | AArch64::Z23_Z24, AArch64::Z31_Z0, |
| 6274 | }; |
| 6275 | |
| 6276 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 6277 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 6278 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x40, |
| 6279 | }; |
| 6280 | |
| 6281 | // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 6282 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 6283 | AArch64::Z3_Z4, AArch64::Z31_Z0, |
| 6284 | }; |
| 6285 | |
| 6286 | // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 6287 | const uint8_t ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 6288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, |
| 6289 | }; |
| 6290 | |
| 6291 | // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K Register Class... |
| 6292 | const MCPhysReg ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K[] = { |
| 6293 | AArch64::Z19_Z20, AArch64::Z27_Z28, |
| 6294 | }; |
| 6295 | |
| 6296 | // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K Bit set. |
| 6297 | const uint8_t ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KBits[] = { |
| 6298 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, |
| 6299 | }; |
| 6300 | |
| 6301 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 6302 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 6303 | AArch64::Z3_Z4, AArch64::Z7_Z8, |
| 6304 | }; |
| 6305 | |
| 6306 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 6307 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 6308 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, |
| 6309 | }; |
| 6310 | |
| 6311 | // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K Register Class... |
| 6312 | const MCPhysReg ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K[] = { |
| 6313 | AArch64::Z20_Z28, |
| 6314 | }; |
| 6315 | |
| 6316 | // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K Bit set. |
| 6317 | const uint8_t ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KBits[] = { |
| 6318 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 6319 | }; |
| 6320 | |
| 6321 | // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 6322 | const MCPhysReg ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 6323 | AArch64::Z31_Z0, |
| 6324 | }; |
| 6325 | |
| 6326 | // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 6327 | const uint8_t ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 6328 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 6329 | }; |
| 6330 | |
| 6331 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 6332 | const MCPhysReg ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 6333 | AArch64::Z23_Z24, |
| 6334 | }; |
| 6335 | |
| 6336 | // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 6337 | const uint8_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 6338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 6339 | }; |
| 6340 | |
| 6341 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 6342 | const MCPhysReg ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 6343 | AArch64::Z3_Z4, |
| 6344 | }; |
| 6345 | |
| 6346 | // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 6347 | const uint8_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 6348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 6349 | }; |
| 6350 | |
| 6351 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 6352 | const MCPhysReg ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 6353 | AArch64::Z15_Z16, |
| 6354 | }; |
| 6355 | |
| 6356 | // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 6357 | const uint8_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 6358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 6359 | }; |
| 6360 | |
| 6361 | // MPR64 Register Class... |
| 6362 | const MCPhysReg MPR64[] = { |
| 6363 | AArch64::ZAD0, AArch64::ZAD1, AArch64::ZAD2, AArch64::ZAD3, AArch64::ZAD4, AArch64::ZAD5, AArch64::ZAD6, AArch64::ZAD7, |
| 6364 | }; |
| 6365 | |
| 6366 | // MPR64 Bit set. |
| 6367 | const uint8_t MPR64Bits[] = { |
| 6368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, |
| 6369 | }; |
| 6370 | |
| 6371 | // QQQ Register Class... |
| 6372 | const MCPhysReg QQQ[] = { |
| 6373 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, AArch64::Q16_Q17_Q18, AArch64::Q17_Q18_Q19, AArch64::Q18_Q19_Q20, AArch64::Q19_Q20_Q21, AArch64::Q20_Q21_Q22, AArch64::Q21_Q22_Q23, AArch64::Q22_Q23_Q24, AArch64::Q23_Q24_Q25, AArch64::Q24_Q25_Q26, AArch64::Q25_Q26_Q27, AArch64::Q26_Q27_Q28, AArch64::Q27_Q28_Q29, AArch64::Q28_Q29_Q30, AArch64::Q29_Q30_Q31, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, |
| 6374 | }; |
| 6375 | |
| 6376 | // QQQ Bit set. |
| 6377 | const uint8_t QQQBits[] = { |
| 6378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 6379 | }; |
| 6380 | |
| 6381 | // ZPR3 Register Class... |
| 6382 | const MCPhysReg ZPR3[] = { |
| 6383 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z15_Z16_Z17, AArch64::Z16_Z17_Z18, AArch64::Z17_Z18_Z19, AArch64::Z18_Z19_Z20, AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z23_Z24_Z25, AArch64::Z24_Z25_Z26, AArch64::Z25_Z26_Z27, AArch64::Z26_Z27_Z28, AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, |
| 6384 | }; |
| 6385 | |
| 6386 | // ZPR3 Bit set. |
| 6387 | const uint8_t ZPR3Bits[] = { |
| 6388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, |
| 6389 | }; |
| 6390 | |
| 6391 | // QQQ_with_dsub1_in_FPR64_lo Register Class... |
| 6392 | const MCPhysReg QQQ_with_dsub1_in_FPR64_lo[] = { |
| 6393 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q31_Q0_Q1, |
| 6394 | }; |
| 6395 | |
| 6396 | // QQQ_with_dsub1_in_FPR64_lo Bit set. |
| 6397 | const uint8_t QQQ_with_dsub1_in_FPR64_loBits[] = { |
| 6398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 6399 | }; |
| 6400 | |
| 6401 | // QQQ_with_dsub2_in_FPR64_lo Register Class... |
| 6402 | const MCPhysReg QQQ_with_dsub2_in_FPR64_lo[] = { |
| 6403 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, |
| 6404 | }; |
| 6405 | |
| 6406 | // QQQ_with_dsub2_in_FPR64_lo Bit set. |
| 6407 | const uint8_t QQQ_with_dsub2_in_FPR64_loBits[] = { |
| 6408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x06, |
| 6409 | }; |
| 6410 | |
| 6411 | // QQQ_with_qsub0_in_FPR128_lo Register Class... |
| 6412 | const MCPhysReg QQQ_with_qsub0_in_FPR128_lo[] = { |
| 6413 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, |
| 6414 | }; |
| 6415 | |
| 6416 | // QQQ_with_qsub0_in_FPR128_lo Bit set. |
| 6417 | const uint8_t QQQ_with_qsub0_in_FPR128_loBits[] = { |
| 6418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 6419 | }; |
| 6420 | |
| 6421 | // ZPR3_with_dsub1_in_FPR64_lo Register Class... |
| 6422 | const MCPhysReg ZPR3_with_dsub1_in_FPR64_lo[] = { |
| 6423 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z31_Z0_Z1, |
| 6424 | }; |
| 6425 | |
| 6426 | // ZPR3_with_dsub1_in_FPR64_lo Bit set. |
| 6427 | const uint8_t ZPR3_with_dsub1_in_FPR64_loBits[] = { |
| 6428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, 0x00, 0x40, |
| 6429 | }; |
| 6430 | |
| 6431 | // ZPR3_with_dsub2_in_FPR64_lo Register Class... |
| 6432 | const MCPhysReg ZPR3_with_dsub2_in_FPR64_lo[] = { |
| 6433 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, |
| 6434 | }; |
| 6435 | |
| 6436 | // ZPR3_with_dsub2_in_FPR64_lo Bit set. |
| 6437 | const uint8_t ZPR3_with_dsub2_in_FPR64_loBits[] = { |
| 6438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0x00, 0x60, |
| 6439 | }; |
| 6440 | |
| 6441 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... |
| 6442 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { |
| 6443 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z14_Z15_Z16, AArch64::Z16_Z17_Z18, AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z24_Z25_Z26, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, AArch64::Z30_Z31_Z0, |
| 6444 | }; |
| 6445 | |
| 6446 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. |
| 6447 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { |
| 6448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x2a, |
| 6449 | }; |
| 6450 | |
| 6451 | // ZPR3_with_zsub1_in_ZPRMul2 Register Class... |
| 6452 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul2[] = { |
| 6453 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z15_Z16_Z17, AArch64::Z17_Z18_Z19, AArch64::Z19_Z20_Z21, AArch64::Z21_Z22_Z23, AArch64::Z23_Z24_Z25, AArch64::Z25_Z26_Z27, AArch64::Z27_Z28_Z29, AArch64::Z29_Z30_Z31, AArch64::Z31_Z0_Z1, |
| 6454 | }; |
| 6455 | |
| 6456 | // ZPR3_with_zsub1_in_ZPRMul2 Bit set. |
| 6457 | const uint8_t ZPR3_with_zsub1_in_ZPRMul2Bits[] = { |
| 6458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, |
| 6459 | }; |
| 6460 | |
| 6461 | // ZPR3_with_zsub_in_FPR128_lo Register Class... |
| 6462 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo[] = { |
| 6463 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z15_Z16_Z17, |
| 6464 | }; |
| 6465 | |
| 6466 | // ZPR3_with_zsub_in_FPR128_lo Bit set. |
| 6467 | const uint8_t ZPR3_with_zsub_in_FPR128_loBits[] = { |
| 6468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 6469 | }; |
| 6470 | |
| 6471 | // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo Register Class... |
| 6472 | const MCPhysReg QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo[] = { |
| 6473 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q31_Q0_Q1, |
| 6474 | }; |
| 6475 | |
| 6476 | // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo Bit set. |
| 6477 | const uint8_t QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loBits[] = { |
| 6478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x04, |
| 6479 | }; |
| 6480 | |
| 6481 | // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo Register Class... |
| 6482 | const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo[] = { |
| 6483 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, |
| 6484 | }; |
| 6485 | |
| 6486 | // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo Bit set. |
| 6487 | const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loBits[] = { |
| 6488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 6489 | }; |
| 6490 | |
| 6491 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo Register Class... |
| 6492 | const MCPhysReg ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo[] = { |
| 6493 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z31_Z0_Z1, |
| 6494 | }; |
| 6495 | |
| 6496 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo Bit set. |
| 6497 | const uint8_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loBits[] = { |
| 6498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0x00, 0x40, |
| 6499 | }; |
| 6500 | |
| 6501 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo Register Class... |
| 6502 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo[] = { |
| 6503 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, |
| 6504 | }; |
| 6505 | |
| 6506 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo Bit set. |
| 6507 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loBits[] = { |
| 6508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, |
| 6509 | }; |
| 6510 | |
| 6511 | // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo Register Class... |
| 6512 | const MCPhysReg QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo[] = { |
| 6513 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, |
| 6514 | }; |
| 6515 | |
| 6516 | // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo Bit set. |
| 6517 | const uint8_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loBits[] = { |
| 6518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, |
| 6519 | }; |
| 6520 | |
| 6521 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo Register Class... |
| 6522 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo[] = { |
| 6523 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, |
| 6524 | }; |
| 6525 | |
| 6526 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo Bit set. |
| 6527 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loBits[] = { |
| 6528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, |
| 6529 | }; |
| 6530 | |
| 6531 | // QQQ_with_qsub0_in_FPR128_0to7 Register Class... |
| 6532 | const MCPhysReg QQQ_with_qsub0_in_FPR128_0to7[] = { |
| 6533 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, |
| 6534 | }; |
| 6535 | |
| 6536 | // QQQ_with_qsub0_in_FPR128_0to7 Bit set. |
| 6537 | const uint8_t QQQ_with_qsub0_in_FPR128_0to7Bits[] = { |
| 6538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 6539 | }; |
| 6540 | |
| 6541 | // QQQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 6542 | const MCPhysReg QQQ_with_qsub1_in_FPR128_0to7[] = { |
| 6543 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q31_Q0_Q1, |
| 6544 | }; |
| 6545 | |
| 6546 | // QQQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 6547 | const uint8_t QQQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 6548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x00, 0x00, 0x04, |
| 6549 | }; |
| 6550 | |
| 6551 | // QQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 6552 | const MCPhysReg QQQ_with_qsub2_in_FPR128_0to7[] = { |
| 6553 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, |
| 6554 | }; |
| 6555 | |
| 6556 | // QQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 6557 | const uint8_t QQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x00, 0x06, |
| 6559 | }; |
| 6560 | |
| 6561 | // ZPR3_with_qsub1_in_FPR128_0to7 Register Class... |
| 6562 | const MCPhysReg ZPR3_with_qsub1_in_FPR128_0to7[] = { |
| 6563 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z31_Z0_Z1, |
| 6564 | }; |
| 6565 | |
| 6566 | // ZPR3_with_qsub1_in_FPR128_0to7 Bit set. |
| 6567 | const uint8_t ZPR3_with_qsub1_in_FPR128_0to7Bits[] = { |
| 6568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x40, |
| 6569 | }; |
| 6570 | |
| 6571 | // ZPR3_with_qsub2_in_FPR128_0to7 Register Class... |
| 6572 | const MCPhysReg ZPR3_with_qsub2_in_FPR128_0to7[] = { |
| 6573 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, |
| 6574 | }; |
| 6575 | |
| 6576 | // ZPR3_with_qsub2_in_FPR128_0to7 Bit set. |
| 6577 | const uint8_t ZPR3_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x60, |
| 6579 | }; |
| 6580 | |
| 6581 | // ZPR3_with_zsub0_in_ZPRMul4 Register Class... |
| 6582 | const MCPhysReg ZPR3_with_zsub0_in_ZPRMul4[] = { |
| 6583 | AArch64::Z0_Z1_Z2, AArch64::Z4_Z5_Z6, AArch64::Z8_Z9_Z10, AArch64::Z12_Z13_Z14, AArch64::Z16_Z17_Z18, AArch64::Z20_Z21_Z22, AArch64::Z24_Z25_Z26, AArch64::Z28_Z29_Z30, |
| 6584 | }; |
| 6585 | |
| 6586 | // ZPR3_with_zsub0_in_ZPRMul4 Bit set. |
| 6587 | const uint8_t ZPR3_with_zsub0_in_ZPRMul4Bits[] = { |
| 6588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, |
| 6589 | }; |
| 6590 | |
| 6591 | // ZPR3_with_zsub0_in_ZPR_K Register Class... |
| 6592 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K[] = { |
| 6593 | AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z23_Z24_Z25, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, |
| 6594 | }; |
| 6595 | |
| 6596 | // ZPR3_with_zsub0_in_ZPR_K Bit set. |
| 6597 | const uint8_t ZPR3_with_zsub0_in_ZPR_KBits[] = { |
| 6598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x78, |
| 6599 | }; |
| 6600 | |
| 6601 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi Register Class... |
| 6602 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi[] = { |
| 6603 | AArch64::Z16_Z17_Z18, AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z24_Z25_Z26, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, AArch64::Z30_Z31_Z0, |
| 6604 | }; |
| 6605 | |
| 6606 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi Bit set. |
| 6607 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits[] = { |
| 6608 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 6609 | }; |
| 6610 | |
| 6611 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo Register Class... |
| 6612 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo[] = { |
| 6613 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z14_Z15_Z16, |
| 6614 | }; |
| 6615 | |
| 6616 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo Bit set. |
| 6617 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoBits[] = { |
| 6618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 6619 | }; |
| 6620 | |
| 6621 | // ZPR3_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 6622 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul2_Hi[] = { |
| 6623 | AArch64::Z15_Z16_Z17, AArch64::Z17_Z18_Z19, AArch64::Z19_Z20_Z21, AArch64::Z21_Z22_Z23, AArch64::Z23_Z24_Z25, AArch64::Z25_Z26_Z27, AArch64::Z27_Z28_Z29, AArch64::Z29_Z30_Z31, |
| 6624 | }; |
| 6625 | |
| 6626 | // ZPR3_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 6627 | const uint8_t ZPR3_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 6628 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x55, 0x15, |
| 6629 | }; |
| 6630 | |
| 6631 | // ZPR3_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 6632 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul2_Lo[] = { |
| 6633 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z31_Z0_Z1, |
| 6634 | }; |
| 6635 | |
| 6636 | // ZPR3_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 6637 | const uint8_t ZPR3_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 6638 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, 0x00, 0x40, |
| 6639 | }; |
| 6640 | |
| 6641 | // ZPR3_with_zsub1_in_ZPRMul4 Register Class... |
| 6642 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul4[] = { |
| 6643 | AArch64::Z3_Z4_Z5, AArch64::Z7_Z8_Z9, AArch64::Z11_Z12_Z13, AArch64::Z15_Z16_Z17, AArch64::Z19_Z20_Z21, AArch64::Z23_Z24_Z25, AArch64::Z27_Z28_Z29, AArch64::Z31_Z0_Z1, |
| 6644 | }; |
| 6645 | |
| 6646 | // ZPR3_with_zsub1_in_ZPRMul4 Bit set. |
| 6647 | const uint8_t ZPR3_with_zsub1_in_ZPRMul4Bits[] = { |
| 6648 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x44, 0x44, |
| 6649 | }; |
| 6650 | |
| 6651 | // ZPR3_with_zsub1_in_ZPR_K Register Class... |
| 6652 | const MCPhysReg ZPR3_with_zsub1_in_ZPR_K[] = { |
| 6653 | AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, AArch64::Z30_Z31_Z0, |
| 6654 | }; |
| 6655 | |
| 6656 | // ZPR3_with_zsub1_in_ZPR_K Bit set. |
| 6657 | const uint8_t ZPR3_with_zsub1_in_ZPR_KBits[] = { |
| 6658 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x3c, |
| 6659 | }; |
| 6660 | |
| 6661 | // ZPR3_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 6662 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_Hi[] = { |
| 6663 | AArch64::Z14_Z15_Z16, AArch64::Z16_Z17_Z18, AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z24_Z25_Z26, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, |
| 6664 | }; |
| 6665 | |
| 6666 | // ZPR3_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 6667 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 6668 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x0a, |
| 6669 | }; |
| 6670 | |
| 6671 | // ZPR3_with_zsub2_in_ZPRMul2_Lo Register Class... |
| 6672 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_Lo[] = { |
| 6673 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z30_Z31_Z0, |
| 6674 | }; |
| 6675 | |
| 6676 | // ZPR3_with_zsub2_in_ZPRMul2_Lo Bit set. |
| 6677 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_LoBits[] = { |
| 6678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, 0x00, 0x20, |
| 6679 | }; |
| 6680 | |
| 6681 | // ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 6682 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 6683 | AArch64::Z2_Z3_Z4, AArch64::Z6_Z7_Z8, AArch64::Z10_Z11_Z12, AArch64::Z14_Z15_Z16, AArch64::Z18_Z19_Z20, AArch64::Z22_Z23_Z24, AArch64::Z26_Z27_Z28, AArch64::Z30_Z31_Z0, |
| 6684 | }; |
| 6685 | |
| 6686 | // ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 6687 | const uint8_t ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 6688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, 0x22, 0x22, |
| 6689 | }; |
| 6690 | |
| 6691 | // ZPR3_with_zsub2_in_ZPR_K Register Class... |
| 6692 | const MCPhysReg ZPR3_with_zsub2_in_ZPR_K[] = { |
| 6693 | AArch64::Z18_Z19_Z20, AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z26_Z27_Z28, AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, |
| 6694 | }; |
| 6695 | |
| 6696 | // ZPR3_with_zsub2_in_ZPR_K Bit set. |
| 6697 | const uint8_t ZPR3_with_zsub2_in_ZPR_KBits[] = { |
| 6698 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x1e, |
| 6699 | }; |
| 6700 | |
| 6701 | // ZPR3_with_zsub_in_FPR128_0to7 Register Class... |
| 6702 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7[] = { |
| 6703 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, |
| 6704 | }; |
| 6705 | |
| 6706 | // ZPR3_with_zsub_in_FPR128_0to7 Bit set. |
| 6707 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7Bits[] = { |
| 6708 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 6709 | }; |
| 6710 | |
| 6711 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 Register Class... |
| 6712 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2[] = { |
| 6713 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z15_Z16_Z17, |
| 6714 | }; |
| 6715 | |
| 6716 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 Bit set. |
| 6717 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2Bits[] = { |
| 6718 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| 6719 | }; |
| 6720 | |
| 6721 | // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 6722 | const MCPhysReg QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7[] = { |
| 6723 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q31_Q0_Q1, |
| 6724 | }; |
| 6725 | |
| 6726 | // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 6727 | const uint8_t QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6728 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x00, 0x04, |
| 6729 | }; |
| 6730 | |
| 6731 | // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 6732 | const MCPhysReg QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7[] = { |
| 6733 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, |
| 6734 | }; |
| 6735 | |
| 6736 | // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 6737 | const uint8_t QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 6738 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 6739 | }; |
| 6740 | |
| 6741 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 Register Class... |
| 6742 | const MCPhysReg ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7[] = { |
| 6743 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z31_Z0_Z1, |
| 6744 | }; |
| 6745 | |
| 6746 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 Bit set. |
| 6747 | const uint8_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6748 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x40, |
| 6749 | }; |
| 6750 | |
| 6751 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 6752 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi[] = { |
| 6753 | AArch64::Z16_Z17_Z18, AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z24_Z25_Z26, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, |
| 6754 | }; |
| 6755 | |
| 6756 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 6757 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 6758 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| 6759 | }; |
| 6760 | |
| 6761 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 Register Class... |
| 6762 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7[] = { |
| 6763 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, |
| 6764 | }; |
| 6765 | |
| 6766 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 Bit set. |
| 6767 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7Bits[] = { |
| 6768 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, |
| 6769 | }; |
| 6770 | |
| 6771 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 6772 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo[] = { |
| 6773 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, |
| 6774 | }; |
| 6775 | |
| 6776 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 6777 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 6778 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, |
| 6779 | }; |
| 6780 | |
| 6781 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo Register Class... |
| 6782 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo[] = { |
| 6783 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, |
| 6784 | }; |
| 6785 | |
| 6786 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo Bit set. |
| 6787 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoBits[] = { |
| 6788 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| 6789 | }; |
| 6790 | |
| 6791 | // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 6792 | const MCPhysReg QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7[] = { |
| 6793 | AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, |
| 6794 | }; |
| 6795 | |
| 6796 | // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 6797 | const uint8_t QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6798 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, |
| 6799 | }; |
| 6800 | |
| 6801 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K Register Class... |
| 6802 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K[] = { |
| 6803 | AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, AArch64::Z30_Z31_Z0, |
| 6804 | }; |
| 6805 | |
| 6806 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K Bit set. |
| 6807 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KBits[] = { |
| 6808 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x38, |
| 6809 | }; |
| 6810 | |
| 6811 | // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K Register Class... |
| 6812 | const MCPhysReg ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K[] = { |
| 6813 | AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, |
| 6814 | }; |
| 6815 | |
| 6816 | // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K Bit set. |
| 6817 | const uint8_t ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits[] = { |
| 6818 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x1c, |
| 6819 | }; |
| 6820 | |
| 6821 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 Register Class... |
| 6822 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7[] = { |
| 6823 | AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, |
| 6824 | }; |
| 6825 | |
| 6826 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 Bit set. |
| 6827 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7Bits[] = { |
| 6828 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, |
| 6829 | }; |
| 6830 | |
| 6831 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 Register Class... |
| 6832 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2[] = { |
| 6833 | AArch64::Z21_Z22_Z23, AArch64::Z23_Z24_Z25, AArch64::Z29_Z30_Z31, AArch64::Z31_Z0_Z1, |
| 6834 | }; |
| 6835 | |
| 6836 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 Bit set. |
| 6837 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2Bits[] = { |
| 6838 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x50, |
| 6839 | }; |
| 6840 | |
| 6841 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K Register Class... |
| 6842 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K[] = { |
| 6843 | AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, |
| 6844 | }; |
| 6845 | |
| 6846 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K Bit set. |
| 6847 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits[] = { |
| 6848 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, |
| 6849 | }; |
| 6850 | |
| 6851 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6852 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6853 | AArch64::Z16_Z17_Z18, AArch64::Z20_Z21_Z22, AArch64::Z24_Z25_Z26, AArch64::Z28_Z29_Z30, |
| 6854 | }; |
| 6855 | |
| 6856 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6857 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6858 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 6859 | }; |
| 6860 | |
| 6861 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 6862 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 6863 | AArch64::Z18_Z19_Z20, AArch64::Z22_Z23_Z24, AArch64::Z26_Z27_Z28, AArch64::Z30_Z31_Z0, |
| 6864 | }; |
| 6865 | |
| 6866 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 6867 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 6868 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, |
| 6869 | }; |
| 6870 | |
| 6871 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6872 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6873 | AArch64::Z0_Z1_Z2, AArch64::Z4_Z5_Z6, AArch64::Z8_Z9_Z10, AArch64::Z12_Z13_Z14, |
| 6874 | }; |
| 6875 | |
| 6876 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6877 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6878 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 6879 | }; |
| 6880 | |
| 6881 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 6882 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 6883 | AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z28_Z29_Z30, AArch64::Z30_Z31_Z0, |
| 6884 | }; |
| 6885 | |
| 6886 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 6887 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 6888 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28, |
| 6889 | }; |
| 6890 | |
| 6891 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 6892 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 6893 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, |
| 6894 | }; |
| 6895 | |
| 6896 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 6897 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 6898 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 6899 | }; |
| 6900 | |
| 6901 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6902 | const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6903 | AArch64::Z15_Z16_Z17, AArch64::Z19_Z20_Z21, AArch64::Z23_Z24_Z25, AArch64::Z27_Z28_Z29, |
| 6904 | }; |
| 6905 | |
| 6906 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6907 | const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6908 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x44, 0x04, |
| 6909 | }; |
| 6910 | |
| 6911 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 6912 | const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 6913 | AArch64::Z3_Z4_Z5, AArch64::Z7_Z8_Z9, AArch64::Z11_Z12_Z13, AArch64::Z31_Z0_Z1, |
| 6914 | }; |
| 6915 | |
| 6916 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 6917 | const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 6918 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, 0x00, 0x40, |
| 6919 | }; |
| 6920 | |
| 6921 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 6922 | const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 6923 | AArch64::Z19_Z20_Z21, AArch64::Z21_Z22_Z23, AArch64::Z27_Z28_Z29, AArch64::Z29_Z30_Z31, |
| 6924 | }; |
| 6925 | |
| 6926 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 6927 | const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 6928 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x14, |
| 6929 | }; |
| 6930 | |
| 6931 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 6932 | const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 6933 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z31_Z0_Z1, |
| 6934 | }; |
| 6935 | |
| 6936 | // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 6937 | const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 6938 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x40, |
| 6939 | }; |
| 6940 | |
| 6941 | // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 6942 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 6943 | AArch64::Z14_Z15_Z16, AArch64::Z18_Z19_Z20, AArch64::Z22_Z23_Z24, AArch64::Z26_Z27_Z28, |
| 6944 | }; |
| 6945 | |
| 6946 | // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 6947 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 6948 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x22, 0x02, |
| 6949 | }; |
| 6950 | |
| 6951 | // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 6952 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 6953 | AArch64::Z2_Z3_Z4, AArch64::Z6_Z7_Z8, AArch64::Z10_Z11_Z12, AArch64::Z30_Z31_Z0, |
| 6954 | }; |
| 6955 | |
| 6956 | // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 6957 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 6958 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x00, 0x20, |
| 6959 | }; |
| 6960 | |
| 6961 | // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b Register Class... |
| 6962 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b[] = { |
| 6963 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z30_Z31_Z0, |
| 6964 | }; |
| 6965 | |
| 6966 | // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b Bit set. |
| 6967 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 6968 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, 0x00, 0x00, 0x20, |
| 6969 | }; |
| 6970 | |
| 6971 | // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K Register Class... |
| 6972 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K[] = { |
| 6973 | AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, |
| 6974 | }; |
| 6975 | |
| 6976 | // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K Bit set. |
| 6977 | const uint8_t ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KBits[] = { |
| 6978 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, |
| 6979 | }; |
| 6980 | |
| 6981 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 Register Class... |
| 6982 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2[] = { |
| 6983 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, |
| 6984 | }; |
| 6985 | |
| 6986 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 Bit set. |
| 6987 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2Bits[] = { |
| 6988 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 6989 | }; |
| 6990 | |
| 6991 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 Register Class... |
| 6992 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4[] = { |
| 6993 | AArch64::Z3_Z4_Z5, AArch64::Z7_Z8_Z9, AArch64::Z11_Z12_Z13, AArch64::Z15_Z16_Z17, |
| 6994 | }; |
| 6995 | |
| 6996 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 Bit set. |
| 6997 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4Bits[] = { |
| 6998 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, |
| 6999 | }; |
| 7000 | |
| 7001 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 7002 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 7003 | AArch64::Z2_Z3_Z4, AArch64::Z6_Z7_Z8, AArch64::Z10_Z11_Z12, AArch64::Z14_Z15_Z16, |
| 7004 | }; |
| 7005 | |
| 7006 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 7007 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 7008 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, |
| 7009 | }; |
| 7010 | |
| 7011 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 7012 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi[] = { |
| 7013 | AArch64::Z21_Z22_Z23, AArch64::Z23_Z24_Z25, AArch64::Z29_Z30_Z31, |
| 7014 | }; |
| 7015 | |
| 7016 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 7017 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 7018 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x10, |
| 7019 | }; |
| 7020 | |
| 7021 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 7022 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 7023 | AArch64::Z18_Z19_Z20, AArch64::Z22_Z23_Z24, AArch64::Z26_Z27_Z28, |
| 7024 | }; |
| 7025 | |
| 7026 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 7027 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 7028 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, |
| 7029 | }; |
| 7030 | |
| 7031 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 7032 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 7033 | AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z28_Z29_Z30, |
| 7034 | }; |
| 7035 | |
| 7036 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 7037 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 7038 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x08, |
| 7039 | }; |
| 7040 | |
| 7041 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 7042 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 7043 | AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, |
| 7044 | }; |
| 7045 | |
| 7046 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 7047 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 7048 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, |
| 7049 | }; |
| 7050 | |
| 7051 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b Register Class... |
| 7052 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b[] = { |
| 7053 | AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, |
| 7054 | }; |
| 7055 | |
| 7056 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b Bit set. |
| 7057 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 7058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, |
| 7059 | }; |
| 7060 | |
| 7061 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 7062 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 7063 | AArch64::Z3_Z4_Z5, AArch64::Z7_Z8_Z9, AArch64::Z11_Z12_Z13, |
| 7064 | }; |
| 7065 | |
| 7066 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 7067 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 7068 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, |
| 7069 | }; |
| 7070 | |
| 7071 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 7072 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 7073 | AArch64::Z2_Z3_Z4, AArch64::Z6_Z7_Z8, AArch64::Z10_Z11_Z12, |
| 7074 | }; |
| 7075 | |
| 7076 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 7077 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 7078 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, |
| 7079 | }; |
| 7080 | |
| 7081 | // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K Register Class... |
| 7082 | const MCPhysReg ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K[] = { |
| 7083 | AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, |
| 7084 | }; |
| 7085 | |
| 7086 | // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K Bit set. |
| 7087 | const uint8_t ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits[] = { |
| 7088 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, |
| 7089 | }; |
| 7090 | |
| 7091 | // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b Register Class... |
| 7092 | const MCPhysReg ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b[] = { |
| 7093 | AArch64::Z0_Z1_Z2, AArch64::Z4_Z5_Z6, |
| 7094 | }; |
| 7095 | |
| 7096 | // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b Bit set. |
| 7097 | const uint8_t ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 7098 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 7099 | }; |
| 7100 | |
| 7101 | // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K Register Class... |
| 7102 | const MCPhysReg ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K[] = { |
| 7103 | AArch64::Z20_Z21_Z22, AArch64::Z28_Z29_Z30, |
| 7104 | }; |
| 7105 | |
| 7106 | // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K Bit set. |
| 7107 | const uint8_t ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KBits[] = { |
| 7108 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, |
| 7109 | }; |
| 7110 | |
| 7111 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 Register Class... |
| 7112 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4[] = { |
| 7113 | AArch64::Z23_Z24_Z25, AArch64::Z31_Z0_Z1, |
| 7114 | }; |
| 7115 | |
| 7116 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 Bit set. |
| 7117 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4Bits[] = { |
| 7118 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x40, |
| 7119 | }; |
| 7120 | |
| 7121 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 7122 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 7123 | AArch64::Z21_Z22_Z23, AArch64::Z29_Z30_Z31, |
| 7124 | }; |
| 7125 | |
| 7126 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 7127 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 7128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, |
| 7129 | }; |
| 7130 | |
| 7131 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 7132 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 7133 | AArch64::Z22_Z23_Z24, AArch64::Z30_Z31_Z0, |
| 7134 | }; |
| 7135 | |
| 7136 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 7137 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 7138 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x20, |
| 7139 | }; |
| 7140 | |
| 7141 | // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 7142 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 7143 | AArch64::Z3_Z4_Z5, AArch64::Z31_Z0_Z1, |
| 7144 | }; |
| 7145 | |
| 7146 | // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 7147 | const uint8_t ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 7148 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, |
| 7149 | }; |
| 7150 | |
| 7151 | // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K Register Class... |
| 7152 | const MCPhysReg ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K[] = { |
| 7153 | AArch64::Z19_Z20_Z21, AArch64::Z27_Z28_Z29, |
| 7154 | }; |
| 7155 | |
| 7156 | // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K Bit set. |
| 7157 | const uint8_t ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KBits[] = { |
| 7158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, |
| 7159 | }; |
| 7160 | |
| 7161 | // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b Register Class... |
| 7162 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b[] = { |
| 7163 | AArch64::Z2_Z3_Z4, AArch64::Z30_Z31_Z0, |
| 7164 | }; |
| 7165 | |
| 7166 | // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b Bit set. |
| 7167 | const uint8_t ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 7168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x20, |
| 7169 | }; |
| 7170 | |
| 7171 | // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K Register Class... |
| 7172 | const MCPhysReg ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K[] = { |
| 7173 | AArch64::Z18_Z19_Z20, AArch64::Z26_Z27_Z28, |
| 7174 | }; |
| 7175 | |
| 7176 | // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K Bit set. |
| 7177 | const uint8_t ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KBits[] = { |
| 7178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, |
| 7179 | }; |
| 7180 | |
| 7181 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 Register Class... |
| 7182 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4[] = { |
| 7183 | AArch64::Z3_Z4_Z5, AArch64::Z7_Z8_Z9, |
| 7184 | }; |
| 7185 | |
| 7186 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 Bit set. |
| 7187 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4Bits[] = { |
| 7188 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, |
| 7189 | }; |
| 7190 | |
| 7191 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 7192 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 7193 | AArch64::Z2_Z3_Z4, AArch64::Z6_Z7_Z8, |
| 7194 | }; |
| 7195 | |
| 7196 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 7197 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 7198 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, |
| 7199 | }; |
| 7200 | |
| 7201 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K Register Class... |
| 7202 | const MCPhysReg ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K[] = { |
| 7203 | AArch64::Z31_Z0_Z1, |
| 7204 | }; |
| 7205 | |
| 7206 | // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K Bit set. |
| 7207 | const uint8_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits[] = { |
| 7208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 7209 | }; |
| 7210 | |
| 7211 | // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi Register Class... |
| 7212 | const MCPhysReg ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi[] = { |
| 7213 | AArch64::Z30_Z31_Z0, |
| 7214 | }; |
| 7215 | |
| 7216 | // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi Bit set. |
| 7217 | const uint8_t ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits[] = { |
| 7218 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 7219 | }; |
| 7220 | |
| 7221 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 7222 | const MCPhysReg ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 7223 | AArch64::Z23_Z24_Z25, |
| 7224 | }; |
| 7225 | |
| 7226 | // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 7227 | const uint8_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 7228 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 7229 | }; |
| 7230 | |
| 7231 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 7232 | const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 7233 | AArch64::Z22_Z23_Z24, |
| 7234 | }; |
| 7235 | |
| 7236 | // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 7237 | const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 7238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 7239 | }; |
| 7240 | |
| 7241 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 7242 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 7243 | AArch64::Z3_Z4_Z5, |
| 7244 | }; |
| 7245 | |
| 7246 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 7247 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 7248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 7249 | }; |
| 7250 | |
| 7251 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b Register Class... |
| 7252 | const MCPhysReg ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b[] = { |
| 7253 | AArch64::Z2_Z3_Z4, |
| 7254 | }; |
| 7255 | |
| 7256 | // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b Bit set. |
| 7257 | const uint8_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 7258 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, |
| 7259 | }; |
| 7260 | |
| 7261 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 7262 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi[] = { |
| 7263 | AArch64::Z15_Z16_Z17, |
| 7264 | }; |
| 7265 | |
| 7266 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 7267 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 7268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 7269 | }; |
| 7270 | |
| 7271 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 7272 | const MCPhysReg ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi[] = { |
| 7273 | AArch64::Z14_Z15_Z16, |
| 7274 | }; |
| 7275 | |
| 7276 | // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 7277 | const uint8_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 7278 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 7279 | }; |
| 7280 | |
| 7281 | // QQQQ Register Class... |
| 7282 | const MCPhysReg QQQQ[] = { |
| 7283 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, AArch64::Q16_Q17_Q18_Q19, AArch64::Q17_Q18_Q19_Q20, AArch64::Q18_Q19_Q20_Q21, AArch64::Q19_Q20_Q21_Q22, AArch64::Q20_Q21_Q22_Q23, AArch64::Q21_Q22_Q23_Q24, AArch64::Q22_Q23_Q24_Q25, AArch64::Q23_Q24_Q25_Q26, AArch64::Q24_Q25_Q26_Q27, AArch64::Q25_Q26_Q27_Q28, AArch64::Q26_Q27_Q28_Q29, AArch64::Q27_Q28_Q29_Q30, AArch64::Q28_Q29_Q30_Q31, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7284 | }; |
| 7285 | |
| 7286 | // QQQQ Bit set. |
| 7287 | const uint8_t QQQQBits[] = { |
| 7288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, 0x07, |
| 7289 | }; |
| 7290 | |
| 7291 | // ZPR4 Register Class... |
| 7292 | const MCPhysReg ZPR4[] = { |
| 7293 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z15_Z16_Z17_Z18, AArch64::Z16_Z17_Z18_Z19, AArch64::Z17_Z18_Z19_Z20, AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z23_Z24_Z25_Z26, AArch64::Z24_Z25_Z26_Z27, AArch64::Z25_Z26_Z27_Z28, AArch64::Z26_Z27_Z28_Z29, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7294 | }; |
| 7295 | |
| 7296 | // ZPR4 Bit set. |
| 7297 | const uint8_t ZPR4Bits[] = { |
| 7298 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, |
| 7299 | }; |
| 7300 | |
| 7301 | // QQQQ_with_dsub1_in_FPR64_lo Register Class... |
| 7302 | const MCPhysReg QQQQ_with_dsub1_in_FPR64_lo[] = { |
| 7303 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q31_Q0_Q1_Q2, |
| 7304 | }; |
| 7305 | |
| 7306 | // QQQQ_with_dsub1_in_FPR64_lo Bit set. |
| 7307 | const uint8_t QQQQ_with_dsub1_in_FPR64_loBits[] = { |
| 7308 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 0x00, 0x04, |
| 7309 | }; |
| 7310 | |
| 7311 | // QQQQ_with_dsub2_in_FPR64_lo Register Class... |
| 7312 | const MCPhysReg QQQQ_with_dsub2_in_FPR64_lo[] = { |
| 7313 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7314 | }; |
| 7315 | |
| 7316 | // QQQQ_with_dsub2_in_FPR64_lo Bit set. |
| 7317 | const uint8_t QQQQ_with_dsub2_in_FPR64_loBits[] = { |
| 7318 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x06, |
| 7319 | }; |
| 7320 | |
| 7321 | // QQQQ_with_dsub3_in_FPR64_lo Register Class... |
| 7322 | const MCPhysReg QQQQ_with_dsub3_in_FPR64_lo[] = { |
| 7323 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7324 | }; |
| 7325 | |
| 7326 | // QQQQ_with_dsub3_in_FPR64_lo Bit set. |
| 7327 | const uint8_t QQQQ_with_dsub3_in_FPR64_loBits[] = { |
| 7328 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x07, |
| 7329 | }; |
| 7330 | |
| 7331 | // QQQQ_with_qsub0_in_FPR128_lo Register Class... |
| 7332 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo[] = { |
| 7333 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, |
| 7334 | }; |
| 7335 | |
| 7336 | // QQQQ_with_qsub0_in_FPR128_lo Bit set. |
| 7337 | const uint8_t QQQQ_with_qsub0_in_FPR128_loBits[] = { |
| 7338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, |
| 7339 | }; |
| 7340 | |
| 7341 | // ZPR4StridedOrContiguous Register Class... |
| 7342 | const MCPhysReg ZPR4StridedOrContiguous[] = { |
| 7343 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, AArch64::Z16_Z20_Z24_Z28, AArch64::Z17_Z21_Z25_Z29, AArch64::Z18_Z22_Z26_Z30, AArch64::Z19_Z23_Z27_Z31, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 7344 | }; |
| 7345 | |
| 7346 | // ZPR4StridedOrContiguous Bit set. |
| 7347 | const uint8_t ZPR4StridedOrContiguousBits[] = { |
| 7348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 7349 | }; |
| 7350 | |
| 7351 | // ZPR4_with_dsub1_in_FPR64_lo Register Class... |
| 7352 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo[] = { |
| 7353 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z31_Z0_Z1_Z2, |
| 7354 | }; |
| 7355 | |
| 7356 | // ZPR4_with_dsub1_in_FPR64_lo Bit set. |
| 7357 | const uint8_t ZPR4_with_dsub1_in_FPR64_loBits[] = { |
| 7358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, 0x00, 0x40, |
| 7359 | }; |
| 7360 | |
| 7361 | // ZPR4_with_dsub2_in_FPR64_lo Register Class... |
| 7362 | const MCPhysReg ZPR4_with_dsub2_in_FPR64_lo[] = { |
| 7363 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7364 | }; |
| 7365 | |
| 7366 | // ZPR4_with_dsub2_in_FPR64_lo Bit set. |
| 7367 | const uint8_t ZPR4_with_dsub2_in_FPR64_loBits[] = { |
| 7368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0x00, 0x60, |
| 7369 | }; |
| 7370 | |
| 7371 | // ZPR4_with_dsub3_in_FPR64_lo Register Class... |
| 7372 | const MCPhysReg ZPR4_with_dsub3_in_FPR64_lo[] = { |
| 7373 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7374 | }; |
| 7375 | |
| 7376 | // ZPR4_with_dsub3_in_FPR64_lo Bit set. |
| 7377 | const uint8_t ZPR4_with_dsub3_in_FPR64_loBits[] = { |
| 7378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x0f, 0x00, 0x70, |
| 7379 | }; |
| 7380 | |
| 7381 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... |
| 7382 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2[] = { |
| 7383 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z14_Z15_Z16_Z17, AArch64::Z16_Z17_Z18_Z19, AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z24_Z25_Z26_Z27, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, AArch64::Z30_Z31_Z0_Z1, |
| 7384 | }; |
| 7385 | |
| 7386 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. |
| 7387 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { |
| 7388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0xaa, 0xaa, 0x2a, |
| 7389 | }; |
| 7390 | |
| 7391 | // ZPR4_with_zsub1_in_ZPRMul2 Register Class... |
| 7392 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2[] = { |
| 7393 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, |
| 7394 | }; |
| 7395 | |
| 7396 | // ZPR4_with_zsub1_in_ZPRMul2 Bit set. |
| 7397 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2Bits[] = { |
| 7398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, 0x55, 0x55, |
| 7399 | }; |
| 7400 | |
| 7401 | // ZPR4_with_zsub_in_FPR128_lo Register Class... |
| 7402 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo[] = { |
| 7403 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z15_Z16_Z17_Z18, |
| 7404 | }; |
| 7405 | |
| 7406 | // ZPR4_with_zsub_in_FPR128_lo Bit set. |
| 7407 | const uint8_t ZPR4_with_zsub_in_FPR128_loBits[] = { |
| 7408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x7f, |
| 7409 | }; |
| 7410 | |
| 7411 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo Register Class... |
| 7412 | const MCPhysReg QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo[] = { |
| 7413 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q31_Q0_Q1_Q2, |
| 7414 | }; |
| 7415 | |
| 7416 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo Bit set. |
| 7417 | const uint8_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loBits[] = { |
| 7418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, 0x00, 0x04, |
| 7419 | }; |
| 7420 | |
| 7421 | // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo Register Class... |
| 7422 | const MCPhysReg QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo[] = { |
| 7423 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7424 | }; |
| 7425 | |
| 7426 | // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo Bit set. |
| 7427 | const uint8_t QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits[] = { |
| 7428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x06, |
| 7429 | }; |
| 7430 | |
| 7431 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo Register Class... |
| 7432 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo[] = { |
| 7433 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, |
| 7434 | }; |
| 7435 | |
| 7436 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo Bit set. |
| 7437 | const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loBits[] = { |
| 7438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, |
| 7439 | }; |
| 7440 | |
| 7441 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo Register Class... |
| 7442 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo[] = { |
| 7443 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z31_Z0_Z1_Z2, |
| 7444 | }; |
| 7445 | |
| 7446 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo Bit set. |
| 7447 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loBits[] = { |
| 7448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, 0x00, 0x40, |
| 7449 | }; |
| 7450 | |
| 7451 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo Register Class... |
| 7452 | const MCPhysReg ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo[] = { |
| 7453 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7454 | }; |
| 7455 | |
| 7456 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo Bit set. |
| 7457 | const uint8_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits[] = { |
| 7458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x0f, 0x00, 0x60, |
| 7459 | }; |
| 7460 | |
| 7461 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo Register Class... |
| 7462 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo[] = { |
| 7463 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, |
| 7464 | }; |
| 7465 | |
| 7466 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo Bit set. |
| 7467 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loBits[] = { |
| 7468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x3f, |
| 7469 | }; |
| 7470 | |
| 7471 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo Register Class... |
| 7472 | const MCPhysReg QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo[] = { |
| 7473 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q31_Q0_Q1_Q2, |
| 7474 | }; |
| 7475 | |
| 7476 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo Bit set. |
| 7477 | const uint8_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits[] = { |
| 7478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x00, 0x00, 0x04, |
| 7479 | }; |
| 7480 | |
| 7481 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo Register Class... |
| 7482 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo[] = { |
| 7483 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, |
| 7484 | }; |
| 7485 | |
| 7486 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo Bit set. |
| 7487 | const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loBits[] = { |
| 7488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x01, |
| 7489 | }; |
| 7490 | |
| 7491 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo Register Class... |
| 7492 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo[] = { |
| 7493 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z31_Z0_Z1_Z2, |
| 7494 | }; |
| 7495 | |
| 7496 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo Bit set. |
| 7497 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits[] = { |
| 7498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x0f, 0x00, 0x40, |
| 7499 | }; |
| 7500 | |
| 7501 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo Register Class... |
| 7502 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo[] = { |
| 7503 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, |
| 7504 | }; |
| 7505 | |
| 7506 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo Bit set. |
| 7507 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loBits[] = { |
| 7508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x1f, |
| 7509 | }; |
| 7510 | |
| 7511 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo Register Class... |
| 7512 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo[] = { |
| 7513 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, |
| 7514 | }; |
| 7515 | |
| 7516 | // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo Bit set. |
| 7517 | const uint8_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loBits[] = { |
| 7518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, |
| 7519 | }; |
| 7520 | |
| 7521 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo Register Class... |
| 7522 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo[] = { |
| 7523 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, |
| 7524 | }; |
| 7525 | |
| 7526 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo Bit set. |
| 7527 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loBits[] = { |
| 7528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0x0f, |
| 7529 | }; |
| 7530 | |
| 7531 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 Register Class... |
| 7532 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2[] = { |
| 7533 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z2_Z6_Z10_Z14, AArch64::Z16_Z20_Z24_Z28, AArch64::Z18_Z22_Z26_Z30, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 7534 | }; |
| 7535 | |
| 7536 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 Bit set. |
| 7537 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2Bits[] = { |
| 7538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 7539 | }; |
| 7540 | |
| 7541 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 Register Class... |
| 7542 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4[] = { |
| 7543 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z16_Z20_Z24_Z28, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 7544 | }; |
| 7545 | |
| 7546 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 Bit set. |
| 7547 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4Bits[] = { |
| 7548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 7549 | }; |
| 7550 | |
| 7551 | // QQQQ_with_qsub0_in_FPR128_0to7 Register Class... |
| 7552 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_0to7[] = { |
| 7553 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, |
| 7554 | }; |
| 7555 | |
| 7556 | // QQQQ_with_qsub0_in_FPR128_0to7 Bit set. |
| 7557 | const uint8_t QQQQ_with_qsub0_in_FPR128_0to7Bits[] = { |
| 7558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, |
| 7559 | }; |
| 7560 | |
| 7561 | // QQQQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 7562 | const MCPhysReg QQQQ_with_qsub1_in_FPR128_0to7[] = { |
| 7563 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q31_Q0_Q1_Q2, |
| 7564 | }; |
| 7565 | |
| 7566 | // QQQQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 7567 | const uint8_t QQQQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 7568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 0x00, 0x00, 0x04, |
| 7569 | }; |
| 7570 | |
| 7571 | // QQQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 7572 | const MCPhysReg QQQQ_with_qsub2_in_FPR128_0to7[] = { |
| 7573 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7574 | }; |
| 7575 | |
| 7576 | // QQQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 7577 | const uint8_t QQQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 7578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x00, 0x06, |
| 7579 | }; |
| 7580 | |
| 7581 | // QQQQ_with_qsub3_in_FPR128_0to7 Register Class... |
| 7582 | const MCPhysReg QQQQ_with_qsub3_in_FPR128_0to7[] = { |
| 7583 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7584 | }; |
| 7585 | |
| 7586 | // QQQQ_with_qsub3_in_FPR128_0to7 Bit set. |
| 7587 | const uint8_t QQQQ_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x07, |
| 7589 | }; |
| 7590 | |
| 7591 | // ZPR4Mul4 Register Class... |
| 7592 | const MCPhysReg ZPR4Mul4[] = { |
| 7593 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 7594 | }; |
| 7595 | |
| 7596 | // ZPR4Mul4 Bit set. |
| 7597 | const uint8_t ZPR4Mul4Bits[] = { |
| 7598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x88, 0x88, 0x08, |
| 7599 | }; |
| 7600 | |
| 7601 | // ZPR4Strided Register Class... |
| 7602 | const MCPhysReg ZPR4Strided[] = { |
| 7603 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, AArch64::Z16_Z20_Z24_Z28, AArch64::Z17_Z21_Z25_Z29, AArch64::Z18_Z22_Z26_Z30, AArch64::Z19_Z23_Z27_Z31, |
| 7604 | }; |
| 7605 | |
| 7606 | // ZPR4Strided Bit set. |
| 7607 | const uint8_t ZPR4StridedBits[] = { |
| 7608 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 7609 | }; |
| 7610 | |
| 7611 | // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo Register Class... |
| 7612 | const MCPhysReg ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo[] = { |
| 7613 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, |
| 7614 | }; |
| 7615 | |
| 7616 | // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo Bit set. |
| 7617 | const uint8_t ZPR4StridedOrContiguous_with_dsub_in_FPR64_loBits[] = { |
| 7618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 7619 | }; |
| 7620 | |
| 7621 | // ZPR4_with_qsub1_in_FPR128_0to7 Register Class... |
| 7622 | const MCPhysReg ZPR4_with_qsub1_in_FPR128_0to7[] = { |
| 7623 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z31_Z0_Z1_Z2, |
| 7624 | }; |
| 7625 | |
| 7626 | // ZPR4_with_qsub1_in_FPR128_0to7 Bit set. |
| 7627 | const uint8_t ZPR4_with_qsub1_in_FPR128_0to7Bits[] = { |
| 7628 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, 0x00, 0x00, 0x40, |
| 7629 | }; |
| 7630 | |
| 7631 | // ZPR4_with_qsub2_in_FPR128_0to7 Register Class... |
| 7632 | const MCPhysReg ZPR4_with_qsub2_in_FPR128_0to7[] = { |
| 7633 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7634 | }; |
| 7635 | |
| 7636 | // ZPR4_with_qsub2_in_FPR128_0to7 Bit set. |
| 7637 | const uint8_t ZPR4_with_qsub2_in_FPR128_0to7Bits[] = { |
| 7638 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x60, |
| 7639 | }; |
| 7640 | |
| 7641 | // ZPR4_with_qsub3_in_FPR128_0to7 Register Class... |
| 7642 | const MCPhysReg ZPR4_with_qsub3_in_FPR128_0to7[] = { |
| 7643 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7644 | }; |
| 7645 | |
| 7646 | // ZPR4_with_qsub3_in_FPR128_0to7 Bit set. |
| 7647 | const uint8_t ZPR4_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7648 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x70, |
| 7649 | }; |
| 7650 | |
| 7651 | // ZPR4_with_zsub0_in_ZPR_K Register Class... |
| 7652 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K[] = { |
| 7653 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z23_Z24_Z25_Z26, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7654 | }; |
| 7655 | |
| 7656 | // ZPR4_with_zsub0_in_ZPR_K Bit set. |
| 7657 | const uint8_t ZPR4_with_zsub0_in_ZPR_KBits[] = { |
| 7658 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x78, |
| 7659 | }; |
| 7660 | |
| 7661 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi Register Class... |
| 7662 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi[] = { |
| 7663 | AArch64::Z16_Z17_Z18_Z19, AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z24_Z25_Z26_Z27, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, AArch64::Z30_Z31_Z0_Z1, |
| 7664 | }; |
| 7665 | |
| 7666 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi Bit set. |
| 7667 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits[] = { |
| 7668 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 7669 | }; |
| 7670 | |
| 7671 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo Register Class... |
| 7672 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo[] = { |
| 7673 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z14_Z15_Z16_Z17, |
| 7674 | }; |
| 7675 | |
| 7676 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo Bit set. |
| 7677 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoBits[] = { |
| 7678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x2a, |
| 7679 | }; |
| 7680 | |
| 7681 | // ZPR4_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 7682 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_Hi[] = { |
| 7683 | AArch64::Z15_Z16_Z17_Z18, AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, AArch64::Z29_Z30_Z31_Z0, |
| 7684 | }; |
| 7685 | |
| 7686 | // ZPR4_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 7687 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 7688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x55, 0x15, |
| 7689 | }; |
| 7690 | |
| 7691 | // ZPR4_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 7692 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_Lo[] = { |
| 7693 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z31_Z0_Z1_Z2, |
| 7694 | }; |
| 7695 | |
| 7696 | // ZPR4_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 7697 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 7698 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, 0x00, 0x40, |
| 7699 | }; |
| 7700 | |
| 7701 | // ZPR4_with_zsub1_in_ZPRMul4 Register Class... |
| 7702 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul4[] = { |
| 7703 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z7_Z8_Z9_Z10, AArch64::Z11_Z12_Z13_Z14, AArch64::Z15_Z16_Z17_Z18, AArch64::Z19_Z20_Z21_Z22, AArch64::Z23_Z24_Z25_Z26, AArch64::Z27_Z28_Z29_Z30, AArch64::Z31_Z0_Z1_Z2, |
| 7704 | }; |
| 7705 | |
| 7706 | // ZPR4_with_zsub1_in_ZPRMul4 Bit set. |
| 7707 | const uint8_t ZPR4_with_zsub1_in_ZPRMul4Bits[] = { |
| 7708 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x44, 0x44, |
| 7709 | }; |
| 7710 | |
| 7711 | // ZPR4_with_zsub1_in_ZPR_K Register Class... |
| 7712 | const MCPhysReg ZPR4_with_zsub1_in_ZPR_K[] = { |
| 7713 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, |
| 7714 | }; |
| 7715 | |
| 7716 | // ZPR4_with_zsub1_in_ZPR_K Bit set. |
| 7717 | const uint8_t ZPR4_with_zsub1_in_ZPR_KBits[] = { |
| 7718 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x3c, |
| 7719 | }; |
| 7720 | |
| 7721 | // ZPR4_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 7722 | const MCPhysReg ZPR4_with_zsub2_in_ZPRMul2_Hi[] = { |
| 7723 | AArch64::Z14_Z15_Z16_Z17, AArch64::Z16_Z17_Z18_Z19, AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z24_Z25_Z26_Z27, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, |
| 7724 | }; |
| 7725 | |
| 7726 | // ZPR4_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 7727 | const uint8_t ZPR4_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 7728 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x0a, |
| 7729 | }; |
| 7730 | |
| 7731 | // ZPR4_with_zsub2_in_ZPRMul2_Lo Register Class... |
| 7732 | const MCPhysReg ZPR4_with_zsub2_in_ZPRMul2_Lo[] = { |
| 7733 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z30_Z31_Z0_Z1, |
| 7734 | }; |
| 7735 | |
| 7736 | // ZPR4_with_zsub2_in_ZPRMul2_Lo Bit set. |
| 7737 | const uint8_t ZPR4_with_zsub2_in_ZPRMul2_LoBits[] = { |
| 7738 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, 0x00, 0x20, |
| 7739 | }; |
| 7740 | |
| 7741 | // ZPR4_with_zsub2_in_ZPRMul4 Register Class... |
| 7742 | const MCPhysReg ZPR4_with_zsub2_in_ZPRMul4[] = { |
| 7743 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z6_Z7_Z8_Z9, AArch64::Z10_Z11_Z12_Z13, AArch64::Z14_Z15_Z16_Z17, AArch64::Z18_Z19_Z20_Z21, AArch64::Z22_Z23_Z24_Z25, AArch64::Z26_Z27_Z28_Z29, AArch64::Z30_Z31_Z0_Z1, |
| 7744 | }; |
| 7745 | |
| 7746 | // ZPR4_with_zsub2_in_ZPRMul4 Bit set. |
| 7747 | const uint8_t ZPR4_with_zsub2_in_ZPRMul4Bits[] = { |
| 7748 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, 0x22, 0x22, |
| 7749 | }; |
| 7750 | |
| 7751 | // ZPR4_with_zsub2_in_ZPR_K Register Class... |
| 7752 | const MCPhysReg ZPR4_with_zsub2_in_ZPR_K[] = { |
| 7753 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z26_Z27_Z28_Z29, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, |
| 7754 | }; |
| 7755 | |
| 7756 | // ZPR4_with_zsub2_in_ZPR_K Bit set. |
| 7757 | const uint8_t ZPR4_with_zsub2_in_ZPR_KBits[] = { |
| 7758 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x1e, |
| 7759 | }; |
| 7760 | |
| 7761 | // ZPR4_with_zsub3_in_ZPRMul2_Hi Register Class... |
| 7762 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_Hi[] = { |
| 7763 | AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, |
| 7764 | }; |
| 7765 | |
| 7766 | // ZPR4_with_zsub3_in_ZPRMul2_Hi Bit set. |
| 7767 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_HiBits[] = { |
| 7768 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, |
| 7769 | }; |
| 7770 | |
| 7771 | // ZPR4_with_zsub3_in_ZPRMul2_Lo Register Class... |
| 7772 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_Lo[] = { |
| 7773 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, |
| 7774 | }; |
| 7775 | |
| 7776 | // ZPR4_with_zsub3_in_ZPRMul2_Lo Bit set. |
| 7777 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_LoBits[] = { |
| 7778 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x05, 0x00, 0x50, |
| 7779 | }; |
| 7780 | |
| 7781 | // ZPR4_with_zsub3_in_ZPRMul4 Register Class... |
| 7782 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul4[] = { |
| 7783 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z5_Z6_Z7_Z8, AArch64::Z9_Z10_Z11_Z12, AArch64::Z13_Z14_Z15_Z16, AArch64::Z17_Z18_Z19_Z20, AArch64::Z21_Z22_Z23_Z24, AArch64::Z25_Z26_Z27_Z28, AArch64::Z29_Z30_Z31_Z0, |
| 7784 | }; |
| 7785 | |
| 7786 | // ZPR4_with_zsub3_in_ZPRMul4 Bit set. |
| 7787 | const uint8_t ZPR4_with_zsub3_in_ZPRMul4Bits[] = { |
| 7788 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x11, 0x11, 0x11, |
| 7789 | }; |
| 7790 | |
| 7791 | // ZPR4_with_zsub3_in_ZPR_K Register Class... |
| 7792 | const MCPhysReg ZPR4_with_zsub3_in_ZPR_K[] = { |
| 7793 | AArch64::Z17_Z18_Z19_Z20, AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z25_Z26_Z27_Z28, AArch64::Z26_Z27_Z28_Z29, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, |
| 7794 | }; |
| 7795 | |
| 7796 | // ZPR4_with_zsub3_in_ZPR_K Bit set. |
| 7797 | const uint8_t ZPR4_with_zsub3_in_ZPR_KBits[] = { |
| 7798 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0f, |
| 7799 | }; |
| 7800 | |
| 7801 | // ZPR4_with_zsub_in_FPR128_0to7 Register Class... |
| 7802 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7[] = { |
| 7803 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, |
| 7804 | }; |
| 7805 | |
| 7806 | // ZPR4_with_zsub_in_FPR128_0to7 Bit set. |
| 7807 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7Bits[] = { |
| 7808 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, |
| 7809 | }; |
| 7810 | |
| 7811 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 Register Class... |
| 7812 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2[] = { |
| 7813 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, |
| 7814 | }; |
| 7815 | |
| 7816 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 Bit set. |
| 7817 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2Bits[] = { |
| 7818 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, |
| 7819 | }; |
| 7820 | |
| 7821 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 7822 | const MCPhysReg QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7[] = { |
| 7823 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q31_Q0_Q1_Q2, |
| 7824 | }; |
| 7825 | |
| 7826 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 7827 | const uint8_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 7828 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x00, 0x04, |
| 7829 | }; |
| 7830 | |
| 7831 | // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 Register Class... |
| 7832 | const MCPhysReg QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7[] = { |
| 7833 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, |
| 7834 | }; |
| 7835 | |
| 7836 | // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 Bit set. |
| 7837 | const uint8_t QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7838 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x06, |
| 7839 | }; |
| 7840 | |
| 7841 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 Register Class... |
| 7842 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7[] = { |
| 7843 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, |
| 7844 | }; |
| 7845 | |
| 7846 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 Bit set. |
| 7847 | const uint8_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7Bits[] = { |
| 7848 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, |
| 7849 | }; |
| 7850 | |
| 7851 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 Register Class... |
| 7852 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7[] = { |
| 7853 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z31_Z0_Z1_Z2, |
| 7854 | }; |
| 7855 | |
| 7856 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 Bit set. |
| 7857 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7Bits[] = { |
| 7858 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, 0x00, 0x00, 0x40, |
| 7859 | }; |
| 7860 | |
| 7861 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo Register Class... |
| 7862 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo[] = { |
| 7863 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z31_Z0_Z1_Z2, |
| 7864 | }; |
| 7865 | |
| 7866 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo Bit set. |
| 7867 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits[] = { |
| 7868 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x05, 0x00, 0x40, |
| 7869 | }; |
| 7870 | |
| 7871 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 Register Class... |
| 7872 | const MCPhysReg ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7[] = { |
| 7873 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 7874 | }; |
| 7875 | |
| 7876 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 Bit set. |
| 7877 | const uint8_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7878 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x60, |
| 7879 | }; |
| 7880 | |
| 7881 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 7882 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi[] = { |
| 7883 | AArch64::Z16_Z17_Z18_Z19, AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z24_Z25_Z26_Z27, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, |
| 7884 | }; |
| 7885 | |
| 7886 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 7887 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 7888 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| 7889 | }; |
| 7890 | |
| 7891 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 7892 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi[] = { |
| 7893 | AArch64::Z15_Z16_Z17_Z18, AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, |
| 7894 | }; |
| 7895 | |
| 7896 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 7897 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 7898 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x55, 0x05, |
| 7899 | }; |
| 7900 | |
| 7901 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 Register Class... |
| 7902 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7[] = { |
| 7903 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, |
| 7904 | }; |
| 7905 | |
| 7906 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 Bit set. |
| 7907 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7Bits[] = { |
| 7908 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3f, |
| 7909 | }; |
| 7910 | |
| 7911 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo Register Class... |
| 7912 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo[] = { |
| 7913 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, |
| 7914 | }; |
| 7915 | |
| 7916 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo Bit set. |
| 7917 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoBits[] = { |
| 7918 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x15, |
| 7919 | }; |
| 7920 | |
| 7921 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo Register Class... |
| 7922 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo[] = { |
| 7923 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, |
| 7924 | }; |
| 7925 | |
| 7926 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo Bit set. |
| 7927 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoBits[] = { |
| 7928 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xaa, 0x0a, |
| 7929 | }; |
| 7930 | |
| 7931 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 Register Class... |
| 7932 | const MCPhysReg QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7[] = { |
| 7933 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q31_Q0_Q1_Q2, |
| 7934 | }; |
| 7935 | |
| 7936 | // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 Bit set. |
| 7937 | const uint8_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7938 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00, 0x04, |
| 7939 | }; |
| 7940 | |
| 7941 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 Register Class... |
| 7942 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7[] = { |
| 7943 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, |
| 7944 | }; |
| 7945 | |
| 7946 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 Bit set. |
| 7947 | const uint8_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7Bits[] = { |
| 7948 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, |
| 7949 | }; |
| 7950 | |
| 7951 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi Register Class... |
| 7952 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi[] = { |
| 7953 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z18_Z22_Z26_Z30, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 7954 | }; |
| 7955 | |
| 7956 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi Bit set. |
| 7957 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits[] = { |
| 7958 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, |
| 7959 | }; |
| 7960 | |
| 7961 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo Register Class... |
| 7962 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo[] = { |
| 7963 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z2_Z6_Z10_Z14, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, |
| 7964 | }; |
| 7965 | |
| 7966 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo Bit set. |
| 7967 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits[] = { |
| 7968 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, |
| 7969 | }; |
| 7970 | |
| 7971 | // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Register Class... |
| 7972 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K[] = { |
| 7973 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z17_Z21_Z25_Z29, AArch64::Z18_Z22_Z26_Z30, AArch64::Z19_Z23_Z27_Z31, AArch64::Z20_Z21_Z22_Z23, AArch64::Z28_Z29_Z30_Z31, |
| 7974 | }; |
| 7975 | |
| 7976 | // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Bit set. |
| 7977 | const uint8_t ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits[] = { |
| 7978 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, |
| 7979 | }; |
| 7980 | |
| 7981 | // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 Register Class... |
| 7982 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7[] = { |
| 7983 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, |
| 7984 | }; |
| 7985 | |
| 7986 | // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 Bit set. |
| 7987 | const uint8_t ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7Bits[] = { |
| 7988 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 7989 | }; |
| 7990 | |
| 7991 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 Register Class... |
| 7992 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7[] = { |
| 7993 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z31_Z0_Z1_Z2, |
| 7994 | }; |
| 7995 | |
| 7996 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 Bit set. |
| 7997 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits[] = { |
| 7998 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, 0x00, 0x00, 0x40, |
| 7999 | }; |
| 8000 | |
| 8001 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K Register Class... |
| 8002 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K[] = { |
| 8003 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, |
| 8004 | }; |
| 8005 | |
| 8006 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K Bit set. |
| 8007 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KBits[] = { |
| 8008 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x38, |
| 8009 | }; |
| 8010 | |
| 8011 | // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K Register Class... |
| 8012 | const MCPhysReg ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K[] = { |
| 8013 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, |
| 8014 | }; |
| 8015 | |
| 8016 | // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K Bit set. |
| 8017 | const uint8_t ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits[] = { |
| 8018 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x1c, |
| 8019 | }; |
| 8020 | |
| 8021 | // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K Register Class... |
| 8022 | const MCPhysReg ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K[] = { |
| 8023 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z26_Z27_Z28_Z29, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, |
| 8024 | }; |
| 8025 | |
| 8026 | // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K Bit set. |
| 8027 | const uint8_t ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits[] = { |
| 8028 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x0e, |
| 8029 | }; |
| 8030 | |
| 8031 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 Register Class... |
| 8032 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7[] = { |
| 8033 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, |
| 8034 | }; |
| 8035 | |
| 8036 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 Bit set. |
| 8037 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7Bits[] = { |
| 8038 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x1f, |
| 8039 | }; |
| 8040 | |
| 8041 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo Register Class... |
| 8042 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo[] = { |
| 8043 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, |
| 8044 | }; |
| 8045 | |
| 8046 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo Bit set. |
| 8047 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits[] = { |
| 8048 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x05, |
| 8049 | }; |
| 8050 | |
| 8051 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 Register Class... |
| 8052 | const MCPhysReg QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7[] = { |
| 8053 | AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, |
| 8054 | }; |
| 8055 | |
| 8056 | // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 Bit set. |
| 8057 | const uint8_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7Bits[] = { |
| 8058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, |
| 8059 | }; |
| 8060 | |
| 8061 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8062 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8063 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 8064 | }; |
| 8065 | |
| 8066 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8067 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8068 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, |
| 8069 | }; |
| 8070 | |
| 8071 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 8072 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 8073 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, |
| 8074 | }; |
| 8075 | |
| 8076 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 8077 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 8078 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 8079 | }; |
| 8080 | |
| 8081 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 Register Class... |
| 8082 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7[] = { |
| 8083 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, |
| 8084 | }; |
| 8085 | |
| 8086 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 Bit set. |
| 8087 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7Bits[] = { |
| 8088 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0f, |
| 8089 | }; |
| 8090 | |
| 8091 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Register Class... |
| 8092 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K[] = { |
| 8093 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z18_Z22_Z26_Z30, AArch64::Z20_Z21_Z22_Z23, AArch64::Z28_Z29_Z30_Z31, |
| 8094 | }; |
| 8095 | |
| 8096 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Bit set. |
| 8097 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits[] = { |
| 8098 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, |
| 8099 | }; |
| 8100 | |
| 8101 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b Register Class... |
| 8102 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b[] = { |
| 8103 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z2_Z6_Z10_Z14, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, |
| 8104 | }; |
| 8105 | |
| 8106 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b Bit set. |
| 8107 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 8108 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, |
| 8109 | }; |
| 8110 | |
| 8111 | // ZPR4Strided_with_dsub_in_FPR64_lo Register Class... |
| 8112 | const MCPhysReg ZPR4Strided_with_dsub_in_FPR64_lo[] = { |
| 8113 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, |
| 8114 | }; |
| 8115 | |
| 8116 | // ZPR4Strided_with_dsub_in_FPR64_lo Bit set. |
| 8117 | const uint8_t ZPR4Strided_with_dsub_in_FPR64_loBits[] = { |
| 8118 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, |
| 8119 | }; |
| 8120 | |
| 8121 | // ZPR4Strided_with_zsub0_in_ZPRMul2 Register Class... |
| 8122 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul2[] = { |
| 8123 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z2_Z6_Z10_Z14, AArch64::Z16_Z20_Z24_Z28, AArch64::Z18_Z22_Z26_Z30, |
| 8124 | }; |
| 8125 | |
| 8126 | // ZPR4Strided_with_zsub0_in_ZPRMul2 Bit set. |
| 8127 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul2Bits[] = { |
| 8128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 8129 | }; |
| 8130 | |
| 8131 | // ZPR4Strided_with_zsub1_in_ZPR_K Register Class... |
| 8132 | const MCPhysReg ZPR4Strided_with_zsub1_in_ZPR_K[] = { |
| 8133 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z17_Z21_Z25_Z29, AArch64::Z18_Z22_Z26_Z30, AArch64::Z19_Z23_Z27_Z31, |
| 8134 | }; |
| 8135 | |
| 8136 | // ZPR4Strided_with_zsub1_in_ZPR_K Bit set. |
| 8137 | const uint8_t ZPR4Strided_with_zsub1_in_ZPR_KBits[] = { |
| 8138 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, |
| 8139 | }; |
| 8140 | |
| 8141 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 Register Class... |
| 8142 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2[] = { |
| 8143 | AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, |
| 8144 | }; |
| 8145 | |
| 8146 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 Bit set. |
| 8147 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2Bits[] = { |
| 8148 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x50, |
| 8149 | }; |
| 8150 | |
| 8151 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K Register Class... |
| 8152 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K[] = { |
| 8153 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, |
| 8154 | }; |
| 8155 | |
| 8156 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K Bit set. |
| 8157 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits[] = { |
| 8158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, |
| 8159 | }; |
| 8160 | |
| 8161 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8162 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8163 | AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, |
| 8164 | }; |
| 8165 | |
| 8166 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8167 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 8169 | }; |
| 8170 | |
| 8171 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8172 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8173 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, |
| 8174 | }; |
| 8175 | |
| 8176 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8177 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x88, 0x08, |
| 8179 | }; |
| 8180 | |
| 8181 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 8182 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 8183 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z28_Z29_Z30_Z31, AArch64::Z30_Z31_Z0_Z1, |
| 8184 | }; |
| 8185 | |
| 8186 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 8187 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 8188 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x28, |
| 8189 | }; |
| 8190 | |
| 8191 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 8192 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 8193 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, |
| 8194 | }; |
| 8195 | |
| 8196 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 8197 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 8198 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x2a, |
| 8199 | }; |
| 8200 | |
| 8201 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 8202 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 8203 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z22_Z23_Z24_Z25, AArch64::Z26_Z27_Z28_Z29, AArch64::Z30_Z31_Z0_Z1, |
| 8204 | }; |
| 8205 | |
| 8206 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 8207 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 8208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, |
| 8209 | }; |
| 8210 | |
| 8211 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8212 | const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8213 | AArch64::Z15_Z16_Z17_Z18, AArch64::Z19_Z20_Z21_Z22, AArch64::Z23_Z24_Z25_Z26, AArch64::Z27_Z28_Z29_Z30, |
| 8214 | }; |
| 8215 | |
| 8216 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8217 | const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8218 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x44, 0x04, |
| 8219 | }; |
| 8220 | |
| 8221 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8222 | const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8223 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z7_Z8_Z9_Z10, AArch64::Z11_Z12_Z13_Z14, AArch64::Z31_Z0_Z1_Z2, |
| 8224 | }; |
| 8225 | |
| 8226 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8227 | const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8228 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, 0x00, 0x40, |
| 8229 | }; |
| 8230 | |
| 8231 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 8232 | const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 8233 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z27_Z28_Z29_Z30, AArch64::Z29_Z30_Z31_Z0, |
| 8234 | }; |
| 8235 | |
| 8236 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 8237 | const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 8238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x14, |
| 8239 | }; |
| 8240 | |
| 8241 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 8242 | const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 8243 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z31_Z0_Z1_Z2, |
| 8244 | }; |
| 8245 | |
| 8246 | // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 8247 | const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 8248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x40, |
| 8249 | }; |
| 8250 | |
| 8251 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Register Class... |
| 8252 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4[] = { |
| 8253 | AArch64::Z17_Z18_Z19_Z20, AArch64::Z21_Z22_Z23_Z24, AArch64::Z25_Z26_Z27_Z28, AArch64::Z29_Z30_Z31_Z0, |
| 8254 | }; |
| 8255 | |
| 8256 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 Bit set. |
| 8257 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits[] = { |
| 8258 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x11, |
| 8259 | }; |
| 8260 | |
| 8261 | // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K Register Class... |
| 8262 | const MCPhysReg ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K[] = { |
| 8263 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, |
| 8264 | }; |
| 8265 | |
| 8266 | // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K Bit set. |
| 8267 | const uint8_t ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits[] = { |
| 8268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x0c, |
| 8269 | }; |
| 8270 | |
| 8271 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8272 | const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8273 | AArch64::Z14_Z15_Z16_Z17, AArch64::Z18_Z19_Z20_Z21, AArch64::Z22_Z23_Z24_Z25, AArch64::Z26_Z27_Z28_Z29, |
| 8274 | }; |
| 8275 | |
| 8276 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8277 | const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8278 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x22, 0x02, |
| 8279 | }; |
| 8280 | |
| 8281 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8282 | const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8283 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z6_Z7_Z8_Z9, AArch64::Z10_Z11_Z12_Z13, AArch64::Z30_Z31_Z0_Z1, |
| 8284 | }; |
| 8285 | |
| 8286 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8287 | const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, 0x00, 0x20, |
| 8289 | }; |
| 8290 | |
| 8291 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 8292 | const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 8293 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, |
| 8294 | }; |
| 8295 | |
| 8296 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 8297 | const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 8298 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, |
| 8299 | }; |
| 8300 | |
| 8301 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 8302 | const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 8303 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z30_Z31_Z0_Z1, |
| 8304 | }; |
| 8305 | |
| 8306 | // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 8307 | const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 8308 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, 0x00, 0x00, 0x20, |
| 8309 | }; |
| 8310 | |
| 8311 | // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8312 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8313 | AArch64::Z13_Z14_Z15_Z16, AArch64::Z17_Z18_Z19_Z20, AArch64::Z21_Z22_Z23_Z24, AArch64::Z25_Z26_Z27_Z28, |
| 8314 | }; |
| 8315 | |
| 8316 | // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8317 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8318 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, |
| 8319 | }; |
| 8320 | |
| 8321 | // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 8322 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 8323 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z5_Z6_Z7_Z8, AArch64::Z9_Z10_Z11_Z12, AArch64::Z29_Z30_Z31_Z0, |
| 8324 | }; |
| 8325 | |
| 8326 | // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 8327 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 8328 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x01, 0x00, 0x10, |
| 8329 | }; |
| 8330 | |
| 8331 | // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Register Class... |
| 8332 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b[] = { |
| 8333 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, |
| 8334 | }; |
| 8335 | |
| 8336 | // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Bit set. |
| 8337 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 8338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x50, |
| 8339 | }; |
| 8340 | |
| 8341 | // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K Register Class... |
| 8342 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K[] = { |
| 8343 | AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, |
| 8344 | }; |
| 8345 | |
| 8346 | // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K Bit set. |
| 8347 | const uint8_t ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KBits[] = { |
| 8348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, |
| 8349 | }; |
| 8350 | |
| 8351 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 Register Class... |
| 8352 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2[] = { |
| 8353 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, |
| 8354 | }; |
| 8355 | |
| 8356 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 Bit set. |
| 8357 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2Bits[] = { |
| 8358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, |
| 8359 | }; |
| 8360 | |
| 8361 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 Register Class... |
| 8362 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4[] = { |
| 8363 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z7_Z8_Z9_Z10, AArch64::Z11_Z12_Z13_Z14, AArch64::Z15_Z16_Z17_Z18, |
| 8364 | }; |
| 8365 | |
| 8366 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 Bit set. |
| 8367 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4Bits[] = { |
| 8368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, |
| 8369 | }; |
| 8370 | |
| 8371 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 Register Class... |
| 8372 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4[] = { |
| 8373 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z6_Z7_Z8_Z9, AArch64::Z10_Z11_Z12_Z13, AArch64::Z14_Z15_Z16_Z17, |
| 8374 | }; |
| 8375 | |
| 8376 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 Bit set. |
| 8377 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4Bits[] = { |
| 8378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x22, |
| 8379 | }; |
| 8380 | |
| 8381 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 Register Class... |
| 8382 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4[] = { |
| 8383 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z5_Z6_Z7_Z8, AArch64::Z9_Z10_Z11_Z12, AArch64::Z13_Z14_Z15_Z16, |
| 8384 | }; |
| 8385 | |
| 8386 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 Bit set. |
| 8387 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4Bits[] = { |
| 8388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x11, |
| 8389 | }; |
| 8390 | |
| 8391 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Register Class... |
| 8392 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K[] = { |
| 8393 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z20_Z21_Z22_Z23, AArch64::Z28_Z29_Z30_Z31, |
| 8394 | }; |
| 8395 | |
| 8396 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K Bit set. |
| 8397 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits[] = { |
| 8398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, |
| 8399 | }; |
| 8400 | |
| 8401 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8402 | const MCPhysReg ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b[] = { |
| 8403 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, |
| 8404 | }; |
| 8405 | |
| 8406 | // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8407 | const uint8_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 8409 | }; |
| 8410 | |
| 8411 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Register Class... |
| 8412 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b[] = { |
| 8413 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z31_Z0_Z1_Z2, |
| 8414 | }; |
| 8415 | |
| 8416 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Bit set. |
| 8417 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 8418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x40, |
| 8419 | }; |
| 8420 | |
| 8421 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Register Class... |
| 8422 | const MCPhysReg ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K[] = { |
| 8423 | AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 8424 | }; |
| 8425 | |
| 8426 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Bit set. |
| 8427 | const uint8_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits[] = { |
| 8428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| 8429 | }; |
| 8430 | |
| 8431 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 8432 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi[] = { |
| 8433 | AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z29_Z30_Z31_Z0, |
| 8434 | }; |
| 8435 | |
| 8436 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 8437 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 8438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x10, |
| 8439 | }; |
| 8440 | |
| 8441 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8442 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8443 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z22_Z23_Z24_Z25, AArch64::Z26_Z27_Z28_Z29, |
| 8444 | }; |
| 8445 | |
| 8446 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8447 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, |
| 8449 | }; |
| 8450 | |
| 8451 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 8452 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 8453 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z28_Z29_Z30_Z31, |
| 8454 | }; |
| 8455 | |
| 8456 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 8457 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 8458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x08, |
| 8459 | }; |
| 8460 | |
| 8461 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8462 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8463 | AArch64::Z17_Z18_Z19_Z20, AArch64::Z21_Z22_Z23_Z24, AArch64::Z25_Z26_Z27_Z28, |
| 8464 | }; |
| 8465 | |
| 8466 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8467 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x01, |
| 8469 | }; |
| 8470 | |
| 8471 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 8472 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi[] = { |
| 8473 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z27_Z28_Z29_Z30, |
| 8474 | }; |
| 8475 | |
| 8476 | // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 8477 | const uint8_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 8478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x04, |
| 8479 | }; |
| 8480 | |
| 8481 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 8482 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 8483 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, |
| 8484 | }; |
| 8485 | |
| 8486 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 8487 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 8488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, |
| 8489 | }; |
| 8490 | |
| 8491 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Register Class... |
| 8492 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7[] = { |
| 8493 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, |
| 8494 | }; |
| 8495 | |
| 8496 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 Bit set. |
| 8497 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits[] = { |
| 8498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0a, |
| 8499 | }; |
| 8500 | |
| 8501 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8502 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8503 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z7_Z8_Z9_Z10, AArch64::Z11_Z12_Z13_Z14, |
| 8504 | }; |
| 8505 | |
| 8506 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8507 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x04, |
| 8509 | }; |
| 8510 | |
| 8511 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8512 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8513 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z6_Z7_Z8_Z9, AArch64::Z10_Z11_Z12_Z13, |
| 8514 | }; |
| 8515 | |
| 8516 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8517 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x02, |
| 8519 | }; |
| 8520 | |
| 8521 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 8522 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 8523 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z5_Z6_Z7_Z8, AArch64::Z9_Z10_Z11_Z12, |
| 8524 | }; |
| 8525 | |
| 8526 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 8527 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 8528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x01, |
| 8529 | }; |
| 8530 | |
| 8531 | // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K Register Class... |
| 8532 | const MCPhysReg ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K[] = { |
| 8533 | AArch64::Z20_Z21_Z22_Z23, AArch64::Z28_Z29_Z30_Z31, |
| 8534 | }; |
| 8535 | |
| 8536 | // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K Bit set. |
| 8537 | const uint8_t ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KBits[] = { |
| 8538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, |
| 8539 | }; |
| 8540 | |
| 8541 | // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 Register Class... |
| 8542 | const MCPhysReg ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7[] = { |
| 8543 | AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, |
| 8544 | }; |
| 8545 | |
| 8546 | // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 Bit set. |
| 8547 | const uint8_t ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7Bits[] = { |
| 8548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 8549 | }; |
| 8550 | |
| 8551 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi Register Class... |
| 8552 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul2_Hi[] = { |
| 8553 | AArch64::Z16_Z20_Z24_Z28, AArch64::Z18_Z22_Z26_Z30, |
| 8554 | }; |
| 8555 | |
| 8556 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi Bit set. |
| 8557 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul2_HiBits[] = { |
| 8558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, |
| 8559 | }; |
| 8560 | |
| 8561 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo Register Class... |
| 8562 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul2_Lo[] = { |
| 8563 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z2_Z6_Z10_Z14, |
| 8564 | }; |
| 8565 | |
| 8566 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo Bit set. |
| 8567 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul2_LoBits[] = { |
| 8568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, |
| 8569 | }; |
| 8570 | |
| 8571 | // ZPR4Strided_with_zsub0_in_ZPRMul4 Register Class... |
| 8572 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul4[] = { |
| 8573 | AArch64::Z0_Z4_Z8_Z12, AArch64::Z16_Z20_Z24_Z28, |
| 8574 | }; |
| 8575 | |
| 8576 | // ZPR4Strided_with_zsub0_in_ZPRMul4 Bit set. |
| 8577 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul4Bits[] = { |
| 8578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x08, |
| 8579 | }; |
| 8580 | |
| 8581 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Register Class... |
| 8582 | const MCPhysReg ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K[] = { |
| 8583 | AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, |
| 8584 | }; |
| 8585 | |
| 8586 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Bit set. |
| 8587 | const uint8_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits[] = { |
| 8588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, |
| 8589 | }; |
| 8590 | |
| 8591 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K Register Class... |
| 8592 | const MCPhysReg ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K[] = { |
| 8593 | AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, |
| 8594 | }; |
| 8595 | |
| 8596 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K Bit set. |
| 8597 | const uint8_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KBits[] = { |
| 8598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, |
| 8599 | }; |
| 8600 | |
| 8601 | // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 Register Class... |
| 8602 | const MCPhysReg ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2[] = { |
| 8603 | AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, |
| 8604 | }; |
| 8605 | |
| 8606 | // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 Bit set. |
| 8607 | const uint8_t ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits[] = { |
| 8608 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, |
| 8609 | }; |
| 8610 | |
| 8611 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Register Class... |
| 8612 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K[] = { |
| 8613 | AArch64::Z21_Z22_Z23_Z24, AArch64::Z29_Z30_Z31_Z0, |
| 8614 | }; |
| 8615 | |
| 8616 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K Bit set. |
| 8617 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits[] = { |
| 8618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, |
| 8619 | }; |
| 8620 | |
| 8621 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 Register Class... |
| 8622 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4[] = { |
| 8623 | AArch64::Z23_Z24_Z25_Z26, AArch64::Z31_Z0_Z1_Z2, |
| 8624 | }; |
| 8625 | |
| 8626 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 Bit set. |
| 8627 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4Bits[] = { |
| 8628 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x40, |
| 8629 | }; |
| 8630 | |
| 8631 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi Register Class... |
| 8632 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi[] = { |
| 8633 | AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, |
| 8634 | }; |
| 8635 | |
| 8636 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi Bit set. |
| 8637 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits[] = { |
| 8638 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, |
| 8639 | }; |
| 8640 | |
| 8641 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Register Class... |
| 8642 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4[] = { |
| 8643 | AArch64::Z22_Z23_Z24_Z25, AArch64::Z30_Z31_Z0_Z1, |
| 8644 | }; |
| 8645 | |
| 8646 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 Bit set. |
| 8647 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits[] = { |
| 8648 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x20, |
| 8649 | }; |
| 8650 | |
| 8651 | // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8652 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 8653 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z31_Z0_Z1_Z2, |
| 8654 | }; |
| 8655 | |
| 8656 | // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8657 | const uint8_t ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8658 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x40, |
| 8659 | }; |
| 8660 | |
| 8661 | // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K Register Class... |
| 8662 | const MCPhysReg ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K[] = { |
| 8663 | AArch64::Z19_Z20_Z21_Z22, AArch64::Z27_Z28_Z29_Z30, |
| 8664 | }; |
| 8665 | |
| 8666 | // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K Bit set. |
| 8667 | const uint8_t ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KBits[] = { |
| 8668 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, |
| 8669 | }; |
| 8670 | |
| 8671 | // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8672 | const MCPhysReg ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b[] = { |
| 8673 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z30_Z31_Z0_Z1, |
| 8674 | }; |
| 8675 | |
| 8676 | // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8677 | const uint8_t ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8678 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x20, |
| 8679 | }; |
| 8680 | |
| 8681 | // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K Register Class... |
| 8682 | const MCPhysReg ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K[] = { |
| 8683 | AArch64::Z18_Z19_Z20_Z21, AArch64::Z26_Z27_Z28_Z29, |
| 8684 | }; |
| 8685 | |
| 8686 | // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K Bit set. |
| 8687 | const uint8_t ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KBits[] = { |
| 8688 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, |
| 8689 | }; |
| 8690 | |
| 8691 | // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8692 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b[] = { |
| 8693 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z29_Z30_Z31_Z0, |
| 8694 | }; |
| 8695 | |
| 8696 | // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8697 | const uint8_t ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8698 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x10, |
| 8699 | }; |
| 8700 | |
| 8701 | // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K Register Class... |
| 8702 | const MCPhysReg ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K[] = { |
| 8703 | AArch64::Z17_Z18_Z19_Z20, AArch64::Z25_Z26_Z27_Z28, |
| 8704 | }; |
| 8705 | |
| 8706 | // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K Bit set. |
| 8707 | const uint8_t ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KBits[] = { |
| 8708 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, |
| 8709 | }; |
| 8710 | |
| 8711 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 Register Class... |
| 8712 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4[] = { |
| 8713 | AArch64::Z3_Z4_Z5_Z6, AArch64::Z7_Z8_Z9_Z10, |
| 8714 | }; |
| 8715 | |
| 8716 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 Bit set. |
| 8717 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4Bits[] = { |
| 8718 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, |
| 8719 | }; |
| 8720 | |
| 8721 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 Register Class... |
| 8722 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4[] = { |
| 8723 | AArch64::Z2_Z3_Z4_Z5, AArch64::Z6_Z7_Z8_Z9, |
| 8724 | }; |
| 8725 | |
| 8726 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 Bit set. |
| 8727 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4Bits[] = { |
| 8728 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, |
| 8729 | }; |
| 8730 | |
| 8731 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Register Class... |
| 8732 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b[] = { |
| 8733 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, |
| 8734 | }; |
| 8735 | |
| 8736 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b Bit set. |
| 8737 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits[] = { |
| 8738 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, |
| 8739 | }; |
| 8740 | |
| 8741 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 Register Class... |
| 8742 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4[] = { |
| 8743 | AArch64::Z1_Z2_Z3_Z4, AArch64::Z5_Z6_Z7_Z8, |
| 8744 | }; |
| 8745 | |
| 8746 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 Bit set. |
| 8747 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4Bits[] = { |
| 8748 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, |
| 8749 | }; |
| 8750 | |
| 8751 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi Register Class... |
| 8752 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi[] = { |
| 8753 | AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, |
| 8754 | }; |
| 8755 | |
| 8756 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi Bit set. |
| 8757 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits[] = { |
| 8758 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, |
| 8759 | }; |
| 8760 | |
| 8761 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8762 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8763 | AArch64::Z16_Z20_Z24_Z28, |
| 8764 | }; |
| 8765 | |
| 8766 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8767 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8768 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, |
| 8769 | }; |
| 8770 | |
| 8771 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Register Class... |
| 8772 | const MCPhysReg ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4[] = { |
| 8773 | AArch64::Z0_Z4_Z8_Z12, |
| 8774 | }; |
| 8775 | |
| 8776 | // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 Bit set. |
| 8777 | const uint8_t ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits[] = { |
| 8778 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 8779 | }; |
| 8780 | |
| 8781 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Register Class... |
| 8782 | const MCPhysReg ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K[] = { |
| 8783 | AArch64::Z31_Z0_Z1_Z2, |
| 8784 | }; |
| 8785 | |
| 8786 | // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K Bit set. |
| 8787 | const uint8_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits[] = { |
| 8788 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 8789 | }; |
| 8790 | |
| 8791 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi Register Class... |
| 8792 | const MCPhysReg ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi[] = { |
| 8793 | AArch64::Z30_Z31_Z0_Z1, |
| 8794 | }; |
| 8795 | |
| 8796 | // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi Bit set. |
| 8797 | const uint8_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits[] = { |
| 8798 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 8799 | }; |
| 8800 | |
| 8801 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 8802 | const MCPhysReg ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi[] = { |
| 8803 | AArch64::Z29_Z30_Z31_Z0, |
| 8804 | }; |
| 8805 | |
| 8806 | // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 8807 | const uint8_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 8808 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 8809 | }; |
| 8810 | |
| 8811 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Register Class... |
| 8812 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4[] = { |
| 8813 | AArch64::Z23_Z24_Z25_Z26, |
| 8814 | }; |
| 8815 | |
| 8816 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 Bit set. |
| 8817 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits[] = { |
| 8818 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 8819 | }; |
| 8820 | |
| 8821 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8822 | const MCPhysReg ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8823 | AArch64::Z21_Z22_Z23_Z24, |
| 8824 | }; |
| 8825 | |
| 8826 | // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8827 | const uint8_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8828 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 8829 | }; |
| 8830 | |
| 8831 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8832 | const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8833 | AArch64::Z22_Z23_Z24_Z25, |
| 8834 | }; |
| 8835 | |
| 8836 | // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8837 | const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8838 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 8839 | }; |
| 8840 | |
| 8841 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8842 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b[] = { |
| 8843 | AArch64::Z3_Z4_Z5_Z6, |
| 8844 | }; |
| 8845 | |
| 8846 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8847 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8848 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 8849 | }; |
| 8850 | |
| 8851 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8852 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b[] = { |
| 8853 | AArch64::Z2_Z3_Z4_Z5, |
| 8854 | }; |
| 8855 | |
| 8856 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8857 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8858 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, |
| 8859 | }; |
| 8860 | |
| 8861 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b Register Class... |
| 8862 | const MCPhysReg ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b[] = { |
| 8863 | AArch64::Z1_Z2_Z3_Z4, |
| 8864 | }; |
| 8865 | |
| 8866 | // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b Bit set. |
| 8867 | const uint8_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits[] = { |
| 8868 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, |
| 8869 | }; |
| 8870 | |
| 8871 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Register Class... |
| 8872 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi[] = { |
| 8873 | AArch64::Z15_Z16_Z17_Z18, |
| 8874 | }; |
| 8875 | |
| 8876 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi Bit set. |
| 8877 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits[] = { |
| 8878 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 8879 | }; |
| 8880 | |
| 8881 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi Register Class... |
| 8882 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi[] = { |
| 8883 | AArch64::Z14_Z15_Z16_Z17, |
| 8884 | }; |
| 8885 | |
| 8886 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi Bit set. |
| 8887 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiBits[] = { |
| 8888 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 8889 | }; |
| 8890 | |
| 8891 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Register Class... |
| 8892 | const MCPhysReg ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4[] = { |
| 8893 | AArch64::Z13_Z14_Z15_Z16, |
| 8894 | }; |
| 8895 | |
| 8896 | // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 Bit set. |
| 8897 | const uint8_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits[] = { |
| 8898 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 8899 | }; |
| 8900 | |
| 8901 | // GPR64x8Class Register Class... |
| 8902 | const MCPhysReg GPR64x8Class[] = { |
| 8903 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8904 | }; |
| 8905 | |
| 8906 | // GPR64x8Class Bit set. |
| 8907 | const uint8_t GPR64x8ClassBits[] = { |
| 8908 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x7f, |
| 8909 | }; |
| 8910 | |
| 8911 | // GPR64x8Class_with_x8sub_0_in_GPR64noip Register Class... |
| 8912 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip[] = { |
| 8913 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8914 | }; |
| 8915 | |
| 8916 | // GPR64x8Class_with_x8sub_0_in_GPR64noip Bit set. |
| 8917 | const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noipBits[] = { |
| 8918 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x6f, |
| 8919 | }; |
| 8920 | |
| 8921 | // GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... |
| 8922 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { |
| 8923 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8924 | }; |
| 8925 | |
| 8926 | // GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. |
| 8927 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { |
| 8928 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x77, |
| 8929 | }; |
| 8930 | |
| 8931 | // GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 8932 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 8933 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8934 | }; |
| 8935 | |
| 8936 | // GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 8937 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 8938 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x7b, |
| 8939 | }; |
| 8940 | |
| 8941 | // GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 8942 | const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 8943 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8944 | }; |
| 8945 | |
| 8946 | // GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 8947 | const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 8948 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x7d, |
| 8949 | }; |
| 8950 | |
| 8951 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... |
| 8952 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { |
| 8953 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8954 | }; |
| 8955 | |
| 8956 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. |
| 8957 | const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { |
| 8958 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x67, |
| 8959 | }; |
| 8960 | |
| 8961 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 8962 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 8963 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8964 | }; |
| 8965 | |
| 8966 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 8967 | const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 8968 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x6b, |
| 8969 | }; |
| 8970 | |
| 8971 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 8972 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 8973 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8974 | }; |
| 8975 | |
| 8976 | // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 8977 | const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 8978 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x6d, |
| 8979 | }; |
| 8980 | |
| 8981 | // GPR64x8Class_with_x8sub_0_in_tcGPR64 Register Class... |
| 8982 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64[] = { |
| 8983 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 8984 | }; |
| 8985 | |
| 8986 | // GPR64x8Class_with_x8sub_0_in_tcGPR64 Bit set. |
| 8987 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64Bits[] = { |
| 8988 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3f, |
| 8989 | }; |
| 8990 | |
| 8991 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 8992 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 8993 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 8994 | }; |
| 8995 | |
| 8996 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 8997 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 8998 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x73, |
| 8999 | }; |
| 9000 | |
| 9001 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9002 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9003 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9004 | }; |
| 9005 | |
| 9006 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9007 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9008 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x75, |
| 9009 | }; |
| 9010 | |
| 9011 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9012 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9013 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9014 | }; |
| 9015 | |
| 9016 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9017 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9018 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x79, |
| 9019 | }; |
| 9020 | |
| 9021 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... |
| 9022 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { |
| 9023 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9024 | }; |
| 9025 | |
| 9026 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. |
| 9027 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { |
| 9028 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x37, |
| 9029 | }; |
| 9030 | |
| 9031 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9032 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9033 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9034 | }; |
| 9035 | |
| 9036 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9037 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9038 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3b, |
| 9039 | }; |
| 9040 | |
| 9041 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9042 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9043 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9044 | }; |
| 9045 | |
| 9046 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9047 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9048 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x3d, |
| 9049 | }; |
| 9050 | |
| 9051 | // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 Register Class... |
| 9052 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPRnotx16[] = { |
| 9053 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9054 | }; |
| 9055 | |
| 9056 | // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 Bit set. |
| 9057 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPRnotx16Bits[] = { |
| 9058 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x2f, |
| 9059 | }; |
| 9060 | |
| 9061 | // GPR64x8Class_with_x8sub_1_in_tcGPR64 Register Class... |
| 9062 | const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64[] = { |
| 9063 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9064 | }; |
| 9065 | |
| 9066 | // GPR64x8Class_with_x8sub_1_in_tcGPR64 Bit set. |
| 9067 | const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64Bits[] = { |
| 9068 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x1f, |
| 9069 | }; |
| 9070 | |
| 9071 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9072 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9073 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9074 | }; |
| 9075 | |
| 9076 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9077 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9078 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x63, |
| 9079 | }; |
| 9080 | |
| 9081 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9082 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9083 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9084 | }; |
| 9085 | |
| 9086 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9087 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9088 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x65, |
| 9089 | }; |
| 9090 | |
| 9091 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9092 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9093 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9094 | }; |
| 9095 | |
| 9096 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9097 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9098 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x69, |
| 9099 | }; |
| 9100 | |
| 9101 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9102 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9103 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9104 | }; |
| 9105 | |
| 9106 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9107 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9108 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x71, |
| 9109 | }; |
| 9110 | |
| 9111 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... |
| 9112 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { |
| 9113 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9114 | }; |
| 9115 | |
| 9116 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. |
| 9117 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { |
| 9118 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x27, |
| 9119 | }; |
| 9120 | |
| 9121 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9122 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9123 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9124 | }; |
| 9125 | |
| 9126 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9127 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x2b, |
| 9129 | }; |
| 9130 | |
| 9131 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9132 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9133 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9134 | }; |
| 9135 | |
| 9136 | // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9137 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9138 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x2d, |
| 9139 | }; |
| 9140 | |
| 9141 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9142 | const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9143 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9144 | }; |
| 9145 | |
| 9146 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9147 | const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9148 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x1b, |
| 9149 | }; |
| 9150 | |
| 9151 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9152 | const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9153 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9154 | }; |
| 9155 | |
| 9156 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9157 | const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x1d, |
| 9159 | }; |
| 9160 | |
| 9161 | // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 Register Class... |
| 9162 | const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17[] = { |
| 9163 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9164 | }; |
| 9165 | |
| 9166 | // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 Bit set. |
| 9167 | const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17Bits[] = { |
| 9168 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, |
| 9169 | }; |
| 9170 | |
| 9171 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9172 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9173 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9174 | }; |
| 9175 | |
| 9176 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9177 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9178 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x33, |
| 9179 | }; |
| 9180 | |
| 9181 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9182 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9183 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9184 | }; |
| 9185 | |
| 9186 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9187 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9188 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x35, |
| 9189 | }; |
| 9190 | |
| 9191 | // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 Register Class... |
| 9192 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_tcGPRnotx16[] = { |
| 9193 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9194 | }; |
| 9195 | |
| 9196 | // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 Bit set. |
| 9197 | const uint8_t GPR64x8Class_with_x8sub_2_in_tcGPRnotx16Bits[] = { |
| 9198 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x17, |
| 9199 | }; |
| 9200 | |
| 9201 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9202 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9203 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9204 | }; |
| 9205 | |
| 9206 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9207 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x39, |
| 9209 | }; |
| 9210 | |
| 9211 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9212 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9213 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9214 | }; |
| 9215 | |
| 9216 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9217 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9218 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x61, |
| 9219 | }; |
| 9220 | |
| 9221 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9222 | const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9223 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9224 | }; |
| 9225 | |
| 9226 | // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9227 | const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9228 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0d, |
| 9229 | }; |
| 9230 | |
| 9231 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9232 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9233 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9234 | }; |
| 9235 | |
| 9236 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9237 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x23, |
| 9239 | }; |
| 9240 | |
| 9241 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9242 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9243 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9244 | }; |
| 9245 | |
| 9246 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9247 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x25, |
| 9249 | }; |
| 9250 | |
| 9251 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... |
| 9252 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { |
| 9253 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9254 | }; |
| 9255 | |
| 9256 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. |
| 9257 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { |
| 9258 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x13, |
| 9259 | }; |
| 9260 | |
| 9261 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9262 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9263 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9264 | }; |
| 9265 | |
| 9266 | // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9267 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9268 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x15, |
| 9269 | }; |
| 9270 | |
| 9271 | // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 Register Class... |
| 9272 | const MCPhysReg GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17[] = { |
| 9273 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, |
| 9274 | }; |
| 9275 | |
| 9276 | // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 Bit set. |
| 9277 | const uint8_t GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17Bits[] = { |
| 9278 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, |
| 9279 | }; |
| 9280 | |
| 9281 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9282 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9283 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9284 | }; |
| 9285 | |
| 9286 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9287 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x29, |
| 9289 | }; |
| 9290 | |
| 9291 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9292 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9293 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9294 | }; |
| 9295 | |
| 9296 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9297 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9298 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x19, |
| 9299 | }; |
| 9300 | |
| 9301 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9302 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9303 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9304 | }; |
| 9305 | |
| 9306 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9307 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9308 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x31, |
| 9309 | }; |
| 9310 | |
| 9311 | // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 Register Class... |
| 9312 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_tcGPRnotx16[] = { |
| 9313 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9314 | }; |
| 9315 | |
| 9316 | // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 Bit set. |
| 9317 | const uint8_t GPR64x8Class_with_x8sub_4_in_tcGPRnotx16Bits[] = { |
| 9318 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0b, |
| 9319 | }; |
| 9320 | |
| 9321 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9322 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9323 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9324 | }; |
| 9325 | |
| 9326 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9327 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9328 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x09, |
| 9329 | }; |
| 9330 | |
| 9331 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9332 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9333 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, |
| 9334 | }; |
| 9335 | |
| 9336 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9337 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9338 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x21, |
| 9339 | }; |
| 9340 | |
| 9341 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... |
| 9342 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { |
| 9343 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9344 | }; |
| 9345 | |
| 9346 | // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. |
| 9347 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { |
| 9348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x11, |
| 9349 | }; |
| 9350 | |
| 9351 | // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 Register Class... |
| 9352 | const MCPhysReg GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17[] = { |
| 9353 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, |
| 9354 | }; |
| 9355 | |
| 9356 | // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 Bit set. |
| 9357 | const uint8_t GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17Bits[] = { |
| 9358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, |
| 9359 | }; |
| 9360 | |
| 9361 | // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 Register Class... |
| 9362 | const MCPhysReg GPR64x8Class_with_x8sub_6_in_tcGPRnotx16[] = { |
| 9363 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, |
| 9364 | }; |
| 9365 | |
| 9366 | // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 Bit set. |
| 9367 | const uint8_t GPR64x8Class_with_x8sub_6_in_tcGPRnotx16Bits[] = { |
| 9368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x05, |
| 9369 | }; |
| 9370 | |
| 9371 | // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 Register Class... |
| 9372 | const MCPhysReg GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17[] = { |
| 9373 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, |
| 9374 | }; |
| 9375 | |
| 9376 | // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 Bit set. |
| 9377 | const uint8_t GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17Bits[] = { |
| 9378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, |
| 9379 | }; |
| 9380 | |
| 9381 | // GPR64x8Class_with_sub_32_in_GPR32arg Register Class... |
| 9382 | const MCPhysReg GPR64x8Class_with_sub_32_in_GPR32arg[] = { |
| 9383 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, |
| 9384 | }; |
| 9385 | |
| 9386 | // GPR64x8Class_with_sub_32_in_GPR32arg Bit set. |
| 9387 | const uint8_t GPR64x8Class_with_sub_32_in_GPR32argBits[] = { |
| 9388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, |
| 9389 | }; |
| 9390 | |
| 9391 | // MPR32 Register Class... |
| 9392 | const MCPhysReg MPR32[] = { |
| 9393 | AArch64::ZAS0, AArch64::ZAS1, AArch64::ZAS2, AArch64::ZAS3, |
| 9394 | }; |
| 9395 | |
| 9396 | // MPR32 Bit set. |
| 9397 | const uint8_t MPR32Bits[] = { |
| 9398 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, |
| 9399 | }; |
| 9400 | |
| 9401 | // GPR64x8Class_with_x8sub_2_in_GPR64arg Register Class... |
| 9402 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64arg[] = { |
| 9403 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, |
| 9404 | }; |
| 9405 | |
| 9406 | // GPR64x8Class_with_x8sub_2_in_GPR64arg Bit set. |
| 9407 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64argBits[] = { |
| 9408 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, |
| 9409 | }; |
| 9410 | |
| 9411 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... |
| 9412 | const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15[] = { |
| 9413 | AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9414 | }; |
| 9415 | |
| 9416 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. |
| 9417 | const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { |
| 9418 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, |
| 9419 | }; |
| 9420 | |
| 9421 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9422 | const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9423 | AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, |
| 9424 | }; |
| 9425 | |
| 9426 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9427 | const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9428 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, |
| 9429 | }; |
| 9430 | |
| 9431 | // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... |
| 9432 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15[] = { |
| 9433 | AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, |
| 9434 | }; |
| 9435 | |
| 9436 | // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. |
| 9437 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { |
| 9438 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, |
| 9439 | }; |
| 9440 | |
| 9441 | // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9442 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9443 | AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, |
| 9444 | }; |
| 9445 | |
| 9446 | // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9447 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9448 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, |
| 9449 | }; |
| 9450 | |
| 9451 | // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9452 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9453 | AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, |
| 9454 | }; |
| 9455 | |
| 9456 | // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9457 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9458 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, |
| 9459 | }; |
| 9460 | |
| 9461 | // GPR64x8Class_with_x8sub_4_in_GPR64arg Register Class... |
| 9462 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64arg[] = { |
| 9463 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, |
| 9464 | }; |
| 9465 | |
| 9466 | // GPR64x8Class_with_x8sub_4_in_GPR64arg Bit set. |
| 9467 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64argBits[] = { |
| 9468 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, |
| 9469 | }; |
| 9470 | |
| 9471 | // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9472 | const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9473 | AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, |
| 9474 | }; |
| 9475 | |
| 9476 | // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9477 | const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9478 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, |
| 9479 | }; |
| 9480 | |
| 9481 | // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9482 | const MCPhysReg GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9483 | AArch64::X6_X7_X8_X9_X10_X11_X12_X13, |
| 9484 | }; |
| 9485 | |
| 9486 | // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9487 | const uint8_t GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9488 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, |
| 9489 | }; |
| 9490 | |
| 9491 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9492 | const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9493 | AArch64::X8_X9_X10_X11_X12_X13_X14_X15, |
| 9494 | }; |
| 9495 | |
| 9496 | // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9497 | const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9498 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, |
| 9499 | }; |
| 9500 | |
| 9501 | // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 Register Class... |
| 9502 | const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPRx16x17[] = { |
| 9503 | AArch64::X16_X17_X18_X19_X20_X21_X22_X23, |
| 9504 | }; |
| 9505 | |
| 9506 | // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 Bit set. |
| 9507 | const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPRx16x17Bits[] = { |
| 9508 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 9509 | }; |
| 9510 | |
| 9511 | // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9512 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9513 | AArch64::X4_X5_X6_X7_X8_X9_X10_X11, |
| 9514 | }; |
| 9515 | |
| 9516 | // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9517 | const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9518 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, |
| 9519 | }; |
| 9520 | |
| 9521 | // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 Register Class... |
| 9522 | const MCPhysReg GPR64x8Class_with_x8sub_2_in_tcGPRx16x17[] = { |
| 9523 | AArch64::X14_X15_X16_X17_X18_X19_X20_X21, |
| 9524 | }; |
| 9525 | |
| 9526 | // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 Bit set. |
| 9527 | const uint8_t GPR64x8Class_with_x8sub_2_in_tcGPRx16x17Bits[] = { |
| 9528 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 9529 | }; |
| 9530 | |
| 9531 | // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... |
| 9532 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { |
| 9533 | AArch64::X2_X3_X4_X5_X6_X7_X8_X9, |
| 9534 | }; |
| 9535 | |
| 9536 | // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. |
| 9537 | const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { |
| 9538 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, |
| 9539 | }; |
| 9540 | |
| 9541 | // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 Register Class... |
| 9542 | const MCPhysReg GPR64x8Class_with_x8sub_4_in_tcGPRx16x17[] = { |
| 9543 | AArch64::X12_X13_X14_X15_X16_X17_X18_X19, |
| 9544 | }; |
| 9545 | |
| 9546 | // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 Bit set. |
| 9547 | const uint8_t GPR64x8Class_with_x8sub_4_in_tcGPRx16x17Bits[] = { |
| 9548 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, |
| 9549 | }; |
| 9550 | |
| 9551 | // GPR64x8Class_with_x8sub_6_in_GPR64arg Register Class... |
| 9552 | const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64arg[] = { |
| 9553 | AArch64::X0_X1_X2_X3_X4_X5_X6_X7, |
| 9554 | }; |
| 9555 | |
| 9556 | // GPR64x8Class_with_x8sub_6_in_GPR64arg Bit set. |
| 9557 | const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64argBits[] = { |
| 9558 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 9559 | }; |
| 9560 | |
| 9561 | // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 Register Class... |
| 9562 | const MCPhysReg GPR64x8Class_with_x8sub_6_in_tcGPRx16x17[] = { |
| 9563 | AArch64::X10_X11_X12_X13_X14_X15_X16_X17, |
| 9564 | }; |
| 9565 | |
| 9566 | // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 Bit set. |
| 9567 | const uint8_t GPR64x8Class_with_x8sub_6_in_tcGPRx16x17Bits[] = { |
| 9568 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, |
| 9569 | }; |
| 9570 | |
| 9571 | // GPR64x8Class_with_x8sub_7_in_FIXED_REGS Register Class... |
| 9572 | const MCPhysReg GPR64x8Class_with_x8sub_7_in_FIXED_REGS[] = { |
| 9573 | AArch64::X22_X23_X24_X25_X26_X27_X28_FP, |
| 9574 | }; |
| 9575 | |
| 9576 | // GPR64x8Class_with_x8sub_7_in_FIXED_REGS Bit set. |
| 9577 | const uint8_t GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits[] = { |
| 9578 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 9579 | }; |
| 9580 | |
| 9581 | // ZTR Register Class... |
| 9582 | const MCPhysReg ZTR[] = { |
| 9583 | AArch64::ZT0, |
| 9584 | }; |
| 9585 | |
| 9586 | // ZTR Bit set. |
| 9587 | const uint8_t ZTRBits[] = { |
| 9588 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, |
| 9589 | }; |
| 9590 | |
| 9591 | // MPR16 Register Class... |
| 9592 | const MCPhysReg MPR16[] = { |
| 9593 | AArch64::ZAH0, AArch64::ZAH1, |
| 9594 | }; |
| 9595 | |
| 9596 | // MPR16 Bit set. |
| 9597 | const uint8_t MPR16Bits[] = { |
| 9598 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, |
| 9599 | }; |
| 9600 | |
| 9601 | // MPR Register Class... |
| 9602 | const MCPhysReg MPR[] = { |
| 9603 | AArch64::ZA, |
| 9604 | }; |
| 9605 | |
| 9606 | // MPR Bit set. |
| 9607 | const uint8_t MPRBits[] = { |
| 9608 | 0x00, 0x80, |
| 9609 | }; |
| 9610 | |
| 9611 | // MPR8 Register Class... |
| 9612 | const MCPhysReg MPR8[] = { |
| 9613 | AArch64::ZAB0, |
| 9614 | }; |
| 9615 | |
| 9616 | // MPR8 Bit set. |
| 9617 | const uint8_t MPR8Bits[] = { |
| 9618 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, |
| 9619 | }; |
| 9620 | |
| 9621 | } // end anonymous namespace |
| 9622 | |
| 9623 | |
| 9624 | #ifdef __GNUC__ |
| 9625 | #pragma GCC diagnostic push |
| 9626 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 9627 | #endif |
| 9628 | extern const char AArch64RegClassStrings[] = { |
| 9629 | /* 0 */ "GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9630 | /* 126 */ "GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9631 | /* 239 */ "XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9632 | /* 312 */ "GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9633 | /* 426 */ "GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9634 | /* 540 */ "GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11\000" |
| 9635 | /* 590 */ "WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11\000" |
| 9636 | /* 642 */ "FPR32\000" |
| 9637 | /* 648 */ "GPR32\000" |
| 9638 | /* 654 */ "MPR32\000" |
| 9639 | /* 660 */ "FIXED_REGS_with_sub_32\000" |
| 9640 | /* 683 */ "PPR2\000" |
| 9641 | /* 688 */ "ZPR2\000" |
| 9642 | /* 693 */ "PPR2Mul2\000" |
| 9643 | /* 702 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2\000" |
| 9644 | /* 736 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2\000" |
| 9645 | /* 770 */ "PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2\000" |
| 9646 | /* 830 */ "PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2\000" |
| 9647 | /* 886 */ "ZPR2Strided_with_zsub0_in_ZPRMul2\000" |
| 9648 | /* 920 */ "ZPR4Strided_with_zsub0_in_ZPRMul2\000" |
| 9649 | /* 954 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2\000" |
| 9650 | /* 1000 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2\000" |
| 9651 | /* 1046 */ "ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2\000" |
| 9652 | /* 1107 */ "ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2\000" |
| 9653 | /* 1211 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2\000" |
| 9654 | /* 1270 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2\000" |
| 9655 | /* 1331 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2\000" |
| 9656 | /* 1387 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2\000" |
| 9657 | /* 1446 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2\000" |
| 9658 | /* 1507 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2\000" |
| 9659 | /* 1563 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2\000" |
| 9660 | /* 1622 */ "ZPR3\000" |
| 9661 | /* 1627 */ "FPR64\000" |
| 9662 | /* 1633 */ "FIXED_REGS_and_GPR64\000" |
| 9663 | /* 1654 */ "GPR64x8Class_with_x8sub_0_in_tcGPR64\000" |
| 9664 | /* 1691 */ "GPR64x8Class_with_x8sub_1_in_tcGPR64\000" |
| 9665 | /* 1728 */ "XSeqPairsClass_with_sube64_in_tcGPR64\000" |
| 9666 | /* 1766 */ "XSeqPairsClass_with_subo64_in_tcGPR64\000" |
| 9667 | /* 1804 */ "MPR64\000" |
| 9668 | /* 1810 */ "ZPR4\000" |
| 9669 | /* 1815 */ "ZPR4Mul4\000" |
| 9670 | /* 1824 */ "ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9671 | /* 1873 */ "ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9672 | /* 1922 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9673 | /* 1983 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9674 | /* 2044 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9675 | /* 2229 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9676 | /* 2372 */ "ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9677 | /* 2508 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9678 | /* 2579 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4\000" |
| 9679 | /* 2653 */ "ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9680 | /* 2702 */ "ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9681 | /* 2751 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9682 | /* 2812 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9683 | /* 2873 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9684 | /* 2947 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9685 | /* 3021 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4\000" |
| 9686 | /* 3095 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9687 | /* 3163 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9688 | /* 3231 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9689 | /* 3328 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9690 | /* 3456 */ "ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9691 | /* 3555 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9692 | /* 3623 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9693 | /* 3691 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9694 | /* 3791 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9695 | /* 3922 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4\000" |
| 9696 | /* 4053 */ "ZPR3_with_zsub0_in_ZPRMul4\000" |
| 9697 | /* 4080 */ "ZPR2Strided_with_zsub0_in_ZPRMul4\000" |
| 9698 | /* 4114 */ "ZPR4Strided_with_zsub0_in_ZPRMul4\000" |
| 9699 | /* 4148 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4\000" |
| 9700 | /* 4194 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4\000" |
| 9701 | /* 4240 */ "ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4\000" |
| 9702 | /* 4301 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4\000" |
| 9703 | /* 4471 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4\000" |
| 9704 | /* 4530 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4\000" |
| 9705 | /* 4591 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4\000" |
| 9706 | /* 4647 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4\000" |
| 9707 | /* 4706 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4\000" |
| 9708 | /* 4767 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4\000" |
| 9709 | /* 4823 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4\000" |
| 9710 | /* 4882 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4\000" |
| 9711 | /* 4943 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4\000" |
| 9712 | /* 5071 */ "ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4\000" |
| 9713 | /* 5192 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4\000" |
| 9714 | /* 5251 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4\000" |
| 9715 | /* 5312 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4\000" |
| 9716 | /* 5371 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4\000" |
| 9717 | /* 5432 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4\000" |
| 9718 | /* 5491 */ "GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15\000" |
| 9719 | /* 5564 */ "XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15\000" |
| 9720 | /* 5638 */ "GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15\000" |
| 9721 | /* 5689 */ "WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15\000" |
| 9722 | /* 5742 */ "PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15\000" |
| 9723 | /* 5784 */ "PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15\000" |
| 9724 | /* 5859 */ "PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15\000" |
| 9725 | /* 5922 */ "PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15\000" |
| 9726 | /* 5981 */ "FPR16\000" |
| 9727 | /* 5987 */ "MPR16\000" |
| 9728 | /* 5993 */ "GPR64x8Class_with_x8sub_0_in_tcGPRnotx16\000" |
| 9729 | /* 6034 */ "GPR64x8Class_with_x8sub_2_in_tcGPRnotx16\000" |
| 9730 | /* 6075 */ "XSeqPairsClass_with_sube64_in_tcGPRnotx16\000" |
| 9731 | /* 6117 */ "GPR64x8Class_with_x8sub_4_in_tcGPRnotx16\000" |
| 9732 | /* 6158 */ "GPR64x8Class_with_x8sub_6_in_tcGPRnotx16\000" |
| 9733 | /* 6199 */ "GPR64x8Class_with_x8sub_0_in_tcGPRx16x17\000" |
| 9734 | /* 6240 */ "GPR64x8Class_with_x8sub_2_in_tcGPRx16x17\000" |
| 9735 | /* 6281 */ "XSeqPairsClass_with_sube64_in_tcGPRx16x17\000" |
| 9736 | /* 6323 */ "GPR64x8Class_with_x8sub_4_in_tcGPRx16x17\000" |
| 9737 | /* 6364 */ "GPR64x8Class_with_x8sub_6_in_tcGPRx16x17\000" |
| 9738 | /* 6405 */ "GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17\000" |
| 9739 | /* 6449 */ "GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17\000" |
| 9740 | /* 6493 */ "XSeqPairsClass_with_subo64_in_tcGPRnotx16x17\000" |
| 9741 | /* 6538 */ "GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17\000" |
| 9742 | /* 6582 */ "GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17\000" |
| 9743 | /* 6626 */ "tcGPRx17\000" |
| 9744 | /* 6635 */ "QQQQ_with_qsub0_in_FPR128_0to7\000" |
| 9745 | /* 6666 */ "ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7\000" |
| 9746 | /* 6731 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7\000" |
| 9747 | /* 6796 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7\000" |
| 9748 | /* 6861 */ "QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7\000" |
| 9749 | /* 6927 */ "QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7\000" |
| 9750 | /* 6991 */ "QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7\000" |
| 9751 | /* 7053 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7\000" |
| 9752 | /* 7118 */ "ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7\000" |
| 9753 | /* 7181 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7\000" |
| 9754 | /* 7246 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7\000" |
| 9755 | /* 7309 */ "QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7\000" |
| 9756 | /* 7375 */ "QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7\000" |
| 9757 | /* 7438 */ "QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7\000" |
| 9758 | /* 7502 */ "QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7\000" |
| 9759 | /* 7563 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7\000" |
| 9760 | /* 7628 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7\000" |
| 9761 | /* 7691 */ "ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7\000" |
| 9762 | /* 7754 */ "QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7\000" |
| 9763 | /* 7820 */ "QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7\000" |
| 9764 | /* 7883 */ "QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7\000" |
| 9765 | /* 7946 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7\000" |
| 9766 | /* 8014 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7\000" |
| 9767 | /* 8082 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7\000" |
| 9768 | /* 8184 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7\000" |
| 9769 | /* 8317 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7\000" |
| 9770 | /* 8450 */ "ZPR3_with_zsub_in_FPR128_0to7\000" |
| 9771 | /* 8480 */ "ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7\000" |
| 9772 | /* 8523 */ "ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7\000" |
| 9773 | /* 8572 */ "ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7\000" |
| 9774 | /* 8621 */ "FPR128\000" |
| 9775 | /* 8628 */ "MPR128\000" |
| 9776 | /* 8635 */ "FPR8\000" |
| 9777 | /* 8640 */ "MPR8\000" |
| 9778 | /* 8645 */ "B_HI_DummyRC\000" |
| 9779 | /* 8658 */ "D_HI_DummyRC\000" |
| 9780 | /* 8671 */ "H_HI_DummyRC\000" |
| 9781 | /* 8684 */ "Q_HI_DummyRC\000" |
| 9782 | /* 8697 */ "S_HI_DummyRC\000" |
| 9783 | /* 8710 */ "W_HI_DummyRC\000" |
| 9784 | /* 8723 */ "DDDD\000" |
| 9785 | /* 8728 */ "ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K\000" |
| 9786 | /* 8772 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K\000" |
| 9787 | /* 8828 */ "ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K\000" |
| 9788 | /* 8894 */ "ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K\000" |
| 9789 | /* 8931 */ "ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K\000" |
| 9790 | /* 8968 */ "ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K\000" |
| 9791 | /* 9005 */ "ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K\000" |
| 9792 | /* 9042 */ "ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K\000" |
| 9793 | /* 9086 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K\000" |
| 9794 | /* 9142 */ "ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K\000" |
| 9795 | /* 9179 */ "ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K\000" |
| 9796 | /* 9216 */ "ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K\000" |
| 9797 | /* 9253 */ "ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K\000" |
| 9798 | /* 9290 */ "ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K\000" |
| 9799 | /* 9327 */ "ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K\000" |
| 9800 | /* 9364 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9801 | /* 9427 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9802 | /* 9490 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9803 | /* 9582 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9804 | /* 9705 */ "ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9805 | /* 9799 */ "ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K\000" |
| 9806 | /* 9856 */ "ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K\000" |
| 9807 | /* 9913 */ "ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K\000" |
| 9808 | /* 9970 */ "ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K\000" |
| 9809 | /* 10008 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K\000" |
| 9810 | /* 10065 */ "ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K\000" |
| 9811 | /* 10122 */ "ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K\000" |
| 9812 | /* 10179 */ "ZPR2Strided_with_zsub0_in_ZPR_K\000" |
| 9813 | /* 10211 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K\000" |
| 9814 | /* 10255 */ "ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K\000" |
| 9815 | /* 10309 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K\000" |
| 9816 | /* 10363 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K\000" |
| 9817 | /* 10417 */ "ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K\000" |
| 9818 | /* 10474 */ "ZPR4Strided_with_zsub1_in_ZPR_K\000" |
| 9819 | /* 10506 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K\000" |
| 9820 | /* 10600 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K\000" |
| 9821 | /* 10694 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K\000" |
| 9822 | /* 10748 */ "ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K\000" |
| 9823 | /* 10802 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K\000" |
| 9824 | /* 10856 */ "ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K\000" |
| 9825 | /* 10910 */ "ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K\000" |
| 9826 | /* 10964 */ "ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K\000" |
| 9827 | /* 11018 */ "QQQQ\000" |
| 9828 | /* 11023 */ "CCR\000" |
| 9829 | /* 11027 */ "PPRorPNR\000" |
| 9830 | /* 11036 */ "MPR\000" |
| 9831 | /* 11040 */ "PPR\000" |
| 9832 | /* 11044 */ "ZPR\000" |
| 9833 | /* 11048 */ "ZTR\000" |
| 9834 | /* 11052 */ "XSeqPairsClass_with_subo64_in_FIXED_REGS\000" |
| 9835 | /* 11093 */ "GPR64x8Class_with_x8sub_7_in_FIXED_REGS\000" |
| 9836 | /* 11133 */ "PPR2Mul2_and_PPR2_with_psub_in_PNR_3b\000" |
| 9837 | /* 11171 */ "PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b\000" |
| 9838 | /* 11238 */ "PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b\000" |
| 9839 | /* 11297 */ "PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b\000" |
| 9840 | /* 11352 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b\000" |
| 9841 | /* 11409 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b\000" |
| 9842 | /* 11466 */ "ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b\000" |
| 9843 | /* 11538 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b\000" |
| 9844 | /* 11610 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b\000" |
| 9845 | /* 11682 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b\000" |
| 9846 | /* 11752 */ "ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b\000" |
| 9847 | /* 11790 */ "ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b\000" |
| 9848 | /* 11828 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b\000" |
| 9849 | /* 11885 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b\000" |
| 9850 | /* 11942 */ "ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b\000" |
| 9851 | /* 12014 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b\000" |
| 9852 | /* 12086 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b\000" |
| 9853 | /* 12158 */ "ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b\000" |
| 9854 | /* 12230 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b\000" |
| 9855 | /* 12302 */ "ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b\000" |
| 9856 | /* 12374 */ "ZPR_4b\000" |
| 9857 | /* 12381 */ "ZPR2Strided\000" |
| 9858 | /* 12393 */ "ZPR4Strided\000" |
| 9859 | /* 12405 */ "GPR64x8Class_with_sub_32_in_GPR32arg\000" |
| 9860 | /* 12442 */ "WSeqPairsClass_with_sube32_in_GPR32arg\000" |
| 9861 | /* 12481 */ "GPR64x8Class_with_x8sub_2_in_GPR64arg\000" |
| 9862 | /* 12519 */ "XSeqPairsClass_with_sube64_in_GPR64arg\000" |
| 9863 | /* 12558 */ "GPR64x8Class_with_x8sub_4_in_GPR64arg\000" |
| 9864 | /* 12596 */ "GPR64x8Class_with_x8sub_6_in_GPR64arg\000" |
| 9865 | /* 12634 */ "ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi\000" |
| 9866 | /* 12703 */ "ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi\000" |
| 9867 | /* 12772 */ "ZPR2Strided_with_zsub0_in_ZPRMul2_Hi\000" |
| 9868 | /* 12809 */ "ZPR4Strided_with_zsub0_in_ZPRMul2_Hi\000" |
| 9869 | /* 12846 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi\000" |
| 9870 | /* 12895 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi\000" |
| 9871 | /* 12944 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi\000" |
| 9872 | /* 13117 */ "ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi\000" |
| 9873 | /* 13283 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi\000" |
| 9874 | /* 13345 */ "ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi\000" |
| 9875 | /* 13404 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi\000" |
| 9876 | /* 13466 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi\000" |
| 9877 | /* 13525 */ "ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi\000" |
| 9878 | /* 13587 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi\000" |
| 9879 | /* 13649 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi\000" |
| 9880 | /* 13780 */ "ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi\000" |
| 9881 | /* 13904 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi\000" |
| 9882 | /* 13966 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi\000" |
| 9883 | /* 14028 */ "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi\000" |
| 9884 | /* 14087 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi\000" |
| 9885 | /* 14149 */ "GPR32all\000" |
| 9886 | /* 14158 */ "GPR64all\000" |
| 9887 | /* 14167 */ "WSeqPairsClass_with_subo32_in_GPR32common\000" |
| 9888 | /* 14209 */ "XSeqPairsClass_with_subo64_in_GPR64common\000" |
| 9889 | /* 14251 */ "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo\000" |
| 9890 | /* 14288 */ "ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo\000" |
| 9891 | /* 14325 */ "ZPR2Strided_with_zsub0_in_ZPRMul2_Lo\000" |
| 9892 | /* 14362 */ "ZPR4Strided_with_zsub0_in_ZPRMul2_Lo\000" |
| 9893 | /* 14399 */ "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo\000" |
| 9894 | /* 14448 */ "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo\000" |
| 9895 | /* 14497 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo\000" |
| 9896 | /* 14559 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo\000" |
| 9897 | /* 14621 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo\000" |
| 9898 | /* 14683 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo\000" |
| 9899 | /* 14745 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo\000" |
| 9900 | /* 14807 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo\000" |
| 9901 | /* 14869 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo\000" |
| 9902 | /* 14931 */ "DDDD_with_dsub0_in_FPR64_lo\000" |
| 9903 | /* 14959 */ "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo\000" |
| 9904 | /* 15019 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo\000" |
| 9905 | /* 15079 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo\000" |
| 9906 | /* 15139 */ "DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo\000" |
| 9907 | /* 15199 */ "DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo\000" |
| 9908 | /* 15257 */ "DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo\000" |
| 9909 | /* 15313 */ "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo\000" |
| 9910 | /* 15374 */ "QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo\000" |
| 9911 | /* 15433 */ "QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo\000" |
| 9912 | /* 15490 */ "ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo\000" |
| 9913 | /* 15550 */ "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo\000" |
| 9914 | /* 15610 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo\000" |
| 9915 | /* 15670 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo\000" |
| 9916 | /* 15730 */ "DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo\000" |
| 9917 | /* 15790 */ "DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo\000" |
| 9918 | /* 15850 */ "DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo\000" |
| 9919 | /* 15908 */ "DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo\000" |
| 9920 | /* 15966 */ "QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo\000" |
| 9921 | /* 16026 */ "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo\000" |
| 9922 | /* 16087 */ "QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo\000" |
| 9923 | /* 16145 */ "QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo\000" |
| 9924 | /* 16204 */ "ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo\000" |
| 9925 | /* 16264 */ "ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo\000" |
| 9926 | /* 16324 */ "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo\000" |
| 9927 | /* 16384 */ "DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo\000" |
| 9928 | /* 16444 */ "DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo\000" |
| 9929 | /* 16504 */ "DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo\000" |
| 9930 | /* 16564 */ "QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo\000" |
| 9931 | /* 16624 */ "QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo\000" |
| 9932 | /* 16684 */ "QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo\000" |
| 9933 | /* 16745 */ "ZPR2Strided_with_dsub_in_FPR64_lo\000" |
| 9934 | /* 16779 */ "ZPR4Strided_with_dsub_in_FPR64_lo\000" |
| 9935 | /* 16813 */ "ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo\000" |
| 9936 | /* 16859 */ "ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo\000" |
| 9937 | /* 16905 */ "FPR32_with_hsub_in_FPR16_lo\000" |
| 9938 | /* 16933 */ "QQQQ_with_qsub0_in_FPR128_lo\000" |
| 9939 | /* 16962 */ "ZPR2_with_zsub_in_FPR128_lo\000" |
| 9940 | /* 16990 */ "ZPR3_with_zsub_in_FPR128_lo\000" |
| 9941 | /* 17018 */ "ZPR4_with_zsub_in_FPR128_lo\000" |
| 9942 | /* 17046 */ "GPR64common_and_GPR64noip\000" |
| 9943 | /* 17072 */ "GPR64x8Class_with_x8sub_0_in_GPR64noip\000" |
| 9944 | /* 17111 */ "GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip\000" |
| 9945 | /* 17191 */ "GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip\000" |
| 9946 | /* 17314 */ "XSeqPairsClass_with_sube64_in_GPR64noip\000" |
| 9947 | /* 17354 */ "XSeqPairsClass_with_subo64_in_GPR64noip\000" |
| 9948 | /* 17394 */ "GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip\000" |
| 9949 | /* 17517 */ "GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip\000" |
| 9950 | /* 17640 */ "GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip\000" |
| 9951 | /* 17806 */ "GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip\000" |
| 9952 | /* 17931 */ "GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip\000" |
| 9953 | /* 18013 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9954 | /* 18179 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9955 | /* 18302 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9956 | /* 18468 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9957 | /* 18591 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9958 | /* 18800 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9959 | /* 18966 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9960 | /* 19132 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9961 | /* 19300 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9962 | /* 19425 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9963 | /* 19550 */ "GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip\000" |
| 9964 | /* 19632 */ "GPR32sp\000" |
| 9965 | /* 19640 */ "GPR64sp\000" |
| 9966 | /* 19648 */ "GPR64x8Class\000" |
| 9967 | /* 19661 */ "WSeqPairsClass\000" |
| 9968 | /* 19676 */ "XSeqPairsClass\000" |
| 9969 | /* 19691 */ "ZPR2StridedOrContiguous\000" |
| 9970 | /* 19715 */ "ZPR4StridedOrContiguous\000" |
| 9971 | /* 19739 */ "GPR32sponly\000" |
| 9972 | /* 19751 */ "GPR64sponly\000" |
| 9973 | }; |
| 9974 | #ifdef __GNUC__ |
| 9975 | #pragma GCC diagnostic pop |
| 9976 | #endif |
| 9977 | |
| 9978 | extern const MCRegisterClass AArch64MCRegisterClasses[] = { |
| 9979 | { W_HI_DummyRC, W_HI_DummyRCBits, 8710, 33, sizeof(W_HI_DummyRCBits), AArch64::W_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9980 | { B_HI_DummyRC, B_HI_DummyRCBits, 8645, 32, sizeof(B_HI_DummyRCBits), AArch64::B_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9981 | { D_HI_DummyRC, D_HI_DummyRCBits, 8658, 32, sizeof(D_HI_DummyRCBits), AArch64::D_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9982 | { H_HI_DummyRC, H_HI_DummyRCBits, 8671, 32, sizeof(H_HI_DummyRCBits), AArch64::H_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9983 | { Q_HI_DummyRC, Q_HI_DummyRCBits, 8684, 32, sizeof(Q_HI_DummyRCBits), AArch64::Q_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9984 | { S_HI_DummyRC, S_HI_DummyRCBits, 8697, 32, sizeof(S_HI_DummyRCBits), AArch64::S_HI_DummyRCRegClassID, 8, 1, false, false }, |
| 9985 | { FPR8, FPR8Bits, 8635, 32, sizeof(FPR8Bits), AArch64::FPR8RegClassID, 8, 1, true, false }, |
| 9986 | { FPR16, FPR16Bits, 5981, 32, sizeof(FPR16Bits), AArch64::FPR16RegClassID, 16, 1, true, false }, |
| 9987 | { PPRorPNR, PPRorPNRBits, 11027, 32, sizeof(PPRorPNRBits), AArch64::PPRorPNRRegClassID, 16, 1, true, false }, |
| 9988 | { FPR16_lo, FPR16_loBits, 16924, 16, sizeof(FPR16_loBits), AArch64::FPR16_loRegClassID, 16, 1, true, false }, |
| 9989 | { PNR, PNRBits, 11032, 16, sizeof(PNRBits), AArch64::PNRRegClassID, 16, 1, true, false }, |
| 9990 | { PPR, PPRBits, 11040, 16, sizeof(PPRBits), AArch64::PPRRegClassID, 0, 1, true, false }, |
| 9991 | { PNR_3b, PNR_3bBits, 11164, 8, sizeof(PNR_3bBits), AArch64::PNR_3bRegClassID, 16, 1, true, false }, |
| 9992 | { PNR_p8to15, PNR_p8to15Bits, 5773, 8, sizeof(PNR_p8to15Bits), AArch64::PNR_p8to15RegClassID, 16, 1, true, false }, |
| 9993 | { PPRMul2, PPRMul2Bits, 822, 8, sizeof(PPRMul2Bits), AArch64::PPRMul2RegClassID, 0, 1, true, false }, |
| 9994 | { PPR_3b, PPR_3bBits, 11231, 8, sizeof(PPR_3bBits), AArch64::PPR_3bRegClassID, 0, 1, true, false }, |
| 9995 | { PPR_p8to15, PPR_p8to15Bits, 5848, 8, sizeof(PPR_p8to15Bits), AArch64::PPR_p8to15RegClassID, 0, 1, true, false }, |
| 9996 | { PPRMul2_and_PPR_3b, PPRMul2_and_PPR_3bBits, 11219, 4, sizeof(PPRMul2_and_PPR_3bBits), AArch64::PPRMul2_and_PPR_3bRegClassID, 0, 1, true, false }, |
| 9997 | { PPRMul2_and_PPR_p8to15, PPRMul2_and_PPR_p8to15Bits, 5836, 4, sizeof(PPRMul2_and_PPR_p8to15Bits), AArch64::PPRMul2_and_PPR_p8to15RegClassID, 0, 1, true, false }, |
| 9998 | { PPR2, PPR2Bits, 683, 16, sizeof(PPR2Bits), AArch64::PPR2RegClassID, 32, 1, true, false }, |
| 9999 | { PPR2Mul2, PPR2Mul2Bits, 693, 8, sizeof(PPR2Mul2Bits), AArch64::PPR2Mul2RegClassID, 32, 1, true, false }, |
| 10000 | { PPR2_with_psub1_in_PPRMul2, PPR2_with_psub1_in_PPRMul2Bits, 803, 8, sizeof(PPR2_with_psub1_in_PPRMul2Bits), AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, 32, 1, true, false }, |
| 10001 | { PPR2_with_psub1_in_PPR_3b, PPR2_with_psub1_in_PPR_3bBits, 11271, 8, sizeof(PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true, false }, |
| 10002 | { PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub1_in_PPR_p8to15Bits, 5892, 8, sizeof(PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true, false }, |
| 10003 | { PPR2_with_psub_in_PNR_3b, PPR2_with_psub_in_PNR_3bBits, 11146, 8, sizeof(PPR2_with_psub_in_PNR_3bBits), AArch64::PPR2_with_psub_in_PNR_3bRegClassID, 32, 1, true, false }, |
| 10004 | { PPR2_with_psub_in_PNR_p8to15, PPR2_with_psub_in_PNR_p8to15Bits, 5755, 8, sizeof(PPR2_with_psub_in_PNR_p8to15Bits), AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, 32, 1, true, false }, |
| 10005 | { PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b, PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bBits, 11297, 7, sizeof(PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true, false }, |
| 10006 | { PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits, 5859, 7, sizeof(PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true, false }, |
| 10007 | { PPR2Mul2_and_PPR2_with_psub_in_PNR_3b, PPR2Mul2_and_PPR2_with_psub_in_PNR_3bBits, 11133, 4, sizeof(PPR2Mul2_and_PPR2_with_psub_in_PNR_3bBits), AArch64::PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClassID, 32, 1, true, false }, |
| 10008 | { PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15, PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15Bits, 5742, 4, sizeof(PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15Bits), AArch64::PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClassID, 32, 1, true, false }, |
| 10009 | { PPR2_with_psub1_in_PPRMul2_and_PPR_3b, PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits, 11200, 4, sizeof(PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits), AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID, 32, 1, true, false }, |
| 10010 | { PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15, PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits, 5817, 4, sizeof(PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits), AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID, 32, 1, true, false }, |
| 10011 | { PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2, PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2Bits, 830, 4, sizeof(PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2Bits), AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClassID, 32, 1, true, false }, |
| 10012 | { PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2, PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2Bits, 770, 4, sizeof(PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2Bits), AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClassID, 32, 1, true, false }, |
| 10013 | { PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b, PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits, 11171, 3, sizeof(PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bBits), AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID, 32, 1, true, false }, |
| 10014 | { PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15, PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits, 5784, 3, sizeof(PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Bits), AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID, 32, 1, true, false }, |
| 10015 | { PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits, 5922, 1, sizeof(PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true, false }, |
| 10016 | { PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b, PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits, 11238, 1, sizeof(PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true, false }, |
| 10017 | { GPR32all, GPR32allBits, 14149, 33, sizeof(GPR32allBits), AArch64::GPR32allRegClassID, 32, 1, true, false }, |
| 10018 | { FPR32, FPR32Bits, 642, 32, sizeof(FPR32Bits), AArch64::FPR32RegClassID, 32, 1, true, false }, |
| 10019 | { GPR32, GPR32Bits, 648, 32, sizeof(GPR32Bits), AArch64::GPR32RegClassID, 32, 1, true, false }, |
| 10020 | { GPR32sp, GPR32spBits, 19632, 32, sizeof(GPR32spBits), AArch64::GPR32spRegClassID, 32, 1, true, false }, |
| 10021 | { GPR32common, GPR32commonBits, 14197, 31, sizeof(GPR32commonBits), AArch64::GPR32commonRegClassID, 32, 1, true, false }, |
| 10022 | { FPR32_with_hsub_in_FPR16_lo, FPR32_with_hsub_in_FPR16_loBits, 16905, 16, sizeof(FPR32_with_hsub_in_FPR16_loBits), AArch64::FPR32_with_hsub_in_FPR16_loRegClassID, 32, 1, true, false }, |
| 10023 | { GPR32arg, GPR32argBits, 12433, 8, sizeof(GPR32argBits), AArch64::GPR32argRegClassID, 32, 1, true, false }, |
| 10024 | { MatrixIndexGPR32_12_15, MatrixIndexGPR32_12_15Bits, 5541, 4, sizeof(MatrixIndexGPR32_12_15Bits), AArch64::MatrixIndexGPR32_12_15RegClassID, 32, 1, true, false }, |
| 10025 | { MatrixIndexGPR32_8_11, MatrixIndexGPR32_8_11Bits, 104, 4, sizeof(MatrixIndexGPR32_8_11Bits), AArch64::MatrixIndexGPR32_8_11RegClassID, 32, 1, true, false }, |
| 10026 | { CCR, CCRBits, 11023, 1, sizeof(CCRBits), AArch64::CCRRegClassID, 32, -1, false, false }, |
| 10027 | { GPR32sponly, GPR32sponlyBits, 19739, 1, sizeof(GPR32sponlyBits), AArch64::GPR32sponlyRegClassID, 32, 1, true, false }, |
| 10028 | { WSeqPairsClass, WSeqPairsClassBits, 19661, 16, sizeof(WSeqPairsClassBits), AArch64::WSeqPairsClassRegClassID, 64, 1, true, false }, |
| 10029 | { WSeqPairsClass_with_subo32_in_GPR32common, WSeqPairsClass_with_subo32_in_GPR32commonBits, 14167, 15, sizeof(WSeqPairsClass_with_subo32_in_GPR32commonBits), AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, 64, 1, true, false }, |
| 10030 | { WSeqPairsClass_with_sube32_in_GPR32arg, WSeqPairsClass_with_sube32_in_GPR32argBits, 12442, 4, sizeof(WSeqPairsClass_with_sube32_in_GPR32argBits), AArch64::WSeqPairsClass_with_sube32_in_GPR32argRegClassID, 64, 1, true, false }, |
| 10031 | { WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits, 5689, 2, sizeof(WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits), AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID, 64, 1, true, false }, |
| 10032 | { WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits, 590, 2, sizeof(WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits), AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID, 64, 1, true, false }, |
| 10033 | { GPR64all, GPR64allBits, 14158, 33, sizeof(GPR64allBits), AArch64::GPR64allRegClassID, 64, 1, true, false }, |
| 10034 | { FPR64, FPR64Bits, 1627, 32, sizeof(FPR64Bits), AArch64::FPR64RegClassID, 64, 1, true, false }, |
| 10035 | { GPR64, GPR64Bits, 1648, 32, sizeof(GPR64Bits), AArch64::GPR64RegClassID, 64, 1, true, false }, |
| 10036 | { GPR64sp, GPR64spBits, 19640, 32, sizeof(GPR64spBits), AArch64::GPR64spRegClassID, 64, 1, true, false }, |
| 10037 | { GPR64common, GPR64commonBits, 14239, 31, sizeof(GPR64commonBits), AArch64::GPR64commonRegClassID, 64, 1, true, false }, |
| 10038 | { GPR64noip, GPR64noipBits, 17062, 29, sizeof(GPR64noipBits), AArch64::GPR64noipRegClassID, 64, 1, true, false }, |
| 10039 | { GPR64common_and_GPR64noip, GPR64common_and_GPR64noipBits, 17046, 28, sizeof(GPR64common_and_GPR64noipBits), AArch64::GPR64common_and_GPR64noipRegClassID, 64, 1, true, false }, |
| 10040 | { tcGPR64, tcGPR64Bits, 1683, 19, sizeof(tcGPR64Bits), AArch64::tcGPR64RegClassID, 64, 1, true, false }, |
| 10041 | { tcGPRnotx16, tcGPRnotx16Bits, 6022, 18, sizeof(tcGPRnotx16Bits), AArch64::tcGPRnotx16RegClassID, 64, 1, true, false }, |
| 10042 | { tcGPRnotx16x17, tcGPRnotx16x17Bits, 6434, 17, sizeof(tcGPRnotx16x17Bits), AArch64::tcGPRnotx16x17RegClassID, 64, 1, true, false }, |
| 10043 | { FPR64_lo, FPR64_loBits, 14950, 16, sizeof(FPR64_loBits), AArch64::FPR64_loRegClassID, 64, 1, true, false }, |
| 10044 | { GPR64arg, GPR64argBits, 12510, 8, sizeof(GPR64argBits), AArch64::GPR64argRegClassID, 64, 1, true, false }, |
| 10045 | { FIXED_REGS, FIXED_REGSBits, 11082, 4, sizeof(FIXED_REGSBits), AArch64::FIXED_REGSRegClassID, 64, 1, true, false }, |
| 10046 | { GPR64_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 5520, 4, sizeof(GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 64, 1, true, false }, |
| 10047 | { GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 83, 4, sizeof(GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 64, 1, true, false }, |
| 10048 | { FIXED_REGS_with_sub_32, FIXED_REGS_with_sub_32Bits, 660, 2, sizeof(FIXED_REGS_with_sub_32Bits), AArch64::FIXED_REGS_with_sub_32RegClassID, 64, 1, true, false }, |
| 10049 | { tcGPRx16x17, tcGPRx16x17Bits, 6228, 2, sizeof(tcGPRx16x17Bits), AArch64::tcGPRx16x17RegClassID, 64, 1, true, false }, |
| 10050 | { FIXED_REGS_and_GPR64, FIXED_REGS_and_GPR64Bits, 1633, 1, sizeof(FIXED_REGS_and_GPR64Bits), AArch64::FIXED_REGS_and_GPR64RegClassID, 64, 1, true, false }, |
| 10051 | { GPR64sponly, GPR64sponlyBits, 19751, 1, sizeof(GPR64sponlyBits), AArch64::GPR64sponlyRegClassID, 64, 1, true, false }, |
| 10052 | { tcGPRx17, tcGPRx17Bits, 6626, 1, sizeof(tcGPRx17Bits), AArch64::tcGPRx17RegClassID, 64, 1, true, false }, |
| 10053 | { DD, DDBits, 8725, 32, sizeof(DDBits), AArch64::DDRegClassID, 128, 1, true, false }, |
| 10054 | { DD_with_dsub0_in_FPR64_lo, DD_with_dsub0_in_FPR64_loBits, 14933, 16, sizeof(DD_with_dsub0_in_FPR64_loBits), AArch64::DD_with_dsub0_in_FPR64_loRegClassID, 128, 1, true, false }, |
| 10055 | { DD_with_dsub1_in_FPR64_lo, DD_with_dsub1_in_FPR64_loBits, 15173, 16, sizeof(DD_with_dsub1_in_FPR64_loBits), AArch64::DD_with_dsub1_in_FPR64_loRegClassID, 128, 1, true, false }, |
| 10056 | { XSeqPairsClass, XSeqPairsClassBits, 19676, 16, sizeof(XSeqPairsClassBits), AArch64::XSeqPairsClassRegClassID, 128, 1, true, false }, |
| 10057 | { DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo, DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits, 15257, 15, sizeof(DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits), AArch64::DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID, 128, 1, true, false }, |
| 10058 | { XSeqPairsClass_with_subo64_in_GPR64common, XSeqPairsClass_with_subo64_in_GPR64commonBits, 14209, 15, sizeof(XSeqPairsClass_with_subo64_in_GPR64commonBits), AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, 128, 1, true, false }, |
| 10059 | { XSeqPairsClass_with_subo64_in_GPR64noip, XSeqPairsClass_with_subo64_in_GPR64noipBits, 17354, 15, sizeof(XSeqPairsClass_with_subo64_in_GPR64noipBits), AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, 128, 1, true, false }, |
| 10060 | { XSeqPairsClass_with_sube64_in_GPR64noip, XSeqPairsClass_with_sube64_in_GPR64noipBits, 17314, 14, sizeof(XSeqPairsClass_with_sube64_in_GPR64noipBits), AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, 128, 1, true, false }, |
| 10061 | { XSeqPairsClass_with_sube64_in_tcGPR64, XSeqPairsClass_with_sube64_in_tcGPR64Bits, 1728, 10, sizeof(XSeqPairsClass_with_sube64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, 128, 1, true, false }, |
| 10062 | { XSeqPairsClass_with_sube64_in_tcGPRnotx16, XSeqPairsClass_with_sube64_in_tcGPRnotx16Bits, 6075, 9, sizeof(XSeqPairsClass_with_sube64_in_tcGPRnotx16Bits), AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID, 128, 1, true, false }, |
| 10063 | { XSeqPairsClass_with_subo64_in_tcGPR64, XSeqPairsClass_with_subo64_in_tcGPR64Bits, 1766, 9, sizeof(XSeqPairsClass_with_subo64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, 128, 1, true, false }, |
| 10064 | { XSeqPairsClass_with_subo64_in_tcGPRnotx16x17, XSeqPairsClass_with_subo64_in_tcGPRnotx16x17Bits, 6493, 8, sizeof(XSeqPairsClass_with_subo64_in_tcGPRnotx16x17Bits), AArch64::XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID, 128, 1, true, false }, |
| 10065 | { XSeqPairsClass_with_sube64_in_GPR64arg, XSeqPairsClass_with_sube64_in_GPR64argBits, 12519, 4, sizeof(XSeqPairsClass_with_sube64_in_GPR64argBits), AArch64::XSeqPairsClass_with_sube64_in_GPR64argRegClassID, 128, 1, true, false }, |
| 10066 | { XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15, XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 5564, 2, sizeof(XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 128, 1, true, false }, |
| 10067 | { XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 239, 2, sizeof(XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 128, 1, true, false }, |
| 10068 | { XSeqPairsClass_with_sube64_in_tcGPRx16x17, XSeqPairsClass_with_sube64_in_tcGPRx16x17Bits, 6281, 1, sizeof(XSeqPairsClass_with_sube64_in_tcGPRx16x17Bits), AArch64::XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClassID, 128, 1, true, false }, |
| 10069 | { XSeqPairsClass_with_subo64_in_FIXED_REGS, XSeqPairsClass_with_subo64_in_FIXED_REGSBits, 11052, 1, sizeof(XSeqPairsClass_with_subo64_in_FIXED_REGSBits), AArch64::XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID, 128, 1, true, false }, |
| 10070 | { FPR128, FPR128Bits, 8621, 32, sizeof(FPR128Bits), AArch64::FPR128RegClassID, 128, 1, true, false }, |
| 10071 | { ZPR, ZPRBits, 11044, 32, sizeof(ZPRBits), AArch64::ZPRRegClassID, 128, 1, true, false }, |
| 10072 | { FPR128_lo, FPR128_loBits, 16952, 16, sizeof(FPR128_loBits), AArch64::FPR128_loRegClassID, 128, 1, true, false }, |
| 10073 | { MPR128, MPR128Bits, 8628, 16, sizeof(MPR128Bits), AArch64::MPR128RegClassID, 128, 1, false, false }, |
| 10074 | { ZPRMul2, ZPRMul2Bits, 912, 16, sizeof(ZPRMul2Bits), AArch64::ZPRMul2RegClassID, 128, 1, true, false }, |
| 10075 | { ZPR_4b, ZPR_4bBits, 12374, 16, sizeof(ZPR_4bBits), AArch64::ZPR_4bRegClassID, 128, 1, true, false }, |
| 10076 | { FPR128_0to7, FPR128_0to7Bits, 6654, 8, sizeof(FPR128_0to7Bits), AArch64::FPR128_0to7RegClassID, 128, 1, true, false }, |
| 10077 | { ZPRMul2_Hi, ZPRMul2_HiBits, 12798, 8, sizeof(ZPRMul2_HiBits), AArch64::ZPRMul2_HiRegClassID, 128, 1, true, false }, |
| 10078 | { ZPRMul2_Lo, ZPRMul2_LoBits, 14351, 8, sizeof(ZPRMul2_LoBits), AArch64::ZPRMul2_LoRegClassID, 128, 1, true, false }, |
| 10079 | { ZPRMul4, ZPRMul4Bits, 1865, 8, sizeof(ZPRMul4Bits), AArch64::ZPRMul4RegClassID, 128, 1, true, false }, |
| 10080 | { ZPR_3b, ZPR_3bBits, 11402, 8, sizeof(ZPR_3bBits), AArch64::ZPR_3bRegClassID, 128, 1, true, false }, |
| 10081 | { ZPR_K, ZPR_KBits, 8766, 8, sizeof(ZPR_KBits), AArch64::ZPR_KRegClassID, 128, 1, true, false }, |
| 10082 | { ZPRMul2_Hi_and_ZPRMul4, ZPRMul2_Hi_and_ZPRMul4Bits, 1850, 4, sizeof(ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPRMul2_Hi_and_ZPRMul4RegClassID, 128, 1, true, false }, |
| 10083 | { ZPRMul2_Lo_and_ZPRMul4, ZPRMul2_Lo_and_ZPRMul4Bits, 2679, 4, sizeof(ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPRMul2_Lo_and_ZPRMul4RegClassID, 128, 1, true, false }, |
| 10084 | { ZPRMul2_and_ZPR_3b, ZPRMul2_and_ZPR_3bBits, 11390, 4, sizeof(ZPRMul2_and_ZPR_3bBits), AArch64::ZPRMul2_and_ZPR_3bRegClassID, 128, 1, true, false }, |
| 10085 | { ZPRMul2_and_ZPR_K, ZPRMul2_and_ZPR_KBits, 8754, 4, sizeof(ZPRMul2_and_ZPR_KBits), AArch64::ZPRMul2_and_ZPR_KRegClassID, 128, 1, true, false }, |
| 10086 | { ZPRMul4_and_ZPR_3b, ZPRMul4_and_ZPR_3bBits, 11771, 2, sizeof(ZPRMul4_and_ZPR_3bBits), AArch64::ZPRMul4_and_ZPR_3bRegClassID, 128, 1, true, false }, |
| 10087 | { ZPRMul4_and_ZPR_K, ZPRMul4_and_ZPR_KBits, 8987, 2, sizeof(ZPRMul4_and_ZPR_KBits), AArch64::ZPRMul4_and_ZPR_KRegClassID, 128, 1, true, false }, |
| 10088 | { DDD, DDDBits, 8724, 32, sizeof(DDDBits), AArch64::DDDRegClassID, 192, 1, true, false }, |
| 10089 | { DDD_with_dsub0_in_FPR64_lo, DDD_with_dsub0_in_FPR64_loBits, 14932, 16, sizeof(DDD_with_dsub0_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10090 | { DDD_with_dsub1_in_FPR64_lo, DDD_with_dsub1_in_FPR64_loBits, 15172, 16, sizeof(DDD_with_dsub1_in_FPR64_loBits), AArch64::DDD_with_dsub1_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10091 | { DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub2_in_FPR64_loBits, 15763, 16, sizeof(DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10092 | { DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits, 15199, 15, sizeof(DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10093 | { DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits, 15908, 15, sizeof(DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10094 | { DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits, 15850, 14, sizeof(DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true, false }, |
| 10095 | { DDDD, DDDDBits, 8723, 32, sizeof(DDDDBits), AArch64::DDDDRegClassID, 256, 1, true, false }, |
| 10096 | { DDDD_with_dsub0_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_loBits, 14931, 16, sizeof(DDDD_with_dsub0_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10097 | { DDDD_with_dsub1_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_loBits, 15171, 16, sizeof(DDDD_with_dsub1_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10098 | { DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub2_in_FPR64_loBits, 15762, 16, sizeof(DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10099 | { DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub3_in_FPR64_loBits, 16416, 16, sizeof(DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10100 | { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits, 15139, 15, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10101 | { DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits, 15790, 15, sizeof(DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10102 | { DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 16504, 15, sizeof(DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10103 | { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits, 15730, 14, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10104 | { DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 16444, 14, sizeof(DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10105 | { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 16384, 13, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10106 | { QQ, QQBits, 11020, 32, sizeof(QQBits), AArch64::QQRegClassID, 256, 1, true, false }, |
| 10107 | { ZPR2, ZPR2Bits, 688, 32, sizeof(ZPR2Bits), AArch64::ZPR2RegClassID, 256, 1, true, false }, |
| 10108 | { ZPR2StridedOrContiguous, ZPR2StridedOrContiguousBits, 19691, 32, sizeof(ZPR2StridedOrContiguousBits), AArch64::ZPR2StridedOrContiguousRegClassID, 256, 1, true, false }, |
| 10109 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2Bits, 954, 24, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2Bits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10110 | { QQ_with_dsub1_in_FPR64_lo, QQ_with_dsub1_in_FPR64_loBits, 15348, 16, sizeof(QQ_with_dsub1_in_FPR64_loBits), AArch64::QQ_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10111 | { QQ_with_qsub0_in_FPR128_lo, QQ_with_qsub0_in_FPR128_loBits, 16935, 16, sizeof(QQ_with_qsub0_in_FPR128_loBits), AArch64::QQ_with_qsub0_in_FPR128_loRegClassID, 256, 1, true, false }, |
| 10112 | { ZPR2Mul2, ZPR2Mul2Bits, 727, 16, sizeof(ZPR2Mul2Bits), AArch64::ZPR2Mul2RegClassID, 256, 1, true, false }, |
| 10113 | { ZPR2Strided, ZPR2StridedBits, 12381, 16, sizeof(ZPR2StridedBits), AArch64::ZPR2StridedRegClassID, 256, 1, true, false }, |
| 10114 | { ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo, ZPR2StridedOrContiguous_with_dsub_in_FPR64_loBits, 16813, 16, sizeof(ZPR2StridedOrContiguous_with_dsub_in_FPR64_loBits), AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10115 | { ZPR2_with_dsub1_in_FPR64_lo, ZPR2_with_dsub1_in_FPR64_loBits, 14991, 16, sizeof(ZPR2_with_dsub1_in_FPR64_loBits), AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10116 | { ZPR2_with_zsub1_in_ZPRMul2, ZPR2_with_zsub1_in_ZPRMul2Bits, 1080, 16, sizeof(ZPR2_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10117 | { ZPR2_with_zsub_in_FPR128_lo, ZPR2_with_zsub_in_FPR128_loBits, 16962, 16, sizeof(ZPR2_with_zsub_in_FPR128_loBits), AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, 256, 1, true, false }, |
| 10118 | { QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo, QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loBits, 15433, 15, sizeof(QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loBits), AArch64::QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10119 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loBits, 14959, 15, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loBits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10120 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits, 12846, 12, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, 256, 1, true, false }, |
| 10121 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits, 14399, 12, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, 256, 1, true, false }, |
| 10122 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4Bits, 4148, 12, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10123 | { ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7, ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7Bits, 8523, 12, sizeof(ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10124 | { QQ_with_qsub0_in_FPR128_0to7, QQ_with_qsub0_in_FPR128_0to7Bits, 6637, 8, sizeof(QQ_with_qsub0_in_FPR128_0to7Bits), AArch64::QQ_with_qsub0_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10125 | { QQ_with_qsub1_in_FPR128_0to7, QQ_with_qsub1_in_FPR128_0to7Bits, 6898, 8, sizeof(QQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQ_with_qsub1_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10126 | { ZPR2Mul2_Hi, ZPR2Mul2_HiBits, 12691, 8, sizeof(ZPR2Mul2_HiBits), AArch64::ZPR2Mul2_HiRegClassID, 256, 1, true, false }, |
| 10127 | { ZPR2Mul2_Lo, ZPR2Mul2_LoBits, 14276, 8, sizeof(ZPR2Mul2_LoBits), AArch64::ZPR2Mul2_LoRegClassID, 256, 1, true, false }, |
| 10128 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits, 11352, 8, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10129 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K, ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KBits, 10211, 8, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10130 | { ZPR2Strided_with_dsub_in_FPR64_lo, ZPR2Strided_with_dsub_in_FPR64_loBits, 16745, 8, sizeof(ZPR2Strided_with_dsub_in_FPR64_loBits), AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClassID, 256, 1, true, false }, |
| 10131 | { ZPR2Strided_with_zsub0_in_ZPRMul2, ZPR2Strided_with_zsub0_in_ZPRMul2Bits, 886, 8, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2Bits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10132 | { ZPR2_with_qsub1_in_FPR128_0to7, ZPR2_with_qsub1_in_FPR128_0to7Bits, 6700, 8, sizeof(ZPR2_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10133 | { ZPR2_with_zsub0_in_ZPRMul4, ZPR2_with_zsub0_in_ZPRMul4Bits, 3136, 8, sizeof(ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10134 | { ZPR2_with_zsub0_in_ZPR_K, ZPR2_with_zsub0_in_ZPR_KBits, 9402, 8, sizeof(ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10135 | { ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR2_with_zsub1_in_ZPRMul2_HiBits, 13087, 8, sizeof(ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 256, 1, true, false }, |
| 10136 | { ZPR2_with_zsub1_in_ZPRMul2_Lo, ZPR2_with_zsub1_in_ZPRMul2_LoBits, 14529, 8, sizeof(ZPR2_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, 256, 1, true, false }, |
| 10137 | { ZPR2_with_zsub1_in_ZPRMul4, ZPR2_with_zsub1_in_ZPRMul4Bits, 4274, 8, sizeof(ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10138 | { ZPR2_with_zsub1_in_ZPR_K, ZPR2_with_zsub1_in_ZPR_KBits, 10284, 8, sizeof(ZPR2_with_zsub1_in_ZPR_KBits), AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10139 | { ZPR2_with_zsub_in_FPR128_0to7, ZPR2_with_zsub_in_FPR128_0to7Bits, 7984, 8, sizeof(ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10140 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2Bits, 1211, 8, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10141 | { QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7, QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7Bits, 6991, 7, sizeof(QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10142 | { ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7, ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7Bits, 6666, 7, sizeof(ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10143 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoBits, 14497, 7, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, 256, 1, true, false }, |
| 10144 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits, 1922, 6, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10145 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2751, 6, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10146 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KBits, 8772, 6, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10147 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KBits, 10255, 6, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KBits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10148 | { ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3120, 4, sizeof(ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10149 | { ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3580, 4, sizeof(ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10150 | { ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9389, 4, sizeof(ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10151 | { ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 7971, 4, sizeof(ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 256, 1, true, false }, |
| 10152 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits, 11828, 4, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10153 | { ZPR2Strided_with_zsub0_in_ZPRMul2_Hi, ZPR2Strided_with_zsub0_in_ZPRMul2_HiBits, 12772, 4, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2_HiBits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID, 256, 1, true, false }, |
| 10154 | { ZPR2Strided_with_zsub0_in_ZPRMul2_Lo, ZPR2Strided_with_zsub0_in_ZPRMul2_LoBits, 14325, 4, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2_LoBits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClassID, 256, 1, true, false }, |
| 10155 | { ZPR2Strided_with_zsub0_in_ZPRMul4, ZPR2Strided_with_zsub0_in_ZPRMul4Bits, 4080, 4, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10156 | { ZPR2Strided_with_zsub0_in_ZPR_K, ZPR2Strided_with_zsub0_in_ZPR_KBits, 10179, 4, sizeof(ZPR2Strided_with_zsub0_in_ZPR_KBits), AArch64::ZPR2Strided_with_zsub0_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10157 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits, 1155, 4, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10158 | { ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4, ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2187, 4, sizeof(ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10159 | { ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4, ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2905, 4, sizeof(ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10160 | { ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b, ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits, 11500, 4, sizeof(ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10161 | { ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K, ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits, 8857, 4, sizeof(ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10162 | { ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2, ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2Bits, 1046, 4, sizeof(ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, 256, 1, true, false }, |
| 10163 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4Bits, 4471, 4, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10164 | { ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K, ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KBits, 9086, 3, sizeof(ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10165 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits, 13058, 3, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 256, 1, true, false }, |
| 10166 | { ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b, ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits, 11466, 3, sizeof(ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10167 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2873, 3, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10168 | { ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4, ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits, 1824, 2, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10169 | { ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4, ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2653, 2, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10170 | { ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K, ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KBits, 8728, 2, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10171 | { ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b, ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bBits, 11752, 2, sizeof(ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10172 | { ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K, ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KBits, 8968, 2, sizeof(ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10173 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits, 8828, 2, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10174 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits, 4415, 2, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10175 | { ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 11976, 2, sizeof(ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10176 | { ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K, ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KBits, 9142, 2, sizeof(ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10177 | { ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4, ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4Bits, 4240, 2, sizeof(ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10178 | { ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K, ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KBits, 9042, 1, sizeof(ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, 256, 1, true, false }, |
| 10179 | { ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K, ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KBits, 9799, 1, sizeof(ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 256, 1, true, false }, |
| 10180 | { ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4, ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2158, 1, sizeof(ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 256, 1, true, false }, |
| 10181 | { ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 11942, 1, sizeof(ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 256, 1, true, false }, |
| 10182 | { ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits, 13283, 1, sizeof(ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 256, 1, true, false }, |
| 10183 | { MPR64, MPR64Bits, 1804, 8, sizeof(MPR64Bits), AArch64::MPR64RegClassID, 256, 1, false, false }, |
| 10184 | { QQQ, QQQBits, 11019, 32, sizeof(QQQBits), AArch64::QQQRegClassID, 384, 1, true, false }, |
| 10185 | { ZPR3, ZPR3Bits, 1622, 32, sizeof(ZPR3Bits), AArch64::ZPR3RegClassID, 384, 1, true, false }, |
| 10186 | { QQQ_with_dsub1_in_FPR64_lo, QQQ_with_dsub1_in_FPR64_loBits, 15347, 16, sizeof(QQQ_with_dsub1_in_FPR64_loBits), AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10187 | { QQQ_with_dsub2_in_FPR64_lo, QQQ_with_dsub2_in_FPR64_loBits, 15999, 16, sizeof(QQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10188 | { QQQ_with_qsub0_in_FPR128_lo, QQQ_with_qsub0_in_FPR128_loBits, 16934, 16, sizeof(QQQ_with_qsub0_in_FPR128_loBits), AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, 384, 1, true, false }, |
| 10189 | { ZPR3_with_dsub1_in_FPR64_lo, ZPR3_with_dsub1_in_FPR64_loBits, 15051, 16, sizeof(ZPR3_with_dsub1_in_FPR64_loBits), AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10190 | { ZPR3_with_dsub2_in_FPR64_lo, ZPR3_with_dsub2_in_FPR64_loBits, 15522, 16, sizeof(ZPR3_with_dsub2_in_FPR64_loBits), AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10191 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 702, 16, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 384, 1, true, false }, |
| 10192 | { ZPR3_with_zsub1_in_ZPRMul2, ZPR3_with_zsub1_in_ZPRMul2Bits, 1304, 16, sizeof(ZPR3_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, 384, 1, true, false }, |
| 10193 | { ZPR3_with_zsub_in_FPR128_lo, ZPR3_with_zsub_in_FPR128_loBits, 16990, 16, sizeof(ZPR3_with_zsub_in_FPR128_loBits), AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, 384, 1, true, false }, |
| 10194 | { QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo, QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loBits, 16087, 15, sizeof(QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10195 | { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loBits, 15374, 15, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loBits), AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10196 | { ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo, ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loBits, 15490, 15, sizeof(ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loBits), AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10197 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loBits, 15019, 15, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10198 | { QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo, QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loBits, 16145, 14, sizeof(QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10199 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loBits, 15550, 14, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, 384, 1, true, false }, |
| 10200 | { QQQ_with_qsub0_in_FPR128_0to7, QQQ_with_qsub0_in_FPR128_0to7Bits, 6636, 8, sizeof(QQQ_with_qsub0_in_FPR128_0to7Bits), AArch64::QQQ_with_qsub0_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10201 | { QQQ_with_qsub1_in_FPR128_0to7, QQQ_with_qsub1_in_FPR128_0to7Bits, 6897, 8, sizeof(QQQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQQ_with_qsub1_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10202 | { QQQ_with_qsub2_in_FPR128_0to7, QQQ_with_qsub2_in_FPR128_0to7Bits, 7345, 8, sizeof(QQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQ_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10203 | { ZPR3_with_qsub1_in_FPR128_0to7, ZPR3_with_qsub1_in_FPR128_0to7Bits, 6765, 8, sizeof(ZPR3_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10204 | { ZPR3_with_qsub2_in_FPR128_0to7, ZPR3_with_qsub2_in_FPR128_0to7Bits, 7087, 8, sizeof(ZPR3_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10205 | { ZPR3_with_zsub0_in_ZPRMul4, ZPR3_with_zsub0_in_ZPRMul4Bits, 4053, 8, sizeof(ZPR3_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10206 | { ZPR3_with_zsub0_in_ZPR_K, ZPR3_with_zsub0_in_ZPR_KBits, 9888, 8, sizeof(ZPR3_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10207 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits, 12666, 8, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, 384, 1, true, false }, |
| 10208 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoBits, 14251, 8, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, 384, 1, true, false }, |
| 10209 | { ZPR3_with_zsub1_in_ZPRMul2_Hi, ZPR3_with_zsub1_in_ZPRMul2_HiBits, 13374, 8, sizeof(ZPR3_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10210 | { ZPR3_with_zsub1_in_ZPRMul2_Lo, ZPR3_with_zsub1_in_ZPRMul2_LoBits, 14591, 8, sizeof(ZPR3_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, 384, 1, true, false }, |
| 10211 | { ZPR3_with_zsub1_in_ZPRMul4, ZPR3_with_zsub1_in_ZPRMul4Bits, 4564, 8, sizeof(ZPR3_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10212 | { ZPR3_with_zsub1_in_ZPR_K, ZPR3_with_zsub1_in_ZPR_KBits, 10338, 8, sizeof(ZPR3_with_zsub1_in_ZPR_KBits), AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10213 | { ZPR3_with_zsub2_in_ZPRMul2_Hi, ZPR3_with_zsub2_in_ZPRMul2_HiBits, 13750, 8, sizeof(ZPR3_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10214 | { ZPR3_with_zsub2_in_ZPRMul2_Lo, ZPR3_with_zsub2_in_ZPRMul2_LoBits, 14715, 8, sizeof(ZPR3_with_zsub2_in_ZPRMul2_LoBits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, 384, 1, true, false }, |
| 10215 | { ZPR3_with_zsub2_in_ZPRMul4, ZPR3_with_zsub2_in_ZPRMul4Bits, 4916, 8, sizeof(ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10216 | { ZPR3_with_zsub2_in_ZPR_K, ZPR3_with_zsub2_in_ZPR_KBits, 10723, 8, sizeof(ZPR3_with_zsub2_in_ZPR_KBits), AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10217 | { ZPR3_with_zsub_in_FPR128_0to7, ZPR3_with_zsub_in_FPR128_0to7Bits, 8450, 8, sizeof(ZPR3_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10218 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2Bits, 1387, 8, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, 384, 1, true, false }, |
| 10219 | { QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7, QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7Bits, 7502, 7, sizeof(QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10220 | { QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7, QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7Bits, 6927, 7, sizeof(QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10221 | { ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7, ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7Bits, 7118, 7, sizeof(ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10222 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits, 13709, 7, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10223 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7Bits, 6731, 7, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10224 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoBits, 14559, 7, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, 384, 1, true, false }, |
| 10225 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoBits, 14683, 7, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, 384, 1, true, false }, |
| 10226 | { QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7, QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7Bits, 7438, 6, sizeof(QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10227 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KBits, 10309, 6, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KBits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10228 | { ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K, ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits, 10748, 6, sizeof(ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits), AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10229 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7Bits, 7053, 6, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10230 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2Bits, 1331, 4, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, 384, 1, true, false }, |
| 10231 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits, 10694, 4, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KBits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10232 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3095, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10233 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits, 5003, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10234 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3555, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10235 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9364, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10236 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 7946, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10237 | { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3260, 4, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10238 | { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3723, 4, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10239 | { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9519, 4, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10240 | { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8116, 4, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10241 | { ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4, ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2330, 4, sizeof(ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10242 | { ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4, ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2979, 4, sizeof(ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10243 | { ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b, ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits, 11572, 4, sizeof(ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10244 | { ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K, ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KBits, 8894, 4, sizeof(ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClassID, 384, 1, true, false }, |
| 10245 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2Bits, 1270, 4, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, 384, 1, true, false }, |
| 10246 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4Bits, 4647, 4, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10247 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4Bits, 5192, 4, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10248 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits, 13345, 3, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10249 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2289, 3, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10250 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits, 13004, 3, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10251 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8082, 3, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 384, 1, true, false }, |
| 10252 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits, 11538, 3, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10253 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3691, 3, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10254 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2947, 3, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10255 | { ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K, ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits, 9913, 2, sizeof(ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10256 | { ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b, ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bBits, 11790, 2, sizeof(ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10257 | { ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K, ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KBits, 9005, 2, sizeof(ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, 384, 1, true, false }, |
| 10258 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4Bits, 4591, 2, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10259 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9490, 2, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10260 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits, 4361, 2, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10261 | { ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 12048, 2, sizeof(ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10262 | { ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K, ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KBits, 9179, 2, sizeof(ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID, 384, 1, true, false }, |
| 10263 | { ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b, ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits, 12192, 2, sizeof(ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10264 | { ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K, ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KBits, 9253, 2, sizeof(ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID, 384, 1, true, false }, |
| 10265 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4Bits, 4530, 2, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10266 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4Bits, 4882, 2, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10267 | { ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K, ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits, 9856, 1, sizeof(ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KBits), AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID, 384, 1, true, false }, |
| 10268 | { ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi, ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits, 12634, 1, sizeof(ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiBits), AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, 384, 1, true, false }, |
| 10269 | { ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3231, 1, sizeof(ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10270 | { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2104, 1, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 384, 1, true, false }, |
| 10271 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 12014, 1, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10272 | { ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b, ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits, 12158, 1, sizeof(ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, 384, 1, true, false }, |
| 10273 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits, 13404, 1, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10274 | { ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi, ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits, 13904, 1, sizeof(ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, 384, 1, true, false }, |
| 10275 | { QQQQ, QQQQBits, 11018, 32, sizeof(QQQQBits), AArch64::QQQQRegClassID, 512, 1, true, false }, |
| 10276 | { ZPR4, ZPR4Bits, 1810, 32, sizeof(ZPR4Bits), AArch64::ZPR4RegClassID, 512, 1, true, false }, |
| 10277 | { QQQQ_with_dsub1_in_FPR64_lo, QQQQ_with_dsub1_in_FPR64_loBits, 15346, 16, sizeof(QQQQ_with_dsub1_in_FPR64_loBits), AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10278 | { QQQQ_with_dsub2_in_FPR64_lo, QQQQ_with_dsub2_in_FPR64_loBits, 15998, 16, sizeof(QQQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10279 | { QQQQ_with_dsub3_in_FPR64_lo, QQQQ_with_dsub3_in_FPR64_loBits, 16596, 16, sizeof(QQQQ_with_dsub3_in_FPR64_loBits), AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10280 | { QQQQ_with_qsub0_in_FPR128_lo, QQQQ_with_qsub0_in_FPR128_loBits, 16933, 16, sizeof(QQQQ_with_qsub0_in_FPR128_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, 512, 1, true, false }, |
| 10281 | { ZPR4StridedOrContiguous, ZPR4StridedOrContiguousBits, 19715, 16, sizeof(ZPR4StridedOrContiguousBits), AArch64::ZPR4StridedOrContiguousRegClassID, 512, 1, true, false }, |
| 10282 | { ZPR4_with_dsub1_in_FPR64_lo, ZPR4_with_dsub1_in_FPR64_loBits, 15111, 16, sizeof(ZPR4_with_dsub1_in_FPR64_loBits), AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10283 | { ZPR4_with_dsub2_in_FPR64_lo, ZPR4_with_dsub2_in_FPR64_loBits, 15642, 16, sizeof(ZPR4_with_dsub2_in_FPR64_loBits), AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10284 | { ZPR4_with_dsub3_in_FPR64_lo, ZPR4_with_dsub3_in_FPR64_loBits, 16236, 16, sizeof(ZPR4_with_dsub3_in_FPR64_loBits), AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10285 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits, 736, 16, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true, false }, |
| 10286 | { ZPR4_with_zsub1_in_ZPRMul2, ZPR4_with_zsub1_in_ZPRMul2Bits, 1480, 16, sizeof(ZPR4_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10287 | { ZPR4_with_zsub_in_FPR128_lo, ZPR4_with_zsub_in_FPR128_loBits, 17018, 16, sizeof(ZPR4_with_zsub_in_FPR128_loBits), AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, 512, 1, true, false }, |
| 10288 | { QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo, QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loBits, 15966, 15, sizeof(QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10289 | { QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo, QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits, 16624, 15, sizeof(QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits), AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10290 | { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loBits, 15313, 15, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10291 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loBits, 15610, 15, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loBits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10292 | { ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo, ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits, 16264, 15, sizeof(ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits), AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10293 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loBits, 15079, 15, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10294 | { QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo, QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits, 16564, 14, sizeof(QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loBits), AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10295 | { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loBits, 16026, 14, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10296 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits, 16204, 14, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loBits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10297 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loBits, 15670, 14, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10298 | { QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo, QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loBits, 16684, 13, sizeof(QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loBits), AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10299 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loBits, 16324, 13, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10300 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2Bits, 1000, 12, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2Bits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10301 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4Bits, 4194, 10, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10302 | { QQQQ_with_qsub0_in_FPR128_0to7, QQQQ_with_qsub0_in_FPR128_0to7Bits, 6635, 8, sizeof(QQQQ_with_qsub0_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub0_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10303 | { QQQQ_with_qsub1_in_FPR128_0to7, QQQQ_with_qsub1_in_FPR128_0to7Bits, 6896, 8, sizeof(QQQQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10304 | { QQQQ_with_qsub2_in_FPR128_0to7, QQQQ_with_qsub2_in_FPR128_0to7Bits, 7344, 8, sizeof(QQQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10305 | { QQQQ_with_qsub3_in_FPR128_0to7, QQQQ_with_qsub3_in_FPR128_0to7Bits, 7789, 8, sizeof(QQQQ_with_qsub3_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10306 | { ZPR4Mul4, ZPR4Mul4Bits, 1815, 8, sizeof(ZPR4Mul4Bits), AArch64::ZPR4Mul4RegClassID, 512, 1, true, false }, |
| 10307 | { ZPR4Strided, ZPR4StridedBits, 12393, 8, sizeof(ZPR4StridedBits), AArch64::ZPR4StridedRegClassID, 512, 1, true, false }, |
| 10308 | { ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo, ZPR4StridedOrContiguous_with_dsub_in_FPR64_loBits, 16859, 8, sizeof(ZPR4StridedOrContiguous_with_dsub_in_FPR64_loBits), AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10309 | { ZPR4_with_qsub1_in_FPR128_0to7, ZPR4_with_qsub1_in_FPR128_0to7Bits, 6830, 8, sizeof(ZPR4_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10310 | { ZPR4_with_qsub2_in_FPR128_0to7, ZPR4_with_qsub2_in_FPR128_0to7Bits, 7215, 8, sizeof(ZPR4_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10311 | { ZPR4_with_qsub3_in_FPR128_0to7, ZPR4_with_qsub3_in_FPR128_0to7Bits, 7597, 8, sizeof(ZPR4_with_qsub3_in_FPR128_0to7Bits), AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10312 | { ZPR4_with_zsub0_in_ZPR_K, ZPR4_with_zsub0_in_ZPR_KBits, 9983, 8, sizeof(ZPR4_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10313 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits, 12735, 8, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, 512, 1, true, false }, |
| 10314 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoBits, 14288, 8, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, 512, 1, true, false }, |
| 10315 | { ZPR4_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_zsub1_in_ZPRMul2_HiBits, 13495, 8, sizeof(ZPR4_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10316 | { ZPR4_with_zsub1_in_ZPRMul2_Lo, ZPR4_with_zsub1_in_ZPRMul2_LoBits, 14653, 8, sizeof(ZPR4_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10317 | { ZPR4_with_zsub1_in_ZPRMul4, ZPR4_with_zsub1_in_ZPRMul4Bits, 4740, 8, sizeof(ZPR4_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10318 | { ZPR4_with_zsub1_in_ZPR_K, ZPR4_with_zsub1_in_ZPR_KBits, 10392, 8, sizeof(ZPR4_with_zsub1_in_ZPR_KBits), AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10319 | { ZPR4_with_zsub2_in_ZPRMul2_Hi, ZPR4_with_zsub2_in_ZPRMul2_HiBits, 13998, 8, sizeof(ZPR4_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10320 | { ZPR4_with_zsub2_in_ZPRMul2_Lo, ZPR4_with_zsub2_in_ZPRMul2_LoBits, 14777, 8, sizeof(ZPR4_with_zsub2_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10321 | { ZPR4_with_zsub2_in_ZPRMul4, ZPR4_with_zsub2_in_ZPRMul4Bits, 5285, 8, sizeof(ZPR4_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10322 | { ZPR4_with_zsub2_in_ZPR_K, ZPR4_with_zsub2_in_ZPR_KBits, 10831, 8, sizeof(ZPR4_with_zsub2_in_ZPR_KBits), AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10323 | { ZPR4_with_zsub3_in_ZPRMul2_Hi, ZPR4_with_zsub3_in_ZPRMul2_HiBits, 14057, 8, sizeof(ZPR4_with_zsub3_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10324 | { ZPR4_with_zsub3_in_ZPRMul2_Lo, ZPR4_with_zsub3_in_ZPRMul2_LoBits, 14839, 8, sizeof(ZPR4_with_zsub3_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10325 | { ZPR4_with_zsub3_in_ZPRMul4, ZPR4_with_zsub3_in_ZPRMul4Bits, 5405, 8, sizeof(ZPR4_with_zsub3_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10326 | { ZPR4_with_zsub3_in_ZPR_K, ZPR4_with_zsub3_in_ZPR_KBits, 10939, 8, sizeof(ZPR4_with_zsub3_in_ZPR_KBits), AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10327 | { ZPR4_with_zsub_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7Bits, 8493, 8, sizeof(ZPR4_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10328 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2Bits, 1563, 8, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10329 | { QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7, QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7Bits, 7375, 7, sizeof(QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10330 | { QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7, QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits, 7883, 7, sizeof(QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits), AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10331 | { QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7, QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7Bits, 6861, 7, sizeof(QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10332 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7Bits, 7246, 7, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10333 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits, 14807, 7, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10334 | { ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7, ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits, 7691, 7, sizeof(ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits), AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10335 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits, 13649, 7, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10336 | { ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi, ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits, 13780, 7, sizeof(ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10337 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7Bits, 6796, 7, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10338 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoBits, 14621, 7, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10339 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoBits, 14745, 7, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10340 | { QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7, QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits, 7820, 6, sizeof(QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Bits), AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10341 | { QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7, QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7Bits, 7309, 6, sizeof(QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10342 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits, 12895, 6, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10343 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits, 14448, 6, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10344 | { ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K, ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits, 10556, 6, sizeof(ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits), AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10345 | { ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7, ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7Bits, 8572, 6, sizeof(ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10346 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits, 7628, 6, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Bits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10347 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KBits, 10363, 6, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10348 | { ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K, ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits, 10856, 6, sizeof(ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits), AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10349 | { ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K, ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits, 10964, 6, sizeof(ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits), AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10350 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7Bits, 7181, 6, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10351 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits, 14869, 6, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10352 | { QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7, QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7Bits, 7754, 5, sizeof(QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7Bits), AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10353 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits, 1983, 5, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10354 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2812, 5, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10355 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7Bits, 7563, 5, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10356 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits, 10506, 4, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10357 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits, 11409, 4, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10358 | { ZPR4Strided_with_dsub_in_FPR64_lo, ZPR4Strided_with_dsub_in_FPR64_loBits, 16779, 4, sizeof(ZPR4Strided_with_dsub_in_FPR64_loBits), AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClassID, 512, 1, true, false }, |
| 10359 | { ZPR4Strided_with_zsub0_in_ZPRMul2, ZPR4Strided_with_zsub0_in_ZPRMul2Bits, 920, 4, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul2Bits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10360 | { ZPR4Strided_with_zsub1_in_ZPR_K, ZPR4Strided_with_zsub1_in_ZPR_KBits, 10474, 4, sizeof(ZPR4Strided_with_zsub1_in_ZPR_KBits), AArch64::ZPR4Strided_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10361 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2Bits, 1507, 4, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10362 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits, 10802, 4, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10363 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3163, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10364 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3623, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10365 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9427, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10366 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8014, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10367 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits, 4943, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10368 | { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3357, 4, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10369 | { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3823, 4, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10370 | { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9611, 4, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10371 | { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8218, 4, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10372 | { ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4, ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits, 5071, 4, sizeof(ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10373 | { ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K, ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits, 10910, 4, sizeof(ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KBits), AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10374 | { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3456, 4, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10375 | { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3954, 4, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10376 | { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9705, 4, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10377 | { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8351, 4, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10378 | { ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2537, 4, sizeof(ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10379 | { ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4, ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits, 3053, 4, sizeof(ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10380 | { ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b, ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits, 11644, 4, sizeof(ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10381 | { ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K, ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KBits, 8931, 4, sizeof(ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KBits), AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClassID, 512, 1, true, false }, |
| 10382 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2Bits, 1446, 4, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10383 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4Bits, 4823, 4, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10384 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4Bits, 5312, 4, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10385 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4Bits, 5432, 4, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10386 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits, 10600, 3, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10387 | { ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b, ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits, 11885, 3, sizeof(ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10388 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits, 11682, 3, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10389 | { ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K, ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits, 10122, 3, sizeof(ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10390 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits, 13466, 3, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10391 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2229, 3, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10392 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits, 12944, 3, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10393 | { ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2372, 3, sizeof(ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10394 | { ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits, 13117, 3, sizeof(ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10395 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8184, 3, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10396 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits, 8317, 3, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10397 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3791, 3, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10398 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3922, 3, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10399 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits, 3021, 3, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10400 | { ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K, ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KBits, 9970, 2, sizeof(ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KBits), AArch64::ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10401 | { ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7, ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7Bits, 8480, 2, sizeof(ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7Bits), AArch64::ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClassID, 512, 1, true, false }, |
| 10402 | { ZPR4Strided_with_zsub0_in_ZPRMul2_Hi, ZPR4Strided_with_zsub0_in_ZPRMul2_HiBits, 12809, 2, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul2_HiBits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10403 | { ZPR4Strided_with_zsub0_in_ZPRMul2_Lo, ZPR4Strided_with_zsub0_in_ZPRMul2_LoBits, 14362, 2, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul2_LoBits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClassID, 512, 1, true, false }, |
| 10404 | { ZPR4Strided_with_zsub0_in_ZPRMul4, ZPR4Strided_with_zsub0_in_ZPRMul4Bits, 4114, 2, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10405 | { ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K, ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits, 10065, 2, sizeof(ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10406 | { ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K, ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KBits, 10417, 2, sizeof(ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KBits), AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10407 | { ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2, ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits, 1107, 2, sizeof(ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Bits), AArch64::ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, 512, 1, true, false }, |
| 10408 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits, 9582, 2, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10409 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4Bits, 4767, 2, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10410 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits, 14028, 2, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10411 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits, 4301, 2, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10412 | { ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 12120, 2, sizeof(ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10413 | { ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K, ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KBits, 9216, 2, sizeof(ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID, 512, 1, true, false }, |
| 10414 | { ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits, 12264, 2, sizeof(ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10415 | { ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K, ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KBits, 9290, 2, sizeof(ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID, 512, 1, true, false }, |
| 10416 | { ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits, 12336, 2, sizeof(ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10417 | { ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K, ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KBits, 9327, 2, sizeof(ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KBits), AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClassID, 512, 1, true, false }, |
| 10418 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4Bits, 4706, 2, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10419 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4Bits, 5251, 2, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10420 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits, 11610, 2, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bBits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10421 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4Bits, 5371, 2, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10422 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits, 14087, 2, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10423 | { ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits, 1873, 1, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10424 | { ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4, ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits, 2702, 1, sizeof(ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Bits), AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10425 | { ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K, ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits, 10008, 1, sizeof(ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KBits), AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, 512, 1, true, false }, |
| 10426 | { ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi, ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits, 12703, 1, sizeof(ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiBits), AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, 512, 1, true, false }, |
| 10427 | { ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits, 13525, 1, sizeof(ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10428 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits, 3328, 1, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10429 | { ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2508, 1, sizeof(ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10430 | { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2044, 1, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10431 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits, 12086, 1, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10432 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits, 12230, 1, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10433 | { ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b, ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits, 12302, 1, sizeof(ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bBits), AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID, 512, 1, true, false }, |
| 10434 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits, 13587, 1, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10435 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiBits, 13966, 1, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiBits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, 512, 1, true, false }, |
| 10436 | { ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4, ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits, 2579, 1, sizeof(ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Bits), AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, 512, 1, true, false }, |
| 10437 | { GPR64x8Class, GPR64x8ClassBits, 19648, 12, sizeof(GPR64x8ClassBits), AArch64::GPR64x8ClassRegClassID, 512, 1, true, false }, |
| 10438 | { GPR64x8Class_with_x8sub_0_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noipBits, 17072, 11, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10439 | { GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 17152, 11, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10440 | { GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17478, 11, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10441 | { GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18140, 11, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10442 | { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 17232, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10443 | { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17724, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10444 | { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18718, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10445 | { GPR64x8Class_with_x8sub_0_in_tcGPR64, GPR64x8Class_with_x8sub_0_in_tcGPR64Bits, 1654, 10, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, 512, 1, true, false }, |
| 10446 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17931, 10, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10447 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19468, 10, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10448 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19550, 10, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10449 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 17111, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10450 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17437, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10451 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18099, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10452 | { GPR64x8Class_with_x8sub_0_in_tcGPRnotx16, GPR64x8Class_with_x8sub_0_in_tcGPRnotx16Bits, 5993, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPRnotx16Bits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, 512, 1, true, false }, |
| 10453 | { GPR64x8Class_with_x8sub_1_in_tcGPR64, GPR64x8Class_with_x8sub_1_in_tcGPR64Bits, 1691, 9, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, 512, 1, true, false }, |
| 10454 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17806, 9, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10455 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19175, 9, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10456 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19300, 9, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10457 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19425, 9, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10458 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 17191, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10459 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17683, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10460 | { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18677, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10461 | { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17560, 8, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10462 | { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18388, 8, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10463 | { GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17, GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17Bits, 6405, 8, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17Bits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, 512, 1, true, false }, |
| 10464 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17394, 8, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10465 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18056, 8, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10466 | { GPR64x8Class_with_x8sub_2_in_tcGPRnotx16, GPR64x8Class_with_x8sub_2_in_tcGPRnotx16Bits, 6034, 8, sizeof(GPR64x8Class_with_x8sub_2_in_tcGPRnotx16Bits), AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, 512, 1, true, false }, |
| 10467 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18179, 8, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10468 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19132, 8, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10469 | { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 19009, 7, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10470 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17640, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10471 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18634, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10472 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 17517, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10473 | { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18345, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10474 | { GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17, GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17Bits, 6449, 7, sizeof(GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17Bits), AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, 512, 1, true, false }, |
| 10475 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18800, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10476 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18468, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10477 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18013, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10478 | { GPR64x8Class_with_x8sub_4_in_tcGPRnotx16, GPR64x8Class_with_x8sub_4_in_tcGPRnotx16Bits, 6117, 7, sizeof(GPR64x8Class_with_x8sub_4_in_tcGPRnotx16Bits), AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, 512, 1, true, false }, |
| 10479 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18966, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10480 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18591, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10481 | { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 18302, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true, false }, |
| 10482 | { GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17, GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17Bits, 6538, 6, sizeof(GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17Bits), AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, 512, 1, true, false }, |
| 10483 | { GPR64x8Class_with_x8sub_6_in_tcGPRnotx16, GPR64x8Class_with_x8sub_6_in_tcGPRnotx16Bits, 6158, 6, sizeof(GPR64x8Class_with_x8sub_6_in_tcGPRnotx16Bits), AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, 512, 1, true, false }, |
| 10484 | { GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17, GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17Bits, 6582, 5, sizeof(GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17Bits), AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, 512, 1, true, false }, |
| 10485 | { GPR64x8Class_with_sub_32_in_GPR32arg, GPR64x8Class_with_sub_32_in_GPR32argBits, 12405, 4, sizeof(GPR64x8Class_with_sub_32_in_GPR32argBits), AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, 512, 1, true, false }, |
| 10486 | { MPR32, MPR32Bits, 654, 4, sizeof(MPR32Bits), AArch64::MPR32RegClassID, 512, 1, false, false }, |
| 10487 | { GPR64x8Class_with_x8sub_2_in_GPR64arg, GPR64x8Class_with_x8sub_2_in_GPR64argBits, 12481, 3, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, 512, 1, true, false }, |
| 10488 | { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 5638, 2, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 512, 1, true, false }, |
| 10489 | { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 540, 2, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10490 | { GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 5491, 2, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 512, 1, true, false }, |
| 10491 | { GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 54, 2, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10492 | { GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 354, 2, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10493 | { GPR64x8Class_with_x8sub_4_in_GPR64arg, GPR64x8Class_with_x8sub_4_in_GPR64argBits, 12558, 2, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID, 512, 1, true, false }, |
| 10494 | { GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 468, 2, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10495 | { GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 126, 1, sizeof(GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10496 | { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 0, 1, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10497 | { GPR64x8Class_with_x8sub_0_in_tcGPRx16x17, GPR64x8Class_with_x8sub_0_in_tcGPRx16x17Bits, 6199, 1, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPRx16x17Bits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClassID, 512, 1, true, false }, |
| 10498 | { GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 312, 1, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10499 | { GPR64x8Class_with_x8sub_2_in_tcGPRx16x17, GPR64x8Class_with_x8sub_2_in_tcGPRx16x17Bits, 6240, 1, sizeof(GPR64x8Class_with_x8sub_2_in_tcGPRx16x17Bits), AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClassID, 512, 1, true, false }, |
| 10500 | { GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 426, 1, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true, false }, |
| 10501 | { GPR64x8Class_with_x8sub_4_in_tcGPRx16x17, GPR64x8Class_with_x8sub_4_in_tcGPRx16x17Bits, 6323, 1, sizeof(GPR64x8Class_with_x8sub_4_in_tcGPRx16x17Bits), AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClassID, 512, 1, true, false }, |
| 10502 | { GPR64x8Class_with_x8sub_6_in_GPR64arg, GPR64x8Class_with_x8sub_6_in_GPR64argBits, 12596, 1, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID, 512, 1, true, false }, |
| 10503 | { GPR64x8Class_with_x8sub_6_in_tcGPRx16x17, GPR64x8Class_with_x8sub_6_in_tcGPRx16x17Bits, 6364, 1, sizeof(GPR64x8Class_with_x8sub_6_in_tcGPRx16x17Bits), AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClassID, 512, 1, true, false }, |
| 10504 | { GPR64x8Class_with_x8sub_7_in_FIXED_REGS, GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits, 11093, 1, sizeof(GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits), AArch64::GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID, 512, 1, true, false }, |
| 10505 | { ZTR, ZTRBits, 11048, 1, sizeof(ZTRBits), AArch64::ZTRRegClassID, 512, 1, true, false }, |
| 10506 | { MPR16, MPR16Bits, 5987, 2, sizeof(MPR16Bits), AArch64::MPR16RegClassID, 1024, 1, false, false }, |
| 10507 | { MPR, MPRBits, 11036, 1, sizeof(MPRBits), AArch64::MPRRegClassID, 2048, 1, false, false }, |
| 10508 | { MPR8, MPR8Bits, 8640, 1, sizeof(MPR8Bits), AArch64::MPR8RegClassID, 2048, 1, false, false }, |
| 10509 | }; |
| 10510 | |
| 10511 | // AArch64 Dwarf<->LLVM register mappings. |
| 10512 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0Dwarf2L[] = { |
| 10513 | { 0U, AArch64::W0 }, |
| 10514 | { 1U, AArch64::W1 }, |
| 10515 | { 2U, AArch64::W2 }, |
| 10516 | { 3U, AArch64::W3 }, |
| 10517 | { 4U, AArch64::W4 }, |
| 10518 | { 5U, AArch64::W5 }, |
| 10519 | { 6U, AArch64::W6 }, |
| 10520 | { 7U, AArch64::W7 }, |
| 10521 | { 8U, AArch64::W8 }, |
| 10522 | { 9U, AArch64::W9 }, |
| 10523 | { 10U, AArch64::W10 }, |
| 10524 | { 11U, AArch64::W11 }, |
| 10525 | { 12U, AArch64::W12 }, |
| 10526 | { 13U, AArch64::W13 }, |
| 10527 | { 14U, AArch64::W14 }, |
| 10528 | { 15U, AArch64::W15 }, |
| 10529 | { 16U, AArch64::W16 }, |
| 10530 | { 17U, AArch64::W17 }, |
| 10531 | { 18U, AArch64::W18 }, |
| 10532 | { 19U, AArch64::W19 }, |
| 10533 | { 20U, AArch64::W20 }, |
| 10534 | { 21U, AArch64::W21 }, |
| 10535 | { 22U, AArch64::W22 }, |
| 10536 | { 23U, AArch64::W23 }, |
| 10537 | { 24U, AArch64::W24 }, |
| 10538 | { 25U, AArch64::W25 }, |
| 10539 | { 26U, AArch64::W26 }, |
| 10540 | { 27U, AArch64::W27 }, |
| 10541 | { 28U, AArch64::W28 }, |
| 10542 | { 29U, AArch64::W29 }, |
| 10543 | { 30U, AArch64::W30 }, |
| 10544 | { 31U, AArch64::WSP }, |
| 10545 | { 46U, AArch64::VG }, |
| 10546 | { 47U, AArch64::FFR }, |
| 10547 | { 48U, AArch64::PN0 }, |
| 10548 | { 49U, AArch64::PN1 }, |
| 10549 | { 50U, AArch64::PN2 }, |
| 10550 | { 51U, AArch64::PN3 }, |
| 10551 | { 52U, AArch64::PN4 }, |
| 10552 | { 53U, AArch64::PN5 }, |
| 10553 | { 54U, AArch64::PN6 }, |
| 10554 | { 55U, AArch64::PN7 }, |
| 10555 | { 56U, AArch64::PN8 }, |
| 10556 | { 57U, AArch64::PN9 }, |
| 10557 | { 58U, AArch64::PN10 }, |
| 10558 | { 59U, AArch64::PN11 }, |
| 10559 | { 60U, AArch64::PN12 }, |
| 10560 | { 61U, AArch64::PN13 }, |
| 10561 | { 62U, AArch64::PN14 }, |
| 10562 | { 63U, AArch64::PN15 }, |
| 10563 | { 64U, AArch64::B0 }, |
| 10564 | { 65U, AArch64::B1 }, |
| 10565 | { 66U, AArch64::B2 }, |
| 10566 | { 67U, AArch64::B3 }, |
| 10567 | { 68U, AArch64::B4 }, |
| 10568 | { 69U, AArch64::B5 }, |
| 10569 | { 70U, AArch64::B6 }, |
| 10570 | { 71U, AArch64::B7 }, |
| 10571 | { 72U, AArch64::B8 }, |
| 10572 | { 73U, AArch64::B9 }, |
| 10573 | { 74U, AArch64::B10 }, |
| 10574 | { 75U, AArch64::B11 }, |
| 10575 | { 76U, AArch64::B12 }, |
| 10576 | { 77U, AArch64::B13 }, |
| 10577 | { 78U, AArch64::B14 }, |
| 10578 | { 79U, AArch64::B15 }, |
| 10579 | { 80U, AArch64::B16 }, |
| 10580 | { 81U, AArch64::B17 }, |
| 10581 | { 82U, AArch64::B18 }, |
| 10582 | { 83U, AArch64::B19 }, |
| 10583 | { 84U, AArch64::B20 }, |
| 10584 | { 85U, AArch64::B21 }, |
| 10585 | { 86U, AArch64::B22 }, |
| 10586 | { 87U, AArch64::B23 }, |
| 10587 | { 88U, AArch64::B24 }, |
| 10588 | { 89U, AArch64::B25 }, |
| 10589 | { 90U, AArch64::B26 }, |
| 10590 | { 91U, AArch64::B27 }, |
| 10591 | { 92U, AArch64::B28 }, |
| 10592 | { 93U, AArch64::B29 }, |
| 10593 | { 94U, AArch64::B30 }, |
| 10594 | { 95U, AArch64::B31 }, |
| 10595 | { 96U, AArch64::Z0 }, |
| 10596 | { 97U, AArch64::Z1 }, |
| 10597 | { 98U, AArch64::Z2 }, |
| 10598 | { 99U, AArch64::Z3 }, |
| 10599 | { 100U, AArch64::Z4 }, |
| 10600 | { 101U, AArch64::Z5 }, |
| 10601 | { 102U, AArch64::Z6 }, |
| 10602 | { 103U, AArch64::Z7 }, |
| 10603 | { 104U, AArch64::Z8 }, |
| 10604 | { 105U, AArch64::Z9 }, |
| 10605 | { 106U, AArch64::Z10 }, |
| 10606 | { 107U, AArch64::Z11 }, |
| 10607 | { 108U, AArch64::Z12 }, |
| 10608 | { 109U, AArch64::Z13 }, |
| 10609 | { 110U, AArch64::Z14 }, |
| 10610 | { 111U, AArch64::Z15 }, |
| 10611 | { 112U, AArch64::Z16 }, |
| 10612 | { 113U, AArch64::Z17 }, |
| 10613 | { 114U, AArch64::Z18 }, |
| 10614 | { 115U, AArch64::Z19 }, |
| 10615 | { 116U, AArch64::Z20 }, |
| 10616 | { 117U, AArch64::Z21 }, |
| 10617 | { 118U, AArch64::Z22 }, |
| 10618 | { 119U, AArch64::Z23 }, |
| 10619 | { 120U, AArch64::Z24 }, |
| 10620 | { 121U, AArch64::Z25 }, |
| 10621 | { 122U, AArch64::Z26 }, |
| 10622 | { 123U, AArch64::Z27 }, |
| 10623 | { 124U, AArch64::Z28 }, |
| 10624 | { 125U, AArch64::Z29 }, |
| 10625 | { 126U, AArch64::Z30 }, |
| 10626 | { 127U, AArch64::Z31 }, |
| 10627 | }; |
| 10628 | extern const unsigned AArch64DwarfFlavour0Dwarf2LSize = std::size(AArch64DwarfFlavour0Dwarf2L); |
| 10629 | |
| 10630 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0Dwarf2L[] = { |
| 10631 | { 0U, AArch64::W0 }, |
| 10632 | { 1U, AArch64::W1 }, |
| 10633 | { 2U, AArch64::W2 }, |
| 10634 | { 3U, AArch64::W3 }, |
| 10635 | { 4U, AArch64::W4 }, |
| 10636 | { 5U, AArch64::W5 }, |
| 10637 | { 6U, AArch64::W6 }, |
| 10638 | { 7U, AArch64::W7 }, |
| 10639 | { 8U, AArch64::W8 }, |
| 10640 | { 9U, AArch64::W9 }, |
| 10641 | { 10U, AArch64::W10 }, |
| 10642 | { 11U, AArch64::W11 }, |
| 10643 | { 12U, AArch64::W12 }, |
| 10644 | { 13U, AArch64::W13 }, |
| 10645 | { 14U, AArch64::W14 }, |
| 10646 | { 15U, AArch64::W15 }, |
| 10647 | { 16U, AArch64::W16 }, |
| 10648 | { 17U, AArch64::W17 }, |
| 10649 | { 18U, AArch64::W18 }, |
| 10650 | { 19U, AArch64::W19 }, |
| 10651 | { 20U, AArch64::W20 }, |
| 10652 | { 21U, AArch64::W21 }, |
| 10653 | { 22U, AArch64::W22 }, |
| 10654 | { 23U, AArch64::W23 }, |
| 10655 | { 24U, AArch64::W24 }, |
| 10656 | { 25U, AArch64::W25 }, |
| 10657 | { 26U, AArch64::W26 }, |
| 10658 | { 27U, AArch64::W27 }, |
| 10659 | { 28U, AArch64::W28 }, |
| 10660 | { 29U, AArch64::W29 }, |
| 10661 | { 30U, AArch64::W30 }, |
| 10662 | { 31U, AArch64::WSP }, |
| 10663 | { 46U, AArch64::VG }, |
| 10664 | { 47U, AArch64::FFR }, |
| 10665 | { 48U, AArch64::PN0 }, |
| 10666 | { 49U, AArch64::PN1 }, |
| 10667 | { 50U, AArch64::PN2 }, |
| 10668 | { 51U, AArch64::PN3 }, |
| 10669 | { 52U, AArch64::PN4 }, |
| 10670 | { 53U, AArch64::PN5 }, |
| 10671 | { 54U, AArch64::PN6 }, |
| 10672 | { 55U, AArch64::PN7 }, |
| 10673 | { 56U, AArch64::PN8 }, |
| 10674 | { 57U, AArch64::PN9 }, |
| 10675 | { 58U, AArch64::PN10 }, |
| 10676 | { 59U, AArch64::PN11 }, |
| 10677 | { 60U, AArch64::PN12 }, |
| 10678 | { 61U, AArch64::PN13 }, |
| 10679 | { 62U, AArch64::PN14 }, |
| 10680 | { 63U, AArch64::PN15 }, |
| 10681 | { 64U, AArch64::B0 }, |
| 10682 | { 65U, AArch64::B1 }, |
| 10683 | { 66U, AArch64::B2 }, |
| 10684 | { 67U, AArch64::B3 }, |
| 10685 | { 68U, AArch64::B4 }, |
| 10686 | { 69U, AArch64::B5 }, |
| 10687 | { 70U, AArch64::B6 }, |
| 10688 | { 71U, AArch64::B7 }, |
| 10689 | { 72U, AArch64::B8 }, |
| 10690 | { 73U, AArch64::B9 }, |
| 10691 | { 74U, AArch64::B10 }, |
| 10692 | { 75U, AArch64::B11 }, |
| 10693 | { 76U, AArch64::B12 }, |
| 10694 | { 77U, AArch64::B13 }, |
| 10695 | { 78U, AArch64::B14 }, |
| 10696 | { 79U, AArch64::B15 }, |
| 10697 | { 80U, AArch64::B16 }, |
| 10698 | { 81U, AArch64::B17 }, |
| 10699 | { 82U, AArch64::B18 }, |
| 10700 | { 83U, AArch64::B19 }, |
| 10701 | { 84U, AArch64::B20 }, |
| 10702 | { 85U, AArch64::B21 }, |
| 10703 | { 86U, AArch64::B22 }, |
| 10704 | { 87U, AArch64::B23 }, |
| 10705 | { 88U, AArch64::B24 }, |
| 10706 | { 89U, AArch64::B25 }, |
| 10707 | { 90U, AArch64::B26 }, |
| 10708 | { 91U, AArch64::B27 }, |
| 10709 | { 92U, AArch64::B28 }, |
| 10710 | { 93U, AArch64::B29 }, |
| 10711 | { 94U, AArch64::B30 }, |
| 10712 | { 95U, AArch64::B31 }, |
| 10713 | { 96U, AArch64::Z0 }, |
| 10714 | { 97U, AArch64::Z1 }, |
| 10715 | { 98U, AArch64::Z2 }, |
| 10716 | { 99U, AArch64::Z3 }, |
| 10717 | { 100U, AArch64::Z4 }, |
| 10718 | { 101U, AArch64::Z5 }, |
| 10719 | { 102U, AArch64::Z6 }, |
| 10720 | { 103U, AArch64::Z7 }, |
| 10721 | { 104U, AArch64::Z8 }, |
| 10722 | { 105U, AArch64::Z9 }, |
| 10723 | { 106U, AArch64::Z10 }, |
| 10724 | { 107U, AArch64::Z11 }, |
| 10725 | { 108U, AArch64::Z12 }, |
| 10726 | { 109U, AArch64::Z13 }, |
| 10727 | { 110U, AArch64::Z14 }, |
| 10728 | { 111U, AArch64::Z15 }, |
| 10729 | { 112U, AArch64::Z16 }, |
| 10730 | { 113U, AArch64::Z17 }, |
| 10731 | { 114U, AArch64::Z18 }, |
| 10732 | { 115U, AArch64::Z19 }, |
| 10733 | { 116U, AArch64::Z20 }, |
| 10734 | { 117U, AArch64::Z21 }, |
| 10735 | { 118U, AArch64::Z22 }, |
| 10736 | { 119U, AArch64::Z23 }, |
| 10737 | { 120U, AArch64::Z24 }, |
| 10738 | { 121U, AArch64::Z25 }, |
| 10739 | { 122U, AArch64::Z26 }, |
| 10740 | { 123U, AArch64::Z27 }, |
| 10741 | { 124U, AArch64::Z28 }, |
| 10742 | { 125U, AArch64::Z29 }, |
| 10743 | { 126U, AArch64::Z30 }, |
| 10744 | { 127U, AArch64::Z31 }, |
| 10745 | }; |
| 10746 | extern const unsigned AArch64EHFlavour0Dwarf2LSize = std::size(AArch64EHFlavour0Dwarf2L); |
| 10747 | |
| 10748 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0L2Dwarf[] = { |
| 10749 | { AArch64::FFR, 47U }, |
| 10750 | { AArch64::FP, 29U }, |
| 10751 | { AArch64::LR, 30U }, |
| 10752 | { AArch64::SP, 31U }, |
| 10753 | { AArch64::VG, 46U }, |
| 10754 | { AArch64::WSP, 31U }, |
| 10755 | { AArch64::WZR, 31U }, |
| 10756 | { AArch64::XZR, 31U }, |
| 10757 | { AArch64::B0, 64U }, |
| 10758 | { AArch64::B1, 65U }, |
| 10759 | { AArch64::B2, 66U }, |
| 10760 | { AArch64::B3, 67U }, |
| 10761 | { AArch64::B4, 68U }, |
| 10762 | { AArch64::B5, 69U }, |
| 10763 | { AArch64::B6, 70U }, |
| 10764 | { AArch64::B7, 71U }, |
| 10765 | { AArch64::B8, 72U }, |
| 10766 | { AArch64::B9, 73U }, |
| 10767 | { AArch64::B10, 74U }, |
| 10768 | { AArch64::B11, 75U }, |
| 10769 | { AArch64::B12, 76U }, |
| 10770 | { AArch64::B13, 77U }, |
| 10771 | { AArch64::B14, 78U }, |
| 10772 | { AArch64::B15, 79U }, |
| 10773 | { AArch64::B16, 80U }, |
| 10774 | { AArch64::B17, 81U }, |
| 10775 | { AArch64::B18, 82U }, |
| 10776 | { AArch64::B19, 83U }, |
| 10777 | { AArch64::B20, 84U }, |
| 10778 | { AArch64::B21, 85U }, |
| 10779 | { AArch64::B22, 86U }, |
| 10780 | { AArch64::B23, 87U }, |
| 10781 | { AArch64::B24, 88U }, |
| 10782 | { AArch64::B25, 89U }, |
| 10783 | { AArch64::B26, 90U }, |
| 10784 | { AArch64::B27, 91U }, |
| 10785 | { AArch64::B28, 92U }, |
| 10786 | { AArch64::B29, 93U }, |
| 10787 | { AArch64::B30, 94U }, |
| 10788 | { AArch64::B31, 95U }, |
| 10789 | { AArch64::D0, 64U }, |
| 10790 | { AArch64::D1, 65U }, |
| 10791 | { AArch64::D2, 66U }, |
| 10792 | { AArch64::D3, 67U }, |
| 10793 | { AArch64::D4, 68U }, |
| 10794 | { AArch64::D5, 69U }, |
| 10795 | { AArch64::D6, 70U }, |
| 10796 | { AArch64::D7, 71U }, |
| 10797 | { AArch64::D8, 72U }, |
| 10798 | { AArch64::D9, 73U }, |
| 10799 | { AArch64::D10, 74U }, |
| 10800 | { AArch64::D11, 75U }, |
| 10801 | { AArch64::D12, 76U }, |
| 10802 | { AArch64::D13, 77U }, |
| 10803 | { AArch64::D14, 78U }, |
| 10804 | { AArch64::D15, 79U }, |
| 10805 | { AArch64::D16, 80U }, |
| 10806 | { AArch64::D17, 81U }, |
| 10807 | { AArch64::D18, 82U }, |
| 10808 | { AArch64::D19, 83U }, |
| 10809 | { AArch64::D20, 84U }, |
| 10810 | { AArch64::D21, 85U }, |
| 10811 | { AArch64::D22, 86U }, |
| 10812 | { AArch64::D23, 87U }, |
| 10813 | { AArch64::D24, 88U }, |
| 10814 | { AArch64::D25, 89U }, |
| 10815 | { AArch64::D26, 90U }, |
| 10816 | { AArch64::D27, 91U }, |
| 10817 | { AArch64::D28, 92U }, |
| 10818 | { AArch64::D29, 93U }, |
| 10819 | { AArch64::D30, 94U }, |
| 10820 | { AArch64::D31, 95U }, |
| 10821 | { AArch64::H0, 64U }, |
| 10822 | { AArch64::H1, 65U }, |
| 10823 | { AArch64::H2, 66U }, |
| 10824 | { AArch64::H3, 67U }, |
| 10825 | { AArch64::H4, 68U }, |
| 10826 | { AArch64::H5, 69U }, |
| 10827 | { AArch64::H6, 70U }, |
| 10828 | { AArch64::H7, 71U }, |
| 10829 | { AArch64::H8, 72U }, |
| 10830 | { AArch64::H9, 73U }, |
| 10831 | { AArch64::H10, 74U }, |
| 10832 | { AArch64::H11, 75U }, |
| 10833 | { AArch64::H12, 76U }, |
| 10834 | { AArch64::H13, 77U }, |
| 10835 | { AArch64::H14, 78U }, |
| 10836 | { AArch64::H15, 79U }, |
| 10837 | { AArch64::H16, 80U }, |
| 10838 | { AArch64::H17, 81U }, |
| 10839 | { AArch64::H18, 82U }, |
| 10840 | { AArch64::H19, 83U }, |
| 10841 | { AArch64::H20, 84U }, |
| 10842 | { AArch64::H21, 85U }, |
| 10843 | { AArch64::H22, 86U }, |
| 10844 | { AArch64::H23, 87U }, |
| 10845 | { AArch64::H24, 88U }, |
| 10846 | { AArch64::H25, 89U }, |
| 10847 | { AArch64::H26, 90U }, |
| 10848 | { AArch64::H27, 91U }, |
| 10849 | { AArch64::H28, 92U }, |
| 10850 | { AArch64::H29, 93U }, |
| 10851 | { AArch64::H30, 94U }, |
| 10852 | { AArch64::H31, 95U }, |
| 10853 | { AArch64::P0, 48U }, |
| 10854 | { AArch64::P1, 49U }, |
| 10855 | { AArch64::P2, 50U }, |
| 10856 | { AArch64::P3, 51U }, |
| 10857 | { AArch64::P4, 52U }, |
| 10858 | { AArch64::P5, 53U }, |
| 10859 | { AArch64::P6, 54U }, |
| 10860 | { AArch64::P7, 55U }, |
| 10861 | { AArch64::P8, 56U }, |
| 10862 | { AArch64::P9, 57U }, |
| 10863 | { AArch64::P10, 58U }, |
| 10864 | { AArch64::P11, 59U }, |
| 10865 | { AArch64::P12, 60U }, |
| 10866 | { AArch64::P13, 61U }, |
| 10867 | { AArch64::P14, 62U }, |
| 10868 | { AArch64::P15, 63U }, |
| 10869 | { AArch64::PN0, 48U }, |
| 10870 | { AArch64::PN1, 49U }, |
| 10871 | { AArch64::PN2, 50U }, |
| 10872 | { AArch64::PN3, 51U }, |
| 10873 | { AArch64::PN4, 52U }, |
| 10874 | { AArch64::PN5, 53U }, |
| 10875 | { AArch64::PN6, 54U }, |
| 10876 | { AArch64::PN7, 55U }, |
| 10877 | { AArch64::PN8, 56U }, |
| 10878 | { AArch64::PN9, 57U }, |
| 10879 | { AArch64::PN10, 58U }, |
| 10880 | { AArch64::PN11, 59U }, |
| 10881 | { AArch64::PN12, 60U }, |
| 10882 | { AArch64::PN13, 61U }, |
| 10883 | { AArch64::PN14, 62U }, |
| 10884 | { AArch64::PN15, 63U }, |
| 10885 | { AArch64::Q0, 64U }, |
| 10886 | { AArch64::Q1, 65U }, |
| 10887 | { AArch64::Q2, 66U }, |
| 10888 | { AArch64::Q3, 67U }, |
| 10889 | { AArch64::Q4, 68U }, |
| 10890 | { AArch64::Q5, 69U }, |
| 10891 | { AArch64::Q6, 70U }, |
| 10892 | { AArch64::Q7, 71U }, |
| 10893 | { AArch64::Q8, 72U }, |
| 10894 | { AArch64::Q9, 73U }, |
| 10895 | { AArch64::Q10, 74U }, |
| 10896 | { AArch64::Q11, 75U }, |
| 10897 | { AArch64::Q12, 76U }, |
| 10898 | { AArch64::Q13, 77U }, |
| 10899 | { AArch64::Q14, 78U }, |
| 10900 | { AArch64::Q15, 79U }, |
| 10901 | { AArch64::Q16, 80U }, |
| 10902 | { AArch64::Q17, 81U }, |
| 10903 | { AArch64::Q18, 82U }, |
| 10904 | { AArch64::Q19, 83U }, |
| 10905 | { AArch64::Q20, 84U }, |
| 10906 | { AArch64::Q21, 85U }, |
| 10907 | { AArch64::Q22, 86U }, |
| 10908 | { AArch64::Q23, 87U }, |
| 10909 | { AArch64::Q24, 88U }, |
| 10910 | { AArch64::Q25, 89U }, |
| 10911 | { AArch64::Q26, 90U }, |
| 10912 | { AArch64::Q27, 91U }, |
| 10913 | { AArch64::Q28, 92U }, |
| 10914 | { AArch64::Q29, 93U }, |
| 10915 | { AArch64::Q30, 94U }, |
| 10916 | { AArch64::Q31, 95U }, |
| 10917 | { AArch64::S0, 64U }, |
| 10918 | { AArch64::S1, 65U }, |
| 10919 | { AArch64::S2, 66U }, |
| 10920 | { AArch64::S3, 67U }, |
| 10921 | { AArch64::S4, 68U }, |
| 10922 | { AArch64::S5, 69U }, |
| 10923 | { AArch64::S6, 70U }, |
| 10924 | { AArch64::S7, 71U }, |
| 10925 | { AArch64::S8, 72U }, |
| 10926 | { AArch64::S9, 73U }, |
| 10927 | { AArch64::S10, 74U }, |
| 10928 | { AArch64::S11, 75U }, |
| 10929 | { AArch64::S12, 76U }, |
| 10930 | { AArch64::S13, 77U }, |
| 10931 | { AArch64::S14, 78U }, |
| 10932 | { AArch64::S15, 79U }, |
| 10933 | { AArch64::S16, 80U }, |
| 10934 | { AArch64::S17, 81U }, |
| 10935 | { AArch64::S18, 82U }, |
| 10936 | { AArch64::S19, 83U }, |
| 10937 | { AArch64::S20, 84U }, |
| 10938 | { AArch64::S21, 85U }, |
| 10939 | { AArch64::S22, 86U }, |
| 10940 | { AArch64::S23, 87U }, |
| 10941 | { AArch64::S24, 88U }, |
| 10942 | { AArch64::S25, 89U }, |
| 10943 | { AArch64::S26, 90U }, |
| 10944 | { AArch64::S27, 91U }, |
| 10945 | { AArch64::S28, 92U }, |
| 10946 | { AArch64::S29, 93U }, |
| 10947 | { AArch64::S30, 94U }, |
| 10948 | { AArch64::S31, 95U }, |
| 10949 | { AArch64::W0, 0U }, |
| 10950 | { AArch64::W1, 1U }, |
| 10951 | { AArch64::W2, 2U }, |
| 10952 | { AArch64::W3, 3U }, |
| 10953 | { AArch64::W4, 4U }, |
| 10954 | { AArch64::W5, 5U }, |
| 10955 | { AArch64::W6, 6U }, |
| 10956 | { AArch64::W7, 7U }, |
| 10957 | { AArch64::W8, 8U }, |
| 10958 | { AArch64::W9, 9U }, |
| 10959 | { AArch64::W10, 10U }, |
| 10960 | { AArch64::W11, 11U }, |
| 10961 | { AArch64::W12, 12U }, |
| 10962 | { AArch64::W13, 13U }, |
| 10963 | { AArch64::W14, 14U }, |
| 10964 | { AArch64::W15, 15U }, |
| 10965 | { AArch64::W16, 16U }, |
| 10966 | { AArch64::W17, 17U }, |
| 10967 | { AArch64::W18, 18U }, |
| 10968 | { AArch64::W19, 19U }, |
| 10969 | { AArch64::W20, 20U }, |
| 10970 | { AArch64::W21, 21U }, |
| 10971 | { AArch64::W22, 22U }, |
| 10972 | { AArch64::W23, 23U }, |
| 10973 | { AArch64::W24, 24U }, |
| 10974 | { AArch64::W25, 25U }, |
| 10975 | { AArch64::W26, 26U }, |
| 10976 | { AArch64::W27, 27U }, |
| 10977 | { AArch64::W28, 28U }, |
| 10978 | { AArch64::W29, 29U }, |
| 10979 | { AArch64::W30, 30U }, |
| 10980 | { AArch64::X0, 0U }, |
| 10981 | { AArch64::X1, 1U }, |
| 10982 | { AArch64::X2, 2U }, |
| 10983 | { AArch64::X3, 3U }, |
| 10984 | { AArch64::X4, 4U }, |
| 10985 | { AArch64::X5, 5U }, |
| 10986 | { AArch64::X6, 6U }, |
| 10987 | { AArch64::X7, 7U }, |
| 10988 | { AArch64::X8, 8U }, |
| 10989 | { AArch64::X9, 9U }, |
| 10990 | { AArch64::X10, 10U }, |
| 10991 | { AArch64::X11, 11U }, |
| 10992 | { AArch64::X12, 12U }, |
| 10993 | { AArch64::X13, 13U }, |
| 10994 | { AArch64::X14, 14U }, |
| 10995 | { AArch64::X15, 15U }, |
| 10996 | { AArch64::X16, 16U }, |
| 10997 | { AArch64::X17, 17U }, |
| 10998 | { AArch64::X18, 18U }, |
| 10999 | { AArch64::X19, 19U }, |
| 11000 | { AArch64::X20, 20U }, |
| 11001 | { AArch64::X21, 21U }, |
| 11002 | { AArch64::X22, 22U }, |
| 11003 | { AArch64::X23, 23U }, |
| 11004 | { AArch64::X24, 24U }, |
| 11005 | { AArch64::X25, 25U }, |
| 11006 | { AArch64::X26, 26U }, |
| 11007 | { AArch64::X27, 27U }, |
| 11008 | { AArch64::X28, 28U }, |
| 11009 | { AArch64::Z0, 96U }, |
| 11010 | { AArch64::Z1, 97U }, |
| 11011 | { AArch64::Z2, 98U }, |
| 11012 | { AArch64::Z3, 99U }, |
| 11013 | { AArch64::Z4, 100U }, |
| 11014 | { AArch64::Z5, 101U }, |
| 11015 | { AArch64::Z6, 102U }, |
| 11016 | { AArch64::Z7, 103U }, |
| 11017 | { AArch64::Z8, 104U }, |
| 11018 | { AArch64::Z9, 105U }, |
| 11019 | { AArch64::Z10, 106U }, |
| 11020 | { AArch64::Z11, 107U }, |
| 11021 | { AArch64::Z12, 108U }, |
| 11022 | { AArch64::Z13, 109U }, |
| 11023 | { AArch64::Z14, 110U }, |
| 11024 | { AArch64::Z15, 111U }, |
| 11025 | { AArch64::Z16, 112U }, |
| 11026 | { AArch64::Z17, 113U }, |
| 11027 | { AArch64::Z18, 114U }, |
| 11028 | { AArch64::Z19, 115U }, |
| 11029 | { AArch64::Z20, 116U }, |
| 11030 | { AArch64::Z21, 117U }, |
| 11031 | { AArch64::Z22, 118U }, |
| 11032 | { AArch64::Z23, 119U }, |
| 11033 | { AArch64::Z24, 120U }, |
| 11034 | { AArch64::Z25, 121U }, |
| 11035 | { AArch64::Z26, 122U }, |
| 11036 | { AArch64::Z27, 123U }, |
| 11037 | { AArch64::Z28, 124U }, |
| 11038 | { AArch64::Z29, 125U }, |
| 11039 | { AArch64::Z30, 126U }, |
| 11040 | { AArch64::Z31, 127U }, |
| 11041 | }; |
| 11042 | extern const unsigned AArch64DwarfFlavour0L2DwarfSize = std::size(AArch64DwarfFlavour0L2Dwarf); |
| 11043 | |
| 11044 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0L2Dwarf[] = { |
| 11045 | { AArch64::FFR, 47U }, |
| 11046 | { AArch64::FP, 29U }, |
| 11047 | { AArch64::LR, 30U }, |
| 11048 | { AArch64::SP, 31U }, |
| 11049 | { AArch64::VG, 46U }, |
| 11050 | { AArch64::WSP, 31U }, |
| 11051 | { AArch64::WZR, 31U }, |
| 11052 | { AArch64::XZR, 31U }, |
| 11053 | { AArch64::B0, 64U }, |
| 11054 | { AArch64::B1, 65U }, |
| 11055 | { AArch64::B2, 66U }, |
| 11056 | { AArch64::B3, 67U }, |
| 11057 | { AArch64::B4, 68U }, |
| 11058 | { AArch64::B5, 69U }, |
| 11059 | { AArch64::B6, 70U }, |
| 11060 | { AArch64::B7, 71U }, |
| 11061 | { AArch64::B8, 72U }, |
| 11062 | { AArch64::B9, 73U }, |
| 11063 | { AArch64::B10, 74U }, |
| 11064 | { AArch64::B11, 75U }, |
| 11065 | { AArch64::B12, 76U }, |
| 11066 | { AArch64::B13, 77U }, |
| 11067 | { AArch64::B14, 78U }, |
| 11068 | { AArch64::B15, 79U }, |
| 11069 | { AArch64::B16, 80U }, |
| 11070 | { AArch64::B17, 81U }, |
| 11071 | { AArch64::B18, 82U }, |
| 11072 | { AArch64::B19, 83U }, |
| 11073 | { AArch64::B20, 84U }, |
| 11074 | { AArch64::B21, 85U }, |
| 11075 | { AArch64::B22, 86U }, |
| 11076 | { AArch64::B23, 87U }, |
| 11077 | { AArch64::B24, 88U }, |
| 11078 | { AArch64::B25, 89U }, |
| 11079 | { AArch64::B26, 90U }, |
| 11080 | { AArch64::B27, 91U }, |
| 11081 | { AArch64::B28, 92U }, |
| 11082 | { AArch64::B29, 93U }, |
| 11083 | { AArch64::B30, 94U }, |
| 11084 | { AArch64::B31, 95U }, |
| 11085 | { AArch64::D0, 64U }, |
| 11086 | { AArch64::D1, 65U }, |
| 11087 | { AArch64::D2, 66U }, |
| 11088 | { AArch64::D3, 67U }, |
| 11089 | { AArch64::D4, 68U }, |
| 11090 | { AArch64::D5, 69U }, |
| 11091 | { AArch64::D6, 70U }, |
| 11092 | { AArch64::D7, 71U }, |
| 11093 | { AArch64::D8, 72U }, |
| 11094 | { AArch64::D9, 73U }, |
| 11095 | { AArch64::D10, 74U }, |
| 11096 | { AArch64::D11, 75U }, |
| 11097 | { AArch64::D12, 76U }, |
| 11098 | { AArch64::D13, 77U }, |
| 11099 | { AArch64::D14, 78U }, |
| 11100 | { AArch64::D15, 79U }, |
| 11101 | { AArch64::D16, 80U }, |
| 11102 | { AArch64::D17, 81U }, |
| 11103 | { AArch64::D18, 82U }, |
| 11104 | { AArch64::D19, 83U }, |
| 11105 | { AArch64::D20, 84U }, |
| 11106 | { AArch64::D21, 85U }, |
| 11107 | { AArch64::D22, 86U }, |
| 11108 | { AArch64::D23, 87U }, |
| 11109 | { AArch64::D24, 88U }, |
| 11110 | { AArch64::D25, 89U }, |
| 11111 | { AArch64::D26, 90U }, |
| 11112 | { AArch64::D27, 91U }, |
| 11113 | { AArch64::D28, 92U }, |
| 11114 | { AArch64::D29, 93U }, |
| 11115 | { AArch64::D30, 94U }, |
| 11116 | { AArch64::D31, 95U }, |
| 11117 | { AArch64::H0, 64U }, |
| 11118 | { AArch64::H1, 65U }, |
| 11119 | { AArch64::H2, 66U }, |
| 11120 | { AArch64::H3, 67U }, |
| 11121 | { AArch64::H4, 68U }, |
| 11122 | { AArch64::H5, 69U }, |
| 11123 | { AArch64::H6, 70U }, |
| 11124 | { AArch64::H7, 71U }, |
| 11125 | { AArch64::H8, 72U }, |
| 11126 | { AArch64::H9, 73U }, |
| 11127 | { AArch64::H10, 74U }, |
| 11128 | { AArch64::H11, 75U }, |
| 11129 | { AArch64::H12, 76U }, |
| 11130 | { AArch64::H13, 77U }, |
| 11131 | { AArch64::H14, 78U }, |
| 11132 | { AArch64::H15, 79U }, |
| 11133 | { AArch64::H16, 80U }, |
| 11134 | { AArch64::H17, 81U }, |
| 11135 | { AArch64::H18, 82U }, |
| 11136 | { AArch64::H19, 83U }, |
| 11137 | { AArch64::H20, 84U }, |
| 11138 | { AArch64::H21, 85U }, |
| 11139 | { AArch64::H22, 86U }, |
| 11140 | { AArch64::H23, 87U }, |
| 11141 | { AArch64::H24, 88U }, |
| 11142 | { AArch64::H25, 89U }, |
| 11143 | { AArch64::H26, 90U }, |
| 11144 | { AArch64::H27, 91U }, |
| 11145 | { AArch64::H28, 92U }, |
| 11146 | { AArch64::H29, 93U }, |
| 11147 | { AArch64::H30, 94U }, |
| 11148 | { AArch64::H31, 95U }, |
| 11149 | { AArch64::P0, 48U }, |
| 11150 | { AArch64::P1, 49U }, |
| 11151 | { AArch64::P2, 50U }, |
| 11152 | { AArch64::P3, 51U }, |
| 11153 | { AArch64::P4, 52U }, |
| 11154 | { AArch64::P5, 53U }, |
| 11155 | { AArch64::P6, 54U }, |
| 11156 | { AArch64::P7, 55U }, |
| 11157 | { AArch64::P8, 56U }, |
| 11158 | { AArch64::P9, 57U }, |
| 11159 | { AArch64::P10, 58U }, |
| 11160 | { AArch64::P11, 59U }, |
| 11161 | { AArch64::P12, 60U }, |
| 11162 | { AArch64::P13, 61U }, |
| 11163 | { AArch64::P14, 62U }, |
| 11164 | { AArch64::P15, 63U }, |
| 11165 | { AArch64::PN0, 48U }, |
| 11166 | { AArch64::PN1, 49U }, |
| 11167 | { AArch64::PN2, 50U }, |
| 11168 | { AArch64::PN3, 51U }, |
| 11169 | { AArch64::PN4, 52U }, |
| 11170 | { AArch64::PN5, 53U }, |
| 11171 | { AArch64::PN6, 54U }, |
| 11172 | { AArch64::PN7, 55U }, |
| 11173 | { AArch64::PN8, 56U }, |
| 11174 | { AArch64::PN9, 57U }, |
| 11175 | { AArch64::PN10, 58U }, |
| 11176 | { AArch64::PN11, 59U }, |
| 11177 | { AArch64::PN12, 60U }, |
| 11178 | { AArch64::PN13, 61U }, |
| 11179 | { AArch64::PN14, 62U }, |
| 11180 | { AArch64::PN15, 63U }, |
| 11181 | { AArch64::Q0, 64U }, |
| 11182 | { AArch64::Q1, 65U }, |
| 11183 | { AArch64::Q2, 66U }, |
| 11184 | { AArch64::Q3, 67U }, |
| 11185 | { AArch64::Q4, 68U }, |
| 11186 | { AArch64::Q5, 69U }, |
| 11187 | { AArch64::Q6, 70U }, |
| 11188 | { AArch64::Q7, 71U }, |
| 11189 | { AArch64::Q8, 72U }, |
| 11190 | { AArch64::Q9, 73U }, |
| 11191 | { AArch64::Q10, 74U }, |
| 11192 | { AArch64::Q11, 75U }, |
| 11193 | { AArch64::Q12, 76U }, |
| 11194 | { AArch64::Q13, 77U }, |
| 11195 | { AArch64::Q14, 78U }, |
| 11196 | { AArch64::Q15, 79U }, |
| 11197 | { AArch64::Q16, 80U }, |
| 11198 | { AArch64::Q17, 81U }, |
| 11199 | { AArch64::Q18, 82U }, |
| 11200 | { AArch64::Q19, 83U }, |
| 11201 | { AArch64::Q20, 84U }, |
| 11202 | { AArch64::Q21, 85U }, |
| 11203 | { AArch64::Q22, 86U }, |
| 11204 | { AArch64::Q23, 87U }, |
| 11205 | { AArch64::Q24, 88U }, |
| 11206 | { AArch64::Q25, 89U }, |
| 11207 | { AArch64::Q26, 90U }, |
| 11208 | { AArch64::Q27, 91U }, |
| 11209 | { AArch64::Q28, 92U }, |
| 11210 | { AArch64::Q29, 93U }, |
| 11211 | { AArch64::Q30, 94U }, |
| 11212 | { AArch64::Q31, 95U }, |
| 11213 | { AArch64::S0, 64U }, |
| 11214 | { AArch64::S1, 65U }, |
| 11215 | { AArch64::S2, 66U }, |
| 11216 | { AArch64::S3, 67U }, |
| 11217 | { AArch64::S4, 68U }, |
| 11218 | { AArch64::S5, 69U }, |
| 11219 | { AArch64::S6, 70U }, |
| 11220 | { AArch64::S7, 71U }, |
| 11221 | { AArch64::S8, 72U }, |
| 11222 | { AArch64::S9, 73U }, |
| 11223 | { AArch64::S10, 74U }, |
| 11224 | { AArch64::S11, 75U }, |
| 11225 | { AArch64::S12, 76U }, |
| 11226 | { AArch64::S13, 77U }, |
| 11227 | { AArch64::S14, 78U }, |
| 11228 | { AArch64::S15, 79U }, |
| 11229 | { AArch64::S16, 80U }, |
| 11230 | { AArch64::S17, 81U }, |
| 11231 | { AArch64::S18, 82U }, |
| 11232 | { AArch64::S19, 83U }, |
| 11233 | { AArch64::S20, 84U }, |
| 11234 | { AArch64::S21, 85U }, |
| 11235 | { AArch64::S22, 86U }, |
| 11236 | { AArch64::S23, 87U }, |
| 11237 | { AArch64::S24, 88U }, |
| 11238 | { AArch64::S25, 89U }, |
| 11239 | { AArch64::S26, 90U }, |
| 11240 | { AArch64::S27, 91U }, |
| 11241 | { AArch64::S28, 92U }, |
| 11242 | { AArch64::S29, 93U }, |
| 11243 | { AArch64::S30, 94U }, |
| 11244 | { AArch64::S31, 95U }, |
| 11245 | { AArch64::W0, 0U }, |
| 11246 | { AArch64::W1, 1U }, |
| 11247 | { AArch64::W2, 2U }, |
| 11248 | { AArch64::W3, 3U }, |
| 11249 | { AArch64::W4, 4U }, |
| 11250 | { AArch64::W5, 5U }, |
| 11251 | { AArch64::W6, 6U }, |
| 11252 | { AArch64::W7, 7U }, |
| 11253 | { AArch64::W8, 8U }, |
| 11254 | { AArch64::W9, 9U }, |
| 11255 | { AArch64::W10, 10U }, |
| 11256 | { AArch64::W11, 11U }, |
| 11257 | { AArch64::W12, 12U }, |
| 11258 | { AArch64::W13, 13U }, |
| 11259 | { AArch64::W14, 14U }, |
| 11260 | { AArch64::W15, 15U }, |
| 11261 | { AArch64::W16, 16U }, |
| 11262 | { AArch64::W17, 17U }, |
| 11263 | { AArch64::W18, 18U }, |
| 11264 | { AArch64::W19, 19U }, |
| 11265 | { AArch64::W20, 20U }, |
| 11266 | { AArch64::W21, 21U }, |
| 11267 | { AArch64::W22, 22U }, |
| 11268 | { AArch64::W23, 23U }, |
| 11269 | { AArch64::W24, 24U }, |
| 11270 | { AArch64::W25, 25U }, |
| 11271 | { AArch64::W26, 26U }, |
| 11272 | { AArch64::W27, 27U }, |
| 11273 | { AArch64::W28, 28U }, |
| 11274 | { AArch64::W29, 29U }, |
| 11275 | { AArch64::W30, 30U }, |
| 11276 | { AArch64::X0, 0U }, |
| 11277 | { AArch64::X1, 1U }, |
| 11278 | { AArch64::X2, 2U }, |
| 11279 | { AArch64::X3, 3U }, |
| 11280 | { AArch64::X4, 4U }, |
| 11281 | { AArch64::X5, 5U }, |
| 11282 | { AArch64::X6, 6U }, |
| 11283 | { AArch64::X7, 7U }, |
| 11284 | { AArch64::X8, 8U }, |
| 11285 | { AArch64::X9, 9U }, |
| 11286 | { AArch64::X10, 10U }, |
| 11287 | { AArch64::X11, 11U }, |
| 11288 | { AArch64::X12, 12U }, |
| 11289 | { AArch64::X13, 13U }, |
| 11290 | { AArch64::X14, 14U }, |
| 11291 | { AArch64::X15, 15U }, |
| 11292 | { AArch64::X16, 16U }, |
| 11293 | { AArch64::X17, 17U }, |
| 11294 | { AArch64::X18, 18U }, |
| 11295 | { AArch64::X19, 19U }, |
| 11296 | { AArch64::X20, 20U }, |
| 11297 | { AArch64::X21, 21U }, |
| 11298 | { AArch64::X22, 22U }, |
| 11299 | { AArch64::X23, 23U }, |
| 11300 | { AArch64::X24, 24U }, |
| 11301 | { AArch64::X25, 25U }, |
| 11302 | { AArch64::X26, 26U }, |
| 11303 | { AArch64::X27, 27U }, |
| 11304 | { AArch64::X28, 28U }, |
| 11305 | { AArch64::Z0, 96U }, |
| 11306 | { AArch64::Z1, 97U }, |
| 11307 | { AArch64::Z2, 98U }, |
| 11308 | { AArch64::Z3, 99U }, |
| 11309 | { AArch64::Z4, 100U }, |
| 11310 | { AArch64::Z5, 101U }, |
| 11311 | { AArch64::Z6, 102U }, |
| 11312 | { AArch64::Z7, 103U }, |
| 11313 | { AArch64::Z8, 104U }, |
| 11314 | { AArch64::Z9, 105U }, |
| 11315 | { AArch64::Z10, 106U }, |
| 11316 | { AArch64::Z11, 107U }, |
| 11317 | { AArch64::Z12, 108U }, |
| 11318 | { AArch64::Z13, 109U }, |
| 11319 | { AArch64::Z14, 110U }, |
| 11320 | { AArch64::Z15, 111U }, |
| 11321 | { AArch64::Z16, 112U }, |
| 11322 | { AArch64::Z17, 113U }, |
| 11323 | { AArch64::Z18, 114U }, |
| 11324 | { AArch64::Z19, 115U }, |
| 11325 | { AArch64::Z20, 116U }, |
| 11326 | { AArch64::Z21, 117U }, |
| 11327 | { AArch64::Z22, 118U }, |
| 11328 | { AArch64::Z23, 119U }, |
| 11329 | { AArch64::Z24, 120U }, |
| 11330 | { AArch64::Z25, 121U }, |
| 11331 | { AArch64::Z26, 122U }, |
| 11332 | { AArch64::Z27, 123U }, |
| 11333 | { AArch64::Z28, 124U }, |
| 11334 | { AArch64::Z29, 125U }, |
| 11335 | { AArch64::Z30, 126U }, |
| 11336 | { AArch64::Z31, 127U }, |
| 11337 | }; |
| 11338 | extern const unsigned AArch64EHFlavour0L2DwarfSize = std::size(AArch64EHFlavour0L2Dwarf); |
| 11339 | |
| 11340 | extern const uint16_t AArch64RegEncodingTable[] = { |
| 11341 | 0, |
| 11342 | 0, |
| 11343 | 29, |
| 11344 | 0, |
| 11345 | 0, |
| 11346 | 0, |
| 11347 | 30, |
| 11348 | 0, |
| 11349 | 31, |
| 11350 | 0, |
| 11351 | 31, |
| 11352 | 65535, |
| 11353 | 31, |
| 11354 | 65535, |
| 11355 | 31, |
| 11356 | 0, |
| 11357 | 0, |
| 11358 | 1, |
| 11359 | 2, |
| 11360 | 3, |
| 11361 | 4, |
| 11362 | 5, |
| 11363 | 6, |
| 11364 | 7, |
| 11365 | 8, |
| 11366 | 9, |
| 11367 | 10, |
| 11368 | 11, |
| 11369 | 12, |
| 11370 | 13, |
| 11371 | 14, |
| 11372 | 15, |
| 11373 | 16, |
| 11374 | 17, |
| 11375 | 18, |
| 11376 | 19, |
| 11377 | 20, |
| 11378 | 21, |
| 11379 | 22, |
| 11380 | 23, |
| 11381 | 24, |
| 11382 | 25, |
| 11383 | 26, |
| 11384 | 27, |
| 11385 | 28, |
| 11386 | 29, |
| 11387 | 30, |
| 11388 | 31, |
| 11389 | 0, |
| 11390 | 1, |
| 11391 | 2, |
| 11392 | 3, |
| 11393 | 4, |
| 11394 | 5, |
| 11395 | 6, |
| 11396 | 7, |
| 11397 | 8, |
| 11398 | 9, |
| 11399 | 10, |
| 11400 | 11, |
| 11401 | 12, |
| 11402 | 13, |
| 11403 | 14, |
| 11404 | 15, |
| 11405 | 16, |
| 11406 | 17, |
| 11407 | 18, |
| 11408 | 19, |
| 11409 | 20, |
| 11410 | 21, |
| 11411 | 22, |
| 11412 | 23, |
| 11413 | 24, |
| 11414 | 25, |
| 11415 | 26, |
| 11416 | 27, |
| 11417 | 28, |
| 11418 | 29, |
| 11419 | 30, |
| 11420 | 31, |
| 11421 | 0, |
| 11422 | 1, |
| 11423 | 2, |
| 11424 | 3, |
| 11425 | 4, |
| 11426 | 5, |
| 11427 | 6, |
| 11428 | 7, |
| 11429 | 8, |
| 11430 | 9, |
| 11431 | 10, |
| 11432 | 11, |
| 11433 | 12, |
| 11434 | 13, |
| 11435 | 14, |
| 11436 | 15, |
| 11437 | 16, |
| 11438 | 17, |
| 11439 | 18, |
| 11440 | 19, |
| 11441 | 20, |
| 11442 | 21, |
| 11443 | 22, |
| 11444 | 23, |
| 11445 | 24, |
| 11446 | 25, |
| 11447 | 26, |
| 11448 | 27, |
| 11449 | 28, |
| 11450 | 29, |
| 11451 | 30, |
| 11452 | 31, |
| 11453 | 0, |
| 11454 | 1, |
| 11455 | 2, |
| 11456 | 3, |
| 11457 | 4, |
| 11458 | 5, |
| 11459 | 6, |
| 11460 | 7, |
| 11461 | 8, |
| 11462 | 9, |
| 11463 | 10, |
| 11464 | 11, |
| 11465 | 12, |
| 11466 | 13, |
| 11467 | 14, |
| 11468 | 15, |
| 11469 | 0, |
| 11470 | 1, |
| 11471 | 2, |
| 11472 | 3, |
| 11473 | 4, |
| 11474 | 5, |
| 11475 | 6, |
| 11476 | 7, |
| 11477 | 8, |
| 11478 | 9, |
| 11479 | 10, |
| 11480 | 11, |
| 11481 | 12, |
| 11482 | 13, |
| 11483 | 14, |
| 11484 | 15, |
| 11485 | 0, |
| 11486 | 1, |
| 11487 | 2, |
| 11488 | 3, |
| 11489 | 4, |
| 11490 | 5, |
| 11491 | 6, |
| 11492 | 7, |
| 11493 | 8, |
| 11494 | 9, |
| 11495 | 10, |
| 11496 | 11, |
| 11497 | 12, |
| 11498 | 13, |
| 11499 | 14, |
| 11500 | 15, |
| 11501 | 16, |
| 11502 | 17, |
| 11503 | 18, |
| 11504 | 19, |
| 11505 | 20, |
| 11506 | 21, |
| 11507 | 22, |
| 11508 | 23, |
| 11509 | 24, |
| 11510 | 25, |
| 11511 | 26, |
| 11512 | 27, |
| 11513 | 28, |
| 11514 | 29, |
| 11515 | 30, |
| 11516 | 31, |
| 11517 | 0, |
| 11518 | 1, |
| 11519 | 2, |
| 11520 | 3, |
| 11521 | 4, |
| 11522 | 5, |
| 11523 | 6, |
| 11524 | 7, |
| 11525 | 8, |
| 11526 | 9, |
| 11527 | 10, |
| 11528 | 11, |
| 11529 | 12, |
| 11530 | 13, |
| 11531 | 14, |
| 11532 | 15, |
| 11533 | 16, |
| 11534 | 17, |
| 11535 | 18, |
| 11536 | 19, |
| 11537 | 20, |
| 11538 | 21, |
| 11539 | 22, |
| 11540 | 23, |
| 11541 | 24, |
| 11542 | 25, |
| 11543 | 26, |
| 11544 | 27, |
| 11545 | 28, |
| 11546 | 29, |
| 11547 | 30, |
| 11548 | 31, |
| 11549 | 0, |
| 11550 | 1, |
| 11551 | 2, |
| 11552 | 3, |
| 11553 | 4, |
| 11554 | 5, |
| 11555 | 6, |
| 11556 | 7, |
| 11557 | 8, |
| 11558 | 9, |
| 11559 | 10, |
| 11560 | 11, |
| 11561 | 12, |
| 11562 | 13, |
| 11563 | 14, |
| 11564 | 15, |
| 11565 | 16, |
| 11566 | 17, |
| 11567 | 18, |
| 11568 | 19, |
| 11569 | 20, |
| 11570 | 21, |
| 11571 | 22, |
| 11572 | 23, |
| 11573 | 24, |
| 11574 | 25, |
| 11575 | 26, |
| 11576 | 27, |
| 11577 | 28, |
| 11578 | 29, |
| 11579 | 30, |
| 11580 | 0, |
| 11581 | 1, |
| 11582 | 2, |
| 11583 | 3, |
| 11584 | 4, |
| 11585 | 5, |
| 11586 | 6, |
| 11587 | 7, |
| 11588 | 8, |
| 11589 | 9, |
| 11590 | 10, |
| 11591 | 11, |
| 11592 | 12, |
| 11593 | 13, |
| 11594 | 14, |
| 11595 | 15, |
| 11596 | 16, |
| 11597 | 17, |
| 11598 | 18, |
| 11599 | 19, |
| 11600 | 20, |
| 11601 | 21, |
| 11602 | 22, |
| 11603 | 23, |
| 11604 | 24, |
| 11605 | 25, |
| 11606 | 26, |
| 11607 | 27, |
| 11608 | 28, |
| 11609 | 0, |
| 11610 | 1, |
| 11611 | 2, |
| 11612 | 3, |
| 11613 | 4, |
| 11614 | 5, |
| 11615 | 6, |
| 11616 | 7, |
| 11617 | 8, |
| 11618 | 9, |
| 11619 | 10, |
| 11620 | 11, |
| 11621 | 12, |
| 11622 | 13, |
| 11623 | 14, |
| 11624 | 15, |
| 11625 | 16, |
| 11626 | 17, |
| 11627 | 18, |
| 11628 | 19, |
| 11629 | 20, |
| 11630 | 21, |
| 11631 | 22, |
| 11632 | 23, |
| 11633 | 24, |
| 11634 | 25, |
| 11635 | 26, |
| 11636 | 27, |
| 11637 | 28, |
| 11638 | 29, |
| 11639 | 30, |
| 11640 | 31, |
| 11641 | 0, |
| 11642 | 0, |
| 11643 | 1, |
| 11644 | 2, |
| 11645 | 3, |
| 11646 | 4, |
| 11647 | 5, |
| 11648 | 6, |
| 11649 | 7, |
| 11650 | 0, |
| 11651 | 1, |
| 11652 | 0, |
| 11653 | 1, |
| 11654 | 2, |
| 11655 | 3, |
| 11656 | 4, |
| 11657 | 5, |
| 11658 | 6, |
| 11659 | 7, |
| 11660 | 8, |
| 11661 | 9, |
| 11662 | 10, |
| 11663 | 11, |
| 11664 | 12, |
| 11665 | 13, |
| 11666 | 14, |
| 11667 | 15, |
| 11668 | 0, |
| 11669 | 1, |
| 11670 | 2, |
| 11671 | 3, |
| 11672 | 0, |
| 11673 | 65535, |
| 11674 | 65535, |
| 11675 | 65535, |
| 11676 | 65535, |
| 11677 | 65535, |
| 11678 | 65535, |
| 11679 | 65535, |
| 11680 | 65535, |
| 11681 | 65535, |
| 11682 | 65535, |
| 11683 | 65535, |
| 11684 | 65535, |
| 11685 | 65535, |
| 11686 | 65535, |
| 11687 | 65535, |
| 11688 | 65535, |
| 11689 | 65535, |
| 11690 | 65535, |
| 11691 | 65535, |
| 11692 | 65535, |
| 11693 | 65535, |
| 11694 | 65535, |
| 11695 | 65535, |
| 11696 | 65535, |
| 11697 | 65535, |
| 11698 | 65535, |
| 11699 | 65535, |
| 11700 | 65535, |
| 11701 | 65535, |
| 11702 | 65535, |
| 11703 | 65535, |
| 11704 | 65535, |
| 11705 | 65535, |
| 11706 | 65535, |
| 11707 | 65535, |
| 11708 | 65535, |
| 11709 | 65535, |
| 11710 | 65535, |
| 11711 | 65535, |
| 11712 | 65535, |
| 11713 | 65535, |
| 11714 | 65535, |
| 11715 | 65535, |
| 11716 | 65535, |
| 11717 | 65535, |
| 11718 | 65535, |
| 11719 | 65535, |
| 11720 | 65535, |
| 11721 | 65535, |
| 11722 | 65535, |
| 11723 | 65535, |
| 11724 | 65535, |
| 11725 | 65535, |
| 11726 | 65535, |
| 11727 | 65535, |
| 11728 | 65535, |
| 11729 | 65535, |
| 11730 | 65535, |
| 11731 | 65535, |
| 11732 | 65535, |
| 11733 | 65535, |
| 11734 | 65535, |
| 11735 | 65535, |
| 11736 | 65535, |
| 11737 | 65535, |
| 11738 | 65535, |
| 11739 | 65535, |
| 11740 | 65535, |
| 11741 | 65535, |
| 11742 | 65535, |
| 11743 | 65535, |
| 11744 | 65535, |
| 11745 | 65535, |
| 11746 | 65535, |
| 11747 | 65535, |
| 11748 | 65535, |
| 11749 | 65535, |
| 11750 | 65535, |
| 11751 | 65535, |
| 11752 | 65535, |
| 11753 | 65535, |
| 11754 | 65535, |
| 11755 | 65535, |
| 11756 | 65535, |
| 11757 | 65535, |
| 11758 | 65535, |
| 11759 | 65535, |
| 11760 | 65535, |
| 11761 | 65535, |
| 11762 | 65535, |
| 11763 | 65535, |
| 11764 | 65535, |
| 11765 | 65535, |
| 11766 | 65535, |
| 11767 | 65535, |
| 11768 | 65535, |
| 11769 | 65535, |
| 11770 | 65535, |
| 11771 | 65535, |
| 11772 | 65535, |
| 11773 | 65535, |
| 11774 | 65535, |
| 11775 | 65535, |
| 11776 | 65535, |
| 11777 | 65535, |
| 11778 | 65535, |
| 11779 | 65535, |
| 11780 | 65535, |
| 11781 | 65535, |
| 11782 | 65535, |
| 11783 | 65535, |
| 11784 | 65535, |
| 11785 | 65535, |
| 11786 | 65535, |
| 11787 | 65535, |
| 11788 | 65535, |
| 11789 | 65535, |
| 11790 | 65535, |
| 11791 | 65535, |
| 11792 | 65535, |
| 11793 | 65535, |
| 11794 | 65535, |
| 11795 | 65535, |
| 11796 | 65535, |
| 11797 | 65535, |
| 11798 | 65535, |
| 11799 | 65535, |
| 11800 | 65535, |
| 11801 | 65535, |
| 11802 | 65535, |
| 11803 | 65535, |
| 11804 | 65535, |
| 11805 | 65535, |
| 11806 | 65535, |
| 11807 | 65535, |
| 11808 | 65535, |
| 11809 | 65535, |
| 11810 | 65535, |
| 11811 | 65535, |
| 11812 | 65535, |
| 11813 | 65535, |
| 11814 | 65535, |
| 11815 | 65535, |
| 11816 | 65535, |
| 11817 | 65535, |
| 11818 | 65535, |
| 11819 | 65535, |
| 11820 | 65535, |
| 11821 | 65535, |
| 11822 | 65535, |
| 11823 | 65535, |
| 11824 | 65535, |
| 11825 | 65535, |
| 11826 | 65535, |
| 11827 | 65535, |
| 11828 | 65535, |
| 11829 | 65535, |
| 11830 | 65535, |
| 11831 | 65535, |
| 11832 | 65535, |
| 11833 | 65535, |
| 11834 | 65535, |
| 11835 | 65535, |
| 11836 | 65535, |
| 11837 | 65535, |
| 11838 | 65535, |
| 11839 | 65535, |
| 11840 | 65535, |
| 11841 | 65535, |
| 11842 | 65535, |
| 11843 | 65535, |
| 11844 | 65535, |
| 11845 | 65535, |
| 11846 | 65535, |
| 11847 | 65535, |
| 11848 | 65535, |
| 11849 | 65535, |
| 11850 | 65535, |
| 11851 | 65535, |
| 11852 | 65535, |
| 11853 | 65535, |
| 11854 | 65535, |
| 11855 | 65535, |
| 11856 | 65535, |
| 11857 | 65535, |
| 11858 | 65535, |
| 11859 | 65535, |
| 11860 | 65535, |
| 11861 | 65535, |
| 11862 | 65535, |
| 11863 | 65535, |
| 11864 | 0, |
| 11865 | 1, |
| 11866 | 2, |
| 11867 | 3, |
| 11868 | 4, |
| 11869 | 5, |
| 11870 | 6, |
| 11871 | 7, |
| 11872 | 8, |
| 11873 | 9, |
| 11874 | 10, |
| 11875 | 11, |
| 11876 | 12, |
| 11877 | 13, |
| 11878 | 14, |
| 11879 | 15, |
| 11880 | 16, |
| 11881 | 17, |
| 11882 | 18, |
| 11883 | 19, |
| 11884 | 20, |
| 11885 | 21, |
| 11886 | 22, |
| 11887 | 23, |
| 11888 | 24, |
| 11889 | 25, |
| 11890 | 26, |
| 11891 | 27, |
| 11892 | 28, |
| 11893 | 29, |
| 11894 | 30, |
| 11895 | 31, |
| 11896 | 0, |
| 11897 | 1, |
| 11898 | 2, |
| 11899 | 3, |
| 11900 | 4, |
| 11901 | 5, |
| 11902 | 6, |
| 11903 | 7, |
| 11904 | 8, |
| 11905 | 9, |
| 11906 | 10, |
| 11907 | 11, |
| 11908 | 12, |
| 11909 | 13, |
| 11910 | 14, |
| 11911 | 15, |
| 11912 | 16, |
| 11913 | 17, |
| 11914 | 18, |
| 11915 | 19, |
| 11916 | 20, |
| 11917 | 21, |
| 11918 | 22, |
| 11919 | 23, |
| 11920 | 24, |
| 11921 | 25, |
| 11922 | 26, |
| 11923 | 27, |
| 11924 | 28, |
| 11925 | 29, |
| 11926 | 30, |
| 11927 | 31, |
| 11928 | 0, |
| 11929 | 1, |
| 11930 | 2, |
| 11931 | 3, |
| 11932 | 4, |
| 11933 | 5, |
| 11934 | 6, |
| 11935 | 7, |
| 11936 | 8, |
| 11937 | 9, |
| 11938 | 10, |
| 11939 | 11, |
| 11940 | 12, |
| 11941 | 13, |
| 11942 | 14, |
| 11943 | 15, |
| 11944 | 16, |
| 11945 | 17, |
| 11946 | 18, |
| 11947 | 19, |
| 11948 | 20, |
| 11949 | 21, |
| 11950 | 22, |
| 11951 | 23, |
| 11952 | 24, |
| 11953 | 25, |
| 11954 | 26, |
| 11955 | 27, |
| 11956 | 28, |
| 11957 | 29, |
| 11958 | 30, |
| 11959 | 31, |
| 11960 | 0, |
| 11961 | 1, |
| 11962 | 2, |
| 11963 | 3, |
| 11964 | 4, |
| 11965 | 5, |
| 11966 | 6, |
| 11967 | 7, |
| 11968 | 8, |
| 11969 | 9, |
| 11970 | 10, |
| 11971 | 11, |
| 11972 | 12, |
| 11973 | 13, |
| 11974 | 14, |
| 11975 | 15, |
| 11976 | 0, |
| 11977 | 1, |
| 11978 | 2, |
| 11979 | 3, |
| 11980 | 4, |
| 11981 | 5, |
| 11982 | 6, |
| 11983 | 7, |
| 11984 | 8, |
| 11985 | 9, |
| 11986 | 10, |
| 11987 | 11, |
| 11988 | 12, |
| 11989 | 13, |
| 11990 | 14, |
| 11991 | 15, |
| 11992 | 16, |
| 11993 | 17, |
| 11994 | 18, |
| 11995 | 19, |
| 11996 | 20, |
| 11997 | 21, |
| 11998 | 22, |
| 11999 | 23, |
| 12000 | 24, |
| 12001 | 25, |
| 12002 | 26, |
| 12003 | 27, |
| 12004 | 28, |
| 12005 | 29, |
| 12006 | 30, |
| 12007 | 31, |
| 12008 | 0, |
| 12009 | 1, |
| 12010 | 2, |
| 12011 | 3, |
| 12012 | 4, |
| 12013 | 5, |
| 12014 | 6, |
| 12015 | 7, |
| 12016 | 8, |
| 12017 | 9, |
| 12018 | 10, |
| 12019 | 11, |
| 12020 | 12, |
| 12021 | 13, |
| 12022 | 14, |
| 12023 | 15, |
| 12024 | 16, |
| 12025 | 17, |
| 12026 | 18, |
| 12027 | 19, |
| 12028 | 20, |
| 12029 | 21, |
| 12030 | 22, |
| 12031 | 23, |
| 12032 | 24, |
| 12033 | 25, |
| 12034 | 26, |
| 12035 | 27, |
| 12036 | 28, |
| 12037 | 29, |
| 12038 | 30, |
| 12039 | 31, |
| 12040 | 0, |
| 12041 | 1, |
| 12042 | 2, |
| 12043 | 3, |
| 12044 | 4, |
| 12045 | 5, |
| 12046 | 6, |
| 12047 | 7, |
| 12048 | 8, |
| 12049 | 9, |
| 12050 | 10, |
| 12051 | 11, |
| 12052 | 12, |
| 12053 | 13, |
| 12054 | 14, |
| 12055 | 15, |
| 12056 | 16, |
| 12057 | 17, |
| 12058 | 18, |
| 12059 | 19, |
| 12060 | 20, |
| 12061 | 21, |
| 12062 | 22, |
| 12063 | 23, |
| 12064 | 24, |
| 12065 | 25, |
| 12066 | 26, |
| 12067 | 27, |
| 12068 | 28, |
| 12069 | 29, |
| 12070 | 30, |
| 12071 | 31, |
| 12072 | 22, |
| 12073 | 0, |
| 12074 | 2, |
| 12075 | 4, |
| 12076 | 6, |
| 12077 | 8, |
| 12078 | 10, |
| 12079 | 12, |
| 12080 | 14, |
| 12081 | 16, |
| 12082 | 18, |
| 12083 | 20, |
| 12084 | 30, |
| 12085 | 0, |
| 12086 | 2, |
| 12087 | 4, |
| 12088 | 6, |
| 12089 | 8, |
| 12090 | 10, |
| 12091 | 12, |
| 12092 | 14, |
| 12093 | 16, |
| 12094 | 18, |
| 12095 | 20, |
| 12096 | 22, |
| 12097 | 24, |
| 12098 | 26, |
| 12099 | 28, |
| 12100 | 30, |
| 12101 | 28, |
| 12102 | 0, |
| 12103 | 2, |
| 12104 | 4, |
| 12105 | 6, |
| 12106 | 8, |
| 12107 | 10, |
| 12108 | 12, |
| 12109 | 14, |
| 12110 | 16, |
| 12111 | 18, |
| 12112 | 20, |
| 12113 | 22, |
| 12114 | 24, |
| 12115 | 26, |
| 12116 | 0, |
| 12117 | 1, |
| 12118 | 2, |
| 12119 | 3, |
| 12120 | 4, |
| 12121 | 5, |
| 12122 | 6, |
| 12123 | 7, |
| 12124 | 8, |
| 12125 | 9, |
| 12126 | 10, |
| 12127 | 11, |
| 12128 | 12, |
| 12129 | 13, |
| 12130 | 14, |
| 12131 | 15, |
| 12132 | 16, |
| 12133 | 17, |
| 12134 | 18, |
| 12135 | 19, |
| 12136 | 20, |
| 12137 | 21, |
| 12138 | 22, |
| 12139 | 23, |
| 12140 | 24, |
| 12141 | 25, |
| 12142 | 26, |
| 12143 | 27, |
| 12144 | 28, |
| 12145 | 29, |
| 12146 | 30, |
| 12147 | 31, |
| 12148 | 0, |
| 12149 | 1, |
| 12150 | 2, |
| 12151 | 3, |
| 12152 | 4, |
| 12153 | 5, |
| 12154 | 6, |
| 12155 | 7, |
| 12156 | 8, |
| 12157 | 9, |
| 12158 | 10, |
| 12159 | 11, |
| 12160 | 12, |
| 12161 | 13, |
| 12162 | 14, |
| 12163 | 15, |
| 12164 | 16, |
| 12165 | 17, |
| 12166 | 18, |
| 12167 | 19, |
| 12168 | 20, |
| 12169 | 21, |
| 12170 | 22, |
| 12171 | 23, |
| 12172 | 24, |
| 12173 | 25, |
| 12174 | 26, |
| 12175 | 27, |
| 12176 | 28, |
| 12177 | 29, |
| 12178 | 30, |
| 12179 | 31, |
| 12180 | 0, |
| 12181 | 1, |
| 12182 | 2, |
| 12183 | 3, |
| 12184 | 4, |
| 12185 | 5, |
| 12186 | 6, |
| 12187 | 7, |
| 12188 | 8, |
| 12189 | 9, |
| 12190 | 10, |
| 12191 | 11, |
| 12192 | 12, |
| 12193 | 13, |
| 12194 | 14, |
| 12195 | 15, |
| 12196 | 16, |
| 12197 | 17, |
| 12198 | 18, |
| 12199 | 19, |
| 12200 | 20, |
| 12201 | 21, |
| 12202 | 22, |
| 12203 | 23, |
| 12204 | 24, |
| 12205 | 25, |
| 12206 | 26, |
| 12207 | 27, |
| 12208 | 28, |
| 12209 | 29, |
| 12210 | 30, |
| 12211 | 31, |
| 12212 | 16, |
| 12213 | 17, |
| 12214 | 18, |
| 12215 | 19, |
| 12216 | 20, |
| 12217 | 21, |
| 12218 | 22, |
| 12219 | 23, |
| 12220 | 0, |
| 12221 | 1, |
| 12222 | 2, |
| 12223 | 3, |
| 12224 | 4, |
| 12225 | 5, |
| 12226 | 6, |
| 12227 | 7, |
| 12228 | 16, |
| 12229 | 17, |
| 12230 | 18, |
| 12231 | 19, |
| 12232 | 0, |
| 12233 | 1, |
| 12234 | 2, |
| 12235 | 3, |
| 12236 | }; |
| 12237 | static inline void InitAArch64MCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { |
| 12238 | RI->InitMCRegisterInfo(AArch64RegDesc, 895, RA, PC, AArch64MCRegisterClasses, 530, AArch64RegUnitRoots, 297, AArch64RegDiffLists, AArch64LaneMaskLists, AArch64RegStrings, AArch64RegClassStrings, AArch64SubRegIdxLists, 144, |
| 12239 | AArch64RegEncodingTable); |
| 12240 | |
| 12241 | switch (DwarfFlavour) { |
| 12242 | default: |
| 12243 | llvm_unreachable("Unknown DWARF flavour"); |
| 12244 | case 0: |
| 12245 | RI->mapDwarfRegsToLLVMRegs(AArch64DwarfFlavour0Dwarf2L, AArch64DwarfFlavour0Dwarf2LSize, false); |
| 12246 | break; |
| 12247 | } |
| 12248 | switch (EHFlavour) { |
| 12249 | default: |
| 12250 | llvm_unreachable("Unknown DWARF flavour"); |
| 12251 | case 0: |
| 12252 | RI->mapDwarfRegsToLLVMRegs(AArch64EHFlavour0Dwarf2L, AArch64EHFlavour0Dwarf2LSize, true); |
| 12253 | break; |
| 12254 | } |
| 12255 | switch (DwarfFlavour) { |
| 12256 | default: |
| 12257 | llvm_unreachable("Unknown DWARF flavour"); |
| 12258 | case 0: |
| 12259 | RI->mapLLVMRegsToDwarfRegs(AArch64DwarfFlavour0L2Dwarf, AArch64DwarfFlavour0L2DwarfSize, false); |
| 12260 | break; |
| 12261 | } |
| 12262 | switch (EHFlavour) { |
| 12263 | default: |
| 12264 | llvm_unreachable("Unknown DWARF flavour"); |
| 12265 | case 0: |
| 12266 | RI->mapLLVMRegsToDwarfRegs(AArch64EHFlavour0L2Dwarf, AArch64EHFlavour0L2DwarfSize, true); |
| 12267 | break; |
| 12268 | } |
| 12269 | } |
| 12270 | |
| 12271 | } // end namespace llvm |
| 12272 | |
| 12273 | #endif // GET_REGINFO_MC_DESC |
| 12274 | |
| 12275 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 12276 | |* *| |
| 12277 | |* Register Information Header Fragment *| |
| 12278 | |* *| |
| 12279 | |* Automatically generated file, do not edit! *| |
| 12280 | |* *| |
| 12281 | \*===----------------------------------------------------------------------===*/ |
| 12282 | |
| 12283 | |
| 12284 | #ifdef GET_REGINFO_HEADER |
| 12285 | #undef GET_REGINFO_HEADER |
| 12286 | |
| 12287 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 12288 | |
| 12289 | namespace llvm { |
| 12290 | |
| 12291 | class AArch64FrameLowering; |
| 12292 | |
| 12293 | struct AArch64GenRegisterInfo : public TargetRegisterInfo { |
| 12294 | explicit AArch64GenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 12295 | unsigned PC = 0, unsigned HwMode = 0); |
| 12296 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 12297 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 12298 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 12299 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 12300 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 12301 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 12302 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 12303 | unsigned getRegUnitWeight(unsigned RegUnit) const override; |
| 12304 | unsigned getNumRegPressureSets() const override; |
| 12305 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 12306 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 12307 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 12308 | const int *getRegUnitPressureSets(unsigned RegUnit) const override; |
| 12309 | ArrayRef<const char *> getRegMaskNames() const override; |
| 12310 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 12311 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 12312 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 12313 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 12314 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 12315 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 12316 | /// Devirtualized TargetFrameLowering. |
| 12317 | static const AArch64FrameLowering *getFrameLowering( |
| 12318 | const MachineFunction &MF); |
| 12319 | }; |
| 12320 | |
| 12321 | namespace AArch64 { // Register classes |
| 12322 | extern const TargetRegisterClass W_HI_DummyRCRegClass; |
| 12323 | extern const TargetRegisterClass B_HI_DummyRCRegClass; |
| 12324 | extern const TargetRegisterClass D_HI_DummyRCRegClass; |
| 12325 | extern const TargetRegisterClass H_HI_DummyRCRegClass; |
| 12326 | extern const TargetRegisterClass Q_HI_DummyRCRegClass; |
| 12327 | extern const TargetRegisterClass S_HI_DummyRCRegClass; |
| 12328 | extern const TargetRegisterClass FPR8RegClass; |
| 12329 | extern const TargetRegisterClass FPR16RegClass; |
| 12330 | extern const TargetRegisterClass PPRorPNRRegClass; |
| 12331 | extern const TargetRegisterClass FPR16_loRegClass; |
| 12332 | extern const TargetRegisterClass PNRRegClass; |
| 12333 | extern const TargetRegisterClass PPRRegClass; |
| 12334 | extern const TargetRegisterClass PNR_3bRegClass; |
| 12335 | extern const TargetRegisterClass PNR_p8to15RegClass; |
| 12336 | extern const TargetRegisterClass PPRMul2RegClass; |
| 12337 | extern const TargetRegisterClass PPR_3bRegClass; |
| 12338 | extern const TargetRegisterClass PPR_p8to15RegClass; |
| 12339 | extern const TargetRegisterClass PPRMul2_and_PPR_3bRegClass; |
| 12340 | extern const TargetRegisterClass PPRMul2_and_PPR_p8to15RegClass; |
| 12341 | extern const TargetRegisterClass PPR2RegClass; |
| 12342 | extern const TargetRegisterClass PPR2Mul2RegClass; |
| 12343 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2RegClass; |
| 12344 | extern const TargetRegisterClass PPR2_with_psub1_in_PPR_3bRegClass; |
| 12345 | extern const TargetRegisterClass PPR2_with_psub1_in_PPR_p8to15RegClass; |
| 12346 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3bRegClass; |
| 12347 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15RegClass; |
| 12348 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass; |
| 12349 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass; |
| 12350 | extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClass; |
| 12351 | extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClass; |
| 12352 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass; |
| 12353 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass; |
| 12354 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClass; |
| 12355 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClass; |
| 12356 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass; |
| 12357 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass; |
| 12358 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass; |
| 12359 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass; |
| 12360 | extern const TargetRegisterClass GPR32allRegClass; |
| 12361 | extern const TargetRegisterClass FPR32RegClass; |
| 12362 | extern const TargetRegisterClass GPR32RegClass; |
| 12363 | extern const TargetRegisterClass GPR32spRegClass; |
| 12364 | extern const TargetRegisterClass GPR32commonRegClass; |
| 12365 | extern const TargetRegisterClass FPR32_with_hsub_in_FPR16_loRegClass; |
| 12366 | extern const TargetRegisterClass GPR32argRegClass; |
| 12367 | extern const TargetRegisterClass MatrixIndexGPR32_12_15RegClass; |
| 12368 | extern const TargetRegisterClass MatrixIndexGPR32_8_11RegClass; |
| 12369 | extern const TargetRegisterClass CCRRegClass; |
| 12370 | extern const TargetRegisterClass GPR32sponlyRegClass; |
| 12371 | extern const TargetRegisterClass WSeqPairsClassRegClass; |
| 12372 | extern const TargetRegisterClass WSeqPairsClass_with_subo32_in_GPR32commonRegClass; |
| 12373 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_GPR32argRegClass; |
| 12374 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass; |
| 12375 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass; |
| 12376 | extern const TargetRegisterClass GPR64allRegClass; |
| 12377 | extern const TargetRegisterClass FPR64RegClass; |
| 12378 | extern const TargetRegisterClass GPR64RegClass; |
| 12379 | extern const TargetRegisterClass GPR64spRegClass; |
| 12380 | extern const TargetRegisterClass GPR64commonRegClass; |
| 12381 | extern const TargetRegisterClass GPR64noipRegClass; |
| 12382 | extern const TargetRegisterClass GPR64common_and_GPR64noipRegClass; |
| 12383 | extern const TargetRegisterClass tcGPR64RegClass; |
| 12384 | extern const TargetRegisterClass tcGPRnotx16RegClass; |
| 12385 | extern const TargetRegisterClass tcGPRnotx16x17RegClass; |
| 12386 | extern const TargetRegisterClass FPR64_loRegClass; |
| 12387 | extern const TargetRegisterClass GPR64argRegClass; |
| 12388 | extern const TargetRegisterClass FIXED_REGSRegClass; |
| 12389 | extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; |
| 12390 | extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12391 | extern const TargetRegisterClass FIXED_REGS_with_sub_32RegClass; |
| 12392 | extern const TargetRegisterClass tcGPRx16x17RegClass; |
| 12393 | extern const TargetRegisterClass FIXED_REGS_and_GPR64RegClass; |
| 12394 | extern const TargetRegisterClass GPR64sponlyRegClass; |
| 12395 | extern const TargetRegisterClass tcGPRx17RegClass; |
| 12396 | extern const TargetRegisterClass DDRegClass; |
| 12397 | extern const TargetRegisterClass DD_with_dsub0_in_FPR64_loRegClass; |
| 12398 | extern const TargetRegisterClass DD_with_dsub1_in_FPR64_loRegClass; |
| 12399 | extern const TargetRegisterClass XSeqPairsClassRegClass; |
| 12400 | extern const TargetRegisterClass DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass; |
| 12401 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64commonRegClass; |
| 12402 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noipRegClass; |
| 12403 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noipRegClass; |
| 12404 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPR64RegClass; |
| 12405 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClass; |
| 12406 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPR64RegClass; |
| 12407 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClass; |
| 12408 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64argRegClass; |
| 12409 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; |
| 12410 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12411 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClass; |
| 12412 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass; |
| 12413 | extern const TargetRegisterClass FPR128RegClass; |
| 12414 | extern const TargetRegisterClass ZPRRegClass; |
| 12415 | extern const TargetRegisterClass FPR128_loRegClass; |
| 12416 | extern const TargetRegisterClass MPR128RegClass; |
| 12417 | extern const TargetRegisterClass ZPRMul2RegClass; |
| 12418 | extern const TargetRegisterClass ZPR_4bRegClass; |
| 12419 | extern const TargetRegisterClass FPR128_0to7RegClass; |
| 12420 | extern const TargetRegisterClass ZPRMul2_HiRegClass; |
| 12421 | extern const TargetRegisterClass ZPRMul2_LoRegClass; |
| 12422 | extern const TargetRegisterClass ZPRMul4RegClass; |
| 12423 | extern const TargetRegisterClass ZPR_3bRegClass; |
| 12424 | extern const TargetRegisterClass ZPR_KRegClass; |
| 12425 | extern const TargetRegisterClass ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12426 | extern const TargetRegisterClass ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12427 | extern const TargetRegisterClass ZPRMul2_and_ZPR_3bRegClass; |
| 12428 | extern const TargetRegisterClass ZPRMul2_and_ZPR_KRegClass; |
| 12429 | extern const TargetRegisterClass ZPRMul4_and_ZPR_3bRegClass; |
| 12430 | extern const TargetRegisterClass ZPRMul4_and_ZPR_KRegClass; |
| 12431 | extern const TargetRegisterClass DDDRegClass; |
| 12432 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_loRegClass; |
| 12433 | extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_loRegClass; |
| 12434 | extern const TargetRegisterClass DDD_with_dsub2_in_FPR64_loRegClass; |
| 12435 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass; |
| 12436 | extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass; |
| 12437 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass; |
| 12438 | extern const TargetRegisterClass DDDDRegClass; |
| 12439 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_loRegClass; |
| 12440 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_loRegClass; |
| 12441 | extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_loRegClass; |
| 12442 | extern const TargetRegisterClass DDDD_with_dsub3_in_FPR64_loRegClass; |
| 12443 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass; |
| 12444 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass; |
| 12445 | extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; |
| 12446 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass; |
| 12447 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; |
| 12448 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; |
| 12449 | extern const TargetRegisterClass QQRegClass; |
| 12450 | extern const TargetRegisterClass ZPR2RegClass; |
| 12451 | extern const TargetRegisterClass ZPR2StridedOrContiguousRegClass; |
| 12452 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass; |
| 12453 | extern const TargetRegisterClass QQ_with_dsub1_in_FPR64_loRegClass; |
| 12454 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_loRegClass; |
| 12455 | extern const TargetRegisterClass ZPR2Mul2RegClass; |
| 12456 | extern const TargetRegisterClass ZPR2StridedRegClass; |
| 12457 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClass; |
| 12458 | extern const TargetRegisterClass ZPR2_with_dsub1_in_FPR64_loRegClass; |
| 12459 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2RegClass; |
| 12460 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_loRegClass; |
| 12461 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClass; |
| 12462 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClass; |
| 12463 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass; |
| 12464 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass; |
| 12465 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass; |
| 12466 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass; |
| 12467 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_0to7RegClass; |
| 12468 | extern const TargetRegisterClass QQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12469 | extern const TargetRegisterClass ZPR2Mul2_HiRegClass; |
| 12470 | extern const TargetRegisterClass ZPR2Mul2_LoRegClass; |
| 12471 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12472 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClass; |
| 12473 | extern const TargetRegisterClass ZPR2Strided_with_dsub_in_FPR64_loRegClass; |
| 12474 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2RegClass; |
| 12475 | extern const TargetRegisterClass ZPR2_with_qsub1_in_FPR128_0to7RegClass; |
| 12476 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12477 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12478 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12479 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12480 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12481 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_KRegClass; |
| 12482 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12483 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClass; |
| 12484 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12485 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClass; |
| 12486 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12487 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12488 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12489 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass; |
| 12490 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClass; |
| 12491 | extern const TargetRegisterClass ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12492 | extern const TargetRegisterClass ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12493 | extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12494 | extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12495 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12496 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClass; |
| 12497 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClass; |
| 12498 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul4RegClass; |
| 12499 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPR_KRegClass; |
| 12500 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass; |
| 12501 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12502 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12503 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12504 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass; |
| 12505 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClass; |
| 12506 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12507 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass; |
| 12508 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12509 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12510 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12511 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12512 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12513 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass; |
| 12514 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12515 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass; |
| 12516 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass; |
| 12517 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12518 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12519 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass; |
| 12520 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12521 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass; |
| 12522 | extern const TargetRegisterClass ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12523 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12524 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12525 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12526 | extern const TargetRegisterClass MPR64RegClass; |
| 12527 | extern const TargetRegisterClass QQQRegClass; |
| 12528 | extern const TargetRegisterClass ZPR3RegClass; |
| 12529 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_loRegClass; |
| 12530 | extern const TargetRegisterClass QQQ_with_dsub2_in_FPR64_loRegClass; |
| 12531 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_loRegClass; |
| 12532 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_loRegClass; |
| 12533 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_loRegClass; |
| 12534 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; |
| 12535 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2RegClass; |
| 12536 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_loRegClass; |
| 12537 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass; |
| 12538 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClass; |
| 12539 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass; |
| 12540 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClass; |
| 12541 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass; |
| 12542 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass; |
| 12543 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7RegClass; |
| 12544 | extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12545 | extern const TargetRegisterClass QQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12546 | extern const TargetRegisterClass ZPR3_with_qsub1_in_FPR128_0to7RegClass; |
| 12547 | extern const TargetRegisterClass ZPR3_with_qsub2_in_FPR128_0to7RegClass; |
| 12548 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4RegClass; |
| 12549 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_KRegClass; |
| 12550 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass; |
| 12551 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass; |
| 12552 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12553 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12554 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4RegClass; |
| 12555 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_KRegClass; |
| 12556 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12557 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_LoRegClass; |
| 12558 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12559 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_KRegClass; |
| 12560 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7RegClass; |
| 12561 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClass; |
| 12562 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12563 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12564 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass; |
| 12565 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12566 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass; |
| 12567 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12568 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClass; |
| 12569 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12570 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClass; |
| 12571 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass; |
| 12572 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass; |
| 12573 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClass; |
| 12574 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass; |
| 12575 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12576 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12577 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12578 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12579 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12580 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12581 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12582 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12583 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12584 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12585 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12586 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12587 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClass; |
| 12588 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClass; |
| 12589 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClass; |
| 12590 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12591 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12592 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12593 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12594 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12595 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12596 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12597 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12598 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass; |
| 12599 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12600 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass; |
| 12601 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClass; |
| 12602 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12603 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12604 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12605 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass; |
| 12606 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12607 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass; |
| 12608 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClass; |
| 12609 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12610 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass; |
| 12611 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass; |
| 12612 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12613 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12614 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12615 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12616 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12617 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12618 | extern const TargetRegisterClass QQQQRegClass; |
| 12619 | extern const TargetRegisterClass ZPR4RegClass; |
| 12620 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_loRegClass; |
| 12621 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_loRegClass; |
| 12622 | extern const TargetRegisterClass QQQQ_with_dsub3_in_FPR64_loRegClass; |
| 12623 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_loRegClass; |
| 12624 | extern const TargetRegisterClass ZPR4StridedOrContiguousRegClass; |
| 12625 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_loRegClass; |
| 12626 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_loRegClass; |
| 12627 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_loRegClass; |
| 12628 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass; |
| 12629 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2RegClass; |
| 12630 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_loRegClass; |
| 12631 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass; |
| 12632 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass; |
| 12633 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClass; |
| 12634 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass; |
| 12635 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass; |
| 12636 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClass; |
| 12637 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass; |
| 12638 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass; |
| 12639 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass; |
| 12640 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass; |
| 12641 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass; |
| 12642 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass; |
| 12643 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass; |
| 12644 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass; |
| 12645 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7RegClass; |
| 12646 | extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12647 | extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12648 | extern const TargetRegisterClass QQQQ_with_qsub3_in_FPR128_0to7RegClass; |
| 12649 | extern const TargetRegisterClass ZPR4Mul4RegClass; |
| 12650 | extern const TargetRegisterClass ZPR4StridedRegClass; |
| 12651 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClass; |
| 12652 | extern const TargetRegisterClass ZPR4_with_qsub1_in_FPR128_0to7RegClass; |
| 12653 | extern const TargetRegisterClass ZPR4_with_qsub2_in_FPR128_0to7RegClass; |
| 12654 | extern const TargetRegisterClass ZPR4_with_qsub3_in_FPR128_0to7RegClass; |
| 12655 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_KRegClass; |
| 12656 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass; |
| 12657 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass; |
| 12658 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12659 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12660 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4RegClass; |
| 12661 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_KRegClass; |
| 12662 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12663 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul2_LoRegClass; |
| 12664 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4RegClass; |
| 12665 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_KRegClass; |
| 12666 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_HiRegClass; |
| 12667 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_LoRegClass; |
| 12668 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4RegClass; |
| 12669 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_KRegClass; |
| 12670 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7RegClass; |
| 12671 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClass; |
| 12672 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12673 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass; |
| 12674 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClass; |
| 12675 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass; |
| 12676 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass; |
| 12677 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass; |
| 12678 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12679 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12680 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClass; |
| 12681 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClass; |
| 12682 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClass; |
| 12683 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass; |
| 12684 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass; |
| 12685 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass; |
| 12686 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass; |
| 12687 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass; |
| 12688 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass; |
| 12689 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass; |
| 12690 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClass; |
| 12691 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass; |
| 12692 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass; |
| 12693 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass; |
| 12694 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass; |
| 12695 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass; |
| 12696 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12697 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12698 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass; |
| 12699 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass; |
| 12700 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12701 | extern const TargetRegisterClass ZPR4Strided_with_dsub_in_FPR64_loRegClass; |
| 12702 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2RegClass; |
| 12703 | extern const TargetRegisterClass ZPR4Strided_with_zsub1_in_ZPR_KRegClass; |
| 12704 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClass; |
| 12705 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass; |
| 12706 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12707 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12708 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12709 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12710 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12711 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12712 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12713 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12714 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12715 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass; |
| 12716 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass; |
| 12717 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12718 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12719 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12720 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12721 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12722 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12723 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12724 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClass; |
| 12725 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClass; |
| 12726 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClass; |
| 12727 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClass; |
| 12728 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClass; |
| 12729 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass; |
| 12730 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12731 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12732 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass; |
| 12733 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12734 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12735 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12736 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12737 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12738 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12739 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass; |
| 12740 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12741 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12742 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12743 | extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClass; |
| 12744 | extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClass; |
| 12745 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClass; |
| 12746 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClass; |
| 12747 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul4RegClass; |
| 12748 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass; |
| 12749 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClass; |
| 12750 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass; |
| 12751 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass; |
| 12752 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClass; |
| 12753 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass; |
| 12754 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass; |
| 12755 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12756 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass; |
| 12757 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12758 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass; |
| 12759 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12760 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClass; |
| 12761 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClass; |
| 12762 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClass; |
| 12763 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass; |
| 12764 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClass; |
| 12765 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass; |
| 12766 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12767 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass; |
| 12768 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass; |
| 12769 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass; |
| 12770 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12771 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass; |
| 12772 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12773 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12774 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12775 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12776 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass; |
| 12777 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass; |
| 12778 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClass; |
| 12779 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass; |
| 12780 | extern const TargetRegisterClass GPR64x8ClassRegClass; |
| 12781 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass; |
| 12782 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; |
| 12783 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12784 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12785 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; |
| 12786 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12787 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12788 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass; |
| 12789 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12790 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12791 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12792 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; |
| 12793 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12794 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12795 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClass; |
| 12796 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass; |
| 12797 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12798 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12799 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12800 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12801 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; |
| 12802 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12803 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12804 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12805 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12806 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClass; |
| 12807 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12808 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12809 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClass; |
| 12810 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12811 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12812 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12813 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12814 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12815 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; |
| 12816 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12817 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClass; |
| 12818 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12819 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12820 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12821 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClass; |
| 12822 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12823 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12824 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; |
| 12825 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClass; |
| 12826 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClass; |
| 12827 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClass; |
| 12828 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32argRegClass; |
| 12829 | extern const TargetRegisterClass MPR32RegClass; |
| 12830 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64argRegClass; |
| 12831 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; |
| 12832 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12833 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; |
| 12834 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12835 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12836 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64argRegClass; |
| 12837 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12838 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12839 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12840 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClass; |
| 12841 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12842 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClass; |
| 12843 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; |
| 12844 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClass; |
| 12845 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64argRegClass; |
| 12846 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClass; |
| 12847 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass; |
| 12848 | extern const TargetRegisterClass ZTRRegClass; |
| 12849 | extern const TargetRegisterClass MPR16RegClass; |
| 12850 | extern const TargetRegisterClass MPRRegClass; |
| 12851 | extern const TargetRegisterClass MPR8RegClass; |
| 12852 | } // end namespace AArch64 |
| 12853 | |
| 12854 | } // end namespace llvm |
| 12855 | |
| 12856 | #endif // GET_REGINFO_HEADER |
| 12857 | |
| 12858 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 12859 | |* *| |
| 12860 | |* Target Register and Register Classes Information *| |
| 12861 | |* *| |
| 12862 | |* Automatically generated file, do not edit! *| |
| 12863 | |* *| |
| 12864 | \*===----------------------------------------------------------------------===*/ |
| 12865 | |
| 12866 | |
| 12867 | #ifdef GET_REGINFO_TARGET_DESC |
| 12868 | #undef GET_REGINFO_TARGET_DESC |
| 12869 | |
| 12870 | namespace llvm { |
| 12871 | |
| 12872 | extern const MCRegisterClass AArch64MCRegisterClasses[]; |
| 12873 | |
| 12874 | static const MVT::SimpleValueType VTLists[] = { |
| 12875 | /* 0 */ MVT::f16, MVT::bf16, MVT::i16, MVT::Other, |
| 12876 | /* 4 */ MVT::f32, MVT::i32, MVT::Other, |
| 12877 | /* 7 */ MVT::i64, MVT::Other, |
| 12878 | /* 9 */ MVT::f16, MVT::Other, |
| 12879 | /* 11 */ MVT::f64, MVT::i64, MVT::v2f32, MVT::v1f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v4f16, MVT::v4bf16, MVT::Other, |
| 12880 | /* 22 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::v8f16, MVT::v8bf16, MVT::Other, |
| 12881 | /* 32 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::v8bf16, MVT::Other, |
| 12882 | /* 41 */ MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v4f16, MVT::v4bf16, MVT::v2f32, MVT::v1f64, MVT::Other, |
| 12883 | /* 50 */ MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::nxv1i1, MVT::Other, |
| 12884 | /* 56 */ MVT::nxv16i8, MVT::Other, |
| 12885 | /* 58 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv2bf16, MVT::nxv4bf16, MVT::nxv8bf16, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv2f64, MVT::Other, |
| 12886 | /* 72 */ MVT::Untyped, MVT::Other, |
| 12887 | /* 74 */ MVT::i64x8, MVT::Other, |
| 12888 | /* 76 */ MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::nxv1i1, MVT::aarch64svcount, MVT::Other, |
| 12889 | /* 83 */ MVT::i8, MVT::aarch64mfp8, MVT::Other, |
| 12890 | }; |
| 12891 | |
| 12892 | static const char *SubRegIndexNameTable[] = { "bsub", "bsub_hi", "dsub", "dsub0", "dsub1", "dsub2", "dsub3", "dsub_hi", "hsub", "hsub_hi", "psub", "psub0", "psub1", "qsub0", "qsub1", "qsub2", "qsub3", "ssub", "ssub_hi", "sub_32", "sub_32_hi", "sube32", "sube64", "subo32", "subo64", "x8sub_0", "x8sub_1", "x8sub_2", "x8sub_3", "x8sub_4", "x8sub_5", "x8sub_6", "x8sub_7", "zasubb", "zasubd0", "zasubd1", "zasubh0", "zasubh1", "zasubq0", "zasubq1", "zasubs0", "zasubs1", "zsub", "zsub0", "zsub1", "zsub2", "zsub3", "zsub_hi", "zasubd1_then_zasubq0", "zasubd1_then_zasubq1", "zasubs1_then_zasubd0", "zasubs1_then_zasubd1", "zasubs1_then_zasubq0", "zasubs1_then_zasubq1", "zasubs1_then_zasubd1_then_zasubq0", "zasubs1_then_zasubd1_then_zasubq1", "zasubh1_then_zasubd0", "zasubh1_then_zasubd1", "zasubh1_then_zasubq0", "zasubh1_then_zasubq1", "zasubh1_then_zasubs0", "zasubh1_then_zasubs1", "zasubh1_then_zasubd1_then_zasubq0", "zasubh1_then_zasubd1_then_zasubq1", "zasubh1_then_zasubs1_then_zasubd0", "zasubh1_then_zasubs1_then_zasubd1", "zasubh1_then_zasubs1_then_zasubq0", "zasubh1_then_zasubs1_then_zasubq1", "zasubh1_then_zasubs1_then_zasubd1_then_zasubq0", "zasubh1_then_zasubs1_then_zasubd1_then_zasubq1", "dsub1_then_bsub", "dsub1_then_bsub_hi", "dsub1_then_hsub", "dsub1_then_hsub_hi", "dsub1_then_ssub", "dsub1_then_ssub_hi", "dsub3_then_bsub", "dsub3_then_bsub_hi", "dsub3_then_hsub", "dsub3_then_hsub_hi", "dsub3_then_ssub", "dsub3_then_ssub_hi", "dsub2_then_bsub", "dsub2_then_bsub_hi", "dsub2_then_hsub", "dsub2_then_hsub_hi", "dsub2_then_ssub", "dsub2_then_ssub_hi", "psub1_then_psub", "qsub1_then_dsub_hi", "qsub3_then_dsub_hi", "qsub2_then_dsub_hi", "x8sub_7_then_sub_32", "x8sub_7_then_sub_32_hi", "x8sub_6_then_sub_32", "x8sub_6_then_sub_32_hi", "x8sub_5_then_sub_32", "x8sub_5_then_sub_32_hi", "x8sub_4_then_sub_32", "x8sub_4_then_sub_32_hi", "x8sub_3_then_sub_32", "x8sub_3_then_sub_32_hi", "x8sub_2_then_sub_32", "x8sub_2_then_sub_32_hi", "x8sub_1_then_sub_32", "x8sub_1_then_sub_32_hi", "subo64_then_sub_32", "subo64_then_sub_32_hi", "zsub1_then_zsub_hi", "zsub3_then_zsub_hi", "zsub2_then_zsub_hi", "dsub0_dsub1", "dsub0_dsub1_dsub2", "dsub1_dsub2", "dsub1_dsub2_dsub3", "dsub2_dsub3", "dsub_dsub1", "dsub_dsub1_dsub2_dsub3", "dsub_dsub1_dsub2", "qsub0_qsub1", "qsub0_qsub1_qsub2", "qsub1_qsub2", "qsub1_qsub2_qsub3", "qsub2_qsub3", "sub_32_x8sub_1_then_sub_32", "x8sub_0_x8sub_1", "x8sub_2_x8sub_3", "x8sub_4_x8sub_5", "x8sub_6_x8sub_7", "x8sub_6_then_sub_32_x8sub_7_then_sub_32", "x8sub_4_then_sub_32_x8sub_5_then_sub_32", "x8sub_2_then_sub_32_x8sub_3_then_sub_32", "sub_32_subo64_then_sub_32", "zsub_qsub1", "zsub_qsub1_qsub2_qsub3", "zsub_qsub1_qsub2", "zsub0_zsub1", "zsub0_zsub1_zsub2", "zsub1_zsub2", "zsub1_zsub2_zsub3", "zsub2_zsub3", "zsub0_zsub2", "zsub1_zsub3", ""}; |
| 12893 | |
| 12894 | static const TargetRegisterInfo::SubRegCoveredBits SubRegIdxRangeTable[] = { |
| 12895 | { 65535, 65535 }, |
| 12896 | { 0, 8 }, // bsub |
| 12897 | { 8, 8 }, // bsub_hi |
| 12898 | { 0, 64 }, // dsub |
| 12899 | { 0, 64 }, // dsub0 |
| 12900 | { 0, 64 }, // dsub1 |
| 12901 | { 0, 64 }, // dsub2 |
| 12902 | { 0, 64 }, // dsub3 |
| 12903 | { 64, 64 }, // dsub_hi |
| 12904 | { 0, 16 }, // hsub |
| 12905 | { 16, 16 }, // hsub_hi |
| 12906 | { 0, 65535 }, // psub |
| 12907 | { 0, 65535 }, // psub0 |
| 12908 | { 0, 65535 }, // psub1 |
| 12909 | { 0, 128 }, // qsub0 |
| 12910 | { 0, 128 }, // qsub1 |
| 12911 | { 0, 128 }, // qsub2 |
| 12912 | { 0, 128 }, // qsub3 |
| 12913 | { 0, 32 }, // ssub |
| 12914 | { 32, 32 }, // ssub_hi |
| 12915 | { 0, 32 }, // sub_32 |
| 12916 | { 32, 32 }, // sub_32_hi |
| 12917 | { 0, 32 }, // sube32 |
| 12918 | { 0, 64 }, // sube64 |
| 12919 | { 0, 32 }, // subo32 |
| 12920 | { 0, 64 }, // subo64 |
| 12921 | { 0, 64 }, // x8sub_0 |
| 12922 | { 64, 64 }, // x8sub_1 |
| 12923 | { 128, 64 }, // x8sub_2 |
| 12924 | { 192, 64 }, // x8sub_3 |
| 12925 | { 256, 64 }, // x8sub_4 |
| 12926 | { 320, 64 }, // x8sub_5 |
| 12927 | { 384, 64 }, // x8sub_6 |
| 12928 | { 448, 64 }, // x8sub_7 |
| 12929 | { 0, 2048 }, // zasubb |
| 12930 | { 0, 256 }, // zasubd0 |
| 12931 | { 0, 256 }, // zasubd1 |
| 12932 | { 0, 1024 }, // zasubh0 |
| 12933 | { 0, 1024 }, // zasubh1 |
| 12934 | { 0, 128 }, // zasubq0 |
| 12935 | { 0, 128 }, // zasubq1 |
| 12936 | { 0, 512 }, // zasubs0 |
| 12937 | { 0, 512 }, // zasubs1 |
| 12938 | { 0, 128 }, // zsub |
| 12939 | { 0, 65535 }, // zsub0 |
| 12940 | { 0, 65535 }, // zsub1 |
| 12941 | { 0, 65535 }, // zsub2 |
| 12942 | { 0, 65535 }, // zsub3 |
| 12943 | { 128, 65535 }, // zsub_hi |
| 12944 | { 0, 128 }, // zasubd1_then_zasubq0 |
| 12945 | { 0, 128 }, // zasubd1_then_zasubq1 |
| 12946 | { 0, 256 }, // zasubs1_then_zasubd0 |
| 12947 | { 0, 256 }, // zasubs1_then_zasubd1 |
| 12948 | { 0, 128 }, // zasubs1_then_zasubq0 |
| 12949 | { 0, 128 }, // zasubs1_then_zasubq1 |
| 12950 | { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq0 |
| 12951 | { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq1 |
| 12952 | { 0, 256 }, // zasubh1_then_zasubd0 |
| 12953 | { 0, 256 }, // zasubh1_then_zasubd1 |
| 12954 | { 0, 128 }, // zasubh1_then_zasubq0 |
| 12955 | { 0, 128 }, // zasubh1_then_zasubq1 |
| 12956 | { 0, 512 }, // zasubh1_then_zasubs0 |
| 12957 | { 0, 512 }, // zasubh1_then_zasubs1 |
| 12958 | { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq0 |
| 12959 | { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq1 |
| 12960 | { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd0 |
| 12961 | { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd1 |
| 12962 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq0 |
| 12963 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq1 |
| 12964 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 12965 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 12966 | { 0, 8 }, // dsub1_then_bsub |
| 12967 | { 8, 8 }, // dsub1_then_bsub_hi |
| 12968 | { 0, 16 }, // dsub1_then_hsub |
| 12969 | { 16, 16 }, // dsub1_then_hsub_hi |
| 12970 | { 0, 32 }, // dsub1_then_ssub |
| 12971 | { 32, 32 }, // dsub1_then_ssub_hi |
| 12972 | { 0, 8 }, // dsub3_then_bsub |
| 12973 | { 8, 8 }, // dsub3_then_bsub_hi |
| 12974 | { 0, 16 }, // dsub3_then_hsub |
| 12975 | { 16, 16 }, // dsub3_then_hsub_hi |
| 12976 | { 0, 32 }, // dsub3_then_ssub |
| 12977 | { 32, 32 }, // dsub3_then_ssub_hi |
| 12978 | { 0, 8 }, // dsub2_then_bsub |
| 12979 | { 8, 8 }, // dsub2_then_bsub_hi |
| 12980 | { 0, 16 }, // dsub2_then_hsub |
| 12981 | { 16, 16 }, // dsub2_then_hsub_hi |
| 12982 | { 0, 32 }, // dsub2_then_ssub |
| 12983 | { 32, 32 }, // dsub2_then_ssub_hi |
| 12984 | { 0, 65535 }, // psub1_then_psub |
| 12985 | { 64, 64 }, // qsub1_then_dsub_hi |
| 12986 | { 64, 64 }, // qsub3_then_dsub_hi |
| 12987 | { 64, 64 }, // qsub2_then_dsub_hi |
| 12988 | { 448, 32 }, // x8sub_7_then_sub_32 |
| 12989 | { 480, 32 }, // x8sub_7_then_sub_32_hi |
| 12990 | { 384, 32 }, // x8sub_6_then_sub_32 |
| 12991 | { 416, 32 }, // x8sub_6_then_sub_32_hi |
| 12992 | { 320, 32 }, // x8sub_5_then_sub_32 |
| 12993 | { 352, 32 }, // x8sub_5_then_sub_32_hi |
| 12994 | { 256, 32 }, // x8sub_4_then_sub_32 |
| 12995 | { 288, 32 }, // x8sub_4_then_sub_32_hi |
| 12996 | { 192, 32 }, // x8sub_3_then_sub_32 |
| 12997 | { 224, 32 }, // x8sub_3_then_sub_32_hi |
| 12998 | { 128, 32 }, // x8sub_2_then_sub_32 |
| 12999 | { 160, 32 }, // x8sub_2_then_sub_32_hi |
| 13000 | { 64, 32 }, // x8sub_1_then_sub_32 |
| 13001 | { 96, 32 }, // x8sub_1_then_sub_32_hi |
| 13002 | { 0, 32 }, // subo64_then_sub_32 |
| 13003 | { 32, 32 }, // subo64_then_sub_32_hi |
| 13004 | { 128, 65535 }, // zsub1_then_zsub_hi |
| 13005 | { 128, 65535 }, // zsub3_then_zsub_hi |
| 13006 | { 128, 65535 }, // zsub2_then_zsub_hi |
| 13007 | { 65535, 128 }, // dsub0_dsub1 |
| 13008 | { 65535, 192 }, // dsub0_dsub1_dsub2 |
| 13009 | { 65535, 128 }, // dsub1_dsub2 |
| 13010 | { 65535, 192 }, // dsub1_dsub2_dsub3 |
| 13011 | { 65535, 128 }, // dsub2_dsub3 |
| 13012 | { 65535, 128 }, // dsub_dsub1 |
| 13013 | { 65535, 256 }, // dsub_dsub1_dsub2_dsub3 |
| 13014 | { 65535, 192 }, // dsub_dsub1_dsub2 |
| 13015 | { 65535, 256 }, // qsub0_qsub1 |
| 13016 | { 65535, 384 }, // qsub0_qsub1_qsub2 |
| 13017 | { 65535, 256 }, // qsub1_qsub2 |
| 13018 | { 65535, 384 }, // qsub1_qsub2_qsub3 |
| 13019 | { 65535, 256 }, // qsub2_qsub3 |
| 13020 | { 65535, 64 }, // sub_32_x8sub_1_then_sub_32 |
| 13021 | { 0, 128 }, // x8sub_0_x8sub_1 |
| 13022 | { 128, 128 }, // x8sub_2_x8sub_3 |
| 13023 | { 256, 128 }, // x8sub_4_x8sub_5 |
| 13024 | { 384, 128 }, // x8sub_6_x8sub_7 |
| 13025 | { 65535, 64 }, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 13026 | { 65535, 64 }, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 13027 | { 65535, 64 }, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 13028 | { 65535, 64 }, // sub_32_subo64_then_sub_32 |
| 13029 | { 65535, 256 }, // zsub_qsub1 |
| 13030 | { 65535, 512 }, // zsub_qsub1_qsub2_qsub3 |
| 13031 | { 65535, 384 }, // zsub_qsub1_qsub2 |
| 13032 | { 65535, 65535 }, // zsub0_zsub1 |
| 13033 | { 65535, 65535 }, // zsub0_zsub1_zsub2 |
| 13034 | { 65535, 65535 }, // zsub1_zsub2 |
| 13035 | { 65535, 65535 }, // zsub1_zsub2_zsub3 |
| 13036 | { 65535, 65535 }, // zsub2_zsub3 |
| 13037 | { 65535, 65535 }, // zsub0_zsub2 |
| 13038 | { 65535, 65535 }, // zsub1_zsub3 |
| 13039 | { 65535, 65535 }, |
| 13040 | { 0, 8 }, // bsub |
| 13041 | { 8, 8 }, // bsub_hi |
| 13042 | { 0, 64 }, // dsub |
| 13043 | { 0, 64 }, // dsub0 |
| 13044 | { 0, 64 }, // dsub1 |
| 13045 | { 0, 64 }, // dsub2 |
| 13046 | { 0, 64 }, // dsub3 |
| 13047 | { 64, 64 }, // dsub_hi |
| 13048 | { 0, 16 }, // hsub |
| 13049 | { 16, 16 }, // hsub_hi |
| 13050 | { 0, 65535 }, // psub |
| 13051 | { 0, 65535 }, // psub0 |
| 13052 | { 0, 65535 }, // psub1 |
| 13053 | { 0, 128 }, // qsub0 |
| 13054 | { 0, 128 }, // qsub1 |
| 13055 | { 0, 128 }, // qsub2 |
| 13056 | { 0, 128 }, // qsub3 |
| 13057 | { 0, 32 }, // ssub |
| 13058 | { 32, 32 }, // ssub_hi |
| 13059 | { 0, 32 }, // sub_32 |
| 13060 | { 32, 32 }, // sub_32_hi |
| 13061 | { 0, 32 }, // sube32 |
| 13062 | { 0, 64 }, // sube64 |
| 13063 | { 0, 32 }, // subo32 |
| 13064 | { 0, 64 }, // subo64 |
| 13065 | { 0, 64 }, // x8sub_0 |
| 13066 | { 64, 64 }, // x8sub_1 |
| 13067 | { 128, 64 }, // x8sub_2 |
| 13068 | { 192, 64 }, // x8sub_3 |
| 13069 | { 256, 64 }, // x8sub_4 |
| 13070 | { 320, 64 }, // x8sub_5 |
| 13071 | { 384, 64 }, // x8sub_6 |
| 13072 | { 448, 64 }, // x8sub_7 |
| 13073 | { 0, 2048 }, // zasubb |
| 13074 | { 0, 256 }, // zasubd0 |
| 13075 | { 0, 256 }, // zasubd1 |
| 13076 | { 0, 1024 }, // zasubh0 |
| 13077 | { 0, 1024 }, // zasubh1 |
| 13078 | { 0, 128 }, // zasubq0 |
| 13079 | { 0, 128 }, // zasubq1 |
| 13080 | { 0, 512 }, // zasubs0 |
| 13081 | { 0, 512 }, // zasubs1 |
| 13082 | { 0, 128 }, // zsub |
| 13083 | { 0, 65535 }, // zsub0 |
| 13084 | { 0, 65535 }, // zsub1 |
| 13085 | { 0, 65535 }, // zsub2 |
| 13086 | { 0, 65535 }, // zsub3 |
| 13087 | { 128, 65535 }, // zsub_hi |
| 13088 | { 0, 128 }, // zasubd1_then_zasubq0 |
| 13089 | { 0, 128 }, // zasubd1_then_zasubq1 |
| 13090 | { 0, 256 }, // zasubs1_then_zasubd0 |
| 13091 | { 0, 256 }, // zasubs1_then_zasubd1 |
| 13092 | { 0, 128 }, // zasubs1_then_zasubq0 |
| 13093 | { 0, 128 }, // zasubs1_then_zasubq1 |
| 13094 | { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq0 |
| 13095 | { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq1 |
| 13096 | { 0, 256 }, // zasubh1_then_zasubd0 |
| 13097 | { 0, 256 }, // zasubh1_then_zasubd1 |
| 13098 | { 0, 128 }, // zasubh1_then_zasubq0 |
| 13099 | { 0, 128 }, // zasubh1_then_zasubq1 |
| 13100 | { 0, 512 }, // zasubh1_then_zasubs0 |
| 13101 | { 0, 512 }, // zasubh1_then_zasubs1 |
| 13102 | { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq0 |
| 13103 | { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq1 |
| 13104 | { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd0 |
| 13105 | { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd1 |
| 13106 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq0 |
| 13107 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq1 |
| 13108 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 13109 | { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 13110 | { 0, 8 }, // dsub1_then_bsub |
| 13111 | { 8, 8 }, // dsub1_then_bsub_hi |
| 13112 | { 0, 16 }, // dsub1_then_hsub |
| 13113 | { 16, 16 }, // dsub1_then_hsub_hi |
| 13114 | { 0, 32 }, // dsub1_then_ssub |
| 13115 | { 32, 32 }, // dsub1_then_ssub_hi |
| 13116 | { 0, 8 }, // dsub3_then_bsub |
| 13117 | { 8, 8 }, // dsub3_then_bsub_hi |
| 13118 | { 0, 16 }, // dsub3_then_hsub |
| 13119 | { 16, 16 }, // dsub3_then_hsub_hi |
| 13120 | { 0, 32 }, // dsub3_then_ssub |
| 13121 | { 32, 32 }, // dsub3_then_ssub_hi |
| 13122 | { 0, 8 }, // dsub2_then_bsub |
| 13123 | { 8, 8 }, // dsub2_then_bsub_hi |
| 13124 | { 0, 16 }, // dsub2_then_hsub |
| 13125 | { 16, 16 }, // dsub2_then_hsub_hi |
| 13126 | { 0, 32 }, // dsub2_then_ssub |
| 13127 | { 32, 32 }, // dsub2_then_ssub_hi |
| 13128 | { 0, 65535 }, // psub1_then_psub |
| 13129 | { 64, 64 }, // qsub1_then_dsub_hi |
| 13130 | { 64, 64 }, // qsub3_then_dsub_hi |
| 13131 | { 64, 64 }, // qsub2_then_dsub_hi |
| 13132 | { 448, 32 }, // x8sub_7_then_sub_32 |
| 13133 | { 480, 32 }, // x8sub_7_then_sub_32_hi |
| 13134 | { 384, 32 }, // x8sub_6_then_sub_32 |
| 13135 | { 416, 32 }, // x8sub_6_then_sub_32_hi |
| 13136 | { 320, 32 }, // x8sub_5_then_sub_32 |
| 13137 | { 352, 32 }, // x8sub_5_then_sub_32_hi |
| 13138 | { 256, 32 }, // x8sub_4_then_sub_32 |
| 13139 | { 288, 32 }, // x8sub_4_then_sub_32_hi |
| 13140 | { 192, 32 }, // x8sub_3_then_sub_32 |
| 13141 | { 224, 32 }, // x8sub_3_then_sub_32_hi |
| 13142 | { 128, 32 }, // x8sub_2_then_sub_32 |
| 13143 | { 160, 32 }, // x8sub_2_then_sub_32_hi |
| 13144 | { 64, 32 }, // x8sub_1_then_sub_32 |
| 13145 | { 96, 32 }, // x8sub_1_then_sub_32_hi |
| 13146 | { 0, 32 }, // subo64_then_sub_32 |
| 13147 | { 32, 32 }, // subo64_then_sub_32_hi |
| 13148 | { 128, 65535 }, // zsub1_then_zsub_hi |
| 13149 | { 128, 65535 }, // zsub3_then_zsub_hi |
| 13150 | { 128, 65535 }, // zsub2_then_zsub_hi |
| 13151 | { 65535, 128 }, // dsub0_dsub1 |
| 13152 | { 65535, 192 }, // dsub0_dsub1_dsub2 |
| 13153 | { 65535, 128 }, // dsub1_dsub2 |
| 13154 | { 65535, 192 }, // dsub1_dsub2_dsub3 |
| 13155 | { 65535, 128 }, // dsub2_dsub3 |
| 13156 | { 65535, 128 }, // dsub_dsub1 |
| 13157 | { 65535, 256 }, // dsub_dsub1_dsub2_dsub3 |
| 13158 | { 65535, 192 }, // dsub_dsub1_dsub2 |
| 13159 | { 65535, 256 }, // qsub0_qsub1 |
| 13160 | { 65535, 384 }, // qsub0_qsub1_qsub2 |
| 13161 | { 65535, 256 }, // qsub1_qsub2 |
| 13162 | { 65535, 384 }, // qsub1_qsub2_qsub3 |
| 13163 | { 65535, 256 }, // qsub2_qsub3 |
| 13164 | { 65535, 64 }, // sub_32_x8sub_1_then_sub_32 |
| 13165 | { 0, 128 }, // x8sub_0_x8sub_1 |
| 13166 | { 128, 128 }, // x8sub_2_x8sub_3 |
| 13167 | { 256, 128 }, // x8sub_4_x8sub_5 |
| 13168 | { 384, 128 }, // x8sub_6_x8sub_7 |
| 13169 | { 65535, 64 }, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 13170 | { 65535, 64 }, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 13171 | { 65535, 64 }, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 13172 | { 65535, 64 }, // sub_32_subo64_then_sub_32 |
| 13173 | { 65535, 256 }, // zsub_qsub1 |
| 13174 | { 65535, 512 }, // zsub_qsub1_qsub2_qsub3 |
| 13175 | { 65535, 384 }, // zsub_qsub1_qsub2 |
| 13176 | { 65535, 65535 }, // zsub0_zsub1 |
| 13177 | { 65535, 65535 }, // zsub0_zsub1_zsub2 |
| 13178 | { 65535, 65535 }, // zsub1_zsub2 |
| 13179 | { 65535, 65535 }, // zsub1_zsub2_zsub3 |
| 13180 | { 65535, 65535 }, // zsub2_zsub3 |
| 13181 | { 65535, 65535 }, // zsub0_zsub2 |
| 13182 | { 65535, 65535 }, // zsub1_zsub3 |
| 13183 | }; |
| 13184 | |
| 13185 | |
| 13186 | static const LaneBitmask SubRegIndexLaneMaskTable[] = { |
| 13187 | LaneBitmask::getAll(), |
| 13188 | LaneBitmask(0x0000000000000001), // bsub |
| 13189 | LaneBitmask(0x0000000000000002), // bsub_hi |
| 13190 | LaneBitmask(0x000000000000002B), // dsub |
| 13191 | LaneBitmask(0x000000000000002B), // dsub0 |
| 13192 | LaneBitmask(0x0000000078000000), // dsub1 |
| 13193 | LaneBitmask(0x0000007800000000), // dsub2 |
| 13194 | LaneBitmask(0x0000000780000000), // dsub3 |
| 13195 | LaneBitmask(0x0000000000000004), // dsub_hi |
| 13196 | LaneBitmask(0x0000000000000003), // hsub |
| 13197 | LaneBitmask(0x0000000000000008), // hsub_hi |
| 13198 | LaneBitmask(0x0000000000000010), // psub |
| 13199 | LaneBitmask(0x0000000000000010), // psub0 |
| 13200 | LaneBitmask(0x0000008000000000), // psub1 |
| 13201 | LaneBitmask(0x000000000000002F), // qsub0 |
| 13202 | LaneBitmask(0x0000010078000000), // qsub1 |
| 13203 | LaneBitmask(0x0000047800000000), // qsub2 |
| 13204 | LaneBitmask(0x0000020780000000), // qsub3 |
| 13205 | LaneBitmask(0x000000000000000B), // ssub |
| 13206 | LaneBitmask(0x0000000000000020), // ssub_hi |
| 13207 | LaneBitmask(0x0000000000000040), // sub_32 |
| 13208 | LaneBitmask(0x0000000000000080), // sub_32_hi |
| 13209 | LaneBitmask(0x0000000000000100), // sube32 |
| 13210 | LaneBitmask(0x00000000000000C0), // sube64 |
| 13211 | LaneBitmask(0x0000000000000200), // subo32 |
| 13212 | LaneBitmask(0x0600000000000000), // subo64 |
| 13213 | LaneBitmask(0x00000000000000C0), // x8sub_0 |
| 13214 | LaneBitmask(0x0180000000000000), // x8sub_1 |
| 13215 | LaneBitmask(0x0060000000000000), // x8sub_2 |
| 13216 | LaneBitmask(0x0018000000000000), // x8sub_3 |
| 13217 | LaneBitmask(0x0006000000000000), // x8sub_4 |
| 13218 | LaneBitmask(0x0001800000000000), // x8sub_5 |
| 13219 | LaneBitmask(0x0000600000000000), // x8sub_6 |
| 13220 | LaneBitmask(0x0000180000000000), // x8sub_7 |
| 13221 | LaneBitmask(0x0000000007FFEC00), // zasubb |
| 13222 | LaneBitmask(0x0000000000000C00), // zasubd0 |
| 13223 | LaneBitmask(0x0000000000006000), // zasubd1 |
| 13224 | LaneBitmask(0x000000000007EC00), // zasubh0 |
| 13225 | LaneBitmask(0x0000000007F80000), // zasubh1 |
| 13226 | LaneBitmask(0x0000000000000400), // zasubq0 |
| 13227 | LaneBitmask(0x0000000000000800), // zasubq1 |
| 13228 | LaneBitmask(0x0000000000006C00), // zasubs0 |
| 13229 | LaneBitmask(0x0000000000078000), // zasubs1 |
| 13230 | LaneBitmask(0x000000000000002F), // zsub |
| 13231 | LaneBitmask(0x000000000000102F), // zsub0 |
| 13232 | LaneBitmask(0x0800010078000000), // zsub1 |
| 13233 | LaneBitmask(0x2000047800000000), // zsub2 |
| 13234 | LaneBitmask(0x1000020780000000), // zsub3 |
| 13235 | LaneBitmask(0x0000000000001000), // zsub_hi |
| 13236 | LaneBitmask(0x0000000000002000), // zasubd1_then_zasubq0 |
| 13237 | LaneBitmask(0x0000000000004000), // zasubd1_then_zasubq1 |
| 13238 | LaneBitmask(0x0000000000018000), // zasubs1_then_zasubd0 |
| 13239 | LaneBitmask(0x0000000000060000), // zasubs1_then_zasubd1 |
| 13240 | LaneBitmask(0x0000000000008000), // zasubs1_then_zasubq0 |
| 13241 | LaneBitmask(0x0000000000010000), // zasubs1_then_zasubq1 |
| 13242 | LaneBitmask(0x0000000000020000), // zasubs1_then_zasubd1_then_zasubq0 |
| 13243 | LaneBitmask(0x0000000000040000), // zasubs1_then_zasubd1_then_zasubq1 |
| 13244 | LaneBitmask(0x0000000000180000), // zasubh1_then_zasubd0 |
| 13245 | LaneBitmask(0x0000000000600000), // zasubh1_then_zasubd1 |
| 13246 | LaneBitmask(0x0000000000080000), // zasubh1_then_zasubq0 |
| 13247 | LaneBitmask(0x0000000000100000), // zasubh1_then_zasubq1 |
| 13248 | LaneBitmask(0x0000000000780000), // zasubh1_then_zasubs0 |
| 13249 | LaneBitmask(0x0000000007800000), // zasubh1_then_zasubs1 |
| 13250 | LaneBitmask(0x0000000000200000), // zasubh1_then_zasubd1_then_zasubq0 |
| 13251 | LaneBitmask(0x0000000000400000), // zasubh1_then_zasubd1_then_zasubq1 |
| 13252 | LaneBitmask(0x0000000001800000), // zasubh1_then_zasubs1_then_zasubd0 |
| 13253 | LaneBitmask(0x0000000006000000), // zasubh1_then_zasubs1_then_zasubd1 |
| 13254 | LaneBitmask(0x0000000000800000), // zasubh1_then_zasubs1_then_zasubq0 |
| 13255 | LaneBitmask(0x0000000001000000), // zasubh1_then_zasubs1_then_zasubq1 |
| 13256 | LaneBitmask(0x0000000002000000), // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 13257 | LaneBitmask(0x0000000004000000), // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 13258 | LaneBitmask(0x0000000008000000), // dsub1_then_bsub |
| 13259 | LaneBitmask(0x0000000010000000), // dsub1_then_bsub_hi |
| 13260 | LaneBitmask(0x0000000018000000), // dsub1_then_hsub |
| 13261 | LaneBitmask(0x0000000020000000), // dsub1_then_hsub_hi |
| 13262 | LaneBitmask(0x0000000038000000), // dsub1_then_ssub |
| 13263 | LaneBitmask(0x0000000040000000), // dsub1_then_ssub_hi |
| 13264 | LaneBitmask(0x0000000080000000), // dsub3_then_bsub |
| 13265 | LaneBitmask(0x0000000100000000), // dsub3_then_bsub_hi |
| 13266 | LaneBitmask(0x0000000180000000), // dsub3_then_hsub |
| 13267 | LaneBitmask(0x0000000200000000), // dsub3_then_hsub_hi |
| 13268 | LaneBitmask(0x0000000380000000), // dsub3_then_ssub |
| 13269 | LaneBitmask(0x0000000400000000), // dsub3_then_ssub_hi |
| 13270 | LaneBitmask(0x0000000800000000), // dsub2_then_bsub |
| 13271 | LaneBitmask(0x0000001000000000), // dsub2_then_bsub_hi |
| 13272 | LaneBitmask(0x0000001800000000), // dsub2_then_hsub |
| 13273 | LaneBitmask(0x0000002000000000), // dsub2_then_hsub_hi |
| 13274 | LaneBitmask(0x0000003800000000), // dsub2_then_ssub |
| 13275 | LaneBitmask(0x0000004000000000), // dsub2_then_ssub_hi |
| 13276 | LaneBitmask(0x0000008000000000), // psub1_then_psub |
| 13277 | LaneBitmask(0x0000010000000000), // qsub1_then_dsub_hi |
| 13278 | LaneBitmask(0x0000020000000000), // qsub3_then_dsub_hi |
| 13279 | LaneBitmask(0x0000040000000000), // qsub2_then_dsub_hi |
| 13280 | LaneBitmask(0x0000080000000000), // x8sub_7_then_sub_32 |
| 13281 | LaneBitmask(0x0000100000000000), // x8sub_7_then_sub_32_hi |
| 13282 | LaneBitmask(0x0000200000000000), // x8sub_6_then_sub_32 |
| 13283 | LaneBitmask(0x0000400000000000), // x8sub_6_then_sub_32_hi |
| 13284 | LaneBitmask(0x0000800000000000), // x8sub_5_then_sub_32 |
| 13285 | LaneBitmask(0x0001000000000000), // x8sub_5_then_sub_32_hi |
| 13286 | LaneBitmask(0x0002000000000000), // x8sub_4_then_sub_32 |
| 13287 | LaneBitmask(0x0004000000000000), // x8sub_4_then_sub_32_hi |
| 13288 | LaneBitmask(0x0008000000000000), // x8sub_3_then_sub_32 |
| 13289 | LaneBitmask(0x0010000000000000), // x8sub_3_then_sub_32_hi |
| 13290 | LaneBitmask(0x0020000000000000), // x8sub_2_then_sub_32 |
| 13291 | LaneBitmask(0x0040000000000000), // x8sub_2_then_sub_32_hi |
| 13292 | LaneBitmask(0x0080000000000000), // x8sub_1_then_sub_32 |
| 13293 | LaneBitmask(0x0100000000000000), // x8sub_1_then_sub_32_hi |
| 13294 | LaneBitmask(0x0200000000000000), // subo64_then_sub_32 |
| 13295 | LaneBitmask(0x0400000000000000), // subo64_then_sub_32_hi |
| 13296 | LaneBitmask(0x0800000000000000), // zsub1_then_zsub_hi |
| 13297 | LaneBitmask(0x1000000000000000), // zsub3_then_zsub_hi |
| 13298 | LaneBitmask(0x2000000000000000), // zsub2_then_zsub_hi |
| 13299 | LaneBitmask(0x000000007800002B), // dsub0_dsub1 |
| 13300 | LaneBitmask(0x000000787800002B), // dsub0_dsub1_dsub2 |
| 13301 | LaneBitmask(0x0000007878000000), // dsub1_dsub2 |
| 13302 | LaneBitmask(0x0000007FF8000000), // dsub1_dsub2_dsub3 |
| 13303 | LaneBitmask(0x0000007F80000000), // dsub2_dsub3 |
| 13304 | LaneBitmask(0x000000007800002B), // dsub_dsub1 |
| 13305 | LaneBitmask(0x0000007FF800002B), // dsub_dsub1_dsub2_dsub3 |
| 13306 | LaneBitmask(0x000000787800002B), // dsub_dsub1_dsub2 |
| 13307 | LaneBitmask(0x000001007800002F), // qsub0_qsub1 |
| 13308 | LaneBitmask(0x000005787800002F), // qsub0_qsub1_qsub2 |
| 13309 | LaneBitmask(0x0000057878000000), // qsub1_qsub2 |
| 13310 | LaneBitmask(0x0000077FF8000000), // qsub1_qsub2_qsub3 |
| 13311 | LaneBitmask(0x0000067F80000000), // qsub2_qsub3 |
| 13312 | LaneBitmask(0x0080000000000040), // sub_32_x8sub_1_then_sub_32 |
| 13313 | LaneBitmask(0x01800000000000C0), // x8sub_0_x8sub_1 |
| 13314 | LaneBitmask(0x0078000000000000), // x8sub_2_x8sub_3 |
| 13315 | LaneBitmask(0x0007800000000000), // x8sub_4_x8sub_5 |
| 13316 | LaneBitmask(0x0000780000000000), // x8sub_6_x8sub_7 |
| 13317 | LaneBitmask(0x0000280000000000), // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 13318 | LaneBitmask(0x0002800000000000), // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 13319 | LaneBitmask(0x0028000000000000), // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 13320 | LaneBitmask(0x0200000000000040), // sub_32_subo64_then_sub_32 |
| 13321 | LaneBitmask(0x000001007800002F), // zsub_qsub1 |
| 13322 | LaneBitmask(0x0000077FF800002F), // zsub_qsub1_qsub2_qsub3 |
| 13323 | LaneBitmask(0x000005787800002F), // zsub_qsub1_qsub2 |
| 13324 | LaneBitmask(0x080001007800102F), // zsub0_zsub1 |
| 13325 | LaneBitmask(0x280005787800102F), // zsub0_zsub1_zsub2 |
| 13326 | LaneBitmask(0x2800057878000000), // zsub1_zsub2 |
| 13327 | LaneBitmask(0x3800077FF8000000), // zsub1_zsub2_zsub3 |
| 13328 | LaneBitmask(0x3000067F80000000), // zsub2_zsub3 |
| 13329 | LaneBitmask(0x200004780000102F), // zsub0_zsub2 |
| 13330 | LaneBitmask(0x18000307F8000000), // zsub1_zsub3 |
| 13331 | }; |
| 13332 | |
| 13333 | |
| 13334 | |
| 13335 | static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = { |
| 13336 | // Mode = 0 (Default) |
| 13337 | { 8, 8, 0, /*VTLists+*/72 }, // W_HI_DummyRC |
| 13338 | { 8, 8, 0, /*VTLists+*/72 }, // B_HI_DummyRC |
| 13339 | { 8, 8, 0, /*VTLists+*/72 }, // D_HI_DummyRC |
| 13340 | { 8, 8, 0, /*VTLists+*/72 }, // H_HI_DummyRC |
| 13341 | { 8, 8, 0, /*VTLists+*/72 }, // Q_HI_DummyRC |
| 13342 | { 8, 8, 0, /*VTLists+*/72 }, // S_HI_DummyRC |
| 13343 | { 8, 8, 8, /*VTLists+*/83 }, // FPR8 |
| 13344 | { 16, 16, 16, /*VTLists+*/0 }, // FPR16 |
| 13345 | { 16, 16, 16, /*VTLists+*/76 }, // PPRorPNR |
| 13346 | { 16, 16, 16, /*VTLists+*/9 }, // FPR16_lo |
| 13347 | { 16, 16, 16, /*VTLists+*/81 }, // PNR |
| 13348 | { 16, 16, 16, /*VTLists+*/50 }, // PPR |
| 13349 | { 16, 16, 16, /*VTLists+*/81 }, // PNR_3b |
| 13350 | { 16, 16, 16, /*VTLists+*/81 }, // PNR_p8to15 |
| 13351 | { 16, 16, 16, /*VTLists+*/50 }, // PPRMul2 |
| 13352 | { 16, 16, 16, /*VTLists+*/50 }, // PPR_3b |
| 13353 | { 16, 16, 16, /*VTLists+*/50 }, // PPR_p8to15 |
| 13354 | { 16, 16, 16, /*VTLists+*/50 }, // PPRMul2_and_PPR_3b |
| 13355 | { 16, 16, 16, /*VTLists+*/50 }, // PPRMul2_and_PPR_p8to15 |
| 13356 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2 |
| 13357 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2 |
| 13358 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2 |
| 13359 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPR_3b |
| 13360 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPR_p8to15 |
| 13361 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b |
| 13362 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15 |
| 13363 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 13364 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 13365 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 13366 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 13367 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 13368 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 13369 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 13370 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 13371 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 13372 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 13373 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 13374 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 13375 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32all |
| 13376 | { 32, 32, 32, /*VTLists+*/4 }, // FPR32 |
| 13377 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32 |
| 13378 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32sp |
| 13379 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32common |
| 13380 | { 32, 32, 32, /*VTLists+*/4 }, // FPR32_with_hsub_in_FPR16_lo |
| 13381 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32arg |
| 13382 | { 32, 32, 32, /*VTLists+*/5 }, // MatrixIndexGPR32_12_15 |
| 13383 | { 32, 32, 32, /*VTLists+*/5 }, // MatrixIndexGPR32_8_11 |
| 13384 | { 32, 32, 32, /*VTLists+*/5 }, // CCR |
| 13385 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32sponly |
| 13386 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass |
| 13387 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_subo32_in_GPR32common |
| 13388 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_GPR32arg |
| 13389 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 13390 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 13391 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64all |
| 13392 | { 64, 64, 64, /*VTLists+*/11 }, // FPR64 |
| 13393 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64 |
| 13394 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64sp |
| 13395 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64common |
| 13396 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64noip |
| 13397 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64common_and_GPR64noip |
| 13398 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPR64 |
| 13399 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRnotx16 |
| 13400 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRnotx16x17 |
| 13401 | { 64, 64, 64, /*VTLists+*/41 }, // FPR64_lo |
| 13402 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64arg |
| 13403 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS |
| 13404 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13405 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13406 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS_with_sub_32 |
| 13407 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRx16x17 |
| 13408 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS_and_GPR64 |
| 13409 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64sponly |
| 13410 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRx17 |
| 13411 | { 128, 128, 64, /*VTLists+*/72 }, // DD |
| 13412 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub0_in_FPR64_lo |
| 13413 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub1_in_FPR64_lo |
| 13414 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass |
| 13415 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 13416 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_GPR64common |
| 13417 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_GPR64noip |
| 13418 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64noip |
| 13419 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPR64 |
| 13420 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 13421 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_tcGPR64 |
| 13422 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 13423 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64arg |
| 13424 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13425 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13426 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 13427 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 13428 | { 128, 128, 128, /*VTLists+*/22 }, // FPR128 |
| 13429 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR |
| 13430 | { 128, 128, 128, /*VTLists+*/32 }, // FPR128_lo |
| 13431 | { 128, 128, 128, /*VTLists+*/72 }, // MPR128 |
| 13432 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2 |
| 13433 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR_4b |
| 13434 | { 128, 128, 128, /*VTLists+*/32 }, // FPR128_0to7 |
| 13435 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Hi |
| 13436 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Lo |
| 13437 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul4 |
| 13438 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR_3b |
| 13439 | { 128, 128, 128, /*VTLists+*/56 }, // ZPR_K |
| 13440 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Hi_and_ZPRMul4 |
| 13441 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Lo_and_ZPRMul4 |
| 13442 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_and_ZPR_3b |
| 13443 | { 128, 128, 128, /*VTLists+*/56 }, // ZPRMul2_and_ZPR_K |
| 13444 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul4_and_ZPR_3b |
| 13445 | { 128, 128, 128, /*VTLists+*/56 }, // ZPRMul4_and_ZPR_K |
| 13446 | { 192, 192, 64, /*VTLists+*/72 }, // DDD |
| 13447 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo |
| 13448 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub1_in_FPR64_lo |
| 13449 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub2_in_FPR64_lo |
| 13450 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 13451 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 13452 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 13453 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD |
| 13454 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo |
| 13455 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo |
| 13456 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub2_in_FPR64_lo |
| 13457 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub3_in_FPR64_lo |
| 13458 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 13459 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 13460 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13461 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 13462 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13463 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13464 | { 256, 256, 128, /*VTLists+*/72 }, // QQ |
| 13465 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2 |
| 13466 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous |
| 13467 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 13468 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_dsub1_in_FPR64_lo |
| 13469 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_lo |
| 13470 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2 |
| 13471 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided |
| 13472 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 13473 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_dsub1_in_FPR64_lo |
| 13474 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2 |
| 13475 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo |
| 13476 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 13477 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 13478 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 13479 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 13480 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 13481 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 13482 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_0to7 |
| 13483 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub1_in_FPR128_0to7 |
| 13484 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Hi |
| 13485 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Lo |
| 13486 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 13487 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 13488 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_dsub_in_FPR64_lo |
| 13489 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 13490 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_qsub1_in_FPR128_0to7 |
| 13491 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4 |
| 13492 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K |
| 13493 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13494 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 13495 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4 |
| 13496 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPR_K |
| 13497 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7 |
| 13498 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 13499 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 13500 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 13501 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 13502 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13503 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13504 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 13505 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 13506 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13507 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13508 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13509 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13510 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 13511 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 13512 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 13513 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 13514 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPR_K |
| 13515 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 13516 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13517 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13518 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 13519 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 13520 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 13521 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 13522 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 13523 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13524 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 13525 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13526 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13527 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13528 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 13529 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 13530 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 13531 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 13532 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 13533 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13534 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 13535 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 13536 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 13537 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 13538 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13539 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13540 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13541 | { 256, 256, 256, /*VTLists+*/72 }, // MPR64 |
| 13542 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ |
| 13543 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3 |
| 13544 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo |
| 13545 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub2_in_FPR64_lo |
| 13546 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo |
| 13547 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo |
| 13548 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo |
| 13549 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 13550 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2 |
| 13551 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo |
| 13552 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 13553 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 13554 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 13555 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 13556 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 13557 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 13558 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7 |
| 13559 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub1_in_FPR128_0to7 |
| 13560 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub2_in_FPR128_0to7 |
| 13561 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_qsub1_in_FPR128_0to7 |
| 13562 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_qsub2_in_FPR128_0to7 |
| 13563 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4 |
| 13564 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K |
| 13565 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 13566 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 13567 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 13568 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 13569 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4 |
| 13570 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPR_K |
| 13571 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 13572 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 13573 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4 |
| 13574 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPR_K |
| 13575 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7 |
| 13576 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 13577 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 13578 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 13579 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 13580 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 13581 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 13582 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 13583 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 13584 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 13585 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 13586 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 13587 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 13588 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 13589 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 13590 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13591 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 13592 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13593 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13594 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13595 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13596 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13597 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13598 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13599 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13600 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13601 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 13602 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 13603 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 13604 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 13605 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 13606 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 13607 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13608 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13609 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13610 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 13611 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13612 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13613 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 13614 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 13615 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 13616 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 13617 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13618 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 13619 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13620 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 13621 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 13622 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 13623 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 13624 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 13625 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 13626 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 13627 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13628 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13629 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13630 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 13631 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 13632 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 13633 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ |
| 13634 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4 |
| 13635 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo |
| 13636 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo |
| 13637 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub3_in_FPR64_lo |
| 13638 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo |
| 13639 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous |
| 13640 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo |
| 13641 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo |
| 13642 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo |
| 13643 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 13644 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2 |
| 13645 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo |
| 13646 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 13647 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 13648 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 13649 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 13650 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 13651 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 13652 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 13653 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 13654 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 13655 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 13656 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 13657 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 13658 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 13659 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 13660 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7 |
| 13661 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub1_in_FPR128_0to7 |
| 13662 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub2_in_FPR128_0to7 |
| 13663 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub3_in_FPR128_0to7 |
| 13664 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4 |
| 13665 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided |
| 13666 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 13667 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub1_in_FPR128_0to7 |
| 13668 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub2_in_FPR128_0to7 |
| 13669 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub3_in_FPR128_0to7 |
| 13670 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K |
| 13671 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 13672 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 13673 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 13674 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 13675 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4 |
| 13676 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K |
| 13677 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 13678 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 13679 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4 |
| 13680 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPR_K |
| 13681 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 13682 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 13683 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4 |
| 13684 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPR_K |
| 13685 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7 |
| 13686 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 13687 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 13688 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 13689 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 13690 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 13691 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 13692 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 13693 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 13694 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 13695 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 13696 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 13697 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 13698 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 13699 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 13700 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 13701 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 13702 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 13703 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 13704 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 13705 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 13706 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 13707 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 13708 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 13709 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 13710 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 13711 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13712 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13713 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 13714 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 13715 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 13716 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_dsub_in_FPR64_lo |
| 13717 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 13718 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub1_in_ZPR_K |
| 13719 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 13720 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 13721 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13722 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13723 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13724 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13725 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 13726 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13727 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13728 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13729 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13730 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 13731 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 13732 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13733 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13734 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13735 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13736 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13737 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13738 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 13739 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 13740 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 13741 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 13742 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 13743 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 13744 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 13745 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 13746 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 13747 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 13748 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 13749 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13750 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13751 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13752 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 13753 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13754 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 13755 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13756 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13757 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13758 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 13759 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 13760 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 13761 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 13762 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 13763 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 13764 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 13765 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 13766 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 13767 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 13768 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 13769 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 13770 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13771 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 13772 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 13773 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 13774 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 13775 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 13776 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 13777 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 13778 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 13779 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 13780 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 13781 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13782 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 13783 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 13784 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 13785 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 13786 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 13787 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13788 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13789 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 13790 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 13791 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 13792 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 13793 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 13794 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 13795 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class |
| 13796 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 13797 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 13798 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13799 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13800 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 13801 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13802 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13803 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 13804 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13805 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13806 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13807 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 13808 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13809 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13810 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 13811 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 13812 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13813 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13814 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13815 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13816 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 13817 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13818 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13819 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13820 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13821 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 13822 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13823 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13824 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 13825 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13826 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13827 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13828 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13829 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13830 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 13831 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13832 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 13833 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13834 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13835 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13836 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 13837 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13838 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13839 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 13840 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 13841 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 13842 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 13843 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_GPR32arg |
| 13844 | { 512, 512, 512, /*VTLists+*/72 }, // MPR32 |
| 13845 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 13846 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13847 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13848 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13849 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13850 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13851 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 13852 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13853 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13854 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13855 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 13856 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13857 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 13858 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13859 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 13860 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 13861 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 13862 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 13863 | { 512, 512, 512, /*VTLists+*/72 }, // ZTR |
| 13864 | { 1024, 1024, 1024, /*VTLists+*/72 }, // MPR16 |
| 13865 | { 2048, 2048, 2048, /*VTLists+*/72 }, // MPR |
| 13866 | { 2048, 2048, 2048, /*VTLists+*/72 }, // MPR8 |
| 13867 | // Mode = 1 (SMEWithZPRPredicateSpills) |
| 13868 | { 8, 8, 0, /*VTLists+*/72 }, // W_HI_DummyRC |
| 13869 | { 8, 8, 0, /*VTLists+*/72 }, // B_HI_DummyRC |
| 13870 | { 8, 8, 0, /*VTLists+*/72 }, // D_HI_DummyRC |
| 13871 | { 8, 8, 0, /*VTLists+*/72 }, // H_HI_DummyRC |
| 13872 | { 8, 8, 0, /*VTLists+*/72 }, // Q_HI_DummyRC |
| 13873 | { 8, 8, 0, /*VTLists+*/72 }, // S_HI_DummyRC |
| 13874 | { 8, 8, 8, /*VTLists+*/83 }, // FPR8 |
| 13875 | { 16, 16, 16, /*VTLists+*/0 }, // FPR16 |
| 13876 | { 16, 16, 16, /*VTLists+*/76 }, // PPRorPNR |
| 13877 | { 16, 16, 16, /*VTLists+*/9 }, // FPR16_lo |
| 13878 | { 16, 16, 16, /*VTLists+*/81 }, // PNR |
| 13879 | { 16, 128, 128, /*VTLists+*/50 }, // PPR |
| 13880 | { 16, 16, 16, /*VTLists+*/81 }, // PNR_3b |
| 13881 | { 16, 16, 16, /*VTLists+*/81 }, // PNR_p8to15 |
| 13882 | { 16, 128, 128, /*VTLists+*/50 }, // PPRMul2 |
| 13883 | { 16, 128, 128, /*VTLists+*/50 }, // PPR_3b |
| 13884 | { 16, 128, 128, /*VTLists+*/50 }, // PPR_p8to15 |
| 13885 | { 16, 128, 128, /*VTLists+*/50 }, // PPRMul2_and_PPR_3b |
| 13886 | { 16, 128, 128, /*VTLists+*/50 }, // PPRMul2_and_PPR_p8to15 |
| 13887 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2 |
| 13888 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2 |
| 13889 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2 |
| 13890 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPR_3b |
| 13891 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPR_p8to15 |
| 13892 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b |
| 13893 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15 |
| 13894 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 13895 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 13896 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 13897 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 13898 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 13899 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 13900 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 13901 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 13902 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 13903 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 13904 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 13905 | { 32, 32, 16, /*VTLists+*/72 }, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 13906 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32all |
| 13907 | { 32, 32, 32, /*VTLists+*/4 }, // FPR32 |
| 13908 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32 |
| 13909 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32sp |
| 13910 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32common |
| 13911 | { 32, 32, 32, /*VTLists+*/4 }, // FPR32_with_hsub_in_FPR16_lo |
| 13912 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32arg |
| 13913 | { 32, 32, 32, /*VTLists+*/5 }, // MatrixIndexGPR32_12_15 |
| 13914 | { 32, 32, 32, /*VTLists+*/5 }, // MatrixIndexGPR32_8_11 |
| 13915 | { 32, 32, 32, /*VTLists+*/5 }, // CCR |
| 13916 | { 32, 32, 32, /*VTLists+*/5 }, // GPR32sponly |
| 13917 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass |
| 13918 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_subo32_in_GPR32common |
| 13919 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_GPR32arg |
| 13920 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 13921 | { 64, 64, 32, /*VTLists+*/72 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 13922 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64all |
| 13923 | { 64, 64, 64, /*VTLists+*/11 }, // FPR64 |
| 13924 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64 |
| 13925 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64sp |
| 13926 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64common |
| 13927 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64noip |
| 13928 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64common_and_GPR64noip |
| 13929 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPR64 |
| 13930 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRnotx16 |
| 13931 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRnotx16x17 |
| 13932 | { 64, 64, 64, /*VTLists+*/41 }, // FPR64_lo |
| 13933 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64arg |
| 13934 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS |
| 13935 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13936 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13937 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS_with_sub_32 |
| 13938 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRx16x17 |
| 13939 | { 64, 64, 64, /*VTLists+*/7 }, // FIXED_REGS_and_GPR64 |
| 13940 | { 64, 64, 64, /*VTLists+*/7 }, // GPR64sponly |
| 13941 | { 64, 64, 64, /*VTLists+*/7 }, // tcGPRx17 |
| 13942 | { 128, 128, 64, /*VTLists+*/72 }, // DD |
| 13943 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub0_in_FPR64_lo |
| 13944 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub1_in_FPR64_lo |
| 13945 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass |
| 13946 | { 128, 128, 64, /*VTLists+*/72 }, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 13947 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_GPR64common |
| 13948 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_GPR64noip |
| 13949 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64noip |
| 13950 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPR64 |
| 13951 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 13952 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_tcGPR64 |
| 13953 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 13954 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64arg |
| 13955 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 13956 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 13957 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 13958 | { 128, 128, 64, /*VTLists+*/72 }, // XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 13959 | { 128, 128, 128, /*VTLists+*/22 }, // FPR128 |
| 13960 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR |
| 13961 | { 128, 128, 128, /*VTLists+*/32 }, // FPR128_lo |
| 13962 | { 128, 128, 128, /*VTLists+*/72 }, // MPR128 |
| 13963 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2 |
| 13964 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR_4b |
| 13965 | { 128, 128, 128, /*VTLists+*/32 }, // FPR128_0to7 |
| 13966 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Hi |
| 13967 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Lo |
| 13968 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul4 |
| 13969 | { 128, 128, 128, /*VTLists+*/58 }, // ZPR_3b |
| 13970 | { 128, 128, 128, /*VTLists+*/56 }, // ZPR_K |
| 13971 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Hi_and_ZPRMul4 |
| 13972 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_Lo_and_ZPRMul4 |
| 13973 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul2_and_ZPR_3b |
| 13974 | { 128, 128, 128, /*VTLists+*/56 }, // ZPRMul2_and_ZPR_K |
| 13975 | { 128, 128, 128, /*VTLists+*/58 }, // ZPRMul4_and_ZPR_3b |
| 13976 | { 128, 128, 128, /*VTLists+*/56 }, // ZPRMul4_and_ZPR_K |
| 13977 | { 192, 192, 64, /*VTLists+*/72 }, // DDD |
| 13978 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo |
| 13979 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub1_in_FPR64_lo |
| 13980 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub2_in_FPR64_lo |
| 13981 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 13982 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 13983 | { 192, 192, 64, /*VTLists+*/72 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 13984 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD |
| 13985 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo |
| 13986 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo |
| 13987 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub2_in_FPR64_lo |
| 13988 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub3_in_FPR64_lo |
| 13989 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 13990 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 13991 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13992 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 13993 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13994 | { 256, 256, 64, /*VTLists+*/72 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 13995 | { 256, 256, 128, /*VTLists+*/72 }, // QQ |
| 13996 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2 |
| 13997 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous |
| 13998 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 13999 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_dsub1_in_FPR64_lo |
| 14000 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_lo |
| 14001 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2 |
| 14002 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided |
| 14003 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 14004 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_dsub1_in_FPR64_lo |
| 14005 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2 |
| 14006 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo |
| 14007 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 14008 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 14009 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 14010 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 14011 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 14012 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 14013 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_0to7 |
| 14014 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub1_in_FPR128_0to7 |
| 14015 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Hi |
| 14016 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Lo |
| 14017 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 14018 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 14019 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_dsub_in_FPR64_lo |
| 14020 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 14021 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_qsub1_in_FPR128_0to7 |
| 14022 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4 |
| 14023 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K |
| 14024 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14025 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 14026 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4 |
| 14027 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPR_K |
| 14028 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7 |
| 14029 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 14030 | { 256, 256, 128, /*VTLists+*/72 }, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 14031 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 14032 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 14033 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14034 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14035 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 14036 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 14037 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14038 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14039 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14040 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14041 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 14042 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 14043 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 14044 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 14045 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPR_K |
| 14046 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 14047 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14048 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14049 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 14050 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 14051 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 14052 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 14053 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 14054 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14055 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 14056 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14057 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14058 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14059 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 14060 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 14061 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 14062 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 14063 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 14064 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14065 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 14066 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 14067 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 14068 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 14069 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14070 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14071 | { 256, 256, 128, /*VTLists+*/72 }, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14072 | { 256, 256, 256, /*VTLists+*/72 }, // MPR64 |
| 14073 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ |
| 14074 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3 |
| 14075 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo |
| 14076 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub2_in_FPR64_lo |
| 14077 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo |
| 14078 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo |
| 14079 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo |
| 14080 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 14081 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2 |
| 14082 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo |
| 14083 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 14084 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 14085 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 14086 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 14087 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 14088 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 14089 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7 |
| 14090 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub1_in_FPR128_0to7 |
| 14091 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub2_in_FPR128_0to7 |
| 14092 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_qsub1_in_FPR128_0to7 |
| 14093 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_qsub2_in_FPR128_0to7 |
| 14094 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4 |
| 14095 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K |
| 14096 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 14097 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 14098 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 14099 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 14100 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4 |
| 14101 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPR_K |
| 14102 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 14103 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 14104 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4 |
| 14105 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPR_K |
| 14106 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7 |
| 14107 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 14108 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 14109 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 14110 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 14111 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 14112 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 14113 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 14114 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 14115 | { 384, 384, 128, /*VTLists+*/72 }, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 14116 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 14117 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 14118 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 14119 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 14120 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 14121 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14122 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 14123 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14124 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14125 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14126 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14127 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14128 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14129 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14130 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14131 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14132 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 14133 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 14134 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 14135 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 14136 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 14137 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 14138 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14139 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14140 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14141 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 14142 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14143 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14144 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 14145 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 14146 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 14147 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 14148 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14149 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 14150 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14151 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 14152 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 14153 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 14154 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 14155 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 14156 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 14157 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 14158 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14159 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14160 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14161 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 14162 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 14163 | { 384, 384, 128, /*VTLists+*/72 }, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 14164 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ |
| 14165 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4 |
| 14166 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo |
| 14167 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo |
| 14168 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub3_in_FPR64_lo |
| 14169 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo |
| 14170 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous |
| 14171 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo |
| 14172 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo |
| 14173 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo |
| 14174 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 14175 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2 |
| 14176 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo |
| 14177 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 14178 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 14179 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 14180 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 14181 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 14182 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 14183 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 14184 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 14185 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 14186 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 14187 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 14188 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 14189 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 14190 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 14191 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7 |
| 14192 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub1_in_FPR128_0to7 |
| 14193 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub2_in_FPR128_0to7 |
| 14194 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub3_in_FPR128_0to7 |
| 14195 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4 |
| 14196 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided |
| 14197 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 14198 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub1_in_FPR128_0to7 |
| 14199 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub2_in_FPR128_0to7 |
| 14200 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_qsub3_in_FPR128_0to7 |
| 14201 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K |
| 14202 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 14203 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 14204 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 14205 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 14206 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4 |
| 14207 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K |
| 14208 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 14209 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 14210 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4 |
| 14211 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPR_K |
| 14212 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 14213 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 14214 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4 |
| 14215 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPR_K |
| 14216 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7 |
| 14217 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 14218 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 14219 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 14220 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 14221 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 14222 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 14223 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 14224 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 14225 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 14226 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 14227 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 14228 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 14229 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 14230 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 14231 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 14232 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 14233 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 14234 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 14235 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 14236 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 14237 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 14238 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 14239 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 14240 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 14241 | { 512, 512, 128, /*VTLists+*/72 }, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 14242 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14243 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14244 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 14245 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 14246 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 14247 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_dsub_in_FPR64_lo |
| 14248 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 14249 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub1_in_ZPR_K |
| 14250 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 14251 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 14252 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14253 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14254 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14255 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14256 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 14257 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14258 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14259 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14260 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14261 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 14262 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 14263 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14264 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14265 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14266 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14267 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14268 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14269 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 14270 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 14271 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 14272 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 14273 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 14274 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 14275 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 14276 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 14277 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 14278 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 14279 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 14280 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14281 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14282 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14283 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 14284 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14285 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 14286 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14287 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14288 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14289 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 14290 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 14291 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 14292 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 14293 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 14294 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 14295 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 14296 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 14297 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 14298 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 14299 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 14300 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 14301 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14302 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 14303 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 14304 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 14305 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 14306 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 14307 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 14308 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 14309 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 14310 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 14311 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 14312 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14313 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 14314 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 14315 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 14316 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 14317 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 14318 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14319 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14320 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 14321 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 14322 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 14323 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 14324 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 14325 | { 512, 512, 128, /*VTLists+*/72 }, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 14326 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class |
| 14327 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 14328 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 14329 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14330 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14331 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 14332 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14333 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14334 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 14335 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14336 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14337 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14338 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 14339 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14340 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14341 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 14342 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 14343 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14344 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14345 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14346 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14347 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 14348 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14349 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14350 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14351 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14352 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 14353 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14354 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14355 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 14356 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14357 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14358 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14359 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14360 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14361 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 14362 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14363 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 14364 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14365 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14366 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14367 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 14368 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14369 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14370 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 14371 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 14372 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 14373 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 14374 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_GPR32arg |
| 14375 | { 512, 512, 512, /*VTLists+*/72 }, // MPR32 |
| 14376 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 14377 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 14378 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14379 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 14380 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14381 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14382 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 14383 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14384 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14385 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14386 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 14387 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14388 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 14389 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 14390 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 14391 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 14392 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 14393 | { 512, 512, 512, /*VTLists+*/74 }, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 14394 | { 512, 512, 512, /*VTLists+*/72 }, // ZTR |
| 14395 | { 1024, 1024, 1024, /*VTLists+*/72 }, // MPR16 |
| 14396 | { 2048, 2048, 2048, /*VTLists+*/72 }, // MPR |
| 14397 | { 2048, 2048, 2048, /*VTLists+*/72 }, // MPR8 |
| 14398 | }; |
| 14399 | static const uint32_t W_HI_DummyRCSubClassMask[] = { |
| 14400 | 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14401 | }; |
| 14402 | |
| 14403 | static const uint32_t B_HI_DummyRCSubClassMask[] = { |
| 14404 | 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14405 | }; |
| 14406 | |
| 14407 | static const uint32_t D_HI_DummyRCSubClassMask[] = { |
| 14408 | 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14409 | }; |
| 14410 | |
| 14411 | static const uint32_t H_HI_DummyRCSubClassMask[] = { |
| 14412 | 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14413 | }; |
| 14414 | |
| 14415 | static const uint32_t Q_HI_DummyRCSubClassMask[] = { |
| 14416 | 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14417 | }; |
| 14418 | |
| 14419 | static const uint32_t S_HI_DummyRCSubClassMask[] = { |
| 14420 | 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14421 | }; |
| 14422 | |
| 14423 | static const uint32_t FPR8SubClassMask[] = { |
| 14424 | 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14425 | 0x00000280, 0x00800880, 0xb8005c01, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // bsub |
| 14426 | 0x00000000, 0x00000000, 0x00005c00, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub1_then_bsub |
| 14427 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub3_then_bsub |
| 14428 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub2_then_bsub |
| 14429 | }; |
| 14430 | |
| 14431 | static const uint32_t FPR16SubClassMask[] = { |
| 14432 | 0x00000280, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14433 | 0x00000000, 0x00800880, 0xb8005c01, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // hsub |
| 14434 | 0x00000000, 0x00000000, 0x00005c00, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub1_then_hsub |
| 14435 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub3_then_hsub |
| 14436 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub2_then_hsub |
| 14437 | }; |
| 14438 | |
| 14439 | static const uint32_t PPRorPNRSubClassMask[] = { |
| 14440 | 0x0007fd00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14441 | 0xffffc800, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub |
| 14442 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14443 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14444 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1_then_psub |
| 14445 | }; |
| 14446 | |
| 14447 | static const uint32_t FPR16_loSubClassMask[] = { |
| 14448 | 0x00000200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14449 | 0x00000000, 0x00000800, 0x20004801, 0x522a4b2b, 0x00b35c90, 0x5980b45f, 0x3d420c41, 0x84f2c020, 0xc02f1c02, 0xd49020f0, 0x30008209, 0x0db855c1, 0x0178000a, 0x2f80015f, 0x000003f0, 0x00000000, 0x00000000, // hsub |
| 14450 | 0x00000000, 0x00000000, 0x00005000, 0x764e8000, 0x22b75988, 0x58b0b45d, 0x7f848551, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028619, 0x0db8d7c7, 0x0368014a, 0x6782015f, 0x00000370, 0x00000000, 0x00000000, // dsub1_then_hsub |
| 14451 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201e79, 0x0db8d74f, 0x070b514a, 0xe7aa1d5f, 0x00000071, 0x00000000, 0x00000000, // dsub3_then_hsub |
| 14452 | 0x00000000, 0x00000000, 0x00000000, 0x7c8d0000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220e39, 0x0db8d7cf, 0x0348514a, 0xe78a055f, 0x00000270, 0x00000000, 0x00000000, // dsub2_then_hsub |
| 14453 | }; |
| 14454 | |
| 14455 | static const uint32_t PNRSubClassMask[] = { |
| 14456 | 0x00003400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14457 | 0xffffc800, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub |
| 14458 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1_then_psub |
| 14459 | }; |
| 14460 | |
| 14461 | static const uint32_t PPRSubClassMask[] = { |
| 14462 | 0x0007c800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14463 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14464 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14465 | }; |
| 14466 | |
| 14467 | static const uint32_t PNR_3bSubClassMask[] = { |
| 14468 | 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14469 | 0x15028000, 0x00000015, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub |
| 14470 | 0x54400000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1_then_psub |
| 14471 | }; |
| 14472 | |
| 14473 | static const uint32_t PNR_p8to15SubClassMask[] = { |
| 14474 | 0x00002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14475 | 0x2a050000, 0x0000002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub |
| 14476 | 0xa8800000, 0x00000018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1_then_psub |
| 14477 | }; |
| 14478 | |
| 14479 | static const uint32_t PPRMul2SubClassMask[] = { |
| 14480 | 0x00064000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14481 | 0x30100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14482 | 0xc0200000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14483 | }; |
| 14484 | |
| 14485 | static const uint32_t PPR_3bSubClassMask[] = { |
| 14486 | 0x00028000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14487 | 0x15000000, 0x00000015, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14488 | 0x54400000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14489 | }; |
| 14490 | |
| 14491 | static const uint32_t PPR_p8to15SubClassMask[] = { |
| 14492 | 0x00050000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14493 | 0x2a000000, 0x0000002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14494 | 0xa8800000, 0x00000018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14495 | }; |
| 14496 | |
| 14497 | static const uint32_t PPRMul2_and_PPR_3bSubClassMask[] = { |
| 14498 | 0x00020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14499 | 0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14500 | 0x40000000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14501 | }; |
| 14502 | |
| 14503 | static const uint32_t PPRMul2_and_PPR_p8to15SubClassMask[] = { |
| 14504 | 0x00040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14505 | 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 |
| 14506 | 0x80000000, 0x00000018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 |
| 14507 | }; |
| 14508 | |
| 14509 | static const uint32_t PPR2SubClassMask[] = { |
| 14510 | 0xfff80000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14511 | }; |
| 14512 | |
| 14513 | static const uint32_t PPR2Mul2SubClassMask[] = { |
| 14514 | 0x30100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14515 | }; |
| 14516 | |
| 14517 | static const uint32_t PPR2_with_psub1_in_PPRMul2SubClassMask[] = { |
| 14518 | 0xc0200000, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14519 | }; |
| 14520 | |
| 14521 | static const uint32_t PPR2_with_psub1_in_PPR_3bSubClassMask[] = { |
| 14522 | 0x54400000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14523 | }; |
| 14524 | |
| 14525 | static const uint32_t PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { |
| 14526 | 0xa8800000, 0x00000018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14527 | }; |
| 14528 | |
| 14529 | static const uint32_t PPR2_with_psub_in_PNR_3bSubClassMask[] = { |
| 14530 | 0x15000000, 0x00000015, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14531 | }; |
| 14532 | |
| 14533 | static const uint32_t PPR2_with_psub_in_PNR_p8to15SubClassMask[] = { |
| 14534 | 0x2a000000, 0x0000002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14535 | }; |
| 14536 | |
| 14537 | static const uint32_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bSubClassMask[] = { |
| 14538 | 0x14000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14539 | }; |
| 14540 | |
| 14541 | static const uint32_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { |
| 14542 | 0x28000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14543 | }; |
| 14544 | |
| 14545 | static const uint32_t PPR2Mul2_and_PPR2_with_psub_in_PNR_3bSubClassMask[] = { |
| 14546 | 0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14547 | }; |
| 14548 | |
| 14549 | static const uint32_t PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15SubClassMask[] = { |
| 14550 | 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14551 | }; |
| 14552 | |
| 14553 | static const uint32_t PPR2_with_psub1_in_PPRMul2_and_PPR_3bSubClassMask[] = { |
| 14554 | 0x40000000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14555 | }; |
| 14556 | |
| 14557 | static const uint32_t PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15SubClassMask[] = { |
| 14558 | 0x80000000, 0x00000018, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14559 | }; |
| 14560 | |
| 14561 | static const uint32_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2SubClassMask[] = { |
| 14562 | 0x00000000, 0x00000015, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14563 | }; |
| 14564 | |
| 14565 | static const uint32_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2SubClassMask[] = { |
| 14566 | 0x00000000, 0x0000002a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14567 | }; |
| 14568 | |
| 14569 | static const uint32_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bSubClassMask[] = { |
| 14570 | 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14571 | }; |
| 14572 | |
| 14573 | static const uint32_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15SubClassMask[] = { |
| 14574 | 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14575 | }; |
| 14576 | |
| 14577 | static const uint32_t PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { |
| 14578 | 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14579 | }; |
| 14580 | |
| 14581 | static const uint32_t PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bSubClassMask[] = { |
| 14582 | 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14583 | }; |
| 14584 | |
| 14585 | static const uint32_t GPR32allSubClassMask[] = { |
| 14586 | 0x00000000, 0x00017740, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14587 | 0x00000000, 0xff400000, 0x07ffa3fa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32 |
| 14588 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14589 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14590 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7_then_sub_32 |
| 14591 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32 |
| 14592 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5_then_sub_32 |
| 14593 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32 |
| 14594 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3_then_sub_32 |
| 14595 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32 |
| 14596 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1_then_sub_32 |
| 14597 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14598 | }; |
| 14599 | |
| 14600 | static const uint32_t FPR32SubClassMask[] = { |
| 14601 | 0x00000000, 0x00000880, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14602 | 0x00000000, 0x00800000, 0xb8005c01, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // ssub |
| 14603 | 0x00000000, 0x00000000, 0x00005c00, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub1_then_ssub |
| 14604 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub3_then_ssub |
| 14605 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub2_then_ssub |
| 14606 | }; |
| 14607 | |
| 14608 | static const uint32_t GPR32SubClassMask[] = { |
| 14609 | 0x00000000, 0x00007500, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14610 | 0x00000000, 0xfd000000, 0x07ffa2da, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32 |
| 14611 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14612 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14613 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7_then_sub_32 |
| 14614 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32 |
| 14615 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5_then_sub_32 |
| 14616 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32 |
| 14617 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3_then_sub_32 |
| 14618 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32 |
| 14619 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1_then_sub_32 |
| 14620 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14621 | }; |
| 14622 | |
| 14623 | static const uint32_t GPR32spSubClassMask[] = { |
| 14624 | 0x00000000, 0x00017600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14625 | 0x00000000, 0xf6000000, 0x07ffa3fa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32 |
| 14626 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14627 | 0x00000000, 0x003c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14628 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7_then_sub_32 |
| 14629 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32 |
| 14630 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5_then_sub_32 |
| 14631 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32 |
| 14632 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3_then_sub_32 |
| 14633 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32 |
| 14634 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1_then_sub_32 |
| 14635 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14636 | }; |
| 14637 | |
| 14638 | static const uint32_t GPR32commonSubClassMask[] = { |
| 14639 | 0x00000000, 0x00007400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14640 | 0x00000000, 0xf4000000, 0x07ffa2da, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32 |
| 14641 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14642 | 0x00000000, 0x003c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14643 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7_then_sub_32 |
| 14644 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32 |
| 14645 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5_then_sub_32 |
| 14646 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32 |
| 14647 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3_then_sub_32 |
| 14648 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32 |
| 14649 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1_then_sub_32 |
| 14650 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14651 | }; |
| 14652 | |
| 14653 | static const uint32_t FPR32_with_hsub_in_FPR16_loSubClassMask[] = { |
| 14654 | 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14655 | 0x00000000, 0x00000000, 0x20004801, 0x522a4b2b, 0x00b35c90, 0x5980b45f, 0x3d420c41, 0x84f2c020, 0xc02f1c02, 0xd49020f0, 0x30008209, 0x0db855c1, 0x0178000a, 0x2f80015f, 0x000003f0, 0x00000000, 0x00000000, // ssub |
| 14656 | 0x00000000, 0x00000000, 0x00005000, 0x764e8000, 0x22b75988, 0x58b0b45d, 0x7f848551, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028619, 0x0db8d7c7, 0x0368014a, 0x6782015f, 0x00000370, 0x00000000, 0x00000000, // dsub1_then_ssub |
| 14657 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201e79, 0x0db8d74f, 0x070b514a, 0xe7aa1d5f, 0x00000071, 0x00000000, 0x00000000, // dsub3_then_ssub |
| 14658 | 0x00000000, 0x00000000, 0x00000000, 0x7c8d0000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220e39, 0x0db8d7cf, 0x0348514a, 0xe78a055f, 0x00000270, 0x00000000, 0x00000000, // dsub2_then_ssub |
| 14659 | }; |
| 14660 | |
| 14661 | static const uint32_t GPR32argSubClassMask[] = { |
| 14662 | 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14663 | 0x00000000, 0x00000000, 0x00400002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // sub_32 |
| 14664 | 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14665 | 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14666 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_7_then_sub_32 |
| 14667 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6_then_sub_32 |
| 14668 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_5_then_sub_32 |
| 14669 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_4_then_sub_32 |
| 14670 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_3_then_sub_32 |
| 14671 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_2_then_sub_32 |
| 14672 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // x8sub_1_then_sub_32 |
| 14673 | 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14674 | }; |
| 14675 | |
| 14676 | static const uint32_t MatrixIndexGPR32_12_15SubClassMask[] = { |
| 14677 | 0x00000000, 0x00002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14678 | 0x00000000, 0x00000000, 0x00800008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // sub_32 |
| 14679 | 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14680 | 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14681 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_7_then_sub_32 |
| 14682 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_6_then_sub_32 |
| 14683 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_5_then_sub_32 |
| 14684 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_4_then_sub_32 |
| 14685 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_3_then_sub_32 |
| 14686 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_2_then_sub_32 |
| 14687 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // x8sub_1_then_sub_32 |
| 14688 | 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14689 | }; |
| 14690 | |
| 14691 | static const uint32_t MatrixIndexGPR32_8_11SubClassMask[] = { |
| 14692 | 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14693 | 0x00000000, 0x00000000, 0x01000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // sub_32 |
| 14694 | 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 |
| 14695 | 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 |
| 14696 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_7_then_sub_32 |
| 14697 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_6_then_sub_32 |
| 14698 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_5_then_sub_32 |
| 14699 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_4_then_sub_32 |
| 14700 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_3_then_sub_32 |
| 14701 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_2_then_sub_32 |
| 14702 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_1_then_sub_32 |
| 14703 | 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 |
| 14704 | }; |
| 14705 | |
| 14706 | static const uint32_t CCRSubClassMask[] = { |
| 14707 | 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14708 | }; |
| 14709 | |
| 14710 | static const uint32_t GPR32sponlySubClassMask[] = { |
| 14711 | 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14712 | 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32 |
| 14713 | }; |
| 14714 | |
| 14715 | static const uint32_t WSeqPairsClassSubClassMask[] = { |
| 14716 | 0x00000000, 0x003e0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14717 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32_x8sub_1_then_sub_32 |
| 14718 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 14719 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 14720 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 14721 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 |
| 14722 | }; |
| 14723 | |
| 14724 | static const uint32_t WSeqPairsClass_with_subo32_in_GPR32commonSubClassMask[] = { |
| 14725 | 0x00000000, 0x003c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14726 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // sub_32_x8sub_1_then_sub_32 |
| 14727 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 14728 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 14729 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 14730 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 |
| 14731 | }; |
| 14732 | |
| 14733 | static const uint32_t WSeqPairsClass_with_sube32_in_GPR32argSubClassMask[] = { |
| 14734 | 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14735 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // sub_32_x8sub_1_then_sub_32 |
| 14736 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 14737 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 14738 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 14739 | 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 |
| 14740 | }; |
| 14741 | |
| 14742 | static const uint32_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15SubClassMask[] = { |
| 14743 | 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14744 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // sub_32_x8sub_1_then_sub_32 |
| 14745 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 14746 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 14747 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 14748 | 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 |
| 14749 | }; |
| 14750 | |
| 14751 | static const uint32_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 14752 | 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14753 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // sub_32_x8sub_1_then_sub_32 |
| 14754 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 14755 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 14756 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 14757 | 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 |
| 14758 | }; |
| 14759 | |
| 14760 | static const uint32_t GPR64allSubClassMask[] = { |
| 14761 | 0x00000000, 0xff400000, 0x000003fa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14762 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14763 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14764 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0 |
| 14765 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1 |
| 14766 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2 |
| 14767 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3 |
| 14768 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4 |
| 14769 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5 |
| 14770 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6 |
| 14771 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7 |
| 14772 | }; |
| 14773 | |
| 14774 | static const uint32_t FPR64SubClassMask[] = { |
| 14775 | 0x00000000, 0x00800000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14776 | 0x00000000, 0x00000000, 0xb8000000, 0x80001fff, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub |
| 14777 | 0x00000000, 0x00000000, 0x00005c00, 0x7fffe000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0 |
| 14778 | 0x00000000, 0x00000000, 0x00005c00, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub1 |
| 14779 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub2 |
| 14780 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // dsub3 |
| 14781 | }; |
| 14782 | |
| 14783 | static const uint32_t GPR64SubClassMask[] = { |
| 14784 | 0x00000000, 0xfd000000, 0x000002da, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14785 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14786 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14787 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0 |
| 14788 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1 |
| 14789 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2 |
| 14790 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3 |
| 14791 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4 |
| 14792 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5 |
| 14793 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6 |
| 14794 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7 |
| 14795 | }; |
| 14796 | |
| 14797 | static const uint32_t GPR64spSubClassMask[] = { |
| 14798 | 0x00000000, 0xf6000000, 0x000003fa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14799 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14800 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14801 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0 |
| 14802 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1 |
| 14803 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2 |
| 14804 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3 |
| 14805 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4 |
| 14806 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5 |
| 14807 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6 |
| 14808 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7 |
| 14809 | }; |
| 14810 | |
| 14811 | static const uint32_t GPR64commonSubClassMask[] = { |
| 14812 | 0x00000000, 0xf4000000, 0x000002da, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14813 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14814 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14815 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0 |
| 14816 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_1 |
| 14817 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2 |
| 14818 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_3 |
| 14819 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4 |
| 14820 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_5 |
| 14821 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6 |
| 14822 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_7 |
| 14823 | }; |
| 14824 | |
| 14825 | static const uint32_t GPR64noipSubClassMask[] = { |
| 14826 | 0x00000000, 0x98000000, 0x0000009a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14827 | 0x00000000, 0x00000000, 0x05ea0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14828 | 0x00000000, 0x00000000, 0x05eb0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14829 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_0 |
| 14830 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_1 |
| 14831 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_2 |
| 14832 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_3 |
| 14833 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_4 |
| 14834 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_5 |
| 14835 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_6 |
| 14836 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_7 |
| 14837 | }; |
| 14838 | |
| 14839 | static const uint32_t GPR64common_and_GPR64noipSubClassMask[] = { |
| 14840 | 0x00000000, 0x90000000, 0x0000009a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14841 | 0x00000000, 0x00000000, 0x05ea0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14842 | 0x00000000, 0x00000000, 0x05ea0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14843 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_0 |
| 14844 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_1 |
| 14845 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_2 |
| 14846 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_3 |
| 14847 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_4 |
| 14848 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_5 |
| 14849 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_6 |
| 14850 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_7 |
| 14851 | }; |
| 14852 | |
| 14853 | static const uint32_t tcGPR64SubClassMask[] = { |
| 14854 | 0x00000000, 0xe0000000, 0x0000025a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14855 | 0x00000000, 0x00000000, 0x03fc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14856 | 0x00000000, 0x00000000, 0x03f00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14857 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x87c40000, 0xf7fffdff, 0x00001fff, // x8sub_0 |
| 14858 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, // x8sub_1 |
| 14859 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, // x8sub_2 |
| 14860 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_3 |
| 14861 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_4 |
| 14862 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_5 |
| 14863 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_6 |
| 14864 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, // x8sub_7 |
| 14865 | }; |
| 14866 | |
| 14867 | static const uint32_t tcGPRnotx16SubClassMask[] = { |
| 14868 | 0x00000000, 0xc0000000, 0x0000021a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14869 | 0x00000000, 0x00000000, 0x01e80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14870 | 0x00000000, 0x00000000, 0x03f00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14871 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xf7b99c13, 0x00001fbf, // x8sub_0 |
| 14872 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, // x8sub_1 |
| 14873 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7c0e080, 0x00001eff, // x8sub_2 |
| 14874 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_3 |
| 14875 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56980000, 0x00001bbf, // x8sub_4 |
| 14876 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_5 |
| 14877 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17000000, 0x00000ebf, // x8sub_6 |
| 14878 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, // x8sub_7 |
| 14879 | }; |
| 14880 | |
| 14881 | static const uint32_t tcGPRnotx16x17SubClassMask[] = { |
| 14882 | 0x00000000, 0x80000000, 0x0000001a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14883 | 0x00000000, 0x00000000, 0x01e80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14884 | 0x00000000, 0x00000000, 0x01e00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14885 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xf7b99c13, 0x00001fbf, // x8sub_0 |
| 14886 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_1 |
| 14887 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7c0e080, 0x00001eff, // x8sub_2 |
| 14888 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_3 |
| 14889 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56980000, 0x00001bbf, // x8sub_4 |
| 14890 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, // x8sub_5 |
| 14891 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17000000, 0x00000ebf, // x8sub_6 |
| 14892 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16000000, 0x00000abf, // x8sub_7 |
| 14893 | }; |
| 14894 | |
| 14895 | static const uint32_t FPR64_loSubClassMask[] = { |
| 14896 | 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14897 | 0x00000000, 0x00000000, 0x20000000, 0x00000b2b, 0x00b35c90, 0x5980b45f, 0x3d420c41, 0x84f2c020, 0xc02f1c02, 0xd49020f0, 0x30008209, 0x0db855c1, 0x0178000a, 0x2f80015f, 0x000003f0, 0x00000000, 0x00000000, // dsub |
| 14898 | 0x00000000, 0x00000000, 0x00004800, 0x522a4000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0 |
| 14899 | 0x00000000, 0x00000000, 0x00005000, 0x764e8000, 0x22b75988, 0x58b0b45d, 0x7f848551, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028619, 0x0db8d7c7, 0x0368014a, 0x6782015f, 0x00000370, 0x00000000, 0x00000000, // dsub1 |
| 14900 | 0x00000000, 0x00000000, 0x00000000, 0x7c8d0000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220e39, 0x0db8d7cf, 0x0348514a, 0xe78a055f, 0x00000270, 0x00000000, 0x00000000, // dsub2 |
| 14901 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201e79, 0x0db8d74f, 0x070b514a, 0xe7aa1d5f, 0x00000071, 0x00000000, 0x00000000, // dsub3 |
| 14902 | }; |
| 14903 | |
| 14904 | static const uint32_t GPR64argSubClassMask[] = { |
| 14905 | 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14906 | 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14907 | 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14908 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // x8sub_0 |
| 14909 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // x8sub_1 |
| 14910 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_2 |
| 14911 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_3 |
| 14912 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_4 |
| 14913 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_5 |
| 14914 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6 |
| 14915 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_7 |
| 14916 | }; |
| 14917 | |
| 14918 | static const uint32_t FIXED_REGSSubClassMask[] = { |
| 14919 | 0x00000000, 0x00000000, 0x000001a4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14920 | 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14921 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, // x8sub_7 |
| 14922 | }; |
| 14923 | |
| 14924 | static const uint32_t GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { |
| 14925 | 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14926 | 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14927 | 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14928 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // x8sub_0 |
| 14929 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // x8sub_1 |
| 14930 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_2 |
| 14931 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_3 |
| 14932 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_4 |
| 14933 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_5 |
| 14934 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_6 |
| 14935 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_7 |
| 14936 | }; |
| 14937 | |
| 14938 | static const uint32_t GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 14939 | 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14940 | 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14941 | 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14942 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_0 |
| 14943 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_1 |
| 14944 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_2 |
| 14945 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_3 |
| 14946 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_4 |
| 14947 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_5 |
| 14948 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_6 |
| 14949 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_7 |
| 14950 | }; |
| 14951 | |
| 14952 | static const uint32_t FIXED_REGS_with_sub_32SubClassMask[] = { |
| 14953 | 0x00000000, 0x00000000, 0x000001a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14954 | 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14955 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, // x8sub_7 |
| 14956 | }; |
| 14957 | |
| 14958 | static const uint32_t tcGPRx16x17SubClassMask[] = { |
| 14959 | 0x00000000, 0x00000000, 0x00000240, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14960 | 0x00000000, 0x00000000, 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 |
| 14961 | 0x00000000, 0x00000000, 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14962 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, // x8sub_0 |
| 14963 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, // x8sub_1 |
| 14964 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // x8sub_2 |
| 14965 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // x8sub_3 |
| 14966 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_4 |
| 14967 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_5 |
| 14968 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_6 |
| 14969 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_7 |
| 14970 | }; |
| 14971 | |
| 14972 | static const uint32_t FIXED_REGS_and_GPR64SubClassMask[] = { |
| 14973 | 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14974 | 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14975 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, // x8sub_7 |
| 14976 | }; |
| 14977 | |
| 14978 | static const uint32_t GPR64sponlySubClassMask[] = { |
| 14979 | 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14980 | }; |
| 14981 | |
| 14982 | static const uint32_t tcGPRx17SubClassMask[] = { |
| 14983 | 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14984 | 0x00000000, 0x00000000, 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 |
| 14985 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, // x8sub_1 |
| 14986 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // x8sub_3 |
| 14987 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_5 |
| 14988 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_7 |
| 14989 | }; |
| 14990 | |
| 14991 | static const uint32_t DDSubClassMask[] = { |
| 14992 | 0x00000000, 0x00000000, 0x00005c00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 14993 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 |
| 14994 | 0x00000000, 0x00000000, 0x00000000, 0x7fffe000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffbfff, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub1_dsub2 |
| 14995 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffbf00, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub2_dsub3 |
| 14996 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xfe1e1f39, 0x1dfc1f1f, 0xffffef7f, 0xffffffff, 0xffffffff, 0xffffbfff, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub_dsub1 |
| 14997 | }; |
| 14998 | |
| 14999 | static const uint32_t DD_with_dsub0_in_FPR64_loSubClassMask[] = { |
| 15000 | 0x00000000, 0x00000000, 0x00004800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15001 | 0x00000000, 0x00000000, 0x00000000, 0x522a4000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 |
| 15002 | 0x00000000, 0x00000000, 0x00000000, 0x764e8000, 0x00000000, 0x00000000, 0x7f848000, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // dsub1_dsub2 |
| 15003 | 0x00000000, 0x00000000, 0x00000000, 0x7c800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfb610800, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // dsub2_dsub3 |
| 15004 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00121c10, 0x1980141f, 0x3d420c41, 0x84f2c020, 0xc02f1c02, 0xd49020f0, 0x30008009, 0x013805c1, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // dsub_dsub1 |
| 15005 | }; |
| 15006 | |
| 15007 | static const uint32_t DD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15008 | 0x00000000, 0x00000000, 0x00005000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15009 | 0x00000000, 0x00000000, 0x00000000, 0x764e8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 |
| 15010 | 0x00000000, 0x00000000, 0x00000000, 0x7c8d0000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // dsub1_dsub2 |
| 15011 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201c79, 0x0138874f, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // dsub2_dsub3 |
| 15012 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22161908, 0x18b0141d, 0x7f848551, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1 |
| 15013 | }; |
| 15014 | |
| 15015 | static const uint32_t XSeqPairsClassSubClassMask[] = { |
| 15016 | 0x00000000, 0x00000000, 0x07ffa000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15017 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0_x8sub_1 |
| 15018 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_x8sub_3 |
| 15019 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_x8sub_5 |
| 15020 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_x8sub_7 |
| 15021 | }; |
| 15022 | |
| 15023 | static const uint32_t DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15024 | 0x00000000, 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15025 | 0x00000000, 0x00000000, 0x00000000, 0x520a0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 |
| 15026 | 0x00000000, 0x00000000, 0x00000000, 0x740c0000, 0x00000000, 0x00000000, 0x7a800000, 0x84f74081, 0xc42f042a, 0xf9200031, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // dsub1_dsub2 |
| 15027 | 0x00000000, 0x00000000, 0x00000000, 0x68000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0xd0200c39, 0x0138874f, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // dsub2_dsub3 |
| 15028 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00121800, 0x1880141d, 0x3d000441, 0x84f24020, 0xc02f1402, 0xd48000b0, 0x10008009, 0x013805c1, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1 |
| 15029 | }; |
| 15030 | |
| 15031 | static const uint32_t XSeqPairsClass_with_subo64_in_GPR64commonSubClassMask[] = { |
| 15032 | 0x00000000, 0x00000000, 0x07fe8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15033 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_0_x8sub_1 |
| 15034 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_2_x8sub_3 |
| 15035 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_4_x8sub_5 |
| 15036 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, // x8sub_6_x8sub_7 |
| 15037 | }; |
| 15038 | |
| 15039 | static const uint32_t XSeqPairsClass_with_subo64_in_GPR64noipSubClassMask[] = { |
| 15040 | 0x00000000, 0x00000000, 0x05eb0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_0_x8sub_1 |
| 15042 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_2_x8sub_3 |
| 15043 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_4_x8sub_5 |
| 15044 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_6_x8sub_7 |
| 15045 | }; |
| 15046 | |
| 15047 | static const uint32_t XSeqPairsClass_with_sube64_in_GPR64noipSubClassMask[] = { |
| 15048 | 0x00000000, 0x00000000, 0x05ea0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, // x8sub_0_x8sub_1 |
| 15050 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, // x8sub_2_x8sub_3 |
| 15051 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, // x8sub_4_x8sub_5 |
| 15052 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, // x8sub_6_x8sub_7 |
| 15053 | }; |
| 15054 | |
| 15055 | static const uint32_t XSeqPairsClass_with_sube64_in_tcGPR64SubClassMask[] = { |
| 15056 | 0x00000000, 0x00000000, 0x03fc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15057 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x87c40000, 0xf7fffdff, 0x00001fff, // x8sub_0_x8sub_1 |
| 15058 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, // x8sub_2_x8sub_3 |
| 15059 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_4_x8sub_5 |
| 15060 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_6_x8sub_7 |
| 15061 | }; |
| 15062 | |
| 15063 | static const uint32_t XSeqPairsClass_with_sube64_in_tcGPRnotx16SubClassMask[] = { |
| 15064 | 0x00000000, 0x00000000, 0x01e80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15065 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xf7b99c13, 0x00001fbf, // x8sub_0_x8sub_1 |
| 15066 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7c0e080, 0x00001eff, // x8sub_2_x8sub_3 |
| 15067 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56980000, 0x00001bbf, // x8sub_4_x8sub_5 |
| 15068 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17000000, 0x00000ebf, // x8sub_6_x8sub_7 |
| 15069 | }; |
| 15070 | |
| 15071 | static const uint32_t XSeqPairsClass_with_subo64_in_tcGPR64SubClassMask[] = { |
| 15072 | 0x00000000, 0x00000000, 0x03f00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15073 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, // x8sub_0_x8sub_1 |
| 15074 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_2_x8sub_3 |
| 15075 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_4_x8sub_5 |
| 15076 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, // x8sub_6_x8sub_7 |
| 15077 | }; |
| 15078 | |
| 15079 | static const uint32_t XSeqPairsClass_with_subo64_in_tcGPRnotx16x17SubClassMask[] = { |
| 15080 | 0x00000000, 0x00000000, 0x01e00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, // x8sub_0_x8sub_1 |
| 15082 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, // x8sub_2_x8sub_3 |
| 15083 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, // x8sub_4_x8sub_5 |
| 15084 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16000000, 0x00000abf, // x8sub_6_x8sub_7 |
| 15085 | }; |
| 15086 | |
| 15087 | static const uint32_t XSeqPairsClass_with_sube64_in_GPR64argSubClassMask[] = { |
| 15088 | 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15089 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, // x8sub_0_x8sub_1 |
| 15090 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, // x8sub_2_x8sub_3 |
| 15091 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, // x8sub_4_x8sub_5 |
| 15092 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6_x8sub_7 |
| 15093 | }; |
| 15094 | |
| 15095 | static const uint32_t XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { |
| 15096 | 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15097 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, // x8sub_0_x8sub_1 |
| 15098 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, // x8sub_2_x8sub_3 |
| 15099 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_4_x8sub_5 |
| 15100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_6_x8sub_7 |
| 15101 | }; |
| 15102 | |
| 15103 | static const uint32_t XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 15104 | 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, // x8sub_0_x8sub_1 |
| 15106 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, // x8sub_2_x8sub_3 |
| 15107 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, // x8sub_4_x8sub_5 |
| 15108 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, // x8sub_6_x8sub_7 |
| 15109 | }; |
| 15110 | |
| 15111 | static const uint32_t XSeqPairsClass_with_sube64_in_tcGPRx16x17SubClassMask[] = { |
| 15112 | 0x00000000, 0x00000000, 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, // x8sub_0_x8sub_1 |
| 15114 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, // x8sub_2_x8sub_3 |
| 15115 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_4_x8sub_5 |
| 15116 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_6_x8sub_7 |
| 15117 | }; |
| 15118 | |
| 15119 | static const uint32_t XSeqPairsClass_with_subo64_in_FIXED_REGSSubClassMask[] = { |
| 15120 | 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15121 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, // x8sub_6_x8sub_7 |
| 15122 | }; |
| 15123 | |
| 15124 | static const uint32_t FPR128SubClassMask[] = { |
| 15125 | 0x00000000, 0x00000000, 0x28000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15126 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00060818, 0x00000004, 0xe983a000, 0x00830000, 0x00000000, 0x98e03d00, 0xc0000078, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0 |
| 15127 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xffffffff, 0xffffffff, 0xffffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // qsub1 |
| 15128 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // qsub2 |
| 15129 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff00, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // qsub3 |
| 15130 | 0x00000000, 0x00000000, 0x90000000, 0x00001ffd, 0xfff9f7e7, 0xfffffffb, 0x167c4fff, 0xff7cffff, 0xffffffff, 0x671fc2ff, 0x3fffff87, 0xffdff9fe, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // zsub |
| 15131 | }; |
| 15132 | |
| 15133 | static const uint32_t ZPRSubClassMask[] = { |
| 15134 | 0x00000000, 0x00000000, 0x90000000, 0x00001ffd, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15135 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff9f7e7, 0xfffffffb, 0x167c4fff, 0xff7cffff, 0xffffffff, 0x671fc2ff, 0x3fffff87, 0xffdff9fe, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // zsub0 |
| 15136 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff9f7e7, 0xfffffffb, 0x167c4fff, 0xff7cffff, 0xffffffff, 0x671fc2ff, 0x3fffff87, 0xffdff9fe, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // zsub1 |
| 15137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x167c4000, 0xff7cffff, 0xffffffff, 0x671fc2ff, 0x3fffff87, 0xffdff9fe, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // zsub2 |
| 15138 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671fc200, 0x3fffff87, 0xffdff9fe, 0xffffffff, 0xffffffff, 0x000003ff, 0x00000000, 0x00000000, // zsub3 |
| 15139 | }; |
| 15140 | |
| 15141 | static const uint32_t FPR128_loSubClassMask[] = { |
| 15142 | 0x00000000, 0x00000000, 0x20000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15143 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020810, 0x00000004, 0x29020000, 0x00820000, 0x00000000, 0x90802000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0 |
| 15144 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22b75988, 0x58b0b45d, 0x7f848551, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028619, 0x0db8d7c7, 0x0368014a, 0x6782015f, 0x00000370, 0x00000000, 0x00000000, // qsub1 |
| 15145 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220e39, 0x0db8d7cf, 0x0348514a, 0xe78a055f, 0x00000270, 0x00000000, 0x00000000, // qsub2 |
| 15146 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201e79, 0x0db8d74f, 0x070b514a, 0xe7aa1d5f, 0x00000071, 0x00000000, 0x00000000, // qsub3 |
| 15147 | 0x00000000, 0x00000000, 0x00000000, 0x00000b29, 0x00b15480, 0x5980b45b, 0x14400c41, 0x8470c020, 0xc02f1c02, 0x441000f0, 0x30008201, 0x0d9851c0, 0x0178000a, 0x2f80015f, 0x000003f0, 0x00000000, 0x00000000, // zsub |
| 15148 | }; |
| 15149 | |
| 15150 | static const uint32_t MPR128SubClassMask[] = { |
| 15151 | 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15152 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubq0 |
| 15153 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubq1 |
| 15154 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubd1_then_zasubq0 |
| 15155 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubd1_then_zasubq1 |
| 15156 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubq0 |
| 15157 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubq1 |
| 15158 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubd1_then_zasubq0 |
| 15159 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubd1_then_zasubq1 |
| 15160 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubq0 |
| 15161 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubq1 |
| 15162 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubd1_then_zasubq0 |
| 15163 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubd1_then_zasubq1 |
| 15164 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubq0 |
| 15165 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubq1 |
| 15166 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 15167 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 15168 | }; |
| 15169 | |
| 15170 | static const uint32_t ZPRMul2SubClassMask[] = { |
| 15171 | 0x00000000, 0x00000000, 0x80000000, 0x00001f9c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15172 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0538e024, 0xe201fee0, 0x00100083, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c086, 0x16c01910, 0x31a0781f, 0xb11903ea, 0x00000128, 0x00000000, 0x00000000, // zsub0 |
| 15173 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71000200, 0xfdfdc012, 0x00200ffc, 0x082081c0, 0x4d852c3c, 0x00080055, 0x27070000, 0x501000a4, 0xca5f83e0, 0x7ee6f395, 0x000002d7, 0x00000000, 0x00000000, // zsub1 |
| 15174 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c086, 0x16c01910, 0x31a0781f, 0xb11903ea, 0x00000128, 0x00000000, 0x00000000, // zsub2 |
| 15175 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x27070000, 0x501000a4, 0xca5f83e0, 0x7ee6f395, 0x000002d7, 0x00000000, 0x00000000, // zsub3 |
| 15176 | }; |
| 15177 | |
| 15178 | static const uint32_t ZPR_4bSubClassMask[] = { |
| 15179 | 0x00000000, 0x00000000, 0x00000000, 0x00000b29, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15180 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00b15480, 0x5980b45b, 0x14400c41, 0x8470c020, 0xc02f1c02, 0x441000f0, 0x30008201, 0x0d9851c0, 0x0178000a, 0x2f80015f, 0x000003f0, 0x00000000, 0x00000000, // zsub0 |
| 15181 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22b15180, 0x58b0b459, 0x16040551, 0x847440a1, 0xc42f142a, 0x650080b1, 0x10028601, 0x0d98d1c6, 0x0368014a, 0x6782015f, 0x00000370, 0x00000000, 0x00000000, // zsub1 |
| 15182 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12080000, 0x84744883, 0xd43f05aa, 0x63010033, 0x10220e01, 0x0d98d1ce, 0x0348514a, 0xe78a055f, 0x00000270, 0x00000000, 0x00000000, // zsub2 |
| 15183 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22020000, 0x12201e01, 0x0d98d14e, 0x070b514a, 0xe7aa1d5f, 0x00000071, 0x00000000, 0x00000000, // zsub3 |
| 15184 | }; |
| 15185 | |
| 15186 | static const uint32_t FPR128_0to7SubClassMask[] = { |
| 15187 | 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15188 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00000004, 0x20000000, 0x00820000, 0x00000000, 0x00000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0 |
| 15189 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02040000, 0x0820100c, 0x40000511, 0x04970001, 0x84230022, 0x00000031, 0x40000410, 0x0d28c643, 0x03000108, 0x67020143, 0x00000070, 0x00000000, 0x00000000, // qsub1 |
| 15190 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x04850002, 0x14330120, 0x00000033, 0xc0000820, 0x0128860a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // qsub2 |
| 15191 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80001040, 0x01208208, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // qsub3 |
| 15192 | 0x00000000, 0x00000000, 0x00000000, 0x00000a20, 0x00a10000, 0x4880b009, 0x00000441, 0x04104000, 0xc0230402, 0x00000030, 0x10000000, 0x0d084040, 0x01080008, 0x27800143, 0x00000070, 0x00000000, 0x00000000, // zsub |
| 15193 | }; |
| 15194 | |
| 15195 | static const uint32_t ZPRMul2_HiSubClassMask[] = { |
| 15196 | 0x00000000, 0x00000000, 0x00000000, 0x00001484, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15197 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00082000, 0xa2004aa0, 0x00000082, 0x60080010, 0x2240c201, 0x0000000a, 0x00004000, 0x02400810, 0x30802015, 0x901100a0, 0x00000008, 0x00000000, 0x00000000, // zsub0 |
| 15198 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0xa4484000, 0x00000aa4, 0x00000040, 0x09002014, 0x00000044, 0x00010000, 0x00000020, 0xc80402a0, 0x1044a080, 0x00000087, 0x00000000, 0x00000000, // zsub1 |
| 15199 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20080400, 0x2040c240, 0x00000088, 0x00100000, 0x02400810, 0x30802801, 0x101000a0, 0x00000108, 0x00000000, 0x00000000, // zsub2 |
| 15200 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0xc0048020, 0x18448080, 0x00000286, 0x00000000, 0x00000000, // zsub3 |
| 15201 | }; |
| 15202 | |
| 15203 | static const uint32_t ZPRMul2_LoSubClassMask[] = { |
| 15204 | 0x00000000, 0x00000000, 0x00000000, 0x00000b08, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15205 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00304000, 0x4000b440, 0x00000001, 0x80400020, 0x802a1002, 0x000000a0, 0x00008000, 0x04801100, 0x0120000a, 0x2100014a, 0x00000120, 0x00000000, 0x00000000, // zsub0 |
| 15206 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x58b08010, 0x00000550, 0x00200080, 0x44050428, 0x00000011, 0x00020000, 0x00100084, 0x02480140, 0x66820115, 0x00000250, 0x00000000, 0x00000000, // zsub1 |
| 15207 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400800, 0x902a0182, 0x00000022, 0x00200000, 0x04801100, 0x0100500a, 0xa108014a, 0x00000020, 0x00000000, 0x00000000, // zsub2 |
| 15208 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00100004, 0x020b0140, 0x66a21115, 0x00000051, 0x00000000, 0x00000000, // zsub3 |
| 15209 | }; |
| 15210 | |
| 15211 | static const uint32_t ZPRMul4SubClassMask[] = { |
| 15212 | 0x00000000, 0x00000000, 0x00000000, 0x00001990, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15213 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04008000, 0x62012660, 0x00000083, 0xa0000004, 0x00600000, 0x00000000, 0x00000084, 0x00c00000, 0x01800003, 0x30000260, 0x00000000, 0x00000000, 0x00000000, // zsub0 |
| 15214 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x71190000, 0x00000ff8, 0x00000100, 0x4c84080c, 0x00000055, 0x00040000, 0x00000000, 0x00100060, 0x70864204, 0x00000092, 0x00000000, 0x00000000, // zsub1 |
| 15215 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40001000, 0xb20850c0, 0x000000aa, 0x00400000, 0x00000000, 0x10201810, 0xb1190208, 0x00000128, 0x00000000, 0x00000000, // zsub2 |
| 15216 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x40418200, 0x34602210, 0x00000245, 0x00000000, 0x00000000, // zsub3 |
| 15217 | }; |
| 15218 | |
| 15219 | static const uint32_t ZPR_3bSubClassMask[] = { |
| 15220 | 0x00000000, 0x00000000, 0x00000000, 0x00000a20, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15221 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00a10000, 0x4880b009, 0x00000441, 0x04104000, 0xc0230402, 0x00000030, 0x10000000, 0x0d084040, 0x01080008, 0x27800143, 0x00000070, 0x00000000, 0x00000000, // zsub0 |
| 15222 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x08201008, 0x00000511, 0x04140001, 0x84230022, 0x00000031, 0x00000400, 0x0d08c042, 0x03000108, 0x67020143, 0x00000070, 0x00000000, 0x00000000, // zsub1 |
| 15223 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040002, 0x14330120, 0x00000033, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub2 |
| 15224 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x01008008, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // zsub3 |
| 15225 | }; |
| 15226 | |
| 15227 | static const uint32_t ZPR_KSubClassMask[] = { |
| 15228 | 0x00000000, 0x00000000, 0x00000000, 0x00001440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15229 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08400000, 0x86060980, 0x0000038e, 0x19000008, 0x03d0a001, 0x0000000f, 0x00002000, 0xc0010000, 0x2c000004, 0xc001fc20, 0x0000000f, 0x00000000, 0x00000000, // zsub0 |
| 15230 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x82420980, 0x000000a6, 0x13000200, 0x0b408011, 0x0000000a, 0x00080000, 0xa2032000, 0xa0800484, 0x900528a0, 0x0000000d, 0x00000000, 0x00000000, // zsub1 |
| 15231 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12002000, 0x29400210, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, // zsub2 |
| 15232 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x22042000, 0x00842400, 0x105400a0, 0x00000000, 0x00000000, 0x00000000, // zsub3 |
| 15233 | }; |
| 15234 | |
| 15235 | static const uint32_t ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 15236 | 0x00000000, 0x00000000, 0x00000000, 0x00001080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15237 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000220, 0x00000082, 0x20000000, 0x00400000, 0x00000000, 0x00000000, 0x00400000, 0x00800001, 0x10000020, 0x00000000, 0x00000000, 0x00000000, // zsub0 |
| 15238 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20080000, 0x00000aa0, 0x00000000, 0x08000004, 0x00000044, 0x00000000, 0x00000000, 0x00000020, 0x10040000, 0x00000082, 0x00000000, 0x00000000, // zsub1 |
| 15239 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20004040, 0x00000088, 0x00000000, 0x00000000, 0x10000800, 0x10100000, 0x00000108, 0x00000000, 0x00000000, // zsub2 |
| 15240 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40008000, 0x10400000, 0x00000204, 0x00000000, 0x00000000, // zsub3 |
| 15241 | }; |
| 15242 | |
| 15243 | static const uint32_t ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 15244 | 0x00000000, 0x00000000, 0x00000000, 0x00000900, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15245 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40002440, 0x00000001, 0x80000000, 0x00200000, 0x00000000, 0x00000000, 0x00800000, 0x01000002, 0x20000040, 0x00000000, 0x00000000, 0x00000000, // zsub0 |
| 15246 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100000, 0x00000550, 0x00000000, 0x44040008, 0x00000011, 0x00000000, 0x00000000, 0x00000040, 0x60820004, 0x00000010, 0x00000000, 0x00000000, // zsub1 |
| 15247 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90080080, 0x00000022, 0x00000000, 0x00000000, 0x00001000, 0xa1080008, 0x00000020, 0x00000000, 0x00000000, // zsub2 |
| 15248 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x24200010, 0x00000041, 0x00000000, 0x00000000, // zsub3 |
| 15249 | }; |
| 15250 | |
| 15251 | static const uint32_t ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 15252 | 0x00000000, 0x00000000, 0x00000000, 0x00000a00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15253 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x4000b000, 0x00000001, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x04000000, 0x01000008, 0x21000142, 0x00000020, 0x00000000, 0x00000000, // zsub0 |
| 15254 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08200000, 0x00000510, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x02000100, 0x66020101, 0x00000050, 0x00000000, 0x00000000, // zsub1 |
| 15255 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10220100, 0x00000022, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub2 |
| 15256 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02020000, 0x42221000, 0x00000051, 0x00000000, 0x00000000, // zsub3 |
| 15257 | }; |
| 15258 | |
| 15259 | static const uint32_t ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 15260 | 0x00000000, 0x00000000, 0x00000000, 0x00001400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15261 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000880, 0x00000082, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub0 |
| 15262 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x000000a4, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x10042080, 0x00000005, 0x00000000, 0x00000000, // zsub1 |
| 15263 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20400200, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub2 |
| 15264 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x10440080, 0x00000000, 0x00000000, 0x00000000, // zsub3 |
| 15265 | }; |
| 15266 | |
| 15267 | static const uint32_t ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 15268 | 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15269 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40002000, 0x00000001, 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x20000040, 0x00000000, 0x00000000, 0x00000000, // zsub0 |
| 15270 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000510, 0x00000000, 0x04000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x60020000, 0x00000010, 0x00000000, 0x00000000, // zsub1 |
| 15271 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub2 |
| 15272 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000041, 0x00000000, 0x00000000, // zsub3 |
| 15273 | }; |
| 15274 | |
| 15275 | static const uint32_t ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 15276 | 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15277 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00000082, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0 |
| 15278 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000000a0, 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10040000, 0x00000000, 0x00000000, 0x00000000, // zsub1 |
| 15279 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub2 |
| 15280 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10400000, 0x00000000, 0x00000000, 0x00000000, // zsub3 |
| 15281 | }; |
| 15282 | |
| 15283 | static const uint32_t DDDSubClassMask[] = { |
| 15284 | 0x00000000, 0x00000000, 0x00000000, 0x000fe000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15285 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15286 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffbf00, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15287 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffbfff, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15288 | }; |
| 15289 | |
| 15290 | static const uint32_t DDD_with_dsub0_in_FPR64_loSubClassMask[] = { |
| 15291 | 0x00000000, 0x00000000, 0x00000000, 0x000a4000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15292 | 0x00000000, 0x00000000, 0x00000000, 0x52200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15293 | 0x00000000, 0x00000000, 0x00000000, 0x76400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfda08400, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15294 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3d420000, 0x84f2c020, 0xc02f1c02, 0xd49020f0, 0x30008009, 0x013805c1, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15295 | }; |
| 15296 | |
| 15297 | static const uint32_t DDD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15298 | 0x00000000, 0x00000000, 0x00000000, 0x000e8000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15299 | 0x00000000, 0x00000000, 0x00000000, 0x76400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15300 | 0x00000000, 0x00000000, 0x00000000, 0x7c800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfb610800, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15301 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7f848000, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15302 | }; |
| 15303 | |
| 15304 | static const uint32_t DDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15305 | 0x00000000, 0x00000000, 0x00000000, 0x000d0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15306 | 0x00000000, 0x00000000, 0x00000000, 0x7c800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15307 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201c79, 0x0138874f, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15308 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15309 | }; |
| 15310 | |
| 15311 | static const uint32_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15312 | 0x00000000, 0x00000000, 0x00000000, 0x000a0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15313 | 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15314 | 0x00000000, 0x00000000, 0x00000000, 0x74000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf9200000, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15315 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3d000000, 0x84f24020, 0xc02f1402, 0xd48000b0, 0x10008009, 0x013805c1, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15316 | }; |
| 15317 | |
| 15318 | static const uint32_t DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15319 | 0x00000000, 0x00000000, 0x00000000, 0x000c0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15320 | 0x00000000, 0x00000000, 0x00000000, 0x74000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15321 | 0x00000000, 0x00000000, 0x00000000, 0x68000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0xd0200c39, 0x0138874f, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15322 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7a800000, 0x84f74081, 0xc42f042a, 0xf9200031, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15323 | }; |
| 15324 | |
| 15325 | static const uint32_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15326 | 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15327 | 0x00000000, 0x00000000, 0x00000000, 0x50000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 |
| 15328 | 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x50000419, 0x01388747, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 |
| 15329 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x38000000, 0x84f24000, 0xc02f0402, 0xd0000030, 0x10000009, 0x013805c1, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2 |
| 15330 | }; |
| 15331 | |
| 15332 | static const uint32_t DDDDSubClassMask[] = { |
| 15333 | 0x00000000, 0x00000000, 0x00000000, 0x7ff00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15334 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffbf00, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15335 | }; |
| 15336 | |
| 15337 | static const uint32_t DDDD_with_dsub0_in_FPR64_loSubClassMask[] = { |
| 15338 | 0x00000000, 0x00000000, 0x00000000, 0x52200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15339 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd4902000, 0x30008009, 0x013805c1, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15340 | }; |
| 15341 | |
| 15342 | static const uint32_t DDDD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15343 | 0x00000000, 0x00000000, 0x00000000, 0x76400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15344 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfda08400, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15345 | }; |
| 15346 | |
| 15347 | static const uint32_t DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15348 | 0x00000000, 0x00000000, 0x00000000, 0x7c800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15349 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfb610800, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15350 | }; |
| 15351 | |
| 15352 | static const uint32_t DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 15353 | 0x00000000, 0x00000000, 0x00000000, 0x69000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15354 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201c79, 0x0138874f, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15355 | }; |
| 15356 | |
| 15357 | static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15358 | 0x00000000, 0x00000000, 0x00000000, 0x52000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15359 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd4800000, 0x10008009, 0x013805c1, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15360 | }; |
| 15361 | |
| 15362 | static const uint32_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15363 | 0x00000000, 0x00000000, 0x00000000, 0x74000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15364 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf9200000, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15365 | }; |
| 15366 | |
| 15367 | static const uint32_t DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 15368 | 0x00000000, 0x00000000, 0x00000000, 0x68000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15369 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0xd0200c39, 0x0138874f, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15370 | }; |
| 15371 | |
| 15372 | static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15373 | 0x00000000, 0x00000000, 0x00000000, 0x50000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15374 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd0000000, 0x10000009, 0x013805c1, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15375 | }; |
| 15376 | |
| 15377 | static const uint32_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 15378 | 0x00000000, 0x00000000, 0x00000000, 0x60000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15379 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x50000419, 0x01388747, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15380 | }; |
| 15381 | |
| 15382 | static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 15383 | 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15384 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x10000009, 0x01380541, 0x0008000a, 0x0780005f, 0x00000070, 0x00000000, 0x00000000, // dsub_dsub1_dsub2_dsub3 |
| 15385 | }; |
| 15386 | |
| 15387 | static const uint32_t QQSubClassMask[] = { |
| 15388 | 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00060818, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15389 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe983a000, 0x00830000, 0x00000000, 0x98e03d00, 0xc0000078, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15390 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffe000, 0xffffffff, 0xffffffff, 0xffffbfff, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15391 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffbf00, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15392 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe181721, 0x1dfc1f1b, 0x167c4f7f, 0xff7cffff, 0xffffffff, 0x671f82ff, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15393 | }; |
| 15394 | |
| 15395 | static const uint32_t ZPR2SubClassMask[] = { |
| 15396 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe181721, 0x1dfc1f1b, 0x00000f7f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15397 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x167c4000, 0xff7cffff, 0xffffffff, 0x671f82ff, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15398 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x167c4000, 0xff7cffff, 0xffffffff, 0x671f82ff, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15399 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671f8200, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15400 | }; |
| 15401 | |
| 15402 | static const uint32_t ZPR2StridedOrContiguousSubClassMask[] = { |
| 15403 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x05f9e0e6, 0xe203fee0, 0x00000083, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15404 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15405 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x082081c0, 0x4d852c3c, 0x00080055, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15406 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15407 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x38000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15408 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x38000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15409 | }; |
| 15410 | |
| 15411 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2SubClassMask[] = { |
| 15412 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0538e024, 0xe201fee0, 0x00000083, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15413 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15414 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x082081c0, 0x4d852c3c, 0x00080055, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15415 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15416 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15417 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15418 | }; |
| 15419 | |
| 15420 | static const uint32_t QQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15421 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00060808, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15422 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x69808000, 0x00830000, 0x00000000, 0x98a00400, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15423 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfa890000, 0x84f74883, 0xd43f05aa, 0xfb610833, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15424 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201c79, 0x0138874f, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15425 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22101100, 0x18b01419, 0x16040551, 0x847440a1, 0xc42f142a, 0x650080b1, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15426 | }; |
| 15427 | |
| 15428 | static const uint32_t QQ_with_qsub0_in_FPR128_loSubClassMask[] = { |
| 15429 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020810, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15430 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x29020000, 0x00820000, 0x00000000, 0x90802000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15431 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7f848000, 0x84f740a1, 0xc42f142a, 0xfda084b1, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15432 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfb610800, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15433 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00101400, 0x1980141b, 0x14400c41, 0x8470c020, 0xc02f1c02, 0x441000f0, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15434 | }; |
| 15435 | |
| 15436 | static const uint32_t ZPR2Mul2SubClassMask[] = { |
| 15437 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04180020, 0x00001e00, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15438 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15439 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x082081c0, 0x4d852c3c, 0x00080055, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15440 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15441 | }; |
| 15442 | |
| 15443 | static const uint32_t ZPR2StridedSubClassMask[] = { |
| 15444 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01800040, 0xe003c000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15445 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x38000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15446 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x38000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15447 | }; |
| 15448 | |
| 15449 | static const uint32_t ZPR2StridedOrContiguous_with_dsub_in_FPR64_loSubClassMask[] = { |
| 15450 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00b14080, 0x4000b440, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15451 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400020, 0x802a1002, 0x000000a0, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15452 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200080, 0x44050428, 0x00000011, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15453 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15454 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15455 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15456 | }; |
| 15457 | |
| 15458 | static const uint32_t ZPR2_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15459 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22101100, 0x18b01419, 0x00000551, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15460 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16040000, 0x847440a1, 0xc42f142a, 0x650080b1, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15461 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12080000, 0x84744883, 0xd43f05aa, 0x63010033, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15462 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22020000, 0x12201c01, 0x0118814e, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15463 | }; |
| 15464 | |
| 15465 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 15466 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x70000200, 0x1dfc0012, 0x00000f7c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15467 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x082081c0, 0x4d852c3c, 0x00080055, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15468 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000400aa, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15469 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15470 | }; |
| 15471 | |
| 15472 | static const uint32_t ZPR2_with_zsub_in_FPR128_loSubClassMask[] = { |
| 15473 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00101400, 0x1980141b, 0x00000c41, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15474 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14400000, 0x8470c020, 0xc02f1c02, 0x441000f0, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15475 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16040000, 0x847440a1, 0xc42f142a, 0x650080b1, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15476 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x63010000, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15477 | }; |
| 15478 | |
| 15479 | static const uint32_t QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15480 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020800, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15481 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x29000000, 0x00820000, 0x00000000, 0x90800000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15482 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7a800000, 0x84f74081, 0xc42f042a, 0xf9200031, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15483 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0xd0200c39, 0x0138874f, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15484 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00101000, 0x18801419, 0x14000441, 0x84704020, 0xc02f1402, 0x440000b0, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15485 | }; |
| 15486 | |
| 15487 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15488 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00101000, 0x18801419, 0x00000441, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15489 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x84704020, 0xc02f1402, 0x440000b0, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15490 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x84744081, 0xc42f042a, 0x61000031, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15491 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000000, 0x10200c01, 0x0118814e, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15492 | }; |
| 15493 | |
| 15494 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSubClassMask[] = { |
| 15495 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00082000, 0xa2004aa0, 0x00000082, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15496 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60080010, 0x2240c201, 0x0000000a, 0x00004000, 0x00000010, 0x30002015, 0x80110020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15497 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x09002014, 0x00000044, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15498 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15499 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15500 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15501 | }; |
| 15502 | |
| 15503 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSubClassMask[] = { |
| 15504 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00304000, 0x4000b440, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15505 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400020, 0x802a1002, 0x000000a0, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15506 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200080, 0x44050428, 0x00000011, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15507 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15508 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15509 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15510 | }; |
| 15511 | |
| 15512 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 15513 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04008000, 0x62012660, 0x00000083, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15514 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0000004, 0x00600000, 0x00000000, 0x00000080, 0x00000000, 0x00000003, 0x00000060, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15515 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x4c84080c, 0x00000055, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15516 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15517 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30000200, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15518 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30000200, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15519 | }; |
| 15520 | |
| 15521 | static const uint32_t ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 15522 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00a10000, 0x4000b000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15523 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15524 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15525 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15526 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15527 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15528 | }; |
| 15529 | |
| 15530 | static const uint32_t QQ_with_qsub0_in_FPR128_0to7SubClassMask[] = { |
| 15531 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15532 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00820000, 0x00000000, 0x00000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15533 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x04970001, 0x84230022, 0x00000031, 0x40000410, 0x01288643, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15534 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000820, 0x0128860a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15535 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08801009, 0x00000441, 0x04104000, 0xc0230402, 0x00000030, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15536 | }; |
| 15537 | |
| 15538 | static const uint32_t QQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 15539 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15540 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00830000, 0x00000000, 0x00000000, 0x40000010, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15541 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x04850002, 0x14330120, 0x00000033, 0xc0000820, 0x0128860a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15542 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80001040, 0x01208208, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15543 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x08201008, 0x00000511, 0x04140001, 0x84230022, 0x00000031, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15544 | }; |
| 15545 | |
| 15546 | static const uint32_t ZPR2Mul2_HiSubClassMask[] = { |
| 15547 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000a00, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15548 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60080010, 0x2240c201, 0x0000000a, 0x00004000, 0x00000010, 0x30002015, 0x80110020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15549 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x09002014, 0x00000044, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15550 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15551 | }; |
| 15552 | |
| 15553 | static const uint32_t ZPR2Mul2_LoSubClassMask[] = { |
| 15554 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00001400, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15555 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400020, 0x802a1002, 0x000000a0, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15556 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200080, 0x44050428, 0x00000011, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15557 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15558 | }; |
| 15559 | |
| 15560 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 15561 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x4000b000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15562 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15563 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15564 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15565 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15566 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15567 | }; |
| 15568 | |
| 15569 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 15570 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x82020880, 0x00000082, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15571 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15572 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15573 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15574 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15575 | }; |
| 15576 | |
| 15577 | static const uint32_t ZPR2Strided_with_dsub_in_FPR64_loSubClassMask[] = { |
| 15578 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x40008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15579 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15580 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15581 | }; |
| 15582 | |
| 15583 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2SubClassMask[] = { |
| 15584 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0xe001c000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15585 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15586 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15587 | }; |
| 15588 | |
| 15589 | static const uint32_t ZPR2_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 15590 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x08201008, 0x00000511, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15591 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04140001, 0x84230022, 0x00000031, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15592 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040002, 0x14330120, 0x00000033, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15593 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x01008008, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15594 | }; |
| 15595 | |
| 15596 | static const uint32_t ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 15597 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000600, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15598 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0000004, 0x00600000, 0x00000000, 0x00000080, 0x00000000, 0x00000003, 0x00000060, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15599 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x4c84080c, 0x00000055, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15600 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15601 | }; |
| 15602 | |
| 15603 | static const uint32_t ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 15604 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x04040900, 0x0000030e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15605 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x19000008, 0x03d0a001, 0x0000000f, 0x00002000, 0xc0010000, 0x2c000004, 0xc001fc20, 0x0000000f, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15606 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13000200, 0x0b408011, 0x0000000a, 0x00080000, 0x80030000, 0xa0000484, 0x80052820, 0x0000000d, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15607 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15608 | }; |
| 15609 | |
| 15610 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 15611 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x04480000, 0x00000a24, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15612 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x09002014, 0x00000044, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15613 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20080400, 0x2040c240, 0x00000088, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15614 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0xc0048020, 0x08448000, 0x00000286, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15615 | }; |
| 15616 | |
| 15617 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 15618 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x18b00010, 0x00000550, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15619 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200080, 0x44050428, 0x00000011, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15620 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400800, 0x902a0182, 0x00000022, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15621 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00100004, 0x020b0140, 0x46a21015, 0x00000051, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15622 | }; |
| 15623 | |
| 15624 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 15625 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x11180000, 0x00000f78, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15626 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x4c84080c, 0x00000055, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15627 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40001000, 0xb20850c0, 0x000000aa, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15628 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x40418200, 0x04602010, 0x00000245, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15629 | }; |
| 15630 | |
| 15631 | static const uint32_t ZPR2_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 15632 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00400900, 0x00000026, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15633 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13000200, 0x0b408011, 0x0000000a, 0x00080000, 0x80030000, 0xa0000484, 0x80052820, 0x0000000d, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15634 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12002000, 0x29400210, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15635 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00040000, 0x00042400, 0x00540020, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15636 | }; |
| 15637 | |
| 15638 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 15639 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08801009, 0x00000441, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15640 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04104000, 0xc0230402, 0x00000030, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15641 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04140001, 0x84230022, 0x00000031, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15642 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15643 | }; |
| 15644 | |
| 15645 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 15646 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x19800012, 0x00000c40, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15647 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00208000, 0x40050c00, 0x00000050, 0x20000000, 0x00100080, 0x00580000, 0x0e800015, 0x000002d0, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15648 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400020, 0x802a1002, 0x000000a0, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15649 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15650 | }; |
| 15651 | |
| 15652 | static const uint32_t QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 15653 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15654 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 |
| 15655 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04850000, 0x04230020, 0x00000031, 0x40000000, 0x01288602, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2 |
| 15656 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x01208208, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, // qsub2_qsub3 |
| 15657 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08001008, 0x00000401, 0x04100000, 0x80230002, 0x00000030, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1 |
| 15658 | }; |
| 15659 | |
| 15660 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 15661 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08001008, 0x00000401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15662 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04100000, 0x80230002, 0x00000030, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15663 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040000, 0x04230020, 0x00000031, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15664 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008008, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15665 | }; |
| 15666 | |
| 15667 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 15668 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x18800010, 0x00000440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15669 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x40050400, 0x00000010, 0x00000000, 0x00100080, 0x00480000, 0x06800015, 0x00000250, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15670 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x802a0002, 0x00000020, 0x00000000, 0x00000100, 0x0000000a, 0x0100004a, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15671 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100004, 0x02080140, 0x46820015, 0x00000050, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15672 | }; |
| 15673 | |
| 15674 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 15675 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000220, 0x00000082, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15676 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15677 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000004, 0x00000044, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15678 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15679 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15680 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15681 | }; |
| 15682 | |
| 15683 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 15684 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40002440, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15685 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15686 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44040008, 0x00000011, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15687 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15688 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15689 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15690 | }; |
| 15691 | |
| 15692 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 15693 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000880, 0x00000082, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15694 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15695 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15696 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15697 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15698 | }; |
| 15699 | |
| 15700 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 15701 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000900, 0x00000006, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15702 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x03408001, 0x0000000a, 0x00000000, 0x80010000, 0x20000004, 0x80012820, 0x0000000d, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15703 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x09400010, 0x00000000, 0x00000000, 0x80020000, 0x80000480, 0x00042020, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15704 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00002400, 0x00140020, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15705 | }; |
| 15706 | |
| 15707 | static const uint32_t ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 15708 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15709 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15710 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000004, 0x00000044, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15711 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15712 | }; |
| 15713 | |
| 15714 | static const uint32_t ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 15715 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15716 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15717 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44040008, 0x00000011, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15718 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15719 | }; |
| 15720 | |
| 15721 | static const uint32_t ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 15722 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15723 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15724 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15725 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15726 | }; |
| 15727 | |
| 15728 | static const uint32_t ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 15729 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15730 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15731 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15732 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15733 | }; |
| 15734 | |
| 15735 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 15736 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40002000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15737 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15738 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15739 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15740 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15741 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15742 | }; |
| 15743 | |
| 15744 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2_HiSubClassMask[] = { |
| 15745 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0004000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15746 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15747 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15748 | }; |
| 15749 | |
| 15750 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2_LoSubClassMask[] = { |
| 15751 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15752 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15753 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15754 | }; |
| 15755 | |
| 15756 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 15757 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60010000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15758 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30000200, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15759 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30000200, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15760 | }; |
| 15761 | |
| 15762 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 15763 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80020000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15764 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15765 | }; |
| 15766 | |
| 15767 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 15768 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040000, 0x0000030c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15769 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x01802000, 0x00000005, 0x00000000, 0x40000000, 0x08000000, 0x4000f000, 0x00000007, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15770 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15771 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15772 | }; |
| 15773 | |
| 15774 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 15775 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000a20, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15776 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000004, 0x00000044, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15777 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20004040, 0x00000088, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15778 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40008000, 0x00400000, 0x00000204, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15779 | }; |
| 15780 | |
| 15781 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 15782 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10100000, 0x00000550, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15783 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44040008, 0x00000011, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15784 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90080080, 0x00000022, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15785 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x04200010, 0x00000041, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15786 | }; |
| 15787 | |
| 15788 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 15789 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08200000, 0x00000510, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15790 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15791 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10220100, 0x00000022, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15792 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02020000, 0x42221000, 0x00000051, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15793 | }; |
| 15794 | |
| 15795 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 15796 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000024, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15797 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15798 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20400200, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15799 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00440000, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15800 | }; |
| 15801 | |
| 15802 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 15803 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08800000, 0x00000440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15804 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40010400, 0x00000010, 0x00000000, 0x00000000, 0x00080000, 0x06800001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15805 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15806 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15807 | }; |
| 15808 | |
| 15809 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 15810 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x00000c40, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15811 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40040800, 0x00000050, 0x00000000, 0x00000000, 0x00100000, 0x00800004, 0x00000090, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15812 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80081000, 0x000000a0, 0x00000000, 0x00000000, 0x00200000, 0x01000008, 0x00000120, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15813 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x04000010, 0x00000240, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15814 | }; |
| 15815 | |
| 15816 | static const uint32_t ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 15817 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00000082, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15818 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15819 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15820 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15821 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15822 | }; |
| 15823 | |
| 15824 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 15825 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15826 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01002000, 0x00000004, 0x00000000, 0x00000000, 0x08000000, 0x0000a000, 0x00000007, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15827 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00408000, 0x00000008, 0x00000000, 0x00000000, 0x20000000, 0x00000020, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15828 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00040000, 0x00000004, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15829 | }; |
| 15830 | |
| 15831 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 15832 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15833 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x06000001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15834 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00220000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15835 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x42020000, 0x00000050, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15836 | }; |
| 15837 | |
| 15838 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 15839 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15840 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40040000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00800004, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15841 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x01000008, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15842 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000010, 0x00000040, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15843 | }; |
| 15844 | |
| 15845 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 15846 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15847 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15848 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15849 | }; |
| 15850 | |
| 15851 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 15852 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15853 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub2 |
| 15854 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15855 | }; |
| 15856 | |
| 15857 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 15858 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15859 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15860 | }; |
| 15861 | |
| 15862 | static const uint32_t ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 15863 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15864 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15865 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15866 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15867 | }; |
| 15868 | |
| 15869 | static const uint32_t ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 15870 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15871 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15872 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15873 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15874 | }; |
| 15875 | |
| 15876 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 15877 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15878 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15879 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15880 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15881 | }; |
| 15882 | |
| 15883 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 15884 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000308, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15885 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000005, 0x00000000, 0x00000000, 0x00000000, 0x40004000, 0x00000002, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15886 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15887 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000005, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15888 | }; |
| 15889 | |
| 15890 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 15891 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000510, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15892 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15893 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15894 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000041, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15895 | }; |
| 15896 | |
| 15897 | static const uint32_t ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 15898 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15899 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15900 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15901 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15902 | }; |
| 15903 | |
| 15904 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 15905 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15906 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15907 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15908 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000040, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15909 | }; |
| 15910 | |
| 15911 | static const uint32_t ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 15912 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15913 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub3 |
| 15914 | }; |
| 15915 | |
| 15916 | static const uint32_t ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 15917 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15918 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15919 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15920 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15921 | }; |
| 15922 | |
| 15923 | static const uint32_t ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 15924 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15925 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15926 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15927 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15928 | }; |
| 15929 | |
| 15930 | static const uint32_t ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 15931 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15932 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15933 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15934 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15935 | }; |
| 15936 | |
| 15937 | static const uint32_t ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 15938 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15939 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, // zsub0_zsub1 |
| 15940 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, // zsub1_zsub2 |
| 15941 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, // zsub2_zsub3 |
| 15942 | }; |
| 15943 | |
| 15944 | static const uint32_t MPR64SubClassMask[] = { |
| 15945 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15946 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubd0 |
| 15947 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00038000, // zasubd1 |
| 15948 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubd0 |
| 15949 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1_then_zasubd1 |
| 15950 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubd0 |
| 15951 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubd1 |
| 15952 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubd0 |
| 15953 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1_then_zasubd1 |
| 15954 | }; |
| 15955 | |
| 15956 | static const uint32_t QQQSubClassMask[] = { |
| 15957 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe983a000, 0x00830000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15958 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98e03d00, 0xc0000078, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 15959 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffbf00, 0xfffffcf9, 0xc13f87ff, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 15960 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x167c4000, 0xff7cffff, 0xffffffff, 0x671f82ff, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 15961 | }; |
| 15962 | |
| 15963 | static const uint32_t ZPR3SubClassMask[] = { |
| 15964 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x167c4000, 0xff7cffff, 0xffffffff, 0x000000ff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15965 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671f8200, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 15966 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671f8200, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 15967 | }; |
| 15968 | |
| 15969 | static const uint32_t QQQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15970 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x69808000, 0x00830000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15971 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98a00400, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 15972 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfb610800, 0xd0220c39, 0x013887cf, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 15973 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16040000, 0x847440a1, 0xc42f142a, 0x650080b1, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 15974 | }; |
| 15975 | |
| 15976 | static const uint32_t QQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15977 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe8810000, 0x00830000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15978 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98600800, 0xc0000038, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 15979 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa421000, 0xd2201c79, 0x0138874f, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 15980 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12080000, 0x84744883, 0xd43f05aa, 0x63010033, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 15981 | }; |
| 15982 | |
| 15983 | static const uint32_t QQQ_with_qsub0_in_FPR128_loSubClassMask[] = { |
| 15984 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x29020000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15985 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90802000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 15986 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfda08400, 0x50028419, 0x013887c7, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 15987 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14400000, 0x8470c020, 0xc02f1c02, 0x441000f0, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 15988 | }; |
| 15989 | |
| 15990 | static const uint32_t ZPR3_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 15991 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16040000, 0x847440a1, 0xc42f142a, 0x000000b1, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15992 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x65008000, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 15993 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x63010000, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 15994 | }; |
| 15995 | |
| 15996 | static const uint32_t ZPR3_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 15997 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12080000, 0x84744883, 0xd43f05aa, 0x00000033, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 15998 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x63010000, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 15999 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22020000, 0x12201c01, 0x0118814e, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16000 | }; |
| 16001 | |
| 16002 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { |
| 16003 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0xe0481c34, 0xb26ad3c3, 0x000000aa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16004 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16005 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16006 | }; |
| 16007 | |
| 16008 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16009 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x082081c0, 0x4d852c3c, 0x00000055, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16010 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16011 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16012 | }; |
| 16013 | |
| 16014 | static const uint32_t ZPR3_with_zsub_in_FPR128_loSubClassMask[] = { |
| 16015 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14400000, 0x8470c020, 0xc02f1c02, 0x000000f0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16016 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44100000, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16017 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x65008000, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16018 | }; |
| 16019 | |
| 16020 | static const uint32_t QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16021 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68800000, 0x00830000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16022 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98200000, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16023 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xaa400000, 0xd0200c39, 0x0138874f, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16024 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x84744081, 0xc42f042a, 0x61000031, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16025 | }; |
| 16026 | |
| 16027 | static const uint32_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16028 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x29000000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16029 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90800000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16030 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf9200000, 0x50020419, 0x013887c7, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16031 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x84704020, 0xc02f1402, 0x440000b0, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16032 | }; |
| 16033 | |
| 16034 | static const uint32_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16035 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x84744081, 0xc42f042a, 0x00000031, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16036 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x61000000, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16037 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000000, 0x10200c01, 0x0118814e, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16038 | }; |
| 16039 | |
| 16040 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x84704020, 0xc02f1402, 0x000000b0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16042 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44000000, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16043 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x61000000, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16044 | }; |
| 16045 | |
| 16046 | static const uint32_t QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16047 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x28000000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16048 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x50000419, 0x01388747, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16050 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x84704000, 0xc02f0402, 0x40000030, 0x10000001, 0x011801c0, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16051 | }; |
| 16052 | |
| 16053 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16054 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x84704000, 0xc02f0402, 0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16055 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x10000001, 0x011801c0, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16056 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x10000401, 0x01188146, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16057 | }; |
| 16058 | |
| 16059 | static const uint32_t QQQ_with_qsub0_in_FPR128_0to7SubClassMask[] = { |
| 16060 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16061 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16062 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000410, 0x01288643, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16063 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04104000, 0xc0230402, 0x00000030, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16064 | }; |
| 16065 | |
| 16066 | static const uint32_t QQQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16067 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00830000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16068 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000010, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16069 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000820, 0x0128860a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16070 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04140001, 0x84230022, 0x00000031, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16071 | }; |
| 16072 | |
| 16073 | static const uint32_t QQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16074 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00810000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16075 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000020, 0x00200600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16076 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80001040, 0x01208208, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16077 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040002, 0x14330120, 0x00000033, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16078 | }; |
| 16079 | |
| 16080 | static const uint32_t ZPR3_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04140001, 0x84230022, 0x00000031, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16082 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16083 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16084 | }; |
| 16085 | |
| 16086 | static const uint32_t ZPR3_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16087 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040002, 0x14330120, 0x00000033, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16088 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16089 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x01008008, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16090 | }; |
| 16091 | |
| 16092 | static const uint32_t ZPR3_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16093 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0000004, 0x00600000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16094 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000003, 0x00000060, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16095 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16096 | }; |
| 16097 | |
| 16098 | static const uint32_t ZPR3_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16099 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x19000008, 0x03d0a001, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16100 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0xc0010000, 0x2c000004, 0xc001fc20, 0x0000000f, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x80030000, 0xa0000484, 0x80052820, 0x0000000d, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16102 | }; |
| 16103 | |
| 16104 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask[] = { |
| 16105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60080010, 0x2240c201, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16106 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000010, 0x30002015, 0x80110020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16107 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16108 | }; |
| 16109 | |
| 16110 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoSubClassMask[] = { |
| 16111 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400020, 0x802a1002, 0x000000a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16112 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16114 | }; |
| 16115 | |
| 16116 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x09002014, 0x00000044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16118 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16119 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16120 | }; |
| 16121 | |
| 16122 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 16123 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200080, 0x44050428, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16124 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16125 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16126 | }; |
| 16127 | |
| 16128 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16129 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x4c84080c, 0x00000055, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16130 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16131 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16132 | }; |
| 16133 | |
| 16134 | static const uint32_t ZPR3_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16135 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13000200, 0x0b408011, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16136 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x80030000, 0xa0000484, 0x80052820, 0x0000000d, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16138 | }; |
| 16139 | |
| 16140 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16141 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20080400, 0x2040c240, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16142 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16143 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0xc0048020, 0x08448000, 0x00000286, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16144 | }; |
| 16145 | |
| 16146 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_LoSubClassMask[] = { |
| 16147 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400800, 0x902a0182, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16148 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16149 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00100004, 0x020b0140, 0x46a21015, 0x00000051, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16150 | }; |
| 16151 | |
| 16152 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16153 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40001000, 0xb20850c0, 0x000000aa, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16154 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16155 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x40418200, 0x04602010, 0x00000245, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16156 | }; |
| 16157 | |
| 16158 | static const uint32_t ZPR3_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16159 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12002000, 0x29400210, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16160 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16161 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00040000, 0x00042400, 0x00540020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16162 | }; |
| 16163 | |
| 16164 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16165 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04104000, 0xc0230402, 0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16166 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16167 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16168 | }; |
| 16169 | |
| 16170 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16171 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00208000, 0x40050c00, 0x00000050, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16172 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00100080, 0x00580000, 0x0e800015, 0x000002d0, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16173 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16174 | }; |
| 16175 | |
| 16176 | static const uint32_t QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16177 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00810000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16178 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00200600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16179 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x01208208, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16180 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040000, 0x04230020, 0x00000031, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16181 | }; |
| 16182 | |
| 16183 | static const uint32_t QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16184 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16185 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16186 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x01288602, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16187 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04100000, 0x80230002, 0x00000030, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16188 | }; |
| 16189 | |
| 16190 | static const uint32_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16191 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04040000, 0x04230020, 0x00000031, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16192 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16193 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008008, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16194 | }; |
| 16195 | |
| 16196 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16197 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20080000, 0x2040c200, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16198 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x30002001, 0x00100020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16199 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0xc0040020, 0x00448000, 0x00000086, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16200 | }; |
| 16201 | |
| 16202 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16203 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04100000, 0x80230002, 0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16204 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16205 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16206 | }; |
| 16207 | |
| 16208 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 16209 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x40050400, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16210 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100080, 0x00480000, 0x06800015, 0x00000250, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16211 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x0000000a, 0x0100004a, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16212 | }; |
| 16213 | |
| 16214 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoSubClassMask[] = { |
| 16215 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x802a0002, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16216 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x0000000a, 0x0100004a, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16217 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100004, 0x02080140, 0x46820015, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16218 | }; |
| 16219 | |
| 16220 | static const uint32_t QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16221 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16222 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 |
| 16223 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01208200, 0x02000000, 0x42020042, 0x00000070, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 |
| 16224 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00230000, 0x00000030, 0x00000000, 0x01080000, 0x00000000, 0x06000043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2 |
| 16225 | }; |
| 16226 | |
| 16227 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16228 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x03408001, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16229 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x20000004, 0x80012820, 0x0000000d, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16230 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80020000, 0x80000480, 0x00042020, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16231 | }; |
| 16232 | |
| 16233 | static const uint32_t ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16234 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x09400010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16235 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80020000, 0x80000480, 0x00042020, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16236 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00002400, 0x00140020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16237 | }; |
| 16238 | |
| 16239 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16240 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00230000, 0x00000030, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16241 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080000, 0x00000000, 0x06000043, 0x00000070, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16242 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008000, 0x02000000, 0x42020042, 0x00000070, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16243 | }; |
| 16244 | |
| 16245 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16246 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x01802000, 0x00000005, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16247 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x08000000, 0x4000f000, 0x00000007, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16248 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16249 | }; |
| 16250 | |
| 16251 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16252 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x01400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16253 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00002020, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16254 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00040020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16255 | }; |
| 16256 | |
| 16257 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16258 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16259 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16260 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16261 | }; |
| 16262 | |
| 16263 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16264 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x22004000, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16265 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000010, 0x80110000, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16266 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000200, 0x00402000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16267 | }; |
| 16268 | |
| 16269 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16270 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16271 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16272 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16273 | }; |
| 16274 | |
| 16275 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16276 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02408001, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16277 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16278 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16279 | }; |
| 16280 | |
| 16281 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16282 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80220002, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16283 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16284 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16285 | }; |
| 16286 | |
| 16287 | static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16288 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000004, 0x00000044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16289 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16290 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16291 | }; |
| 16292 | |
| 16293 | static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16294 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44040008, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16295 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16296 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16297 | }; |
| 16298 | |
| 16299 | static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16300 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16301 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16302 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16303 | }; |
| 16304 | |
| 16305 | static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16306 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04010020, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16307 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16308 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16309 | }; |
| 16310 | |
| 16311 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 16312 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20004040, 0x00000088, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16313 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16314 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40008000, 0x00400000, 0x00000204, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16315 | }; |
| 16316 | |
| 16317 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 16318 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90080080, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16319 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16320 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x04200010, 0x00000041, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16321 | }; |
| 16322 | |
| 16323 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 16324 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10220100, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16325 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16326 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02020000, 0x42221000, 0x00000051, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16327 | }; |
| 16328 | |
| 16329 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 16330 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20400200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16331 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16332 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00440000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16333 | }; |
| 16334 | |
| 16335 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16336 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40010400, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16337 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x06800001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16338 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16339 | }; |
| 16340 | |
| 16341 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16342 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40040800, 0x00000050, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16343 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00800004, 0x00000090, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16344 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x01000008, 0x00000120, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16345 | }; |
| 16346 | |
| 16347 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16348 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80081000, 0x000000a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16349 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x01000008, 0x00000120, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16350 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x04000010, 0x00000240, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16351 | }; |
| 16352 | |
| 16353 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16354 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01002000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16355 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x0000a000, 0x00000007, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16356 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000020, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16357 | }; |
| 16358 | |
| 16359 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 16360 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20004000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16361 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00100000, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16362 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00400000, 0x00000004, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16363 | }; |
| 16364 | |
| 16365 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16366 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00408000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16367 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000020, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16368 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00040000, 0x00000004, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16369 | }; |
| 16370 | |
| 16371 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16372 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16373 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x06000001, 0x00000050, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16374 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000042, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16375 | }; |
| 16376 | |
| 16377 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 16378 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00220000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16379 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000042, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16380 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x42020000, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16381 | }; |
| 16382 | |
| 16383 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16384 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40040000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16385 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800004, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16386 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000008, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16387 | }; |
| 16388 | |
| 16389 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 16390 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16391 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000008, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16392 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000010, 0x00000040, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16393 | }; |
| 16394 | |
| 16395 | static const uint32_t ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16396 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16397 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000400, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16398 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000800, 0x00000001, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16399 | }; |
| 16400 | |
| 16401 | static const uint32_t ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16402 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16403 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16404 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16405 | }; |
| 16406 | |
| 16407 | static const uint32_t ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 16408 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16409 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16410 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16411 | }; |
| 16412 | |
| 16413 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16414 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000005, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16415 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40004000, 0x00000002, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16416 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16417 | }; |
| 16418 | |
| 16419 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16420 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16421 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000005, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16422 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16423 | }; |
| 16424 | |
| 16425 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16426 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0000000a, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16427 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16428 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000005, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16429 | }; |
| 16430 | |
| 16431 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16432 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16433 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16434 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16435 | }; |
| 16436 | |
| 16437 | static const uint32_t ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 16438 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16439 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16440 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16441 | }; |
| 16442 | |
| 16443 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16444 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000022, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16445 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16446 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000041, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16447 | }; |
| 16448 | |
| 16449 | static const uint32_t ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 16450 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16451 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16452 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16453 | }; |
| 16454 | |
| 16455 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16456 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16457 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16458 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16459 | }; |
| 16460 | |
| 16461 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16462 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16463 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16464 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000040, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16465 | }; |
| 16466 | |
| 16467 | static const uint32_t ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16468 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16469 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16470 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16471 | }; |
| 16472 | |
| 16473 | static const uint32_t ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask[] = { |
| 16474 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16475 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16476 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16477 | }; |
| 16478 | |
| 16479 | static const uint32_t ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16480 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16481 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16482 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16483 | }; |
| 16484 | |
| 16485 | static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 16486 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16487 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16488 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16489 | }; |
| 16490 | |
| 16491 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16492 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16493 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16494 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16495 | }; |
| 16496 | |
| 16497 | static const uint32_t ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16498 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16499 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16500 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16501 | }; |
| 16502 | |
| 16503 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16504 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16505 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16506 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16507 | }; |
| 16508 | |
| 16509 | static const uint32_t ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16510 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16511 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 |
| 16512 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 |
| 16513 | }; |
| 16514 | |
| 16515 | static const uint32_t QQQQSubClassMask[] = { |
| 16516 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98e03d00, 0xc0000078, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16517 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671f8200, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16518 | }; |
| 16519 | |
| 16520 | static const uint32_t ZPR4SubClassMask[] = { |
| 16521 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x671f8200, 0x3ffffc81, 0xc11f81fe, 0xfe7fffff, 0xcffffc7f, 0x000003ff, 0x00000000, 0x00000000, |
| 16522 | }; |
| 16523 | |
| 16524 | static const uint32_t QQQQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16525 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98a00400, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16526 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x65008000, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16527 | }; |
| 16528 | |
| 16529 | static const uint32_t QQQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16530 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98600800, 0xc0000038, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16531 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x63010000, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16532 | }; |
| 16533 | |
| 16534 | static const uint32_t QQQQ_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16535 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x88401000, 0xc0000078, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16536 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22020000, 0x12201c01, 0x0118814e, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16537 | }; |
| 16538 | |
| 16539 | static const uint32_t QQQQ_with_qsub0_in_FPR128_loSubClassMask[] = { |
| 16540 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90802000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16541 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44100000, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16542 | }; |
| 16543 | |
| 16544 | static const uint32_t ZPR4StridedOrContiguousSubClassMask[] = { |
| 16545 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000386, 0x3ec07800, 0x01800003, 0x300003e0, 0x00000000, 0x00000000, 0x00000000, |
| 16546 | }; |
| 16547 | |
| 16548 | static const uint32_t ZPR4_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16549 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x65008000, 0x10028401, 0x011881c6, 0x0268014a, 0x4782005f, 0x00000370, 0x00000000, 0x00000000, |
| 16550 | }; |
| 16551 | |
| 16552 | static const uint32_t ZPR4_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16553 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x63010000, 0x10220c01, 0x011881ce, 0x0248514a, 0xc78a045f, 0x00000270, 0x00000000, 0x00000000, |
| 16554 | }; |
| 16555 | |
| 16556 | static const uint32_t ZPR4_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16557 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22020000, 0x12201c01, 0x0118814e, 0x060b514a, 0xc7aa1c5f, 0x00000071, 0x00000000, 0x00000000, |
| 16558 | }; |
| 16559 | |
| 16560 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { |
| 16561 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x0070c080, 0x00000110, 0x3020781f, 0x8119006a, 0x00000128, 0x00000000, 0x00000000, |
| 16562 | }; |
| 16563 | |
| 16564 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16565 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x27070000, 0x401000a4, 0xca5f83e0, 0x4ee6f015, 0x000002d7, 0x00000000, 0x00000000, |
| 16566 | }; |
| 16567 | |
| 16568 | static const uint32_t ZPR4_with_zsub_in_FPR128_loSubClassMask[] = { |
| 16569 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44100000, 0x30008001, 0x011801c0, 0x0078000a, 0x0f80005f, 0x000003f0, 0x00000000, 0x00000000, |
| 16570 | }; |
| 16571 | |
| 16572 | static const uint32_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16573 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98200000, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16574 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x61000000, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16575 | }; |
| 16576 | |
| 16577 | static const uint32_t QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16578 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x88400000, 0xc0000038, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16579 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000000, 0x10200c01, 0x0118814e, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16580 | }; |
| 16581 | |
| 16582 | static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16583 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90800000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16584 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44000000, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16585 | }; |
| 16586 | |
| 16587 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16588 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x61000000, 0x10020401, 0x011881c6, 0x0248014a, 0x4782005f, 0x00000270, 0x00000000, 0x00000000, |
| 16589 | }; |
| 16590 | |
| 16591 | static const uint32_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16592 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000000, 0x10200c01, 0x0118814e, 0x0208514a, 0xc78a045f, 0x00000070, 0x00000000, 0x00000000, |
| 16593 | }; |
| 16594 | |
| 16595 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loSubClassMask[] = { |
| 16596 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x44000000, 0x10008001, 0x011801c0, 0x0068000a, 0x0780005f, 0x00000370, 0x00000000, 0x00000000, |
| 16597 | }; |
| 16598 | |
| 16599 | static const uint32_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16600 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x88000000, 0x40000018, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16601 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x10000401, 0x01188146, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16602 | }; |
| 16603 | |
| 16604 | static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16605 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x90000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16606 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x10000001, 0x011801c0, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16607 | }; |
| 16608 | |
| 16609 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16610 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x10000401, 0x01188146, 0x0208014a, 0x4782005f, 0x00000070, 0x00000000, 0x00000000, |
| 16611 | }; |
| 16612 | |
| 16613 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loSubClassMask[] = { |
| 16614 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x10000001, 0x011801c0, 0x0048000a, 0x0780005f, 0x00000270, 0x00000000, 0x00000000, |
| 16615 | }; |
| 16616 | |
| 16617 | static const uint32_t QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16618 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16619 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000001, 0x01180140, 0x0008000a, 0x0780005f, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16620 | }; |
| 16621 | |
| 16622 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask[] = { |
| 16623 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000001, 0x01180140, 0x0008000a, 0x0780005f, 0x00000070, 0x00000000, 0x00000000, |
| 16624 | }; |
| 16625 | |
| 16626 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2SubClassMask[] = { |
| 16627 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000086, 0x16c01800, 0x01800003, 0x300003e0, 0x00000000, 0x00000000, 0x00000000, |
| 16628 | }; |
| 16629 | |
| 16630 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16631 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000084, 0x00c00000, 0x01800003, 0x30000260, 0x00000000, 0x00000000, 0x00000000, |
| 16632 | }; |
| 16633 | |
| 16634 | static const uint32_t QQQQ_with_qsub0_in_FPR128_0to7SubClassMask[] = { |
| 16635 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16636 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16637 | }; |
| 16638 | |
| 16639 | static const uint32_t QQQQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16640 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000010, 0x00200601, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16641 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16642 | }; |
| 16643 | |
| 16644 | static const uint32_t QQQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16645 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000020, 0x00200600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16646 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16647 | }; |
| 16648 | |
| 16649 | static const uint32_t QQQQ_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16650 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000040, 0x00200200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16651 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x01008008, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16652 | }; |
| 16653 | |
| 16654 | static const uint32_t ZPR4Mul4SubClassMask[] = { |
| 16655 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000003, 0x00000060, 0x00000000, 0x00000000, 0x00000000, |
| 16656 | }; |
| 16657 | |
| 16658 | static const uint32_t ZPR4StridedSubClassMask[] = { |
| 16659 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x38000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, |
| 16660 | }; |
| 16661 | |
| 16662 | static const uint32_t ZPR4StridedOrContiguous_with_dsub_in_FPR64_loSubClassMask[] = { |
| 16663 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x0c805000, 0x01000002, 0x20000140, 0x00000000, 0x00000000, 0x00000000, |
| 16664 | }; |
| 16665 | |
| 16666 | static const uint32_t ZPR4_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16667 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x01088042, 0x02000108, 0x47020043, 0x00000070, 0x00000000, 0x00000000, |
| 16668 | }; |
| 16669 | |
| 16670 | static const uint32_t ZPR4_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16671 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, 0x0108800a, 0x02004100, 0xc60a0443, 0x00000070, 0x00000000, 0x00000000, |
| 16672 | }; |
| 16673 | |
| 16674 | static const uint32_t ZPR4_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16675 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x01008008, 0x06024000, 0xc22a1c42, 0x00000071, 0x00000000, 0x00000000, |
| 16676 | }; |
| 16677 | |
| 16678 | static const uint32_t ZPR4_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16679 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0xc0010000, 0x2c000004, 0xc001fc20, 0x0000000f, 0x00000000, 0x00000000, |
| 16680 | }; |
| 16681 | |
| 16682 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask[] = { |
| 16683 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000010, 0x30002015, 0x80110020, 0x00000008, 0x00000000, 0x00000000, |
| 16684 | }; |
| 16685 | |
| 16686 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoSubClassMask[] = { |
| 16687 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000100, 0x0020000a, 0x0100004a, 0x00000120, 0x00000000, 0x00000000, |
| 16688 | }; |
| 16689 | |
| 16690 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16691 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000020, 0xc80402a0, 0x0044a000, 0x00000087, 0x00000000, 0x00000000, |
| 16692 | }; |
| 16693 | |
| 16694 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 16695 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, 0x00100084, 0x02480140, 0x46820015, 0x00000250, 0x00000000, 0x00000000, |
| 16696 | }; |
| 16697 | |
| 16698 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16699 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00100060, 0x40864004, 0x00000092, 0x00000000, 0x00000000, |
| 16700 | }; |
| 16701 | |
| 16702 | static const uint32_t ZPR4_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16703 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x80030000, 0xa0000484, 0x80052820, 0x0000000d, 0x00000000, 0x00000000, |
| 16704 | }; |
| 16705 | |
| 16706 | static const uint32_t ZPR4_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16707 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000010, 0x30002801, 0x00100020, 0x00000108, 0x00000000, 0x00000000, |
| 16708 | }; |
| 16709 | |
| 16710 | static const uint32_t ZPR4_with_zsub2_in_ZPRMul2_LoSubClassMask[] = { |
| 16711 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000100, 0x0000500a, 0x8108004a, 0x00000020, 0x00000000, 0x00000000, |
| 16712 | }; |
| 16713 | |
| 16714 | static const uint32_t ZPR4_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16715 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x10201810, 0x81190008, 0x00000128, 0x00000000, 0x00000000, |
| 16716 | }; |
| 16717 | |
| 16718 | static const uint32_t ZPR4_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16719 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x80060000, 0x80002480, 0x00142020, 0x00000005, 0x00000000, 0x00000000, |
| 16720 | }; |
| 16721 | |
| 16722 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask[] = { |
| 16723 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0xc0048020, 0x08448000, 0x00000286, 0x00000000, 0x00000000, |
| 16724 | }; |
| 16725 | |
| 16726 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask[] = { |
| 16727 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00100004, 0x020b0140, 0x46a21015, 0x00000051, 0x00000000, 0x00000000, |
| 16728 | }; |
| 16729 | |
| 16730 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul4SubClassMask[] = { |
| 16731 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, 0x40418200, 0x04602010, 0x00000245, 0x00000000, 0x00000000, |
| 16732 | }; |
| 16733 | |
| 16734 | static const uint32_t ZPR4_with_zsub3_in_ZPR_KSubClassMask[] = { |
| 16735 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00040000, 0x00042400, 0x00540020, 0x00000000, 0x00000000, 0x00000000, |
| 16736 | }; |
| 16737 | |
| 16738 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16739 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x01080040, 0x00080008, 0x07800043, 0x00000070, 0x00000000, 0x00000000, |
| 16740 | }; |
| 16741 | |
| 16742 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16743 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00100080, 0x00580000, 0x0e800015, 0x000002d0, 0x00000000, 0x00000000, |
| 16744 | }; |
| 16745 | |
| 16746 | static const uint32_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16747 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00200600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16748 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16749 | }; |
| 16750 | |
| 16751 | static const uint32_t QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16752 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00200200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16753 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008008, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16754 | }; |
| 16755 | |
| 16756 | static const uint32_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16757 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200401, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16758 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16759 | }; |
| 16760 | |
| 16761 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16762 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01088002, 0x02000100, 0x46020043, 0x00000070, 0x00000000, 0x00000000, |
| 16763 | }; |
| 16764 | |
| 16765 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask[] = { |
| 16766 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100004, 0x02080140, 0x46820015, 0x00000050, 0x00000000, 0x00000000, |
| 16767 | }; |
| 16768 | |
| 16769 | static const uint32_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16770 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008008, 0x02004000, 0xc20a0442, 0x00000070, 0x00000000, 0x00000000, |
| 16771 | }; |
| 16772 | |
| 16773 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16774 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x30002001, 0x00100020, 0x00000008, 0x00000000, 0x00000000, |
| 16775 | }; |
| 16776 | |
| 16777 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 16778 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0xc0040020, 0x00448000, 0x00000086, 0x00000000, 0x00000000, |
| 16779 | }; |
| 16780 | |
| 16781 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7SubClassMask[] = { |
| 16782 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080040, 0x00000008, 0x07000043, 0x00000070, 0x00000000, 0x00000000, |
| 16783 | }; |
| 16784 | |
| 16785 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoSubClassMask[] = { |
| 16786 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100080, 0x00480000, 0x06800015, 0x00000250, 0x00000000, 0x00000000, |
| 16787 | }; |
| 16788 | |
| 16789 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoSubClassMask[] = { |
| 16790 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x0000000a, 0x0100004a, 0x00000020, 0x00000000, 0x00000000, |
| 16791 | }; |
| 16792 | |
| 16793 | static const uint32_t QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16794 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16795 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008000, 0x02000000, 0x42020042, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16796 | }; |
| 16797 | |
| 16798 | static const uint32_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16799 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16800 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080000, 0x00000000, 0x06000043, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16801 | }; |
| 16802 | |
| 16803 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSubClassMask[] = { |
| 16804 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02400800, 0x00800001, 0x100000a0, 0x00000000, 0x00000000, 0x00000000, |
| 16805 | }; |
| 16806 | |
| 16807 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSubClassMask[] = { |
| 16808 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04801000, 0x01000002, 0x20000140, 0x00000000, 0x00000000, 0x00000000, |
| 16809 | }; |
| 16810 | |
| 16811 | static const uint32_t ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16812 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22002000, 0x00800000, 0x100000a0, 0x00000000, 0x00000000, 0x00000000, |
| 16813 | }; |
| 16814 | |
| 16815 | static const uint32_t ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16816 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c004000, 0x01000000, 0x20000140, 0x00000000, 0x00000000, 0x00000000, |
| 16817 | }; |
| 16818 | |
| 16819 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16820 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01008000, 0x02000000, 0x42020042, 0x00000070, 0x00000000, 0x00000000, |
| 16821 | }; |
| 16822 | |
| 16823 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16824 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x20000004, 0x80012820, 0x0000000d, 0x00000000, 0x00000000, |
| 16825 | }; |
| 16826 | |
| 16827 | static const uint32_t ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16828 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80020000, 0x80000480, 0x00042020, 0x00000005, 0x00000000, 0x00000000, |
| 16829 | }; |
| 16830 | |
| 16831 | static const uint32_t ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSubClassMask[] = { |
| 16832 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00002400, 0x00140020, 0x00000000, 0x00000000, 0x00000000, |
| 16833 | }; |
| 16834 | |
| 16835 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7SubClassMask[] = { |
| 16836 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01080000, 0x00000000, 0x06000043, 0x00000070, 0x00000000, 0x00000000, |
| 16837 | }; |
| 16838 | |
| 16839 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask[] = { |
| 16840 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00080000, 0x06800015, 0x00000050, 0x00000000, 0x00000000, |
| 16841 | }; |
| 16842 | |
| 16843 | static const uint32_t QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16844 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, |
| 16845 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x02000042, 0x00000070, 0x00000000, 0x00000000, // zsub_qsub1_qsub2_qsub3 |
| 16846 | }; |
| 16847 | |
| 16848 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 16849 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00800001, 0x10000020, 0x00000000, 0x00000000, 0x00000000, |
| 16850 | }; |
| 16851 | |
| 16852 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 16853 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x01000002, 0x20000040, 0x00000000, 0x00000000, 0x00000000, |
| 16854 | }; |
| 16855 | |
| 16856 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask[] = { |
| 16857 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000000, 0x02000042, 0x00000070, 0x00000000, 0x00000000, |
| 16858 | }; |
| 16859 | |
| 16860 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16861 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00800000, 0x100000a0, 0x00000000, 0x00000000, 0x00000000, |
| 16862 | }; |
| 16863 | |
| 16864 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 16865 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x01000000, 0x20000140, 0x00000000, 0x00000000, 0x00000000, |
| 16866 | }; |
| 16867 | |
| 16868 | static const uint32_t ZPR4Strided_with_dsub_in_FPR64_loSubClassMask[] = { |
| 16869 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, |
| 16870 | }; |
| 16871 | |
| 16872 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul2SubClassMask[] = { |
| 16873 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x30000380, 0x00000000, 0x00000000, 0x00000000, |
| 16874 | }; |
| 16875 | |
| 16876 | static const uint32_t ZPR4Strided_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16877 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, |
| 16878 | }; |
| 16879 | |
| 16880 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16881 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x08000000, 0x4000f000, 0x00000007, 0x00000000, 0x00000000, |
| 16882 | }; |
| 16883 | |
| 16884 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSubClassMask[] = { |
| 16885 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00002020, 0x00000005, 0x00000000, 0x00000000, |
| 16886 | }; |
| 16887 | |
| 16888 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16889 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000020, 0x00000000, 0x00000000, 0x00000000, |
| 16890 | }; |
| 16891 | |
| 16892 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16893 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000040, 0x00000000, 0x00000000, 0x00000000, |
| 16894 | }; |
| 16895 | |
| 16896 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16897 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000004, 0x80010020, 0x00000008, 0x00000000, 0x00000000, |
| 16898 | }; |
| 16899 | |
| 16900 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16901 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x01000042, 0x00000020, 0x00000000, 0x00000000, |
| 16902 | }; |
| 16903 | |
| 16904 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16905 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000010, 0x80110000, 0x00000008, 0x00000000, 0x00000000, |
| 16906 | }; |
| 16907 | |
| 16908 | static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16909 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00040000, 0x00000082, 0x00000000, 0x00000000, |
| 16910 | }; |
| 16911 | |
| 16912 | static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16913 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x40820004, 0x00000010, 0x00000000, 0x00000000, |
| 16914 | }; |
| 16915 | |
| 16916 | static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16917 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000080, 0x00042000, 0x00000005, 0x00000000, 0x00000000, |
| 16918 | }; |
| 16919 | |
| 16920 | static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16921 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000100, 0x46020001, 0x00000050, 0x00000000, 0x00000000, |
| 16922 | }; |
| 16923 | |
| 16924 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16925 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000200, 0x00402000, 0x00000005, 0x00000000, 0x00000000, |
| 16926 | }; |
| 16927 | |
| 16928 | static const uint32_t ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSubClassMask[] = { |
| 16929 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00040020, 0x00000000, 0x00000000, 0x00000000, |
| 16930 | }; |
| 16931 | |
| 16932 | static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16933 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000800, 0x00100000, 0x00000108, 0x00000000, 0x00000000, |
| 16934 | }; |
| 16935 | |
| 16936 | static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 16937 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x81080008, 0x00000020, 0x00000000, 0x00000000, |
| 16938 | }; |
| 16939 | |
| 16940 | static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16941 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00100020, 0x00000000, 0x00000000, 0x00000000, |
| 16942 | }; |
| 16943 | |
| 16944 | static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 16945 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x80080042, 0x00000020, 0x00000000, 0x00000000, |
| 16946 | }; |
| 16947 | |
| 16948 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 16949 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40008000, 0x00400000, 0x00000204, 0x00000000, 0x00000000, |
| 16950 | }; |
| 16951 | |
| 16952 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 16953 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x04200010, 0x00000041, 0x00000000, 0x00000000, |
| 16954 | }; |
| 16955 | |
| 16956 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 16957 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02020000, 0x42221000, 0x00000051, 0x00000000, 0x00000000, |
| 16958 | }; |
| 16959 | |
| 16960 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KSubClassMask[] = { |
| 16961 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00440000, 0x00000000, 0x00000000, 0x00000000, |
| 16962 | }; |
| 16963 | |
| 16964 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 16965 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x06800001, 0x00000050, 0x00000000, 0x00000000, |
| 16966 | }; |
| 16967 | |
| 16968 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 16969 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00800004, 0x00000090, 0x00000000, 0x00000000, |
| 16970 | }; |
| 16971 | |
| 16972 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 16973 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x01000008, 0x00000120, 0x00000000, 0x00000000, |
| 16974 | }; |
| 16975 | |
| 16976 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4SubClassMask[] = { |
| 16977 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x04000010, 0x00000240, 0x00000000, 0x00000000, |
| 16978 | }; |
| 16979 | |
| 16980 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 16981 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x10000020, 0x00000000, 0x00000000, 0x00000000, |
| 16982 | }; |
| 16983 | |
| 16984 | static const uint32_t ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 16985 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x20000040, 0x00000000, 0x00000000, 0x00000000, |
| 16986 | }; |
| 16987 | |
| 16988 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 16989 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x42020000, 0x00000050, 0x00000000, 0x00000000, |
| 16990 | }; |
| 16991 | |
| 16992 | static const uint32_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 16993 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xc0001c00, 0x00000001, 0x00000000, 0x00000000, |
| 16994 | }; |
| 16995 | |
| 16996 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 16997 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x0000a000, 0x00000007, 0x00000000, 0x00000000, |
| 16998 | }; |
| 16999 | |
| 17000 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17001 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00100000, 0x00000008, 0x00000000, 0x00000000, |
| 17002 | }; |
| 17003 | |
| 17004 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 17005 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000020, 0x00000008, 0x00000000, 0x00000000, |
| 17006 | }; |
| 17007 | |
| 17008 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17009 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00400000, 0x00000004, 0x00000000, 0x00000000, |
| 17010 | }; |
| 17011 | |
| 17012 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 17013 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00040000, 0x00000004, 0x00000000, 0x00000000, |
| 17014 | }; |
| 17015 | |
| 17016 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 17017 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x06000001, 0x00000050, 0x00000000, 0x00000000, |
| 17018 | }; |
| 17019 | |
| 17020 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 17021 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000042, 0x00000020, 0x00000000, 0x00000000, |
| 17022 | }; |
| 17023 | |
| 17024 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 17025 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800004, 0x00000010, 0x00000000, 0x00000000, |
| 17026 | }; |
| 17027 | |
| 17028 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 17029 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000008, 0x00000020, 0x00000000, 0x00000000, |
| 17030 | }; |
| 17031 | |
| 17032 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 17033 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000010, 0x00000040, 0x00000000, 0x00000000, |
| 17034 | }; |
| 17035 | |
| 17036 | static const uint32_t ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 17037 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, 0x00000000, |
| 17038 | }; |
| 17039 | |
| 17040 | static const uint32_t ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7SubClassMask[] = { |
| 17041 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, |
| 17042 | }; |
| 17043 | |
| 17044 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul2_HiSubClassMask[] = { |
| 17045 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000080, 0x00000000, 0x00000000, 0x00000000, |
| 17046 | }; |
| 17047 | |
| 17048 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul2_LoSubClassMask[] = { |
| 17049 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000100, 0x00000000, 0x00000000, 0x00000000, |
| 17050 | }; |
| 17051 | |
| 17052 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 17053 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30000200, 0x00000000, 0x00000000, 0x00000000, |
| 17054 | }; |
| 17055 | |
| 17056 | static const uint32_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 17057 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000400, 0x00000000, 0x00000000, 0x00000000, |
| 17058 | }; |
| 17059 | |
| 17060 | static const uint32_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KSubClassMask[] = { |
| 17061 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000800, 0x00000001, 0x00000000, 0x00000000, |
| 17062 | }; |
| 17063 | |
| 17064 | static const uint32_t ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask[] = { |
| 17065 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40001000, 0x00000001, 0x00000000, 0x00000000, |
| 17066 | }; |
| 17067 | |
| 17068 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 17069 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000005, 0x00000000, 0x00000000, |
| 17070 | }; |
| 17071 | |
| 17072 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 17073 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40004000, 0x00000002, 0x00000000, 0x00000000, |
| 17074 | }; |
| 17075 | |
| 17076 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask[] = { |
| 17077 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000006, 0x00000000, 0x00000000, |
| 17078 | }; |
| 17079 | |
| 17080 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 17081 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80010000, 0x00000008, 0x00000000, 0x00000000, |
| 17082 | }; |
| 17083 | |
| 17084 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17085 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40020000, 0x00000010, 0x00000000, 0x00000000, |
| 17086 | }; |
| 17087 | |
| 17088 | static const uint32_t ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 17089 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, |
| 17090 | }; |
| 17091 | |
| 17092 | static const uint32_t ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17093 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80080000, 0x00000020, 0x00000000, 0x00000000, |
| 17094 | }; |
| 17095 | |
| 17096 | static const uint32_t ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 17097 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x00000000, 0x00000000, 0x00000000, |
| 17098 | }; |
| 17099 | |
| 17100 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17101 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0x00000041, 0x00000000, 0x00000000, |
| 17102 | }; |
| 17103 | |
| 17104 | static const uint32_t ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KSubClassMask[] = { |
| 17105 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000, 0x00000000, 0x00000000, 0x00000000, |
| 17106 | }; |
| 17107 | |
| 17108 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask[] = { |
| 17109 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x00000010, 0x00000000, 0x00000000, |
| 17110 | }; |
| 17111 | |
| 17112 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4SubClassMask[] = { |
| 17113 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x00000020, 0x00000000, 0x00000000, |
| 17114 | }; |
| 17115 | |
| 17116 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask[] = { |
| 17117 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00000050, 0x00000000, 0x00000000, |
| 17118 | }; |
| 17119 | |
| 17120 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4SubClassMask[] = { |
| 17121 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000040, 0x00000000, 0x00000000, |
| 17122 | }; |
| 17123 | |
| 17124 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask[] = { |
| 17125 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000280, 0x00000000, 0x00000000, |
| 17126 | }; |
| 17127 | |
| 17128 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17129 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, |
| 17130 | }; |
| 17131 | |
| 17132 | static const uint32_t ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask[] = { |
| 17133 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000000, 0x00000000, 0x00000000, |
| 17134 | }; |
| 17135 | |
| 17136 | static const uint32_t ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask[] = { |
| 17137 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, |
| 17138 | }; |
| 17139 | |
| 17140 | static const uint32_t ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask[] = { |
| 17141 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000000, 0x00000000, 0x00000000, |
| 17142 | }; |
| 17143 | |
| 17144 | static const uint32_t ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 17145 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, |
| 17146 | }; |
| 17147 | |
| 17148 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask[] = { |
| 17149 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, |
| 17150 | }; |
| 17151 | |
| 17152 | static const uint32_t ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17153 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, |
| 17154 | }; |
| 17155 | |
| 17156 | static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17157 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, |
| 17158 | }; |
| 17159 | |
| 17160 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17161 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, |
| 17162 | }; |
| 17163 | |
| 17164 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17165 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, |
| 17166 | }; |
| 17167 | |
| 17168 | static const uint32_t ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSubClassMask[] = { |
| 17169 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, |
| 17170 | }; |
| 17171 | |
| 17172 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask[] = { |
| 17173 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, |
| 17174 | }; |
| 17175 | |
| 17176 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiSubClassMask[] = { |
| 17177 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, |
| 17178 | }; |
| 17179 | |
| 17180 | static const uint32_t ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask[] = { |
| 17181 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, |
| 17182 | }; |
| 17183 | |
| 17184 | static const uint32_t GPR64x8ClassSubClassMask[] = { |
| 17185 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffffc00, 0xf7ffffff, 0x00003fff, |
| 17186 | }; |
| 17187 | |
| 17188 | static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noipSubClassMask[] = { |
| 17189 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xba038800, 0xf7b99e13, 0x00003fbf, |
| 17190 | }; |
| 17191 | |
| 17192 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { |
| 17193 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd8589000, 0xd7e4fae0, 0x00003eff, |
| 17194 | }; |
| 17195 | |
| 17196 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17197 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x68a92000, 0x56ff2b25, 0x00003bff, |
| 17198 | }; |
| 17199 | |
| 17200 | static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17201 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x71324000, 0x3777574a, 0x00002fff, |
| 17202 | }; |
| 17203 | |
| 17204 | static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { |
| 17205 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x98008000, 0xd7a09a00, 0x00003ebf, |
| 17206 | }; |
| 17207 | |
| 17208 | static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17209 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x28010000, 0x56b90a01, 0x00003bbf, |
| 17210 | }; |
| 17211 | |
| 17212 | static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17213 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30020000, 0x37311602, 0x00002fbf, |
| 17214 | }; |
| 17215 | |
| 17216 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64SubClassMask[] = { |
| 17217 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x87c40000, 0xf7fffdff, 0x00001fff, |
| 17218 | }; |
| 17219 | |
| 17220 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17221 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x48080000, 0x56e42a20, 0x00003aff, |
| 17222 | }; |
| 17223 | |
| 17224 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17225 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100000, 0x17645240, 0x00002eff, |
| 17226 | }; |
| 17227 | |
| 17228 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17229 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60200000, 0x16770300, 0x00002bff, |
| 17230 | }; |
| 17231 | |
| 17232 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { |
| 17233 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0xd7e4f8e0, 0x00001eff, |
| 17234 | }; |
| 17235 | |
| 17236 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17237 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x56ff2925, 0x00001bff, |
| 17238 | }; |
| 17239 | |
| 17240 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17241 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0x3777554a, 0x00000fff, |
| 17242 | }; |
| 17243 | |
| 17244 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPRnotx16SubClassMask[] = { |
| 17245 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xf7b99c13, 0x00001fbf, |
| 17246 | }; |
| 17247 | |
| 17248 | static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64SubClassMask[] = { |
| 17249 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xf7dae49c, 0x00001fff, |
| 17250 | }; |
| 17251 | |
| 17252 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17253 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x56a00a00, 0x00003abf, |
| 17254 | }; |
| 17255 | |
| 17256 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17257 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x17201200, 0x00002ebf, |
| 17258 | }; |
| 17259 | |
| 17260 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17261 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x16310200, 0x00002bbf, |
| 17262 | }; |
| 17263 | |
| 17264 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17265 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x16640200, 0x00002aff, |
| 17266 | }; |
| 17267 | |
| 17268 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { |
| 17269 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xd7a09800, 0x00001ebf, |
| 17270 | }; |
| 17271 | |
| 17272 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17273 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56b90801, 0x00001bbf, |
| 17274 | }; |
| 17275 | |
| 17276 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17277 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x37311402, 0x00000fbf, |
| 17278 | }; |
| 17279 | |
| 17280 | static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17281 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56da2004, 0x00001bff, |
| 17282 | }; |
| 17283 | |
| 17284 | static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17285 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x37524408, 0x00000fff, |
| 17286 | }; |
| 17287 | |
| 17288 | static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17SubClassMask[] = { |
| 17289 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7988410, 0x00001fbf, |
| 17290 | }; |
| 17291 | |
| 17292 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17293 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56e42820, 0x00001aff, |
| 17294 | }; |
| 17295 | |
| 17296 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17297 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17645040, 0x00000eff, |
| 17298 | }; |
| 17299 | |
| 17300 | static const uint32_t GPR64x8Class_with_x8sub_2_in_tcGPRnotx16SubClassMask[] = { |
| 17301 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7c0e080, 0x00001eff, |
| 17302 | }; |
| 17303 | |
| 17304 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17305 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16770100, 0x00000bff, |
| 17306 | }; |
| 17307 | |
| 17308 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17309 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16200200, 0x00002abf, |
| 17310 | }; |
| 17311 | |
| 17312 | static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17313 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x37100400, 0x00000fbf, |
| 17314 | }; |
| 17315 | |
| 17316 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17317 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56a00800, 0x00001abf, |
| 17318 | }; |
| 17319 | |
| 17320 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17321 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17201000, 0x00000ebf, |
| 17322 | }; |
| 17323 | |
| 17324 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { |
| 17325 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56c02000, 0x00001aff, |
| 17326 | }; |
| 17327 | |
| 17328 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17329 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17404000, 0x00000eff, |
| 17330 | }; |
| 17331 | |
| 17332 | static const uint32_t GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17SubClassMask[] = { |
| 17333 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xd7808000, 0x00001ebf, |
| 17334 | }; |
| 17335 | |
| 17336 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17337 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16310000, 0x00000bbf, |
| 17338 | }; |
| 17339 | |
| 17340 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17341 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16520000, 0x00000bff, |
| 17342 | }; |
| 17343 | |
| 17344 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17345 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16640000, 0x00000aff, |
| 17346 | }; |
| 17347 | |
| 17348 | static const uint32_t GPR64x8Class_with_x8sub_4_in_tcGPRnotx16SubClassMask[] = { |
| 17349 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56980000, 0x00001bbf, |
| 17350 | }; |
| 17351 | |
| 17352 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17353 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16100000, 0x00000bbf, |
| 17354 | }; |
| 17355 | |
| 17356 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17357 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16200000, 0x00000abf, |
| 17358 | }; |
| 17359 | |
| 17360 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { |
| 17361 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16400000, 0x00000aff, |
| 17362 | }; |
| 17363 | |
| 17364 | static const uint32_t GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17SubClassMask[] = { |
| 17365 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x56800000, 0x00001abf, |
| 17366 | }; |
| 17367 | |
| 17368 | static const uint32_t GPR64x8Class_with_x8sub_6_in_tcGPRnotx16SubClassMask[] = { |
| 17369 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x17000000, 0x00000ebf, |
| 17370 | }; |
| 17371 | |
| 17372 | static const uint32_t GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17SubClassMask[] = { |
| 17373 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x16000000, 0x00000abf, |
| 17374 | }; |
| 17375 | |
| 17376 | static const uint32_t GPR64x8Class_with_sub_32_in_GPR32argSubClassMask[] = { |
| 17377 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000a9e, |
| 17378 | }; |
| 17379 | |
| 17380 | static const uint32_t MPR32SubClassMask[] = { |
| 17381 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000000, |
| 17382 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs0 |
| 17383 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00038000, // zasubs1 |
| 17384 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs0 |
| 17385 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1_then_zasubs1 |
| 17386 | }; |
| 17387 | |
| 17388 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64argSubClassMask[] = { |
| 17389 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000a8c, |
| 17390 | }; |
| 17391 | |
| 17392 | static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { |
| 17393 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000500, |
| 17394 | }; |
| 17395 | |
| 17396 | static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17397 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00001020, |
| 17398 | }; |
| 17399 | |
| 17400 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { |
| 17401 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00001400, |
| 17402 | }; |
| 17403 | |
| 17404 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17405 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000031, |
| 17406 | }; |
| 17407 | |
| 17408 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17409 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000092, |
| 17410 | }; |
| 17411 | |
| 17412 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64argSubClassMask[] = { |
| 17413 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000a04, |
| 17414 | }; |
| 17415 | |
| 17416 | static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17417 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000288, |
| 17418 | }; |
| 17419 | |
| 17420 | static const uint32_t GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17421 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, |
| 17422 | }; |
| 17423 | |
| 17424 | static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17425 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, |
| 17426 | }; |
| 17427 | |
| 17428 | static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPRx16x17SubClassMask[] = { |
| 17429 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, |
| 17430 | }; |
| 17431 | |
| 17432 | static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17433 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, |
| 17434 | }; |
| 17435 | |
| 17436 | static const uint32_t GPR64x8Class_with_x8sub_2_in_tcGPRx16x17SubClassMask[] = { |
| 17437 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, |
| 17438 | }; |
| 17439 | |
| 17440 | static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { |
| 17441 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, |
| 17442 | }; |
| 17443 | |
| 17444 | static const uint32_t GPR64x8Class_with_x8sub_4_in_tcGPRx16x17SubClassMask[] = { |
| 17445 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, |
| 17446 | }; |
| 17447 | |
| 17448 | static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64argSubClassMask[] = { |
| 17449 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, |
| 17450 | }; |
| 17451 | |
| 17452 | static const uint32_t GPR64x8Class_with_x8sub_6_in_tcGPRx16x17SubClassMask[] = { |
| 17453 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, |
| 17454 | }; |
| 17455 | |
| 17456 | static const uint32_t GPR64x8Class_with_x8sub_7_in_FIXED_REGSSubClassMask[] = { |
| 17457 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, |
| 17458 | }; |
| 17459 | |
| 17460 | static const uint32_t ZTRSubClassMask[] = { |
| 17461 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, |
| 17462 | }; |
| 17463 | |
| 17464 | static const uint32_t MPR16SubClassMask[] = { |
| 17465 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, |
| 17466 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh0 |
| 17467 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00030000, // zasubh1 |
| 17468 | }; |
| 17469 | |
| 17470 | static const uint32_t MPRSubClassMask[] = { |
| 17471 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, |
| 17472 | }; |
| 17473 | |
| 17474 | static const uint32_t MPR8SubClassMask[] = { |
| 17475 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00020000, |
| 17476 | 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, // zasubb |
| 17477 | }; |
| 17478 | |
| 17479 | static const uint16_t SuperRegIdxSeqs[] = { |
| 17480 | /* 0 */ 3, 4, 5, 6, 7, 0, |
| 17481 | /* 6 */ 12, 13, 0, |
| 17482 | /* 9 */ 20, 0, |
| 17483 | /* 11 */ 25, 33, 0, |
| 17484 | /* 14 */ 25, 27, 29, 31, 33, 0, |
| 17485 | /* 20 */ 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, 0, |
| 17486 | /* 31 */ 34, 0, |
| 17487 | /* 33 */ 37, 38, 0, |
| 17488 | /* 36 */ 14, 15, 16, 17, 43, 0, |
| 17489 | /* 42 */ 44, 45, 46, 47, 0, |
| 17490 | /* 47 */ 41, 42, 61, 62, 0, |
| 17491 | /* 52 */ 35, 36, 51, 52, 57, 58, 65, 66, 0, |
| 17492 | /* 61 */ 39, 40, 49, 50, 53, 54, 55, 56, 59, 60, 63, 64, 67, 68, 69, 70, 0, |
| 17493 | /* 78 */ 1, 71, 77, 83, 0, |
| 17494 | /* 83 */ 9, 73, 79, 85, 0, |
| 17495 | /* 88 */ 18, 75, 81, 87, 0, |
| 17496 | /* 93 */ 11, 89, 0, |
| 17497 | /* 96 */ 11, 12, 13, 89, 0, |
| 17498 | /* 101 */ 20, 22, 24, 93, 95, 97, 99, 101, 103, 105, 107, 0, |
| 17499 | /* 113 */ 112, 114, 116, 117, 0, |
| 17500 | /* 118 */ 118, 0, |
| 17501 | /* 120 */ 113, 115, 119, 0, |
| 17502 | /* 124 */ 126, 127, 128, 129, 0, |
| 17503 | /* 129 */ 125, 130, 131, 132, 133, 0, |
| 17504 | /* 135 */ 120, 122, 124, 134, 0, |
| 17505 | /* 140 */ 135, 0, |
| 17506 | /* 142 */ 121, 123, 136, 0, |
| 17507 | /* 146 */ 138, 140, 0, |
| 17508 | /* 149 */ 137, 139, 141, 0, |
| 17509 | /* 153 */ 137, 139, 141, 143, 0, |
| 17510 | /* 158 */ 137, 139, 141, 142, 143, 0, |
| 17511 | }; |
| 17512 | |
| 17513 | static unsigned const FPR16_loSuperclasses[] = { |
| 17514 | AArch64::FPR16RegClassID, |
| 17515 | }; |
| 17516 | |
| 17517 | static unsigned const PNRSuperclasses[] = { |
| 17518 | AArch64::PPRorPNRRegClassID, |
| 17519 | }; |
| 17520 | |
| 17521 | static unsigned const PPRSuperclasses[] = { |
| 17522 | AArch64::PPRorPNRRegClassID, |
| 17523 | }; |
| 17524 | |
| 17525 | static unsigned const PNR_3bSuperclasses[] = { |
| 17526 | AArch64::PPRorPNRRegClassID, |
| 17527 | AArch64::PNRRegClassID, |
| 17528 | }; |
| 17529 | |
| 17530 | static unsigned const PNR_p8to15Superclasses[] = { |
| 17531 | AArch64::PPRorPNRRegClassID, |
| 17532 | AArch64::PNRRegClassID, |
| 17533 | }; |
| 17534 | |
| 17535 | static unsigned const PPRMul2Superclasses[] = { |
| 17536 | AArch64::PPRorPNRRegClassID, |
| 17537 | AArch64::PPRRegClassID, |
| 17538 | }; |
| 17539 | |
| 17540 | static unsigned const PPR_3bSuperclasses[] = { |
| 17541 | AArch64::PPRorPNRRegClassID, |
| 17542 | AArch64::PPRRegClassID, |
| 17543 | }; |
| 17544 | |
| 17545 | static unsigned const PPR_p8to15Superclasses[] = { |
| 17546 | AArch64::PPRorPNRRegClassID, |
| 17547 | AArch64::PPRRegClassID, |
| 17548 | }; |
| 17549 | |
| 17550 | static unsigned const PPRMul2_and_PPR_3bSuperclasses[] = { |
| 17551 | AArch64::PPRorPNRRegClassID, |
| 17552 | AArch64::PPRRegClassID, |
| 17553 | AArch64::PPRMul2RegClassID, |
| 17554 | AArch64::PPR_3bRegClassID, |
| 17555 | }; |
| 17556 | |
| 17557 | static unsigned const PPRMul2_and_PPR_p8to15Superclasses[] = { |
| 17558 | AArch64::PPRorPNRRegClassID, |
| 17559 | AArch64::PPRRegClassID, |
| 17560 | AArch64::PPRMul2RegClassID, |
| 17561 | AArch64::PPR_p8to15RegClassID, |
| 17562 | }; |
| 17563 | |
| 17564 | static unsigned const PPR2Mul2Superclasses[] = { |
| 17565 | AArch64::PPR2RegClassID, |
| 17566 | }; |
| 17567 | |
| 17568 | static unsigned const PPR2_with_psub1_in_PPRMul2Superclasses[] = { |
| 17569 | AArch64::PPR2RegClassID, |
| 17570 | }; |
| 17571 | |
| 17572 | static unsigned const PPR2_with_psub1_in_PPR_3bSuperclasses[] = { |
| 17573 | AArch64::PPR2RegClassID, |
| 17574 | }; |
| 17575 | |
| 17576 | static unsigned const PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { |
| 17577 | AArch64::PPR2RegClassID, |
| 17578 | }; |
| 17579 | |
| 17580 | static unsigned const PPR2_with_psub_in_PNR_3bSuperclasses[] = { |
| 17581 | AArch64::PPR2RegClassID, |
| 17582 | }; |
| 17583 | |
| 17584 | static unsigned const PPR2_with_psub_in_PNR_p8to15Superclasses[] = { |
| 17585 | AArch64::PPR2RegClassID, |
| 17586 | }; |
| 17587 | |
| 17588 | static unsigned const PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bSuperclasses[] = { |
| 17589 | AArch64::PPR2RegClassID, |
| 17590 | AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17591 | AArch64::PPR2_with_psub_in_PNR_3bRegClassID, |
| 17592 | }; |
| 17593 | |
| 17594 | static unsigned const PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { |
| 17595 | AArch64::PPR2RegClassID, |
| 17596 | AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17597 | AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, |
| 17598 | }; |
| 17599 | |
| 17600 | static unsigned const PPR2Mul2_and_PPR2_with_psub_in_PNR_3bSuperclasses[] = { |
| 17601 | AArch64::PPR2RegClassID, |
| 17602 | AArch64::PPR2Mul2RegClassID, |
| 17603 | AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17604 | AArch64::PPR2_with_psub_in_PNR_3bRegClassID, |
| 17605 | AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17606 | }; |
| 17607 | |
| 17608 | static unsigned const PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15Superclasses[] = { |
| 17609 | AArch64::PPR2RegClassID, |
| 17610 | AArch64::PPR2Mul2RegClassID, |
| 17611 | AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17612 | AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, |
| 17613 | AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17614 | }; |
| 17615 | |
| 17616 | static unsigned const PPR2_with_psub1_in_PPRMul2_and_PPR_3bSuperclasses[] = { |
| 17617 | AArch64::PPR2RegClassID, |
| 17618 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17619 | AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17620 | }; |
| 17621 | |
| 17622 | static unsigned const PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Superclasses[] = { |
| 17623 | AArch64::PPR2RegClassID, |
| 17624 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17625 | AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17626 | }; |
| 17627 | |
| 17628 | static unsigned const PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2Superclasses[] = { |
| 17629 | AArch64::PPR2RegClassID, |
| 17630 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17631 | AArch64::PPR2_with_psub_in_PNR_3bRegClassID, |
| 17632 | }; |
| 17633 | |
| 17634 | static unsigned const PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2Superclasses[] = { |
| 17635 | AArch64::PPR2RegClassID, |
| 17636 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17637 | AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, |
| 17638 | }; |
| 17639 | |
| 17640 | static unsigned const PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bSuperclasses[] = { |
| 17641 | AArch64::PPR2RegClassID, |
| 17642 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17643 | AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17644 | AArch64::PPR2_with_psub_in_PNR_3bRegClassID, |
| 17645 | AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17646 | AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID, |
| 17647 | AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17648 | }; |
| 17649 | |
| 17650 | static unsigned const PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Superclasses[] = { |
| 17651 | AArch64::PPR2RegClassID, |
| 17652 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17653 | AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17654 | AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, |
| 17655 | AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17656 | AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID, |
| 17657 | AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17658 | }; |
| 17659 | |
| 17660 | static unsigned const PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { |
| 17661 | AArch64::PPR2RegClassID, |
| 17662 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17663 | AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, |
| 17664 | AArch64::PPR2_with_psub_in_PNR_3bRegClassID, |
| 17665 | AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID, |
| 17666 | AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17667 | }; |
| 17668 | |
| 17669 | static unsigned const PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bSuperclasses[] = { |
| 17670 | AArch64::PPR2RegClassID, |
| 17671 | AArch64::PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17672 | AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, |
| 17673 | AArch64::PPR2_with_psub_in_PNR_p8to15RegClassID, |
| 17674 | AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID, |
| 17675 | AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClassID, |
| 17676 | }; |
| 17677 | |
| 17678 | static unsigned const GPR32Superclasses[] = { |
| 17679 | AArch64::GPR32allRegClassID, |
| 17680 | }; |
| 17681 | |
| 17682 | static unsigned const GPR32spSuperclasses[] = { |
| 17683 | AArch64::GPR32allRegClassID, |
| 17684 | }; |
| 17685 | |
| 17686 | static unsigned const GPR32commonSuperclasses[] = { |
| 17687 | AArch64::GPR32allRegClassID, |
| 17688 | AArch64::GPR32RegClassID, |
| 17689 | AArch64::GPR32spRegClassID, |
| 17690 | }; |
| 17691 | |
| 17692 | static unsigned const FPR32_with_hsub_in_FPR16_loSuperclasses[] = { |
| 17693 | AArch64::FPR32RegClassID, |
| 17694 | }; |
| 17695 | |
| 17696 | static unsigned const GPR32argSuperclasses[] = { |
| 17697 | AArch64::GPR32allRegClassID, |
| 17698 | AArch64::GPR32RegClassID, |
| 17699 | AArch64::GPR32spRegClassID, |
| 17700 | AArch64::GPR32commonRegClassID, |
| 17701 | }; |
| 17702 | |
| 17703 | static unsigned const MatrixIndexGPR32_12_15Superclasses[] = { |
| 17704 | AArch64::GPR32allRegClassID, |
| 17705 | AArch64::GPR32RegClassID, |
| 17706 | AArch64::GPR32spRegClassID, |
| 17707 | AArch64::GPR32commonRegClassID, |
| 17708 | }; |
| 17709 | |
| 17710 | static unsigned const MatrixIndexGPR32_8_11Superclasses[] = { |
| 17711 | AArch64::GPR32allRegClassID, |
| 17712 | AArch64::GPR32RegClassID, |
| 17713 | AArch64::GPR32spRegClassID, |
| 17714 | AArch64::GPR32commonRegClassID, |
| 17715 | }; |
| 17716 | |
| 17717 | static unsigned const GPR32sponlySuperclasses[] = { |
| 17718 | AArch64::GPR32allRegClassID, |
| 17719 | AArch64::GPR32spRegClassID, |
| 17720 | }; |
| 17721 | |
| 17722 | static unsigned const WSeqPairsClass_with_subo32_in_GPR32commonSuperclasses[] = { |
| 17723 | AArch64::WSeqPairsClassRegClassID, |
| 17724 | }; |
| 17725 | |
| 17726 | static unsigned const WSeqPairsClass_with_sube32_in_GPR32argSuperclasses[] = { |
| 17727 | AArch64::WSeqPairsClassRegClassID, |
| 17728 | AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, |
| 17729 | }; |
| 17730 | |
| 17731 | static unsigned const WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Superclasses[] = { |
| 17732 | AArch64::WSeqPairsClassRegClassID, |
| 17733 | AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, |
| 17734 | }; |
| 17735 | |
| 17736 | static unsigned const WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 17737 | AArch64::WSeqPairsClassRegClassID, |
| 17738 | AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, |
| 17739 | }; |
| 17740 | |
| 17741 | static unsigned const GPR64Superclasses[] = { |
| 17742 | AArch64::GPR64allRegClassID, |
| 17743 | }; |
| 17744 | |
| 17745 | static unsigned const GPR64spSuperclasses[] = { |
| 17746 | AArch64::GPR64allRegClassID, |
| 17747 | }; |
| 17748 | |
| 17749 | static unsigned const GPR64commonSuperclasses[] = { |
| 17750 | AArch64::GPR64allRegClassID, |
| 17751 | AArch64::GPR64RegClassID, |
| 17752 | AArch64::GPR64spRegClassID, |
| 17753 | }; |
| 17754 | |
| 17755 | static unsigned const GPR64noipSuperclasses[] = { |
| 17756 | AArch64::GPR64allRegClassID, |
| 17757 | AArch64::GPR64RegClassID, |
| 17758 | }; |
| 17759 | |
| 17760 | static unsigned const GPR64common_and_GPR64noipSuperclasses[] = { |
| 17761 | AArch64::GPR64allRegClassID, |
| 17762 | AArch64::GPR64RegClassID, |
| 17763 | AArch64::GPR64spRegClassID, |
| 17764 | AArch64::GPR64commonRegClassID, |
| 17765 | AArch64::GPR64noipRegClassID, |
| 17766 | }; |
| 17767 | |
| 17768 | static unsigned const tcGPR64Superclasses[] = { |
| 17769 | AArch64::GPR64allRegClassID, |
| 17770 | AArch64::GPR64RegClassID, |
| 17771 | AArch64::GPR64spRegClassID, |
| 17772 | AArch64::GPR64commonRegClassID, |
| 17773 | }; |
| 17774 | |
| 17775 | static unsigned const tcGPRnotx16Superclasses[] = { |
| 17776 | AArch64::GPR64allRegClassID, |
| 17777 | AArch64::GPR64RegClassID, |
| 17778 | AArch64::GPR64spRegClassID, |
| 17779 | AArch64::GPR64commonRegClassID, |
| 17780 | AArch64::tcGPR64RegClassID, |
| 17781 | }; |
| 17782 | |
| 17783 | static unsigned const tcGPRnotx16x17Superclasses[] = { |
| 17784 | AArch64::GPR64allRegClassID, |
| 17785 | AArch64::GPR64RegClassID, |
| 17786 | AArch64::GPR64spRegClassID, |
| 17787 | AArch64::GPR64commonRegClassID, |
| 17788 | AArch64::GPR64noipRegClassID, |
| 17789 | AArch64::GPR64common_and_GPR64noipRegClassID, |
| 17790 | AArch64::tcGPR64RegClassID, |
| 17791 | AArch64::tcGPRnotx16RegClassID, |
| 17792 | }; |
| 17793 | |
| 17794 | static unsigned const FPR64_loSuperclasses[] = { |
| 17795 | AArch64::FPR64RegClassID, |
| 17796 | }; |
| 17797 | |
| 17798 | static unsigned const GPR64argSuperclasses[] = { |
| 17799 | AArch64::GPR64allRegClassID, |
| 17800 | AArch64::GPR64RegClassID, |
| 17801 | AArch64::GPR64spRegClassID, |
| 17802 | AArch64::GPR64commonRegClassID, |
| 17803 | AArch64::GPR64noipRegClassID, |
| 17804 | AArch64::GPR64common_and_GPR64noipRegClassID, |
| 17805 | AArch64::tcGPR64RegClassID, |
| 17806 | AArch64::tcGPRnotx16RegClassID, |
| 17807 | AArch64::tcGPRnotx16x17RegClassID, |
| 17808 | }; |
| 17809 | |
| 17810 | static unsigned const GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { |
| 17811 | AArch64::GPR64allRegClassID, |
| 17812 | AArch64::GPR64RegClassID, |
| 17813 | AArch64::GPR64spRegClassID, |
| 17814 | AArch64::GPR64commonRegClassID, |
| 17815 | AArch64::GPR64noipRegClassID, |
| 17816 | AArch64::GPR64common_and_GPR64noipRegClassID, |
| 17817 | AArch64::tcGPR64RegClassID, |
| 17818 | AArch64::tcGPRnotx16RegClassID, |
| 17819 | AArch64::tcGPRnotx16x17RegClassID, |
| 17820 | }; |
| 17821 | |
| 17822 | static unsigned const GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 17823 | AArch64::GPR64allRegClassID, |
| 17824 | AArch64::GPR64RegClassID, |
| 17825 | AArch64::GPR64spRegClassID, |
| 17826 | AArch64::GPR64commonRegClassID, |
| 17827 | AArch64::GPR64noipRegClassID, |
| 17828 | AArch64::GPR64common_and_GPR64noipRegClassID, |
| 17829 | AArch64::tcGPR64RegClassID, |
| 17830 | AArch64::tcGPRnotx16RegClassID, |
| 17831 | AArch64::tcGPRnotx16x17RegClassID, |
| 17832 | }; |
| 17833 | |
| 17834 | static unsigned const FIXED_REGS_with_sub_32Superclasses[] = { |
| 17835 | AArch64::GPR64allRegClassID, |
| 17836 | AArch64::GPR64spRegClassID, |
| 17837 | AArch64::FIXED_REGSRegClassID, |
| 17838 | }; |
| 17839 | |
| 17840 | static unsigned const tcGPRx16x17Superclasses[] = { |
| 17841 | AArch64::GPR64allRegClassID, |
| 17842 | AArch64::GPR64RegClassID, |
| 17843 | AArch64::GPR64spRegClassID, |
| 17844 | AArch64::GPR64commonRegClassID, |
| 17845 | AArch64::tcGPR64RegClassID, |
| 17846 | }; |
| 17847 | |
| 17848 | static unsigned const FIXED_REGS_and_GPR64Superclasses[] = { |
| 17849 | AArch64::GPR64allRegClassID, |
| 17850 | AArch64::GPR64RegClassID, |
| 17851 | AArch64::GPR64spRegClassID, |
| 17852 | AArch64::GPR64commonRegClassID, |
| 17853 | AArch64::GPR64noipRegClassID, |
| 17854 | AArch64::GPR64common_and_GPR64noipRegClassID, |
| 17855 | AArch64::FIXED_REGSRegClassID, |
| 17856 | AArch64::FIXED_REGS_with_sub_32RegClassID, |
| 17857 | }; |
| 17858 | |
| 17859 | static unsigned const GPR64sponlySuperclasses[] = { |
| 17860 | AArch64::GPR64allRegClassID, |
| 17861 | AArch64::GPR64spRegClassID, |
| 17862 | AArch64::FIXED_REGSRegClassID, |
| 17863 | AArch64::FIXED_REGS_with_sub_32RegClassID, |
| 17864 | }; |
| 17865 | |
| 17866 | static unsigned const tcGPRx17Superclasses[] = { |
| 17867 | AArch64::GPR64allRegClassID, |
| 17868 | AArch64::GPR64RegClassID, |
| 17869 | AArch64::GPR64spRegClassID, |
| 17870 | AArch64::GPR64commonRegClassID, |
| 17871 | AArch64::tcGPR64RegClassID, |
| 17872 | AArch64::tcGPRnotx16RegClassID, |
| 17873 | AArch64::tcGPRx16x17RegClassID, |
| 17874 | }; |
| 17875 | |
| 17876 | static unsigned const DD_with_dsub0_in_FPR64_loSuperclasses[] = { |
| 17877 | AArch64::DDRegClassID, |
| 17878 | }; |
| 17879 | |
| 17880 | static unsigned const DD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 17881 | AArch64::DDRegClassID, |
| 17882 | }; |
| 17883 | |
| 17884 | static unsigned const DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 17885 | AArch64::DDRegClassID, |
| 17886 | AArch64::DD_with_dsub0_in_FPR64_loRegClassID, |
| 17887 | AArch64::DD_with_dsub1_in_FPR64_loRegClassID, |
| 17888 | }; |
| 17889 | |
| 17890 | static unsigned const XSeqPairsClass_with_subo64_in_GPR64commonSuperclasses[] = { |
| 17891 | AArch64::XSeqPairsClassRegClassID, |
| 17892 | }; |
| 17893 | |
| 17894 | static unsigned const XSeqPairsClass_with_subo64_in_GPR64noipSuperclasses[] = { |
| 17895 | AArch64::XSeqPairsClassRegClassID, |
| 17896 | }; |
| 17897 | |
| 17898 | static unsigned const XSeqPairsClass_with_sube64_in_GPR64noipSuperclasses[] = { |
| 17899 | AArch64::XSeqPairsClassRegClassID, |
| 17900 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17901 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17902 | }; |
| 17903 | |
| 17904 | static unsigned const XSeqPairsClass_with_sube64_in_tcGPR64Superclasses[] = { |
| 17905 | AArch64::XSeqPairsClassRegClassID, |
| 17906 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17907 | }; |
| 17908 | |
| 17909 | static unsigned const XSeqPairsClass_with_sube64_in_tcGPRnotx16Superclasses[] = { |
| 17910 | AArch64::XSeqPairsClassRegClassID, |
| 17911 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17912 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17913 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17914 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17915 | }; |
| 17916 | |
| 17917 | static unsigned const XSeqPairsClass_with_subo64_in_tcGPR64Superclasses[] = { |
| 17918 | AArch64::XSeqPairsClassRegClassID, |
| 17919 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17920 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17921 | }; |
| 17922 | |
| 17923 | static unsigned const XSeqPairsClass_with_subo64_in_tcGPRnotx16x17Superclasses[] = { |
| 17924 | AArch64::XSeqPairsClassRegClassID, |
| 17925 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17926 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17927 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17928 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17929 | AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID, |
| 17930 | AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, |
| 17931 | }; |
| 17932 | |
| 17933 | static unsigned const XSeqPairsClass_with_sube64_in_GPR64argSuperclasses[] = { |
| 17934 | AArch64::XSeqPairsClassRegClassID, |
| 17935 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17936 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17937 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17938 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17939 | AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID, |
| 17940 | AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, |
| 17941 | AArch64::XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID, |
| 17942 | }; |
| 17943 | |
| 17944 | static unsigned const XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { |
| 17945 | AArch64::XSeqPairsClassRegClassID, |
| 17946 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17947 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17948 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17949 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17950 | AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID, |
| 17951 | AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, |
| 17952 | AArch64::XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID, |
| 17953 | }; |
| 17954 | |
| 17955 | static unsigned const XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 17956 | AArch64::XSeqPairsClassRegClassID, |
| 17957 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17958 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17959 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17960 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17961 | AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID, |
| 17962 | AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, |
| 17963 | AArch64::XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID, |
| 17964 | }; |
| 17965 | |
| 17966 | static unsigned const XSeqPairsClass_with_sube64_in_tcGPRx16x17Superclasses[] = { |
| 17967 | AArch64::XSeqPairsClassRegClassID, |
| 17968 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17969 | AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, |
| 17970 | AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, |
| 17971 | }; |
| 17972 | |
| 17973 | static unsigned const XSeqPairsClass_with_subo64_in_FIXED_REGSSuperclasses[] = { |
| 17974 | AArch64::XSeqPairsClassRegClassID, |
| 17975 | AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, |
| 17976 | AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, |
| 17977 | AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, |
| 17978 | }; |
| 17979 | |
| 17980 | static unsigned const FPR128_loSuperclasses[] = { |
| 17981 | AArch64::FPR128RegClassID, |
| 17982 | }; |
| 17983 | |
| 17984 | static unsigned const ZPRMul2Superclasses[] = { |
| 17985 | AArch64::ZPRRegClassID, |
| 17986 | }; |
| 17987 | |
| 17988 | static unsigned const ZPR_4bSuperclasses[] = { |
| 17989 | AArch64::ZPRRegClassID, |
| 17990 | }; |
| 17991 | |
| 17992 | static unsigned const FPR128_0to7Superclasses[] = { |
| 17993 | AArch64::FPR128RegClassID, |
| 17994 | AArch64::FPR128_loRegClassID, |
| 17995 | }; |
| 17996 | |
| 17997 | static unsigned const ZPRMul2_HiSuperclasses[] = { |
| 17998 | AArch64::ZPRRegClassID, |
| 17999 | AArch64::ZPRMul2RegClassID, |
| 18000 | }; |
| 18001 | |
| 18002 | static unsigned const ZPRMul2_LoSuperclasses[] = { |
| 18003 | AArch64::ZPRRegClassID, |
| 18004 | AArch64::ZPRMul2RegClassID, |
| 18005 | AArch64::ZPR_4bRegClassID, |
| 18006 | }; |
| 18007 | |
| 18008 | static unsigned const ZPRMul4Superclasses[] = { |
| 18009 | AArch64::ZPRRegClassID, |
| 18010 | AArch64::ZPRMul2RegClassID, |
| 18011 | }; |
| 18012 | |
| 18013 | static unsigned const ZPR_3bSuperclasses[] = { |
| 18014 | AArch64::ZPRRegClassID, |
| 18015 | AArch64::ZPR_4bRegClassID, |
| 18016 | }; |
| 18017 | |
| 18018 | static unsigned const ZPR_KSuperclasses[] = { |
| 18019 | AArch64::ZPRRegClassID, |
| 18020 | }; |
| 18021 | |
| 18022 | static unsigned const ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 18023 | AArch64::ZPRRegClassID, |
| 18024 | AArch64::ZPRMul2RegClassID, |
| 18025 | AArch64::ZPRMul2_HiRegClassID, |
| 18026 | AArch64::ZPRMul4RegClassID, |
| 18027 | }; |
| 18028 | |
| 18029 | static unsigned const ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 18030 | AArch64::ZPRRegClassID, |
| 18031 | AArch64::ZPRMul2RegClassID, |
| 18032 | AArch64::ZPR_4bRegClassID, |
| 18033 | AArch64::ZPRMul2_LoRegClassID, |
| 18034 | AArch64::ZPRMul4RegClassID, |
| 18035 | }; |
| 18036 | |
| 18037 | static unsigned const ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 18038 | AArch64::ZPRRegClassID, |
| 18039 | AArch64::ZPRMul2RegClassID, |
| 18040 | AArch64::ZPR_4bRegClassID, |
| 18041 | AArch64::ZPRMul2_LoRegClassID, |
| 18042 | AArch64::ZPR_3bRegClassID, |
| 18043 | }; |
| 18044 | |
| 18045 | static unsigned const ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 18046 | AArch64::ZPRRegClassID, |
| 18047 | AArch64::ZPRMul2RegClassID, |
| 18048 | AArch64::ZPRMul2_HiRegClassID, |
| 18049 | AArch64::ZPR_KRegClassID, |
| 18050 | }; |
| 18051 | |
| 18052 | static unsigned const ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 18053 | AArch64::ZPRRegClassID, |
| 18054 | AArch64::ZPRMul2RegClassID, |
| 18055 | AArch64::ZPR_4bRegClassID, |
| 18056 | AArch64::ZPRMul2_LoRegClassID, |
| 18057 | AArch64::ZPRMul4RegClassID, |
| 18058 | AArch64::ZPR_3bRegClassID, |
| 18059 | AArch64::ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18060 | AArch64::ZPRMul2_and_ZPR_3bRegClassID, |
| 18061 | }; |
| 18062 | |
| 18063 | static unsigned const ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 18064 | AArch64::ZPRRegClassID, |
| 18065 | AArch64::ZPRMul2RegClassID, |
| 18066 | AArch64::ZPRMul2_HiRegClassID, |
| 18067 | AArch64::ZPRMul4RegClassID, |
| 18068 | AArch64::ZPR_KRegClassID, |
| 18069 | AArch64::ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18070 | AArch64::ZPRMul2_and_ZPR_KRegClassID, |
| 18071 | }; |
| 18072 | |
| 18073 | static unsigned const DDD_with_dsub0_in_FPR64_loSuperclasses[] = { |
| 18074 | AArch64::DDDRegClassID, |
| 18075 | }; |
| 18076 | |
| 18077 | static unsigned const DDD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18078 | AArch64::DDDRegClassID, |
| 18079 | }; |
| 18080 | |
| 18081 | static unsigned const DDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18082 | AArch64::DDDRegClassID, |
| 18083 | }; |
| 18084 | |
| 18085 | static unsigned const DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18086 | AArch64::DDDRegClassID, |
| 18087 | AArch64::DDD_with_dsub0_in_FPR64_loRegClassID, |
| 18088 | AArch64::DDD_with_dsub1_in_FPR64_loRegClassID, |
| 18089 | }; |
| 18090 | |
| 18091 | static unsigned const DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18092 | AArch64::DDDRegClassID, |
| 18093 | AArch64::DDD_with_dsub1_in_FPR64_loRegClassID, |
| 18094 | AArch64::DDD_with_dsub2_in_FPR64_loRegClassID, |
| 18095 | }; |
| 18096 | |
| 18097 | static unsigned const DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18098 | AArch64::DDDRegClassID, |
| 18099 | AArch64::DDD_with_dsub0_in_FPR64_loRegClassID, |
| 18100 | AArch64::DDD_with_dsub1_in_FPR64_loRegClassID, |
| 18101 | AArch64::DDD_with_dsub2_in_FPR64_loRegClassID, |
| 18102 | AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID, |
| 18103 | AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID, |
| 18104 | }; |
| 18105 | |
| 18106 | static unsigned const DDDD_with_dsub0_in_FPR64_loSuperclasses[] = { |
| 18107 | AArch64::DDDDRegClassID, |
| 18108 | }; |
| 18109 | |
| 18110 | static unsigned const DDDD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18111 | AArch64::DDDDRegClassID, |
| 18112 | }; |
| 18113 | |
| 18114 | static unsigned const DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18115 | AArch64::DDDDRegClassID, |
| 18116 | }; |
| 18117 | |
| 18118 | static unsigned const DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 18119 | AArch64::DDDDRegClassID, |
| 18120 | }; |
| 18121 | |
| 18122 | static unsigned const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18123 | AArch64::DDDDRegClassID, |
| 18124 | AArch64::DDDD_with_dsub0_in_FPR64_loRegClassID, |
| 18125 | AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18126 | }; |
| 18127 | |
| 18128 | static unsigned const DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18129 | AArch64::DDDDRegClassID, |
| 18130 | AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18131 | AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18132 | }; |
| 18133 | |
| 18134 | static unsigned const DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 18135 | AArch64::DDDDRegClassID, |
| 18136 | AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18137 | AArch64::DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18138 | }; |
| 18139 | |
| 18140 | static unsigned const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18141 | AArch64::DDDDRegClassID, |
| 18142 | AArch64::DDDD_with_dsub0_in_FPR64_loRegClassID, |
| 18143 | AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18144 | AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18145 | AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18146 | AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18147 | }; |
| 18148 | |
| 18149 | static unsigned const DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 18150 | AArch64::DDDDRegClassID, |
| 18151 | AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18152 | AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18153 | AArch64::DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18154 | AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18155 | AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18156 | }; |
| 18157 | |
| 18158 | static unsigned const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 18159 | AArch64::DDDDRegClassID, |
| 18160 | AArch64::DDDD_with_dsub0_in_FPR64_loRegClassID, |
| 18161 | AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18162 | AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18163 | AArch64::DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18164 | AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID, |
| 18165 | AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18166 | AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18167 | AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, |
| 18168 | AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, |
| 18169 | }; |
| 18170 | |
| 18171 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2Superclasses[] = { |
| 18172 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18173 | }; |
| 18174 | |
| 18175 | static unsigned const QQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18176 | AArch64::QQRegClassID, |
| 18177 | }; |
| 18178 | |
| 18179 | static unsigned const QQ_with_qsub0_in_FPR128_loSuperclasses[] = { |
| 18180 | AArch64::QQRegClassID, |
| 18181 | }; |
| 18182 | |
| 18183 | static unsigned const ZPR2Mul2Superclasses[] = { |
| 18184 | AArch64::ZPR2RegClassID, |
| 18185 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18186 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18187 | }; |
| 18188 | |
| 18189 | static unsigned const ZPR2StridedSuperclasses[] = { |
| 18190 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18191 | }; |
| 18192 | |
| 18193 | static unsigned const ZPR2StridedOrContiguous_with_dsub_in_FPR64_loSuperclasses[] = { |
| 18194 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18195 | }; |
| 18196 | |
| 18197 | static unsigned const ZPR2_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18198 | AArch64::ZPR2RegClassID, |
| 18199 | }; |
| 18200 | |
| 18201 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 18202 | AArch64::ZPR2RegClassID, |
| 18203 | }; |
| 18204 | |
| 18205 | static unsigned const ZPR2_with_zsub_in_FPR128_loSuperclasses[] = { |
| 18206 | AArch64::ZPR2RegClassID, |
| 18207 | }; |
| 18208 | |
| 18209 | static unsigned const QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18210 | AArch64::QQRegClassID, |
| 18211 | AArch64::QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18212 | AArch64::QQ_with_qsub0_in_FPR128_loRegClassID, |
| 18213 | }; |
| 18214 | |
| 18215 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18216 | AArch64::ZPR2RegClassID, |
| 18217 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18218 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18219 | }; |
| 18220 | |
| 18221 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSuperclasses[] = { |
| 18222 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18223 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18224 | }; |
| 18225 | |
| 18226 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSuperclasses[] = { |
| 18227 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18228 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18229 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18230 | }; |
| 18231 | |
| 18232 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18233 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18234 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18235 | }; |
| 18236 | |
| 18237 | static unsigned const ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 18238 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18239 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18240 | }; |
| 18241 | |
| 18242 | static unsigned const QQ_with_qsub0_in_FPR128_0to7Superclasses[] = { |
| 18243 | AArch64::QQRegClassID, |
| 18244 | AArch64::QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18245 | AArch64::QQ_with_qsub0_in_FPR128_loRegClassID, |
| 18246 | AArch64::QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18247 | }; |
| 18248 | |
| 18249 | static unsigned const QQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18250 | AArch64::QQRegClassID, |
| 18251 | AArch64::QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18252 | }; |
| 18253 | |
| 18254 | static unsigned const ZPR2Mul2_HiSuperclasses[] = { |
| 18255 | AArch64::ZPR2RegClassID, |
| 18256 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18257 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18258 | AArch64::ZPR2Mul2RegClassID, |
| 18259 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18260 | }; |
| 18261 | |
| 18262 | static unsigned const ZPR2Mul2_LoSuperclasses[] = { |
| 18263 | AArch64::ZPR2RegClassID, |
| 18264 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18265 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18266 | AArch64::ZPR2Mul2RegClassID, |
| 18267 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18268 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18269 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18270 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18271 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18272 | }; |
| 18273 | |
| 18274 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 18275 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18276 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18277 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18278 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18279 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18280 | }; |
| 18281 | |
| 18282 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18283 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18284 | }; |
| 18285 | |
| 18286 | static unsigned const ZPR2Strided_with_dsub_in_FPR64_loSuperclasses[] = { |
| 18287 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18288 | AArch64::ZPR2StridedRegClassID, |
| 18289 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18290 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18291 | }; |
| 18292 | |
| 18293 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2Superclasses[] = { |
| 18294 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18295 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18296 | AArch64::ZPR2StridedRegClassID, |
| 18297 | }; |
| 18298 | |
| 18299 | static unsigned const ZPR2_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18300 | AArch64::ZPR2RegClassID, |
| 18301 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18302 | }; |
| 18303 | |
| 18304 | static unsigned const ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18305 | AArch64::ZPR2RegClassID, |
| 18306 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18307 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18308 | AArch64::ZPR2Mul2RegClassID, |
| 18309 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18310 | }; |
| 18311 | |
| 18312 | static unsigned const ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18313 | AArch64::ZPR2RegClassID, |
| 18314 | }; |
| 18315 | |
| 18316 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 18317 | AArch64::ZPR2RegClassID, |
| 18318 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18319 | }; |
| 18320 | |
| 18321 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 18322 | AArch64::ZPR2RegClassID, |
| 18323 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18324 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18325 | }; |
| 18326 | |
| 18327 | static unsigned const ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 18328 | AArch64::ZPR2RegClassID, |
| 18329 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18330 | }; |
| 18331 | |
| 18332 | static unsigned const ZPR2_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 18333 | AArch64::ZPR2RegClassID, |
| 18334 | }; |
| 18335 | |
| 18336 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 18337 | AArch64::ZPR2RegClassID, |
| 18338 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18339 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18340 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18341 | }; |
| 18342 | |
| 18343 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 18344 | AArch64::ZPR2RegClassID, |
| 18345 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18346 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18347 | }; |
| 18348 | |
| 18349 | static unsigned const QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18350 | AArch64::QQRegClassID, |
| 18351 | AArch64::QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18352 | AArch64::QQ_with_qsub0_in_FPR128_loRegClassID, |
| 18353 | AArch64::QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClassID, |
| 18354 | AArch64::QQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 18355 | AArch64::QQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 18356 | }; |
| 18357 | |
| 18358 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18359 | AArch64::ZPR2RegClassID, |
| 18360 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18361 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18362 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18363 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18364 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18365 | }; |
| 18366 | |
| 18367 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 18368 | AArch64::ZPR2RegClassID, |
| 18369 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18370 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18371 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18372 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18373 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18374 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18375 | }; |
| 18376 | |
| 18377 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 18378 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18379 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18380 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18381 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18382 | }; |
| 18383 | |
| 18384 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 18385 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18386 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18387 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18388 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18389 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18390 | }; |
| 18391 | |
| 18392 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 18393 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18394 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18395 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18396 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18397 | }; |
| 18398 | |
| 18399 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 18400 | AArch64::ZPR2RegClassID, |
| 18401 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18402 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18403 | }; |
| 18404 | |
| 18405 | static unsigned const ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18406 | AArch64::ZPR2RegClassID, |
| 18407 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18408 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18409 | AArch64::ZPR2Mul2RegClassID, |
| 18410 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18411 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18412 | AArch64::ZPR2Mul2_HiRegClassID, |
| 18413 | AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18414 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18415 | }; |
| 18416 | |
| 18417 | static unsigned const ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18418 | AArch64::ZPR2RegClassID, |
| 18419 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18420 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18421 | AArch64::ZPR2Mul2RegClassID, |
| 18422 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18423 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18424 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18425 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18426 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18427 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18428 | AArch64::ZPR2Mul2_LoRegClassID, |
| 18429 | AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18430 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18431 | }; |
| 18432 | |
| 18433 | static unsigned const ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18434 | AArch64::ZPR2RegClassID, |
| 18435 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18436 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18437 | AArch64::ZPR2Mul2RegClassID, |
| 18438 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18439 | AArch64::ZPR2Mul2_HiRegClassID, |
| 18440 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18441 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18442 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18443 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18444 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18445 | }; |
| 18446 | |
| 18447 | static unsigned const ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 18448 | AArch64::ZPR2RegClassID, |
| 18449 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18450 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18451 | AArch64::ZPR2Mul2RegClassID, |
| 18452 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18453 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18454 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18455 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18456 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18457 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18458 | AArch64::ZPR2Mul2_LoRegClassID, |
| 18459 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18460 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18461 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18462 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18463 | }; |
| 18464 | |
| 18465 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 18466 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18467 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18468 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18469 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18470 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18471 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18472 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18473 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18474 | }; |
| 18475 | |
| 18476 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2_HiSuperclasses[] = { |
| 18477 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18478 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18479 | AArch64::ZPR2StridedRegClassID, |
| 18480 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18481 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18482 | }; |
| 18483 | |
| 18484 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2_LoSuperclasses[] = { |
| 18485 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18486 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18487 | AArch64::ZPR2StridedRegClassID, |
| 18488 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18489 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18490 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18491 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18492 | AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClassID, |
| 18493 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18494 | }; |
| 18495 | |
| 18496 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18497 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18498 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18499 | AArch64::ZPR2StridedRegClassID, |
| 18500 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18501 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18502 | }; |
| 18503 | |
| 18504 | static unsigned const ZPR2Strided_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18505 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18506 | AArch64::ZPR2StridedRegClassID, |
| 18507 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18508 | }; |
| 18509 | |
| 18510 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 18511 | AArch64::ZPR2RegClassID, |
| 18512 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18513 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18514 | }; |
| 18515 | |
| 18516 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 18517 | AArch64::ZPR2RegClassID, |
| 18518 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18519 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18520 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18521 | }; |
| 18522 | |
| 18523 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 18524 | AArch64::ZPR2RegClassID, |
| 18525 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18526 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18527 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18528 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18529 | }; |
| 18530 | |
| 18531 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 18532 | AArch64::ZPR2RegClassID, |
| 18533 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18534 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18535 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18536 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18537 | }; |
| 18538 | |
| 18539 | static unsigned const ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 18540 | AArch64::ZPR2RegClassID, |
| 18541 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18542 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18543 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18544 | }; |
| 18545 | |
| 18546 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 18547 | AArch64::ZPR2RegClassID, |
| 18548 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18549 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18550 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18551 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18552 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18553 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18554 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18555 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18556 | }; |
| 18557 | |
| 18558 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 18559 | AArch64::ZPR2RegClassID, |
| 18560 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18561 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18562 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18563 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18564 | }; |
| 18565 | |
| 18566 | static unsigned const ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 18567 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18568 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18569 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18570 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18571 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18572 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18573 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18574 | }; |
| 18575 | |
| 18576 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 18577 | AArch64::ZPR2RegClassID, |
| 18578 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18579 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18580 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18581 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18582 | }; |
| 18583 | |
| 18584 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 18585 | AArch64::ZPR2RegClassID, |
| 18586 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18587 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18588 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18589 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18590 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18591 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18592 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18593 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18594 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18595 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18596 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18597 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18598 | }; |
| 18599 | |
| 18600 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 18601 | AArch64::ZPR2RegClassID, |
| 18602 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18603 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18604 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18605 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18606 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18607 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18608 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18609 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18610 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18611 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18612 | }; |
| 18613 | |
| 18614 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 18615 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18616 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18617 | AArch64::ZPR2StridedRegClassID, |
| 18618 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18619 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18620 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18621 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18622 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18623 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID, |
| 18624 | }; |
| 18625 | |
| 18626 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 18627 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18628 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18629 | AArch64::ZPR2StridedRegClassID, |
| 18630 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18631 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18632 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18633 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18634 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18635 | AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClassID, |
| 18636 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18637 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18638 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 18639 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18640 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID, |
| 18641 | }; |
| 18642 | |
| 18643 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 18644 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18645 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18646 | AArch64::ZPR2StridedRegClassID, |
| 18647 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18648 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18649 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18650 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18651 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18652 | AArch64::ZPR2Strided_with_zsub0_in_ZPR_KRegClassID, |
| 18653 | }; |
| 18654 | |
| 18655 | static unsigned const ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 18656 | AArch64::ZPR2RegClassID, |
| 18657 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18658 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18659 | AArch64::ZPR2Mul2RegClassID, |
| 18660 | AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 18661 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18662 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18663 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18664 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 18665 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18666 | AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 18667 | AArch64::ZPR2Mul2_LoRegClassID, |
| 18668 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18669 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18670 | AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18671 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18672 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18673 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18674 | AArch64::ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18675 | AArch64::ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18676 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 18677 | }; |
| 18678 | |
| 18679 | static unsigned const ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 18680 | AArch64::ZPR2RegClassID, |
| 18681 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18682 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18683 | AArch64::ZPR2Mul2RegClassID, |
| 18684 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18685 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18686 | AArch64::ZPR2Mul2_HiRegClassID, |
| 18687 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18688 | AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18689 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18690 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18691 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18692 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18693 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18694 | AArch64::ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 18695 | AArch64::ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18696 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, |
| 18697 | }; |
| 18698 | |
| 18699 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 18700 | AArch64::ZPR2RegClassID, |
| 18701 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18702 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18703 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18704 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18705 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18706 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18707 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18708 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18709 | }; |
| 18710 | |
| 18711 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 18712 | AArch64::ZPR2RegClassID, |
| 18713 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18714 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18715 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18716 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18717 | }; |
| 18718 | |
| 18719 | static unsigned const ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 18720 | AArch64::ZPR2RegClassID, |
| 18721 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18722 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18723 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18724 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18725 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18726 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18727 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18728 | }; |
| 18729 | |
| 18730 | static unsigned const ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 18731 | AArch64::ZPR2RegClassID, |
| 18732 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18733 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18734 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18735 | AArch64::ZPR2_with_zsub1_in_ZPR_KRegClassID, |
| 18736 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18737 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18738 | }; |
| 18739 | |
| 18740 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 18741 | AArch64::ZPR2RegClassID, |
| 18742 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18743 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18744 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18745 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18746 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18747 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18748 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18749 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18750 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18751 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18752 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18753 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18754 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18755 | }; |
| 18756 | |
| 18757 | static unsigned const ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 18758 | AArch64::ZPR2StridedOrContiguousRegClassID, |
| 18759 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 18760 | AArch64::ZPR2StridedRegClassID, |
| 18761 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18762 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 18763 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID, |
| 18764 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 18765 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18766 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18767 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 18768 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID, |
| 18769 | AArch64::ZPR2Strided_with_zsub0_in_ZPR_KRegClassID, |
| 18770 | AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID, |
| 18771 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18772 | AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID, |
| 18773 | }; |
| 18774 | |
| 18775 | static unsigned const ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18776 | AArch64::ZPR2RegClassID, |
| 18777 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18778 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18779 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18780 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18781 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18782 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18783 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18784 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18785 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18786 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18787 | AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 18788 | }; |
| 18789 | |
| 18790 | static unsigned const ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 18791 | AArch64::ZPR2RegClassID, |
| 18792 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18793 | AArch64::ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 18794 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18795 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18796 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18797 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18798 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18799 | AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18800 | }; |
| 18801 | |
| 18802 | static unsigned const ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 18803 | AArch64::ZPR2RegClassID, |
| 18804 | AArch64::ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18805 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18806 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18807 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID, |
| 18808 | AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18809 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18810 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18811 | AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 18812 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18813 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID, |
| 18814 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 18815 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18816 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18817 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18818 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18819 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 18820 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 18821 | AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 18822 | AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18823 | }; |
| 18824 | |
| 18825 | static unsigned const ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 18826 | AArch64::ZPR2RegClassID, |
| 18827 | AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18828 | AArch64::ZPR2_with_zsub_in_FPR128_loRegClassID, |
| 18829 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 18830 | AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18831 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 18832 | AArch64::ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 18833 | AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 18834 | }; |
| 18835 | |
| 18836 | static unsigned const QQQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18837 | AArch64::QQQRegClassID, |
| 18838 | }; |
| 18839 | |
| 18840 | static unsigned const QQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18841 | AArch64::QQQRegClassID, |
| 18842 | }; |
| 18843 | |
| 18844 | static unsigned const QQQ_with_qsub0_in_FPR128_loSuperclasses[] = { |
| 18845 | AArch64::QQQRegClassID, |
| 18846 | }; |
| 18847 | |
| 18848 | static unsigned const ZPR3_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18849 | AArch64::ZPR3RegClassID, |
| 18850 | }; |
| 18851 | |
| 18852 | static unsigned const ZPR3_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18853 | AArch64::ZPR3RegClassID, |
| 18854 | }; |
| 18855 | |
| 18856 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { |
| 18857 | AArch64::ZPR3RegClassID, |
| 18858 | }; |
| 18859 | |
| 18860 | static unsigned const ZPR3_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 18861 | AArch64::ZPR3RegClassID, |
| 18862 | }; |
| 18863 | |
| 18864 | static unsigned const ZPR3_with_zsub_in_FPR128_loSuperclasses[] = { |
| 18865 | AArch64::ZPR3RegClassID, |
| 18866 | }; |
| 18867 | |
| 18868 | static unsigned const QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18869 | AArch64::QQQRegClassID, |
| 18870 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18871 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18872 | }; |
| 18873 | |
| 18874 | static unsigned const QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18875 | AArch64::QQQRegClassID, |
| 18876 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18877 | AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, |
| 18878 | }; |
| 18879 | |
| 18880 | static unsigned const ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18881 | AArch64::ZPR3RegClassID, |
| 18882 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18883 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18884 | }; |
| 18885 | |
| 18886 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 18887 | AArch64::ZPR3RegClassID, |
| 18888 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18889 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 18890 | }; |
| 18891 | |
| 18892 | static unsigned const QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18893 | AArch64::QQQRegClassID, |
| 18894 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18895 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18896 | AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, |
| 18897 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18898 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18899 | }; |
| 18900 | |
| 18901 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 18902 | AArch64::ZPR3RegClassID, |
| 18903 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18904 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18905 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 18906 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18907 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18908 | }; |
| 18909 | |
| 18910 | static unsigned const QQQ_with_qsub0_in_FPR128_0to7Superclasses[] = { |
| 18911 | AArch64::QQQRegClassID, |
| 18912 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18913 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18914 | AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, |
| 18915 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18916 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18917 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18918 | }; |
| 18919 | |
| 18920 | static unsigned const QQQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18921 | AArch64::QQQRegClassID, |
| 18922 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 18923 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18924 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18925 | }; |
| 18926 | |
| 18927 | static unsigned const QQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 18928 | AArch64::QQQRegClassID, |
| 18929 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 18930 | }; |
| 18931 | |
| 18932 | static unsigned const ZPR3_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 18933 | AArch64::ZPR3RegClassID, |
| 18934 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18935 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18936 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18937 | }; |
| 18938 | |
| 18939 | static unsigned const ZPR3_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 18940 | AArch64::ZPR3RegClassID, |
| 18941 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18942 | }; |
| 18943 | |
| 18944 | static unsigned const ZPR3_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 18945 | AArch64::ZPR3RegClassID, |
| 18946 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 18947 | }; |
| 18948 | |
| 18949 | static unsigned const ZPR3_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 18950 | AArch64::ZPR3RegClassID, |
| 18951 | }; |
| 18952 | |
| 18953 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses[] = { |
| 18954 | AArch64::ZPR3RegClassID, |
| 18955 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 18956 | }; |
| 18957 | |
| 18958 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoSuperclasses[] = { |
| 18959 | AArch64::ZPR3RegClassID, |
| 18960 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18961 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 18962 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 18963 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18964 | }; |
| 18965 | |
| 18966 | static unsigned const ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 18967 | AArch64::ZPR3RegClassID, |
| 18968 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 18969 | }; |
| 18970 | |
| 18971 | static unsigned const ZPR3_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 18972 | AArch64::ZPR3RegClassID, |
| 18973 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 18974 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18975 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 18976 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18977 | }; |
| 18978 | |
| 18979 | static unsigned const ZPR3_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 18980 | AArch64::ZPR3RegClassID, |
| 18981 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 18982 | }; |
| 18983 | |
| 18984 | static unsigned const ZPR3_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 18985 | AArch64::ZPR3RegClassID, |
| 18986 | }; |
| 18987 | |
| 18988 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 18989 | AArch64::ZPR3RegClassID, |
| 18990 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 18991 | }; |
| 18992 | |
| 18993 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_LoSuperclasses[] = { |
| 18994 | AArch64::ZPR3RegClassID, |
| 18995 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 18996 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 18997 | }; |
| 18998 | |
| 18999 | static unsigned const ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 19000 | AArch64::ZPR3RegClassID, |
| 19001 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19002 | }; |
| 19003 | |
| 19004 | static unsigned const ZPR3_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 19005 | AArch64::ZPR3RegClassID, |
| 19006 | }; |
| 19007 | |
| 19008 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 19009 | AArch64::ZPR3RegClassID, |
| 19010 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19011 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19012 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19013 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19014 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19015 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19016 | }; |
| 19017 | |
| 19018 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 19019 | AArch64::ZPR3RegClassID, |
| 19020 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19021 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19022 | }; |
| 19023 | |
| 19024 | static unsigned const QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19025 | AArch64::QQQRegClassID, |
| 19026 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19027 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19028 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19029 | AArch64::QQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 19030 | AArch64::QQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 19031 | }; |
| 19032 | |
| 19033 | static unsigned const QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 19034 | AArch64::QQQRegClassID, |
| 19035 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19036 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19037 | AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19038 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19039 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19040 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19041 | AArch64::QQQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 19042 | AArch64::QQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 19043 | }; |
| 19044 | |
| 19045 | static unsigned const ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19046 | AArch64::ZPR3RegClassID, |
| 19047 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19048 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19049 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19050 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19051 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19052 | }; |
| 19053 | |
| 19054 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 19055 | AArch64::ZPR3RegClassID, |
| 19056 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19057 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19058 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19059 | }; |
| 19060 | |
| 19061 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 19062 | AArch64::ZPR3RegClassID, |
| 19063 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19064 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19065 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19066 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19067 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19068 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19069 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19070 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19071 | }; |
| 19072 | |
| 19073 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 19074 | AArch64::ZPR3RegClassID, |
| 19075 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19076 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19077 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19078 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19079 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19080 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19081 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19082 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19083 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19084 | }; |
| 19085 | |
| 19086 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoSuperclasses[] = { |
| 19087 | AArch64::ZPR3RegClassID, |
| 19088 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19089 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19090 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19091 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19092 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19093 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19094 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19095 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19096 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19097 | }; |
| 19098 | |
| 19099 | static unsigned const QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19100 | AArch64::QQQRegClassID, |
| 19101 | AArch64::QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19102 | AArch64::QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19103 | AArch64::QQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19104 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19105 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19106 | AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19107 | AArch64::QQQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 19108 | AArch64::QQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 19109 | AArch64::QQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 19110 | AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 19111 | AArch64::QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 19112 | }; |
| 19113 | |
| 19114 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 19115 | AArch64::ZPR3RegClassID, |
| 19116 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19117 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19118 | }; |
| 19119 | |
| 19120 | static unsigned const ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 19121 | AArch64::ZPR3RegClassID, |
| 19122 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19123 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19124 | }; |
| 19125 | |
| 19126 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19127 | AArch64::ZPR3RegClassID, |
| 19128 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19129 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19130 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19131 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19132 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19133 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19134 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19135 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19136 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19137 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19138 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19139 | }; |
| 19140 | |
| 19141 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 19142 | AArch64::ZPR3RegClassID, |
| 19143 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19144 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19145 | }; |
| 19146 | |
| 19147 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 19148 | AArch64::ZPR3RegClassID, |
| 19149 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19150 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19151 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19152 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19153 | AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19154 | }; |
| 19155 | |
| 19156 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19157 | AArch64::ZPR3RegClassID, |
| 19158 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19159 | AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClassID, |
| 19160 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19161 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19162 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19163 | }; |
| 19164 | |
| 19165 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 19166 | AArch64::ZPR3RegClassID, |
| 19167 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19168 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19169 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19170 | }; |
| 19171 | |
| 19172 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19173 | AArch64::ZPR3RegClassID, |
| 19174 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19175 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19176 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19177 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19178 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19179 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19180 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19181 | AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClassID, |
| 19182 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19183 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19184 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19185 | }; |
| 19186 | |
| 19187 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19188 | AArch64::ZPR3RegClassID, |
| 19189 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19190 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19191 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19192 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19193 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19194 | }; |
| 19195 | |
| 19196 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 19197 | AArch64::ZPR3RegClassID, |
| 19198 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19199 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19200 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19201 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19202 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19203 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19204 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19205 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19206 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19207 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19208 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19209 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19210 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19211 | }; |
| 19212 | |
| 19213 | static unsigned const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19214 | AArch64::ZPR3RegClassID, |
| 19215 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19216 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19217 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19218 | }; |
| 19219 | |
| 19220 | static unsigned const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19221 | AArch64::ZPR3RegClassID, |
| 19222 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19223 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19224 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19225 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19226 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19227 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19228 | }; |
| 19229 | |
| 19230 | static unsigned const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19231 | AArch64::ZPR3RegClassID, |
| 19232 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19233 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19234 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19235 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19236 | AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19237 | }; |
| 19238 | |
| 19239 | static unsigned const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 19240 | AArch64::ZPR3RegClassID, |
| 19241 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19242 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19243 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19244 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19245 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19246 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19247 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19248 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19249 | }; |
| 19250 | |
| 19251 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 19252 | AArch64::ZPR3RegClassID, |
| 19253 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19254 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19255 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19256 | }; |
| 19257 | |
| 19258 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 19259 | AArch64::ZPR3RegClassID, |
| 19260 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19261 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19262 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19263 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19264 | }; |
| 19265 | |
| 19266 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 19267 | AArch64::ZPR3RegClassID, |
| 19268 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19269 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19270 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19271 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19272 | }; |
| 19273 | |
| 19274 | static unsigned const ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 19275 | AArch64::ZPR3RegClassID, |
| 19276 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19277 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19278 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19279 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19280 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19281 | }; |
| 19282 | |
| 19283 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 19284 | AArch64::ZPR3RegClassID, |
| 19285 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19286 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19287 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19288 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19289 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19290 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19291 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19292 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19293 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19294 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19295 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19296 | }; |
| 19297 | |
| 19298 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 19299 | AArch64::ZPR3RegClassID, |
| 19300 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19301 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19302 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19303 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19304 | }; |
| 19305 | |
| 19306 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 19307 | AArch64::ZPR3RegClassID, |
| 19308 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19309 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19310 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19311 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19312 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19313 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19314 | }; |
| 19315 | |
| 19316 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 19317 | AArch64::ZPR3RegClassID, |
| 19318 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19319 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19320 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19321 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19322 | }; |
| 19323 | |
| 19324 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 19325 | AArch64::ZPR3RegClassID, |
| 19326 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19327 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19328 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19329 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19330 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19331 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19332 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19333 | }; |
| 19334 | |
| 19335 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 19336 | AArch64::ZPR3RegClassID, |
| 19337 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19338 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19339 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19340 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19341 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19342 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19343 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19344 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19345 | }; |
| 19346 | |
| 19347 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 19348 | AArch64::ZPR3RegClassID, |
| 19349 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19350 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19351 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19352 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19353 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19354 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19355 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19356 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19357 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19358 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19359 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19360 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19361 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19362 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19363 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19364 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19365 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19366 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19367 | }; |
| 19368 | |
| 19369 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 19370 | AArch64::ZPR3RegClassID, |
| 19371 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19372 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19373 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19374 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19375 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19376 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19377 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19378 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19379 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19380 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19381 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19382 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19383 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19384 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19385 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19386 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19387 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19388 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19389 | }; |
| 19390 | |
| 19391 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19392 | AArch64::ZPR3RegClassID, |
| 19393 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19394 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19395 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19396 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19397 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19398 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19399 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19400 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19401 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19402 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19403 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19404 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19405 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19406 | }; |
| 19407 | |
| 19408 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 19409 | AArch64::ZPR3RegClassID, |
| 19410 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19411 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19412 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19413 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19414 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19415 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19416 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19417 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19418 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19419 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19420 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19421 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19422 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19423 | }; |
| 19424 | |
| 19425 | static unsigned const ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19426 | AArch64::ZPR3RegClassID, |
| 19427 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19428 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19429 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19430 | }; |
| 19431 | |
| 19432 | static unsigned const ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 19433 | AArch64::ZPR3RegClassID, |
| 19434 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19435 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19436 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19437 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19438 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19439 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19440 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19441 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19442 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19443 | AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClassID, |
| 19444 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19445 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19446 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19447 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19448 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19449 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19450 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19451 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19452 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19453 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19454 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19455 | }; |
| 19456 | |
| 19457 | static unsigned const ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 19458 | AArch64::ZPR3RegClassID, |
| 19459 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19460 | AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClassID, |
| 19461 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19462 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19463 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19464 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19465 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19466 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19467 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19468 | AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19469 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19470 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19471 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19472 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClassID, |
| 19473 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19474 | }; |
| 19475 | |
| 19476 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 19477 | AArch64::ZPR3RegClassID, |
| 19478 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19479 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19480 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19481 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19482 | }; |
| 19483 | |
| 19484 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19485 | AArch64::ZPR3RegClassID, |
| 19486 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19487 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19488 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19489 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19490 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19491 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19492 | AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19493 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19494 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19495 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19496 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19497 | }; |
| 19498 | |
| 19499 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 19500 | AArch64::ZPR3RegClassID, |
| 19501 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19502 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19503 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19504 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19505 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19506 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19507 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19508 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19509 | }; |
| 19510 | |
| 19511 | static unsigned const ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 19512 | AArch64::ZPR3RegClassID, |
| 19513 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19514 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19515 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19516 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19517 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19518 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19519 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19520 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19521 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19522 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19523 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19524 | }; |
| 19525 | |
| 19526 | static unsigned const ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 19527 | AArch64::ZPR3RegClassID, |
| 19528 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19529 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19530 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19531 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19532 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19533 | AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19534 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19535 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19536 | }; |
| 19537 | |
| 19538 | static unsigned const ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 19539 | AArch64::ZPR3RegClassID, |
| 19540 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19541 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19542 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19543 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19544 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19545 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19546 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19547 | }; |
| 19548 | |
| 19549 | static unsigned const ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 19550 | AArch64::ZPR3RegClassID, |
| 19551 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19552 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19553 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19554 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19555 | AArch64::ZPR3_with_zsub2_in_ZPR_KRegClassID, |
| 19556 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19557 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19558 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19559 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClassID, |
| 19560 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19561 | }; |
| 19562 | |
| 19563 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 19564 | AArch64::ZPR3RegClassID, |
| 19565 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19566 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19567 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19568 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19569 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19570 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19571 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19572 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19573 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19574 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19575 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19576 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19577 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19578 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19579 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19580 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19581 | }; |
| 19582 | |
| 19583 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 19584 | AArch64::ZPR3RegClassID, |
| 19585 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19586 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19587 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19588 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19589 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19590 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19591 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19592 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19593 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19594 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19595 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19596 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19597 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19598 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19599 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19600 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19601 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19602 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19603 | }; |
| 19604 | |
| 19605 | static unsigned const ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19606 | AArch64::ZPR3RegClassID, |
| 19607 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19608 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19609 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19610 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19611 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19612 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19613 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19614 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19615 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19616 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19617 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19618 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19619 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19620 | AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19621 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19622 | AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 19623 | }; |
| 19624 | |
| 19625 | static unsigned const ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses[] = { |
| 19626 | AArch64::ZPR3RegClassID, |
| 19627 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19628 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19629 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19630 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19631 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19632 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19633 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19634 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19635 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19636 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19637 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19638 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19639 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19640 | AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19641 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 19642 | AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 19643 | }; |
| 19644 | |
| 19645 | static unsigned const ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19646 | AArch64::ZPR3RegClassID, |
| 19647 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19648 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19649 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19650 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19651 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19652 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19653 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19654 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19655 | }; |
| 19656 | |
| 19657 | static unsigned const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 19658 | AArch64::ZPR3RegClassID, |
| 19659 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19660 | AArch64::ZPR3_with_zsub0_in_ZPR_KRegClassID, |
| 19661 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 19662 | AArch64::ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19663 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19664 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19665 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19666 | AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID, |
| 19667 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19668 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 19669 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19670 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19671 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19672 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 19673 | }; |
| 19674 | |
| 19675 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 19676 | AArch64::ZPR3RegClassID, |
| 19677 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19678 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19679 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19680 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19681 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19682 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19683 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19684 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19685 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19686 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19687 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19688 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19689 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19690 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19691 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19692 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 19693 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19694 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19695 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19696 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19697 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19698 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19699 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19700 | AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 19701 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19702 | }; |
| 19703 | |
| 19704 | static unsigned const ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 19705 | AArch64::ZPR3RegClassID, |
| 19706 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19707 | AArch64::ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19708 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19709 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19710 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19711 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19712 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID, |
| 19713 | AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19714 | AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19715 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19716 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19717 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19718 | AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClassID, |
| 19719 | AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19720 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID, |
| 19721 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 19722 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID, |
| 19723 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 19724 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19725 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19726 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19727 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 19728 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 19729 | AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 19730 | AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19731 | }; |
| 19732 | |
| 19733 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 19734 | AArch64::ZPR3RegClassID, |
| 19735 | AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19736 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19737 | AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 19738 | AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19739 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID, |
| 19740 | AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 19741 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID, |
| 19742 | }; |
| 19743 | |
| 19744 | static unsigned const ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 19745 | AArch64::ZPR3RegClassID, |
| 19746 | AArch64::ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19747 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19748 | AArch64::ZPR3_with_zsub_in_FPR128_loRegClassID, |
| 19749 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID, |
| 19750 | AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 19751 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 19752 | AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19753 | AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 19754 | AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 19755 | }; |
| 19756 | |
| 19757 | static unsigned const QQQQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 19758 | AArch64::QQQQRegClassID, |
| 19759 | }; |
| 19760 | |
| 19761 | static unsigned const QQQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19762 | AArch64::QQQQRegClassID, |
| 19763 | }; |
| 19764 | |
| 19765 | static unsigned const QQQQ_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19766 | AArch64::QQQQRegClassID, |
| 19767 | }; |
| 19768 | |
| 19769 | static unsigned const QQQQ_with_qsub0_in_FPR128_loSuperclasses[] = { |
| 19770 | AArch64::QQQQRegClassID, |
| 19771 | }; |
| 19772 | |
| 19773 | static unsigned const ZPR4_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 19774 | AArch64::ZPR4RegClassID, |
| 19775 | }; |
| 19776 | |
| 19777 | static unsigned const ZPR4_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19778 | AArch64::ZPR4RegClassID, |
| 19779 | }; |
| 19780 | |
| 19781 | static unsigned const ZPR4_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19782 | AArch64::ZPR4RegClassID, |
| 19783 | }; |
| 19784 | |
| 19785 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { |
| 19786 | AArch64::ZPR4RegClassID, |
| 19787 | }; |
| 19788 | |
| 19789 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 19790 | AArch64::ZPR4RegClassID, |
| 19791 | }; |
| 19792 | |
| 19793 | static unsigned const ZPR4_with_zsub_in_FPR128_loSuperclasses[] = { |
| 19794 | AArch64::ZPR4RegClassID, |
| 19795 | }; |
| 19796 | |
| 19797 | static unsigned const QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19798 | AArch64::QQQQRegClassID, |
| 19799 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19800 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19801 | }; |
| 19802 | |
| 19803 | static unsigned const QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19804 | AArch64::QQQQRegClassID, |
| 19805 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19806 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19807 | }; |
| 19808 | |
| 19809 | static unsigned const QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 19810 | AArch64::QQQQRegClassID, |
| 19811 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19812 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19813 | }; |
| 19814 | |
| 19815 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19816 | AArch64::ZPR4RegClassID, |
| 19817 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19818 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19819 | }; |
| 19820 | |
| 19821 | static unsigned const ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19822 | AArch64::ZPR4RegClassID, |
| 19823 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19824 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19825 | }; |
| 19826 | |
| 19827 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loSuperclasses[] = { |
| 19828 | AArch64::ZPR4RegClassID, |
| 19829 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19830 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 19831 | }; |
| 19832 | |
| 19833 | static unsigned const QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19834 | AArch64::QQQQRegClassID, |
| 19835 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19836 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19837 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19838 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19839 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19840 | }; |
| 19841 | |
| 19842 | static unsigned const QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19843 | AArch64::QQQQRegClassID, |
| 19844 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19845 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19846 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19847 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19848 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19849 | }; |
| 19850 | |
| 19851 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19852 | AArch64::ZPR4RegClassID, |
| 19853 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19854 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19855 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19856 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19857 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19858 | }; |
| 19859 | |
| 19860 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loSuperclasses[] = { |
| 19861 | AArch64::ZPR4RegClassID, |
| 19862 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19863 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19864 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 19865 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19866 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19867 | }; |
| 19868 | |
| 19869 | static unsigned const QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19870 | AArch64::QQQQRegClassID, |
| 19871 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19872 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19873 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19874 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19875 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19876 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19877 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19878 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19879 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19880 | }; |
| 19881 | |
| 19882 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses[] = { |
| 19883 | AArch64::ZPR4RegClassID, |
| 19884 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19885 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19886 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19887 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 19888 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19889 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19890 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19891 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19892 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19893 | }; |
| 19894 | |
| 19895 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2Superclasses[] = { |
| 19896 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 19897 | }; |
| 19898 | |
| 19899 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 19900 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 19901 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 19902 | }; |
| 19903 | |
| 19904 | static unsigned const QQQQ_with_qsub0_in_FPR128_0to7Superclasses[] = { |
| 19905 | AArch64::QQQQRegClassID, |
| 19906 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19907 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19908 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19909 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 19910 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19911 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19912 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19913 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19914 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19915 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19916 | }; |
| 19917 | |
| 19918 | static unsigned const QQQQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 19919 | AArch64::QQQQRegClassID, |
| 19920 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 19921 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19922 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19923 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19924 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19925 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19926 | }; |
| 19927 | |
| 19928 | static unsigned const QQQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19929 | AArch64::QQQQRegClassID, |
| 19930 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 19931 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19932 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19933 | }; |
| 19934 | |
| 19935 | static unsigned const QQQQ_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 19936 | AArch64::QQQQRegClassID, |
| 19937 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 19938 | }; |
| 19939 | |
| 19940 | static unsigned const ZPR4Mul4Superclasses[] = { |
| 19941 | AArch64::ZPR4RegClassID, |
| 19942 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 19943 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19944 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 19945 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 19946 | }; |
| 19947 | |
| 19948 | static unsigned const ZPR4StridedSuperclasses[] = { |
| 19949 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 19950 | }; |
| 19951 | |
| 19952 | static unsigned const ZPR4StridedOrContiguous_with_dsub_in_FPR64_loSuperclasses[] = { |
| 19953 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 19954 | }; |
| 19955 | |
| 19956 | static unsigned const ZPR4_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 19957 | AArch64::ZPR4RegClassID, |
| 19958 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19959 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19960 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19961 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19962 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19963 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19964 | }; |
| 19965 | |
| 19966 | static unsigned const ZPR4_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 19967 | AArch64::ZPR4RegClassID, |
| 19968 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 19969 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19970 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19971 | }; |
| 19972 | |
| 19973 | static unsigned const ZPR4_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 19974 | AArch64::ZPR4RegClassID, |
| 19975 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 19976 | }; |
| 19977 | |
| 19978 | static unsigned const ZPR4_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 19979 | AArch64::ZPR4RegClassID, |
| 19980 | }; |
| 19981 | |
| 19982 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses[] = { |
| 19983 | AArch64::ZPR4RegClassID, |
| 19984 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19985 | }; |
| 19986 | |
| 19987 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoSuperclasses[] = { |
| 19988 | AArch64::ZPR4RegClassID, |
| 19989 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19990 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 19991 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 19992 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 19993 | }; |
| 19994 | |
| 19995 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 19996 | AArch64::ZPR4RegClassID, |
| 19997 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 19998 | }; |
| 19999 | |
| 20000 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 20001 | AArch64::ZPR4RegClassID, |
| 20002 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20003 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20004 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20005 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20006 | }; |
| 20007 | |
| 20008 | static unsigned const ZPR4_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 20009 | AArch64::ZPR4RegClassID, |
| 20010 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20011 | }; |
| 20012 | |
| 20013 | static unsigned const ZPR4_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20014 | AArch64::ZPR4RegClassID, |
| 20015 | }; |
| 20016 | |
| 20017 | static unsigned const ZPR4_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 20018 | AArch64::ZPR4RegClassID, |
| 20019 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20020 | }; |
| 20021 | |
| 20022 | static unsigned const ZPR4_with_zsub2_in_ZPRMul2_LoSuperclasses[] = { |
| 20023 | AArch64::ZPR4RegClassID, |
| 20024 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20025 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20026 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20027 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20028 | }; |
| 20029 | |
| 20030 | static unsigned const ZPR4_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 20031 | AArch64::ZPR4RegClassID, |
| 20032 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20033 | }; |
| 20034 | |
| 20035 | static unsigned const ZPR4_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 20036 | AArch64::ZPR4RegClassID, |
| 20037 | }; |
| 20038 | |
| 20039 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses[] = { |
| 20040 | AArch64::ZPR4RegClassID, |
| 20041 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20042 | }; |
| 20043 | |
| 20044 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses[] = { |
| 20045 | AArch64::ZPR4RegClassID, |
| 20046 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20047 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20048 | }; |
| 20049 | |
| 20050 | static unsigned const ZPR4_with_zsub3_in_ZPRMul4Superclasses[] = { |
| 20051 | AArch64::ZPR4RegClassID, |
| 20052 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20053 | }; |
| 20054 | |
| 20055 | static unsigned const ZPR4_with_zsub3_in_ZPR_KSuperclasses[] = { |
| 20056 | AArch64::ZPR4RegClassID, |
| 20057 | }; |
| 20058 | |
| 20059 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20060 | AArch64::ZPR4RegClassID, |
| 20061 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20062 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20063 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20064 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20065 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20066 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20067 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20068 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20069 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20070 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20071 | }; |
| 20072 | |
| 20073 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 20074 | AArch64::ZPR4RegClassID, |
| 20075 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20076 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20077 | }; |
| 20078 | |
| 20079 | static unsigned const QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 20080 | AArch64::QQQQRegClassID, |
| 20081 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20082 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20083 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20084 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20085 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20086 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20087 | AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20088 | AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20089 | }; |
| 20090 | |
| 20091 | static unsigned const QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20092 | AArch64::QQQQRegClassID, |
| 20093 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20094 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20095 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20096 | AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20097 | AArch64::QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20098 | }; |
| 20099 | |
| 20100 | static unsigned const QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 20101 | AArch64::QQQQRegClassID, |
| 20102 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20103 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20104 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20105 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 20106 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20107 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20108 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20109 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20110 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20111 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20112 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 20113 | AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20114 | }; |
| 20115 | |
| 20116 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 20117 | AArch64::ZPR4RegClassID, |
| 20118 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20119 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20120 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20121 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20122 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20123 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20124 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20125 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20126 | }; |
| 20127 | |
| 20128 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses[] = { |
| 20129 | AArch64::ZPR4RegClassID, |
| 20130 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20131 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20132 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20133 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20134 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20135 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20136 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20137 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20138 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20139 | }; |
| 20140 | |
| 20141 | static unsigned const ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20142 | AArch64::ZPR4RegClassID, |
| 20143 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20144 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20145 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20146 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20147 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20148 | }; |
| 20149 | |
| 20150 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 20151 | AArch64::ZPR4RegClassID, |
| 20152 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20153 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20154 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20155 | }; |
| 20156 | |
| 20157 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 20158 | AArch64::ZPR4RegClassID, |
| 20159 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20160 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20161 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20162 | }; |
| 20163 | |
| 20164 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7Superclasses[] = { |
| 20165 | AArch64::ZPR4RegClassID, |
| 20166 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20167 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20168 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20169 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20170 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20171 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20172 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20173 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20174 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20175 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20176 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20177 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20178 | }; |
| 20179 | |
| 20180 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoSuperclasses[] = { |
| 20181 | AArch64::ZPR4RegClassID, |
| 20182 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20183 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20184 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20185 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20186 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20187 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20188 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20189 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20190 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20191 | }; |
| 20192 | |
| 20193 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoSuperclasses[] = { |
| 20194 | AArch64::ZPR4RegClassID, |
| 20195 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20196 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20197 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20198 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20199 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20200 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20201 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20202 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20203 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20204 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20205 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20206 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20207 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20208 | }; |
| 20209 | |
| 20210 | static unsigned const QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20211 | AArch64::QQQQRegClassID, |
| 20212 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20213 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20214 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20215 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20216 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20217 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20218 | AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20219 | AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20220 | AArch64::QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20221 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20222 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20223 | }; |
| 20224 | |
| 20225 | static unsigned const QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 20226 | AArch64::QQQQRegClassID, |
| 20227 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20228 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20229 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20230 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 20231 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20232 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20233 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20234 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20235 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20236 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20237 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 20238 | AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20239 | AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20240 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20241 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20242 | }; |
| 20243 | |
| 20244 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSuperclasses[] = { |
| 20245 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20246 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20247 | }; |
| 20248 | |
| 20249 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSuperclasses[] = { |
| 20250 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20251 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20252 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20253 | }; |
| 20254 | |
| 20255 | static unsigned const ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20256 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20257 | }; |
| 20258 | |
| 20259 | static unsigned const ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20260 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20261 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20262 | }; |
| 20263 | |
| 20264 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20265 | AArch64::ZPR4RegClassID, |
| 20266 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20267 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20268 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20269 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20270 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20271 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20272 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20273 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20274 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20275 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20276 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20277 | }; |
| 20278 | |
| 20279 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20280 | AArch64::ZPR4RegClassID, |
| 20281 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20282 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20283 | }; |
| 20284 | |
| 20285 | static unsigned const ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 20286 | AArch64::ZPR4RegClassID, |
| 20287 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20288 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20289 | }; |
| 20290 | |
| 20291 | static unsigned const ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSuperclasses[] = { |
| 20292 | AArch64::ZPR4RegClassID, |
| 20293 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20294 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20295 | }; |
| 20296 | |
| 20297 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7Superclasses[] = { |
| 20298 | AArch64::ZPR4RegClassID, |
| 20299 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20300 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20301 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20302 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20303 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20304 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20305 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20306 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20307 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20308 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20309 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20310 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20311 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20312 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20313 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20314 | }; |
| 20315 | |
| 20316 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses[] = { |
| 20317 | AArch64::ZPR4RegClassID, |
| 20318 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20319 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20320 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20321 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20322 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20323 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20324 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20325 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20326 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20327 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20328 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20329 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20330 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20331 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20332 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20333 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20334 | }; |
| 20335 | |
| 20336 | static unsigned const QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20337 | AArch64::QQQQRegClassID, |
| 20338 | AArch64::QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20339 | AArch64::QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20340 | AArch64::QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20341 | AArch64::QQQQ_with_qsub0_in_FPR128_loRegClassID, |
| 20342 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20343 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20344 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID, |
| 20345 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20346 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID, |
| 20347 | AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID, |
| 20348 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7RegClassID, |
| 20349 | AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20350 | AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20351 | AArch64::QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20352 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20353 | AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20354 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClassID, |
| 20355 | AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID, |
| 20356 | AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID, |
| 20357 | }; |
| 20358 | |
| 20359 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 20360 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20361 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20362 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20363 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 20364 | }; |
| 20365 | |
| 20366 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 20367 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20368 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20369 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20370 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20371 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 20372 | }; |
| 20373 | |
| 20374 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses[] = { |
| 20375 | AArch64::ZPR4RegClassID, |
| 20376 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20377 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20378 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20379 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20380 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20381 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20382 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20383 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20384 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20385 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20386 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20387 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20388 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20389 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20390 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20391 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20392 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20393 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20394 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20395 | }; |
| 20396 | |
| 20397 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20398 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20399 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20400 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 20401 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20402 | }; |
| 20403 | |
| 20404 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 20405 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20406 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20407 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20408 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 20409 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 20410 | }; |
| 20411 | |
| 20412 | static unsigned const ZPR4Strided_with_dsub_in_FPR64_loSuperclasses[] = { |
| 20413 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20414 | AArch64::ZPR4StridedRegClassID, |
| 20415 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20416 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 20417 | }; |
| 20418 | |
| 20419 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul2Superclasses[] = { |
| 20420 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20421 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20422 | AArch64::ZPR4StridedRegClassID, |
| 20423 | }; |
| 20424 | |
| 20425 | static unsigned const ZPR4Strided_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20426 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20427 | AArch64::ZPR4StridedRegClassID, |
| 20428 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20429 | }; |
| 20430 | |
| 20431 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 20432 | AArch64::ZPR4RegClassID, |
| 20433 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20434 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20435 | }; |
| 20436 | |
| 20437 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSuperclasses[] = { |
| 20438 | AArch64::ZPR4RegClassID, |
| 20439 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20440 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20441 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20442 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20443 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20444 | }; |
| 20445 | |
| 20446 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20447 | AArch64::ZPR4RegClassID, |
| 20448 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20449 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20450 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20451 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20452 | AArch64::ZPR4Mul4RegClassID, |
| 20453 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20454 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20455 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20456 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 20457 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 20458 | }; |
| 20459 | |
| 20460 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20461 | AArch64::ZPR4RegClassID, |
| 20462 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20463 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20464 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20465 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20466 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20467 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20468 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20469 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20470 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20471 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20472 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20473 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20474 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20475 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20476 | AArch64::ZPR4Mul4RegClassID, |
| 20477 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20478 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20479 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20480 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20481 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 20482 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 20483 | }; |
| 20484 | |
| 20485 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 20486 | AArch64::ZPR4RegClassID, |
| 20487 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20488 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20489 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20490 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20491 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20492 | }; |
| 20493 | |
| 20494 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20495 | AArch64::ZPR4RegClassID, |
| 20496 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20497 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20498 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20499 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20500 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20501 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20502 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20503 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20504 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20505 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20506 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20507 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20508 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20509 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20510 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20511 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20512 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20513 | }; |
| 20514 | |
| 20515 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 20516 | AArch64::ZPR4RegClassID, |
| 20517 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20518 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20519 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20520 | }; |
| 20521 | |
| 20522 | static unsigned const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20523 | AArch64::ZPR4RegClassID, |
| 20524 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20525 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20526 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 20527 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20528 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20529 | }; |
| 20530 | |
| 20531 | static unsigned const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20532 | AArch64::ZPR4RegClassID, |
| 20533 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20534 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20535 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20536 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20537 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20538 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20539 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20540 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20541 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 20542 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20543 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20544 | }; |
| 20545 | |
| 20546 | static unsigned const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 20547 | AArch64::ZPR4RegClassID, |
| 20548 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20549 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20550 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20551 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20552 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20553 | }; |
| 20554 | |
| 20555 | static unsigned const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20556 | AArch64::ZPR4RegClassID, |
| 20557 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20558 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20559 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20560 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20561 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20562 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20563 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20564 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20565 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20566 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20567 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20568 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20569 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20570 | }; |
| 20571 | |
| 20572 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 20573 | AArch64::ZPR4RegClassID, |
| 20574 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20575 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20576 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20577 | }; |
| 20578 | |
| 20579 | static unsigned const ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSuperclasses[] = { |
| 20580 | AArch64::ZPR4RegClassID, |
| 20581 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20582 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20583 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20584 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20585 | AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20586 | }; |
| 20587 | |
| 20588 | static unsigned const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20589 | AArch64::ZPR4RegClassID, |
| 20590 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20591 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20592 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20593 | }; |
| 20594 | |
| 20595 | static unsigned const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20596 | AArch64::ZPR4RegClassID, |
| 20597 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20598 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20599 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20600 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20601 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20602 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20603 | }; |
| 20604 | |
| 20605 | static unsigned const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 20606 | AArch64::ZPR4RegClassID, |
| 20607 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20608 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20609 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20610 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20611 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20612 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20613 | AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20614 | }; |
| 20615 | |
| 20616 | static unsigned const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20617 | AArch64::ZPR4RegClassID, |
| 20618 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20619 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20620 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20621 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20622 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20623 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20624 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20625 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20626 | }; |
| 20627 | |
| 20628 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 20629 | AArch64::ZPR4RegClassID, |
| 20630 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20631 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20632 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20633 | }; |
| 20634 | |
| 20635 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 20636 | AArch64::ZPR4RegClassID, |
| 20637 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20638 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20639 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20640 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20641 | }; |
| 20642 | |
| 20643 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 20644 | AArch64::ZPR4RegClassID, |
| 20645 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20646 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20647 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20648 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20649 | }; |
| 20650 | |
| 20651 | static unsigned const ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KSuperclasses[] = { |
| 20652 | AArch64::ZPR4RegClassID, |
| 20653 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20654 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20655 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20656 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20657 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20658 | }; |
| 20659 | |
| 20660 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 20661 | AArch64::ZPR4RegClassID, |
| 20662 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20663 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20664 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20665 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20666 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20667 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20668 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20669 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20670 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20671 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20672 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20673 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20674 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20675 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20676 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20677 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20678 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20679 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20680 | }; |
| 20681 | |
| 20682 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 20683 | AArch64::ZPR4RegClassID, |
| 20684 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20685 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20686 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 20687 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20688 | }; |
| 20689 | |
| 20690 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 20691 | AArch64::ZPR4RegClassID, |
| 20692 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20693 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20694 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20695 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20696 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20697 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20698 | }; |
| 20699 | |
| 20700 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4Superclasses[] = { |
| 20701 | AArch64::ZPR4RegClassID, |
| 20702 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20703 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20704 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20705 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20706 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20707 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20708 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20709 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20710 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20711 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20712 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20713 | }; |
| 20714 | |
| 20715 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 20716 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20717 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20718 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20719 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 20720 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20721 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 20722 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20723 | }; |
| 20724 | |
| 20725 | static unsigned const ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 20726 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20727 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20728 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20729 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20730 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 20731 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 20732 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 20733 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 20734 | }; |
| 20735 | |
| 20736 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 20737 | AArch64::ZPR4RegClassID, |
| 20738 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20739 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20740 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20741 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20742 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20743 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20744 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20745 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20746 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20747 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20748 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20749 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20750 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20751 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20752 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20753 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20754 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 20755 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 20756 | }; |
| 20757 | |
| 20758 | static unsigned const ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 20759 | AArch64::ZPR4RegClassID, |
| 20760 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20761 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20762 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20763 | }; |
| 20764 | |
| 20765 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 20766 | AArch64::ZPR4RegClassID, |
| 20767 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20768 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20769 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20770 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20771 | }; |
| 20772 | |
| 20773 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 20774 | AArch64::ZPR4RegClassID, |
| 20775 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20776 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20777 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20778 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20779 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20780 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 20781 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 20782 | }; |
| 20783 | |
| 20784 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 20785 | AArch64::ZPR4RegClassID, |
| 20786 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20787 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20788 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20789 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20790 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20791 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20792 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20793 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 20794 | }; |
| 20795 | |
| 20796 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 20797 | AArch64::ZPR4RegClassID, |
| 20798 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20799 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20800 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20801 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20802 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20803 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 20804 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 20805 | }; |
| 20806 | |
| 20807 | static unsigned const ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 20808 | AArch64::ZPR4RegClassID, |
| 20809 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20810 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20811 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20812 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20813 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 20814 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20815 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20816 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 20817 | }; |
| 20818 | |
| 20819 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20820 | AArch64::ZPR4RegClassID, |
| 20821 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20822 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20823 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20824 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20825 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20826 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20827 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20828 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20829 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20830 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20831 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20832 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20833 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20834 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20835 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20836 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20837 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20838 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20839 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20840 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20841 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20842 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20843 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20844 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 20845 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20846 | }; |
| 20847 | |
| 20848 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20849 | AArch64::ZPR4RegClassID, |
| 20850 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20851 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20852 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20853 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20854 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20855 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20856 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20857 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20858 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20859 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20860 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20861 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20862 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20863 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20864 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20865 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20866 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 20867 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20868 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20869 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20870 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20871 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20872 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20873 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20874 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 20875 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 20876 | }; |
| 20877 | |
| 20878 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20879 | AArch64::ZPR4RegClassID, |
| 20880 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20881 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20882 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20883 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20884 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20885 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20886 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20887 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20888 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20889 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20890 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20891 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20892 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 20893 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20894 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20895 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20896 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20897 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20898 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 20899 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 20900 | }; |
| 20901 | |
| 20902 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 20903 | AArch64::ZPR4RegClassID, |
| 20904 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20905 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20906 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20907 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20908 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20909 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20910 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20911 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20912 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20913 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20914 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20915 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20916 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20917 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20918 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 20919 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 20920 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 20921 | }; |
| 20922 | |
| 20923 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 20924 | AArch64::ZPR4RegClassID, |
| 20925 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20926 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20927 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20928 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20929 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20930 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20931 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20932 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20933 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20934 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20935 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20936 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20937 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20938 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20939 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 20940 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20941 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 20942 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 20943 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 20944 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 20945 | }; |
| 20946 | |
| 20947 | static unsigned const ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 20948 | AArch64::ZPR4RegClassID, |
| 20949 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20950 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20951 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20952 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20953 | AArch64::ZPR4Mul4RegClassID, |
| 20954 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 20955 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 20956 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20957 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20958 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20959 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20960 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 20961 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 20962 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20963 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 20964 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20965 | AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20966 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 20967 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20968 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 20969 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 20970 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 20971 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 20972 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 20973 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 20974 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 20975 | }; |
| 20976 | |
| 20977 | static unsigned const ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7Superclasses[] = { |
| 20978 | AArch64::ZPR4RegClassID, |
| 20979 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 20980 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20981 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20982 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20983 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 20984 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 20985 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20986 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20987 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 20988 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20989 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 20990 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 20991 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 20992 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 20993 | AArch64::ZPR4Mul4RegClassID, |
| 20994 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 20995 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 20996 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 20997 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 20998 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 20999 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21000 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21001 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21002 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21003 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21004 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21005 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 21006 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 21007 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21008 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21009 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21010 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21011 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21012 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21013 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21014 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21015 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21016 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21017 | }; |
| 21018 | |
| 21019 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul2_HiSuperclasses[] = { |
| 21020 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 21021 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 21022 | AArch64::ZPR4StridedRegClassID, |
| 21023 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 21024 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 21025 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 21026 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 21027 | AArch64::ZPR4Strided_with_zsub1_in_ZPR_KRegClassID, |
| 21028 | }; |
| 21029 | |
| 21030 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul2_LoSuperclasses[] = { |
| 21031 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 21032 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 21033 | AArch64::ZPR4StridedRegClassID, |
| 21034 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 21035 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 21036 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 21037 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21038 | AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClassID, |
| 21039 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 21040 | }; |
| 21041 | |
| 21042 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 21043 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 21044 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 21045 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 21046 | AArch64::ZPR4StridedRegClassID, |
| 21047 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 21048 | }; |
| 21049 | |
| 21050 | static unsigned const ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 21051 | AArch64::ZPR4RegClassID, |
| 21052 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21053 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21054 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21055 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21056 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21057 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21058 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21059 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21060 | }; |
| 21061 | |
| 21062 | static unsigned const ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KSuperclasses[] = { |
| 21063 | AArch64::ZPR4RegClassID, |
| 21064 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21065 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21066 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21067 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21068 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21069 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21070 | }; |
| 21071 | |
| 21072 | static unsigned const ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses[] = { |
| 21073 | AArch64::ZPR4RegClassID, |
| 21074 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21075 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21076 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21077 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21078 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21079 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21080 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21081 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21082 | }; |
| 21083 | |
| 21084 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 21085 | AArch64::ZPR4RegClassID, |
| 21086 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21087 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21088 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21089 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21090 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21091 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21092 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21093 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21094 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21095 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21096 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21097 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21098 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21099 | }; |
| 21100 | |
| 21101 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 21102 | AArch64::ZPR4RegClassID, |
| 21103 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21104 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21105 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21106 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21107 | }; |
| 21108 | |
| 21109 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses[] = { |
| 21110 | AArch64::ZPR4RegClassID, |
| 21111 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21112 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21113 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21114 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21115 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21116 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21117 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21118 | }; |
| 21119 | |
| 21120 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 21121 | AArch64::ZPR4RegClassID, |
| 21122 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21123 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21124 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 21125 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21126 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21127 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21128 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21129 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21130 | }; |
| 21131 | |
| 21132 | static unsigned const ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21133 | AArch64::ZPR4RegClassID, |
| 21134 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21135 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21136 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21137 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21138 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21139 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21140 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21141 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21142 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21143 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21144 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21145 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21146 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21147 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21148 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21149 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21150 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21151 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21152 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21153 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21154 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21155 | }; |
| 21156 | |
| 21157 | static unsigned const ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 21158 | AArch64::ZPR4RegClassID, |
| 21159 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21160 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21161 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21162 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21163 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21164 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21165 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21166 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21167 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21168 | AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21169 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21170 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21171 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21172 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClassID, |
| 21173 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21174 | }; |
| 21175 | |
| 21176 | static unsigned const ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21177 | AArch64::ZPR4RegClassID, |
| 21178 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21179 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21180 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21181 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21182 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21183 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21184 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21185 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21186 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21187 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21188 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21189 | }; |
| 21190 | |
| 21191 | static unsigned const ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 21192 | AArch64::ZPR4RegClassID, |
| 21193 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21194 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 21195 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21196 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21197 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21198 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21199 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21200 | AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21201 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21202 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21203 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21204 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21205 | }; |
| 21206 | |
| 21207 | static unsigned const ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21208 | AArch64::ZPR4RegClassID, |
| 21209 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21210 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21211 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21212 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21213 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21214 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21215 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21216 | }; |
| 21217 | |
| 21218 | static unsigned const ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KSuperclasses[] = { |
| 21219 | AArch64::ZPR4RegClassID, |
| 21220 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21221 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21222 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21223 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21224 | AArch64::ZPR4_with_zsub3_in_ZPR_KRegClassID, |
| 21225 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21226 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21227 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21228 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClassID, |
| 21229 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21230 | }; |
| 21231 | |
| 21232 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses[] = { |
| 21233 | AArch64::ZPR4RegClassID, |
| 21234 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21235 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21236 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21237 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21238 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21239 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21240 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21241 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21242 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21243 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21244 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21245 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21246 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21247 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21248 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21249 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21250 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21251 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21252 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21253 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21254 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21255 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21256 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21257 | }; |
| 21258 | |
| 21259 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4Superclasses[] = { |
| 21260 | AArch64::ZPR4RegClassID, |
| 21261 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21262 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21263 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21264 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21265 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21266 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21267 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21268 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21269 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21270 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21271 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21272 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21273 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 21274 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21275 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21276 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21277 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21278 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21279 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21280 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21281 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21282 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21283 | }; |
| 21284 | |
| 21285 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses[] = { |
| 21286 | AArch64::ZPR4RegClassID, |
| 21287 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21288 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21289 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21290 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21291 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21292 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21293 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21294 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21295 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21296 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21297 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21298 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21299 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21300 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21301 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21302 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21303 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21304 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21305 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21306 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21307 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21308 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21309 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21310 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21311 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21312 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21313 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21314 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21315 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21316 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21317 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21318 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21319 | }; |
| 21320 | |
| 21321 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4Superclasses[] = { |
| 21322 | AArch64::ZPR4RegClassID, |
| 21323 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21324 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21325 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21326 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21327 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21328 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21329 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21330 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21331 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21332 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21333 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21334 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21335 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21336 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21337 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21338 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21339 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21340 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21341 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21342 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21343 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21344 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21345 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21346 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21347 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21348 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21349 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21350 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21351 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21352 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21353 | }; |
| 21354 | |
| 21355 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses[] = { |
| 21356 | AArch64::ZPR4RegClassID, |
| 21357 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21358 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21359 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21360 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21361 | }; |
| 21362 | |
| 21363 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 21364 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 21365 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 21366 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 21367 | AArch64::ZPR4StridedRegClassID, |
| 21368 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 21369 | AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 21370 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21371 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 21372 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 21373 | AArch64::ZPR4Strided_with_zsub1_in_ZPR_KRegClassID, |
| 21374 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID, |
| 21375 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClassID, |
| 21376 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul4RegClassID, |
| 21377 | }; |
| 21378 | |
| 21379 | static unsigned const ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses[] = { |
| 21380 | AArch64::ZPR4StridedOrContiguousRegClassID, |
| 21381 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID, |
| 21382 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID, |
| 21383 | AArch64::ZPR4StridedRegClassID, |
| 21384 | AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID, |
| 21385 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 21386 | AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID, |
| 21387 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21388 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21389 | AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClassID, |
| 21390 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID, |
| 21391 | AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21392 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClassID, |
| 21393 | AArch64::ZPR4Strided_with_zsub0_in_ZPRMul4RegClassID, |
| 21394 | }; |
| 21395 | |
| 21396 | static unsigned const ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses[] = { |
| 21397 | AArch64::ZPR4RegClassID, |
| 21398 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21399 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21400 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21401 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21402 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21403 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21404 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21405 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21406 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21407 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21408 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21409 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21410 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21411 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21412 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21413 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21414 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21415 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21416 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21417 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21418 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21419 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21420 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21421 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21422 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21423 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 21424 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21425 | AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21426 | }; |
| 21427 | |
| 21428 | static unsigned const ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses[] = { |
| 21429 | AArch64::ZPR4RegClassID, |
| 21430 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21431 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21432 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21433 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21434 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21435 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21436 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21437 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 21438 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21439 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21440 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21441 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21442 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21443 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21444 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21445 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21446 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21447 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21448 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21449 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21450 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 21451 | AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21452 | }; |
| 21453 | |
| 21454 | static unsigned const ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 21455 | AArch64::ZPR4RegClassID, |
| 21456 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21457 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21458 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21459 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21460 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21461 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21462 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21463 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21464 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21465 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21466 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21467 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21468 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21469 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21470 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21471 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21472 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21473 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21474 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21475 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21476 | AArch64::ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID, |
| 21477 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21478 | AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21479 | }; |
| 21480 | |
| 21481 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses[] = { |
| 21482 | AArch64::ZPR4RegClassID, |
| 21483 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21484 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21485 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21486 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21487 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21488 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21489 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21490 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21491 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21492 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21493 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21494 | }; |
| 21495 | |
| 21496 | static unsigned const ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 21497 | AArch64::ZPR4RegClassID, |
| 21498 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21499 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21500 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21501 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21502 | AArch64::ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21503 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21504 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21505 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21506 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21507 | AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21508 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21509 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID, |
| 21510 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21511 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21512 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21513 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21514 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21515 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21516 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21517 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21518 | }; |
| 21519 | |
| 21520 | static unsigned const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 21521 | AArch64::ZPR4RegClassID, |
| 21522 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21523 | AArch64::ZPR4_with_zsub0_in_ZPR_KRegClassID, |
| 21524 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID, |
| 21525 | AArch64::ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21526 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21527 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21528 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21529 | AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID, |
| 21530 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID, |
| 21531 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID, |
| 21532 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21533 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21534 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21535 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID, |
| 21536 | }; |
| 21537 | |
| 21538 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21539 | AArch64::ZPR4RegClassID, |
| 21540 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21541 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21542 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21543 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21544 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21545 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21546 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21547 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21548 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21549 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21550 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21551 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21552 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21553 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21554 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21555 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21556 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21557 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21558 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21559 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21560 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21561 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21562 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21563 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21564 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21565 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21566 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21567 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21568 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21569 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21570 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21571 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21572 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21573 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21574 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21575 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21576 | AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21577 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21578 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21579 | }; |
| 21580 | |
| 21581 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21582 | AArch64::ZPR4RegClassID, |
| 21583 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21584 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21585 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21586 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21587 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21588 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21589 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21590 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21591 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21592 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21593 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21594 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21595 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21596 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21597 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 21598 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21599 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21600 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21601 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21602 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21603 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21604 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID, |
| 21605 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21606 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21607 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21608 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21609 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21610 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21611 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21612 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21613 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21614 | AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21615 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21616 | }; |
| 21617 | |
| 21618 | static unsigned const ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSuperclasses[] = { |
| 21619 | AArch64::ZPR4RegClassID, |
| 21620 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21621 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21622 | AArch64::ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21623 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21624 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21625 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21626 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21627 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21628 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21629 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21630 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID, |
| 21631 | AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21632 | AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21633 | AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21634 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21635 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21636 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21637 | AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClassID, |
| 21638 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21639 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21640 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21641 | AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21642 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID, |
| 21643 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21644 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21645 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID, |
| 21646 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID, |
| 21647 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID, |
| 21648 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21649 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21650 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21651 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21652 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21653 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21654 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID, |
| 21655 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID, |
| 21656 | AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID, |
| 21657 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID, |
| 21658 | AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21659 | }; |
| 21660 | |
| 21661 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses[] = { |
| 21662 | AArch64::ZPR4RegClassID, |
| 21663 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21664 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21665 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID, |
| 21666 | AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21667 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21668 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21669 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21670 | AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21671 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID, |
| 21672 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21673 | }; |
| 21674 | |
| 21675 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiSuperclasses[] = { |
| 21676 | AArch64::ZPR4RegClassID, |
| 21677 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21678 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, |
| 21679 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21680 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21681 | AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID, |
| 21682 | AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID, |
| 21683 | AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21684 | AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID, |
| 21685 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID, |
| 21686 | }; |
| 21687 | |
| 21688 | static unsigned const ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses[] = { |
| 21689 | AArch64::ZPR4RegClassID, |
| 21690 | AArch64::ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21691 | AArch64::ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21692 | AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21693 | AArch64::ZPR4_with_zsub_in_FPR128_loRegClassID, |
| 21694 | AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21695 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID, |
| 21696 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID, |
| 21697 | AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21698 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21699 | AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21700 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID, |
| 21701 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID, |
| 21702 | AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID, |
| 21703 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID, |
| 21704 | AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID, |
| 21705 | }; |
| 21706 | |
| 21707 | static unsigned const GPR64x8Class_with_x8sub_0_in_GPR64noipSuperclasses[] = { |
| 21708 | AArch64::GPR64x8ClassRegClassID, |
| 21709 | }; |
| 21710 | |
| 21711 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { |
| 21712 | AArch64::GPR64x8ClassRegClassID, |
| 21713 | }; |
| 21714 | |
| 21715 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21716 | AArch64::GPR64x8ClassRegClassID, |
| 21717 | }; |
| 21718 | |
| 21719 | static unsigned const GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21720 | AArch64::GPR64x8ClassRegClassID, |
| 21721 | }; |
| 21722 | |
| 21723 | static unsigned const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { |
| 21724 | AArch64::GPR64x8ClassRegClassID, |
| 21725 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21726 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21727 | }; |
| 21728 | |
| 21729 | static unsigned const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21730 | AArch64::GPR64x8ClassRegClassID, |
| 21731 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21732 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21733 | }; |
| 21734 | |
| 21735 | static unsigned const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21736 | AArch64::GPR64x8ClassRegClassID, |
| 21737 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21738 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21739 | }; |
| 21740 | |
| 21741 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64Superclasses[] = { |
| 21742 | AArch64::GPR64x8ClassRegClassID, |
| 21743 | }; |
| 21744 | |
| 21745 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21746 | AArch64::GPR64x8ClassRegClassID, |
| 21747 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21748 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21749 | }; |
| 21750 | |
| 21751 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21752 | AArch64::GPR64x8ClassRegClassID, |
| 21753 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21754 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21755 | }; |
| 21756 | |
| 21757 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21758 | AArch64::GPR64x8ClassRegClassID, |
| 21759 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21760 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21761 | }; |
| 21762 | |
| 21763 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { |
| 21764 | AArch64::GPR64x8ClassRegClassID, |
| 21765 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21766 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21767 | }; |
| 21768 | |
| 21769 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21770 | AArch64::GPR64x8ClassRegClassID, |
| 21771 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21772 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21773 | }; |
| 21774 | |
| 21775 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21776 | AArch64::GPR64x8ClassRegClassID, |
| 21777 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21778 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21779 | }; |
| 21780 | |
| 21781 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPRnotx16Superclasses[] = { |
| 21782 | AArch64::GPR64x8ClassRegClassID, |
| 21783 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21784 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21785 | }; |
| 21786 | |
| 21787 | static unsigned const GPR64x8Class_with_x8sub_1_in_tcGPR64Superclasses[] = { |
| 21788 | AArch64::GPR64x8ClassRegClassID, |
| 21789 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21790 | }; |
| 21791 | |
| 21792 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21793 | AArch64::GPR64x8ClassRegClassID, |
| 21794 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21795 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21796 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21797 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21798 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21799 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21800 | }; |
| 21801 | |
| 21802 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21803 | AArch64::GPR64x8ClassRegClassID, |
| 21804 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21805 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21806 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21807 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21808 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21809 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21810 | }; |
| 21811 | |
| 21812 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21813 | AArch64::GPR64x8ClassRegClassID, |
| 21814 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21815 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21816 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21817 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21818 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21819 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21820 | }; |
| 21821 | |
| 21822 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21823 | AArch64::GPR64x8ClassRegClassID, |
| 21824 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21825 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21826 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21827 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21828 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21829 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21830 | }; |
| 21831 | |
| 21832 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { |
| 21833 | AArch64::GPR64x8ClassRegClassID, |
| 21834 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21835 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21836 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21837 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21838 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21839 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21840 | }; |
| 21841 | |
| 21842 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21843 | AArch64::GPR64x8ClassRegClassID, |
| 21844 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21845 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21846 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21847 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21848 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21849 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21850 | }; |
| 21851 | |
| 21852 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21853 | AArch64::GPR64x8ClassRegClassID, |
| 21854 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21855 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21856 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21857 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21858 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21859 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21860 | }; |
| 21861 | |
| 21862 | static unsigned const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21863 | AArch64::GPR64x8ClassRegClassID, |
| 21864 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21865 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21866 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21867 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 21868 | }; |
| 21869 | |
| 21870 | static unsigned const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21871 | AArch64::GPR64x8ClassRegClassID, |
| 21872 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21873 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21874 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21875 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 21876 | }; |
| 21877 | |
| 21878 | static unsigned const GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17Superclasses[] = { |
| 21879 | AArch64::GPR64x8ClassRegClassID, |
| 21880 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21881 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21882 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21883 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 21884 | }; |
| 21885 | |
| 21886 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21887 | AArch64::GPR64x8ClassRegClassID, |
| 21888 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21889 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21890 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21891 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21892 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21893 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21894 | }; |
| 21895 | |
| 21896 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21897 | AArch64::GPR64x8ClassRegClassID, |
| 21898 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21899 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21900 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21901 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21902 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21903 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21904 | }; |
| 21905 | |
| 21906 | static unsigned const GPR64x8Class_with_x8sub_2_in_tcGPRnotx16Superclasses[] = { |
| 21907 | AArch64::GPR64x8ClassRegClassID, |
| 21908 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21909 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21910 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21911 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 21912 | }; |
| 21913 | |
| 21914 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21915 | AArch64::GPR64x8ClassRegClassID, |
| 21916 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21917 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21918 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21919 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21920 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21921 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21922 | }; |
| 21923 | |
| 21924 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21925 | AArch64::GPR64x8ClassRegClassID, |
| 21926 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21927 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21928 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21929 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21930 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21931 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21932 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21933 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21934 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21935 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21936 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21937 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21938 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21939 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21940 | }; |
| 21941 | |
| 21942 | static unsigned const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21943 | AArch64::GPR64x8ClassRegClassID, |
| 21944 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21945 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21946 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21947 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21948 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21949 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21950 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 21951 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21952 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21953 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 21954 | }; |
| 21955 | |
| 21956 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21957 | AArch64::GPR64x8ClassRegClassID, |
| 21958 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21959 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21960 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21961 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21962 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21963 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21964 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21965 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21966 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21967 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21968 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21969 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21970 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21971 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21972 | }; |
| 21973 | |
| 21974 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 21975 | AArch64::GPR64x8ClassRegClassID, |
| 21976 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 21977 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21978 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21979 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21980 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21981 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21982 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21983 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21984 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21985 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 21986 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21987 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21988 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21989 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 21990 | }; |
| 21991 | |
| 21992 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { |
| 21993 | AArch64::GPR64x8ClassRegClassID, |
| 21994 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21995 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21996 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 21997 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 21998 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 21999 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22000 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22001 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22002 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22003 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22004 | }; |
| 22005 | |
| 22006 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22007 | AArch64::GPR64x8ClassRegClassID, |
| 22008 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22009 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22010 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22011 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22012 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22013 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22014 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22015 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22016 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22017 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22018 | }; |
| 22019 | |
| 22020 | static unsigned const GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17Superclasses[] = { |
| 22021 | AArch64::GPR64x8ClassRegClassID, |
| 22022 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22023 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22024 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22025 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22026 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22027 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22028 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22029 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22030 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22031 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22032 | }; |
| 22033 | |
| 22034 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22035 | AArch64::GPR64x8ClassRegClassID, |
| 22036 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22037 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22038 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22039 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22040 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22041 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22042 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22043 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22044 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22045 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22046 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22047 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22048 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22049 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22050 | }; |
| 22051 | |
| 22052 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22053 | AArch64::GPR64x8ClassRegClassID, |
| 22054 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22055 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22056 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22057 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22058 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22059 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22060 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22061 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22062 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22063 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22064 | }; |
| 22065 | |
| 22066 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22067 | AArch64::GPR64x8ClassRegClassID, |
| 22068 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22069 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22070 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22071 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22072 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22073 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22074 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22075 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22076 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22077 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22078 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22079 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22080 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22081 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22082 | }; |
| 22083 | |
| 22084 | static unsigned const GPR64x8Class_with_x8sub_4_in_tcGPRnotx16Superclasses[] = { |
| 22085 | AArch64::GPR64x8ClassRegClassID, |
| 22086 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22087 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22088 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22089 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22090 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22091 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22092 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22093 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22094 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22095 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22096 | }; |
| 22097 | |
| 22098 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22099 | AArch64::GPR64x8ClassRegClassID, |
| 22100 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22101 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22102 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22103 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22104 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22105 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22106 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22107 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22108 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22109 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22110 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22111 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22112 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22113 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22114 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22115 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22116 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22117 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22118 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22119 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22120 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22121 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22122 | }; |
| 22123 | |
| 22124 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22125 | AArch64::GPR64x8ClassRegClassID, |
| 22126 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22127 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22128 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22129 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22130 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22131 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22132 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22133 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22134 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22135 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22136 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22137 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22138 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22139 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22140 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22141 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22142 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22143 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22144 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22145 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22146 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22147 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22148 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22149 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22150 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22151 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22152 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22153 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22154 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22155 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22156 | }; |
| 22157 | |
| 22158 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { |
| 22159 | AArch64::GPR64x8ClassRegClassID, |
| 22160 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22161 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22162 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22163 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22164 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22165 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22166 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22167 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22168 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22169 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22170 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22171 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22172 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22173 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22174 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22175 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22176 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22177 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22178 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22179 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22180 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22181 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22182 | }; |
| 22183 | |
| 22184 | static unsigned const GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17Superclasses[] = { |
| 22185 | AArch64::GPR64x8ClassRegClassID, |
| 22186 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22187 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22188 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22189 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22190 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22191 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22192 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22193 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22194 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22195 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22196 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22197 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22198 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22199 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22200 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22201 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22202 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22203 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22204 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22205 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22206 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22207 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22208 | }; |
| 22209 | |
| 22210 | static unsigned const GPR64x8Class_with_x8sub_6_in_tcGPRnotx16Superclasses[] = { |
| 22211 | AArch64::GPR64x8ClassRegClassID, |
| 22212 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22213 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22214 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22215 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22216 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22217 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22218 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22219 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22220 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22221 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22222 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22223 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22224 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22225 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22226 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22227 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22228 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22229 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22230 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22231 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22232 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22233 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22234 | }; |
| 22235 | |
| 22236 | static unsigned const GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17Superclasses[] = { |
| 22237 | AArch64::GPR64x8ClassRegClassID, |
| 22238 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22239 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22240 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22241 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22242 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22243 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22244 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22245 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22246 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22247 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22248 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22249 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22250 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22251 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22252 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22253 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22254 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22255 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22256 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22257 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22258 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22259 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22260 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22261 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22262 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22263 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22264 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22265 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22266 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22267 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22268 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22269 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22270 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22271 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22272 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22273 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22274 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22275 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22276 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22277 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22278 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22279 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22280 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22281 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22282 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22283 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22284 | }; |
| 22285 | |
| 22286 | static unsigned const GPR64x8Class_with_sub_32_in_GPR32argSuperclasses[] = { |
| 22287 | AArch64::GPR64x8ClassRegClassID, |
| 22288 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22289 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22290 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22291 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22292 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22293 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22294 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22295 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22296 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22297 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22298 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22299 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22300 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22301 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22302 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22303 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22304 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22305 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22306 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22307 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22308 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22309 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22310 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22311 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22312 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22313 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22314 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22315 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22316 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22317 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22318 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22319 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22320 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22321 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22322 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22323 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22324 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22325 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22326 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22327 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22328 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22329 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22330 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22331 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22332 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22333 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22334 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22335 | }; |
| 22336 | |
| 22337 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64argSuperclasses[] = { |
| 22338 | AArch64::GPR64x8ClassRegClassID, |
| 22339 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22340 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22341 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22342 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22343 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22344 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22345 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22346 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22347 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22348 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22349 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22350 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22351 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22352 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22353 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22354 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22355 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22356 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22357 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22358 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22359 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22360 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22361 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22362 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22363 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22364 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22365 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22366 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22367 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22368 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22369 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22370 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22371 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22372 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22373 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22374 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22375 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22376 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22377 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22378 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22379 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22380 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22381 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22382 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22383 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22384 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22385 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22386 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22387 | }; |
| 22388 | |
| 22389 | static unsigned const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { |
| 22390 | AArch64::GPR64x8ClassRegClassID, |
| 22391 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22392 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22393 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22394 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22395 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22396 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22397 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22398 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22399 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22400 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22401 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22402 | }; |
| 22403 | |
| 22404 | static unsigned const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22405 | AArch64::GPR64x8ClassRegClassID, |
| 22406 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22407 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22408 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22409 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22410 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22411 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22412 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22413 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22414 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22415 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22416 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22417 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22418 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22419 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22420 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22421 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22422 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22423 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22424 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22425 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22426 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22427 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22428 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22429 | }; |
| 22430 | |
| 22431 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { |
| 22432 | AArch64::GPR64x8ClassRegClassID, |
| 22433 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22434 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22435 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22436 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22437 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22438 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22439 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22440 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22441 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22442 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22443 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22444 | }; |
| 22445 | |
| 22446 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22447 | AArch64::GPR64x8ClassRegClassID, |
| 22448 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22449 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22450 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22451 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22452 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22453 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22454 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22455 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22456 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22457 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22458 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22459 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22460 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22461 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22462 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22463 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22464 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22465 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22466 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22467 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22468 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22469 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22470 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22471 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22472 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22473 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22474 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22475 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22476 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22477 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22478 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22479 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22480 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22481 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22482 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22483 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22484 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22485 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22486 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22487 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22488 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22489 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22490 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22491 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22492 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22493 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22494 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22495 | }; |
| 22496 | |
| 22497 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22498 | AArch64::GPR64x8ClassRegClassID, |
| 22499 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22500 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22501 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22502 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22503 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22504 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22505 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22506 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22507 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22508 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22509 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22510 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22511 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22512 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22513 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22514 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22515 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22516 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22517 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22518 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22519 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22520 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22521 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22522 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22523 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22524 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22525 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22526 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22527 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22528 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22529 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22530 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22531 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22532 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22533 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22534 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22535 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22536 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22537 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22538 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22539 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22540 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22541 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22542 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22543 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22544 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22545 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22546 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22547 | }; |
| 22548 | |
| 22549 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64argSuperclasses[] = { |
| 22550 | AArch64::GPR64x8ClassRegClassID, |
| 22551 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22552 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22553 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22554 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22555 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22556 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22557 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22558 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22559 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22560 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22561 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22562 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22563 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22564 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22565 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22566 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22567 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22568 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22569 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22570 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22571 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22572 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22573 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22574 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22575 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22576 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22577 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22578 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22579 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22580 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22581 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22582 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22583 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22584 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22585 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22586 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22587 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22588 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22589 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22590 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22591 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22592 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22593 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22594 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22595 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22596 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22597 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22598 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22599 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, |
| 22600 | }; |
| 22601 | |
| 22602 | static unsigned const GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22603 | AArch64::GPR64x8ClassRegClassID, |
| 22604 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22605 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22606 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22607 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22608 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22609 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22610 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22611 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22612 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22613 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22614 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22615 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22616 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22617 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22618 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22619 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22620 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22621 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22622 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22623 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22624 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22625 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22626 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22627 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22628 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22629 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22630 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22631 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22632 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22633 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22634 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22635 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22636 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22637 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22638 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22639 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22640 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22641 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22642 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22643 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22644 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22645 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22646 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22647 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22648 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22649 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22650 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22651 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22652 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, |
| 22653 | }; |
| 22654 | |
| 22655 | static unsigned const GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22656 | AArch64::GPR64x8ClassRegClassID, |
| 22657 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22658 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22659 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22660 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22661 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22662 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22663 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22664 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22665 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22666 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22667 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22668 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22669 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22670 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22671 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22672 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22673 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22674 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22675 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22676 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22677 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22678 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22679 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22680 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22681 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22682 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22683 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22684 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22685 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22686 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22687 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22688 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22689 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22690 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22691 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22692 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22693 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22694 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22695 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22696 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22697 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22698 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22699 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22700 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22701 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22702 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22703 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22704 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22705 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22706 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22707 | }; |
| 22708 | |
| 22709 | static unsigned const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22710 | AArch64::GPR64x8ClassRegClassID, |
| 22711 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22712 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22713 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22714 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22715 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22716 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22717 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22718 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22719 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22720 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22721 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22722 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22723 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22724 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22725 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22726 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22727 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22728 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22729 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22730 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22731 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22732 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22733 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22734 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22735 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22736 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22737 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22738 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22739 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22740 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22741 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22742 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22743 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22744 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22745 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22746 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22747 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22748 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22749 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22750 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22751 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22752 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22753 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22754 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22755 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22756 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22757 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22758 | AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22759 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22760 | }; |
| 22761 | |
| 22762 | static unsigned const GPR64x8Class_with_x8sub_0_in_tcGPRx16x17Superclasses[] = { |
| 22763 | AArch64::GPR64x8ClassRegClassID, |
| 22764 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22765 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22766 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22767 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22768 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22769 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22770 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22771 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22772 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22773 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22774 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22775 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22776 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22777 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22778 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22779 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22780 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22781 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22782 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22783 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22784 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22785 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22786 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22787 | }; |
| 22788 | |
| 22789 | static unsigned const GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22790 | AArch64::GPR64x8ClassRegClassID, |
| 22791 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22792 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22793 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22794 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22795 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22796 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22797 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22798 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22799 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22800 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22801 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22802 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22803 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22804 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22805 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22806 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22807 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22808 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22809 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22810 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22811 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22812 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22813 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22814 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22815 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22816 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22817 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22818 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22819 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22820 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22821 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22822 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22823 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22824 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22825 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22826 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22827 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22828 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22829 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22830 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22831 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22832 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22833 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22834 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22835 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22836 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22837 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22838 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22839 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, |
| 22840 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22841 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22842 | }; |
| 22843 | |
| 22844 | static unsigned const GPR64x8Class_with_x8sub_2_in_tcGPRx16x17Superclasses[] = { |
| 22845 | AArch64::GPR64x8ClassRegClassID, |
| 22846 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22847 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22848 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22849 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22850 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22851 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22852 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22853 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22854 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22855 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22856 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22857 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22858 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22859 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22860 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22861 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22862 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22863 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22864 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22865 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22866 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22867 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22868 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22869 | AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, |
| 22870 | }; |
| 22871 | |
| 22872 | static unsigned const GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { |
| 22873 | AArch64::GPR64x8ClassRegClassID, |
| 22874 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22875 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22876 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22877 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22878 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22879 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22880 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22881 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22882 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22883 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22884 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22885 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22886 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22887 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22888 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22889 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22890 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22891 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22892 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22893 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22894 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22895 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22896 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22897 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22898 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22899 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22900 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22901 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22902 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22903 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22904 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22905 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22906 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22907 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22908 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22909 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22910 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22911 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22912 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22913 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22914 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22915 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22916 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22917 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22918 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 22919 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22920 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 22921 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 22922 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, |
| 22923 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID, |
| 22924 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 22925 | }; |
| 22926 | |
| 22927 | static unsigned const GPR64x8Class_with_x8sub_4_in_tcGPRx16x17Superclasses[] = { |
| 22928 | AArch64::GPR64x8ClassRegClassID, |
| 22929 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22930 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22931 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22932 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22933 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22934 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22935 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22936 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22937 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22938 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22939 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22940 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22941 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22942 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22943 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22944 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22945 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22946 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22947 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22948 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22949 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22950 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22951 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 22952 | AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, |
| 22953 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, |
| 22954 | }; |
| 22955 | |
| 22956 | static unsigned const GPR64x8Class_with_x8sub_6_in_GPR64argSuperclasses[] = { |
| 22957 | AArch64::GPR64x8ClassRegClassID, |
| 22958 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 22959 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22960 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22961 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22962 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22963 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22964 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22965 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 22966 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22967 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22968 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22969 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22970 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22971 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22972 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 22973 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 22974 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22975 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22976 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22977 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22978 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 22979 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22980 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22981 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22982 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22983 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 22984 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22985 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22986 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 22987 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22988 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22989 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22990 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22991 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22992 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 22993 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22994 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 22995 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22996 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22997 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 22998 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 22999 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23000 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23001 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23002 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 23003 | AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID, |
| 23004 | AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID, |
| 23005 | AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, |
| 23006 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, |
| 23007 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID, |
| 23008 | }; |
| 23009 | |
| 23010 | static unsigned const GPR64x8Class_with_x8sub_6_in_tcGPRx16x17Superclasses[] = { |
| 23011 | AArch64::GPR64x8ClassRegClassID, |
| 23012 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 23013 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23014 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23015 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23016 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23017 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, |
| 23018 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23019 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23020 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23021 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID, |
| 23022 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, |
| 23023 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23024 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23025 | AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23026 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23027 | AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID, |
| 23028 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23029 | AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID, |
| 23030 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23031 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23032 | AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID, |
| 23033 | AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID, |
| 23034 | AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID, |
| 23035 | AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, |
| 23036 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, |
| 23037 | }; |
| 23038 | |
| 23039 | static unsigned const GPR64x8Class_with_x8sub_7_in_FIXED_REGSSuperclasses[] = { |
| 23040 | AArch64::GPR64x8ClassRegClassID, |
| 23041 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, |
| 23042 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23043 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23044 | AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23045 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, |
| 23046 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23047 | AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23048 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23049 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23050 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23051 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, |
| 23052 | AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23053 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23054 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23055 | AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, |
| 23056 | }; |
| 23057 | |
| 23058 | |
| 23059 | static inline unsigned GPR32AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23060 | |
| 23061 | static ArrayRef<MCPhysReg> GPR32GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23062 | static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; |
| 23063 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32RegClassID]; |
| 23064 | const ArrayRef<MCPhysReg> Order[] = { |
| 23065 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23066 | ArrayRef(AltOrder1) |
| 23067 | }; |
| 23068 | const unsigned Select = GPR32AltOrderSelect(MF, Rev); |
| 23069 | assert(Select < 2); |
| 23070 | return Order[Select]; |
| 23071 | } |
| 23072 | |
| 23073 | static inline unsigned GPR32spAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23074 | |
| 23075 | static ArrayRef<MCPhysReg> GPR32spGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23076 | static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; |
| 23077 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32spRegClassID]; |
| 23078 | const ArrayRef<MCPhysReg> Order[] = { |
| 23079 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23080 | ArrayRef(AltOrder1) |
| 23081 | }; |
| 23082 | const unsigned Select = GPR32spAltOrderSelect(MF, Rev); |
| 23083 | assert(Select < 2); |
| 23084 | return Order[Select]; |
| 23085 | } |
| 23086 | |
| 23087 | static inline unsigned GPR32commonAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23088 | |
| 23089 | static ArrayRef<MCPhysReg> GPR32commonGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23090 | static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; |
| 23091 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32commonRegClassID]; |
| 23092 | const ArrayRef<MCPhysReg> Order[] = { |
| 23093 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23094 | ArrayRef(AltOrder1) |
| 23095 | }; |
| 23096 | const unsigned Select = GPR32commonAltOrderSelect(MF, Rev); |
| 23097 | assert(Select < 2); |
| 23098 | return Order[Select]; |
| 23099 | } |
| 23100 | |
| 23101 | static inline unsigned GPR64AltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23102 | |
| 23103 | static ArrayRef<MCPhysReg> GPR64GetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23104 | static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; |
| 23105 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64RegClassID]; |
| 23106 | const ArrayRef<MCPhysReg> Order[] = { |
| 23107 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23108 | ArrayRef(AltOrder1) |
| 23109 | }; |
| 23110 | const unsigned Select = GPR64AltOrderSelect(MF, Rev); |
| 23111 | assert(Select < 2); |
| 23112 | return Order[Select]; |
| 23113 | } |
| 23114 | |
| 23115 | static inline unsigned GPR64spAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23116 | |
| 23117 | static ArrayRef<MCPhysReg> GPR64spGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23118 | static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; |
| 23119 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64spRegClassID]; |
| 23120 | const ArrayRef<MCPhysReg> Order[] = { |
| 23121 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23122 | ArrayRef(AltOrder1) |
| 23123 | }; |
| 23124 | const unsigned Select = GPR64spAltOrderSelect(MF, Rev); |
| 23125 | assert(Select < 2); |
| 23126 | return Order[Select]; |
| 23127 | } |
| 23128 | |
| 23129 | static inline unsigned GPR64commonAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23130 | |
| 23131 | static ArrayRef<MCPhysReg> GPR64commonGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23132 | static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; |
| 23133 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64commonRegClassID]; |
| 23134 | const ArrayRef<MCPhysReg> Order[] = { |
| 23135 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23136 | ArrayRef(AltOrder1) |
| 23137 | }; |
| 23138 | const unsigned Select = GPR64commonAltOrderSelect(MF, Rev); |
| 23139 | assert(Select < 2); |
| 23140 | return Order[Select]; |
| 23141 | } |
| 23142 | |
| 23143 | static inline unsigned GPR64noipAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23144 | |
| 23145 | static ArrayRef<MCPhysReg> GPR64noipGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23146 | static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::XZR, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; |
| 23147 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64noipRegClassID]; |
| 23148 | const ArrayRef<MCPhysReg> Order[] = { |
| 23149 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23150 | ArrayRef(AltOrder1) |
| 23151 | }; |
| 23152 | const unsigned Select = GPR64noipAltOrderSelect(MF, Rev); |
| 23153 | assert(Select < 2); |
| 23154 | return Order[Select]; |
| 23155 | } |
| 23156 | |
| 23157 | static inline unsigned GPR64common_and_GPR64noipAltOrderSelect(const MachineFunction &MF, bool Rev) { return 1; } |
| 23158 | |
| 23159 | static ArrayRef<MCPhysReg> GPR64common_and_GPR64noipGetRawAllocationOrder(const MachineFunction &MF, bool Rev) { |
| 23160 | static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; |
| 23161 | const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64common_and_GPR64noipRegClassID]; |
| 23162 | const ArrayRef<MCPhysReg> Order[] = { |
| 23163 | ArrayRef(MCR.begin(), MCR.getNumRegs()), |
| 23164 | ArrayRef(AltOrder1) |
| 23165 | }; |
| 23166 | const unsigned Select = GPR64common_and_GPR64noipAltOrderSelect(MF, Rev); |
| 23167 | assert(Select < 2); |
| 23168 | return Order[Select]; |
| 23169 | } |
| 23170 | |
| 23171 | namespace AArch64 { // Register class instances |
| 23172 | extern const TargetRegisterClass W_HI_DummyRCRegClass = { |
| 23173 | &AArch64MCRegisterClasses[W_HI_DummyRCRegClassID], |
| 23174 | W_HI_DummyRCSubClassMask, |
| 23175 | SuperRegIdxSeqs + 5, |
| 23176 | LaneBitmask(0x0000000000000001), |
| 23177 | 0, |
| 23178 | false, |
| 23179 | 0x00, /* TSFlags */ |
| 23180 | false, /* HasDisjunctSubRegs */ |
| 23181 | false, /* CoveredBySubRegs */ |
| 23182 | nullptr, 0, |
| 23183 | nullptr |
| 23184 | }; |
| 23185 | |
| 23186 | extern const TargetRegisterClass B_HI_DummyRCRegClass = { |
| 23187 | &AArch64MCRegisterClasses[B_HI_DummyRCRegClassID], |
| 23188 | B_HI_DummyRCSubClassMask, |
| 23189 | SuperRegIdxSeqs + 5, |
| 23190 | LaneBitmask(0x0000000000000001), |
| 23191 | 0, |
| 23192 | false, |
| 23193 | 0x00, /* TSFlags */ |
| 23194 | false, /* HasDisjunctSubRegs */ |
| 23195 | false, /* CoveredBySubRegs */ |
| 23196 | nullptr, 0, |
| 23197 | nullptr |
| 23198 | }; |
| 23199 | |
| 23200 | extern const TargetRegisterClass D_HI_DummyRCRegClass = { |
| 23201 | &AArch64MCRegisterClasses[D_HI_DummyRCRegClassID], |
| 23202 | D_HI_DummyRCSubClassMask, |
| 23203 | SuperRegIdxSeqs + 5, |
| 23204 | LaneBitmask(0x0000000000000001), |
| 23205 | 0, |
| 23206 | false, |
| 23207 | 0x00, /* TSFlags */ |
| 23208 | false, /* HasDisjunctSubRegs */ |
| 23209 | false, /* CoveredBySubRegs */ |
| 23210 | nullptr, 0, |
| 23211 | nullptr |
| 23212 | }; |
| 23213 | |
| 23214 | extern const TargetRegisterClass H_HI_DummyRCRegClass = { |
| 23215 | &AArch64MCRegisterClasses[H_HI_DummyRCRegClassID], |
| 23216 | H_HI_DummyRCSubClassMask, |
| 23217 | SuperRegIdxSeqs + 5, |
| 23218 | LaneBitmask(0x0000000000000001), |
| 23219 | 0, |
| 23220 | false, |
| 23221 | 0x00, /* TSFlags */ |
| 23222 | false, /* HasDisjunctSubRegs */ |
| 23223 | false, /* CoveredBySubRegs */ |
| 23224 | nullptr, 0, |
| 23225 | nullptr |
| 23226 | }; |
| 23227 | |
| 23228 | extern const TargetRegisterClass Q_HI_DummyRCRegClass = { |
| 23229 | &AArch64MCRegisterClasses[Q_HI_DummyRCRegClassID], |
| 23230 | Q_HI_DummyRCSubClassMask, |
| 23231 | SuperRegIdxSeqs + 5, |
| 23232 | LaneBitmask(0x0000000000000001), |
| 23233 | 0, |
| 23234 | false, |
| 23235 | 0x00, /* TSFlags */ |
| 23236 | false, /* HasDisjunctSubRegs */ |
| 23237 | false, /* CoveredBySubRegs */ |
| 23238 | nullptr, 0, |
| 23239 | nullptr |
| 23240 | }; |
| 23241 | |
| 23242 | extern const TargetRegisterClass S_HI_DummyRCRegClass = { |
| 23243 | &AArch64MCRegisterClasses[S_HI_DummyRCRegClassID], |
| 23244 | S_HI_DummyRCSubClassMask, |
| 23245 | SuperRegIdxSeqs + 5, |
| 23246 | LaneBitmask(0x0000000000000001), |
| 23247 | 0, |
| 23248 | false, |
| 23249 | 0x00, /* TSFlags */ |
| 23250 | false, /* HasDisjunctSubRegs */ |
| 23251 | false, /* CoveredBySubRegs */ |
| 23252 | nullptr, 0, |
| 23253 | nullptr |
| 23254 | }; |
| 23255 | |
| 23256 | extern const TargetRegisterClass FPR8RegClass = { |
| 23257 | &AArch64MCRegisterClasses[FPR8RegClassID], |
| 23258 | FPR8SubClassMask, |
| 23259 | SuperRegIdxSeqs + 78, |
| 23260 | LaneBitmask(0x0000000000000001), |
| 23261 | 0, |
| 23262 | false, |
| 23263 | 0x00, /* TSFlags */ |
| 23264 | false, /* HasDisjunctSubRegs */ |
| 23265 | false, /* CoveredBySubRegs */ |
| 23266 | nullptr, 0, |
| 23267 | nullptr |
| 23268 | }; |
| 23269 | |
| 23270 | extern const TargetRegisterClass FPR16RegClass = { |
| 23271 | &AArch64MCRegisterClasses[FPR16RegClassID], |
| 23272 | FPR16SubClassMask, |
| 23273 | SuperRegIdxSeqs + 83, |
| 23274 | LaneBitmask(0x0000000000000003), |
| 23275 | 0, |
| 23276 | false, |
| 23277 | 0x00, /* TSFlags */ |
| 23278 | true, /* HasDisjunctSubRegs */ |
| 23279 | false, /* CoveredBySubRegs */ |
| 23280 | nullptr, 0, |
| 23281 | nullptr |
| 23282 | }; |
| 23283 | |
| 23284 | extern const TargetRegisterClass PPRorPNRRegClass = { |
| 23285 | &AArch64MCRegisterClasses[PPRorPNRRegClassID], |
| 23286 | PPRorPNRSubClassMask, |
| 23287 | SuperRegIdxSeqs + 96, |
| 23288 | LaneBitmask(0x0000000000000010), |
| 23289 | 0, |
| 23290 | false, |
| 23291 | 0x00, /* TSFlags */ |
| 23292 | false, /* HasDisjunctSubRegs */ |
| 23293 | false, /* CoveredBySubRegs */ |
| 23294 | nullptr, 0, |
| 23295 | nullptr |
| 23296 | }; |
| 23297 | |
| 23298 | extern const TargetRegisterClass FPR16_loRegClass = { |
| 23299 | &AArch64MCRegisterClasses[FPR16_loRegClassID], |
| 23300 | FPR16_loSubClassMask, |
| 23301 | SuperRegIdxSeqs + 83, |
| 23302 | LaneBitmask(0x0000000000000003), |
| 23303 | 0, |
| 23304 | false, |
| 23305 | 0x00, /* TSFlags */ |
| 23306 | true, /* HasDisjunctSubRegs */ |
| 23307 | false, /* CoveredBySubRegs */ |
| 23308 | FPR16_loSuperclasses, 1, |
| 23309 | nullptr |
| 23310 | }; |
| 23311 | |
| 23312 | extern const TargetRegisterClass PNRRegClass = { |
| 23313 | &AArch64MCRegisterClasses[PNRRegClassID], |
| 23314 | PNRSubClassMask, |
| 23315 | SuperRegIdxSeqs + 93, |
| 23316 | LaneBitmask(0x0000000000000001), |
| 23317 | 0, |
| 23318 | false, |
| 23319 | 0x00, /* TSFlags */ |
| 23320 | false, /* HasDisjunctSubRegs */ |
| 23321 | false, /* CoveredBySubRegs */ |
| 23322 | PNRSuperclasses, 1, |
| 23323 | nullptr |
| 23324 | }; |
| 23325 | |
| 23326 | extern const TargetRegisterClass PPRRegClass = { |
| 23327 | &AArch64MCRegisterClasses[PPRRegClassID], |
| 23328 | PPRSubClassMask, |
| 23329 | SuperRegIdxSeqs + 6, |
| 23330 | LaneBitmask(0x0000000000000010), |
| 23331 | 0, |
| 23332 | false, |
| 23333 | 0x00, /* TSFlags */ |
| 23334 | false, /* HasDisjunctSubRegs */ |
| 23335 | false, /* CoveredBySubRegs */ |
| 23336 | PPRSuperclasses, 1, |
| 23337 | nullptr |
| 23338 | }; |
| 23339 | |
| 23340 | extern const TargetRegisterClass PNR_3bRegClass = { |
| 23341 | &AArch64MCRegisterClasses[PNR_3bRegClassID], |
| 23342 | PNR_3bSubClassMask, |
| 23343 | SuperRegIdxSeqs + 93, |
| 23344 | LaneBitmask(0x0000000000000001), |
| 23345 | 0, |
| 23346 | false, |
| 23347 | 0x00, /* TSFlags */ |
| 23348 | false, /* HasDisjunctSubRegs */ |
| 23349 | false, /* CoveredBySubRegs */ |
| 23350 | PNR_3bSuperclasses, 2, |
| 23351 | nullptr |
| 23352 | }; |
| 23353 | |
| 23354 | extern const TargetRegisterClass PNR_p8to15RegClass = { |
| 23355 | &AArch64MCRegisterClasses[PNR_p8to15RegClassID], |
| 23356 | PNR_p8to15SubClassMask, |
| 23357 | SuperRegIdxSeqs + 93, |
| 23358 | LaneBitmask(0x0000000000000001), |
| 23359 | 0, |
| 23360 | false, |
| 23361 | 0x00, /* TSFlags */ |
| 23362 | false, /* HasDisjunctSubRegs */ |
| 23363 | false, /* CoveredBySubRegs */ |
| 23364 | PNR_p8to15Superclasses, 2, |
| 23365 | nullptr |
| 23366 | }; |
| 23367 | |
| 23368 | extern const TargetRegisterClass PPRMul2RegClass = { |
| 23369 | &AArch64MCRegisterClasses[PPRMul2RegClassID], |
| 23370 | PPRMul2SubClassMask, |
| 23371 | SuperRegIdxSeqs + 6, |
| 23372 | LaneBitmask(0x0000000000000010), |
| 23373 | 0, |
| 23374 | false, |
| 23375 | 0x00, /* TSFlags */ |
| 23376 | false, /* HasDisjunctSubRegs */ |
| 23377 | false, /* CoveredBySubRegs */ |
| 23378 | PPRMul2Superclasses, 2, |
| 23379 | nullptr |
| 23380 | }; |
| 23381 | |
| 23382 | extern const TargetRegisterClass PPR_3bRegClass = { |
| 23383 | &AArch64MCRegisterClasses[PPR_3bRegClassID], |
| 23384 | PPR_3bSubClassMask, |
| 23385 | SuperRegIdxSeqs + 6, |
| 23386 | LaneBitmask(0x0000000000000010), |
| 23387 | 0, |
| 23388 | false, |
| 23389 | 0x00, /* TSFlags */ |
| 23390 | false, /* HasDisjunctSubRegs */ |
| 23391 | false, /* CoveredBySubRegs */ |
| 23392 | PPR_3bSuperclasses, 2, |
| 23393 | nullptr |
| 23394 | }; |
| 23395 | |
| 23396 | extern const TargetRegisterClass PPR_p8to15RegClass = { |
| 23397 | &AArch64MCRegisterClasses[PPR_p8to15RegClassID], |
| 23398 | PPR_p8to15SubClassMask, |
| 23399 | SuperRegIdxSeqs + 6, |
| 23400 | LaneBitmask(0x0000000000000010), |
| 23401 | 0, |
| 23402 | false, |
| 23403 | 0x00, /* TSFlags */ |
| 23404 | false, /* HasDisjunctSubRegs */ |
| 23405 | false, /* CoveredBySubRegs */ |
| 23406 | PPR_p8to15Superclasses, 2, |
| 23407 | nullptr |
| 23408 | }; |
| 23409 | |
| 23410 | extern const TargetRegisterClass PPRMul2_and_PPR_3bRegClass = { |
| 23411 | &AArch64MCRegisterClasses[PPRMul2_and_PPR_3bRegClassID], |
| 23412 | PPRMul2_and_PPR_3bSubClassMask, |
| 23413 | SuperRegIdxSeqs + 6, |
| 23414 | LaneBitmask(0x0000000000000010), |
| 23415 | 0, |
| 23416 | false, |
| 23417 | 0x00, /* TSFlags */ |
| 23418 | false, /* HasDisjunctSubRegs */ |
| 23419 | false, /* CoveredBySubRegs */ |
| 23420 | PPRMul2_and_PPR_3bSuperclasses, 4, |
| 23421 | nullptr |
| 23422 | }; |
| 23423 | |
| 23424 | extern const TargetRegisterClass PPRMul2_and_PPR_p8to15RegClass = { |
| 23425 | &AArch64MCRegisterClasses[PPRMul2_and_PPR_p8to15RegClassID], |
| 23426 | PPRMul2_and_PPR_p8to15SubClassMask, |
| 23427 | SuperRegIdxSeqs + 6, |
| 23428 | LaneBitmask(0x0000000000000010), |
| 23429 | 0, |
| 23430 | false, |
| 23431 | 0x00, /* TSFlags */ |
| 23432 | false, /* HasDisjunctSubRegs */ |
| 23433 | false, /* CoveredBySubRegs */ |
| 23434 | PPRMul2_and_PPR_p8to15Superclasses, 4, |
| 23435 | nullptr |
| 23436 | }; |
| 23437 | |
| 23438 | extern const TargetRegisterClass PPR2RegClass = { |
| 23439 | &AArch64MCRegisterClasses[PPR2RegClassID], |
| 23440 | PPR2SubClassMask, |
| 23441 | SuperRegIdxSeqs + 5, |
| 23442 | LaneBitmask(0x0000008000000010), |
| 23443 | 0, |
| 23444 | false, |
| 23445 | 0x00, /* TSFlags */ |
| 23446 | true, /* HasDisjunctSubRegs */ |
| 23447 | true, /* CoveredBySubRegs */ |
| 23448 | nullptr, 0, |
| 23449 | nullptr |
| 23450 | }; |
| 23451 | |
| 23452 | extern const TargetRegisterClass PPR2Mul2RegClass = { |
| 23453 | &AArch64MCRegisterClasses[PPR2Mul2RegClassID], |
| 23454 | PPR2Mul2SubClassMask, |
| 23455 | SuperRegIdxSeqs + 5, |
| 23456 | LaneBitmask(0x0000008000000010), |
| 23457 | 0, |
| 23458 | false, |
| 23459 | 0x00, /* TSFlags */ |
| 23460 | true, /* HasDisjunctSubRegs */ |
| 23461 | true, /* CoveredBySubRegs */ |
| 23462 | PPR2Mul2Superclasses, 1, |
| 23463 | nullptr |
| 23464 | }; |
| 23465 | |
| 23466 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2RegClass = { |
| 23467 | &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPRMul2RegClassID], |
| 23468 | PPR2_with_psub1_in_PPRMul2SubClassMask, |
| 23469 | SuperRegIdxSeqs + 5, |
| 23470 | LaneBitmask(0x0000008000000010), |
| 23471 | 0, |
| 23472 | false, |
| 23473 | 0x00, /* TSFlags */ |
| 23474 | true, /* HasDisjunctSubRegs */ |
| 23475 | true, /* CoveredBySubRegs */ |
| 23476 | PPR2_with_psub1_in_PPRMul2Superclasses, 1, |
| 23477 | nullptr |
| 23478 | }; |
| 23479 | |
| 23480 | extern const TargetRegisterClass PPR2_with_psub1_in_PPR_3bRegClass = { |
| 23481 | &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPR_3bRegClassID], |
| 23482 | PPR2_with_psub1_in_PPR_3bSubClassMask, |
| 23483 | SuperRegIdxSeqs + 5, |
| 23484 | LaneBitmask(0x0000008000000010), |
| 23485 | 0, |
| 23486 | false, |
| 23487 | 0x00, /* TSFlags */ |
| 23488 | true, /* HasDisjunctSubRegs */ |
| 23489 | true, /* CoveredBySubRegs */ |
| 23490 | PPR2_with_psub1_in_PPR_3bSuperclasses, 1, |
| 23491 | nullptr |
| 23492 | }; |
| 23493 | |
| 23494 | extern const TargetRegisterClass PPR2_with_psub1_in_PPR_p8to15RegClass = { |
| 23495 | &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPR_p8to15RegClassID], |
| 23496 | PPR2_with_psub1_in_PPR_p8to15SubClassMask, |
| 23497 | SuperRegIdxSeqs + 5, |
| 23498 | LaneBitmask(0x0000008000000010), |
| 23499 | 0, |
| 23500 | false, |
| 23501 | 0x00, /* TSFlags */ |
| 23502 | true, /* HasDisjunctSubRegs */ |
| 23503 | true, /* CoveredBySubRegs */ |
| 23504 | PPR2_with_psub1_in_PPR_p8to15Superclasses, 1, |
| 23505 | nullptr |
| 23506 | }; |
| 23507 | |
| 23508 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3bRegClass = { |
| 23509 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_3bRegClassID], |
| 23510 | PPR2_with_psub_in_PNR_3bSubClassMask, |
| 23511 | SuperRegIdxSeqs + 5, |
| 23512 | LaneBitmask(0x0000008000000010), |
| 23513 | 0, |
| 23514 | false, |
| 23515 | 0x00, /* TSFlags */ |
| 23516 | true, /* HasDisjunctSubRegs */ |
| 23517 | true, /* CoveredBySubRegs */ |
| 23518 | PPR2_with_psub_in_PNR_3bSuperclasses, 1, |
| 23519 | nullptr |
| 23520 | }; |
| 23521 | |
| 23522 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15RegClass = { |
| 23523 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_p8to15RegClassID], |
| 23524 | PPR2_with_psub_in_PNR_p8to15SubClassMask, |
| 23525 | SuperRegIdxSeqs + 5, |
| 23526 | LaneBitmask(0x0000008000000010), |
| 23527 | 0, |
| 23528 | false, |
| 23529 | 0x00, /* TSFlags */ |
| 23530 | true, /* HasDisjunctSubRegs */ |
| 23531 | true, /* CoveredBySubRegs */ |
| 23532 | PPR2_with_psub_in_PNR_p8to15Superclasses, 1, |
| 23533 | nullptr |
| 23534 | }; |
| 23535 | |
| 23536 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass = { |
| 23537 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID], |
| 23538 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bSubClassMask, |
| 23539 | SuperRegIdxSeqs + 5, |
| 23540 | LaneBitmask(0x0000008000000010), |
| 23541 | 0, |
| 23542 | false, |
| 23543 | 0x00, /* TSFlags */ |
| 23544 | true, /* HasDisjunctSubRegs */ |
| 23545 | true, /* CoveredBySubRegs */ |
| 23546 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bSuperclasses, 3, |
| 23547 | nullptr |
| 23548 | }; |
| 23549 | |
| 23550 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass = { |
| 23551 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID], |
| 23552 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask, |
| 23553 | SuperRegIdxSeqs + 5, |
| 23554 | LaneBitmask(0x0000008000000010), |
| 23555 | 0, |
| 23556 | false, |
| 23557 | 0x00, /* TSFlags */ |
| 23558 | true, /* HasDisjunctSubRegs */ |
| 23559 | true, /* CoveredBySubRegs */ |
| 23560 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Superclasses, 3, |
| 23561 | nullptr |
| 23562 | }; |
| 23563 | |
| 23564 | extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClass = { |
| 23565 | &AArch64MCRegisterClasses[PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClassID], |
| 23566 | PPR2Mul2_and_PPR2_with_psub_in_PNR_3bSubClassMask, |
| 23567 | SuperRegIdxSeqs + 5, |
| 23568 | LaneBitmask(0x0000008000000010), |
| 23569 | 0, |
| 23570 | false, |
| 23571 | 0x00, /* TSFlags */ |
| 23572 | true, /* HasDisjunctSubRegs */ |
| 23573 | true, /* CoveredBySubRegs */ |
| 23574 | PPR2Mul2_and_PPR2_with_psub_in_PNR_3bSuperclasses, 5, |
| 23575 | nullptr |
| 23576 | }; |
| 23577 | |
| 23578 | extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClass = { |
| 23579 | &AArch64MCRegisterClasses[PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClassID], |
| 23580 | PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15SubClassMask, |
| 23581 | SuperRegIdxSeqs + 5, |
| 23582 | LaneBitmask(0x0000008000000010), |
| 23583 | 0, |
| 23584 | false, |
| 23585 | 0x00, /* TSFlags */ |
| 23586 | true, /* HasDisjunctSubRegs */ |
| 23587 | true, /* CoveredBySubRegs */ |
| 23588 | PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15Superclasses, 5, |
| 23589 | nullptr |
| 23590 | }; |
| 23591 | |
| 23592 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass = { |
| 23593 | &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID], |
| 23594 | PPR2_with_psub1_in_PPRMul2_and_PPR_3bSubClassMask, |
| 23595 | SuperRegIdxSeqs + 5, |
| 23596 | LaneBitmask(0x0000008000000010), |
| 23597 | 0, |
| 23598 | false, |
| 23599 | 0x00, /* TSFlags */ |
| 23600 | true, /* HasDisjunctSubRegs */ |
| 23601 | true, /* CoveredBySubRegs */ |
| 23602 | PPR2_with_psub1_in_PPRMul2_and_PPR_3bSuperclasses, 3, |
| 23603 | nullptr |
| 23604 | }; |
| 23605 | |
| 23606 | extern const TargetRegisterClass PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass = { |
| 23607 | &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID], |
| 23608 | PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15SubClassMask, |
| 23609 | SuperRegIdxSeqs + 5, |
| 23610 | LaneBitmask(0x0000008000000010), |
| 23611 | 0, |
| 23612 | false, |
| 23613 | 0x00, /* TSFlags */ |
| 23614 | true, /* HasDisjunctSubRegs */ |
| 23615 | true, /* CoveredBySubRegs */ |
| 23616 | PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Superclasses, 3, |
| 23617 | nullptr |
| 23618 | }; |
| 23619 | |
| 23620 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClass = { |
| 23621 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClassID], |
| 23622 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2SubClassMask, |
| 23623 | SuperRegIdxSeqs + 5, |
| 23624 | LaneBitmask(0x0000008000000010), |
| 23625 | 0, |
| 23626 | false, |
| 23627 | 0x00, /* TSFlags */ |
| 23628 | true, /* HasDisjunctSubRegs */ |
| 23629 | true, /* CoveredBySubRegs */ |
| 23630 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2Superclasses, 3, |
| 23631 | nullptr |
| 23632 | }; |
| 23633 | |
| 23634 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClass = { |
| 23635 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClassID], |
| 23636 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2SubClassMask, |
| 23637 | SuperRegIdxSeqs + 5, |
| 23638 | LaneBitmask(0x0000008000000010), |
| 23639 | 0, |
| 23640 | false, |
| 23641 | 0x00, /* TSFlags */ |
| 23642 | true, /* HasDisjunctSubRegs */ |
| 23643 | true, /* CoveredBySubRegs */ |
| 23644 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2Superclasses, 3, |
| 23645 | nullptr |
| 23646 | }; |
| 23647 | |
| 23648 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass = { |
| 23649 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClassID], |
| 23650 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bSubClassMask, |
| 23651 | SuperRegIdxSeqs + 5, |
| 23652 | LaneBitmask(0x0000008000000010), |
| 23653 | 0, |
| 23654 | false, |
| 23655 | 0x00, /* TSFlags */ |
| 23656 | true, /* HasDisjunctSubRegs */ |
| 23657 | true, /* CoveredBySubRegs */ |
| 23658 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bSuperclasses, 7, |
| 23659 | nullptr |
| 23660 | }; |
| 23661 | |
| 23662 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass = { |
| 23663 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClassID], |
| 23664 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15SubClassMask, |
| 23665 | SuperRegIdxSeqs + 5, |
| 23666 | LaneBitmask(0x0000008000000010), |
| 23667 | 0, |
| 23668 | false, |
| 23669 | 0x00, /* TSFlags */ |
| 23670 | true, /* HasDisjunctSubRegs */ |
| 23671 | true, /* CoveredBySubRegs */ |
| 23672 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15Superclasses, 7, |
| 23673 | nullptr |
| 23674 | }; |
| 23675 | |
| 23676 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass = { |
| 23677 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID], |
| 23678 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask, |
| 23679 | SuperRegIdxSeqs + 5, |
| 23680 | LaneBitmask(0x0000008000000010), |
| 23681 | 0, |
| 23682 | false, |
| 23683 | 0x00, /* TSFlags */ |
| 23684 | true, /* HasDisjunctSubRegs */ |
| 23685 | true, /* CoveredBySubRegs */ |
| 23686 | PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15Superclasses, 6, |
| 23687 | nullptr |
| 23688 | }; |
| 23689 | |
| 23690 | extern const TargetRegisterClass PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass = { |
| 23691 | &AArch64MCRegisterClasses[PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID], |
| 23692 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bSubClassMask, |
| 23693 | SuperRegIdxSeqs + 5, |
| 23694 | LaneBitmask(0x0000008000000010), |
| 23695 | 0, |
| 23696 | false, |
| 23697 | 0x00, /* TSFlags */ |
| 23698 | true, /* HasDisjunctSubRegs */ |
| 23699 | true, /* CoveredBySubRegs */ |
| 23700 | PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bSuperclasses, 6, |
| 23701 | nullptr |
| 23702 | }; |
| 23703 | |
| 23704 | extern const TargetRegisterClass GPR32allRegClass = { |
| 23705 | &AArch64MCRegisterClasses[GPR32allRegClassID], |
| 23706 | GPR32allSubClassMask, |
| 23707 | SuperRegIdxSeqs + 101, |
| 23708 | LaneBitmask(0x0000000000000001), |
| 23709 | 0, |
| 23710 | false, |
| 23711 | 0x00, /* TSFlags */ |
| 23712 | false, /* HasDisjunctSubRegs */ |
| 23713 | false, /* CoveredBySubRegs */ |
| 23714 | nullptr, 0, |
| 23715 | nullptr |
| 23716 | }; |
| 23717 | |
| 23718 | extern const TargetRegisterClass FPR32RegClass = { |
| 23719 | &AArch64MCRegisterClasses[FPR32RegClassID], |
| 23720 | FPR32SubClassMask, |
| 23721 | SuperRegIdxSeqs + 88, |
| 23722 | LaneBitmask(0x000000000000000B), |
| 23723 | 0, |
| 23724 | false, |
| 23725 | 0x00, /* TSFlags */ |
| 23726 | true, /* HasDisjunctSubRegs */ |
| 23727 | false, /* CoveredBySubRegs */ |
| 23728 | nullptr, 0, |
| 23729 | nullptr |
| 23730 | }; |
| 23731 | |
| 23732 | extern const TargetRegisterClass GPR32RegClass = { |
| 23733 | &AArch64MCRegisterClasses[GPR32RegClassID], |
| 23734 | GPR32SubClassMask, |
| 23735 | SuperRegIdxSeqs + 101, |
| 23736 | LaneBitmask(0x0000000000000001), |
| 23737 | 0, |
| 23738 | false, |
| 23739 | 0x00, /* TSFlags */ |
| 23740 | false, /* HasDisjunctSubRegs */ |
| 23741 | false, /* CoveredBySubRegs */ |
| 23742 | GPR32Superclasses, 1, |
| 23743 | GPR32GetRawAllocationOrder |
| 23744 | }; |
| 23745 | |
| 23746 | extern const TargetRegisterClass GPR32spRegClass = { |
| 23747 | &AArch64MCRegisterClasses[GPR32spRegClassID], |
| 23748 | GPR32spSubClassMask, |
| 23749 | SuperRegIdxSeqs + 101, |
| 23750 | LaneBitmask(0x0000000000000001), |
| 23751 | 0, |
| 23752 | false, |
| 23753 | 0x00, /* TSFlags */ |
| 23754 | false, /* HasDisjunctSubRegs */ |
| 23755 | false, /* CoveredBySubRegs */ |
| 23756 | GPR32spSuperclasses, 1, |
| 23757 | GPR32spGetRawAllocationOrder |
| 23758 | }; |
| 23759 | |
| 23760 | extern const TargetRegisterClass GPR32commonRegClass = { |
| 23761 | &AArch64MCRegisterClasses[GPR32commonRegClassID], |
| 23762 | GPR32commonSubClassMask, |
| 23763 | SuperRegIdxSeqs + 101, |
| 23764 | LaneBitmask(0x0000000000000001), |
| 23765 | 0, |
| 23766 | false, |
| 23767 | 0x00, /* TSFlags */ |
| 23768 | false, /* HasDisjunctSubRegs */ |
| 23769 | false, /* CoveredBySubRegs */ |
| 23770 | GPR32commonSuperclasses, 3, |
| 23771 | GPR32commonGetRawAllocationOrder |
| 23772 | }; |
| 23773 | |
| 23774 | extern const TargetRegisterClass FPR32_with_hsub_in_FPR16_loRegClass = { |
| 23775 | &AArch64MCRegisterClasses[FPR32_with_hsub_in_FPR16_loRegClassID], |
| 23776 | FPR32_with_hsub_in_FPR16_loSubClassMask, |
| 23777 | SuperRegIdxSeqs + 88, |
| 23778 | LaneBitmask(0x000000000000000B), |
| 23779 | 0, |
| 23780 | false, |
| 23781 | 0x00, /* TSFlags */ |
| 23782 | true, /* HasDisjunctSubRegs */ |
| 23783 | false, /* CoveredBySubRegs */ |
| 23784 | FPR32_with_hsub_in_FPR16_loSuperclasses, 1, |
| 23785 | nullptr |
| 23786 | }; |
| 23787 | |
| 23788 | extern const TargetRegisterClass GPR32argRegClass = { |
| 23789 | &AArch64MCRegisterClasses[GPR32argRegClassID], |
| 23790 | GPR32argSubClassMask, |
| 23791 | SuperRegIdxSeqs + 101, |
| 23792 | LaneBitmask(0x0000000000000001), |
| 23793 | 0, |
| 23794 | false, |
| 23795 | 0x00, /* TSFlags */ |
| 23796 | false, /* HasDisjunctSubRegs */ |
| 23797 | false, /* CoveredBySubRegs */ |
| 23798 | GPR32argSuperclasses, 4, |
| 23799 | nullptr |
| 23800 | }; |
| 23801 | |
| 23802 | extern const TargetRegisterClass MatrixIndexGPR32_12_15RegClass = { |
| 23803 | &AArch64MCRegisterClasses[MatrixIndexGPR32_12_15RegClassID], |
| 23804 | MatrixIndexGPR32_12_15SubClassMask, |
| 23805 | SuperRegIdxSeqs + 101, |
| 23806 | LaneBitmask(0x0000000000000001), |
| 23807 | 0, |
| 23808 | false, |
| 23809 | 0x00, /* TSFlags */ |
| 23810 | false, /* HasDisjunctSubRegs */ |
| 23811 | false, /* CoveredBySubRegs */ |
| 23812 | MatrixIndexGPR32_12_15Superclasses, 4, |
| 23813 | nullptr |
| 23814 | }; |
| 23815 | |
| 23816 | extern const TargetRegisterClass MatrixIndexGPR32_8_11RegClass = { |
| 23817 | &AArch64MCRegisterClasses[MatrixIndexGPR32_8_11RegClassID], |
| 23818 | MatrixIndexGPR32_8_11SubClassMask, |
| 23819 | SuperRegIdxSeqs + 101, |
| 23820 | LaneBitmask(0x0000000000000001), |
| 23821 | 0, |
| 23822 | false, |
| 23823 | 0x00, /* TSFlags */ |
| 23824 | false, /* HasDisjunctSubRegs */ |
| 23825 | false, /* CoveredBySubRegs */ |
| 23826 | MatrixIndexGPR32_8_11Superclasses, 4, |
| 23827 | nullptr |
| 23828 | }; |
| 23829 | |
| 23830 | extern const TargetRegisterClass CCRRegClass = { |
| 23831 | &AArch64MCRegisterClasses[CCRRegClassID], |
| 23832 | CCRSubClassMask, |
| 23833 | SuperRegIdxSeqs + 5, |
| 23834 | LaneBitmask(0x0000000000000001), |
| 23835 | 0, |
| 23836 | false, |
| 23837 | 0x00, /* TSFlags */ |
| 23838 | false, /* HasDisjunctSubRegs */ |
| 23839 | false, /* CoveredBySubRegs */ |
| 23840 | nullptr, 0, |
| 23841 | nullptr |
| 23842 | }; |
| 23843 | |
| 23844 | extern const TargetRegisterClass GPR32sponlyRegClass = { |
| 23845 | &AArch64MCRegisterClasses[GPR32sponlyRegClassID], |
| 23846 | GPR32sponlySubClassMask, |
| 23847 | SuperRegIdxSeqs + 9, |
| 23848 | LaneBitmask(0x0000000000000001), |
| 23849 | 0, |
| 23850 | false, |
| 23851 | 0x00, /* TSFlags */ |
| 23852 | false, /* HasDisjunctSubRegs */ |
| 23853 | false, /* CoveredBySubRegs */ |
| 23854 | GPR32sponlySuperclasses, 2, |
| 23855 | nullptr |
| 23856 | }; |
| 23857 | |
| 23858 | extern const TargetRegisterClass WSeqPairsClassRegClass = { |
| 23859 | &AArch64MCRegisterClasses[WSeqPairsClassRegClassID], |
| 23860 | WSeqPairsClassSubClassMask, |
| 23861 | SuperRegIdxSeqs + 129, |
| 23862 | LaneBitmask(0x0000000000000300), |
| 23863 | 0, |
| 23864 | false, |
| 23865 | 0x00, /* TSFlags */ |
| 23866 | true, /* HasDisjunctSubRegs */ |
| 23867 | true, /* CoveredBySubRegs */ |
| 23868 | nullptr, 0, |
| 23869 | nullptr |
| 23870 | }; |
| 23871 | |
| 23872 | extern const TargetRegisterClass WSeqPairsClass_with_subo32_in_GPR32commonRegClass = { |
| 23873 | &AArch64MCRegisterClasses[WSeqPairsClass_with_subo32_in_GPR32commonRegClassID], |
| 23874 | WSeqPairsClass_with_subo32_in_GPR32commonSubClassMask, |
| 23875 | SuperRegIdxSeqs + 129, |
| 23876 | LaneBitmask(0x0000000000000300), |
| 23877 | 0, |
| 23878 | false, |
| 23879 | 0x00, /* TSFlags */ |
| 23880 | true, /* HasDisjunctSubRegs */ |
| 23881 | true, /* CoveredBySubRegs */ |
| 23882 | WSeqPairsClass_with_subo32_in_GPR32commonSuperclasses, 1, |
| 23883 | nullptr |
| 23884 | }; |
| 23885 | |
| 23886 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_GPR32argRegClass = { |
| 23887 | &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_GPR32argRegClassID], |
| 23888 | WSeqPairsClass_with_sube32_in_GPR32argSubClassMask, |
| 23889 | SuperRegIdxSeqs + 129, |
| 23890 | LaneBitmask(0x0000000000000300), |
| 23891 | 0, |
| 23892 | false, |
| 23893 | 0x00, /* TSFlags */ |
| 23894 | true, /* HasDisjunctSubRegs */ |
| 23895 | true, /* CoveredBySubRegs */ |
| 23896 | WSeqPairsClass_with_sube32_in_GPR32argSuperclasses, 2, |
| 23897 | nullptr |
| 23898 | }; |
| 23899 | |
| 23900 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass = { |
| 23901 | &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID], |
| 23902 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15SubClassMask, |
| 23903 | SuperRegIdxSeqs + 129, |
| 23904 | LaneBitmask(0x0000000000000300), |
| 23905 | 0, |
| 23906 | false, |
| 23907 | 0x00, /* TSFlags */ |
| 23908 | true, /* HasDisjunctSubRegs */ |
| 23909 | true, /* CoveredBySubRegs */ |
| 23910 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Superclasses, 2, |
| 23911 | nullptr |
| 23912 | }; |
| 23913 | |
| 23914 | extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass = { |
| 23915 | &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID], |
| 23916 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 23917 | SuperRegIdxSeqs + 129, |
| 23918 | LaneBitmask(0x0000000000000300), |
| 23919 | 0, |
| 23920 | false, |
| 23921 | 0x00, /* TSFlags */ |
| 23922 | true, /* HasDisjunctSubRegs */ |
| 23923 | true, /* CoveredBySubRegs */ |
| 23924 | WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Superclasses, 2, |
| 23925 | nullptr |
| 23926 | }; |
| 23927 | |
| 23928 | extern const TargetRegisterClass GPR64allRegClass = { |
| 23929 | &AArch64MCRegisterClasses[GPR64allRegClassID], |
| 23930 | GPR64allSubClassMask, |
| 23931 | SuperRegIdxSeqs + 20, |
| 23932 | LaneBitmask(0x00000000000000C0), |
| 23933 | 0, |
| 23934 | false, |
| 23935 | 0x00, /* TSFlags */ |
| 23936 | true, /* HasDisjunctSubRegs */ |
| 23937 | true, /* CoveredBySubRegs */ |
| 23938 | nullptr, 0, |
| 23939 | nullptr |
| 23940 | }; |
| 23941 | |
| 23942 | extern const TargetRegisterClass FPR64RegClass = { |
| 23943 | &AArch64MCRegisterClasses[FPR64RegClassID], |
| 23944 | FPR64SubClassMask, |
| 23945 | SuperRegIdxSeqs + 0, |
| 23946 | LaneBitmask(0x000000000000002B), |
| 23947 | 0, |
| 23948 | false, |
| 23949 | 0x00, /* TSFlags */ |
| 23950 | true, /* HasDisjunctSubRegs */ |
| 23951 | false, /* CoveredBySubRegs */ |
| 23952 | nullptr, 0, |
| 23953 | nullptr |
| 23954 | }; |
| 23955 | |
| 23956 | extern const TargetRegisterClass GPR64RegClass = { |
| 23957 | &AArch64MCRegisterClasses[GPR64RegClassID], |
| 23958 | GPR64SubClassMask, |
| 23959 | SuperRegIdxSeqs + 20, |
| 23960 | LaneBitmask(0x00000000000000C0), |
| 23961 | 0, |
| 23962 | false, |
| 23963 | 0x00, /* TSFlags */ |
| 23964 | true, /* HasDisjunctSubRegs */ |
| 23965 | true, /* CoveredBySubRegs */ |
| 23966 | GPR64Superclasses, 1, |
| 23967 | GPR64GetRawAllocationOrder |
| 23968 | }; |
| 23969 | |
| 23970 | extern const TargetRegisterClass GPR64spRegClass = { |
| 23971 | &AArch64MCRegisterClasses[GPR64spRegClassID], |
| 23972 | GPR64spSubClassMask, |
| 23973 | SuperRegIdxSeqs + 20, |
| 23974 | LaneBitmask(0x00000000000000C0), |
| 23975 | 0, |
| 23976 | false, |
| 23977 | 0x00, /* TSFlags */ |
| 23978 | true, /* HasDisjunctSubRegs */ |
| 23979 | true, /* CoveredBySubRegs */ |
| 23980 | GPR64spSuperclasses, 1, |
| 23981 | GPR64spGetRawAllocationOrder |
| 23982 | }; |
| 23983 | |
| 23984 | extern const TargetRegisterClass GPR64commonRegClass = { |
| 23985 | &AArch64MCRegisterClasses[GPR64commonRegClassID], |
| 23986 | GPR64commonSubClassMask, |
| 23987 | SuperRegIdxSeqs + 20, |
| 23988 | LaneBitmask(0x00000000000000C0), |
| 23989 | 0, |
| 23990 | false, |
| 23991 | 0x00, /* TSFlags */ |
| 23992 | true, /* HasDisjunctSubRegs */ |
| 23993 | true, /* CoveredBySubRegs */ |
| 23994 | GPR64commonSuperclasses, 3, |
| 23995 | GPR64commonGetRawAllocationOrder |
| 23996 | }; |
| 23997 | |
| 23998 | extern const TargetRegisterClass GPR64noipRegClass = { |
| 23999 | &AArch64MCRegisterClasses[GPR64noipRegClassID], |
| 24000 | GPR64noipSubClassMask, |
| 24001 | SuperRegIdxSeqs + 20, |
| 24002 | LaneBitmask(0x00000000000000C0), |
| 24003 | 0, |
| 24004 | false, |
| 24005 | 0x00, /* TSFlags */ |
| 24006 | true, /* HasDisjunctSubRegs */ |
| 24007 | true, /* CoveredBySubRegs */ |
| 24008 | GPR64noipSuperclasses, 2, |
| 24009 | GPR64noipGetRawAllocationOrder |
| 24010 | }; |
| 24011 | |
| 24012 | extern const TargetRegisterClass GPR64common_and_GPR64noipRegClass = { |
| 24013 | &AArch64MCRegisterClasses[GPR64common_and_GPR64noipRegClassID], |
| 24014 | GPR64common_and_GPR64noipSubClassMask, |
| 24015 | SuperRegIdxSeqs + 20, |
| 24016 | LaneBitmask(0x00000000000000C0), |
| 24017 | 0, |
| 24018 | false, |
| 24019 | 0x00, /* TSFlags */ |
| 24020 | true, /* HasDisjunctSubRegs */ |
| 24021 | true, /* CoveredBySubRegs */ |
| 24022 | GPR64common_and_GPR64noipSuperclasses, 5, |
| 24023 | GPR64common_and_GPR64noipGetRawAllocationOrder |
| 24024 | }; |
| 24025 | |
| 24026 | extern const TargetRegisterClass tcGPR64RegClass = { |
| 24027 | &AArch64MCRegisterClasses[tcGPR64RegClassID], |
| 24028 | tcGPR64SubClassMask, |
| 24029 | SuperRegIdxSeqs + 20, |
| 24030 | LaneBitmask(0x00000000000000C0), |
| 24031 | 0, |
| 24032 | false, |
| 24033 | 0x00, /* TSFlags */ |
| 24034 | true, /* HasDisjunctSubRegs */ |
| 24035 | true, /* CoveredBySubRegs */ |
| 24036 | tcGPR64Superclasses, 4, |
| 24037 | nullptr |
| 24038 | }; |
| 24039 | |
| 24040 | extern const TargetRegisterClass tcGPRnotx16RegClass = { |
| 24041 | &AArch64MCRegisterClasses[tcGPRnotx16RegClassID], |
| 24042 | tcGPRnotx16SubClassMask, |
| 24043 | SuperRegIdxSeqs + 20, |
| 24044 | LaneBitmask(0x00000000000000C0), |
| 24045 | 0, |
| 24046 | false, |
| 24047 | 0x00, /* TSFlags */ |
| 24048 | true, /* HasDisjunctSubRegs */ |
| 24049 | true, /* CoveredBySubRegs */ |
| 24050 | tcGPRnotx16Superclasses, 5, |
| 24051 | nullptr |
| 24052 | }; |
| 24053 | |
| 24054 | extern const TargetRegisterClass tcGPRnotx16x17RegClass = { |
| 24055 | &AArch64MCRegisterClasses[tcGPRnotx16x17RegClassID], |
| 24056 | tcGPRnotx16x17SubClassMask, |
| 24057 | SuperRegIdxSeqs + 20, |
| 24058 | LaneBitmask(0x00000000000000C0), |
| 24059 | 0, |
| 24060 | false, |
| 24061 | 0x00, /* TSFlags */ |
| 24062 | true, /* HasDisjunctSubRegs */ |
| 24063 | true, /* CoveredBySubRegs */ |
| 24064 | tcGPRnotx16x17Superclasses, 8, |
| 24065 | nullptr |
| 24066 | }; |
| 24067 | |
| 24068 | extern const TargetRegisterClass FPR64_loRegClass = { |
| 24069 | &AArch64MCRegisterClasses[FPR64_loRegClassID], |
| 24070 | FPR64_loSubClassMask, |
| 24071 | SuperRegIdxSeqs + 0, |
| 24072 | LaneBitmask(0x000000000000002B), |
| 24073 | 0, |
| 24074 | false, |
| 24075 | 0x00, /* TSFlags */ |
| 24076 | true, /* HasDisjunctSubRegs */ |
| 24077 | false, /* CoveredBySubRegs */ |
| 24078 | FPR64_loSuperclasses, 1, |
| 24079 | nullptr |
| 24080 | }; |
| 24081 | |
| 24082 | extern const TargetRegisterClass GPR64argRegClass = { |
| 24083 | &AArch64MCRegisterClasses[GPR64argRegClassID], |
| 24084 | GPR64argSubClassMask, |
| 24085 | SuperRegIdxSeqs + 20, |
| 24086 | LaneBitmask(0x00000000000000C0), |
| 24087 | 0, |
| 24088 | false, |
| 24089 | 0x00, /* TSFlags */ |
| 24090 | true, /* HasDisjunctSubRegs */ |
| 24091 | true, /* CoveredBySubRegs */ |
| 24092 | GPR64argSuperclasses, 9, |
| 24093 | nullptr |
| 24094 | }; |
| 24095 | |
| 24096 | extern const TargetRegisterClass FIXED_REGSRegClass = { |
| 24097 | &AArch64MCRegisterClasses[FIXED_REGSRegClassID], |
| 24098 | FIXED_REGSSubClassMask, |
| 24099 | SuperRegIdxSeqs + 11, |
| 24100 | LaneBitmask(0x0000000000000040), |
| 24101 | 0, |
| 24102 | false, |
| 24103 | 0x00, /* TSFlags */ |
| 24104 | true, /* HasDisjunctSubRegs */ |
| 24105 | false, /* CoveredBySubRegs */ |
| 24106 | nullptr, 0, |
| 24107 | nullptr |
| 24108 | }; |
| 24109 | |
| 24110 | extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { |
| 24111 | &AArch64MCRegisterClasses[GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], |
| 24112 | GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, |
| 24113 | SuperRegIdxSeqs + 20, |
| 24114 | LaneBitmask(0x00000000000000C0), |
| 24115 | 0, |
| 24116 | false, |
| 24117 | 0x00, /* TSFlags */ |
| 24118 | true, /* HasDisjunctSubRegs */ |
| 24119 | true, /* CoveredBySubRegs */ |
| 24120 | GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, 9, |
| 24121 | nullptr |
| 24122 | }; |
| 24123 | |
| 24124 | extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 24125 | &AArch64MCRegisterClasses[GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 24126 | GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 24127 | SuperRegIdxSeqs + 20, |
| 24128 | LaneBitmask(0x00000000000000C0), |
| 24129 | 0, |
| 24130 | false, |
| 24131 | 0x00, /* TSFlags */ |
| 24132 | true, /* HasDisjunctSubRegs */ |
| 24133 | true, /* CoveredBySubRegs */ |
| 24134 | GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 9, |
| 24135 | nullptr |
| 24136 | }; |
| 24137 | |
| 24138 | extern const TargetRegisterClass FIXED_REGS_with_sub_32RegClass = { |
| 24139 | &AArch64MCRegisterClasses[FIXED_REGS_with_sub_32RegClassID], |
| 24140 | FIXED_REGS_with_sub_32SubClassMask, |
| 24141 | SuperRegIdxSeqs + 11, |
| 24142 | LaneBitmask(0x00000000000000C0), |
| 24143 | 0, |
| 24144 | false, |
| 24145 | 0x00, /* TSFlags */ |
| 24146 | true, /* HasDisjunctSubRegs */ |
| 24147 | true, /* CoveredBySubRegs */ |
| 24148 | FIXED_REGS_with_sub_32Superclasses, 3, |
| 24149 | nullptr |
| 24150 | }; |
| 24151 | |
| 24152 | extern const TargetRegisterClass tcGPRx16x17RegClass = { |
| 24153 | &AArch64MCRegisterClasses[tcGPRx16x17RegClassID], |
| 24154 | tcGPRx16x17SubClassMask, |
| 24155 | SuperRegIdxSeqs + 20, |
| 24156 | LaneBitmask(0x00000000000000C0), |
| 24157 | 0, |
| 24158 | false, |
| 24159 | 0x00, /* TSFlags */ |
| 24160 | true, /* HasDisjunctSubRegs */ |
| 24161 | true, /* CoveredBySubRegs */ |
| 24162 | tcGPRx16x17Superclasses, 5, |
| 24163 | nullptr |
| 24164 | }; |
| 24165 | |
| 24166 | extern const TargetRegisterClass FIXED_REGS_and_GPR64RegClass = { |
| 24167 | &AArch64MCRegisterClasses[FIXED_REGS_and_GPR64RegClassID], |
| 24168 | FIXED_REGS_and_GPR64SubClassMask, |
| 24169 | SuperRegIdxSeqs + 11, |
| 24170 | LaneBitmask(0x00000000000000C0), |
| 24171 | 0, |
| 24172 | false, |
| 24173 | 0x00, /* TSFlags */ |
| 24174 | true, /* HasDisjunctSubRegs */ |
| 24175 | true, /* CoveredBySubRegs */ |
| 24176 | FIXED_REGS_and_GPR64Superclasses, 8, |
| 24177 | nullptr |
| 24178 | }; |
| 24179 | |
| 24180 | extern const TargetRegisterClass GPR64sponlyRegClass = { |
| 24181 | &AArch64MCRegisterClasses[GPR64sponlyRegClassID], |
| 24182 | GPR64sponlySubClassMask, |
| 24183 | SuperRegIdxSeqs + 5, |
| 24184 | LaneBitmask(0x00000000000000C0), |
| 24185 | 0, |
| 24186 | false, |
| 24187 | 0x00, /* TSFlags */ |
| 24188 | true, /* HasDisjunctSubRegs */ |
| 24189 | true, /* CoveredBySubRegs */ |
| 24190 | GPR64sponlySuperclasses, 4, |
| 24191 | nullptr |
| 24192 | }; |
| 24193 | |
| 24194 | extern const TargetRegisterClass tcGPRx17RegClass = { |
| 24195 | &AArch64MCRegisterClasses[tcGPRx17RegClassID], |
| 24196 | tcGPRx17SubClassMask, |
| 24197 | SuperRegIdxSeqs + 14, |
| 24198 | LaneBitmask(0x00000000000000C0), |
| 24199 | 0, |
| 24200 | false, |
| 24201 | 0x00, /* TSFlags */ |
| 24202 | true, /* HasDisjunctSubRegs */ |
| 24203 | true, /* CoveredBySubRegs */ |
| 24204 | tcGPRx17Superclasses, 7, |
| 24205 | nullptr |
| 24206 | }; |
| 24207 | |
| 24208 | extern const TargetRegisterClass DDRegClass = { |
| 24209 | &AArch64MCRegisterClasses[DDRegClassID], |
| 24210 | DDSubClassMask, |
| 24211 | SuperRegIdxSeqs + 113, |
| 24212 | LaneBitmask(0x000000007800002B), |
| 24213 | 0, |
| 24214 | false, |
| 24215 | 0x00, /* TSFlags */ |
| 24216 | true, /* HasDisjunctSubRegs */ |
| 24217 | true, /* CoveredBySubRegs */ |
| 24218 | nullptr, 0, |
| 24219 | nullptr |
| 24220 | }; |
| 24221 | |
| 24222 | extern const TargetRegisterClass DD_with_dsub0_in_FPR64_loRegClass = { |
| 24223 | &AArch64MCRegisterClasses[DD_with_dsub0_in_FPR64_loRegClassID], |
| 24224 | DD_with_dsub0_in_FPR64_loSubClassMask, |
| 24225 | SuperRegIdxSeqs + 113, |
| 24226 | LaneBitmask(0x000000007800002B), |
| 24227 | 0, |
| 24228 | false, |
| 24229 | 0x00, /* TSFlags */ |
| 24230 | true, /* HasDisjunctSubRegs */ |
| 24231 | true, /* CoveredBySubRegs */ |
| 24232 | DD_with_dsub0_in_FPR64_loSuperclasses, 1, |
| 24233 | nullptr |
| 24234 | }; |
| 24235 | |
| 24236 | extern const TargetRegisterClass DD_with_dsub1_in_FPR64_loRegClass = { |
| 24237 | &AArch64MCRegisterClasses[DD_with_dsub1_in_FPR64_loRegClassID], |
| 24238 | DD_with_dsub1_in_FPR64_loSubClassMask, |
| 24239 | SuperRegIdxSeqs + 113, |
| 24240 | LaneBitmask(0x000000007800002B), |
| 24241 | 0, |
| 24242 | false, |
| 24243 | 0x00, /* TSFlags */ |
| 24244 | true, /* HasDisjunctSubRegs */ |
| 24245 | true, /* CoveredBySubRegs */ |
| 24246 | DD_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 24247 | nullptr |
| 24248 | }; |
| 24249 | |
| 24250 | extern const TargetRegisterClass XSeqPairsClassRegClass = { |
| 24251 | &AArch64MCRegisterClasses[XSeqPairsClassRegClassID], |
| 24252 | XSeqPairsClassSubClassMask, |
| 24253 | SuperRegIdxSeqs + 124, |
| 24254 | LaneBitmask(0x06000000000000C0), |
| 24255 | 0, |
| 24256 | false, |
| 24257 | 0x00, /* TSFlags */ |
| 24258 | true, /* HasDisjunctSubRegs */ |
| 24259 | true, /* CoveredBySubRegs */ |
| 24260 | nullptr, 0, |
| 24261 | nullptr |
| 24262 | }; |
| 24263 | |
| 24264 | extern const TargetRegisterClass DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass = { |
| 24265 | &AArch64MCRegisterClasses[DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID], |
| 24266 | DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSubClassMask, |
| 24267 | SuperRegIdxSeqs + 113, |
| 24268 | LaneBitmask(0x000000007800002B), |
| 24269 | 0, |
| 24270 | false, |
| 24271 | 0x00, /* TSFlags */ |
| 24272 | true, /* HasDisjunctSubRegs */ |
| 24273 | true, /* CoveredBySubRegs */ |
| 24274 | DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 24275 | nullptr |
| 24276 | }; |
| 24277 | |
| 24278 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64commonRegClass = { |
| 24279 | &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_GPR64commonRegClassID], |
| 24280 | XSeqPairsClass_with_subo64_in_GPR64commonSubClassMask, |
| 24281 | SuperRegIdxSeqs + 124, |
| 24282 | LaneBitmask(0x06000000000000C0), |
| 24283 | 0, |
| 24284 | false, |
| 24285 | 0x00, /* TSFlags */ |
| 24286 | true, /* HasDisjunctSubRegs */ |
| 24287 | true, /* CoveredBySubRegs */ |
| 24288 | XSeqPairsClass_with_subo64_in_GPR64commonSuperclasses, 1, |
| 24289 | nullptr |
| 24290 | }; |
| 24291 | |
| 24292 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noipRegClass = { |
| 24293 | &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_GPR64noipRegClassID], |
| 24294 | XSeqPairsClass_with_subo64_in_GPR64noipSubClassMask, |
| 24295 | SuperRegIdxSeqs + 124, |
| 24296 | LaneBitmask(0x06000000000000C0), |
| 24297 | 0, |
| 24298 | false, |
| 24299 | 0x00, /* TSFlags */ |
| 24300 | true, /* HasDisjunctSubRegs */ |
| 24301 | true, /* CoveredBySubRegs */ |
| 24302 | XSeqPairsClass_with_subo64_in_GPR64noipSuperclasses, 1, |
| 24303 | nullptr |
| 24304 | }; |
| 24305 | |
| 24306 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noipRegClass = { |
| 24307 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64noipRegClassID], |
| 24308 | XSeqPairsClass_with_sube64_in_GPR64noipSubClassMask, |
| 24309 | SuperRegIdxSeqs + 124, |
| 24310 | LaneBitmask(0x06000000000000C0), |
| 24311 | 0, |
| 24312 | false, |
| 24313 | 0x00, /* TSFlags */ |
| 24314 | true, /* HasDisjunctSubRegs */ |
| 24315 | true, /* CoveredBySubRegs */ |
| 24316 | XSeqPairsClass_with_sube64_in_GPR64noipSuperclasses, 3, |
| 24317 | nullptr |
| 24318 | }; |
| 24319 | |
| 24320 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPR64RegClass = { |
| 24321 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_tcGPR64RegClassID], |
| 24322 | XSeqPairsClass_with_sube64_in_tcGPR64SubClassMask, |
| 24323 | SuperRegIdxSeqs + 124, |
| 24324 | LaneBitmask(0x06000000000000C0), |
| 24325 | 0, |
| 24326 | false, |
| 24327 | 0x00, /* TSFlags */ |
| 24328 | true, /* HasDisjunctSubRegs */ |
| 24329 | true, /* CoveredBySubRegs */ |
| 24330 | XSeqPairsClass_with_sube64_in_tcGPR64Superclasses, 2, |
| 24331 | nullptr |
| 24332 | }; |
| 24333 | |
| 24334 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClass = { |
| 24335 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClassID], |
| 24336 | XSeqPairsClass_with_sube64_in_tcGPRnotx16SubClassMask, |
| 24337 | SuperRegIdxSeqs + 124, |
| 24338 | LaneBitmask(0x06000000000000C0), |
| 24339 | 0, |
| 24340 | false, |
| 24341 | 0x00, /* TSFlags */ |
| 24342 | true, /* HasDisjunctSubRegs */ |
| 24343 | true, /* CoveredBySubRegs */ |
| 24344 | XSeqPairsClass_with_sube64_in_tcGPRnotx16Superclasses, 5, |
| 24345 | nullptr |
| 24346 | }; |
| 24347 | |
| 24348 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPR64RegClass = { |
| 24349 | &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_tcGPR64RegClassID], |
| 24350 | XSeqPairsClass_with_subo64_in_tcGPR64SubClassMask, |
| 24351 | SuperRegIdxSeqs + 124, |
| 24352 | LaneBitmask(0x06000000000000C0), |
| 24353 | 0, |
| 24354 | false, |
| 24355 | 0x00, /* TSFlags */ |
| 24356 | true, /* HasDisjunctSubRegs */ |
| 24357 | true, /* CoveredBySubRegs */ |
| 24358 | XSeqPairsClass_with_subo64_in_tcGPR64Superclasses, 3, |
| 24359 | nullptr |
| 24360 | }; |
| 24361 | |
| 24362 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClass = { |
| 24363 | &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClassID], |
| 24364 | XSeqPairsClass_with_subo64_in_tcGPRnotx16x17SubClassMask, |
| 24365 | SuperRegIdxSeqs + 124, |
| 24366 | LaneBitmask(0x06000000000000C0), |
| 24367 | 0, |
| 24368 | false, |
| 24369 | 0x00, /* TSFlags */ |
| 24370 | true, /* HasDisjunctSubRegs */ |
| 24371 | true, /* CoveredBySubRegs */ |
| 24372 | XSeqPairsClass_with_subo64_in_tcGPRnotx16x17Superclasses, 7, |
| 24373 | nullptr |
| 24374 | }; |
| 24375 | |
| 24376 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64argRegClass = { |
| 24377 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64argRegClassID], |
| 24378 | XSeqPairsClass_with_sube64_in_GPR64argSubClassMask, |
| 24379 | SuperRegIdxSeqs + 124, |
| 24380 | LaneBitmask(0x06000000000000C0), |
| 24381 | 0, |
| 24382 | false, |
| 24383 | 0x00, /* TSFlags */ |
| 24384 | true, /* HasDisjunctSubRegs */ |
| 24385 | true, /* CoveredBySubRegs */ |
| 24386 | XSeqPairsClass_with_sube64_in_GPR64argSuperclasses, 8, |
| 24387 | nullptr |
| 24388 | }; |
| 24389 | |
| 24390 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { |
| 24391 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], |
| 24392 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, |
| 24393 | SuperRegIdxSeqs + 124, |
| 24394 | LaneBitmask(0x06000000000000C0), |
| 24395 | 0, |
| 24396 | false, |
| 24397 | 0x00, /* TSFlags */ |
| 24398 | true, /* HasDisjunctSubRegs */ |
| 24399 | true, /* CoveredBySubRegs */ |
| 24400 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, 8, |
| 24401 | nullptr |
| 24402 | }; |
| 24403 | |
| 24404 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 24405 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 24406 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 24407 | SuperRegIdxSeqs + 124, |
| 24408 | LaneBitmask(0x06000000000000C0), |
| 24409 | 0, |
| 24410 | false, |
| 24411 | 0x00, /* TSFlags */ |
| 24412 | true, /* HasDisjunctSubRegs */ |
| 24413 | true, /* CoveredBySubRegs */ |
| 24414 | XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 8, |
| 24415 | nullptr |
| 24416 | }; |
| 24417 | |
| 24418 | extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClass = { |
| 24419 | &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClassID], |
| 24420 | XSeqPairsClass_with_sube64_in_tcGPRx16x17SubClassMask, |
| 24421 | SuperRegIdxSeqs + 124, |
| 24422 | LaneBitmask(0x06000000000000C0), |
| 24423 | 0, |
| 24424 | false, |
| 24425 | 0x00, /* TSFlags */ |
| 24426 | true, /* HasDisjunctSubRegs */ |
| 24427 | true, /* CoveredBySubRegs */ |
| 24428 | XSeqPairsClass_with_sube64_in_tcGPRx16x17Superclasses, 4, |
| 24429 | nullptr |
| 24430 | }; |
| 24431 | |
| 24432 | extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass = { |
| 24433 | &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID], |
| 24434 | XSeqPairsClass_with_subo64_in_FIXED_REGSSubClassMask, |
| 24435 | SuperRegIdxSeqs + 127, |
| 24436 | LaneBitmask(0x06000000000000C0), |
| 24437 | 0, |
| 24438 | false, |
| 24439 | 0x00, /* TSFlags */ |
| 24440 | true, /* HasDisjunctSubRegs */ |
| 24441 | true, /* CoveredBySubRegs */ |
| 24442 | XSeqPairsClass_with_subo64_in_FIXED_REGSSuperclasses, 4, |
| 24443 | nullptr |
| 24444 | }; |
| 24445 | |
| 24446 | extern const TargetRegisterClass FPR128RegClass = { |
| 24447 | &AArch64MCRegisterClasses[FPR128RegClassID], |
| 24448 | FPR128SubClassMask, |
| 24449 | SuperRegIdxSeqs + 36, |
| 24450 | LaneBitmask(0x000000000000002F), |
| 24451 | 0, |
| 24452 | false, |
| 24453 | 0x00, /* TSFlags */ |
| 24454 | true, /* HasDisjunctSubRegs */ |
| 24455 | false, /* CoveredBySubRegs */ |
| 24456 | nullptr, 0, |
| 24457 | nullptr |
| 24458 | }; |
| 24459 | |
| 24460 | extern const TargetRegisterClass ZPRRegClass = { |
| 24461 | &AArch64MCRegisterClasses[ZPRRegClassID], |
| 24462 | ZPRSubClassMask, |
| 24463 | SuperRegIdxSeqs + 42, |
| 24464 | LaneBitmask(0x000000000000102F), |
| 24465 | 0, |
| 24466 | false, |
| 24467 | 0x00, /* TSFlags */ |
| 24468 | true, /* HasDisjunctSubRegs */ |
| 24469 | false, /* CoveredBySubRegs */ |
| 24470 | nullptr, 0, |
| 24471 | nullptr |
| 24472 | }; |
| 24473 | |
| 24474 | extern const TargetRegisterClass FPR128_loRegClass = { |
| 24475 | &AArch64MCRegisterClasses[FPR128_loRegClassID], |
| 24476 | FPR128_loSubClassMask, |
| 24477 | SuperRegIdxSeqs + 36, |
| 24478 | LaneBitmask(0x000000000000002F), |
| 24479 | 0, |
| 24480 | false, |
| 24481 | 0x00, /* TSFlags */ |
| 24482 | true, /* HasDisjunctSubRegs */ |
| 24483 | false, /* CoveredBySubRegs */ |
| 24484 | FPR128_loSuperclasses, 1, |
| 24485 | nullptr |
| 24486 | }; |
| 24487 | |
| 24488 | extern const TargetRegisterClass MPR128RegClass = { |
| 24489 | &AArch64MCRegisterClasses[MPR128RegClassID], |
| 24490 | MPR128SubClassMask, |
| 24491 | SuperRegIdxSeqs + 61, |
| 24492 | LaneBitmask(0x0000000000000001), |
| 24493 | 0, |
| 24494 | false, |
| 24495 | 0x00, /* TSFlags */ |
| 24496 | false, /* HasDisjunctSubRegs */ |
| 24497 | false, /* CoveredBySubRegs */ |
| 24498 | nullptr, 0, |
| 24499 | nullptr |
| 24500 | }; |
| 24501 | |
| 24502 | extern const TargetRegisterClass ZPRMul2RegClass = { |
| 24503 | &AArch64MCRegisterClasses[ZPRMul2RegClassID], |
| 24504 | ZPRMul2SubClassMask, |
| 24505 | SuperRegIdxSeqs + 42, |
| 24506 | LaneBitmask(0x000000000000102F), |
| 24507 | 0, |
| 24508 | false, |
| 24509 | 0x00, /* TSFlags */ |
| 24510 | true, /* HasDisjunctSubRegs */ |
| 24511 | false, /* CoveredBySubRegs */ |
| 24512 | ZPRMul2Superclasses, 1, |
| 24513 | nullptr |
| 24514 | }; |
| 24515 | |
| 24516 | extern const TargetRegisterClass ZPR_4bRegClass = { |
| 24517 | &AArch64MCRegisterClasses[ZPR_4bRegClassID], |
| 24518 | ZPR_4bSubClassMask, |
| 24519 | SuperRegIdxSeqs + 42, |
| 24520 | LaneBitmask(0x000000000000102F), |
| 24521 | 0, |
| 24522 | false, |
| 24523 | 0x00, /* TSFlags */ |
| 24524 | true, /* HasDisjunctSubRegs */ |
| 24525 | false, /* CoveredBySubRegs */ |
| 24526 | ZPR_4bSuperclasses, 1, |
| 24527 | nullptr |
| 24528 | }; |
| 24529 | |
| 24530 | extern const TargetRegisterClass FPR128_0to7RegClass = { |
| 24531 | &AArch64MCRegisterClasses[FPR128_0to7RegClassID], |
| 24532 | FPR128_0to7SubClassMask, |
| 24533 | SuperRegIdxSeqs + 36, |
| 24534 | LaneBitmask(0x000000000000002F), |
| 24535 | 0, |
| 24536 | false, |
| 24537 | 0x00, /* TSFlags */ |
| 24538 | true, /* HasDisjunctSubRegs */ |
| 24539 | false, /* CoveredBySubRegs */ |
| 24540 | FPR128_0to7Superclasses, 2, |
| 24541 | nullptr |
| 24542 | }; |
| 24543 | |
| 24544 | extern const TargetRegisterClass ZPRMul2_HiRegClass = { |
| 24545 | &AArch64MCRegisterClasses[ZPRMul2_HiRegClassID], |
| 24546 | ZPRMul2_HiSubClassMask, |
| 24547 | SuperRegIdxSeqs + 42, |
| 24548 | LaneBitmask(0x000000000000102F), |
| 24549 | 0, |
| 24550 | false, |
| 24551 | 0x00, /* TSFlags */ |
| 24552 | true, /* HasDisjunctSubRegs */ |
| 24553 | false, /* CoveredBySubRegs */ |
| 24554 | ZPRMul2_HiSuperclasses, 2, |
| 24555 | nullptr |
| 24556 | }; |
| 24557 | |
| 24558 | extern const TargetRegisterClass ZPRMul2_LoRegClass = { |
| 24559 | &AArch64MCRegisterClasses[ZPRMul2_LoRegClassID], |
| 24560 | ZPRMul2_LoSubClassMask, |
| 24561 | SuperRegIdxSeqs + 42, |
| 24562 | LaneBitmask(0x000000000000102F), |
| 24563 | 0, |
| 24564 | false, |
| 24565 | 0x00, /* TSFlags */ |
| 24566 | true, /* HasDisjunctSubRegs */ |
| 24567 | false, /* CoveredBySubRegs */ |
| 24568 | ZPRMul2_LoSuperclasses, 3, |
| 24569 | nullptr |
| 24570 | }; |
| 24571 | |
| 24572 | extern const TargetRegisterClass ZPRMul4RegClass = { |
| 24573 | &AArch64MCRegisterClasses[ZPRMul4RegClassID], |
| 24574 | ZPRMul4SubClassMask, |
| 24575 | SuperRegIdxSeqs + 42, |
| 24576 | LaneBitmask(0x000000000000102F), |
| 24577 | 0, |
| 24578 | false, |
| 24579 | 0x00, /* TSFlags */ |
| 24580 | true, /* HasDisjunctSubRegs */ |
| 24581 | false, /* CoveredBySubRegs */ |
| 24582 | ZPRMul4Superclasses, 2, |
| 24583 | nullptr |
| 24584 | }; |
| 24585 | |
| 24586 | extern const TargetRegisterClass ZPR_3bRegClass = { |
| 24587 | &AArch64MCRegisterClasses[ZPR_3bRegClassID], |
| 24588 | ZPR_3bSubClassMask, |
| 24589 | SuperRegIdxSeqs + 42, |
| 24590 | LaneBitmask(0x000000000000102F), |
| 24591 | 0, |
| 24592 | false, |
| 24593 | 0x00, /* TSFlags */ |
| 24594 | true, /* HasDisjunctSubRegs */ |
| 24595 | false, /* CoveredBySubRegs */ |
| 24596 | ZPR_3bSuperclasses, 2, |
| 24597 | nullptr |
| 24598 | }; |
| 24599 | |
| 24600 | extern const TargetRegisterClass ZPR_KRegClass = { |
| 24601 | &AArch64MCRegisterClasses[ZPR_KRegClassID], |
| 24602 | ZPR_KSubClassMask, |
| 24603 | SuperRegIdxSeqs + 42, |
| 24604 | LaneBitmask(0x000000000000102F), |
| 24605 | 0, |
| 24606 | false, |
| 24607 | 0x00, /* TSFlags */ |
| 24608 | true, /* HasDisjunctSubRegs */ |
| 24609 | false, /* CoveredBySubRegs */ |
| 24610 | ZPR_KSuperclasses, 1, |
| 24611 | nullptr |
| 24612 | }; |
| 24613 | |
| 24614 | extern const TargetRegisterClass ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 24615 | &AArch64MCRegisterClasses[ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 24616 | ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 24617 | SuperRegIdxSeqs + 42, |
| 24618 | LaneBitmask(0x000000000000102F), |
| 24619 | 0, |
| 24620 | false, |
| 24621 | 0x00, /* TSFlags */ |
| 24622 | true, /* HasDisjunctSubRegs */ |
| 24623 | false, /* CoveredBySubRegs */ |
| 24624 | ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 24625 | nullptr |
| 24626 | }; |
| 24627 | |
| 24628 | extern const TargetRegisterClass ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 24629 | &AArch64MCRegisterClasses[ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 24630 | ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 24631 | SuperRegIdxSeqs + 42, |
| 24632 | LaneBitmask(0x000000000000102F), |
| 24633 | 0, |
| 24634 | false, |
| 24635 | 0x00, /* TSFlags */ |
| 24636 | true, /* HasDisjunctSubRegs */ |
| 24637 | false, /* CoveredBySubRegs */ |
| 24638 | ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 24639 | nullptr |
| 24640 | }; |
| 24641 | |
| 24642 | extern const TargetRegisterClass ZPRMul2_and_ZPR_3bRegClass = { |
| 24643 | &AArch64MCRegisterClasses[ZPRMul2_and_ZPR_3bRegClassID], |
| 24644 | ZPRMul2_and_ZPR_3bSubClassMask, |
| 24645 | SuperRegIdxSeqs + 42, |
| 24646 | LaneBitmask(0x000000000000102F), |
| 24647 | 0, |
| 24648 | false, |
| 24649 | 0x00, /* TSFlags */ |
| 24650 | true, /* HasDisjunctSubRegs */ |
| 24651 | false, /* CoveredBySubRegs */ |
| 24652 | ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 24653 | nullptr |
| 24654 | }; |
| 24655 | |
| 24656 | extern const TargetRegisterClass ZPRMul2_and_ZPR_KRegClass = { |
| 24657 | &AArch64MCRegisterClasses[ZPRMul2_and_ZPR_KRegClassID], |
| 24658 | ZPRMul2_and_ZPR_KSubClassMask, |
| 24659 | SuperRegIdxSeqs + 42, |
| 24660 | LaneBitmask(0x000000000000102F), |
| 24661 | 0, |
| 24662 | false, |
| 24663 | 0x00, /* TSFlags */ |
| 24664 | true, /* HasDisjunctSubRegs */ |
| 24665 | false, /* CoveredBySubRegs */ |
| 24666 | ZPRMul2_and_ZPR_KSuperclasses, 4, |
| 24667 | nullptr |
| 24668 | }; |
| 24669 | |
| 24670 | extern const TargetRegisterClass ZPRMul4_and_ZPR_3bRegClass = { |
| 24671 | &AArch64MCRegisterClasses[ZPRMul4_and_ZPR_3bRegClassID], |
| 24672 | ZPRMul4_and_ZPR_3bSubClassMask, |
| 24673 | SuperRegIdxSeqs + 42, |
| 24674 | LaneBitmask(0x000000000000102F), |
| 24675 | 0, |
| 24676 | false, |
| 24677 | 0x00, /* TSFlags */ |
| 24678 | true, /* HasDisjunctSubRegs */ |
| 24679 | false, /* CoveredBySubRegs */ |
| 24680 | ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 24681 | nullptr |
| 24682 | }; |
| 24683 | |
| 24684 | extern const TargetRegisterClass ZPRMul4_and_ZPR_KRegClass = { |
| 24685 | &AArch64MCRegisterClasses[ZPRMul4_and_ZPR_KRegClassID], |
| 24686 | ZPRMul4_and_ZPR_KSubClassMask, |
| 24687 | SuperRegIdxSeqs + 42, |
| 24688 | LaneBitmask(0x000000000000102F), |
| 24689 | 0, |
| 24690 | false, |
| 24691 | 0x00, /* TSFlags */ |
| 24692 | true, /* HasDisjunctSubRegs */ |
| 24693 | false, /* CoveredBySubRegs */ |
| 24694 | ZPRMul4_and_ZPR_KSuperclasses, 7, |
| 24695 | nullptr |
| 24696 | }; |
| 24697 | |
| 24698 | extern const TargetRegisterClass DDDRegClass = { |
| 24699 | &AArch64MCRegisterClasses[DDDRegClassID], |
| 24700 | DDDSubClassMask, |
| 24701 | SuperRegIdxSeqs + 120, |
| 24702 | LaneBitmask(0x000000787800002B), |
| 24703 | 0, |
| 24704 | false, |
| 24705 | 0x00, /* TSFlags */ |
| 24706 | true, /* HasDisjunctSubRegs */ |
| 24707 | true, /* CoveredBySubRegs */ |
| 24708 | nullptr, 0, |
| 24709 | nullptr |
| 24710 | }; |
| 24711 | |
| 24712 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_loRegClass = { |
| 24713 | &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_loRegClassID], |
| 24714 | DDD_with_dsub0_in_FPR64_loSubClassMask, |
| 24715 | SuperRegIdxSeqs + 120, |
| 24716 | LaneBitmask(0x000000787800002B), |
| 24717 | 0, |
| 24718 | false, |
| 24719 | 0x00, /* TSFlags */ |
| 24720 | true, /* HasDisjunctSubRegs */ |
| 24721 | true, /* CoveredBySubRegs */ |
| 24722 | DDD_with_dsub0_in_FPR64_loSuperclasses, 1, |
| 24723 | nullptr |
| 24724 | }; |
| 24725 | |
| 24726 | extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_loRegClass = { |
| 24727 | &AArch64MCRegisterClasses[DDD_with_dsub1_in_FPR64_loRegClassID], |
| 24728 | DDD_with_dsub1_in_FPR64_loSubClassMask, |
| 24729 | SuperRegIdxSeqs + 120, |
| 24730 | LaneBitmask(0x000000787800002B), |
| 24731 | 0, |
| 24732 | false, |
| 24733 | 0x00, /* TSFlags */ |
| 24734 | true, /* HasDisjunctSubRegs */ |
| 24735 | true, /* CoveredBySubRegs */ |
| 24736 | DDD_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 24737 | nullptr |
| 24738 | }; |
| 24739 | |
| 24740 | extern const TargetRegisterClass DDD_with_dsub2_in_FPR64_loRegClass = { |
| 24741 | &AArch64MCRegisterClasses[DDD_with_dsub2_in_FPR64_loRegClassID], |
| 24742 | DDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24743 | SuperRegIdxSeqs + 120, |
| 24744 | LaneBitmask(0x000000787800002B), |
| 24745 | 0, |
| 24746 | false, |
| 24747 | 0x00, /* TSFlags */ |
| 24748 | true, /* HasDisjunctSubRegs */ |
| 24749 | true, /* CoveredBySubRegs */ |
| 24750 | DDD_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 24751 | nullptr |
| 24752 | }; |
| 24753 | |
| 24754 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass = { |
| 24755 | &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID], |
| 24756 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSubClassMask, |
| 24757 | SuperRegIdxSeqs + 120, |
| 24758 | LaneBitmask(0x000000787800002B), |
| 24759 | 0, |
| 24760 | false, |
| 24761 | 0x00, /* TSFlags */ |
| 24762 | true, /* HasDisjunctSubRegs */ |
| 24763 | true, /* CoveredBySubRegs */ |
| 24764 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 24765 | nullptr |
| 24766 | }; |
| 24767 | |
| 24768 | extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = { |
| 24769 | &AArch64MCRegisterClasses[DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID], |
| 24770 | DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24771 | SuperRegIdxSeqs + 120, |
| 24772 | LaneBitmask(0x000000787800002B), |
| 24773 | 0, |
| 24774 | false, |
| 24775 | 0x00, /* TSFlags */ |
| 24776 | true, /* HasDisjunctSubRegs */ |
| 24777 | true, /* CoveredBySubRegs */ |
| 24778 | DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 24779 | nullptr |
| 24780 | }; |
| 24781 | |
| 24782 | extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = { |
| 24783 | &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID], |
| 24784 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24785 | SuperRegIdxSeqs + 120, |
| 24786 | LaneBitmask(0x000000787800002B), |
| 24787 | 0, |
| 24788 | false, |
| 24789 | 0x00, /* TSFlags */ |
| 24790 | true, /* HasDisjunctSubRegs */ |
| 24791 | true, /* CoveredBySubRegs */ |
| 24792 | DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 24793 | nullptr |
| 24794 | }; |
| 24795 | |
| 24796 | extern const TargetRegisterClass DDDDRegClass = { |
| 24797 | &AArch64MCRegisterClasses[DDDDRegClassID], |
| 24798 | DDDDSubClassMask, |
| 24799 | SuperRegIdxSeqs + 118, |
| 24800 | LaneBitmask(0x0000007FF800002B), |
| 24801 | 0, |
| 24802 | false, |
| 24803 | 0x00, /* TSFlags */ |
| 24804 | true, /* HasDisjunctSubRegs */ |
| 24805 | true, /* CoveredBySubRegs */ |
| 24806 | nullptr, 0, |
| 24807 | nullptr |
| 24808 | }; |
| 24809 | |
| 24810 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_loRegClass = { |
| 24811 | &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_loRegClassID], |
| 24812 | DDDD_with_dsub0_in_FPR64_loSubClassMask, |
| 24813 | SuperRegIdxSeqs + 118, |
| 24814 | LaneBitmask(0x0000007FF800002B), |
| 24815 | 0, |
| 24816 | false, |
| 24817 | 0x00, /* TSFlags */ |
| 24818 | true, /* HasDisjunctSubRegs */ |
| 24819 | true, /* CoveredBySubRegs */ |
| 24820 | DDDD_with_dsub0_in_FPR64_loSuperclasses, 1, |
| 24821 | nullptr |
| 24822 | }; |
| 24823 | |
| 24824 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_loRegClass = { |
| 24825 | &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_loRegClassID], |
| 24826 | DDDD_with_dsub1_in_FPR64_loSubClassMask, |
| 24827 | SuperRegIdxSeqs + 118, |
| 24828 | LaneBitmask(0x0000007FF800002B), |
| 24829 | 0, |
| 24830 | false, |
| 24831 | 0x00, /* TSFlags */ |
| 24832 | true, /* HasDisjunctSubRegs */ |
| 24833 | true, /* CoveredBySubRegs */ |
| 24834 | DDDD_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 24835 | nullptr |
| 24836 | }; |
| 24837 | |
| 24838 | extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_loRegClass = { |
| 24839 | &AArch64MCRegisterClasses[DDDD_with_dsub2_in_FPR64_loRegClassID], |
| 24840 | DDDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24841 | SuperRegIdxSeqs + 118, |
| 24842 | LaneBitmask(0x0000007FF800002B), |
| 24843 | 0, |
| 24844 | false, |
| 24845 | 0x00, /* TSFlags */ |
| 24846 | true, /* HasDisjunctSubRegs */ |
| 24847 | true, /* CoveredBySubRegs */ |
| 24848 | DDDD_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 24849 | nullptr |
| 24850 | }; |
| 24851 | |
| 24852 | extern const TargetRegisterClass DDDD_with_dsub3_in_FPR64_loRegClass = { |
| 24853 | &AArch64MCRegisterClasses[DDDD_with_dsub3_in_FPR64_loRegClassID], |
| 24854 | DDDD_with_dsub3_in_FPR64_loSubClassMask, |
| 24855 | SuperRegIdxSeqs + 118, |
| 24856 | LaneBitmask(0x0000007FF800002B), |
| 24857 | 0, |
| 24858 | false, |
| 24859 | 0x00, /* TSFlags */ |
| 24860 | true, /* HasDisjunctSubRegs */ |
| 24861 | true, /* CoveredBySubRegs */ |
| 24862 | DDDD_with_dsub3_in_FPR64_loSuperclasses, 1, |
| 24863 | nullptr |
| 24864 | }; |
| 24865 | |
| 24866 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass = { |
| 24867 | &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID], |
| 24868 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSubClassMask, |
| 24869 | SuperRegIdxSeqs + 118, |
| 24870 | LaneBitmask(0x0000007FF800002B), |
| 24871 | 0, |
| 24872 | false, |
| 24873 | 0x00, /* TSFlags */ |
| 24874 | true, /* HasDisjunctSubRegs */ |
| 24875 | true, /* CoveredBySubRegs */ |
| 24876 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 24877 | nullptr |
| 24878 | }; |
| 24879 | |
| 24880 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = { |
| 24881 | &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID], |
| 24882 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24883 | SuperRegIdxSeqs + 118, |
| 24884 | LaneBitmask(0x0000007FF800002B), |
| 24885 | 0, |
| 24886 | false, |
| 24887 | 0x00, /* TSFlags */ |
| 24888 | true, /* HasDisjunctSubRegs */ |
| 24889 | true, /* CoveredBySubRegs */ |
| 24890 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 24891 | nullptr |
| 24892 | }; |
| 24893 | |
| 24894 | extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { |
| 24895 | &AArch64MCRegisterClasses[DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], |
| 24896 | DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, |
| 24897 | SuperRegIdxSeqs + 118, |
| 24898 | LaneBitmask(0x0000007FF800002B), |
| 24899 | 0, |
| 24900 | false, |
| 24901 | 0x00, /* TSFlags */ |
| 24902 | true, /* HasDisjunctSubRegs */ |
| 24903 | true, /* CoveredBySubRegs */ |
| 24904 | DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, 3, |
| 24905 | nullptr |
| 24906 | }; |
| 24907 | |
| 24908 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = { |
| 24909 | &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID], |
| 24910 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask, |
| 24911 | SuperRegIdxSeqs + 118, |
| 24912 | LaneBitmask(0x0000007FF800002B), |
| 24913 | 0, |
| 24914 | false, |
| 24915 | 0x00, /* TSFlags */ |
| 24916 | true, /* HasDisjunctSubRegs */ |
| 24917 | true, /* CoveredBySubRegs */ |
| 24918 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 24919 | nullptr |
| 24920 | }; |
| 24921 | |
| 24922 | extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { |
| 24923 | &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], |
| 24924 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, |
| 24925 | SuperRegIdxSeqs + 118, |
| 24926 | LaneBitmask(0x0000007FF800002B), |
| 24927 | 0, |
| 24928 | false, |
| 24929 | 0x00, /* TSFlags */ |
| 24930 | true, /* HasDisjunctSubRegs */ |
| 24931 | true, /* CoveredBySubRegs */ |
| 24932 | DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, 6, |
| 24933 | nullptr |
| 24934 | }; |
| 24935 | |
| 24936 | extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { |
| 24937 | &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], |
| 24938 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, |
| 24939 | SuperRegIdxSeqs + 118, |
| 24940 | LaneBitmask(0x0000007FF800002B), |
| 24941 | 0, |
| 24942 | false, |
| 24943 | 0x00, /* TSFlags */ |
| 24944 | true, /* HasDisjunctSubRegs */ |
| 24945 | true, /* CoveredBySubRegs */ |
| 24946 | DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, 10, |
| 24947 | nullptr |
| 24948 | }; |
| 24949 | |
| 24950 | extern const TargetRegisterClass QQRegClass = { |
| 24951 | &AArch64MCRegisterClasses[QQRegClassID], |
| 24952 | QQSubClassMask, |
| 24953 | SuperRegIdxSeqs + 135, |
| 24954 | LaneBitmask(0x000001007800002F), |
| 24955 | 0, |
| 24956 | false, |
| 24957 | 0x00, /* TSFlags */ |
| 24958 | true, /* HasDisjunctSubRegs */ |
| 24959 | true, /* CoveredBySubRegs */ |
| 24960 | nullptr, 0, |
| 24961 | nullptr |
| 24962 | }; |
| 24963 | |
| 24964 | extern const TargetRegisterClass ZPR2RegClass = { |
| 24965 | &AArch64MCRegisterClasses[ZPR2RegClassID], |
| 24966 | ZPR2SubClassMask, |
| 24967 | SuperRegIdxSeqs + 149, |
| 24968 | LaneBitmask(0x080001007800102F), |
| 24969 | 0, |
| 24970 | false, |
| 24971 | 0x00, /* TSFlags */ |
| 24972 | true, /* HasDisjunctSubRegs */ |
| 24973 | true, /* CoveredBySubRegs */ |
| 24974 | nullptr, 0, |
| 24975 | nullptr |
| 24976 | }; |
| 24977 | |
| 24978 | extern const TargetRegisterClass ZPR2StridedOrContiguousRegClass = { |
| 24979 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguousRegClassID], |
| 24980 | ZPR2StridedOrContiguousSubClassMask, |
| 24981 | SuperRegIdxSeqs + 158, |
| 24982 | LaneBitmask(0x080001007800102F), |
| 24983 | 0, |
| 24984 | false, |
| 24985 | 0x00, /* TSFlags */ |
| 24986 | true, /* HasDisjunctSubRegs */ |
| 24987 | true, /* CoveredBySubRegs */ |
| 24988 | nullptr, 0, |
| 24989 | nullptr |
| 24990 | }; |
| 24991 | |
| 24992 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass = { |
| 24993 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID], |
| 24994 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2SubClassMask, |
| 24995 | SuperRegIdxSeqs + 158, |
| 24996 | LaneBitmask(0x080001007800102F), |
| 24997 | 0, |
| 24998 | false, |
| 24999 | 0x00, /* TSFlags */ |
| 25000 | true, /* HasDisjunctSubRegs */ |
| 25001 | true, /* CoveredBySubRegs */ |
| 25002 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2Superclasses, 1, |
| 25003 | nullptr |
| 25004 | }; |
| 25005 | |
| 25006 | extern const TargetRegisterClass QQ_with_dsub1_in_FPR64_loRegClass = { |
| 25007 | &AArch64MCRegisterClasses[QQ_with_dsub1_in_FPR64_loRegClassID], |
| 25008 | QQ_with_dsub1_in_FPR64_loSubClassMask, |
| 25009 | SuperRegIdxSeqs + 135, |
| 25010 | LaneBitmask(0x000001007800002F), |
| 25011 | 0, |
| 25012 | false, |
| 25013 | 0x00, /* TSFlags */ |
| 25014 | true, /* HasDisjunctSubRegs */ |
| 25015 | true, /* CoveredBySubRegs */ |
| 25016 | QQ_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 25017 | nullptr |
| 25018 | }; |
| 25019 | |
| 25020 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_loRegClass = { |
| 25021 | &AArch64MCRegisterClasses[QQ_with_qsub0_in_FPR128_loRegClassID], |
| 25022 | QQ_with_qsub0_in_FPR128_loSubClassMask, |
| 25023 | SuperRegIdxSeqs + 135, |
| 25024 | LaneBitmask(0x000001007800002F), |
| 25025 | 0, |
| 25026 | false, |
| 25027 | 0x00, /* TSFlags */ |
| 25028 | true, /* HasDisjunctSubRegs */ |
| 25029 | true, /* CoveredBySubRegs */ |
| 25030 | QQ_with_qsub0_in_FPR128_loSuperclasses, 1, |
| 25031 | nullptr |
| 25032 | }; |
| 25033 | |
| 25034 | extern const TargetRegisterClass ZPR2Mul2RegClass = { |
| 25035 | &AArch64MCRegisterClasses[ZPR2Mul2RegClassID], |
| 25036 | ZPR2Mul2SubClassMask, |
| 25037 | SuperRegIdxSeqs + 149, |
| 25038 | LaneBitmask(0x080001007800102F), |
| 25039 | 0, |
| 25040 | false, |
| 25041 | 0x00, /* TSFlags */ |
| 25042 | true, /* HasDisjunctSubRegs */ |
| 25043 | true, /* CoveredBySubRegs */ |
| 25044 | ZPR2Mul2Superclasses, 3, |
| 25045 | nullptr |
| 25046 | }; |
| 25047 | |
| 25048 | extern const TargetRegisterClass ZPR2StridedRegClass = { |
| 25049 | &AArch64MCRegisterClasses[ZPR2StridedRegClassID], |
| 25050 | ZPR2StridedSubClassMask, |
| 25051 | SuperRegIdxSeqs + 161, |
| 25052 | LaneBitmask(0x080001007800102F), |
| 25053 | 0, |
| 25054 | false, |
| 25055 | 0x00, /* TSFlags */ |
| 25056 | true, /* HasDisjunctSubRegs */ |
| 25057 | true, /* CoveredBySubRegs */ |
| 25058 | ZPR2StridedSuperclasses, 1, |
| 25059 | nullptr |
| 25060 | }; |
| 25061 | |
| 25062 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClass = { |
| 25063 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClassID], |
| 25064 | ZPR2StridedOrContiguous_with_dsub_in_FPR64_loSubClassMask, |
| 25065 | SuperRegIdxSeqs + 158, |
| 25066 | LaneBitmask(0x080001007800102F), |
| 25067 | 0, |
| 25068 | false, |
| 25069 | 0x00, /* TSFlags */ |
| 25070 | true, /* HasDisjunctSubRegs */ |
| 25071 | true, /* CoveredBySubRegs */ |
| 25072 | ZPR2StridedOrContiguous_with_dsub_in_FPR64_loSuperclasses, 1, |
| 25073 | nullptr |
| 25074 | }; |
| 25075 | |
| 25076 | extern const TargetRegisterClass ZPR2_with_dsub1_in_FPR64_loRegClass = { |
| 25077 | &AArch64MCRegisterClasses[ZPR2_with_dsub1_in_FPR64_loRegClassID], |
| 25078 | ZPR2_with_dsub1_in_FPR64_loSubClassMask, |
| 25079 | SuperRegIdxSeqs + 149, |
| 25080 | LaneBitmask(0x080001007800102F), |
| 25081 | 0, |
| 25082 | false, |
| 25083 | 0x00, /* TSFlags */ |
| 25084 | true, /* HasDisjunctSubRegs */ |
| 25085 | true, /* CoveredBySubRegs */ |
| 25086 | ZPR2_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 25087 | nullptr |
| 25088 | }; |
| 25089 | |
| 25090 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2RegClass = { |
| 25091 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2RegClassID], |
| 25092 | ZPR2_with_zsub1_in_ZPRMul2SubClassMask, |
| 25093 | SuperRegIdxSeqs + 149, |
| 25094 | LaneBitmask(0x080001007800102F), |
| 25095 | 0, |
| 25096 | false, |
| 25097 | 0x00, /* TSFlags */ |
| 25098 | true, /* HasDisjunctSubRegs */ |
| 25099 | true, /* CoveredBySubRegs */ |
| 25100 | ZPR2_with_zsub1_in_ZPRMul2Superclasses, 1, |
| 25101 | nullptr |
| 25102 | }; |
| 25103 | |
| 25104 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_loRegClass = { |
| 25105 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_loRegClassID], |
| 25106 | ZPR2_with_zsub_in_FPR128_loSubClassMask, |
| 25107 | SuperRegIdxSeqs + 149, |
| 25108 | LaneBitmask(0x080001007800102F), |
| 25109 | 0, |
| 25110 | false, |
| 25111 | 0x00, /* TSFlags */ |
| 25112 | true, /* HasDisjunctSubRegs */ |
| 25113 | true, /* CoveredBySubRegs */ |
| 25114 | ZPR2_with_zsub_in_FPR128_loSuperclasses, 1, |
| 25115 | nullptr |
| 25116 | }; |
| 25117 | |
| 25118 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClass = { |
| 25119 | &AArch64MCRegisterClasses[QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClassID], |
| 25120 | QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loSubClassMask, |
| 25121 | SuperRegIdxSeqs + 135, |
| 25122 | LaneBitmask(0x000001007800002F), |
| 25123 | 0, |
| 25124 | false, |
| 25125 | 0x00, /* TSFlags */ |
| 25126 | true, /* HasDisjunctSubRegs */ |
| 25127 | true, /* CoveredBySubRegs */ |
| 25128 | QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 25129 | nullptr |
| 25130 | }; |
| 25131 | |
| 25132 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClass = { |
| 25133 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClassID], |
| 25134 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loSubClassMask, |
| 25135 | SuperRegIdxSeqs + 149, |
| 25136 | LaneBitmask(0x080001007800102F), |
| 25137 | 0, |
| 25138 | false, |
| 25139 | 0x00, /* TSFlags */ |
| 25140 | true, /* HasDisjunctSubRegs */ |
| 25141 | true, /* CoveredBySubRegs */ |
| 25142 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 25143 | nullptr |
| 25144 | }; |
| 25145 | |
| 25146 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass = { |
| 25147 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID], |
| 25148 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSubClassMask, |
| 25149 | SuperRegIdxSeqs + 158, |
| 25150 | LaneBitmask(0x080001007800102F), |
| 25151 | 0, |
| 25152 | false, |
| 25153 | 0x00, /* TSFlags */ |
| 25154 | true, /* HasDisjunctSubRegs */ |
| 25155 | true, /* CoveredBySubRegs */ |
| 25156 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSuperclasses, 2, |
| 25157 | nullptr |
| 25158 | }; |
| 25159 | |
| 25160 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass = { |
| 25161 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID], |
| 25162 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSubClassMask, |
| 25163 | SuperRegIdxSeqs + 158, |
| 25164 | LaneBitmask(0x080001007800102F), |
| 25165 | 0, |
| 25166 | false, |
| 25167 | 0x00, /* TSFlags */ |
| 25168 | true, /* HasDisjunctSubRegs */ |
| 25169 | true, /* CoveredBySubRegs */ |
| 25170 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSuperclasses, 3, |
| 25171 | nullptr |
| 25172 | }; |
| 25173 | |
| 25174 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass = { |
| 25175 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID], |
| 25176 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4SubClassMask, |
| 25177 | SuperRegIdxSeqs + 158, |
| 25178 | LaneBitmask(0x080001007800102F), |
| 25179 | 0, |
| 25180 | false, |
| 25181 | 0x00, /* TSFlags */ |
| 25182 | true, /* HasDisjunctSubRegs */ |
| 25183 | true, /* CoveredBySubRegs */ |
| 25184 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4Superclasses, 2, |
| 25185 | nullptr |
| 25186 | }; |
| 25187 | |
| 25188 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass = { |
| 25189 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID], |
| 25190 | ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7SubClassMask, |
| 25191 | SuperRegIdxSeqs + 158, |
| 25192 | LaneBitmask(0x080001007800102F), |
| 25193 | 0, |
| 25194 | false, |
| 25195 | 0x00, /* TSFlags */ |
| 25196 | true, /* HasDisjunctSubRegs */ |
| 25197 | true, /* CoveredBySubRegs */ |
| 25198 | ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7Superclasses, 2, |
| 25199 | nullptr |
| 25200 | }; |
| 25201 | |
| 25202 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_0to7RegClass = { |
| 25203 | &AArch64MCRegisterClasses[QQ_with_qsub0_in_FPR128_0to7RegClassID], |
| 25204 | QQ_with_qsub0_in_FPR128_0to7SubClassMask, |
| 25205 | SuperRegIdxSeqs + 135, |
| 25206 | LaneBitmask(0x000001007800002F), |
| 25207 | 0, |
| 25208 | false, |
| 25209 | 0x00, /* TSFlags */ |
| 25210 | true, /* HasDisjunctSubRegs */ |
| 25211 | true, /* CoveredBySubRegs */ |
| 25212 | QQ_with_qsub0_in_FPR128_0to7Superclasses, 4, |
| 25213 | nullptr |
| 25214 | }; |
| 25215 | |
| 25216 | extern const TargetRegisterClass QQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 25217 | &AArch64MCRegisterClasses[QQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 25218 | QQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 25219 | SuperRegIdxSeqs + 135, |
| 25220 | LaneBitmask(0x000001007800002F), |
| 25221 | 0, |
| 25222 | false, |
| 25223 | 0x00, /* TSFlags */ |
| 25224 | true, /* HasDisjunctSubRegs */ |
| 25225 | true, /* CoveredBySubRegs */ |
| 25226 | QQ_with_qsub1_in_FPR128_0to7Superclasses, 2, |
| 25227 | nullptr |
| 25228 | }; |
| 25229 | |
| 25230 | extern const TargetRegisterClass ZPR2Mul2_HiRegClass = { |
| 25231 | &AArch64MCRegisterClasses[ZPR2Mul2_HiRegClassID], |
| 25232 | ZPR2Mul2_HiSubClassMask, |
| 25233 | SuperRegIdxSeqs + 149, |
| 25234 | LaneBitmask(0x080001007800102F), |
| 25235 | 0, |
| 25236 | false, |
| 25237 | 0x00, /* TSFlags */ |
| 25238 | true, /* HasDisjunctSubRegs */ |
| 25239 | true, /* CoveredBySubRegs */ |
| 25240 | ZPR2Mul2_HiSuperclasses, 5, |
| 25241 | nullptr |
| 25242 | }; |
| 25243 | |
| 25244 | extern const TargetRegisterClass ZPR2Mul2_LoRegClass = { |
| 25245 | &AArch64MCRegisterClasses[ZPR2Mul2_LoRegClassID], |
| 25246 | ZPR2Mul2_LoSubClassMask, |
| 25247 | SuperRegIdxSeqs + 149, |
| 25248 | LaneBitmask(0x080001007800102F), |
| 25249 | 0, |
| 25250 | false, |
| 25251 | 0x00, /* TSFlags */ |
| 25252 | true, /* HasDisjunctSubRegs */ |
| 25253 | true, /* CoveredBySubRegs */ |
| 25254 | ZPR2Mul2_LoSuperclasses, 9, |
| 25255 | nullptr |
| 25256 | }; |
| 25257 | |
| 25258 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 25259 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 25260 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 25261 | SuperRegIdxSeqs + 158, |
| 25262 | LaneBitmask(0x080001007800102F), |
| 25263 | 0, |
| 25264 | false, |
| 25265 | 0x00, /* TSFlags */ |
| 25266 | true, /* HasDisjunctSubRegs */ |
| 25267 | true, /* CoveredBySubRegs */ |
| 25268 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 25269 | nullptr |
| 25270 | }; |
| 25271 | |
| 25272 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClass = { |
| 25273 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClassID], |
| 25274 | ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KSubClassMask, |
| 25275 | SuperRegIdxSeqs + 153, |
| 25276 | LaneBitmask(0x080001007800102F), |
| 25277 | 0, |
| 25278 | false, |
| 25279 | 0x00, /* TSFlags */ |
| 25280 | true, /* HasDisjunctSubRegs */ |
| 25281 | true, /* CoveredBySubRegs */ |
| 25282 | ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KSuperclasses, 1, |
| 25283 | nullptr |
| 25284 | }; |
| 25285 | |
| 25286 | extern const TargetRegisterClass ZPR2Strided_with_dsub_in_FPR64_loRegClass = { |
| 25287 | &AArch64MCRegisterClasses[ZPR2Strided_with_dsub_in_FPR64_loRegClassID], |
| 25288 | ZPR2Strided_with_dsub_in_FPR64_loSubClassMask, |
| 25289 | SuperRegIdxSeqs + 161, |
| 25290 | LaneBitmask(0x080001007800102F), |
| 25291 | 0, |
| 25292 | false, |
| 25293 | 0x00, /* TSFlags */ |
| 25294 | true, /* HasDisjunctSubRegs */ |
| 25295 | true, /* CoveredBySubRegs */ |
| 25296 | ZPR2Strided_with_dsub_in_FPR64_loSuperclasses, 4, |
| 25297 | nullptr |
| 25298 | }; |
| 25299 | |
| 25300 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2RegClass = { |
| 25301 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2RegClassID], |
| 25302 | ZPR2Strided_with_zsub0_in_ZPRMul2SubClassMask, |
| 25303 | SuperRegIdxSeqs + 161, |
| 25304 | LaneBitmask(0x080001007800102F), |
| 25305 | 0, |
| 25306 | false, |
| 25307 | 0x00, /* TSFlags */ |
| 25308 | true, /* HasDisjunctSubRegs */ |
| 25309 | true, /* CoveredBySubRegs */ |
| 25310 | ZPR2Strided_with_zsub0_in_ZPRMul2Superclasses, 3, |
| 25311 | nullptr |
| 25312 | }; |
| 25313 | |
| 25314 | extern const TargetRegisterClass ZPR2_with_qsub1_in_FPR128_0to7RegClass = { |
| 25315 | &AArch64MCRegisterClasses[ZPR2_with_qsub1_in_FPR128_0to7RegClassID], |
| 25316 | ZPR2_with_qsub1_in_FPR128_0to7SubClassMask, |
| 25317 | SuperRegIdxSeqs + 149, |
| 25318 | LaneBitmask(0x080001007800102F), |
| 25319 | 0, |
| 25320 | false, |
| 25321 | 0x00, /* TSFlags */ |
| 25322 | true, /* HasDisjunctSubRegs */ |
| 25323 | true, /* CoveredBySubRegs */ |
| 25324 | ZPR2_with_qsub1_in_FPR128_0to7Superclasses, 2, |
| 25325 | nullptr |
| 25326 | }; |
| 25327 | |
| 25328 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 25329 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 25330 | ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 25331 | SuperRegIdxSeqs + 149, |
| 25332 | LaneBitmask(0x080001007800102F), |
| 25333 | 0, |
| 25334 | false, |
| 25335 | 0x00, /* TSFlags */ |
| 25336 | true, /* HasDisjunctSubRegs */ |
| 25337 | true, /* CoveredBySubRegs */ |
| 25338 | ZPR2_with_zsub0_in_ZPRMul4Superclasses, 5, |
| 25339 | nullptr |
| 25340 | }; |
| 25341 | |
| 25342 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 25343 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 25344 | ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 25345 | SuperRegIdxSeqs + 149, |
| 25346 | LaneBitmask(0x080001007800102F), |
| 25347 | 0, |
| 25348 | false, |
| 25349 | 0x00, /* TSFlags */ |
| 25350 | true, /* HasDisjunctSubRegs */ |
| 25351 | true, /* CoveredBySubRegs */ |
| 25352 | ZPR2_with_zsub0_in_ZPR_KSuperclasses, 1, |
| 25353 | nullptr |
| 25354 | }; |
| 25355 | |
| 25356 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 25357 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 25358 | ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 25359 | SuperRegIdxSeqs + 149, |
| 25360 | LaneBitmask(0x080001007800102F), |
| 25361 | 0, |
| 25362 | false, |
| 25363 | 0x00, /* TSFlags */ |
| 25364 | true, /* HasDisjunctSubRegs */ |
| 25365 | true, /* CoveredBySubRegs */ |
| 25366 | ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 2, |
| 25367 | nullptr |
| 25368 | }; |
| 25369 | |
| 25370 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 25371 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 25372 | ZPR2_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 25373 | SuperRegIdxSeqs + 149, |
| 25374 | LaneBitmask(0x080001007800102F), |
| 25375 | 0, |
| 25376 | false, |
| 25377 | 0x00, /* TSFlags */ |
| 25378 | true, /* HasDisjunctSubRegs */ |
| 25379 | true, /* CoveredBySubRegs */ |
| 25380 | ZPR2_with_zsub1_in_ZPRMul2_LoSuperclasses, 3, |
| 25381 | nullptr |
| 25382 | }; |
| 25383 | |
| 25384 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 25385 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 25386 | ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 25387 | SuperRegIdxSeqs + 149, |
| 25388 | LaneBitmask(0x080001007800102F), |
| 25389 | 0, |
| 25390 | false, |
| 25391 | 0x00, /* TSFlags */ |
| 25392 | true, /* HasDisjunctSubRegs */ |
| 25393 | true, /* CoveredBySubRegs */ |
| 25394 | ZPR2_with_zsub1_in_ZPRMul4Superclasses, 2, |
| 25395 | nullptr |
| 25396 | }; |
| 25397 | |
| 25398 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_KRegClass = { |
| 25399 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPR_KRegClassID], |
| 25400 | ZPR2_with_zsub1_in_ZPR_KSubClassMask, |
| 25401 | SuperRegIdxSeqs + 149, |
| 25402 | LaneBitmask(0x080001007800102F), |
| 25403 | 0, |
| 25404 | false, |
| 25405 | 0x00, /* TSFlags */ |
| 25406 | true, /* HasDisjunctSubRegs */ |
| 25407 | true, /* CoveredBySubRegs */ |
| 25408 | ZPR2_with_zsub1_in_ZPR_KSuperclasses, 1, |
| 25409 | nullptr |
| 25410 | }; |
| 25411 | |
| 25412 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 25413 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 25414 | ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 25415 | SuperRegIdxSeqs + 149, |
| 25416 | LaneBitmask(0x080001007800102F), |
| 25417 | 0, |
| 25418 | false, |
| 25419 | 0x00, /* TSFlags */ |
| 25420 | true, /* HasDisjunctSubRegs */ |
| 25421 | true, /* CoveredBySubRegs */ |
| 25422 | ZPR2_with_zsub_in_FPR128_0to7Superclasses, 4, |
| 25423 | nullptr |
| 25424 | }; |
| 25425 | |
| 25426 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = { |
| 25427 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID], |
| 25428 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask, |
| 25429 | SuperRegIdxSeqs + 149, |
| 25430 | LaneBitmask(0x080001007800102F), |
| 25431 | 0, |
| 25432 | false, |
| 25433 | 0x00, /* TSFlags */ |
| 25434 | true, /* HasDisjunctSubRegs */ |
| 25435 | true, /* CoveredBySubRegs */ |
| 25436 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 25437 | nullptr |
| 25438 | }; |
| 25439 | |
| 25440 | extern const TargetRegisterClass QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 25441 | &AArch64MCRegisterClasses[QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 25442 | QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 25443 | SuperRegIdxSeqs + 135, |
| 25444 | LaneBitmask(0x000001007800002F), |
| 25445 | 0, |
| 25446 | false, |
| 25447 | 0x00, /* TSFlags */ |
| 25448 | true, /* HasDisjunctSubRegs */ |
| 25449 | true, /* CoveredBySubRegs */ |
| 25450 | QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7Superclasses, 6, |
| 25451 | nullptr |
| 25452 | }; |
| 25453 | |
| 25454 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClass = { |
| 25455 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClassID], |
| 25456 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7SubClassMask, |
| 25457 | SuperRegIdxSeqs + 149, |
| 25458 | LaneBitmask(0x080001007800102F), |
| 25459 | 0, |
| 25460 | false, |
| 25461 | 0x00, /* TSFlags */ |
| 25462 | true, /* HasDisjunctSubRegs */ |
| 25463 | true, /* CoveredBySubRegs */ |
| 25464 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7Superclasses, 6, |
| 25465 | nullptr |
| 25466 | }; |
| 25467 | |
| 25468 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 25469 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 25470 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 25471 | SuperRegIdxSeqs + 149, |
| 25472 | LaneBitmask(0x080001007800102F), |
| 25473 | 0, |
| 25474 | false, |
| 25475 | 0x00, /* TSFlags */ |
| 25476 | true, /* HasDisjunctSubRegs */ |
| 25477 | true, /* CoveredBySubRegs */ |
| 25478 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoSuperclasses, 7, |
| 25479 | nullptr |
| 25480 | }; |
| 25481 | |
| 25482 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 25483 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 25484 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 25485 | SuperRegIdxSeqs + 158, |
| 25486 | LaneBitmask(0x080001007800102F), |
| 25487 | 0, |
| 25488 | false, |
| 25489 | 0x00, /* TSFlags */ |
| 25490 | true, /* HasDisjunctSubRegs */ |
| 25491 | true, /* CoveredBySubRegs */ |
| 25492 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 25493 | nullptr |
| 25494 | }; |
| 25495 | |
| 25496 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 25497 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 25498 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 25499 | SuperRegIdxSeqs + 158, |
| 25500 | LaneBitmask(0x080001007800102F), |
| 25501 | 0, |
| 25502 | false, |
| 25503 | 0x00, /* TSFlags */ |
| 25504 | true, /* HasDisjunctSubRegs */ |
| 25505 | true, /* CoveredBySubRegs */ |
| 25506 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 25507 | nullptr |
| 25508 | }; |
| 25509 | |
| 25510 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass = { |
| 25511 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID], |
| 25512 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 25513 | SuperRegIdxSeqs + 153, |
| 25514 | LaneBitmask(0x080001007800102F), |
| 25515 | 0, |
| 25516 | false, |
| 25517 | 0x00, /* TSFlags */ |
| 25518 | true, /* HasDisjunctSubRegs */ |
| 25519 | true, /* CoveredBySubRegs */ |
| 25520 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KSuperclasses, 4, |
| 25521 | nullptr |
| 25522 | }; |
| 25523 | |
| 25524 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClass = { |
| 25525 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClassID], |
| 25526 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KSubClassMask, |
| 25527 | SuperRegIdxSeqs + 149, |
| 25528 | LaneBitmask(0x080001007800102F), |
| 25529 | 0, |
| 25530 | false, |
| 25531 | 0x00, /* TSFlags */ |
| 25532 | true, /* HasDisjunctSubRegs */ |
| 25533 | true, /* CoveredBySubRegs */ |
| 25534 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KSuperclasses, 3, |
| 25535 | nullptr |
| 25536 | }; |
| 25537 | |
| 25538 | extern const TargetRegisterClass ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 25539 | &AArch64MCRegisterClasses[ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 25540 | ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 25541 | SuperRegIdxSeqs + 149, |
| 25542 | LaneBitmask(0x080001007800102F), |
| 25543 | 0, |
| 25544 | false, |
| 25545 | 0x00, /* TSFlags */ |
| 25546 | true, /* HasDisjunctSubRegs */ |
| 25547 | true, /* CoveredBySubRegs */ |
| 25548 | ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 9, |
| 25549 | nullptr |
| 25550 | }; |
| 25551 | |
| 25552 | extern const TargetRegisterClass ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 25553 | &AArch64MCRegisterClasses[ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 25554 | ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 25555 | SuperRegIdxSeqs + 149, |
| 25556 | LaneBitmask(0x080001007800102F), |
| 25557 | 0, |
| 25558 | false, |
| 25559 | 0x00, /* TSFlags */ |
| 25560 | true, /* HasDisjunctSubRegs */ |
| 25561 | true, /* CoveredBySubRegs */ |
| 25562 | ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 13, |
| 25563 | nullptr |
| 25564 | }; |
| 25565 | |
| 25566 | extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 25567 | &AArch64MCRegisterClasses[ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 25568 | ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 25569 | SuperRegIdxSeqs + 149, |
| 25570 | LaneBitmask(0x080001007800102F), |
| 25571 | 0, |
| 25572 | false, |
| 25573 | 0x00, /* TSFlags */ |
| 25574 | true, /* HasDisjunctSubRegs */ |
| 25575 | true, /* CoveredBySubRegs */ |
| 25576 | ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 11, |
| 25577 | nullptr |
| 25578 | }; |
| 25579 | |
| 25580 | extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 25581 | &AArch64MCRegisterClasses[ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 25582 | ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 25583 | SuperRegIdxSeqs + 149, |
| 25584 | LaneBitmask(0x080001007800102F), |
| 25585 | 0, |
| 25586 | false, |
| 25587 | 0x00, /* TSFlags */ |
| 25588 | true, /* HasDisjunctSubRegs */ |
| 25589 | true, /* CoveredBySubRegs */ |
| 25590 | ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 15, |
| 25591 | nullptr |
| 25592 | }; |
| 25593 | |
| 25594 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 25595 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 25596 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 25597 | SuperRegIdxSeqs + 158, |
| 25598 | LaneBitmask(0x080001007800102F), |
| 25599 | 0, |
| 25600 | false, |
| 25601 | 0x00, /* TSFlags */ |
| 25602 | true, /* HasDisjunctSubRegs */ |
| 25603 | true, /* CoveredBySubRegs */ |
| 25604 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 25605 | nullptr |
| 25606 | }; |
| 25607 | |
| 25608 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClass = { |
| 25609 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClassID], |
| 25610 | ZPR2Strided_with_zsub0_in_ZPRMul2_HiSubClassMask, |
| 25611 | SuperRegIdxSeqs + 161, |
| 25612 | LaneBitmask(0x080001007800102F), |
| 25613 | 0, |
| 25614 | false, |
| 25615 | 0x00, /* TSFlags */ |
| 25616 | true, /* HasDisjunctSubRegs */ |
| 25617 | true, /* CoveredBySubRegs */ |
| 25618 | ZPR2Strided_with_zsub0_in_ZPRMul2_HiSuperclasses, 5, |
| 25619 | nullptr |
| 25620 | }; |
| 25621 | |
| 25622 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClass = { |
| 25623 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClassID], |
| 25624 | ZPR2Strided_with_zsub0_in_ZPRMul2_LoSubClassMask, |
| 25625 | SuperRegIdxSeqs + 161, |
| 25626 | LaneBitmask(0x080001007800102F), |
| 25627 | 0, |
| 25628 | false, |
| 25629 | 0x00, /* TSFlags */ |
| 25630 | true, /* HasDisjunctSubRegs */ |
| 25631 | true, /* CoveredBySubRegs */ |
| 25632 | ZPR2Strided_with_zsub0_in_ZPRMul2_LoSuperclasses, 9, |
| 25633 | nullptr |
| 25634 | }; |
| 25635 | |
| 25636 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul4RegClass = { |
| 25637 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul4RegClassID], |
| 25638 | ZPR2Strided_with_zsub0_in_ZPRMul4SubClassMask, |
| 25639 | SuperRegIdxSeqs + 161, |
| 25640 | LaneBitmask(0x080001007800102F), |
| 25641 | 0, |
| 25642 | false, |
| 25643 | 0x00, /* TSFlags */ |
| 25644 | true, /* HasDisjunctSubRegs */ |
| 25645 | true, /* CoveredBySubRegs */ |
| 25646 | ZPR2Strided_with_zsub0_in_ZPRMul4Superclasses, 5, |
| 25647 | nullptr |
| 25648 | }; |
| 25649 | |
| 25650 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPR_KRegClass = { |
| 25651 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPR_KRegClassID], |
| 25652 | ZPR2Strided_with_zsub0_in_ZPR_KSubClassMask, |
| 25653 | SuperRegIdxSeqs + 156, |
| 25654 | LaneBitmask(0x080001007800102F), |
| 25655 | 0, |
| 25656 | false, |
| 25657 | 0x00, /* TSFlags */ |
| 25658 | true, /* HasDisjunctSubRegs */ |
| 25659 | true, /* CoveredBySubRegs */ |
| 25660 | ZPR2Strided_with_zsub0_in_ZPR_KSuperclasses, 3, |
| 25661 | nullptr |
| 25662 | }; |
| 25663 | |
| 25664 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = { |
| 25665 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID], |
| 25666 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask, |
| 25667 | SuperRegIdxSeqs + 149, |
| 25668 | LaneBitmask(0x080001007800102F), |
| 25669 | 0, |
| 25670 | false, |
| 25671 | 0x00, /* TSFlags */ |
| 25672 | true, /* HasDisjunctSubRegs */ |
| 25673 | true, /* CoveredBySubRegs */ |
| 25674 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 25675 | nullptr |
| 25676 | }; |
| 25677 | |
| 25678 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 25679 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 25680 | ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 25681 | SuperRegIdxSeqs + 149, |
| 25682 | LaneBitmask(0x080001007800102F), |
| 25683 | 0, |
| 25684 | false, |
| 25685 | 0x00, /* TSFlags */ |
| 25686 | true, /* HasDisjunctSubRegs */ |
| 25687 | true, /* CoveredBySubRegs */ |
| 25688 | ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 25689 | nullptr |
| 25690 | }; |
| 25691 | |
| 25692 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 25693 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 25694 | ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 25695 | SuperRegIdxSeqs + 149, |
| 25696 | LaneBitmask(0x080001007800102F), |
| 25697 | 0, |
| 25698 | false, |
| 25699 | 0x00, /* TSFlags */ |
| 25700 | true, /* HasDisjunctSubRegs */ |
| 25701 | true, /* CoveredBySubRegs */ |
| 25702 | ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 25703 | nullptr |
| 25704 | }; |
| 25705 | |
| 25706 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 25707 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 25708 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 25709 | SuperRegIdxSeqs + 149, |
| 25710 | LaneBitmask(0x080001007800102F), |
| 25711 | 0, |
| 25712 | false, |
| 25713 | 0x00, /* TSFlags */ |
| 25714 | true, /* HasDisjunctSubRegs */ |
| 25715 | true, /* CoveredBySubRegs */ |
| 25716 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 25717 | nullptr |
| 25718 | }; |
| 25719 | |
| 25720 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass = { |
| 25721 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID], |
| 25722 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 25723 | SuperRegIdxSeqs + 149, |
| 25724 | LaneBitmask(0x080001007800102F), |
| 25725 | 0, |
| 25726 | false, |
| 25727 | 0x00, /* TSFlags */ |
| 25728 | true, /* HasDisjunctSubRegs */ |
| 25729 | true, /* CoveredBySubRegs */ |
| 25730 | ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSuperclasses, 4, |
| 25731 | nullptr |
| 25732 | }; |
| 25733 | |
| 25734 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = { |
| 25735 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID], |
| 25736 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask, |
| 25737 | SuperRegIdxSeqs + 149, |
| 25738 | LaneBitmask(0x080001007800102F), |
| 25739 | 0, |
| 25740 | false, |
| 25741 | 0x00, /* TSFlags */ |
| 25742 | true, /* HasDisjunctSubRegs */ |
| 25743 | true, /* CoveredBySubRegs */ |
| 25744 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses, 9, |
| 25745 | nullptr |
| 25746 | }; |
| 25747 | |
| 25748 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 25749 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 25750 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 25751 | SuperRegIdxSeqs + 149, |
| 25752 | LaneBitmask(0x080001007800102F), |
| 25753 | 0, |
| 25754 | false, |
| 25755 | 0x00, /* TSFlags */ |
| 25756 | true, /* HasDisjunctSubRegs */ |
| 25757 | true, /* CoveredBySubRegs */ |
| 25758 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 25759 | nullptr |
| 25760 | }; |
| 25761 | |
| 25762 | extern const TargetRegisterClass ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = { |
| 25763 | &AArch64MCRegisterClasses[ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID], |
| 25764 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 25765 | SuperRegIdxSeqs + 153, |
| 25766 | LaneBitmask(0x080001007800102F), |
| 25767 | 0, |
| 25768 | false, |
| 25769 | 0x00, /* TSFlags */ |
| 25770 | true, /* HasDisjunctSubRegs */ |
| 25771 | true, /* CoveredBySubRegs */ |
| 25772 | ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses, 7, |
| 25773 | nullptr |
| 25774 | }; |
| 25775 | |
| 25776 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 25777 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 25778 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 25779 | SuperRegIdxSeqs + 149, |
| 25780 | LaneBitmask(0x080001007800102F), |
| 25781 | 0, |
| 25782 | false, |
| 25783 | 0x00, /* TSFlags */ |
| 25784 | true, /* HasDisjunctSubRegs */ |
| 25785 | true, /* CoveredBySubRegs */ |
| 25786 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 5, |
| 25787 | nullptr |
| 25788 | }; |
| 25789 | |
| 25790 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 25791 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 25792 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 25793 | SuperRegIdxSeqs + 149, |
| 25794 | LaneBitmask(0x080001007800102F), |
| 25795 | 0, |
| 25796 | false, |
| 25797 | 0x00, /* TSFlags */ |
| 25798 | true, /* HasDisjunctSubRegs */ |
| 25799 | true, /* CoveredBySubRegs */ |
| 25800 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bSuperclasses, 13, |
| 25801 | nullptr |
| 25802 | }; |
| 25803 | |
| 25804 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 25805 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 25806 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 25807 | SuperRegIdxSeqs + 149, |
| 25808 | LaneBitmask(0x080001007800102F), |
| 25809 | 0, |
| 25810 | false, |
| 25811 | 0x00, /* TSFlags */ |
| 25812 | true, /* HasDisjunctSubRegs */ |
| 25813 | true, /* CoveredBySubRegs */ |
| 25814 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 11, |
| 25815 | nullptr |
| 25816 | }; |
| 25817 | |
| 25818 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 25819 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 25820 | ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 25821 | SuperRegIdxSeqs + 161, |
| 25822 | LaneBitmask(0x080001007800102F), |
| 25823 | 0, |
| 25824 | false, |
| 25825 | 0x00, /* TSFlags */ |
| 25826 | true, /* HasDisjunctSubRegs */ |
| 25827 | true, /* CoveredBySubRegs */ |
| 25828 | ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 9, |
| 25829 | nullptr |
| 25830 | }; |
| 25831 | |
| 25832 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 25833 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 25834 | ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 25835 | SuperRegIdxSeqs + 161, |
| 25836 | LaneBitmask(0x080001007800102F), |
| 25837 | 0, |
| 25838 | false, |
| 25839 | 0x00, /* TSFlags */ |
| 25840 | true, /* HasDisjunctSubRegs */ |
| 25841 | true, /* CoveredBySubRegs */ |
| 25842 | ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 14, |
| 25843 | nullptr |
| 25844 | }; |
| 25845 | |
| 25846 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass = { |
| 25847 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClassID], |
| 25848 | ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 25849 | SuperRegIdxSeqs + 156, |
| 25850 | LaneBitmask(0x080001007800102F), |
| 25851 | 0, |
| 25852 | false, |
| 25853 | 0x00, /* TSFlags */ |
| 25854 | true, /* HasDisjunctSubRegs */ |
| 25855 | true, /* CoveredBySubRegs */ |
| 25856 | ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KSuperclasses, 9, |
| 25857 | nullptr |
| 25858 | }; |
| 25859 | |
| 25860 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 25861 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 25862 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 25863 | SuperRegIdxSeqs + 149, |
| 25864 | LaneBitmask(0x080001007800102F), |
| 25865 | 0, |
| 25866 | false, |
| 25867 | 0x00, /* TSFlags */ |
| 25868 | true, /* HasDisjunctSubRegs */ |
| 25869 | true, /* CoveredBySubRegs */ |
| 25870 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses, 21, |
| 25871 | nullptr |
| 25872 | }; |
| 25873 | |
| 25874 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = { |
| 25875 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID], |
| 25876 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 25877 | SuperRegIdxSeqs + 149, |
| 25878 | LaneBitmask(0x080001007800102F), |
| 25879 | 0, |
| 25880 | false, |
| 25881 | 0x00, /* TSFlags */ |
| 25882 | true, /* HasDisjunctSubRegs */ |
| 25883 | true, /* CoveredBySubRegs */ |
| 25884 | ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses, 17, |
| 25885 | nullptr |
| 25886 | }; |
| 25887 | |
| 25888 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass = { |
| 25889 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClassID], |
| 25890 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 25891 | SuperRegIdxSeqs + 149, |
| 25892 | LaneBitmask(0x080001007800102F), |
| 25893 | 0, |
| 25894 | false, |
| 25895 | 0x00, /* TSFlags */ |
| 25896 | true, /* HasDisjunctSubRegs */ |
| 25897 | true, /* CoveredBySubRegs */ |
| 25898 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KSuperclasses, 9, |
| 25899 | nullptr |
| 25900 | }; |
| 25901 | |
| 25902 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 25903 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 25904 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 25905 | SuperRegIdxSeqs + 149, |
| 25906 | LaneBitmask(0x080001007800102F), |
| 25907 | 0, |
| 25908 | false, |
| 25909 | 0x00, /* TSFlags */ |
| 25910 | true, /* HasDisjunctSubRegs */ |
| 25911 | true, /* CoveredBySubRegs */ |
| 25912 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 25913 | nullptr |
| 25914 | }; |
| 25915 | |
| 25916 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 25917 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 25918 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 25919 | SuperRegIdxSeqs + 149, |
| 25920 | LaneBitmask(0x080001007800102F), |
| 25921 | 0, |
| 25922 | false, |
| 25923 | 0x00, /* TSFlags */ |
| 25924 | true, /* HasDisjunctSubRegs */ |
| 25925 | true, /* CoveredBySubRegs */ |
| 25926 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 25927 | nullptr |
| 25928 | }; |
| 25929 | |
| 25930 | extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = { |
| 25931 | &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID], |
| 25932 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 25933 | SuperRegIdxSeqs + 149, |
| 25934 | LaneBitmask(0x080001007800102F), |
| 25935 | 0, |
| 25936 | false, |
| 25937 | 0x00, /* TSFlags */ |
| 25938 | true, /* HasDisjunctSubRegs */ |
| 25939 | true, /* CoveredBySubRegs */ |
| 25940 | ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses, 7, |
| 25941 | nullptr |
| 25942 | }; |
| 25943 | |
| 25944 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 25945 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 25946 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 25947 | SuperRegIdxSeqs + 149, |
| 25948 | LaneBitmask(0x080001007800102F), |
| 25949 | 0, |
| 25950 | false, |
| 25951 | 0x00, /* TSFlags */ |
| 25952 | true, /* HasDisjunctSubRegs */ |
| 25953 | true, /* CoveredBySubRegs */ |
| 25954 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses, 14, |
| 25955 | nullptr |
| 25956 | }; |
| 25957 | |
| 25958 | extern const TargetRegisterClass ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = { |
| 25959 | &AArch64MCRegisterClasses[ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID], |
| 25960 | ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 25961 | SuperRegIdxSeqs + 156, |
| 25962 | LaneBitmask(0x080001007800102F), |
| 25963 | 0, |
| 25964 | false, |
| 25965 | 0x00, /* TSFlags */ |
| 25966 | true, /* HasDisjunctSubRegs */ |
| 25967 | true, /* CoveredBySubRegs */ |
| 25968 | ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses, 15, |
| 25969 | nullptr |
| 25970 | }; |
| 25971 | |
| 25972 | extern const TargetRegisterClass ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 25973 | &AArch64MCRegisterClasses[ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 25974 | ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 25975 | SuperRegIdxSeqs + 149, |
| 25976 | LaneBitmask(0x080001007800102F), |
| 25977 | 0, |
| 25978 | false, |
| 25979 | 0x00, /* TSFlags */ |
| 25980 | true, /* HasDisjunctSubRegs */ |
| 25981 | true, /* CoveredBySubRegs */ |
| 25982 | ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 12, |
| 25983 | nullptr |
| 25984 | }; |
| 25985 | |
| 25986 | extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 25987 | &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 25988 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 25989 | SuperRegIdxSeqs + 149, |
| 25990 | LaneBitmask(0x080001007800102F), |
| 25991 | 0, |
| 25992 | false, |
| 25993 | 0x00, /* TSFlags */ |
| 25994 | true, /* HasDisjunctSubRegs */ |
| 25995 | true, /* CoveredBySubRegs */ |
| 25996 | ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 9, |
| 25997 | nullptr |
| 25998 | }; |
| 25999 | |
| 26000 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 26001 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 26002 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 26003 | SuperRegIdxSeqs + 149, |
| 26004 | LaneBitmask(0x080001007800102F), |
| 26005 | 0, |
| 26006 | false, |
| 26007 | 0x00, /* TSFlags */ |
| 26008 | true, /* HasDisjunctSubRegs */ |
| 26009 | true, /* CoveredBySubRegs */ |
| 26010 | ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 20, |
| 26011 | nullptr |
| 26012 | }; |
| 26013 | |
| 26014 | extern const TargetRegisterClass ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 26015 | &AArch64MCRegisterClasses[ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 26016 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 26017 | SuperRegIdxSeqs + 149, |
| 26018 | LaneBitmask(0x080001007800102F), |
| 26019 | 0, |
| 26020 | false, |
| 26021 | 0x00, /* TSFlags */ |
| 26022 | true, /* HasDisjunctSubRegs */ |
| 26023 | true, /* CoveredBySubRegs */ |
| 26024 | ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 8, |
| 26025 | nullptr |
| 26026 | }; |
| 26027 | |
| 26028 | extern const TargetRegisterClass MPR64RegClass = { |
| 26029 | &AArch64MCRegisterClasses[MPR64RegClassID], |
| 26030 | MPR64SubClassMask, |
| 26031 | SuperRegIdxSeqs + 52, |
| 26032 | LaneBitmask(0x0000000000000C00), |
| 26033 | 0, |
| 26034 | false, |
| 26035 | 0x00, /* TSFlags */ |
| 26036 | true, /* HasDisjunctSubRegs */ |
| 26037 | false, /* CoveredBySubRegs */ |
| 26038 | nullptr, 0, |
| 26039 | nullptr |
| 26040 | }; |
| 26041 | |
| 26042 | extern const TargetRegisterClass QQQRegClass = { |
| 26043 | &AArch64MCRegisterClasses[QQQRegClassID], |
| 26044 | QQQSubClassMask, |
| 26045 | SuperRegIdxSeqs + 142, |
| 26046 | LaneBitmask(0x000005787800002F), |
| 26047 | 0, |
| 26048 | false, |
| 26049 | 0x00, /* TSFlags */ |
| 26050 | true, /* HasDisjunctSubRegs */ |
| 26051 | true, /* CoveredBySubRegs */ |
| 26052 | nullptr, 0, |
| 26053 | nullptr |
| 26054 | }; |
| 26055 | |
| 26056 | extern const TargetRegisterClass ZPR3RegClass = { |
| 26057 | &AArch64MCRegisterClasses[ZPR3RegClassID], |
| 26058 | ZPR3SubClassMask, |
| 26059 | SuperRegIdxSeqs + 146, |
| 26060 | LaneBitmask(0x280005787800102F), |
| 26061 | 0, |
| 26062 | false, |
| 26063 | 0x00, /* TSFlags */ |
| 26064 | true, /* HasDisjunctSubRegs */ |
| 26065 | true, /* CoveredBySubRegs */ |
| 26066 | nullptr, 0, |
| 26067 | nullptr |
| 26068 | }; |
| 26069 | |
| 26070 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_loRegClass = { |
| 26071 | &AArch64MCRegisterClasses[QQQ_with_dsub1_in_FPR64_loRegClassID], |
| 26072 | QQQ_with_dsub1_in_FPR64_loSubClassMask, |
| 26073 | SuperRegIdxSeqs + 142, |
| 26074 | LaneBitmask(0x000005787800002F), |
| 26075 | 0, |
| 26076 | false, |
| 26077 | 0x00, /* TSFlags */ |
| 26078 | true, /* HasDisjunctSubRegs */ |
| 26079 | true, /* CoveredBySubRegs */ |
| 26080 | QQQ_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 26081 | nullptr |
| 26082 | }; |
| 26083 | |
| 26084 | extern const TargetRegisterClass QQQ_with_dsub2_in_FPR64_loRegClass = { |
| 26085 | &AArch64MCRegisterClasses[QQQ_with_dsub2_in_FPR64_loRegClassID], |
| 26086 | QQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 26087 | SuperRegIdxSeqs + 142, |
| 26088 | LaneBitmask(0x000005787800002F), |
| 26089 | 0, |
| 26090 | false, |
| 26091 | 0x00, /* TSFlags */ |
| 26092 | true, /* HasDisjunctSubRegs */ |
| 26093 | true, /* CoveredBySubRegs */ |
| 26094 | QQQ_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 26095 | nullptr |
| 26096 | }; |
| 26097 | |
| 26098 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_loRegClass = { |
| 26099 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_loRegClassID], |
| 26100 | QQQ_with_qsub0_in_FPR128_loSubClassMask, |
| 26101 | SuperRegIdxSeqs + 142, |
| 26102 | LaneBitmask(0x000005787800002F), |
| 26103 | 0, |
| 26104 | false, |
| 26105 | 0x00, /* TSFlags */ |
| 26106 | true, /* HasDisjunctSubRegs */ |
| 26107 | true, /* CoveredBySubRegs */ |
| 26108 | QQQ_with_qsub0_in_FPR128_loSuperclasses, 1, |
| 26109 | nullptr |
| 26110 | }; |
| 26111 | |
| 26112 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_loRegClass = { |
| 26113 | &AArch64MCRegisterClasses[ZPR3_with_dsub1_in_FPR64_loRegClassID], |
| 26114 | ZPR3_with_dsub1_in_FPR64_loSubClassMask, |
| 26115 | SuperRegIdxSeqs + 146, |
| 26116 | LaneBitmask(0x280005787800102F), |
| 26117 | 0, |
| 26118 | false, |
| 26119 | 0x00, /* TSFlags */ |
| 26120 | true, /* HasDisjunctSubRegs */ |
| 26121 | true, /* CoveredBySubRegs */ |
| 26122 | ZPR3_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 26123 | nullptr |
| 26124 | }; |
| 26125 | |
| 26126 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_loRegClass = { |
| 26127 | &AArch64MCRegisterClasses[ZPR3_with_dsub2_in_FPR64_loRegClassID], |
| 26128 | ZPR3_with_dsub2_in_FPR64_loSubClassMask, |
| 26129 | SuperRegIdxSeqs + 146, |
| 26130 | LaneBitmask(0x280005787800102F), |
| 26131 | 0, |
| 26132 | false, |
| 26133 | 0x00, /* TSFlags */ |
| 26134 | true, /* HasDisjunctSubRegs */ |
| 26135 | true, /* CoveredBySubRegs */ |
| 26136 | ZPR3_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 26137 | nullptr |
| 26138 | }; |
| 26139 | |
| 26140 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { |
| 26141 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], |
| 26142 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, |
| 26143 | SuperRegIdxSeqs + 146, |
| 26144 | LaneBitmask(0x280005787800102F), |
| 26145 | 0, |
| 26146 | false, |
| 26147 | 0x00, /* TSFlags */ |
| 26148 | true, /* HasDisjunctSubRegs */ |
| 26149 | true, /* CoveredBySubRegs */ |
| 26150 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, 1, |
| 26151 | nullptr |
| 26152 | }; |
| 26153 | |
| 26154 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2RegClass = { |
| 26155 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul2RegClassID], |
| 26156 | ZPR3_with_zsub1_in_ZPRMul2SubClassMask, |
| 26157 | SuperRegIdxSeqs + 146, |
| 26158 | LaneBitmask(0x280005787800102F), |
| 26159 | 0, |
| 26160 | false, |
| 26161 | 0x00, /* TSFlags */ |
| 26162 | true, /* HasDisjunctSubRegs */ |
| 26163 | true, /* CoveredBySubRegs */ |
| 26164 | ZPR3_with_zsub1_in_ZPRMul2Superclasses, 1, |
| 26165 | nullptr |
| 26166 | }; |
| 26167 | |
| 26168 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_loRegClass = { |
| 26169 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_loRegClassID], |
| 26170 | ZPR3_with_zsub_in_FPR128_loSubClassMask, |
| 26171 | SuperRegIdxSeqs + 146, |
| 26172 | LaneBitmask(0x280005787800102F), |
| 26173 | 0, |
| 26174 | false, |
| 26175 | 0x00, /* TSFlags */ |
| 26176 | true, /* HasDisjunctSubRegs */ |
| 26177 | true, /* CoveredBySubRegs */ |
| 26178 | ZPR3_with_zsub_in_FPR128_loSuperclasses, 1, |
| 26179 | nullptr |
| 26180 | }; |
| 26181 | |
| 26182 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass = { |
| 26183 | &AArch64MCRegisterClasses[QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID], |
| 26184 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 26185 | SuperRegIdxSeqs + 142, |
| 26186 | LaneBitmask(0x000005787800002F), |
| 26187 | 0, |
| 26188 | false, |
| 26189 | 0x00, /* TSFlags */ |
| 26190 | true, /* HasDisjunctSubRegs */ |
| 26191 | true, /* CoveredBySubRegs */ |
| 26192 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 26193 | nullptr |
| 26194 | }; |
| 26195 | |
| 26196 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClass = { |
| 26197 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClassID], |
| 26198 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loSubClassMask, |
| 26199 | SuperRegIdxSeqs + 142, |
| 26200 | LaneBitmask(0x000005787800002F), |
| 26201 | 0, |
| 26202 | false, |
| 26203 | 0x00, /* TSFlags */ |
| 26204 | true, /* HasDisjunctSubRegs */ |
| 26205 | true, /* CoveredBySubRegs */ |
| 26206 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 26207 | nullptr |
| 26208 | }; |
| 26209 | |
| 26210 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass = { |
| 26211 | &AArch64MCRegisterClasses[ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID], |
| 26212 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loSubClassMask, |
| 26213 | SuperRegIdxSeqs + 146, |
| 26214 | LaneBitmask(0x280005787800102F), |
| 26215 | 0, |
| 26216 | false, |
| 26217 | 0x00, /* TSFlags */ |
| 26218 | true, /* HasDisjunctSubRegs */ |
| 26219 | true, /* CoveredBySubRegs */ |
| 26220 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 26221 | nullptr |
| 26222 | }; |
| 26223 | |
| 26224 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClass = { |
| 26225 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClassID], |
| 26226 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loSubClassMask, |
| 26227 | SuperRegIdxSeqs + 146, |
| 26228 | LaneBitmask(0x280005787800102F), |
| 26229 | 0, |
| 26230 | false, |
| 26231 | 0x00, /* TSFlags */ |
| 26232 | true, /* HasDisjunctSubRegs */ |
| 26233 | true, /* CoveredBySubRegs */ |
| 26234 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 26235 | nullptr |
| 26236 | }; |
| 26237 | |
| 26238 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass = { |
| 26239 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClassID], |
| 26240 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 26241 | SuperRegIdxSeqs + 142, |
| 26242 | LaneBitmask(0x000005787800002F), |
| 26243 | 0, |
| 26244 | false, |
| 26245 | 0x00, /* TSFlags */ |
| 26246 | true, /* HasDisjunctSubRegs */ |
| 26247 | true, /* CoveredBySubRegs */ |
| 26248 | QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 26249 | nullptr |
| 26250 | }; |
| 26251 | |
| 26252 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass = { |
| 26253 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClassID], |
| 26254 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loSubClassMask, |
| 26255 | SuperRegIdxSeqs + 146, |
| 26256 | LaneBitmask(0x280005787800102F), |
| 26257 | 0, |
| 26258 | false, |
| 26259 | 0x00, /* TSFlags */ |
| 26260 | true, /* HasDisjunctSubRegs */ |
| 26261 | true, /* CoveredBySubRegs */ |
| 26262 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 26263 | nullptr |
| 26264 | }; |
| 26265 | |
| 26266 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7RegClass = { |
| 26267 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_0to7RegClassID], |
| 26268 | QQQ_with_qsub0_in_FPR128_0to7SubClassMask, |
| 26269 | SuperRegIdxSeqs + 142, |
| 26270 | LaneBitmask(0x000005787800002F), |
| 26271 | 0, |
| 26272 | false, |
| 26273 | 0x00, /* TSFlags */ |
| 26274 | true, /* HasDisjunctSubRegs */ |
| 26275 | true, /* CoveredBySubRegs */ |
| 26276 | QQQ_with_qsub0_in_FPR128_0to7Superclasses, 7, |
| 26277 | nullptr |
| 26278 | }; |
| 26279 | |
| 26280 | extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 26281 | &AArch64MCRegisterClasses[QQQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 26282 | QQQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 26283 | SuperRegIdxSeqs + 142, |
| 26284 | LaneBitmask(0x000005787800002F), |
| 26285 | 0, |
| 26286 | false, |
| 26287 | 0x00, /* TSFlags */ |
| 26288 | true, /* HasDisjunctSubRegs */ |
| 26289 | true, /* CoveredBySubRegs */ |
| 26290 | QQQ_with_qsub1_in_FPR128_0to7Superclasses, 4, |
| 26291 | nullptr |
| 26292 | }; |
| 26293 | |
| 26294 | extern const TargetRegisterClass QQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 26295 | &AArch64MCRegisterClasses[QQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 26296 | QQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26297 | SuperRegIdxSeqs + 142, |
| 26298 | LaneBitmask(0x000005787800002F), |
| 26299 | 0, |
| 26300 | false, |
| 26301 | 0x00, /* TSFlags */ |
| 26302 | true, /* HasDisjunctSubRegs */ |
| 26303 | true, /* CoveredBySubRegs */ |
| 26304 | QQQ_with_qsub2_in_FPR128_0to7Superclasses, 2, |
| 26305 | nullptr |
| 26306 | }; |
| 26307 | |
| 26308 | extern const TargetRegisterClass ZPR3_with_qsub1_in_FPR128_0to7RegClass = { |
| 26309 | &AArch64MCRegisterClasses[ZPR3_with_qsub1_in_FPR128_0to7RegClassID], |
| 26310 | ZPR3_with_qsub1_in_FPR128_0to7SubClassMask, |
| 26311 | SuperRegIdxSeqs + 146, |
| 26312 | LaneBitmask(0x280005787800102F), |
| 26313 | 0, |
| 26314 | false, |
| 26315 | 0x00, /* TSFlags */ |
| 26316 | true, /* HasDisjunctSubRegs */ |
| 26317 | true, /* CoveredBySubRegs */ |
| 26318 | ZPR3_with_qsub1_in_FPR128_0to7Superclasses, 4, |
| 26319 | nullptr |
| 26320 | }; |
| 26321 | |
| 26322 | extern const TargetRegisterClass ZPR3_with_qsub2_in_FPR128_0to7RegClass = { |
| 26323 | &AArch64MCRegisterClasses[ZPR3_with_qsub2_in_FPR128_0to7RegClassID], |
| 26324 | ZPR3_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26325 | SuperRegIdxSeqs + 146, |
| 26326 | LaneBitmask(0x280005787800102F), |
| 26327 | 0, |
| 26328 | false, |
| 26329 | 0x00, /* TSFlags */ |
| 26330 | true, /* HasDisjunctSubRegs */ |
| 26331 | true, /* CoveredBySubRegs */ |
| 26332 | ZPR3_with_qsub2_in_FPR128_0to7Superclasses, 2, |
| 26333 | nullptr |
| 26334 | }; |
| 26335 | |
| 26336 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4RegClass = { |
| 26337 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPRMul4RegClassID], |
| 26338 | ZPR3_with_zsub0_in_ZPRMul4SubClassMask, |
| 26339 | SuperRegIdxSeqs + 146, |
| 26340 | LaneBitmask(0x280005787800102F), |
| 26341 | 0, |
| 26342 | false, |
| 26343 | 0x00, /* TSFlags */ |
| 26344 | true, /* HasDisjunctSubRegs */ |
| 26345 | true, /* CoveredBySubRegs */ |
| 26346 | ZPR3_with_zsub0_in_ZPRMul4Superclasses, 2, |
| 26347 | nullptr |
| 26348 | }; |
| 26349 | |
| 26350 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_KRegClass = { |
| 26351 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_KRegClassID], |
| 26352 | ZPR3_with_zsub0_in_ZPR_KSubClassMask, |
| 26353 | SuperRegIdxSeqs + 146, |
| 26354 | LaneBitmask(0x280005787800102F), |
| 26355 | 0, |
| 26356 | false, |
| 26357 | 0x00, /* TSFlags */ |
| 26358 | true, /* HasDisjunctSubRegs */ |
| 26359 | true, /* CoveredBySubRegs */ |
| 26360 | ZPR3_with_zsub0_in_ZPR_KSuperclasses, 1, |
| 26361 | nullptr |
| 26362 | }; |
| 26363 | |
| 26364 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = { |
| 26365 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID], |
| 26366 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask, |
| 26367 | SuperRegIdxSeqs + 146, |
| 26368 | LaneBitmask(0x280005787800102F), |
| 26369 | 0, |
| 26370 | false, |
| 26371 | 0x00, /* TSFlags */ |
| 26372 | true, /* HasDisjunctSubRegs */ |
| 26373 | true, /* CoveredBySubRegs */ |
| 26374 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses, 2, |
| 26375 | nullptr |
| 26376 | }; |
| 26377 | |
| 26378 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass = { |
| 26379 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID], |
| 26380 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoSubClassMask, |
| 26381 | SuperRegIdxSeqs + 146, |
| 26382 | LaneBitmask(0x280005787800102F), |
| 26383 | 0, |
| 26384 | false, |
| 26385 | 0x00, /* TSFlags */ |
| 26386 | true, /* HasDisjunctSubRegs */ |
| 26387 | true, /* CoveredBySubRegs */ |
| 26388 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoSuperclasses, 5, |
| 26389 | nullptr |
| 26390 | }; |
| 26391 | |
| 26392 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 26393 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 26394 | ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 26395 | SuperRegIdxSeqs + 146, |
| 26396 | LaneBitmask(0x280005787800102F), |
| 26397 | 0, |
| 26398 | false, |
| 26399 | 0x00, /* TSFlags */ |
| 26400 | true, /* HasDisjunctSubRegs */ |
| 26401 | true, /* CoveredBySubRegs */ |
| 26402 | ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses, 2, |
| 26403 | nullptr |
| 26404 | }; |
| 26405 | |
| 26406 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 26407 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 26408 | ZPR3_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 26409 | SuperRegIdxSeqs + 146, |
| 26410 | LaneBitmask(0x280005787800102F), |
| 26411 | 0, |
| 26412 | false, |
| 26413 | 0x00, /* TSFlags */ |
| 26414 | true, /* HasDisjunctSubRegs */ |
| 26415 | true, /* CoveredBySubRegs */ |
| 26416 | ZPR3_with_zsub1_in_ZPRMul2_LoSuperclasses, 5, |
| 26417 | nullptr |
| 26418 | }; |
| 26419 | |
| 26420 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4RegClass = { |
| 26421 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul4RegClassID], |
| 26422 | ZPR3_with_zsub1_in_ZPRMul4SubClassMask, |
| 26423 | SuperRegIdxSeqs + 146, |
| 26424 | LaneBitmask(0x280005787800102F), |
| 26425 | 0, |
| 26426 | false, |
| 26427 | 0x00, /* TSFlags */ |
| 26428 | true, /* HasDisjunctSubRegs */ |
| 26429 | true, /* CoveredBySubRegs */ |
| 26430 | ZPR3_with_zsub1_in_ZPRMul4Superclasses, 2, |
| 26431 | nullptr |
| 26432 | }; |
| 26433 | |
| 26434 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_KRegClass = { |
| 26435 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_KRegClassID], |
| 26436 | ZPR3_with_zsub1_in_ZPR_KSubClassMask, |
| 26437 | SuperRegIdxSeqs + 146, |
| 26438 | LaneBitmask(0x280005787800102F), |
| 26439 | 0, |
| 26440 | false, |
| 26441 | 0x00, /* TSFlags */ |
| 26442 | true, /* HasDisjunctSubRegs */ |
| 26443 | true, /* CoveredBySubRegs */ |
| 26444 | ZPR3_with_zsub1_in_ZPR_KSuperclasses, 1, |
| 26445 | nullptr |
| 26446 | }; |
| 26447 | |
| 26448 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 26449 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 26450 | ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 26451 | SuperRegIdxSeqs + 146, |
| 26452 | LaneBitmask(0x280005787800102F), |
| 26453 | 0, |
| 26454 | false, |
| 26455 | 0x00, /* TSFlags */ |
| 26456 | true, /* HasDisjunctSubRegs */ |
| 26457 | true, /* CoveredBySubRegs */ |
| 26458 | ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses, 2, |
| 26459 | nullptr |
| 26460 | }; |
| 26461 | |
| 26462 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_LoRegClass = { |
| 26463 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID], |
| 26464 | ZPR3_with_zsub2_in_ZPRMul2_LoSubClassMask, |
| 26465 | SuperRegIdxSeqs + 146, |
| 26466 | LaneBitmask(0x280005787800102F), |
| 26467 | 0, |
| 26468 | false, |
| 26469 | 0x00, /* TSFlags */ |
| 26470 | true, /* HasDisjunctSubRegs */ |
| 26471 | true, /* CoveredBySubRegs */ |
| 26472 | ZPR3_with_zsub2_in_ZPRMul2_LoSuperclasses, 3, |
| 26473 | nullptr |
| 26474 | }; |
| 26475 | |
| 26476 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 26477 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 26478 | ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 26479 | SuperRegIdxSeqs + 146, |
| 26480 | LaneBitmask(0x280005787800102F), |
| 26481 | 0, |
| 26482 | false, |
| 26483 | 0x00, /* TSFlags */ |
| 26484 | true, /* HasDisjunctSubRegs */ |
| 26485 | true, /* CoveredBySubRegs */ |
| 26486 | ZPR3_with_zsub2_in_ZPRMul4Superclasses, 2, |
| 26487 | nullptr |
| 26488 | }; |
| 26489 | |
| 26490 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_KRegClass = { |
| 26491 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_KRegClassID], |
| 26492 | ZPR3_with_zsub2_in_ZPR_KSubClassMask, |
| 26493 | SuperRegIdxSeqs + 146, |
| 26494 | LaneBitmask(0x280005787800102F), |
| 26495 | 0, |
| 26496 | false, |
| 26497 | 0x00, /* TSFlags */ |
| 26498 | true, /* HasDisjunctSubRegs */ |
| 26499 | true, /* CoveredBySubRegs */ |
| 26500 | ZPR3_with_zsub2_in_ZPR_KSuperclasses, 1, |
| 26501 | nullptr |
| 26502 | }; |
| 26503 | |
| 26504 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7RegClass = { |
| 26505 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7RegClassID], |
| 26506 | ZPR3_with_zsub_in_FPR128_0to7SubClassMask, |
| 26507 | SuperRegIdxSeqs + 146, |
| 26508 | LaneBitmask(0x280005787800102F), |
| 26509 | 0, |
| 26510 | false, |
| 26511 | 0x00, /* TSFlags */ |
| 26512 | true, /* HasDisjunctSubRegs */ |
| 26513 | true, /* CoveredBySubRegs */ |
| 26514 | ZPR3_with_zsub_in_FPR128_0to7Superclasses, 7, |
| 26515 | nullptr |
| 26516 | }; |
| 26517 | |
| 26518 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = { |
| 26519 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID], |
| 26520 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask, |
| 26521 | SuperRegIdxSeqs + 146, |
| 26522 | LaneBitmask(0x280005787800102F), |
| 26523 | 0, |
| 26524 | false, |
| 26525 | 0x00, /* TSFlags */ |
| 26526 | true, /* HasDisjunctSubRegs */ |
| 26527 | true, /* CoveredBySubRegs */ |
| 26528 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 26529 | nullptr |
| 26530 | }; |
| 26531 | |
| 26532 | extern const TargetRegisterClass QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 26533 | &AArch64MCRegisterClasses[QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 26534 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26535 | SuperRegIdxSeqs + 142, |
| 26536 | LaneBitmask(0x000005787800002F), |
| 26537 | 0, |
| 26538 | false, |
| 26539 | 0x00, /* TSFlags */ |
| 26540 | true, /* HasDisjunctSubRegs */ |
| 26541 | true, /* CoveredBySubRegs */ |
| 26542 | QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7Superclasses, 6, |
| 26543 | nullptr |
| 26544 | }; |
| 26545 | |
| 26546 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 26547 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 26548 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 26549 | SuperRegIdxSeqs + 142, |
| 26550 | LaneBitmask(0x000005787800002F), |
| 26551 | 0, |
| 26552 | false, |
| 26553 | 0x00, /* TSFlags */ |
| 26554 | true, /* HasDisjunctSubRegs */ |
| 26555 | true, /* CoveredBySubRegs */ |
| 26556 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7Superclasses, 9, |
| 26557 | nullptr |
| 26558 | }; |
| 26559 | |
| 26560 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = { |
| 26561 | &AArch64MCRegisterClasses[ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID], |
| 26562 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26563 | SuperRegIdxSeqs + 146, |
| 26564 | LaneBitmask(0x280005787800102F), |
| 26565 | 0, |
| 26566 | false, |
| 26567 | 0x00, /* TSFlags */ |
| 26568 | true, /* HasDisjunctSubRegs */ |
| 26569 | true, /* CoveredBySubRegs */ |
| 26570 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7Superclasses, 6, |
| 26571 | nullptr |
| 26572 | }; |
| 26573 | |
| 26574 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 26575 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 26576 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 26577 | SuperRegIdxSeqs + 146, |
| 26578 | LaneBitmask(0x280005787800102F), |
| 26579 | 0, |
| 26580 | false, |
| 26581 | 0x00, /* TSFlags */ |
| 26582 | true, /* HasDisjunctSubRegs */ |
| 26583 | true, /* CoveredBySubRegs */ |
| 26584 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses, 4, |
| 26585 | nullptr |
| 26586 | }; |
| 26587 | |
| 26588 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass = { |
| 26589 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClassID], |
| 26590 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7SubClassMask, |
| 26591 | SuperRegIdxSeqs + 146, |
| 26592 | LaneBitmask(0x280005787800102F), |
| 26593 | 0, |
| 26594 | false, |
| 26595 | 0x00, /* TSFlags */ |
| 26596 | true, /* HasDisjunctSubRegs */ |
| 26597 | true, /* CoveredBySubRegs */ |
| 26598 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7Superclasses, 9, |
| 26599 | nullptr |
| 26600 | }; |
| 26601 | |
| 26602 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 26603 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 26604 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 26605 | SuperRegIdxSeqs + 146, |
| 26606 | LaneBitmask(0x280005787800102F), |
| 26607 | 0, |
| 26608 | false, |
| 26609 | 0x00, /* TSFlags */ |
| 26610 | true, /* HasDisjunctSubRegs */ |
| 26611 | true, /* CoveredBySubRegs */ |
| 26612 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoSuperclasses, 10, |
| 26613 | nullptr |
| 26614 | }; |
| 26615 | |
| 26616 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClass = { |
| 26617 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClassID], |
| 26618 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoSubClassMask, |
| 26619 | SuperRegIdxSeqs + 146, |
| 26620 | LaneBitmask(0x280005787800102F), |
| 26621 | 0, |
| 26622 | false, |
| 26623 | 0x00, /* TSFlags */ |
| 26624 | true, /* HasDisjunctSubRegs */ |
| 26625 | true, /* CoveredBySubRegs */ |
| 26626 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoSuperclasses, 10, |
| 26627 | nullptr |
| 26628 | }; |
| 26629 | |
| 26630 | extern const TargetRegisterClass QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 26631 | &AArch64MCRegisterClasses[QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 26632 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26633 | SuperRegIdxSeqs + 142, |
| 26634 | LaneBitmask(0x000005787800002F), |
| 26635 | 0, |
| 26636 | false, |
| 26637 | 0x00, /* TSFlags */ |
| 26638 | true, /* HasDisjunctSubRegs */ |
| 26639 | true, /* CoveredBySubRegs */ |
| 26640 | QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7Superclasses, 12, |
| 26641 | nullptr |
| 26642 | }; |
| 26643 | |
| 26644 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClass = { |
| 26645 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClassID], |
| 26646 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KSubClassMask, |
| 26647 | SuperRegIdxSeqs + 146, |
| 26648 | LaneBitmask(0x280005787800102F), |
| 26649 | 0, |
| 26650 | false, |
| 26651 | 0x00, /* TSFlags */ |
| 26652 | true, /* HasDisjunctSubRegs */ |
| 26653 | true, /* CoveredBySubRegs */ |
| 26654 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KSuperclasses, 3, |
| 26655 | nullptr |
| 26656 | }; |
| 26657 | |
| 26658 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass = { |
| 26659 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID], |
| 26660 | ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSubClassMask, |
| 26661 | SuperRegIdxSeqs + 146, |
| 26662 | LaneBitmask(0x280005787800102F), |
| 26663 | 0, |
| 26664 | false, |
| 26665 | 0x00, /* TSFlags */ |
| 26666 | true, /* HasDisjunctSubRegs */ |
| 26667 | true, /* CoveredBySubRegs */ |
| 26668 | ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSuperclasses, 3, |
| 26669 | nullptr |
| 26670 | }; |
| 26671 | |
| 26672 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = { |
| 26673 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClassID], |
| 26674 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7SubClassMask, |
| 26675 | SuperRegIdxSeqs + 146, |
| 26676 | LaneBitmask(0x280005787800102F), |
| 26677 | 0, |
| 26678 | false, |
| 26679 | 0x00, /* TSFlags */ |
| 26680 | true, /* HasDisjunctSubRegs */ |
| 26681 | true, /* CoveredBySubRegs */ |
| 26682 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7Superclasses, 12, |
| 26683 | nullptr |
| 26684 | }; |
| 26685 | |
| 26686 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = { |
| 26687 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID], |
| 26688 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask, |
| 26689 | SuperRegIdxSeqs + 146, |
| 26690 | LaneBitmask(0x280005787800102F), |
| 26691 | 0, |
| 26692 | false, |
| 26693 | 0x00, /* TSFlags */ |
| 26694 | true, /* HasDisjunctSubRegs */ |
| 26695 | true, /* CoveredBySubRegs */ |
| 26696 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 26697 | nullptr |
| 26698 | }; |
| 26699 | |
| 26700 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass = { |
| 26701 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClassID], |
| 26702 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSubClassMask, |
| 26703 | SuperRegIdxSeqs + 146, |
| 26704 | LaneBitmask(0x280005787800102F), |
| 26705 | 0, |
| 26706 | false, |
| 26707 | 0x00, /* TSFlags */ |
| 26708 | true, /* HasDisjunctSubRegs */ |
| 26709 | true, /* CoveredBySubRegs */ |
| 26710 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KSuperclasses, 6, |
| 26711 | nullptr |
| 26712 | }; |
| 26713 | |
| 26714 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 26715 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 26716 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 26717 | SuperRegIdxSeqs + 146, |
| 26718 | LaneBitmask(0x280005787800102F), |
| 26719 | 0, |
| 26720 | false, |
| 26721 | 0x00, /* TSFlags */ |
| 26722 | true, /* HasDisjunctSubRegs */ |
| 26723 | true, /* CoveredBySubRegs */ |
| 26724 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 6, |
| 26725 | nullptr |
| 26726 | }; |
| 26727 | |
| 26728 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 26729 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 26730 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 26731 | SuperRegIdxSeqs + 146, |
| 26732 | LaneBitmask(0x280005787800102F), |
| 26733 | 0, |
| 26734 | false, |
| 26735 | 0x00, /* TSFlags */ |
| 26736 | true, /* HasDisjunctSubRegs */ |
| 26737 | true, /* CoveredBySubRegs */ |
| 26738 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses, 4, |
| 26739 | nullptr |
| 26740 | }; |
| 26741 | |
| 26742 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 26743 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 26744 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 26745 | SuperRegIdxSeqs + 146, |
| 26746 | LaneBitmask(0x280005787800102F), |
| 26747 | 0, |
| 26748 | false, |
| 26749 | 0x00, /* TSFlags */ |
| 26750 | true, /* HasDisjunctSubRegs */ |
| 26751 | true, /* CoveredBySubRegs */ |
| 26752 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 12, |
| 26753 | nullptr |
| 26754 | }; |
| 26755 | |
| 26756 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 26757 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 26758 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 26759 | SuperRegIdxSeqs + 146, |
| 26760 | LaneBitmask(0x280005787800102F), |
| 26761 | 0, |
| 26762 | false, |
| 26763 | 0x00, /* TSFlags */ |
| 26764 | true, /* HasDisjunctSubRegs */ |
| 26765 | true, /* CoveredBySubRegs */ |
| 26766 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 6, |
| 26767 | nullptr |
| 26768 | }; |
| 26769 | |
| 26770 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 26771 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 26772 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 26773 | SuperRegIdxSeqs + 146, |
| 26774 | LaneBitmask(0x280005787800102F), |
| 26775 | 0, |
| 26776 | false, |
| 26777 | 0x00, /* TSFlags */ |
| 26778 | true, /* HasDisjunctSubRegs */ |
| 26779 | true, /* CoveredBySubRegs */ |
| 26780 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 14, |
| 26781 | nullptr |
| 26782 | }; |
| 26783 | |
| 26784 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 26785 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 26786 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 26787 | SuperRegIdxSeqs + 146, |
| 26788 | LaneBitmask(0x280005787800102F), |
| 26789 | 0, |
| 26790 | false, |
| 26791 | 0x00, /* TSFlags */ |
| 26792 | true, /* HasDisjunctSubRegs */ |
| 26793 | true, /* CoveredBySubRegs */ |
| 26794 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 4, |
| 26795 | nullptr |
| 26796 | }; |
| 26797 | |
| 26798 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 26799 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 26800 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 26801 | SuperRegIdxSeqs + 146, |
| 26802 | LaneBitmask(0x280005787800102F), |
| 26803 | 0, |
| 26804 | false, |
| 26805 | 0x00, /* TSFlags */ |
| 26806 | true, /* HasDisjunctSubRegs */ |
| 26807 | true, /* CoveredBySubRegs */ |
| 26808 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 7, |
| 26809 | nullptr |
| 26810 | }; |
| 26811 | |
| 26812 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 26813 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 26814 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 26815 | SuperRegIdxSeqs + 146, |
| 26816 | LaneBitmask(0x280005787800102F), |
| 26817 | 0, |
| 26818 | false, |
| 26819 | 0x00, /* TSFlags */ |
| 26820 | true, /* HasDisjunctSubRegs */ |
| 26821 | true, /* CoveredBySubRegs */ |
| 26822 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 6, |
| 26823 | nullptr |
| 26824 | }; |
| 26825 | |
| 26826 | extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 26827 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 26828 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 26829 | SuperRegIdxSeqs + 146, |
| 26830 | LaneBitmask(0x280005787800102F), |
| 26831 | 0, |
| 26832 | false, |
| 26833 | 0x00, /* TSFlags */ |
| 26834 | true, /* HasDisjunctSubRegs */ |
| 26835 | true, /* CoveredBySubRegs */ |
| 26836 | ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 9, |
| 26837 | nullptr |
| 26838 | }; |
| 26839 | |
| 26840 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 26841 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 26842 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 26843 | SuperRegIdxSeqs + 146, |
| 26844 | LaneBitmask(0x280005787800102F), |
| 26845 | 0, |
| 26846 | false, |
| 26847 | 0x00, /* TSFlags */ |
| 26848 | true, /* HasDisjunctSubRegs */ |
| 26849 | true, /* CoveredBySubRegs */ |
| 26850 | ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 26851 | nullptr |
| 26852 | }; |
| 26853 | |
| 26854 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 26855 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 26856 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 26857 | SuperRegIdxSeqs + 146, |
| 26858 | LaneBitmask(0x280005787800102F), |
| 26859 | 0, |
| 26860 | false, |
| 26861 | 0x00, /* TSFlags */ |
| 26862 | true, /* HasDisjunctSubRegs */ |
| 26863 | true, /* CoveredBySubRegs */ |
| 26864 | ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 26865 | nullptr |
| 26866 | }; |
| 26867 | |
| 26868 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 26869 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 26870 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 26871 | SuperRegIdxSeqs + 146, |
| 26872 | LaneBitmask(0x280005787800102F), |
| 26873 | 0, |
| 26874 | false, |
| 26875 | 0x00, /* TSFlags */ |
| 26876 | true, /* HasDisjunctSubRegs */ |
| 26877 | true, /* CoveredBySubRegs */ |
| 26878 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 26879 | nullptr |
| 26880 | }; |
| 26881 | |
| 26882 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClass = { |
| 26883 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClassID], |
| 26884 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 26885 | SuperRegIdxSeqs + 146, |
| 26886 | LaneBitmask(0x280005787800102F), |
| 26887 | 0, |
| 26888 | false, |
| 26889 | 0x00, /* TSFlags */ |
| 26890 | true, /* HasDisjunctSubRegs */ |
| 26891 | true, /* CoveredBySubRegs */ |
| 26892 | ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KSuperclasses, 6, |
| 26893 | nullptr |
| 26894 | }; |
| 26895 | |
| 26896 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = { |
| 26897 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClassID], |
| 26898 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2SubClassMask, |
| 26899 | SuperRegIdxSeqs + 146, |
| 26900 | LaneBitmask(0x280005787800102F), |
| 26901 | 0, |
| 26902 | false, |
| 26903 | 0x00, /* TSFlags */ |
| 26904 | true, /* HasDisjunctSubRegs */ |
| 26905 | true, /* CoveredBySubRegs */ |
| 26906 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2Superclasses, 12, |
| 26907 | nullptr |
| 26908 | }; |
| 26909 | |
| 26910 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = { |
| 26911 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID], |
| 26912 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask, |
| 26913 | SuperRegIdxSeqs + 146, |
| 26914 | LaneBitmask(0x280005787800102F), |
| 26915 | 0, |
| 26916 | false, |
| 26917 | 0x00, /* TSFlags */ |
| 26918 | true, /* HasDisjunctSubRegs */ |
| 26919 | true, /* CoveredBySubRegs */ |
| 26920 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 26921 | nullptr |
| 26922 | }; |
| 26923 | |
| 26924 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 26925 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 26926 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 26927 | SuperRegIdxSeqs + 146, |
| 26928 | LaneBitmask(0x280005787800102F), |
| 26929 | 0, |
| 26930 | false, |
| 26931 | 0x00, /* TSFlags */ |
| 26932 | true, /* HasDisjunctSubRegs */ |
| 26933 | true, /* CoveredBySubRegs */ |
| 26934 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses, 7, |
| 26935 | nullptr |
| 26936 | }; |
| 26937 | |
| 26938 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 26939 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 26940 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 26941 | SuperRegIdxSeqs + 146, |
| 26942 | LaneBitmask(0x280005787800102F), |
| 26943 | 0, |
| 26944 | false, |
| 26945 | 0x00, /* TSFlags */ |
| 26946 | true, /* HasDisjunctSubRegs */ |
| 26947 | true, /* CoveredBySubRegs */ |
| 26948 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses, 5, |
| 26949 | nullptr |
| 26950 | }; |
| 26951 | |
| 26952 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 26953 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 26954 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 26955 | SuperRegIdxSeqs + 146, |
| 26956 | LaneBitmask(0x280005787800102F), |
| 26957 | 0, |
| 26958 | false, |
| 26959 | 0x00, /* TSFlags */ |
| 26960 | true, /* HasDisjunctSubRegs */ |
| 26961 | true, /* CoveredBySubRegs */ |
| 26962 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 8, |
| 26963 | nullptr |
| 26964 | }; |
| 26965 | |
| 26966 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 26967 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 26968 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 26969 | SuperRegIdxSeqs + 146, |
| 26970 | LaneBitmask(0x280005787800102F), |
| 26971 | 0, |
| 26972 | false, |
| 26973 | 0x00, /* TSFlags */ |
| 26974 | true, /* HasDisjunctSubRegs */ |
| 26975 | true, /* CoveredBySubRegs */ |
| 26976 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 9, |
| 26977 | nullptr |
| 26978 | }; |
| 26979 | |
| 26980 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 26981 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 26982 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 26983 | SuperRegIdxSeqs + 146, |
| 26984 | LaneBitmask(0x280005787800102F), |
| 26985 | 0, |
| 26986 | false, |
| 26987 | 0x00, /* TSFlags */ |
| 26988 | true, /* HasDisjunctSubRegs */ |
| 26989 | true, /* CoveredBySubRegs */ |
| 26990 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 19, |
| 26991 | nullptr |
| 26992 | }; |
| 26993 | |
| 26994 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 26995 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 26996 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 26997 | SuperRegIdxSeqs + 146, |
| 26998 | LaneBitmask(0x280005787800102F), |
| 26999 | 0, |
| 27000 | false, |
| 27001 | 0x00, /* TSFlags */ |
| 27002 | true, /* HasDisjunctSubRegs */ |
| 27003 | true, /* CoveredBySubRegs */ |
| 27004 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bSuperclasses, 19, |
| 27005 | nullptr |
| 27006 | }; |
| 27007 | |
| 27008 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 27009 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 27010 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 27011 | SuperRegIdxSeqs + 146, |
| 27012 | LaneBitmask(0x280005787800102F), |
| 27013 | 0, |
| 27014 | false, |
| 27015 | 0x00, /* TSFlags */ |
| 27016 | true, /* HasDisjunctSubRegs */ |
| 27017 | true, /* CoveredBySubRegs */ |
| 27018 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 14, |
| 27019 | nullptr |
| 27020 | }; |
| 27021 | |
| 27022 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 27023 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 27024 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 27025 | SuperRegIdxSeqs + 146, |
| 27026 | LaneBitmask(0x280005787800102F), |
| 27027 | 0, |
| 27028 | false, |
| 27029 | 0x00, /* TSFlags */ |
| 27030 | true, /* HasDisjunctSubRegs */ |
| 27031 | true, /* CoveredBySubRegs */ |
| 27032 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 14, |
| 27033 | nullptr |
| 27034 | }; |
| 27035 | |
| 27036 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass = { |
| 27037 | &AArch64MCRegisterClasses[ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID], |
| 27038 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSubClassMask, |
| 27039 | SuperRegIdxSeqs + 146, |
| 27040 | LaneBitmask(0x280005787800102F), |
| 27041 | 0, |
| 27042 | false, |
| 27043 | 0x00, /* TSFlags */ |
| 27044 | true, /* HasDisjunctSubRegs */ |
| 27045 | true, /* CoveredBySubRegs */ |
| 27046 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSuperclasses, 4, |
| 27047 | nullptr |
| 27048 | }; |
| 27049 | |
| 27050 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 27051 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 27052 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 27053 | SuperRegIdxSeqs + 146, |
| 27054 | LaneBitmask(0x280005787800102F), |
| 27055 | 0, |
| 27056 | false, |
| 27057 | 0x00, /* TSFlags */ |
| 27058 | true, /* HasDisjunctSubRegs */ |
| 27059 | true, /* CoveredBySubRegs */ |
| 27060 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses, 22, |
| 27061 | nullptr |
| 27062 | }; |
| 27063 | |
| 27064 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = { |
| 27065 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClassID], |
| 27066 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 27067 | SuperRegIdxSeqs + 146, |
| 27068 | LaneBitmask(0x280005787800102F), |
| 27069 | 0, |
| 27070 | false, |
| 27071 | 0x00, /* TSFlags */ |
| 27072 | true, /* HasDisjunctSubRegs */ |
| 27073 | true, /* CoveredBySubRegs */ |
| 27074 | ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KSuperclasses, 16, |
| 27075 | nullptr |
| 27076 | }; |
| 27077 | |
| 27078 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = { |
| 27079 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID], |
| 27080 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask, |
| 27081 | SuperRegIdxSeqs + 146, |
| 27082 | LaneBitmask(0x280005787800102F), |
| 27083 | 0, |
| 27084 | false, |
| 27085 | 0x00, /* TSFlags */ |
| 27086 | true, /* HasDisjunctSubRegs */ |
| 27087 | true, /* CoveredBySubRegs */ |
| 27088 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 27089 | nullptr |
| 27090 | }; |
| 27091 | |
| 27092 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 27093 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 27094 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 27095 | SuperRegIdxSeqs + 146, |
| 27096 | LaneBitmask(0x280005787800102F), |
| 27097 | 0, |
| 27098 | false, |
| 27099 | 0x00, /* TSFlags */ |
| 27100 | true, /* HasDisjunctSubRegs */ |
| 27101 | true, /* CoveredBySubRegs */ |
| 27102 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 12, |
| 27103 | nullptr |
| 27104 | }; |
| 27105 | |
| 27106 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 27107 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 27108 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 27109 | SuperRegIdxSeqs + 146, |
| 27110 | LaneBitmask(0x280005787800102F), |
| 27111 | 0, |
| 27112 | false, |
| 27113 | 0x00, /* TSFlags */ |
| 27114 | true, /* HasDisjunctSubRegs */ |
| 27115 | true, /* CoveredBySubRegs */ |
| 27116 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses, 9, |
| 27117 | nullptr |
| 27118 | }; |
| 27119 | |
| 27120 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 27121 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 27122 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 27123 | SuperRegIdxSeqs + 146, |
| 27124 | LaneBitmask(0x280005787800102F), |
| 27125 | 0, |
| 27126 | false, |
| 27127 | 0x00, /* TSFlags */ |
| 27128 | true, /* HasDisjunctSubRegs */ |
| 27129 | true, /* CoveredBySubRegs */ |
| 27130 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 12, |
| 27131 | nullptr |
| 27132 | }; |
| 27133 | |
| 27134 | extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = { |
| 27135 | &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID], |
| 27136 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 27137 | SuperRegIdxSeqs + 146, |
| 27138 | LaneBitmask(0x280005787800102F), |
| 27139 | 0, |
| 27140 | false, |
| 27141 | 0x00, /* TSFlags */ |
| 27142 | true, /* HasDisjunctSubRegs */ |
| 27143 | true, /* CoveredBySubRegs */ |
| 27144 | ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses, 9, |
| 27145 | nullptr |
| 27146 | }; |
| 27147 | |
| 27148 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 27149 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 27150 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 27151 | SuperRegIdxSeqs + 146, |
| 27152 | LaneBitmask(0x280005787800102F), |
| 27153 | 0, |
| 27154 | false, |
| 27155 | 0x00, /* TSFlags */ |
| 27156 | true, /* HasDisjunctSubRegs */ |
| 27157 | true, /* CoveredBySubRegs */ |
| 27158 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 27159 | nullptr |
| 27160 | }; |
| 27161 | |
| 27162 | extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass = { |
| 27163 | &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID], |
| 27164 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 27165 | SuperRegIdxSeqs + 146, |
| 27166 | LaneBitmask(0x280005787800102F), |
| 27167 | 0, |
| 27168 | false, |
| 27169 | 0x00, /* TSFlags */ |
| 27170 | true, /* HasDisjunctSubRegs */ |
| 27171 | true, /* CoveredBySubRegs */ |
| 27172 | ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KSuperclasses, 11, |
| 27173 | nullptr |
| 27174 | }; |
| 27175 | |
| 27176 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = { |
| 27177 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClassID], |
| 27178 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4SubClassMask, |
| 27179 | SuperRegIdxSeqs + 146, |
| 27180 | LaneBitmask(0x280005787800102F), |
| 27181 | 0, |
| 27182 | false, |
| 27183 | 0x00, /* TSFlags */ |
| 27184 | true, /* HasDisjunctSubRegs */ |
| 27185 | true, /* CoveredBySubRegs */ |
| 27186 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4Superclasses, 17, |
| 27187 | nullptr |
| 27188 | }; |
| 27189 | |
| 27190 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 27191 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 27192 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 27193 | SuperRegIdxSeqs + 146, |
| 27194 | LaneBitmask(0x280005787800102F), |
| 27195 | 0, |
| 27196 | false, |
| 27197 | 0x00, /* TSFlags */ |
| 27198 | true, /* HasDisjunctSubRegs */ |
| 27199 | true, /* CoveredBySubRegs */ |
| 27200 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses, 19, |
| 27201 | nullptr |
| 27202 | }; |
| 27203 | |
| 27204 | extern const TargetRegisterClass ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass = { |
| 27205 | &AArch64MCRegisterClasses[ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClassID], |
| 27206 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSubClassMask, |
| 27207 | SuperRegIdxSeqs + 146, |
| 27208 | LaneBitmask(0x280005787800102F), |
| 27209 | 0, |
| 27210 | false, |
| 27211 | 0x00, /* TSFlags */ |
| 27212 | true, /* HasDisjunctSubRegs */ |
| 27213 | true, /* CoveredBySubRegs */ |
| 27214 | ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KSuperclasses, 17, |
| 27215 | nullptr |
| 27216 | }; |
| 27217 | |
| 27218 | extern const TargetRegisterClass ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = { |
| 27219 | &AArch64MCRegisterClasses[ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID], |
| 27220 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask, |
| 27221 | SuperRegIdxSeqs + 146, |
| 27222 | LaneBitmask(0x280005787800102F), |
| 27223 | 0, |
| 27224 | false, |
| 27225 | 0x00, /* TSFlags */ |
| 27226 | true, /* HasDisjunctSubRegs */ |
| 27227 | true, /* CoveredBySubRegs */ |
| 27228 | ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses, 17, |
| 27229 | nullptr |
| 27230 | }; |
| 27231 | |
| 27232 | extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 27233 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 27234 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 27235 | SuperRegIdxSeqs + 146, |
| 27236 | LaneBitmask(0x280005787800102F), |
| 27237 | 0, |
| 27238 | false, |
| 27239 | 0x00, /* TSFlags */ |
| 27240 | true, /* HasDisjunctSubRegs */ |
| 27241 | true, /* CoveredBySubRegs */ |
| 27242 | ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 9, |
| 27243 | nullptr |
| 27244 | }; |
| 27245 | |
| 27246 | extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 27247 | &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 27248 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 27249 | SuperRegIdxSeqs + 146, |
| 27250 | LaneBitmask(0x280005787800102F), |
| 27251 | 0, |
| 27252 | false, |
| 27253 | 0x00, /* TSFlags */ |
| 27254 | true, /* HasDisjunctSubRegs */ |
| 27255 | true, /* CoveredBySubRegs */ |
| 27256 | ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 15, |
| 27257 | nullptr |
| 27258 | }; |
| 27259 | |
| 27260 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 27261 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 27262 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 27263 | SuperRegIdxSeqs + 146, |
| 27264 | LaneBitmask(0x280005787800102F), |
| 27265 | 0, |
| 27266 | false, |
| 27267 | 0x00, /* TSFlags */ |
| 27268 | true, /* HasDisjunctSubRegs */ |
| 27269 | true, /* CoveredBySubRegs */ |
| 27270 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 26, |
| 27271 | nullptr |
| 27272 | }; |
| 27273 | |
| 27274 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 27275 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 27276 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 27277 | SuperRegIdxSeqs + 146, |
| 27278 | LaneBitmask(0x280005787800102F), |
| 27279 | 0, |
| 27280 | false, |
| 27281 | 0x00, /* TSFlags */ |
| 27282 | true, /* HasDisjunctSubRegs */ |
| 27283 | true, /* CoveredBySubRegs */ |
| 27284 | ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses, 26, |
| 27285 | nullptr |
| 27286 | }; |
| 27287 | |
| 27288 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 27289 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 27290 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 27291 | SuperRegIdxSeqs + 146, |
| 27292 | LaneBitmask(0x280005787800102F), |
| 27293 | 0, |
| 27294 | false, |
| 27295 | 0x00, /* TSFlags */ |
| 27296 | true, /* HasDisjunctSubRegs */ |
| 27297 | true, /* CoveredBySubRegs */ |
| 27298 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiSuperclasses, 8, |
| 27299 | nullptr |
| 27300 | }; |
| 27301 | |
| 27302 | extern const TargetRegisterClass ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 27303 | &AArch64MCRegisterClasses[ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 27304 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 27305 | SuperRegIdxSeqs + 146, |
| 27306 | LaneBitmask(0x280005787800102F), |
| 27307 | 0, |
| 27308 | false, |
| 27309 | 0x00, /* TSFlags */ |
| 27310 | true, /* HasDisjunctSubRegs */ |
| 27311 | true, /* CoveredBySubRegs */ |
| 27312 | ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses, 10, |
| 27313 | nullptr |
| 27314 | }; |
| 27315 | |
| 27316 | extern const TargetRegisterClass QQQQRegClass = { |
| 27317 | &AArch64MCRegisterClasses[QQQQRegClassID], |
| 27318 | QQQQSubClassMask, |
| 27319 | SuperRegIdxSeqs + 140, |
| 27320 | LaneBitmask(0x0000077FF800002F), |
| 27321 | 0, |
| 27322 | false, |
| 27323 | 0x00, /* TSFlags */ |
| 27324 | true, /* HasDisjunctSubRegs */ |
| 27325 | true, /* CoveredBySubRegs */ |
| 27326 | nullptr, 0, |
| 27327 | nullptr |
| 27328 | }; |
| 27329 | |
| 27330 | extern const TargetRegisterClass ZPR4RegClass = { |
| 27331 | &AArch64MCRegisterClasses[ZPR4RegClassID], |
| 27332 | ZPR4SubClassMask, |
| 27333 | SuperRegIdxSeqs + 5, |
| 27334 | LaneBitmask(0x3800077FF800102F), |
| 27335 | 0, |
| 27336 | false, |
| 27337 | 0x00, /* TSFlags */ |
| 27338 | true, /* HasDisjunctSubRegs */ |
| 27339 | true, /* CoveredBySubRegs */ |
| 27340 | nullptr, 0, |
| 27341 | nullptr |
| 27342 | }; |
| 27343 | |
| 27344 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_loRegClass = { |
| 27345 | &AArch64MCRegisterClasses[QQQQ_with_dsub1_in_FPR64_loRegClassID], |
| 27346 | QQQQ_with_dsub1_in_FPR64_loSubClassMask, |
| 27347 | SuperRegIdxSeqs + 140, |
| 27348 | LaneBitmask(0x0000077FF800002F), |
| 27349 | 0, |
| 27350 | false, |
| 27351 | 0x00, /* TSFlags */ |
| 27352 | true, /* HasDisjunctSubRegs */ |
| 27353 | true, /* CoveredBySubRegs */ |
| 27354 | QQQQ_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 27355 | nullptr |
| 27356 | }; |
| 27357 | |
| 27358 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_loRegClass = { |
| 27359 | &AArch64MCRegisterClasses[QQQQ_with_dsub2_in_FPR64_loRegClassID], |
| 27360 | QQQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 27361 | SuperRegIdxSeqs + 140, |
| 27362 | LaneBitmask(0x0000077FF800002F), |
| 27363 | 0, |
| 27364 | false, |
| 27365 | 0x00, /* TSFlags */ |
| 27366 | true, /* HasDisjunctSubRegs */ |
| 27367 | true, /* CoveredBySubRegs */ |
| 27368 | QQQQ_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 27369 | nullptr |
| 27370 | }; |
| 27371 | |
| 27372 | extern const TargetRegisterClass QQQQ_with_dsub3_in_FPR64_loRegClass = { |
| 27373 | &AArch64MCRegisterClasses[QQQQ_with_dsub3_in_FPR64_loRegClassID], |
| 27374 | QQQQ_with_dsub3_in_FPR64_loSubClassMask, |
| 27375 | SuperRegIdxSeqs + 140, |
| 27376 | LaneBitmask(0x0000077FF800002F), |
| 27377 | 0, |
| 27378 | false, |
| 27379 | 0x00, /* TSFlags */ |
| 27380 | true, /* HasDisjunctSubRegs */ |
| 27381 | true, /* CoveredBySubRegs */ |
| 27382 | QQQQ_with_dsub3_in_FPR64_loSuperclasses, 1, |
| 27383 | nullptr |
| 27384 | }; |
| 27385 | |
| 27386 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_loRegClass = { |
| 27387 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_loRegClassID], |
| 27388 | QQQQ_with_qsub0_in_FPR128_loSubClassMask, |
| 27389 | SuperRegIdxSeqs + 140, |
| 27390 | LaneBitmask(0x0000077FF800002F), |
| 27391 | 0, |
| 27392 | false, |
| 27393 | 0x00, /* TSFlags */ |
| 27394 | true, /* HasDisjunctSubRegs */ |
| 27395 | true, /* CoveredBySubRegs */ |
| 27396 | QQQQ_with_qsub0_in_FPR128_loSuperclasses, 1, |
| 27397 | nullptr |
| 27398 | }; |
| 27399 | |
| 27400 | extern const TargetRegisterClass ZPR4StridedOrContiguousRegClass = { |
| 27401 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguousRegClassID], |
| 27402 | ZPR4StridedOrContiguousSubClassMask, |
| 27403 | SuperRegIdxSeqs + 5, |
| 27404 | LaneBitmask(0x3800077FF800102F), |
| 27405 | 0, |
| 27406 | false, |
| 27407 | 0x00, /* TSFlags */ |
| 27408 | true, /* HasDisjunctSubRegs */ |
| 27409 | true, /* CoveredBySubRegs */ |
| 27410 | nullptr, 0, |
| 27411 | nullptr |
| 27412 | }; |
| 27413 | |
| 27414 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_loRegClass = { |
| 27415 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_loRegClassID], |
| 27416 | ZPR4_with_dsub1_in_FPR64_loSubClassMask, |
| 27417 | SuperRegIdxSeqs + 5, |
| 27418 | LaneBitmask(0x3800077FF800102F), |
| 27419 | 0, |
| 27420 | false, |
| 27421 | 0x00, /* TSFlags */ |
| 27422 | true, /* HasDisjunctSubRegs */ |
| 27423 | true, /* CoveredBySubRegs */ |
| 27424 | ZPR4_with_dsub1_in_FPR64_loSuperclasses, 1, |
| 27425 | nullptr |
| 27426 | }; |
| 27427 | |
| 27428 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_loRegClass = { |
| 27429 | &AArch64MCRegisterClasses[ZPR4_with_dsub2_in_FPR64_loRegClassID], |
| 27430 | ZPR4_with_dsub2_in_FPR64_loSubClassMask, |
| 27431 | SuperRegIdxSeqs + 5, |
| 27432 | LaneBitmask(0x3800077FF800102F), |
| 27433 | 0, |
| 27434 | false, |
| 27435 | 0x00, /* TSFlags */ |
| 27436 | true, /* HasDisjunctSubRegs */ |
| 27437 | true, /* CoveredBySubRegs */ |
| 27438 | ZPR4_with_dsub2_in_FPR64_loSuperclasses, 1, |
| 27439 | nullptr |
| 27440 | }; |
| 27441 | |
| 27442 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_loRegClass = { |
| 27443 | &AArch64MCRegisterClasses[ZPR4_with_dsub3_in_FPR64_loRegClassID], |
| 27444 | ZPR4_with_dsub3_in_FPR64_loSubClassMask, |
| 27445 | SuperRegIdxSeqs + 5, |
| 27446 | LaneBitmask(0x3800077FF800102F), |
| 27447 | 0, |
| 27448 | false, |
| 27449 | 0x00, /* TSFlags */ |
| 27450 | true, /* HasDisjunctSubRegs */ |
| 27451 | true, /* CoveredBySubRegs */ |
| 27452 | ZPR4_with_dsub3_in_FPR64_loSuperclasses, 1, |
| 27453 | nullptr |
| 27454 | }; |
| 27455 | |
| 27456 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { |
| 27457 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], |
| 27458 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, |
| 27459 | SuperRegIdxSeqs + 5, |
| 27460 | LaneBitmask(0x3800077FF800102F), |
| 27461 | 0, |
| 27462 | false, |
| 27463 | 0x00, /* TSFlags */ |
| 27464 | true, /* HasDisjunctSubRegs */ |
| 27465 | true, /* CoveredBySubRegs */ |
| 27466 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, 1, |
| 27467 | nullptr |
| 27468 | }; |
| 27469 | |
| 27470 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2RegClass = { |
| 27471 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2RegClassID], |
| 27472 | ZPR4_with_zsub1_in_ZPRMul2SubClassMask, |
| 27473 | SuperRegIdxSeqs + 5, |
| 27474 | LaneBitmask(0x3800077FF800102F), |
| 27475 | 0, |
| 27476 | false, |
| 27477 | 0x00, /* TSFlags */ |
| 27478 | true, /* HasDisjunctSubRegs */ |
| 27479 | true, /* CoveredBySubRegs */ |
| 27480 | ZPR4_with_zsub1_in_ZPRMul2Superclasses, 1, |
| 27481 | nullptr |
| 27482 | }; |
| 27483 | |
| 27484 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_loRegClass = { |
| 27485 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_loRegClassID], |
| 27486 | ZPR4_with_zsub_in_FPR128_loSubClassMask, |
| 27487 | SuperRegIdxSeqs + 5, |
| 27488 | LaneBitmask(0x3800077FF800102F), |
| 27489 | 0, |
| 27490 | false, |
| 27491 | 0x00, /* TSFlags */ |
| 27492 | true, /* HasDisjunctSubRegs */ |
| 27493 | true, /* CoveredBySubRegs */ |
| 27494 | ZPR4_with_zsub_in_FPR128_loSuperclasses, 1, |
| 27495 | nullptr |
| 27496 | }; |
| 27497 | |
| 27498 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass = { |
| 27499 | &AArch64MCRegisterClasses[QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID], |
| 27500 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 27501 | SuperRegIdxSeqs + 140, |
| 27502 | LaneBitmask(0x0000077FF800002F), |
| 27503 | 0, |
| 27504 | false, |
| 27505 | 0x00, /* TSFlags */ |
| 27506 | true, /* HasDisjunctSubRegs */ |
| 27507 | true, /* CoveredBySubRegs */ |
| 27508 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 27509 | nullptr |
| 27510 | }; |
| 27511 | |
| 27512 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = { |
| 27513 | &AArch64MCRegisterClasses[QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID], |
| 27514 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask, |
| 27515 | SuperRegIdxSeqs + 140, |
| 27516 | LaneBitmask(0x0000077FF800002F), |
| 27517 | 0, |
| 27518 | false, |
| 27519 | 0x00, /* TSFlags */ |
| 27520 | true, /* HasDisjunctSubRegs */ |
| 27521 | true, /* CoveredBySubRegs */ |
| 27522 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses, 3, |
| 27523 | nullptr |
| 27524 | }; |
| 27525 | |
| 27526 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClass = { |
| 27527 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClassID], |
| 27528 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loSubClassMask, |
| 27529 | SuperRegIdxSeqs + 140, |
| 27530 | LaneBitmask(0x0000077FF800002F), |
| 27531 | 0, |
| 27532 | false, |
| 27533 | 0x00, /* TSFlags */ |
| 27534 | true, /* HasDisjunctSubRegs */ |
| 27535 | true, /* CoveredBySubRegs */ |
| 27536 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 27537 | nullptr |
| 27538 | }; |
| 27539 | |
| 27540 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass = { |
| 27541 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID], |
| 27542 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loSubClassMask, |
| 27543 | SuperRegIdxSeqs + 5, |
| 27544 | LaneBitmask(0x3800077FF800102F), |
| 27545 | 0, |
| 27546 | false, |
| 27547 | 0x00, /* TSFlags */ |
| 27548 | true, /* HasDisjunctSubRegs */ |
| 27549 | true, /* CoveredBySubRegs */ |
| 27550 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loSuperclasses, 3, |
| 27551 | nullptr |
| 27552 | }; |
| 27553 | |
| 27554 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = { |
| 27555 | &AArch64MCRegisterClasses[ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID], |
| 27556 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask, |
| 27557 | SuperRegIdxSeqs + 5, |
| 27558 | LaneBitmask(0x3800077FF800102F), |
| 27559 | 0, |
| 27560 | false, |
| 27561 | 0x00, /* TSFlags */ |
| 27562 | true, /* HasDisjunctSubRegs */ |
| 27563 | true, /* CoveredBySubRegs */ |
| 27564 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses, 3, |
| 27565 | nullptr |
| 27566 | }; |
| 27567 | |
| 27568 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClass = { |
| 27569 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClassID], |
| 27570 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loSubClassMask, |
| 27571 | SuperRegIdxSeqs + 5, |
| 27572 | LaneBitmask(0x3800077FF800102F), |
| 27573 | 0, |
| 27574 | false, |
| 27575 | 0x00, /* TSFlags */ |
| 27576 | true, /* HasDisjunctSubRegs */ |
| 27577 | true, /* CoveredBySubRegs */ |
| 27578 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loSuperclasses, 3, |
| 27579 | nullptr |
| 27580 | }; |
| 27581 | |
| 27582 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = { |
| 27583 | &AArch64MCRegisterClasses[QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID], |
| 27584 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask, |
| 27585 | SuperRegIdxSeqs + 140, |
| 27586 | LaneBitmask(0x0000077FF800002F), |
| 27587 | 0, |
| 27588 | false, |
| 27589 | 0x00, /* TSFlags */ |
| 27590 | true, /* HasDisjunctSubRegs */ |
| 27591 | true, /* CoveredBySubRegs */ |
| 27592 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses, 6, |
| 27593 | nullptr |
| 27594 | }; |
| 27595 | |
| 27596 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass = { |
| 27597 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClassID], |
| 27598 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loSubClassMask, |
| 27599 | SuperRegIdxSeqs + 140, |
| 27600 | LaneBitmask(0x0000077FF800002F), |
| 27601 | 0, |
| 27602 | false, |
| 27603 | 0x00, /* TSFlags */ |
| 27604 | true, /* HasDisjunctSubRegs */ |
| 27605 | true, /* CoveredBySubRegs */ |
| 27606 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 27607 | nullptr |
| 27608 | }; |
| 27609 | |
| 27610 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = { |
| 27611 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID], |
| 27612 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask, |
| 27613 | SuperRegIdxSeqs + 5, |
| 27614 | LaneBitmask(0x3800077FF800102F), |
| 27615 | 0, |
| 27616 | false, |
| 27617 | 0x00, /* TSFlags */ |
| 27618 | true, /* HasDisjunctSubRegs */ |
| 27619 | true, /* CoveredBySubRegs */ |
| 27620 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses, 6, |
| 27621 | nullptr |
| 27622 | }; |
| 27623 | |
| 27624 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass = { |
| 27625 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClassID], |
| 27626 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loSubClassMask, |
| 27627 | SuperRegIdxSeqs + 5, |
| 27628 | LaneBitmask(0x3800077FF800102F), |
| 27629 | 0, |
| 27630 | false, |
| 27631 | 0x00, /* TSFlags */ |
| 27632 | true, /* HasDisjunctSubRegs */ |
| 27633 | true, /* CoveredBySubRegs */ |
| 27634 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loSuperclasses, 6, |
| 27635 | nullptr |
| 27636 | }; |
| 27637 | |
| 27638 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = { |
| 27639 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClassID], |
| 27640 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loSubClassMask, |
| 27641 | SuperRegIdxSeqs + 140, |
| 27642 | LaneBitmask(0x0000077FF800002F), |
| 27643 | 0, |
| 27644 | false, |
| 27645 | 0x00, /* TSFlags */ |
| 27646 | true, /* HasDisjunctSubRegs */ |
| 27647 | true, /* CoveredBySubRegs */ |
| 27648 | QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loSuperclasses, 10, |
| 27649 | nullptr |
| 27650 | }; |
| 27651 | |
| 27652 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = { |
| 27653 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClassID], |
| 27654 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loSubClassMask, |
| 27655 | SuperRegIdxSeqs + 5, |
| 27656 | LaneBitmask(0x3800077FF800102F), |
| 27657 | 0, |
| 27658 | false, |
| 27659 | 0x00, /* TSFlags */ |
| 27660 | true, /* HasDisjunctSubRegs */ |
| 27661 | true, /* CoveredBySubRegs */ |
| 27662 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loSuperclasses, 10, |
| 27663 | nullptr |
| 27664 | }; |
| 27665 | |
| 27666 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass = { |
| 27667 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClassID], |
| 27668 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2SubClassMask, |
| 27669 | SuperRegIdxSeqs + 5, |
| 27670 | LaneBitmask(0x3800077FF800102F), |
| 27671 | 0, |
| 27672 | false, |
| 27673 | 0x00, /* TSFlags */ |
| 27674 | true, /* HasDisjunctSubRegs */ |
| 27675 | true, /* CoveredBySubRegs */ |
| 27676 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2Superclasses, 1, |
| 27677 | nullptr |
| 27678 | }; |
| 27679 | |
| 27680 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass = { |
| 27681 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClassID], |
| 27682 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4SubClassMask, |
| 27683 | SuperRegIdxSeqs + 5, |
| 27684 | LaneBitmask(0x3800077FF800102F), |
| 27685 | 0, |
| 27686 | false, |
| 27687 | 0x00, /* TSFlags */ |
| 27688 | true, /* HasDisjunctSubRegs */ |
| 27689 | true, /* CoveredBySubRegs */ |
| 27690 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4Superclasses, 2, |
| 27691 | nullptr |
| 27692 | }; |
| 27693 | |
| 27694 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7RegClass = { |
| 27695 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_0to7RegClassID], |
| 27696 | QQQQ_with_qsub0_in_FPR128_0to7SubClassMask, |
| 27697 | SuperRegIdxSeqs + 140, |
| 27698 | LaneBitmask(0x0000077FF800002F), |
| 27699 | 0, |
| 27700 | false, |
| 27701 | 0x00, /* TSFlags */ |
| 27702 | true, /* HasDisjunctSubRegs */ |
| 27703 | true, /* CoveredBySubRegs */ |
| 27704 | QQQQ_with_qsub0_in_FPR128_0to7Superclasses, 11, |
| 27705 | nullptr |
| 27706 | }; |
| 27707 | |
| 27708 | extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 27709 | &AArch64MCRegisterClasses[QQQQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 27710 | QQQQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 27711 | SuperRegIdxSeqs + 140, |
| 27712 | LaneBitmask(0x0000077FF800002F), |
| 27713 | 0, |
| 27714 | false, |
| 27715 | 0x00, /* TSFlags */ |
| 27716 | true, /* HasDisjunctSubRegs */ |
| 27717 | true, /* CoveredBySubRegs */ |
| 27718 | QQQQ_with_qsub1_in_FPR128_0to7Superclasses, 7, |
| 27719 | nullptr |
| 27720 | }; |
| 27721 | |
| 27722 | extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 27723 | &AArch64MCRegisterClasses[QQQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 27724 | QQQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 27725 | SuperRegIdxSeqs + 140, |
| 27726 | LaneBitmask(0x0000077FF800002F), |
| 27727 | 0, |
| 27728 | false, |
| 27729 | 0x00, /* TSFlags */ |
| 27730 | true, /* HasDisjunctSubRegs */ |
| 27731 | true, /* CoveredBySubRegs */ |
| 27732 | QQQQ_with_qsub2_in_FPR128_0to7Superclasses, 4, |
| 27733 | nullptr |
| 27734 | }; |
| 27735 | |
| 27736 | extern const TargetRegisterClass QQQQ_with_qsub3_in_FPR128_0to7RegClass = { |
| 27737 | &AArch64MCRegisterClasses[QQQQ_with_qsub3_in_FPR128_0to7RegClassID], |
| 27738 | QQQQ_with_qsub3_in_FPR128_0to7SubClassMask, |
| 27739 | SuperRegIdxSeqs + 140, |
| 27740 | LaneBitmask(0x0000077FF800002F), |
| 27741 | 0, |
| 27742 | false, |
| 27743 | 0x00, /* TSFlags */ |
| 27744 | true, /* HasDisjunctSubRegs */ |
| 27745 | true, /* CoveredBySubRegs */ |
| 27746 | QQQQ_with_qsub3_in_FPR128_0to7Superclasses, 2, |
| 27747 | nullptr |
| 27748 | }; |
| 27749 | |
| 27750 | extern const TargetRegisterClass ZPR4Mul4RegClass = { |
| 27751 | &AArch64MCRegisterClasses[ZPR4Mul4RegClassID], |
| 27752 | ZPR4Mul4SubClassMask, |
| 27753 | SuperRegIdxSeqs + 5, |
| 27754 | LaneBitmask(0x3800077FF800102F), |
| 27755 | 0, |
| 27756 | false, |
| 27757 | 0x00, /* TSFlags */ |
| 27758 | true, /* HasDisjunctSubRegs */ |
| 27759 | true, /* CoveredBySubRegs */ |
| 27760 | ZPR4Mul4Superclasses, 5, |
| 27761 | nullptr |
| 27762 | }; |
| 27763 | |
| 27764 | extern const TargetRegisterClass ZPR4StridedRegClass = { |
| 27765 | &AArch64MCRegisterClasses[ZPR4StridedRegClassID], |
| 27766 | ZPR4StridedSubClassMask, |
| 27767 | SuperRegIdxSeqs + 5, |
| 27768 | LaneBitmask(0x3800077FF800102F), |
| 27769 | 0, |
| 27770 | false, |
| 27771 | 0x00, /* TSFlags */ |
| 27772 | true, /* HasDisjunctSubRegs */ |
| 27773 | true, /* CoveredBySubRegs */ |
| 27774 | ZPR4StridedSuperclasses, 1, |
| 27775 | nullptr |
| 27776 | }; |
| 27777 | |
| 27778 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClass = { |
| 27779 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClassID], |
| 27780 | ZPR4StridedOrContiguous_with_dsub_in_FPR64_loSubClassMask, |
| 27781 | SuperRegIdxSeqs + 5, |
| 27782 | LaneBitmask(0x3800077FF800102F), |
| 27783 | 0, |
| 27784 | false, |
| 27785 | 0x00, /* TSFlags */ |
| 27786 | true, /* HasDisjunctSubRegs */ |
| 27787 | true, /* CoveredBySubRegs */ |
| 27788 | ZPR4StridedOrContiguous_with_dsub_in_FPR64_loSuperclasses, 1, |
| 27789 | nullptr |
| 27790 | }; |
| 27791 | |
| 27792 | extern const TargetRegisterClass ZPR4_with_qsub1_in_FPR128_0to7RegClass = { |
| 27793 | &AArch64MCRegisterClasses[ZPR4_with_qsub1_in_FPR128_0to7RegClassID], |
| 27794 | ZPR4_with_qsub1_in_FPR128_0to7SubClassMask, |
| 27795 | SuperRegIdxSeqs + 5, |
| 27796 | LaneBitmask(0x3800077FF800102F), |
| 27797 | 0, |
| 27798 | false, |
| 27799 | 0x00, /* TSFlags */ |
| 27800 | true, /* HasDisjunctSubRegs */ |
| 27801 | true, /* CoveredBySubRegs */ |
| 27802 | ZPR4_with_qsub1_in_FPR128_0to7Superclasses, 7, |
| 27803 | nullptr |
| 27804 | }; |
| 27805 | |
| 27806 | extern const TargetRegisterClass ZPR4_with_qsub2_in_FPR128_0to7RegClass = { |
| 27807 | &AArch64MCRegisterClasses[ZPR4_with_qsub2_in_FPR128_0to7RegClassID], |
| 27808 | ZPR4_with_qsub2_in_FPR128_0to7SubClassMask, |
| 27809 | SuperRegIdxSeqs + 5, |
| 27810 | LaneBitmask(0x3800077FF800102F), |
| 27811 | 0, |
| 27812 | false, |
| 27813 | 0x00, /* TSFlags */ |
| 27814 | true, /* HasDisjunctSubRegs */ |
| 27815 | true, /* CoveredBySubRegs */ |
| 27816 | ZPR4_with_qsub2_in_FPR128_0to7Superclasses, 4, |
| 27817 | nullptr |
| 27818 | }; |
| 27819 | |
| 27820 | extern const TargetRegisterClass ZPR4_with_qsub3_in_FPR128_0to7RegClass = { |
| 27821 | &AArch64MCRegisterClasses[ZPR4_with_qsub3_in_FPR128_0to7RegClassID], |
| 27822 | ZPR4_with_qsub3_in_FPR128_0to7SubClassMask, |
| 27823 | SuperRegIdxSeqs + 5, |
| 27824 | LaneBitmask(0x3800077FF800102F), |
| 27825 | 0, |
| 27826 | false, |
| 27827 | 0x00, /* TSFlags */ |
| 27828 | true, /* HasDisjunctSubRegs */ |
| 27829 | true, /* CoveredBySubRegs */ |
| 27830 | ZPR4_with_qsub3_in_FPR128_0to7Superclasses, 2, |
| 27831 | nullptr |
| 27832 | }; |
| 27833 | |
| 27834 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_KRegClass = { |
| 27835 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_KRegClassID], |
| 27836 | ZPR4_with_zsub0_in_ZPR_KSubClassMask, |
| 27837 | SuperRegIdxSeqs + 5, |
| 27838 | LaneBitmask(0x3800077FF800102F), |
| 27839 | 0, |
| 27840 | false, |
| 27841 | 0x00, /* TSFlags */ |
| 27842 | true, /* HasDisjunctSubRegs */ |
| 27843 | true, /* CoveredBySubRegs */ |
| 27844 | ZPR4_with_zsub0_in_ZPR_KSuperclasses, 1, |
| 27845 | nullptr |
| 27846 | }; |
| 27847 | |
| 27848 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = { |
| 27849 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID], |
| 27850 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask, |
| 27851 | SuperRegIdxSeqs + 5, |
| 27852 | LaneBitmask(0x3800077FF800102F), |
| 27853 | 0, |
| 27854 | false, |
| 27855 | 0x00, /* TSFlags */ |
| 27856 | true, /* HasDisjunctSubRegs */ |
| 27857 | true, /* CoveredBySubRegs */ |
| 27858 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses, 2, |
| 27859 | nullptr |
| 27860 | }; |
| 27861 | |
| 27862 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass = { |
| 27863 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClassID], |
| 27864 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoSubClassMask, |
| 27865 | SuperRegIdxSeqs + 5, |
| 27866 | LaneBitmask(0x3800077FF800102F), |
| 27867 | 0, |
| 27868 | false, |
| 27869 | 0x00, /* TSFlags */ |
| 27870 | true, /* HasDisjunctSubRegs */ |
| 27871 | true, /* CoveredBySubRegs */ |
| 27872 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoSuperclasses, 5, |
| 27873 | nullptr |
| 27874 | }; |
| 27875 | |
| 27876 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 27877 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 27878 | ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 27879 | SuperRegIdxSeqs + 5, |
| 27880 | LaneBitmask(0x3800077FF800102F), |
| 27881 | 0, |
| 27882 | false, |
| 27883 | 0x00, /* TSFlags */ |
| 27884 | true, /* HasDisjunctSubRegs */ |
| 27885 | true, /* CoveredBySubRegs */ |
| 27886 | ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses, 2, |
| 27887 | nullptr |
| 27888 | }; |
| 27889 | |
| 27890 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 27891 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 27892 | ZPR4_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 27893 | SuperRegIdxSeqs + 5, |
| 27894 | LaneBitmask(0x3800077FF800102F), |
| 27895 | 0, |
| 27896 | false, |
| 27897 | 0x00, /* TSFlags */ |
| 27898 | true, /* HasDisjunctSubRegs */ |
| 27899 | true, /* CoveredBySubRegs */ |
| 27900 | ZPR4_with_zsub1_in_ZPRMul2_LoSuperclasses, 5, |
| 27901 | nullptr |
| 27902 | }; |
| 27903 | |
| 27904 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4RegClass = { |
| 27905 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul4RegClassID], |
| 27906 | ZPR4_with_zsub1_in_ZPRMul4SubClassMask, |
| 27907 | SuperRegIdxSeqs + 5, |
| 27908 | LaneBitmask(0x3800077FF800102F), |
| 27909 | 0, |
| 27910 | false, |
| 27911 | 0x00, /* TSFlags */ |
| 27912 | true, /* HasDisjunctSubRegs */ |
| 27913 | true, /* CoveredBySubRegs */ |
| 27914 | ZPR4_with_zsub1_in_ZPRMul4Superclasses, 2, |
| 27915 | nullptr |
| 27916 | }; |
| 27917 | |
| 27918 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_KRegClass = { |
| 27919 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_KRegClassID], |
| 27920 | ZPR4_with_zsub1_in_ZPR_KSubClassMask, |
| 27921 | SuperRegIdxSeqs + 5, |
| 27922 | LaneBitmask(0x3800077FF800102F), |
| 27923 | 0, |
| 27924 | false, |
| 27925 | 0x00, /* TSFlags */ |
| 27926 | true, /* HasDisjunctSubRegs */ |
| 27927 | true, /* CoveredBySubRegs */ |
| 27928 | ZPR4_with_zsub1_in_ZPR_KSuperclasses, 1, |
| 27929 | nullptr |
| 27930 | }; |
| 27931 | |
| 27932 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 27933 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 27934 | ZPR4_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 27935 | SuperRegIdxSeqs + 5, |
| 27936 | LaneBitmask(0x3800077FF800102F), |
| 27937 | 0, |
| 27938 | false, |
| 27939 | 0x00, /* TSFlags */ |
| 27940 | true, /* HasDisjunctSubRegs */ |
| 27941 | true, /* CoveredBySubRegs */ |
| 27942 | ZPR4_with_zsub2_in_ZPRMul2_HiSuperclasses, 2, |
| 27943 | nullptr |
| 27944 | }; |
| 27945 | |
| 27946 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul2_LoRegClass = { |
| 27947 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID], |
| 27948 | ZPR4_with_zsub2_in_ZPRMul2_LoSubClassMask, |
| 27949 | SuperRegIdxSeqs + 5, |
| 27950 | LaneBitmask(0x3800077FF800102F), |
| 27951 | 0, |
| 27952 | false, |
| 27953 | 0x00, /* TSFlags */ |
| 27954 | true, /* HasDisjunctSubRegs */ |
| 27955 | true, /* CoveredBySubRegs */ |
| 27956 | ZPR4_with_zsub2_in_ZPRMul2_LoSuperclasses, 5, |
| 27957 | nullptr |
| 27958 | }; |
| 27959 | |
| 27960 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4RegClass = { |
| 27961 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPRMul4RegClassID], |
| 27962 | ZPR4_with_zsub2_in_ZPRMul4SubClassMask, |
| 27963 | SuperRegIdxSeqs + 5, |
| 27964 | LaneBitmask(0x3800077FF800102F), |
| 27965 | 0, |
| 27966 | false, |
| 27967 | 0x00, /* TSFlags */ |
| 27968 | true, /* HasDisjunctSubRegs */ |
| 27969 | true, /* CoveredBySubRegs */ |
| 27970 | ZPR4_with_zsub2_in_ZPRMul4Superclasses, 2, |
| 27971 | nullptr |
| 27972 | }; |
| 27973 | |
| 27974 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_KRegClass = { |
| 27975 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_KRegClassID], |
| 27976 | ZPR4_with_zsub2_in_ZPR_KSubClassMask, |
| 27977 | SuperRegIdxSeqs + 5, |
| 27978 | LaneBitmask(0x3800077FF800102F), |
| 27979 | 0, |
| 27980 | false, |
| 27981 | 0x00, /* TSFlags */ |
| 27982 | true, /* HasDisjunctSubRegs */ |
| 27983 | true, /* CoveredBySubRegs */ |
| 27984 | ZPR4_with_zsub2_in_ZPR_KSuperclasses, 1, |
| 27985 | nullptr |
| 27986 | }; |
| 27987 | |
| 27988 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = { |
| 27989 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID], |
| 27990 | ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask, |
| 27991 | SuperRegIdxSeqs + 5, |
| 27992 | LaneBitmask(0x3800077FF800102F), |
| 27993 | 0, |
| 27994 | false, |
| 27995 | 0x00, /* TSFlags */ |
| 27996 | true, /* HasDisjunctSubRegs */ |
| 27997 | true, /* CoveredBySubRegs */ |
| 27998 | ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses, 2, |
| 27999 | nullptr |
| 28000 | }; |
| 28001 | |
| 28002 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = { |
| 28003 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID], |
| 28004 | ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask, |
| 28005 | SuperRegIdxSeqs + 5, |
| 28006 | LaneBitmask(0x3800077FF800102F), |
| 28007 | 0, |
| 28008 | false, |
| 28009 | 0x00, /* TSFlags */ |
| 28010 | true, /* HasDisjunctSubRegs */ |
| 28011 | true, /* CoveredBySubRegs */ |
| 28012 | ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses, 3, |
| 28013 | nullptr |
| 28014 | }; |
| 28015 | |
| 28016 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4RegClass = { |
| 28017 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul4RegClassID], |
| 28018 | ZPR4_with_zsub3_in_ZPRMul4SubClassMask, |
| 28019 | SuperRegIdxSeqs + 5, |
| 28020 | LaneBitmask(0x3800077FF800102F), |
| 28021 | 0, |
| 28022 | false, |
| 28023 | 0x00, /* TSFlags */ |
| 28024 | true, /* HasDisjunctSubRegs */ |
| 28025 | true, /* CoveredBySubRegs */ |
| 28026 | ZPR4_with_zsub3_in_ZPRMul4Superclasses, 2, |
| 28027 | nullptr |
| 28028 | }; |
| 28029 | |
| 28030 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_KRegClass = { |
| 28031 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPR_KRegClassID], |
| 28032 | ZPR4_with_zsub3_in_ZPR_KSubClassMask, |
| 28033 | SuperRegIdxSeqs + 5, |
| 28034 | LaneBitmask(0x3800077FF800102F), |
| 28035 | 0, |
| 28036 | false, |
| 28037 | 0x00, /* TSFlags */ |
| 28038 | true, /* HasDisjunctSubRegs */ |
| 28039 | true, /* CoveredBySubRegs */ |
| 28040 | ZPR4_with_zsub3_in_ZPR_KSuperclasses, 1, |
| 28041 | nullptr |
| 28042 | }; |
| 28043 | |
| 28044 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7RegClass = { |
| 28045 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7RegClassID], |
| 28046 | ZPR4_with_zsub_in_FPR128_0to7SubClassMask, |
| 28047 | SuperRegIdxSeqs + 5, |
| 28048 | LaneBitmask(0x3800077FF800102F), |
| 28049 | 0, |
| 28050 | false, |
| 28051 | 0x00, /* TSFlags */ |
| 28052 | true, /* HasDisjunctSubRegs */ |
| 28053 | true, /* CoveredBySubRegs */ |
| 28054 | ZPR4_with_zsub_in_FPR128_0to7Superclasses, 11, |
| 28055 | nullptr |
| 28056 | }; |
| 28057 | |
| 28058 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClass = { |
| 28059 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID], |
| 28060 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask, |
| 28061 | SuperRegIdxSeqs + 5, |
| 28062 | LaneBitmask(0x3800077FF800102F), |
| 28063 | 0, |
| 28064 | false, |
| 28065 | 0x00, /* TSFlags */ |
| 28066 | true, /* HasDisjunctSubRegs */ |
| 28067 | true, /* CoveredBySubRegs */ |
| 28068 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 28069 | nullptr |
| 28070 | }; |
| 28071 | |
| 28072 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 28073 | &AArch64MCRegisterClasses[QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 28074 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 28075 | SuperRegIdxSeqs + 140, |
| 28076 | LaneBitmask(0x0000077FF800002F), |
| 28077 | 0, |
| 28078 | false, |
| 28079 | 0x00, /* TSFlags */ |
| 28080 | true, /* HasDisjunctSubRegs */ |
| 28081 | true, /* CoveredBySubRegs */ |
| 28082 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7Superclasses, 9, |
| 28083 | nullptr |
| 28084 | }; |
| 28085 | |
| 28086 | extern const TargetRegisterClass QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = { |
| 28087 | &AArch64MCRegisterClasses[QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID], |
| 28088 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28089 | SuperRegIdxSeqs + 140, |
| 28090 | LaneBitmask(0x0000077FF800002F), |
| 28091 | 0, |
| 28092 | false, |
| 28093 | 0x00, /* TSFlags */ |
| 28094 | true, /* HasDisjunctSubRegs */ |
| 28095 | true, /* CoveredBySubRegs */ |
| 28096 | QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses, 6, |
| 28097 | nullptr |
| 28098 | }; |
| 28099 | |
| 28100 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClass = { |
| 28101 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClassID], |
| 28102 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7SubClassMask, |
| 28103 | SuperRegIdxSeqs + 140, |
| 28104 | LaneBitmask(0x0000077FF800002F), |
| 28105 | 0, |
| 28106 | false, |
| 28107 | 0x00, /* TSFlags */ |
| 28108 | true, /* HasDisjunctSubRegs */ |
| 28109 | true, /* CoveredBySubRegs */ |
| 28110 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7Superclasses, 13, |
| 28111 | nullptr |
| 28112 | }; |
| 28113 | |
| 28114 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass = { |
| 28115 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID], |
| 28116 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7SubClassMask, |
| 28117 | SuperRegIdxSeqs + 5, |
| 28118 | LaneBitmask(0x3800077FF800102F), |
| 28119 | 0, |
| 28120 | false, |
| 28121 | 0x00, /* TSFlags */ |
| 28122 | true, /* HasDisjunctSubRegs */ |
| 28123 | true, /* CoveredBySubRegs */ |
| 28124 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7Superclasses, 9, |
| 28125 | nullptr |
| 28126 | }; |
| 28127 | |
| 28128 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = { |
| 28129 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID], |
| 28130 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask, |
| 28131 | SuperRegIdxSeqs + 5, |
| 28132 | LaneBitmask(0x3800077FF800102F), |
| 28133 | 0, |
| 28134 | false, |
| 28135 | 0x00, /* TSFlags */ |
| 28136 | true, /* HasDisjunctSubRegs */ |
| 28137 | true, /* CoveredBySubRegs */ |
| 28138 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses, 10, |
| 28139 | nullptr |
| 28140 | }; |
| 28141 | |
| 28142 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass = { |
| 28143 | &AArch64MCRegisterClasses[ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID], |
| 28144 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28145 | SuperRegIdxSeqs + 5, |
| 28146 | LaneBitmask(0x3800077FF800102F), |
| 28147 | 0, |
| 28148 | false, |
| 28149 | 0x00, /* TSFlags */ |
| 28150 | true, /* HasDisjunctSubRegs */ |
| 28151 | true, /* CoveredBySubRegs */ |
| 28152 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses, 6, |
| 28153 | nullptr |
| 28154 | }; |
| 28155 | |
| 28156 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 28157 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 28158 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 28159 | SuperRegIdxSeqs + 5, |
| 28160 | LaneBitmask(0x3800077FF800102F), |
| 28161 | 0, |
| 28162 | false, |
| 28163 | 0x00, /* TSFlags */ |
| 28164 | true, /* HasDisjunctSubRegs */ |
| 28165 | true, /* CoveredBySubRegs */ |
| 28166 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses, 4, |
| 28167 | nullptr |
| 28168 | }; |
| 28169 | |
| 28170 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 28171 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 28172 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 28173 | SuperRegIdxSeqs + 5, |
| 28174 | LaneBitmask(0x3800077FF800102F), |
| 28175 | 0, |
| 28176 | false, |
| 28177 | 0x00, /* TSFlags */ |
| 28178 | true, /* HasDisjunctSubRegs */ |
| 28179 | true, /* CoveredBySubRegs */ |
| 28180 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiSuperclasses, 4, |
| 28181 | nullptr |
| 28182 | }; |
| 28183 | |
| 28184 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClass = { |
| 28185 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClassID], |
| 28186 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7SubClassMask, |
| 28187 | SuperRegIdxSeqs + 5, |
| 28188 | LaneBitmask(0x3800077FF800102F), |
| 28189 | 0, |
| 28190 | false, |
| 28191 | 0x00, /* TSFlags */ |
| 28192 | true, /* HasDisjunctSubRegs */ |
| 28193 | true, /* CoveredBySubRegs */ |
| 28194 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7Superclasses, 13, |
| 28195 | nullptr |
| 28196 | }; |
| 28197 | |
| 28198 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClass = { |
| 28199 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClassID], |
| 28200 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoSubClassMask, |
| 28201 | SuperRegIdxSeqs + 5, |
| 28202 | LaneBitmask(0x3800077FF800102F), |
| 28203 | 0, |
| 28204 | false, |
| 28205 | 0x00, /* TSFlags */ |
| 28206 | true, /* HasDisjunctSubRegs */ |
| 28207 | true, /* CoveredBySubRegs */ |
| 28208 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoSuperclasses, 10, |
| 28209 | nullptr |
| 28210 | }; |
| 28211 | |
| 28212 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClass = { |
| 28213 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClassID], |
| 28214 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoSubClassMask, |
| 28215 | SuperRegIdxSeqs + 5, |
| 28216 | LaneBitmask(0x3800077FF800102F), |
| 28217 | 0, |
| 28218 | false, |
| 28219 | 0x00, /* TSFlags */ |
| 28220 | true, /* HasDisjunctSubRegs */ |
| 28221 | true, /* CoveredBySubRegs */ |
| 28222 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoSuperclasses, 14, |
| 28223 | nullptr |
| 28224 | }; |
| 28225 | |
| 28226 | extern const TargetRegisterClass QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = { |
| 28227 | &AArch64MCRegisterClasses[QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID], |
| 28228 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28229 | SuperRegIdxSeqs + 140, |
| 28230 | LaneBitmask(0x0000077FF800002F), |
| 28231 | 0, |
| 28232 | false, |
| 28233 | 0x00, /* TSFlags */ |
| 28234 | true, /* HasDisjunctSubRegs */ |
| 28235 | true, /* CoveredBySubRegs */ |
| 28236 | QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses, 12, |
| 28237 | nullptr |
| 28238 | }; |
| 28239 | |
| 28240 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass = { |
| 28241 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClassID], |
| 28242 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7SubClassMask, |
| 28243 | SuperRegIdxSeqs + 140, |
| 28244 | LaneBitmask(0x0000077FF800002F), |
| 28245 | 0, |
| 28246 | false, |
| 28247 | 0x00, /* TSFlags */ |
| 28248 | true, /* HasDisjunctSubRegs */ |
| 28249 | true, /* CoveredBySubRegs */ |
| 28250 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7Superclasses, 16, |
| 28251 | nullptr |
| 28252 | }; |
| 28253 | |
| 28254 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass = { |
| 28255 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClassID], |
| 28256 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSubClassMask, |
| 28257 | SuperRegIdxSeqs + 5, |
| 28258 | LaneBitmask(0x3800077FF800102F), |
| 28259 | 0, |
| 28260 | false, |
| 28261 | 0x00, /* TSFlags */ |
| 28262 | true, /* HasDisjunctSubRegs */ |
| 28263 | true, /* CoveredBySubRegs */ |
| 28264 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiSuperclasses, 2, |
| 28265 | nullptr |
| 28266 | }; |
| 28267 | |
| 28268 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass = { |
| 28269 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClassID], |
| 28270 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSubClassMask, |
| 28271 | SuperRegIdxSeqs + 5, |
| 28272 | LaneBitmask(0x3800077FF800102F), |
| 28273 | 0, |
| 28274 | false, |
| 28275 | 0x00, /* TSFlags */ |
| 28276 | true, /* HasDisjunctSubRegs */ |
| 28277 | true, /* CoveredBySubRegs */ |
| 28278 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoSuperclasses, 3, |
| 28279 | nullptr |
| 28280 | }; |
| 28281 | |
| 28282 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = { |
| 28283 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID], |
| 28284 | ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask, |
| 28285 | SuperRegIdxSeqs + 5, |
| 28286 | LaneBitmask(0x3800077FF800102F), |
| 28287 | 0, |
| 28288 | false, |
| 28289 | 0x00, /* TSFlags */ |
| 28290 | true, /* HasDisjunctSubRegs */ |
| 28291 | true, /* CoveredBySubRegs */ |
| 28292 | ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses, 1, |
| 28293 | nullptr |
| 28294 | }; |
| 28295 | |
| 28296 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass = { |
| 28297 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClassID], |
| 28298 | ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7SubClassMask, |
| 28299 | SuperRegIdxSeqs + 5, |
| 28300 | LaneBitmask(0x3800077FF800102F), |
| 28301 | 0, |
| 28302 | false, |
| 28303 | 0x00, /* TSFlags */ |
| 28304 | true, /* HasDisjunctSubRegs */ |
| 28305 | true, /* CoveredBySubRegs */ |
| 28306 | ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7Superclasses, 2, |
| 28307 | nullptr |
| 28308 | }; |
| 28309 | |
| 28310 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass = { |
| 28311 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID], |
| 28312 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28313 | SuperRegIdxSeqs + 5, |
| 28314 | LaneBitmask(0x3800077FF800102F), |
| 28315 | 0, |
| 28316 | false, |
| 28317 | 0x00, /* TSFlags */ |
| 28318 | true, /* HasDisjunctSubRegs */ |
| 28319 | true, /* CoveredBySubRegs */ |
| 28320 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses, 12, |
| 28321 | nullptr |
| 28322 | }; |
| 28323 | |
| 28324 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClass = { |
| 28325 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClassID], |
| 28326 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KSubClassMask, |
| 28327 | SuperRegIdxSeqs + 5, |
| 28328 | LaneBitmask(0x3800077FF800102F), |
| 28329 | 0, |
| 28330 | false, |
| 28331 | 0x00, /* TSFlags */ |
| 28332 | true, /* HasDisjunctSubRegs */ |
| 28333 | true, /* CoveredBySubRegs */ |
| 28334 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KSuperclasses, 3, |
| 28335 | nullptr |
| 28336 | }; |
| 28337 | |
| 28338 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass = { |
| 28339 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID], |
| 28340 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSubClassMask, |
| 28341 | SuperRegIdxSeqs + 5, |
| 28342 | LaneBitmask(0x3800077FF800102F), |
| 28343 | 0, |
| 28344 | false, |
| 28345 | 0x00, /* TSFlags */ |
| 28346 | true, /* HasDisjunctSubRegs */ |
| 28347 | true, /* CoveredBySubRegs */ |
| 28348 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSuperclasses, 3, |
| 28349 | nullptr |
| 28350 | }; |
| 28351 | |
| 28352 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass = { |
| 28353 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID], |
| 28354 | ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSubClassMask, |
| 28355 | SuperRegIdxSeqs + 5, |
| 28356 | LaneBitmask(0x3800077FF800102F), |
| 28357 | 0, |
| 28358 | false, |
| 28359 | 0x00, /* TSFlags */ |
| 28360 | true, /* HasDisjunctSubRegs */ |
| 28361 | true, /* CoveredBySubRegs */ |
| 28362 | ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSuperclasses, 3, |
| 28363 | nullptr |
| 28364 | }; |
| 28365 | |
| 28366 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass = { |
| 28367 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClassID], |
| 28368 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7SubClassMask, |
| 28369 | SuperRegIdxSeqs + 5, |
| 28370 | LaneBitmask(0x3800077FF800102F), |
| 28371 | 0, |
| 28372 | false, |
| 28373 | 0x00, /* TSFlags */ |
| 28374 | true, /* HasDisjunctSubRegs */ |
| 28375 | true, /* CoveredBySubRegs */ |
| 28376 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7Superclasses, 16, |
| 28377 | nullptr |
| 28378 | }; |
| 28379 | |
| 28380 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = { |
| 28381 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClassID], |
| 28382 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSubClassMask, |
| 28383 | SuperRegIdxSeqs + 5, |
| 28384 | LaneBitmask(0x3800077FF800102F), |
| 28385 | 0, |
| 28386 | false, |
| 28387 | 0x00, /* TSFlags */ |
| 28388 | true, /* HasDisjunctSubRegs */ |
| 28389 | true, /* CoveredBySubRegs */ |
| 28390 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoSuperclasses, 17, |
| 28391 | nullptr |
| 28392 | }; |
| 28393 | |
| 28394 | extern const TargetRegisterClass QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = { |
| 28395 | &AArch64MCRegisterClasses[QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClassID], |
| 28396 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28397 | SuperRegIdxSeqs + 140, |
| 28398 | LaneBitmask(0x0000077FF800002F), |
| 28399 | 0, |
| 28400 | false, |
| 28401 | 0x00, /* TSFlags */ |
| 28402 | true, /* HasDisjunctSubRegs */ |
| 28403 | true, /* CoveredBySubRegs */ |
| 28404 | QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7Superclasses, 20, |
| 28405 | nullptr |
| 28406 | }; |
| 28407 | |
| 28408 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 28409 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 28410 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 28411 | SuperRegIdxSeqs + 5, |
| 28412 | LaneBitmask(0x3800077FF800102F), |
| 28413 | 0, |
| 28414 | false, |
| 28415 | 0x00, /* TSFlags */ |
| 28416 | true, /* HasDisjunctSubRegs */ |
| 28417 | true, /* CoveredBySubRegs */ |
| 28418 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 28419 | nullptr |
| 28420 | }; |
| 28421 | |
| 28422 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 28423 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 28424 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 28425 | SuperRegIdxSeqs + 5, |
| 28426 | LaneBitmask(0x3800077FF800102F), |
| 28427 | 0, |
| 28428 | false, |
| 28429 | 0x00, /* TSFlags */ |
| 28430 | true, /* HasDisjunctSubRegs */ |
| 28431 | true, /* CoveredBySubRegs */ |
| 28432 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 28433 | nullptr |
| 28434 | }; |
| 28435 | |
| 28436 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass = { |
| 28437 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClassID], |
| 28438 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7SubClassMask, |
| 28439 | SuperRegIdxSeqs + 5, |
| 28440 | LaneBitmask(0x3800077FF800102F), |
| 28441 | 0, |
| 28442 | false, |
| 28443 | 0x00, /* TSFlags */ |
| 28444 | true, /* HasDisjunctSubRegs */ |
| 28445 | true, /* CoveredBySubRegs */ |
| 28446 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7Superclasses, 20, |
| 28447 | nullptr |
| 28448 | }; |
| 28449 | |
| 28450 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = { |
| 28451 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID], |
| 28452 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask, |
| 28453 | SuperRegIdxSeqs + 5, |
| 28454 | LaneBitmask(0x3800077FF800102F), |
| 28455 | 0, |
| 28456 | false, |
| 28457 | 0x00, /* TSFlags */ |
| 28458 | true, /* HasDisjunctSubRegs */ |
| 28459 | true, /* CoveredBySubRegs */ |
| 28460 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses, 4, |
| 28461 | nullptr |
| 28462 | }; |
| 28463 | |
| 28464 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 28465 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 28466 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 28467 | SuperRegIdxSeqs + 5, |
| 28468 | LaneBitmask(0x3800077FF800102F), |
| 28469 | 0, |
| 28470 | false, |
| 28471 | 0x00, /* TSFlags */ |
| 28472 | true, /* HasDisjunctSubRegs */ |
| 28473 | true, /* CoveredBySubRegs */ |
| 28474 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 28475 | nullptr |
| 28476 | }; |
| 28477 | |
| 28478 | extern const TargetRegisterClass ZPR4Strided_with_dsub_in_FPR64_loRegClass = { |
| 28479 | &AArch64MCRegisterClasses[ZPR4Strided_with_dsub_in_FPR64_loRegClassID], |
| 28480 | ZPR4Strided_with_dsub_in_FPR64_loSubClassMask, |
| 28481 | SuperRegIdxSeqs + 5, |
| 28482 | LaneBitmask(0x3800077FF800102F), |
| 28483 | 0, |
| 28484 | false, |
| 28485 | 0x00, /* TSFlags */ |
| 28486 | true, /* HasDisjunctSubRegs */ |
| 28487 | true, /* CoveredBySubRegs */ |
| 28488 | ZPR4Strided_with_dsub_in_FPR64_loSuperclasses, 4, |
| 28489 | nullptr |
| 28490 | }; |
| 28491 | |
| 28492 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2RegClass = { |
| 28493 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul2RegClassID], |
| 28494 | ZPR4Strided_with_zsub0_in_ZPRMul2SubClassMask, |
| 28495 | SuperRegIdxSeqs + 5, |
| 28496 | LaneBitmask(0x3800077FF800102F), |
| 28497 | 0, |
| 28498 | false, |
| 28499 | 0x00, /* TSFlags */ |
| 28500 | true, /* HasDisjunctSubRegs */ |
| 28501 | true, /* CoveredBySubRegs */ |
| 28502 | ZPR4Strided_with_zsub0_in_ZPRMul2Superclasses, 3, |
| 28503 | nullptr |
| 28504 | }; |
| 28505 | |
| 28506 | extern const TargetRegisterClass ZPR4Strided_with_zsub1_in_ZPR_KRegClass = { |
| 28507 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub1_in_ZPR_KRegClassID], |
| 28508 | ZPR4Strided_with_zsub1_in_ZPR_KSubClassMask, |
| 28509 | SuperRegIdxSeqs + 5, |
| 28510 | LaneBitmask(0x3800077FF800102F), |
| 28511 | 0, |
| 28512 | false, |
| 28513 | 0x00, /* TSFlags */ |
| 28514 | true, /* HasDisjunctSubRegs */ |
| 28515 | true, /* CoveredBySubRegs */ |
| 28516 | ZPR4Strided_with_zsub1_in_ZPR_KSuperclasses, 3, |
| 28517 | nullptr |
| 28518 | }; |
| 28519 | |
| 28520 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClass = { |
| 28521 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID], |
| 28522 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask, |
| 28523 | SuperRegIdxSeqs + 5, |
| 28524 | LaneBitmask(0x3800077FF800102F), |
| 28525 | 0, |
| 28526 | false, |
| 28527 | 0x00, /* TSFlags */ |
| 28528 | true, /* HasDisjunctSubRegs */ |
| 28529 | true, /* CoveredBySubRegs */ |
| 28530 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses, 3, |
| 28531 | nullptr |
| 28532 | }; |
| 28533 | |
| 28534 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass = { |
| 28535 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClassID], |
| 28536 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSubClassMask, |
| 28537 | SuperRegIdxSeqs + 5, |
| 28538 | LaneBitmask(0x3800077FF800102F), |
| 28539 | 0, |
| 28540 | false, |
| 28541 | 0x00, /* TSFlags */ |
| 28542 | true, /* HasDisjunctSubRegs */ |
| 28543 | true, /* CoveredBySubRegs */ |
| 28544 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KSuperclasses, 6, |
| 28545 | nullptr |
| 28546 | }; |
| 28547 | |
| 28548 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28549 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28550 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28551 | SuperRegIdxSeqs + 5, |
| 28552 | LaneBitmask(0x3800077FF800102F), |
| 28553 | 0, |
| 28554 | false, |
| 28555 | 0x00, /* TSFlags */ |
| 28556 | true, /* HasDisjunctSubRegs */ |
| 28557 | true, /* CoveredBySubRegs */ |
| 28558 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 11, |
| 28559 | nullptr |
| 28560 | }; |
| 28561 | |
| 28562 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28563 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28564 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28565 | SuperRegIdxSeqs + 5, |
| 28566 | LaneBitmask(0x3800077FF800102F), |
| 28567 | 0, |
| 28568 | false, |
| 28569 | 0x00, /* TSFlags */ |
| 28570 | true, /* HasDisjunctSubRegs */ |
| 28571 | true, /* CoveredBySubRegs */ |
| 28572 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 22, |
| 28573 | nullptr |
| 28574 | }; |
| 28575 | |
| 28576 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 28577 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 28578 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 28579 | SuperRegIdxSeqs + 5, |
| 28580 | LaneBitmask(0x3800077FF800102F), |
| 28581 | 0, |
| 28582 | false, |
| 28583 | 0x00, /* TSFlags */ |
| 28584 | true, /* HasDisjunctSubRegs */ |
| 28585 | true, /* CoveredBySubRegs */ |
| 28586 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 6, |
| 28587 | nullptr |
| 28588 | }; |
| 28589 | |
| 28590 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 28591 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 28592 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 28593 | SuperRegIdxSeqs + 5, |
| 28594 | LaneBitmask(0x3800077FF800102F), |
| 28595 | 0, |
| 28596 | false, |
| 28597 | 0x00, /* TSFlags */ |
| 28598 | true, /* HasDisjunctSubRegs */ |
| 28599 | true, /* CoveredBySubRegs */ |
| 28600 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 18, |
| 28601 | nullptr |
| 28602 | }; |
| 28603 | |
| 28604 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 28605 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 28606 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 28607 | SuperRegIdxSeqs + 5, |
| 28608 | LaneBitmask(0x3800077FF800102F), |
| 28609 | 0, |
| 28610 | false, |
| 28611 | 0x00, /* TSFlags */ |
| 28612 | true, /* HasDisjunctSubRegs */ |
| 28613 | true, /* CoveredBySubRegs */ |
| 28614 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses, 4, |
| 28615 | nullptr |
| 28616 | }; |
| 28617 | |
| 28618 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28619 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28620 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28621 | SuperRegIdxSeqs + 5, |
| 28622 | LaneBitmask(0x3800077FF800102F), |
| 28623 | 0, |
| 28624 | false, |
| 28625 | 0x00, /* TSFlags */ |
| 28626 | true, /* HasDisjunctSubRegs */ |
| 28627 | true, /* CoveredBySubRegs */ |
| 28628 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 6, |
| 28629 | nullptr |
| 28630 | }; |
| 28631 | |
| 28632 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28633 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28634 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28635 | SuperRegIdxSeqs + 5, |
| 28636 | LaneBitmask(0x3800077FF800102F), |
| 28637 | 0, |
| 28638 | false, |
| 28639 | 0x00, /* TSFlags */ |
| 28640 | true, /* HasDisjunctSubRegs */ |
| 28641 | true, /* CoveredBySubRegs */ |
| 28642 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 12, |
| 28643 | nullptr |
| 28644 | }; |
| 28645 | |
| 28646 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 28647 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 28648 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 28649 | SuperRegIdxSeqs + 5, |
| 28650 | LaneBitmask(0x3800077FF800102F), |
| 28651 | 0, |
| 28652 | false, |
| 28653 | 0x00, /* TSFlags */ |
| 28654 | true, /* HasDisjunctSubRegs */ |
| 28655 | true, /* CoveredBySubRegs */ |
| 28656 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 6, |
| 28657 | nullptr |
| 28658 | }; |
| 28659 | |
| 28660 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 28661 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 28662 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 28663 | SuperRegIdxSeqs + 5, |
| 28664 | LaneBitmask(0x3800077FF800102F), |
| 28665 | 0, |
| 28666 | false, |
| 28667 | 0x00, /* TSFlags */ |
| 28668 | true, /* HasDisjunctSubRegs */ |
| 28669 | true, /* CoveredBySubRegs */ |
| 28670 | ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 14, |
| 28671 | nullptr |
| 28672 | }; |
| 28673 | |
| 28674 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = { |
| 28675 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClassID], |
| 28676 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4SubClassMask, |
| 28677 | SuperRegIdxSeqs + 5, |
| 28678 | LaneBitmask(0x3800077FF800102F), |
| 28679 | 0, |
| 28680 | false, |
| 28681 | 0x00, /* TSFlags */ |
| 28682 | true, /* HasDisjunctSubRegs */ |
| 28683 | true, /* CoveredBySubRegs */ |
| 28684 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4Superclasses, 4, |
| 28685 | nullptr |
| 28686 | }; |
| 28687 | |
| 28688 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass = { |
| 28689 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClassID], |
| 28690 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSubClassMask, |
| 28691 | SuperRegIdxSeqs + 5, |
| 28692 | LaneBitmask(0x3800077FF800102F), |
| 28693 | 0, |
| 28694 | false, |
| 28695 | 0x00, /* TSFlags */ |
| 28696 | true, /* HasDisjunctSubRegs */ |
| 28697 | true, /* CoveredBySubRegs */ |
| 28698 | ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KSuperclasses, 6, |
| 28699 | nullptr |
| 28700 | }; |
| 28701 | |
| 28702 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28703 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28704 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28705 | SuperRegIdxSeqs + 5, |
| 28706 | LaneBitmask(0x3800077FF800102F), |
| 28707 | 0, |
| 28708 | false, |
| 28709 | 0x00, /* TSFlags */ |
| 28710 | true, /* HasDisjunctSubRegs */ |
| 28711 | true, /* CoveredBySubRegs */ |
| 28712 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 4, |
| 28713 | nullptr |
| 28714 | }; |
| 28715 | |
| 28716 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 28717 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 28718 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 28719 | SuperRegIdxSeqs + 5, |
| 28720 | LaneBitmask(0x3800077FF800102F), |
| 28721 | 0, |
| 28722 | false, |
| 28723 | 0x00, /* TSFlags */ |
| 28724 | true, /* HasDisjunctSubRegs */ |
| 28725 | true, /* CoveredBySubRegs */ |
| 28726 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 7, |
| 28727 | nullptr |
| 28728 | }; |
| 28729 | |
| 28730 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 28731 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 28732 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 28733 | SuperRegIdxSeqs + 5, |
| 28734 | LaneBitmask(0x3800077FF800102F), |
| 28735 | 0, |
| 28736 | false, |
| 28737 | 0x00, /* TSFlags */ |
| 28738 | true, /* HasDisjunctSubRegs */ |
| 28739 | true, /* CoveredBySubRegs */ |
| 28740 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 8, |
| 28741 | nullptr |
| 28742 | }; |
| 28743 | |
| 28744 | extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 28745 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 28746 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 28747 | SuperRegIdxSeqs + 5, |
| 28748 | LaneBitmask(0x3800077FF800102F), |
| 28749 | 0, |
| 28750 | false, |
| 28751 | 0x00, /* TSFlags */ |
| 28752 | true, /* HasDisjunctSubRegs */ |
| 28753 | true, /* CoveredBySubRegs */ |
| 28754 | ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 9, |
| 28755 | nullptr |
| 28756 | }; |
| 28757 | |
| 28758 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 28759 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 28760 | ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 28761 | SuperRegIdxSeqs + 5, |
| 28762 | LaneBitmask(0x3800077FF800102F), |
| 28763 | 0, |
| 28764 | false, |
| 28765 | 0x00, /* TSFlags */ |
| 28766 | true, /* HasDisjunctSubRegs */ |
| 28767 | true, /* CoveredBySubRegs */ |
| 28768 | ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 4, |
| 28769 | nullptr |
| 28770 | }; |
| 28771 | |
| 28772 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 28773 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 28774 | ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 28775 | SuperRegIdxSeqs + 5, |
| 28776 | LaneBitmask(0x3800077FF800102F), |
| 28777 | 0, |
| 28778 | false, |
| 28779 | 0x00, /* TSFlags */ |
| 28780 | true, /* HasDisjunctSubRegs */ |
| 28781 | true, /* CoveredBySubRegs */ |
| 28782 | ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 5, |
| 28783 | nullptr |
| 28784 | }; |
| 28785 | |
| 28786 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 28787 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 28788 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 28789 | SuperRegIdxSeqs + 5, |
| 28790 | LaneBitmask(0x3800077FF800102F), |
| 28791 | 0, |
| 28792 | false, |
| 28793 | 0x00, /* TSFlags */ |
| 28794 | true, /* HasDisjunctSubRegs */ |
| 28795 | true, /* CoveredBySubRegs */ |
| 28796 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses, 5, |
| 28797 | nullptr |
| 28798 | }; |
| 28799 | |
| 28800 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClass = { |
| 28801 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClassID], |
| 28802 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KSubClassMask, |
| 28803 | SuperRegIdxSeqs + 5, |
| 28804 | LaneBitmask(0x3800077FF800102F), |
| 28805 | 0, |
| 28806 | false, |
| 28807 | 0x00, /* TSFlags */ |
| 28808 | true, /* HasDisjunctSubRegs */ |
| 28809 | true, /* CoveredBySubRegs */ |
| 28810 | ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KSuperclasses, 6, |
| 28811 | nullptr |
| 28812 | }; |
| 28813 | |
| 28814 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClass = { |
| 28815 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClassID], |
| 28816 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2SubClassMask, |
| 28817 | SuperRegIdxSeqs + 5, |
| 28818 | LaneBitmask(0x3800077FF800102F), |
| 28819 | 0, |
| 28820 | false, |
| 28821 | 0x00, /* TSFlags */ |
| 28822 | true, /* HasDisjunctSubRegs */ |
| 28823 | true, /* CoveredBySubRegs */ |
| 28824 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2Superclasses, 19, |
| 28825 | nullptr |
| 28826 | }; |
| 28827 | |
| 28828 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClass = { |
| 28829 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID], |
| 28830 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask, |
| 28831 | SuperRegIdxSeqs + 5, |
| 28832 | LaneBitmask(0x3800077FF800102F), |
| 28833 | 0, |
| 28834 | false, |
| 28835 | 0x00, /* TSFlags */ |
| 28836 | true, /* HasDisjunctSubRegs */ |
| 28837 | true, /* CoveredBySubRegs */ |
| 28838 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 28839 | nullptr |
| 28840 | }; |
| 28841 | |
| 28842 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClass = { |
| 28843 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID], |
| 28844 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4SubClassMask, |
| 28845 | SuperRegIdxSeqs + 5, |
| 28846 | LaneBitmask(0x3800077FF800102F), |
| 28847 | 0, |
| 28848 | false, |
| 28849 | 0x00, /* TSFlags */ |
| 28850 | true, /* HasDisjunctSubRegs */ |
| 28851 | true, /* CoveredBySubRegs */ |
| 28852 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4Superclasses, 7, |
| 28853 | nullptr |
| 28854 | }; |
| 28855 | |
| 28856 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClass = { |
| 28857 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID], |
| 28858 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4SubClassMask, |
| 28859 | SuperRegIdxSeqs + 5, |
| 28860 | LaneBitmask(0x3800077FF800102F), |
| 28861 | 0, |
| 28862 | false, |
| 28863 | 0x00, /* TSFlags */ |
| 28864 | true, /* HasDisjunctSubRegs */ |
| 28865 | true, /* CoveredBySubRegs */ |
| 28866 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4Superclasses, 12, |
| 28867 | nullptr |
| 28868 | }; |
| 28869 | |
| 28870 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = { |
| 28871 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClassID], |
| 28872 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSubClassMask, |
| 28873 | SuperRegIdxSeqs + 5, |
| 28874 | LaneBitmask(0x3800077FF800102F), |
| 28875 | 0, |
| 28876 | false, |
| 28877 | 0x00, /* TSFlags */ |
| 28878 | true, /* HasDisjunctSubRegs */ |
| 28879 | true, /* CoveredBySubRegs */ |
| 28880 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KSuperclasses, 7, |
| 28881 | nullptr |
| 28882 | }; |
| 28883 | |
| 28884 | extern const TargetRegisterClass ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 28885 | &AArch64MCRegisterClasses[ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 28886 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 28887 | SuperRegIdxSeqs + 5, |
| 28888 | LaneBitmask(0x3800077FF800102F), |
| 28889 | 0, |
| 28890 | false, |
| 28891 | 0x00, /* TSFlags */ |
| 28892 | true, /* HasDisjunctSubRegs */ |
| 28893 | true, /* CoveredBySubRegs */ |
| 28894 | ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 28895 | nullptr |
| 28896 | }; |
| 28897 | |
| 28898 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 28899 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 28900 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 28901 | SuperRegIdxSeqs + 5, |
| 28902 | LaneBitmask(0x3800077FF800102F), |
| 28903 | 0, |
| 28904 | false, |
| 28905 | 0x00, /* TSFlags */ |
| 28906 | true, /* HasDisjunctSubRegs */ |
| 28907 | true, /* CoveredBySubRegs */ |
| 28908 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses, 19, |
| 28909 | nullptr |
| 28910 | }; |
| 28911 | |
| 28912 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = { |
| 28913 | &AArch64MCRegisterClasses[ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID], |
| 28914 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask, |
| 28915 | SuperRegIdxSeqs + 5, |
| 28916 | LaneBitmask(0x3800077FF800102F), |
| 28917 | 0, |
| 28918 | false, |
| 28919 | 0x00, /* TSFlags */ |
| 28920 | true, /* HasDisjunctSubRegs */ |
| 28921 | true, /* CoveredBySubRegs */ |
| 28922 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses, 4, |
| 28923 | nullptr |
| 28924 | }; |
| 28925 | |
| 28926 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 28927 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 28928 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 28929 | SuperRegIdxSeqs + 5, |
| 28930 | LaneBitmask(0x3800077FF800102F), |
| 28931 | 0, |
| 28932 | false, |
| 28933 | 0x00, /* TSFlags */ |
| 28934 | true, /* HasDisjunctSubRegs */ |
| 28935 | true, /* CoveredBySubRegs */ |
| 28936 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses, 5, |
| 28937 | nullptr |
| 28938 | }; |
| 28939 | |
| 28940 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 28941 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 28942 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 28943 | SuperRegIdxSeqs + 5, |
| 28944 | LaneBitmask(0x3800077FF800102F), |
| 28945 | 0, |
| 28946 | false, |
| 28947 | 0x00, /* TSFlags */ |
| 28948 | true, /* HasDisjunctSubRegs */ |
| 28949 | true, /* CoveredBySubRegs */ |
| 28950 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 8, |
| 28951 | nullptr |
| 28952 | }; |
| 28953 | |
| 28954 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 28955 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 28956 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 28957 | SuperRegIdxSeqs + 5, |
| 28958 | LaneBitmask(0x3800077FF800102F), |
| 28959 | 0, |
| 28960 | false, |
| 28961 | 0x00, /* TSFlags */ |
| 28962 | true, /* HasDisjunctSubRegs */ |
| 28963 | true, /* CoveredBySubRegs */ |
| 28964 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 9, |
| 28965 | nullptr |
| 28966 | }; |
| 28967 | |
| 28968 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 28969 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 28970 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 28971 | SuperRegIdxSeqs + 5, |
| 28972 | LaneBitmask(0x3800077FF800102F), |
| 28973 | 0, |
| 28974 | false, |
| 28975 | 0x00, /* TSFlags */ |
| 28976 | true, /* HasDisjunctSubRegs */ |
| 28977 | true, /* CoveredBySubRegs */ |
| 28978 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 8, |
| 28979 | nullptr |
| 28980 | }; |
| 28981 | |
| 28982 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 28983 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 28984 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 28985 | SuperRegIdxSeqs + 5, |
| 28986 | LaneBitmask(0x3800077FF800102F), |
| 28987 | 0, |
| 28988 | false, |
| 28989 | 0x00, /* TSFlags */ |
| 28990 | true, /* HasDisjunctSubRegs */ |
| 28991 | true, /* CoveredBySubRegs */ |
| 28992 | ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiSuperclasses, 9, |
| 28993 | nullptr |
| 28994 | }; |
| 28995 | |
| 28996 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 28997 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 28998 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 28999 | SuperRegIdxSeqs + 5, |
| 29000 | LaneBitmask(0x3800077FF800102F), |
| 29001 | 0, |
| 29002 | false, |
| 29003 | 0x00, /* TSFlags */ |
| 29004 | true, /* HasDisjunctSubRegs */ |
| 29005 | true, /* CoveredBySubRegs */ |
| 29006 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 26, |
| 29007 | nullptr |
| 29008 | }; |
| 29009 | |
| 29010 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = { |
| 29011 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClassID], |
| 29012 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7SubClassMask, |
| 29013 | SuperRegIdxSeqs + 5, |
| 29014 | LaneBitmask(0x3800077FF800102F), |
| 29015 | 0, |
| 29016 | false, |
| 29017 | 0x00, /* TSFlags */ |
| 29018 | true, /* HasDisjunctSubRegs */ |
| 29019 | true, /* CoveredBySubRegs */ |
| 29020 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7Superclasses, 27, |
| 29021 | nullptr |
| 29022 | }; |
| 29023 | |
| 29024 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 29025 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 29026 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 29027 | SuperRegIdxSeqs + 5, |
| 29028 | LaneBitmask(0x3800077FF800102F), |
| 29029 | 0, |
| 29030 | false, |
| 29031 | 0x00, /* TSFlags */ |
| 29032 | true, /* HasDisjunctSubRegs */ |
| 29033 | true, /* CoveredBySubRegs */ |
| 29034 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 21, |
| 29035 | nullptr |
| 29036 | }; |
| 29037 | |
| 29038 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 29039 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 29040 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 29041 | SuperRegIdxSeqs + 5, |
| 29042 | LaneBitmask(0x3800077FF800102F), |
| 29043 | 0, |
| 29044 | false, |
| 29045 | 0x00, /* TSFlags */ |
| 29046 | true, /* HasDisjunctSubRegs */ |
| 29047 | true, /* CoveredBySubRegs */ |
| 29048 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 18, |
| 29049 | nullptr |
| 29050 | }; |
| 29051 | |
| 29052 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 29053 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 29054 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 29055 | SuperRegIdxSeqs + 5, |
| 29056 | LaneBitmask(0x3800077FF800102F), |
| 29057 | 0, |
| 29058 | false, |
| 29059 | 0x00, /* TSFlags */ |
| 29060 | true, /* HasDisjunctSubRegs */ |
| 29061 | true, /* CoveredBySubRegs */ |
| 29062 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 21, |
| 29063 | nullptr |
| 29064 | }; |
| 29065 | |
| 29066 | extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClass = { |
| 29067 | &AArch64MCRegisterClasses[ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClassID], |
| 29068 | ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask, |
| 29069 | SuperRegIdxSeqs + 5, |
| 29070 | LaneBitmask(0x3800077FF800102F), |
| 29071 | 0, |
| 29072 | false, |
| 29073 | 0x00, /* TSFlags */ |
| 29074 | true, /* HasDisjunctSubRegs */ |
| 29075 | true, /* CoveredBySubRegs */ |
| 29076 | ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses, 27, |
| 29077 | nullptr |
| 29078 | }; |
| 29079 | |
| 29080 | extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClass = { |
| 29081 | &AArch64MCRegisterClasses[ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClassID], |
| 29082 | ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7SubClassMask, |
| 29083 | SuperRegIdxSeqs + 5, |
| 29084 | LaneBitmask(0x3800077FF800102F), |
| 29085 | 0, |
| 29086 | false, |
| 29087 | 0x00, /* TSFlags */ |
| 29088 | true, /* HasDisjunctSubRegs */ |
| 29089 | true, /* CoveredBySubRegs */ |
| 29090 | ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7Superclasses, 39, |
| 29091 | nullptr |
| 29092 | }; |
| 29093 | |
| 29094 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClass = { |
| 29095 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClassID], |
| 29096 | ZPR4Strided_with_zsub0_in_ZPRMul2_HiSubClassMask, |
| 29097 | SuperRegIdxSeqs + 5, |
| 29098 | LaneBitmask(0x3800077FF800102F), |
| 29099 | 0, |
| 29100 | false, |
| 29101 | 0x00, /* TSFlags */ |
| 29102 | true, /* HasDisjunctSubRegs */ |
| 29103 | true, /* CoveredBySubRegs */ |
| 29104 | ZPR4Strided_with_zsub0_in_ZPRMul2_HiSuperclasses, 8, |
| 29105 | nullptr |
| 29106 | }; |
| 29107 | |
| 29108 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClass = { |
| 29109 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClassID], |
| 29110 | ZPR4Strided_with_zsub0_in_ZPRMul2_LoSubClassMask, |
| 29111 | SuperRegIdxSeqs + 5, |
| 29112 | LaneBitmask(0x3800077FF800102F), |
| 29113 | 0, |
| 29114 | false, |
| 29115 | 0x00, /* TSFlags */ |
| 29116 | true, /* HasDisjunctSubRegs */ |
| 29117 | true, /* CoveredBySubRegs */ |
| 29118 | ZPR4Strided_with_zsub0_in_ZPRMul2_LoSuperclasses, 9, |
| 29119 | nullptr |
| 29120 | }; |
| 29121 | |
| 29122 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul4RegClass = { |
| 29123 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul4RegClassID], |
| 29124 | ZPR4Strided_with_zsub0_in_ZPRMul4SubClassMask, |
| 29125 | SuperRegIdxSeqs + 5, |
| 29126 | LaneBitmask(0x3800077FF800102F), |
| 29127 | 0, |
| 29128 | false, |
| 29129 | 0x00, /* TSFlags */ |
| 29130 | true, /* HasDisjunctSubRegs */ |
| 29131 | true, /* CoveredBySubRegs */ |
| 29132 | ZPR4Strided_with_zsub0_in_ZPRMul4Superclasses, 5, |
| 29133 | nullptr |
| 29134 | }; |
| 29135 | |
| 29136 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = { |
| 29137 | &AArch64MCRegisterClasses[ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID], |
| 29138 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask, |
| 29139 | SuperRegIdxSeqs + 5, |
| 29140 | LaneBitmask(0x3800077FF800102F), |
| 29141 | 0, |
| 29142 | false, |
| 29143 | 0x00, /* TSFlags */ |
| 29144 | true, /* HasDisjunctSubRegs */ |
| 29145 | true, /* CoveredBySubRegs */ |
| 29146 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses, 9, |
| 29147 | nullptr |
| 29148 | }; |
| 29149 | |
| 29150 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClass = { |
| 29151 | &AArch64MCRegisterClasses[ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClassID], |
| 29152 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KSubClassMask, |
| 29153 | SuperRegIdxSeqs + 5, |
| 29154 | LaneBitmask(0x3800077FF800102F), |
| 29155 | 0, |
| 29156 | false, |
| 29157 | 0x00, /* TSFlags */ |
| 29158 | true, /* HasDisjunctSubRegs */ |
| 29159 | true, /* CoveredBySubRegs */ |
| 29160 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KSuperclasses, 7, |
| 29161 | nullptr |
| 29162 | }; |
| 29163 | |
| 29164 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = { |
| 29165 | &AArch64MCRegisterClasses[ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClassID], |
| 29166 | ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2SubClassMask, |
| 29167 | SuperRegIdxSeqs + 5, |
| 29168 | LaneBitmask(0x3800077FF800102F), |
| 29169 | 0, |
| 29170 | false, |
| 29171 | 0x00, /* TSFlags */ |
| 29172 | true, /* HasDisjunctSubRegs */ |
| 29173 | true, /* CoveredBySubRegs */ |
| 29174 | ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2Superclasses, 9, |
| 29175 | nullptr |
| 29176 | }; |
| 29177 | |
| 29178 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = { |
| 29179 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClassID], |
| 29180 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSubClassMask, |
| 29181 | SuperRegIdxSeqs + 5, |
| 29182 | LaneBitmask(0x3800077FF800102F), |
| 29183 | 0, |
| 29184 | false, |
| 29185 | 0x00, /* TSFlags */ |
| 29186 | true, /* HasDisjunctSubRegs */ |
| 29187 | true, /* CoveredBySubRegs */ |
| 29188 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KSuperclasses, 14, |
| 29189 | nullptr |
| 29190 | }; |
| 29191 | |
| 29192 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClass = { |
| 29193 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID], |
| 29194 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask, |
| 29195 | SuperRegIdxSeqs + 5, |
| 29196 | LaneBitmask(0x3800077FF800102F), |
| 29197 | 0, |
| 29198 | false, |
| 29199 | 0x00, /* TSFlags */ |
| 29200 | true, /* HasDisjunctSubRegs */ |
| 29201 | true, /* CoveredBySubRegs */ |
| 29202 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses, 5, |
| 29203 | nullptr |
| 29204 | }; |
| 29205 | |
| 29206 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = { |
| 29207 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID], |
| 29208 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask, |
| 29209 | SuperRegIdxSeqs + 5, |
| 29210 | LaneBitmask(0x3800077FF800102F), |
| 29211 | 0, |
| 29212 | false, |
| 29213 | 0x00, /* TSFlags */ |
| 29214 | true, /* HasDisjunctSubRegs */ |
| 29215 | true, /* CoveredBySubRegs */ |
| 29216 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses, 8, |
| 29217 | nullptr |
| 29218 | }; |
| 29219 | |
| 29220 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = { |
| 29221 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClassID], |
| 29222 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4SubClassMask, |
| 29223 | SuperRegIdxSeqs + 5, |
| 29224 | LaneBitmask(0x3800077FF800102F), |
| 29225 | 0, |
| 29226 | false, |
| 29227 | 0x00, /* TSFlags */ |
| 29228 | true, /* HasDisjunctSubRegs */ |
| 29229 | true, /* CoveredBySubRegs */ |
| 29230 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4Superclasses, 9, |
| 29231 | nullptr |
| 29232 | }; |
| 29233 | |
| 29234 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29235 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29236 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29237 | SuperRegIdxSeqs + 5, |
| 29238 | LaneBitmask(0x3800077FF800102F), |
| 29239 | 0, |
| 29240 | false, |
| 29241 | 0x00, /* TSFlags */ |
| 29242 | true, /* HasDisjunctSubRegs */ |
| 29243 | true, /* CoveredBySubRegs */ |
| 29244 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 22, |
| 29245 | nullptr |
| 29246 | }; |
| 29247 | |
| 29248 | extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = { |
| 29249 | &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClassID], |
| 29250 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 29251 | SuperRegIdxSeqs + 5, |
| 29252 | LaneBitmask(0x3800077FF800102F), |
| 29253 | 0, |
| 29254 | false, |
| 29255 | 0x00, /* TSFlags */ |
| 29256 | true, /* HasDisjunctSubRegs */ |
| 29257 | true, /* CoveredBySubRegs */ |
| 29258 | ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KSuperclasses, 16, |
| 29259 | nullptr |
| 29260 | }; |
| 29261 | |
| 29262 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29263 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29264 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29265 | SuperRegIdxSeqs + 5, |
| 29266 | LaneBitmask(0x3800077FF800102F), |
| 29267 | 0, |
| 29268 | false, |
| 29269 | 0x00, /* TSFlags */ |
| 29270 | true, /* HasDisjunctSubRegs */ |
| 29271 | true, /* CoveredBySubRegs */ |
| 29272 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses, 12, |
| 29273 | nullptr |
| 29274 | }; |
| 29275 | |
| 29276 | extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass = { |
| 29277 | &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClassID], |
| 29278 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 29279 | SuperRegIdxSeqs + 5, |
| 29280 | LaneBitmask(0x3800077FF800102F), |
| 29281 | 0, |
| 29282 | false, |
| 29283 | 0x00, /* TSFlags */ |
| 29284 | true, /* HasDisjunctSubRegs */ |
| 29285 | true, /* CoveredBySubRegs */ |
| 29286 | ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KSuperclasses, 13, |
| 29287 | nullptr |
| 29288 | }; |
| 29289 | |
| 29290 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29291 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29292 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29293 | SuperRegIdxSeqs + 5, |
| 29294 | LaneBitmask(0x3800077FF800102F), |
| 29295 | 0, |
| 29296 | false, |
| 29297 | 0x00, /* TSFlags */ |
| 29298 | true, /* HasDisjunctSubRegs */ |
| 29299 | true, /* CoveredBySubRegs */ |
| 29300 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSuperclasses, 8, |
| 29301 | nullptr |
| 29302 | }; |
| 29303 | |
| 29304 | extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClass = { |
| 29305 | &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClassID], |
| 29306 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KSubClassMask, |
| 29307 | SuperRegIdxSeqs + 5, |
| 29308 | LaneBitmask(0x3800077FF800102F), |
| 29309 | 0, |
| 29310 | false, |
| 29311 | 0x00, /* TSFlags */ |
| 29312 | true, /* HasDisjunctSubRegs */ |
| 29313 | true, /* CoveredBySubRegs */ |
| 29314 | ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KSuperclasses, 11, |
| 29315 | nullptr |
| 29316 | }; |
| 29317 | |
| 29318 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClass = { |
| 29319 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClassID], |
| 29320 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4SubClassMask, |
| 29321 | SuperRegIdxSeqs + 5, |
| 29322 | LaneBitmask(0x3800077FF800102F), |
| 29323 | 0, |
| 29324 | false, |
| 29325 | 0x00, /* TSFlags */ |
| 29326 | true, /* HasDisjunctSubRegs */ |
| 29327 | true, /* CoveredBySubRegs */ |
| 29328 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4Superclasses, 24, |
| 29329 | nullptr |
| 29330 | }; |
| 29331 | |
| 29332 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClass = { |
| 29333 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClassID], |
| 29334 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4SubClassMask, |
| 29335 | SuperRegIdxSeqs + 5, |
| 29336 | LaneBitmask(0x3800077FF800102F), |
| 29337 | 0, |
| 29338 | false, |
| 29339 | 0x00, /* TSFlags */ |
| 29340 | true, /* HasDisjunctSubRegs */ |
| 29341 | true, /* CoveredBySubRegs */ |
| 29342 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4Superclasses, 23, |
| 29343 | nullptr |
| 29344 | }; |
| 29345 | |
| 29346 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass = { |
| 29347 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClassID], |
| 29348 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSubClassMask, |
| 29349 | SuperRegIdxSeqs + 5, |
| 29350 | LaneBitmask(0x3800077FF800102F), |
| 29351 | 0, |
| 29352 | false, |
| 29353 | 0x00, /* TSFlags */ |
| 29354 | true, /* HasDisjunctSubRegs */ |
| 29355 | true, /* CoveredBySubRegs */ |
| 29356 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bSuperclasses, 33, |
| 29357 | nullptr |
| 29358 | }; |
| 29359 | |
| 29360 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClass = { |
| 29361 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClassID], |
| 29362 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4SubClassMask, |
| 29363 | SuperRegIdxSeqs + 5, |
| 29364 | LaneBitmask(0x3800077FF800102F), |
| 29365 | 0, |
| 29366 | false, |
| 29367 | 0x00, /* TSFlags */ |
| 29368 | true, /* HasDisjunctSubRegs */ |
| 29369 | true, /* CoveredBySubRegs */ |
| 29370 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4Superclasses, 31, |
| 29371 | nullptr |
| 29372 | }; |
| 29373 | |
| 29374 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = { |
| 29375 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClassID], |
| 29376 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiSubClassMask, |
| 29377 | SuperRegIdxSeqs + 5, |
| 29378 | LaneBitmask(0x3800077FF800102F), |
| 29379 | 0, |
| 29380 | false, |
| 29381 | 0x00, /* TSFlags */ |
| 29382 | true, /* HasDisjunctSubRegs */ |
| 29383 | true, /* CoveredBySubRegs */ |
| 29384 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiSuperclasses, 5, |
| 29385 | nullptr |
| 29386 | }; |
| 29387 | |
| 29388 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 29389 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 29390 | ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 29391 | SuperRegIdxSeqs + 5, |
| 29392 | LaneBitmask(0x3800077FF800102F), |
| 29393 | 0, |
| 29394 | false, |
| 29395 | 0x00, /* TSFlags */ |
| 29396 | true, /* HasDisjunctSubRegs */ |
| 29397 | true, /* CoveredBySubRegs */ |
| 29398 | ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 13, |
| 29399 | nullptr |
| 29400 | }; |
| 29401 | |
| 29402 | extern const TargetRegisterClass ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = { |
| 29403 | &AArch64MCRegisterClasses[ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClassID], |
| 29404 | ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4SubClassMask, |
| 29405 | SuperRegIdxSeqs + 5, |
| 29406 | LaneBitmask(0x3800077FF800102F), |
| 29407 | 0, |
| 29408 | false, |
| 29409 | 0x00, /* TSFlags */ |
| 29410 | true, /* HasDisjunctSubRegs */ |
| 29411 | true, /* CoveredBySubRegs */ |
| 29412 | ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4Superclasses, 14, |
| 29413 | nullptr |
| 29414 | }; |
| 29415 | |
| 29416 | extern const TargetRegisterClass ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = { |
| 29417 | &AArch64MCRegisterClasses[ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClassID], |
| 29418 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSubClassMask, |
| 29419 | SuperRegIdxSeqs + 5, |
| 29420 | LaneBitmask(0x3800077FF800102F), |
| 29421 | 0, |
| 29422 | false, |
| 29423 | 0x00, /* TSFlags */ |
| 29424 | true, /* HasDisjunctSubRegs */ |
| 29425 | true, /* CoveredBySubRegs */ |
| 29426 | ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KSuperclasses, 29, |
| 29427 | nullptr |
| 29428 | }; |
| 29429 | |
| 29430 | extern const TargetRegisterClass ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = { |
| 29431 | &AArch64MCRegisterClasses[ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClassID], |
| 29432 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSubClassMask, |
| 29433 | SuperRegIdxSeqs + 5, |
| 29434 | LaneBitmask(0x3800077FF800102F), |
| 29435 | 0, |
| 29436 | false, |
| 29437 | 0x00, /* TSFlags */ |
| 29438 | true, /* HasDisjunctSubRegs */ |
| 29439 | true, /* CoveredBySubRegs */ |
| 29440 | ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiSuperclasses, 23, |
| 29441 | nullptr |
| 29442 | }; |
| 29443 | |
| 29444 | extern const TargetRegisterClass ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 29445 | &AArch64MCRegisterClasses[ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 29446 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 29447 | SuperRegIdxSeqs + 5, |
| 29448 | LaneBitmask(0x3800077FF800102F), |
| 29449 | 0, |
| 29450 | false, |
| 29451 | 0x00, /* TSFlags */ |
| 29452 | true, /* HasDisjunctSubRegs */ |
| 29453 | true, /* CoveredBySubRegs */ |
| 29454 | ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses, 24, |
| 29455 | nullptr |
| 29456 | }; |
| 29457 | |
| 29458 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = { |
| 29459 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClassID], |
| 29460 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4SubClassMask, |
| 29461 | SuperRegIdxSeqs + 5, |
| 29462 | LaneBitmask(0x3800077FF800102F), |
| 29463 | 0, |
| 29464 | false, |
| 29465 | 0x00, /* TSFlags */ |
| 29466 | true, /* HasDisjunctSubRegs */ |
| 29467 | true, /* CoveredBySubRegs */ |
| 29468 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4Superclasses, 12, |
| 29469 | nullptr |
| 29470 | }; |
| 29471 | |
| 29472 | extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 29473 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 29474 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 29475 | SuperRegIdxSeqs + 5, |
| 29476 | LaneBitmask(0x3800077FF800102F), |
| 29477 | 0, |
| 29478 | false, |
| 29479 | 0x00, /* TSFlags */ |
| 29480 | true, /* HasDisjunctSubRegs */ |
| 29481 | true, /* CoveredBySubRegs */ |
| 29482 | ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 21, |
| 29483 | nullptr |
| 29484 | }; |
| 29485 | |
| 29486 | extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 29487 | &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 29488 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 29489 | SuperRegIdxSeqs + 5, |
| 29490 | LaneBitmask(0x3800077FF800102F), |
| 29491 | 0, |
| 29492 | false, |
| 29493 | 0x00, /* TSFlags */ |
| 29494 | true, /* HasDisjunctSubRegs */ |
| 29495 | true, /* CoveredBySubRegs */ |
| 29496 | ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 15, |
| 29497 | nullptr |
| 29498 | }; |
| 29499 | |
| 29500 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29501 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29502 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29503 | SuperRegIdxSeqs + 5, |
| 29504 | LaneBitmask(0x3800077FF800102F), |
| 29505 | 0, |
| 29506 | false, |
| 29507 | 0x00, /* TSFlags */ |
| 29508 | true, /* HasDisjunctSubRegs */ |
| 29509 | true, /* CoveredBySubRegs */ |
| 29510 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bSuperclasses, 40, |
| 29511 | nullptr |
| 29512 | }; |
| 29513 | |
| 29514 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29515 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29516 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29517 | SuperRegIdxSeqs + 5, |
| 29518 | LaneBitmask(0x3800077FF800102F), |
| 29519 | 0, |
| 29520 | false, |
| 29521 | 0x00, /* TSFlags */ |
| 29522 | true, /* HasDisjunctSubRegs */ |
| 29523 | true, /* CoveredBySubRegs */ |
| 29524 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bSuperclasses, 34, |
| 29525 | nullptr |
| 29526 | }; |
| 29527 | |
| 29528 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass = { |
| 29529 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClassID], |
| 29530 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSubClassMask, |
| 29531 | SuperRegIdxSeqs + 5, |
| 29532 | LaneBitmask(0x3800077FF800102F), |
| 29533 | 0, |
| 29534 | false, |
| 29535 | 0x00, /* TSFlags */ |
| 29536 | true, /* HasDisjunctSubRegs */ |
| 29537 | true, /* CoveredBySubRegs */ |
| 29538 | ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bSuperclasses, 40, |
| 29539 | nullptr |
| 29540 | }; |
| 29541 | |
| 29542 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = { |
| 29543 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClassID], |
| 29544 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSubClassMask, |
| 29545 | SuperRegIdxSeqs + 5, |
| 29546 | LaneBitmask(0x3800077FF800102F), |
| 29547 | 0, |
| 29548 | false, |
| 29549 | 0x00, /* TSFlags */ |
| 29550 | true, /* HasDisjunctSubRegs */ |
| 29551 | true, /* CoveredBySubRegs */ |
| 29552 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiSuperclasses, 11, |
| 29553 | nullptr |
| 29554 | }; |
| 29555 | |
| 29556 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClass = { |
| 29557 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClassID], |
| 29558 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiSubClassMask, |
| 29559 | SuperRegIdxSeqs + 5, |
| 29560 | LaneBitmask(0x3800077FF800102F), |
| 29561 | 0, |
| 29562 | false, |
| 29563 | 0x00, /* TSFlags */ |
| 29564 | true, /* HasDisjunctSubRegs */ |
| 29565 | true, /* CoveredBySubRegs */ |
| 29566 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiSuperclasses, 10, |
| 29567 | nullptr |
| 29568 | }; |
| 29569 | |
| 29570 | extern const TargetRegisterClass ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = { |
| 29571 | &AArch64MCRegisterClasses[ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClassID], |
| 29572 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4SubClassMask, |
| 29573 | SuperRegIdxSeqs + 5, |
| 29574 | LaneBitmask(0x3800077FF800102F), |
| 29575 | 0, |
| 29576 | false, |
| 29577 | 0x00, /* TSFlags */ |
| 29578 | true, /* HasDisjunctSubRegs */ |
| 29579 | true, /* CoveredBySubRegs */ |
| 29580 | ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4Superclasses, 16, |
| 29581 | nullptr |
| 29582 | }; |
| 29583 | |
| 29584 | extern const TargetRegisterClass GPR64x8ClassRegClass = { |
| 29585 | &AArch64MCRegisterClasses[GPR64x8ClassRegClassID], |
| 29586 | GPR64x8ClassSubClassMask, |
| 29587 | SuperRegIdxSeqs + 5, |
| 29588 | LaneBitmask(0x01FFF800000000C0), |
| 29589 | 0, |
| 29590 | false, |
| 29591 | 0x00, /* TSFlags */ |
| 29592 | true, /* HasDisjunctSubRegs */ |
| 29593 | true, /* CoveredBySubRegs */ |
| 29594 | nullptr, 0, |
| 29595 | nullptr |
| 29596 | }; |
| 29597 | |
| 29598 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass = { |
| 29599 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID], |
| 29600 | GPR64x8Class_with_x8sub_0_in_GPR64noipSubClassMask, |
| 29601 | SuperRegIdxSeqs + 5, |
| 29602 | LaneBitmask(0x01FFF800000000C0), |
| 29603 | 0, |
| 29604 | false, |
| 29605 | 0x00, /* TSFlags */ |
| 29606 | true, /* HasDisjunctSubRegs */ |
| 29607 | true, /* CoveredBySubRegs */ |
| 29608 | GPR64x8Class_with_x8sub_0_in_GPR64noipSuperclasses, 1, |
| 29609 | nullptr |
| 29610 | }; |
| 29611 | |
| 29612 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { |
| 29613 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], |
| 29614 | GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, |
| 29615 | SuperRegIdxSeqs + 5, |
| 29616 | LaneBitmask(0x01FFF800000000C0), |
| 29617 | 0, |
| 29618 | false, |
| 29619 | 0x00, /* TSFlags */ |
| 29620 | true, /* HasDisjunctSubRegs */ |
| 29621 | true, /* CoveredBySubRegs */ |
| 29622 | GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, 1, |
| 29623 | nullptr |
| 29624 | }; |
| 29625 | |
| 29626 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29627 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29628 | GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29629 | SuperRegIdxSeqs + 5, |
| 29630 | LaneBitmask(0x01FFF800000000C0), |
| 29631 | 0, |
| 29632 | false, |
| 29633 | 0x00, /* TSFlags */ |
| 29634 | true, /* HasDisjunctSubRegs */ |
| 29635 | true, /* CoveredBySubRegs */ |
| 29636 | GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 1, |
| 29637 | nullptr |
| 29638 | }; |
| 29639 | |
| 29640 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29641 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29642 | GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29643 | SuperRegIdxSeqs + 5, |
| 29644 | LaneBitmask(0x01FFF800000000C0), |
| 29645 | 0, |
| 29646 | false, |
| 29647 | 0x00, /* TSFlags */ |
| 29648 | true, /* HasDisjunctSubRegs */ |
| 29649 | true, /* CoveredBySubRegs */ |
| 29650 | GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 1, |
| 29651 | nullptr |
| 29652 | }; |
| 29653 | |
| 29654 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { |
| 29655 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], |
| 29656 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, |
| 29657 | SuperRegIdxSeqs + 5, |
| 29658 | LaneBitmask(0x01FFF800000000C0), |
| 29659 | 0, |
| 29660 | false, |
| 29661 | 0x00, /* TSFlags */ |
| 29662 | true, /* HasDisjunctSubRegs */ |
| 29663 | true, /* CoveredBySubRegs */ |
| 29664 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, 3, |
| 29665 | nullptr |
| 29666 | }; |
| 29667 | |
| 29668 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29669 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29670 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29671 | SuperRegIdxSeqs + 5, |
| 29672 | LaneBitmask(0x01FFF800000000C0), |
| 29673 | 0, |
| 29674 | false, |
| 29675 | 0x00, /* TSFlags */ |
| 29676 | true, /* HasDisjunctSubRegs */ |
| 29677 | true, /* CoveredBySubRegs */ |
| 29678 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 3, |
| 29679 | nullptr |
| 29680 | }; |
| 29681 | |
| 29682 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29683 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29684 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29685 | SuperRegIdxSeqs + 5, |
| 29686 | LaneBitmask(0x01FFF800000000C0), |
| 29687 | 0, |
| 29688 | false, |
| 29689 | 0x00, /* TSFlags */ |
| 29690 | true, /* HasDisjunctSubRegs */ |
| 29691 | true, /* CoveredBySubRegs */ |
| 29692 | GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 3, |
| 29693 | nullptr |
| 29694 | }; |
| 29695 | |
| 29696 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass = { |
| 29697 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID], |
| 29698 | GPR64x8Class_with_x8sub_0_in_tcGPR64SubClassMask, |
| 29699 | SuperRegIdxSeqs + 5, |
| 29700 | LaneBitmask(0x01FFF800000000C0), |
| 29701 | 0, |
| 29702 | false, |
| 29703 | 0x00, /* TSFlags */ |
| 29704 | true, /* HasDisjunctSubRegs */ |
| 29705 | true, /* CoveredBySubRegs */ |
| 29706 | GPR64x8Class_with_x8sub_0_in_tcGPR64Superclasses, 1, |
| 29707 | nullptr |
| 29708 | }; |
| 29709 | |
| 29710 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29711 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29712 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29713 | SuperRegIdxSeqs + 5, |
| 29714 | LaneBitmask(0x01FFF800000000C0), |
| 29715 | 0, |
| 29716 | false, |
| 29717 | 0x00, /* TSFlags */ |
| 29718 | true, /* HasDisjunctSubRegs */ |
| 29719 | true, /* CoveredBySubRegs */ |
| 29720 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 3, |
| 29721 | nullptr |
| 29722 | }; |
| 29723 | |
| 29724 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29725 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29726 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29727 | SuperRegIdxSeqs + 5, |
| 29728 | LaneBitmask(0x01FFF800000000C0), |
| 29729 | 0, |
| 29730 | false, |
| 29731 | 0x00, /* TSFlags */ |
| 29732 | true, /* HasDisjunctSubRegs */ |
| 29733 | true, /* CoveredBySubRegs */ |
| 29734 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 3, |
| 29735 | nullptr |
| 29736 | }; |
| 29737 | |
| 29738 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29739 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29740 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29741 | SuperRegIdxSeqs + 5, |
| 29742 | LaneBitmask(0x01FFF800000000C0), |
| 29743 | 0, |
| 29744 | false, |
| 29745 | 0x00, /* TSFlags */ |
| 29746 | true, /* HasDisjunctSubRegs */ |
| 29747 | true, /* CoveredBySubRegs */ |
| 29748 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 3, |
| 29749 | nullptr |
| 29750 | }; |
| 29751 | |
| 29752 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { |
| 29753 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], |
| 29754 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, |
| 29755 | SuperRegIdxSeqs + 5, |
| 29756 | LaneBitmask(0x01FFF800000000C0), |
| 29757 | 0, |
| 29758 | false, |
| 29759 | 0x00, /* TSFlags */ |
| 29760 | true, /* HasDisjunctSubRegs */ |
| 29761 | true, /* CoveredBySubRegs */ |
| 29762 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, 3, |
| 29763 | nullptr |
| 29764 | }; |
| 29765 | |
| 29766 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29767 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29768 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29769 | SuperRegIdxSeqs + 5, |
| 29770 | LaneBitmask(0x01FFF800000000C0), |
| 29771 | 0, |
| 29772 | false, |
| 29773 | 0x00, /* TSFlags */ |
| 29774 | true, /* HasDisjunctSubRegs */ |
| 29775 | true, /* CoveredBySubRegs */ |
| 29776 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 3, |
| 29777 | nullptr |
| 29778 | }; |
| 29779 | |
| 29780 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29781 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29782 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29783 | SuperRegIdxSeqs + 5, |
| 29784 | LaneBitmask(0x01FFF800000000C0), |
| 29785 | 0, |
| 29786 | false, |
| 29787 | 0x00, /* TSFlags */ |
| 29788 | true, /* HasDisjunctSubRegs */ |
| 29789 | true, /* CoveredBySubRegs */ |
| 29790 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 3, |
| 29791 | nullptr |
| 29792 | }; |
| 29793 | |
| 29794 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClass = { |
| 29795 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClassID], |
| 29796 | GPR64x8Class_with_x8sub_0_in_tcGPRnotx16SubClassMask, |
| 29797 | SuperRegIdxSeqs + 5, |
| 29798 | LaneBitmask(0x01FFF800000000C0), |
| 29799 | 0, |
| 29800 | false, |
| 29801 | 0x00, /* TSFlags */ |
| 29802 | true, /* HasDisjunctSubRegs */ |
| 29803 | true, /* CoveredBySubRegs */ |
| 29804 | GPR64x8Class_with_x8sub_0_in_tcGPRnotx16Superclasses, 3, |
| 29805 | nullptr |
| 29806 | }; |
| 29807 | |
| 29808 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass = { |
| 29809 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID], |
| 29810 | GPR64x8Class_with_x8sub_1_in_tcGPR64SubClassMask, |
| 29811 | SuperRegIdxSeqs + 5, |
| 29812 | LaneBitmask(0x01FFF800000000C0), |
| 29813 | 0, |
| 29814 | false, |
| 29815 | 0x00, /* TSFlags */ |
| 29816 | true, /* HasDisjunctSubRegs */ |
| 29817 | true, /* CoveredBySubRegs */ |
| 29818 | GPR64x8Class_with_x8sub_1_in_tcGPR64Superclasses, 2, |
| 29819 | nullptr |
| 29820 | }; |
| 29821 | |
| 29822 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29823 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29824 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29825 | SuperRegIdxSeqs + 5, |
| 29826 | LaneBitmask(0x01FFF800000000C0), |
| 29827 | 0, |
| 29828 | false, |
| 29829 | 0x00, /* TSFlags */ |
| 29830 | true, /* HasDisjunctSubRegs */ |
| 29831 | true, /* CoveredBySubRegs */ |
| 29832 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 7, |
| 29833 | nullptr |
| 29834 | }; |
| 29835 | |
| 29836 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29837 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29838 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29839 | SuperRegIdxSeqs + 5, |
| 29840 | LaneBitmask(0x01FFF800000000C0), |
| 29841 | 0, |
| 29842 | false, |
| 29843 | 0x00, /* TSFlags */ |
| 29844 | true, /* HasDisjunctSubRegs */ |
| 29845 | true, /* CoveredBySubRegs */ |
| 29846 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 29847 | nullptr |
| 29848 | }; |
| 29849 | |
| 29850 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29851 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29852 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29853 | SuperRegIdxSeqs + 5, |
| 29854 | LaneBitmask(0x01FFF800000000C0), |
| 29855 | 0, |
| 29856 | false, |
| 29857 | 0x00, /* TSFlags */ |
| 29858 | true, /* HasDisjunctSubRegs */ |
| 29859 | true, /* CoveredBySubRegs */ |
| 29860 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 29861 | nullptr |
| 29862 | }; |
| 29863 | |
| 29864 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29865 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29866 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29867 | SuperRegIdxSeqs + 5, |
| 29868 | LaneBitmask(0x01FFF800000000C0), |
| 29869 | 0, |
| 29870 | false, |
| 29871 | 0x00, /* TSFlags */ |
| 29872 | true, /* HasDisjunctSubRegs */ |
| 29873 | true, /* CoveredBySubRegs */ |
| 29874 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 29875 | nullptr |
| 29876 | }; |
| 29877 | |
| 29878 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { |
| 29879 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], |
| 29880 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, |
| 29881 | SuperRegIdxSeqs + 5, |
| 29882 | LaneBitmask(0x01FFF800000000C0), |
| 29883 | 0, |
| 29884 | false, |
| 29885 | 0x00, /* TSFlags */ |
| 29886 | true, /* HasDisjunctSubRegs */ |
| 29887 | true, /* CoveredBySubRegs */ |
| 29888 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, 7, |
| 29889 | nullptr |
| 29890 | }; |
| 29891 | |
| 29892 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29893 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29894 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29895 | SuperRegIdxSeqs + 5, |
| 29896 | LaneBitmask(0x01FFF800000000C0), |
| 29897 | 0, |
| 29898 | false, |
| 29899 | 0x00, /* TSFlags */ |
| 29900 | true, /* HasDisjunctSubRegs */ |
| 29901 | true, /* CoveredBySubRegs */ |
| 29902 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 7, |
| 29903 | nullptr |
| 29904 | }; |
| 29905 | |
| 29906 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29907 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29908 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29909 | SuperRegIdxSeqs + 5, |
| 29910 | LaneBitmask(0x01FFF800000000C0), |
| 29911 | 0, |
| 29912 | false, |
| 29913 | 0x00, /* TSFlags */ |
| 29914 | true, /* HasDisjunctSubRegs */ |
| 29915 | true, /* CoveredBySubRegs */ |
| 29916 | GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 29917 | nullptr |
| 29918 | }; |
| 29919 | |
| 29920 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29921 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29922 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29923 | SuperRegIdxSeqs + 5, |
| 29924 | LaneBitmask(0x01FFF800000000C0), |
| 29925 | 0, |
| 29926 | false, |
| 29927 | 0x00, /* TSFlags */ |
| 29928 | true, /* HasDisjunctSubRegs */ |
| 29929 | true, /* CoveredBySubRegs */ |
| 29930 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 5, |
| 29931 | nullptr |
| 29932 | }; |
| 29933 | |
| 29934 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29935 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29936 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29937 | SuperRegIdxSeqs + 5, |
| 29938 | LaneBitmask(0x01FFF800000000C0), |
| 29939 | 0, |
| 29940 | false, |
| 29941 | 0x00, /* TSFlags */ |
| 29942 | true, /* HasDisjunctSubRegs */ |
| 29943 | true, /* CoveredBySubRegs */ |
| 29944 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 5, |
| 29945 | nullptr |
| 29946 | }; |
| 29947 | |
| 29948 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClass = { |
| 29949 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClassID], |
| 29950 | GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17SubClassMask, |
| 29951 | SuperRegIdxSeqs + 5, |
| 29952 | LaneBitmask(0x01FFF800000000C0), |
| 29953 | 0, |
| 29954 | false, |
| 29955 | 0x00, /* TSFlags */ |
| 29956 | true, /* HasDisjunctSubRegs */ |
| 29957 | true, /* CoveredBySubRegs */ |
| 29958 | GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17Superclasses, 5, |
| 29959 | nullptr |
| 29960 | }; |
| 29961 | |
| 29962 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 29963 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 29964 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 29965 | SuperRegIdxSeqs + 5, |
| 29966 | LaneBitmask(0x01FFF800000000C0), |
| 29967 | 0, |
| 29968 | false, |
| 29969 | 0x00, /* TSFlags */ |
| 29970 | true, /* HasDisjunctSubRegs */ |
| 29971 | true, /* CoveredBySubRegs */ |
| 29972 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 7, |
| 29973 | nullptr |
| 29974 | }; |
| 29975 | |
| 29976 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 29977 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 29978 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 29979 | SuperRegIdxSeqs + 5, |
| 29980 | LaneBitmask(0x01FFF800000000C0), |
| 29981 | 0, |
| 29982 | false, |
| 29983 | 0x00, /* TSFlags */ |
| 29984 | true, /* HasDisjunctSubRegs */ |
| 29985 | true, /* CoveredBySubRegs */ |
| 29986 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 29987 | nullptr |
| 29988 | }; |
| 29989 | |
| 29990 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClass = { |
| 29991 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClassID], |
| 29992 | GPR64x8Class_with_x8sub_2_in_tcGPRnotx16SubClassMask, |
| 29993 | SuperRegIdxSeqs + 5, |
| 29994 | LaneBitmask(0x01FFF800000000C0), |
| 29995 | 0, |
| 29996 | false, |
| 29997 | 0x00, /* TSFlags */ |
| 29998 | true, /* HasDisjunctSubRegs */ |
| 29999 | true, /* CoveredBySubRegs */ |
| 30000 | GPR64x8Class_with_x8sub_2_in_tcGPRnotx16Superclasses, 5, |
| 30001 | nullptr |
| 30002 | }; |
| 30003 | |
| 30004 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30005 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30006 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30007 | SuperRegIdxSeqs + 5, |
| 30008 | LaneBitmask(0x01FFF800000000C0), |
| 30009 | 0, |
| 30010 | false, |
| 30011 | 0x00, /* TSFlags */ |
| 30012 | true, /* HasDisjunctSubRegs */ |
| 30013 | true, /* CoveredBySubRegs */ |
| 30014 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 7, |
| 30015 | nullptr |
| 30016 | }; |
| 30017 | |
| 30018 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30019 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30020 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30021 | SuperRegIdxSeqs + 5, |
| 30022 | LaneBitmask(0x01FFF800000000C0), |
| 30023 | 0, |
| 30024 | false, |
| 30025 | 0x00, /* TSFlags */ |
| 30026 | true, /* HasDisjunctSubRegs */ |
| 30027 | true, /* CoveredBySubRegs */ |
| 30028 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 15, |
| 30029 | nullptr |
| 30030 | }; |
| 30031 | |
| 30032 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30033 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30034 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30035 | SuperRegIdxSeqs + 5, |
| 30036 | LaneBitmask(0x01FFF800000000C0), |
| 30037 | 0, |
| 30038 | false, |
| 30039 | 0x00, /* TSFlags */ |
| 30040 | true, /* HasDisjunctSubRegs */ |
| 30041 | true, /* CoveredBySubRegs */ |
| 30042 | GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 11, |
| 30043 | nullptr |
| 30044 | }; |
| 30045 | |
| 30046 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 30047 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 30048 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 30049 | SuperRegIdxSeqs + 5, |
| 30050 | LaneBitmask(0x01FFF800000000C0), |
| 30051 | 0, |
| 30052 | false, |
| 30053 | 0x00, /* TSFlags */ |
| 30054 | true, /* HasDisjunctSubRegs */ |
| 30055 | true, /* CoveredBySubRegs */ |
| 30056 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 15, |
| 30057 | nullptr |
| 30058 | }; |
| 30059 | |
| 30060 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30061 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30062 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30063 | SuperRegIdxSeqs + 5, |
| 30064 | LaneBitmask(0x01FFF800000000C0), |
| 30065 | 0, |
| 30066 | false, |
| 30067 | 0x00, /* TSFlags */ |
| 30068 | true, /* HasDisjunctSubRegs */ |
| 30069 | true, /* CoveredBySubRegs */ |
| 30070 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 15, |
| 30071 | nullptr |
| 30072 | }; |
| 30073 | |
| 30074 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { |
| 30075 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], |
| 30076 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, |
| 30077 | SuperRegIdxSeqs + 5, |
| 30078 | LaneBitmask(0x01FFF800000000C0), |
| 30079 | 0, |
| 30080 | false, |
| 30081 | 0x00, /* TSFlags */ |
| 30082 | true, /* HasDisjunctSubRegs */ |
| 30083 | true, /* CoveredBySubRegs */ |
| 30084 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, 11, |
| 30085 | nullptr |
| 30086 | }; |
| 30087 | |
| 30088 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30089 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30090 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30091 | SuperRegIdxSeqs + 5, |
| 30092 | LaneBitmask(0x01FFF800000000C0), |
| 30093 | 0, |
| 30094 | false, |
| 30095 | 0x00, /* TSFlags */ |
| 30096 | true, /* HasDisjunctSubRegs */ |
| 30097 | true, /* CoveredBySubRegs */ |
| 30098 | GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 11, |
| 30099 | nullptr |
| 30100 | }; |
| 30101 | |
| 30102 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClass = { |
| 30103 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClassID], |
| 30104 | GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17SubClassMask, |
| 30105 | SuperRegIdxSeqs + 5, |
| 30106 | LaneBitmask(0x01FFF800000000C0), |
| 30107 | 0, |
| 30108 | false, |
| 30109 | 0x00, /* TSFlags */ |
| 30110 | true, /* HasDisjunctSubRegs */ |
| 30111 | true, /* CoveredBySubRegs */ |
| 30112 | GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17Superclasses, 11, |
| 30113 | nullptr |
| 30114 | }; |
| 30115 | |
| 30116 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30117 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30118 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30119 | SuperRegIdxSeqs + 5, |
| 30120 | LaneBitmask(0x01FFF800000000C0), |
| 30121 | 0, |
| 30122 | false, |
| 30123 | 0x00, /* TSFlags */ |
| 30124 | true, /* HasDisjunctSubRegs */ |
| 30125 | true, /* CoveredBySubRegs */ |
| 30126 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 15, |
| 30127 | nullptr |
| 30128 | }; |
| 30129 | |
| 30130 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30131 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30132 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30133 | SuperRegIdxSeqs + 5, |
| 30134 | LaneBitmask(0x01FFF800000000C0), |
| 30135 | 0, |
| 30136 | false, |
| 30137 | 0x00, /* TSFlags */ |
| 30138 | true, /* HasDisjunctSubRegs */ |
| 30139 | true, /* CoveredBySubRegs */ |
| 30140 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 11, |
| 30141 | nullptr |
| 30142 | }; |
| 30143 | |
| 30144 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30145 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30146 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30147 | SuperRegIdxSeqs + 5, |
| 30148 | LaneBitmask(0x01FFF800000000C0), |
| 30149 | 0, |
| 30150 | false, |
| 30151 | 0x00, /* TSFlags */ |
| 30152 | true, /* HasDisjunctSubRegs */ |
| 30153 | true, /* CoveredBySubRegs */ |
| 30154 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 15, |
| 30155 | nullptr |
| 30156 | }; |
| 30157 | |
| 30158 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClass = { |
| 30159 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClassID], |
| 30160 | GPR64x8Class_with_x8sub_4_in_tcGPRnotx16SubClassMask, |
| 30161 | SuperRegIdxSeqs + 5, |
| 30162 | LaneBitmask(0x01FFF800000000C0), |
| 30163 | 0, |
| 30164 | false, |
| 30165 | 0x00, /* TSFlags */ |
| 30166 | true, /* HasDisjunctSubRegs */ |
| 30167 | true, /* CoveredBySubRegs */ |
| 30168 | GPR64x8Class_with_x8sub_4_in_tcGPRnotx16Superclasses, 11, |
| 30169 | nullptr |
| 30170 | }; |
| 30171 | |
| 30172 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30173 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30174 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30175 | SuperRegIdxSeqs + 5, |
| 30176 | LaneBitmask(0x01FFF800000000C0), |
| 30177 | 0, |
| 30178 | false, |
| 30179 | 0x00, /* TSFlags */ |
| 30180 | true, /* HasDisjunctSubRegs */ |
| 30181 | true, /* CoveredBySubRegs */ |
| 30182 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 23, |
| 30183 | nullptr |
| 30184 | }; |
| 30185 | |
| 30186 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30187 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30188 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30189 | SuperRegIdxSeqs + 5, |
| 30190 | LaneBitmask(0x01FFF800000000C0), |
| 30191 | 0, |
| 30192 | false, |
| 30193 | 0x00, /* TSFlags */ |
| 30194 | true, /* HasDisjunctSubRegs */ |
| 30195 | true, /* CoveredBySubRegs */ |
| 30196 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 31, |
| 30197 | nullptr |
| 30198 | }; |
| 30199 | |
| 30200 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { |
| 30201 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], |
| 30202 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, |
| 30203 | SuperRegIdxSeqs + 5, |
| 30204 | LaneBitmask(0x01FFF800000000C0), |
| 30205 | 0, |
| 30206 | false, |
| 30207 | 0x00, /* TSFlags */ |
| 30208 | true, /* HasDisjunctSubRegs */ |
| 30209 | true, /* CoveredBySubRegs */ |
| 30210 | GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, 23, |
| 30211 | nullptr |
| 30212 | }; |
| 30213 | |
| 30214 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClass = { |
| 30215 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClassID], |
| 30216 | GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17SubClassMask, |
| 30217 | SuperRegIdxSeqs + 5, |
| 30218 | LaneBitmask(0x01FFF800000000C0), |
| 30219 | 0, |
| 30220 | false, |
| 30221 | 0x00, /* TSFlags */ |
| 30222 | true, /* HasDisjunctSubRegs */ |
| 30223 | true, /* CoveredBySubRegs */ |
| 30224 | GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17Superclasses, 23, |
| 30225 | nullptr |
| 30226 | }; |
| 30227 | |
| 30228 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClass = { |
| 30229 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClassID], |
| 30230 | GPR64x8Class_with_x8sub_6_in_tcGPRnotx16SubClassMask, |
| 30231 | SuperRegIdxSeqs + 5, |
| 30232 | LaneBitmask(0x01FFF800000000C0), |
| 30233 | 0, |
| 30234 | false, |
| 30235 | 0x00, /* TSFlags */ |
| 30236 | true, /* HasDisjunctSubRegs */ |
| 30237 | true, /* CoveredBySubRegs */ |
| 30238 | GPR64x8Class_with_x8sub_6_in_tcGPRnotx16Superclasses, 23, |
| 30239 | nullptr |
| 30240 | }; |
| 30241 | |
| 30242 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClass = { |
| 30243 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClassID], |
| 30244 | GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17SubClassMask, |
| 30245 | SuperRegIdxSeqs + 5, |
| 30246 | LaneBitmask(0x01FFF800000000C0), |
| 30247 | 0, |
| 30248 | false, |
| 30249 | 0x00, /* TSFlags */ |
| 30250 | true, /* HasDisjunctSubRegs */ |
| 30251 | true, /* CoveredBySubRegs */ |
| 30252 | GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17Superclasses, 47, |
| 30253 | nullptr |
| 30254 | }; |
| 30255 | |
| 30256 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32argRegClass = { |
| 30257 | &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_GPR32argRegClassID], |
| 30258 | GPR64x8Class_with_sub_32_in_GPR32argSubClassMask, |
| 30259 | SuperRegIdxSeqs + 5, |
| 30260 | LaneBitmask(0x01FFF800000000C0), |
| 30261 | 0, |
| 30262 | false, |
| 30263 | 0x00, /* TSFlags */ |
| 30264 | true, /* HasDisjunctSubRegs */ |
| 30265 | true, /* CoveredBySubRegs */ |
| 30266 | GPR64x8Class_with_sub_32_in_GPR32argSuperclasses, 48, |
| 30267 | nullptr |
| 30268 | }; |
| 30269 | |
| 30270 | extern const TargetRegisterClass MPR32RegClass = { |
| 30271 | &AArch64MCRegisterClasses[MPR32RegClassID], |
| 30272 | MPR32SubClassMask, |
| 30273 | SuperRegIdxSeqs + 47, |
| 30274 | LaneBitmask(0x0000000000006C00), |
| 30275 | 0, |
| 30276 | false, |
| 30277 | 0x00, /* TSFlags */ |
| 30278 | true, /* HasDisjunctSubRegs */ |
| 30279 | false, /* CoveredBySubRegs */ |
| 30280 | nullptr, 0, |
| 30281 | nullptr |
| 30282 | }; |
| 30283 | |
| 30284 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64argRegClass = { |
| 30285 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID], |
| 30286 | GPR64x8Class_with_x8sub_2_in_GPR64argSubClassMask, |
| 30287 | SuperRegIdxSeqs + 5, |
| 30288 | LaneBitmask(0x01FFF800000000C0), |
| 30289 | 0, |
| 30290 | false, |
| 30291 | 0x00, /* TSFlags */ |
| 30292 | true, /* HasDisjunctSubRegs */ |
| 30293 | true, /* CoveredBySubRegs */ |
| 30294 | GPR64x8Class_with_x8sub_2_in_GPR64argSuperclasses, 49, |
| 30295 | nullptr |
| 30296 | }; |
| 30297 | |
| 30298 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { |
| 30299 | &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], |
| 30300 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, |
| 30301 | SuperRegIdxSeqs + 5, |
| 30302 | LaneBitmask(0x01FFF800000000C0), |
| 30303 | 0, |
| 30304 | false, |
| 30305 | 0x00, /* TSFlags */ |
| 30306 | true, /* HasDisjunctSubRegs */ |
| 30307 | true, /* CoveredBySubRegs */ |
| 30308 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, 12, |
| 30309 | nullptr |
| 30310 | }; |
| 30311 | |
| 30312 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30313 | &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30314 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30315 | SuperRegIdxSeqs + 5, |
| 30316 | LaneBitmask(0x01FFF800000000C0), |
| 30317 | 0, |
| 30318 | false, |
| 30319 | 0x00, /* TSFlags */ |
| 30320 | true, /* HasDisjunctSubRegs */ |
| 30321 | true, /* CoveredBySubRegs */ |
| 30322 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 24, |
| 30323 | nullptr |
| 30324 | }; |
| 30325 | |
| 30326 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { |
| 30327 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], |
| 30328 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, |
| 30329 | SuperRegIdxSeqs + 5, |
| 30330 | LaneBitmask(0x01FFF800000000C0), |
| 30331 | 0, |
| 30332 | false, |
| 30333 | 0x00, /* TSFlags */ |
| 30334 | true, /* HasDisjunctSubRegs */ |
| 30335 | true, /* CoveredBySubRegs */ |
| 30336 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, 12, |
| 30337 | nullptr |
| 30338 | }; |
| 30339 | |
| 30340 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30341 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30342 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30343 | SuperRegIdxSeqs + 5, |
| 30344 | LaneBitmask(0x01FFF800000000C0), |
| 30345 | 0, |
| 30346 | false, |
| 30347 | 0x00, /* TSFlags */ |
| 30348 | true, /* HasDisjunctSubRegs */ |
| 30349 | true, /* CoveredBySubRegs */ |
| 30350 | GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 48, |
| 30351 | nullptr |
| 30352 | }; |
| 30353 | |
| 30354 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30355 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30356 | GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30357 | SuperRegIdxSeqs + 5, |
| 30358 | LaneBitmask(0x01FFF800000000C0), |
| 30359 | 0, |
| 30360 | false, |
| 30361 | 0x00, /* TSFlags */ |
| 30362 | true, /* HasDisjunctSubRegs */ |
| 30363 | true, /* CoveredBySubRegs */ |
| 30364 | GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 49, |
| 30365 | nullptr |
| 30366 | }; |
| 30367 | |
| 30368 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64argRegClass = { |
| 30369 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID], |
| 30370 | GPR64x8Class_with_x8sub_4_in_GPR64argSubClassMask, |
| 30371 | SuperRegIdxSeqs + 5, |
| 30372 | LaneBitmask(0x01FFF800000000C0), |
| 30373 | 0, |
| 30374 | false, |
| 30375 | 0x00, /* TSFlags */ |
| 30376 | true, /* HasDisjunctSubRegs */ |
| 30377 | true, /* CoveredBySubRegs */ |
| 30378 | GPR64x8Class_with_x8sub_4_in_GPR64argSuperclasses, 50, |
| 30379 | nullptr |
| 30380 | }; |
| 30381 | |
| 30382 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30383 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30384 | GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30385 | SuperRegIdxSeqs + 5, |
| 30386 | LaneBitmask(0x01FFF800000000C0), |
| 30387 | 0, |
| 30388 | false, |
| 30389 | 0x00, /* TSFlags */ |
| 30390 | true, /* HasDisjunctSubRegs */ |
| 30391 | true, /* CoveredBySubRegs */ |
| 30392 | GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 50, |
| 30393 | nullptr |
| 30394 | }; |
| 30395 | |
| 30396 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30397 | &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30398 | GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30399 | SuperRegIdxSeqs + 5, |
| 30400 | LaneBitmask(0x01FFF800000000C0), |
| 30401 | 0, |
| 30402 | false, |
| 30403 | 0x00, /* TSFlags */ |
| 30404 | true, /* HasDisjunctSubRegs */ |
| 30405 | true, /* CoveredBySubRegs */ |
| 30406 | GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 51, |
| 30407 | nullptr |
| 30408 | }; |
| 30409 | |
| 30410 | extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30411 | &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30412 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30413 | SuperRegIdxSeqs + 5, |
| 30414 | LaneBitmask(0x01FFF800000000C0), |
| 30415 | 0, |
| 30416 | false, |
| 30417 | 0x00, /* TSFlags */ |
| 30418 | true, /* HasDisjunctSubRegs */ |
| 30419 | true, /* CoveredBySubRegs */ |
| 30420 | GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 50, |
| 30421 | nullptr |
| 30422 | }; |
| 30423 | |
| 30424 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClass = { |
| 30425 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClassID], |
| 30426 | GPR64x8Class_with_x8sub_0_in_tcGPRx16x17SubClassMask, |
| 30427 | SuperRegIdxSeqs + 5, |
| 30428 | LaneBitmask(0x01FFF800000000C0), |
| 30429 | 0, |
| 30430 | false, |
| 30431 | 0x00, /* TSFlags */ |
| 30432 | true, /* HasDisjunctSubRegs */ |
| 30433 | true, /* CoveredBySubRegs */ |
| 30434 | GPR64x8Class_with_x8sub_0_in_tcGPRx16x17Superclasses, 24, |
| 30435 | nullptr |
| 30436 | }; |
| 30437 | |
| 30438 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30439 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30440 | GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30441 | SuperRegIdxSeqs + 5, |
| 30442 | LaneBitmask(0x01FFF800000000C0), |
| 30443 | 0, |
| 30444 | false, |
| 30445 | 0x00, /* TSFlags */ |
| 30446 | true, /* HasDisjunctSubRegs */ |
| 30447 | true, /* CoveredBySubRegs */ |
| 30448 | GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 52, |
| 30449 | nullptr |
| 30450 | }; |
| 30451 | |
| 30452 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClass = { |
| 30453 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClassID], |
| 30454 | GPR64x8Class_with_x8sub_2_in_tcGPRx16x17SubClassMask, |
| 30455 | SuperRegIdxSeqs + 5, |
| 30456 | LaneBitmask(0x01FFF800000000C0), |
| 30457 | 0, |
| 30458 | false, |
| 30459 | 0x00, /* TSFlags */ |
| 30460 | true, /* HasDisjunctSubRegs */ |
| 30461 | true, /* CoveredBySubRegs */ |
| 30462 | GPR64x8Class_with_x8sub_2_in_tcGPRx16x17Superclasses, 25, |
| 30463 | nullptr |
| 30464 | }; |
| 30465 | |
| 30466 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { |
| 30467 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], |
| 30468 | GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, |
| 30469 | SuperRegIdxSeqs + 5, |
| 30470 | LaneBitmask(0x01FFF800000000C0), |
| 30471 | 0, |
| 30472 | false, |
| 30473 | 0x00, /* TSFlags */ |
| 30474 | true, /* HasDisjunctSubRegs */ |
| 30475 | true, /* CoveredBySubRegs */ |
| 30476 | GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, 52, |
| 30477 | nullptr |
| 30478 | }; |
| 30479 | |
| 30480 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClass = { |
| 30481 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClassID], |
| 30482 | GPR64x8Class_with_x8sub_4_in_tcGPRx16x17SubClassMask, |
| 30483 | SuperRegIdxSeqs + 5, |
| 30484 | LaneBitmask(0x01FFF800000000C0), |
| 30485 | 0, |
| 30486 | false, |
| 30487 | 0x00, /* TSFlags */ |
| 30488 | true, /* HasDisjunctSubRegs */ |
| 30489 | true, /* CoveredBySubRegs */ |
| 30490 | GPR64x8Class_with_x8sub_4_in_tcGPRx16x17Superclasses, 26, |
| 30491 | nullptr |
| 30492 | }; |
| 30493 | |
| 30494 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64argRegClass = { |
| 30495 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID], |
| 30496 | GPR64x8Class_with_x8sub_6_in_GPR64argSubClassMask, |
| 30497 | SuperRegIdxSeqs + 5, |
| 30498 | LaneBitmask(0x01FFF800000000C0), |
| 30499 | 0, |
| 30500 | false, |
| 30501 | 0x00, /* TSFlags */ |
| 30502 | true, /* HasDisjunctSubRegs */ |
| 30503 | true, /* CoveredBySubRegs */ |
| 30504 | GPR64x8Class_with_x8sub_6_in_GPR64argSuperclasses, 51, |
| 30505 | nullptr |
| 30506 | }; |
| 30507 | |
| 30508 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClass = { |
| 30509 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClassID], |
| 30510 | GPR64x8Class_with_x8sub_6_in_tcGPRx16x17SubClassMask, |
| 30511 | SuperRegIdxSeqs + 5, |
| 30512 | LaneBitmask(0x01FFF800000000C0), |
| 30513 | 0, |
| 30514 | false, |
| 30515 | 0x00, /* TSFlags */ |
| 30516 | true, /* HasDisjunctSubRegs */ |
| 30517 | true, /* CoveredBySubRegs */ |
| 30518 | GPR64x8Class_with_x8sub_6_in_tcGPRx16x17Superclasses, 26, |
| 30519 | nullptr |
| 30520 | }; |
| 30521 | |
| 30522 | extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass = { |
| 30523 | &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID], |
| 30524 | GPR64x8Class_with_x8sub_7_in_FIXED_REGSSubClassMask, |
| 30525 | SuperRegIdxSeqs + 5, |
| 30526 | LaneBitmask(0x01FFF800000000C0), |
| 30527 | 0, |
| 30528 | false, |
| 30529 | 0x00, /* TSFlags */ |
| 30530 | true, /* HasDisjunctSubRegs */ |
| 30531 | true, /* CoveredBySubRegs */ |
| 30532 | GPR64x8Class_with_x8sub_7_in_FIXED_REGSSuperclasses, 16, |
| 30533 | nullptr |
| 30534 | }; |
| 30535 | |
| 30536 | extern const TargetRegisterClass ZTRRegClass = { |
| 30537 | &AArch64MCRegisterClasses[ZTRRegClassID], |
| 30538 | ZTRSubClassMask, |
| 30539 | SuperRegIdxSeqs + 5, |
| 30540 | LaneBitmask(0x0000000000000001), |
| 30541 | 0, |
| 30542 | false, |
| 30543 | 0x00, /* TSFlags */ |
| 30544 | false, /* HasDisjunctSubRegs */ |
| 30545 | false, /* CoveredBySubRegs */ |
| 30546 | nullptr, 0, |
| 30547 | nullptr |
| 30548 | }; |
| 30549 | |
| 30550 | extern const TargetRegisterClass MPR16RegClass = { |
| 30551 | &AArch64MCRegisterClasses[MPR16RegClassID], |
| 30552 | MPR16SubClassMask, |
| 30553 | SuperRegIdxSeqs + 33, |
| 30554 | LaneBitmask(0x000000000007EC00), |
| 30555 | 0, |
| 30556 | false, |
| 30557 | 0x00, /* TSFlags */ |
| 30558 | true, /* HasDisjunctSubRegs */ |
| 30559 | false, /* CoveredBySubRegs */ |
| 30560 | nullptr, 0, |
| 30561 | nullptr |
| 30562 | }; |
| 30563 | |
| 30564 | extern const TargetRegisterClass MPRRegClass = { |
| 30565 | &AArch64MCRegisterClasses[MPRRegClassID], |
| 30566 | MPRSubClassMask, |
| 30567 | SuperRegIdxSeqs + 5, |
| 30568 | LaneBitmask(0x0000000007FFEC00), |
| 30569 | 0, |
| 30570 | false, |
| 30571 | 0x00, /* TSFlags */ |
| 30572 | true, /* HasDisjunctSubRegs */ |
| 30573 | false, /* CoveredBySubRegs */ |
| 30574 | nullptr, 0, |
| 30575 | nullptr |
| 30576 | }; |
| 30577 | |
| 30578 | extern const TargetRegisterClass MPR8RegClass = { |
| 30579 | &AArch64MCRegisterClasses[MPR8RegClassID], |
| 30580 | MPR8SubClassMask, |
| 30581 | SuperRegIdxSeqs + 31, |
| 30582 | LaneBitmask(0x0000000007FFEC00), |
| 30583 | 0, |
| 30584 | false, |
| 30585 | 0x00, /* TSFlags */ |
| 30586 | true, /* HasDisjunctSubRegs */ |
| 30587 | false, /* CoveredBySubRegs */ |
| 30588 | nullptr, 0, |
| 30589 | nullptr |
| 30590 | }; |
| 30591 | |
| 30592 | } // end namespace AArch64 |
| 30593 | |
| 30594 | namespace { |
| 30595 | const TargetRegisterClass *const RegisterClasses[] = { |
| 30596 | &AArch64::W_HI_DummyRCRegClass, |
| 30597 | &AArch64::B_HI_DummyRCRegClass, |
| 30598 | &AArch64::D_HI_DummyRCRegClass, |
| 30599 | &AArch64::H_HI_DummyRCRegClass, |
| 30600 | &AArch64::Q_HI_DummyRCRegClass, |
| 30601 | &AArch64::S_HI_DummyRCRegClass, |
| 30602 | &AArch64::FPR8RegClass, |
| 30603 | &AArch64::FPR16RegClass, |
| 30604 | &AArch64::PPRorPNRRegClass, |
| 30605 | &AArch64::FPR16_loRegClass, |
| 30606 | &AArch64::PNRRegClass, |
| 30607 | &AArch64::PPRRegClass, |
| 30608 | &AArch64::PNR_3bRegClass, |
| 30609 | &AArch64::PNR_p8to15RegClass, |
| 30610 | &AArch64::PPRMul2RegClass, |
| 30611 | &AArch64::PPR_3bRegClass, |
| 30612 | &AArch64::PPR_p8to15RegClass, |
| 30613 | &AArch64::PPRMul2_and_PPR_3bRegClass, |
| 30614 | &AArch64::PPRMul2_and_PPR_p8to15RegClass, |
| 30615 | &AArch64::PPR2RegClass, |
| 30616 | &AArch64::PPR2Mul2RegClass, |
| 30617 | &AArch64::PPR2_with_psub1_in_PPRMul2RegClass, |
| 30618 | &AArch64::PPR2_with_psub1_in_PPR_3bRegClass, |
| 30619 | &AArch64::PPR2_with_psub1_in_PPR_p8to15RegClass, |
| 30620 | &AArch64::PPR2_with_psub_in_PNR_3bRegClass, |
| 30621 | &AArch64::PPR2_with_psub_in_PNR_p8to15RegClass, |
| 30622 | &AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass, |
| 30623 | &AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass, |
| 30624 | &AArch64::PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClass, |
| 30625 | &AArch64::PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClass, |
| 30626 | &AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass, |
| 30627 | &AArch64::PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass, |
| 30628 | &AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClass, |
| 30629 | &AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClass, |
| 30630 | &AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass, |
| 30631 | &AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass, |
| 30632 | &AArch64::PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass, |
| 30633 | &AArch64::PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass, |
| 30634 | &AArch64::GPR32allRegClass, |
| 30635 | &AArch64::FPR32RegClass, |
| 30636 | &AArch64::GPR32RegClass, |
| 30637 | &AArch64::GPR32spRegClass, |
| 30638 | &AArch64::GPR32commonRegClass, |
| 30639 | &AArch64::FPR32_with_hsub_in_FPR16_loRegClass, |
| 30640 | &AArch64::GPR32argRegClass, |
| 30641 | &AArch64::MatrixIndexGPR32_12_15RegClass, |
| 30642 | &AArch64::MatrixIndexGPR32_8_11RegClass, |
| 30643 | &AArch64::CCRRegClass, |
| 30644 | &AArch64::GPR32sponlyRegClass, |
| 30645 | &AArch64::WSeqPairsClassRegClass, |
| 30646 | &AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClass, |
| 30647 | &AArch64::WSeqPairsClass_with_sube32_in_GPR32argRegClass, |
| 30648 | &AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass, |
| 30649 | &AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass, |
| 30650 | &AArch64::GPR64allRegClass, |
| 30651 | &AArch64::FPR64RegClass, |
| 30652 | &AArch64::GPR64RegClass, |
| 30653 | &AArch64::GPR64spRegClass, |
| 30654 | &AArch64::GPR64commonRegClass, |
| 30655 | &AArch64::GPR64noipRegClass, |
| 30656 | &AArch64::GPR64common_and_GPR64noipRegClass, |
| 30657 | &AArch64::tcGPR64RegClass, |
| 30658 | &AArch64::tcGPRnotx16RegClass, |
| 30659 | &AArch64::tcGPRnotx16x17RegClass, |
| 30660 | &AArch64::FPR64_loRegClass, |
| 30661 | &AArch64::GPR64argRegClass, |
| 30662 | &AArch64::FIXED_REGSRegClass, |
| 30663 | &AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, |
| 30664 | &AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 30665 | &AArch64::FIXED_REGS_with_sub_32RegClass, |
| 30666 | &AArch64::tcGPRx16x17RegClass, |
| 30667 | &AArch64::FIXED_REGS_and_GPR64RegClass, |
| 30668 | &AArch64::GPR64sponlyRegClass, |
| 30669 | &AArch64::tcGPRx17RegClass, |
| 30670 | &AArch64::DDRegClass, |
| 30671 | &AArch64::DD_with_dsub0_in_FPR64_loRegClass, |
| 30672 | &AArch64::DD_with_dsub1_in_FPR64_loRegClass, |
| 30673 | &AArch64::XSeqPairsClassRegClass, |
| 30674 | &AArch64::DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass, |
| 30675 | &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, |
| 30676 | &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, |
| 30677 | &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, |
| 30678 | &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, |
| 30679 | &AArch64::XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClass, |
| 30680 | &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, |
| 30681 | &AArch64::XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClass, |
| 30682 | &AArch64::XSeqPairsClass_with_sube64_in_GPR64argRegClass, |
| 30683 | &AArch64::XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, |
| 30684 | &AArch64::XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 30685 | &AArch64::XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClass, |
| 30686 | &AArch64::XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass, |
| 30687 | &AArch64::FPR128RegClass, |
| 30688 | &AArch64::ZPRRegClass, |
| 30689 | &AArch64::FPR128_loRegClass, |
| 30690 | &AArch64::MPR128RegClass, |
| 30691 | &AArch64::ZPRMul2RegClass, |
| 30692 | &AArch64::ZPR_4bRegClass, |
| 30693 | &AArch64::FPR128_0to7RegClass, |
| 30694 | &AArch64::ZPRMul2_HiRegClass, |
| 30695 | &AArch64::ZPRMul2_LoRegClass, |
| 30696 | &AArch64::ZPRMul4RegClass, |
| 30697 | &AArch64::ZPR_3bRegClass, |
| 30698 | &AArch64::ZPR_KRegClass, |
| 30699 | &AArch64::ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30700 | &AArch64::ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30701 | &AArch64::ZPRMul2_and_ZPR_3bRegClass, |
| 30702 | &AArch64::ZPRMul2_and_ZPR_KRegClass, |
| 30703 | &AArch64::ZPRMul4_and_ZPR_3bRegClass, |
| 30704 | &AArch64::ZPRMul4_and_ZPR_KRegClass, |
| 30705 | &AArch64::DDDRegClass, |
| 30706 | &AArch64::DDD_with_dsub0_in_FPR64_loRegClass, |
| 30707 | &AArch64::DDD_with_dsub1_in_FPR64_loRegClass, |
| 30708 | &AArch64::DDD_with_dsub2_in_FPR64_loRegClass, |
| 30709 | &AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass, |
| 30710 | &AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass, |
| 30711 | &AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass, |
| 30712 | &AArch64::DDDDRegClass, |
| 30713 | &AArch64::DDDD_with_dsub0_in_FPR64_loRegClass, |
| 30714 | &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, |
| 30715 | &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, |
| 30716 | &AArch64::DDDD_with_dsub3_in_FPR64_loRegClass, |
| 30717 | &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass, |
| 30718 | &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, |
| 30719 | &AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, |
| 30720 | &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, |
| 30721 | &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, |
| 30722 | &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, |
| 30723 | &AArch64::QQRegClass, |
| 30724 | &AArch64::ZPR2RegClass, |
| 30725 | &AArch64::ZPR2StridedOrContiguousRegClass, |
| 30726 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass, |
| 30727 | &AArch64::QQ_with_dsub1_in_FPR64_loRegClass, |
| 30728 | &AArch64::QQ_with_qsub0_in_FPR128_loRegClass, |
| 30729 | &AArch64::ZPR2Mul2RegClass, |
| 30730 | &AArch64::ZPR2StridedRegClass, |
| 30731 | &AArch64::ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClass, |
| 30732 | &AArch64::ZPR2_with_dsub1_in_FPR64_loRegClass, |
| 30733 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2RegClass, |
| 30734 | &AArch64::ZPR2_with_zsub_in_FPR128_loRegClass, |
| 30735 | &AArch64::QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClass, |
| 30736 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClass, |
| 30737 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass, |
| 30738 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass, |
| 30739 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass, |
| 30740 | &AArch64::ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass, |
| 30741 | &AArch64::QQ_with_qsub0_in_FPR128_0to7RegClass, |
| 30742 | &AArch64::QQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30743 | &AArch64::ZPR2Mul2_HiRegClass, |
| 30744 | &AArch64::ZPR2Mul2_LoRegClass, |
| 30745 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30746 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClass, |
| 30747 | &AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClass, |
| 30748 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2RegClass, |
| 30749 | &AArch64::ZPR2_with_qsub1_in_FPR128_0to7RegClass, |
| 30750 | &AArch64::ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30751 | &AArch64::ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30752 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30753 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30754 | &AArch64::ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 30755 | &AArch64::ZPR2_with_zsub1_in_ZPR_KRegClass, |
| 30756 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30757 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClass, |
| 30758 | &AArch64::QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30759 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClass, |
| 30760 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30761 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30762 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30763 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass, |
| 30764 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClass, |
| 30765 | &AArch64::ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30766 | &AArch64::ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30767 | &AArch64::ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30768 | &AArch64::ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30769 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30770 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClass, |
| 30771 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClass, |
| 30772 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4RegClass, |
| 30773 | &AArch64::ZPR2Strided_with_zsub0_in_ZPR_KRegClass, |
| 30774 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass, |
| 30775 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30776 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30777 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30778 | &AArch64::ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass, |
| 30779 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClass, |
| 30780 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 30781 | &AArch64::ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass, |
| 30782 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30783 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30784 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30785 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30786 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30787 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass, |
| 30788 | &AArch64::ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30789 | &AArch64::ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass, |
| 30790 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass, |
| 30791 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 30792 | &AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30793 | &AArch64::ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass, |
| 30794 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 30795 | &AArch64::ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass, |
| 30796 | &AArch64::ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30797 | &AArch64::ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30798 | &AArch64::ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30799 | &AArch64::ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30800 | &AArch64::MPR64RegClass, |
| 30801 | &AArch64::QQQRegClass, |
| 30802 | &AArch64::ZPR3RegClass, |
| 30803 | &AArch64::QQQ_with_dsub1_in_FPR64_loRegClass, |
| 30804 | &AArch64::QQQ_with_dsub2_in_FPR64_loRegClass, |
| 30805 | &AArch64::QQQ_with_qsub0_in_FPR128_loRegClass, |
| 30806 | &AArch64::ZPR3_with_dsub1_in_FPR64_loRegClass, |
| 30807 | &AArch64::ZPR3_with_dsub2_in_FPR64_loRegClass, |
| 30808 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, |
| 30809 | &AArch64::ZPR3_with_zsub1_in_ZPRMul2RegClass, |
| 30810 | &AArch64::ZPR3_with_zsub_in_FPR128_loRegClass, |
| 30811 | &AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass, |
| 30812 | &AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClass, |
| 30813 | &AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass, |
| 30814 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClass, |
| 30815 | &AArch64::QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass, |
| 30816 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass, |
| 30817 | &AArch64::QQQ_with_qsub0_in_FPR128_0to7RegClass, |
| 30818 | &AArch64::QQQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30819 | &AArch64::QQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30820 | &AArch64::ZPR3_with_qsub1_in_FPR128_0to7RegClass, |
| 30821 | &AArch64::ZPR3_with_qsub2_in_FPR128_0to7RegClass, |
| 30822 | &AArch64::ZPR3_with_zsub0_in_ZPRMul4RegClass, |
| 30823 | &AArch64::ZPR3_with_zsub0_in_ZPR_KRegClass, |
| 30824 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass, |
| 30825 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass, |
| 30826 | &AArch64::ZPR3_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30827 | &AArch64::ZPR3_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30828 | &AArch64::ZPR3_with_zsub1_in_ZPRMul4RegClass, |
| 30829 | &AArch64::ZPR3_with_zsub1_in_ZPR_KRegClass, |
| 30830 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30831 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_LoRegClass, |
| 30832 | &AArch64::ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30833 | &AArch64::ZPR3_with_zsub2_in_ZPR_KRegClass, |
| 30834 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7RegClass, |
| 30835 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClass, |
| 30836 | &AArch64::QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30837 | &AArch64::QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30838 | &AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass, |
| 30839 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30840 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass, |
| 30841 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30842 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClass, |
| 30843 | &AArch64::QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30844 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClass, |
| 30845 | &AArch64::ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass, |
| 30846 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass, |
| 30847 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClass, |
| 30848 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass, |
| 30849 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30850 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30851 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30852 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30853 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30854 | &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30855 | &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30856 | &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30857 | &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30858 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30859 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30860 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30861 | &AArch64::ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClass, |
| 30862 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2RegClass, |
| 30863 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClass, |
| 30864 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30865 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30866 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30867 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30868 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30869 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30870 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30871 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30872 | &AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass, |
| 30873 | &AArch64::ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30874 | &AArch64::ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass, |
| 30875 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClass, |
| 30876 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30877 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 30878 | &AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30879 | &AArch64::ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass, |
| 30880 | &AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30881 | &AArch64::ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass, |
| 30882 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4RegClass, |
| 30883 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30884 | &AArch64::ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass, |
| 30885 | &AArch64::ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass, |
| 30886 | &AArch64::ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30887 | &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30888 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30889 | &AArch64::ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass, |
| 30890 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30891 | &AArch64::ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30892 | &AArch64::QQQQRegClass, |
| 30893 | &AArch64::ZPR4RegClass, |
| 30894 | &AArch64::QQQQ_with_dsub1_in_FPR64_loRegClass, |
| 30895 | &AArch64::QQQQ_with_dsub2_in_FPR64_loRegClass, |
| 30896 | &AArch64::QQQQ_with_dsub3_in_FPR64_loRegClass, |
| 30897 | &AArch64::QQQQ_with_qsub0_in_FPR128_loRegClass, |
| 30898 | &AArch64::ZPR4StridedOrContiguousRegClass, |
| 30899 | &AArch64::ZPR4_with_dsub1_in_FPR64_loRegClass, |
| 30900 | &AArch64::ZPR4_with_dsub2_in_FPR64_loRegClass, |
| 30901 | &AArch64::ZPR4_with_dsub3_in_FPR64_loRegClass, |
| 30902 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, |
| 30903 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2RegClass, |
| 30904 | &AArch64::ZPR4_with_zsub_in_FPR128_loRegClass, |
| 30905 | &AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass, |
| 30906 | &AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass, |
| 30907 | &AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClass, |
| 30908 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass, |
| 30909 | &AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass, |
| 30910 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClass, |
| 30911 | &AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass, |
| 30912 | &AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass, |
| 30913 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass, |
| 30914 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass, |
| 30915 | &AArch64::QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass, |
| 30916 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass, |
| 30917 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass, |
| 30918 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass, |
| 30919 | &AArch64::QQQQ_with_qsub0_in_FPR128_0to7RegClass, |
| 30920 | &AArch64::QQQQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30921 | &AArch64::QQQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30922 | &AArch64::QQQQ_with_qsub3_in_FPR128_0to7RegClass, |
| 30923 | &AArch64::ZPR4Mul4RegClass, |
| 30924 | &AArch64::ZPR4StridedRegClass, |
| 30925 | &AArch64::ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClass, |
| 30926 | &AArch64::ZPR4_with_qsub1_in_FPR128_0to7RegClass, |
| 30927 | &AArch64::ZPR4_with_qsub2_in_FPR128_0to7RegClass, |
| 30928 | &AArch64::ZPR4_with_qsub3_in_FPR128_0to7RegClass, |
| 30929 | &AArch64::ZPR4_with_zsub0_in_ZPR_KRegClass, |
| 30930 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass, |
| 30931 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass, |
| 30932 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_HiRegClass, |
| 30933 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30934 | &AArch64::ZPR4_with_zsub1_in_ZPRMul4RegClass, |
| 30935 | &AArch64::ZPR4_with_zsub1_in_ZPR_KRegClass, |
| 30936 | &AArch64::ZPR4_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30937 | &AArch64::ZPR4_with_zsub2_in_ZPRMul2_LoRegClass, |
| 30938 | &AArch64::ZPR4_with_zsub2_in_ZPRMul4RegClass, |
| 30939 | &AArch64::ZPR4_with_zsub2_in_ZPR_KRegClass, |
| 30940 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_HiRegClass, |
| 30941 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_LoRegClass, |
| 30942 | &AArch64::ZPR4_with_zsub3_in_ZPRMul4RegClass, |
| 30943 | &AArch64::ZPR4_with_zsub3_in_ZPR_KRegClass, |
| 30944 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7RegClass, |
| 30945 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClass, |
| 30946 | &AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30947 | &AArch64::QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass, |
| 30948 | &AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClass, |
| 30949 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass, |
| 30950 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass, |
| 30951 | &AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass, |
| 30952 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30953 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass, |
| 30954 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7RegClass, |
| 30955 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClass, |
| 30956 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClass, |
| 30957 | &AArch64::QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass, |
| 30958 | &AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass, |
| 30959 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass, |
| 30960 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass, |
| 30961 | &AArch64::ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass, |
| 30962 | &AArch64::ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass, |
| 30963 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass, |
| 30964 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClass, |
| 30965 | &AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass, |
| 30966 | &AArch64::ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass, |
| 30967 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7RegClass, |
| 30968 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass, |
| 30969 | &AArch64::QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass, |
| 30970 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30971 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30972 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass, |
| 30973 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass, |
| 30974 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30975 | &AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClass, |
| 30976 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2RegClass, |
| 30977 | &AArch64::ZPR4Strided_with_zsub1_in_ZPR_KRegClass, |
| 30978 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClass, |
| 30979 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass, |
| 30980 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30981 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30982 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30983 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30984 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30985 | &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30986 | &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30987 | &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30988 | &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30989 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass, |
| 30990 | &AArch64::ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass, |
| 30991 | &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30992 | &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 30993 | &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 30994 | &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 30995 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 30996 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 30997 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass, |
| 30998 | &AArch64::ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClass, |
| 30999 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2RegClass, |
| 31000 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClass, |
| 31001 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClass, |
| 31002 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClass, |
| 31003 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass, |
| 31004 | &AArch64::ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31005 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass, |
| 31006 | &AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass, |
| 31007 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass, |
| 31008 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31009 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 31010 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31011 | &AArch64::ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass, |
| 31012 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 31013 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass, |
| 31014 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 31015 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 31016 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 31017 | &AArch64::ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClass, |
| 31018 | &AArch64::ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7RegClass, |
| 31019 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClass, |
| 31020 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClass, |
| 31021 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul4RegClass, |
| 31022 | &AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass, |
| 31023 | &AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClass, |
| 31024 | &AArch64::ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass, |
| 31025 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass, |
| 31026 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClass, |
| 31027 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass, |
| 31028 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass, |
| 31029 | &AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31030 | &AArch64::ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass, |
| 31031 | &AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31032 | &AArch64::ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass, |
| 31033 | &AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31034 | &AArch64::ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClass, |
| 31035 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4RegClass, |
| 31036 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4RegClass, |
| 31037 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass, |
| 31038 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4RegClass, |
| 31039 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass, |
| 31040 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31041 | &AArch64::ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass, |
| 31042 | &AArch64::ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass, |
| 31043 | &AArch64::ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass, |
| 31044 | &AArch64::ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass, |
| 31045 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass, |
| 31046 | &AArch64::ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31047 | &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31048 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31049 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31050 | &AArch64::ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass, |
| 31051 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass, |
| 31052 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClass, |
| 31053 | &AArch64::ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass, |
| 31054 | &AArch64::GPR64x8ClassRegClass, |
| 31055 | &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, |
| 31056 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, |
| 31057 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31058 | &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31059 | &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, |
| 31060 | &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31061 | &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31062 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, |
| 31063 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31064 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31065 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31066 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, |
| 31067 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31068 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31069 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClass, |
| 31070 | &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, |
| 31071 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31072 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31073 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31074 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31075 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, |
| 31076 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31077 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31078 | &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31079 | &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31080 | &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClass, |
| 31081 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31082 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31083 | &AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClass, |
| 31084 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31085 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31086 | &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31087 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31088 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31089 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, |
| 31090 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31091 | &AArch64::GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClass, |
| 31092 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31093 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31094 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31095 | &AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClass, |
| 31096 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31097 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31098 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, |
| 31099 | &AArch64::GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClass, |
| 31100 | &AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClass, |
| 31101 | &AArch64::GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClass, |
| 31102 | &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, |
| 31103 | &AArch64::MPR32RegClass, |
| 31104 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, |
| 31105 | &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, |
| 31106 | &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31107 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, |
| 31108 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31109 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31110 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClass, |
| 31111 | &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31112 | &AArch64::GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31113 | &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31114 | &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClass, |
| 31115 | &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31116 | &AArch64::GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClass, |
| 31117 | &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, |
| 31118 | &AArch64::GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClass, |
| 31119 | &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64argRegClass, |
| 31120 | &AArch64::GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClass, |
| 31121 | &AArch64::GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass, |
| 31122 | &AArch64::ZTRRegClass, |
| 31123 | &AArch64::MPR16RegClass, |
| 31124 | &AArch64::MPRRegClass, |
| 31125 | &AArch64::MPR8RegClass, |
| 31126 | }; |
| 31127 | } // end anonymous namespace |
| 31128 | |
| 31129 | static const uint8_t CostPerUseTable[] = { |
| 31130 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; |
| 31131 | |
| 31132 | |
| 31133 | static const bool InAllocatableClassTable[] = { |
| 31134 | false, true, true, false, false, false, true, false, true, true, true, false, true, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, }; |
| 31135 | |
| 31136 | |
| 31137 | static const TargetRegisterInfoDesc AArch64RegInfoDesc = { // Extra Descriptors |
| 31138 | CostPerUseTable, 1, InAllocatableClassTable}; |
| 31139 | |
| 31140 | unsigned AArch64GenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { |
| 31141 | static const uint8_t RowMap[143] = { |
| 31142 | 0, 0, 0, 0, 1, 2, 3, 0, 0, 0, 0, 0, 1, 0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 1, 0, 2, 3, 4, 5, 6, 7, 8, 0, 0, 1, 0, 2, 0, 0, 0, 3, 0, 0, 1, 2, 3, 0, 0, 0, 3, 4, 0, 0, 0, 0, 2, 5, 0, 0, 2, 6, 0, 0, 6, 7, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 3, 0, 3, 0, 0, 0, 2, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 4, 4, 4, 0, 0, 1, 1, 2, 0, 0, 3, 5, 7, 1, 2, 3, 4, 4, 4, 4, 0, 0, 1, 1, 2, 5, 6, |
| 31143 | }; |
| 31144 | static const uint8_t Rows[9][143] = { |
| 31145 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, AArch64::sub_32, AArch64::x8sub_0, AArch64::x8sub_1_then_sub_32, AArch64::x8sub_1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_1_then_sub_32, AArch64::x8sub_1_then_sub_32_hi, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_x8sub_1_then_sub_32, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31146 | { AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::psub1_then_psub, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, 0, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::x8sub_6_then_sub_32, 0, AArch64::x8sub_7_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, AArch64::qsub1, AArch64::zsub1, AArch64::zsub2, AArch64::zsub3, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, AArch64::qsub3_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_zsub_hi, 0, AArch64::zsub3_then_zsub_hi, AArch64::dsub1_dsub2, 0, AArch64::dsub2_dsub3, 0, 0, AArch64::dsub1_dsub2, 0, AArch64::dsub1_dsub2_dsub3, AArch64::qsub1_qsub2, 0, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub1_qsub2, 0, AArch64::qsub1_qsub2_qsub3, AArch64::zsub1_zsub2, 0, AArch64::zsub2_zsub3, 0, 0, 0, 0, }, |
| 31147 | { AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2, AArch64::dsub2, AArch64::dsub3, 0, 0, AArch64::qsub2_then_dsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, 0, 0, 0, AArch64::qsub2, AArch64::qsub3, 0, 0, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::x8sub_1_then_sub_32, AArch64::x8sub_1_then_sub_32_hi, AArch64::x8sub_4_then_sub_32, 0, AArch64::x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, 0, 0, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::qsub2, AArch64::zsub2, AArch64::zsub3, 0, 0, AArch64::zsub2_then_zsub_hi, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub3_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub2_dsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31148 | { AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3, 0, 0, 0, 0, AArch64::qsub3_then_dsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::x8sub_2_then_sub_32, AArch64::x8sub_2_then_sub_32_hi, AArch64::x8sub_2_then_sub_32, AArch64::x8sub_2, AArch64::x8sub_3_then_sub_32, AArch64::x8sub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, 0, 0, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, 0, 0, AArch64::qsub3, 0, 0, 0, 0, AArch64::zsub3_then_zsub_hi, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_3_then_sub_32, AArch64::x8sub_3_then_sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_2_then_sub_32_x8sub_3_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31149 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, AArch64::zsub, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::x8sub_3_then_sub_32, AArch64::x8sub_3_then_sub_32_hi, AArch64::sub_32, 0, AArch64::subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub_dsub1_dsub2, AArch64::zsub_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31150 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub2, 0, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub2, 0, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::x8sub_4_then_sub_32, AArch64::x8sub_4_then_sub_32_hi, 0, AArch64::x8sub_4, 0, AArch64::x8sub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, 0, 0, AArch64::zsub, AArch64::zsub0, AArch64::zsub2, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_5_then_sub_32, AArch64::x8sub_5_then_sub_32_hi, AArch64::zsub2_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_4_then_sub_32_x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31151 | { AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1, 0, AArch64::dsub3, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, 0, 0, 0, 0, AArch64::qsub3, 0, 0, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::x8sub_5_then_sub_32, AArch64::x8sub_5_then_sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, 0, 0, AArch64::qsub1, AArch64::zsub1, AArch64::zsub3, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub3_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31152 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_6_then_sub_32, AArch64::x8sub_6_then_sub_32_hi, 0, AArch64::x8sub_6, 0, AArch64::x8sub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_7_then_sub_32, AArch64::x8sub_7_then_sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_6_then_sub_32_x8sub_7_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31153 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_7_then_sub_32, AArch64::x8sub_7_then_sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31154 | }; |
| 31155 | |
| 31156 | --IdxA; assert(IdxA < 143); (void) IdxA; |
| 31157 | --IdxB; assert(IdxB < 143); |
| 31158 | return Rows[RowMap[IdxA]][IdxB]; |
| 31159 | } |
| 31160 | |
| 31161 | unsigned AArch64GenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { |
| 31162 | static const uint8_t Table[143][143] = { |
| 31163 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31164 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31165 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31166 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31167 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31168 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31169 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31170 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31171 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31172 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31173 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31174 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31175 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31176 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31177 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31178 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31179 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31180 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31181 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31182 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31183 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31184 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31185 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31186 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31187 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31188 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31189 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31190 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31191 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31192 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, 0, AArch64::dsub1, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, 0, AArch64::qsub1, 0, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, AArch64::zsub0, 0, AArch64::zsub1, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31193 | { 0, 0, 0, 0, AArch64::dsub, 0, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, 0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31194 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31195 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31196 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31197 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31198 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31199 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31200 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31201 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31202 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31203 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31204 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31205 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31206 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31207 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31208 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31209 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31210 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31211 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31212 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31213 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31214 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31215 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31216 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31217 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31218 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31219 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31220 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, 0, AArch64::dsub1, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, 0, AArch64::qsub1, 0, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, AArch64::zsub0, 0, AArch64::zsub1, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31221 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31222 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31223 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31224 | { 0, 0, 0, 0, AArch64::dsub, 0, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, 0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31225 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31226 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31227 | { 0, 0, 0, 0, AArch64::dsub, 0, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, 0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31228 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31229 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31230 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31231 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31232 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31233 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31234 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31235 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31236 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31237 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31238 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31239 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31240 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31241 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31242 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31243 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31244 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31245 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31246 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31247 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31248 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31249 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31250 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31251 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31252 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31253 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31254 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31255 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31256 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31257 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31258 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31259 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31260 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31261 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31262 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31263 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31264 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31265 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31266 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31267 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31268 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31269 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31270 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31271 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31272 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31273 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31274 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31275 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31276 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31277 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31278 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31279 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31280 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31281 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31282 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31283 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31284 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31285 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31286 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31287 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31288 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31289 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31290 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, 0, AArch64::dsub1, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, 0, AArch64::qsub1, 0, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, AArch64::zsub0, 0, AArch64::zsub1, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31291 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31292 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31293 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31294 | { 0, 0, 0, 0, 0, 0, AArch64::dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31295 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31296 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31297 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31298 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, AArch64::ssub, AArch64::ssub_hi, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::dsub3_then_bsub, AArch64::dsub3_then_bsub_hi, AArch64::dsub3_then_hsub, AArch64::dsub3_then_hsub_hi, AArch64::dsub3_then_ssub, AArch64::dsub3_then_ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, AArch64::qsub3_then_dsub_hi, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::subo32, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, AArch64::dsub1_dsub2_dsub3, AArch64::dsub2_dsub3, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2_dsub3, AArch64::dsub0_dsub1_dsub2, 0, 0, AArch64::qsub1_qsub2, AArch64::qsub1_qsub2_qsub3, AArch64::qsub2_qsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, 0, AArch64::qsub0_qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, }, |
| 31299 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31300 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::psub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::ssub_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, 0, AArch64::qsub1_then_dsub_hi, 0, AArch64::qsub2_then_dsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::subo32, AArch64::subo64_then_sub_32_hi, 0, 0, AArch64::zsub1_then_zsub_hi, 0, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_dsub1, 0, AArch64::dsub_dsub1_dsub2, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, AArch64::zsub_qsub1_qsub2, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, 0, 0, }, |
| 31301 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31302 | { 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, AArch64::dsub2, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub2_then_bsub, AArch64::dsub2_then_bsub_hi, AArch64::dsub2_then_hsub, AArch64::dsub2_then_hsub_hi, AArch64::dsub2_then_ssub, AArch64::dsub2_then_ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::psub, AArch64::dsub_hi, AArch64::qsub2_then_dsub_hi, AArch64::qsub1_then_dsub_hi, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, AArch64::zsub_hi, AArch64::zsub2_then_zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, AArch64::dsub0_dsub1, AArch64::dsub_dsub1_dsub2, AArch64::dsub1_dsub2, 0, 0, 0, 0, 0, AArch64::qsub0_qsub1, AArch64::zsub_qsub1_qsub2, AArch64::qsub1_qsub2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, }, |
| 31303 | { 0, 0, 0, 0, 0, AArch64::dsub, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, 0, 0, AArch64::qsub1_then_dsub_hi, AArch64::dsub_hi, 0, 0, 0, 0, AArch64::subo32, 0, AArch64::sube32, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, AArch64::zsub1_then_zsub_hi, AArch64::zsub_hi, 0, 0, 0, 0, AArch64::dsub_dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31304 | { AArch64::bsub, AArch64::bsub_hi, AArch64::dsub, 0, 0, AArch64::dsub1, 0, AArch64::dsub_hi, AArch64::hsub, AArch64::hsub_hi, 0, 0, 0, 0, 0, AArch64::qsub1, 0, AArch64::ssub, AArch64::ssub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sube64, AArch64::subo64, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, AArch64::zsub0, 0, AArch64::zsub1, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubq0, AArch64::zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, AArch64::subo64_then_sub_32, AArch64::subo64_then_sub_32_hi, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31305 | { 0, 0, 0, 0, AArch64::dsub, 0, AArch64::dsub1, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, 0, AArch64::qsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub0, 0, AArch64::zsub1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::bsub, AArch64::bsub_hi, AArch64::hsub, AArch64::hsub_hi, AArch64::ssub, AArch64::ssub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_bsub_hi, AArch64::dsub1_then_hsub, AArch64::dsub1_then_hsub_hi, AArch64::dsub1_then_ssub, AArch64::dsub1_then_ssub_hi, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_hi, AArch64::qsub1_then_dsub_hi, 0, 0, 0, 0, 0, AArch64::sub_32, AArch64::sub_32_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub_hi, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, |
| 31306 | }; |
| 31307 | |
| 31308 | --IdxA; assert(IdxA < 143); |
| 31309 | --IdxB; assert(IdxB < 143); |
| 31310 | return Table[IdxA][IdxB]; |
| 31311 | } |
| 31312 | |
| 31313 | struct MaskRolOp { |
| 31314 | LaneBitmask Mask; |
| 31315 | uint8_t RotateLeft; |
| 31316 | }; |
| 31317 | static const MaskRolOp LaneMaskComposeSequences[] = { |
| 31318 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0 |
| 31319 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 2 |
| 31320 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask::getNone(), 0 }, // Sequence 4 |
| 31321 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask::getNone(), 0 }, // Sequence 8 |
| 31322 | { LaneBitmask(0x0000000000000003), 31 }, { LaneBitmask(0x0000000000000008), 30 }, { LaneBitmask(0x0000000000000020), 29 }, { LaneBitmask::getNone(), 0 }, // Sequence 12 |
| 31323 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 16 |
| 31324 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18 |
| 31325 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 20 |
| 31326 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 35 }, { LaneBitmask::getNone(), 0 }, // Sequence 22 |
| 31327 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask::getNone(), 0 }, // Sequence 24 |
| 31328 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000004), 40 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask::getNone(), 0 }, // Sequence 29 |
| 31329 | { LaneBitmask(0x0000000000000003), 31 }, { LaneBitmask(0x0000000000000004), 39 }, { LaneBitmask(0x0000000000000008), 30 }, { LaneBitmask(0x0000000000000020), 29 }, { LaneBitmask::getNone(), 0 }, // Sequence 34 |
| 31330 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 39 |
| 31331 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 41 |
| 31332 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 43 |
| 31333 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 45 |
| 31334 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 47 |
| 31335 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 51 }, { LaneBitmask::getNone(), 0 }, // Sequence 49 |
| 31336 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 49 }, { LaneBitmask::getNone(), 0 }, // Sequence 51 |
| 31337 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 47 }, { LaneBitmask::getNone(), 0 }, // Sequence 53 |
| 31338 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 45 }, { LaneBitmask::getNone(), 0 }, // Sequence 55 |
| 31339 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 43 }, { LaneBitmask::getNone(), 0 }, // Sequence 57 |
| 31340 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 41 }, { LaneBitmask::getNone(), 0 }, // Sequence 59 |
| 31341 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 39 }, { LaneBitmask::getNone(), 0 }, // Sequence 61 |
| 31342 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 37 }, { LaneBitmask::getNone(), 0 }, // Sequence 63 |
| 31343 | { LaneBitmask(0x0000000000000C00), 9 }, { LaneBitmask(0x000000000007E000), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 65 |
| 31344 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 68 |
| 31345 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 70 |
| 31346 | { LaneBitmask(0x0000000000000C00), 5 }, { LaneBitmask(0x0000000000006000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 72 |
| 31347 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000000001000), 47 }, { LaneBitmask::getNone(), 0 }, // Sequence 75 |
| 31348 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000004), 40 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask(0x0000000000001000), 49 }, { LaneBitmask::getNone(), 0 }, // Sequence 81 |
| 31349 | { LaneBitmask(0x0000000000000003), 31 }, { LaneBitmask(0x0000000000000004), 39 }, { LaneBitmask(0x0000000000000008), 30 }, { LaneBitmask(0x0000000000000020), 29 }, { LaneBitmask(0x0000000000001000), 48 }, { LaneBitmask::getNone(), 0 }, // Sequence 87 |
| 31350 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 93 |
| 31351 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 95 |
| 31352 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 97 |
| 31353 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 99 |
| 31354 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 101 |
| 31355 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 }, // Sequence 103 |
| 31356 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 18 }, { LaneBitmask::getNone(), 0 }, // Sequence 105 |
| 31357 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 19 }, { LaneBitmask::getNone(), 0 }, // Sequence 107 |
| 31358 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 20 }, { LaneBitmask::getNone(), 0 }, // Sequence 109 |
| 31359 | { LaneBitmask(0x0000000000000C00), 9 }, { LaneBitmask(0x0000000000006000), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 111 |
| 31360 | { LaneBitmask(0x0000000000000C00), 13 }, { LaneBitmask(0x0000000000006000), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 114 |
| 31361 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 21 }, { LaneBitmask::getNone(), 0 }, // Sequence 117 |
| 31362 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 22 }, { LaneBitmask::getNone(), 0 }, // Sequence 119 |
| 31363 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 23 }, { LaneBitmask::getNone(), 0 }, // Sequence 121 |
| 31364 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 24 }, { LaneBitmask::getNone(), 0 }, // Sequence 123 |
| 31365 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 25 }, { LaneBitmask::getNone(), 0 }, // Sequence 125 |
| 31366 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 26 }, { LaneBitmask::getNone(), 0 }, // Sequence 127 |
| 31367 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 27 }, { LaneBitmask::getNone(), 0 }, // Sequence 129 |
| 31368 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 28 }, { LaneBitmask::getNone(), 0 }, // Sequence 131 |
| 31369 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 29 }, { LaneBitmask::getNone(), 0 }, // Sequence 133 |
| 31370 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask::getNone(), 0 }, // Sequence 135 |
| 31371 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 138 |
| 31372 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 140 |
| 31373 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 32 }, { LaneBitmask::getNone(), 0 }, // Sequence 142 |
| 31374 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 33 }, { LaneBitmask::getNone(), 0 }, // Sequence 144 |
| 31375 | { LaneBitmask(0x0000000000000003), 31 }, { LaneBitmask(0x0000000000000008), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 146 |
| 31376 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 34 }, { LaneBitmask::getNone(), 0 }, // Sequence 149 |
| 31377 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 36 }, { LaneBitmask::getNone(), 0 }, // Sequence 151 |
| 31378 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask::getNone(), 0 }, // Sequence 153 |
| 31379 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 38 }, { LaneBitmask::getNone(), 0 }, // Sequence 156 |
| 31380 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 40 }, { LaneBitmask::getNone(), 0 }, // Sequence 158 |
| 31381 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 42 }, { LaneBitmask::getNone(), 0 }, // Sequence 160 |
| 31382 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 44 }, { LaneBitmask::getNone(), 0 }, // Sequence 162 |
| 31383 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 46 }, { LaneBitmask::getNone(), 0 }, // Sequence 164 |
| 31384 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 48 }, { LaneBitmask::getNone(), 0 }, // Sequence 166 |
| 31385 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 50 }, { LaneBitmask::getNone(), 0 }, // Sequence 168 |
| 31386 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 52 }, { LaneBitmask::getNone(), 0 }, // Sequence 170 |
| 31387 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 53 }, { LaneBitmask::getNone(), 0 }, // Sequence 172 |
| 31388 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 54 }, { LaneBitmask::getNone(), 0 }, // Sequence 174 |
| 31389 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 55 }, { LaneBitmask::getNone(), 0 }, // Sequence 176 |
| 31390 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 56 }, { LaneBitmask::getNone(), 0 }, // Sequence 178 |
| 31391 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 57 }, { LaneBitmask::getNone(), 0 }, // Sequence 180 |
| 31392 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 58 }, { LaneBitmask::getNone(), 0 }, // Sequence 182 |
| 31393 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 59 }, { LaneBitmask::getNone(), 0 }, // Sequence 184 |
| 31394 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 60 }, { LaneBitmask::getNone(), 0 }, // Sequence 186 |
| 31395 | { LaneBitmask(0xFFFFFFFFFFFFFFFF), 61 }, { LaneBitmask::getNone(), 0 }, // Sequence 188 |
| 31396 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 190 |
| 31397 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0000007800000000), 60 }, { LaneBitmask::getNone(), 0 }, // Sequence 195 |
| 31398 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask(0x0000000078000000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 201 |
| 31399 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0000010000000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 206 |
| 31400 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0000007800000000), 60 }, { LaneBitmask(0x0000010000000000), 2 }, { LaneBitmask(0x0000040000000000), 63 }, { LaneBitmask::getNone(), 0 }, // Sequence 213 |
| 31401 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000004), 40 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask(0x0000000078000000), 4 }, { LaneBitmask(0x0000010000000000), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 222 |
| 31402 | { LaneBitmask(0x0000000000000100), 62 }, { LaneBitmask(0x0000000000000200), 46 }, { LaneBitmask::getNone(), 0 }, // Sequence 229 |
| 31403 | { LaneBitmask(0x00000000000000C0), 0 }, { LaneBitmask(0x0600000000000000), 62 }, { LaneBitmask::getNone(), 0 }, // Sequence 232 |
| 31404 | { LaneBitmask(0x00000000000000C0), 47 }, { LaneBitmask(0x0600000000000000), 58 }, { LaneBitmask::getNone(), 0 }, // Sequence 235 |
| 31405 | { LaneBitmask(0x00000000000000C0), 43 }, { LaneBitmask(0x0600000000000000), 54 }, { LaneBitmask::getNone(), 0 }, // Sequence 238 |
| 31406 | { LaneBitmask(0x00000000000000C0), 39 }, { LaneBitmask(0x0600000000000000), 50 }, { LaneBitmask::getNone(), 0 }, // Sequence 241 |
| 31407 | { LaneBitmask(0x0000000000000100), 37 }, { LaneBitmask(0x0000000000000200), 34 }, { LaneBitmask::getNone(), 0 }, // Sequence 244 |
| 31408 | { LaneBitmask(0x0000000000000100), 41 }, { LaneBitmask(0x0000000000000200), 38 }, { LaneBitmask::getNone(), 0 }, // Sequence 247 |
| 31409 | { LaneBitmask(0x0000000000000100), 45 }, { LaneBitmask(0x0000000000000200), 42 }, { LaneBitmask::getNone(), 0 }, // Sequence 250 |
| 31410 | { LaneBitmask(0x0000000000000100), 62 }, { LaneBitmask(0x0000000000000200), 48 }, { LaneBitmask::getNone(), 0 }, // Sequence 253 |
| 31411 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000000001000), 47 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0800010000000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 256 |
| 31412 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000000001000), 47 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0000007800000000), 60 }, { LaneBitmask(0x0800010000000000), 2 }, { LaneBitmask(0x2000040000000000), 63 }, { LaneBitmask::getNone(), 0 }, // Sequence 264 |
| 31413 | { LaneBitmask(0x0000000000000003), 35 }, { LaneBitmask(0x0000000000000004), 40 }, { LaneBitmask(0x0000000000000008), 34 }, { LaneBitmask(0x0000000000000020), 33 }, { LaneBitmask(0x0000000000001000), 49 }, { LaneBitmask(0x0000000078000000), 4 }, { LaneBitmask(0x0800010000000000), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 274 |
| 31414 | { LaneBitmask(0x000000000000102F), 0 }, { LaneBitmask(0x0000000078000000), 8 }, { LaneBitmask(0x0800010000000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 282 |
| 31415 | { LaneBitmask(0x0000000000000003), 27 }, { LaneBitmask(0x0000000000000004), 38 }, { LaneBitmask(0x0000000000000008), 26 }, { LaneBitmask(0x0000000000000020), 25 }, { LaneBitmask(0x0000000000001000), 47 }, { LaneBitmask(0x0000000078000000), 4 }, { LaneBitmask(0x0800010000000000), 1 }, { LaneBitmask::getNone(), 0 } // Sequence 286 |
| 31416 | }; |
| 31417 | static const uint16_t CompositeSequences[] = { |
| 31418 | 0, // to bsub |
| 31419 | 2, // to bsub_hi |
| 31420 | 0, // to dsub |
| 31421 | 0, // to dsub0 |
| 31422 | 4, // to dsub1 |
| 31423 | 8, // to dsub2 |
| 31424 | 12, // to dsub3 |
| 31425 | 16, // to dsub_hi |
| 31426 | 0, // to hsub |
| 31427 | 18, // to hsub_hi |
| 31428 | 20, // to psub |
| 31429 | 0, // to psub0 |
| 31430 | 22, // to psub1 |
| 31431 | 0, // to qsub0 |
| 31432 | 24, // to qsub1 |
| 31433 | 29, // to qsub2 |
| 31434 | 34, // to qsub3 |
| 31435 | 0, // to ssub |
| 31436 | 39, // to ssub_hi |
| 31437 | 41, // to sub_32 |
| 31438 | 43, // to sub_32_hi |
| 31439 | 45, // to sube32 |
| 31440 | 0, // to sube64 |
| 31441 | 47, // to subo32 |
| 31442 | 49, // to subo64 |
| 31443 | 0, // to x8sub_0 |
| 31444 | 51, // to x8sub_1 |
| 31445 | 53, // to x8sub_2 |
| 31446 | 55, // to x8sub_3 |
| 31447 | 57, // to x8sub_4 |
| 31448 | 59, // to x8sub_5 |
| 31449 | 61, // to x8sub_6 |
| 31450 | 63, // to x8sub_7 |
| 31451 | 0, // to zasubb |
| 31452 | 0, // to zasubd0 |
| 31453 | 18, // to zasubd1 |
| 31454 | 0, // to zasubh0 |
| 31455 | 65, // to zasubh1 |
| 31456 | 68, // to zasubq0 |
| 31457 | 70, // to zasubq1 |
| 31458 | 0, // to zasubs0 |
| 31459 | 72, // to zasubs1 |
| 31460 | 0, // to zsub |
| 31461 | 0, // to zsub0 |
| 31462 | 75, // to zsub1 |
| 31463 | 81, // to zsub2 |
| 31464 | 87, // to zsub3 |
| 31465 | 93, // to zsub_hi |
| 31466 | 95, // to zasubd1_then_zasubq0 |
| 31467 | 97, // to zasubd1_then_zasubq1 |
| 31468 | 39, // to zasubs1_then_zasubd0 |
| 31469 | 43, // to zasubs1_then_zasubd1 |
| 31470 | 99, // to zasubs1_then_zasubq0 |
| 31471 | 101, // to zasubs1_then_zasubq1 |
| 31472 | 103, // to zasubs1_then_zasubd1_then_zasubq0 |
| 31473 | 105, // to zasubs1_then_zasubd1_then_zasubq1 |
| 31474 | 47, // to zasubh1_then_zasubd0 |
| 31475 | 70, // to zasubh1_then_zasubd1 |
| 31476 | 107, // to zasubh1_then_zasubq0 |
| 31477 | 109, // to zasubh1_then_zasubq1 |
| 31478 | 111, // to zasubh1_then_zasubs0 |
| 31479 | 114, // to zasubh1_then_zasubs1 |
| 31480 | 117, // to zasubh1_then_zasubd1_then_zasubq0 |
| 31481 | 119, // to zasubh1_then_zasubd1_then_zasubq1 |
| 31482 | 95, // to zasubh1_then_zasubs1_then_zasubd0 |
| 31483 | 99, // to zasubh1_then_zasubs1_then_zasubd1 |
| 31484 | 121, // to zasubh1_then_zasubs1_then_zasubq0 |
| 31485 | 123, // to zasubh1_then_zasubs1_then_zasubq1 |
| 31486 | 125, // to zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 31487 | 127, // to zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 31488 | 129, // to dsub1_then_bsub |
| 31489 | 131, // to dsub1_then_bsub_hi |
| 31490 | 129, // to dsub1_then_hsub |
| 31491 | 133, // to dsub1_then_hsub_hi |
| 31492 | 135, // to dsub1_then_ssub |
| 31493 | 138, // to dsub1_then_ssub_hi |
| 31494 | 140, // to dsub3_then_bsub |
| 31495 | 142, // to dsub3_then_bsub_hi |
| 31496 | 140, // to dsub3_then_hsub |
| 31497 | 144, // to dsub3_then_hsub_hi |
| 31498 | 146, // to dsub3_then_ssub |
| 31499 | 149, // to dsub3_then_ssub_hi |
| 31500 | 22, // to dsub2_then_bsub |
| 31501 | 151, // to dsub2_then_bsub_hi |
| 31502 | 22, // to dsub2_then_hsub |
| 31503 | 63, // to dsub2_then_hsub_hi |
| 31504 | 153, // to dsub2_then_ssub |
| 31505 | 156, // to dsub2_then_ssub_hi |
| 31506 | 61, // to psub1_then_psub |
| 31507 | 158, // to qsub1_then_dsub_hi |
| 31508 | 59, // to qsub3_then_dsub_hi |
| 31509 | 160, // to qsub2_then_dsub_hi |
| 31510 | 57, // to x8sub_7_then_sub_32 |
| 31511 | 162, // to x8sub_7_then_sub_32_hi |
| 31512 | 55, // to x8sub_6_then_sub_32 |
| 31513 | 164, // to x8sub_6_then_sub_32_hi |
| 31514 | 53, // to x8sub_5_then_sub_32 |
| 31515 | 166, // to x8sub_5_then_sub_32_hi |
| 31516 | 51, // to x8sub_4_then_sub_32 |
| 31517 | 168, // to x8sub_4_then_sub_32_hi |
| 31518 | 49, // to x8sub_3_then_sub_32 |
| 31519 | 170, // to x8sub_3_then_sub_32_hi |
| 31520 | 172, // to x8sub_2_then_sub_32 |
| 31521 | 174, // to x8sub_2_then_sub_32_hi |
| 31522 | 176, // to x8sub_1_then_sub_32 |
| 31523 | 178, // to x8sub_1_then_sub_32_hi |
| 31524 | 180, // to subo64_then_sub_32 |
| 31525 | 182, // to subo64_then_sub_32_hi |
| 31526 | 184, // to zsub1_then_zsub_hi |
| 31527 | 186, // to zsub3_then_zsub_hi |
| 31528 | 188, // to zsub2_then_zsub_hi |
| 31529 | 0, // to dsub0_dsub1 |
| 31530 | 0, // to dsub0_dsub1_dsub2 |
| 31531 | 190, // to dsub1_dsub2 |
| 31532 | 195, // to dsub1_dsub2_dsub3 |
| 31533 | 201, // to dsub2_dsub3 |
| 31534 | 0, // to dsub_dsub1 |
| 31535 | 0, // to dsub_dsub1_dsub2_dsub3 |
| 31536 | 0, // to dsub_dsub1_dsub2 |
| 31537 | 0, // to qsub0_qsub1 |
| 31538 | 0, // to qsub0_qsub1_qsub2 |
| 31539 | 206, // to qsub1_qsub2 |
| 31540 | 213, // to qsub1_qsub2_qsub3 |
| 31541 | 222, // to qsub2_qsub3 |
| 31542 | 229, // to sub_32_x8sub_1_then_sub_32 |
| 31543 | 232, // to x8sub_0_x8sub_1 |
| 31544 | 235, // to x8sub_2_x8sub_3 |
| 31545 | 238, // to x8sub_4_x8sub_5 |
| 31546 | 241, // to x8sub_6_x8sub_7 |
| 31547 | 244, // to x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 31548 | 247, // to x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 31549 | 250, // to x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 31550 | 253, // to sub_32_subo64_then_sub_32 |
| 31551 | 0, // to zsub_qsub1 |
| 31552 | 0, // to zsub_qsub1_qsub2_qsub3 |
| 31553 | 0, // to zsub_qsub1_qsub2 |
| 31554 | 0, // to zsub0_zsub1 |
| 31555 | 0, // to zsub0_zsub1_zsub2 |
| 31556 | 256, // to zsub1_zsub2 |
| 31557 | 264, // to zsub1_zsub2_zsub3 |
| 31558 | 274, // to zsub2_zsub3 |
| 31559 | 282, // to zsub0_zsub2 |
| 31560 | 286 // to zsub1_zsub3 |
| 31561 | }; |
| 31562 | |
| 31563 | LaneBitmask AArch64GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| 31564 | --IdxA; assert(IdxA < 143 && "Subregister index out of bounds"); |
| 31565 | LaneBitmask Result; |
| 31566 | for (const MaskRolOp *Ops = |
| 31567 | &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| 31568 | Ops->Mask.any(); ++Ops) { |
| 31569 | LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger(); |
| 31570 | if (unsigned S = Ops->RotateLeft) |
| 31571 | Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S))); |
| 31572 | else |
| 31573 | Result |= LaneBitmask(M); |
| 31574 | } |
| 31575 | return Result; |
| 31576 | } |
| 31577 | |
| 31578 | LaneBitmask AArch64GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { |
| 31579 | LaneMask &= getSubRegIndexLaneMask(IdxA); |
| 31580 | --IdxA; assert(IdxA < 143 && "Subregister index out of bounds"); |
| 31581 | LaneBitmask Result; |
| 31582 | for (const MaskRolOp *Ops = |
| 31583 | &LaneMaskComposeSequences[CompositeSequences[IdxA]]; |
| 31584 | Ops->Mask.any(); ++Ops) { |
| 31585 | LaneBitmask::Type M = LaneMask.getAsInteger(); |
| 31586 | if (unsigned S = Ops->RotateLeft) |
| 31587 | Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S))); |
| 31588 | else |
| 31589 | Result |= LaneBitmask(M); |
| 31590 | } |
| 31591 | return Result; |
| 31592 | } |
| 31593 | |
| 31594 | const TargetRegisterClass *AArch64GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { |
| 31595 | static const uint16_t Table[530][143] = { |
| 31596 | { // W_HI_DummyRC |
| 31597 | 0, // bsub |
| 31598 | 0, // bsub_hi |
| 31599 | 0, // dsub |
| 31600 | 0, // dsub0 |
| 31601 | 0, // dsub1 |
| 31602 | 0, // dsub2 |
| 31603 | 0, // dsub3 |
| 31604 | 0, // dsub_hi |
| 31605 | 0, // hsub |
| 31606 | 0, // hsub_hi |
| 31607 | 0, // psub |
| 31608 | 0, // psub0 |
| 31609 | 0, // psub1 |
| 31610 | 0, // qsub0 |
| 31611 | 0, // qsub1 |
| 31612 | 0, // qsub2 |
| 31613 | 0, // qsub3 |
| 31614 | 0, // ssub |
| 31615 | 0, // ssub_hi |
| 31616 | 0, // sub_32 |
| 31617 | 0, // sub_32_hi |
| 31618 | 0, // sube32 |
| 31619 | 0, // sube64 |
| 31620 | 0, // subo32 |
| 31621 | 0, // subo64 |
| 31622 | 0, // x8sub_0 |
| 31623 | 0, // x8sub_1 |
| 31624 | 0, // x8sub_2 |
| 31625 | 0, // x8sub_3 |
| 31626 | 0, // x8sub_4 |
| 31627 | 0, // x8sub_5 |
| 31628 | 0, // x8sub_6 |
| 31629 | 0, // x8sub_7 |
| 31630 | 0, // zasubb |
| 31631 | 0, // zasubd0 |
| 31632 | 0, // zasubd1 |
| 31633 | 0, // zasubh0 |
| 31634 | 0, // zasubh1 |
| 31635 | 0, // zasubq0 |
| 31636 | 0, // zasubq1 |
| 31637 | 0, // zasubs0 |
| 31638 | 0, // zasubs1 |
| 31639 | 0, // zsub |
| 31640 | 0, // zsub0 |
| 31641 | 0, // zsub1 |
| 31642 | 0, // zsub2 |
| 31643 | 0, // zsub3 |
| 31644 | 0, // zsub_hi |
| 31645 | 0, // zasubd1_then_zasubq0 |
| 31646 | 0, // zasubd1_then_zasubq1 |
| 31647 | 0, // zasubs1_then_zasubd0 |
| 31648 | 0, // zasubs1_then_zasubd1 |
| 31649 | 0, // zasubs1_then_zasubq0 |
| 31650 | 0, // zasubs1_then_zasubq1 |
| 31651 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 31652 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 31653 | 0, // zasubh1_then_zasubd0 |
| 31654 | 0, // zasubh1_then_zasubd1 |
| 31655 | 0, // zasubh1_then_zasubq0 |
| 31656 | 0, // zasubh1_then_zasubq1 |
| 31657 | 0, // zasubh1_then_zasubs0 |
| 31658 | 0, // zasubh1_then_zasubs1 |
| 31659 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 31660 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 31661 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 31662 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 31663 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 31664 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 31665 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 31666 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 31667 | 0, // dsub1_then_bsub |
| 31668 | 0, // dsub1_then_bsub_hi |
| 31669 | 0, // dsub1_then_hsub |
| 31670 | 0, // dsub1_then_hsub_hi |
| 31671 | 0, // dsub1_then_ssub |
| 31672 | 0, // dsub1_then_ssub_hi |
| 31673 | 0, // dsub3_then_bsub |
| 31674 | 0, // dsub3_then_bsub_hi |
| 31675 | 0, // dsub3_then_hsub |
| 31676 | 0, // dsub3_then_hsub_hi |
| 31677 | 0, // dsub3_then_ssub |
| 31678 | 0, // dsub3_then_ssub_hi |
| 31679 | 0, // dsub2_then_bsub |
| 31680 | 0, // dsub2_then_bsub_hi |
| 31681 | 0, // dsub2_then_hsub |
| 31682 | 0, // dsub2_then_hsub_hi |
| 31683 | 0, // dsub2_then_ssub |
| 31684 | 0, // dsub2_then_ssub_hi |
| 31685 | 0, // psub1_then_psub |
| 31686 | 0, // qsub1_then_dsub_hi |
| 31687 | 0, // qsub3_then_dsub_hi |
| 31688 | 0, // qsub2_then_dsub_hi |
| 31689 | 0, // x8sub_7_then_sub_32 |
| 31690 | 0, // x8sub_7_then_sub_32_hi |
| 31691 | 0, // x8sub_6_then_sub_32 |
| 31692 | 0, // x8sub_6_then_sub_32_hi |
| 31693 | 0, // x8sub_5_then_sub_32 |
| 31694 | 0, // x8sub_5_then_sub_32_hi |
| 31695 | 0, // x8sub_4_then_sub_32 |
| 31696 | 0, // x8sub_4_then_sub_32_hi |
| 31697 | 0, // x8sub_3_then_sub_32 |
| 31698 | 0, // x8sub_3_then_sub_32_hi |
| 31699 | 0, // x8sub_2_then_sub_32 |
| 31700 | 0, // x8sub_2_then_sub_32_hi |
| 31701 | 0, // x8sub_1_then_sub_32 |
| 31702 | 0, // x8sub_1_then_sub_32_hi |
| 31703 | 0, // subo64_then_sub_32 |
| 31704 | 0, // subo64_then_sub_32_hi |
| 31705 | 0, // zsub1_then_zsub_hi |
| 31706 | 0, // zsub3_then_zsub_hi |
| 31707 | 0, // zsub2_then_zsub_hi |
| 31708 | 0, // dsub0_dsub1 |
| 31709 | 0, // dsub0_dsub1_dsub2 |
| 31710 | 0, // dsub1_dsub2 |
| 31711 | 0, // dsub1_dsub2_dsub3 |
| 31712 | 0, // dsub2_dsub3 |
| 31713 | 0, // dsub_dsub1 |
| 31714 | 0, // dsub_dsub1_dsub2_dsub3 |
| 31715 | 0, // dsub_dsub1_dsub2 |
| 31716 | 0, // qsub0_qsub1 |
| 31717 | 0, // qsub0_qsub1_qsub2 |
| 31718 | 0, // qsub1_qsub2 |
| 31719 | 0, // qsub1_qsub2_qsub3 |
| 31720 | 0, // qsub2_qsub3 |
| 31721 | 0, // sub_32_x8sub_1_then_sub_32 |
| 31722 | 0, // x8sub_0_x8sub_1 |
| 31723 | 0, // x8sub_2_x8sub_3 |
| 31724 | 0, // x8sub_4_x8sub_5 |
| 31725 | 0, // x8sub_6_x8sub_7 |
| 31726 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 31727 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 31728 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 31729 | 0, // sub_32_subo64_then_sub_32 |
| 31730 | 0, // zsub_qsub1 |
| 31731 | 0, // zsub_qsub1_qsub2_qsub3 |
| 31732 | 0, // zsub_qsub1_qsub2 |
| 31733 | 0, // zsub0_zsub1 |
| 31734 | 0, // zsub0_zsub1_zsub2 |
| 31735 | 0, // zsub1_zsub2 |
| 31736 | 0, // zsub1_zsub2_zsub3 |
| 31737 | 0, // zsub2_zsub3 |
| 31738 | 0, // zsub0_zsub2 |
| 31739 | 0, // zsub1_zsub3 |
| 31740 | }, |
| 31741 | { // B_HI_DummyRC |
| 31742 | 0, // bsub |
| 31743 | 0, // bsub_hi |
| 31744 | 0, // dsub |
| 31745 | 0, // dsub0 |
| 31746 | 0, // dsub1 |
| 31747 | 0, // dsub2 |
| 31748 | 0, // dsub3 |
| 31749 | 0, // dsub_hi |
| 31750 | 0, // hsub |
| 31751 | 0, // hsub_hi |
| 31752 | 0, // psub |
| 31753 | 0, // psub0 |
| 31754 | 0, // psub1 |
| 31755 | 0, // qsub0 |
| 31756 | 0, // qsub1 |
| 31757 | 0, // qsub2 |
| 31758 | 0, // qsub3 |
| 31759 | 0, // ssub |
| 31760 | 0, // ssub_hi |
| 31761 | 0, // sub_32 |
| 31762 | 0, // sub_32_hi |
| 31763 | 0, // sube32 |
| 31764 | 0, // sube64 |
| 31765 | 0, // subo32 |
| 31766 | 0, // subo64 |
| 31767 | 0, // x8sub_0 |
| 31768 | 0, // x8sub_1 |
| 31769 | 0, // x8sub_2 |
| 31770 | 0, // x8sub_3 |
| 31771 | 0, // x8sub_4 |
| 31772 | 0, // x8sub_5 |
| 31773 | 0, // x8sub_6 |
| 31774 | 0, // x8sub_7 |
| 31775 | 0, // zasubb |
| 31776 | 0, // zasubd0 |
| 31777 | 0, // zasubd1 |
| 31778 | 0, // zasubh0 |
| 31779 | 0, // zasubh1 |
| 31780 | 0, // zasubq0 |
| 31781 | 0, // zasubq1 |
| 31782 | 0, // zasubs0 |
| 31783 | 0, // zasubs1 |
| 31784 | 0, // zsub |
| 31785 | 0, // zsub0 |
| 31786 | 0, // zsub1 |
| 31787 | 0, // zsub2 |
| 31788 | 0, // zsub3 |
| 31789 | 0, // zsub_hi |
| 31790 | 0, // zasubd1_then_zasubq0 |
| 31791 | 0, // zasubd1_then_zasubq1 |
| 31792 | 0, // zasubs1_then_zasubd0 |
| 31793 | 0, // zasubs1_then_zasubd1 |
| 31794 | 0, // zasubs1_then_zasubq0 |
| 31795 | 0, // zasubs1_then_zasubq1 |
| 31796 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 31797 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 31798 | 0, // zasubh1_then_zasubd0 |
| 31799 | 0, // zasubh1_then_zasubd1 |
| 31800 | 0, // zasubh1_then_zasubq0 |
| 31801 | 0, // zasubh1_then_zasubq1 |
| 31802 | 0, // zasubh1_then_zasubs0 |
| 31803 | 0, // zasubh1_then_zasubs1 |
| 31804 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 31805 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 31806 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 31807 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 31808 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 31809 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 31810 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 31811 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 31812 | 0, // dsub1_then_bsub |
| 31813 | 0, // dsub1_then_bsub_hi |
| 31814 | 0, // dsub1_then_hsub |
| 31815 | 0, // dsub1_then_hsub_hi |
| 31816 | 0, // dsub1_then_ssub |
| 31817 | 0, // dsub1_then_ssub_hi |
| 31818 | 0, // dsub3_then_bsub |
| 31819 | 0, // dsub3_then_bsub_hi |
| 31820 | 0, // dsub3_then_hsub |
| 31821 | 0, // dsub3_then_hsub_hi |
| 31822 | 0, // dsub3_then_ssub |
| 31823 | 0, // dsub3_then_ssub_hi |
| 31824 | 0, // dsub2_then_bsub |
| 31825 | 0, // dsub2_then_bsub_hi |
| 31826 | 0, // dsub2_then_hsub |
| 31827 | 0, // dsub2_then_hsub_hi |
| 31828 | 0, // dsub2_then_ssub |
| 31829 | 0, // dsub2_then_ssub_hi |
| 31830 | 0, // psub1_then_psub |
| 31831 | 0, // qsub1_then_dsub_hi |
| 31832 | 0, // qsub3_then_dsub_hi |
| 31833 | 0, // qsub2_then_dsub_hi |
| 31834 | 0, // x8sub_7_then_sub_32 |
| 31835 | 0, // x8sub_7_then_sub_32_hi |
| 31836 | 0, // x8sub_6_then_sub_32 |
| 31837 | 0, // x8sub_6_then_sub_32_hi |
| 31838 | 0, // x8sub_5_then_sub_32 |
| 31839 | 0, // x8sub_5_then_sub_32_hi |
| 31840 | 0, // x8sub_4_then_sub_32 |
| 31841 | 0, // x8sub_4_then_sub_32_hi |
| 31842 | 0, // x8sub_3_then_sub_32 |
| 31843 | 0, // x8sub_3_then_sub_32_hi |
| 31844 | 0, // x8sub_2_then_sub_32 |
| 31845 | 0, // x8sub_2_then_sub_32_hi |
| 31846 | 0, // x8sub_1_then_sub_32 |
| 31847 | 0, // x8sub_1_then_sub_32_hi |
| 31848 | 0, // subo64_then_sub_32 |
| 31849 | 0, // subo64_then_sub_32_hi |
| 31850 | 0, // zsub1_then_zsub_hi |
| 31851 | 0, // zsub3_then_zsub_hi |
| 31852 | 0, // zsub2_then_zsub_hi |
| 31853 | 0, // dsub0_dsub1 |
| 31854 | 0, // dsub0_dsub1_dsub2 |
| 31855 | 0, // dsub1_dsub2 |
| 31856 | 0, // dsub1_dsub2_dsub3 |
| 31857 | 0, // dsub2_dsub3 |
| 31858 | 0, // dsub_dsub1 |
| 31859 | 0, // dsub_dsub1_dsub2_dsub3 |
| 31860 | 0, // dsub_dsub1_dsub2 |
| 31861 | 0, // qsub0_qsub1 |
| 31862 | 0, // qsub0_qsub1_qsub2 |
| 31863 | 0, // qsub1_qsub2 |
| 31864 | 0, // qsub1_qsub2_qsub3 |
| 31865 | 0, // qsub2_qsub3 |
| 31866 | 0, // sub_32_x8sub_1_then_sub_32 |
| 31867 | 0, // x8sub_0_x8sub_1 |
| 31868 | 0, // x8sub_2_x8sub_3 |
| 31869 | 0, // x8sub_4_x8sub_5 |
| 31870 | 0, // x8sub_6_x8sub_7 |
| 31871 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 31872 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 31873 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 31874 | 0, // sub_32_subo64_then_sub_32 |
| 31875 | 0, // zsub_qsub1 |
| 31876 | 0, // zsub_qsub1_qsub2_qsub3 |
| 31877 | 0, // zsub_qsub1_qsub2 |
| 31878 | 0, // zsub0_zsub1 |
| 31879 | 0, // zsub0_zsub1_zsub2 |
| 31880 | 0, // zsub1_zsub2 |
| 31881 | 0, // zsub1_zsub2_zsub3 |
| 31882 | 0, // zsub2_zsub3 |
| 31883 | 0, // zsub0_zsub2 |
| 31884 | 0, // zsub1_zsub3 |
| 31885 | }, |
| 31886 | { // D_HI_DummyRC |
| 31887 | 0, // bsub |
| 31888 | 0, // bsub_hi |
| 31889 | 0, // dsub |
| 31890 | 0, // dsub0 |
| 31891 | 0, // dsub1 |
| 31892 | 0, // dsub2 |
| 31893 | 0, // dsub3 |
| 31894 | 0, // dsub_hi |
| 31895 | 0, // hsub |
| 31896 | 0, // hsub_hi |
| 31897 | 0, // psub |
| 31898 | 0, // psub0 |
| 31899 | 0, // psub1 |
| 31900 | 0, // qsub0 |
| 31901 | 0, // qsub1 |
| 31902 | 0, // qsub2 |
| 31903 | 0, // qsub3 |
| 31904 | 0, // ssub |
| 31905 | 0, // ssub_hi |
| 31906 | 0, // sub_32 |
| 31907 | 0, // sub_32_hi |
| 31908 | 0, // sube32 |
| 31909 | 0, // sube64 |
| 31910 | 0, // subo32 |
| 31911 | 0, // subo64 |
| 31912 | 0, // x8sub_0 |
| 31913 | 0, // x8sub_1 |
| 31914 | 0, // x8sub_2 |
| 31915 | 0, // x8sub_3 |
| 31916 | 0, // x8sub_4 |
| 31917 | 0, // x8sub_5 |
| 31918 | 0, // x8sub_6 |
| 31919 | 0, // x8sub_7 |
| 31920 | 0, // zasubb |
| 31921 | 0, // zasubd0 |
| 31922 | 0, // zasubd1 |
| 31923 | 0, // zasubh0 |
| 31924 | 0, // zasubh1 |
| 31925 | 0, // zasubq0 |
| 31926 | 0, // zasubq1 |
| 31927 | 0, // zasubs0 |
| 31928 | 0, // zasubs1 |
| 31929 | 0, // zsub |
| 31930 | 0, // zsub0 |
| 31931 | 0, // zsub1 |
| 31932 | 0, // zsub2 |
| 31933 | 0, // zsub3 |
| 31934 | 0, // zsub_hi |
| 31935 | 0, // zasubd1_then_zasubq0 |
| 31936 | 0, // zasubd1_then_zasubq1 |
| 31937 | 0, // zasubs1_then_zasubd0 |
| 31938 | 0, // zasubs1_then_zasubd1 |
| 31939 | 0, // zasubs1_then_zasubq0 |
| 31940 | 0, // zasubs1_then_zasubq1 |
| 31941 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 31942 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 31943 | 0, // zasubh1_then_zasubd0 |
| 31944 | 0, // zasubh1_then_zasubd1 |
| 31945 | 0, // zasubh1_then_zasubq0 |
| 31946 | 0, // zasubh1_then_zasubq1 |
| 31947 | 0, // zasubh1_then_zasubs0 |
| 31948 | 0, // zasubh1_then_zasubs1 |
| 31949 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 31950 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 31951 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 31952 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 31953 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 31954 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 31955 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 31956 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 31957 | 0, // dsub1_then_bsub |
| 31958 | 0, // dsub1_then_bsub_hi |
| 31959 | 0, // dsub1_then_hsub |
| 31960 | 0, // dsub1_then_hsub_hi |
| 31961 | 0, // dsub1_then_ssub |
| 31962 | 0, // dsub1_then_ssub_hi |
| 31963 | 0, // dsub3_then_bsub |
| 31964 | 0, // dsub3_then_bsub_hi |
| 31965 | 0, // dsub3_then_hsub |
| 31966 | 0, // dsub3_then_hsub_hi |
| 31967 | 0, // dsub3_then_ssub |
| 31968 | 0, // dsub3_then_ssub_hi |
| 31969 | 0, // dsub2_then_bsub |
| 31970 | 0, // dsub2_then_bsub_hi |
| 31971 | 0, // dsub2_then_hsub |
| 31972 | 0, // dsub2_then_hsub_hi |
| 31973 | 0, // dsub2_then_ssub |
| 31974 | 0, // dsub2_then_ssub_hi |
| 31975 | 0, // psub1_then_psub |
| 31976 | 0, // qsub1_then_dsub_hi |
| 31977 | 0, // qsub3_then_dsub_hi |
| 31978 | 0, // qsub2_then_dsub_hi |
| 31979 | 0, // x8sub_7_then_sub_32 |
| 31980 | 0, // x8sub_7_then_sub_32_hi |
| 31981 | 0, // x8sub_6_then_sub_32 |
| 31982 | 0, // x8sub_6_then_sub_32_hi |
| 31983 | 0, // x8sub_5_then_sub_32 |
| 31984 | 0, // x8sub_5_then_sub_32_hi |
| 31985 | 0, // x8sub_4_then_sub_32 |
| 31986 | 0, // x8sub_4_then_sub_32_hi |
| 31987 | 0, // x8sub_3_then_sub_32 |
| 31988 | 0, // x8sub_3_then_sub_32_hi |
| 31989 | 0, // x8sub_2_then_sub_32 |
| 31990 | 0, // x8sub_2_then_sub_32_hi |
| 31991 | 0, // x8sub_1_then_sub_32 |
| 31992 | 0, // x8sub_1_then_sub_32_hi |
| 31993 | 0, // subo64_then_sub_32 |
| 31994 | 0, // subo64_then_sub_32_hi |
| 31995 | 0, // zsub1_then_zsub_hi |
| 31996 | 0, // zsub3_then_zsub_hi |
| 31997 | 0, // zsub2_then_zsub_hi |
| 31998 | 0, // dsub0_dsub1 |
| 31999 | 0, // dsub0_dsub1_dsub2 |
| 32000 | 0, // dsub1_dsub2 |
| 32001 | 0, // dsub1_dsub2_dsub3 |
| 32002 | 0, // dsub2_dsub3 |
| 32003 | 0, // dsub_dsub1 |
| 32004 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32005 | 0, // dsub_dsub1_dsub2 |
| 32006 | 0, // qsub0_qsub1 |
| 32007 | 0, // qsub0_qsub1_qsub2 |
| 32008 | 0, // qsub1_qsub2 |
| 32009 | 0, // qsub1_qsub2_qsub3 |
| 32010 | 0, // qsub2_qsub3 |
| 32011 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32012 | 0, // x8sub_0_x8sub_1 |
| 32013 | 0, // x8sub_2_x8sub_3 |
| 32014 | 0, // x8sub_4_x8sub_5 |
| 32015 | 0, // x8sub_6_x8sub_7 |
| 32016 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32017 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32018 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32019 | 0, // sub_32_subo64_then_sub_32 |
| 32020 | 0, // zsub_qsub1 |
| 32021 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32022 | 0, // zsub_qsub1_qsub2 |
| 32023 | 0, // zsub0_zsub1 |
| 32024 | 0, // zsub0_zsub1_zsub2 |
| 32025 | 0, // zsub1_zsub2 |
| 32026 | 0, // zsub1_zsub2_zsub3 |
| 32027 | 0, // zsub2_zsub3 |
| 32028 | 0, // zsub0_zsub2 |
| 32029 | 0, // zsub1_zsub3 |
| 32030 | }, |
| 32031 | { // H_HI_DummyRC |
| 32032 | 0, // bsub |
| 32033 | 0, // bsub_hi |
| 32034 | 0, // dsub |
| 32035 | 0, // dsub0 |
| 32036 | 0, // dsub1 |
| 32037 | 0, // dsub2 |
| 32038 | 0, // dsub3 |
| 32039 | 0, // dsub_hi |
| 32040 | 0, // hsub |
| 32041 | 0, // hsub_hi |
| 32042 | 0, // psub |
| 32043 | 0, // psub0 |
| 32044 | 0, // psub1 |
| 32045 | 0, // qsub0 |
| 32046 | 0, // qsub1 |
| 32047 | 0, // qsub2 |
| 32048 | 0, // qsub3 |
| 32049 | 0, // ssub |
| 32050 | 0, // ssub_hi |
| 32051 | 0, // sub_32 |
| 32052 | 0, // sub_32_hi |
| 32053 | 0, // sube32 |
| 32054 | 0, // sube64 |
| 32055 | 0, // subo32 |
| 32056 | 0, // subo64 |
| 32057 | 0, // x8sub_0 |
| 32058 | 0, // x8sub_1 |
| 32059 | 0, // x8sub_2 |
| 32060 | 0, // x8sub_3 |
| 32061 | 0, // x8sub_4 |
| 32062 | 0, // x8sub_5 |
| 32063 | 0, // x8sub_6 |
| 32064 | 0, // x8sub_7 |
| 32065 | 0, // zasubb |
| 32066 | 0, // zasubd0 |
| 32067 | 0, // zasubd1 |
| 32068 | 0, // zasubh0 |
| 32069 | 0, // zasubh1 |
| 32070 | 0, // zasubq0 |
| 32071 | 0, // zasubq1 |
| 32072 | 0, // zasubs0 |
| 32073 | 0, // zasubs1 |
| 32074 | 0, // zsub |
| 32075 | 0, // zsub0 |
| 32076 | 0, // zsub1 |
| 32077 | 0, // zsub2 |
| 32078 | 0, // zsub3 |
| 32079 | 0, // zsub_hi |
| 32080 | 0, // zasubd1_then_zasubq0 |
| 32081 | 0, // zasubd1_then_zasubq1 |
| 32082 | 0, // zasubs1_then_zasubd0 |
| 32083 | 0, // zasubs1_then_zasubd1 |
| 32084 | 0, // zasubs1_then_zasubq0 |
| 32085 | 0, // zasubs1_then_zasubq1 |
| 32086 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32087 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32088 | 0, // zasubh1_then_zasubd0 |
| 32089 | 0, // zasubh1_then_zasubd1 |
| 32090 | 0, // zasubh1_then_zasubq0 |
| 32091 | 0, // zasubh1_then_zasubq1 |
| 32092 | 0, // zasubh1_then_zasubs0 |
| 32093 | 0, // zasubh1_then_zasubs1 |
| 32094 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32095 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32096 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32097 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32098 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32099 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32100 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32101 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32102 | 0, // dsub1_then_bsub |
| 32103 | 0, // dsub1_then_bsub_hi |
| 32104 | 0, // dsub1_then_hsub |
| 32105 | 0, // dsub1_then_hsub_hi |
| 32106 | 0, // dsub1_then_ssub |
| 32107 | 0, // dsub1_then_ssub_hi |
| 32108 | 0, // dsub3_then_bsub |
| 32109 | 0, // dsub3_then_bsub_hi |
| 32110 | 0, // dsub3_then_hsub |
| 32111 | 0, // dsub3_then_hsub_hi |
| 32112 | 0, // dsub3_then_ssub |
| 32113 | 0, // dsub3_then_ssub_hi |
| 32114 | 0, // dsub2_then_bsub |
| 32115 | 0, // dsub2_then_bsub_hi |
| 32116 | 0, // dsub2_then_hsub |
| 32117 | 0, // dsub2_then_hsub_hi |
| 32118 | 0, // dsub2_then_ssub |
| 32119 | 0, // dsub2_then_ssub_hi |
| 32120 | 0, // psub1_then_psub |
| 32121 | 0, // qsub1_then_dsub_hi |
| 32122 | 0, // qsub3_then_dsub_hi |
| 32123 | 0, // qsub2_then_dsub_hi |
| 32124 | 0, // x8sub_7_then_sub_32 |
| 32125 | 0, // x8sub_7_then_sub_32_hi |
| 32126 | 0, // x8sub_6_then_sub_32 |
| 32127 | 0, // x8sub_6_then_sub_32_hi |
| 32128 | 0, // x8sub_5_then_sub_32 |
| 32129 | 0, // x8sub_5_then_sub_32_hi |
| 32130 | 0, // x8sub_4_then_sub_32 |
| 32131 | 0, // x8sub_4_then_sub_32_hi |
| 32132 | 0, // x8sub_3_then_sub_32 |
| 32133 | 0, // x8sub_3_then_sub_32_hi |
| 32134 | 0, // x8sub_2_then_sub_32 |
| 32135 | 0, // x8sub_2_then_sub_32_hi |
| 32136 | 0, // x8sub_1_then_sub_32 |
| 32137 | 0, // x8sub_1_then_sub_32_hi |
| 32138 | 0, // subo64_then_sub_32 |
| 32139 | 0, // subo64_then_sub_32_hi |
| 32140 | 0, // zsub1_then_zsub_hi |
| 32141 | 0, // zsub3_then_zsub_hi |
| 32142 | 0, // zsub2_then_zsub_hi |
| 32143 | 0, // dsub0_dsub1 |
| 32144 | 0, // dsub0_dsub1_dsub2 |
| 32145 | 0, // dsub1_dsub2 |
| 32146 | 0, // dsub1_dsub2_dsub3 |
| 32147 | 0, // dsub2_dsub3 |
| 32148 | 0, // dsub_dsub1 |
| 32149 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32150 | 0, // dsub_dsub1_dsub2 |
| 32151 | 0, // qsub0_qsub1 |
| 32152 | 0, // qsub0_qsub1_qsub2 |
| 32153 | 0, // qsub1_qsub2 |
| 32154 | 0, // qsub1_qsub2_qsub3 |
| 32155 | 0, // qsub2_qsub3 |
| 32156 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32157 | 0, // x8sub_0_x8sub_1 |
| 32158 | 0, // x8sub_2_x8sub_3 |
| 32159 | 0, // x8sub_4_x8sub_5 |
| 32160 | 0, // x8sub_6_x8sub_7 |
| 32161 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32162 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32163 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32164 | 0, // sub_32_subo64_then_sub_32 |
| 32165 | 0, // zsub_qsub1 |
| 32166 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32167 | 0, // zsub_qsub1_qsub2 |
| 32168 | 0, // zsub0_zsub1 |
| 32169 | 0, // zsub0_zsub1_zsub2 |
| 32170 | 0, // zsub1_zsub2 |
| 32171 | 0, // zsub1_zsub2_zsub3 |
| 32172 | 0, // zsub2_zsub3 |
| 32173 | 0, // zsub0_zsub2 |
| 32174 | 0, // zsub1_zsub3 |
| 32175 | }, |
| 32176 | { // Q_HI_DummyRC |
| 32177 | 0, // bsub |
| 32178 | 0, // bsub_hi |
| 32179 | 0, // dsub |
| 32180 | 0, // dsub0 |
| 32181 | 0, // dsub1 |
| 32182 | 0, // dsub2 |
| 32183 | 0, // dsub3 |
| 32184 | 0, // dsub_hi |
| 32185 | 0, // hsub |
| 32186 | 0, // hsub_hi |
| 32187 | 0, // psub |
| 32188 | 0, // psub0 |
| 32189 | 0, // psub1 |
| 32190 | 0, // qsub0 |
| 32191 | 0, // qsub1 |
| 32192 | 0, // qsub2 |
| 32193 | 0, // qsub3 |
| 32194 | 0, // ssub |
| 32195 | 0, // ssub_hi |
| 32196 | 0, // sub_32 |
| 32197 | 0, // sub_32_hi |
| 32198 | 0, // sube32 |
| 32199 | 0, // sube64 |
| 32200 | 0, // subo32 |
| 32201 | 0, // subo64 |
| 32202 | 0, // x8sub_0 |
| 32203 | 0, // x8sub_1 |
| 32204 | 0, // x8sub_2 |
| 32205 | 0, // x8sub_3 |
| 32206 | 0, // x8sub_4 |
| 32207 | 0, // x8sub_5 |
| 32208 | 0, // x8sub_6 |
| 32209 | 0, // x8sub_7 |
| 32210 | 0, // zasubb |
| 32211 | 0, // zasubd0 |
| 32212 | 0, // zasubd1 |
| 32213 | 0, // zasubh0 |
| 32214 | 0, // zasubh1 |
| 32215 | 0, // zasubq0 |
| 32216 | 0, // zasubq1 |
| 32217 | 0, // zasubs0 |
| 32218 | 0, // zasubs1 |
| 32219 | 0, // zsub |
| 32220 | 0, // zsub0 |
| 32221 | 0, // zsub1 |
| 32222 | 0, // zsub2 |
| 32223 | 0, // zsub3 |
| 32224 | 0, // zsub_hi |
| 32225 | 0, // zasubd1_then_zasubq0 |
| 32226 | 0, // zasubd1_then_zasubq1 |
| 32227 | 0, // zasubs1_then_zasubd0 |
| 32228 | 0, // zasubs1_then_zasubd1 |
| 32229 | 0, // zasubs1_then_zasubq0 |
| 32230 | 0, // zasubs1_then_zasubq1 |
| 32231 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32232 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32233 | 0, // zasubh1_then_zasubd0 |
| 32234 | 0, // zasubh1_then_zasubd1 |
| 32235 | 0, // zasubh1_then_zasubq0 |
| 32236 | 0, // zasubh1_then_zasubq1 |
| 32237 | 0, // zasubh1_then_zasubs0 |
| 32238 | 0, // zasubh1_then_zasubs1 |
| 32239 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32240 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32241 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32242 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32243 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32244 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32245 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32246 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32247 | 0, // dsub1_then_bsub |
| 32248 | 0, // dsub1_then_bsub_hi |
| 32249 | 0, // dsub1_then_hsub |
| 32250 | 0, // dsub1_then_hsub_hi |
| 32251 | 0, // dsub1_then_ssub |
| 32252 | 0, // dsub1_then_ssub_hi |
| 32253 | 0, // dsub3_then_bsub |
| 32254 | 0, // dsub3_then_bsub_hi |
| 32255 | 0, // dsub3_then_hsub |
| 32256 | 0, // dsub3_then_hsub_hi |
| 32257 | 0, // dsub3_then_ssub |
| 32258 | 0, // dsub3_then_ssub_hi |
| 32259 | 0, // dsub2_then_bsub |
| 32260 | 0, // dsub2_then_bsub_hi |
| 32261 | 0, // dsub2_then_hsub |
| 32262 | 0, // dsub2_then_hsub_hi |
| 32263 | 0, // dsub2_then_ssub |
| 32264 | 0, // dsub2_then_ssub_hi |
| 32265 | 0, // psub1_then_psub |
| 32266 | 0, // qsub1_then_dsub_hi |
| 32267 | 0, // qsub3_then_dsub_hi |
| 32268 | 0, // qsub2_then_dsub_hi |
| 32269 | 0, // x8sub_7_then_sub_32 |
| 32270 | 0, // x8sub_7_then_sub_32_hi |
| 32271 | 0, // x8sub_6_then_sub_32 |
| 32272 | 0, // x8sub_6_then_sub_32_hi |
| 32273 | 0, // x8sub_5_then_sub_32 |
| 32274 | 0, // x8sub_5_then_sub_32_hi |
| 32275 | 0, // x8sub_4_then_sub_32 |
| 32276 | 0, // x8sub_4_then_sub_32_hi |
| 32277 | 0, // x8sub_3_then_sub_32 |
| 32278 | 0, // x8sub_3_then_sub_32_hi |
| 32279 | 0, // x8sub_2_then_sub_32 |
| 32280 | 0, // x8sub_2_then_sub_32_hi |
| 32281 | 0, // x8sub_1_then_sub_32 |
| 32282 | 0, // x8sub_1_then_sub_32_hi |
| 32283 | 0, // subo64_then_sub_32 |
| 32284 | 0, // subo64_then_sub_32_hi |
| 32285 | 0, // zsub1_then_zsub_hi |
| 32286 | 0, // zsub3_then_zsub_hi |
| 32287 | 0, // zsub2_then_zsub_hi |
| 32288 | 0, // dsub0_dsub1 |
| 32289 | 0, // dsub0_dsub1_dsub2 |
| 32290 | 0, // dsub1_dsub2 |
| 32291 | 0, // dsub1_dsub2_dsub3 |
| 32292 | 0, // dsub2_dsub3 |
| 32293 | 0, // dsub_dsub1 |
| 32294 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32295 | 0, // dsub_dsub1_dsub2 |
| 32296 | 0, // qsub0_qsub1 |
| 32297 | 0, // qsub0_qsub1_qsub2 |
| 32298 | 0, // qsub1_qsub2 |
| 32299 | 0, // qsub1_qsub2_qsub3 |
| 32300 | 0, // qsub2_qsub3 |
| 32301 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32302 | 0, // x8sub_0_x8sub_1 |
| 32303 | 0, // x8sub_2_x8sub_3 |
| 32304 | 0, // x8sub_4_x8sub_5 |
| 32305 | 0, // x8sub_6_x8sub_7 |
| 32306 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32307 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32308 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32309 | 0, // sub_32_subo64_then_sub_32 |
| 32310 | 0, // zsub_qsub1 |
| 32311 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32312 | 0, // zsub_qsub1_qsub2 |
| 32313 | 0, // zsub0_zsub1 |
| 32314 | 0, // zsub0_zsub1_zsub2 |
| 32315 | 0, // zsub1_zsub2 |
| 32316 | 0, // zsub1_zsub2_zsub3 |
| 32317 | 0, // zsub2_zsub3 |
| 32318 | 0, // zsub0_zsub2 |
| 32319 | 0, // zsub1_zsub3 |
| 32320 | }, |
| 32321 | { // S_HI_DummyRC |
| 32322 | 0, // bsub |
| 32323 | 0, // bsub_hi |
| 32324 | 0, // dsub |
| 32325 | 0, // dsub0 |
| 32326 | 0, // dsub1 |
| 32327 | 0, // dsub2 |
| 32328 | 0, // dsub3 |
| 32329 | 0, // dsub_hi |
| 32330 | 0, // hsub |
| 32331 | 0, // hsub_hi |
| 32332 | 0, // psub |
| 32333 | 0, // psub0 |
| 32334 | 0, // psub1 |
| 32335 | 0, // qsub0 |
| 32336 | 0, // qsub1 |
| 32337 | 0, // qsub2 |
| 32338 | 0, // qsub3 |
| 32339 | 0, // ssub |
| 32340 | 0, // ssub_hi |
| 32341 | 0, // sub_32 |
| 32342 | 0, // sub_32_hi |
| 32343 | 0, // sube32 |
| 32344 | 0, // sube64 |
| 32345 | 0, // subo32 |
| 32346 | 0, // subo64 |
| 32347 | 0, // x8sub_0 |
| 32348 | 0, // x8sub_1 |
| 32349 | 0, // x8sub_2 |
| 32350 | 0, // x8sub_3 |
| 32351 | 0, // x8sub_4 |
| 32352 | 0, // x8sub_5 |
| 32353 | 0, // x8sub_6 |
| 32354 | 0, // x8sub_7 |
| 32355 | 0, // zasubb |
| 32356 | 0, // zasubd0 |
| 32357 | 0, // zasubd1 |
| 32358 | 0, // zasubh0 |
| 32359 | 0, // zasubh1 |
| 32360 | 0, // zasubq0 |
| 32361 | 0, // zasubq1 |
| 32362 | 0, // zasubs0 |
| 32363 | 0, // zasubs1 |
| 32364 | 0, // zsub |
| 32365 | 0, // zsub0 |
| 32366 | 0, // zsub1 |
| 32367 | 0, // zsub2 |
| 32368 | 0, // zsub3 |
| 32369 | 0, // zsub_hi |
| 32370 | 0, // zasubd1_then_zasubq0 |
| 32371 | 0, // zasubd1_then_zasubq1 |
| 32372 | 0, // zasubs1_then_zasubd0 |
| 32373 | 0, // zasubs1_then_zasubd1 |
| 32374 | 0, // zasubs1_then_zasubq0 |
| 32375 | 0, // zasubs1_then_zasubq1 |
| 32376 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32377 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32378 | 0, // zasubh1_then_zasubd0 |
| 32379 | 0, // zasubh1_then_zasubd1 |
| 32380 | 0, // zasubh1_then_zasubq0 |
| 32381 | 0, // zasubh1_then_zasubq1 |
| 32382 | 0, // zasubh1_then_zasubs0 |
| 32383 | 0, // zasubh1_then_zasubs1 |
| 32384 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32385 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32386 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32387 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32388 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32389 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32390 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32391 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32392 | 0, // dsub1_then_bsub |
| 32393 | 0, // dsub1_then_bsub_hi |
| 32394 | 0, // dsub1_then_hsub |
| 32395 | 0, // dsub1_then_hsub_hi |
| 32396 | 0, // dsub1_then_ssub |
| 32397 | 0, // dsub1_then_ssub_hi |
| 32398 | 0, // dsub3_then_bsub |
| 32399 | 0, // dsub3_then_bsub_hi |
| 32400 | 0, // dsub3_then_hsub |
| 32401 | 0, // dsub3_then_hsub_hi |
| 32402 | 0, // dsub3_then_ssub |
| 32403 | 0, // dsub3_then_ssub_hi |
| 32404 | 0, // dsub2_then_bsub |
| 32405 | 0, // dsub2_then_bsub_hi |
| 32406 | 0, // dsub2_then_hsub |
| 32407 | 0, // dsub2_then_hsub_hi |
| 32408 | 0, // dsub2_then_ssub |
| 32409 | 0, // dsub2_then_ssub_hi |
| 32410 | 0, // psub1_then_psub |
| 32411 | 0, // qsub1_then_dsub_hi |
| 32412 | 0, // qsub3_then_dsub_hi |
| 32413 | 0, // qsub2_then_dsub_hi |
| 32414 | 0, // x8sub_7_then_sub_32 |
| 32415 | 0, // x8sub_7_then_sub_32_hi |
| 32416 | 0, // x8sub_6_then_sub_32 |
| 32417 | 0, // x8sub_6_then_sub_32_hi |
| 32418 | 0, // x8sub_5_then_sub_32 |
| 32419 | 0, // x8sub_5_then_sub_32_hi |
| 32420 | 0, // x8sub_4_then_sub_32 |
| 32421 | 0, // x8sub_4_then_sub_32_hi |
| 32422 | 0, // x8sub_3_then_sub_32 |
| 32423 | 0, // x8sub_3_then_sub_32_hi |
| 32424 | 0, // x8sub_2_then_sub_32 |
| 32425 | 0, // x8sub_2_then_sub_32_hi |
| 32426 | 0, // x8sub_1_then_sub_32 |
| 32427 | 0, // x8sub_1_then_sub_32_hi |
| 32428 | 0, // subo64_then_sub_32 |
| 32429 | 0, // subo64_then_sub_32_hi |
| 32430 | 0, // zsub1_then_zsub_hi |
| 32431 | 0, // zsub3_then_zsub_hi |
| 32432 | 0, // zsub2_then_zsub_hi |
| 32433 | 0, // dsub0_dsub1 |
| 32434 | 0, // dsub0_dsub1_dsub2 |
| 32435 | 0, // dsub1_dsub2 |
| 32436 | 0, // dsub1_dsub2_dsub3 |
| 32437 | 0, // dsub2_dsub3 |
| 32438 | 0, // dsub_dsub1 |
| 32439 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32440 | 0, // dsub_dsub1_dsub2 |
| 32441 | 0, // qsub0_qsub1 |
| 32442 | 0, // qsub0_qsub1_qsub2 |
| 32443 | 0, // qsub1_qsub2 |
| 32444 | 0, // qsub1_qsub2_qsub3 |
| 32445 | 0, // qsub2_qsub3 |
| 32446 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32447 | 0, // x8sub_0_x8sub_1 |
| 32448 | 0, // x8sub_2_x8sub_3 |
| 32449 | 0, // x8sub_4_x8sub_5 |
| 32450 | 0, // x8sub_6_x8sub_7 |
| 32451 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32452 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32453 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32454 | 0, // sub_32_subo64_then_sub_32 |
| 32455 | 0, // zsub_qsub1 |
| 32456 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32457 | 0, // zsub_qsub1_qsub2 |
| 32458 | 0, // zsub0_zsub1 |
| 32459 | 0, // zsub0_zsub1_zsub2 |
| 32460 | 0, // zsub1_zsub2 |
| 32461 | 0, // zsub1_zsub2_zsub3 |
| 32462 | 0, // zsub2_zsub3 |
| 32463 | 0, // zsub0_zsub2 |
| 32464 | 0, // zsub1_zsub3 |
| 32465 | }, |
| 32466 | { // FPR8 |
| 32467 | 0, // bsub |
| 32468 | 0, // bsub_hi |
| 32469 | 0, // dsub |
| 32470 | 0, // dsub0 |
| 32471 | 0, // dsub1 |
| 32472 | 0, // dsub2 |
| 32473 | 0, // dsub3 |
| 32474 | 0, // dsub_hi |
| 32475 | 0, // hsub |
| 32476 | 0, // hsub_hi |
| 32477 | 0, // psub |
| 32478 | 0, // psub0 |
| 32479 | 0, // psub1 |
| 32480 | 0, // qsub0 |
| 32481 | 0, // qsub1 |
| 32482 | 0, // qsub2 |
| 32483 | 0, // qsub3 |
| 32484 | 0, // ssub |
| 32485 | 0, // ssub_hi |
| 32486 | 0, // sub_32 |
| 32487 | 0, // sub_32_hi |
| 32488 | 0, // sube32 |
| 32489 | 0, // sube64 |
| 32490 | 0, // subo32 |
| 32491 | 0, // subo64 |
| 32492 | 0, // x8sub_0 |
| 32493 | 0, // x8sub_1 |
| 32494 | 0, // x8sub_2 |
| 32495 | 0, // x8sub_3 |
| 32496 | 0, // x8sub_4 |
| 32497 | 0, // x8sub_5 |
| 32498 | 0, // x8sub_6 |
| 32499 | 0, // x8sub_7 |
| 32500 | 0, // zasubb |
| 32501 | 0, // zasubd0 |
| 32502 | 0, // zasubd1 |
| 32503 | 0, // zasubh0 |
| 32504 | 0, // zasubh1 |
| 32505 | 0, // zasubq0 |
| 32506 | 0, // zasubq1 |
| 32507 | 0, // zasubs0 |
| 32508 | 0, // zasubs1 |
| 32509 | 0, // zsub |
| 32510 | 0, // zsub0 |
| 32511 | 0, // zsub1 |
| 32512 | 0, // zsub2 |
| 32513 | 0, // zsub3 |
| 32514 | 0, // zsub_hi |
| 32515 | 0, // zasubd1_then_zasubq0 |
| 32516 | 0, // zasubd1_then_zasubq1 |
| 32517 | 0, // zasubs1_then_zasubd0 |
| 32518 | 0, // zasubs1_then_zasubd1 |
| 32519 | 0, // zasubs1_then_zasubq0 |
| 32520 | 0, // zasubs1_then_zasubq1 |
| 32521 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32522 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32523 | 0, // zasubh1_then_zasubd0 |
| 32524 | 0, // zasubh1_then_zasubd1 |
| 32525 | 0, // zasubh1_then_zasubq0 |
| 32526 | 0, // zasubh1_then_zasubq1 |
| 32527 | 0, // zasubh1_then_zasubs0 |
| 32528 | 0, // zasubh1_then_zasubs1 |
| 32529 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32530 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32531 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32532 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32533 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32534 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32535 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32536 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32537 | 0, // dsub1_then_bsub |
| 32538 | 0, // dsub1_then_bsub_hi |
| 32539 | 0, // dsub1_then_hsub |
| 32540 | 0, // dsub1_then_hsub_hi |
| 32541 | 0, // dsub1_then_ssub |
| 32542 | 0, // dsub1_then_ssub_hi |
| 32543 | 0, // dsub3_then_bsub |
| 32544 | 0, // dsub3_then_bsub_hi |
| 32545 | 0, // dsub3_then_hsub |
| 32546 | 0, // dsub3_then_hsub_hi |
| 32547 | 0, // dsub3_then_ssub |
| 32548 | 0, // dsub3_then_ssub_hi |
| 32549 | 0, // dsub2_then_bsub |
| 32550 | 0, // dsub2_then_bsub_hi |
| 32551 | 0, // dsub2_then_hsub |
| 32552 | 0, // dsub2_then_hsub_hi |
| 32553 | 0, // dsub2_then_ssub |
| 32554 | 0, // dsub2_then_ssub_hi |
| 32555 | 0, // psub1_then_psub |
| 32556 | 0, // qsub1_then_dsub_hi |
| 32557 | 0, // qsub3_then_dsub_hi |
| 32558 | 0, // qsub2_then_dsub_hi |
| 32559 | 0, // x8sub_7_then_sub_32 |
| 32560 | 0, // x8sub_7_then_sub_32_hi |
| 32561 | 0, // x8sub_6_then_sub_32 |
| 32562 | 0, // x8sub_6_then_sub_32_hi |
| 32563 | 0, // x8sub_5_then_sub_32 |
| 32564 | 0, // x8sub_5_then_sub_32_hi |
| 32565 | 0, // x8sub_4_then_sub_32 |
| 32566 | 0, // x8sub_4_then_sub_32_hi |
| 32567 | 0, // x8sub_3_then_sub_32 |
| 32568 | 0, // x8sub_3_then_sub_32_hi |
| 32569 | 0, // x8sub_2_then_sub_32 |
| 32570 | 0, // x8sub_2_then_sub_32_hi |
| 32571 | 0, // x8sub_1_then_sub_32 |
| 32572 | 0, // x8sub_1_then_sub_32_hi |
| 32573 | 0, // subo64_then_sub_32 |
| 32574 | 0, // subo64_then_sub_32_hi |
| 32575 | 0, // zsub1_then_zsub_hi |
| 32576 | 0, // zsub3_then_zsub_hi |
| 32577 | 0, // zsub2_then_zsub_hi |
| 32578 | 0, // dsub0_dsub1 |
| 32579 | 0, // dsub0_dsub1_dsub2 |
| 32580 | 0, // dsub1_dsub2 |
| 32581 | 0, // dsub1_dsub2_dsub3 |
| 32582 | 0, // dsub2_dsub3 |
| 32583 | 0, // dsub_dsub1 |
| 32584 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32585 | 0, // dsub_dsub1_dsub2 |
| 32586 | 0, // qsub0_qsub1 |
| 32587 | 0, // qsub0_qsub1_qsub2 |
| 32588 | 0, // qsub1_qsub2 |
| 32589 | 0, // qsub1_qsub2_qsub3 |
| 32590 | 0, // qsub2_qsub3 |
| 32591 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32592 | 0, // x8sub_0_x8sub_1 |
| 32593 | 0, // x8sub_2_x8sub_3 |
| 32594 | 0, // x8sub_4_x8sub_5 |
| 32595 | 0, // x8sub_6_x8sub_7 |
| 32596 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32597 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32598 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32599 | 0, // sub_32_subo64_then_sub_32 |
| 32600 | 0, // zsub_qsub1 |
| 32601 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32602 | 0, // zsub_qsub1_qsub2 |
| 32603 | 0, // zsub0_zsub1 |
| 32604 | 0, // zsub0_zsub1_zsub2 |
| 32605 | 0, // zsub1_zsub2 |
| 32606 | 0, // zsub1_zsub2_zsub3 |
| 32607 | 0, // zsub2_zsub3 |
| 32608 | 0, // zsub0_zsub2 |
| 32609 | 0, // zsub1_zsub3 |
| 32610 | }, |
| 32611 | { // FPR16 |
| 32612 | 8, // bsub -> FPR16 |
| 32613 | 8, // bsub_hi -> FPR16 |
| 32614 | 0, // dsub |
| 32615 | 0, // dsub0 |
| 32616 | 0, // dsub1 |
| 32617 | 0, // dsub2 |
| 32618 | 0, // dsub3 |
| 32619 | 0, // dsub_hi |
| 32620 | 0, // hsub |
| 32621 | 0, // hsub_hi |
| 32622 | 0, // psub |
| 32623 | 0, // psub0 |
| 32624 | 0, // psub1 |
| 32625 | 0, // qsub0 |
| 32626 | 0, // qsub1 |
| 32627 | 0, // qsub2 |
| 32628 | 0, // qsub3 |
| 32629 | 0, // ssub |
| 32630 | 0, // ssub_hi |
| 32631 | 0, // sub_32 |
| 32632 | 0, // sub_32_hi |
| 32633 | 0, // sube32 |
| 32634 | 0, // sube64 |
| 32635 | 0, // subo32 |
| 32636 | 0, // subo64 |
| 32637 | 0, // x8sub_0 |
| 32638 | 0, // x8sub_1 |
| 32639 | 0, // x8sub_2 |
| 32640 | 0, // x8sub_3 |
| 32641 | 0, // x8sub_4 |
| 32642 | 0, // x8sub_5 |
| 32643 | 0, // x8sub_6 |
| 32644 | 0, // x8sub_7 |
| 32645 | 0, // zasubb |
| 32646 | 0, // zasubd0 |
| 32647 | 0, // zasubd1 |
| 32648 | 0, // zasubh0 |
| 32649 | 0, // zasubh1 |
| 32650 | 0, // zasubq0 |
| 32651 | 0, // zasubq1 |
| 32652 | 0, // zasubs0 |
| 32653 | 0, // zasubs1 |
| 32654 | 0, // zsub |
| 32655 | 0, // zsub0 |
| 32656 | 0, // zsub1 |
| 32657 | 0, // zsub2 |
| 32658 | 0, // zsub3 |
| 32659 | 0, // zsub_hi |
| 32660 | 0, // zasubd1_then_zasubq0 |
| 32661 | 0, // zasubd1_then_zasubq1 |
| 32662 | 0, // zasubs1_then_zasubd0 |
| 32663 | 0, // zasubs1_then_zasubd1 |
| 32664 | 0, // zasubs1_then_zasubq0 |
| 32665 | 0, // zasubs1_then_zasubq1 |
| 32666 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32667 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32668 | 0, // zasubh1_then_zasubd0 |
| 32669 | 0, // zasubh1_then_zasubd1 |
| 32670 | 0, // zasubh1_then_zasubq0 |
| 32671 | 0, // zasubh1_then_zasubq1 |
| 32672 | 0, // zasubh1_then_zasubs0 |
| 32673 | 0, // zasubh1_then_zasubs1 |
| 32674 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32675 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32676 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32677 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32678 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32679 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32680 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32681 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32682 | 0, // dsub1_then_bsub |
| 32683 | 0, // dsub1_then_bsub_hi |
| 32684 | 0, // dsub1_then_hsub |
| 32685 | 0, // dsub1_then_hsub_hi |
| 32686 | 0, // dsub1_then_ssub |
| 32687 | 0, // dsub1_then_ssub_hi |
| 32688 | 0, // dsub3_then_bsub |
| 32689 | 0, // dsub3_then_bsub_hi |
| 32690 | 0, // dsub3_then_hsub |
| 32691 | 0, // dsub3_then_hsub_hi |
| 32692 | 0, // dsub3_then_ssub |
| 32693 | 0, // dsub3_then_ssub_hi |
| 32694 | 0, // dsub2_then_bsub |
| 32695 | 0, // dsub2_then_bsub_hi |
| 32696 | 0, // dsub2_then_hsub |
| 32697 | 0, // dsub2_then_hsub_hi |
| 32698 | 0, // dsub2_then_ssub |
| 32699 | 0, // dsub2_then_ssub_hi |
| 32700 | 0, // psub1_then_psub |
| 32701 | 0, // qsub1_then_dsub_hi |
| 32702 | 0, // qsub3_then_dsub_hi |
| 32703 | 0, // qsub2_then_dsub_hi |
| 32704 | 0, // x8sub_7_then_sub_32 |
| 32705 | 0, // x8sub_7_then_sub_32_hi |
| 32706 | 0, // x8sub_6_then_sub_32 |
| 32707 | 0, // x8sub_6_then_sub_32_hi |
| 32708 | 0, // x8sub_5_then_sub_32 |
| 32709 | 0, // x8sub_5_then_sub_32_hi |
| 32710 | 0, // x8sub_4_then_sub_32 |
| 32711 | 0, // x8sub_4_then_sub_32_hi |
| 32712 | 0, // x8sub_3_then_sub_32 |
| 32713 | 0, // x8sub_3_then_sub_32_hi |
| 32714 | 0, // x8sub_2_then_sub_32 |
| 32715 | 0, // x8sub_2_then_sub_32_hi |
| 32716 | 0, // x8sub_1_then_sub_32 |
| 32717 | 0, // x8sub_1_then_sub_32_hi |
| 32718 | 0, // subo64_then_sub_32 |
| 32719 | 0, // subo64_then_sub_32_hi |
| 32720 | 0, // zsub1_then_zsub_hi |
| 32721 | 0, // zsub3_then_zsub_hi |
| 32722 | 0, // zsub2_then_zsub_hi |
| 32723 | 0, // dsub0_dsub1 |
| 32724 | 0, // dsub0_dsub1_dsub2 |
| 32725 | 0, // dsub1_dsub2 |
| 32726 | 0, // dsub1_dsub2_dsub3 |
| 32727 | 0, // dsub2_dsub3 |
| 32728 | 0, // dsub_dsub1 |
| 32729 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32730 | 0, // dsub_dsub1_dsub2 |
| 32731 | 0, // qsub0_qsub1 |
| 32732 | 0, // qsub0_qsub1_qsub2 |
| 32733 | 0, // qsub1_qsub2 |
| 32734 | 0, // qsub1_qsub2_qsub3 |
| 32735 | 0, // qsub2_qsub3 |
| 32736 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32737 | 0, // x8sub_0_x8sub_1 |
| 32738 | 0, // x8sub_2_x8sub_3 |
| 32739 | 0, // x8sub_4_x8sub_5 |
| 32740 | 0, // x8sub_6_x8sub_7 |
| 32741 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32742 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32743 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32744 | 0, // sub_32_subo64_then_sub_32 |
| 32745 | 0, // zsub_qsub1 |
| 32746 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32747 | 0, // zsub_qsub1_qsub2 |
| 32748 | 0, // zsub0_zsub1 |
| 32749 | 0, // zsub0_zsub1_zsub2 |
| 32750 | 0, // zsub1_zsub2 |
| 32751 | 0, // zsub1_zsub2_zsub3 |
| 32752 | 0, // zsub2_zsub3 |
| 32753 | 0, // zsub0_zsub2 |
| 32754 | 0, // zsub1_zsub3 |
| 32755 | }, |
| 32756 | { // PPRorPNR |
| 32757 | 0, // bsub |
| 32758 | 0, // bsub_hi |
| 32759 | 0, // dsub |
| 32760 | 0, // dsub0 |
| 32761 | 0, // dsub1 |
| 32762 | 0, // dsub2 |
| 32763 | 0, // dsub3 |
| 32764 | 0, // dsub_hi |
| 32765 | 0, // hsub |
| 32766 | 0, // hsub_hi |
| 32767 | 12, // psub -> PPR |
| 32768 | 0, // psub0 |
| 32769 | 0, // psub1 |
| 32770 | 0, // qsub0 |
| 32771 | 0, // qsub1 |
| 32772 | 0, // qsub2 |
| 32773 | 0, // qsub3 |
| 32774 | 0, // ssub |
| 32775 | 0, // ssub_hi |
| 32776 | 0, // sub_32 |
| 32777 | 0, // sub_32_hi |
| 32778 | 0, // sube32 |
| 32779 | 0, // sube64 |
| 32780 | 0, // subo32 |
| 32781 | 0, // subo64 |
| 32782 | 0, // x8sub_0 |
| 32783 | 0, // x8sub_1 |
| 32784 | 0, // x8sub_2 |
| 32785 | 0, // x8sub_3 |
| 32786 | 0, // x8sub_4 |
| 32787 | 0, // x8sub_5 |
| 32788 | 0, // x8sub_6 |
| 32789 | 0, // x8sub_7 |
| 32790 | 0, // zasubb |
| 32791 | 0, // zasubd0 |
| 32792 | 0, // zasubd1 |
| 32793 | 0, // zasubh0 |
| 32794 | 0, // zasubh1 |
| 32795 | 0, // zasubq0 |
| 32796 | 0, // zasubq1 |
| 32797 | 0, // zasubs0 |
| 32798 | 0, // zasubs1 |
| 32799 | 0, // zsub |
| 32800 | 0, // zsub0 |
| 32801 | 0, // zsub1 |
| 32802 | 0, // zsub2 |
| 32803 | 0, // zsub3 |
| 32804 | 0, // zsub_hi |
| 32805 | 0, // zasubd1_then_zasubq0 |
| 32806 | 0, // zasubd1_then_zasubq1 |
| 32807 | 0, // zasubs1_then_zasubd0 |
| 32808 | 0, // zasubs1_then_zasubd1 |
| 32809 | 0, // zasubs1_then_zasubq0 |
| 32810 | 0, // zasubs1_then_zasubq1 |
| 32811 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32812 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32813 | 0, // zasubh1_then_zasubd0 |
| 32814 | 0, // zasubh1_then_zasubd1 |
| 32815 | 0, // zasubh1_then_zasubq0 |
| 32816 | 0, // zasubh1_then_zasubq1 |
| 32817 | 0, // zasubh1_then_zasubs0 |
| 32818 | 0, // zasubh1_then_zasubs1 |
| 32819 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32820 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32821 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32822 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32823 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32824 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32825 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32826 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32827 | 0, // dsub1_then_bsub |
| 32828 | 0, // dsub1_then_bsub_hi |
| 32829 | 0, // dsub1_then_hsub |
| 32830 | 0, // dsub1_then_hsub_hi |
| 32831 | 0, // dsub1_then_ssub |
| 32832 | 0, // dsub1_then_ssub_hi |
| 32833 | 0, // dsub3_then_bsub |
| 32834 | 0, // dsub3_then_bsub_hi |
| 32835 | 0, // dsub3_then_hsub |
| 32836 | 0, // dsub3_then_hsub_hi |
| 32837 | 0, // dsub3_then_ssub |
| 32838 | 0, // dsub3_then_ssub_hi |
| 32839 | 0, // dsub2_then_bsub |
| 32840 | 0, // dsub2_then_bsub_hi |
| 32841 | 0, // dsub2_then_hsub |
| 32842 | 0, // dsub2_then_hsub_hi |
| 32843 | 0, // dsub2_then_ssub |
| 32844 | 0, // dsub2_then_ssub_hi |
| 32845 | 0, // psub1_then_psub |
| 32846 | 0, // qsub1_then_dsub_hi |
| 32847 | 0, // qsub3_then_dsub_hi |
| 32848 | 0, // qsub2_then_dsub_hi |
| 32849 | 0, // x8sub_7_then_sub_32 |
| 32850 | 0, // x8sub_7_then_sub_32_hi |
| 32851 | 0, // x8sub_6_then_sub_32 |
| 32852 | 0, // x8sub_6_then_sub_32_hi |
| 32853 | 0, // x8sub_5_then_sub_32 |
| 32854 | 0, // x8sub_5_then_sub_32_hi |
| 32855 | 0, // x8sub_4_then_sub_32 |
| 32856 | 0, // x8sub_4_then_sub_32_hi |
| 32857 | 0, // x8sub_3_then_sub_32 |
| 32858 | 0, // x8sub_3_then_sub_32_hi |
| 32859 | 0, // x8sub_2_then_sub_32 |
| 32860 | 0, // x8sub_2_then_sub_32_hi |
| 32861 | 0, // x8sub_1_then_sub_32 |
| 32862 | 0, // x8sub_1_then_sub_32_hi |
| 32863 | 0, // subo64_then_sub_32 |
| 32864 | 0, // subo64_then_sub_32_hi |
| 32865 | 0, // zsub1_then_zsub_hi |
| 32866 | 0, // zsub3_then_zsub_hi |
| 32867 | 0, // zsub2_then_zsub_hi |
| 32868 | 0, // dsub0_dsub1 |
| 32869 | 0, // dsub0_dsub1_dsub2 |
| 32870 | 0, // dsub1_dsub2 |
| 32871 | 0, // dsub1_dsub2_dsub3 |
| 32872 | 0, // dsub2_dsub3 |
| 32873 | 0, // dsub_dsub1 |
| 32874 | 0, // dsub_dsub1_dsub2_dsub3 |
| 32875 | 0, // dsub_dsub1_dsub2 |
| 32876 | 0, // qsub0_qsub1 |
| 32877 | 0, // qsub0_qsub1_qsub2 |
| 32878 | 0, // qsub1_qsub2 |
| 32879 | 0, // qsub1_qsub2_qsub3 |
| 32880 | 0, // qsub2_qsub3 |
| 32881 | 0, // sub_32_x8sub_1_then_sub_32 |
| 32882 | 0, // x8sub_0_x8sub_1 |
| 32883 | 0, // x8sub_2_x8sub_3 |
| 32884 | 0, // x8sub_4_x8sub_5 |
| 32885 | 0, // x8sub_6_x8sub_7 |
| 32886 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 32887 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 32888 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 32889 | 0, // sub_32_subo64_then_sub_32 |
| 32890 | 0, // zsub_qsub1 |
| 32891 | 0, // zsub_qsub1_qsub2_qsub3 |
| 32892 | 0, // zsub_qsub1_qsub2 |
| 32893 | 0, // zsub0_zsub1 |
| 32894 | 0, // zsub0_zsub1_zsub2 |
| 32895 | 0, // zsub1_zsub2 |
| 32896 | 0, // zsub1_zsub2_zsub3 |
| 32897 | 0, // zsub2_zsub3 |
| 32898 | 0, // zsub0_zsub2 |
| 32899 | 0, // zsub1_zsub3 |
| 32900 | }, |
| 32901 | { // FPR16_lo |
| 32902 | 10, // bsub -> FPR16_lo |
| 32903 | 10, // bsub_hi -> FPR16_lo |
| 32904 | 0, // dsub |
| 32905 | 0, // dsub0 |
| 32906 | 0, // dsub1 |
| 32907 | 0, // dsub2 |
| 32908 | 0, // dsub3 |
| 32909 | 0, // dsub_hi |
| 32910 | 0, // hsub |
| 32911 | 0, // hsub_hi |
| 32912 | 0, // psub |
| 32913 | 0, // psub0 |
| 32914 | 0, // psub1 |
| 32915 | 0, // qsub0 |
| 32916 | 0, // qsub1 |
| 32917 | 0, // qsub2 |
| 32918 | 0, // qsub3 |
| 32919 | 0, // ssub |
| 32920 | 0, // ssub_hi |
| 32921 | 0, // sub_32 |
| 32922 | 0, // sub_32_hi |
| 32923 | 0, // sube32 |
| 32924 | 0, // sube64 |
| 32925 | 0, // subo32 |
| 32926 | 0, // subo64 |
| 32927 | 0, // x8sub_0 |
| 32928 | 0, // x8sub_1 |
| 32929 | 0, // x8sub_2 |
| 32930 | 0, // x8sub_3 |
| 32931 | 0, // x8sub_4 |
| 32932 | 0, // x8sub_5 |
| 32933 | 0, // x8sub_6 |
| 32934 | 0, // x8sub_7 |
| 32935 | 0, // zasubb |
| 32936 | 0, // zasubd0 |
| 32937 | 0, // zasubd1 |
| 32938 | 0, // zasubh0 |
| 32939 | 0, // zasubh1 |
| 32940 | 0, // zasubq0 |
| 32941 | 0, // zasubq1 |
| 32942 | 0, // zasubs0 |
| 32943 | 0, // zasubs1 |
| 32944 | 0, // zsub |
| 32945 | 0, // zsub0 |
| 32946 | 0, // zsub1 |
| 32947 | 0, // zsub2 |
| 32948 | 0, // zsub3 |
| 32949 | 0, // zsub_hi |
| 32950 | 0, // zasubd1_then_zasubq0 |
| 32951 | 0, // zasubd1_then_zasubq1 |
| 32952 | 0, // zasubs1_then_zasubd0 |
| 32953 | 0, // zasubs1_then_zasubd1 |
| 32954 | 0, // zasubs1_then_zasubq0 |
| 32955 | 0, // zasubs1_then_zasubq1 |
| 32956 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 32957 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 32958 | 0, // zasubh1_then_zasubd0 |
| 32959 | 0, // zasubh1_then_zasubd1 |
| 32960 | 0, // zasubh1_then_zasubq0 |
| 32961 | 0, // zasubh1_then_zasubq1 |
| 32962 | 0, // zasubh1_then_zasubs0 |
| 32963 | 0, // zasubh1_then_zasubs1 |
| 32964 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 32965 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 32966 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 32967 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 32968 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 32969 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 32970 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 32971 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 32972 | 0, // dsub1_then_bsub |
| 32973 | 0, // dsub1_then_bsub_hi |
| 32974 | 0, // dsub1_then_hsub |
| 32975 | 0, // dsub1_then_hsub_hi |
| 32976 | 0, // dsub1_then_ssub |
| 32977 | 0, // dsub1_then_ssub_hi |
| 32978 | 0, // dsub3_then_bsub |
| 32979 | 0, // dsub3_then_bsub_hi |
| 32980 | 0, // dsub3_then_hsub |
| 32981 | 0, // dsub3_then_hsub_hi |
| 32982 | 0, // dsub3_then_ssub |
| 32983 | 0, // dsub3_then_ssub_hi |
| 32984 | 0, // dsub2_then_bsub |
| 32985 | 0, // dsub2_then_bsub_hi |
| 32986 | 0, // dsub2_then_hsub |
| 32987 | 0, // dsub2_then_hsub_hi |
| 32988 | 0, // dsub2_then_ssub |
| 32989 | 0, // dsub2_then_ssub_hi |
| 32990 | 0, // psub1_then_psub |
| 32991 | 0, // qsub1_then_dsub_hi |
| 32992 | 0, // qsub3_then_dsub_hi |
| 32993 | 0, // qsub2_then_dsub_hi |
| 32994 | 0, // x8sub_7_then_sub_32 |
| 32995 | 0, // x8sub_7_then_sub_32_hi |
| 32996 | 0, // x8sub_6_then_sub_32 |
| 32997 | 0, // x8sub_6_then_sub_32_hi |
| 32998 | 0, // x8sub_5_then_sub_32 |
| 32999 | 0, // x8sub_5_then_sub_32_hi |
| 33000 | 0, // x8sub_4_then_sub_32 |
| 33001 | 0, // x8sub_4_then_sub_32_hi |
| 33002 | 0, // x8sub_3_then_sub_32 |
| 33003 | 0, // x8sub_3_then_sub_32_hi |
| 33004 | 0, // x8sub_2_then_sub_32 |
| 33005 | 0, // x8sub_2_then_sub_32_hi |
| 33006 | 0, // x8sub_1_then_sub_32 |
| 33007 | 0, // x8sub_1_then_sub_32_hi |
| 33008 | 0, // subo64_then_sub_32 |
| 33009 | 0, // subo64_then_sub_32_hi |
| 33010 | 0, // zsub1_then_zsub_hi |
| 33011 | 0, // zsub3_then_zsub_hi |
| 33012 | 0, // zsub2_then_zsub_hi |
| 33013 | 0, // dsub0_dsub1 |
| 33014 | 0, // dsub0_dsub1_dsub2 |
| 33015 | 0, // dsub1_dsub2 |
| 33016 | 0, // dsub1_dsub2_dsub3 |
| 33017 | 0, // dsub2_dsub3 |
| 33018 | 0, // dsub_dsub1 |
| 33019 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33020 | 0, // dsub_dsub1_dsub2 |
| 33021 | 0, // qsub0_qsub1 |
| 33022 | 0, // qsub0_qsub1_qsub2 |
| 33023 | 0, // qsub1_qsub2 |
| 33024 | 0, // qsub1_qsub2_qsub3 |
| 33025 | 0, // qsub2_qsub3 |
| 33026 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33027 | 0, // x8sub_0_x8sub_1 |
| 33028 | 0, // x8sub_2_x8sub_3 |
| 33029 | 0, // x8sub_4_x8sub_5 |
| 33030 | 0, // x8sub_6_x8sub_7 |
| 33031 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33032 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33033 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33034 | 0, // sub_32_subo64_then_sub_32 |
| 33035 | 0, // zsub_qsub1 |
| 33036 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33037 | 0, // zsub_qsub1_qsub2 |
| 33038 | 0, // zsub0_zsub1 |
| 33039 | 0, // zsub0_zsub1_zsub2 |
| 33040 | 0, // zsub1_zsub2 |
| 33041 | 0, // zsub1_zsub2_zsub3 |
| 33042 | 0, // zsub2_zsub3 |
| 33043 | 0, // zsub0_zsub2 |
| 33044 | 0, // zsub1_zsub3 |
| 33045 | }, |
| 33046 | { // PNR |
| 33047 | 0, // bsub |
| 33048 | 0, // bsub_hi |
| 33049 | 0, // dsub |
| 33050 | 0, // dsub0 |
| 33051 | 0, // dsub1 |
| 33052 | 0, // dsub2 |
| 33053 | 0, // dsub3 |
| 33054 | 0, // dsub_hi |
| 33055 | 0, // hsub |
| 33056 | 0, // hsub_hi |
| 33057 | 0, // psub |
| 33058 | 0, // psub0 |
| 33059 | 0, // psub1 |
| 33060 | 0, // qsub0 |
| 33061 | 0, // qsub1 |
| 33062 | 0, // qsub2 |
| 33063 | 0, // qsub3 |
| 33064 | 0, // ssub |
| 33065 | 0, // ssub_hi |
| 33066 | 0, // sub_32 |
| 33067 | 0, // sub_32_hi |
| 33068 | 0, // sube32 |
| 33069 | 0, // sube64 |
| 33070 | 0, // subo32 |
| 33071 | 0, // subo64 |
| 33072 | 0, // x8sub_0 |
| 33073 | 0, // x8sub_1 |
| 33074 | 0, // x8sub_2 |
| 33075 | 0, // x8sub_3 |
| 33076 | 0, // x8sub_4 |
| 33077 | 0, // x8sub_5 |
| 33078 | 0, // x8sub_6 |
| 33079 | 0, // x8sub_7 |
| 33080 | 0, // zasubb |
| 33081 | 0, // zasubd0 |
| 33082 | 0, // zasubd1 |
| 33083 | 0, // zasubh0 |
| 33084 | 0, // zasubh1 |
| 33085 | 0, // zasubq0 |
| 33086 | 0, // zasubq1 |
| 33087 | 0, // zasubs0 |
| 33088 | 0, // zasubs1 |
| 33089 | 0, // zsub |
| 33090 | 0, // zsub0 |
| 33091 | 0, // zsub1 |
| 33092 | 0, // zsub2 |
| 33093 | 0, // zsub3 |
| 33094 | 0, // zsub_hi |
| 33095 | 0, // zasubd1_then_zasubq0 |
| 33096 | 0, // zasubd1_then_zasubq1 |
| 33097 | 0, // zasubs1_then_zasubd0 |
| 33098 | 0, // zasubs1_then_zasubd1 |
| 33099 | 0, // zasubs1_then_zasubq0 |
| 33100 | 0, // zasubs1_then_zasubq1 |
| 33101 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33102 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33103 | 0, // zasubh1_then_zasubd0 |
| 33104 | 0, // zasubh1_then_zasubd1 |
| 33105 | 0, // zasubh1_then_zasubq0 |
| 33106 | 0, // zasubh1_then_zasubq1 |
| 33107 | 0, // zasubh1_then_zasubs0 |
| 33108 | 0, // zasubh1_then_zasubs1 |
| 33109 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33110 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33111 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33112 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33113 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33114 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33115 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33116 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33117 | 0, // dsub1_then_bsub |
| 33118 | 0, // dsub1_then_bsub_hi |
| 33119 | 0, // dsub1_then_hsub |
| 33120 | 0, // dsub1_then_hsub_hi |
| 33121 | 0, // dsub1_then_ssub |
| 33122 | 0, // dsub1_then_ssub_hi |
| 33123 | 0, // dsub3_then_bsub |
| 33124 | 0, // dsub3_then_bsub_hi |
| 33125 | 0, // dsub3_then_hsub |
| 33126 | 0, // dsub3_then_hsub_hi |
| 33127 | 0, // dsub3_then_ssub |
| 33128 | 0, // dsub3_then_ssub_hi |
| 33129 | 0, // dsub2_then_bsub |
| 33130 | 0, // dsub2_then_bsub_hi |
| 33131 | 0, // dsub2_then_hsub |
| 33132 | 0, // dsub2_then_hsub_hi |
| 33133 | 0, // dsub2_then_ssub |
| 33134 | 0, // dsub2_then_ssub_hi |
| 33135 | 0, // psub1_then_psub |
| 33136 | 0, // qsub1_then_dsub_hi |
| 33137 | 0, // qsub3_then_dsub_hi |
| 33138 | 0, // qsub2_then_dsub_hi |
| 33139 | 0, // x8sub_7_then_sub_32 |
| 33140 | 0, // x8sub_7_then_sub_32_hi |
| 33141 | 0, // x8sub_6_then_sub_32 |
| 33142 | 0, // x8sub_6_then_sub_32_hi |
| 33143 | 0, // x8sub_5_then_sub_32 |
| 33144 | 0, // x8sub_5_then_sub_32_hi |
| 33145 | 0, // x8sub_4_then_sub_32 |
| 33146 | 0, // x8sub_4_then_sub_32_hi |
| 33147 | 0, // x8sub_3_then_sub_32 |
| 33148 | 0, // x8sub_3_then_sub_32_hi |
| 33149 | 0, // x8sub_2_then_sub_32 |
| 33150 | 0, // x8sub_2_then_sub_32_hi |
| 33151 | 0, // x8sub_1_then_sub_32 |
| 33152 | 0, // x8sub_1_then_sub_32_hi |
| 33153 | 0, // subo64_then_sub_32 |
| 33154 | 0, // subo64_then_sub_32_hi |
| 33155 | 0, // zsub1_then_zsub_hi |
| 33156 | 0, // zsub3_then_zsub_hi |
| 33157 | 0, // zsub2_then_zsub_hi |
| 33158 | 0, // dsub0_dsub1 |
| 33159 | 0, // dsub0_dsub1_dsub2 |
| 33160 | 0, // dsub1_dsub2 |
| 33161 | 0, // dsub1_dsub2_dsub3 |
| 33162 | 0, // dsub2_dsub3 |
| 33163 | 0, // dsub_dsub1 |
| 33164 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33165 | 0, // dsub_dsub1_dsub2 |
| 33166 | 0, // qsub0_qsub1 |
| 33167 | 0, // qsub0_qsub1_qsub2 |
| 33168 | 0, // qsub1_qsub2 |
| 33169 | 0, // qsub1_qsub2_qsub3 |
| 33170 | 0, // qsub2_qsub3 |
| 33171 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33172 | 0, // x8sub_0_x8sub_1 |
| 33173 | 0, // x8sub_2_x8sub_3 |
| 33174 | 0, // x8sub_4_x8sub_5 |
| 33175 | 0, // x8sub_6_x8sub_7 |
| 33176 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33177 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33178 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33179 | 0, // sub_32_subo64_then_sub_32 |
| 33180 | 0, // zsub_qsub1 |
| 33181 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33182 | 0, // zsub_qsub1_qsub2 |
| 33183 | 0, // zsub0_zsub1 |
| 33184 | 0, // zsub0_zsub1_zsub2 |
| 33185 | 0, // zsub1_zsub2 |
| 33186 | 0, // zsub1_zsub2_zsub3 |
| 33187 | 0, // zsub2_zsub3 |
| 33188 | 0, // zsub0_zsub2 |
| 33189 | 0, // zsub1_zsub3 |
| 33190 | }, |
| 33191 | { // PPR |
| 33192 | 0, // bsub |
| 33193 | 0, // bsub_hi |
| 33194 | 0, // dsub |
| 33195 | 0, // dsub0 |
| 33196 | 0, // dsub1 |
| 33197 | 0, // dsub2 |
| 33198 | 0, // dsub3 |
| 33199 | 0, // dsub_hi |
| 33200 | 0, // hsub |
| 33201 | 0, // hsub_hi |
| 33202 | 12, // psub -> PPR |
| 33203 | 0, // psub0 |
| 33204 | 0, // psub1 |
| 33205 | 0, // qsub0 |
| 33206 | 0, // qsub1 |
| 33207 | 0, // qsub2 |
| 33208 | 0, // qsub3 |
| 33209 | 0, // ssub |
| 33210 | 0, // ssub_hi |
| 33211 | 0, // sub_32 |
| 33212 | 0, // sub_32_hi |
| 33213 | 0, // sube32 |
| 33214 | 0, // sube64 |
| 33215 | 0, // subo32 |
| 33216 | 0, // subo64 |
| 33217 | 0, // x8sub_0 |
| 33218 | 0, // x8sub_1 |
| 33219 | 0, // x8sub_2 |
| 33220 | 0, // x8sub_3 |
| 33221 | 0, // x8sub_4 |
| 33222 | 0, // x8sub_5 |
| 33223 | 0, // x8sub_6 |
| 33224 | 0, // x8sub_7 |
| 33225 | 0, // zasubb |
| 33226 | 0, // zasubd0 |
| 33227 | 0, // zasubd1 |
| 33228 | 0, // zasubh0 |
| 33229 | 0, // zasubh1 |
| 33230 | 0, // zasubq0 |
| 33231 | 0, // zasubq1 |
| 33232 | 0, // zasubs0 |
| 33233 | 0, // zasubs1 |
| 33234 | 0, // zsub |
| 33235 | 0, // zsub0 |
| 33236 | 0, // zsub1 |
| 33237 | 0, // zsub2 |
| 33238 | 0, // zsub3 |
| 33239 | 0, // zsub_hi |
| 33240 | 0, // zasubd1_then_zasubq0 |
| 33241 | 0, // zasubd1_then_zasubq1 |
| 33242 | 0, // zasubs1_then_zasubd0 |
| 33243 | 0, // zasubs1_then_zasubd1 |
| 33244 | 0, // zasubs1_then_zasubq0 |
| 33245 | 0, // zasubs1_then_zasubq1 |
| 33246 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33247 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33248 | 0, // zasubh1_then_zasubd0 |
| 33249 | 0, // zasubh1_then_zasubd1 |
| 33250 | 0, // zasubh1_then_zasubq0 |
| 33251 | 0, // zasubh1_then_zasubq1 |
| 33252 | 0, // zasubh1_then_zasubs0 |
| 33253 | 0, // zasubh1_then_zasubs1 |
| 33254 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33255 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33256 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33257 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33258 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33259 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33260 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33261 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33262 | 0, // dsub1_then_bsub |
| 33263 | 0, // dsub1_then_bsub_hi |
| 33264 | 0, // dsub1_then_hsub |
| 33265 | 0, // dsub1_then_hsub_hi |
| 33266 | 0, // dsub1_then_ssub |
| 33267 | 0, // dsub1_then_ssub_hi |
| 33268 | 0, // dsub3_then_bsub |
| 33269 | 0, // dsub3_then_bsub_hi |
| 33270 | 0, // dsub3_then_hsub |
| 33271 | 0, // dsub3_then_hsub_hi |
| 33272 | 0, // dsub3_then_ssub |
| 33273 | 0, // dsub3_then_ssub_hi |
| 33274 | 0, // dsub2_then_bsub |
| 33275 | 0, // dsub2_then_bsub_hi |
| 33276 | 0, // dsub2_then_hsub |
| 33277 | 0, // dsub2_then_hsub_hi |
| 33278 | 0, // dsub2_then_ssub |
| 33279 | 0, // dsub2_then_ssub_hi |
| 33280 | 0, // psub1_then_psub |
| 33281 | 0, // qsub1_then_dsub_hi |
| 33282 | 0, // qsub3_then_dsub_hi |
| 33283 | 0, // qsub2_then_dsub_hi |
| 33284 | 0, // x8sub_7_then_sub_32 |
| 33285 | 0, // x8sub_7_then_sub_32_hi |
| 33286 | 0, // x8sub_6_then_sub_32 |
| 33287 | 0, // x8sub_6_then_sub_32_hi |
| 33288 | 0, // x8sub_5_then_sub_32 |
| 33289 | 0, // x8sub_5_then_sub_32_hi |
| 33290 | 0, // x8sub_4_then_sub_32 |
| 33291 | 0, // x8sub_4_then_sub_32_hi |
| 33292 | 0, // x8sub_3_then_sub_32 |
| 33293 | 0, // x8sub_3_then_sub_32_hi |
| 33294 | 0, // x8sub_2_then_sub_32 |
| 33295 | 0, // x8sub_2_then_sub_32_hi |
| 33296 | 0, // x8sub_1_then_sub_32 |
| 33297 | 0, // x8sub_1_then_sub_32_hi |
| 33298 | 0, // subo64_then_sub_32 |
| 33299 | 0, // subo64_then_sub_32_hi |
| 33300 | 0, // zsub1_then_zsub_hi |
| 33301 | 0, // zsub3_then_zsub_hi |
| 33302 | 0, // zsub2_then_zsub_hi |
| 33303 | 0, // dsub0_dsub1 |
| 33304 | 0, // dsub0_dsub1_dsub2 |
| 33305 | 0, // dsub1_dsub2 |
| 33306 | 0, // dsub1_dsub2_dsub3 |
| 33307 | 0, // dsub2_dsub3 |
| 33308 | 0, // dsub_dsub1 |
| 33309 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33310 | 0, // dsub_dsub1_dsub2 |
| 33311 | 0, // qsub0_qsub1 |
| 33312 | 0, // qsub0_qsub1_qsub2 |
| 33313 | 0, // qsub1_qsub2 |
| 33314 | 0, // qsub1_qsub2_qsub3 |
| 33315 | 0, // qsub2_qsub3 |
| 33316 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33317 | 0, // x8sub_0_x8sub_1 |
| 33318 | 0, // x8sub_2_x8sub_3 |
| 33319 | 0, // x8sub_4_x8sub_5 |
| 33320 | 0, // x8sub_6_x8sub_7 |
| 33321 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33322 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33323 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33324 | 0, // sub_32_subo64_then_sub_32 |
| 33325 | 0, // zsub_qsub1 |
| 33326 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33327 | 0, // zsub_qsub1_qsub2 |
| 33328 | 0, // zsub0_zsub1 |
| 33329 | 0, // zsub0_zsub1_zsub2 |
| 33330 | 0, // zsub1_zsub2 |
| 33331 | 0, // zsub1_zsub2_zsub3 |
| 33332 | 0, // zsub2_zsub3 |
| 33333 | 0, // zsub0_zsub2 |
| 33334 | 0, // zsub1_zsub3 |
| 33335 | }, |
| 33336 | { // PNR_3b |
| 33337 | 0, // bsub |
| 33338 | 0, // bsub_hi |
| 33339 | 0, // dsub |
| 33340 | 0, // dsub0 |
| 33341 | 0, // dsub1 |
| 33342 | 0, // dsub2 |
| 33343 | 0, // dsub3 |
| 33344 | 0, // dsub_hi |
| 33345 | 0, // hsub |
| 33346 | 0, // hsub_hi |
| 33347 | 0, // psub |
| 33348 | 0, // psub0 |
| 33349 | 0, // psub1 |
| 33350 | 0, // qsub0 |
| 33351 | 0, // qsub1 |
| 33352 | 0, // qsub2 |
| 33353 | 0, // qsub3 |
| 33354 | 0, // ssub |
| 33355 | 0, // ssub_hi |
| 33356 | 0, // sub_32 |
| 33357 | 0, // sub_32_hi |
| 33358 | 0, // sube32 |
| 33359 | 0, // sube64 |
| 33360 | 0, // subo32 |
| 33361 | 0, // subo64 |
| 33362 | 0, // x8sub_0 |
| 33363 | 0, // x8sub_1 |
| 33364 | 0, // x8sub_2 |
| 33365 | 0, // x8sub_3 |
| 33366 | 0, // x8sub_4 |
| 33367 | 0, // x8sub_5 |
| 33368 | 0, // x8sub_6 |
| 33369 | 0, // x8sub_7 |
| 33370 | 0, // zasubb |
| 33371 | 0, // zasubd0 |
| 33372 | 0, // zasubd1 |
| 33373 | 0, // zasubh0 |
| 33374 | 0, // zasubh1 |
| 33375 | 0, // zasubq0 |
| 33376 | 0, // zasubq1 |
| 33377 | 0, // zasubs0 |
| 33378 | 0, // zasubs1 |
| 33379 | 0, // zsub |
| 33380 | 0, // zsub0 |
| 33381 | 0, // zsub1 |
| 33382 | 0, // zsub2 |
| 33383 | 0, // zsub3 |
| 33384 | 0, // zsub_hi |
| 33385 | 0, // zasubd1_then_zasubq0 |
| 33386 | 0, // zasubd1_then_zasubq1 |
| 33387 | 0, // zasubs1_then_zasubd0 |
| 33388 | 0, // zasubs1_then_zasubd1 |
| 33389 | 0, // zasubs1_then_zasubq0 |
| 33390 | 0, // zasubs1_then_zasubq1 |
| 33391 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33392 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33393 | 0, // zasubh1_then_zasubd0 |
| 33394 | 0, // zasubh1_then_zasubd1 |
| 33395 | 0, // zasubh1_then_zasubq0 |
| 33396 | 0, // zasubh1_then_zasubq1 |
| 33397 | 0, // zasubh1_then_zasubs0 |
| 33398 | 0, // zasubh1_then_zasubs1 |
| 33399 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33400 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33401 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33402 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33403 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33404 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33405 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33406 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33407 | 0, // dsub1_then_bsub |
| 33408 | 0, // dsub1_then_bsub_hi |
| 33409 | 0, // dsub1_then_hsub |
| 33410 | 0, // dsub1_then_hsub_hi |
| 33411 | 0, // dsub1_then_ssub |
| 33412 | 0, // dsub1_then_ssub_hi |
| 33413 | 0, // dsub3_then_bsub |
| 33414 | 0, // dsub3_then_bsub_hi |
| 33415 | 0, // dsub3_then_hsub |
| 33416 | 0, // dsub3_then_hsub_hi |
| 33417 | 0, // dsub3_then_ssub |
| 33418 | 0, // dsub3_then_ssub_hi |
| 33419 | 0, // dsub2_then_bsub |
| 33420 | 0, // dsub2_then_bsub_hi |
| 33421 | 0, // dsub2_then_hsub |
| 33422 | 0, // dsub2_then_hsub_hi |
| 33423 | 0, // dsub2_then_ssub |
| 33424 | 0, // dsub2_then_ssub_hi |
| 33425 | 0, // psub1_then_psub |
| 33426 | 0, // qsub1_then_dsub_hi |
| 33427 | 0, // qsub3_then_dsub_hi |
| 33428 | 0, // qsub2_then_dsub_hi |
| 33429 | 0, // x8sub_7_then_sub_32 |
| 33430 | 0, // x8sub_7_then_sub_32_hi |
| 33431 | 0, // x8sub_6_then_sub_32 |
| 33432 | 0, // x8sub_6_then_sub_32_hi |
| 33433 | 0, // x8sub_5_then_sub_32 |
| 33434 | 0, // x8sub_5_then_sub_32_hi |
| 33435 | 0, // x8sub_4_then_sub_32 |
| 33436 | 0, // x8sub_4_then_sub_32_hi |
| 33437 | 0, // x8sub_3_then_sub_32 |
| 33438 | 0, // x8sub_3_then_sub_32_hi |
| 33439 | 0, // x8sub_2_then_sub_32 |
| 33440 | 0, // x8sub_2_then_sub_32_hi |
| 33441 | 0, // x8sub_1_then_sub_32 |
| 33442 | 0, // x8sub_1_then_sub_32_hi |
| 33443 | 0, // subo64_then_sub_32 |
| 33444 | 0, // subo64_then_sub_32_hi |
| 33445 | 0, // zsub1_then_zsub_hi |
| 33446 | 0, // zsub3_then_zsub_hi |
| 33447 | 0, // zsub2_then_zsub_hi |
| 33448 | 0, // dsub0_dsub1 |
| 33449 | 0, // dsub0_dsub1_dsub2 |
| 33450 | 0, // dsub1_dsub2 |
| 33451 | 0, // dsub1_dsub2_dsub3 |
| 33452 | 0, // dsub2_dsub3 |
| 33453 | 0, // dsub_dsub1 |
| 33454 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33455 | 0, // dsub_dsub1_dsub2 |
| 33456 | 0, // qsub0_qsub1 |
| 33457 | 0, // qsub0_qsub1_qsub2 |
| 33458 | 0, // qsub1_qsub2 |
| 33459 | 0, // qsub1_qsub2_qsub3 |
| 33460 | 0, // qsub2_qsub3 |
| 33461 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33462 | 0, // x8sub_0_x8sub_1 |
| 33463 | 0, // x8sub_2_x8sub_3 |
| 33464 | 0, // x8sub_4_x8sub_5 |
| 33465 | 0, // x8sub_6_x8sub_7 |
| 33466 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33467 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33468 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33469 | 0, // sub_32_subo64_then_sub_32 |
| 33470 | 0, // zsub_qsub1 |
| 33471 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33472 | 0, // zsub_qsub1_qsub2 |
| 33473 | 0, // zsub0_zsub1 |
| 33474 | 0, // zsub0_zsub1_zsub2 |
| 33475 | 0, // zsub1_zsub2 |
| 33476 | 0, // zsub1_zsub2_zsub3 |
| 33477 | 0, // zsub2_zsub3 |
| 33478 | 0, // zsub0_zsub2 |
| 33479 | 0, // zsub1_zsub3 |
| 33480 | }, |
| 33481 | { // PNR_p8to15 |
| 33482 | 0, // bsub |
| 33483 | 0, // bsub_hi |
| 33484 | 0, // dsub |
| 33485 | 0, // dsub0 |
| 33486 | 0, // dsub1 |
| 33487 | 0, // dsub2 |
| 33488 | 0, // dsub3 |
| 33489 | 0, // dsub_hi |
| 33490 | 0, // hsub |
| 33491 | 0, // hsub_hi |
| 33492 | 0, // psub |
| 33493 | 0, // psub0 |
| 33494 | 0, // psub1 |
| 33495 | 0, // qsub0 |
| 33496 | 0, // qsub1 |
| 33497 | 0, // qsub2 |
| 33498 | 0, // qsub3 |
| 33499 | 0, // ssub |
| 33500 | 0, // ssub_hi |
| 33501 | 0, // sub_32 |
| 33502 | 0, // sub_32_hi |
| 33503 | 0, // sube32 |
| 33504 | 0, // sube64 |
| 33505 | 0, // subo32 |
| 33506 | 0, // subo64 |
| 33507 | 0, // x8sub_0 |
| 33508 | 0, // x8sub_1 |
| 33509 | 0, // x8sub_2 |
| 33510 | 0, // x8sub_3 |
| 33511 | 0, // x8sub_4 |
| 33512 | 0, // x8sub_5 |
| 33513 | 0, // x8sub_6 |
| 33514 | 0, // x8sub_7 |
| 33515 | 0, // zasubb |
| 33516 | 0, // zasubd0 |
| 33517 | 0, // zasubd1 |
| 33518 | 0, // zasubh0 |
| 33519 | 0, // zasubh1 |
| 33520 | 0, // zasubq0 |
| 33521 | 0, // zasubq1 |
| 33522 | 0, // zasubs0 |
| 33523 | 0, // zasubs1 |
| 33524 | 0, // zsub |
| 33525 | 0, // zsub0 |
| 33526 | 0, // zsub1 |
| 33527 | 0, // zsub2 |
| 33528 | 0, // zsub3 |
| 33529 | 0, // zsub_hi |
| 33530 | 0, // zasubd1_then_zasubq0 |
| 33531 | 0, // zasubd1_then_zasubq1 |
| 33532 | 0, // zasubs1_then_zasubd0 |
| 33533 | 0, // zasubs1_then_zasubd1 |
| 33534 | 0, // zasubs1_then_zasubq0 |
| 33535 | 0, // zasubs1_then_zasubq1 |
| 33536 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33537 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33538 | 0, // zasubh1_then_zasubd0 |
| 33539 | 0, // zasubh1_then_zasubd1 |
| 33540 | 0, // zasubh1_then_zasubq0 |
| 33541 | 0, // zasubh1_then_zasubq1 |
| 33542 | 0, // zasubh1_then_zasubs0 |
| 33543 | 0, // zasubh1_then_zasubs1 |
| 33544 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33545 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33546 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33547 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33548 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33549 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33550 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33551 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33552 | 0, // dsub1_then_bsub |
| 33553 | 0, // dsub1_then_bsub_hi |
| 33554 | 0, // dsub1_then_hsub |
| 33555 | 0, // dsub1_then_hsub_hi |
| 33556 | 0, // dsub1_then_ssub |
| 33557 | 0, // dsub1_then_ssub_hi |
| 33558 | 0, // dsub3_then_bsub |
| 33559 | 0, // dsub3_then_bsub_hi |
| 33560 | 0, // dsub3_then_hsub |
| 33561 | 0, // dsub3_then_hsub_hi |
| 33562 | 0, // dsub3_then_ssub |
| 33563 | 0, // dsub3_then_ssub_hi |
| 33564 | 0, // dsub2_then_bsub |
| 33565 | 0, // dsub2_then_bsub_hi |
| 33566 | 0, // dsub2_then_hsub |
| 33567 | 0, // dsub2_then_hsub_hi |
| 33568 | 0, // dsub2_then_ssub |
| 33569 | 0, // dsub2_then_ssub_hi |
| 33570 | 0, // psub1_then_psub |
| 33571 | 0, // qsub1_then_dsub_hi |
| 33572 | 0, // qsub3_then_dsub_hi |
| 33573 | 0, // qsub2_then_dsub_hi |
| 33574 | 0, // x8sub_7_then_sub_32 |
| 33575 | 0, // x8sub_7_then_sub_32_hi |
| 33576 | 0, // x8sub_6_then_sub_32 |
| 33577 | 0, // x8sub_6_then_sub_32_hi |
| 33578 | 0, // x8sub_5_then_sub_32 |
| 33579 | 0, // x8sub_5_then_sub_32_hi |
| 33580 | 0, // x8sub_4_then_sub_32 |
| 33581 | 0, // x8sub_4_then_sub_32_hi |
| 33582 | 0, // x8sub_3_then_sub_32 |
| 33583 | 0, // x8sub_3_then_sub_32_hi |
| 33584 | 0, // x8sub_2_then_sub_32 |
| 33585 | 0, // x8sub_2_then_sub_32_hi |
| 33586 | 0, // x8sub_1_then_sub_32 |
| 33587 | 0, // x8sub_1_then_sub_32_hi |
| 33588 | 0, // subo64_then_sub_32 |
| 33589 | 0, // subo64_then_sub_32_hi |
| 33590 | 0, // zsub1_then_zsub_hi |
| 33591 | 0, // zsub3_then_zsub_hi |
| 33592 | 0, // zsub2_then_zsub_hi |
| 33593 | 0, // dsub0_dsub1 |
| 33594 | 0, // dsub0_dsub1_dsub2 |
| 33595 | 0, // dsub1_dsub2 |
| 33596 | 0, // dsub1_dsub2_dsub3 |
| 33597 | 0, // dsub2_dsub3 |
| 33598 | 0, // dsub_dsub1 |
| 33599 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33600 | 0, // dsub_dsub1_dsub2 |
| 33601 | 0, // qsub0_qsub1 |
| 33602 | 0, // qsub0_qsub1_qsub2 |
| 33603 | 0, // qsub1_qsub2 |
| 33604 | 0, // qsub1_qsub2_qsub3 |
| 33605 | 0, // qsub2_qsub3 |
| 33606 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33607 | 0, // x8sub_0_x8sub_1 |
| 33608 | 0, // x8sub_2_x8sub_3 |
| 33609 | 0, // x8sub_4_x8sub_5 |
| 33610 | 0, // x8sub_6_x8sub_7 |
| 33611 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33612 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33613 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33614 | 0, // sub_32_subo64_then_sub_32 |
| 33615 | 0, // zsub_qsub1 |
| 33616 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33617 | 0, // zsub_qsub1_qsub2 |
| 33618 | 0, // zsub0_zsub1 |
| 33619 | 0, // zsub0_zsub1_zsub2 |
| 33620 | 0, // zsub1_zsub2 |
| 33621 | 0, // zsub1_zsub2_zsub3 |
| 33622 | 0, // zsub2_zsub3 |
| 33623 | 0, // zsub0_zsub2 |
| 33624 | 0, // zsub1_zsub3 |
| 33625 | }, |
| 33626 | { // PPRMul2 |
| 33627 | 0, // bsub |
| 33628 | 0, // bsub_hi |
| 33629 | 0, // dsub |
| 33630 | 0, // dsub0 |
| 33631 | 0, // dsub1 |
| 33632 | 0, // dsub2 |
| 33633 | 0, // dsub3 |
| 33634 | 0, // dsub_hi |
| 33635 | 0, // hsub |
| 33636 | 0, // hsub_hi |
| 33637 | 15, // psub -> PPRMul2 |
| 33638 | 0, // psub0 |
| 33639 | 0, // psub1 |
| 33640 | 0, // qsub0 |
| 33641 | 0, // qsub1 |
| 33642 | 0, // qsub2 |
| 33643 | 0, // qsub3 |
| 33644 | 0, // ssub |
| 33645 | 0, // ssub_hi |
| 33646 | 0, // sub_32 |
| 33647 | 0, // sub_32_hi |
| 33648 | 0, // sube32 |
| 33649 | 0, // sube64 |
| 33650 | 0, // subo32 |
| 33651 | 0, // subo64 |
| 33652 | 0, // x8sub_0 |
| 33653 | 0, // x8sub_1 |
| 33654 | 0, // x8sub_2 |
| 33655 | 0, // x8sub_3 |
| 33656 | 0, // x8sub_4 |
| 33657 | 0, // x8sub_5 |
| 33658 | 0, // x8sub_6 |
| 33659 | 0, // x8sub_7 |
| 33660 | 0, // zasubb |
| 33661 | 0, // zasubd0 |
| 33662 | 0, // zasubd1 |
| 33663 | 0, // zasubh0 |
| 33664 | 0, // zasubh1 |
| 33665 | 0, // zasubq0 |
| 33666 | 0, // zasubq1 |
| 33667 | 0, // zasubs0 |
| 33668 | 0, // zasubs1 |
| 33669 | 0, // zsub |
| 33670 | 0, // zsub0 |
| 33671 | 0, // zsub1 |
| 33672 | 0, // zsub2 |
| 33673 | 0, // zsub3 |
| 33674 | 0, // zsub_hi |
| 33675 | 0, // zasubd1_then_zasubq0 |
| 33676 | 0, // zasubd1_then_zasubq1 |
| 33677 | 0, // zasubs1_then_zasubd0 |
| 33678 | 0, // zasubs1_then_zasubd1 |
| 33679 | 0, // zasubs1_then_zasubq0 |
| 33680 | 0, // zasubs1_then_zasubq1 |
| 33681 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33682 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33683 | 0, // zasubh1_then_zasubd0 |
| 33684 | 0, // zasubh1_then_zasubd1 |
| 33685 | 0, // zasubh1_then_zasubq0 |
| 33686 | 0, // zasubh1_then_zasubq1 |
| 33687 | 0, // zasubh1_then_zasubs0 |
| 33688 | 0, // zasubh1_then_zasubs1 |
| 33689 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33690 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33691 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33692 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33693 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33694 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33695 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33696 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33697 | 0, // dsub1_then_bsub |
| 33698 | 0, // dsub1_then_bsub_hi |
| 33699 | 0, // dsub1_then_hsub |
| 33700 | 0, // dsub1_then_hsub_hi |
| 33701 | 0, // dsub1_then_ssub |
| 33702 | 0, // dsub1_then_ssub_hi |
| 33703 | 0, // dsub3_then_bsub |
| 33704 | 0, // dsub3_then_bsub_hi |
| 33705 | 0, // dsub3_then_hsub |
| 33706 | 0, // dsub3_then_hsub_hi |
| 33707 | 0, // dsub3_then_ssub |
| 33708 | 0, // dsub3_then_ssub_hi |
| 33709 | 0, // dsub2_then_bsub |
| 33710 | 0, // dsub2_then_bsub_hi |
| 33711 | 0, // dsub2_then_hsub |
| 33712 | 0, // dsub2_then_hsub_hi |
| 33713 | 0, // dsub2_then_ssub |
| 33714 | 0, // dsub2_then_ssub_hi |
| 33715 | 0, // psub1_then_psub |
| 33716 | 0, // qsub1_then_dsub_hi |
| 33717 | 0, // qsub3_then_dsub_hi |
| 33718 | 0, // qsub2_then_dsub_hi |
| 33719 | 0, // x8sub_7_then_sub_32 |
| 33720 | 0, // x8sub_7_then_sub_32_hi |
| 33721 | 0, // x8sub_6_then_sub_32 |
| 33722 | 0, // x8sub_6_then_sub_32_hi |
| 33723 | 0, // x8sub_5_then_sub_32 |
| 33724 | 0, // x8sub_5_then_sub_32_hi |
| 33725 | 0, // x8sub_4_then_sub_32 |
| 33726 | 0, // x8sub_4_then_sub_32_hi |
| 33727 | 0, // x8sub_3_then_sub_32 |
| 33728 | 0, // x8sub_3_then_sub_32_hi |
| 33729 | 0, // x8sub_2_then_sub_32 |
| 33730 | 0, // x8sub_2_then_sub_32_hi |
| 33731 | 0, // x8sub_1_then_sub_32 |
| 33732 | 0, // x8sub_1_then_sub_32_hi |
| 33733 | 0, // subo64_then_sub_32 |
| 33734 | 0, // subo64_then_sub_32_hi |
| 33735 | 0, // zsub1_then_zsub_hi |
| 33736 | 0, // zsub3_then_zsub_hi |
| 33737 | 0, // zsub2_then_zsub_hi |
| 33738 | 0, // dsub0_dsub1 |
| 33739 | 0, // dsub0_dsub1_dsub2 |
| 33740 | 0, // dsub1_dsub2 |
| 33741 | 0, // dsub1_dsub2_dsub3 |
| 33742 | 0, // dsub2_dsub3 |
| 33743 | 0, // dsub_dsub1 |
| 33744 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33745 | 0, // dsub_dsub1_dsub2 |
| 33746 | 0, // qsub0_qsub1 |
| 33747 | 0, // qsub0_qsub1_qsub2 |
| 33748 | 0, // qsub1_qsub2 |
| 33749 | 0, // qsub1_qsub2_qsub3 |
| 33750 | 0, // qsub2_qsub3 |
| 33751 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33752 | 0, // x8sub_0_x8sub_1 |
| 33753 | 0, // x8sub_2_x8sub_3 |
| 33754 | 0, // x8sub_4_x8sub_5 |
| 33755 | 0, // x8sub_6_x8sub_7 |
| 33756 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33757 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33758 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33759 | 0, // sub_32_subo64_then_sub_32 |
| 33760 | 0, // zsub_qsub1 |
| 33761 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33762 | 0, // zsub_qsub1_qsub2 |
| 33763 | 0, // zsub0_zsub1 |
| 33764 | 0, // zsub0_zsub1_zsub2 |
| 33765 | 0, // zsub1_zsub2 |
| 33766 | 0, // zsub1_zsub2_zsub3 |
| 33767 | 0, // zsub2_zsub3 |
| 33768 | 0, // zsub0_zsub2 |
| 33769 | 0, // zsub1_zsub3 |
| 33770 | }, |
| 33771 | { // PPR_3b |
| 33772 | 0, // bsub |
| 33773 | 0, // bsub_hi |
| 33774 | 0, // dsub |
| 33775 | 0, // dsub0 |
| 33776 | 0, // dsub1 |
| 33777 | 0, // dsub2 |
| 33778 | 0, // dsub3 |
| 33779 | 0, // dsub_hi |
| 33780 | 0, // hsub |
| 33781 | 0, // hsub_hi |
| 33782 | 16, // psub -> PPR_3b |
| 33783 | 0, // psub0 |
| 33784 | 0, // psub1 |
| 33785 | 0, // qsub0 |
| 33786 | 0, // qsub1 |
| 33787 | 0, // qsub2 |
| 33788 | 0, // qsub3 |
| 33789 | 0, // ssub |
| 33790 | 0, // ssub_hi |
| 33791 | 0, // sub_32 |
| 33792 | 0, // sub_32_hi |
| 33793 | 0, // sube32 |
| 33794 | 0, // sube64 |
| 33795 | 0, // subo32 |
| 33796 | 0, // subo64 |
| 33797 | 0, // x8sub_0 |
| 33798 | 0, // x8sub_1 |
| 33799 | 0, // x8sub_2 |
| 33800 | 0, // x8sub_3 |
| 33801 | 0, // x8sub_4 |
| 33802 | 0, // x8sub_5 |
| 33803 | 0, // x8sub_6 |
| 33804 | 0, // x8sub_7 |
| 33805 | 0, // zasubb |
| 33806 | 0, // zasubd0 |
| 33807 | 0, // zasubd1 |
| 33808 | 0, // zasubh0 |
| 33809 | 0, // zasubh1 |
| 33810 | 0, // zasubq0 |
| 33811 | 0, // zasubq1 |
| 33812 | 0, // zasubs0 |
| 33813 | 0, // zasubs1 |
| 33814 | 0, // zsub |
| 33815 | 0, // zsub0 |
| 33816 | 0, // zsub1 |
| 33817 | 0, // zsub2 |
| 33818 | 0, // zsub3 |
| 33819 | 0, // zsub_hi |
| 33820 | 0, // zasubd1_then_zasubq0 |
| 33821 | 0, // zasubd1_then_zasubq1 |
| 33822 | 0, // zasubs1_then_zasubd0 |
| 33823 | 0, // zasubs1_then_zasubd1 |
| 33824 | 0, // zasubs1_then_zasubq0 |
| 33825 | 0, // zasubs1_then_zasubq1 |
| 33826 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33827 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33828 | 0, // zasubh1_then_zasubd0 |
| 33829 | 0, // zasubh1_then_zasubd1 |
| 33830 | 0, // zasubh1_then_zasubq0 |
| 33831 | 0, // zasubh1_then_zasubq1 |
| 33832 | 0, // zasubh1_then_zasubs0 |
| 33833 | 0, // zasubh1_then_zasubs1 |
| 33834 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33835 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33836 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33837 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33838 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33839 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33840 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33841 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33842 | 0, // dsub1_then_bsub |
| 33843 | 0, // dsub1_then_bsub_hi |
| 33844 | 0, // dsub1_then_hsub |
| 33845 | 0, // dsub1_then_hsub_hi |
| 33846 | 0, // dsub1_then_ssub |
| 33847 | 0, // dsub1_then_ssub_hi |
| 33848 | 0, // dsub3_then_bsub |
| 33849 | 0, // dsub3_then_bsub_hi |
| 33850 | 0, // dsub3_then_hsub |
| 33851 | 0, // dsub3_then_hsub_hi |
| 33852 | 0, // dsub3_then_ssub |
| 33853 | 0, // dsub3_then_ssub_hi |
| 33854 | 0, // dsub2_then_bsub |
| 33855 | 0, // dsub2_then_bsub_hi |
| 33856 | 0, // dsub2_then_hsub |
| 33857 | 0, // dsub2_then_hsub_hi |
| 33858 | 0, // dsub2_then_ssub |
| 33859 | 0, // dsub2_then_ssub_hi |
| 33860 | 0, // psub1_then_psub |
| 33861 | 0, // qsub1_then_dsub_hi |
| 33862 | 0, // qsub3_then_dsub_hi |
| 33863 | 0, // qsub2_then_dsub_hi |
| 33864 | 0, // x8sub_7_then_sub_32 |
| 33865 | 0, // x8sub_7_then_sub_32_hi |
| 33866 | 0, // x8sub_6_then_sub_32 |
| 33867 | 0, // x8sub_6_then_sub_32_hi |
| 33868 | 0, // x8sub_5_then_sub_32 |
| 33869 | 0, // x8sub_5_then_sub_32_hi |
| 33870 | 0, // x8sub_4_then_sub_32 |
| 33871 | 0, // x8sub_4_then_sub_32_hi |
| 33872 | 0, // x8sub_3_then_sub_32 |
| 33873 | 0, // x8sub_3_then_sub_32_hi |
| 33874 | 0, // x8sub_2_then_sub_32 |
| 33875 | 0, // x8sub_2_then_sub_32_hi |
| 33876 | 0, // x8sub_1_then_sub_32 |
| 33877 | 0, // x8sub_1_then_sub_32_hi |
| 33878 | 0, // subo64_then_sub_32 |
| 33879 | 0, // subo64_then_sub_32_hi |
| 33880 | 0, // zsub1_then_zsub_hi |
| 33881 | 0, // zsub3_then_zsub_hi |
| 33882 | 0, // zsub2_then_zsub_hi |
| 33883 | 0, // dsub0_dsub1 |
| 33884 | 0, // dsub0_dsub1_dsub2 |
| 33885 | 0, // dsub1_dsub2 |
| 33886 | 0, // dsub1_dsub2_dsub3 |
| 33887 | 0, // dsub2_dsub3 |
| 33888 | 0, // dsub_dsub1 |
| 33889 | 0, // dsub_dsub1_dsub2_dsub3 |
| 33890 | 0, // dsub_dsub1_dsub2 |
| 33891 | 0, // qsub0_qsub1 |
| 33892 | 0, // qsub0_qsub1_qsub2 |
| 33893 | 0, // qsub1_qsub2 |
| 33894 | 0, // qsub1_qsub2_qsub3 |
| 33895 | 0, // qsub2_qsub3 |
| 33896 | 0, // sub_32_x8sub_1_then_sub_32 |
| 33897 | 0, // x8sub_0_x8sub_1 |
| 33898 | 0, // x8sub_2_x8sub_3 |
| 33899 | 0, // x8sub_4_x8sub_5 |
| 33900 | 0, // x8sub_6_x8sub_7 |
| 33901 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 33902 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 33903 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 33904 | 0, // sub_32_subo64_then_sub_32 |
| 33905 | 0, // zsub_qsub1 |
| 33906 | 0, // zsub_qsub1_qsub2_qsub3 |
| 33907 | 0, // zsub_qsub1_qsub2 |
| 33908 | 0, // zsub0_zsub1 |
| 33909 | 0, // zsub0_zsub1_zsub2 |
| 33910 | 0, // zsub1_zsub2 |
| 33911 | 0, // zsub1_zsub2_zsub3 |
| 33912 | 0, // zsub2_zsub3 |
| 33913 | 0, // zsub0_zsub2 |
| 33914 | 0, // zsub1_zsub3 |
| 33915 | }, |
| 33916 | { // PPR_p8to15 |
| 33917 | 0, // bsub |
| 33918 | 0, // bsub_hi |
| 33919 | 0, // dsub |
| 33920 | 0, // dsub0 |
| 33921 | 0, // dsub1 |
| 33922 | 0, // dsub2 |
| 33923 | 0, // dsub3 |
| 33924 | 0, // dsub_hi |
| 33925 | 0, // hsub |
| 33926 | 0, // hsub_hi |
| 33927 | 17, // psub -> PPR_p8to15 |
| 33928 | 0, // psub0 |
| 33929 | 0, // psub1 |
| 33930 | 0, // qsub0 |
| 33931 | 0, // qsub1 |
| 33932 | 0, // qsub2 |
| 33933 | 0, // qsub3 |
| 33934 | 0, // ssub |
| 33935 | 0, // ssub_hi |
| 33936 | 0, // sub_32 |
| 33937 | 0, // sub_32_hi |
| 33938 | 0, // sube32 |
| 33939 | 0, // sube64 |
| 33940 | 0, // subo32 |
| 33941 | 0, // subo64 |
| 33942 | 0, // x8sub_0 |
| 33943 | 0, // x8sub_1 |
| 33944 | 0, // x8sub_2 |
| 33945 | 0, // x8sub_3 |
| 33946 | 0, // x8sub_4 |
| 33947 | 0, // x8sub_5 |
| 33948 | 0, // x8sub_6 |
| 33949 | 0, // x8sub_7 |
| 33950 | 0, // zasubb |
| 33951 | 0, // zasubd0 |
| 33952 | 0, // zasubd1 |
| 33953 | 0, // zasubh0 |
| 33954 | 0, // zasubh1 |
| 33955 | 0, // zasubq0 |
| 33956 | 0, // zasubq1 |
| 33957 | 0, // zasubs0 |
| 33958 | 0, // zasubs1 |
| 33959 | 0, // zsub |
| 33960 | 0, // zsub0 |
| 33961 | 0, // zsub1 |
| 33962 | 0, // zsub2 |
| 33963 | 0, // zsub3 |
| 33964 | 0, // zsub_hi |
| 33965 | 0, // zasubd1_then_zasubq0 |
| 33966 | 0, // zasubd1_then_zasubq1 |
| 33967 | 0, // zasubs1_then_zasubd0 |
| 33968 | 0, // zasubs1_then_zasubd1 |
| 33969 | 0, // zasubs1_then_zasubq0 |
| 33970 | 0, // zasubs1_then_zasubq1 |
| 33971 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 33972 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 33973 | 0, // zasubh1_then_zasubd0 |
| 33974 | 0, // zasubh1_then_zasubd1 |
| 33975 | 0, // zasubh1_then_zasubq0 |
| 33976 | 0, // zasubh1_then_zasubq1 |
| 33977 | 0, // zasubh1_then_zasubs0 |
| 33978 | 0, // zasubh1_then_zasubs1 |
| 33979 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 33980 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 33981 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 33982 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 33983 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 33984 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 33985 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 33986 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 33987 | 0, // dsub1_then_bsub |
| 33988 | 0, // dsub1_then_bsub_hi |
| 33989 | 0, // dsub1_then_hsub |
| 33990 | 0, // dsub1_then_hsub_hi |
| 33991 | 0, // dsub1_then_ssub |
| 33992 | 0, // dsub1_then_ssub_hi |
| 33993 | 0, // dsub3_then_bsub |
| 33994 | 0, // dsub3_then_bsub_hi |
| 33995 | 0, // dsub3_then_hsub |
| 33996 | 0, // dsub3_then_hsub_hi |
| 33997 | 0, // dsub3_then_ssub |
| 33998 | 0, // dsub3_then_ssub_hi |
| 33999 | 0, // dsub2_then_bsub |
| 34000 | 0, // dsub2_then_bsub_hi |
| 34001 | 0, // dsub2_then_hsub |
| 34002 | 0, // dsub2_then_hsub_hi |
| 34003 | 0, // dsub2_then_ssub |
| 34004 | 0, // dsub2_then_ssub_hi |
| 34005 | 0, // psub1_then_psub |
| 34006 | 0, // qsub1_then_dsub_hi |
| 34007 | 0, // qsub3_then_dsub_hi |
| 34008 | 0, // qsub2_then_dsub_hi |
| 34009 | 0, // x8sub_7_then_sub_32 |
| 34010 | 0, // x8sub_7_then_sub_32_hi |
| 34011 | 0, // x8sub_6_then_sub_32 |
| 34012 | 0, // x8sub_6_then_sub_32_hi |
| 34013 | 0, // x8sub_5_then_sub_32 |
| 34014 | 0, // x8sub_5_then_sub_32_hi |
| 34015 | 0, // x8sub_4_then_sub_32 |
| 34016 | 0, // x8sub_4_then_sub_32_hi |
| 34017 | 0, // x8sub_3_then_sub_32 |
| 34018 | 0, // x8sub_3_then_sub_32_hi |
| 34019 | 0, // x8sub_2_then_sub_32 |
| 34020 | 0, // x8sub_2_then_sub_32_hi |
| 34021 | 0, // x8sub_1_then_sub_32 |
| 34022 | 0, // x8sub_1_then_sub_32_hi |
| 34023 | 0, // subo64_then_sub_32 |
| 34024 | 0, // subo64_then_sub_32_hi |
| 34025 | 0, // zsub1_then_zsub_hi |
| 34026 | 0, // zsub3_then_zsub_hi |
| 34027 | 0, // zsub2_then_zsub_hi |
| 34028 | 0, // dsub0_dsub1 |
| 34029 | 0, // dsub0_dsub1_dsub2 |
| 34030 | 0, // dsub1_dsub2 |
| 34031 | 0, // dsub1_dsub2_dsub3 |
| 34032 | 0, // dsub2_dsub3 |
| 34033 | 0, // dsub_dsub1 |
| 34034 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34035 | 0, // dsub_dsub1_dsub2 |
| 34036 | 0, // qsub0_qsub1 |
| 34037 | 0, // qsub0_qsub1_qsub2 |
| 34038 | 0, // qsub1_qsub2 |
| 34039 | 0, // qsub1_qsub2_qsub3 |
| 34040 | 0, // qsub2_qsub3 |
| 34041 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34042 | 0, // x8sub_0_x8sub_1 |
| 34043 | 0, // x8sub_2_x8sub_3 |
| 34044 | 0, // x8sub_4_x8sub_5 |
| 34045 | 0, // x8sub_6_x8sub_7 |
| 34046 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34047 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34048 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34049 | 0, // sub_32_subo64_then_sub_32 |
| 34050 | 0, // zsub_qsub1 |
| 34051 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34052 | 0, // zsub_qsub1_qsub2 |
| 34053 | 0, // zsub0_zsub1 |
| 34054 | 0, // zsub0_zsub1_zsub2 |
| 34055 | 0, // zsub1_zsub2 |
| 34056 | 0, // zsub1_zsub2_zsub3 |
| 34057 | 0, // zsub2_zsub3 |
| 34058 | 0, // zsub0_zsub2 |
| 34059 | 0, // zsub1_zsub3 |
| 34060 | }, |
| 34061 | { // PPRMul2_and_PPR_3b |
| 34062 | 0, // bsub |
| 34063 | 0, // bsub_hi |
| 34064 | 0, // dsub |
| 34065 | 0, // dsub0 |
| 34066 | 0, // dsub1 |
| 34067 | 0, // dsub2 |
| 34068 | 0, // dsub3 |
| 34069 | 0, // dsub_hi |
| 34070 | 0, // hsub |
| 34071 | 0, // hsub_hi |
| 34072 | 18, // psub -> PPRMul2_and_PPR_3b |
| 34073 | 0, // psub0 |
| 34074 | 0, // psub1 |
| 34075 | 0, // qsub0 |
| 34076 | 0, // qsub1 |
| 34077 | 0, // qsub2 |
| 34078 | 0, // qsub3 |
| 34079 | 0, // ssub |
| 34080 | 0, // ssub_hi |
| 34081 | 0, // sub_32 |
| 34082 | 0, // sub_32_hi |
| 34083 | 0, // sube32 |
| 34084 | 0, // sube64 |
| 34085 | 0, // subo32 |
| 34086 | 0, // subo64 |
| 34087 | 0, // x8sub_0 |
| 34088 | 0, // x8sub_1 |
| 34089 | 0, // x8sub_2 |
| 34090 | 0, // x8sub_3 |
| 34091 | 0, // x8sub_4 |
| 34092 | 0, // x8sub_5 |
| 34093 | 0, // x8sub_6 |
| 34094 | 0, // x8sub_7 |
| 34095 | 0, // zasubb |
| 34096 | 0, // zasubd0 |
| 34097 | 0, // zasubd1 |
| 34098 | 0, // zasubh0 |
| 34099 | 0, // zasubh1 |
| 34100 | 0, // zasubq0 |
| 34101 | 0, // zasubq1 |
| 34102 | 0, // zasubs0 |
| 34103 | 0, // zasubs1 |
| 34104 | 0, // zsub |
| 34105 | 0, // zsub0 |
| 34106 | 0, // zsub1 |
| 34107 | 0, // zsub2 |
| 34108 | 0, // zsub3 |
| 34109 | 0, // zsub_hi |
| 34110 | 0, // zasubd1_then_zasubq0 |
| 34111 | 0, // zasubd1_then_zasubq1 |
| 34112 | 0, // zasubs1_then_zasubd0 |
| 34113 | 0, // zasubs1_then_zasubd1 |
| 34114 | 0, // zasubs1_then_zasubq0 |
| 34115 | 0, // zasubs1_then_zasubq1 |
| 34116 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34117 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34118 | 0, // zasubh1_then_zasubd0 |
| 34119 | 0, // zasubh1_then_zasubd1 |
| 34120 | 0, // zasubh1_then_zasubq0 |
| 34121 | 0, // zasubh1_then_zasubq1 |
| 34122 | 0, // zasubh1_then_zasubs0 |
| 34123 | 0, // zasubh1_then_zasubs1 |
| 34124 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34125 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34126 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34127 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34128 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34129 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34130 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34131 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34132 | 0, // dsub1_then_bsub |
| 34133 | 0, // dsub1_then_bsub_hi |
| 34134 | 0, // dsub1_then_hsub |
| 34135 | 0, // dsub1_then_hsub_hi |
| 34136 | 0, // dsub1_then_ssub |
| 34137 | 0, // dsub1_then_ssub_hi |
| 34138 | 0, // dsub3_then_bsub |
| 34139 | 0, // dsub3_then_bsub_hi |
| 34140 | 0, // dsub3_then_hsub |
| 34141 | 0, // dsub3_then_hsub_hi |
| 34142 | 0, // dsub3_then_ssub |
| 34143 | 0, // dsub3_then_ssub_hi |
| 34144 | 0, // dsub2_then_bsub |
| 34145 | 0, // dsub2_then_bsub_hi |
| 34146 | 0, // dsub2_then_hsub |
| 34147 | 0, // dsub2_then_hsub_hi |
| 34148 | 0, // dsub2_then_ssub |
| 34149 | 0, // dsub2_then_ssub_hi |
| 34150 | 0, // psub1_then_psub |
| 34151 | 0, // qsub1_then_dsub_hi |
| 34152 | 0, // qsub3_then_dsub_hi |
| 34153 | 0, // qsub2_then_dsub_hi |
| 34154 | 0, // x8sub_7_then_sub_32 |
| 34155 | 0, // x8sub_7_then_sub_32_hi |
| 34156 | 0, // x8sub_6_then_sub_32 |
| 34157 | 0, // x8sub_6_then_sub_32_hi |
| 34158 | 0, // x8sub_5_then_sub_32 |
| 34159 | 0, // x8sub_5_then_sub_32_hi |
| 34160 | 0, // x8sub_4_then_sub_32 |
| 34161 | 0, // x8sub_4_then_sub_32_hi |
| 34162 | 0, // x8sub_3_then_sub_32 |
| 34163 | 0, // x8sub_3_then_sub_32_hi |
| 34164 | 0, // x8sub_2_then_sub_32 |
| 34165 | 0, // x8sub_2_then_sub_32_hi |
| 34166 | 0, // x8sub_1_then_sub_32 |
| 34167 | 0, // x8sub_1_then_sub_32_hi |
| 34168 | 0, // subo64_then_sub_32 |
| 34169 | 0, // subo64_then_sub_32_hi |
| 34170 | 0, // zsub1_then_zsub_hi |
| 34171 | 0, // zsub3_then_zsub_hi |
| 34172 | 0, // zsub2_then_zsub_hi |
| 34173 | 0, // dsub0_dsub1 |
| 34174 | 0, // dsub0_dsub1_dsub2 |
| 34175 | 0, // dsub1_dsub2 |
| 34176 | 0, // dsub1_dsub2_dsub3 |
| 34177 | 0, // dsub2_dsub3 |
| 34178 | 0, // dsub_dsub1 |
| 34179 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34180 | 0, // dsub_dsub1_dsub2 |
| 34181 | 0, // qsub0_qsub1 |
| 34182 | 0, // qsub0_qsub1_qsub2 |
| 34183 | 0, // qsub1_qsub2 |
| 34184 | 0, // qsub1_qsub2_qsub3 |
| 34185 | 0, // qsub2_qsub3 |
| 34186 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34187 | 0, // x8sub_0_x8sub_1 |
| 34188 | 0, // x8sub_2_x8sub_3 |
| 34189 | 0, // x8sub_4_x8sub_5 |
| 34190 | 0, // x8sub_6_x8sub_7 |
| 34191 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34192 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34193 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34194 | 0, // sub_32_subo64_then_sub_32 |
| 34195 | 0, // zsub_qsub1 |
| 34196 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34197 | 0, // zsub_qsub1_qsub2 |
| 34198 | 0, // zsub0_zsub1 |
| 34199 | 0, // zsub0_zsub1_zsub2 |
| 34200 | 0, // zsub1_zsub2 |
| 34201 | 0, // zsub1_zsub2_zsub3 |
| 34202 | 0, // zsub2_zsub3 |
| 34203 | 0, // zsub0_zsub2 |
| 34204 | 0, // zsub1_zsub3 |
| 34205 | }, |
| 34206 | { // PPRMul2_and_PPR_p8to15 |
| 34207 | 0, // bsub |
| 34208 | 0, // bsub_hi |
| 34209 | 0, // dsub |
| 34210 | 0, // dsub0 |
| 34211 | 0, // dsub1 |
| 34212 | 0, // dsub2 |
| 34213 | 0, // dsub3 |
| 34214 | 0, // dsub_hi |
| 34215 | 0, // hsub |
| 34216 | 0, // hsub_hi |
| 34217 | 19, // psub -> PPRMul2_and_PPR_p8to15 |
| 34218 | 0, // psub0 |
| 34219 | 0, // psub1 |
| 34220 | 0, // qsub0 |
| 34221 | 0, // qsub1 |
| 34222 | 0, // qsub2 |
| 34223 | 0, // qsub3 |
| 34224 | 0, // ssub |
| 34225 | 0, // ssub_hi |
| 34226 | 0, // sub_32 |
| 34227 | 0, // sub_32_hi |
| 34228 | 0, // sube32 |
| 34229 | 0, // sube64 |
| 34230 | 0, // subo32 |
| 34231 | 0, // subo64 |
| 34232 | 0, // x8sub_0 |
| 34233 | 0, // x8sub_1 |
| 34234 | 0, // x8sub_2 |
| 34235 | 0, // x8sub_3 |
| 34236 | 0, // x8sub_4 |
| 34237 | 0, // x8sub_5 |
| 34238 | 0, // x8sub_6 |
| 34239 | 0, // x8sub_7 |
| 34240 | 0, // zasubb |
| 34241 | 0, // zasubd0 |
| 34242 | 0, // zasubd1 |
| 34243 | 0, // zasubh0 |
| 34244 | 0, // zasubh1 |
| 34245 | 0, // zasubq0 |
| 34246 | 0, // zasubq1 |
| 34247 | 0, // zasubs0 |
| 34248 | 0, // zasubs1 |
| 34249 | 0, // zsub |
| 34250 | 0, // zsub0 |
| 34251 | 0, // zsub1 |
| 34252 | 0, // zsub2 |
| 34253 | 0, // zsub3 |
| 34254 | 0, // zsub_hi |
| 34255 | 0, // zasubd1_then_zasubq0 |
| 34256 | 0, // zasubd1_then_zasubq1 |
| 34257 | 0, // zasubs1_then_zasubd0 |
| 34258 | 0, // zasubs1_then_zasubd1 |
| 34259 | 0, // zasubs1_then_zasubq0 |
| 34260 | 0, // zasubs1_then_zasubq1 |
| 34261 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34262 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34263 | 0, // zasubh1_then_zasubd0 |
| 34264 | 0, // zasubh1_then_zasubd1 |
| 34265 | 0, // zasubh1_then_zasubq0 |
| 34266 | 0, // zasubh1_then_zasubq1 |
| 34267 | 0, // zasubh1_then_zasubs0 |
| 34268 | 0, // zasubh1_then_zasubs1 |
| 34269 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34270 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34271 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34272 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34273 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34274 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34275 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34276 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34277 | 0, // dsub1_then_bsub |
| 34278 | 0, // dsub1_then_bsub_hi |
| 34279 | 0, // dsub1_then_hsub |
| 34280 | 0, // dsub1_then_hsub_hi |
| 34281 | 0, // dsub1_then_ssub |
| 34282 | 0, // dsub1_then_ssub_hi |
| 34283 | 0, // dsub3_then_bsub |
| 34284 | 0, // dsub3_then_bsub_hi |
| 34285 | 0, // dsub3_then_hsub |
| 34286 | 0, // dsub3_then_hsub_hi |
| 34287 | 0, // dsub3_then_ssub |
| 34288 | 0, // dsub3_then_ssub_hi |
| 34289 | 0, // dsub2_then_bsub |
| 34290 | 0, // dsub2_then_bsub_hi |
| 34291 | 0, // dsub2_then_hsub |
| 34292 | 0, // dsub2_then_hsub_hi |
| 34293 | 0, // dsub2_then_ssub |
| 34294 | 0, // dsub2_then_ssub_hi |
| 34295 | 0, // psub1_then_psub |
| 34296 | 0, // qsub1_then_dsub_hi |
| 34297 | 0, // qsub3_then_dsub_hi |
| 34298 | 0, // qsub2_then_dsub_hi |
| 34299 | 0, // x8sub_7_then_sub_32 |
| 34300 | 0, // x8sub_7_then_sub_32_hi |
| 34301 | 0, // x8sub_6_then_sub_32 |
| 34302 | 0, // x8sub_6_then_sub_32_hi |
| 34303 | 0, // x8sub_5_then_sub_32 |
| 34304 | 0, // x8sub_5_then_sub_32_hi |
| 34305 | 0, // x8sub_4_then_sub_32 |
| 34306 | 0, // x8sub_4_then_sub_32_hi |
| 34307 | 0, // x8sub_3_then_sub_32 |
| 34308 | 0, // x8sub_3_then_sub_32_hi |
| 34309 | 0, // x8sub_2_then_sub_32 |
| 34310 | 0, // x8sub_2_then_sub_32_hi |
| 34311 | 0, // x8sub_1_then_sub_32 |
| 34312 | 0, // x8sub_1_then_sub_32_hi |
| 34313 | 0, // subo64_then_sub_32 |
| 34314 | 0, // subo64_then_sub_32_hi |
| 34315 | 0, // zsub1_then_zsub_hi |
| 34316 | 0, // zsub3_then_zsub_hi |
| 34317 | 0, // zsub2_then_zsub_hi |
| 34318 | 0, // dsub0_dsub1 |
| 34319 | 0, // dsub0_dsub1_dsub2 |
| 34320 | 0, // dsub1_dsub2 |
| 34321 | 0, // dsub1_dsub2_dsub3 |
| 34322 | 0, // dsub2_dsub3 |
| 34323 | 0, // dsub_dsub1 |
| 34324 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34325 | 0, // dsub_dsub1_dsub2 |
| 34326 | 0, // qsub0_qsub1 |
| 34327 | 0, // qsub0_qsub1_qsub2 |
| 34328 | 0, // qsub1_qsub2 |
| 34329 | 0, // qsub1_qsub2_qsub3 |
| 34330 | 0, // qsub2_qsub3 |
| 34331 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34332 | 0, // x8sub_0_x8sub_1 |
| 34333 | 0, // x8sub_2_x8sub_3 |
| 34334 | 0, // x8sub_4_x8sub_5 |
| 34335 | 0, // x8sub_6_x8sub_7 |
| 34336 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34337 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34338 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34339 | 0, // sub_32_subo64_then_sub_32 |
| 34340 | 0, // zsub_qsub1 |
| 34341 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34342 | 0, // zsub_qsub1_qsub2 |
| 34343 | 0, // zsub0_zsub1 |
| 34344 | 0, // zsub0_zsub1_zsub2 |
| 34345 | 0, // zsub1_zsub2 |
| 34346 | 0, // zsub1_zsub2_zsub3 |
| 34347 | 0, // zsub2_zsub3 |
| 34348 | 0, // zsub0_zsub2 |
| 34349 | 0, // zsub1_zsub3 |
| 34350 | }, |
| 34351 | { // PPR2 |
| 34352 | 0, // bsub |
| 34353 | 0, // bsub_hi |
| 34354 | 0, // dsub |
| 34355 | 0, // dsub0 |
| 34356 | 0, // dsub1 |
| 34357 | 0, // dsub2 |
| 34358 | 0, // dsub3 |
| 34359 | 0, // dsub_hi |
| 34360 | 0, // hsub |
| 34361 | 0, // hsub_hi |
| 34362 | 20, // psub -> PPR2 |
| 34363 | 20, // psub0 -> PPR2 |
| 34364 | 20, // psub1 -> PPR2 |
| 34365 | 0, // qsub0 |
| 34366 | 0, // qsub1 |
| 34367 | 0, // qsub2 |
| 34368 | 0, // qsub3 |
| 34369 | 0, // ssub |
| 34370 | 0, // ssub_hi |
| 34371 | 0, // sub_32 |
| 34372 | 0, // sub_32_hi |
| 34373 | 0, // sube32 |
| 34374 | 0, // sube64 |
| 34375 | 0, // subo32 |
| 34376 | 0, // subo64 |
| 34377 | 0, // x8sub_0 |
| 34378 | 0, // x8sub_1 |
| 34379 | 0, // x8sub_2 |
| 34380 | 0, // x8sub_3 |
| 34381 | 0, // x8sub_4 |
| 34382 | 0, // x8sub_5 |
| 34383 | 0, // x8sub_6 |
| 34384 | 0, // x8sub_7 |
| 34385 | 0, // zasubb |
| 34386 | 0, // zasubd0 |
| 34387 | 0, // zasubd1 |
| 34388 | 0, // zasubh0 |
| 34389 | 0, // zasubh1 |
| 34390 | 0, // zasubq0 |
| 34391 | 0, // zasubq1 |
| 34392 | 0, // zasubs0 |
| 34393 | 0, // zasubs1 |
| 34394 | 0, // zsub |
| 34395 | 0, // zsub0 |
| 34396 | 0, // zsub1 |
| 34397 | 0, // zsub2 |
| 34398 | 0, // zsub3 |
| 34399 | 0, // zsub_hi |
| 34400 | 0, // zasubd1_then_zasubq0 |
| 34401 | 0, // zasubd1_then_zasubq1 |
| 34402 | 0, // zasubs1_then_zasubd0 |
| 34403 | 0, // zasubs1_then_zasubd1 |
| 34404 | 0, // zasubs1_then_zasubq0 |
| 34405 | 0, // zasubs1_then_zasubq1 |
| 34406 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34407 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34408 | 0, // zasubh1_then_zasubd0 |
| 34409 | 0, // zasubh1_then_zasubd1 |
| 34410 | 0, // zasubh1_then_zasubq0 |
| 34411 | 0, // zasubh1_then_zasubq1 |
| 34412 | 0, // zasubh1_then_zasubs0 |
| 34413 | 0, // zasubh1_then_zasubs1 |
| 34414 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34415 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34416 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34417 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34418 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34419 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34420 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34421 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34422 | 0, // dsub1_then_bsub |
| 34423 | 0, // dsub1_then_bsub_hi |
| 34424 | 0, // dsub1_then_hsub |
| 34425 | 0, // dsub1_then_hsub_hi |
| 34426 | 0, // dsub1_then_ssub |
| 34427 | 0, // dsub1_then_ssub_hi |
| 34428 | 0, // dsub3_then_bsub |
| 34429 | 0, // dsub3_then_bsub_hi |
| 34430 | 0, // dsub3_then_hsub |
| 34431 | 0, // dsub3_then_hsub_hi |
| 34432 | 0, // dsub3_then_ssub |
| 34433 | 0, // dsub3_then_ssub_hi |
| 34434 | 0, // dsub2_then_bsub |
| 34435 | 0, // dsub2_then_bsub_hi |
| 34436 | 0, // dsub2_then_hsub |
| 34437 | 0, // dsub2_then_hsub_hi |
| 34438 | 0, // dsub2_then_ssub |
| 34439 | 0, // dsub2_then_ssub_hi |
| 34440 | 20, // psub1_then_psub -> PPR2 |
| 34441 | 0, // qsub1_then_dsub_hi |
| 34442 | 0, // qsub3_then_dsub_hi |
| 34443 | 0, // qsub2_then_dsub_hi |
| 34444 | 0, // x8sub_7_then_sub_32 |
| 34445 | 0, // x8sub_7_then_sub_32_hi |
| 34446 | 0, // x8sub_6_then_sub_32 |
| 34447 | 0, // x8sub_6_then_sub_32_hi |
| 34448 | 0, // x8sub_5_then_sub_32 |
| 34449 | 0, // x8sub_5_then_sub_32_hi |
| 34450 | 0, // x8sub_4_then_sub_32 |
| 34451 | 0, // x8sub_4_then_sub_32_hi |
| 34452 | 0, // x8sub_3_then_sub_32 |
| 34453 | 0, // x8sub_3_then_sub_32_hi |
| 34454 | 0, // x8sub_2_then_sub_32 |
| 34455 | 0, // x8sub_2_then_sub_32_hi |
| 34456 | 0, // x8sub_1_then_sub_32 |
| 34457 | 0, // x8sub_1_then_sub_32_hi |
| 34458 | 0, // subo64_then_sub_32 |
| 34459 | 0, // subo64_then_sub_32_hi |
| 34460 | 0, // zsub1_then_zsub_hi |
| 34461 | 0, // zsub3_then_zsub_hi |
| 34462 | 0, // zsub2_then_zsub_hi |
| 34463 | 0, // dsub0_dsub1 |
| 34464 | 0, // dsub0_dsub1_dsub2 |
| 34465 | 0, // dsub1_dsub2 |
| 34466 | 0, // dsub1_dsub2_dsub3 |
| 34467 | 0, // dsub2_dsub3 |
| 34468 | 0, // dsub_dsub1 |
| 34469 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34470 | 0, // dsub_dsub1_dsub2 |
| 34471 | 0, // qsub0_qsub1 |
| 34472 | 0, // qsub0_qsub1_qsub2 |
| 34473 | 0, // qsub1_qsub2 |
| 34474 | 0, // qsub1_qsub2_qsub3 |
| 34475 | 0, // qsub2_qsub3 |
| 34476 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34477 | 0, // x8sub_0_x8sub_1 |
| 34478 | 0, // x8sub_2_x8sub_3 |
| 34479 | 0, // x8sub_4_x8sub_5 |
| 34480 | 0, // x8sub_6_x8sub_7 |
| 34481 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34482 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34483 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34484 | 0, // sub_32_subo64_then_sub_32 |
| 34485 | 0, // zsub_qsub1 |
| 34486 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34487 | 0, // zsub_qsub1_qsub2 |
| 34488 | 0, // zsub0_zsub1 |
| 34489 | 0, // zsub0_zsub1_zsub2 |
| 34490 | 0, // zsub1_zsub2 |
| 34491 | 0, // zsub1_zsub2_zsub3 |
| 34492 | 0, // zsub2_zsub3 |
| 34493 | 0, // zsub0_zsub2 |
| 34494 | 0, // zsub1_zsub3 |
| 34495 | }, |
| 34496 | { // PPR2Mul2 |
| 34497 | 0, // bsub |
| 34498 | 0, // bsub_hi |
| 34499 | 0, // dsub |
| 34500 | 0, // dsub0 |
| 34501 | 0, // dsub1 |
| 34502 | 0, // dsub2 |
| 34503 | 0, // dsub3 |
| 34504 | 0, // dsub_hi |
| 34505 | 0, // hsub |
| 34506 | 0, // hsub_hi |
| 34507 | 21, // psub -> PPR2Mul2 |
| 34508 | 21, // psub0 -> PPR2Mul2 |
| 34509 | 21, // psub1 -> PPR2Mul2 |
| 34510 | 0, // qsub0 |
| 34511 | 0, // qsub1 |
| 34512 | 0, // qsub2 |
| 34513 | 0, // qsub3 |
| 34514 | 0, // ssub |
| 34515 | 0, // ssub_hi |
| 34516 | 0, // sub_32 |
| 34517 | 0, // sub_32_hi |
| 34518 | 0, // sube32 |
| 34519 | 0, // sube64 |
| 34520 | 0, // subo32 |
| 34521 | 0, // subo64 |
| 34522 | 0, // x8sub_0 |
| 34523 | 0, // x8sub_1 |
| 34524 | 0, // x8sub_2 |
| 34525 | 0, // x8sub_3 |
| 34526 | 0, // x8sub_4 |
| 34527 | 0, // x8sub_5 |
| 34528 | 0, // x8sub_6 |
| 34529 | 0, // x8sub_7 |
| 34530 | 0, // zasubb |
| 34531 | 0, // zasubd0 |
| 34532 | 0, // zasubd1 |
| 34533 | 0, // zasubh0 |
| 34534 | 0, // zasubh1 |
| 34535 | 0, // zasubq0 |
| 34536 | 0, // zasubq1 |
| 34537 | 0, // zasubs0 |
| 34538 | 0, // zasubs1 |
| 34539 | 0, // zsub |
| 34540 | 0, // zsub0 |
| 34541 | 0, // zsub1 |
| 34542 | 0, // zsub2 |
| 34543 | 0, // zsub3 |
| 34544 | 0, // zsub_hi |
| 34545 | 0, // zasubd1_then_zasubq0 |
| 34546 | 0, // zasubd1_then_zasubq1 |
| 34547 | 0, // zasubs1_then_zasubd0 |
| 34548 | 0, // zasubs1_then_zasubd1 |
| 34549 | 0, // zasubs1_then_zasubq0 |
| 34550 | 0, // zasubs1_then_zasubq1 |
| 34551 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34552 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34553 | 0, // zasubh1_then_zasubd0 |
| 34554 | 0, // zasubh1_then_zasubd1 |
| 34555 | 0, // zasubh1_then_zasubq0 |
| 34556 | 0, // zasubh1_then_zasubq1 |
| 34557 | 0, // zasubh1_then_zasubs0 |
| 34558 | 0, // zasubh1_then_zasubs1 |
| 34559 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34560 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34561 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34562 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34563 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34564 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34565 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34566 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34567 | 0, // dsub1_then_bsub |
| 34568 | 0, // dsub1_then_bsub_hi |
| 34569 | 0, // dsub1_then_hsub |
| 34570 | 0, // dsub1_then_hsub_hi |
| 34571 | 0, // dsub1_then_ssub |
| 34572 | 0, // dsub1_then_ssub_hi |
| 34573 | 0, // dsub3_then_bsub |
| 34574 | 0, // dsub3_then_bsub_hi |
| 34575 | 0, // dsub3_then_hsub |
| 34576 | 0, // dsub3_then_hsub_hi |
| 34577 | 0, // dsub3_then_ssub |
| 34578 | 0, // dsub3_then_ssub_hi |
| 34579 | 0, // dsub2_then_bsub |
| 34580 | 0, // dsub2_then_bsub_hi |
| 34581 | 0, // dsub2_then_hsub |
| 34582 | 0, // dsub2_then_hsub_hi |
| 34583 | 0, // dsub2_then_ssub |
| 34584 | 0, // dsub2_then_ssub_hi |
| 34585 | 21, // psub1_then_psub -> PPR2Mul2 |
| 34586 | 0, // qsub1_then_dsub_hi |
| 34587 | 0, // qsub3_then_dsub_hi |
| 34588 | 0, // qsub2_then_dsub_hi |
| 34589 | 0, // x8sub_7_then_sub_32 |
| 34590 | 0, // x8sub_7_then_sub_32_hi |
| 34591 | 0, // x8sub_6_then_sub_32 |
| 34592 | 0, // x8sub_6_then_sub_32_hi |
| 34593 | 0, // x8sub_5_then_sub_32 |
| 34594 | 0, // x8sub_5_then_sub_32_hi |
| 34595 | 0, // x8sub_4_then_sub_32 |
| 34596 | 0, // x8sub_4_then_sub_32_hi |
| 34597 | 0, // x8sub_3_then_sub_32 |
| 34598 | 0, // x8sub_3_then_sub_32_hi |
| 34599 | 0, // x8sub_2_then_sub_32 |
| 34600 | 0, // x8sub_2_then_sub_32_hi |
| 34601 | 0, // x8sub_1_then_sub_32 |
| 34602 | 0, // x8sub_1_then_sub_32_hi |
| 34603 | 0, // subo64_then_sub_32 |
| 34604 | 0, // subo64_then_sub_32_hi |
| 34605 | 0, // zsub1_then_zsub_hi |
| 34606 | 0, // zsub3_then_zsub_hi |
| 34607 | 0, // zsub2_then_zsub_hi |
| 34608 | 0, // dsub0_dsub1 |
| 34609 | 0, // dsub0_dsub1_dsub2 |
| 34610 | 0, // dsub1_dsub2 |
| 34611 | 0, // dsub1_dsub2_dsub3 |
| 34612 | 0, // dsub2_dsub3 |
| 34613 | 0, // dsub_dsub1 |
| 34614 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34615 | 0, // dsub_dsub1_dsub2 |
| 34616 | 0, // qsub0_qsub1 |
| 34617 | 0, // qsub0_qsub1_qsub2 |
| 34618 | 0, // qsub1_qsub2 |
| 34619 | 0, // qsub1_qsub2_qsub3 |
| 34620 | 0, // qsub2_qsub3 |
| 34621 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34622 | 0, // x8sub_0_x8sub_1 |
| 34623 | 0, // x8sub_2_x8sub_3 |
| 34624 | 0, // x8sub_4_x8sub_5 |
| 34625 | 0, // x8sub_6_x8sub_7 |
| 34626 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34627 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34628 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34629 | 0, // sub_32_subo64_then_sub_32 |
| 34630 | 0, // zsub_qsub1 |
| 34631 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34632 | 0, // zsub_qsub1_qsub2 |
| 34633 | 0, // zsub0_zsub1 |
| 34634 | 0, // zsub0_zsub1_zsub2 |
| 34635 | 0, // zsub1_zsub2 |
| 34636 | 0, // zsub1_zsub2_zsub3 |
| 34637 | 0, // zsub2_zsub3 |
| 34638 | 0, // zsub0_zsub2 |
| 34639 | 0, // zsub1_zsub3 |
| 34640 | }, |
| 34641 | { // PPR2_with_psub1_in_PPRMul2 |
| 34642 | 0, // bsub |
| 34643 | 0, // bsub_hi |
| 34644 | 0, // dsub |
| 34645 | 0, // dsub0 |
| 34646 | 0, // dsub1 |
| 34647 | 0, // dsub2 |
| 34648 | 0, // dsub3 |
| 34649 | 0, // dsub_hi |
| 34650 | 0, // hsub |
| 34651 | 0, // hsub_hi |
| 34652 | 22, // psub -> PPR2_with_psub1_in_PPRMul2 |
| 34653 | 22, // psub0 -> PPR2_with_psub1_in_PPRMul2 |
| 34654 | 22, // psub1 -> PPR2_with_psub1_in_PPRMul2 |
| 34655 | 0, // qsub0 |
| 34656 | 0, // qsub1 |
| 34657 | 0, // qsub2 |
| 34658 | 0, // qsub3 |
| 34659 | 0, // ssub |
| 34660 | 0, // ssub_hi |
| 34661 | 0, // sub_32 |
| 34662 | 0, // sub_32_hi |
| 34663 | 0, // sube32 |
| 34664 | 0, // sube64 |
| 34665 | 0, // subo32 |
| 34666 | 0, // subo64 |
| 34667 | 0, // x8sub_0 |
| 34668 | 0, // x8sub_1 |
| 34669 | 0, // x8sub_2 |
| 34670 | 0, // x8sub_3 |
| 34671 | 0, // x8sub_4 |
| 34672 | 0, // x8sub_5 |
| 34673 | 0, // x8sub_6 |
| 34674 | 0, // x8sub_7 |
| 34675 | 0, // zasubb |
| 34676 | 0, // zasubd0 |
| 34677 | 0, // zasubd1 |
| 34678 | 0, // zasubh0 |
| 34679 | 0, // zasubh1 |
| 34680 | 0, // zasubq0 |
| 34681 | 0, // zasubq1 |
| 34682 | 0, // zasubs0 |
| 34683 | 0, // zasubs1 |
| 34684 | 0, // zsub |
| 34685 | 0, // zsub0 |
| 34686 | 0, // zsub1 |
| 34687 | 0, // zsub2 |
| 34688 | 0, // zsub3 |
| 34689 | 0, // zsub_hi |
| 34690 | 0, // zasubd1_then_zasubq0 |
| 34691 | 0, // zasubd1_then_zasubq1 |
| 34692 | 0, // zasubs1_then_zasubd0 |
| 34693 | 0, // zasubs1_then_zasubd1 |
| 34694 | 0, // zasubs1_then_zasubq0 |
| 34695 | 0, // zasubs1_then_zasubq1 |
| 34696 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34697 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34698 | 0, // zasubh1_then_zasubd0 |
| 34699 | 0, // zasubh1_then_zasubd1 |
| 34700 | 0, // zasubh1_then_zasubq0 |
| 34701 | 0, // zasubh1_then_zasubq1 |
| 34702 | 0, // zasubh1_then_zasubs0 |
| 34703 | 0, // zasubh1_then_zasubs1 |
| 34704 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34705 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34706 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34707 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34708 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34709 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34710 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34711 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34712 | 0, // dsub1_then_bsub |
| 34713 | 0, // dsub1_then_bsub_hi |
| 34714 | 0, // dsub1_then_hsub |
| 34715 | 0, // dsub1_then_hsub_hi |
| 34716 | 0, // dsub1_then_ssub |
| 34717 | 0, // dsub1_then_ssub_hi |
| 34718 | 0, // dsub3_then_bsub |
| 34719 | 0, // dsub3_then_bsub_hi |
| 34720 | 0, // dsub3_then_hsub |
| 34721 | 0, // dsub3_then_hsub_hi |
| 34722 | 0, // dsub3_then_ssub |
| 34723 | 0, // dsub3_then_ssub_hi |
| 34724 | 0, // dsub2_then_bsub |
| 34725 | 0, // dsub2_then_bsub_hi |
| 34726 | 0, // dsub2_then_hsub |
| 34727 | 0, // dsub2_then_hsub_hi |
| 34728 | 0, // dsub2_then_ssub |
| 34729 | 0, // dsub2_then_ssub_hi |
| 34730 | 22, // psub1_then_psub -> PPR2_with_psub1_in_PPRMul2 |
| 34731 | 0, // qsub1_then_dsub_hi |
| 34732 | 0, // qsub3_then_dsub_hi |
| 34733 | 0, // qsub2_then_dsub_hi |
| 34734 | 0, // x8sub_7_then_sub_32 |
| 34735 | 0, // x8sub_7_then_sub_32_hi |
| 34736 | 0, // x8sub_6_then_sub_32 |
| 34737 | 0, // x8sub_6_then_sub_32_hi |
| 34738 | 0, // x8sub_5_then_sub_32 |
| 34739 | 0, // x8sub_5_then_sub_32_hi |
| 34740 | 0, // x8sub_4_then_sub_32 |
| 34741 | 0, // x8sub_4_then_sub_32_hi |
| 34742 | 0, // x8sub_3_then_sub_32 |
| 34743 | 0, // x8sub_3_then_sub_32_hi |
| 34744 | 0, // x8sub_2_then_sub_32 |
| 34745 | 0, // x8sub_2_then_sub_32_hi |
| 34746 | 0, // x8sub_1_then_sub_32 |
| 34747 | 0, // x8sub_1_then_sub_32_hi |
| 34748 | 0, // subo64_then_sub_32 |
| 34749 | 0, // subo64_then_sub_32_hi |
| 34750 | 0, // zsub1_then_zsub_hi |
| 34751 | 0, // zsub3_then_zsub_hi |
| 34752 | 0, // zsub2_then_zsub_hi |
| 34753 | 0, // dsub0_dsub1 |
| 34754 | 0, // dsub0_dsub1_dsub2 |
| 34755 | 0, // dsub1_dsub2 |
| 34756 | 0, // dsub1_dsub2_dsub3 |
| 34757 | 0, // dsub2_dsub3 |
| 34758 | 0, // dsub_dsub1 |
| 34759 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34760 | 0, // dsub_dsub1_dsub2 |
| 34761 | 0, // qsub0_qsub1 |
| 34762 | 0, // qsub0_qsub1_qsub2 |
| 34763 | 0, // qsub1_qsub2 |
| 34764 | 0, // qsub1_qsub2_qsub3 |
| 34765 | 0, // qsub2_qsub3 |
| 34766 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34767 | 0, // x8sub_0_x8sub_1 |
| 34768 | 0, // x8sub_2_x8sub_3 |
| 34769 | 0, // x8sub_4_x8sub_5 |
| 34770 | 0, // x8sub_6_x8sub_7 |
| 34771 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34772 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34773 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34774 | 0, // sub_32_subo64_then_sub_32 |
| 34775 | 0, // zsub_qsub1 |
| 34776 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34777 | 0, // zsub_qsub1_qsub2 |
| 34778 | 0, // zsub0_zsub1 |
| 34779 | 0, // zsub0_zsub1_zsub2 |
| 34780 | 0, // zsub1_zsub2 |
| 34781 | 0, // zsub1_zsub2_zsub3 |
| 34782 | 0, // zsub2_zsub3 |
| 34783 | 0, // zsub0_zsub2 |
| 34784 | 0, // zsub1_zsub3 |
| 34785 | }, |
| 34786 | { // PPR2_with_psub1_in_PPR_3b |
| 34787 | 0, // bsub |
| 34788 | 0, // bsub_hi |
| 34789 | 0, // dsub |
| 34790 | 0, // dsub0 |
| 34791 | 0, // dsub1 |
| 34792 | 0, // dsub2 |
| 34793 | 0, // dsub3 |
| 34794 | 0, // dsub_hi |
| 34795 | 0, // hsub |
| 34796 | 0, // hsub_hi |
| 34797 | 23, // psub -> PPR2_with_psub1_in_PPR_3b |
| 34798 | 23, // psub0 -> PPR2_with_psub1_in_PPR_3b |
| 34799 | 23, // psub1 -> PPR2_with_psub1_in_PPR_3b |
| 34800 | 0, // qsub0 |
| 34801 | 0, // qsub1 |
| 34802 | 0, // qsub2 |
| 34803 | 0, // qsub3 |
| 34804 | 0, // ssub |
| 34805 | 0, // ssub_hi |
| 34806 | 0, // sub_32 |
| 34807 | 0, // sub_32_hi |
| 34808 | 0, // sube32 |
| 34809 | 0, // sube64 |
| 34810 | 0, // subo32 |
| 34811 | 0, // subo64 |
| 34812 | 0, // x8sub_0 |
| 34813 | 0, // x8sub_1 |
| 34814 | 0, // x8sub_2 |
| 34815 | 0, // x8sub_3 |
| 34816 | 0, // x8sub_4 |
| 34817 | 0, // x8sub_5 |
| 34818 | 0, // x8sub_6 |
| 34819 | 0, // x8sub_7 |
| 34820 | 0, // zasubb |
| 34821 | 0, // zasubd0 |
| 34822 | 0, // zasubd1 |
| 34823 | 0, // zasubh0 |
| 34824 | 0, // zasubh1 |
| 34825 | 0, // zasubq0 |
| 34826 | 0, // zasubq1 |
| 34827 | 0, // zasubs0 |
| 34828 | 0, // zasubs1 |
| 34829 | 0, // zsub |
| 34830 | 0, // zsub0 |
| 34831 | 0, // zsub1 |
| 34832 | 0, // zsub2 |
| 34833 | 0, // zsub3 |
| 34834 | 0, // zsub_hi |
| 34835 | 0, // zasubd1_then_zasubq0 |
| 34836 | 0, // zasubd1_then_zasubq1 |
| 34837 | 0, // zasubs1_then_zasubd0 |
| 34838 | 0, // zasubs1_then_zasubd1 |
| 34839 | 0, // zasubs1_then_zasubq0 |
| 34840 | 0, // zasubs1_then_zasubq1 |
| 34841 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34842 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34843 | 0, // zasubh1_then_zasubd0 |
| 34844 | 0, // zasubh1_then_zasubd1 |
| 34845 | 0, // zasubh1_then_zasubq0 |
| 34846 | 0, // zasubh1_then_zasubq1 |
| 34847 | 0, // zasubh1_then_zasubs0 |
| 34848 | 0, // zasubh1_then_zasubs1 |
| 34849 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34850 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34851 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34852 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34853 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34854 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 34855 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 34856 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 34857 | 0, // dsub1_then_bsub |
| 34858 | 0, // dsub1_then_bsub_hi |
| 34859 | 0, // dsub1_then_hsub |
| 34860 | 0, // dsub1_then_hsub_hi |
| 34861 | 0, // dsub1_then_ssub |
| 34862 | 0, // dsub1_then_ssub_hi |
| 34863 | 0, // dsub3_then_bsub |
| 34864 | 0, // dsub3_then_bsub_hi |
| 34865 | 0, // dsub3_then_hsub |
| 34866 | 0, // dsub3_then_hsub_hi |
| 34867 | 0, // dsub3_then_ssub |
| 34868 | 0, // dsub3_then_ssub_hi |
| 34869 | 0, // dsub2_then_bsub |
| 34870 | 0, // dsub2_then_bsub_hi |
| 34871 | 0, // dsub2_then_hsub |
| 34872 | 0, // dsub2_then_hsub_hi |
| 34873 | 0, // dsub2_then_ssub |
| 34874 | 0, // dsub2_then_ssub_hi |
| 34875 | 23, // psub1_then_psub -> PPR2_with_psub1_in_PPR_3b |
| 34876 | 0, // qsub1_then_dsub_hi |
| 34877 | 0, // qsub3_then_dsub_hi |
| 34878 | 0, // qsub2_then_dsub_hi |
| 34879 | 0, // x8sub_7_then_sub_32 |
| 34880 | 0, // x8sub_7_then_sub_32_hi |
| 34881 | 0, // x8sub_6_then_sub_32 |
| 34882 | 0, // x8sub_6_then_sub_32_hi |
| 34883 | 0, // x8sub_5_then_sub_32 |
| 34884 | 0, // x8sub_5_then_sub_32_hi |
| 34885 | 0, // x8sub_4_then_sub_32 |
| 34886 | 0, // x8sub_4_then_sub_32_hi |
| 34887 | 0, // x8sub_3_then_sub_32 |
| 34888 | 0, // x8sub_3_then_sub_32_hi |
| 34889 | 0, // x8sub_2_then_sub_32 |
| 34890 | 0, // x8sub_2_then_sub_32_hi |
| 34891 | 0, // x8sub_1_then_sub_32 |
| 34892 | 0, // x8sub_1_then_sub_32_hi |
| 34893 | 0, // subo64_then_sub_32 |
| 34894 | 0, // subo64_then_sub_32_hi |
| 34895 | 0, // zsub1_then_zsub_hi |
| 34896 | 0, // zsub3_then_zsub_hi |
| 34897 | 0, // zsub2_then_zsub_hi |
| 34898 | 0, // dsub0_dsub1 |
| 34899 | 0, // dsub0_dsub1_dsub2 |
| 34900 | 0, // dsub1_dsub2 |
| 34901 | 0, // dsub1_dsub2_dsub3 |
| 34902 | 0, // dsub2_dsub3 |
| 34903 | 0, // dsub_dsub1 |
| 34904 | 0, // dsub_dsub1_dsub2_dsub3 |
| 34905 | 0, // dsub_dsub1_dsub2 |
| 34906 | 0, // qsub0_qsub1 |
| 34907 | 0, // qsub0_qsub1_qsub2 |
| 34908 | 0, // qsub1_qsub2 |
| 34909 | 0, // qsub1_qsub2_qsub3 |
| 34910 | 0, // qsub2_qsub3 |
| 34911 | 0, // sub_32_x8sub_1_then_sub_32 |
| 34912 | 0, // x8sub_0_x8sub_1 |
| 34913 | 0, // x8sub_2_x8sub_3 |
| 34914 | 0, // x8sub_4_x8sub_5 |
| 34915 | 0, // x8sub_6_x8sub_7 |
| 34916 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 34917 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 34918 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 34919 | 0, // sub_32_subo64_then_sub_32 |
| 34920 | 0, // zsub_qsub1 |
| 34921 | 0, // zsub_qsub1_qsub2_qsub3 |
| 34922 | 0, // zsub_qsub1_qsub2 |
| 34923 | 0, // zsub0_zsub1 |
| 34924 | 0, // zsub0_zsub1_zsub2 |
| 34925 | 0, // zsub1_zsub2 |
| 34926 | 0, // zsub1_zsub2_zsub3 |
| 34927 | 0, // zsub2_zsub3 |
| 34928 | 0, // zsub0_zsub2 |
| 34929 | 0, // zsub1_zsub3 |
| 34930 | }, |
| 34931 | { // PPR2_with_psub1_in_PPR_p8to15 |
| 34932 | 0, // bsub |
| 34933 | 0, // bsub_hi |
| 34934 | 0, // dsub |
| 34935 | 0, // dsub0 |
| 34936 | 0, // dsub1 |
| 34937 | 0, // dsub2 |
| 34938 | 0, // dsub3 |
| 34939 | 0, // dsub_hi |
| 34940 | 0, // hsub |
| 34941 | 0, // hsub_hi |
| 34942 | 24, // psub -> PPR2_with_psub1_in_PPR_p8to15 |
| 34943 | 24, // psub0 -> PPR2_with_psub1_in_PPR_p8to15 |
| 34944 | 24, // psub1 -> PPR2_with_psub1_in_PPR_p8to15 |
| 34945 | 0, // qsub0 |
| 34946 | 0, // qsub1 |
| 34947 | 0, // qsub2 |
| 34948 | 0, // qsub3 |
| 34949 | 0, // ssub |
| 34950 | 0, // ssub_hi |
| 34951 | 0, // sub_32 |
| 34952 | 0, // sub_32_hi |
| 34953 | 0, // sube32 |
| 34954 | 0, // sube64 |
| 34955 | 0, // subo32 |
| 34956 | 0, // subo64 |
| 34957 | 0, // x8sub_0 |
| 34958 | 0, // x8sub_1 |
| 34959 | 0, // x8sub_2 |
| 34960 | 0, // x8sub_3 |
| 34961 | 0, // x8sub_4 |
| 34962 | 0, // x8sub_5 |
| 34963 | 0, // x8sub_6 |
| 34964 | 0, // x8sub_7 |
| 34965 | 0, // zasubb |
| 34966 | 0, // zasubd0 |
| 34967 | 0, // zasubd1 |
| 34968 | 0, // zasubh0 |
| 34969 | 0, // zasubh1 |
| 34970 | 0, // zasubq0 |
| 34971 | 0, // zasubq1 |
| 34972 | 0, // zasubs0 |
| 34973 | 0, // zasubs1 |
| 34974 | 0, // zsub |
| 34975 | 0, // zsub0 |
| 34976 | 0, // zsub1 |
| 34977 | 0, // zsub2 |
| 34978 | 0, // zsub3 |
| 34979 | 0, // zsub_hi |
| 34980 | 0, // zasubd1_then_zasubq0 |
| 34981 | 0, // zasubd1_then_zasubq1 |
| 34982 | 0, // zasubs1_then_zasubd0 |
| 34983 | 0, // zasubs1_then_zasubd1 |
| 34984 | 0, // zasubs1_then_zasubq0 |
| 34985 | 0, // zasubs1_then_zasubq1 |
| 34986 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 34987 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 34988 | 0, // zasubh1_then_zasubd0 |
| 34989 | 0, // zasubh1_then_zasubd1 |
| 34990 | 0, // zasubh1_then_zasubq0 |
| 34991 | 0, // zasubh1_then_zasubq1 |
| 34992 | 0, // zasubh1_then_zasubs0 |
| 34993 | 0, // zasubh1_then_zasubs1 |
| 34994 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 34995 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 34996 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 34997 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 34998 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 34999 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35000 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35001 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35002 | 0, // dsub1_then_bsub |
| 35003 | 0, // dsub1_then_bsub_hi |
| 35004 | 0, // dsub1_then_hsub |
| 35005 | 0, // dsub1_then_hsub_hi |
| 35006 | 0, // dsub1_then_ssub |
| 35007 | 0, // dsub1_then_ssub_hi |
| 35008 | 0, // dsub3_then_bsub |
| 35009 | 0, // dsub3_then_bsub_hi |
| 35010 | 0, // dsub3_then_hsub |
| 35011 | 0, // dsub3_then_hsub_hi |
| 35012 | 0, // dsub3_then_ssub |
| 35013 | 0, // dsub3_then_ssub_hi |
| 35014 | 0, // dsub2_then_bsub |
| 35015 | 0, // dsub2_then_bsub_hi |
| 35016 | 0, // dsub2_then_hsub |
| 35017 | 0, // dsub2_then_hsub_hi |
| 35018 | 0, // dsub2_then_ssub |
| 35019 | 0, // dsub2_then_ssub_hi |
| 35020 | 24, // psub1_then_psub -> PPR2_with_psub1_in_PPR_p8to15 |
| 35021 | 0, // qsub1_then_dsub_hi |
| 35022 | 0, // qsub3_then_dsub_hi |
| 35023 | 0, // qsub2_then_dsub_hi |
| 35024 | 0, // x8sub_7_then_sub_32 |
| 35025 | 0, // x8sub_7_then_sub_32_hi |
| 35026 | 0, // x8sub_6_then_sub_32 |
| 35027 | 0, // x8sub_6_then_sub_32_hi |
| 35028 | 0, // x8sub_5_then_sub_32 |
| 35029 | 0, // x8sub_5_then_sub_32_hi |
| 35030 | 0, // x8sub_4_then_sub_32 |
| 35031 | 0, // x8sub_4_then_sub_32_hi |
| 35032 | 0, // x8sub_3_then_sub_32 |
| 35033 | 0, // x8sub_3_then_sub_32_hi |
| 35034 | 0, // x8sub_2_then_sub_32 |
| 35035 | 0, // x8sub_2_then_sub_32_hi |
| 35036 | 0, // x8sub_1_then_sub_32 |
| 35037 | 0, // x8sub_1_then_sub_32_hi |
| 35038 | 0, // subo64_then_sub_32 |
| 35039 | 0, // subo64_then_sub_32_hi |
| 35040 | 0, // zsub1_then_zsub_hi |
| 35041 | 0, // zsub3_then_zsub_hi |
| 35042 | 0, // zsub2_then_zsub_hi |
| 35043 | 0, // dsub0_dsub1 |
| 35044 | 0, // dsub0_dsub1_dsub2 |
| 35045 | 0, // dsub1_dsub2 |
| 35046 | 0, // dsub1_dsub2_dsub3 |
| 35047 | 0, // dsub2_dsub3 |
| 35048 | 0, // dsub_dsub1 |
| 35049 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35050 | 0, // dsub_dsub1_dsub2 |
| 35051 | 0, // qsub0_qsub1 |
| 35052 | 0, // qsub0_qsub1_qsub2 |
| 35053 | 0, // qsub1_qsub2 |
| 35054 | 0, // qsub1_qsub2_qsub3 |
| 35055 | 0, // qsub2_qsub3 |
| 35056 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35057 | 0, // x8sub_0_x8sub_1 |
| 35058 | 0, // x8sub_2_x8sub_3 |
| 35059 | 0, // x8sub_4_x8sub_5 |
| 35060 | 0, // x8sub_6_x8sub_7 |
| 35061 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35062 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35063 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35064 | 0, // sub_32_subo64_then_sub_32 |
| 35065 | 0, // zsub_qsub1 |
| 35066 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35067 | 0, // zsub_qsub1_qsub2 |
| 35068 | 0, // zsub0_zsub1 |
| 35069 | 0, // zsub0_zsub1_zsub2 |
| 35070 | 0, // zsub1_zsub2 |
| 35071 | 0, // zsub1_zsub2_zsub3 |
| 35072 | 0, // zsub2_zsub3 |
| 35073 | 0, // zsub0_zsub2 |
| 35074 | 0, // zsub1_zsub3 |
| 35075 | }, |
| 35076 | { // PPR2_with_psub_in_PNR_3b |
| 35077 | 0, // bsub |
| 35078 | 0, // bsub_hi |
| 35079 | 0, // dsub |
| 35080 | 0, // dsub0 |
| 35081 | 0, // dsub1 |
| 35082 | 0, // dsub2 |
| 35083 | 0, // dsub3 |
| 35084 | 0, // dsub_hi |
| 35085 | 0, // hsub |
| 35086 | 0, // hsub_hi |
| 35087 | 25, // psub -> PPR2_with_psub_in_PNR_3b |
| 35088 | 25, // psub0 -> PPR2_with_psub_in_PNR_3b |
| 35089 | 25, // psub1 -> PPR2_with_psub_in_PNR_3b |
| 35090 | 0, // qsub0 |
| 35091 | 0, // qsub1 |
| 35092 | 0, // qsub2 |
| 35093 | 0, // qsub3 |
| 35094 | 0, // ssub |
| 35095 | 0, // ssub_hi |
| 35096 | 0, // sub_32 |
| 35097 | 0, // sub_32_hi |
| 35098 | 0, // sube32 |
| 35099 | 0, // sube64 |
| 35100 | 0, // subo32 |
| 35101 | 0, // subo64 |
| 35102 | 0, // x8sub_0 |
| 35103 | 0, // x8sub_1 |
| 35104 | 0, // x8sub_2 |
| 35105 | 0, // x8sub_3 |
| 35106 | 0, // x8sub_4 |
| 35107 | 0, // x8sub_5 |
| 35108 | 0, // x8sub_6 |
| 35109 | 0, // x8sub_7 |
| 35110 | 0, // zasubb |
| 35111 | 0, // zasubd0 |
| 35112 | 0, // zasubd1 |
| 35113 | 0, // zasubh0 |
| 35114 | 0, // zasubh1 |
| 35115 | 0, // zasubq0 |
| 35116 | 0, // zasubq1 |
| 35117 | 0, // zasubs0 |
| 35118 | 0, // zasubs1 |
| 35119 | 0, // zsub |
| 35120 | 0, // zsub0 |
| 35121 | 0, // zsub1 |
| 35122 | 0, // zsub2 |
| 35123 | 0, // zsub3 |
| 35124 | 0, // zsub_hi |
| 35125 | 0, // zasubd1_then_zasubq0 |
| 35126 | 0, // zasubd1_then_zasubq1 |
| 35127 | 0, // zasubs1_then_zasubd0 |
| 35128 | 0, // zasubs1_then_zasubd1 |
| 35129 | 0, // zasubs1_then_zasubq0 |
| 35130 | 0, // zasubs1_then_zasubq1 |
| 35131 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35132 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35133 | 0, // zasubh1_then_zasubd0 |
| 35134 | 0, // zasubh1_then_zasubd1 |
| 35135 | 0, // zasubh1_then_zasubq0 |
| 35136 | 0, // zasubh1_then_zasubq1 |
| 35137 | 0, // zasubh1_then_zasubs0 |
| 35138 | 0, // zasubh1_then_zasubs1 |
| 35139 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35140 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35141 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35142 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35143 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35144 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35145 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35146 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35147 | 0, // dsub1_then_bsub |
| 35148 | 0, // dsub1_then_bsub_hi |
| 35149 | 0, // dsub1_then_hsub |
| 35150 | 0, // dsub1_then_hsub_hi |
| 35151 | 0, // dsub1_then_ssub |
| 35152 | 0, // dsub1_then_ssub_hi |
| 35153 | 0, // dsub3_then_bsub |
| 35154 | 0, // dsub3_then_bsub_hi |
| 35155 | 0, // dsub3_then_hsub |
| 35156 | 0, // dsub3_then_hsub_hi |
| 35157 | 0, // dsub3_then_ssub |
| 35158 | 0, // dsub3_then_ssub_hi |
| 35159 | 0, // dsub2_then_bsub |
| 35160 | 0, // dsub2_then_bsub_hi |
| 35161 | 0, // dsub2_then_hsub |
| 35162 | 0, // dsub2_then_hsub_hi |
| 35163 | 0, // dsub2_then_ssub |
| 35164 | 0, // dsub2_then_ssub_hi |
| 35165 | 25, // psub1_then_psub -> PPR2_with_psub_in_PNR_3b |
| 35166 | 0, // qsub1_then_dsub_hi |
| 35167 | 0, // qsub3_then_dsub_hi |
| 35168 | 0, // qsub2_then_dsub_hi |
| 35169 | 0, // x8sub_7_then_sub_32 |
| 35170 | 0, // x8sub_7_then_sub_32_hi |
| 35171 | 0, // x8sub_6_then_sub_32 |
| 35172 | 0, // x8sub_6_then_sub_32_hi |
| 35173 | 0, // x8sub_5_then_sub_32 |
| 35174 | 0, // x8sub_5_then_sub_32_hi |
| 35175 | 0, // x8sub_4_then_sub_32 |
| 35176 | 0, // x8sub_4_then_sub_32_hi |
| 35177 | 0, // x8sub_3_then_sub_32 |
| 35178 | 0, // x8sub_3_then_sub_32_hi |
| 35179 | 0, // x8sub_2_then_sub_32 |
| 35180 | 0, // x8sub_2_then_sub_32_hi |
| 35181 | 0, // x8sub_1_then_sub_32 |
| 35182 | 0, // x8sub_1_then_sub_32_hi |
| 35183 | 0, // subo64_then_sub_32 |
| 35184 | 0, // subo64_then_sub_32_hi |
| 35185 | 0, // zsub1_then_zsub_hi |
| 35186 | 0, // zsub3_then_zsub_hi |
| 35187 | 0, // zsub2_then_zsub_hi |
| 35188 | 0, // dsub0_dsub1 |
| 35189 | 0, // dsub0_dsub1_dsub2 |
| 35190 | 0, // dsub1_dsub2 |
| 35191 | 0, // dsub1_dsub2_dsub3 |
| 35192 | 0, // dsub2_dsub3 |
| 35193 | 0, // dsub_dsub1 |
| 35194 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35195 | 0, // dsub_dsub1_dsub2 |
| 35196 | 0, // qsub0_qsub1 |
| 35197 | 0, // qsub0_qsub1_qsub2 |
| 35198 | 0, // qsub1_qsub2 |
| 35199 | 0, // qsub1_qsub2_qsub3 |
| 35200 | 0, // qsub2_qsub3 |
| 35201 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35202 | 0, // x8sub_0_x8sub_1 |
| 35203 | 0, // x8sub_2_x8sub_3 |
| 35204 | 0, // x8sub_4_x8sub_5 |
| 35205 | 0, // x8sub_6_x8sub_7 |
| 35206 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35207 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35208 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35209 | 0, // sub_32_subo64_then_sub_32 |
| 35210 | 0, // zsub_qsub1 |
| 35211 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35212 | 0, // zsub_qsub1_qsub2 |
| 35213 | 0, // zsub0_zsub1 |
| 35214 | 0, // zsub0_zsub1_zsub2 |
| 35215 | 0, // zsub1_zsub2 |
| 35216 | 0, // zsub1_zsub2_zsub3 |
| 35217 | 0, // zsub2_zsub3 |
| 35218 | 0, // zsub0_zsub2 |
| 35219 | 0, // zsub1_zsub3 |
| 35220 | }, |
| 35221 | { // PPR2_with_psub_in_PNR_p8to15 |
| 35222 | 0, // bsub |
| 35223 | 0, // bsub_hi |
| 35224 | 0, // dsub |
| 35225 | 0, // dsub0 |
| 35226 | 0, // dsub1 |
| 35227 | 0, // dsub2 |
| 35228 | 0, // dsub3 |
| 35229 | 0, // dsub_hi |
| 35230 | 0, // hsub |
| 35231 | 0, // hsub_hi |
| 35232 | 26, // psub -> PPR2_with_psub_in_PNR_p8to15 |
| 35233 | 26, // psub0 -> PPR2_with_psub_in_PNR_p8to15 |
| 35234 | 26, // psub1 -> PPR2_with_psub_in_PNR_p8to15 |
| 35235 | 0, // qsub0 |
| 35236 | 0, // qsub1 |
| 35237 | 0, // qsub2 |
| 35238 | 0, // qsub3 |
| 35239 | 0, // ssub |
| 35240 | 0, // ssub_hi |
| 35241 | 0, // sub_32 |
| 35242 | 0, // sub_32_hi |
| 35243 | 0, // sube32 |
| 35244 | 0, // sube64 |
| 35245 | 0, // subo32 |
| 35246 | 0, // subo64 |
| 35247 | 0, // x8sub_0 |
| 35248 | 0, // x8sub_1 |
| 35249 | 0, // x8sub_2 |
| 35250 | 0, // x8sub_3 |
| 35251 | 0, // x8sub_4 |
| 35252 | 0, // x8sub_5 |
| 35253 | 0, // x8sub_6 |
| 35254 | 0, // x8sub_7 |
| 35255 | 0, // zasubb |
| 35256 | 0, // zasubd0 |
| 35257 | 0, // zasubd1 |
| 35258 | 0, // zasubh0 |
| 35259 | 0, // zasubh1 |
| 35260 | 0, // zasubq0 |
| 35261 | 0, // zasubq1 |
| 35262 | 0, // zasubs0 |
| 35263 | 0, // zasubs1 |
| 35264 | 0, // zsub |
| 35265 | 0, // zsub0 |
| 35266 | 0, // zsub1 |
| 35267 | 0, // zsub2 |
| 35268 | 0, // zsub3 |
| 35269 | 0, // zsub_hi |
| 35270 | 0, // zasubd1_then_zasubq0 |
| 35271 | 0, // zasubd1_then_zasubq1 |
| 35272 | 0, // zasubs1_then_zasubd0 |
| 35273 | 0, // zasubs1_then_zasubd1 |
| 35274 | 0, // zasubs1_then_zasubq0 |
| 35275 | 0, // zasubs1_then_zasubq1 |
| 35276 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35277 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35278 | 0, // zasubh1_then_zasubd0 |
| 35279 | 0, // zasubh1_then_zasubd1 |
| 35280 | 0, // zasubh1_then_zasubq0 |
| 35281 | 0, // zasubh1_then_zasubq1 |
| 35282 | 0, // zasubh1_then_zasubs0 |
| 35283 | 0, // zasubh1_then_zasubs1 |
| 35284 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35285 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35286 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35287 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35288 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35289 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35290 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35291 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35292 | 0, // dsub1_then_bsub |
| 35293 | 0, // dsub1_then_bsub_hi |
| 35294 | 0, // dsub1_then_hsub |
| 35295 | 0, // dsub1_then_hsub_hi |
| 35296 | 0, // dsub1_then_ssub |
| 35297 | 0, // dsub1_then_ssub_hi |
| 35298 | 0, // dsub3_then_bsub |
| 35299 | 0, // dsub3_then_bsub_hi |
| 35300 | 0, // dsub3_then_hsub |
| 35301 | 0, // dsub3_then_hsub_hi |
| 35302 | 0, // dsub3_then_ssub |
| 35303 | 0, // dsub3_then_ssub_hi |
| 35304 | 0, // dsub2_then_bsub |
| 35305 | 0, // dsub2_then_bsub_hi |
| 35306 | 0, // dsub2_then_hsub |
| 35307 | 0, // dsub2_then_hsub_hi |
| 35308 | 0, // dsub2_then_ssub |
| 35309 | 0, // dsub2_then_ssub_hi |
| 35310 | 26, // psub1_then_psub -> PPR2_with_psub_in_PNR_p8to15 |
| 35311 | 0, // qsub1_then_dsub_hi |
| 35312 | 0, // qsub3_then_dsub_hi |
| 35313 | 0, // qsub2_then_dsub_hi |
| 35314 | 0, // x8sub_7_then_sub_32 |
| 35315 | 0, // x8sub_7_then_sub_32_hi |
| 35316 | 0, // x8sub_6_then_sub_32 |
| 35317 | 0, // x8sub_6_then_sub_32_hi |
| 35318 | 0, // x8sub_5_then_sub_32 |
| 35319 | 0, // x8sub_5_then_sub_32_hi |
| 35320 | 0, // x8sub_4_then_sub_32 |
| 35321 | 0, // x8sub_4_then_sub_32_hi |
| 35322 | 0, // x8sub_3_then_sub_32 |
| 35323 | 0, // x8sub_3_then_sub_32_hi |
| 35324 | 0, // x8sub_2_then_sub_32 |
| 35325 | 0, // x8sub_2_then_sub_32_hi |
| 35326 | 0, // x8sub_1_then_sub_32 |
| 35327 | 0, // x8sub_1_then_sub_32_hi |
| 35328 | 0, // subo64_then_sub_32 |
| 35329 | 0, // subo64_then_sub_32_hi |
| 35330 | 0, // zsub1_then_zsub_hi |
| 35331 | 0, // zsub3_then_zsub_hi |
| 35332 | 0, // zsub2_then_zsub_hi |
| 35333 | 0, // dsub0_dsub1 |
| 35334 | 0, // dsub0_dsub1_dsub2 |
| 35335 | 0, // dsub1_dsub2 |
| 35336 | 0, // dsub1_dsub2_dsub3 |
| 35337 | 0, // dsub2_dsub3 |
| 35338 | 0, // dsub_dsub1 |
| 35339 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35340 | 0, // dsub_dsub1_dsub2 |
| 35341 | 0, // qsub0_qsub1 |
| 35342 | 0, // qsub0_qsub1_qsub2 |
| 35343 | 0, // qsub1_qsub2 |
| 35344 | 0, // qsub1_qsub2_qsub3 |
| 35345 | 0, // qsub2_qsub3 |
| 35346 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35347 | 0, // x8sub_0_x8sub_1 |
| 35348 | 0, // x8sub_2_x8sub_3 |
| 35349 | 0, // x8sub_4_x8sub_5 |
| 35350 | 0, // x8sub_6_x8sub_7 |
| 35351 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35352 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35353 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35354 | 0, // sub_32_subo64_then_sub_32 |
| 35355 | 0, // zsub_qsub1 |
| 35356 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35357 | 0, // zsub_qsub1_qsub2 |
| 35358 | 0, // zsub0_zsub1 |
| 35359 | 0, // zsub0_zsub1_zsub2 |
| 35360 | 0, // zsub1_zsub2 |
| 35361 | 0, // zsub1_zsub2_zsub3 |
| 35362 | 0, // zsub2_zsub3 |
| 35363 | 0, // zsub0_zsub2 |
| 35364 | 0, // zsub1_zsub3 |
| 35365 | }, |
| 35366 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 35367 | 0, // bsub |
| 35368 | 0, // bsub_hi |
| 35369 | 0, // dsub |
| 35370 | 0, // dsub0 |
| 35371 | 0, // dsub1 |
| 35372 | 0, // dsub2 |
| 35373 | 0, // dsub3 |
| 35374 | 0, // dsub_hi |
| 35375 | 0, // hsub |
| 35376 | 0, // hsub_hi |
| 35377 | 27, // psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 35378 | 27, // psub0 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 35379 | 27, // psub1 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 35380 | 0, // qsub0 |
| 35381 | 0, // qsub1 |
| 35382 | 0, // qsub2 |
| 35383 | 0, // qsub3 |
| 35384 | 0, // ssub |
| 35385 | 0, // ssub_hi |
| 35386 | 0, // sub_32 |
| 35387 | 0, // sub_32_hi |
| 35388 | 0, // sube32 |
| 35389 | 0, // sube64 |
| 35390 | 0, // subo32 |
| 35391 | 0, // subo64 |
| 35392 | 0, // x8sub_0 |
| 35393 | 0, // x8sub_1 |
| 35394 | 0, // x8sub_2 |
| 35395 | 0, // x8sub_3 |
| 35396 | 0, // x8sub_4 |
| 35397 | 0, // x8sub_5 |
| 35398 | 0, // x8sub_6 |
| 35399 | 0, // x8sub_7 |
| 35400 | 0, // zasubb |
| 35401 | 0, // zasubd0 |
| 35402 | 0, // zasubd1 |
| 35403 | 0, // zasubh0 |
| 35404 | 0, // zasubh1 |
| 35405 | 0, // zasubq0 |
| 35406 | 0, // zasubq1 |
| 35407 | 0, // zasubs0 |
| 35408 | 0, // zasubs1 |
| 35409 | 0, // zsub |
| 35410 | 0, // zsub0 |
| 35411 | 0, // zsub1 |
| 35412 | 0, // zsub2 |
| 35413 | 0, // zsub3 |
| 35414 | 0, // zsub_hi |
| 35415 | 0, // zasubd1_then_zasubq0 |
| 35416 | 0, // zasubd1_then_zasubq1 |
| 35417 | 0, // zasubs1_then_zasubd0 |
| 35418 | 0, // zasubs1_then_zasubd1 |
| 35419 | 0, // zasubs1_then_zasubq0 |
| 35420 | 0, // zasubs1_then_zasubq1 |
| 35421 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35422 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35423 | 0, // zasubh1_then_zasubd0 |
| 35424 | 0, // zasubh1_then_zasubd1 |
| 35425 | 0, // zasubh1_then_zasubq0 |
| 35426 | 0, // zasubh1_then_zasubq1 |
| 35427 | 0, // zasubh1_then_zasubs0 |
| 35428 | 0, // zasubh1_then_zasubs1 |
| 35429 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35430 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35431 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35432 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35433 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35434 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35435 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35436 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35437 | 0, // dsub1_then_bsub |
| 35438 | 0, // dsub1_then_bsub_hi |
| 35439 | 0, // dsub1_then_hsub |
| 35440 | 0, // dsub1_then_hsub_hi |
| 35441 | 0, // dsub1_then_ssub |
| 35442 | 0, // dsub1_then_ssub_hi |
| 35443 | 0, // dsub3_then_bsub |
| 35444 | 0, // dsub3_then_bsub_hi |
| 35445 | 0, // dsub3_then_hsub |
| 35446 | 0, // dsub3_then_hsub_hi |
| 35447 | 0, // dsub3_then_ssub |
| 35448 | 0, // dsub3_then_ssub_hi |
| 35449 | 0, // dsub2_then_bsub |
| 35450 | 0, // dsub2_then_bsub_hi |
| 35451 | 0, // dsub2_then_hsub |
| 35452 | 0, // dsub2_then_hsub_hi |
| 35453 | 0, // dsub2_then_ssub |
| 35454 | 0, // dsub2_then_ssub_hi |
| 35455 | 27, // psub1_then_psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 35456 | 0, // qsub1_then_dsub_hi |
| 35457 | 0, // qsub3_then_dsub_hi |
| 35458 | 0, // qsub2_then_dsub_hi |
| 35459 | 0, // x8sub_7_then_sub_32 |
| 35460 | 0, // x8sub_7_then_sub_32_hi |
| 35461 | 0, // x8sub_6_then_sub_32 |
| 35462 | 0, // x8sub_6_then_sub_32_hi |
| 35463 | 0, // x8sub_5_then_sub_32 |
| 35464 | 0, // x8sub_5_then_sub_32_hi |
| 35465 | 0, // x8sub_4_then_sub_32 |
| 35466 | 0, // x8sub_4_then_sub_32_hi |
| 35467 | 0, // x8sub_3_then_sub_32 |
| 35468 | 0, // x8sub_3_then_sub_32_hi |
| 35469 | 0, // x8sub_2_then_sub_32 |
| 35470 | 0, // x8sub_2_then_sub_32_hi |
| 35471 | 0, // x8sub_1_then_sub_32 |
| 35472 | 0, // x8sub_1_then_sub_32_hi |
| 35473 | 0, // subo64_then_sub_32 |
| 35474 | 0, // subo64_then_sub_32_hi |
| 35475 | 0, // zsub1_then_zsub_hi |
| 35476 | 0, // zsub3_then_zsub_hi |
| 35477 | 0, // zsub2_then_zsub_hi |
| 35478 | 0, // dsub0_dsub1 |
| 35479 | 0, // dsub0_dsub1_dsub2 |
| 35480 | 0, // dsub1_dsub2 |
| 35481 | 0, // dsub1_dsub2_dsub3 |
| 35482 | 0, // dsub2_dsub3 |
| 35483 | 0, // dsub_dsub1 |
| 35484 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35485 | 0, // dsub_dsub1_dsub2 |
| 35486 | 0, // qsub0_qsub1 |
| 35487 | 0, // qsub0_qsub1_qsub2 |
| 35488 | 0, // qsub1_qsub2 |
| 35489 | 0, // qsub1_qsub2_qsub3 |
| 35490 | 0, // qsub2_qsub3 |
| 35491 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35492 | 0, // x8sub_0_x8sub_1 |
| 35493 | 0, // x8sub_2_x8sub_3 |
| 35494 | 0, // x8sub_4_x8sub_5 |
| 35495 | 0, // x8sub_6_x8sub_7 |
| 35496 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35497 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35498 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35499 | 0, // sub_32_subo64_then_sub_32 |
| 35500 | 0, // zsub_qsub1 |
| 35501 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35502 | 0, // zsub_qsub1_qsub2 |
| 35503 | 0, // zsub0_zsub1 |
| 35504 | 0, // zsub0_zsub1_zsub2 |
| 35505 | 0, // zsub1_zsub2 |
| 35506 | 0, // zsub1_zsub2_zsub3 |
| 35507 | 0, // zsub2_zsub3 |
| 35508 | 0, // zsub0_zsub2 |
| 35509 | 0, // zsub1_zsub3 |
| 35510 | }, |
| 35511 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 35512 | 0, // bsub |
| 35513 | 0, // bsub_hi |
| 35514 | 0, // dsub |
| 35515 | 0, // dsub0 |
| 35516 | 0, // dsub1 |
| 35517 | 0, // dsub2 |
| 35518 | 0, // dsub3 |
| 35519 | 0, // dsub_hi |
| 35520 | 0, // hsub |
| 35521 | 0, // hsub_hi |
| 35522 | 28, // psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 35523 | 28, // psub0 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 35524 | 28, // psub1 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 35525 | 0, // qsub0 |
| 35526 | 0, // qsub1 |
| 35527 | 0, // qsub2 |
| 35528 | 0, // qsub3 |
| 35529 | 0, // ssub |
| 35530 | 0, // ssub_hi |
| 35531 | 0, // sub_32 |
| 35532 | 0, // sub_32_hi |
| 35533 | 0, // sube32 |
| 35534 | 0, // sube64 |
| 35535 | 0, // subo32 |
| 35536 | 0, // subo64 |
| 35537 | 0, // x8sub_0 |
| 35538 | 0, // x8sub_1 |
| 35539 | 0, // x8sub_2 |
| 35540 | 0, // x8sub_3 |
| 35541 | 0, // x8sub_4 |
| 35542 | 0, // x8sub_5 |
| 35543 | 0, // x8sub_6 |
| 35544 | 0, // x8sub_7 |
| 35545 | 0, // zasubb |
| 35546 | 0, // zasubd0 |
| 35547 | 0, // zasubd1 |
| 35548 | 0, // zasubh0 |
| 35549 | 0, // zasubh1 |
| 35550 | 0, // zasubq0 |
| 35551 | 0, // zasubq1 |
| 35552 | 0, // zasubs0 |
| 35553 | 0, // zasubs1 |
| 35554 | 0, // zsub |
| 35555 | 0, // zsub0 |
| 35556 | 0, // zsub1 |
| 35557 | 0, // zsub2 |
| 35558 | 0, // zsub3 |
| 35559 | 0, // zsub_hi |
| 35560 | 0, // zasubd1_then_zasubq0 |
| 35561 | 0, // zasubd1_then_zasubq1 |
| 35562 | 0, // zasubs1_then_zasubd0 |
| 35563 | 0, // zasubs1_then_zasubd1 |
| 35564 | 0, // zasubs1_then_zasubq0 |
| 35565 | 0, // zasubs1_then_zasubq1 |
| 35566 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35567 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35568 | 0, // zasubh1_then_zasubd0 |
| 35569 | 0, // zasubh1_then_zasubd1 |
| 35570 | 0, // zasubh1_then_zasubq0 |
| 35571 | 0, // zasubh1_then_zasubq1 |
| 35572 | 0, // zasubh1_then_zasubs0 |
| 35573 | 0, // zasubh1_then_zasubs1 |
| 35574 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35575 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35576 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35577 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35578 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35579 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35580 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35581 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35582 | 0, // dsub1_then_bsub |
| 35583 | 0, // dsub1_then_bsub_hi |
| 35584 | 0, // dsub1_then_hsub |
| 35585 | 0, // dsub1_then_hsub_hi |
| 35586 | 0, // dsub1_then_ssub |
| 35587 | 0, // dsub1_then_ssub_hi |
| 35588 | 0, // dsub3_then_bsub |
| 35589 | 0, // dsub3_then_bsub_hi |
| 35590 | 0, // dsub3_then_hsub |
| 35591 | 0, // dsub3_then_hsub_hi |
| 35592 | 0, // dsub3_then_ssub |
| 35593 | 0, // dsub3_then_ssub_hi |
| 35594 | 0, // dsub2_then_bsub |
| 35595 | 0, // dsub2_then_bsub_hi |
| 35596 | 0, // dsub2_then_hsub |
| 35597 | 0, // dsub2_then_hsub_hi |
| 35598 | 0, // dsub2_then_ssub |
| 35599 | 0, // dsub2_then_ssub_hi |
| 35600 | 28, // psub1_then_psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 35601 | 0, // qsub1_then_dsub_hi |
| 35602 | 0, // qsub3_then_dsub_hi |
| 35603 | 0, // qsub2_then_dsub_hi |
| 35604 | 0, // x8sub_7_then_sub_32 |
| 35605 | 0, // x8sub_7_then_sub_32_hi |
| 35606 | 0, // x8sub_6_then_sub_32 |
| 35607 | 0, // x8sub_6_then_sub_32_hi |
| 35608 | 0, // x8sub_5_then_sub_32 |
| 35609 | 0, // x8sub_5_then_sub_32_hi |
| 35610 | 0, // x8sub_4_then_sub_32 |
| 35611 | 0, // x8sub_4_then_sub_32_hi |
| 35612 | 0, // x8sub_3_then_sub_32 |
| 35613 | 0, // x8sub_3_then_sub_32_hi |
| 35614 | 0, // x8sub_2_then_sub_32 |
| 35615 | 0, // x8sub_2_then_sub_32_hi |
| 35616 | 0, // x8sub_1_then_sub_32 |
| 35617 | 0, // x8sub_1_then_sub_32_hi |
| 35618 | 0, // subo64_then_sub_32 |
| 35619 | 0, // subo64_then_sub_32_hi |
| 35620 | 0, // zsub1_then_zsub_hi |
| 35621 | 0, // zsub3_then_zsub_hi |
| 35622 | 0, // zsub2_then_zsub_hi |
| 35623 | 0, // dsub0_dsub1 |
| 35624 | 0, // dsub0_dsub1_dsub2 |
| 35625 | 0, // dsub1_dsub2 |
| 35626 | 0, // dsub1_dsub2_dsub3 |
| 35627 | 0, // dsub2_dsub3 |
| 35628 | 0, // dsub_dsub1 |
| 35629 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35630 | 0, // dsub_dsub1_dsub2 |
| 35631 | 0, // qsub0_qsub1 |
| 35632 | 0, // qsub0_qsub1_qsub2 |
| 35633 | 0, // qsub1_qsub2 |
| 35634 | 0, // qsub1_qsub2_qsub3 |
| 35635 | 0, // qsub2_qsub3 |
| 35636 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35637 | 0, // x8sub_0_x8sub_1 |
| 35638 | 0, // x8sub_2_x8sub_3 |
| 35639 | 0, // x8sub_4_x8sub_5 |
| 35640 | 0, // x8sub_6_x8sub_7 |
| 35641 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35642 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35643 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35644 | 0, // sub_32_subo64_then_sub_32 |
| 35645 | 0, // zsub_qsub1 |
| 35646 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35647 | 0, // zsub_qsub1_qsub2 |
| 35648 | 0, // zsub0_zsub1 |
| 35649 | 0, // zsub0_zsub1_zsub2 |
| 35650 | 0, // zsub1_zsub2 |
| 35651 | 0, // zsub1_zsub2_zsub3 |
| 35652 | 0, // zsub2_zsub3 |
| 35653 | 0, // zsub0_zsub2 |
| 35654 | 0, // zsub1_zsub3 |
| 35655 | }, |
| 35656 | { // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 35657 | 0, // bsub |
| 35658 | 0, // bsub_hi |
| 35659 | 0, // dsub |
| 35660 | 0, // dsub0 |
| 35661 | 0, // dsub1 |
| 35662 | 0, // dsub2 |
| 35663 | 0, // dsub3 |
| 35664 | 0, // dsub_hi |
| 35665 | 0, // hsub |
| 35666 | 0, // hsub_hi |
| 35667 | 29, // psub -> PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 35668 | 29, // psub0 -> PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 35669 | 29, // psub1 -> PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 35670 | 0, // qsub0 |
| 35671 | 0, // qsub1 |
| 35672 | 0, // qsub2 |
| 35673 | 0, // qsub3 |
| 35674 | 0, // ssub |
| 35675 | 0, // ssub_hi |
| 35676 | 0, // sub_32 |
| 35677 | 0, // sub_32_hi |
| 35678 | 0, // sube32 |
| 35679 | 0, // sube64 |
| 35680 | 0, // subo32 |
| 35681 | 0, // subo64 |
| 35682 | 0, // x8sub_0 |
| 35683 | 0, // x8sub_1 |
| 35684 | 0, // x8sub_2 |
| 35685 | 0, // x8sub_3 |
| 35686 | 0, // x8sub_4 |
| 35687 | 0, // x8sub_5 |
| 35688 | 0, // x8sub_6 |
| 35689 | 0, // x8sub_7 |
| 35690 | 0, // zasubb |
| 35691 | 0, // zasubd0 |
| 35692 | 0, // zasubd1 |
| 35693 | 0, // zasubh0 |
| 35694 | 0, // zasubh1 |
| 35695 | 0, // zasubq0 |
| 35696 | 0, // zasubq1 |
| 35697 | 0, // zasubs0 |
| 35698 | 0, // zasubs1 |
| 35699 | 0, // zsub |
| 35700 | 0, // zsub0 |
| 35701 | 0, // zsub1 |
| 35702 | 0, // zsub2 |
| 35703 | 0, // zsub3 |
| 35704 | 0, // zsub_hi |
| 35705 | 0, // zasubd1_then_zasubq0 |
| 35706 | 0, // zasubd1_then_zasubq1 |
| 35707 | 0, // zasubs1_then_zasubd0 |
| 35708 | 0, // zasubs1_then_zasubd1 |
| 35709 | 0, // zasubs1_then_zasubq0 |
| 35710 | 0, // zasubs1_then_zasubq1 |
| 35711 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35712 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35713 | 0, // zasubh1_then_zasubd0 |
| 35714 | 0, // zasubh1_then_zasubd1 |
| 35715 | 0, // zasubh1_then_zasubq0 |
| 35716 | 0, // zasubh1_then_zasubq1 |
| 35717 | 0, // zasubh1_then_zasubs0 |
| 35718 | 0, // zasubh1_then_zasubs1 |
| 35719 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35720 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35721 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35722 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35723 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35724 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35725 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35726 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35727 | 0, // dsub1_then_bsub |
| 35728 | 0, // dsub1_then_bsub_hi |
| 35729 | 0, // dsub1_then_hsub |
| 35730 | 0, // dsub1_then_hsub_hi |
| 35731 | 0, // dsub1_then_ssub |
| 35732 | 0, // dsub1_then_ssub_hi |
| 35733 | 0, // dsub3_then_bsub |
| 35734 | 0, // dsub3_then_bsub_hi |
| 35735 | 0, // dsub3_then_hsub |
| 35736 | 0, // dsub3_then_hsub_hi |
| 35737 | 0, // dsub3_then_ssub |
| 35738 | 0, // dsub3_then_ssub_hi |
| 35739 | 0, // dsub2_then_bsub |
| 35740 | 0, // dsub2_then_bsub_hi |
| 35741 | 0, // dsub2_then_hsub |
| 35742 | 0, // dsub2_then_hsub_hi |
| 35743 | 0, // dsub2_then_ssub |
| 35744 | 0, // dsub2_then_ssub_hi |
| 35745 | 29, // psub1_then_psub -> PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 35746 | 0, // qsub1_then_dsub_hi |
| 35747 | 0, // qsub3_then_dsub_hi |
| 35748 | 0, // qsub2_then_dsub_hi |
| 35749 | 0, // x8sub_7_then_sub_32 |
| 35750 | 0, // x8sub_7_then_sub_32_hi |
| 35751 | 0, // x8sub_6_then_sub_32 |
| 35752 | 0, // x8sub_6_then_sub_32_hi |
| 35753 | 0, // x8sub_5_then_sub_32 |
| 35754 | 0, // x8sub_5_then_sub_32_hi |
| 35755 | 0, // x8sub_4_then_sub_32 |
| 35756 | 0, // x8sub_4_then_sub_32_hi |
| 35757 | 0, // x8sub_3_then_sub_32 |
| 35758 | 0, // x8sub_3_then_sub_32_hi |
| 35759 | 0, // x8sub_2_then_sub_32 |
| 35760 | 0, // x8sub_2_then_sub_32_hi |
| 35761 | 0, // x8sub_1_then_sub_32 |
| 35762 | 0, // x8sub_1_then_sub_32_hi |
| 35763 | 0, // subo64_then_sub_32 |
| 35764 | 0, // subo64_then_sub_32_hi |
| 35765 | 0, // zsub1_then_zsub_hi |
| 35766 | 0, // zsub3_then_zsub_hi |
| 35767 | 0, // zsub2_then_zsub_hi |
| 35768 | 0, // dsub0_dsub1 |
| 35769 | 0, // dsub0_dsub1_dsub2 |
| 35770 | 0, // dsub1_dsub2 |
| 35771 | 0, // dsub1_dsub2_dsub3 |
| 35772 | 0, // dsub2_dsub3 |
| 35773 | 0, // dsub_dsub1 |
| 35774 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35775 | 0, // dsub_dsub1_dsub2 |
| 35776 | 0, // qsub0_qsub1 |
| 35777 | 0, // qsub0_qsub1_qsub2 |
| 35778 | 0, // qsub1_qsub2 |
| 35779 | 0, // qsub1_qsub2_qsub3 |
| 35780 | 0, // qsub2_qsub3 |
| 35781 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35782 | 0, // x8sub_0_x8sub_1 |
| 35783 | 0, // x8sub_2_x8sub_3 |
| 35784 | 0, // x8sub_4_x8sub_5 |
| 35785 | 0, // x8sub_6_x8sub_7 |
| 35786 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35787 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35788 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35789 | 0, // sub_32_subo64_then_sub_32 |
| 35790 | 0, // zsub_qsub1 |
| 35791 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35792 | 0, // zsub_qsub1_qsub2 |
| 35793 | 0, // zsub0_zsub1 |
| 35794 | 0, // zsub0_zsub1_zsub2 |
| 35795 | 0, // zsub1_zsub2 |
| 35796 | 0, // zsub1_zsub2_zsub3 |
| 35797 | 0, // zsub2_zsub3 |
| 35798 | 0, // zsub0_zsub2 |
| 35799 | 0, // zsub1_zsub3 |
| 35800 | }, |
| 35801 | { // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 35802 | 0, // bsub |
| 35803 | 0, // bsub_hi |
| 35804 | 0, // dsub |
| 35805 | 0, // dsub0 |
| 35806 | 0, // dsub1 |
| 35807 | 0, // dsub2 |
| 35808 | 0, // dsub3 |
| 35809 | 0, // dsub_hi |
| 35810 | 0, // hsub |
| 35811 | 0, // hsub_hi |
| 35812 | 30, // psub -> PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 35813 | 30, // psub0 -> PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 35814 | 30, // psub1 -> PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 35815 | 0, // qsub0 |
| 35816 | 0, // qsub1 |
| 35817 | 0, // qsub2 |
| 35818 | 0, // qsub3 |
| 35819 | 0, // ssub |
| 35820 | 0, // ssub_hi |
| 35821 | 0, // sub_32 |
| 35822 | 0, // sub_32_hi |
| 35823 | 0, // sube32 |
| 35824 | 0, // sube64 |
| 35825 | 0, // subo32 |
| 35826 | 0, // subo64 |
| 35827 | 0, // x8sub_0 |
| 35828 | 0, // x8sub_1 |
| 35829 | 0, // x8sub_2 |
| 35830 | 0, // x8sub_3 |
| 35831 | 0, // x8sub_4 |
| 35832 | 0, // x8sub_5 |
| 35833 | 0, // x8sub_6 |
| 35834 | 0, // x8sub_7 |
| 35835 | 0, // zasubb |
| 35836 | 0, // zasubd0 |
| 35837 | 0, // zasubd1 |
| 35838 | 0, // zasubh0 |
| 35839 | 0, // zasubh1 |
| 35840 | 0, // zasubq0 |
| 35841 | 0, // zasubq1 |
| 35842 | 0, // zasubs0 |
| 35843 | 0, // zasubs1 |
| 35844 | 0, // zsub |
| 35845 | 0, // zsub0 |
| 35846 | 0, // zsub1 |
| 35847 | 0, // zsub2 |
| 35848 | 0, // zsub3 |
| 35849 | 0, // zsub_hi |
| 35850 | 0, // zasubd1_then_zasubq0 |
| 35851 | 0, // zasubd1_then_zasubq1 |
| 35852 | 0, // zasubs1_then_zasubd0 |
| 35853 | 0, // zasubs1_then_zasubd1 |
| 35854 | 0, // zasubs1_then_zasubq0 |
| 35855 | 0, // zasubs1_then_zasubq1 |
| 35856 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 35857 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 35858 | 0, // zasubh1_then_zasubd0 |
| 35859 | 0, // zasubh1_then_zasubd1 |
| 35860 | 0, // zasubh1_then_zasubq0 |
| 35861 | 0, // zasubh1_then_zasubq1 |
| 35862 | 0, // zasubh1_then_zasubs0 |
| 35863 | 0, // zasubh1_then_zasubs1 |
| 35864 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 35865 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 35866 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 35867 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 35868 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 35869 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 35870 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 35871 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 35872 | 0, // dsub1_then_bsub |
| 35873 | 0, // dsub1_then_bsub_hi |
| 35874 | 0, // dsub1_then_hsub |
| 35875 | 0, // dsub1_then_hsub_hi |
| 35876 | 0, // dsub1_then_ssub |
| 35877 | 0, // dsub1_then_ssub_hi |
| 35878 | 0, // dsub3_then_bsub |
| 35879 | 0, // dsub3_then_bsub_hi |
| 35880 | 0, // dsub3_then_hsub |
| 35881 | 0, // dsub3_then_hsub_hi |
| 35882 | 0, // dsub3_then_ssub |
| 35883 | 0, // dsub3_then_ssub_hi |
| 35884 | 0, // dsub2_then_bsub |
| 35885 | 0, // dsub2_then_bsub_hi |
| 35886 | 0, // dsub2_then_hsub |
| 35887 | 0, // dsub2_then_hsub_hi |
| 35888 | 0, // dsub2_then_ssub |
| 35889 | 0, // dsub2_then_ssub_hi |
| 35890 | 30, // psub1_then_psub -> PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 35891 | 0, // qsub1_then_dsub_hi |
| 35892 | 0, // qsub3_then_dsub_hi |
| 35893 | 0, // qsub2_then_dsub_hi |
| 35894 | 0, // x8sub_7_then_sub_32 |
| 35895 | 0, // x8sub_7_then_sub_32_hi |
| 35896 | 0, // x8sub_6_then_sub_32 |
| 35897 | 0, // x8sub_6_then_sub_32_hi |
| 35898 | 0, // x8sub_5_then_sub_32 |
| 35899 | 0, // x8sub_5_then_sub_32_hi |
| 35900 | 0, // x8sub_4_then_sub_32 |
| 35901 | 0, // x8sub_4_then_sub_32_hi |
| 35902 | 0, // x8sub_3_then_sub_32 |
| 35903 | 0, // x8sub_3_then_sub_32_hi |
| 35904 | 0, // x8sub_2_then_sub_32 |
| 35905 | 0, // x8sub_2_then_sub_32_hi |
| 35906 | 0, // x8sub_1_then_sub_32 |
| 35907 | 0, // x8sub_1_then_sub_32_hi |
| 35908 | 0, // subo64_then_sub_32 |
| 35909 | 0, // subo64_then_sub_32_hi |
| 35910 | 0, // zsub1_then_zsub_hi |
| 35911 | 0, // zsub3_then_zsub_hi |
| 35912 | 0, // zsub2_then_zsub_hi |
| 35913 | 0, // dsub0_dsub1 |
| 35914 | 0, // dsub0_dsub1_dsub2 |
| 35915 | 0, // dsub1_dsub2 |
| 35916 | 0, // dsub1_dsub2_dsub3 |
| 35917 | 0, // dsub2_dsub3 |
| 35918 | 0, // dsub_dsub1 |
| 35919 | 0, // dsub_dsub1_dsub2_dsub3 |
| 35920 | 0, // dsub_dsub1_dsub2 |
| 35921 | 0, // qsub0_qsub1 |
| 35922 | 0, // qsub0_qsub1_qsub2 |
| 35923 | 0, // qsub1_qsub2 |
| 35924 | 0, // qsub1_qsub2_qsub3 |
| 35925 | 0, // qsub2_qsub3 |
| 35926 | 0, // sub_32_x8sub_1_then_sub_32 |
| 35927 | 0, // x8sub_0_x8sub_1 |
| 35928 | 0, // x8sub_2_x8sub_3 |
| 35929 | 0, // x8sub_4_x8sub_5 |
| 35930 | 0, // x8sub_6_x8sub_7 |
| 35931 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 35932 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 35933 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 35934 | 0, // sub_32_subo64_then_sub_32 |
| 35935 | 0, // zsub_qsub1 |
| 35936 | 0, // zsub_qsub1_qsub2_qsub3 |
| 35937 | 0, // zsub_qsub1_qsub2 |
| 35938 | 0, // zsub0_zsub1 |
| 35939 | 0, // zsub0_zsub1_zsub2 |
| 35940 | 0, // zsub1_zsub2 |
| 35941 | 0, // zsub1_zsub2_zsub3 |
| 35942 | 0, // zsub2_zsub3 |
| 35943 | 0, // zsub0_zsub2 |
| 35944 | 0, // zsub1_zsub3 |
| 35945 | }, |
| 35946 | { // PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 35947 | 0, // bsub |
| 35948 | 0, // bsub_hi |
| 35949 | 0, // dsub |
| 35950 | 0, // dsub0 |
| 35951 | 0, // dsub1 |
| 35952 | 0, // dsub2 |
| 35953 | 0, // dsub3 |
| 35954 | 0, // dsub_hi |
| 35955 | 0, // hsub |
| 35956 | 0, // hsub_hi |
| 35957 | 31, // psub -> PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 35958 | 31, // psub0 -> PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 35959 | 31, // psub1 -> PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 35960 | 0, // qsub0 |
| 35961 | 0, // qsub1 |
| 35962 | 0, // qsub2 |
| 35963 | 0, // qsub3 |
| 35964 | 0, // ssub |
| 35965 | 0, // ssub_hi |
| 35966 | 0, // sub_32 |
| 35967 | 0, // sub_32_hi |
| 35968 | 0, // sube32 |
| 35969 | 0, // sube64 |
| 35970 | 0, // subo32 |
| 35971 | 0, // subo64 |
| 35972 | 0, // x8sub_0 |
| 35973 | 0, // x8sub_1 |
| 35974 | 0, // x8sub_2 |
| 35975 | 0, // x8sub_3 |
| 35976 | 0, // x8sub_4 |
| 35977 | 0, // x8sub_5 |
| 35978 | 0, // x8sub_6 |
| 35979 | 0, // x8sub_7 |
| 35980 | 0, // zasubb |
| 35981 | 0, // zasubd0 |
| 35982 | 0, // zasubd1 |
| 35983 | 0, // zasubh0 |
| 35984 | 0, // zasubh1 |
| 35985 | 0, // zasubq0 |
| 35986 | 0, // zasubq1 |
| 35987 | 0, // zasubs0 |
| 35988 | 0, // zasubs1 |
| 35989 | 0, // zsub |
| 35990 | 0, // zsub0 |
| 35991 | 0, // zsub1 |
| 35992 | 0, // zsub2 |
| 35993 | 0, // zsub3 |
| 35994 | 0, // zsub_hi |
| 35995 | 0, // zasubd1_then_zasubq0 |
| 35996 | 0, // zasubd1_then_zasubq1 |
| 35997 | 0, // zasubs1_then_zasubd0 |
| 35998 | 0, // zasubs1_then_zasubd1 |
| 35999 | 0, // zasubs1_then_zasubq0 |
| 36000 | 0, // zasubs1_then_zasubq1 |
| 36001 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36002 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36003 | 0, // zasubh1_then_zasubd0 |
| 36004 | 0, // zasubh1_then_zasubd1 |
| 36005 | 0, // zasubh1_then_zasubq0 |
| 36006 | 0, // zasubh1_then_zasubq1 |
| 36007 | 0, // zasubh1_then_zasubs0 |
| 36008 | 0, // zasubh1_then_zasubs1 |
| 36009 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36010 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36011 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36012 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36013 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36014 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36015 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36016 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36017 | 0, // dsub1_then_bsub |
| 36018 | 0, // dsub1_then_bsub_hi |
| 36019 | 0, // dsub1_then_hsub |
| 36020 | 0, // dsub1_then_hsub_hi |
| 36021 | 0, // dsub1_then_ssub |
| 36022 | 0, // dsub1_then_ssub_hi |
| 36023 | 0, // dsub3_then_bsub |
| 36024 | 0, // dsub3_then_bsub_hi |
| 36025 | 0, // dsub3_then_hsub |
| 36026 | 0, // dsub3_then_hsub_hi |
| 36027 | 0, // dsub3_then_ssub |
| 36028 | 0, // dsub3_then_ssub_hi |
| 36029 | 0, // dsub2_then_bsub |
| 36030 | 0, // dsub2_then_bsub_hi |
| 36031 | 0, // dsub2_then_hsub |
| 36032 | 0, // dsub2_then_hsub_hi |
| 36033 | 0, // dsub2_then_ssub |
| 36034 | 0, // dsub2_then_ssub_hi |
| 36035 | 31, // psub1_then_psub -> PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36036 | 0, // qsub1_then_dsub_hi |
| 36037 | 0, // qsub3_then_dsub_hi |
| 36038 | 0, // qsub2_then_dsub_hi |
| 36039 | 0, // x8sub_7_then_sub_32 |
| 36040 | 0, // x8sub_7_then_sub_32_hi |
| 36041 | 0, // x8sub_6_then_sub_32 |
| 36042 | 0, // x8sub_6_then_sub_32_hi |
| 36043 | 0, // x8sub_5_then_sub_32 |
| 36044 | 0, // x8sub_5_then_sub_32_hi |
| 36045 | 0, // x8sub_4_then_sub_32 |
| 36046 | 0, // x8sub_4_then_sub_32_hi |
| 36047 | 0, // x8sub_3_then_sub_32 |
| 36048 | 0, // x8sub_3_then_sub_32_hi |
| 36049 | 0, // x8sub_2_then_sub_32 |
| 36050 | 0, // x8sub_2_then_sub_32_hi |
| 36051 | 0, // x8sub_1_then_sub_32 |
| 36052 | 0, // x8sub_1_then_sub_32_hi |
| 36053 | 0, // subo64_then_sub_32 |
| 36054 | 0, // subo64_then_sub_32_hi |
| 36055 | 0, // zsub1_then_zsub_hi |
| 36056 | 0, // zsub3_then_zsub_hi |
| 36057 | 0, // zsub2_then_zsub_hi |
| 36058 | 0, // dsub0_dsub1 |
| 36059 | 0, // dsub0_dsub1_dsub2 |
| 36060 | 0, // dsub1_dsub2 |
| 36061 | 0, // dsub1_dsub2_dsub3 |
| 36062 | 0, // dsub2_dsub3 |
| 36063 | 0, // dsub_dsub1 |
| 36064 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36065 | 0, // dsub_dsub1_dsub2 |
| 36066 | 0, // qsub0_qsub1 |
| 36067 | 0, // qsub0_qsub1_qsub2 |
| 36068 | 0, // qsub1_qsub2 |
| 36069 | 0, // qsub1_qsub2_qsub3 |
| 36070 | 0, // qsub2_qsub3 |
| 36071 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36072 | 0, // x8sub_0_x8sub_1 |
| 36073 | 0, // x8sub_2_x8sub_3 |
| 36074 | 0, // x8sub_4_x8sub_5 |
| 36075 | 0, // x8sub_6_x8sub_7 |
| 36076 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36077 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36078 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36079 | 0, // sub_32_subo64_then_sub_32 |
| 36080 | 0, // zsub_qsub1 |
| 36081 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36082 | 0, // zsub_qsub1_qsub2 |
| 36083 | 0, // zsub0_zsub1 |
| 36084 | 0, // zsub0_zsub1_zsub2 |
| 36085 | 0, // zsub1_zsub2 |
| 36086 | 0, // zsub1_zsub2_zsub3 |
| 36087 | 0, // zsub2_zsub3 |
| 36088 | 0, // zsub0_zsub2 |
| 36089 | 0, // zsub1_zsub3 |
| 36090 | }, |
| 36091 | { // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36092 | 0, // bsub |
| 36093 | 0, // bsub_hi |
| 36094 | 0, // dsub |
| 36095 | 0, // dsub0 |
| 36096 | 0, // dsub1 |
| 36097 | 0, // dsub2 |
| 36098 | 0, // dsub3 |
| 36099 | 0, // dsub_hi |
| 36100 | 0, // hsub |
| 36101 | 0, // hsub_hi |
| 36102 | 32, // psub -> PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36103 | 32, // psub0 -> PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36104 | 32, // psub1 -> PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36105 | 0, // qsub0 |
| 36106 | 0, // qsub1 |
| 36107 | 0, // qsub2 |
| 36108 | 0, // qsub3 |
| 36109 | 0, // ssub |
| 36110 | 0, // ssub_hi |
| 36111 | 0, // sub_32 |
| 36112 | 0, // sub_32_hi |
| 36113 | 0, // sube32 |
| 36114 | 0, // sube64 |
| 36115 | 0, // subo32 |
| 36116 | 0, // subo64 |
| 36117 | 0, // x8sub_0 |
| 36118 | 0, // x8sub_1 |
| 36119 | 0, // x8sub_2 |
| 36120 | 0, // x8sub_3 |
| 36121 | 0, // x8sub_4 |
| 36122 | 0, // x8sub_5 |
| 36123 | 0, // x8sub_6 |
| 36124 | 0, // x8sub_7 |
| 36125 | 0, // zasubb |
| 36126 | 0, // zasubd0 |
| 36127 | 0, // zasubd1 |
| 36128 | 0, // zasubh0 |
| 36129 | 0, // zasubh1 |
| 36130 | 0, // zasubq0 |
| 36131 | 0, // zasubq1 |
| 36132 | 0, // zasubs0 |
| 36133 | 0, // zasubs1 |
| 36134 | 0, // zsub |
| 36135 | 0, // zsub0 |
| 36136 | 0, // zsub1 |
| 36137 | 0, // zsub2 |
| 36138 | 0, // zsub3 |
| 36139 | 0, // zsub_hi |
| 36140 | 0, // zasubd1_then_zasubq0 |
| 36141 | 0, // zasubd1_then_zasubq1 |
| 36142 | 0, // zasubs1_then_zasubd0 |
| 36143 | 0, // zasubs1_then_zasubd1 |
| 36144 | 0, // zasubs1_then_zasubq0 |
| 36145 | 0, // zasubs1_then_zasubq1 |
| 36146 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36147 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36148 | 0, // zasubh1_then_zasubd0 |
| 36149 | 0, // zasubh1_then_zasubd1 |
| 36150 | 0, // zasubh1_then_zasubq0 |
| 36151 | 0, // zasubh1_then_zasubq1 |
| 36152 | 0, // zasubh1_then_zasubs0 |
| 36153 | 0, // zasubh1_then_zasubs1 |
| 36154 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36155 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36156 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36157 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36158 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36159 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36160 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36161 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36162 | 0, // dsub1_then_bsub |
| 36163 | 0, // dsub1_then_bsub_hi |
| 36164 | 0, // dsub1_then_hsub |
| 36165 | 0, // dsub1_then_hsub_hi |
| 36166 | 0, // dsub1_then_ssub |
| 36167 | 0, // dsub1_then_ssub_hi |
| 36168 | 0, // dsub3_then_bsub |
| 36169 | 0, // dsub3_then_bsub_hi |
| 36170 | 0, // dsub3_then_hsub |
| 36171 | 0, // dsub3_then_hsub_hi |
| 36172 | 0, // dsub3_then_ssub |
| 36173 | 0, // dsub3_then_ssub_hi |
| 36174 | 0, // dsub2_then_bsub |
| 36175 | 0, // dsub2_then_bsub_hi |
| 36176 | 0, // dsub2_then_hsub |
| 36177 | 0, // dsub2_then_hsub_hi |
| 36178 | 0, // dsub2_then_ssub |
| 36179 | 0, // dsub2_then_ssub_hi |
| 36180 | 32, // psub1_then_psub -> PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36181 | 0, // qsub1_then_dsub_hi |
| 36182 | 0, // qsub3_then_dsub_hi |
| 36183 | 0, // qsub2_then_dsub_hi |
| 36184 | 0, // x8sub_7_then_sub_32 |
| 36185 | 0, // x8sub_7_then_sub_32_hi |
| 36186 | 0, // x8sub_6_then_sub_32 |
| 36187 | 0, // x8sub_6_then_sub_32_hi |
| 36188 | 0, // x8sub_5_then_sub_32 |
| 36189 | 0, // x8sub_5_then_sub_32_hi |
| 36190 | 0, // x8sub_4_then_sub_32 |
| 36191 | 0, // x8sub_4_then_sub_32_hi |
| 36192 | 0, // x8sub_3_then_sub_32 |
| 36193 | 0, // x8sub_3_then_sub_32_hi |
| 36194 | 0, // x8sub_2_then_sub_32 |
| 36195 | 0, // x8sub_2_then_sub_32_hi |
| 36196 | 0, // x8sub_1_then_sub_32 |
| 36197 | 0, // x8sub_1_then_sub_32_hi |
| 36198 | 0, // subo64_then_sub_32 |
| 36199 | 0, // subo64_then_sub_32_hi |
| 36200 | 0, // zsub1_then_zsub_hi |
| 36201 | 0, // zsub3_then_zsub_hi |
| 36202 | 0, // zsub2_then_zsub_hi |
| 36203 | 0, // dsub0_dsub1 |
| 36204 | 0, // dsub0_dsub1_dsub2 |
| 36205 | 0, // dsub1_dsub2 |
| 36206 | 0, // dsub1_dsub2_dsub3 |
| 36207 | 0, // dsub2_dsub3 |
| 36208 | 0, // dsub_dsub1 |
| 36209 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36210 | 0, // dsub_dsub1_dsub2 |
| 36211 | 0, // qsub0_qsub1 |
| 36212 | 0, // qsub0_qsub1_qsub2 |
| 36213 | 0, // qsub1_qsub2 |
| 36214 | 0, // qsub1_qsub2_qsub3 |
| 36215 | 0, // qsub2_qsub3 |
| 36216 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36217 | 0, // x8sub_0_x8sub_1 |
| 36218 | 0, // x8sub_2_x8sub_3 |
| 36219 | 0, // x8sub_4_x8sub_5 |
| 36220 | 0, // x8sub_6_x8sub_7 |
| 36221 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36222 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36223 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36224 | 0, // sub_32_subo64_then_sub_32 |
| 36225 | 0, // zsub_qsub1 |
| 36226 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36227 | 0, // zsub_qsub1_qsub2 |
| 36228 | 0, // zsub0_zsub1 |
| 36229 | 0, // zsub0_zsub1_zsub2 |
| 36230 | 0, // zsub1_zsub2 |
| 36231 | 0, // zsub1_zsub2_zsub3 |
| 36232 | 0, // zsub2_zsub3 |
| 36233 | 0, // zsub0_zsub2 |
| 36234 | 0, // zsub1_zsub3 |
| 36235 | }, |
| 36236 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 36237 | 0, // bsub |
| 36238 | 0, // bsub_hi |
| 36239 | 0, // dsub |
| 36240 | 0, // dsub0 |
| 36241 | 0, // dsub1 |
| 36242 | 0, // dsub2 |
| 36243 | 0, // dsub3 |
| 36244 | 0, // dsub_hi |
| 36245 | 0, // hsub |
| 36246 | 0, // hsub_hi |
| 36247 | 33, // psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 36248 | 33, // psub0 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 36249 | 33, // psub1 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 36250 | 0, // qsub0 |
| 36251 | 0, // qsub1 |
| 36252 | 0, // qsub2 |
| 36253 | 0, // qsub3 |
| 36254 | 0, // ssub |
| 36255 | 0, // ssub_hi |
| 36256 | 0, // sub_32 |
| 36257 | 0, // sub_32_hi |
| 36258 | 0, // sube32 |
| 36259 | 0, // sube64 |
| 36260 | 0, // subo32 |
| 36261 | 0, // subo64 |
| 36262 | 0, // x8sub_0 |
| 36263 | 0, // x8sub_1 |
| 36264 | 0, // x8sub_2 |
| 36265 | 0, // x8sub_3 |
| 36266 | 0, // x8sub_4 |
| 36267 | 0, // x8sub_5 |
| 36268 | 0, // x8sub_6 |
| 36269 | 0, // x8sub_7 |
| 36270 | 0, // zasubb |
| 36271 | 0, // zasubd0 |
| 36272 | 0, // zasubd1 |
| 36273 | 0, // zasubh0 |
| 36274 | 0, // zasubh1 |
| 36275 | 0, // zasubq0 |
| 36276 | 0, // zasubq1 |
| 36277 | 0, // zasubs0 |
| 36278 | 0, // zasubs1 |
| 36279 | 0, // zsub |
| 36280 | 0, // zsub0 |
| 36281 | 0, // zsub1 |
| 36282 | 0, // zsub2 |
| 36283 | 0, // zsub3 |
| 36284 | 0, // zsub_hi |
| 36285 | 0, // zasubd1_then_zasubq0 |
| 36286 | 0, // zasubd1_then_zasubq1 |
| 36287 | 0, // zasubs1_then_zasubd0 |
| 36288 | 0, // zasubs1_then_zasubd1 |
| 36289 | 0, // zasubs1_then_zasubq0 |
| 36290 | 0, // zasubs1_then_zasubq1 |
| 36291 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36292 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36293 | 0, // zasubh1_then_zasubd0 |
| 36294 | 0, // zasubh1_then_zasubd1 |
| 36295 | 0, // zasubh1_then_zasubq0 |
| 36296 | 0, // zasubh1_then_zasubq1 |
| 36297 | 0, // zasubh1_then_zasubs0 |
| 36298 | 0, // zasubh1_then_zasubs1 |
| 36299 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36300 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36301 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36302 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36303 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36304 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36305 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36306 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36307 | 0, // dsub1_then_bsub |
| 36308 | 0, // dsub1_then_bsub_hi |
| 36309 | 0, // dsub1_then_hsub |
| 36310 | 0, // dsub1_then_hsub_hi |
| 36311 | 0, // dsub1_then_ssub |
| 36312 | 0, // dsub1_then_ssub_hi |
| 36313 | 0, // dsub3_then_bsub |
| 36314 | 0, // dsub3_then_bsub_hi |
| 36315 | 0, // dsub3_then_hsub |
| 36316 | 0, // dsub3_then_hsub_hi |
| 36317 | 0, // dsub3_then_ssub |
| 36318 | 0, // dsub3_then_ssub_hi |
| 36319 | 0, // dsub2_then_bsub |
| 36320 | 0, // dsub2_then_bsub_hi |
| 36321 | 0, // dsub2_then_hsub |
| 36322 | 0, // dsub2_then_hsub_hi |
| 36323 | 0, // dsub2_then_ssub |
| 36324 | 0, // dsub2_then_ssub_hi |
| 36325 | 33, // psub1_then_psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 36326 | 0, // qsub1_then_dsub_hi |
| 36327 | 0, // qsub3_then_dsub_hi |
| 36328 | 0, // qsub2_then_dsub_hi |
| 36329 | 0, // x8sub_7_then_sub_32 |
| 36330 | 0, // x8sub_7_then_sub_32_hi |
| 36331 | 0, // x8sub_6_then_sub_32 |
| 36332 | 0, // x8sub_6_then_sub_32_hi |
| 36333 | 0, // x8sub_5_then_sub_32 |
| 36334 | 0, // x8sub_5_then_sub_32_hi |
| 36335 | 0, // x8sub_4_then_sub_32 |
| 36336 | 0, // x8sub_4_then_sub_32_hi |
| 36337 | 0, // x8sub_3_then_sub_32 |
| 36338 | 0, // x8sub_3_then_sub_32_hi |
| 36339 | 0, // x8sub_2_then_sub_32 |
| 36340 | 0, // x8sub_2_then_sub_32_hi |
| 36341 | 0, // x8sub_1_then_sub_32 |
| 36342 | 0, // x8sub_1_then_sub_32_hi |
| 36343 | 0, // subo64_then_sub_32 |
| 36344 | 0, // subo64_then_sub_32_hi |
| 36345 | 0, // zsub1_then_zsub_hi |
| 36346 | 0, // zsub3_then_zsub_hi |
| 36347 | 0, // zsub2_then_zsub_hi |
| 36348 | 0, // dsub0_dsub1 |
| 36349 | 0, // dsub0_dsub1_dsub2 |
| 36350 | 0, // dsub1_dsub2 |
| 36351 | 0, // dsub1_dsub2_dsub3 |
| 36352 | 0, // dsub2_dsub3 |
| 36353 | 0, // dsub_dsub1 |
| 36354 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36355 | 0, // dsub_dsub1_dsub2 |
| 36356 | 0, // qsub0_qsub1 |
| 36357 | 0, // qsub0_qsub1_qsub2 |
| 36358 | 0, // qsub1_qsub2 |
| 36359 | 0, // qsub1_qsub2_qsub3 |
| 36360 | 0, // qsub2_qsub3 |
| 36361 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36362 | 0, // x8sub_0_x8sub_1 |
| 36363 | 0, // x8sub_2_x8sub_3 |
| 36364 | 0, // x8sub_4_x8sub_5 |
| 36365 | 0, // x8sub_6_x8sub_7 |
| 36366 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36367 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36368 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36369 | 0, // sub_32_subo64_then_sub_32 |
| 36370 | 0, // zsub_qsub1 |
| 36371 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36372 | 0, // zsub_qsub1_qsub2 |
| 36373 | 0, // zsub0_zsub1 |
| 36374 | 0, // zsub0_zsub1_zsub2 |
| 36375 | 0, // zsub1_zsub2 |
| 36376 | 0, // zsub1_zsub2_zsub3 |
| 36377 | 0, // zsub2_zsub3 |
| 36378 | 0, // zsub0_zsub2 |
| 36379 | 0, // zsub1_zsub3 |
| 36380 | }, |
| 36381 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 36382 | 0, // bsub |
| 36383 | 0, // bsub_hi |
| 36384 | 0, // dsub |
| 36385 | 0, // dsub0 |
| 36386 | 0, // dsub1 |
| 36387 | 0, // dsub2 |
| 36388 | 0, // dsub3 |
| 36389 | 0, // dsub_hi |
| 36390 | 0, // hsub |
| 36391 | 0, // hsub_hi |
| 36392 | 34, // psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 36393 | 34, // psub0 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 36394 | 34, // psub1 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 36395 | 0, // qsub0 |
| 36396 | 0, // qsub1 |
| 36397 | 0, // qsub2 |
| 36398 | 0, // qsub3 |
| 36399 | 0, // ssub |
| 36400 | 0, // ssub_hi |
| 36401 | 0, // sub_32 |
| 36402 | 0, // sub_32_hi |
| 36403 | 0, // sube32 |
| 36404 | 0, // sube64 |
| 36405 | 0, // subo32 |
| 36406 | 0, // subo64 |
| 36407 | 0, // x8sub_0 |
| 36408 | 0, // x8sub_1 |
| 36409 | 0, // x8sub_2 |
| 36410 | 0, // x8sub_3 |
| 36411 | 0, // x8sub_4 |
| 36412 | 0, // x8sub_5 |
| 36413 | 0, // x8sub_6 |
| 36414 | 0, // x8sub_7 |
| 36415 | 0, // zasubb |
| 36416 | 0, // zasubd0 |
| 36417 | 0, // zasubd1 |
| 36418 | 0, // zasubh0 |
| 36419 | 0, // zasubh1 |
| 36420 | 0, // zasubq0 |
| 36421 | 0, // zasubq1 |
| 36422 | 0, // zasubs0 |
| 36423 | 0, // zasubs1 |
| 36424 | 0, // zsub |
| 36425 | 0, // zsub0 |
| 36426 | 0, // zsub1 |
| 36427 | 0, // zsub2 |
| 36428 | 0, // zsub3 |
| 36429 | 0, // zsub_hi |
| 36430 | 0, // zasubd1_then_zasubq0 |
| 36431 | 0, // zasubd1_then_zasubq1 |
| 36432 | 0, // zasubs1_then_zasubd0 |
| 36433 | 0, // zasubs1_then_zasubd1 |
| 36434 | 0, // zasubs1_then_zasubq0 |
| 36435 | 0, // zasubs1_then_zasubq1 |
| 36436 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36437 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36438 | 0, // zasubh1_then_zasubd0 |
| 36439 | 0, // zasubh1_then_zasubd1 |
| 36440 | 0, // zasubh1_then_zasubq0 |
| 36441 | 0, // zasubh1_then_zasubq1 |
| 36442 | 0, // zasubh1_then_zasubs0 |
| 36443 | 0, // zasubh1_then_zasubs1 |
| 36444 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36445 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36446 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36447 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36448 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36449 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36450 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36451 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36452 | 0, // dsub1_then_bsub |
| 36453 | 0, // dsub1_then_bsub_hi |
| 36454 | 0, // dsub1_then_hsub |
| 36455 | 0, // dsub1_then_hsub_hi |
| 36456 | 0, // dsub1_then_ssub |
| 36457 | 0, // dsub1_then_ssub_hi |
| 36458 | 0, // dsub3_then_bsub |
| 36459 | 0, // dsub3_then_bsub_hi |
| 36460 | 0, // dsub3_then_hsub |
| 36461 | 0, // dsub3_then_hsub_hi |
| 36462 | 0, // dsub3_then_ssub |
| 36463 | 0, // dsub3_then_ssub_hi |
| 36464 | 0, // dsub2_then_bsub |
| 36465 | 0, // dsub2_then_bsub_hi |
| 36466 | 0, // dsub2_then_hsub |
| 36467 | 0, // dsub2_then_hsub_hi |
| 36468 | 0, // dsub2_then_ssub |
| 36469 | 0, // dsub2_then_ssub_hi |
| 36470 | 34, // psub1_then_psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 36471 | 0, // qsub1_then_dsub_hi |
| 36472 | 0, // qsub3_then_dsub_hi |
| 36473 | 0, // qsub2_then_dsub_hi |
| 36474 | 0, // x8sub_7_then_sub_32 |
| 36475 | 0, // x8sub_7_then_sub_32_hi |
| 36476 | 0, // x8sub_6_then_sub_32 |
| 36477 | 0, // x8sub_6_then_sub_32_hi |
| 36478 | 0, // x8sub_5_then_sub_32 |
| 36479 | 0, // x8sub_5_then_sub_32_hi |
| 36480 | 0, // x8sub_4_then_sub_32 |
| 36481 | 0, // x8sub_4_then_sub_32_hi |
| 36482 | 0, // x8sub_3_then_sub_32 |
| 36483 | 0, // x8sub_3_then_sub_32_hi |
| 36484 | 0, // x8sub_2_then_sub_32 |
| 36485 | 0, // x8sub_2_then_sub_32_hi |
| 36486 | 0, // x8sub_1_then_sub_32 |
| 36487 | 0, // x8sub_1_then_sub_32_hi |
| 36488 | 0, // subo64_then_sub_32 |
| 36489 | 0, // subo64_then_sub_32_hi |
| 36490 | 0, // zsub1_then_zsub_hi |
| 36491 | 0, // zsub3_then_zsub_hi |
| 36492 | 0, // zsub2_then_zsub_hi |
| 36493 | 0, // dsub0_dsub1 |
| 36494 | 0, // dsub0_dsub1_dsub2 |
| 36495 | 0, // dsub1_dsub2 |
| 36496 | 0, // dsub1_dsub2_dsub3 |
| 36497 | 0, // dsub2_dsub3 |
| 36498 | 0, // dsub_dsub1 |
| 36499 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36500 | 0, // dsub_dsub1_dsub2 |
| 36501 | 0, // qsub0_qsub1 |
| 36502 | 0, // qsub0_qsub1_qsub2 |
| 36503 | 0, // qsub1_qsub2 |
| 36504 | 0, // qsub1_qsub2_qsub3 |
| 36505 | 0, // qsub2_qsub3 |
| 36506 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36507 | 0, // x8sub_0_x8sub_1 |
| 36508 | 0, // x8sub_2_x8sub_3 |
| 36509 | 0, // x8sub_4_x8sub_5 |
| 36510 | 0, // x8sub_6_x8sub_7 |
| 36511 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36512 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36513 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36514 | 0, // sub_32_subo64_then_sub_32 |
| 36515 | 0, // zsub_qsub1 |
| 36516 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36517 | 0, // zsub_qsub1_qsub2 |
| 36518 | 0, // zsub0_zsub1 |
| 36519 | 0, // zsub0_zsub1_zsub2 |
| 36520 | 0, // zsub1_zsub2 |
| 36521 | 0, // zsub1_zsub2_zsub3 |
| 36522 | 0, // zsub2_zsub3 |
| 36523 | 0, // zsub0_zsub2 |
| 36524 | 0, // zsub1_zsub3 |
| 36525 | }, |
| 36526 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36527 | 0, // bsub |
| 36528 | 0, // bsub_hi |
| 36529 | 0, // dsub |
| 36530 | 0, // dsub0 |
| 36531 | 0, // dsub1 |
| 36532 | 0, // dsub2 |
| 36533 | 0, // dsub3 |
| 36534 | 0, // dsub_hi |
| 36535 | 0, // hsub |
| 36536 | 0, // hsub_hi |
| 36537 | 35, // psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36538 | 35, // psub0 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36539 | 35, // psub1 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36540 | 0, // qsub0 |
| 36541 | 0, // qsub1 |
| 36542 | 0, // qsub2 |
| 36543 | 0, // qsub3 |
| 36544 | 0, // ssub |
| 36545 | 0, // ssub_hi |
| 36546 | 0, // sub_32 |
| 36547 | 0, // sub_32_hi |
| 36548 | 0, // sube32 |
| 36549 | 0, // sube64 |
| 36550 | 0, // subo32 |
| 36551 | 0, // subo64 |
| 36552 | 0, // x8sub_0 |
| 36553 | 0, // x8sub_1 |
| 36554 | 0, // x8sub_2 |
| 36555 | 0, // x8sub_3 |
| 36556 | 0, // x8sub_4 |
| 36557 | 0, // x8sub_5 |
| 36558 | 0, // x8sub_6 |
| 36559 | 0, // x8sub_7 |
| 36560 | 0, // zasubb |
| 36561 | 0, // zasubd0 |
| 36562 | 0, // zasubd1 |
| 36563 | 0, // zasubh0 |
| 36564 | 0, // zasubh1 |
| 36565 | 0, // zasubq0 |
| 36566 | 0, // zasubq1 |
| 36567 | 0, // zasubs0 |
| 36568 | 0, // zasubs1 |
| 36569 | 0, // zsub |
| 36570 | 0, // zsub0 |
| 36571 | 0, // zsub1 |
| 36572 | 0, // zsub2 |
| 36573 | 0, // zsub3 |
| 36574 | 0, // zsub_hi |
| 36575 | 0, // zasubd1_then_zasubq0 |
| 36576 | 0, // zasubd1_then_zasubq1 |
| 36577 | 0, // zasubs1_then_zasubd0 |
| 36578 | 0, // zasubs1_then_zasubd1 |
| 36579 | 0, // zasubs1_then_zasubq0 |
| 36580 | 0, // zasubs1_then_zasubq1 |
| 36581 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36582 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36583 | 0, // zasubh1_then_zasubd0 |
| 36584 | 0, // zasubh1_then_zasubd1 |
| 36585 | 0, // zasubh1_then_zasubq0 |
| 36586 | 0, // zasubh1_then_zasubq1 |
| 36587 | 0, // zasubh1_then_zasubs0 |
| 36588 | 0, // zasubh1_then_zasubs1 |
| 36589 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36590 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36591 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36592 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36593 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36594 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36595 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36596 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36597 | 0, // dsub1_then_bsub |
| 36598 | 0, // dsub1_then_bsub_hi |
| 36599 | 0, // dsub1_then_hsub |
| 36600 | 0, // dsub1_then_hsub_hi |
| 36601 | 0, // dsub1_then_ssub |
| 36602 | 0, // dsub1_then_ssub_hi |
| 36603 | 0, // dsub3_then_bsub |
| 36604 | 0, // dsub3_then_bsub_hi |
| 36605 | 0, // dsub3_then_hsub |
| 36606 | 0, // dsub3_then_hsub_hi |
| 36607 | 0, // dsub3_then_ssub |
| 36608 | 0, // dsub3_then_ssub_hi |
| 36609 | 0, // dsub2_then_bsub |
| 36610 | 0, // dsub2_then_bsub_hi |
| 36611 | 0, // dsub2_then_hsub |
| 36612 | 0, // dsub2_then_hsub_hi |
| 36613 | 0, // dsub2_then_ssub |
| 36614 | 0, // dsub2_then_ssub_hi |
| 36615 | 35, // psub1_then_psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 36616 | 0, // qsub1_then_dsub_hi |
| 36617 | 0, // qsub3_then_dsub_hi |
| 36618 | 0, // qsub2_then_dsub_hi |
| 36619 | 0, // x8sub_7_then_sub_32 |
| 36620 | 0, // x8sub_7_then_sub_32_hi |
| 36621 | 0, // x8sub_6_then_sub_32 |
| 36622 | 0, // x8sub_6_then_sub_32_hi |
| 36623 | 0, // x8sub_5_then_sub_32 |
| 36624 | 0, // x8sub_5_then_sub_32_hi |
| 36625 | 0, // x8sub_4_then_sub_32 |
| 36626 | 0, // x8sub_4_then_sub_32_hi |
| 36627 | 0, // x8sub_3_then_sub_32 |
| 36628 | 0, // x8sub_3_then_sub_32_hi |
| 36629 | 0, // x8sub_2_then_sub_32 |
| 36630 | 0, // x8sub_2_then_sub_32_hi |
| 36631 | 0, // x8sub_1_then_sub_32 |
| 36632 | 0, // x8sub_1_then_sub_32_hi |
| 36633 | 0, // subo64_then_sub_32 |
| 36634 | 0, // subo64_then_sub_32_hi |
| 36635 | 0, // zsub1_then_zsub_hi |
| 36636 | 0, // zsub3_then_zsub_hi |
| 36637 | 0, // zsub2_then_zsub_hi |
| 36638 | 0, // dsub0_dsub1 |
| 36639 | 0, // dsub0_dsub1_dsub2 |
| 36640 | 0, // dsub1_dsub2 |
| 36641 | 0, // dsub1_dsub2_dsub3 |
| 36642 | 0, // dsub2_dsub3 |
| 36643 | 0, // dsub_dsub1 |
| 36644 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36645 | 0, // dsub_dsub1_dsub2 |
| 36646 | 0, // qsub0_qsub1 |
| 36647 | 0, // qsub0_qsub1_qsub2 |
| 36648 | 0, // qsub1_qsub2 |
| 36649 | 0, // qsub1_qsub2_qsub3 |
| 36650 | 0, // qsub2_qsub3 |
| 36651 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36652 | 0, // x8sub_0_x8sub_1 |
| 36653 | 0, // x8sub_2_x8sub_3 |
| 36654 | 0, // x8sub_4_x8sub_5 |
| 36655 | 0, // x8sub_6_x8sub_7 |
| 36656 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36657 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36658 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36659 | 0, // sub_32_subo64_then_sub_32 |
| 36660 | 0, // zsub_qsub1 |
| 36661 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36662 | 0, // zsub_qsub1_qsub2 |
| 36663 | 0, // zsub0_zsub1 |
| 36664 | 0, // zsub0_zsub1_zsub2 |
| 36665 | 0, // zsub1_zsub2 |
| 36666 | 0, // zsub1_zsub2_zsub3 |
| 36667 | 0, // zsub2_zsub3 |
| 36668 | 0, // zsub0_zsub2 |
| 36669 | 0, // zsub1_zsub3 |
| 36670 | }, |
| 36671 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36672 | 0, // bsub |
| 36673 | 0, // bsub_hi |
| 36674 | 0, // dsub |
| 36675 | 0, // dsub0 |
| 36676 | 0, // dsub1 |
| 36677 | 0, // dsub2 |
| 36678 | 0, // dsub3 |
| 36679 | 0, // dsub_hi |
| 36680 | 0, // hsub |
| 36681 | 0, // hsub_hi |
| 36682 | 36, // psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36683 | 36, // psub0 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36684 | 36, // psub1 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36685 | 0, // qsub0 |
| 36686 | 0, // qsub1 |
| 36687 | 0, // qsub2 |
| 36688 | 0, // qsub3 |
| 36689 | 0, // ssub |
| 36690 | 0, // ssub_hi |
| 36691 | 0, // sub_32 |
| 36692 | 0, // sub_32_hi |
| 36693 | 0, // sube32 |
| 36694 | 0, // sube64 |
| 36695 | 0, // subo32 |
| 36696 | 0, // subo64 |
| 36697 | 0, // x8sub_0 |
| 36698 | 0, // x8sub_1 |
| 36699 | 0, // x8sub_2 |
| 36700 | 0, // x8sub_3 |
| 36701 | 0, // x8sub_4 |
| 36702 | 0, // x8sub_5 |
| 36703 | 0, // x8sub_6 |
| 36704 | 0, // x8sub_7 |
| 36705 | 0, // zasubb |
| 36706 | 0, // zasubd0 |
| 36707 | 0, // zasubd1 |
| 36708 | 0, // zasubh0 |
| 36709 | 0, // zasubh1 |
| 36710 | 0, // zasubq0 |
| 36711 | 0, // zasubq1 |
| 36712 | 0, // zasubs0 |
| 36713 | 0, // zasubs1 |
| 36714 | 0, // zsub |
| 36715 | 0, // zsub0 |
| 36716 | 0, // zsub1 |
| 36717 | 0, // zsub2 |
| 36718 | 0, // zsub3 |
| 36719 | 0, // zsub_hi |
| 36720 | 0, // zasubd1_then_zasubq0 |
| 36721 | 0, // zasubd1_then_zasubq1 |
| 36722 | 0, // zasubs1_then_zasubd0 |
| 36723 | 0, // zasubs1_then_zasubd1 |
| 36724 | 0, // zasubs1_then_zasubq0 |
| 36725 | 0, // zasubs1_then_zasubq1 |
| 36726 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36727 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36728 | 0, // zasubh1_then_zasubd0 |
| 36729 | 0, // zasubh1_then_zasubd1 |
| 36730 | 0, // zasubh1_then_zasubq0 |
| 36731 | 0, // zasubh1_then_zasubq1 |
| 36732 | 0, // zasubh1_then_zasubs0 |
| 36733 | 0, // zasubh1_then_zasubs1 |
| 36734 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36735 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36736 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36737 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36738 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36739 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36740 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36741 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36742 | 0, // dsub1_then_bsub |
| 36743 | 0, // dsub1_then_bsub_hi |
| 36744 | 0, // dsub1_then_hsub |
| 36745 | 0, // dsub1_then_hsub_hi |
| 36746 | 0, // dsub1_then_ssub |
| 36747 | 0, // dsub1_then_ssub_hi |
| 36748 | 0, // dsub3_then_bsub |
| 36749 | 0, // dsub3_then_bsub_hi |
| 36750 | 0, // dsub3_then_hsub |
| 36751 | 0, // dsub3_then_hsub_hi |
| 36752 | 0, // dsub3_then_ssub |
| 36753 | 0, // dsub3_then_ssub_hi |
| 36754 | 0, // dsub2_then_bsub |
| 36755 | 0, // dsub2_then_bsub_hi |
| 36756 | 0, // dsub2_then_hsub |
| 36757 | 0, // dsub2_then_hsub_hi |
| 36758 | 0, // dsub2_then_ssub |
| 36759 | 0, // dsub2_then_ssub_hi |
| 36760 | 36, // psub1_then_psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 36761 | 0, // qsub1_then_dsub_hi |
| 36762 | 0, // qsub3_then_dsub_hi |
| 36763 | 0, // qsub2_then_dsub_hi |
| 36764 | 0, // x8sub_7_then_sub_32 |
| 36765 | 0, // x8sub_7_then_sub_32_hi |
| 36766 | 0, // x8sub_6_then_sub_32 |
| 36767 | 0, // x8sub_6_then_sub_32_hi |
| 36768 | 0, // x8sub_5_then_sub_32 |
| 36769 | 0, // x8sub_5_then_sub_32_hi |
| 36770 | 0, // x8sub_4_then_sub_32 |
| 36771 | 0, // x8sub_4_then_sub_32_hi |
| 36772 | 0, // x8sub_3_then_sub_32 |
| 36773 | 0, // x8sub_3_then_sub_32_hi |
| 36774 | 0, // x8sub_2_then_sub_32 |
| 36775 | 0, // x8sub_2_then_sub_32_hi |
| 36776 | 0, // x8sub_1_then_sub_32 |
| 36777 | 0, // x8sub_1_then_sub_32_hi |
| 36778 | 0, // subo64_then_sub_32 |
| 36779 | 0, // subo64_then_sub_32_hi |
| 36780 | 0, // zsub1_then_zsub_hi |
| 36781 | 0, // zsub3_then_zsub_hi |
| 36782 | 0, // zsub2_then_zsub_hi |
| 36783 | 0, // dsub0_dsub1 |
| 36784 | 0, // dsub0_dsub1_dsub2 |
| 36785 | 0, // dsub1_dsub2 |
| 36786 | 0, // dsub1_dsub2_dsub3 |
| 36787 | 0, // dsub2_dsub3 |
| 36788 | 0, // dsub_dsub1 |
| 36789 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36790 | 0, // dsub_dsub1_dsub2 |
| 36791 | 0, // qsub0_qsub1 |
| 36792 | 0, // qsub0_qsub1_qsub2 |
| 36793 | 0, // qsub1_qsub2 |
| 36794 | 0, // qsub1_qsub2_qsub3 |
| 36795 | 0, // qsub2_qsub3 |
| 36796 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36797 | 0, // x8sub_0_x8sub_1 |
| 36798 | 0, // x8sub_2_x8sub_3 |
| 36799 | 0, // x8sub_4_x8sub_5 |
| 36800 | 0, // x8sub_6_x8sub_7 |
| 36801 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36802 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36803 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36804 | 0, // sub_32_subo64_then_sub_32 |
| 36805 | 0, // zsub_qsub1 |
| 36806 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36807 | 0, // zsub_qsub1_qsub2 |
| 36808 | 0, // zsub0_zsub1 |
| 36809 | 0, // zsub0_zsub1_zsub2 |
| 36810 | 0, // zsub1_zsub2 |
| 36811 | 0, // zsub1_zsub2_zsub3 |
| 36812 | 0, // zsub2_zsub3 |
| 36813 | 0, // zsub0_zsub2 |
| 36814 | 0, // zsub1_zsub3 |
| 36815 | }, |
| 36816 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 36817 | 0, // bsub |
| 36818 | 0, // bsub_hi |
| 36819 | 0, // dsub |
| 36820 | 0, // dsub0 |
| 36821 | 0, // dsub1 |
| 36822 | 0, // dsub2 |
| 36823 | 0, // dsub3 |
| 36824 | 0, // dsub_hi |
| 36825 | 0, // hsub |
| 36826 | 0, // hsub_hi |
| 36827 | 37, // psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 36828 | 37, // psub0 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 36829 | 37, // psub1 -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 36830 | 0, // qsub0 |
| 36831 | 0, // qsub1 |
| 36832 | 0, // qsub2 |
| 36833 | 0, // qsub3 |
| 36834 | 0, // ssub |
| 36835 | 0, // ssub_hi |
| 36836 | 0, // sub_32 |
| 36837 | 0, // sub_32_hi |
| 36838 | 0, // sube32 |
| 36839 | 0, // sube64 |
| 36840 | 0, // subo32 |
| 36841 | 0, // subo64 |
| 36842 | 0, // x8sub_0 |
| 36843 | 0, // x8sub_1 |
| 36844 | 0, // x8sub_2 |
| 36845 | 0, // x8sub_3 |
| 36846 | 0, // x8sub_4 |
| 36847 | 0, // x8sub_5 |
| 36848 | 0, // x8sub_6 |
| 36849 | 0, // x8sub_7 |
| 36850 | 0, // zasubb |
| 36851 | 0, // zasubd0 |
| 36852 | 0, // zasubd1 |
| 36853 | 0, // zasubh0 |
| 36854 | 0, // zasubh1 |
| 36855 | 0, // zasubq0 |
| 36856 | 0, // zasubq1 |
| 36857 | 0, // zasubs0 |
| 36858 | 0, // zasubs1 |
| 36859 | 0, // zsub |
| 36860 | 0, // zsub0 |
| 36861 | 0, // zsub1 |
| 36862 | 0, // zsub2 |
| 36863 | 0, // zsub3 |
| 36864 | 0, // zsub_hi |
| 36865 | 0, // zasubd1_then_zasubq0 |
| 36866 | 0, // zasubd1_then_zasubq1 |
| 36867 | 0, // zasubs1_then_zasubd0 |
| 36868 | 0, // zasubs1_then_zasubd1 |
| 36869 | 0, // zasubs1_then_zasubq0 |
| 36870 | 0, // zasubs1_then_zasubq1 |
| 36871 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 36872 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 36873 | 0, // zasubh1_then_zasubd0 |
| 36874 | 0, // zasubh1_then_zasubd1 |
| 36875 | 0, // zasubh1_then_zasubq0 |
| 36876 | 0, // zasubh1_then_zasubq1 |
| 36877 | 0, // zasubh1_then_zasubs0 |
| 36878 | 0, // zasubh1_then_zasubs1 |
| 36879 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 36880 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 36881 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 36882 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 36883 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 36884 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 36885 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 36886 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 36887 | 0, // dsub1_then_bsub |
| 36888 | 0, // dsub1_then_bsub_hi |
| 36889 | 0, // dsub1_then_hsub |
| 36890 | 0, // dsub1_then_hsub_hi |
| 36891 | 0, // dsub1_then_ssub |
| 36892 | 0, // dsub1_then_ssub_hi |
| 36893 | 0, // dsub3_then_bsub |
| 36894 | 0, // dsub3_then_bsub_hi |
| 36895 | 0, // dsub3_then_hsub |
| 36896 | 0, // dsub3_then_hsub_hi |
| 36897 | 0, // dsub3_then_ssub |
| 36898 | 0, // dsub3_then_ssub_hi |
| 36899 | 0, // dsub2_then_bsub |
| 36900 | 0, // dsub2_then_bsub_hi |
| 36901 | 0, // dsub2_then_hsub |
| 36902 | 0, // dsub2_then_hsub_hi |
| 36903 | 0, // dsub2_then_ssub |
| 36904 | 0, // dsub2_then_ssub_hi |
| 36905 | 37, // psub1_then_psub -> PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 36906 | 0, // qsub1_then_dsub_hi |
| 36907 | 0, // qsub3_then_dsub_hi |
| 36908 | 0, // qsub2_then_dsub_hi |
| 36909 | 0, // x8sub_7_then_sub_32 |
| 36910 | 0, // x8sub_7_then_sub_32_hi |
| 36911 | 0, // x8sub_6_then_sub_32 |
| 36912 | 0, // x8sub_6_then_sub_32_hi |
| 36913 | 0, // x8sub_5_then_sub_32 |
| 36914 | 0, // x8sub_5_then_sub_32_hi |
| 36915 | 0, // x8sub_4_then_sub_32 |
| 36916 | 0, // x8sub_4_then_sub_32_hi |
| 36917 | 0, // x8sub_3_then_sub_32 |
| 36918 | 0, // x8sub_3_then_sub_32_hi |
| 36919 | 0, // x8sub_2_then_sub_32 |
| 36920 | 0, // x8sub_2_then_sub_32_hi |
| 36921 | 0, // x8sub_1_then_sub_32 |
| 36922 | 0, // x8sub_1_then_sub_32_hi |
| 36923 | 0, // subo64_then_sub_32 |
| 36924 | 0, // subo64_then_sub_32_hi |
| 36925 | 0, // zsub1_then_zsub_hi |
| 36926 | 0, // zsub3_then_zsub_hi |
| 36927 | 0, // zsub2_then_zsub_hi |
| 36928 | 0, // dsub0_dsub1 |
| 36929 | 0, // dsub0_dsub1_dsub2 |
| 36930 | 0, // dsub1_dsub2 |
| 36931 | 0, // dsub1_dsub2_dsub3 |
| 36932 | 0, // dsub2_dsub3 |
| 36933 | 0, // dsub_dsub1 |
| 36934 | 0, // dsub_dsub1_dsub2_dsub3 |
| 36935 | 0, // dsub_dsub1_dsub2 |
| 36936 | 0, // qsub0_qsub1 |
| 36937 | 0, // qsub0_qsub1_qsub2 |
| 36938 | 0, // qsub1_qsub2 |
| 36939 | 0, // qsub1_qsub2_qsub3 |
| 36940 | 0, // qsub2_qsub3 |
| 36941 | 0, // sub_32_x8sub_1_then_sub_32 |
| 36942 | 0, // x8sub_0_x8sub_1 |
| 36943 | 0, // x8sub_2_x8sub_3 |
| 36944 | 0, // x8sub_4_x8sub_5 |
| 36945 | 0, // x8sub_6_x8sub_7 |
| 36946 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 36947 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 36948 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 36949 | 0, // sub_32_subo64_then_sub_32 |
| 36950 | 0, // zsub_qsub1 |
| 36951 | 0, // zsub_qsub1_qsub2_qsub3 |
| 36952 | 0, // zsub_qsub1_qsub2 |
| 36953 | 0, // zsub0_zsub1 |
| 36954 | 0, // zsub0_zsub1_zsub2 |
| 36955 | 0, // zsub1_zsub2 |
| 36956 | 0, // zsub1_zsub2_zsub3 |
| 36957 | 0, // zsub2_zsub3 |
| 36958 | 0, // zsub0_zsub2 |
| 36959 | 0, // zsub1_zsub3 |
| 36960 | }, |
| 36961 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 36962 | 0, // bsub |
| 36963 | 0, // bsub_hi |
| 36964 | 0, // dsub |
| 36965 | 0, // dsub0 |
| 36966 | 0, // dsub1 |
| 36967 | 0, // dsub2 |
| 36968 | 0, // dsub3 |
| 36969 | 0, // dsub_hi |
| 36970 | 0, // hsub |
| 36971 | 0, // hsub_hi |
| 36972 | 38, // psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 36973 | 38, // psub0 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 36974 | 38, // psub1 -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 36975 | 0, // qsub0 |
| 36976 | 0, // qsub1 |
| 36977 | 0, // qsub2 |
| 36978 | 0, // qsub3 |
| 36979 | 0, // ssub |
| 36980 | 0, // ssub_hi |
| 36981 | 0, // sub_32 |
| 36982 | 0, // sub_32_hi |
| 36983 | 0, // sube32 |
| 36984 | 0, // sube64 |
| 36985 | 0, // subo32 |
| 36986 | 0, // subo64 |
| 36987 | 0, // x8sub_0 |
| 36988 | 0, // x8sub_1 |
| 36989 | 0, // x8sub_2 |
| 36990 | 0, // x8sub_3 |
| 36991 | 0, // x8sub_4 |
| 36992 | 0, // x8sub_5 |
| 36993 | 0, // x8sub_6 |
| 36994 | 0, // x8sub_7 |
| 36995 | 0, // zasubb |
| 36996 | 0, // zasubd0 |
| 36997 | 0, // zasubd1 |
| 36998 | 0, // zasubh0 |
| 36999 | 0, // zasubh1 |
| 37000 | 0, // zasubq0 |
| 37001 | 0, // zasubq1 |
| 37002 | 0, // zasubs0 |
| 37003 | 0, // zasubs1 |
| 37004 | 0, // zsub |
| 37005 | 0, // zsub0 |
| 37006 | 0, // zsub1 |
| 37007 | 0, // zsub2 |
| 37008 | 0, // zsub3 |
| 37009 | 0, // zsub_hi |
| 37010 | 0, // zasubd1_then_zasubq0 |
| 37011 | 0, // zasubd1_then_zasubq1 |
| 37012 | 0, // zasubs1_then_zasubd0 |
| 37013 | 0, // zasubs1_then_zasubd1 |
| 37014 | 0, // zasubs1_then_zasubq0 |
| 37015 | 0, // zasubs1_then_zasubq1 |
| 37016 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37017 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37018 | 0, // zasubh1_then_zasubd0 |
| 37019 | 0, // zasubh1_then_zasubd1 |
| 37020 | 0, // zasubh1_then_zasubq0 |
| 37021 | 0, // zasubh1_then_zasubq1 |
| 37022 | 0, // zasubh1_then_zasubs0 |
| 37023 | 0, // zasubh1_then_zasubs1 |
| 37024 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37025 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37026 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37027 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37028 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37029 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37030 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37031 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37032 | 0, // dsub1_then_bsub |
| 37033 | 0, // dsub1_then_bsub_hi |
| 37034 | 0, // dsub1_then_hsub |
| 37035 | 0, // dsub1_then_hsub_hi |
| 37036 | 0, // dsub1_then_ssub |
| 37037 | 0, // dsub1_then_ssub_hi |
| 37038 | 0, // dsub3_then_bsub |
| 37039 | 0, // dsub3_then_bsub_hi |
| 37040 | 0, // dsub3_then_hsub |
| 37041 | 0, // dsub3_then_hsub_hi |
| 37042 | 0, // dsub3_then_ssub |
| 37043 | 0, // dsub3_then_ssub_hi |
| 37044 | 0, // dsub2_then_bsub |
| 37045 | 0, // dsub2_then_bsub_hi |
| 37046 | 0, // dsub2_then_hsub |
| 37047 | 0, // dsub2_then_hsub_hi |
| 37048 | 0, // dsub2_then_ssub |
| 37049 | 0, // dsub2_then_ssub_hi |
| 37050 | 38, // psub1_then_psub -> PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 37051 | 0, // qsub1_then_dsub_hi |
| 37052 | 0, // qsub3_then_dsub_hi |
| 37053 | 0, // qsub2_then_dsub_hi |
| 37054 | 0, // x8sub_7_then_sub_32 |
| 37055 | 0, // x8sub_7_then_sub_32_hi |
| 37056 | 0, // x8sub_6_then_sub_32 |
| 37057 | 0, // x8sub_6_then_sub_32_hi |
| 37058 | 0, // x8sub_5_then_sub_32 |
| 37059 | 0, // x8sub_5_then_sub_32_hi |
| 37060 | 0, // x8sub_4_then_sub_32 |
| 37061 | 0, // x8sub_4_then_sub_32_hi |
| 37062 | 0, // x8sub_3_then_sub_32 |
| 37063 | 0, // x8sub_3_then_sub_32_hi |
| 37064 | 0, // x8sub_2_then_sub_32 |
| 37065 | 0, // x8sub_2_then_sub_32_hi |
| 37066 | 0, // x8sub_1_then_sub_32 |
| 37067 | 0, // x8sub_1_then_sub_32_hi |
| 37068 | 0, // subo64_then_sub_32 |
| 37069 | 0, // subo64_then_sub_32_hi |
| 37070 | 0, // zsub1_then_zsub_hi |
| 37071 | 0, // zsub3_then_zsub_hi |
| 37072 | 0, // zsub2_then_zsub_hi |
| 37073 | 0, // dsub0_dsub1 |
| 37074 | 0, // dsub0_dsub1_dsub2 |
| 37075 | 0, // dsub1_dsub2 |
| 37076 | 0, // dsub1_dsub2_dsub3 |
| 37077 | 0, // dsub2_dsub3 |
| 37078 | 0, // dsub_dsub1 |
| 37079 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37080 | 0, // dsub_dsub1_dsub2 |
| 37081 | 0, // qsub0_qsub1 |
| 37082 | 0, // qsub0_qsub1_qsub2 |
| 37083 | 0, // qsub1_qsub2 |
| 37084 | 0, // qsub1_qsub2_qsub3 |
| 37085 | 0, // qsub2_qsub3 |
| 37086 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37087 | 0, // x8sub_0_x8sub_1 |
| 37088 | 0, // x8sub_2_x8sub_3 |
| 37089 | 0, // x8sub_4_x8sub_5 |
| 37090 | 0, // x8sub_6_x8sub_7 |
| 37091 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37092 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37093 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37094 | 0, // sub_32_subo64_then_sub_32 |
| 37095 | 0, // zsub_qsub1 |
| 37096 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37097 | 0, // zsub_qsub1_qsub2 |
| 37098 | 0, // zsub0_zsub1 |
| 37099 | 0, // zsub0_zsub1_zsub2 |
| 37100 | 0, // zsub1_zsub2 |
| 37101 | 0, // zsub1_zsub2_zsub3 |
| 37102 | 0, // zsub2_zsub3 |
| 37103 | 0, // zsub0_zsub2 |
| 37104 | 0, // zsub1_zsub3 |
| 37105 | }, |
| 37106 | { // GPR32all |
| 37107 | 0, // bsub |
| 37108 | 0, // bsub_hi |
| 37109 | 0, // dsub |
| 37110 | 0, // dsub0 |
| 37111 | 0, // dsub1 |
| 37112 | 0, // dsub2 |
| 37113 | 0, // dsub3 |
| 37114 | 0, // dsub_hi |
| 37115 | 0, // hsub |
| 37116 | 0, // hsub_hi |
| 37117 | 0, // psub |
| 37118 | 0, // psub0 |
| 37119 | 0, // psub1 |
| 37120 | 0, // qsub0 |
| 37121 | 0, // qsub1 |
| 37122 | 0, // qsub2 |
| 37123 | 0, // qsub3 |
| 37124 | 0, // ssub |
| 37125 | 0, // ssub_hi |
| 37126 | 0, // sub_32 |
| 37127 | 0, // sub_32_hi |
| 37128 | 0, // sube32 |
| 37129 | 0, // sube64 |
| 37130 | 0, // subo32 |
| 37131 | 0, // subo64 |
| 37132 | 0, // x8sub_0 |
| 37133 | 0, // x8sub_1 |
| 37134 | 0, // x8sub_2 |
| 37135 | 0, // x8sub_3 |
| 37136 | 0, // x8sub_4 |
| 37137 | 0, // x8sub_5 |
| 37138 | 0, // x8sub_6 |
| 37139 | 0, // x8sub_7 |
| 37140 | 0, // zasubb |
| 37141 | 0, // zasubd0 |
| 37142 | 0, // zasubd1 |
| 37143 | 0, // zasubh0 |
| 37144 | 0, // zasubh1 |
| 37145 | 0, // zasubq0 |
| 37146 | 0, // zasubq1 |
| 37147 | 0, // zasubs0 |
| 37148 | 0, // zasubs1 |
| 37149 | 0, // zsub |
| 37150 | 0, // zsub0 |
| 37151 | 0, // zsub1 |
| 37152 | 0, // zsub2 |
| 37153 | 0, // zsub3 |
| 37154 | 0, // zsub_hi |
| 37155 | 0, // zasubd1_then_zasubq0 |
| 37156 | 0, // zasubd1_then_zasubq1 |
| 37157 | 0, // zasubs1_then_zasubd0 |
| 37158 | 0, // zasubs1_then_zasubd1 |
| 37159 | 0, // zasubs1_then_zasubq0 |
| 37160 | 0, // zasubs1_then_zasubq1 |
| 37161 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37162 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37163 | 0, // zasubh1_then_zasubd0 |
| 37164 | 0, // zasubh1_then_zasubd1 |
| 37165 | 0, // zasubh1_then_zasubq0 |
| 37166 | 0, // zasubh1_then_zasubq1 |
| 37167 | 0, // zasubh1_then_zasubs0 |
| 37168 | 0, // zasubh1_then_zasubs1 |
| 37169 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37170 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37171 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37172 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37173 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37174 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37175 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37176 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37177 | 0, // dsub1_then_bsub |
| 37178 | 0, // dsub1_then_bsub_hi |
| 37179 | 0, // dsub1_then_hsub |
| 37180 | 0, // dsub1_then_hsub_hi |
| 37181 | 0, // dsub1_then_ssub |
| 37182 | 0, // dsub1_then_ssub_hi |
| 37183 | 0, // dsub3_then_bsub |
| 37184 | 0, // dsub3_then_bsub_hi |
| 37185 | 0, // dsub3_then_hsub |
| 37186 | 0, // dsub3_then_hsub_hi |
| 37187 | 0, // dsub3_then_ssub |
| 37188 | 0, // dsub3_then_ssub_hi |
| 37189 | 0, // dsub2_then_bsub |
| 37190 | 0, // dsub2_then_bsub_hi |
| 37191 | 0, // dsub2_then_hsub |
| 37192 | 0, // dsub2_then_hsub_hi |
| 37193 | 0, // dsub2_then_ssub |
| 37194 | 0, // dsub2_then_ssub_hi |
| 37195 | 0, // psub1_then_psub |
| 37196 | 0, // qsub1_then_dsub_hi |
| 37197 | 0, // qsub3_then_dsub_hi |
| 37198 | 0, // qsub2_then_dsub_hi |
| 37199 | 0, // x8sub_7_then_sub_32 |
| 37200 | 0, // x8sub_7_then_sub_32_hi |
| 37201 | 0, // x8sub_6_then_sub_32 |
| 37202 | 0, // x8sub_6_then_sub_32_hi |
| 37203 | 0, // x8sub_5_then_sub_32 |
| 37204 | 0, // x8sub_5_then_sub_32_hi |
| 37205 | 0, // x8sub_4_then_sub_32 |
| 37206 | 0, // x8sub_4_then_sub_32_hi |
| 37207 | 0, // x8sub_3_then_sub_32 |
| 37208 | 0, // x8sub_3_then_sub_32_hi |
| 37209 | 0, // x8sub_2_then_sub_32 |
| 37210 | 0, // x8sub_2_then_sub_32_hi |
| 37211 | 0, // x8sub_1_then_sub_32 |
| 37212 | 0, // x8sub_1_then_sub_32_hi |
| 37213 | 0, // subo64_then_sub_32 |
| 37214 | 0, // subo64_then_sub_32_hi |
| 37215 | 0, // zsub1_then_zsub_hi |
| 37216 | 0, // zsub3_then_zsub_hi |
| 37217 | 0, // zsub2_then_zsub_hi |
| 37218 | 0, // dsub0_dsub1 |
| 37219 | 0, // dsub0_dsub1_dsub2 |
| 37220 | 0, // dsub1_dsub2 |
| 37221 | 0, // dsub1_dsub2_dsub3 |
| 37222 | 0, // dsub2_dsub3 |
| 37223 | 0, // dsub_dsub1 |
| 37224 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37225 | 0, // dsub_dsub1_dsub2 |
| 37226 | 0, // qsub0_qsub1 |
| 37227 | 0, // qsub0_qsub1_qsub2 |
| 37228 | 0, // qsub1_qsub2 |
| 37229 | 0, // qsub1_qsub2_qsub3 |
| 37230 | 0, // qsub2_qsub3 |
| 37231 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37232 | 0, // x8sub_0_x8sub_1 |
| 37233 | 0, // x8sub_2_x8sub_3 |
| 37234 | 0, // x8sub_4_x8sub_5 |
| 37235 | 0, // x8sub_6_x8sub_7 |
| 37236 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37237 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37238 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37239 | 0, // sub_32_subo64_then_sub_32 |
| 37240 | 0, // zsub_qsub1 |
| 37241 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37242 | 0, // zsub_qsub1_qsub2 |
| 37243 | 0, // zsub0_zsub1 |
| 37244 | 0, // zsub0_zsub1_zsub2 |
| 37245 | 0, // zsub1_zsub2 |
| 37246 | 0, // zsub1_zsub2_zsub3 |
| 37247 | 0, // zsub2_zsub3 |
| 37248 | 0, // zsub0_zsub2 |
| 37249 | 0, // zsub1_zsub3 |
| 37250 | }, |
| 37251 | { // FPR32 |
| 37252 | 40, // bsub -> FPR32 |
| 37253 | 40, // bsub_hi -> FPR32 |
| 37254 | 0, // dsub |
| 37255 | 0, // dsub0 |
| 37256 | 0, // dsub1 |
| 37257 | 0, // dsub2 |
| 37258 | 0, // dsub3 |
| 37259 | 0, // dsub_hi |
| 37260 | 40, // hsub -> FPR32 |
| 37261 | 40, // hsub_hi -> FPR32 |
| 37262 | 0, // psub |
| 37263 | 0, // psub0 |
| 37264 | 0, // psub1 |
| 37265 | 0, // qsub0 |
| 37266 | 0, // qsub1 |
| 37267 | 0, // qsub2 |
| 37268 | 0, // qsub3 |
| 37269 | 0, // ssub |
| 37270 | 0, // ssub_hi |
| 37271 | 0, // sub_32 |
| 37272 | 0, // sub_32_hi |
| 37273 | 0, // sube32 |
| 37274 | 0, // sube64 |
| 37275 | 0, // subo32 |
| 37276 | 0, // subo64 |
| 37277 | 0, // x8sub_0 |
| 37278 | 0, // x8sub_1 |
| 37279 | 0, // x8sub_2 |
| 37280 | 0, // x8sub_3 |
| 37281 | 0, // x8sub_4 |
| 37282 | 0, // x8sub_5 |
| 37283 | 0, // x8sub_6 |
| 37284 | 0, // x8sub_7 |
| 37285 | 0, // zasubb |
| 37286 | 0, // zasubd0 |
| 37287 | 0, // zasubd1 |
| 37288 | 0, // zasubh0 |
| 37289 | 0, // zasubh1 |
| 37290 | 0, // zasubq0 |
| 37291 | 0, // zasubq1 |
| 37292 | 0, // zasubs0 |
| 37293 | 0, // zasubs1 |
| 37294 | 0, // zsub |
| 37295 | 0, // zsub0 |
| 37296 | 0, // zsub1 |
| 37297 | 0, // zsub2 |
| 37298 | 0, // zsub3 |
| 37299 | 0, // zsub_hi |
| 37300 | 0, // zasubd1_then_zasubq0 |
| 37301 | 0, // zasubd1_then_zasubq1 |
| 37302 | 0, // zasubs1_then_zasubd0 |
| 37303 | 0, // zasubs1_then_zasubd1 |
| 37304 | 0, // zasubs1_then_zasubq0 |
| 37305 | 0, // zasubs1_then_zasubq1 |
| 37306 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37307 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37308 | 0, // zasubh1_then_zasubd0 |
| 37309 | 0, // zasubh1_then_zasubd1 |
| 37310 | 0, // zasubh1_then_zasubq0 |
| 37311 | 0, // zasubh1_then_zasubq1 |
| 37312 | 0, // zasubh1_then_zasubs0 |
| 37313 | 0, // zasubh1_then_zasubs1 |
| 37314 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37315 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37316 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37317 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37318 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37319 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37320 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37321 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37322 | 0, // dsub1_then_bsub |
| 37323 | 0, // dsub1_then_bsub_hi |
| 37324 | 0, // dsub1_then_hsub |
| 37325 | 0, // dsub1_then_hsub_hi |
| 37326 | 0, // dsub1_then_ssub |
| 37327 | 0, // dsub1_then_ssub_hi |
| 37328 | 0, // dsub3_then_bsub |
| 37329 | 0, // dsub3_then_bsub_hi |
| 37330 | 0, // dsub3_then_hsub |
| 37331 | 0, // dsub3_then_hsub_hi |
| 37332 | 0, // dsub3_then_ssub |
| 37333 | 0, // dsub3_then_ssub_hi |
| 37334 | 0, // dsub2_then_bsub |
| 37335 | 0, // dsub2_then_bsub_hi |
| 37336 | 0, // dsub2_then_hsub |
| 37337 | 0, // dsub2_then_hsub_hi |
| 37338 | 0, // dsub2_then_ssub |
| 37339 | 0, // dsub2_then_ssub_hi |
| 37340 | 0, // psub1_then_psub |
| 37341 | 0, // qsub1_then_dsub_hi |
| 37342 | 0, // qsub3_then_dsub_hi |
| 37343 | 0, // qsub2_then_dsub_hi |
| 37344 | 0, // x8sub_7_then_sub_32 |
| 37345 | 0, // x8sub_7_then_sub_32_hi |
| 37346 | 0, // x8sub_6_then_sub_32 |
| 37347 | 0, // x8sub_6_then_sub_32_hi |
| 37348 | 0, // x8sub_5_then_sub_32 |
| 37349 | 0, // x8sub_5_then_sub_32_hi |
| 37350 | 0, // x8sub_4_then_sub_32 |
| 37351 | 0, // x8sub_4_then_sub_32_hi |
| 37352 | 0, // x8sub_3_then_sub_32 |
| 37353 | 0, // x8sub_3_then_sub_32_hi |
| 37354 | 0, // x8sub_2_then_sub_32 |
| 37355 | 0, // x8sub_2_then_sub_32_hi |
| 37356 | 0, // x8sub_1_then_sub_32 |
| 37357 | 0, // x8sub_1_then_sub_32_hi |
| 37358 | 0, // subo64_then_sub_32 |
| 37359 | 0, // subo64_then_sub_32_hi |
| 37360 | 0, // zsub1_then_zsub_hi |
| 37361 | 0, // zsub3_then_zsub_hi |
| 37362 | 0, // zsub2_then_zsub_hi |
| 37363 | 0, // dsub0_dsub1 |
| 37364 | 0, // dsub0_dsub1_dsub2 |
| 37365 | 0, // dsub1_dsub2 |
| 37366 | 0, // dsub1_dsub2_dsub3 |
| 37367 | 0, // dsub2_dsub3 |
| 37368 | 0, // dsub_dsub1 |
| 37369 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37370 | 0, // dsub_dsub1_dsub2 |
| 37371 | 0, // qsub0_qsub1 |
| 37372 | 0, // qsub0_qsub1_qsub2 |
| 37373 | 0, // qsub1_qsub2 |
| 37374 | 0, // qsub1_qsub2_qsub3 |
| 37375 | 0, // qsub2_qsub3 |
| 37376 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37377 | 0, // x8sub_0_x8sub_1 |
| 37378 | 0, // x8sub_2_x8sub_3 |
| 37379 | 0, // x8sub_4_x8sub_5 |
| 37380 | 0, // x8sub_6_x8sub_7 |
| 37381 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37382 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37383 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37384 | 0, // sub_32_subo64_then_sub_32 |
| 37385 | 0, // zsub_qsub1 |
| 37386 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37387 | 0, // zsub_qsub1_qsub2 |
| 37388 | 0, // zsub0_zsub1 |
| 37389 | 0, // zsub0_zsub1_zsub2 |
| 37390 | 0, // zsub1_zsub2 |
| 37391 | 0, // zsub1_zsub2_zsub3 |
| 37392 | 0, // zsub2_zsub3 |
| 37393 | 0, // zsub0_zsub2 |
| 37394 | 0, // zsub1_zsub3 |
| 37395 | }, |
| 37396 | { // GPR32 |
| 37397 | 0, // bsub |
| 37398 | 0, // bsub_hi |
| 37399 | 0, // dsub |
| 37400 | 0, // dsub0 |
| 37401 | 0, // dsub1 |
| 37402 | 0, // dsub2 |
| 37403 | 0, // dsub3 |
| 37404 | 0, // dsub_hi |
| 37405 | 0, // hsub |
| 37406 | 0, // hsub_hi |
| 37407 | 0, // psub |
| 37408 | 0, // psub0 |
| 37409 | 0, // psub1 |
| 37410 | 0, // qsub0 |
| 37411 | 0, // qsub1 |
| 37412 | 0, // qsub2 |
| 37413 | 0, // qsub3 |
| 37414 | 0, // ssub |
| 37415 | 0, // ssub_hi |
| 37416 | 0, // sub_32 |
| 37417 | 0, // sub_32_hi |
| 37418 | 0, // sube32 |
| 37419 | 0, // sube64 |
| 37420 | 0, // subo32 |
| 37421 | 0, // subo64 |
| 37422 | 0, // x8sub_0 |
| 37423 | 0, // x8sub_1 |
| 37424 | 0, // x8sub_2 |
| 37425 | 0, // x8sub_3 |
| 37426 | 0, // x8sub_4 |
| 37427 | 0, // x8sub_5 |
| 37428 | 0, // x8sub_6 |
| 37429 | 0, // x8sub_7 |
| 37430 | 0, // zasubb |
| 37431 | 0, // zasubd0 |
| 37432 | 0, // zasubd1 |
| 37433 | 0, // zasubh0 |
| 37434 | 0, // zasubh1 |
| 37435 | 0, // zasubq0 |
| 37436 | 0, // zasubq1 |
| 37437 | 0, // zasubs0 |
| 37438 | 0, // zasubs1 |
| 37439 | 0, // zsub |
| 37440 | 0, // zsub0 |
| 37441 | 0, // zsub1 |
| 37442 | 0, // zsub2 |
| 37443 | 0, // zsub3 |
| 37444 | 0, // zsub_hi |
| 37445 | 0, // zasubd1_then_zasubq0 |
| 37446 | 0, // zasubd1_then_zasubq1 |
| 37447 | 0, // zasubs1_then_zasubd0 |
| 37448 | 0, // zasubs1_then_zasubd1 |
| 37449 | 0, // zasubs1_then_zasubq0 |
| 37450 | 0, // zasubs1_then_zasubq1 |
| 37451 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37452 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37453 | 0, // zasubh1_then_zasubd0 |
| 37454 | 0, // zasubh1_then_zasubd1 |
| 37455 | 0, // zasubh1_then_zasubq0 |
| 37456 | 0, // zasubh1_then_zasubq1 |
| 37457 | 0, // zasubh1_then_zasubs0 |
| 37458 | 0, // zasubh1_then_zasubs1 |
| 37459 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37460 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37461 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37462 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37463 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37464 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37465 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37466 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37467 | 0, // dsub1_then_bsub |
| 37468 | 0, // dsub1_then_bsub_hi |
| 37469 | 0, // dsub1_then_hsub |
| 37470 | 0, // dsub1_then_hsub_hi |
| 37471 | 0, // dsub1_then_ssub |
| 37472 | 0, // dsub1_then_ssub_hi |
| 37473 | 0, // dsub3_then_bsub |
| 37474 | 0, // dsub3_then_bsub_hi |
| 37475 | 0, // dsub3_then_hsub |
| 37476 | 0, // dsub3_then_hsub_hi |
| 37477 | 0, // dsub3_then_ssub |
| 37478 | 0, // dsub3_then_ssub_hi |
| 37479 | 0, // dsub2_then_bsub |
| 37480 | 0, // dsub2_then_bsub_hi |
| 37481 | 0, // dsub2_then_hsub |
| 37482 | 0, // dsub2_then_hsub_hi |
| 37483 | 0, // dsub2_then_ssub |
| 37484 | 0, // dsub2_then_ssub_hi |
| 37485 | 0, // psub1_then_psub |
| 37486 | 0, // qsub1_then_dsub_hi |
| 37487 | 0, // qsub3_then_dsub_hi |
| 37488 | 0, // qsub2_then_dsub_hi |
| 37489 | 0, // x8sub_7_then_sub_32 |
| 37490 | 0, // x8sub_7_then_sub_32_hi |
| 37491 | 0, // x8sub_6_then_sub_32 |
| 37492 | 0, // x8sub_6_then_sub_32_hi |
| 37493 | 0, // x8sub_5_then_sub_32 |
| 37494 | 0, // x8sub_5_then_sub_32_hi |
| 37495 | 0, // x8sub_4_then_sub_32 |
| 37496 | 0, // x8sub_4_then_sub_32_hi |
| 37497 | 0, // x8sub_3_then_sub_32 |
| 37498 | 0, // x8sub_3_then_sub_32_hi |
| 37499 | 0, // x8sub_2_then_sub_32 |
| 37500 | 0, // x8sub_2_then_sub_32_hi |
| 37501 | 0, // x8sub_1_then_sub_32 |
| 37502 | 0, // x8sub_1_then_sub_32_hi |
| 37503 | 0, // subo64_then_sub_32 |
| 37504 | 0, // subo64_then_sub_32_hi |
| 37505 | 0, // zsub1_then_zsub_hi |
| 37506 | 0, // zsub3_then_zsub_hi |
| 37507 | 0, // zsub2_then_zsub_hi |
| 37508 | 0, // dsub0_dsub1 |
| 37509 | 0, // dsub0_dsub1_dsub2 |
| 37510 | 0, // dsub1_dsub2 |
| 37511 | 0, // dsub1_dsub2_dsub3 |
| 37512 | 0, // dsub2_dsub3 |
| 37513 | 0, // dsub_dsub1 |
| 37514 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37515 | 0, // dsub_dsub1_dsub2 |
| 37516 | 0, // qsub0_qsub1 |
| 37517 | 0, // qsub0_qsub1_qsub2 |
| 37518 | 0, // qsub1_qsub2 |
| 37519 | 0, // qsub1_qsub2_qsub3 |
| 37520 | 0, // qsub2_qsub3 |
| 37521 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37522 | 0, // x8sub_0_x8sub_1 |
| 37523 | 0, // x8sub_2_x8sub_3 |
| 37524 | 0, // x8sub_4_x8sub_5 |
| 37525 | 0, // x8sub_6_x8sub_7 |
| 37526 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37527 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37528 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37529 | 0, // sub_32_subo64_then_sub_32 |
| 37530 | 0, // zsub_qsub1 |
| 37531 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37532 | 0, // zsub_qsub1_qsub2 |
| 37533 | 0, // zsub0_zsub1 |
| 37534 | 0, // zsub0_zsub1_zsub2 |
| 37535 | 0, // zsub1_zsub2 |
| 37536 | 0, // zsub1_zsub2_zsub3 |
| 37537 | 0, // zsub2_zsub3 |
| 37538 | 0, // zsub0_zsub2 |
| 37539 | 0, // zsub1_zsub3 |
| 37540 | }, |
| 37541 | { // GPR32sp |
| 37542 | 0, // bsub |
| 37543 | 0, // bsub_hi |
| 37544 | 0, // dsub |
| 37545 | 0, // dsub0 |
| 37546 | 0, // dsub1 |
| 37547 | 0, // dsub2 |
| 37548 | 0, // dsub3 |
| 37549 | 0, // dsub_hi |
| 37550 | 0, // hsub |
| 37551 | 0, // hsub_hi |
| 37552 | 0, // psub |
| 37553 | 0, // psub0 |
| 37554 | 0, // psub1 |
| 37555 | 0, // qsub0 |
| 37556 | 0, // qsub1 |
| 37557 | 0, // qsub2 |
| 37558 | 0, // qsub3 |
| 37559 | 0, // ssub |
| 37560 | 0, // ssub_hi |
| 37561 | 0, // sub_32 |
| 37562 | 0, // sub_32_hi |
| 37563 | 0, // sube32 |
| 37564 | 0, // sube64 |
| 37565 | 0, // subo32 |
| 37566 | 0, // subo64 |
| 37567 | 0, // x8sub_0 |
| 37568 | 0, // x8sub_1 |
| 37569 | 0, // x8sub_2 |
| 37570 | 0, // x8sub_3 |
| 37571 | 0, // x8sub_4 |
| 37572 | 0, // x8sub_5 |
| 37573 | 0, // x8sub_6 |
| 37574 | 0, // x8sub_7 |
| 37575 | 0, // zasubb |
| 37576 | 0, // zasubd0 |
| 37577 | 0, // zasubd1 |
| 37578 | 0, // zasubh0 |
| 37579 | 0, // zasubh1 |
| 37580 | 0, // zasubq0 |
| 37581 | 0, // zasubq1 |
| 37582 | 0, // zasubs0 |
| 37583 | 0, // zasubs1 |
| 37584 | 0, // zsub |
| 37585 | 0, // zsub0 |
| 37586 | 0, // zsub1 |
| 37587 | 0, // zsub2 |
| 37588 | 0, // zsub3 |
| 37589 | 0, // zsub_hi |
| 37590 | 0, // zasubd1_then_zasubq0 |
| 37591 | 0, // zasubd1_then_zasubq1 |
| 37592 | 0, // zasubs1_then_zasubd0 |
| 37593 | 0, // zasubs1_then_zasubd1 |
| 37594 | 0, // zasubs1_then_zasubq0 |
| 37595 | 0, // zasubs1_then_zasubq1 |
| 37596 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37597 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37598 | 0, // zasubh1_then_zasubd0 |
| 37599 | 0, // zasubh1_then_zasubd1 |
| 37600 | 0, // zasubh1_then_zasubq0 |
| 37601 | 0, // zasubh1_then_zasubq1 |
| 37602 | 0, // zasubh1_then_zasubs0 |
| 37603 | 0, // zasubh1_then_zasubs1 |
| 37604 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37605 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37606 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37607 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37608 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37609 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37610 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37611 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37612 | 0, // dsub1_then_bsub |
| 37613 | 0, // dsub1_then_bsub_hi |
| 37614 | 0, // dsub1_then_hsub |
| 37615 | 0, // dsub1_then_hsub_hi |
| 37616 | 0, // dsub1_then_ssub |
| 37617 | 0, // dsub1_then_ssub_hi |
| 37618 | 0, // dsub3_then_bsub |
| 37619 | 0, // dsub3_then_bsub_hi |
| 37620 | 0, // dsub3_then_hsub |
| 37621 | 0, // dsub3_then_hsub_hi |
| 37622 | 0, // dsub3_then_ssub |
| 37623 | 0, // dsub3_then_ssub_hi |
| 37624 | 0, // dsub2_then_bsub |
| 37625 | 0, // dsub2_then_bsub_hi |
| 37626 | 0, // dsub2_then_hsub |
| 37627 | 0, // dsub2_then_hsub_hi |
| 37628 | 0, // dsub2_then_ssub |
| 37629 | 0, // dsub2_then_ssub_hi |
| 37630 | 0, // psub1_then_psub |
| 37631 | 0, // qsub1_then_dsub_hi |
| 37632 | 0, // qsub3_then_dsub_hi |
| 37633 | 0, // qsub2_then_dsub_hi |
| 37634 | 0, // x8sub_7_then_sub_32 |
| 37635 | 0, // x8sub_7_then_sub_32_hi |
| 37636 | 0, // x8sub_6_then_sub_32 |
| 37637 | 0, // x8sub_6_then_sub_32_hi |
| 37638 | 0, // x8sub_5_then_sub_32 |
| 37639 | 0, // x8sub_5_then_sub_32_hi |
| 37640 | 0, // x8sub_4_then_sub_32 |
| 37641 | 0, // x8sub_4_then_sub_32_hi |
| 37642 | 0, // x8sub_3_then_sub_32 |
| 37643 | 0, // x8sub_3_then_sub_32_hi |
| 37644 | 0, // x8sub_2_then_sub_32 |
| 37645 | 0, // x8sub_2_then_sub_32_hi |
| 37646 | 0, // x8sub_1_then_sub_32 |
| 37647 | 0, // x8sub_1_then_sub_32_hi |
| 37648 | 0, // subo64_then_sub_32 |
| 37649 | 0, // subo64_then_sub_32_hi |
| 37650 | 0, // zsub1_then_zsub_hi |
| 37651 | 0, // zsub3_then_zsub_hi |
| 37652 | 0, // zsub2_then_zsub_hi |
| 37653 | 0, // dsub0_dsub1 |
| 37654 | 0, // dsub0_dsub1_dsub2 |
| 37655 | 0, // dsub1_dsub2 |
| 37656 | 0, // dsub1_dsub2_dsub3 |
| 37657 | 0, // dsub2_dsub3 |
| 37658 | 0, // dsub_dsub1 |
| 37659 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37660 | 0, // dsub_dsub1_dsub2 |
| 37661 | 0, // qsub0_qsub1 |
| 37662 | 0, // qsub0_qsub1_qsub2 |
| 37663 | 0, // qsub1_qsub2 |
| 37664 | 0, // qsub1_qsub2_qsub3 |
| 37665 | 0, // qsub2_qsub3 |
| 37666 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37667 | 0, // x8sub_0_x8sub_1 |
| 37668 | 0, // x8sub_2_x8sub_3 |
| 37669 | 0, // x8sub_4_x8sub_5 |
| 37670 | 0, // x8sub_6_x8sub_7 |
| 37671 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37672 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37673 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37674 | 0, // sub_32_subo64_then_sub_32 |
| 37675 | 0, // zsub_qsub1 |
| 37676 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37677 | 0, // zsub_qsub1_qsub2 |
| 37678 | 0, // zsub0_zsub1 |
| 37679 | 0, // zsub0_zsub1_zsub2 |
| 37680 | 0, // zsub1_zsub2 |
| 37681 | 0, // zsub1_zsub2_zsub3 |
| 37682 | 0, // zsub2_zsub3 |
| 37683 | 0, // zsub0_zsub2 |
| 37684 | 0, // zsub1_zsub3 |
| 37685 | }, |
| 37686 | { // GPR32common |
| 37687 | 0, // bsub |
| 37688 | 0, // bsub_hi |
| 37689 | 0, // dsub |
| 37690 | 0, // dsub0 |
| 37691 | 0, // dsub1 |
| 37692 | 0, // dsub2 |
| 37693 | 0, // dsub3 |
| 37694 | 0, // dsub_hi |
| 37695 | 0, // hsub |
| 37696 | 0, // hsub_hi |
| 37697 | 0, // psub |
| 37698 | 0, // psub0 |
| 37699 | 0, // psub1 |
| 37700 | 0, // qsub0 |
| 37701 | 0, // qsub1 |
| 37702 | 0, // qsub2 |
| 37703 | 0, // qsub3 |
| 37704 | 0, // ssub |
| 37705 | 0, // ssub_hi |
| 37706 | 0, // sub_32 |
| 37707 | 0, // sub_32_hi |
| 37708 | 0, // sube32 |
| 37709 | 0, // sube64 |
| 37710 | 0, // subo32 |
| 37711 | 0, // subo64 |
| 37712 | 0, // x8sub_0 |
| 37713 | 0, // x8sub_1 |
| 37714 | 0, // x8sub_2 |
| 37715 | 0, // x8sub_3 |
| 37716 | 0, // x8sub_4 |
| 37717 | 0, // x8sub_5 |
| 37718 | 0, // x8sub_6 |
| 37719 | 0, // x8sub_7 |
| 37720 | 0, // zasubb |
| 37721 | 0, // zasubd0 |
| 37722 | 0, // zasubd1 |
| 37723 | 0, // zasubh0 |
| 37724 | 0, // zasubh1 |
| 37725 | 0, // zasubq0 |
| 37726 | 0, // zasubq1 |
| 37727 | 0, // zasubs0 |
| 37728 | 0, // zasubs1 |
| 37729 | 0, // zsub |
| 37730 | 0, // zsub0 |
| 37731 | 0, // zsub1 |
| 37732 | 0, // zsub2 |
| 37733 | 0, // zsub3 |
| 37734 | 0, // zsub_hi |
| 37735 | 0, // zasubd1_then_zasubq0 |
| 37736 | 0, // zasubd1_then_zasubq1 |
| 37737 | 0, // zasubs1_then_zasubd0 |
| 37738 | 0, // zasubs1_then_zasubd1 |
| 37739 | 0, // zasubs1_then_zasubq0 |
| 37740 | 0, // zasubs1_then_zasubq1 |
| 37741 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37742 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37743 | 0, // zasubh1_then_zasubd0 |
| 37744 | 0, // zasubh1_then_zasubd1 |
| 37745 | 0, // zasubh1_then_zasubq0 |
| 37746 | 0, // zasubh1_then_zasubq1 |
| 37747 | 0, // zasubh1_then_zasubs0 |
| 37748 | 0, // zasubh1_then_zasubs1 |
| 37749 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37750 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37751 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37752 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37753 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37754 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37755 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37756 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37757 | 0, // dsub1_then_bsub |
| 37758 | 0, // dsub1_then_bsub_hi |
| 37759 | 0, // dsub1_then_hsub |
| 37760 | 0, // dsub1_then_hsub_hi |
| 37761 | 0, // dsub1_then_ssub |
| 37762 | 0, // dsub1_then_ssub_hi |
| 37763 | 0, // dsub3_then_bsub |
| 37764 | 0, // dsub3_then_bsub_hi |
| 37765 | 0, // dsub3_then_hsub |
| 37766 | 0, // dsub3_then_hsub_hi |
| 37767 | 0, // dsub3_then_ssub |
| 37768 | 0, // dsub3_then_ssub_hi |
| 37769 | 0, // dsub2_then_bsub |
| 37770 | 0, // dsub2_then_bsub_hi |
| 37771 | 0, // dsub2_then_hsub |
| 37772 | 0, // dsub2_then_hsub_hi |
| 37773 | 0, // dsub2_then_ssub |
| 37774 | 0, // dsub2_then_ssub_hi |
| 37775 | 0, // psub1_then_psub |
| 37776 | 0, // qsub1_then_dsub_hi |
| 37777 | 0, // qsub3_then_dsub_hi |
| 37778 | 0, // qsub2_then_dsub_hi |
| 37779 | 0, // x8sub_7_then_sub_32 |
| 37780 | 0, // x8sub_7_then_sub_32_hi |
| 37781 | 0, // x8sub_6_then_sub_32 |
| 37782 | 0, // x8sub_6_then_sub_32_hi |
| 37783 | 0, // x8sub_5_then_sub_32 |
| 37784 | 0, // x8sub_5_then_sub_32_hi |
| 37785 | 0, // x8sub_4_then_sub_32 |
| 37786 | 0, // x8sub_4_then_sub_32_hi |
| 37787 | 0, // x8sub_3_then_sub_32 |
| 37788 | 0, // x8sub_3_then_sub_32_hi |
| 37789 | 0, // x8sub_2_then_sub_32 |
| 37790 | 0, // x8sub_2_then_sub_32_hi |
| 37791 | 0, // x8sub_1_then_sub_32 |
| 37792 | 0, // x8sub_1_then_sub_32_hi |
| 37793 | 0, // subo64_then_sub_32 |
| 37794 | 0, // subo64_then_sub_32_hi |
| 37795 | 0, // zsub1_then_zsub_hi |
| 37796 | 0, // zsub3_then_zsub_hi |
| 37797 | 0, // zsub2_then_zsub_hi |
| 37798 | 0, // dsub0_dsub1 |
| 37799 | 0, // dsub0_dsub1_dsub2 |
| 37800 | 0, // dsub1_dsub2 |
| 37801 | 0, // dsub1_dsub2_dsub3 |
| 37802 | 0, // dsub2_dsub3 |
| 37803 | 0, // dsub_dsub1 |
| 37804 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37805 | 0, // dsub_dsub1_dsub2 |
| 37806 | 0, // qsub0_qsub1 |
| 37807 | 0, // qsub0_qsub1_qsub2 |
| 37808 | 0, // qsub1_qsub2 |
| 37809 | 0, // qsub1_qsub2_qsub3 |
| 37810 | 0, // qsub2_qsub3 |
| 37811 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37812 | 0, // x8sub_0_x8sub_1 |
| 37813 | 0, // x8sub_2_x8sub_3 |
| 37814 | 0, // x8sub_4_x8sub_5 |
| 37815 | 0, // x8sub_6_x8sub_7 |
| 37816 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37817 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37818 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37819 | 0, // sub_32_subo64_then_sub_32 |
| 37820 | 0, // zsub_qsub1 |
| 37821 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37822 | 0, // zsub_qsub1_qsub2 |
| 37823 | 0, // zsub0_zsub1 |
| 37824 | 0, // zsub0_zsub1_zsub2 |
| 37825 | 0, // zsub1_zsub2 |
| 37826 | 0, // zsub1_zsub2_zsub3 |
| 37827 | 0, // zsub2_zsub3 |
| 37828 | 0, // zsub0_zsub2 |
| 37829 | 0, // zsub1_zsub3 |
| 37830 | }, |
| 37831 | { // FPR32_with_hsub_in_FPR16_lo |
| 37832 | 44, // bsub -> FPR32_with_hsub_in_FPR16_lo |
| 37833 | 44, // bsub_hi -> FPR32_with_hsub_in_FPR16_lo |
| 37834 | 0, // dsub |
| 37835 | 0, // dsub0 |
| 37836 | 0, // dsub1 |
| 37837 | 0, // dsub2 |
| 37838 | 0, // dsub3 |
| 37839 | 0, // dsub_hi |
| 37840 | 44, // hsub -> FPR32_with_hsub_in_FPR16_lo |
| 37841 | 44, // hsub_hi -> FPR32_with_hsub_in_FPR16_lo |
| 37842 | 0, // psub |
| 37843 | 0, // psub0 |
| 37844 | 0, // psub1 |
| 37845 | 0, // qsub0 |
| 37846 | 0, // qsub1 |
| 37847 | 0, // qsub2 |
| 37848 | 0, // qsub3 |
| 37849 | 0, // ssub |
| 37850 | 0, // ssub_hi |
| 37851 | 0, // sub_32 |
| 37852 | 0, // sub_32_hi |
| 37853 | 0, // sube32 |
| 37854 | 0, // sube64 |
| 37855 | 0, // subo32 |
| 37856 | 0, // subo64 |
| 37857 | 0, // x8sub_0 |
| 37858 | 0, // x8sub_1 |
| 37859 | 0, // x8sub_2 |
| 37860 | 0, // x8sub_3 |
| 37861 | 0, // x8sub_4 |
| 37862 | 0, // x8sub_5 |
| 37863 | 0, // x8sub_6 |
| 37864 | 0, // x8sub_7 |
| 37865 | 0, // zasubb |
| 37866 | 0, // zasubd0 |
| 37867 | 0, // zasubd1 |
| 37868 | 0, // zasubh0 |
| 37869 | 0, // zasubh1 |
| 37870 | 0, // zasubq0 |
| 37871 | 0, // zasubq1 |
| 37872 | 0, // zasubs0 |
| 37873 | 0, // zasubs1 |
| 37874 | 0, // zsub |
| 37875 | 0, // zsub0 |
| 37876 | 0, // zsub1 |
| 37877 | 0, // zsub2 |
| 37878 | 0, // zsub3 |
| 37879 | 0, // zsub_hi |
| 37880 | 0, // zasubd1_then_zasubq0 |
| 37881 | 0, // zasubd1_then_zasubq1 |
| 37882 | 0, // zasubs1_then_zasubd0 |
| 37883 | 0, // zasubs1_then_zasubd1 |
| 37884 | 0, // zasubs1_then_zasubq0 |
| 37885 | 0, // zasubs1_then_zasubq1 |
| 37886 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 37887 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 37888 | 0, // zasubh1_then_zasubd0 |
| 37889 | 0, // zasubh1_then_zasubd1 |
| 37890 | 0, // zasubh1_then_zasubq0 |
| 37891 | 0, // zasubh1_then_zasubq1 |
| 37892 | 0, // zasubh1_then_zasubs0 |
| 37893 | 0, // zasubh1_then_zasubs1 |
| 37894 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 37895 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 37896 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 37897 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 37898 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 37899 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 37900 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 37901 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 37902 | 0, // dsub1_then_bsub |
| 37903 | 0, // dsub1_then_bsub_hi |
| 37904 | 0, // dsub1_then_hsub |
| 37905 | 0, // dsub1_then_hsub_hi |
| 37906 | 0, // dsub1_then_ssub |
| 37907 | 0, // dsub1_then_ssub_hi |
| 37908 | 0, // dsub3_then_bsub |
| 37909 | 0, // dsub3_then_bsub_hi |
| 37910 | 0, // dsub3_then_hsub |
| 37911 | 0, // dsub3_then_hsub_hi |
| 37912 | 0, // dsub3_then_ssub |
| 37913 | 0, // dsub3_then_ssub_hi |
| 37914 | 0, // dsub2_then_bsub |
| 37915 | 0, // dsub2_then_bsub_hi |
| 37916 | 0, // dsub2_then_hsub |
| 37917 | 0, // dsub2_then_hsub_hi |
| 37918 | 0, // dsub2_then_ssub |
| 37919 | 0, // dsub2_then_ssub_hi |
| 37920 | 0, // psub1_then_psub |
| 37921 | 0, // qsub1_then_dsub_hi |
| 37922 | 0, // qsub3_then_dsub_hi |
| 37923 | 0, // qsub2_then_dsub_hi |
| 37924 | 0, // x8sub_7_then_sub_32 |
| 37925 | 0, // x8sub_7_then_sub_32_hi |
| 37926 | 0, // x8sub_6_then_sub_32 |
| 37927 | 0, // x8sub_6_then_sub_32_hi |
| 37928 | 0, // x8sub_5_then_sub_32 |
| 37929 | 0, // x8sub_5_then_sub_32_hi |
| 37930 | 0, // x8sub_4_then_sub_32 |
| 37931 | 0, // x8sub_4_then_sub_32_hi |
| 37932 | 0, // x8sub_3_then_sub_32 |
| 37933 | 0, // x8sub_3_then_sub_32_hi |
| 37934 | 0, // x8sub_2_then_sub_32 |
| 37935 | 0, // x8sub_2_then_sub_32_hi |
| 37936 | 0, // x8sub_1_then_sub_32 |
| 37937 | 0, // x8sub_1_then_sub_32_hi |
| 37938 | 0, // subo64_then_sub_32 |
| 37939 | 0, // subo64_then_sub_32_hi |
| 37940 | 0, // zsub1_then_zsub_hi |
| 37941 | 0, // zsub3_then_zsub_hi |
| 37942 | 0, // zsub2_then_zsub_hi |
| 37943 | 0, // dsub0_dsub1 |
| 37944 | 0, // dsub0_dsub1_dsub2 |
| 37945 | 0, // dsub1_dsub2 |
| 37946 | 0, // dsub1_dsub2_dsub3 |
| 37947 | 0, // dsub2_dsub3 |
| 37948 | 0, // dsub_dsub1 |
| 37949 | 0, // dsub_dsub1_dsub2_dsub3 |
| 37950 | 0, // dsub_dsub1_dsub2 |
| 37951 | 0, // qsub0_qsub1 |
| 37952 | 0, // qsub0_qsub1_qsub2 |
| 37953 | 0, // qsub1_qsub2 |
| 37954 | 0, // qsub1_qsub2_qsub3 |
| 37955 | 0, // qsub2_qsub3 |
| 37956 | 0, // sub_32_x8sub_1_then_sub_32 |
| 37957 | 0, // x8sub_0_x8sub_1 |
| 37958 | 0, // x8sub_2_x8sub_3 |
| 37959 | 0, // x8sub_4_x8sub_5 |
| 37960 | 0, // x8sub_6_x8sub_7 |
| 37961 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 37962 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 37963 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 37964 | 0, // sub_32_subo64_then_sub_32 |
| 37965 | 0, // zsub_qsub1 |
| 37966 | 0, // zsub_qsub1_qsub2_qsub3 |
| 37967 | 0, // zsub_qsub1_qsub2 |
| 37968 | 0, // zsub0_zsub1 |
| 37969 | 0, // zsub0_zsub1_zsub2 |
| 37970 | 0, // zsub1_zsub2 |
| 37971 | 0, // zsub1_zsub2_zsub3 |
| 37972 | 0, // zsub2_zsub3 |
| 37973 | 0, // zsub0_zsub2 |
| 37974 | 0, // zsub1_zsub3 |
| 37975 | }, |
| 37976 | { // GPR32arg |
| 37977 | 0, // bsub |
| 37978 | 0, // bsub_hi |
| 37979 | 0, // dsub |
| 37980 | 0, // dsub0 |
| 37981 | 0, // dsub1 |
| 37982 | 0, // dsub2 |
| 37983 | 0, // dsub3 |
| 37984 | 0, // dsub_hi |
| 37985 | 0, // hsub |
| 37986 | 0, // hsub_hi |
| 37987 | 0, // psub |
| 37988 | 0, // psub0 |
| 37989 | 0, // psub1 |
| 37990 | 0, // qsub0 |
| 37991 | 0, // qsub1 |
| 37992 | 0, // qsub2 |
| 37993 | 0, // qsub3 |
| 37994 | 0, // ssub |
| 37995 | 0, // ssub_hi |
| 37996 | 0, // sub_32 |
| 37997 | 0, // sub_32_hi |
| 37998 | 0, // sube32 |
| 37999 | 0, // sube64 |
| 38000 | 0, // subo32 |
| 38001 | 0, // subo64 |
| 38002 | 0, // x8sub_0 |
| 38003 | 0, // x8sub_1 |
| 38004 | 0, // x8sub_2 |
| 38005 | 0, // x8sub_3 |
| 38006 | 0, // x8sub_4 |
| 38007 | 0, // x8sub_5 |
| 38008 | 0, // x8sub_6 |
| 38009 | 0, // x8sub_7 |
| 38010 | 0, // zasubb |
| 38011 | 0, // zasubd0 |
| 38012 | 0, // zasubd1 |
| 38013 | 0, // zasubh0 |
| 38014 | 0, // zasubh1 |
| 38015 | 0, // zasubq0 |
| 38016 | 0, // zasubq1 |
| 38017 | 0, // zasubs0 |
| 38018 | 0, // zasubs1 |
| 38019 | 0, // zsub |
| 38020 | 0, // zsub0 |
| 38021 | 0, // zsub1 |
| 38022 | 0, // zsub2 |
| 38023 | 0, // zsub3 |
| 38024 | 0, // zsub_hi |
| 38025 | 0, // zasubd1_then_zasubq0 |
| 38026 | 0, // zasubd1_then_zasubq1 |
| 38027 | 0, // zasubs1_then_zasubd0 |
| 38028 | 0, // zasubs1_then_zasubd1 |
| 38029 | 0, // zasubs1_then_zasubq0 |
| 38030 | 0, // zasubs1_then_zasubq1 |
| 38031 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38032 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38033 | 0, // zasubh1_then_zasubd0 |
| 38034 | 0, // zasubh1_then_zasubd1 |
| 38035 | 0, // zasubh1_then_zasubq0 |
| 38036 | 0, // zasubh1_then_zasubq1 |
| 38037 | 0, // zasubh1_then_zasubs0 |
| 38038 | 0, // zasubh1_then_zasubs1 |
| 38039 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38040 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38041 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38042 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38043 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38044 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38045 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38046 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38047 | 0, // dsub1_then_bsub |
| 38048 | 0, // dsub1_then_bsub_hi |
| 38049 | 0, // dsub1_then_hsub |
| 38050 | 0, // dsub1_then_hsub_hi |
| 38051 | 0, // dsub1_then_ssub |
| 38052 | 0, // dsub1_then_ssub_hi |
| 38053 | 0, // dsub3_then_bsub |
| 38054 | 0, // dsub3_then_bsub_hi |
| 38055 | 0, // dsub3_then_hsub |
| 38056 | 0, // dsub3_then_hsub_hi |
| 38057 | 0, // dsub3_then_ssub |
| 38058 | 0, // dsub3_then_ssub_hi |
| 38059 | 0, // dsub2_then_bsub |
| 38060 | 0, // dsub2_then_bsub_hi |
| 38061 | 0, // dsub2_then_hsub |
| 38062 | 0, // dsub2_then_hsub_hi |
| 38063 | 0, // dsub2_then_ssub |
| 38064 | 0, // dsub2_then_ssub_hi |
| 38065 | 0, // psub1_then_psub |
| 38066 | 0, // qsub1_then_dsub_hi |
| 38067 | 0, // qsub3_then_dsub_hi |
| 38068 | 0, // qsub2_then_dsub_hi |
| 38069 | 0, // x8sub_7_then_sub_32 |
| 38070 | 0, // x8sub_7_then_sub_32_hi |
| 38071 | 0, // x8sub_6_then_sub_32 |
| 38072 | 0, // x8sub_6_then_sub_32_hi |
| 38073 | 0, // x8sub_5_then_sub_32 |
| 38074 | 0, // x8sub_5_then_sub_32_hi |
| 38075 | 0, // x8sub_4_then_sub_32 |
| 38076 | 0, // x8sub_4_then_sub_32_hi |
| 38077 | 0, // x8sub_3_then_sub_32 |
| 38078 | 0, // x8sub_3_then_sub_32_hi |
| 38079 | 0, // x8sub_2_then_sub_32 |
| 38080 | 0, // x8sub_2_then_sub_32_hi |
| 38081 | 0, // x8sub_1_then_sub_32 |
| 38082 | 0, // x8sub_1_then_sub_32_hi |
| 38083 | 0, // subo64_then_sub_32 |
| 38084 | 0, // subo64_then_sub_32_hi |
| 38085 | 0, // zsub1_then_zsub_hi |
| 38086 | 0, // zsub3_then_zsub_hi |
| 38087 | 0, // zsub2_then_zsub_hi |
| 38088 | 0, // dsub0_dsub1 |
| 38089 | 0, // dsub0_dsub1_dsub2 |
| 38090 | 0, // dsub1_dsub2 |
| 38091 | 0, // dsub1_dsub2_dsub3 |
| 38092 | 0, // dsub2_dsub3 |
| 38093 | 0, // dsub_dsub1 |
| 38094 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38095 | 0, // dsub_dsub1_dsub2 |
| 38096 | 0, // qsub0_qsub1 |
| 38097 | 0, // qsub0_qsub1_qsub2 |
| 38098 | 0, // qsub1_qsub2 |
| 38099 | 0, // qsub1_qsub2_qsub3 |
| 38100 | 0, // qsub2_qsub3 |
| 38101 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38102 | 0, // x8sub_0_x8sub_1 |
| 38103 | 0, // x8sub_2_x8sub_3 |
| 38104 | 0, // x8sub_4_x8sub_5 |
| 38105 | 0, // x8sub_6_x8sub_7 |
| 38106 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38107 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38108 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38109 | 0, // sub_32_subo64_then_sub_32 |
| 38110 | 0, // zsub_qsub1 |
| 38111 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38112 | 0, // zsub_qsub1_qsub2 |
| 38113 | 0, // zsub0_zsub1 |
| 38114 | 0, // zsub0_zsub1_zsub2 |
| 38115 | 0, // zsub1_zsub2 |
| 38116 | 0, // zsub1_zsub2_zsub3 |
| 38117 | 0, // zsub2_zsub3 |
| 38118 | 0, // zsub0_zsub2 |
| 38119 | 0, // zsub1_zsub3 |
| 38120 | }, |
| 38121 | { // MatrixIndexGPR32_12_15 |
| 38122 | 0, // bsub |
| 38123 | 0, // bsub_hi |
| 38124 | 0, // dsub |
| 38125 | 0, // dsub0 |
| 38126 | 0, // dsub1 |
| 38127 | 0, // dsub2 |
| 38128 | 0, // dsub3 |
| 38129 | 0, // dsub_hi |
| 38130 | 0, // hsub |
| 38131 | 0, // hsub_hi |
| 38132 | 0, // psub |
| 38133 | 0, // psub0 |
| 38134 | 0, // psub1 |
| 38135 | 0, // qsub0 |
| 38136 | 0, // qsub1 |
| 38137 | 0, // qsub2 |
| 38138 | 0, // qsub3 |
| 38139 | 0, // ssub |
| 38140 | 0, // ssub_hi |
| 38141 | 0, // sub_32 |
| 38142 | 0, // sub_32_hi |
| 38143 | 0, // sube32 |
| 38144 | 0, // sube64 |
| 38145 | 0, // subo32 |
| 38146 | 0, // subo64 |
| 38147 | 0, // x8sub_0 |
| 38148 | 0, // x8sub_1 |
| 38149 | 0, // x8sub_2 |
| 38150 | 0, // x8sub_3 |
| 38151 | 0, // x8sub_4 |
| 38152 | 0, // x8sub_5 |
| 38153 | 0, // x8sub_6 |
| 38154 | 0, // x8sub_7 |
| 38155 | 0, // zasubb |
| 38156 | 0, // zasubd0 |
| 38157 | 0, // zasubd1 |
| 38158 | 0, // zasubh0 |
| 38159 | 0, // zasubh1 |
| 38160 | 0, // zasubq0 |
| 38161 | 0, // zasubq1 |
| 38162 | 0, // zasubs0 |
| 38163 | 0, // zasubs1 |
| 38164 | 0, // zsub |
| 38165 | 0, // zsub0 |
| 38166 | 0, // zsub1 |
| 38167 | 0, // zsub2 |
| 38168 | 0, // zsub3 |
| 38169 | 0, // zsub_hi |
| 38170 | 0, // zasubd1_then_zasubq0 |
| 38171 | 0, // zasubd1_then_zasubq1 |
| 38172 | 0, // zasubs1_then_zasubd0 |
| 38173 | 0, // zasubs1_then_zasubd1 |
| 38174 | 0, // zasubs1_then_zasubq0 |
| 38175 | 0, // zasubs1_then_zasubq1 |
| 38176 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38177 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38178 | 0, // zasubh1_then_zasubd0 |
| 38179 | 0, // zasubh1_then_zasubd1 |
| 38180 | 0, // zasubh1_then_zasubq0 |
| 38181 | 0, // zasubh1_then_zasubq1 |
| 38182 | 0, // zasubh1_then_zasubs0 |
| 38183 | 0, // zasubh1_then_zasubs1 |
| 38184 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38185 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38186 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38187 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38188 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38189 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38190 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38191 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38192 | 0, // dsub1_then_bsub |
| 38193 | 0, // dsub1_then_bsub_hi |
| 38194 | 0, // dsub1_then_hsub |
| 38195 | 0, // dsub1_then_hsub_hi |
| 38196 | 0, // dsub1_then_ssub |
| 38197 | 0, // dsub1_then_ssub_hi |
| 38198 | 0, // dsub3_then_bsub |
| 38199 | 0, // dsub3_then_bsub_hi |
| 38200 | 0, // dsub3_then_hsub |
| 38201 | 0, // dsub3_then_hsub_hi |
| 38202 | 0, // dsub3_then_ssub |
| 38203 | 0, // dsub3_then_ssub_hi |
| 38204 | 0, // dsub2_then_bsub |
| 38205 | 0, // dsub2_then_bsub_hi |
| 38206 | 0, // dsub2_then_hsub |
| 38207 | 0, // dsub2_then_hsub_hi |
| 38208 | 0, // dsub2_then_ssub |
| 38209 | 0, // dsub2_then_ssub_hi |
| 38210 | 0, // psub1_then_psub |
| 38211 | 0, // qsub1_then_dsub_hi |
| 38212 | 0, // qsub3_then_dsub_hi |
| 38213 | 0, // qsub2_then_dsub_hi |
| 38214 | 0, // x8sub_7_then_sub_32 |
| 38215 | 0, // x8sub_7_then_sub_32_hi |
| 38216 | 0, // x8sub_6_then_sub_32 |
| 38217 | 0, // x8sub_6_then_sub_32_hi |
| 38218 | 0, // x8sub_5_then_sub_32 |
| 38219 | 0, // x8sub_5_then_sub_32_hi |
| 38220 | 0, // x8sub_4_then_sub_32 |
| 38221 | 0, // x8sub_4_then_sub_32_hi |
| 38222 | 0, // x8sub_3_then_sub_32 |
| 38223 | 0, // x8sub_3_then_sub_32_hi |
| 38224 | 0, // x8sub_2_then_sub_32 |
| 38225 | 0, // x8sub_2_then_sub_32_hi |
| 38226 | 0, // x8sub_1_then_sub_32 |
| 38227 | 0, // x8sub_1_then_sub_32_hi |
| 38228 | 0, // subo64_then_sub_32 |
| 38229 | 0, // subo64_then_sub_32_hi |
| 38230 | 0, // zsub1_then_zsub_hi |
| 38231 | 0, // zsub3_then_zsub_hi |
| 38232 | 0, // zsub2_then_zsub_hi |
| 38233 | 0, // dsub0_dsub1 |
| 38234 | 0, // dsub0_dsub1_dsub2 |
| 38235 | 0, // dsub1_dsub2 |
| 38236 | 0, // dsub1_dsub2_dsub3 |
| 38237 | 0, // dsub2_dsub3 |
| 38238 | 0, // dsub_dsub1 |
| 38239 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38240 | 0, // dsub_dsub1_dsub2 |
| 38241 | 0, // qsub0_qsub1 |
| 38242 | 0, // qsub0_qsub1_qsub2 |
| 38243 | 0, // qsub1_qsub2 |
| 38244 | 0, // qsub1_qsub2_qsub3 |
| 38245 | 0, // qsub2_qsub3 |
| 38246 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38247 | 0, // x8sub_0_x8sub_1 |
| 38248 | 0, // x8sub_2_x8sub_3 |
| 38249 | 0, // x8sub_4_x8sub_5 |
| 38250 | 0, // x8sub_6_x8sub_7 |
| 38251 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38252 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38253 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38254 | 0, // sub_32_subo64_then_sub_32 |
| 38255 | 0, // zsub_qsub1 |
| 38256 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38257 | 0, // zsub_qsub1_qsub2 |
| 38258 | 0, // zsub0_zsub1 |
| 38259 | 0, // zsub0_zsub1_zsub2 |
| 38260 | 0, // zsub1_zsub2 |
| 38261 | 0, // zsub1_zsub2_zsub3 |
| 38262 | 0, // zsub2_zsub3 |
| 38263 | 0, // zsub0_zsub2 |
| 38264 | 0, // zsub1_zsub3 |
| 38265 | }, |
| 38266 | { // MatrixIndexGPR32_8_11 |
| 38267 | 0, // bsub |
| 38268 | 0, // bsub_hi |
| 38269 | 0, // dsub |
| 38270 | 0, // dsub0 |
| 38271 | 0, // dsub1 |
| 38272 | 0, // dsub2 |
| 38273 | 0, // dsub3 |
| 38274 | 0, // dsub_hi |
| 38275 | 0, // hsub |
| 38276 | 0, // hsub_hi |
| 38277 | 0, // psub |
| 38278 | 0, // psub0 |
| 38279 | 0, // psub1 |
| 38280 | 0, // qsub0 |
| 38281 | 0, // qsub1 |
| 38282 | 0, // qsub2 |
| 38283 | 0, // qsub3 |
| 38284 | 0, // ssub |
| 38285 | 0, // ssub_hi |
| 38286 | 0, // sub_32 |
| 38287 | 0, // sub_32_hi |
| 38288 | 0, // sube32 |
| 38289 | 0, // sube64 |
| 38290 | 0, // subo32 |
| 38291 | 0, // subo64 |
| 38292 | 0, // x8sub_0 |
| 38293 | 0, // x8sub_1 |
| 38294 | 0, // x8sub_2 |
| 38295 | 0, // x8sub_3 |
| 38296 | 0, // x8sub_4 |
| 38297 | 0, // x8sub_5 |
| 38298 | 0, // x8sub_6 |
| 38299 | 0, // x8sub_7 |
| 38300 | 0, // zasubb |
| 38301 | 0, // zasubd0 |
| 38302 | 0, // zasubd1 |
| 38303 | 0, // zasubh0 |
| 38304 | 0, // zasubh1 |
| 38305 | 0, // zasubq0 |
| 38306 | 0, // zasubq1 |
| 38307 | 0, // zasubs0 |
| 38308 | 0, // zasubs1 |
| 38309 | 0, // zsub |
| 38310 | 0, // zsub0 |
| 38311 | 0, // zsub1 |
| 38312 | 0, // zsub2 |
| 38313 | 0, // zsub3 |
| 38314 | 0, // zsub_hi |
| 38315 | 0, // zasubd1_then_zasubq0 |
| 38316 | 0, // zasubd1_then_zasubq1 |
| 38317 | 0, // zasubs1_then_zasubd0 |
| 38318 | 0, // zasubs1_then_zasubd1 |
| 38319 | 0, // zasubs1_then_zasubq0 |
| 38320 | 0, // zasubs1_then_zasubq1 |
| 38321 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38322 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38323 | 0, // zasubh1_then_zasubd0 |
| 38324 | 0, // zasubh1_then_zasubd1 |
| 38325 | 0, // zasubh1_then_zasubq0 |
| 38326 | 0, // zasubh1_then_zasubq1 |
| 38327 | 0, // zasubh1_then_zasubs0 |
| 38328 | 0, // zasubh1_then_zasubs1 |
| 38329 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38330 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38331 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38332 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38333 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38334 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38335 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38336 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38337 | 0, // dsub1_then_bsub |
| 38338 | 0, // dsub1_then_bsub_hi |
| 38339 | 0, // dsub1_then_hsub |
| 38340 | 0, // dsub1_then_hsub_hi |
| 38341 | 0, // dsub1_then_ssub |
| 38342 | 0, // dsub1_then_ssub_hi |
| 38343 | 0, // dsub3_then_bsub |
| 38344 | 0, // dsub3_then_bsub_hi |
| 38345 | 0, // dsub3_then_hsub |
| 38346 | 0, // dsub3_then_hsub_hi |
| 38347 | 0, // dsub3_then_ssub |
| 38348 | 0, // dsub3_then_ssub_hi |
| 38349 | 0, // dsub2_then_bsub |
| 38350 | 0, // dsub2_then_bsub_hi |
| 38351 | 0, // dsub2_then_hsub |
| 38352 | 0, // dsub2_then_hsub_hi |
| 38353 | 0, // dsub2_then_ssub |
| 38354 | 0, // dsub2_then_ssub_hi |
| 38355 | 0, // psub1_then_psub |
| 38356 | 0, // qsub1_then_dsub_hi |
| 38357 | 0, // qsub3_then_dsub_hi |
| 38358 | 0, // qsub2_then_dsub_hi |
| 38359 | 0, // x8sub_7_then_sub_32 |
| 38360 | 0, // x8sub_7_then_sub_32_hi |
| 38361 | 0, // x8sub_6_then_sub_32 |
| 38362 | 0, // x8sub_6_then_sub_32_hi |
| 38363 | 0, // x8sub_5_then_sub_32 |
| 38364 | 0, // x8sub_5_then_sub_32_hi |
| 38365 | 0, // x8sub_4_then_sub_32 |
| 38366 | 0, // x8sub_4_then_sub_32_hi |
| 38367 | 0, // x8sub_3_then_sub_32 |
| 38368 | 0, // x8sub_3_then_sub_32_hi |
| 38369 | 0, // x8sub_2_then_sub_32 |
| 38370 | 0, // x8sub_2_then_sub_32_hi |
| 38371 | 0, // x8sub_1_then_sub_32 |
| 38372 | 0, // x8sub_1_then_sub_32_hi |
| 38373 | 0, // subo64_then_sub_32 |
| 38374 | 0, // subo64_then_sub_32_hi |
| 38375 | 0, // zsub1_then_zsub_hi |
| 38376 | 0, // zsub3_then_zsub_hi |
| 38377 | 0, // zsub2_then_zsub_hi |
| 38378 | 0, // dsub0_dsub1 |
| 38379 | 0, // dsub0_dsub1_dsub2 |
| 38380 | 0, // dsub1_dsub2 |
| 38381 | 0, // dsub1_dsub2_dsub3 |
| 38382 | 0, // dsub2_dsub3 |
| 38383 | 0, // dsub_dsub1 |
| 38384 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38385 | 0, // dsub_dsub1_dsub2 |
| 38386 | 0, // qsub0_qsub1 |
| 38387 | 0, // qsub0_qsub1_qsub2 |
| 38388 | 0, // qsub1_qsub2 |
| 38389 | 0, // qsub1_qsub2_qsub3 |
| 38390 | 0, // qsub2_qsub3 |
| 38391 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38392 | 0, // x8sub_0_x8sub_1 |
| 38393 | 0, // x8sub_2_x8sub_3 |
| 38394 | 0, // x8sub_4_x8sub_5 |
| 38395 | 0, // x8sub_6_x8sub_7 |
| 38396 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38397 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38398 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38399 | 0, // sub_32_subo64_then_sub_32 |
| 38400 | 0, // zsub_qsub1 |
| 38401 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38402 | 0, // zsub_qsub1_qsub2 |
| 38403 | 0, // zsub0_zsub1 |
| 38404 | 0, // zsub0_zsub1_zsub2 |
| 38405 | 0, // zsub1_zsub2 |
| 38406 | 0, // zsub1_zsub2_zsub3 |
| 38407 | 0, // zsub2_zsub3 |
| 38408 | 0, // zsub0_zsub2 |
| 38409 | 0, // zsub1_zsub3 |
| 38410 | }, |
| 38411 | { // CCR |
| 38412 | 0, // bsub |
| 38413 | 0, // bsub_hi |
| 38414 | 0, // dsub |
| 38415 | 0, // dsub0 |
| 38416 | 0, // dsub1 |
| 38417 | 0, // dsub2 |
| 38418 | 0, // dsub3 |
| 38419 | 0, // dsub_hi |
| 38420 | 0, // hsub |
| 38421 | 0, // hsub_hi |
| 38422 | 0, // psub |
| 38423 | 0, // psub0 |
| 38424 | 0, // psub1 |
| 38425 | 0, // qsub0 |
| 38426 | 0, // qsub1 |
| 38427 | 0, // qsub2 |
| 38428 | 0, // qsub3 |
| 38429 | 0, // ssub |
| 38430 | 0, // ssub_hi |
| 38431 | 0, // sub_32 |
| 38432 | 0, // sub_32_hi |
| 38433 | 0, // sube32 |
| 38434 | 0, // sube64 |
| 38435 | 0, // subo32 |
| 38436 | 0, // subo64 |
| 38437 | 0, // x8sub_0 |
| 38438 | 0, // x8sub_1 |
| 38439 | 0, // x8sub_2 |
| 38440 | 0, // x8sub_3 |
| 38441 | 0, // x8sub_4 |
| 38442 | 0, // x8sub_5 |
| 38443 | 0, // x8sub_6 |
| 38444 | 0, // x8sub_7 |
| 38445 | 0, // zasubb |
| 38446 | 0, // zasubd0 |
| 38447 | 0, // zasubd1 |
| 38448 | 0, // zasubh0 |
| 38449 | 0, // zasubh1 |
| 38450 | 0, // zasubq0 |
| 38451 | 0, // zasubq1 |
| 38452 | 0, // zasubs0 |
| 38453 | 0, // zasubs1 |
| 38454 | 0, // zsub |
| 38455 | 0, // zsub0 |
| 38456 | 0, // zsub1 |
| 38457 | 0, // zsub2 |
| 38458 | 0, // zsub3 |
| 38459 | 0, // zsub_hi |
| 38460 | 0, // zasubd1_then_zasubq0 |
| 38461 | 0, // zasubd1_then_zasubq1 |
| 38462 | 0, // zasubs1_then_zasubd0 |
| 38463 | 0, // zasubs1_then_zasubd1 |
| 38464 | 0, // zasubs1_then_zasubq0 |
| 38465 | 0, // zasubs1_then_zasubq1 |
| 38466 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38467 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38468 | 0, // zasubh1_then_zasubd0 |
| 38469 | 0, // zasubh1_then_zasubd1 |
| 38470 | 0, // zasubh1_then_zasubq0 |
| 38471 | 0, // zasubh1_then_zasubq1 |
| 38472 | 0, // zasubh1_then_zasubs0 |
| 38473 | 0, // zasubh1_then_zasubs1 |
| 38474 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38475 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38476 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38477 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38478 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38479 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38480 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38481 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38482 | 0, // dsub1_then_bsub |
| 38483 | 0, // dsub1_then_bsub_hi |
| 38484 | 0, // dsub1_then_hsub |
| 38485 | 0, // dsub1_then_hsub_hi |
| 38486 | 0, // dsub1_then_ssub |
| 38487 | 0, // dsub1_then_ssub_hi |
| 38488 | 0, // dsub3_then_bsub |
| 38489 | 0, // dsub3_then_bsub_hi |
| 38490 | 0, // dsub3_then_hsub |
| 38491 | 0, // dsub3_then_hsub_hi |
| 38492 | 0, // dsub3_then_ssub |
| 38493 | 0, // dsub3_then_ssub_hi |
| 38494 | 0, // dsub2_then_bsub |
| 38495 | 0, // dsub2_then_bsub_hi |
| 38496 | 0, // dsub2_then_hsub |
| 38497 | 0, // dsub2_then_hsub_hi |
| 38498 | 0, // dsub2_then_ssub |
| 38499 | 0, // dsub2_then_ssub_hi |
| 38500 | 0, // psub1_then_psub |
| 38501 | 0, // qsub1_then_dsub_hi |
| 38502 | 0, // qsub3_then_dsub_hi |
| 38503 | 0, // qsub2_then_dsub_hi |
| 38504 | 0, // x8sub_7_then_sub_32 |
| 38505 | 0, // x8sub_7_then_sub_32_hi |
| 38506 | 0, // x8sub_6_then_sub_32 |
| 38507 | 0, // x8sub_6_then_sub_32_hi |
| 38508 | 0, // x8sub_5_then_sub_32 |
| 38509 | 0, // x8sub_5_then_sub_32_hi |
| 38510 | 0, // x8sub_4_then_sub_32 |
| 38511 | 0, // x8sub_4_then_sub_32_hi |
| 38512 | 0, // x8sub_3_then_sub_32 |
| 38513 | 0, // x8sub_3_then_sub_32_hi |
| 38514 | 0, // x8sub_2_then_sub_32 |
| 38515 | 0, // x8sub_2_then_sub_32_hi |
| 38516 | 0, // x8sub_1_then_sub_32 |
| 38517 | 0, // x8sub_1_then_sub_32_hi |
| 38518 | 0, // subo64_then_sub_32 |
| 38519 | 0, // subo64_then_sub_32_hi |
| 38520 | 0, // zsub1_then_zsub_hi |
| 38521 | 0, // zsub3_then_zsub_hi |
| 38522 | 0, // zsub2_then_zsub_hi |
| 38523 | 0, // dsub0_dsub1 |
| 38524 | 0, // dsub0_dsub1_dsub2 |
| 38525 | 0, // dsub1_dsub2 |
| 38526 | 0, // dsub1_dsub2_dsub3 |
| 38527 | 0, // dsub2_dsub3 |
| 38528 | 0, // dsub_dsub1 |
| 38529 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38530 | 0, // dsub_dsub1_dsub2 |
| 38531 | 0, // qsub0_qsub1 |
| 38532 | 0, // qsub0_qsub1_qsub2 |
| 38533 | 0, // qsub1_qsub2 |
| 38534 | 0, // qsub1_qsub2_qsub3 |
| 38535 | 0, // qsub2_qsub3 |
| 38536 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38537 | 0, // x8sub_0_x8sub_1 |
| 38538 | 0, // x8sub_2_x8sub_3 |
| 38539 | 0, // x8sub_4_x8sub_5 |
| 38540 | 0, // x8sub_6_x8sub_7 |
| 38541 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38542 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38543 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38544 | 0, // sub_32_subo64_then_sub_32 |
| 38545 | 0, // zsub_qsub1 |
| 38546 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38547 | 0, // zsub_qsub1_qsub2 |
| 38548 | 0, // zsub0_zsub1 |
| 38549 | 0, // zsub0_zsub1_zsub2 |
| 38550 | 0, // zsub1_zsub2 |
| 38551 | 0, // zsub1_zsub2_zsub3 |
| 38552 | 0, // zsub2_zsub3 |
| 38553 | 0, // zsub0_zsub2 |
| 38554 | 0, // zsub1_zsub3 |
| 38555 | }, |
| 38556 | { // GPR32sponly |
| 38557 | 0, // bsub |
| 38558 | 0, // bsub_hi |
| 38559 | 0, // dsub |
| 38560 | 0, // dsub0 |
| 38561 | 0, // dsub1 |
| 38562 | 0, // dsub2 |
| 38563 | 0, // dsub3 |
| 38564 | 0, // dsub_hi |
| 38565 | 0, // hsub |
| 38566 | 0, // hsub_hi |
| 38567 | 0, // psub |
| 38568 | 0, // psub0 |
| 38569 | 0, // psub1 |
| 38570 | 0, // qsub0 |
| 38571 | 0, // qsub1 |
| 38572 | 0, // qsub2 |
| 38573 | 0, // qsub3 |
| 38574 | 0, // ssub |
| 38575 | 0, // ssub_hi |
| 38576 | 0, // sub_32 |
| 38577 | 0, // sub_32_hi |
| 38578 | 0, // sube32 |
| 38579 | 0, // sube64 |
| 38580 | 0, // subo32 |
| 38581 | 0, // subo64 |
| 38582 | 0, // x8sub_0 |
| 38583 | 0, // x8sub_1 |
| 38584 | 0, // x8sub_2 |
| 38585 | 0, // x8sub_3 |
| 38586 | 0, // x8sub_4 |
| 38587 | 0, // x8sub_5 |
| 38588 | 0, // x8sub_6 |
| 38589 | 0, // x8sub_7 |
| 38590 | 0, // zasubb |
| 38591 | 0, // zasubd0 |
| 38592 | 0, // zasubd1 |
| 38593 | 0, // zasubh0 |
| 38594 | 0, // zasubh1 |
| 38595 | 0, // zasubq0 |
| 38596 | 0, // zasubq1 |
| 38597 | 0, // zasubs0 |
| 38598 | 0, // zasubs1 |
| 38599 | 0, // zsub |
| 38600 | 0, // zsub0 |
| 38601 | 0, // zsub1 |
| 38602 | 0, // zsub2 |
| 38603 | 0, // zsub3 |
| 38604 | 0, // zsub_hi |
| 38605 | 0, // zasubd1_then_zasubq0 |
| 38606 | 0, // zasubd1_then_zasubq1 |
| 38607 | 0, // zasubs1_then_zasubd0 |
| 38608 | 0, // zasubs1_then_zasubd1 |
| 38609 | 0, // zasubs1_then_zasubq0 |
| 38610 | 0, // zasubs1_then_zasubq1 |
| 38611 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38612 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38613 | 0, // zasubh1_then_zasubd0 |
| 38614 | 0, // zasubh1_then_zasubd1 |
| 38615 | 0, // zasubh1_then_zasubq0 |
| 38616 | 0, // zasubh1_then_zasubq1 |
| 38617 | 0, // zasubh1_then_zasubs0 |
| 38618 | 0, // zasubh1_then_zasubs1 |
| 38619 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38620 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38621 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38622 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38623 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38624 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38625 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38626 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38627 | 0, // dsub1_then_bsub |
| 38628 | 0, // dsub1_then_bsub_hi |
| 38629 | 0, // dsub1_then_hsub |
| 38630 | 0, // dsub1_then_hsub_hi |
| 38631 | 0, // dsub1_then_ssub |
| 38632 | 0, // dsub1_then_ssub_hi |
| 38633 | 0, // dsub3_then_bsub |
| 38634 | 0, // dsub3_then_bsub_hi |
| 38635 | 0, // dsub3_then_hsub |
| 38636 | 0, // dsub3_then_hsub_hi |
| 38637 | 0, // dsub3_then_ssub |
| 38638 | 0, // dsub3_then_ssub_hi |
| 38639 | 0, // dsub2_then_bsub |
| 38640 | 0, // dsub2_then_bsub_hi |
| 38641 | 0, // dsub2_then_hsub |
| 38642 | 0, // dsub2_then_hsub_hi |
| 38643 | 0, // dsub2_then_ssub |
| 38644 | 0, // dsub2_then_ssub_hi |
| 38645 | 0, // psub1_then_psub |
| 38646 | 0, // qsub1_then_dsub_hi |
| 38647 | 0, // qsub3_then_dsub_hi |
| 38648 | 0, // qsub2_then_dsub_hi |
| 38649 | 0, // x8sub_7_then_sub_32 |
| 38650 | 0, // x8sub_7_then_sub_32_hi |
| 38651 | 0, // x8sub_6_then_sub_32 |
| 38652 | 0, // x8sub_6_then_sub_32_hi |
| 38653 | 0, // x8sub_5_then_sub_32 |
| 38654 | 0, // x8sub_5_then_sub_32_hi |
| 38655 | 0, // x8sub_4_then_sub_32 |
| 38656 | 0, // x8sub_4_then_sub_32_hi |
| 38657 | 0, // x8sub_3_then_sub_32 |
| 38658 | 0, // x8sub_3_then_sub_32_hi |
| 38659 | 0, // x8sub_2_then_sub_32 |
| 38660 | 0, // x8sub_2_then_sub_32_hi |
| 38661 | 0, // x8sub_1_then_sub_32 |
| 38662 | 0, // x8sub_1_then_sub_32_hi |
| 38663 | 0, // subo64_then_sub_32 |
| 38664 | 0, // subo64_then_sub_32_hi |
| 38665 | 0, // zsub1_then_zsub_hi |
| 38666 | 0, // zsub3_then_zsub_hi |
| 38667 | 0, // zsub2_then_zsub_hi |
| 38668 | 0, // dsub0_dsub1 |
| 38669 | 0, // dsub0_dsub1_dsub2 |
| 38670 | 0, // dsub1_dsub2 |
| 38671 | 0, // dsub1_dsub2_dsub3 |
| 38672 | 0, // dsub2_dsub3 |
| 38673 | 0, // dsub_dsub1 |
| 38674 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38675 | 0, // dsub_dsub1_dsub2 |
| 38676 | 0, // qsub0_qsub1 |
| 38677 | 0, // qsub0_qsub1_qsub2 |
| 38678 | 0, // qsub1_qsub2 |
| 38679 | 0, // qsub1_qsub2_qsub3 |
| 38680 | 0, // qsub2_qsub3 |
| 38681 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38682 | 0, // x8sub_0_x8sub_1 |
| 38683 | 0, // x8sub_2_x8sub_3 |
| 38684 | 0, // x8sub_4_x8sub_5 |
| 38685 | 0, // x8sub_6_x8sub_7 |
| 38686 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38687 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38688 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38689 | 0, // sub_32_subo64_then_sub_32 |
| 38690 | 0, // zsub_qsub1 |
| 38691 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38692 | 0, // zsub_qsub1_qsub2 |
| 38693 | 0, // zsub0_zsub1 |
| 38694 | 0, // zsub0_zsub1_zsub2 |
| 38695 | 0, // zsub1_zsub2 |
| 38696 | 0, // zsub1_zsub2_zsub3 |
| 38697 | 0, // zsub2_zsub3 |
| 38698 | 0, // zsub0_zsub2 |
| 38699 | 0, // zsub1_zsub3 |
| 38700 | }, |
| 38701 | { // WSeqPairsClass |
| 38702 | 0, // bsub |
| 38703 | 0, // bsub_hi |
| 38704 | 0, // dsub |
| 38705 | 0, // dsub0 |
| 38706 | 0, // dsub1 |
| 38707 | 0, // dsub2 |
| 38708 | 0, // dsub3 |
| 38709 | 0, // dsub_hi |
| 38710 | 0, // hsub |
| 38711 | 0, // hsub_hi |
| 38712 | 0, // psub |
| 38713 | 0, // psub0 |
| 38714 | 0, // psub1 |
| 38715 | 0, // qsub0 |
| 38716 | 0, // qsub1 |
| 38717 | 0, // qsub2 |
| 38718 | 0, // qsub3 |
| 38719 | 0, // ssub |
| 38720 | 0, // ssub_hi |
| 38721 | 0, // sub_32 |
| 38722 | 0, // sub_32_hi |
| 38723 | 50, // sube32 -> WSeqPairsClass |
| 38724 | 0, // sube64 |
| 38725 | 50, // subo32 -> WSeqPairsClass |
| 38726 | 0, // subo64 |
| 38727 | 0, // x8sub_0 |
| 38728 | 0, // x8sub_1 |
| 38729 | 0, // x8sub_2 |
| 38730 | 0, // x8sub_3 |
| 38731 | 0, // x8sub_4 |
| 38732 | 0, // x8sub_5 |
| 38733 | 0, // x8sub_6 |
| 38734 | 0, // x8sub_7 |
| 38735 | 0, // zasubb |
| 38736 | 0, // zasubd0 |
| 38737 | 0, // zasubd1 |
| 38738 | 0, // zasubh0 |
| 38739 | 0, // zasubh1 |
| 38740 | 0, // zasubq0 |
| 38741 | 0, // zasubq1 |
| 38742 | 0, // zasubs0 |
| 38743 | 0, // zasubs1 |
| 38744 | 0, // zsub |
| 38745 | 0, // zsub0 |
| 38746 | 0, // zsub1 |
| 38747 | 0, // zsub2 |
| 38748 | 0, // zsub3 |
| 38749 | 0, // zsub_hi |
| 38750 | 0, // zasubd1_then_zasubq0 |
| 38751 | 0, // zasubd1_then_zasubq1 |
| 38752 | 0, // zasubs1_then_zasubd0 |
| 38753 | 0, // zasubs1_then_zasubd1 |
| 38754 | 0, // zasubs1_then_zasubq0 |
| 38755 | 0, // zasubs1_then_zasubq1 |
| 38756 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38757 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38758 | 0, // zasubh1_then_zasubd0 |
| 38759 | 0, // zasubh1_then_zasubd1 |
| 38760 | 0, // zasubh1_then_zasubq0 |
| 38761 | 0, // zasubh1_then_zasubq1 |
| 38762 | 0, // zasubh1_then_zasubs0 |
| 38763 | 0, // zasubh1_then_zasubs1 |
| 38764 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38765 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38766 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38767 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38768 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38769 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38770 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38771 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38772 | 0, // dsub1_then_bsub |
| 38773 | 0, // dsub1_then_bsub_hi |
| 38774 | 0, // dsub1_then_hsub |
| 38775 | 0, // dsub1_then_hsub_hi |
| 38776 | 0, // dsub1_then_ssub |
| 38777 | 0, // dsub1_then_ssub_hi |
| 38778 | 0, // dsub3_then_bsub |
| 38779 | 0, // dsub3_then_bsub_hi |
| 38780 | 0, // dsub3_then_hsub |
| 38781 | 0, // dsub3_then_hsub_hi |
| 38782 | 0, // dsub3_then_ssub |
| 38783 | 0, // dsub3_then_ssub_hi |
| 38784 | 0, // dsub2_then_bsub |
| 38785 | 0, // dsub2_then_bsub_hi |
| 38786 | 0, // dsub2_then_hsub |
| 38787 | 0, // dsub2_then_hsub_hi |
| 38788 | 0, // dsub2_then_ssub |
| 38789 | 0, // dsub2_then_ssub_hi |
| 38790 | 0, // psub1_then_psub |
| 38791 | 0, // qsub1_then_dsub_hi |
| 38792 | 0, // qsub3_then_dsub_hi |
| 38793 | 0, // qsub2_then_dsub_hi |
| 38794 | 0, // x8sub_7_then_sub_32 |
| 38795 | 0, // x8sub_7_then_sub_32_hi |
| 38796 | 0, // x8sub_6_then_sub_32 |
| 38797 | 0, // x8sub_6_then_sub_32_hi |
| 38798 | 0, // x8sub_5_then_sub_32 |
| 38799 | 0, // x8sub_5_then_sub_32_hi |
| 38800 | 0, // x8sub_4_then_sub_32 |
| 38801 | 0, // x8sub_4_then_sub_32_hi |
| 38802 | 0, // x8sub_3_then_sub_32 |
| 38803 | 0, // x8sub_3_then_sub_32_hi |
| 38804 | 0, // x8sub_2_then_sub_32 |
| 38805 | 0, // x8sub_2_then_sub_32_hi |
| 38806 | 0, // x8sub_1_then_sub_32 |
| 38807 | 0, // x8sub_1_then_sub_32_hi |
| 38808 | 0, // subo64_then_sub_32 |
| 38809 | 0, // subo64_then_sub_32_hi |
| 38810 | 0, // zsub1_then_zsub_hi |
| 38811 | 0, // zsub3_then_zsub_hi |
| 38812 | 0, // zsub2_then_zsub_hi |
| 38813 | 0, // dsub0_dsub1 |
| 38814 | 0, // dsub0_dsub1_dsub2 |
| 38815 | 0, // dsub1_dsub2 |
| 38816 | 0, // dsub1_dsub2_dsub3 |
| 38817 | 0, // dsub2_dsub3 |
| 38818 | 0, // dsub_dsub1 |
| 38819 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38820 | 0, // dsub_dsub1_dsub2 |
| 38821 | 0, // qsub0_qsub1 |
| 38822 | 0, // qsub0_qsub1_qsub2 |
| 38823 | 0, // qsub1_qsub2 |
| 38824 | 0, // qsub1_qsub2_qsub3 |
| 38825 | 0, // qsub2_qsub3 |
| 38826 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38827 | 0, // x8sub_0_x8sub_1 |
| 38828 | 0, // x8sub_2_x8sub_3 |
| 38829 | 0, // x8sub_4_x8sub_5 |
| 38830 | 0, // x8sub_6_x8sub_7 |
| 38831 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38832 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38833 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38834 | 0, // sub_32_subo64_then_sub_32 |
| 38835 | 0, // zsub_qsub1 |
| 38836 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38837 | 0, // zsub_qsub1_qsub2 |
| 38838 | 0, // zsub0_zsub1 |
| 38839 | 0, // zsub0_zsub1_zsub2 |
| 38840 | 0, // zsub1_zsub2 |
| 38841 | 0, // zsub1_zsub2_zsub3 |
| 38842 | 0, // zsub2_zsub3 |
| 38843 | 0, // zsub0_zsub2 |
| 38844 | 0, // zsub1_zsub3 |
| 38845 | }, |
| 38846 | { // WSeqPairsClass_with_subo32_in_GPR32common |
| 38847 | 0, // bsub |
| 38848 | 0, // bsub_hi |
| 38849 | 0, // dsub |
| 38850 | 0, // dsub0 |
| 38851 | 0, // dsub1 |
| 38852 | 0, // dsub2 |
| 38853 | 0, // dsub3 |
| 38854 | 0, // dsub_hi |
| 38855 | 0, // hsub |
| 38856 | 0, // hsub_hi |
| 38857 | 0, // psub |
| 38858 | 0, // psub0 |
| 38859 | 0, // psub1 |
| 38860 | 0, // qsub0 |
| 38861 | 0, // qsub1 |
| 38862 | 0, // qsub2 |
| 38863 | 0, // qsub3 |
| 38864 | 0, // ssub |
| 38865 | 0, // ssub_hi |
| 38866 | 0, // sub_32 |
| 38867 | 0, // sub_32_hi |
| 38868 | 51, // sube32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 38869 | 0, // sube64 |
| 38870 | 51, // subo32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 38871 | 0, // subo64 |
| 38872 | 0, // x8sub_0 |
| 38873 | 0, // x8sub_1 |
| 38874 | 0, // x8sub_2 |
| 38875 | 0, // x8sub_3 |
| 38876 | 0, // x8sub_4 |
| 38877 | 0, // x8sub_5 |
| 38878 | 0, // x8sub_6 |
| 38879 | 0, // x8sub_7 |
| 38880 | 0, // zasubb |
| 38881 | 0, // zasubd0 |
| 38882 | 0, // zasubd1 |
| 38883 | 0, // zasubh0 |
| 38884 | 0, // zasubh1 |
| 38885 | 0, // zasubq0 |
| 38886 | 0, // zasubq1 |
| 38887 | 0, // zasubs0 |
| 38888 | 0, // zasubs1 |
| 38889 | 0, // zsub |
| 38890 | 0, // zsub0 |
| 38891 | 0, // zsub1 |
| 38892 | 0, // zsub2 |
| 38893 | 0, // zsub3 |
| 38894 | 0, // zsub_hi |
| 38895 | 0, // zasubd1_then_zasubq0 |
| 38896 | 0, // zasubd1_then_zasubq1 |
| 38897 | 0, // zasubs1_then_zasubd0 |
| 38898 | 0, // zasubs1_then_zasubd1 |
| 38899 | 0, // zasubs1_then_zasubq0 |
| 38900 | 0, // zasubs1_then_zasubq1 |
| 38901 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 38902 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 38903 | 0, // zasubh1_then_zasubd0 |
| 38904 | 0, // zasubh1_then_zasubd1 |
| 38905 | 0, // zasubh1_then_zasubq0 |
| 38906 | 0, // zasubh1_then_zasubq1 |
| 38907 | 0, // zasubh1_then_zasubs0 |
| 38908 | 0, // zasubh1_then_zasubs1 |
| 38909 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 38910 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 38911 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 38912 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 38913 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 38914 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 38915 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 38916 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 38917 | 0, // dsub1_then_bsub |
| 38918 | 0, // dsub1_then_bsub_hi |
| 38919 | 0, // dsub1_then_hsub |
| 38920 | 0, // dsub1_then_hsub_hi |
| 38921 | 0, // dsub1_then_ssub |
| 38922 | 0, // dsub1_then_ssub_hi |
| 38923 | 0, // dsub3_then_bsub |
| 38924 | 0, // dsub3_then_bsub_hi |
| 38925 | 0, // dsub3_then_hsub |
| 38926 | 0, // dsub3_then_hsub_hi |
| 38927 | 0, // dsub3_then_ssub |
| 38928 | 0, // dsub3_then_ssub_hi |
| 38929 | 0, // dsub2_then_bsub |
| 38930 | 0, // dsub2_then_bsub_hi |
| 38931 | 0, // dsub2_then_hsub |
| 38932 | 0, // dsub2_then_hsub_hi |
| 38933 | 0, // dsub2_then_ssub |
| 38934 | 0, // dsub2_then_ssub_hi |
| 38935 | 0, // psub1_then_psub |
| 38936 | 0, // qsub1_then_dsub_hi |
| 38937 | 0, // qsub3_then_dsub_hi |
| 38938 | 0, // qsub2_then_dsub_hi |
| 38939 | 0, // x8sub_7_then_sub_32 |
| 38940 | 0, // x8sub_7_then_sub_32_hi |
| 38941 | 0, // x8sub_6_then_sub_32 |
| 38942 | 0, // x8sub_6_then_sub_32_hi |
| 38943 | 0, // x8sub_5_then_sub_32 |
| 38944 | 0, // x8sub_5_then_sub_32_hi |
| 38945 | 0, // x8sub_4_then_sub_32 |
| 38946 | 0, // x8sub_4_then_sub_32_hi |
| 38947 | 0, // x8sub_3_then_sub_32 |
| 38948 | 0, // x8sub_3_then_sub_32_hi |
| 38949 | 0, // x8sub_2_then_sub_32 |
| 38950 | 0, // x8sub_2_then_sub_32_hi |
| 38951 | 0, // x8sub_1_then_sub_32 |
| 38952 | 0, // x8sub_1_then_sub_32_hi |
| 38953 | 0, // subo64_then_sub_32 |
| 38954 | 0, // subo64_then_sub_32_hi |
| 38955 | 0, // zsub1_then_zsub_hi |
| 38956 | 0, // zsub3_then_zsub_hi |
| 38957 | 0, // zsub2_then_zsub_hi |
| 38958 | 0, // dsub0_dsub1 |
| 38959 | 0, // dsub0_dsub1_dsub2 |
| 38960 | 0, // dsub1_dsub2 |
| 38961 | 0, // dsub1_dsub2_dsub3 |
| 38962 | 0, // dsub2_dsub3 |
| 38963 | 0, // dsub_dsub1 |
| 38964 | 0, // dsub_dsub1_dsub2_dsub3 |
| 38965 | 0, // dsub_dsub1_dsub2 |
| 38966 | 0, // qsub0_qsub1 |
| 38967 | 0, // qsub0_qsub1_qsub2 |
| 38968 | 0, // qsub1_qsub2 |
| 38969 | 0, // qsub1_qsub2_qsub3 |
| 38970 | 0, // qsub2_qsub3 |
| 38971 | 0, // sub_32_x8sub_1_then_sub_32 |
| 38972 | 0, // x8sub_0_x8sub_1 |
| 38973 | 0, // x8sub_2_x8sub_3 |
| 38974 | 0, // x8sub_4_x8sub_5 |
| 38975 | 0, // x8sub_6_x8sub_7 |
| 38976 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 38977 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 38978 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 38979 | 0, // sub_32_subo64_then_sub_32 |
| 38980 | 0, // zsub_qsub1 |
| 38981 | 0, // zsub_qsub1_qsub2_qsub3 |
| 38982 | 0, // zsub_qsub1_qsub2 |
| 38983 | 0, // zsub0_zsub1 |
| 38984 | 0, // zsub0_zsub1_zsub2 |
| 38985 | 0, // zsub1_zsub2 |
| 38986 | 0, // zsub1_zsub2_zsub3 |
| 38987 | 0, // zsub2_zsub3 |
| 38988 | 0, // zsub0_zsub2 |
| 38989 | 0, // zsub1_zsub3 |
| 38990 | }, |
| 38991 | { // WSeqPairsClass_with_sube32_in_GPR32arg |
| 38992 | 0, // bsub |
| 38993 | 0, // bsub_hi |
| 38994 | 0, // dsub |
| 38995 | 0, // dsub0 |
| 38996 | 0, // dsub1 |
| 38997 | 0, // dsub2 |
| 38998 | 0, // dsub3 |
| 38999 | 0, // dsub_hi |
| 39000 | 0, // hsub |
| 39001 | 0, // hsub_hi |
| 39002 | 0, // psub |
| 39003 | 0, // psub0 |
| 39004 | 0, // psub1 |
| 39005 | 0, // qsub0 |
| 39006 | 0, // qsub1 |
| 39007 | 0, // qsub2 |
| 39008 | 0, // qsub3 |
| 39009 | 0, // ssub |
| 39010 | 0, // ssub_hi |
| 39011 | 0, // sub_32 |
| 39012 | 0, // sub_32_hi |
| 39013 | 52, // sube32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 39014 | 0, // sube64 |
| 39015 | 52, // subo32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 39016 | 0, // subo64 |
| 39017 | 0, // x8sub_0 |
| 39018 | 0, // x8sub_1 |
| 39019 | 0, // x8sub_2 |
| 39020 | 0, // x8sub_3 |
| 39021 | 0, // x8sub_4 |
| 39022 | 0, // x8sub_5 |
| 39023 | 0, // x8sub_6 |
| 39024 | 0, // x8sub_7 |
| 39025 | 0, // zasubb |
| 39026 | 0, // zasubd0 |
| 39027 | 0, // zasubd1 |
| 39028 | 0, // zasubh0 |
| 39029 | 0, // zasubh1 |
| 39030 | 0, // zasubq0 |
| 39031 | 0, // zasubq1 |
| 39032 | 0, // zasubs0 |
| 39033 | 0, // zasubs1 |
| 39034 | 0, // zsub |
| 39035 | 0, // zsub0 |
| 39036 | 0, // zsub1 |
| 39037 | 0, // zsub2 |
| 39038 | 0, // zsub3 |
| 39039 | 0, // zsub_hi |
| 39040 | 0, // zasubd1_then_zasubq0 |
| 39041 | 0, // zasubd1_then_zasubq1 |
| 39042 | 0, // zasubs1_then_zasubd0 |
| 39043 | 0, // zasubs1_then_zasubd1 |
| 39044 | 0, // zasubs1_then_zasubq0 |
| 39045 | 0, // zasubs1_then_zasubq1 |
| 39046 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39047 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39048 | 0, // zasubh1_then_zasubd0 |
| 39049 | 0, // zasubh1_then_zasubd1 |
| 39050 | 0, // zasubh1_then_zasubq0 |
| 39051 | 0, // zasubh1_then_zasubq1 |
| 39052 | 0, // zasubh1_then_zasubs0 |
| 39053 | 0, // zasubh1_then_zasubs1 |
| 39054 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39055 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39056 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39057 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39058 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39059 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39060 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39061 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39062 | 0, // dsub1_then_bsub |
| 39063 | 0, // dsub1_then_bsub_hi |
| 39064 | 0, // dsub1_then_hsub |
| 39065 | 0, // dsub1_then_hsub_hi |
| 39066 | 0, // dsub1_then_ssub |
| 39067 | 0, // dsub1_then_ssub_hi |
| 39068 | 0, // dsub3_then_bsub |
| 39069 | 0, // dsub3_then_bsub_hi |
| 39070 | 0, // dsub3_then_hsub |
| 39071 | 0, // dsub3_then_hsub_hi |
| 39072 | 0, // dsub3_then_ssub |
| 39073 | 0, // dsub3_then_ssub_hi |
| 39074 | 0, // dsub2_then_bsub |
| 39075 | 0, // dsub2_then_bsub_hi |
| 39076 | 0, // dsub2_then_hsub |
| 39077 | 0, // dsub2_then_hsub_hi |
| 39078 | 0, // dsub2_then_ssub |
| 39079 | 0, // dsub2_then_ssub_hi |
| 39080 | 0, // psub1_then_psub |
| 39081 | 0, // qsub1_then_dsub_hi |
| 39082 | 0, // qsub3_then_dsub_hi |
| 39083 | 0, // qsub2_then_dsub_hi |
| 39084 | 0, // x8sub_7_then_sub_32 |
| 39085 | 0, // x8sub_7_then_sub_32_hi |
| 39086 | 0, // x8sub_6_then_sub_32 |
| 39087 | 0, // x8sub_6_then_sub_32_hi |
| 39088 | 0, // x8sub_5_then_sub_32 |
| 39089 | 0, // x8sub_5_then_sub_32_hi |
| 39090 | 0, // x8sub_4_then_sub_32 |
| 39091 | 0, // x8sub_4_then_sub_32_hi |
| 39092 | 0, // x8sub_3_then_sub_32 |
| 39093 | 0, // x8sub_3_then_sub_32_hi |
| 39094 | 0, // x8sub_2_then_sub_32 |
| 39095 | 0, // x8sub_2_then_sub_32_hi |
| 39096 | 0, // x8sub_1_then_sub_32 |
| 39097 | 0, // x8sub_1_then_sub_32_hi |
| 39098 | 0, // subo64_then_sub_32 |
| 39099 | 0, // subo64_then_sub_32_hi |
| 39100 | 0, // zsub1_then_zsub_hi |
| 39101 | 0, // zsub3_then_zsub_hi |
| 39102 | 0, // zsub2_then_zsub_hi |
| 39103 | 0, // dsub0_dsub1 |
| 39104 | 0, // dsub0_dsub1_dsub2 |
| 39105 | 0, // dsub1_dsub2 |
| 39106 | 0, // dsub1_dsub2_dsub3 |
| 39107 | 0, // dsub2_dsub3 |
| 39108 | 0, // dsub_dsub1 |
| 39109 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39110 | 0, // dsub_dsub1_dsub2 |
| 39111 | 0, // qsub0_qsub1 |
| 39112 | 0, // qsub0_qsub1_qsub2 |
| 39113 | 0, // qsub1_qsub2 |
| 39114 | 0, // qsub1_qsub2_qsub3 |
| 39115 | 0, // qsub2_qsub3 |
| 39116 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39117 | 0, // x8sub_0_x8sub_1 |
| 39118 | 0, // x8sub_2_x8sub_3 |
| 39119 | 0, // x8sub_4_x8sub_5 |
| 39120 | 0, // x8sub_6_x8sub_7 |
| 39121 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39122 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39123 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39124 | 0, // sub_32_subo64_then_sub_32 |
| 39125 | 0, // zsub_qsub1 |
| 39126 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39127 | 0, // zsub_qsub1_qsub2 |
| 39128 | 0, // zsub0_zsub1 |
| 39129 | 0, // zsub0_zsub1_zsub2 |
| 39130 | 0, // zsub1_zsub2 |
| 39131 | 0, // zsub1_zsub2_zsub3 |
| 39132 | 0, // zsub2_zsub3 |
| 39133 | 0, // zsub0_zsub2 |
| 39134 | 0, // zsub1_zsub3 |
| 39135 | }, |
| 39136 | { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 39137 | 0, // bsub |
| 39138 | 0, // bsub_hi |
| 39139 | 0, // dsub |
| 39140 | 0, // dsub0 |
| 39141 | 0, // dsub1 |
| 39142 | 0, // dsub2 |
| 39143 | 0, // dsub3 |
| 39144 | 0, // dsub_hi |
| 39145 | 0, // hsub |
| 39146 | 0, // hsub_hi |
| 39147 | 0, // psub |
| 39148 | 0, // psub0 |
| 39149 | 0, // psub1 |
| 39150 | 0, // qsub0 |
| 39151 | 0, // qsub1 |
| 39152 | 0, // qsub2 |
| 39153 | 0, // qsub3 |
| 39154 | 0, // ssub |
| 39155 | 0, // ssub_hi |
| 39156 | 0, // sub_32 |
| 39157 | 0, // sub_32_hi |
| 39158 | 53, // sube32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 39159 | 0, // sube64 |
| 39160 | 53, // subo32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 39161 | 0, // subo64 |
| 39162 | 0, // x8sub_0 |
| 39163 | 0, // x8sub_1 |
| 39164 | 0, // x8sub_2 |
| 39165 | 0, // x8sub_3 |
| 39166 | 0, // x8sub_4 |
| 39167 | 0, // x8sub_5 |
| 39168 | 0, // x8sub_6 |
| 39169 | 0, // x8sub_7 |
| 39170 | 0, // zasubb |
| 39171 | 0, // zasubd0 |
| 39172 | 0, // zasubd1 |
| 39173 | 0, // zasubh0 |
| 39174 | 0, // zasubh1 |
| 39175 | 0, // zasubq0 |
| 39176 | 0, // zasubq1 |
| 39177 | 0, // zasubs0 |
| 39178 | 0, // zasubs1 |
| 39179 | 0, // zsub |
| 39180 | 0, // zsub0 |
| 39181 | 0, // zsub1 |
| 39182 | 0, // zsub2 |
| 39183 | 0, // zsub3 |
| 39184 | 0, // zsub_hi |
| 39185 | 0, // zasubd1_then_zasubq0 |
| 39186 | 0, // zasubd1_then_zasubq1 |
| 39187 | 0, // zasubs1_then_zasubd0 |
| 39188 | 0, // zasubs1_then_zasubd1 |
| 39189 | 0, // zasubs1_then_zasubq0 |
| 39190 | 0, // zasubs1_then_zasubq1 |
| 39191 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39192 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39193 | 0, // zasubh1_then_zasubd0 |
| 39194 | 0, // zasubh1_then_zasubd1 |
| 39195 | 0, // zasubh1_then_zasubq0 |
| 39196 | 0, // zasubh1_then_zasubq1 |
| 39197 | 0, // zasubh1_then_zasubs0 |
| 39198 | 0, // zasubh1_then_zasubs1 |
| 39199 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39200 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39201 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39202 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39203 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39204 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39205 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39206 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39207 | 0, // dsub1_then_bsub |
| 39208 | 0, // dsub1_then_bsub_hi |
| 39209 | 0, // dsub1_then_hsub |
| 39210 | 0, // dsub1_then_hsub_hi |
| 39211 | 0, // dsub1_then_ssub |
| 39212 | 0, // dsub1_then_ssub_hi |
| 39213 | 0, // dsub3_then_bsub |
| 39214 | 0, // dsub3_then_bsub_hi |
| 39215 | 0, // dsub3_then_hsub |
| 39216 | 0, // dsub3_then_hsub_hi |
| 39217 | 0, // dsub3_then_ssub |
| 39218 | 0, // dsub3_then_ssub_hi |
| 39219 | 0, // dsub2_then_bsub |
| 39220 | 0, // dsub2_then_bsub_hi |
| 39221 | 0, // dsub2_then_hsub |
| 39222 | 0, // dsub2_then_hsub_hi |
| 39223 | 0, // dsub2_then_ssub |
| 39224 | 0, // dsub2_then_ssub_hi |
| 39225 | 0, // psub1_then_psub |
| 39226 | 0, // qsub1_then_dsub_hi |
| 39227 | 0, // qsub3_then_dsub_hi |
| 39228 | 0, // qsub2_then_dsub_hi |
| 39229 | 0, // x8sub_7_then_sub_32 |
| 39230 | 0, // x8sub_7_then_sub_32_hi |
| 39231 | 0, // x8sub_6_then_sub_32 |
| 39232 | 0, // x8sub_6_then_sub_32_hi |
| 39233 | 0, // x8sub_5_then_sub_32 |
| 39234 | 0, // x8sub_5_then_sub_32_hi |
| 39235 | 0, // x8sub_4_then_sub_32 |
| 39236 | 0, // x8sub_4_then_sub_32_hi |
| 39237 | 0, // x8sub_3_then_sub_32 |
| 39238 | 0, // x8sub_3_then_sub_32_hi |
| 39239 | 0, // x8sub_2_then_sub_32 |
| 39240 | 0, // x8sub_2_then_sub_32_hi |
| 39241 | 0, // x8sub_1_then_sub_32 |
| 39242 | 0, // x8sub_1_then_sub_32_hi |
| 39243 | 0, // subo64_then_sub_32 |
| 39244 | 0, // subo64_then_sub_32_hi |
| 39245 | 0, // zsub1_then_zsub_hi |
| 39246 | 0, // zsub3_then_zsub_hi |
| 39247 | 0, // zsub2_then_zsub_hi |
| 39248 | 0, // dsub0_dsub1 |
| 39249 | 0, // dsub0_dsub1_dsub2 |
| 39250 | 0, // dsub1_dsub2 |
| 39251 | 0, // dsub1_dsub2_dsub3 |
| 39252 | 0, // dsub2_dsub3 |
| 39253 | 0, // dsub_dsub1 |
| 39254 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39255 | 0, // dsub_dsub1_dsub2 |
| 39256 | 0, // qsub0_qsub1 |
| 39257 | 0, // qsub0_qsub1_qsub2 |
| 39258 | 0, // qsub1_qsub2 |
| 39259 | 0, // qsub1_qsub2_qsub3 |
| 39260 | 0, // qsub2_qsub3 |
| 39261 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39262 | 0, // x8sub_0_x8sub_1 |
| 39263 | 0, // x8sub_2_x8sub_3 |
| 39264 | 0, // x8sub_4_x8sub_5 |
| 39265 | 0, // x8sub_6_x8sub_7 |
| 39266 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39267 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39268 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39269 | 0, // sub_32_subo64_then_sub_32 |
| 39270 | 0, // zsub_qsub1 |
| 39271 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39272 | 0, // zsub_qsub1_qsub2 |
| 39273 | 0, // zsub0_zsub1 |
| 39274 | 0, // zsub0_zsub1_zsub2 |
| 39275 | 0, // zsub1_zsub2 |
| 39276 | 0, // zsub1_zsub2_zsub3 |
| 39277 | 0, // zsub2_zsub3 |
| 39278 | 0, // zsub0_zsub2 |
| 39279 | 0, // zsub1_zsub3 |
| 39280 | }, |
| 39281 | { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 39282 | 0, // bsub |
| 39283 | 0, // bsub_hi |
| 39284 | 0, // dsub |
| 39285 | 0, // dsub0 |
| 39286 | 0, // dsub1 |
| 39287 | 0, // dsub2 |
| 39288 | 0, // dsub3 |
| 39289 | 0, // dsub_hi |
| 39290 | 0, // hsub |
| 39291 | 0, // hsub_hi |
| 39292 | 0, // psub |
| 39293 | 0, // psub0 |
| 39294 | 0, // psub1 |
| 39295 | 0, // qsub0 |
| 39296 | 0, // qsub1 |
| 39297 | 0, // qsub2 |
| 39298 | 0, // qsub3 |
| 39299 | 0, // ssub |
| 39300 | 0, // ssub_hi |
| 39301 | 0, // sub_32 |
| 39302 | 0, // sub_32_hi |
| 39303 | 54, // sube32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 39304 | 0, // sube64 |
| 39305 | 54, // subo32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 39306 | 0, // subo64 |
| 39307 | 0, // x8sub_0 |
| 39308 | 0, // x8sub_1 |
| 39309 | 0, // x8sub_2 |
| 39310 | 0, // x8sub_3 |
| 39311 | 0, // x8sub_4 |
| 39312 | 0, // x8sub_5 |
| 39313 | 0, // x8sub_6 |
| 39314 | 0, // x8sub_7 |
| 39315 | 0, // zasubb |
| 39316 | 0, // zasubd0 |
| 39317 | 0, // zasubd1 |
| 39318 | 0, // zasubh0 |
| 39319 | 0, // zasubh1 |
| 39320 | 0, // zasubq0 |
| 39321 | 0, // zasubq1 |
| 39322 | 0, // zasubs0 |
| 39323 | 0, // zasubs1 |
| 39324 | 0, // zsub |
| 39325 | 0, // zsub0 |
| 39326 | 0, // zsub1 |
| 39327 | 0, // zsub2 |
| 39328 | 0, // zsub3 |
| 39329 | 0, // zsub_hi |
| 39330 | 0, // zasubd1_then_zasubq0 |
| 39331 | 0, // zasubd1_then_zasubq1 |
| 39332 | 0, // zasubs1_then_zasubd0 |
| 39333 | 0, // zasubs1_then_zasubd1 |
| 39334 | 0, // zasubs1_then_zasubq0 |
| 39335 | 0, // zasubs1_then_zasubq1 |
| 39336 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39337 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39338 | 0, // zasubh1_then_zasubd0 |
| 39339 | 0, // zasubh1_then_zasubd1 |
| 39340 | 0, // zasubh1_then_zasubq0 |
| 39341 | 0, // zasubh1_then_zasubq1 |
| 39342 | 0, // zasubh1_then_zasubs0 |
| 39343 | 0, // zasubh1_then_zasubs1 |
| 39344 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39345 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39346 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39347 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39348 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39349 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39350 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39351 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39352 | 0, // dsub1_then_bsub |
| 39353 | 0, // dsub1_then_bsub_hi |
| 39354 | 0, // dsub1_then_hsub |
| 39355 | 0, // dsub1_then_hsub_hi |
| 39356 | 0, // dsub1_then_ssub |
| 39357 | 0, // dsub1_then_ssub_hi |
| 39358 | 0, // dsub3_then_bsub |
| 39359 | 0, // dsub3_then_bsub_hi |
| 39360 | 0, // dsub3_then_hsub |
| 39361 | 0, // dsub3_then_hsub_hi |
| 39362 | 0, // dsub3_then_ssub |
| 39363 | 0, // dsub3_then_ssub_hi |
| 39364 | 0, // dsub2_then_bsub |
| 39365 | 0, // dsub2_then_bsub_hi |
| 39366 | 0, // dsub2_then_hsub |
| 39367 | 0, // dsub2_then_hsub_hi |
| 39368 | 0, // dsub2_then_ssub |
| 39369 | 0, // dsub2_then_ssub_hi |
| 39370 | 0, // psub1_then_psub |
| 39371 | 0, // qsub1_then_dsub_hi |
| 39372 | 0, // qsub3_then_dsub_hi |
| 39373 | 0, // qsub2_then_dsub_hi |
| 39374 | 0, // x8sub_7_then_sub_32 |
| 39375 | 0, // x8sub_7_then_sub_32_hi |
| 39376 | 0, // x8sub_6_then_sub_32 |
| 39377 | 0, // x8sub_6_then_sub_32_hi |
| 39378 | 0, // x8sub_5_then_sub_32 |
| 39379 | 0, // x8sub_5_then_sub_32_hi |
| 39380 | 0, // x8sub_4_then_sub_32 |
| 39381 | 0, // x8sub_4_then_sub_32_hi |
| 39382 | 0, // x8sub_3_then_sub_32 |
| 39383 | 0, // x8sub_3_then_sub_32_hi |
| 39384 | 0, // x8sub_2_then_sub_32 |
| 39385 | 0, // x8sub_2_then_sub_32_hi |
| 39386 | 0, // x8sub_1_then_sub_32 |
| 39387 | 0, // x8sub_1_then_sub_32_hi |
| 39388 | 0, // subo64_then_sub_32 |
| 39389 | 0, // subo64_then_sub_32_hi |
| 39390 | 0, // zsub1_then_zsub_hi |
| 39391 | 0, // zsub3_then_zsub_hi |
| 39392 | 0, // zsub2_then_zsub_hi |
| 39393 | 0, // dsub0_dsub1 |
| 39394 | 0, // dsub0_dsub1_dsub2 |
| 39395 | 0, // dsub1_dsub2 |
| 39396 | 0, // dsub1_dsub2_dsub3 |
| 39397 | 0, // dsub2_dsub3 |
| 39398 | 0, // dsub_dsub1 |
| 39399 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39400 | 0, // dsub_dsub1_dsub2 |
| 39401 | 0, // qsub0_qsub1 |
| 39402 | 0, // qsub0_qsub1_qsub2 |
| 39403 | 0, // qsub1_qsub2 |
| 39404 | 0, // qsub1_qsub2_qsub3 |
| 39405 | 0, // qsub2_qsub3 |
| 39406 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39407 | 0, // x8sub_0_x8sub_1 |
| 39408 | 0, // x8sub_2_x8sub_3 |
| 39409 | 0, // x8sub_4_x8sub_5 |
| 39410 | 0, // x8sub_6_x8sub_7 |
| 39411 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39412 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39413 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39414 | 0, // sub_32_subo64_then_sub_32 |
| 39415 | 0, // zsub_qsub1 |
| 39416 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39417 | 0, // zsub_qsub1_qsub2 |
| 39418 | 0, // zsub0_zsub1 |
| 39419 | 0, // zsub0_zsub1_zsub2 |
| 39420 | 0, // zsub1_zsub2 |
| 39421 | 0, // zsub1_zsub2_zsub3 |
| 39422 | 0, // zsub2_zsub3 |
| 39423 | 0, // zsub0_zsub2 |
| 39424 | 0, // zsub1_zsub3 |
| 39425 | }, |
| 39426 | { // GPR64all |
| 39427 | 0, // bsub |
| 39428 | 0, // bsub_hi |
| 39429 | 0, // dsub |
| 39430 | 0, // dsub0 |
| 39431 | 0, // dsub1 |
| 39432 | 0, // dsub2 |
| 39433 | 0, // dsub3 |
| 39434 | 0, // dsub_hi |
| 39435 | 0, // hsub |
| 39436 | 0, // hsub_hi |
| 39437 | 0, // psub |
| 39438 | 0, // psub0 |
| 39439 | 0, // psub1 |
| 39440 | 0, // qsub0 |
| 39441 | 0, // qsub1 |
| 39442 | 0, // qsub2 |
| 39443 | 0, // qsub3 |
| 39444 | 0, // ssub |
| 39445 | 0, // ssub_hi |
| 39446 | 55, // sub_32 -> GPR64all |
| 39447 | 55, // sub_32_hi -> GPR64all |
| 39448 | 0, // sube32 |
| 39449 | 0, // sube64 |
| 39450 | 0, // subo32 |
| 39451 | 0, // subo64 |
| 39452 | 0, // x8sub_0 |
| 39453 | 0, // x8sub_1 |
| 39454 | 0, // x8sub_2 |
| 39455 | 0, // x8sub_3 |
| 39456 | 0, // x8sub_4 |
| 39457 | 0, // x8sub_5 |
| 39458 | 0, // x8sub_6 |
| 39459 | 0, // x8sub_7 |
| 39460 | 0, // zasubb |
| 39461 | 0, // zasubd0 |
| 39462 | 0, // zasubd1 |
| 39463 | 0, // zasubh0 |
| 39464 | 0, // zasubh1 |
| 39465 | 0, // zasubq0 |
| 39466 | 0, // zasubq1 |
| 39467 | 0, // zasubs0 |
| 39468 | 0, // zasubs1 |
| 39469 | 0, // zsub |
| 39470 | 0, // zsub0 |
| 39471 | 0, // zsub1 |
| 39472 | 0, // zsub2 |
| 39473 | 0, // zsub3 |
| 39474 | 0, // zsub_hi |
| 39475 | 0, // zasubd1_then_zasubq0 |
| 39476 | 0, // zasubd1_then_zasubq1 |
| 39477 | 0, // zasubs1_then_zasubd0 |
| 39478 | 0, // zasubs1_then_zasubd1 |
| 39479 | 0, // zasubs1_then_zasubq0 |
| 39480 | 0, // zasubs1_then_zasubq1 |
| 39481 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39482 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39483 | 0, // zasubh1_then_zasubd0 |
| 39484 | 0, // zasubh1_then_zasubd1 |
| 39485 | 0, // zasubh1_then_zasubq0 |
| 39486 | 0, // zasubh1_then_zasubq1 |
| 39487 | 0, // zasubh1_then_zasubs0 |
| 39488 | 0, // zasubh1_then_zasubs1 |
| 39489 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39490 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39491 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39492 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39493 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39494 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39495 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39496 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39497 | 0, // dsub1_then_bsub |
| 39498 | 0, // dsub1_then_bsub_hi |
| 39499 | 0, // dsub1_then_hsub |
| 39500 | 0, // dsub1_then_hsub_hi |
| 39501 | 0, // dsub1_then_ssub |
| 39502 | 0, // dsub1_then_ssub_hi |
| 39503 | 0, // dsub3_then_bsub |
| 39504 | 0, // dsub3_then_bsub_hi |
| 39505 | 0, // dsub3_then_hsub |
| 39506 | 0, // dsub3_then_hsub_hi |
| 39507 | 0, // dsub3_then_ssub |
| 39508 | 0, // dsub3_then_ssub_hi |
| 39509 | 0, // dsub2_then_bsub |
| 39510 | 0, // dsub2_then_bsub_hi |
| 39511 | 0, // dsub2_then_hsub |
| 39512 | 0, // dsub2_then_hsub_hi |
| 39513 | 0, // dsub2_then_ssub |
| 39514 | 0, // dsub2_then_ssub_hi |
| 39515 | 0, // psub1_then_psub |
| 39516 | 0, // qsub1_then_dsub_hi |
| 39517 | 0, // qsub3_then_dsub_hi |
| 39518 | 0, // qsub2_then_dsub_hi |
| 39519 | 0, // x8sub_7_then_sub_32 |
| 39520 | 0, // x8sub_7_then_sub_32_hi |
| 39521 | 0, // x8sub_6_then_sub_32 |
| 39522 | 0, // x8sub_6_then_sub_32_hi |
| 39523 | 0, // x8sub_5_then_sub_32 |
| 39524 | 0, // x8sub_5_then_sub_32_hi |
| 39525 | 0, // x8sub_4_then_sub_32 |
| 39526 | 0, // x8sub_4_then_sub_32_hi |
| 39527 | 0, // x8sub_3_then_sub_32 |
| 39528 | 0, // x8sub_3_then_sub_32_hi |
| 39529 | 0, // x8sub_2_then_sub_32 |
| 39530 | 0, // x8sub_2_then_sub_32_hi |
| 39531 | 0, // x8sub_1_then_sub_32 |
| 39532 | 0, // x8sub_1_then_sub_32_hi |
| 39533 | 0, // subo64_then_sub_32 |
| 39534 | 0, // subo64_then_sub_32_hi |
| 39535 | 0, // zsub1_then_zsub_hi |
| 39536 | 0, // zsub3_then_zsub_hi |
| 39537 | 0, // zsub2_then_zsub_hi |
| 39538 | 0, // dsub0_dsub1 |
| 39539 | 0, // dsub0_dsub1_dsub2 |
| 39540 | 0, // dsub1_dsub2 |
| 39541 | 0, // dsub1_dsub2_dsub3 |
| 39542 | 0, // dsub2_dsub3 |
| 39543 | 0, // dsub_dsub1 |
| 39544 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39545 | 0, // dsub_dsub1_dsub2 |
| 39546 | 0, // qsub0_qsub1 |
| 39547 | 0, // qsub0_qsub1_qsub2 |
| 39548 | 0, // qsub1_qsub2 |
| 39549 | 0, // qsub1_qsub2_qsub3 |
| 39550 | 0, // qsub2_qsub3 |
| 39551 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39552 | 0, // x8sub_0_x8sub_1 |
| 39553 | 0, // x8sub_2_x8sub_3 |
| 39554 | 0, // x8sub_4_x8sub_5 |
| 39555 | 0, // x8sub_6_x8sub_7 |
| 39556 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39557 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39558 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39559 | 0, // sub_32_subo64_then_sub_32 |
| 39560 | 0, // zsub_qsub1 |
| 39561 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39562 | 0, // zsub_qsub1_qsub2 |
| 39563 | 0, // zsub0_zsub1 |
| 39564 | 0, // zsub0_zsub1_zsub2 |
| 39565 | 0, // zsub1_zsub2 |
| 39566 | 0, // zsub1_zsub2_zsub3 |
| 39567 | 0, // zsub2_zsub3 |
| 39568 | 0, // zsub0_zsub2 |
| 39569 | 0, // zsub1_zsub3 |
| 39570 | }, |
| 39571 | { // FPR64 |
| 39572 | 56, // bsub -> FPR64 |
| 39573 | 56, // bsub_hi -> FPR64 |
| 39574 | 0, // dsub |
| 39575 | 0, // dsub0 |
| 39576 | 0, // dsub1 |
| 39577 | 0, // dsub2 |
| 39578 | 0, // dsub3 |
| 39579 | 0, // dsub_hi |
| 39580 | 56, // hsub -> FPR64 |
| 39581 | 56, // hsub_hi -> FPR64 |
| 39582 | 0, // psub |
| 39583 | 0, // psub0 |
| 39584 | 0, // psub1 |
| 39585 | 0, // qsub0 |
| 39586 | 0, // qsub1 |
| 39587 | 0, // qsub2 |
| 39588 | 0, // qsub3 |
| 39589 | 56, // ssub -> FPR64 |
| 39590 | 56, // ssub_hi -> FPR64 |
| 39591 | 0, // sub_32 |
| 39592 | 0, // sub_32_hi |
| 39593 | 0, // sube32 |
| 39594 | 0, // sube64 |
| 39595 | 0, // subo32 |
| 39596 | 0, // subo64 |
| 39597 | 0, // x8sub_0 |
| 39598 | 0, // x8sub_1 |
| 39599 | 0, // x8sub_2 |
| 39600 | 0, // x8sub_3 |
| 39601 | 0, // x8sub_4 |
| 39602 | 0, // x8sub_5 |
| 39603 | 0, // x8sub_6 |
| 39604 | 0, // x8sub_7 |
| 39605 | 0, // zasubb |
| 39606 | 0, // zasubd0 |
| 39607 | 0, // zasubd1 |
| 39608 | 0, // zasubh0 |
| 39609 | 0, // zasubh1 |
| 39610 | 0, // zasubq0 |
| 39611 | 0, // zasubq1 |
| 39612 | 0, // zasubs0 |
| 39613 | 0, // zasubs1 |
| 39614 | 0, // zsub |
| 39615 | 0, // zsub0 |
| 39616 | 0, // zsub1 |
| 39617 | 0, // zsub2 |
| 39618 | 0, // zsub3 |
| 39619 | 0, // zsub_hi |
| 39620 | 0, // zasubd1_then_zasubq0 |
| 39621 | 0, // zasubd1_then_zasubq1 |
| 39622 | 0, // zasubs1_then_zasubd0 |
| 39623 | 0, // zasubs1_then_zasubd1 |
| 39624 | 0, // zasubs1_then_zasubq0 |
| 39625 | 0, // zasubs1_then_zasubq1 |
| 39626 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39627 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39628 | 0, // zasubh1_then_zasubd0 |
| 39629 | 0, // zasubh1_then_zasubd1 |
| 39630 | 0, // zasubh1_then_zasubq0 |
| 39631 | 0, // zasubh1_then_zasubq1 |
| 39632 | 0, // zasubh1_then_zasubs0 |
| 39633 | 0, // zasubh1_then_zasubs1 |
| 39634 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39635 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39636 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39637 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39638 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39639 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39640 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39641 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39642 | 0, // dsub1_then_bsub |
| 39643 | 0, // dsub1_then_bsub_hi |
| 39644 | 0, // dsub1_then_hsub |
| 39645 | 0, // dsub1_then_hsub_hi |
| 39646 | 0, // dsub1_then_ssub |
| 39647 | 0, // dsub1_then_ssub_hi |
| 39648 | 0, // dsub3_then_bsub |
| 39649 | 0, // dsub3_then_bsub_hi |
| 39650 | 0, // dsub3_then_hsub |
| 39651 | 0, // dsub3_then_hsub_hi |
| 39652 | 0, // dsub3_then_ssub |
| 39653 | 0, // dsub3_then_ssub_hi |
| 39654 | 0, // dsub2_then_bsub |
| 39655 | 0, // dsub2_then_bsub_hi |
| 39656 | 0, // dsub2_then_hsub |
| 39657 | 0, // dsub2_then_hsub_hi |
| 39658 | 0, // dsub2_then_ssub |
| 39659 | 0, // dsub2_then_ssub_hi |
| 39660 | 0, // psub1_then_psub |
| 39661 | 0, // qsub1_then_dsub_hi |
| 39662 | 0, // qsub3_then_dsub_hi |
| 39663 | 0, // qsub2_then_dsub_hi |
| 39664 | 0, // x8sub_7_then_sub_32 |
| 39665 | 0, // x8sub_7_then_sub_32_hi |
| 39666 | 0, // x8sub_6_then_sub_32 |
| 39667 | 0, // x8sub_6_then_sub_32_hi |
| 39668 | 0, // x8sub_5_then_sub_32 |
| 39669 | 0, // x8sub_5_then_sub_32_hi |
| 39670 | 0, // x8sub_4_then_sub_32 |
| 39671 | 0, // x8sub_4_then_sub_32_hi |
| 39672 | 0, // x8sub_3_then_sub_32 |
| 39673 | 0, // x8sub_3_then_sub_32_hi |
| 39674 | 0, // x8sub_2_then_sub_32 |
| 39675 | 0, // x8sub_2_then_sub_32_hi |
| 39676 | 0, // x8sub_1_then_sub_32 |
| 39677 | 0, // x8sub_1_then_sub_32_hi |
| 39678 | 0, // subo64_then_sub_32 |
| 39679 | 0, // subo64_then_sub_32_hi |
| 39680 | 0, // zsub1_then_zsub_hi |
| 39681 | 0, // zsub3_then_zsub_hi |
| 39682 | 0, // zsub2_then_zsub_hi |
| 39683 | 0, // dsub0_dsub1 |
| 39684 | 0, // dsub0_dsub1_dsub2 |
| 39685 | 0, // dsub1_dsub2 |
| 39686 | 0, // dsub1_dsub2_dsub3 |
| 39687 | 0, // dsub2_dsub3 |
| 39688 | 0, // dsub_dsub1 |
| 39689 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39690 | 0, // dsub_dsub1_dsub2 |
| 39691 | 0, // qsub0_qsub1 |
| 39692 | 0, // qsub0_qsub1_qsub2 |
| 39693 | 0, // qsub1_qsub2 |
| 39694 | 0, // qsub1_qsub2_qsub3 |
| 39695 | 0, // qsub2_qsub3 |
| 39696 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39697 | 0, // x8sub_0_x8sub_1 |
| 39698 | 0, // x8sub_2_x8sub_3 |
| 39699 | 0, // x8sub_4_x8sub_5 |
| 39700 | 0, // x8sub_6_x8sub_7 |
| 39701 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39702 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39703 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39704 | 0, // sub_32_subo64_then_sub_32 |
| 39705 | 0, // zsub_qsub1 |
| 39706 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39707 | 0, // zsub_qsub1_qsub2 |
| 39708 | 0, // zsub0_zsub1 |
| 39709 | 0, // zsub0_zsub1_zsub2 |
| 39710 | 0, // zsub1_zsub2 |
| 39711 | 0, // zsub1_zsub2_zsub3 |
| 39712 | 0, // zsub2_zsub3 |
| 39713 | 0, // zsub0_zsub2 |
| 39714 | 0, // zsub1_zsub3 |
| 39715 | }, |
| 39716 | { // GPR64 |
| 39717 | 0, // bsub |
| 39718 | 0, // bsub_hi |
| 39719 | 0, // dsub |
| 39720 | 0, // dsub0 |
| 39721 | 0, // dsub1 |
| 39722 | 0, // dsub2 |
| 39723 | 0, // dsub3 |
| 39724 | 0, // dsub_hi |
| 39725 | 0, // hsub |
| 39726 | 0, // hsub_hi |
| 39727 | 0, // psub |
| 39728 | 0, // psub0 |
| 39729 | 0, // psub1 |
| 39730 | 0, // qsub0 |
| 39731 | 0, // qsub1 |
| 39732 | 0, // qsub2 |
| 39733 | 0, // qsub3 |
| 39734 | 0, // ssub |
| 39735 | 0, // ssub_hi |
| 39736 | 57, // sub_32 -> GPR64 |
| 39737 | 57, // sub_32_hi -> GPR64 |
| 39738 | 0, // sube32 |
| 39739 | 0, // sube64 |
| 39740 | 0, // subo32 |
| 39741 | 0, // subo64 |
| 39742 | 0, // x8sub_0 |
| 39743 | 0, // x8sub_1 |
| 39744 | 0, // x8sub_2 |
| 39745 | 0, // x8sub_3 |
| 39746 | 0, // x8sub_4 |
| 39747 | 0, // x8sub_5 |
| 39748 | 0, // x8sub_6 |
| 39749 | 0, // x8sub_7 |
| 39750 | 0, // zasubb |
| 39751 | 0, // zasubd0 |
| 39752 | 0, // zasubd1 |
| 39753 | 0, // zasubh0 |
| 39754 | 0, // zasubh1 |
| 39755 | 0, // zasubq0 |
| 39756 | 0, // zasubq1 |
| 39757 | 0, // zasubs0 |
| 39758 | 0, // zasubs1 |
| 39759 | 0, // zsub |
| 39760 | 0, // zsub0 |
| 39761 | 0, // zsub1 |
| 39762 | 0, // zsub2 |
| 39763 | 0, // zsub3 |
| 39764 | 0, // zsub_hi |
| 39765 | 0, // zasubd1_then_zasubq0 |
| 39766 | 0, // zasubd1_then_zasubq1 |
| 39767 | 0, // zasubs1_then_zasubd0 |
| 39768 | 0, // zasubs1_then_zasubd1 |
| 39769 | 0, // zasubs1_then_zasubq0 |
| 39770 | 0, // zasubs1_then_zasubq1 |
| 39771 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39772 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39773 | 0, // zasubh1_then_zasubd0 |
| 39774 | 0, // zasubh1_then_zasubd1 |
| 39775 | 0, // zasubh1_then_zasubq0 |
| 39776 | 0, // zasubh1_then_zasubq1 |
| 39777 | 0, // zasubh1_then_zasubs0 |
| 39778 | 0, // zasubh1_then_zasubs1 |
| 39779 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39780 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39781 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39782 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39783 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39784 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39785 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39786 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39787 | 0, // dsub1_then_bsub |
| 39788 | 0, // dsub1_then_bsub_hi |
| 39789 | 0, // dsub1_then_hsub |
| 39790 | 0, // dsub1_then_hsub_hi |
| 39791 | 0, // dsub1_then_ssub |
| 39792 | 0, // dsub1_then_ssub_hi |
| 39793 | 0, // dsub3_then_bsub |
| 39794 | 0, // dsub3_then_bsub_hi |
| 39795 | 0, // dsub3_then_hsub |
| 39796 | 0, // dsub3_then_hsub_hi |
| 39797 | 0, // dsub3_then_ssub |
| 39798 | 0, // dsub3_then_ssub_hi |
| 39799 | 0, // dsub2_then_bsub |
| 39800 | 0, // dsub2_then_bsub_hi |
| 39801 | 0, // dsub2_then_hsub |
| 39802 | 0, // dsub2_then_hsub_hi |
| 39803 | 0, // dsub2_then_ssub |
| 39804 | 0, // dsub2_then_ssub_hi |
| 39805 | 0, // psub1_then_psub |
| 39806 | 0, // qsub1_then_dsub_hi |
| 39807 | 0, // qsub3_then_dsub_hi |
| 39808 | 0, // qsub2_then_dsub_hi |
| 39809 | 0, // x8sub_7_then_sub_32 |
| 39810 | 0, // x8sub_7_then_sub_32_hi |
| 39811 | 0, // x8sub_6_then_sub_32 |
| 39812 | 0, // x8sub_6_then_sub_32_hi |
| 39813 | 0, // x8sub_5_then_sub_32 |
| 39814 | 0, // x8sub_5_then_sub_32_hi |
| 39815 | 0, // x8sub_4_then_sub_32 |
| 39816 | 0, // x8sub_4_then_sub_32_hi |
| 39817 | 0, // x8sub_3_then_sub_32 |
| 39818 | 0, // x8sub_3_then_sub_32_hi |
| 39819 | 0, // x8sub_2_then_sub_32 |
| 39820 | 0, // x8sub_2_then_sub_32_hi |
| 39821 | 0, // x8sub_1_then_sub_32 |
| 39822 | 0, // x8sub_1_then_sub_32_hi |
| 39823 | 0, // subo64_then_sub_32 |
| 39824 | 0, // subo64_then_sub_32_hi |
| 39825 | 0, // zsub1_then_zsub_hi |
| 39826 | 0, // zsub3_then_zsub_hi |
| 39827 | 0, // zsub2_then_zsub_hi |
| 39828 | 0, // dsub0_dsub1 |
| 39829 | 0, // dsub0_dsub1_dsub2 |
| 39830 | 0, // dsub1_dsub2 |
| 39831 | 0, // dsub1_dsub2_dsub3 |
| 39832 | 0, // dsub2_dsub3 |
| 39833 | 0, // dsub_dsub1 |
| 39834 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39835 | 0, // dsub_dsub1_dsub2 |
| 39836 | 0, // qsub0_qsub1 |
| 39837 | 0, // qsub0_qsub1_qsub2 |
| 39838 | 0, // qsub1_qsub2 |
| 39839 | 0, // qsub1_qsub2_qsub3 |
| 39840 | 0, // qsub2_qsub3 |
| 39841 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39842 | 0, // x8sub_0_x8sub_1 |
| 39843 | 0, // x8sub_2_x8sub_3 |
| 39844 | 0, // x8sub_4_x8sub_5 |
| 39845 | 0, // x8sub_6_x8sub_7 |
| 39846 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39847 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39848 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39849 | 0, // sub_32_subo64_then_sub_32 |
| 39850 | 0, // zsub_qsub1 |
| 39851 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39852 | 0, // zsub_qsub1_qsub2 |
| 39853 | 0, // zsub0_zsub1 |
| 39854 | 0, // zsub0_zsub1_zsub2 |
| 39855 | 0, // zsub1_zsub2 |
| 39856 | 0, // zsub1_zsub2_zsub3 |
| 39857 | 0, // zsub2_zsub3 |
| 39858 | 0, // zsub0_zsub2 |
| 39859 | 0, // zsub1_zsub3 |
| 39860 | }, |
| 39861 | { // GPR64sp |
| 39862 | 0, // bsub |
| 39863 | 0, // bsub_hi |
| 39864 | 0, // dsub |
| 39865 | 0, // dsub0 |
| 39866 | 0, // dsub1 |
| 39867 | 0, // dsub2 |
| 39868 | 0, // dsub3 |
| 39869 | 0, // dsub_hi |
| 39870 | 0, // hsub |
| 39871 | 0, // hsub_hi |
| 39872 | 0, // psub |
| 39873 | 0, // psub0 |
| 39874 | 0, // psub1 |
| 39875 | 0, // qsub0 |
| 39876 | 0, // qsub1 |
| 39877 | 0, // qsub2 |
| 39878 | 0, // qsub3 |
| 39879 | 0, // ssub |
| 39880 | 0, // ssub_hi |
| 39881 | 58, // sub_32 -> GPR64sp |
| 39882 | 58, // sub_32_hi -> GPR64sp |
| 39883 | 0, // sube32 |
| 39884 | 0, // sube64 |
| 39885 | 0, // subo32 |
| 39886 | 0, // subo64 |
| 39887 | 0, // x8sub_0 |
| 39888 | 0, // x8sub_1 |
| 39889 | 0, // x8sub_2 |
| 39890 | 0, // x8sub_3 |
| 39891 | 0, // x8sub_4 |
| 39892 | 0, // x8sub_5 |
| 39893 | 0, // x8sub_6 |
| 39894 | 0, // x8sub_7 |
| 39895 | 0, // zasubb |
| 39896 | 0, // zasubd0 |
| 39897 | 0, // zasubd1 |
| 39898 | 0, // zasubh0 |
| 39899 | 0, // zasubh1 |
| 39900 | 0, // zasubq0 |
| 39901 | 0, // zasubq1 |
| 39902 | 0, // zasubs0 |
| 39903 | 0, // zasubs1 |
| 39904 | 0, // zsub |
| 39905 | 0, // zsub0 |
| 39906 | 0, // zsub1 |
| 39907 | 0, // zsub2 |
| 39908 | 0, // zsub3 |
| 39909 | 0, // zsub_hi |
| 39910 | 0, // zasubd1_then_zasubq0 |
| 39911 | 0, // zasubd1_then_zasubq1 |
| 39912 | 0, // zasubs1_then_zasubd0 |
| 39913 | 0, // zasubs1_then_zasubd1 |
| 39914 | 0, // zasubs1_then_zasubq0 |
| 39915 | 0, // zasubs1_then_zasubq1 |
| 39916 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 39917 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 39918 | 0, // zasubh1_then_zasubd0 |
| 39919 | 0, // zasubh1_then_zasubd1 |
| 39920 | 0, // zasubh1_then_zasubq0 |
| 39921 | 0, // zasubh1_then_zasubq1 |
| 39922 | 0, // zasubh1_then_zasubs0 |
| 39923 | 0, // zasubh1_then_zasubs1 |
| 39924 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 39925 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 39926 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 39927 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 39928 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 39929 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 39930 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 39931 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 39932 | 0, // dsub1_then_bsub |
| 39933 | 0, // dsub1_then_bsub_hi |
| 39934 | 0, // dsub1_then_hsub |
| 39935 | 0, // dsub1_then_hsub_hi |
| 39936 | 0, // dsub1_then_ssub |
| 39937 | 0, // dsub1_then_ssub_hi |
| 39938 | 0, // dsub3_then_bsub |
| 39939 | 0, // dsub3_then_bsub_hi |
| 39940 | 0, // dsub3_then_hsub |
| 39941 | 0, // dsub3_then_hsub_hi |
| 39942 | 0, // dsub3_then_ssub |
| 39943 | 0, // dsub3_then_ssub_hi |
| 39944 | 0, // dsub2_then_bsub |
| 39945 | 0, // dsub2_then_bsub_hi |
| 39946 | 0, // dsub2_then_hsub |
| 39947 | 0, // dsub2_then_hsub_hi |
| 39948 | 0, // dsub2_then_ssub |
| 39949 | 0, // dsub2_then_ssub_hi |
| 39950 | 0, // psub1_then_psub |
| 39951 | 0, // qsub1_then_dsub_hi |
| 39952 | 0, // qsub3_then_dsub_hi |
| 39953 | 0, // qsub2_then_dsub_hi |
| 39954 | 0, // x8sub_7_then_sub_32 |
| 39955 | 0, // x8sub_7_then_sub_32_hi |
| 39956 | 0, // x8sub_6_then_sub_32 |
| 39957 | 0, // x8sub_6_then_sub_32_hi |
| 39958 | 0, // x8sub_5_then_sub_32 |
| 39959 | 0, // x8sub_5_then_sub_32_hi |
| 39960 | 0, // x8sub_4_then_sub_32 |
| 39961 | 0, // x8sub_4_then_sub_32_hi |
| 39962 | 0, // x8sub_3_then_sub_32 |
| 39963 | 0, // x8sub_3_then_sub_32_hi |
| 39964 | 0, // x8sub_2_then_sub_32 |
| 39965 | 0, // x8sub_2_then_sub_32_hi |
| 39966 | 0, // x8sub_1_then_sub_32 |
| 39967 | 0, // x8sub_1_then_sub_32_hi |
| 39968 | 0, // subo64_then_sub_32 |
| 39969 | 0, // subo64_then_sub_32_hi |
| 39970 | 0, // zsub1_then_zsub_hi |
| 39971 | 0, // zsub3_then_zsub_hi |
| 39972 | 0, // zsub2_then_zsub_hi |
| 39973 | 0, // dsub0_dsub1 |
| 39974 | 0, // dsub0_dsub1_dsub2 |
| 39975 | 0, // dsub1_dsub2 |
| 39976 | 0, // dsub1_dsub2_dsub3 |
| 39977 | 0, // dsub2_dsub3 |
| 39978 | 0, // dsub_dsub1 |
| 39979 | 0, // dsub_dsub1_dsub2_dsub3 |
| 39980 | 0, // dsub_dsub1_dsub2 |
| 39981 | 0, // qsub0_qsub1 |
| 39982 | 0, // qsub0_qsub1_qsub2 |
| 39983 | 0, // qsub1_qsub2 |
| 39984 | 0, // qsub1_qsub2_qsub3 |
| 39985 | 0, // qsub2_qsub3 |
| 39986 | 0, // sub_32_x8sub_1_then_sub_32 |
| 39987 | 0, // x8sub_0_x8sub_1 |
| 39988 | 0, // x8sub_2_x8sub_3 |
| 39989 | 0, // x8sub_4_x8sub_5 |
| 39990 | 0, // x8sub_6_x8sub_7 |
| 39991 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 39992 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 39993 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 39994 | 0, // sub_32_subo64_then_sub_32 |
| 39995 | 0, // zsub_qsub1 |
| 39996 | 0, // zsub_qsub1_qsub2_qsub3 |
| 39997 | 0, // zsub_qsub1_qsub2 |
| 39998 | 0, // zsub0_zsub1 |
| 39999 | 0, // zsub0_zsub1_zsub2 |
| 40000 | 0, // zsub1_zsub2 |
| 40001 | 0, // zsub1_zsub2_zsub3 |
| 40002 | 0, // zsub2_zsub3 |
| 40003 | 0, // zsub0_zsub2 |
| 40004 | 0, // zsub1_zsub3 |
| 40005 | }, |
| 40006 | { // GPR64common |
| 40007 | 0, // bsub |
| 40008 | 0, // bsub_hi |
| 40009 | 0, // dsub |
| 40010 | 0, // dsub0 |
| 40011 | 0, // dsub1 |
| 40012 | 0, // dsub2 |
| 40013 | 0, // dsub3 |
| 40014 | 0, // dsub_hi |
| 40015 | 0, // hsub |
| 40016 | 0, // hsub_hi |
| 40017 | 0, // psub |
| 40018 | 0, // psub0 |
| 40019 | 0, // psub1 |
| 40020 | 0, // qsub0 |
| 40021 | 0, // qsub1 |
| 40022 | 0, // qsub2 |
| 40023 | 0, // qsub3 |
| 40024 | 0, // ssub |
| 40025 | 0, // ssub_hi |
| 40026 | 59, // sub_32 -> GPR64common |
| 40027 | 59, // sub_32_hi -> GPR64common |
| 40028 | 0, // sube32 |
| 40029 | 0, // sube64 |
| 40030 | 0, // subo32 |
| 40031 | 0, // subo64 |
| 40032 | 0, // x8sub_0 |
| 40033 | 0, // x8sub_1 |
| 40034 | 0, // x8sub_2 |
| 40035 | 0, // x8sub_3 |
| 40036 | 0, // x8sub_4 |
| 40037 | 0, // x8sub_5 |
| 40038 | 0, // x8sub_6 |
| 40039 | 0, // x8sub_7 |
| 40040 | 0, // zasubb |
| 40041 | 0, // zasubd0 |
| 40042 | 0, // zasubd1 |
| 40043 | 0, // zasubh0 |
| 40044 | 0, // zasubh1 |
| 40045 | 0, // zasubq0 |
| 40046 | 0, // zasubq1 |
| 40047 | 0, // zasubs0 |
| 40048 | 0, // zasubs1 |
| 40049 | 0, // zsub |
| 40050 | 0, // zsub0 |
| 40051 | 0, // zsub1 |
| 40052 | 0, // zsub2 |
| 40053 | 0, // zsub3 |
| 40054 | 0, // zsub_hi |
| 40055 | 0, // zasubd1_then_zasubq0 |
| 40056 | 0, // zasubd1_then_zasubq1 |
| 40057 | 0, // zasubs1_then_zasubd0 |
| 40058 | 0, // zasubs1_then_zasubd1 |
| 40059 | 0, // zasubs1_then_zasubq0 |
| 40060 | 0, // zasubs1_then_zasubq1 |
| 40061 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40062 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40063 | 0, // zasubh1_then_zasubd0 |
| 40064 | 0, // zasubh1_then_zasubd1 |
| 40065 | 0, // zasubh1_then_zasubq0 |
| 40066 | 0, // zasubh1_then_zasubq1 |
| 40067 | 0, // zasubh1_then_zasubs0 |
| 40068 | 0, // zasubh1_then_zasubs1 |
| 40069 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40070 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40071 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40072 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40073 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40074 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40075 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40076 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40077 | 0, // dsub1_then_bsub |
| 40078 | 0, // dsub1_then_bsub_hi |
| 40079 | 0, // dsub1_then_hsub |
| 40080 | 0, // dsub1_then_hsub_hi |
| 40081 | 0, // dsub1_then_ssub |
| 40082 | 0, // dsub1_then_ssub_hi |
| 40083 | 0, // dsub3_then_bsub |
| 40084 | 0, // dsub3_then_bsub_hi |
| 40085 | 0, // dsub3_then_hsub |
| 40086 | 0, // dsub3_then_hsub_hi |
| 40087 | 0, // dsub3_then_ssub |
| 40088 | 0, // dsub3_then_ssub_hi |
| 40089 | 0, // dsub2_then_bsub |
| 40090 | 0, // dsub2_then_bsub_hi |
| 40091 | 0, // dsub2_then_hsub |
| 40092 | 0, // dsub2_then_hsub_hi |
| 40093 | 0, // dsub2_then_ssub |
| 40094 | 0, // dsub2_then_ssub_hi |
| 40095 | 0, // psub1_then_psub |
| 40096 | 0, // qsub1_then_dsub_hi |
| 40097 | 0, // qsub3_then_dsub_hi |
| 40098 | 0, // qsub2_then_dsub_hi |
| 40099 | 0, // x8sub_7_then_sub_32 |
| 40100 | 0, // x8sub_7_then_sub_32_hi |
| 40101 | 0, // x8sub_6_then_sub_32 |
| 40102 | 0, // x8sub_6_then_sub_32_hi |
| 40103 | 0, // x8sub_5_then_sub_32 |
| 40104 | 0, // x8sub_5_then_sub_32_hi |
| 40105 | 0, // x8sub_4_then_sub_32 |
| 40106 | 0, // x8sub_4_then_sub_32_hi |
| 40107 | 0, // x8sub_3_then_sub_32 |
| 40108 | 0, // x8sub_3_then_sub_32_hi |
| 40109 | 0, // x8sub_2_then_sub_32 |
| 40110 | 0, // x8sub_2_then_sub_32_hi |
| 40111 | 0, // x8sub_1_then_sub_32 |
| 40112 | 0, // x8sub_1_then_sub_32_hi |
| 40113 | 0, // subo64_then_sub_32 |
| 40114 | 0, // subo64_then_sub_32_hi |
| 40115 | 0, // zsub1_then_zsub_hi |
| 40116 | 0, // zsub3_then_zsub_hi |
| 40117 | 0, // zsub2_then_zsub_hi |
| 40118 | 0, // dsub0_dsub1 |
| 40119 | 0, // dsub0_dsub1_dsub2 |
| 40120 | 0, // dsub1_dsub2 |
| 40121 | 0, // dsub1_dsub2_dsub3 |
| 40122 | 0, // dsub2_dsub3 |
| 40123 | 0, // dsub_dsub1 |
| 40124 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40125 | 0, // dsub_dsub1_dsub2 |
| 40126 | 0, // qsub0_qsub1 |
| 40127 | 0, // qsub0_qsub1_qsub2 |
| 40128 | 0, // qsub1_qsub2 |
| 40129 | 0, // qsub1_qsub2_qsub3 |
| 40130 | 0, // qsub2_qsub3 |
| 40131 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40132 | 0, // x8sub_0_x8sub_1 |
| 40133 | 0, // x8sub_2_x8sub_3 |
| 40134 | 0, // x8sub_4_x8sub_5 |
| 40135 | 0, // x8sub_6_x8sub_7 |
| 40136 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40137 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40138 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40139 | 0, // sub_32_subo64_then_sub_32 |
| 40140 | 0, // zsub_qsub1 |
| 40141 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40142 | 0, // zsub_qsub1_qsub2 |
| 40143 | 0, // zsub0_zsub1 |
| 40144 | 0, // zsub0_zsub1_zsub2 |
| 40145 | 0, // zsub1_zsub2 |
| 40146 | 0, // zsub1_zsub2_zsub3 |
| 40147 | 0, // zsub2_zsub3 |
| 40148 | 0, // zsub0_zsub2 |
| 40149 | 0, // zsub1_zsub3 |
| 40150 | }, |
| 40151 | { // GPR64noip |
| 40152 | 0, // bsub |
| 40153 | 0, // bsub_hi |
| 40154 | 0, // dsub |
| 40155 | 0, // dsub0 |
| 40156 | 0, // dsub1 |
| 40157 | 0, // dsub2 |
| 40158 | 0, // dsub3 |
| 40159 | 0, // dsub_hi |
| 40160 | 0, // hsub |
| 40161 | 0, // hsub_hi |
| 40162 | 0, // psub |
| 40163 | 0, // psub0 |
| 40164 | 0, // psub1 |
| 40165 | 0, // qsub0 |
| 40166 | 0, // qsub1 |
| 40167 | 0, // qsub2 |
| 40168 | 0, // qsub3 |
| 40169 | 0, // ssub |
| 40170 | 0, // ssub_hi |
| 40171 | 60, // sub_32 -> GPR64noip |
| 40172 | 60, // sub_32_hi -> GPR64noip |
| 40173 | 0, // sube32 |
| 40174 | 0, // sube64 |
| 40175 | 0, // subo32 |
| 40176 | 0, // subo64 |
| 40177 | 0, // x8sub_0 |
| 40178 | 0, // x8sub_1 |
| 40179 | 0, // x8sub_2 |
| 40180 | 0, // x8sub_3 |
| 40181 | 0, // x8sub_4 |
| 40182 | 0, // x8sub_5 |
| 40183 | 0, // x8sub_6 |
| 40184 | 0, // x8sub_7 |
| 40185 | 0, // zasubb |
| 40186 | 0, // zasubd0 |
| 40187 | 0, // zasubd1 |
| 40188 | 0, // zasubh0 |
| 40189 | 0, // zasubh1 |
| 40190 | 0, // zasubq0 |
| 40191 | 0, // zasubq1 |
| 40192 | 0, // zasubs0 |
| 40193 | 0, // zasubs1 |
| 40194 | 0, // zsub |
| 40195 | 0, // zsub0 |
| 40196 | 0, // zsub1 |
| 40197 | 0, // zsub2 |
| 40198 | 0, // zsub3 |
| 40199 | 0, // zsub_hi |
| 40200 | 0, // zasubd1_then_zasubq0 |
| 40201 | 0, // zasubd1_then_zasubq1 |
| 40202 | 0, // zasubs1_then_zasubd0 |
| 40203 | 0, // zasubs1_then_zasubd1 |
| 40204 | 0, // zasubs1_then_zasubq0 |
| 40205 | 0, // zasubs1_then_zasubq1 |
| 40206 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40207 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40208 | 0, // zasubh1_then_zasubd0 |
| 40209 | 0, // zasubh1_then_zasubd1 |
| 40210 | 0, // zasubh1_then_zasubq0 |
| 40211 | 0, // zasubh1_then_zasubq1 |
| 40212 | 0, // zasubh1_then_zasubs0 |
| 40213 | 0, // zasubh1_then_zasubs1 |
| 40214 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40215 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40216 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40217 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40218 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40219 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40220 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40221 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40222 | 0, // dsub1_then_bsub |
| 40223 | 0, // dsub1_then_bsub_hi |
| 40224 | 0, // dsub1_then_hsub |
| 40225 | 0, // dsub1_then_hsub_hi |
| 40226 | 0, // dsub1_then_ssub |
| 40227 | 0, // dsub1_then_ssub_hi |
| 40228 | 0, // dsub3_then_bsub |
| 40229 | 0, // dsub3_then_bsub_hi |
| 40230 | 0, // dsub3_then_hsub |
| 40231 | 0, // dsub3_then_hsub_hi |
| 40232 | 0, // dsub3_then_ssub |
| 40233 | 0, // dsub3_then_ssub_hi |
| 40234 | 0, // dsub2_then_bsub |
| 40235 | 0, // dsub2_then_bsub_hi |
| 40236 | 0, // dsub2_then_hsub |
| 40237 | 0, // dsub2_then_hsub_hi |
| 40238 | 0, // dsub2_then_ssub |
| 40239 | 0, // dsub2_then_ssub_hi |
| 40240 | 0, // psub1_then_psub |
| 40241 | 0, // qsub1_then_dsub_hi |
| 40242 | 0, // qsub3_then_dsub_hi |
| 40243 | 0, // qsub2_then_dsub_hi |
| 40244 | 0, // x8sub_7_then_sub_32 |
| 40245 | 0, // x8sub_7_then_sub_32_hi |
| 40246 | 0, // x8sub_6_then_sub_32 |
| 40247 | 0, // x8sub_6_then_sub_32_hi |
| 40248 | 0, // x8sub_5_then_sub_32 |
| 40249 | 0, // x8sub_5_then_sub_32_hi |
| 40250 | 0, // x8sub_4_then_sub_32 |
| 40251 | 0, // x8sub_4_then_sub_32_hi |
| 40252 | 0, // x8sub_3_then_sub_32 |
| 40253 | 0, // x8sub_3_then_sub_32_hi |
| 40254 | 0, // x8sub_2_then_sub_32 |
| 40255 | 0, // x8sub_2_then_sub_32_hi |
| 40256 | 0, // x8sub_1_then_sub_32 |
| 40257 | 0, // x8sub_1_then_sub_32_hi |
| 40258 | 0, // subo64_then_sub_32 |
| 40259 | 0, // subo64_then_sub_32_hi |
| 40260 | 0, // zsub1_then_zsub_hi |
| 40261 | 0, // zsub3_then_zsub_hi |
| 40262 | 0, // zsub2_then_zsub_hi |
| 40263 | 0, // dsub0_dsub1 |
| 40264 | 0, // dsub0_dsub1_dsub2 |
| 40265 | 0, // dsub1_dsub2 |
| 40266 | 0, // dsub1_dsub2_dsub3 |
| 40267 | 0, // dsub2_dsub3 |
| 40268 | 0, // dsub_dsub1 |
| 40269 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40270 | 0, // dsub_dsub1_dsub2 |
| 40271 | 0, // qsub0_qsub1 |
| 40272 | 0, // qsub0_qsub1_qsub2 |
| 40273 | 0, // qsub1_qsub2 |
| 40274 | 0, // qsub1_qsub2_qsub3 |
| 40275 | 0, // qsub2_qsub3 |
| 40276 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40277 | 0, // x8sub_0_x8sub_1 |
| 40278 | 0, // x8sub_2_x8sub_3 |
| 40279 | 0, // x8sub_4_x8sub_5 |
| 40280 | 0, // x8sub_6_x8sub_7 |
| 40281 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40282 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40283 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40284 | 0, // sub_32_subo64_then_sub_32 |
| 40285 | 0, // zsub_qsub1 |
| 40286 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40287 | 0, // zsub_qsub1_qsub2 |
| 40288 | 0, // zsub0_zsub1 |
| 40289 | 0, // zsub0_zsub1_zsub2 |
| 40290 | 0, // zsub1_zsub2 |
| 40291 | 0, // zsub1_zsub2_zsub3 |
| 40292 | 0, // zsub2_zsub3 |
| 40293 | 0, // zsub0_zsub2 |
| 40294 | 0, // zsub1_zsub3 |
| 40295 | }, |
| 40296 | { // GPR64common_and_GPR64noip |
| 40297 | 0, // bsub |
| 40298 | 0, // bsub_hi |
| 40299 | 0, // dsub |
| 40300 | 0, // dsub0 |
| 40301 | 0, // dsub1 |
| 40302 | 0, // dsub2 |
| 40303 | 0, // dsub3 |
| 40304 | 0, // dsub_hi |
| 40305 | 0, // hsub |
| 40306 | 0, // hsub_hi |
| 40307 | 0, // psub |
| 40308 | 0, // psub0 |
| 40309 | 0, // psub1 |
| 40310 | 0, // qsub0 |
| 40311 | 0, // qsub1 |
| 40312 | 0, // qsub2 |
| 40313 | 0, // qsub3 |
| 40314 | 0, // ssub |
| 40315 | 0, // ssub_hi |
| 40316 | 61, // sub_32 -> GPR64common_and_GPR64noip |
| 40317 | 61, // sub_32_hi -> GPR64common_and_GPR64noip |
| 40318 | 0, // sube32 |
| 40319 | 0, // sube64 |
| 40320 | 0, // subo32 |
| 40321 | 0, // subo64 |
| 40322 | 0, // x8sub_0 |
| 40323 | 0, // x8sub_1 |
| 40324 | 0, // x8sub_2 |
| 40325 | 0, // x8sub_3 |
| 40326 | 0, // x8sub_4 |
| 40327 | 0, // x8sub_5 |
| 40328 | 0, // x8sub_6 |
| 40329 | 0, // x8sub_7 |
| 40330 | 0, // zasubb |
| 40331 | 0, // zasubd0 |
| 40332 | 0, // zasubd1 |
| 40333 | 0, // zasubh0 |
| 40334 | 0, // zasubh1 |
| 40335 | 0, // zasubq0 |
| 40336 | 0, // zasubq1 |
| 40337 | 0, // zasubs0 |
| 40338 | 0, // zasubs1 |
| 40339 | 0, // zsub |
| 40340 | 0, // zsub0 |
| 40341 | 0, // zsub1 |
| 40342 | 0, // zsub2 |
| 40343 | 0, // zsub3 |
| 40344 | 0, // zsub_hi |
| 40345 | 0, // zasubd1_then_zasubq0 |
| 40346 | 0, // zasubd1_then_zasubq1 |
| 40347 | 0, // zasubs1_then_zasubd0 |
| 40348 | 0, // zasubs1_then_zasubd1 |
| 40349 | 0, // zasubs1_then_zasubq0 |
| 40350 | 0, // zasubs1_then_zasubq1 |
| 40351 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40352 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40353 | 0, // zasubh1_then_zasubd0 |
| 40354 | 0, // zasubh1_then_zasubd1 |
| 40355 | 0, // zasubh1_then_zasubq0 |
| 40356 | 0, // zasubh1_then_zasubq1 |
| 40357 | 0, // zasubh1_then_zasubs0 |
| 40358 | 0, // zasubh1_then_zasubs1 |
| 40359 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40360 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40361 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40362 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40363 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40364 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40365 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40366 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40367 | 0, // dsub1_then_bsub |
| 40368 | 0, // dsub1_then_bsub_hi |
| 40369 | 0, // dsub1_then_hsub |
| 40370 | 0, // dsub1_then_hsub_hi |
| 40371 | 0, // dsub1_then_ssub |
| 40372 | 0, // dsub1_then_ssub_hi |
| 40373 | 0, // dsub3_then_bsub |
| 40374 | 0, // dsub3_then_bsub_hi |
| 40375 | 0, // dsub3_then_hsub |
| 40376 | 0, // dsub3_then_hsub_hi |
| 40377 | 0, // dsub3_then_ssub |
| 40378 | 0, // dsub3_then_ssub_hi |
| 40379 | 0, // dsub2_then_bsub |
| 40380 | 0, // dsub2_then_bsub_hi |
| 40381 | 0, // dsub2_then_hsub |
| 40382 | 0, // dsub2_then_hsub_hi |
| 40383 | 0, // dsub2_then_ssub |
| 40384 | 0, // dsub2_then_ssub_hi |
| 40385 | 0, // psub1_then_psub |
| 40386 | 0, // qsub1_then_dsub_hi |
| 40387 | 0, // qsub3_then_dsub_hi |
| 40388 | 0, // qsub2_then_dsub_hi |
| 40389 | 0, // x8sub_7_then_sub_32 |
| 40390 | 0, // x8sub_7_then_sub_32_hi |
| 40391 | 0, // x8sub_6_then_sub_32 |
| 40392 | 0, // x8sub_6_then_sub_32_hi |
| 40393 | 0, // x8sub_5_then_sub_32 |
| 40394 | 0, // x8sub_5_then_sub_32_hi |
| 40395 | 0, // x8sub_4_then_sub_32 |
| 40396 | 0, // x8sub_4_then_sub_32_hi |
| 40397 | 0, // x8sub_3_then_sub_32 |
| 40398 | 0, // x8sub_3_then_sub_32_hi |
| 40399 | 0, // x8sub_2_then_sub_32 |
| 40400 | 0, // x8sub_2_then_sub_32_hi |
| 40401 | 0, // x8sub_1_then_sub_32 |
| 40402 | 0, // x8sub_1_then_sub_32_hi |
| 40403 | 0, // subo64_then_sub_32 |
| 40404 | 0, // subo64_then_sub_32_hi |
| 40405 | 0, // zsub1_then_zsub_hi |
| 40406 | 0, // zsub3_then_zsub_hi |
| 40407 | 0, // zsub2_then_zsub_hi |
| 40408 | 0, // dsub0_dsub1 |
| 40409 | 0, // dsub0_dsub1_dsub2 |
| 40410 | 0, // dsub1_dsub2 |
| 40411 | 0, // dsub1_dsub2_dsub3 |
| 40412 | 0, // dsub2_dsub3 |
| 40413 | 0, // dsub_dsub1 |
| 40414 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40415 | 0, // dsub_dsub1_dsub2 |
| 40416 | 0, // qsub0_qsub1 |
| 40417 | 0, // qsub0_qsub1_qsub2 |
| 40418 | 0, // qsub1_qsub2 |
| 40419 | 0, // qsub1_qsub2_qsub3 |
| 40420 | 0, // qsub2_qsub3 |
| 40421 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40422 | 0, // x8sub_0_x8sub_1 |
| 40423 | 0, // x8sub_2_x8sub_3 |
| 40424 | 0, // x8sub_4_x8sub_5 |
| 40425 | 0, // x8sub_6_x8sub_7 |
| 40426 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40427 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40428 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40429 | 0, // sub_32_subo64_then_sub_32 |
| 40430 | 0, // zsub_qsub1 |
| 40431 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40432 | 0, // zsub_qsub1_qsub2 |
| 40433 | 0, // zsub0_zsub1 |
| 40434 | 0, // zsub0_zsub1_zsub2 |
| 40435 | 0, // zsub1_zsub2 |
| 40436 | 0, // zsub1_zsub2_zsub3 |
| 40437 | 0, // zsub2_zsub3 |
| 40438 | 0, // zsub0_zsub2 |
| 40439 | 0, // zsub1_zsub3 |
| 40440 | }, |
| 40441 | { // tcGPR64 |
| 40442 | 0, // bsub |
| 40443 | 0, // bsub_hi |
| 40444 | 0, // dsub |
| 40445 | 0, // dsub0 |
| 40446 | 0, // dsub1 |
| 40447 | 0, // dsub2 |
| 40448 | 0, // dsub3 |
| 40449 | 0, // dsub_hi |
| 40450 | 0, // hsub |
| 40451 | 0, // hsub_hi |
| 40452 | 0, // psub |
| 40453 | 0, // psub0 |
| 40454 | 0, // psub1 |
| 40455 | 0, // qsub0 |
| 40456 | 0, // qsub1 |
| 40457 | 0, // qsub2 |
| 40458 | 0, // qsub3 |
| 40459 | 0, // ssub |
| 40460 | 0, // ssub_hi |
| 40461 | 62, // sub_32 -> tcGPR64 |
| 40462 | 62, // sub_32_hi -> tcGPR64 |
| 40463 | 0, // sube32 |
| 40464 | 0, // sube64 |
| 40465 | 0, // subo32 |
| 40466 | 0, // subo64 |
| 40467 | 0, // x8sub_0 |
| 40468 | 0, // x8sub_1 |
| 40469 | 0, // x8sub_2 |
| 40470 | 0, // x8sub_3 |
| 40471 | 0, // x8sub_4 |
| 40472 | 0, // x8sub_5 |
| 40473 | 0, // x8sub_6 |
| 40474 | 0, // x8sub_7 |
| 40475 | 0, // zasubb |
| 40476 | 0, // zasubd0 |
| 40477 | 0, // zasubd1 |
| 40478 | 0, // zasubh0 |
| 40479 | 0, // zasubh1 |
| 40480 | 0, // zasubq0 |
| 40481 | 0, // zasubq1 |
| 40482 | 0, // zasubs0 |
| 40483 | 0, // zasubs1 |
| 40484 | 0, // zsub |
| 40485 | 0, // zsub0 |
| 40486 | 0, // zsub1 |
| 40487 | 0, // zsub2 |
| 40488 | 0, // zsub3 |
| 40489 | 0, // zsub_hi |
| 40490 | 0, // zasubd1_then_zasubq0 |
| 40491 | 0, // zasubd1_then_zasubq1 |
| 40492 | 0, // zasubs1_then_zasubd0 |
| 40493 | 0, // zasubs1_then_zasubd1 |
| 40494 | 0, // zasubs1_then_zasubq0 |
| 40495 | 0, // zasubs1_then_zasubq1 |
| 40496 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40497 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40498 | 0, // zasubh1_then_zasubd0 |
| 40499 | 0, // zasubh1_then_zasubd1 |
| 40500 | 0, // zasubh1_then_zasubq0 |
| 40501 | 0, // zasubh1_then_zasubq1 |
| 40502 | 0, // zasubh1_then_zasubs0 |
| 40503 | 0, // zasubh1_then_zasubs1 |
| 40504 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40505 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40506 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40507 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40508 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40509 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40510 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40511 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40512 | 0, // dsub1_then_bsub |
| 40513 | 0, // dsub1_then_bsub_hi |
| 40514 | 0, // dsub1_then_hsub |
| 40515 | 0, // dsub1_then_hsub_hi |
| 40516 | 0, // dsub1_then_ssub |
| 40517 | 0, // dsub1_then_ssub_hi |
| 40518 | 0, // dsub3_then_bsub |
| 40519 | 0, // dsub3_then_bsub_hi |
| 40520 | 0, // dsub3_then_hsub |
| 40521 | 0, // dsub3_then_hsub_hi |
| 40522 | 0, // dsub3_then_ssub |
| 40523 | 0, // dsub3_then_ssub_hi |
| 40524 | 0, // dsub2_then_bsub |
| 40525 | 0, // dsub2_then_bsub_hi |
| 40526 | 0, // dsub2_then_hsub |
| 40527 | 0, // dsub2_then_hsub_hi |
| 40528 | 0, // dsub2_then_ssub |
| 40529 | 0, // dsub2_then_ssub_hi |
| 40530 | 0, // psub1_then_psub |
| 40531 | 0, // qsub1_then_dsub_hi |
| 40532 | 0, // qsub3_then_dsub_hi |
| 40533 | 0, // qsub2_then_dsub_hi |
| 40534 | 0, // x8sub_7_then_sub_32 |
| 40535 | 0, // x8sub_7_then_sub_32_hi |
| 40536 | 0, // x8sub_6_then_sub_32 |
| 40537 | 0, // x8sub_6_then_sub_32_hi |
| 40538 | 0, // x8sub_5_then_sub_32 |
| 40539 | 0, // x8sub_5_then_sub_32_hi |
| 40540 | 0, // x8sub_4_then_sub_32 |
| 40541 | 0, // x8sub_4_then_sub_32_hi |
| 40542 | 0, // x8sub_3_then_sub_32 |
| 40543 | 0, // x8sub_3_then_sub_32_hi |
| 40544 | 0, // x8sub_2_then_sub_32 |
| 40545 | 0, // x8sub_2_then_sub_32_hi |
| 40546 | 0, // x8sub_1_then_sub_32 |
| 40547 | 0, // x8sub_1_then_sub_32_hi |
| 40548 | 0, // subo64_then_sub_32 |
| 40549 | 0, // subo64_then_sub_32_hi |
| 40550 | 0, // zsub1_then_zsub_hi |
| 40551 | 0, // zsub3_then_zsub_hi |
| 40552 | 0, // zsub2_then_zsub_hi |
| 40553 | 0, // dsub0_dsub1 |
| 40554 | 0, // dsub0_dsub1_dsub2 |
| 40555 | 0, // dsub1_dsub2 |
| 40556 | 0, // dsub1_dsub2_dsub3 |
| 40557 | 0, // dsub2_dsub3 |
| 40558 | 0, // dsub_dsub1 |
| 40559 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40560 | 0, // dsub_dsub1_dsub2 |
| 40561 | 0, // qsub0_qsub1 |
| 40562 | 0, // qsub0_qsub1_qsub2 |
| 40563 | 0, // qsub1_qsub2 |
| 40564 | 0, // qsub1_qsub2_qsub3 |
| 40565 | 0, // qsub2_qsub3 |
| 40566 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40567 | 0, // x8sub_0_x8sub_1 |
| 40568 | 0, // x8sub_2_x8sub_3 |
| 40569 | 0, // x8sub_4_x8sub_5 |
| 40570 | 0, // x8sub_6_x8sub_7 |
| 40571 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40572 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40573 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40574 | 0, // sub_32_subo64_then_sub_32 |
| 40575 | 0, // zsub_qsub1 |
| 40576 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40577 | 0, // zsub_qsub1_qsub2 |
| 40578 | 0, // zsub0_zsub1 |
| 40579 | 0, // zsub0_zsub1_zsub2 |
| 40580 | 0, // zsub1_zsub2 |
| 40581 | 0, // zsub1_zsub2_zsub3 |
| 40582 | 0, // zsub2_zsub3 |
| 40583 | 0, // zsub0_zsub2 |
| 40584 | 0, // zsub1_zsub3 |
| 40585 | }, |
| 40586 | { // tcGPRnotx16 |
| 40587 | 0, // bsub |
| 40588 | 0, // bsub_hi |
| 40589 | 0, // dsub |
| 40590 | 0, // dsub0 |
| 40591 | 0, // dsub1 |
| 40592 | 0, // dsub2 |
| 40593 | 0, // dsub3 |
| 40594 | 0, // dsub_hi |
| 40595 | 0, // hsub |
| 40596 | 0, // hsub_hi |
| 40597 | 0, // psub |
| 40598 | 0, // psub0 |
| 40599 | 0, // psub1 |
| 40600 | 0, // qsub0 |
| 40601 | 0, // qsub1 |
| 40602 | 0, // qsub2 |
| 40603 | 0, // qsub3 |
| 40604 | 0, // ssub |
| 40605 | 0, // ssub_hi |
| 40606 | 63, // sub_32 -> tcGPRnotx16 |
| 40607 | 63, // sub_32_hi -> tcGPRnotx16 |
| 40608 | 0, // sube32 |
| 40609 | 0, // sube64 |
| 40610 | 0, // subo32 |
| 40611 | 0, // subo64 |
| 40612 | 0, // x8sub_0 |
| 40613 | 0, // x8sub_1 |
| 40614 | 0, // x8sub_2 |
| 40615 | 0, // x8sub_3 |
| 40616 | 0, // x8sub_4 |
| 40617 | 0, // x8sub_5 |
| 40618 | 0, // x8sub_6 |
| 40619 | 0, // x8sub_7 |
| 40620 | 0, // zasubb |
| 40621 | 0, // zasubd0 |
| 40622 | 0, // zasubd1 |
| 40623 | 0, // zasubh0 |
| 40624 | 0, // zasubh1 |
| 40625 | 0, // zasubq0 |
| 40626 | 0, // zasubq1 |
| 40627 | 0, // zasubs0 |
| 40628 | 0, // zasubs1 |
| 40629 | 0, // zsub |
| 40630 | 0, // zsub0 |
| 40631 | 0, // zsub1 |
| 40632 | 0, // zsub2 |
| 40633 | 0, // zsub3 |
| 40634 | 0, // zsub_hi |
| 40635 | 0, // zasubd1_then_zasubq0 |
| 40636 | 0, // zasubd1_then_zasubq1 |
| 40637 | 0, // zasubs1_then_zasubd0 |
| 40638 | 0, // zasubs1_then_zasubd1 |
| 40639 | 0, // zasubs1_then_zasubq0 |
| 40640 | 0, // zasubs1_then_zasubq1 |
| 40641 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40642 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40643 | 0, // zasubh1_then_zasubd0 |
| 40644 | 0, // zasubh1_then_zasubd1 |
| 40645 | 0, // zasubh1_then_zasubq0 |
| 40646 | 0, // zasubh1_then_zasubq1 |
| 40647 | 0, // zasubh1_then_zasubs0 |
| 40648 | 0, // zasubh1_then_zasubs1 |
| 40649 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40650 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40651 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40652 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40653 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40654 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40655 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40656 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40657 | 0, // dsub1_then_bsub |
| 40658 | 0, // dsub1_then_bsub_hi |
| 40659 | 0, // dsub1_then_hsub |
| 40660 | 0, // dsub1_then_hsub_hi |
| 40661 | 0, // dsub1_then_ssub |
| 40662 | 0, // dsub1_then_ssub_hi |
| 40663 | 0, // dsub3_then_bsub |
| 40664 | 0, // dsub3_then_bsub_hi |
| 40665 | 0, // dsub3_then_hsub |
| 40666 | 0, // dsub3_then_hsub_hi |
| 40667 | 0, // dsub3_then_ssub |
| 40668 | 0, // dsub3_then_ssub_hi |
| 40669 | 0, // dsub2_then_bsub |
| 40670 | 0, // dsub2_then_bsub_hi |
| 40671 | 0, // dsub2_then_hsub |
| 40672 | 0, // dsub2_then_hsub_hi |
| 40673 | 0, // dsub2_then_ssub |
| 40674 | 0, // dsub2_then_ssub_hi |
| 40675 | 0, // psub1_then_psub |
| 40676 | 0, // qsub1_then_dsub_hi |
| 40677 | 0, // qsub3_then_dsub_hi |
| 40678 | 0, // qsub2_then_dsub_hi |
| 40679 | 0, // x8sub_7_then_sub_32 |
| 40680 | 0, // x8sub_7_then_sub_32_hi |
| 40681 | 0, // x8sub_6_then_sub_32 |
| 40682 | 0, // x8sub_6_then_sub_32_hi |
| 40683 | 0, // x8sub_5_then_sub_32 |
| 40684 | 0, // x8sub_5_then_sub_32_hi |
| 40685 | 0, // x8sub_4_then_sub_32 |
| 40686 | 0, // x8sub_4_then_sub_32_hi |
| 40687 | 0, // x8sub_3_then_sub_32 |
| 40688 | 0, // x8sub_3_then_sub_32_hi |
| 40689 | 0, // x8sub_2_then_sub_32 |
| 40690 | 0, // x8sub_2_then_sub_32_hi |
| 40691 | 0, // x8sub_1_then_sub_32 |
| 40692 | 0, // x8sub_1_then_sub_32_hi |
| 40693 | 0, // subo64_then_sub_32 |
| 40694 | 0, // subo64_then_sub_32_hi |
| 40695 | 0, // zsub1_then_zsub_hi |
| 40696 | 0, // zsub3_then_zsub_hi |
| 40697 | 0, // zsub2_then_zsub_hi |
| 40698 | 0, // dsub0_dsub1 |
| 40699 | 0, // dsub0_dsub1_dsub2 |
| 40700 | 0, // dsub1_dsub2 |
| 40701 | 0, // dsub1_dsub2_dsub3 |
| 40702 | 0, // dsub2_dsub3 |
| 40703 | 0, // dsub_dsub1 |
| 40704 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40705 | 0, // dsub_dsub1_dsub2 |
| 40706 | 0, // qsub0_qsub1 |
| 40707 | 0, // qsub0_qsub1_qsub2 |
| 40708 | 0, // qsub1_qsub2 |
| 40709 | 0, // qsub1_qsub2_qsub3 |
| 40710 | 0, // qsub2_qsub3 |
| 40711 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40712 | 0, // x8sub_0_x8sub_1 |
| 40713 | 0, // x8sub_2_x8sub_3 |
| 40714 | 0, // x8sub_4_x8sub_5 |
| 40715 | 0, // x8sub_6_x8sub_7 |
| 40716 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40717 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40718 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40719 | 0, // sub_32_subo64_then_sub_32 |
| 40720 | 0, // zsub_qsub1 |
| 40721 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40722 | 0, // zsub_qsub1_qsub2 |
| 40723 | 0, // zsub0_zsub1 |
| 40724 | 0, // zsub0_zsub1_zsub2 |
| 40725 | 0, // zsub1_zsub2 |
| 40726 | 0, // zsub1_zsub2_zsub3 |
| 40727 | 0, // zsub2_zsub3 |
| 40728 | 0, // zsub0_zsub2 |
| 40729 | 0, // zsub1_zsub3 |
| 40730 | }, |
| 40731 | { // tcGPRnotx16x17 |
| 40732 | 0, // bsub |
| 40733 | 0, // bsub_hi |
| 40734 | 0, // dsub |
| 40735 | 0, // dsub0 |
| 40736 | 0, // dsub1 |
| 40737 | 0, // dsub2 |
| 40738 | 0, // dsub3 |
| 40739 | 0, // dsub_hi |
| 40740 | 0, // hsub |
| 40741 | 0, // hsub_hi |
| 40742 | 0, // psub |
| 40743 | 0, // psub0 |
| 40744 | 0, // psub1 |
| 40745 | 0, // qsub0 |
| 40746 | 0, // qsub1 |
| 40747 | 0, // qsub2 |
| 40748 | 0, // qsub3 |
| 40749 | 0, // ssub |
| 40750 | 0, // ssub_hi |
| 40751 | 64, // sub_32 -> tcGPRnotx16x17 |
| 40752 | 64, // sub_32_hi -> tcGPRnotx16x17 |
| 40753 | 0, // sube32 |
| 40754 | 0, // sube64 |
| 40755 | 0, // subo32 |
| 40756 | 0, // subo64 |
| 40757 | 0, // x8sub_0 |
| 40758 | 0, // x8sub_1 |
| 40759 | 0, // x8sub_2 |
| 40760 | 0, // x8sub_3 |
| 40761 | 0, // x8sub_4 |
| 40762 | 0, // x8sub_5 |
| 40763 | 0, // x8sub_6 |
| 40764 | 0, // x8sub_7 |
| 40765 | 0, // zasubb |
| 40766 | 0, // zasubd0 |
| 40767 | 0, // zasubd1 |
| 40768 | 0, // zasubh0 |
| 40769 | 0, // zasubh1 |
| 40770 | 0, // zasubq0 |
| 40771 | 0, // zasubq1 |
| 40772 | 0, // zasubs0 |
| 40773 | 0, // zasubs1 |
| 40774 | 0, // zsub |
| 40775 | 0, // zsub0 |
| 40776 | 0, // zsub1 |
| 40777 | 0, // zsub2 |
| 40778 | 0, // zsub3 |
| 40779 | 0, // zsub_hi |
| 40780 | 0, // zasubd1_then_zasubq0 |
| 40781 | 0, // zasubd1_then_zasubq1 |
| 40782 | 0, // zasubs1_then_zasubd0 |
| 40783 | 0, // zasubs1_then_zasubd1 |
| 40784 | 0, // zasubs1_then_zasubq0 |
| 40785 | 0, // zasubs1_then_zasubq1 |
| 40786 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40787 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40788 | 0, // zasubh1_then_zasubd0 |
| 40789 | 0, // zasubh1_then_zasubd1 |
| 40790 | 0, // zasubh1_then_zasubq0 |
| 40791 | 0, // zasubh1_then_zasubq1 |
| 40792 | 0, // zasubh1_then_zasubs0 |
| 40793 | 0, // zasubh1_then_zasubs1 |
| 40794 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40795 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40796 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40797 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40798 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40799 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40800 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40801 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40802 | 0, // dsub1_then_bsub |
| 40803 | 0, // dsub1_then_bsub_hi |
| 40804 | 0, // dsub1_then_hsub |
| 40805 | 0, // dsub1_then_hsub_hi |
| 40806 | 0, // dsub1_then_ssub |
| 40807 | 0, // dsub1_then_ssub_hi |
| 40808 | 0, // dsub3_then_bsub |
| 40809 | 0, // dsub3_then_bsub_hi |
| 40810 | 0, // dsub3_then_hsub |
| 40811 | 0, // dsub3_then_hsub_hi |
| 40812 | 0, // dsub3_then_ssub |
| 40813 | 0, // dsub3_then_ssub_hi |
| 40814 | 0, // dsub2_then_bsub |
| 40815 | 0, // dsub2_then_bsub_hi |
| 40816 | 0, // dsub2_then_hsub |
| 40817 | 0, // dsub2_then_hsub_hi |
| 40818 | 0, // dsub2_then_ssub |
| 40819 | 0, // dsub2_then_ssub_hi |
| 40820 | 0, // psub1_then_psub |
| 40821 | 0, // qsub1_then_dsub_hi |
| 40822 | 0, // qsub3_then_dsub_hi |
| 40823 | 0, // qsub2_then_dsub_hi |
| 40824 | 0, // x8sub_7_then_sub_32 |
| 40825 | 0, // x8sub_7_then_sub_32_hi |
| 40826 | 0, // x8sub_6_then_sub_32 |
| 40827 | 0, // x8sub_6_then_sub_32_hi |
| 40828 | 0, // x8sub_5_then_sub_32 |
| 40829 | 0, // x8sub_5_then_sub_32_hi |
| 40830 | 0, // x8sub_4_then_sub_32 |
| 40831 | 0, // x8sub_4_then_sub_32_hi |
| 40832 | 0, // x8sub_3_then_sub_32 |
| 40833 | 0, // x8sub_3_then_sub_32_hi |
| 40834 | 0, // x8sub_2_then_sub_32 |
| 40835 | 0, // x8sub_2_then_sub_32_hi |
| 40836 | 0, // x8sub_1_then_sub_32 |
| 40837 | 0, // x8sub_1_then_sub_32_hi |
| 40838 | 0, // subo64_then_sub_32 |
| 40839 | 0, // subo64_then_sub_32_hi |
| 40840 | 0, // zsub1_then_zsub_hi |
| 40841 | 0, // zsub3_then_zsub_hi |
| 40842 | 0, // zsub2_then_zsub_hi |
| 40843 | 0, // dsub0_dsub1 |
| 40844 | 0, // dsub0_dsub1_dsub2 |
| 40845 | 0, // dsub1_dsub2 |
| 40846 | 0, // dsub1_dsub2_dsub3 |
| 40847 | 0, // dsub2_dsub3 |
| 40848 | 0, // dsub_dsub1 |
| 40849 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40850 | 0, // dsub_dsub1_dsub2 |
| 40851 | 0, // qsub0_qsub1 |
| 40852 | 0, // qsub0_qsub1_qsub2 |
| 40853 | 0, // qsub1_qsub2 |
| 40854 | 0, // qsub1_qsub2_qsub3 |
| 40855 | 0, // qsub2_qsub3 |
| 40856 | 0, // sub_32_x8sub_1_then_sub_32 |
| 40857 | 0, // x8sub_0_x8sub_1 |
| 40858 | 0, // x8sub_2_x8sub_3 |
| 40859 | 0, // x8sub_4_x8sub_5 |
| 40860 | 0, // x8sub_6_x8sub_7 |
| 40861 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 40862 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 40863 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 40864 | 0, // sub_32_subo64_then_sub_32 |
| 40865 | 0, // zsub_qsub1 |
| 40866 | 0, // zsub_qsub1_qsub2_qsub3 |
| 40867 | 0, // zsub_qsub1_qsub2 |
| 40868 | 0, // zsub0_zsub1 |
| 40869 | 0, // zsub0_zsub1_zsub2 |
| 40870 | 0, // zsub1_zsub2 |
| 40871 | 0, // zsub1_zsub2_zsub3 |
| 40872 | 0, // zsub2_zsub3 |
| 40873 | 0, // zsub0_zsub2 |
| 40874 | 0, // zsub1_zsub3 |
| 40875 | }, |
| 40876 | { // FPR64_lo |
| 40877 | 65, // bsub -> FPR64_lo |
| 40878 | 65, // bsub_hi -> FPR64_lo |
| 40879 | 0, // dsub |
| 40880 | 0, // dsub0 |
| 40881 | 0, // dsub1 |
| 40882 | 0, // dsub2 |
| 40883 | 0, // dsub3 |
| 40884 | 0, // dsub_hi |
| 40885 | 65, // hsub -> FPR64_lo |
| 40886 | 65, // hsub_hi -> FPR64_lo |
| 40887 | 0, // psub |
| 40888 | 0, // psub0 |
| 40889 | 0, // psub1 |
| 40890 | 0, // qsub0 |
| 40891 | 0, // qsub1 |
| 40892 | 0, // qsub2 |
| 40893 | 0, // qsub3 |
| 40894 | 65, // ssub -> FPR64_lo |
| 40895 | 65, // ssub_hi -> FPR64_lo |
| 40896 | 0, // sub_32 |
| 40897 | 0, // sub_32_hi |
| 40898 | 0, // sube32 |
| 40899 | 0, // sube64 |
| 40900 | 0, // subo32 |
| 40901 | 0, // subo64 |
| 40902 | 0, // x8sub_0 |
| 40903 | 0, // x8sub_1 |
| 40904 | 0, // x8sub_2 |
| 40905 | 0, // x8sub_3 |
| 40906 | 0, // x8sub_4 |
| 40907 | 0, // x8sub_5 |
| 40908 | 0, // x8sub_6 |
| 40909 | 0, // x8sub_7 |
| 40910 | 0, // zasubb |
| 40911 | 0, // zasubd0 |
| 40912 | 0, // zasubd1 |
| 40913 | 0, // zasubh0 |
| 40914 | 0, // zasubh1 |
| 40915 | 0, // zasubq0 |
| 40916 | 0, // zasubq1 |
| 40917 | 0, // zasubs0 |
| 40918 | 0, // zasubs1 |
| 40919 | 0, // zsub |
| 40920 | 0, // zsub0 |
| 40921 | 0, // zsub1 |
| 40922 | 0, // zsub2 |
| 40923 | 0, // zsub3 |
| 40924 | 0, // zsub_hi |
| 40925 | 0, // zasubd1_then_zasubq0 |
| 40926 | 0, // zasubd1_then_zasubq1 |
| 40927 | 0, // zasubs1_then_zasubd0 |
| 40928 | 0, // zasubs1_then_zasubd1 |
| 40929 | 0, // zasubs1_then_zasubq0 |
| 40930 | 0, // zasubs1_then_zasubq1 |
| 40931 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 40932 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 40933 | 0, // zasubh1_then_zasubd0 |
| 40934 | 0, // zasubh1_then_zasubd1 |
| 40935 | 0, // zasubh1_then_zasubq0 |
| 40936 | 0, // zasubh1_then_zasubq1 |
| 40937 | 0, // zasubh1_then_zasubs0 |
| 40938 | 0, // zasubh1_then_zasubs1 |
| 40939 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 40940 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 40941 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 40942 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 40943 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 40944 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 40945 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 40946 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 40947 | 0, // dsub1_then_bsub |
| 40948 | 0, // dsub1_then_bsub_hi |
| 40949 | 0, // dsub1_then_hsub |
| 40950 | 0, // dsub1_then_hsub_hi |
| 40951 | 0, // dsub1_then_ssub |
| 40952 | 0, // dsub1_then_ssub_hi |
| 40953 | 0, // dsub3_then_bsub |
| 40954 | 0, // dsub3_then_bsub_hi |
| 40955 | 0, // dsub3_then_hsub |
| 40956 | 0, // dsub3_then_hsub_hi |
| 40957 | 0, // dsub3_then_ssub |
| 40958 | 0, // dsub3_then_ssub_hi |
| 40959 | 0, // dsub2_then_bsub |
| 40960 | 0, // dsub2_then_bsub_hi |
| 40961 | 0, // dsub2_then_hsub |
| 40962 | 0, // dsub2_then_hsub_hi |
| 40963 | 0, // dsub2_then_ssub |
| 40964 | 0, // dsub2_then_ssub_hi |
| 40965 | 0, // psub1_then_psub |
| 40966 | 0, // qsub1_then_dsub_hi |
| 40967 | 0, // qsub3_then_dsub_hi |
| 40968 | 0, // qsub2_then_dsub_hi |
| 40969 | 0, // x8sub_7_then_sub_32 |
| 40970 | 0, // x8sub_7_then_sub_32_hi |
| 40971 | 0, // x8sub_6_then_sub_32 |
| 40972 | 0, // x8sub_6_then_sub_32_hi |
| 40973 | 0, // x8sub_5_then_sub_32 |
| 40974 | 0, // x8sub_5_then_sub_32_hi |
| 40975 | 0, // x8sub_4_then_sub_32 |
| 40976 | 0, // x8sub_4_then_sub_32_hi |
| 40977 | 0, // x8sub_3_then_sub_32 |
| 40978 | 0, // x8sub_3_then_sub_32_hi |
| 40979 | 0, // x8sub_2_then_sub_32 |
| 40980 | 0, // x8sub_2_then_sub_32_hi |
| 40981 | 0, // x8sub_1_then_sub_32 |
| 40982 | 0, // x8sub_1_then_sub_32_hi |
| 40983 | 0, // subo64_then_sub_32 |
| 40984 | 0, // subo64_then_sub_32_hi |
| 40985 | 0, // zsub1_then_zsub_hi |
| 40986 | 0, // zsub3_then_zsub_hi |
| 40987 | 0, // zsub2_then_zsub_hi |
| 40988 | 0, // dsub0_dsub1 |
| 40989 | 0, // dsub0_dsub1_dsub2 |
| 40990 | 0, // dsub1_dsub2 |
| 40991 | 0, // dsub1_dsub2_dsub3 |
| 40992 | 0, // dsub2_dsub3 |
| 40993 | 0, // dsub_dsub1 |
| 40994 | 0, // dsub_dsub1_dsub2_dsub3 |
| 40995 | 0, // dsub_dsub1_dsub2 |
| 40996 | 0, // qsub0_qsub1 |
| 40997 | 0, // qsub0_qsub1_qsub2 |
| 40998 | 0, // qsub1_qsub2 |
| 40999 | 0, // qsub1_qsub2_qsub3 |
| 41000 | 0, // qsub2_qsub3 |
| 41001 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41002 | 0, // x8sub_0_x8sub_1 |
| 41003 | 0, // x8sub_2_x8sub_3 |
| 41004 | 0, // x8sub_4_x8sub_5 |
| 41005 | 0, // x8sub_6_x8sub_7 |
| 41006 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41007 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41008 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41009 | 0, // sub_32_subo64_then_sub_32 |
| 41010 | 0, // zsub_qsub1 |
| 41011 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41012 | 0, // zsub_qsub1_qsub2 |
| 41013 | 0, // zsub0_zsub1 |
| 41014 | 0, // zsub0_zsub1_zsub2 |
| 41015 | 0, // zsub1_zsub2 |
| 41016 | 0, // zsub1_zsub2_zsub3 |
| 41017 | 0, // zsub2_zsub3 |
| 41018 | 0, // zsub0_zsub2 |
| 41019 | 0, // zsub1_zsub3 |
| 41020 | }, |
| 41021 | { // GPR64arg |
| 41022 | 0, // bsub |
| 41023 | 0, // bsub_hi |
| 41024 | 0, // dsub |
| 41025 | 0, // dsub0 |
| 41026 | 0, // dsub1 |
| 41027 | 0, // dsub2 |
| 41028 | 0, // dsub3 |
| 41029 | 0, // dsub_hi |
| 41030 | 0, // hsub |
| 41031 | 0, // hsub_hi |
| 41032 | 0, // psub |
| 41033 | 0, // psub0 |
| 41034 | 0, // psub1 |
| 41035 | 0, // qsub0 |
| 41036 | 0, // qsub1 |
| 41037 | 0, // qsub2 |
| 41038 | 0, // qsub3 |
| 41039 | 0, // ssub |
| 41040 | 0, // ssub_hi |
| 41041 | 66, // sub_32 -> GPR64arg |
| 41042 | 66, // sub_32_hi -> GPR64arg |
| 41043 | 0, // sube32 |
| 41044 | 0, // sube64 |
| 41045 | 0, // subo32 |
| 41046 | 0, // subo64 |
| 41047 | 0, // x8sub_0 |
| 41048 | 0, // x8sub_1 |
| 41049 | 0, // x8sub_2 |
| 41050 | 0, // x8sub_3 |
| 41051 | 0, // x8sub_4 |
| 41052 | 0, // x8sub_5 |
| 41053 | 0, // x8sub_6 |
| 41054 | 0, // x8sub_7 |
| 41055 | 0, // zasubb |
| 41056 | 0, // zasubd0 |
| 41057 | 0, // zasubd1 |
| 41058 | 0, // zasubh0 |
| 41059 | 0, // zasubh1 |
| 41060 | 0, // zasubq0 |
| 41061 | 0, // zasubq1 |
| 41062 | 0, // zasubs0 |
| 41063 | 0, // zasubs1 |
| 41064 | 0, // zsub |
| 41065 | 0, // zsub0 |
| 41066 | 0, // zsub1 |
| 41067 | 0, // zsub2 |
| 41068 | 0, // zsub3 |
| 41069 | 0, // zsub_hi |
| 41070 | 0, // zasubd1_then_zasubq0 |
| 41071 | 0, // zasubd1_then_zasubq1 |
| 41072 | 0, // zasubs1_then_zasubd0 |
| 41073 | 0, // zasubs1_then_zasubd1 |
| 41074 | 0, // zasubs1_then_zasubq0 |
| 41075 | 0, // zasubs1_then_zasubq1 |
| 41076 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41077 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41078 | 0, // zasubh1_then_zasubd0 |
| 41079 | 0, // zasubh1_then_zasubd1 |
| 41080 | 0, // zasubh1_then_zasubq0 |
| 41081 | 0, // zasubh1_then_zasubq1 |
| 41082 | 0, // zasubh1_then_zasubs0 |
| 41083 | 0, // zasubh1_then_zasubs1 |
| 41084 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41085 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41086 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41087 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41088 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41089 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41090 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41091 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41092 | 0, // dsub1_then_bsub |
| 41093 | 0, // dsub1_then_bsub_hi |
| 41094 | 0, // dsub1_then_hsub |
| 41095 | 0, // dsub1_then_hsub_hi |
| 41096 | 0, // dsub1_then_ssub |
| 41097 | 0, // dsub1_then_ssub_hi |
| 41098 | 0, // dsub3_then_bsub |
| 41099 | 0, // dsub3_then_bsub_hi |
| 41100 | 0, // dsub3_then_hsub |
| 41101 | 0, // dsub3_then_hsub_hi |
| 41102 | 0, // dsub3_then_ssub |
| 41103 | 0, // dsub3_then_ssub_hi |
| 41104 | 0, // dsub2_then_bsub |
| 41105 | 0, // dsub2_then_bsub_hi |
| 41106 | 0, // dsub2_then_hsub |
| 41107 | 0, // dsub2_then_hsub_hi |
| 41108 | 0, // dsub2_then_ssub |
| 41109 | 0, // dsub2_then_ssub_hi |
| 41110 | 0, // psub1_then_psub |
| 41111 | 0, // qsub1_then_dsub_hi |
| 41112 | 0, // qsub3_then_dsub_hi |
| 41113 | 0, // qsub2_then_dsub_hi |
| 41114 | 0, // x8sub_7_then_sub_32 |
| 41115 | 0, // x8sub_7_then_sub_32_hi |
| 41116 | 0, // x8sub_6_then_sub_32 |
| 41117 | 0, // x8sub_6_then_sub_32_hi |
| 41118 | 0, // x8sub_5_then_sub_32 |
| 41119 | 0, // x8sub_5_then_sub_32_hi |
| 41120 | 0, // x8sub_4_then_sub_32 |
| 41121 | 0, // x8sub_4_then_sub_32_hi |
| 41122 | 0, // x8sub_3_then_sub_32 |
| 41123 | 0, // x8sub_3_then_sub_32_hi |
| 41124 | 0, // x8sub_2_then_sub_32 |
| 41125 | 0, // x8sub_2_then_sub_32_hi |
| 41126 | 0, // x8sub_1_then_sub_32 |
| 41127 | 0, // x8sub_1_then_sub_32_hi |
| 41128 | 0, // subo64_then_sub_32 |
| 41129 | 0, // subo64_then_sub_32_hi |
| 41130 | 0, // zsub1_then_zsub_hi |
| 41131 | 0, // zsub3_then_zsub_hi |
| 41132 | 0, // zsub2_then_zsub_hi |
| 41133 | 0, // dsub0_dsub1 |
| 41134 | 0, // dsub0_dsub1_dsub2 |
| 41135 | 0, // dsub1_dsub2 |
| 41136 | 0, // dsub1_dsub2_dsub3 |
| 41137 | 0, // dsub2_dsub3 |
| 41138 | 0, // dsub_dsub1 |
| 41139 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41140 | 0, // dsub_dsub1_dsub2 |
| 41141 | 0, // qsub0_qsub1 |
| 41142 | 0, // qsub0_qsub1_qsub2 |
| 41143 | 0, // qsub1_qsub2 |
| 41144 | 0, // qsub1_qsub2_qsub3 |
| 41145 | 0, // qsub2_qsub3 |
| 41146 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41147 | 0, // x8sub_0_x8sub_1 |
| 41148 | 0, // x8sub_2_x8sub_3 |
| 41149 | 0, // x8sub_4_x8sub_5 |
| 41150 | 0, // x8sub_6_x8sub_7 |
| 41151 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41152 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41153 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41154 | 0, // sub_32_subo64_then_sub_32 |
| 41155 | 0, // zsub_qsub1 |
| 41156 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41157 | 0, // zsub_qsub1_qsub2 |
| 41158 | 0, // zsub0_zsub1 |
| 41159 | 0, // zsub0_zsub1_zsub2 |
| 41160 | 0, // zsub1_zsub2 |
| 41161 | 0, // zsub1_zsub2_zsub3 |
| 41162 | 0, // zsub2_zsub3 |
| 41163 | 0, // zsub0_zsub2 |
| 41164 | 0, // zsub1_zsub3 |
| 41165 | }, |
| 41166 | { // FIXED_REGS |
| 41167 | 0, // bsub |
| 41168 | 0, // bsub_hi |
| 41169 | 0, // dsub |
| 41170 | 0, // dsub0 |
| 41171 | 0, // dsub1 |
| 41172 | 0, // dsub2 |
| 41173 | 0, // dsub3 |
| 41174 | 0, // dsub_hi |
| 41175 | 0, // hsub |
| 41176 | 0, // hsub_hi |
| 41177 | 0, // psub |
| 41178 | 0, // psub0 |
| 41179 | 0, // psub1 |
| 41180 | 0, // qsub0 |
| 41181 | 0, // qsub1 |
| 41182 | 0, // qsub2 |
| 41183 | 0, // qsub3 |
| 41184 | 0, // ssub |
| 41185 | 0, // ssub_hi |
| 41186 | 70, // sub_32 -> FIXED_REGS_with_sub_32 |
| 41187 | 0, // sub_32_hi |
| 41188 | 0, // sube32 |
| 41189 | 0, // sube64 |
| 41190 | 0, // subo32 |
| 41191 | 0, // subo64 |
| 41192 | 0, // x8sub_0 |
| 41193 | 0, // x8sub_1 |
| 41194 | 0, // x8sub_2 |
| 41195 | 0, // x8sub_3 |
| 41196 | 0, // x8sub_4 |
| 41197 | 0, // x8sub_5 |
| 41198 | 0, // x8sub_6 |
| 41199 | 0, // x8sub_7 |
| 41200 | 0, // zasubb |
| 41201 | 0, // zasubd0 |
| 41202 | 0, // zasubd1 |
| 41203 | 0, // zasubh0 |
| 41204 | 0, // zasubh1 |
| 41205 | 0, // zasubq0 |
| 41206 | 0, // zasubq1 |
| 41207 | 0, // zasubs0 |
| 41208 | 0, // zasubs1 |
| 41209 | 0, // zsub |
| 41210 | 0, // zsub0 |
| 41211 | 0, // zsub1 |
| 41212 | 0, // zsub2 |
| 41213 | 0, // zsub3 |
| 41214 | 0, // zsub_hi |
| 41215 | 0, // zasubd1_then_zasubq0 |
| 41216 | 0, // zasubd1_then_zasubq1 |
| 41217 | 0, // zasubs1_then_zasubd0 |
| 41218 | 0, // zasubs1_then_zasubd1 |
| 41219 | 0, // zasubs1_then_zasubq0 |
| 41220 | 0, // zasubs1_then_zasubq1 |
| 41221 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41222 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41223 | 0, // zasubh1_then_zasubd0 |
| 41224 | 0, // zasubh1_then_zasubd1 |
| 41225 | 0, // zasubh1_then_zasubq0 |
| 41226 | 0, // zasubh1_then_zasubq1 |
| 41227 | 0, // zasubh1_then_zasubs0 |
| 41228 | 0, // zasubh1_then_zasubs1 |
| 41229 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41230 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41231 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41232 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41233 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41234 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41235 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41236 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41237 | 0, // dsub1_then_bsub |
| 41238 | 0, // dsub1_then_bsub_hi |
| 41239 | 0, // dsub1_then_hsub |
| 41240 | 0, // dsub1_then_hsub_hi |
| 41241 | 0, // dsub1_then_ssub |
| 41242 | 0, // dsub1_then_ssub_hi |
| 41243 | 0, // dsub3_then_bsub |
| 41244 | 0, // dsub3_then_bsub_hi |
| 41245 | 0, // dsub3_then_hsub |
| 41246 | 0, // dsub3_then_hsub_hi |
| 41247 | 0, // dsub3_then_ssub |
| 41248 | 0, // dsub3_then_ssub_hi |
| 41249 | 0, // dsub2_then_bsub |
| 41250 | 0, // dsub2_then_bsub_hi |
| 41251 | 0, // dsub2_then_hsub |
| 41252 | 0, // dsub2_then_hsub_hi |
| 41253 | 0, // dsub2_then_ssub |
| 41254 | 0, // dsub2_then_ssub_hi |
| 41255 | 0, // psub1_then_psub |
| 41256 | 0, // qsub1_then_dsub_hi |
| 41257 | 0, // qsub3_then_dsub_hi |
| 41258 | 0, // qsub2_then_dsub_hi |
| 41259 | 0, // x8sub_7_then_sub_32 |
| 41260 | 0, // x8sub_7_then_sub_32_hi |
| 41261 | 0, // x8sub_6_then_sub_32 |
| 41262 | 0, // x8sub_6_then_sub_32_hi |
| 41263 | 0, // x8sub_5_then_sub_32 |
| 41264 | 0, // x8sub_5_then_sub_32_hi |
| 41265 | 0, // x8sub_4_then_sub_32 |
| 41266 | 0, // x8sub_4_then_sub_32_hi |
| 41267 | 0, // x8sub_3_then_sub_32 |
| 41268 | 0, // x8sub_3_then_sub_32_hi |
| 41269 | 0, // x8sub_2_then_sub_32 |
| 41270 | 0, // x8sub_2_then_sub_32_hi |
| 41271 | 0, // x8sub_1_then_sub_32 |
| 41272 | 0, // x8sub_1_then_sub_32_hi |
| 41273 | 0, // subo64_then_sub_32 |
| 41274 | 0, // subo64_then_sub_32_hi |
| 41275 | 0, // zsub1_then_zsub_hi |
| 41276 | 0, // zsub3_then_zsub_hi |
| 41277 | 0, // zsub2_then_zsub_hi |
| 41278 | 0, // dsub0_dsub1 |
| 41279 | 0, // dsub0_dsub1_dsub2 |
| 41280 | 0, // dsub1_dsub2 |
| 41281 | 0, // dsub1_dsub2_dsub3 |
| 41282 | 0, // dsub2_dsub3 |
| 41283 | 0, // dsub_dsub1 |
| 41284 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41285 | 0, // dsub_dsub1_dsub2 |
| 41286 | 0, // qsub0_qsub1 |
| 41287 | 0, // qsub0_qsub1_qsub2 |
| 41288 | 0, // qsub1_qsub2 |
| 41289 | 0, // qsub1_qsub2_qsub3 |
| 41290 | 0, // qsub2_qsub3 |
| 41291 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41292 | 0, // x8sub_0_x8sub_1 |
| 41293 | 0, // x8sub_2_x8sub_3 |
| 41294 | 0, // x8sub_4_x8sub_5 |
| 41295 | 0, // x8sub_6_x8sub_7 |
| 41296 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41297 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41298 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41299 | 0, // sub_32_subo64_then_sub_32 |
| 41300 | 0, // zsub_qsub1 |
| 41301 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41302 | 0, // zsub_qsub1_qsub2 |
| 41303 | 0, // zsub0_zsub1 |
| 41304 | 0, // zsub0_zsub1_zsub2 |
| 41305 | 0, // zsub1_zsub2 |
| 41306 | 0, // zsub1_zsub2_zsub3 |
| 41307 | 0, // zsub2_zsub3 |
| 41308 | 0, // zsub0_zsub2 |
| 41309 | 0, // zsub1_zsub3 |
| 41310 | }, |
| 41311 | { // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 41312 | 0, // bsub |
| 41313 | 0, // bsub_hi |
| 41314 | 0, // dsub |
| 41315 | 0, // dsub0 |
| 41316 | 0, // dsub1 |
| 41317 | 0, // dsub2 |
| 41318 | 0, // dsub3 |
| 41319 | 0, // dsub_hi |
| 41320 | 0, // hsub |
| 41321 | 0, // hsub_hi |
| 41322 | 0, // psub |
| 41323 | 0, // psub0 |
| 41324 | 0, // psub1 |
| 41325 | 0, // qsub0 |
| 41326 | 0, // qsub1 |
| 41327 | 0, // qsub2 |
| 41328 | 0, // qsub3 |
| 41329 | 0, // ssub |
| 41330 | 0, // ssub_hi |
| 41331 | 68, // sub_32 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 41332 | 68, // sub_32_hi -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 41333 | 0, // sube32 |
| 41334 | 0, // sube64 |
| 41335 | 0, // subo32 |
| 41336 | 0, // subo64 |
| 41337 | 0, // x8sub_0 |
| 41338 | 0, // x8sub_1 |
| 41339 | 0, // x8sub_2 |
| 41340 | 0, // x8sub_3 |
| 41341 | 0, // x8sub_4 |
| 41342 | 0, // x8sub_5 |
| 41343 | 0, // x8sub_6 |
| 41344 | 0, // x8sub_7 |
| 41345 | 0, // zasubb |
| 41346 | 0, // zasubd0 |
| 41347 | 0, // zasubd1 |
| 41348 | 0, // zasubh0 |
| 41349 | 0, // zasubh1 |
| 41350 | 0, // zasubq0 |
| 41351 | 0, // zasubq1 |
| 41352 | 0, // zasubs0 |
| 41353 | 0, // zasubs1 |
| 41354 | 0, // zsub |
| 41355 | 0, // zsub0 |
| 41356 | 0, // zsub1 |
| 41357 | 0, // zsub2 |
| 41358 | 0, // zsub3 |
| 41359 | 0, // zsub_hi |
| 41360 | 0, // zasubd1_then_zasubq0 |
| 41361 | 0, // zasubd1_then_zasubq1 |
| 41362 | 0, // zasubs1_then_zasubd0 |
| 41363 | 0, // zasubs1_then_zasubd1 |
| 41364 | 0, // zasubs1_then_zasubq0 |
| 41365 | 0, // zasubs1_then_zasubq1 |
| 41366 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41367 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41368 | 0, // zasubh1_then_zasubd0 |
| 41369 | 0, // zasubh1_then_zasubd1 |
| 41370 | 0, // zasubh1_then_zasubq0 |
| 41371 | 0, // zasubh1_then_zasubq1 |
| 41372 | 0, // zasubh1_then_zasubs0 |
| 41373 | 0, // zasubh1_then_zasubs1 |
| 41374 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41375 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41376 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41377 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41378 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41379 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41380 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41381 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41382 | 0, // dsub1_then_bsub |
| 41383 | 0, // dsub1_then_bsub_hi |
| 41384 | 0, // dsub1_then_hsub |
| 41385 | 0, // dsub1_then_hsub_hi |
| 41386 | 0, // dsub1_then_ssub |
| 41387 | 0, // dsub1_then_ssub_hi |
| 41388 | 0, // dsub3_then_bsub |
| 41389 | 0, // dsub3_then_bsub_hi |
| 41390 | 0, // dsub3_then_hsub |
| 41391 | 0, // dsub3_then_hsub_hi |
| 41392 | 0, // dsub3_then_ssub |
| 41393 | 0, // dsub3_then_ssub_hi |
| 41394 | 0, // dsub2_then_bsub |
| 41395 | 0, // dsub2_then_bsub_hi |
| 41396 | 0, // dsub2_then_hsub |
| 41397 | 0, // dsub2_then_hsub_hi |
| 41398 | 0, // dsub2_then_ssub |
| 41399 | 0, // dsub2_then_ssub_hi |
| 41400 | 0, // psub1_then_psub |
| 41401 | 0, // qsub1_then_dsub_hi |
| 41402 | 0, // qsub3_then_dsub_hi |
| 41403 | 0, // qsub2_then_dsub_hi |
| 41404 | 0, // x8sub_7_then_sub_32 |
| 41405 | 0, // x8sub_7_then_sub_32_hi |
| 41406 | 0, // x8sub_6_then_sub_32 |
| 41407 | 0, // x8sub_6_then_sub_32_hi |
| 41408 | 0, // x8sub_5_then_sub_32 |
| 41409 | 0, // x8sub_5_then_sub_32_hi |
| 41410 | 0, // x8sub_4_then_sub_32 |
| 41411 | 0, // x8sub_4_then_sub_32_hi |
| 41412 | 0, // x8sub_3_then_sub_32 |
| 41413 | 0, // x8sub_3_then_sub_32_hi |
| 41414 | 0, // x8sub_2_then_sub_32 |
| 41415 | 0, // x8sub_2_then_sub_32_hi |
| 41416 | 0, // x8sub_1_then_sub_32 |
| 41417 | 0, // x8sub_1_then_sub_32_hi |
| 41418 | 0, // subo64_then_sub_32 |
| 41419 | 0, // subo64_then_sub_32_hi |
| 41420 | 0, // zsub1_then_zsub_hi |
| 41421 | 0, // zsub3_then_zsub_hi |
| 41422 | 0, // zsub2_then_zsub_hi |
| 41423 | 0, // dsub0_dsub1 |
| 41424 | 0, // dsub0_dsub1_dsub2 |
| 41425 | 0, // dsub1_dsub2 |
| 41426 | 0, // dsub1_dsub2_dsub3 |
| 41427 | 0, // dsub2_dsub3 |
| 41428 | 0, // dsub_dsub1 |
| 41429 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41430 | 0, // dsub_dsub1_dsub2 |
| 41431 | 0, // qsub0_qsub1 |
| 41432 | 0, // qsub0_qsub1_qsub2 |
| 41433 | 0, // qsub1_qsub2 |
| 41434 | 0, // qsub1_qsub2_qsub3 |
| 41435 | 0, // qsub2_qsub3 |
| 41436 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41437 | 0, // x8sub_0_x8sub_1 |
| 41438 | 0, // x8sub_2_x8sub_3 |
| 41439 | 0, // x8sub_4_x8sub_5 |
| 41440 | 0, // x8sub_6_x8sub_7 |
| 41441 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41442 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41443 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41444 | 0, // sub_32_subo64_then_sub_32 |
| 41445 | 0, // zsub_qsub1 |
| 41446 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41447 | 0, // zsub_qsub1_qsub2 |
| 41448 | 0, // zsub0_zsub1 |
| 41449 | 0, // zsub0_zsub1_zsub2 |
| 41450 | 0, // zsub1_zsub2 |
| 41451 | 0, // zsub1_zsub2_zsub3 |
| 41452 | 0, // zsub2_zsub3 |
| 41453 | 0, // zsub0_zsub2 |
| 41454 | 0, // zsub1_zsub3 |
| 41455 | }, |
| 41456 | { // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 41457 | 0, // bsub |
| 41458 | 0, // bsub_hi |
| 41459 | 0, // dsub |
| 41460 | 0, // dsub0 |
| 41461 | 0, // dsub1 |
| 41462 | 0, // dsub2 |
| 41463 | 0, // dsub3 |
| 41464 | 0, // dsub_hi |
| 41465 | 0, // hsub |
| 41466 | 0, // hsub_hi |
| 41467 | 0, // psub |
| 41468 | 0, // psub0 |
| 41469 | 0, // psub1 |
| 41470 | 0, // qsub0 |
| 41471 | 0, // qsub1 |
| 41472 | 0, // qsub2 |
| 41473 | 0, // qsub3 |
| 41474 | 0, // ssub |
| 41475 | 0, // ssub_hi |
| 41476 | 69, // sub_32 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 41477 | 69, // sub_32_hi -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 41478 | 0, // sube32 |
| 41479 | 0, // sube64 |
| 41480 | 0, // subo32 |
| 41481 | 0, // subo64 |
| 41482 | 0, // x8sub_0 |
| 41483 | 0, // x8sub_1 |
| 41484 | 0, // x8sub_2 |
| 41485 | 0, // x8sub_3 |
| 41486 | 0, // x8sub_4 |
| 41487 | 0, // x8sub_5 |
| 41488 | 0, // x8sub_6 |
| 41489 | 0, // x8sub_7 |
| 41490 | 0, // zasubb |
| 41491 | 0, // zasubd0 |
| 41492 | 0, // zasubd1 |
| 41493 | 0, // zasubh0 |
| 41494 | 0, // zasubh1 |
| 41495 | 0, // zasubq0 |
| 41496 | 0, // zasubq1 |
| 41497 | 0, // zasubs0 |
| 41498 | 0, // zasubs1 |
| 41499 | 0, // zsub |
| 41500 | 0, // zsub0 |
| 41501 | 0, // zsub1 |
| 41502 | 0, // zsub2 |
| 41503 | 0, // zsub3 |
| 41504 | 0, // zsub_hi |
| 41505 | 0, // zasubd1_then_zasubq0 |
| 41506 | 0, // zasubd1_then_zasubq1 |
| 41507 | 0, // zasubs1_then_zasubd0 |
| 41508 | 0, // zasubs1_then_zasubd1 |
| 41509 | 0, // zasubs1_then_zasubq0 |
| 41510 | 0, // zasubs1_then_zasubq1 |
| 41511 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41512 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41513 | 0, // zasubh1_then_zasubd0 |
| 41514 | 0, // zasubh1_then_zasubd1 |
| 41515 | 0, // zasubh1_then_zasubq0 |
| 41516 | 0, // zasubh1_then_zasubq1 |
| 41517 | 0, // zasubh1_then_zasubs0 |
| 41518 | 0, // zasubh1_then_zasubs1 |
| 41519 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41520 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41521 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41522 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41523 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41524 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41525 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41526 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41527 | 0, // dsub1_then_bsub |
| 41528 | 0, // dsub1_then_bsub_hi |
| 41529 | 0, // dsub1_then_hsub |
| 41530 | 0, // dsub1_then_hsub_hi |
| 41531 | 0, // dsub1_then_ssub |
| 41532 | 0, // dsub1_then_ssub_hi |
| 41533 | 0, // dsub3_then_bsub |
| 41534 | 0, // dsub3_then_bsub_hi |
| 41535 | 0, // dsub3_then_hsub |
| 41536 | 0, // dsub3_then_hsub_hi |
| 41537 | 0, // dsub3_then_ssub |
| 41538 | 0, // dsub3_then_ssub_hi |
| 41539 | 0, // dsub2_then_bsub |
| 41540 | 0, // dsub2_then_bsub_hi |
| 41541 | 0, // dsub2_then_hsub |
| 41542 | 0, // dsub2_then_hsub_hi |
| 41543 | 0, // dsub2_then_ssub |
| 41544 | 0, // dsub2_then_ssub_hi |
| 41545 | 0, // psub1_then_psub |
| 41546 | 0, // qsub1_then_dsub_hi |
| 41547 | 0, // qsub3_then_dsub_hi |
| 41548 | 0, // qsub2_then_dsub_hi |
| 41549 | 0, // x8sub_7_then_sub_32 |
| 41550 | 0, // x8sub_7_then_sub_32_hi |
| 41551 | 0, // x8sub_6_then_sub_32 |
| 41552 | 0, // x8sub_6_then_sub_32_hi |
| 41553 | 0, // x8sub_5_then_sub_32 |
| 41554 | 0, // x8sub_5_then_sub_32_hi |
| 41555 | 0, // x8sub_4_then_sub_32 |
| 41556 | 0, // x8sub_4_then_sub_32_hi |
| 41557 | 0, // x8sub_3_then_sub_32 |
| 41558 | 0, // x8sub_3_then_sub_32_hi |
| 41559 | 0, // x8sub_2_then_sub_32 |
| 41560 | 0, // x8sub_2_then_sub_32_hi |
| 41561 | 0, // x8sub_1_then_sub_32 |
| 41562 | 0, // x8sub_1_then_sub_32_hi |
| 41563 | 0, // subo64_then_sub_32 |
| 41564 | 0, // subo64_then_sub_32_hi |
| 41565 | 0, // zsub1_then_zsub_hi |
| 41566 | 0, // zsub3_then_zsub_hi |
| 41567 | 0, // zsub2_then_zsub_hi |
| 41568 | 0, // dsub0_dsub1 |
| 41569 | 0, // dsub0_dsub1_dsub2 |
| 41570 | 0, // dsub1_dsub2 |
| 41571 | 0, // dsub1_dsub2_dsub3 |
| 41572 | 0, // dsub2_dsub3 |
| 41573 | 0, // dsub_dsub1 |
| 41574 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41575 | 0, // dsub_dsub1_dsub2 |
| 41576 | 0, // qsub0_qsub1 |
| 41577 | 0, // qsub0_qsub1_qsub2 |
| 41578 | 0, // qsub1_qsub2 |
| 41579 | 0, // qsub1_qsub2_qsub3 |
| 41580 | 0, // qsub2_qsub3 |
| 41581 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41582 | 0, // x8sub_0_x8sub_1 |
| 41583 | 0, // x8sub_2_x8sub_3 |
| 41584 | 0, // x8sub_4_x8sub_5 |
| 41585 | 0, // x8sub_6_x8sub_7 |
| 41586 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41587 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41588 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41589 | 0, // sub_32_subo64_then_sub_32 |
| 41590 | 0, // zsub_qsub1 |
| 41591 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41592 | 0, // zsub_qsub1_qsub2 |
| 41593 | 0, // zsub0_zsub1 |
| 41594 | 0, // zsub0_zsub1_zsub2 |
| 41595 | 0, // zsub1_zsub2 |
| 41596 | 0, // zsub1_zsub2_zsub3 |
| 41597 | 0, // zsub2_zsub3 |
| 41598 | 0, // zsub0_zsub2 |
| 41599 | 0, // zsub1_zsub3 |
| 41600 | }, |
| 41601 | { // FIXED_REGS_with_sub_32 |
| 41602 | 0, // bsub |
| 41603 | 0, // bsub_hi |
| 41604 | 0, // dsub |
| 41605 | 0, // dsub0 |
| 41606 | 0, // dsub1 |
| 41607 | 0, // dsub2 |
| 41608 | 0, // dsub3 |
| 41609 | 0, // dsub_hi |
| 41610 | 0, // hsub |
| 41611 | 0, // hsub_hi |
| 41612 | 0, // psub |
| 41613 | 0, // psub0 |
| 41614 | 0, // psub1 |
| 41615 | 0, // qsub0 |
| 41616 | 0, // qsub1 |
| 41617 | 0, // qsub2 |
| 41618 | 0, // qsub3 |
| 41619 | 0, // ssub |
| 41620 | 0, // ssub_hi |
| 41621 | 70, // sub_32 -> FIXED_REGS_with_sub_32 |
| 41622 | 70, // sub_32_hi -> FIXED_REGS_with_sub_32 |
| 41623 | 0, // sube32 |
| 41624 | 0, // sube64 |
| 41625 | 0, // subo32 |
| 41626 | 0, // subo64 |
| 41627 | 0, // x8sub_0 |
| 41628 | 0, // x8sub_1 |
| 41629 | 0, // x8sub_2 |
| 41630 | 0, // x8sub_3 |
| 41631 | 0, // x8sub_4 |
| 41632 | 0, // x8sub_5 |
| 41633 | 0, // x8sub_6 |
| 41634 | 0, // x8sub_7 |
| 41635 | 0, // zasubb |
| 41636 | 0, // zasubd0 |
| 41637 | 0, // zasubd1 |
| 41638 | 0, // zasubh0 |
| 41639 | 0, // zasubh1 |
| 41640 | 0, // zasubq0 |
| 41641 | 0, // zasubq1 |
| 41642 | 0, // zasubs0 |
| 41643 | 0, // zasubs1 |
| 41644 | 0, // zsub |
| 41645 | 0, // zsub0 |
| 41646 | 0, // zsub1 |
| 41647 | 0, // zsub2 |
| 41648 | 0, // zsub3 |
| 41649 | 0, // zsub_hi |
| 41650 | 0, // zasubd1_then_zasubq0 |
| 41651 | 0, // zasubd1_then_zasubq1 |
| 41652 | 0, // zasubs1_then_zasubd0 |
| 41653 | 0, // zasubs1_then_zasubd1 |
| 41654 | 0, // zasubs1_then_zasubq0 |
| 41655 | 0, // zasubs1_then_zasubq1 |
| 41656 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41657 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41658 | 0, // zasubh1_then_zasubd0 |
| 41659 | 0, // zasubh1_then_zasubd1 |
| 41660 | 0, // zasubh1_then_zasubq0 |
| 41661 | 0, // zasubh1_then_zasubq1 |
| 41662 | 0, // zasubh1_then_zasubs0 |
| 41663 | 0, // zasubh1_then_zasubs1 |
| 41664 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41665 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41666 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41667 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41668 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41669 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41670 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41671 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41672 | 0, // dsub1_then_bsub |
| 41673 | 0, // dsub1_then_bsub_hi |
| 41674 | 0, // dsub1_then_hsub |
| 41675 | 0, // dsub1_then_hsub_hi |
| 41676 | 0, // dsub1_then_ssub |
| 41677 | 0, // dsub1_then_ssub_hi |
| 41678 | 0, // dsub3_then_bsub |
| 41679 | 0, // dsub3_then_bsub_hi |
| 41680 | 0, // dsub3_then_hsub |
| 41681 | 0, // dsub3_then_hsub_hi |
| 41682 | 0, // dsub3_then_ssub |
| 41683 | 0, // dsub3_then_ssub_hi |
| 41684 | 0, // dsub2_then_bsub |
| 41685 | 0, // dsub2_then_bsub_hi |
| 41686 | 0, // dsub2_then_hsub |
| 41687 | 0, // dsub2_then_hsub_hi |
| 41688 | 0, // dsub2_then_ssub |
| 41689 | 0, // dsub2_then_ssub_hi |
| 41690 | 0, // psub1_then_psub |
| 41691 | 0, // qsub1_then_dsub_hi |
| 41692 | 0, // qsub3_then_dsub_hi |
| 41693 | 0, // qsub2_then_dsub_hi |
| 41694 | 0, // x8sub_7_then_sub_32 |
| 41695 | 0, // x8sub_7_then_sub_32_hi |
| 41696 | 0, // x8sub_6_then_sub_32 |
| 41697 | 0, // x8sub_6_then_sub_32_hi |
| 41698 | 0, // x8sub_5_then_sub_32 |
| 41699 | 0, // x8sub_5_then_sub_32_hi |
| 41700 | 0, // x8sub_4_then_sub_32 |
| 41701 | 0, // x8sub_4_then_sub_32_hi |
| 41702 | 0, // x8sub_3_then_sub_32 |
| 41703 | 0, // x8sub_3_then_sub_32_hi |
| 41704 | 0, // x8sub_2_then_sub_32 |
| 41705 | 0, // x8sub_2_then_sub_32_hi |
| 41706 | 0, // x8sub_1_then_sub_32 |
| 41707 | 0, // x8sub_1_then_sub_32_hi |
| 41708 | 0, // subo64_then_sub_32 |
| 41709 | 0, // subo64_then_sub_32_hi |
| 41710 | 0, // zsub1_then_zsub_hi |
| 41711 | 0, // zsub3_then_zsub_hi |
| 41712 | 0, // zsub2_then_zsub_hi |
| 41713 | 0, // dsub0_dsub1 |
| 41714 | 0, // dsub0_dsub1_dsub2 |
| 41715 | 0, // dsub1_dsub2 |
| 41716 | 0, // dsub1_dsub2_dsub3 |
| 41717 | 0, // dsub2_dsub3 |
| 41718 | 0, // dsub_dsub1 |
| 41719 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41720 | 0, // dsub_dsub1_dsub2 |
| 41721 | 0, // qsub0_qsub1 |
| 41722 | 0, // qsub0_qsub1_qsub2 |
| 41723 | 0, // qsub1_qsub2 |
| 41724 | 0, // qsub1_qsub2_qsub3 |
| 41725 | 0, // qsub2_qsub3 |
| 41726 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41727 | 0, // x8sub_0_x8sub_1 |
| 41728 | 0, // x8sub_2_x8sub_3 |
| 41729 | 0, // x8sub_4_x8sub_5 |
| 41730 | 0, // x8sub_6_x8sub_7 |
| 41731 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41732 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41733 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41734 | 0, // sub_32_subo64_then_sub_32 |
| 41735 | 0, // zsub_qsub1 |
| 41736 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41737 | 0, // zsub_qsub1_qsub2 |
| 41738 | 0, // zsub0_zsub1 |
| 41739 | 0, // zsub0_zsub1_zsub2 |
| 41740 | 0, // zsub1_zsub2 |
| 41741 | 0, // zsub1_zsub2_zsub3 |
| 41742 | 0, // zsub2_zsub3 |
| 41743 | 0, // zsub0_zsub2 |
| 41744 | 0, // zsub1_zsub3 |
| 41745 | }, |
| 41746 | { // tcGPRx16x17 |
| 41747 | 0, // bsub |
| 41748 | 0, // bsub_hi |
| 41749 | 0, // dsub |
| 41750 | 0, // dsub0 |
| 41751 | 0, // dsub1 |
| 41752 | 0, // dsub2 |
| 41753 | 0, // dsub3 |
| 41754 | 0, // dsub_hi |
| 41755 | 0, // hsub |
| 41756 | 0, // hsub_hi |
| 41757 | 0, // psub |
| 41758 | 0, // psub0 |
| 41759 | 0, // psub1 |
| 41760 | 0, // qsub0 |
| 41761 | 0, // qsub1 |
| 41762 | 0, // qsub2 |
| 41763 | 0, // qsub3 |
| 41764 | 0, // ssub |
| 41765 | 0, // ssub_hi |
| 41766 | 71, // sub_32 -> tcGPRx16x17 |
| 41767 | 71, // sub_32_hi -> tcGPRx16x17 |
| 41768 | 0, // sube32 |
| 41769 | 0, // sube64 |
| 41770 | 0, // subo32 |
| 41771 | 0, // subo64 |
| 41772 | 0, // x8sub_0 |
| 41773 | 0, // x8sub_1 |
| 41774 | 0, // x8sub_2 |
| 41775 | 0, // x8sub_3 |
| 41776 | 0, // x8sub_4 |
| 41777 | 0, // x8sub_5 |
| 41778 | 0, // x8sub_6 |
| 41779 | 0, // x8sub_7 |
| 41780 | 0, // zasubb |
| 41781 | 0, // zasubd0 |
| 41782 | 0, // zasubd1 |
| 41783 | 0, // zasubh0 |
| 41784 | 0, // zasubh1 |
| 41785 | 0, // zasubq0 |
| 41786 | 0, // zasubq1 |
| 41787 | 0, // zasubs0 |
| 41788 | 0, // zasubs1 |
| 41789 | 0, // zsub |
| 41790 | 0, // zsub0 |
| 41791 | 0, // zsub1 |
| 41792 | 0, // zsub2 |
| 41793 | 0, // zsub3 |
| 41794 | 0, // zsub_hi |
| 41795 | 0, // zasubd1_then_zasubq0 |
| 41796 | 0, // zasubd1_then_zasubq1 |
| 41797 | 0, // zasubs1_then_zasubd0 |
| 41798 | 0, // zasubs1_then_zasubd1 |
| 41799 | 0, // zasubs1_then_zasubq0 |
| 41800 | 0, // zasubs1_then_zasubq1 |
| 41801 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41802 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41803 | 0, // zasubh1_then_zasubd0 |
| 41804 | 0, // zasubh1_then_zasubd1 |
| 41805 | 0, // zasubh1_then_zasubq0 |
| 41806 | 0, // zasubh1_then_zasubq1 |
| 41807 | 0, // zasubh1_then_zasubs0 |
| 41808 | 0, // zasubh1_then_zasubs1 |
| 41809 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41810 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41811 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41812 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41813 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41814 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41815 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41816 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41817 | 0, // dsub1_then_bsub |
| 41818 | 0, // dsub1_then_bsub_hi |
| 41819 | 0, // dsub1_then_hsub |
| 41820 | 0, // dsub1_then_hsub_hi |
| 41821 | 0, // dsub1_then_ssub |
| 41822 | 0, // dsub1_then_ssub_hi |
| 41823 | 0, // dsub3_then_bsub |
| 41824 | 0, // dsub3_then_bsub_hi |
| 41825 | 0, // dsub3_then_hsub |
| 41826 | 0, // dsub3_then_hsub_hi |
| 41827 | 0, // dsub3_then_ssub |
| 41828 | 0, // dsub3_then_ssub_hi |
| 41829 | 0, // dsub2_then_bsub |
| 41830 | 0, // dsub2_then_bsub_hi |
| 41831 | 0, // dsub2_then_hsub |
| 41832 | 0, // dsub2_then_hsub_hi |
| 41833 | 0, // dsub2_then_ssub |
| 41834 | 0, // dsub2_then_ssub_hi |
| 41835 | 0, // psub1_then_psub |
| 41836 | 0, // qsub1_then_dsub_hi |
| 41837 | 0, // qsub3_then_dsub_hi |
| 41838 | 0, // qsub2_then_dsub_hi |
| 41839 | 0, // x8sub_7_then_sub_32 |
| 41840 | 0, // x8sub_7_then_sub_32_hi |
| 41841 | 0, // x8sub_6_then_sub_32 |
| 41842 | 0, // x8sub_6_then_sub_32_hi |
| 41843 | 0, // x8sub_5_then_sub_32 |
| 41844 | 0, // x8sub_5_then_sub_32_hi |
| 41845 | 0, // x8sub_4_then_sub_32 |
| 41846 | 0, // x8sub_4_then_sub_32_hi |
| 41847 | 0, // x8sub_3_then_sub_32 |
| 41848 | 0, // x8sub_3_then_sub_32_hi |
| 41849 | 0, // x8sub_2_then_sub_32 |
| 41850 | 0, // x8sub_2_then_sub_32_hi |
| 41851 | 0, // x8sub_1_then_sub_32 |
| 41852 | 0, // x8sub_1_then_sub_32_hi |
| 41853 | 0, // subo64_then_sub_32 |
| 41854 | 0, // subo64_then_sub_32_hi |
| 41855 | 0, // zsub1_then_zsub_hi |
| 41856 | 0, // zsub3_then_zsub_hi |
| 41857 | 0, // zsub2_then_zsub_hi |
| 41858 | 0, // dsub0_dsub1 |
| 41859 | 0, // dsub0_dsub1_dsub2 |
| 41860 | 0, // dsub1_dsub2 |
| 41861 | 0, // dsub1_dsub2_dsub3 |
| 41862 | 0, // dsub2_dsub3 |
| 41863 | 0, // dsub_dsub1 |
| 41864 | 0, // dsub_dsub1_dsub2_dsub3 |
| 41865 | 0, // dsub_dsub1_dsub2 |
| 41866 | 0, // qsub0_qsub1 |
| 41867 | 0, // qsub0_qsub1_qsub2 |
| 41868 | 0, // qsub1_qsub2 |
| 41869 | 0, // qsub1_qsub2_qsub3 |
| 41870 | 0, // qsub2_qsub3 |
| 41871 | 0, // sub_32_x8sub_1_then_sub_32 |
| 41872 | 0, // x8sub_0_x8sub_1 |
| 41873 | 0, // x8sub_2_x8sub_3 |
| 41874 | 0, // x8sub_4_x8sub_5 |
| 41875 | 0, // x8sub_6_x8sub_7 |
| 41876 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 41877 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 41878 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 41879 | 0, // sub_32_subo64_then_sub_32 |
| 41880 | 0, // zsub_qsub1 |
| 41881 | 0, // zsub_qsub1_qsub2_qsub3 |
| 41882 | 0, // zsub_qsub1_qsub2 |
| 41883 | 0, // zsub0_zsub1 |
| 41884 | 0, // zsub0_zsub1_zsub2 |
| 41885 | 0, // zsub1_zsub2 |
| 41886 | 0, // zsub1_zsub2_zsub3 |
| 41887 | 0, // zsub2_zsub3 |
| 41888 | 0, // zsub0_zsub2 |
| 41889 | 0, // zsub1_zsub3 |
| 41890 | }, |
| 41891 | { // FIXED_REGS_and_GPR64 |
| 41892 | 0, // bsub |
| 41893 | 0, // bsub_hi |
| 41894 | 0, // dsub |
| 41895 | 0, // dsub0 |
| 41896 | 0, // dsub1 |
| 41897 | 0, // dsub2 |
| 41898 | 0, // dsub3 |
| 41899 | 0, // dsub_hi |
| 41900 | 0, // hsub |
| 41901 | 0, // hsub_hi |
| 41902 | 0, // psub |
| 41903 | 0, // psub0 |
| 41904 | 0, // psub1 |
| 41905 | 0, // qsub0 |
| 41906 | 0, // qsub1 |
| 41907 | 0, // qsub2 |
| 41908 | 0, // qsub3 |
| 41909 | 0, // ssub |
| 41910 | 0, // ssub_hi |
| 41911 | 72, // sub_32 -> FIXED_REGS_and_GPR64 |
| 41912 | 72, // sub_32_hi -> FIXED_REGS_and_GPR64 |
| 41913 | 0, // sube32 |
| 41914 | 0, // sube64 |
| 41915 | 0, // subo32 |
| 41916 | 0, // subo64 |
| 41917 | 0, // x8sub_0 |
| 41918 | 0, // x8sub_1 |
| 41919 | 0, // x8sub_2 |
| 41920 | 0, // x8sub_3 |
| 41921 | 0, // x8sub_4 |
| 41922 | 0, // x8sub_5 |
| 41923 | 0, // x8sub_6 |
| 41924 | 0, // x8sub_7 |
| 41925 | 0, // zasubb |
| 41926 | 0, // zasubd0 |
| 41927 | 0, // zasubd1 |
| 41928 | 0, // zasubh0 |
| 41929 | 0, // zasubh1 |
| 41930 | 0, // zasubq0 |
| 41931 | 0, // zasubq1 |
| 41932 | 0, // zasubs0 |
| 41933 | 0, // zasubs1 |
| 41934 | 0, // zsub |
| 41935 | 0, // zsub0 |
| 41936 | 0, // zsub1 |
| 41937 | 0, // zsub2 |
| 41938 | 0, // zsub3 |
| 41939 | 0, // zsub_hi |
| 41940 | 0, // zasubd1_then_zasubq0 |
| 41941 | 0, // zasubd1_then_zasubq1 |
| 41942 | 0, // zasubs1_then_zasubd0 |
| 41943 | 0, // zasubs1_then_zasubd1 |
| 41944 | 0, // zasubs1_then_zasubq0 |
| 41945 | 0, // zasubs1_then_zasubq1 |
| 41946 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 41947 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 41948 | 0, // zasubh1_then_zasubd0 |
| 41949 | 0, // zasubh1_then_zasubd1 |
| 41950 | 0, // zasubh1_then_zasubq0 |
| 41951 | 0, // zasubh1_then_zasubq1 |
| 41952 | 0, // zasubh1_then_zasubs0 |
| 41953 | 0, // zasubh1_then_zasubs1 |
| 41954 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 41955 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 41956 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 41957 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 41958 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 41959 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 41960 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 41961 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 41962 | 0, // dsub1_then_bsub |
| 41963 | 0, // dsub1_then_bsub_hi |
| 41964 | 0, // dsub1_then_hsub |
| 41965 | 0, // dsub1_then_hsub_hi |
| 41966 | 0, // dsub1_then_ssub |
| 41967 | 0, // dsub1_then_ssub_hi |
| 41968 | 0, // dsub3_then_bsub |
| 41969 | 0, // dsub3_then_bsub_hi |
| 41970 | 0, // dsub3_then_hsub |
| 41971 | 0, // dsub3_then_hsub_hi |
| 41972 | 0, // dsub3_then_ssub |
| 41973 | 0, // dsub3_then_ssub_hi |
| 41974 | 0, // dsub2_then_bsub |
| 41975 | 0, // dsub2_then_bsub_hi |
| 41976 | 0, // dsub2_then_hsub |
| 41977 | 0, // dsub2_then_hsub_hi |
| 41978 | 0, // dsub2_then_ssub |
| 41979 | 0, // dsub2_then_ssub_hi |
| 41980 | 0, // psub1_then_psub |
| 41981 | 0, // qsub1_then_dsub_hi |
| 41982 | 0, // qsub3_then_dsub_hi |
| 41983 | 0, // qsub2_then_dsub_hi |
| 41984 | 0, // x8sub_7_then_sub_32 |
| 41985 | 0, // x8sub_7_then_sub_32_hi |
| 41986 | 0, // x8sub_6_then_sub_32 |
| 41987 | 0, // x8sub_6_then_sub_32_hi |
| 41988 | 0, // x8sub_5_then_sub_32 |
| 41989 | 0, // x8sub_5_then_sub_32_hi |
| 41990 | 0, // x8sub_4_then_sub_32 |
| 41991 | 0, // x8sub_4_then_sub_32_hi |
| 41992 | 0, // x8sub_3_then_sub_32 |
| 41993 | 0, // x8sub_3_then_sub_32_hi |
| 41994 | 0, // x8sub_2_then_sub_32 |
| 41995 | 0, // x8sub_2_then_sub_32_hi |
| 41996 | 0, // x8sub_1_then_sub_32 |
| 41997 | 0, // x8sub_1_then_sub_32_hi |
| 41998 | 0, // subo64_then_sub_32 |
| 41999 | 0, // subo64_then_sub_32_hi |
| 42000 | 0, // zsub1_then_zsub_hi |
| 42001 | 0, // zsub3_then_zsub_hi |
| 42002 | 0, // zsub2_then_zsub_hi |
| 42003 | 0, // dsub0_dsub1 |
| 42004 | 0, // dsub0_dsub1_dsub2 |
| 42005 | 0, // dsub1_dsub2 |
| 42006 | 0, // dsub1_dsub2_dsub3 |
| 42007 | 0, // dsub2_dsub3 |
| 42008 | 0, // dsub_dsub1 |
| 42009 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42010 | 0, // dsub_dsub1_dsub2 |
| 42011 | 0, // qsub0_qsub1 |
| 42012 | 0, // qsub0_qsub1_qsub2 |
| 42013 | 0, // qsub1_qsub2 |
| 42014 | 0, // qsub1_qsub2_qsub3 |
| 42015 | 0, // qsub2_qsub3 |
| 42016 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42017 | 0, // x8sub_0_x8sub_1 |
| 42018 | 0, // x8sub_2_x8sub_3 |
| 42019 | 0, // x8sub_4_x8sub_5 |
| 42020 | 0, // x8sub_6_x8sub_7 |
| 42021 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42022 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42023 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42024 | 0, // sub_32_subo64_then_sub_32 |
| 42025 | 0, // zsub_qsub1 |
| 42026 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42027 | 0, // zsub_qsub1_qsub2 |
| 42028 | 0, // zsub0_zsub1 |
| 42029 | 0, // zsub0_zsub1_zsub2 |
| 42030 | 0, // zsub1_zsub2 |
| 42031 | 0, // zsub1_zsub2_zsub3 |
| 42032 | 0, // zsub2_zsub3 |
| 42033 | 0, // zsub0_zsub2 |
| 42034 | 0, // zsub1_zsub3 |
| 42035 | }, |
| 42036 | { // GPR64sponly |
| 42037 | 0, // bsub |
| 42038 | 0, // bsub_hi |
| 42039 | 0, // dsub |
| 42040 | 0, // dsub0 |
| 42041 | 0, // dsub1 |
| 42042 | 0, // dsub2 |
| 42043 | 0, // dsub3 |
| 42044 | 0, // dsub_hi |
| 42045 | 0, // hsub |
| 42046 | 0, // hsub_hi |
| 42047 | 0, // psub |
| 42048 | 0, // psub0 |
| 42049 | 0, // psub1 |
| 42050 | 0, // qsub0 |
| 42051 | 0, // qsub1 |
| 42052 | 0, // qsub2 |
| 42053 | 0, // qsub3 |
| 42054 | 0, // ssub |
| 42055 | 0, // ssub_hi |
| 42056 | 73, // sub_32 -> GPR64sponly |
| 42057 | 73, // sub_32_hi -> GPR64sponly |
| 42058 | 0, // sube32 |
| 42059 | 0, // sube64 |
| 42060 | 0, // subo32 |
| 42061 | 0, // subo64 |
| 42062 | 0, // x8sub_0 |
| 42063 | 0, // x8sub_1 |
| 42064 | 0, // x8sub_2 |
| 42065 | 0, // x8sub_3 |
| 42066 | 0, // x8sub_4 |
| 42067 | 0, // x8sub_5 |
| 42068 | 0, // x8sub_6 |
| 42069 | 0, // x8sub_7 |
| 42070 | 0, // zasubb |
| 42071 | 0, // zasubd0 |
| 42072 | 0, // zasubd1 |
| 42073 | 0, // zasubh0 |
| 42074 | 0, // zasubh1 |
| 42075 | 0, // zasubq0 |
| 42076 | 0, // zasubq1 |
| 42077 | 0, // zasubs0 |
| 42078 | 0, // zasubs1 |
| 42079 | 0, // zsub |
| 42080 | 0, // zsub0 |
| 42081 | 0, // zsub1 |
| 42082 | 0, // zsub2 |
| 42083 | 0, // zsub3 |
| 42084 | 0, // zsub_hi |
| 42085 | 0, // zasubd1_then_zasubq0 |
| 42086 | 0, // zasubd1_then_zasubq1 |
| 42087 | 0, // zasubs1_then_zasubd0 |
| 42088 | 0, // zasubs1_then_zasubd1 |
| 42089 | 0, // zasubs1_then_zasubq0 |
| 42090 | 0, // zasubs1_then_zasubq1 |
| 42091 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42092 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42093 | 0, // zasubh1_then_zasubd0 |
| 42094 | 0, // zasubh1_then_zasubd1 |
| 42095 | 0, // zasubh1_then_zasubq0 |
| 42096 | 0, // zasubh1_then_zasubq1 |
| 42097 | 0, // zasubh1_then_zasubs0 |
| 42098 | 0, // zasubh1_then_zasubs1 |
| 42099 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42100 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42101 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42102 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42103 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42104 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42105 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42106 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42107 | 0, // dsub1_then_bsub |
| 42108 | 0, // dsub1_then_bsub_hi |
| 42109 | 0, // dsub1_then_hsub |
| 42110 | 0, // dsub1_then_hsub_hi |
| 42111 | 0, // dsub1_then_ssub |
| 42112 | 0, // dsub1_then_ssub_hi |
| 42113 | 0, // dsub3_then_bsub |
| 42114 | 0, // dsub3_then_bsub_hi |
| 42115 | 0, // dsub3_then_hsub |
| 42116 | 0, // dsub3_then_hsub_hi |
| 42117 | 0, // dsub3_then_ssub |
| 42118 | 0, // dsub3_then_ssub_hi |
| 42119 | 0, // dsub2_then_bsub |
| 42120 | 0, // dsub2_then_bsub_hi |
| 42121 | 0, // dsub2_then_hsub |
| 42122 | 0, // dsub2_then_hsub_hi |
| 42123 | 0, // dsub2_then_ssub |
| 42124 | 0, // dsub2_then_ssub_hi |
| 42125 | 0, // psub1_then_psub |
| 42126 | 0, // qsub1_then_dsub_hi |
| 42127 | 0, // qsub3_then_dsub_hi |
| 42128 | 0, // qsub2_then_dsub_hi |
| 42129 | 0, // x8sub_7_then_sub_32 |
| 42130 | 0, // x8sub_7_then_sub_32_hi |
| 42131 | 0, // x8sub_6_then_sub_32 |
| 42132 | 0, // x8sub_6_then_sub_32_hi |
| 42133 | 0, // x8sub_5_then_sub_32 |
| 42134 | 0, // x8sub_5_then_sub_32_hi |
| 42135 | 0, // x8sub_4_then_sub_32 |
| 42136 | 0, // x8sub_4_then_sub_32_hi |
| 42137 | 0, // x8sub_3_then_sub_32 |
| 42138 | 0, // x8sub_3_then_sub_32_hi |
| 42139 | 0, // x8sub_2_then_sub_32 |
| 42140 | 0, // x8sub_2_then_sub_32_hi |
| 42141 | 0, // x8sub_1_then_sub_32 |
| 42142 | 0, // x8sub_1_then_sub_32_hi |
| 42143 | 0, // subo64_then_sub_32 |
| 42144 | 0, // subo64_then_sub_32_hi |
| 42145 | 0, // zsub1_then_zsub_hi |
| 42146 | 0, // zsub3_then_zsub_hi |
| 42147 | 0, // zsub2_then_zsub_hi |
| 42148 | 0, // dsub0_dsub1 |
| 42149 | 0, // dsub0_dsub1_dsub2 |
| 42150 | 0, // dsub1_dsub2 |
| 42151 | 0, // dsub1_dsub2_dsub3 |
| 42152 | 0, // dsub2_dsub3 |
| 42153 | 0, // dsub_dsub1 |
| 42154 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42155 | 0, // dsub_dsub1_dsub2 |
| 42156 | 0, // qsub0_qsub1 |
| 42157 | 0, // qsub0_qsub1_qsub2 |
| 42158 | 0, // qsub1_qsub2 |
| 42159 | 0, // qsub1_qsub2_qsub3 |
| 42160 | 0, // qsub2_qsub3 |
| 42161 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42162 | 0, // x8sub_0_x8sub_1 |
| 42163 | 0, // x8sub_2_x8sub_3 |
| 42164 | 0, // x8sub_4_x8sub_5 |
| 42165 | 0, // x8sub_6_x8sub_7 |
| 42166 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42167 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42168 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42169 | 0, // sub_32_subo64_then_sub_32 |
| 42170 | 0, // zsub_qsub1 |
| 42171 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42172 | 0, // zsub_qsub1_qsub2 |
| 42173 | 0, // zsub0_zsub1 |
| 42174 | 0, // zsub0_zsub1_zsub2 |
| 42175 | 0, // zsub1_zsub2 |
| 42176 | 0, // zsub1_zsub2_zsub3 |
| 42177 | 0, // zsub2_zsub3 |
| 42178 | 0, // zsub0_zsub2 |
| 42179 | 0, // zsub1_zsub3 |
| 42180 | }, |
| 42181 | { // tcGPRx17 |
| 42182 | 0, // bsub |
| 42183 | 0, // bsub_hi |
| 42184 | 0, // dsub |
| 42185 | 0, // dsub0 |
| 42186 | 0, // dsub1 |
| 42187 | 0, // dsub2 |
| 42188 | 0, // dsub3 |
| 42189 | 0, // dsub_hi |
| 42190 | 0, // hsub |
| 42191 | 0, // hsub_hi |
| 42192 | 0, // psub |
| 42193 | 0, // psub0 |
| 42194 | 0, // psub1 |
| 42195 | 0, // qsub0 |
| 42196 | 0, // qsub1 |
| 42197 | 0, // qsub2 |
| 42198 | 0, // qsub3 |
| 42199 | 0, // ssub |
| 42200 | 0, // ssub_hi |
| 42201 | 74, // sub_32 -> tcGPRx17 |
| 42202 | 74, // sub_32_hi -> tcGPRx17 |
| 42203 | 0, // sube32 |
| 42204 | 0, // sube64 |
| 42205 | 0, // subo32 |
| 42206 | 0, // subo64 |
| 42207 | 0, // x8sub_0 |
| 42208 | 0, // x8sub_1 |
| 42209 | 0, // x8sub_2 |
| 42210 | 0, // x8sub_3 |
| 42211 | 0, // x8sub_4 |
| 42212 | 0, // x8sub_5 |
| 42213 | 0, // x8sub_6 |
| 42214 | 0, // x8sub_7 |
| 42215 | 0, // zasubb |
| 42216 | 0, // zasubd0 |
| 42217 | 0, // zasubd1 |
| 42218 | 0, // zasubh0 |
| 42219 | 0, // zasubh1 |
| 42220 | 0, // zasubq0 |
| 42221 | 0, // zasubq1 |
| 42222 | 0, // zasubs0 |
| 42223 | 0, // zasubs1 |
| 42224 | 0, // zsub |
| 42225 | 0, // zsub0 |
| 42226 | 0, // zsub1 |
| 42227 | 0, // zsub2 |
| 42228 | 0, // zsub3 |
| 42229 | 0, // zsub_hi |
| 42230 | 0, // zasubd1_then_zasubq0 |
| 42231 | 0, // zasubd1_then_zasubq1 |
| 42232 | 0, // zasubs1_then_zasubd0 |
| 42233 | 0, // zasubs1_then_zasubd1 |
| 42234 | 0, // zasubs1_then_zasubq0 |
| 42235 | 0, // zasubs1_then_zasubq1 |
| 42236 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42237 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42238 | 0, // zasubh1_then_zasubd0 |
| 42239 | 0, // zasubh1_then_zasubd1 |
| 42240 | 0, // zasubh1_then_zasubq0 |
| 42241 | 0, // zasubh1_then_zasubq1 |
| 42242 | 0, // zasubh1_then_zasubs0 |
| 42243 | 0, // zasubh1_then_zasubs1 |
| 42244 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42245 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42246 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42247 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42248 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42249 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42250 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42251 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42252 | 0, // dsub1_then_bsub |
| 42253 | 0, // dsub1_then_bsub_hi |
| 42254 | 0, // dsub1_then_hsub |
| 42255 | 0, // dsub1_then_hsub_hi |
| 42256 | 0, // dsub1_then_ssub |
| 42257 | 0, // dsub1_then_ssub_hi |
| 42258 | 0, // dsub3_then_bsub |
| 42259 | 0, // dsub3_then_bsub_hi |
| 42260 | 0, // dsub3_then_hsub |
| 42261 | 0, // dsub3_then_hsub_hi |
| 42262 | 0, // dsub3_then_ssub |
| 42263 | 0, // dsub3_then_ssub_hi |
| 42264 | 0, // dsub2_then_bsub |
| 42265 | 0, // dsub2_then_bsub_hi |
| 42266 | 0, // dsub2_then_hsub |
| 42267 | 0, // dsub2_then_hsub_hi |
| 42268 | 0, // dsub2_then_ssub |
| 42269 | 0, // dsub2_then_ssub_hi |
| 42270 | 0, // psub1_then_psub |
| 42271 | 0, // qsub1_then_dsub_hi |
| 42272 | 0, // qsub3_then_dsub_hi |
| 42273 | 0, // qsub2_then_dsub_hi |
| 42274 | 0, // x8sub_7_then_sub_32 |
| 42275 | 0, // x8sub_7_then_sub_32_hi |
| 42276 | 0, // x8sub_6_then_sub_32 |
| 42277 | 0, // x8sub_6_then_sub_32_hi |
| 42278 | 0, // x8sub_5_then_sub_32 |
| 42279 | 0, // x8sub_5_then_sub_32_hi |
| 42280 | 0, // x8sub_4_then_sub_32 |
| 42281 | 0, // x8sub_4_then_sub_32_hi |
| 42282 | 0, // x8sub_3_then_sub_32 |
| 42283 | 0, // x8sub_3_then_sub_32_hi |
| 42284 | 0, // x8sub_2_then_sub_32 |
| 42285 | 0, // x8sub_2_then_sub_32_hi |
| 42286 | 0, // x8sub_1_then_sub_32 |
| 42287 | 0, // x8sub_1_then_sub_32_hi |
| 42288 | 0, // subo64_then_sub_32 |
| 42289 | 0, // subo64_then_sub_32_hi |
| 42290 | 0, // zsub1_then_zsub_hi |
| 42291 | 0, // zsub3_then_zsub_hi |
| 42292 | 0, // zsub2_then_zsub_hi |
| 42293 | 0, // dsub0_dsub1 |
| 42294 | 0, // dsub0_dsub1_dsub2 |
| 42295 | 0, // dsub1_dsub2 |
| 42296 | 0, // dsub1_dsub2_dsub3 |
| 42297 | 0, // dsub2_dsub3 |
| 42298 | 0, // dsub_dsub1 |
| 42299 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42300 | 0, // dsub_dsub1_dsub2 |
| 42301 | 0, // qsub0_qsub1 |
| 42302 | 0, // qsub0_qsub1_qsub2 |
| 42303 | 0, // qsub1_qsub2 |
| 42304 | 0, // qsub1_qsub2_qsub3 |
| 42305 | 0, // qsub2_qsub3 |
| 42306 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42307 | 0, // x8sub_0_x8sub_1 |
| 42308 | 0, // x8sub_2_x8sub_3 |
| 42309 | 0, // x8sub_4_x8sub_5 |
| 42310 | 0, // x8sub_6_x8sub_7 |
| 42311 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42312 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42313 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42314 | 0, // sub_32_subo64_then_sub_32 |
| 42315 | 0, // zsub_qsub1 |
| 42316 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42317 | 0, // zsub_qsub1_qsub2 |
| 42318 | 0, // zsub0_zsub1 |
| 42319 | 0, // zsub0_zsub1_zsub2 |
| 42320 | 0, // zsub1_zsub2 |
| 42321 | 0, // zsub1_zsub2_zsub3 |
| 42322 | 0, // zsub2_zsub3 |
| 42323 | 0, // zsub0_zsub2 |
| 42324 | 0, // zsub1_zsub3 |
| 42325 | }, |
| 42326 | { // DD |
| 42327 | 75, // bsub -> DD |
| 42328 | 75, // bsub_hi -> DD |
| 42329 | 0, // dsub |
| 42330 | 75, // dsub0 -> DD |
| 42331 | 75, // dsub1 -> DD |
| 42332 | 0, // dsub2 |
| 42333 | 0, // dsub3 |
| 42334 | 0, // dsub_hi |
| 42335 | 75, // hsub -> DD |
| 42336 | 75, // hsub_hi -> DD |
| 42337 | 0, // psub |
| 42338 | 0, // psub0 |
| 42339 | 0, // psub1 |
| 42340 | 0, // qsub0 |
| 42341 | 0, // qsub1 |
| 42342 | 0, // qsub2 |
| 42343 | 0, // qsub3 |
| 42344 | 75, // ssub -> DD |
| 42345 | 75, // ssub_hi -> DD |
| 42346 | 0, // sub_32 |
| 42347 | 0, // sub_32_hi |
| 42348 | 0, // sube32 |
| 42349 | 0, // sube64 |
| 42350 | 0, // subo32 |
| 42351 | 0, // subo64 |
| 42352 | 0, // x8sub_0 |
| 42353 | 0, // x8sub_1 |
| 42354 | 0, // x8sub_2 |
| 42355 | 0, // x8sub_3 |
| 42356 | 0, // x8sub_4 |
| 42357 | 0, // x8sub_5 |
| 42358 | 0, // x8sub_6 |
| 42359 | 0, // x8sub_7 |
| 42360 | 0, // zasubb |
| 42361 | 0, // zasubd0 |
| 42362 | 0, // zasubd1 |
| 42363 | 0, // zasubh0 |
| 42364 | 0, // zasubh1 |
| 42365 | 0, // zasubq0 |
| 42366 | 0, // zasubq1 |
| 42367 | 0, // zasubs0 |
| 42368 | 0, // zasubs1 |
| 42369 | 0, // zsub |
| 42370 | 0, // zsub0 |
| 42371 | 0, // zsub1 |
| 42372 | 0, // zsub2 |
| 42373 | 0, // zsub3 |
| 42374 | 0, // zsub_hi |
| 42375 | 0, // zasubd1_then_zasubq0 |
| 42376 | 0, // zasubd1_then_zasubq1 |
| 42377 | 0, // zasubs1_then_zasubd0 |
| 42378 | 0, // zasubs1_then_zasubd1 |
| 42379 | 0, // zasubs1_then_zasubq0 |
| 42380 | 0, // zasubs1_then_zasubq1 |
| 42381 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42382 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42383 | 0, // zasubh1_then_zasubd0 |
| 42384 | 0, // zasubh1_then_zasubd1 |
| 42385 | 0, // zasubh1_then_zasubq0 |
| 42386 | 0, // zasubh1_then_zasubq1 |
| 42387 | 0, // zasubh1_then_zasubs0 |
| 42388 | 0, // zasubh1_then_zasubs1 |
| 42389 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42390 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42391 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42392 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42393 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42394 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42395 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42396 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42397 | 75, // dsub1_then_bsub -> DD |
| 42398 | 75, // dsub1_then_bsub_hi -> DD |
| 42399 | 75, // dsub1_then_hsub -> DD |
| 42400 | 75, // dsub1_then_hsub_hi -> DD |
| 42401 | 75, // dsub1_then_ssub -> DD |
| 42402 | 75, // dsub1_then_ssub_hi -> DD |
| 42403 | 0, // dsub3_then_bsub |
| 42404 | 0, // dsub3_then_bsub_hi |
| 42405 | 0, // dsub3_then_hsub |
| 42406 | 0, // dsub3_then_hsub_hi |
| 42407 | 0, // dsub3_then_ssub |
| 42408 | 0, // dsub3_then_ssub_hi |
| 42409 | 0, // dsub2_then_bsub |
| 42410 | 0, // dsub2_then_bsub_hi |
| 42411 | 0, // dsub2_then_hsub |
| 42412 | 0, // dsub2_then_hsub_hi |
| 42413 | 0, // dsub2_then_ssub |
| 42414 | 0, // dsub2_then_ssub_hi |
| 42415 | 0, // psub1_then_psub |
| 42416 | 0, // qsub1_then_dsub_hi |
| 42417 | 0, // qsub3_then_dsub_hi |
| 42418 | 0, // qsub2_then_dsub_hi |
| 42419 | 0, // x8sub_7_then_sub_32 |
| 42420 | 0, // x8sub_7_then_sub_32_hi |
| 42421 | 0, // x8sub_6_then_sub_32 |
| 42422 | 0, // x8sub_6_then_sub_32_hi |
| 42423 | 0, // x8sub_5_then_sub_32 |
| 42424 | 0, // x8sub_5_then_sub_32_hi |
| 42425 | 0, // x8sub_4_then_sub_32 |
| 42426 | 0, // x8sub_4_then_sub_32_hi |
| 42427 | 0, // x8sub_3_then_sub_32 |
| 42428 | 0, // x8sub_3_then_sub_32_hi |
| 42429 | 0, // x8sub_2_then_sub_32 |
| 42430 | 0, // x8sub_2_then_sub_32_hi |
| 42431 | 0, // x8sub_1_then_sub_32 |
| 42432 | 0, // x8sub_1_then_sub_32_hi |
| 42433 | 0, // subo64_then_sub_32 |
| 42434 | 0, // subo64_then_sub_32_hi |
| 42435 | 0, // zsub1_then_zsub_hi |
| 42436 | 0, // zsub3_then_zsub_hi |
| 42437 | 0, // zsub2_then_zsub_hi |
| 42438 | 0, // dsub0_dsub1 |
| 42439 | 0, // dsub0_dsub1_dsub2 |
| 42440 | 0, // dsub1_dsub2 |
| 42441 | 0, // dsub1_dsub2_dsub3 |
| 42442 | 0, // dsub2_dsub3 |
| 42443 | 0, // dsub_dsub1 |
| 42444 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42445 | 0, // dsub_dsub1_dsub2 |
| 42446 | 0, // qsub0_qsub1 |
| 42447 | 0, // qsub0_qsub1_qsub2 |
| 42448 | 0, // qsub1_qsub2 |
| 42449 | 0, // qsub1_qsub2_qsub3 |
| 42450 | 0, // qsub2_qsub3 |
| 42451 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42452 | 0, // x8sub_0_x8sub_1 |
| 42453 | 0, // x8sub_2_x8sub_3 |
| 42454 | 0, // x8sub_4_x8sub_5 |
| 42455 | 0, // x8sub_6_x8sub_7 |
| 42456 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42457 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42458 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42459 | 0, // sub_32_subo64_then_sub_32 |
| 42460 | 0, // zsub_qsub1 |
| 42461 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42462 | 0, // zsub_qsub1_qsub2 |
| 42463 | 0, // zsub0_zsub1 |
| 42464 | 0, // zsub0_zsub1_zsub2 |
| 42465 | 0, // zsub1_zsub2 |
| 42466 | 0, // zsub1_zsub2_zsub3 |
| 42467 | 0, // zsub2_zsub3 |
| 42468 | 0, // zsub0_zsub2 |
| 42469 | 0, // zsub1_zsub3 |
| 42470 | }, |
| 42471 | { // DD_with_dsub0_in_FPR64_lo |
| 42472 | 76, // bsub -> DD_with_dsub0_in_FPR64_lo |
| 42473 | 76, // bsub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42474 | 0, // dsub |
| 42475 | 76, // dsub0 -> DD_with_dsub0_in_FPR64_lo |
| 42476 | 76, // dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 42477 | 0, // dsub2 |
| 42478 | 0, // dsub3 |
| 42479 | 0, // dsub_hi |
| 42480 | 76, // hsub -> DD_with_dsub0_in_FPR64_lo |
| 42481 | 76, // hsub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42482 | 0, // psub |
| 42483 | 0, // psub0 |
| 42484 | 0, // psub1 |
| 42485 | 0, // qsub0 |
| 42486 | 0, // qsub1 |
| 42487 | 0, // qsub2 |
| 42488 | 0, // qsub3 |
| 42489 | 76, // ssub -> DD_with_dsub0_in_FPR64_lo |
| 42490 | 76, // ssub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42491 | 0, // sub_32 |
| 42492 | 0, // sub_32_hi |
| 42493 | 0, // sube32 |
| 42494 | 0, // sube64 |
| 42495 | 0, // subo32 |
| 42496 | 0, // subo64 |
| 42497 | 0, // x8sub_0 |
| 42498 | 0, // x8sub_1 |
| 42499 | 0, // x8sub_2 |
| 42500 | 0, // x8sub_3 |
| 42501 | 0, // x8sub_4 |
| 42502 | 0, // x8sub_5 |
| 42503 | 0, // x8sub_6 |
| 42504 | 0, // x8sub_7 |
| 42505 | 0, // zasubb |
| 42506 | 0, // zasubd0 |
| 42507 | 0, // zasubd1 |
| 42508 | 0, // zasubh0 |
| 42509 | 0, // zasubh1 |
| 42510 | 0, // zasubq0 |
| 42511 | 0, // zasubq1 |
| 42512 | 0, // zasubs0 |
| 42513 | 0, // zasubs1 |
| 42514 | 0, // zsub |
| 42515 | 0, // zsub0 |
| 42516 | 0, // zsub1 |
| 42517 | 0, // zsub2 |
| 42518 | 0, // zsub3 |
| 42519 | 0, // zsub_hi |
| 42520 | 0, // zasubd1_then_zasubq0 |
| 42521 | 0, // zasubd1_then_zasubq1 |
| 42522 | 0, // zasubs1_then_zasubd0 |
| 42523 | 0, // zasubs1_then_zasubd1 |
| 42524 | 0, // zasubs1_then_zasubq0 |
| 42525 | 0, // zasubs1_then_zasubq1 |
| 42526 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42527 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42528 | 0, // zasubh1_then_zasubd0 |
| 42529 | 0, // zasubh1_then_zasubd1 |
| 42530 | 0, // zasubh1_then_zasubq0 |
| 42531 | 0, // zasubh1_then_zasubq1 |
| 42532 | 0, // zasubh1_then_zasubs0 |
| 42533 | 0, // zasubh1_then_zasubs1 |
| 42534 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42535 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42536 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42537 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42538 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42539 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42540 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42541 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42542 | 76, // dsub1_then_bsub -> DD_with_dsub0_in_FPR64_lo |
| 42543 | 76, // dsub1_then_bsub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42544 | 76, // dsub1_then_hsub -> DD_with_dsub0_in_FPR64_lo |
| 42545 | 76, // dsub1_then_hsub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42546 | 76, // dsub1_then_ssub -> DD_with_dsub0_in_FPR64_lo |
| 42547 | 76, // dsub1_then_ssub_hi -> DD_with_dsub0_in_FPR64_lo |
| 42548 | 0, // dsub3_then_bsub |
| 42549 | 0, // dsub3_then_bsub_hi |
| 42550 | 0, // dsub3_then_hsub |
| 42551 | 0, // dsub3_then_hsub_hi |
| 42552 | 0, // dsub3_then_ssub |
| 42553 | 0, // dsub3_then_ssub_hi |
| 42554 | 0, // dsub2_then_bsub |
| 42555 | 0, // dsub2_then_bsub_hi |
| 42556 | 0, // dsub2_then_hsub |
| 42557 | 0, // dsub2_then_hsub_hi |
| 42558 | 0, // dsub2_then_ssub |
| 42559 | 0, // dsub2_then_ssub_hi |
| 42560 | 0, // psub1_then_psub |
| 42561 | 0, // qsub1_then_dsub_hi |
| 42562 | 0, // qsub3_then_dsub_hi |
| 42563 | 0, // qsub2_then_dsub_hi |
| 42564 | 0, // x8sub_7_then_sub_32 |
| 42565 | 0, // x8sub_7_then_sub_32_hi |
| 42566 | 0, // x8sub_6_then_sub_32 |
| 42567 | 0, // x8sub_6_then_sub_32_hi |
| 42568 | 0, // x8sub_5_then_sub_32 |
| 42569 | 0, // x8sub_5_then_sub_32_hi |
| 42570 | 0, // x8sub_4_then_sub_32 |
| 42571 | 0, // x8sub_4_then_sub_32_hi |
| 42572 | 0, // x8sub_3_then_sub_32 |
| 42573 | 0, // x8sub_3_then_sub_32_hi |
| 42574 | 0, // x8sub_2_then_sub_32 |
| 42575 | 0, // x8sub_2_then_sub_32_hi |
| 42576 | 0, // x8sub_1_then_sub_32 |
| 42577 | 0, // x8sub_1_then_sub_32_hi |
| 42578 | 0, // subo64_then_sub_32 |
| 42579 | 0, // subo64_then_sub_32_hi |
| 42580 | 0, // zsub1_then_zsub_hi |
| 42581 | 0, // zsub3_then_zsub_hi |
| 42582 | 0, // zsub2_then_zsub_hi |
| 42583 | 0, // dsub0_dsub1 |
| 42584 | 0, // dsub0_dsub1_dsub2 |
| 42585 | 0, // dsub1_dsub2 |
| 42586 | 0, // dsub1_dsub2_dsub3 |
| 42587 | 0, // dsub2_dsub3 |
| 42588 | 0, // dsub_dsub1 |
| 42589 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42590 | 0, // dsub_dsub1_dsub2 |
| 42591 | 0, // qsub0_qsub1 |
| 42592 | 0, // qsub0_qsub1_qsub2 |
| 42593 | 0, // qsub1_qsub2 |
| 42594 | 0, // qsub1_qsub2_qsub3 |
| 42595 | 0, // qsub2_qsub3 |
| 42596 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42597 | 0, // x8sub_0_x8sub_1 |
| 42598 | 0, // x8sub_2_x8sub_3 |
| 42599 | 0, // x8sub_4_x8sub_5 |
| 42600 | 0, // x8sub_6_x8sub_7 |
| 42601 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42602 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42603 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42604 | 0, // sub_32_subo64_then_sub_32 |
| 42605 | 0, // zsub_qsub1 |
| 42606 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42607 | 0, // zsub_qsub1_qsub2 |
| 42608 | 0, // zsub0_zsub1 |
| 42609 | 0, // zsub0_zsub1_zsub2 |
| 42610 | 0, // zsub1_zsub2 |
| 42611 | 0, // zsub1_zsub2_zsub3 |
| 42612 | 0, // zsub2_zsub3 |
| 42613 | 0, // zsub0_zsub2 |
| 42614 | 0, // zsub1_zsub3 |
| 42615 | }, |
| 42616 | { // DD_with_dsub1_in_FPR64_lo |
| 42617 | 77, // bsub -> DD_with_dsub1_in_FPR64_lo |
| 42618 | 77, // bsub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42619 | 0, // dsub |
| 42620 | 77, // dsub0 -> DD_with_dsub1_in_FPR64_lo |
| 42621 | 77, // dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 42622 | 0, // dsub2 |
| 42623 | 0, // dsub3 |
| 42624 | 0, // dsub_hi |
| 42625 | 77, // hsub -> DD_with_dsub1_in_FPR64_lo |
| 42626 | 77, // hsub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42627 | 0, // psub |
| 42628 | 0, // psub0 |
| 42629 | 0, // psub1 |
| 42630 | 0, // qsub0 |
| 42631 | 0, // qsub1 |
| 42632 | 0, // qsub2 |
| 42633 | 0, // qsub3 |
| 42634 | 77, // ssub -> DD_with_dsub1_in_FPR64_lo |
| 42635 | 77, // ssub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42636 | 0, // sub_32 |
| 42637 | 0, // sub_32_hi |
| 42638 | 0, // sube32 |
| 42639 | 0, // sube64 |
| 42640 | 0, // subo32 |
| 42641 | 0, // subo64 |
| 42642 | 0, // x8sub_0 |
| 42643 | 0, // x8sub_1 |
| 42644 | 0, // x8sub_2 |
| 42645 | 0, // x8sub_3 |
| 42646 | 0, // x8sub_4 |
| 42647 | 0, // x8sub_5 |
| 42648 | 0, // x8sub_6 |
| 42649 | 0, // x8sub_7 |
| 42650 | 0, // zasubb |
| 42651 | 0, // zasubd0 |
| 42652 | 0, // zasubd1 |
| 42653 | 0, // zasubh0 |
| 42654 | 0, // zasubh1 |
| 42655 | 0, // zasubq0 |
| 42656 | 0, // zasubq1 |
| 42657 | 0, // zasubs0 |
| 42658 | 0, // zasubs1 |
| 42659 | 0, // zsub |
| 42660 | 0, // zsub0 |
| 42661 | 0, // zsub1 |
| 42662 | 0, // zsub2 |
| 42663 | 0, // zsub3 |
| 42664 | 0, // zsub_hi |
| 42665 | 0, // zasubd1_then_zasubq0 |
| 42666 | 0, // zasubd1_then_zasubq1 |
| 42667 | 0, // zasubs1_then_zasubd0 |
| 42668 | 0, // zasubs1_then_zasubd1 |
| 42669 | 0, // zasubs1_then_zasubq0 |
| 42670 | 0, // zasubs1_then_zasubq1 |
| 42671 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42672 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42673 | 0, // zasubh1_then_zasubd0 |
| 42674 | 0, // zasubh1_then_zasubd1 |
| 42675 | 0, // zasubh1_then_zasubq0 |
| 42676 | 0, // zasubh1_then_zasubq1 |
| 42677 | 0, // zasubh1_then_zasubs0 |
| 42678 | 0, // zasubh1_then_zasubs1 |
| 42679 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42680 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42681 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42682 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42683 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42684 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42685 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42686 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42687 | 77, // dsub1_then_bsub -> DD_with_dsub1_in_FPR64_lo |
| 42688 | 77, // dsub1_then_bsub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42689 | 77, // dsub1_then_hsub -> DD_with_dsub1_in_FPR64_lo |
| 42690 | 77, // dsub1_then_hsub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42691 | 77, // dsub1_then_ssub -> DD_with_dsub1_in_FPR64_lo |
| 42692 | 77, // dsub1_then_ssub_hi -> DD_with_dsub1_in_FPR64_lo |
| 42693 | 0, // dsub3_then_bsub |
| 42694 | 0, // dsub3_then_bsub_hi |
| 42695 | 0, // dsub3_then_hsub |
| 42696 | 0, // dsub3_then_hsub_hi |
| 42697 | 0, // dsub3_then_ssub |
| 42698 | 0, // dsub3_then_ssub_hi |
| 42699 | 0, // dsub2_then_bsub |
| 42700 | 0, // dsub2_then_bsub_hi |
| 42701 | 0, // dsub2_then_hsub |
| 42702 | 0, // dsub2_then_hsub_hi |
| 42703 | 0, // dsub2_then_ssub |
| 42704 | 0, // dsub2_then_ssub_hi |
| 42705 | 0, // psub1_then_psub |
| 42706 | 0, // qsub1_then_dsub_hi |
| 42707 | 0, // qsub3_then_dsub_hi |
| 42708 | 0, // qsub2_then_dsub_hi |
| 42709 | 0, // x8sub_7_then_sub_32 |
| 42710 | 0, // x8sub_7_then_sub_32_hi |
| 42711 | 0, // x8sub_6_then_sub_32 |
| 42712 | 0, // x8sub_6_then_sub_32_hi |
| 42713 | 0, // x8sub_5_then_sub_32 |
| 42714 | 0, // x8sub_5_then_sub_32_hi |
| 42715 | 0, // x8sub_4_then_sub_32 |
| 42716 | 0, // x8sub_4_then_sub_32_hi |
| 42717 | 0, // x8sub_3_then_sub_32 |
| 42718 | 0, // x8sub_3_then_sub_32_hi |
| 42719 | 0, // x8sub_2_then_sub_32 |
| 42720 | 0, // x8sub_2_then_sub_32_hi |
| 42721 | 0, // x8sub_1_then_sub_32 |
| 42722 | 0, // x8sub_1_then_sub_32_hi |
| 42723 | 0, // subo64_then_sub_32 |
| 42724 | 0, // subo64_then_sub_32_hi |
| 42725 | 0, // zsub1_then_zsub_hi |
| 42726 | 0, // zsub3_then_zsub_hi |
| 42727 | 0, // zsub2_then_zsub_hi |
| 42728 | 0, // dsub0_dsub1 |
| 42729 | 0, // dsub0_dsub1_dsub2 |
| 42730 | 0, // dsub1_dsub2 |
| 42731 | 0, // dsub1_dsub2_dsub3 |
| 42732 | 0, // dsub2_dsub3 |
| 42733 | 0, // dsub_dsub1 |
| 42734 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42735 | 0, // dsub_dsub1_dsub2 |
| 42736 | 0, // qsub0_qsub1 |
| 42737 | 0, // qsub0_qsub1_qsub2 |
| 42738 | 0, // qsub1_qsub2 |
| 42739 | 0, // qsub1_qsub2_qsub3 |
| 42740 | 0, // qsub2_qsub3 |
| 42741 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42742 | 0, // x8sub_0_x8sub_1 |
| 42743 | 0, // x8sub_2_x8sub_3 |
| 42744 | 0, // x8sub_4_x8sub_5 |
| 42745 | 0, // x8sub_6_x8sub_7 |
| 42746 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42747 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42748 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42749 | 0, // sub_32_subo64_then_sub_32 |
| 42750 | 0, // zsub_qsub1 |
| 42751 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42752 | 0, // zsub_qsub1_qsub2 |
| 42753 | 0, // zsub0_zsub1 |
| 42754 | 0, // zsub0_zsub1_zsub2 |
| 42755 | 0, // zsub1_zsub2 |
| 42756 | 0, // zsub1_zsub2_zsub3 |
| 42757 | 0, // zsub2_zsub3 |
| 42758 | 0, // zsub0_zsub2 |
| 42759 | 0, // zsub1_zsub3 |
| 42760 | }, |
| 42761 | { // XSeqPairsClass |
| 42762 | 0, // bsub |
| 42763 | 0, // bsub_hi |
| 42764 | 0, // dsub |
| 42765 | 0, // dsub0 |
| 42766 | 0, // dsub1 |
| 42767 | 0, // dsub2 |
| 42768 | 0, // dsub3 |
| 42769 | 0, // dsub_hi |
| 42770 | 0, // hsub |
| 42771 | 0, // hsub_hi |
| 42772 | 0, // psub |
| 42773 | 0, // psub0 |
| 42774 | 0, // psub1 |
| 42775 | 0, // qsub0 |
| 42776 | 0, // qsub1 |
| 42777 | 0, // qsub2 |
| 42778 | 0, // qsub3 |
| 42779 | 0, // ssub |
| 42780 | 0, // ssub_hi |
| 42781 | 78, // sub_32 -> XSeqPairsClass |
| 42782 | 78, // sub_32_hi -> XSeqPairsClass |
| 42783 | 0, // sube32 |
| 42784 | 78, // sube64 -> XSeqPairsClass |
| 42785 | 0, // subo32 |
| 42786 | 78, // subo64 -> XSeqPairsClass |
| 42787 | 0, // x8sub_0 |
| 42788 | 0, // x8sub_1 |
| 42789 | 0, // x8sub_2 |
| 42790 | 0, // x8sub_3 |
| 42791 | 0, // x8sub_4 |
| 42792 | 0, // x8sub_5 |
| 42793 | 0, // x8sub_6 |
| 42794 | 0, // x8sub_7 |
| 42795 | 0, // zasubb |
| 42796 | 0, // zasubd0 |
| 42797 | 0, // zasubd1 |
| 42798 | 0, // zasubh0 |
| 42799 | 0, // zasubh1 |
| 42800 | 0, // zasubq0 |
| 42801 | 0, // zasubq1 |
| 42802 | 0, // zasubs0 |
| 42803 | 0, // zasubs1 |
| 42804 | 0, // zsub |
| 42805 | 0, // zsub0 |
| 42806 | 0, // zsub1 |
| 42807 | 0, // zsub2 |
| 42808 | 0, // zsub3 |
| 42809 | 0, // zsub_hi |
| 42810 | 0, // zasubd1_then_zasubq0 |
| 42811 | 0, // zasubd1_then_zasubq1 |
| 42812 | 0, // zasubs1_then_zasubd0 |
| 42813 | 0, // zasubs1_then_zasubd1 |
| 42814 | 0, // zasubs1_then_zasubq0 |
| 42815 | 0, // zasubs1_then_zasubq1 |
| 42816 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42817 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42818 | 0, // zasubh1_then_zasubd0 |
| 42819 | 0, // zasubh1_then_zasubd1 |
| 42820 | 0, // zasubh1_then_zasubq0 |
| 42821 | 0, // zasubh1_then_zasubq1 |
| 42822 | 0, // zasubh1_then_zasubs0 |
| 42823 | 0, // zasubh1_then_zasubs1 |
| 42824 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42825 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42826 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42827 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42828 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42829 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42830 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42831 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42832 | 0, // dsub1_then_bsub |
| 42833 | 0, // dsub1_then_bsub_hi |
| 42834 | 0, // dsub1_then_hsub |
| 42835 | 0, // dsub1_then_hsub_hi |
| 42836 | 0, // dsub1_then_ssub |
| 42837 | 0, // dsub1_then_ssub_hi |
| 42838 | 0, // dsub3_then_bsub |
| 42839 | 0, // dsub3_then_bsub_hi |
| 42840 | 0, // dsub3_then_hsub |
| 42841 | 0, // dsub3_then_hsub_hi |
| 42842 | 0, // dsub3_then_ssub |
| 42843 | 0, // dsub3_then_ssub_hi |
| 42844 | 0, // dsub2_then_bsub |
| 42845 | 0, // dsub2_then_bsub_hi |
| 42846 | 0, // dsub2_then_hsub |
| 42847 | 0, // dsub2_then_hsub_hi |
| 42848 | 0, // dsub2_then_ssub |
| 42849 | 0, // dsub2_then_ssub_hi |
| 42850 | 0, // psub1_then_psub |
| 42851 | 0, // qsub1_then_dsub_hi |
| 42852 | 0, // qsub3_then_dsub_hi |
| 42853 | 0, // qsub2_then_dsub_hi |
| 42854 | 0, // x8sub_7_then_sub_32 |
| 42855 | 0, // x8sub_7_then_sub_32_hi |
| 42856 | 0, // x8sub_6_then_sub_32 |
| 42857 | 0, // x8sub_6_then_sub_32_hi |
| 42858 | 0, // x8sub_5_then_sub_32 |
| 42859 | 0, // x8sub_5_then_sub_32_hi |
| 42860 | 0, // x8sub_4_then_sub_32 |
| 42861 | 0, // x8sub_4_then_sub_32_hi |
| 42862 | 0, // x8sub_3_then_sub_32 |
| 42863 | 0, // x8sub_3_then_sub_32_hi |
| 42864 | 0, // x8sub_2_then_sub_32 |
| 42865 | 0, // x8sub_2_then_sub_32_hi |
| 42866 | 0, // x8sub_1_then_sub_32 |
| 42867 | 0, // x8sub_1_then_sub_32_hi |
| 42868 | 78, // subo64_then_sub_32 -> XSeqPairsClass |
| 42869 | 78, // subo64_then_sub_32_hi -> XSeqPairsClass |
| 42870 | 0, // zsub1_then_zsub_hi |
| 42871 | 0, // zsub3_then_zsub_hi |
| 42872 | 0, // zsub2_then_zsub_hi |
| 42873 | 0, // dsub0_dsub1 |
| 42874 | 0, // dsub0_dsub1_dsub2 |
| 42875 | 0, // dsub1_dsub2 |
| 42876 | 0, // dsub1_dsub2_dsub3 |
| 42877 | 0, // dsub2_dsub3 |
| 42878 | 0, // dsub_dsub1 |
| 42879 | 0, // dsub_dsub1_dsub2_dsub3 |
| 42880 | 0, // dsub_dsub1_dsub2 |
| 42881 | 0, // qsub0_qsub1 |
| 42882 | 0, // qsub0_qsub1_qsub2 |
| 42883 | 0, // qsub1_qsub2 |
| 42884 | 0, // qsub1_qsub2_qsub3 |
| 42885 | 0, // qsub2_qsub3 |
| 42886 | 0, // sub_32_x8sub_1_then_sub_32 |
| 42887 | 0, // x8sub_0_x8sub_1 |
| 42888 | 0, // x8sub_2_x8sub_3 |
| 42889 | 0, // x8sub_4_x8sub_5 |
| 42890 | 0, // x8sub_6_x8sub_7 |
| 42891 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 42892 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 42893 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 42894 | 78, // sub_32_subo64_then_sub_32 -> XSeqPairsClass |
| 42895 | 0, // zsub_qsub1 |
| 42896 | 0, // zsub_qsub1_qsub2_qsub3 |
| 42897 | 0, // zsub_qsub1_qsub2 |
| 42898 | 0, // zsub0_zsub1 |
| 42899 | 0, // zsub0_zsub1_zsub2 |
| 42900 | 0, // zsub1_zsub2 |
| 42901 | 0, // zsub1_zsub2_zsub3 |
| 42902 | 0, // zsub2_zsub3 |
| 42903 | 0, // zsub0_zsub2 |
| 42904 | 0, // zsub1_zsub3 |
| 42905 | }, |
| 42906 | { // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42907 | 79, // bsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42908 | 79, // bsub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42909 | 0, // dsub |
| 42910 | 79, // dsub0 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42911 | 79, // dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42912 | 0, // dsub2 |
| 42913 | 0, // dsub3 |
| 42914 | 0, // dsub_hi |
| 42915 | 79, // hsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42916 | 79, // hsub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42917 | 0, // psub |
| 42918 | 0, // psub0 |
| 42919 | 0, // psub1 |
| 42920 | 0, // qsub0 |
| 42921 | 0, // qsub1 |
| 42922 | 0, // qsub2 |
| 42923 | 0, // qsub3 |
| 42924 | 79, // ssub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42925 | 79, // ssub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42926 | 0, // sub_32 |
| 42927 | 0, // sub_32_hi |
| 42928 | 0, // sube32 |
| 42929 | 0, // sube64 |
| 42930 | 0, // subo32 |
| 42931 | 0, // subo64 |
| 42932 | 0, // x8sub_0 |
| 42933 | 0, // x8sub_1 |
| 42934 | 0, // x8sub_2 |
| 42935 | 0, // x8sub_3 |
| 42936 | 0, // x8sub_4 |
| 42937 | 0, // x8sub_5 |
| 42938 | 0, // x8sub_6 |
| 42939 | 0, // x8sub_7 |
| 42940 | 0, // zasubb |
| 42941 | 0, // zasubd0 |
| 42942 | 0, // zasubd1 |
| 42943 | 0, // zasubh0 |
| 42944 | 0, // zasubh1 |
| 42945 | 0, // zasubq0 |
| 42946 | 0, // zasubq1 |
| 42947 | 0, // zasubs0 |
| 42948 | 0, // zasubs1 |
| 42949 | 0, // zsub |
| 42950 | 0, // zsub0 |
| 42951 | 0, // zsub1 |
| 42952 | 0, // zsub2 |
| 42953 | 0, // zsub3 |
| 42954 | 0, // zsub_hi |
| 42955 | 0, // zasubd1_then_zasubq0 |
| 42956 | 0, // zasubd1_then_zasubq1 |
| 42957 | 0, // zasubs1_then_zasubd0 |
| 42958 | 0, // zasubs1_then_zasubd1 |
| 42959 | 0, // zasubs1_then_zasubq0 |
| 42960 | 0, // zasubs1_then_zasubq1 |
| 42961 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 42962 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 42963 | 0, // zasubh1_then_zasubd0 |
| 42964 | 0, // zasubh1_then_zasubd1 |
| 42965 | 0, // zasubh1_then_zasubq0 |
| 42966 | 0, // zasubh1_then_zasubq1 |
| 42967 | 0, // zasubh1_then_zasubs0 |
| 42968 | 0, // zasubh1_then_zasubs1 |
| 42969 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 42970 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 42971 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 42972 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 42973 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 42974 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 42975 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 42976 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 42977 | 79, // dsub1_then_bsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42978 | 79, // dsub1_then_bsub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42979 | 79, // dsub1_then_hsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42980 | 79, // dsub1_then_hsub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42981 | 79, // dsub1_then_ssub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42982 | 79, // dsub1_then_ssub_hi -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 42983 | 0, // dsub3_then_bsub |
| 42984 | 0, // dsub3_then_bsub_hi |
| 42985 | 0, // dsub3_then_hsub |
| 42986 | 0, // dsub3_then_hsub_hi |
| 42987 | 0, // dsub3_then_ssub |
| 42988 | 0, // dsub3_then_ssub_hi |
| 42989 | 0, // dsub2_then_bsub |
| 42990 | 0, // dsub2_then_bsub_hi |
| 42991 | 0, // dsub2_then_hsub |
| 42992 | 0, // dsub2_then_hsub_hi |
| 42993 | 0, // dsub2_then_ssub |
| 42994 | 0, // dsub2_then_ssub_hi |
| 42995 | 0, // psub1_then_psub |
| 42996 | 0, // qsub1_then_dsub_hi |
| 42997 | 0, // qsub3_then_dsub_hi |
| 42998 | 0, // qsub2_then_dsub_hi |
| 42999 | 0, // x8sub_7_then_sub_32 |
| 43000 | 0, // x8sub_7_then_sub_32_hi |
| 43001 | 0, // x8sub_6_then_sub_32 |
| 43002 | 0, // x8sub_6_then_sub_32_hi |
| 43003 | 0, // x8sub_5_then_sub_32 |
| 43004 | 0, // x8sub_5_then_sub_32_hi |
| 43005 | 0, // x8sub_4_then_sub_32 |
| 43006 | 0, // x8sub_4_then_sub_32_hi |
| 43007 | 0, // x8sub_3_then_sub_32 |
| 43008 | 0, // x8sub_3_then_sub_32_hi |
| 43009 | 0, // x8sub_2_then_sub_32 |
| 43010 | 0, // x8sub_2_then_sub_32_hi |
| 43011 | 0, // x8sub_1_then_sub_32 |
| 43012 | 0, // x8sub_1_then_sub_32_hi |
| 43013 | 0, // subo64_then_sub_32 |
| 43014 | 0, // subo64_then_sub_32_hi |
| 43015 | 0, // zsub1_then_zsub_hi |
| 43016 | 0, // zsub3_then_zsub_hi |
| 43017 | 0, // zsub2_then_zsub_hi |
| 43018 | 0, // dsub0_dsub1 |
| 43019 | 0, // dsub0_dsub1_dsub2 |
| 43020 | 0, // dsub1_dsub2 |
| 43021 | 0, // dsub1_dsub2_dsub3 |
| 43022 | 0, // dsub2_dsub3 |
| 43023 | 0, // dsub_dsub1 |
| 43024 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43025 | 0, // dsub_dsub1_dsub2 |
| 43026 | 0, // qsub0_qsub1 |
| 43027 | 0, // qsub0_qsub1_qsub2 |
| 43028 | 0, // qsub1_qsub2 |
| 43029 | 0, // qsub1_qsub2_qsub3 |
| 43030 | 0, // qsub2_qsub3 |
| 43031 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43032 | 0, // x8sub_0_x8sub_1 |
| 43033 | 0, // x8sub_2_x8sub_3 |
| 43034 | 0, // x8sub_4_x8sub_5 |
| 43035 | 0, // x8sub_6_x8sub_7 |
| 43036 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43037 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43038 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43039 | 0, // sub_32_subo64_then_sub_32 |
| 43040 | 0, // zsub_qsub1 |
| 43041 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43042 | 0, // zsub_qsub1_qsub2 |
| 43043 | 0, // zsub0_zsub1 |
| 43044 | 0, // zsub0_zsub1_zsub2 |
| 43045 | 0, // zsub1_zsub2 |
| 43046 | 0, // zsub1_zsub2_zsub3 |
| 43047 | 0, // zsub2_zsub3 |
| 43048 | 0, // zsub0_zsub2 |
| 43049 | 0, // zsub1_zsub3 |
| 43050 | }, |
| 43051 | { // XSeqPairsClass_with_subo64_in_GPR64common |
| 43052 | 0, // bsub |
| 43053 | 0, // bsub_hi |
| 43054 | 0, // dsub |
| 43055 | 0, // dsub0 |
| 43056 | 0, // dsub1 |
| 43057 | 0, // dsub2 |
| 43058 | 0, // dsub3 |
| 43059 | 0, // dsub_hi |
| 43060 | 0, // hsub |
| 43061 | 0, // hsub_hi |
| 43062 | 0, // psub |
| 43063 | 0, // psub0 |
| 43064 | 0, // psub1 |
| 43065 | 0, // qsub0 |
| 43066 | 0, // qsub1 |
| 43067 | 0, // qsub2 |
| 43068 | 0, // qsub3 |
| 43069 | 0, // ssub |
| 43070 | 0, // ssub_hi |
| 43071 | 80, // sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43072 | 80, // sub_32_hi -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43073 | 0, // sube32 |
| 43074 | 80, // sube64 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43075 | 0, // subo32 |
| 43076 | 80, // subo64 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43077 | 0, // x8sub_0 |
| 43078 | 0, // x8sub_1 |
| 43079 | 0, // x8sub_2 |
| 43080 | 0, // x8sub_3 |
| 43081 | 0, // x8sub_4 |
| 43082 | 0, // x8sub_5 |
| 43083 | 0, // x8sub_6 |
| 43084 | 0, // x8sub_7 |
| 43085 | 0, // zasubb |
| 43086 | 0, // zasubd0 |
| 43087 | 0, // zasubd1 |
| 43088 | 0, // zasubh0 |
| 43089 | 0, // zasubh1 |
| 43090 | 0, // zasubq0 |
| 43091 | 0, // zasubq1 |
| 43092 | 0, // zasubs0 |
| 43093 | 0, // zasubs1 |
| 43094 | 0, // zsub |
| 43095 | 0, // zsub0 |
| 43096 | 0, // zsub1 |
| 43097 | 0, // zsub2 |
| 43098 | 0, // zsub3 |
| 43099 | 0, // zsub_hi |
| 43100 | 0, // zasubd1_then_zasubq0 |
| 43101 | 0, // zasubd1_then_zasubq1 |
| 43102 | 0, // zasubs1_then_zasubd0 |
| 43103 | 0, // zasubs1_then_zasubd1 |
| 43104 | 0, // zasubs1_then_zasubq0 |
| 43105 | 0, // zasubs1_then_zasubq1 |
| 43106 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43107 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43108 | 0, // zasubh1_then_zasubd0 |
| 43109 | 0, // zasubh1_then_zasubd1 |
| 43110 | 0, // zasubh1_then_zasubq0 |
| 43111 | 0, // zasubh1_then_zasubq1 |
| 43112 | 0, // zasubh1_then_zasubs0 |
| 43113 | 0, // zasubh1_then_zasubs1 |
| 43114 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43115 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43116 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43117 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43118 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43119 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43120 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43121 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43122 | 0, // dsub1_then_bsub |
| 43123 | 0, // dsub1_then_bsub_hi |
| 43124 | 0, // dsub1_then_hsub |
| 43125 | 0, // dsub1_then_hsub_hi |
| 43126 | 0, // dsub1_then_ssub |
| 43127 | 0, // dsub1_then_ssub_hi |
| 43128 | 0, // dsub3_then_bsub |
| 43129 | 0, // dsub3_then_bsub_hi |
| 43130 | 0, // dsub3_then_hsub |
| 43131 | 0, // dsub3_then_hsub_hi |
| 43132 | 0, // dsub3_then_ssub |
| 43133 | 0, // dsub3_then_ssub_hi |
| 43134 | 0, // dsub2_then_bsub |
| 43135 | 0, // dsub2_then_bsub_hi |
| 43136 | 0, // dsub2_then_hsub |
| 43137 | 0, // dsub2_then_hsub_hi |
| 43138 | 0, // dsub2_then_ssub |
| 43139 | 0, // dsub2_then_ssub_hi |
| 43140 | 0, // psub1_then_psub |
| 43141 | 0, // qsub1_then_dsub_hi |
| 43142 | 0, // qsub3_then_dsub_hi |
| 43143 | 0, // qsub2_then_dsub_hi |
| 43144 | 0, // x8sub_7_then_sub_32 |
| 43145 | 0, // x8sub_7_then_sub_32_hi |
| 43146 | 0, // x8sub_6_then_sub_32 |
| 43147 | 0, // x8sub_6_then_sub_32_hi |
| 43148 | 0, // x8sub_5_then_sub_32 |
| 43149 | 0, // x8sub_5_then_sub_32_hi |
| 43150 | 0, // x8sub_4_then_sub_32 |
| 43151 | 0, // x8sub_4_then_sub_32_hi |
| 43152 | 0, // x8sub_3_then_sub_32 |
| 43153 | 0, // x8sub_3_then_sub_32_hi |
| 43154 | 0, // x8sub_2_then_sub_32 |
| 43155 | 0, // x8sub_2_then_sub_32_hi |
| 43156 | 0, // x8sub_1_then_sub_32 |
| 43157 | 0, // x8sub_1_then_sub_32_hi |
| 43158 | 80, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43159 | 80, // subo64_then_sub_32_hi -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43160 | 0, // zsub1_then_zsub_hi |
| 43161 | 0, // zsub3_then_zsub_hi |
| 43162 | 0, // zsub2_then_zsub_hi |
| 43163 | 0, // dsub0_dsub1 |
| 43164 | 0, // dsub0_dsub1_dsub2 |
| 43165 | 0, // dsub1_dsub2 |
| 43166 | 0, // dsub1_dsub2_dsub3 |
| 43167 | 0, // dsub2_dsub3 |
| 43168 | 0, // dsub_dsub1 |
| 43169 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43170 | 0, // dsub_dsub1_dsub2 |
| 43171 | 0, // qsub0_qsub1 |
| 43172 | 0, // qsub0_qsub1_qsub2 |
| 43173 | 0, // qsub1_qsub2 |
| 43174 | 0, // qsub1_qsub2_qsub3 |
| 43175 | 0, // qsub2_qsub3 |
| 43176 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43177 | 0, // x8sub_0_x8sub_1 |
| 43178 | 0, // x8sub_2_x8sub_3 |
| 43179 | 0, // x8sub_4_x8sub_5 |
| 43180 | 0, // x8sub_6_x8sub_7 |
| 43181 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43182 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43183 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43184 | 80, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 43185 | 0, // zsub_qsub1 |
| 43186 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43187 | 0, // zsub_qsub1_qsub2 |
| 43188 | 0, // zsub0_zsub1 |
| 43189 | 0, // zsub0_zsub1_zsub2 |
| 43190 | 0, // zsub1_zsub2 |
| 43191 | 0, // zsub1_zsub2_zsub3 |
| 43192 | 0, // zsub2_zsub3 |
| 43193 | 0, // zsub0_zsub2 |
| 43194 | 0, // zsub1_zsub3 |
| 43195 | }, |
| 43196 | { // XSeqPairsClass_with_subo64_in_GPR64noip |
| 43197 | 0, // bsub |
| 43198 | 0, // bsub_hi |
| 43199 | 0, // dsub |
| 43200 | 0, // dsub0 |
| 43201 | 0, // dsub1 |
| 43202 | 0, // dsub2 |
| 43203 | 0, // dsub3 |
| 43204 | 0, // dsub_hi |
| 43205 | 0, // hsub |
| 43206 | 0, // hsub_hi |
| 43207 | 0, // psub |
| 43208 | 0, // psub0 |
| 43209 | 0, // psub1 |
| 43210 | 0, // qsub0 |
| 43211 | 0, // qsub1 |
| 43212 | 0, // qsub2 |
| 43213 | 0, // qsub3 |
| 43214 | 0, // ssub |
| 43215 | 0, // ssub_hi |
| 43216 | 81, // sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43217 | 81, // sub_32_hi -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43218 | 0, // sube32 |
| 43219 | 81, // sube64 -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43220 | 0, // subo32 |
| 43221 | 81, // subo64 -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43222 | 0, // x8sub_0 |
| 43223 | 0, // x8sub_1 |
| 43224 | 0, // x8sub_2 |
| 43225 | 0, // x8sub_3 |
| 43226 | 0, // x8sub_4 |
| 43227 | 0, // x8sub_5 |
| 43228 | 0, // x8sub_6 |
| 43229 | 0, // x8sub_7 |
| 43230 | 0, // zasubb |
| 43231 | 0, // zasubd0 |
| 43232 | 0, // zasubd1 |
| 43233 | 0, // zasubh0 |
| 43234 | 0, // zasubh1 |
| 43235 | 0, // zasubq0 |
| 43236 | 0, // zasubq1 |
| 43237 | 0, // zasubs0 |
| 43238 | 0, // zasubs1 |
| 43239 | 0, // zsub |
| 43240 | 0, // zsub0 |
| 43241 | 0, // zsub1 |
| 43242 | 0, // zsub2 |
| 43243 | 0, // zsub3 |
| 43244 | 0, // zsub_hi |
| 43245 | 0, // zasubd1_then_zasubq0 |
| 43246 | 0, // zasubd1_then_zasubq1 |
| 43247 | 0, // zasubs1_then_zasubd0 |
| 43248 | 0, // zasubs1_then_zasubd1 |
| 43249 | 0, // zasubs1_then_zasubq0 |
| 43250 | 0, // zasubs1_then_zasubq1 |
| 43251 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43252 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43253 | 0, // zasubh1_then_zasubd0 |
| 43254 | 0, // zasubh1_then_zasubd1 |
| 43255 | 0, // zasubh1_then_zasubq0 |
| 43256 | 0, // zasubh1_then_zasubq1 |
| 43257 | 0, // zasubh1_then_zasubs0 |
| 43258 | 0, // zasubh1_then_zasubs1 |
| 43259 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43260 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43261 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43262 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43263 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43264 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43265 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43266 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43267 | 0, // dsub1_then_bsub |
| 43268 | 0, // dsub1_then_bsub_hi |
| 43269 | 0, // dsub1_then_hsub |
| 43270 | 0, // dsub1_then_hsub_hi |
| 43271 | 0, // dsub1_then_ssub |
| 43272 | 0, // dsub1_then_ssub_hi |
| 43273 | 0, // dsub3_then_bsub |
| 43274 | 0, // dsub3_then_bsub_hi |
| 43275 | 0, // dsub3_then_hsub |
| 43276 | 0, // dsub3_then_hsub_hi |
| 43277 | 0, // dsub3_then_ssub |
| 43278 | 0, // dsub3_then_ssub_hi |
| 43279 | 0, // dsub2_then_bsub |
| 43280 | 0, // dsub2_then_bsub_hi |
| 43281 | 0, // dsub2_then_hsub |
| 43282 | 0, // dsub2_then_hsub_hi |
| 43283 | 0, // dsub2_then_ssub |
| 43284 | 0, // dsub2_then_ssub_hi |
| 43285 | 0, // psub1_then_psub |
| 43286 | 0, // qsub1_then_dsub_hi |
| 43287 | 0, // qsub3_then_dsub_hi |
| 43288 | 0, // qsub2_then_dsub_hi |
| 43289 | 0, // x8sub_7_then_sub_32 |
| 43290 | 0, // x8sub_7_then_sub_32_hi |
| 43291 | 0, // x8sub_6_then_sub_32 |
| 43292 | 0, // x8sub_6_then_sub_32_hi |
| 43293 | 0, // x8sub_5_then_sub_32 |
| 43294 | 0, // x8sub_5_then_sub_32_hi |
| 43295 | 0, // x8sub_4_then_sub_32 |
| 43296 | 0, // x8sub_4_then_sub_32_hi |
| 43297 | 0, // x8sub_3_then_sub_32 |
| 43298 | 0, // x8sub_3_then_sub_32_hi |
| 43299 | 0, // x8sub_2_then_sub_32 |
| 43300 | 0, // x8sub_2_then_sub_32_hi |
| 43301 | 0, // x8sub_1_then_sub_32 |
| 43302 | 0, // x8sub_1_then_sub_32_hi |
| 43303 | 81, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43304 | 81, // subo64_then_sub_32_hi -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43305 | 0, // zsub1_then_zsub_hi |
| 43306 | 0, // zsub3_then_zsub_hi |
| 43307 | 0, // zsub2_then_zsub_hi |
| 43308 | 0, // dsub0_dsub1 |
| 43309 | 0, // dsub0_dsub1_dsub2 |
| 43310 | 0, // dsub1_dsub2 |
| 43311 | 0, // dsub1_dsub2_dsub3 |
| 43312 | 0, // dsub2_dsub3 |
| 43313 | 0, // dsub_dsub1 |
| 43314 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43315 | 0, // dsub_dsub1_dsub2 |
| 43316 | 0, // qsub0_qsub1 |
| 43317 | 0, // qsub0_qsub1_qsub2 |
| 43318 | 0, // qsub1_qsub2 |
| 43319 | 0, // qsub1_qsub2_qsub3 |
| 43320 | 0, // qsub2_qsub3 |
| 43321 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43322 | 0, // x8sub_0_x8sub_1 |
| 43323 | 0, // x8sub_2_x8sub_3 |
| 43324 | 0, // x8sub_4_x8sub_5 |
| 43325 | 0, // x8sub_6_x8sub_7 |
| 43326 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43327 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43328 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43329 | 81, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip |
| 43330 | 0, // zsub_qsub1 |
| 43331 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43332 | 0, // zsub_qsub1_qsub2 |
| 43333 | 0, // zsub0_zsub1 |
| 43334 | 0, // zsub0_zsub1_zsub2 |
| 43335 | 0, // zsub1_zsub2 |
| 43336 | 0, // zsub1_zsub2_zsub3 |
| 43337 | 0, // zsub2_zsub3 |
| 43338 | 0, // zsub0_zsub2 |
| 43339 | 0, // zsub1_zsub3 |
| 43340 | }, |
| 43341 | { // XSeqPairsClass_with_sube64_in_GPR64noip |
| 43342 | 0, // bsub |
| 43343 | 0, // bsub_hi |
| 43344 | 0, // dsub |
| 43345 | 0, // dsub0 |
| 43346 | 0, // dsub1 |
| 43347 | 0, // dsub2 |
| 43348 | 0, // dsub3 |
| 43349 | 0, // dsub_hi |
| 43350 | 0, // hsub |
| 43351 | 0, // hsub_hi |
| 43352 | 0, // psub |
| 43353 | 0, // psub0 |
| 43354 | 0, // psub1 |
| 43355 | 0, // qsub0 |
| 43356 | 0, // qsub1 |
| 43357 | 0, // qsub2 |
| 43358 | 0, // qsub3 |
| 43359 | 0, // ssub |
| 43360 | 0, // ssub_hi |
| 43361 | 82, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43362 | 82, // sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43363 | 0, // sube32 |
| 43364 | 82, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43365 | 0, // subo32 |
| 43366 | 82, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43367 | 0, // x8sub_0 |
| 43368 | 0, // x8sub_1 |
| 43369 | 0, // x8sub_2 |
| 43370 | 0, // x8sub_3 |
| 43371 | 0, // x8sub_4 |
| 43372 | 0, // x8sub_5 |
| 43373 | 0, // x8sub_6 |
| 43374 | 0, // x8sub_7 |
| 43375 | 0, // zasubb |
| 43376 | 0, // zasubd0 |
| 43377 | 0, // zasubd1 |
| 43378 | 0, // zasubh0 |
| 43379 | 0, // zasubh1 |
| 43380 | 0, // zasubq0 |
| 43381 | 0, // zasubq1 |
| 43382 | 0, // zasubs0 |
| 43383 | 0, // zasubs1 |
| 43384 | 0, // zsub |
| 43385 | 0, // zsub0 |
| 43386 | 0, // zsub1 |
| 43387 | 0, // zsub2 |
| 43388 | 0, // zsub3 |
| 43389 | 0, // zsub_hi |
| 43390 | 0, // zasubd1_then_zasubq0 |
| 43391 | 0, // zasubd1_then_zasubq1 |
| 43392 | 0, // zasubs1_then_zasubd0 |
| 43393 | 0, // zasubs1_then_zasubd1 |
| 43394 | 0, // zasubs1_then_zasubq0 |
| 43395 | 0, // zasubs1_then_zasubq1 |
| 43396 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43397 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43398 | 0, // zasubh1_then_zasubd0 |
| 43399 | 0, // zasubh1_then_zasubd1 |
| 43400 | 0, // zasubh1_then_zasubq0 |
| 43401 | 0, // zasubh1_then_zasubq1 |
| 43402 | 0, // zasubh1_then_zasubs0 |
| 43403 | 0, // zasubh1_then_zasubs1 |
| 43404 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43405 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43406 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43407 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43408 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43409 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43410 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43411 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43412 | 0, // dsub1_then_bsub |
| 43413 | 0, // dsub1_then_bsub_hi |
| 43414 | 0, // dsub1_then_hsub |
| 43415 | 0, // dsub1_then_hsub_hi |
| 43416 | 0, // dsub1_then_ssub |
| 43417 | 0, // dsub1_then_ssub_hi |
| 43418 | 0, // dsub3_then_bsub |
| 43419 | 0, // dsub3_then_bsub_hi |
| 43420 | 0, // dsub3_then_hsub |
| 43421 | 0, // dsub3_then_hsub_hi |
| 43422 | 0, // dsub3_then_ssub |
| 43423 | 0, // dsub3_then_ssub_hi |
| 43424 | 0, // dsub2_then_bsub |
| 43425 | 0, // dsub2_then_bsub_hi |
| 43426 | 0, // dsub2_then_hsub |
| 43427 | 0, // dsub2_then_hsub_hi |
| 43428 | 0, // dsub2_then_ssub |
| 43429 | 0, // dsub2_then_ssub_hi |
| 43430 | 0, // psub1_then_psub |
| 43431 | 0, // qsub1_then_dsub_hi |
| 43432 | 0, // qsub3_then_dsub_hi |
| 43433 | 0, // qsub2_then_dsub_hi |
| 43434 | 0, // x8sub_7_then_sub_32 |
| 43435 | 0, // x8sub_7_then_sub_32_hi |
| 43436 | 0, // x8sub_6_then_sub_32 |
| 43437 | 0, // x8sub_6_then_sub_32_hi |
| 43438 | 0, // x8sub_5_then_sub_32 |
| 43439 | 0, // x8sub_5_then_sub_32_hi |
| 43440 | 0, // x8sub_4_then_sub_32 |
| 43441 | 0, // x8sub_4_then_sub_32_hi |
| 43442 | 0, // x8sub_3_then_sub_32 |
| 43443 | 0, // x8sub_3_then_sub_32_hi |
| 43444 | 0, // x8sub_2_then_sub_32 |
| 43445 | 0, // x8sub_2_then_sub_32_hi |
| 43446 | 0, // x8sub_1_then_sub_32 |
| 43447 | 0, // x8sub_1_then_sub_32_hi |
| 43448 | 82, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43449 | 82, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43450 | 0, // zsub1_then_zsub_hi |
| 43451 | 0, // zsub3_then_zsub_hi |
| 43452 | 0, // zsub2_then_zsub_hi |
| 43453 | 0, // dsub0_dsub1 |
| 43454 | 0, // dsub0_dsub1_dsub2 |
| 43455 | 0, // dsub1_dsub2 |
| 43456 | 0, // dsub1_dsub2_dsub3 |
| 43457 | 0, // dsub2_dsub3 |
| 43458 | 0, // dsub_dsub1 |
| 43459 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43460 | 0, // dsub_dsub1_dsub2 |
| 43461 | 0, // qsub0_qsub1 |
| 43462 | 0, // qsub0_qsub1_qsub2 |
| 43463 | 0, // qsub1_qsub2 |
| 43464 | 0, // qsub1_qsub2_qsub3 |
| 43465 | 0, // qsub2_qsub3 |
| 43466 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43467 | 0, // x8sub_0_x8sub_1 |
| 43468 | 0, // x8sub_2_x8sub_3 |
| 43469 | 0, // x8sub_4_x8sub_5 |
| 43470 | 0, // x8sub_6_x8sub_7 |
| 43471 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43472 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43473 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43474 | 82, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 43475 | 0, // zsub_qsub1 |
| 43476 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43477 | 0, // zsub_qsub1_qsub2 |
| 43478 | 0, // zsub0_zsub1 |
| 43479 | 0, // zsub0_zsub1_zsub2 |
| 43480 | 0, // zsub1_zsub2 |
| 43481 | 0, // zsub1_zsub2_zsub3 |
| 43482 | 0, // zsub2_zsub3 |
| 43483 | 0, // zsub0_zsub2 |
| 43484 | 0, // zsub1_zsub3 |
| 43485 | }, |
| 43486 | { // XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43487 | 0, // bsub |
| 43488 | 0, // bsub_hi |
| 43489 | 0, // dsub |
| 43490 | 0, // dsub0 |
| 43491 | 0, // dsub1 |
| 43492 | 0, // dsub2 |
| 43493 | 0, // dsub3 |
| 43494 | 0, // dsub_hi |
| 43495 | 0, // hsub |
| 43496 | 0, // hsub_hi |
| 43497 | 0, // psub |
| 43498 | 0, // psub0 |
| 43499 | 0, // psub1 |
| 43500 | 0, // qsub0 |
| 43501 | 0, // qsub1 |
| 43502 | 0, // qsub2 |
| 43503 | 0, // qsub3 |
| 43504 | 0, // ssub |
| 43505 | 0, // ssub_hi |
| 43506 | 83, // sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43507 | 83, // sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43508 | 0, // sube32 |
| 43509 | 83, // sube64 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43510 | 0, // subo32 |
| 43511 | 83, // subo64 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43512 | 0, // x8sub_0 |
| 43513 | 0, // x8sub_1 |
| 43514 | 0, // x8sub_2 |
| 43515 | 0, // x8sub_3 |
| 43516 | 0, // x8sub_4 |
| 43517 | 0, // x8sub_5 |
| 43518 | 0, // x8sub_6 |
| 43519 | 0, // x8sub_7 |
| 43520 | 0, // zasubb |
| 43521 | 0, // zasubd0 |
| 43522 | 0, // zasubd1 |
| 43523 | 0, // zasubh0 |
| 43524 | 0, // zasubh1 |
| 43525 | 0, // zasubq0 |
| 43526 | 0, // zasubq1 |
| 43527 | 0, // zasubs0 |
| 43528 | 0, // zasubs1 |
| 43529 | 0, // zsub |
| 43530 | 0, // zsub0 |
| 43531 | 0, // zsub1 |
| 43532 | 0, // zsub2 |
| 43533 | 0, // zsub3 |
| 43534 | 0, // zsub_hi |
| 43535 | 0, // zasubd1_then_zasubq0 |
| 43536 | 0, // zasubd1_then_zasubq1 |
| 43537 | 0, // zasubs1_then_zasubd0 |
| 43538 | 0, // zasubs1_then_zasubd1 |
| 43539 | 0, // zasubs1_then_zasubq0 |
| 43540 | 0, // zasubs1_then_zasubq1 |
| 43541 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43542 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43543 | 0, // zasubh1_then_zasubd0 |
| 43544 | 0, // zasubh1_then_zasubd1 |
| 43545 | 0, // zasubh1_then_zasubq0 |
| 43546 | 0, // zasubh1_then_zasubq1 |
| 43547 | 0, // zasubh1_then_zasubs0 |
| 43548 | 0, // zasubh1_then_zasubs1 |
| 43549 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43550 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43551 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43552 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43553 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43554 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43555 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43556 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43557 | 0, // dsub1_then_bsub |
| 43558 | 0, // dsub1_then_bsub_hi |
| 43559 | 0, // dsub1_then_hsub |
| 43560 | 0, // dsub1_then_hsub_hi |
| 43561 | 0, // dsub1_then_ssub |
| 43562 | 0, // dsub1_then_ssub_hi |
| 43563 | 0, // dsub3_then_bsub |
| 43564 | 0, // dsub3_then_bsub_hi |
| 43565 | 0, // dsub3_then_hsub |
| 43566 | 0, // dsub3_then_hsub_hi |
| 43567 | 0, // dsub3_then_ssub |
| 43568 | 0, // dsub3_then_ssub_hi |
| 43569 | 0, // dsub2_then_bsub |
| 43570 | 0, // dsub2_then_bsub_hi |
| 43571 | 0, // dsub2_then_hsub |
| 43572 | 0, // dsub2_then_hsub_hi |
| 43573 | 0, // dsub2_then_ssub |
| 43574 | 0, // dsub2_then_ssub_hi |
| 43575 | 0, // psub1_then_psub |
| 43576 | 0, // qsub1_then_dsub_hi |
| 43577 | 0, // qsub3_then_dsub_hi |
| 43578 | 0, // qsub2_then_dsub_hi |
| 43579 | 0, // x8sub_7_then_sub_32 |
| 43580 | 0, // x8sub_7_then_sub_32_hi |
| 43581 | 0, // x8sub_6_then_sub_32 |
| 43582 | 0, // x8sub_6_then_sub_32_hi |
| 43583 | 0, // x8sub_5_then_sub_32 |
| 43584 | 0, // x8sub_5_then_sub_32_hi |
| 43585 | 0, // x8sub_4_then_sub_32 |
| 43586 | 0, // x8sub_4_then_sub_32_hi |
| 43587 | 0, // x8sub_3_then_sub_32 |
| 43588 | 0, // x8sub_3_then_sub_32_hi |
| 43589 | 0, // x8sub_2_then_sub_32 |
| 43590 | 0, // x8sub_2_then_sub_32_hi |
| 43591 | 0, // x8sub_1_then_sub_32 |
| 43592 | 0, // x8sub_1_then_sub_32_hi |
| 43593 | 83, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43594 | 83, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43595 | 0, // zsub1_then_zsub_hi |
| 43596 | 0, // zsub3_then_zsub_hi |
| 43597 | 0, // zsub2_then_zsub_hi |
| 43598 | 0, // dsub0_dsub1 |
| 43599 | 0, // dsub0_dsub1_dsub2 |
| 43600 | 0, // dsub1_dsub2 |
| 43601 | 0, // dsub1_dsub2_dsub3 |
| 43602 | 0, // dsub2_dsub3 |
| 43603 | 0, // dsub_dsub1 |
| 43604 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43605 | 0, // dsub_dsub1_dsub2 |
| 43606 | 0, // qsub0_qsub1 |
| 43607 | 0, // qsub0_qsub1_qsub2 |
| 43608 | 0, // qsub1_qsub2 |
| 43609 | 0, // qsub1_qsub2_qsub3 |
| 43610 | 0, // qsub2_qsub3 |
| 43611 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43612 | 0, // x8sub_0_x8sub_1 |
| 43613 | 0, // x8sub_2_x8sub_3 |
| 43614 | 0, // x8sub_4_x8sub_5 |
| 43615 | 0, // x8sub_6_x8sub_7 |
| 43616 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43617 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43618 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43619 | 83, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 43620 | 0, // zsub_qsub1 |
| 43621 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43622 | 0, // zsub_qsub1_qsub2 |
| 43623 | 0, // zsub0_zsub1 |
| 43624 | 0, // zsub0_zsub1_zsub2 |
| 43625 | 0, // zsub1_zsub2 |
| 43626 | 0, // zsub1_zsub2_zsub3 |
| 43627 | 0, // zsub2_zsub3 |
| 43628 | 0, // zsub0_zsub2 |
| 43629 | 0, // zsub1_zsub3 |
| 43630 | }, |
| 43631 | { // XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43632 | 0, // bsub |
| 43633 | 0, // bsub_hi |
| 43634 | 0, // dsub |
| 43635 | 0, // dsub0 |
| 43636 | 0, // dsub1 |
| 43637 | 0, // dsub2 |
| 43638 | 0, // dsub3 |
| 43639 | 0, // dsub_hi |
| 43640 | 0, // hsub |
| 43641 | 0, // hsub_hi |
| 43642 | 0, // psub |
| 43643 | 0, // psub0 |
| 43644 | 0, // psub1 |
| 43645 | 0, // qsub0 |
| 43646 | 0, // qsub1 |
| 43647 | 0, // qsub2 |
| 43648 | 0, // qsub3 |
| 43649 | 0, // ssub |
| 43650 | 0, // ssub_hi |
| 43651 | 84, // sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43652 | 84, // sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43653 | 0, // sube32 |
| 43654 | 84, // sube64 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43655 | 0, // subo32 |
| 43656 | 84, // subo64 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43657 | 0, // x8sub_0 |
| 43658 | 0, // x8sub_1 |
| 43659 | 0, // x8sub_2 |
| 43660 | 0, // x8sub_3 |
| 43661 | 0, // x8sub_4 |
| 43662 | 0, // x8sub_5 |
| 43663 | 0, // x8sub_6 |
| 43664 | 0, // x8sub_7 |
| 43665 | 0, // zasubb |
| 43666 | 0, // zasubd0 |
| 43667 | 0, // zasubd1 |
| 43668 | 0, // zasubh0 |
| 43669 | 0, // zasubh1 |
| 43670 | 0, // zasubq0 |
| 43671 | 0, // zasubq1 |
| 43672 | 0, // zasubs0 |
| 43673 | 0, // zasubs1 |
| 43674 | 0, // zsub |
| 43675 | 0, // zsub0 |
| 43676 | 0, // zsub1 |
| 43677 | 0, // zsub2 |
| 43678 | 0, // zsub3 |
| 43679 | 0, // zsub_hi |
| 43680 | 0, // zasubd1_then_zasubq0 |
| 43681 | 0, // zasubd1_then_zasubq1 |
| 43682 | 0, // zasubs1_then_zasubd0 |
| 43683 | 0, // zasubs1_then_zasubd1 |
| 43684 | 0, // zasubs1_then_zasubq0 |
| 43685 | 0, // zasubs1_then_zasubq1 |
| 43686 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43687 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43688 | 0, // zasubh1_then_zasubd0 |
| 43689 | 0, // zasubh1_then_zasubd1 |
| 43690 | 0, // zasubh1_then_zasubq0 |
| 43691 | 0, // zasubh1_then_zasubq1 |
| 43692 | 0, // zasubh1_then_zasubs0 |
| 43693 | 0, // zasubh1_then_zasubs1 |
| 43694 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43695 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43696 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43697 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43698 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43699 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43700 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43701 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43702 | 0, // dsub1_then_bsub |
| 43703 | 0, // dsub1_then_bsub_hi |
| 43704 | 0, // dsub1_then_hsub |
| 43705 | 0, // dsub1_then_hsub_hi |
| 43706 | 0, // dsub1_then_ssub |
| 43707 | 0, // dsub1_then_ssub_hi |
| 43708 | 0, // dsub3_then_bsub |
| 43709 | 0, // dsub3_then_bsub_hi |
| 43710 | 0, // dsub3_then_hsub |
| 43711 | 0, // dsub3_then_hsub_hi |
| 43712 | 0, // dsub3_then_ssub |
| 43713 | 0, // dsub3_then_ssub_hi |
| 43714 | 0, // dsub2_then_bsub |
| 43715 | 0, // dsub2_then_bsub_hi |
| 43716 | 0, // dsub2_then_hsub |
| 43717 | 0, // dsub2_then_hsub_hi |
| 43718 | 0, // dsub2_then_ssub |
| 43719 | 0, // dsub2_then_ssub_hi |
| 43720 | 0, // psub1_then_psub |
| 43721 | 0, // qsub1_then_dsub_hi |
| 43722 | 0, // qsub3_then_dsub_hi |
| 43723 | 0, // qsub2_then_dsub_hi |
| 43724 | 0, // x8sub_7_then_sub_32 |
| 43725 | 0, // x8sub_7_then_sub_32_hi |
| 43726 | 0, // x8sub_6_then_sub_32 |
| 43727 | 0, // x8sub_6_then_sub_32_hi |
| 43728 | 0, // x8sub_5_then_sub_32 |
| 43729 | 0, // x8sub_5_then_sub_32_hi |
| 43730 | 0, // x8sub_4_then_sub_32 |
| 43731 | 0, // x8sub_4_then_sub_32_hi |
| 43732 | 0, // x8sub_3_then_sub_32 |
| 43733 | 0, // x8sub_3_then_sub_32_hi |
| 43734 | 0, // x8sub_2_then_sub_32 |
| 43735 | 0, // x8sub_2_then_sub_32_hi |
| 43736 | 0, // x8sub_1_then_sub_32 |
| 43737 | 0, // x8sub_1_then_sub_32_hi |
| 43738 | 84, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43739 | 84, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43740 | 0, // zsub1_then_zsub_hi |
| 43741 | 0, // zsub3_then_zsub_hi |
| 43742 | 0, // zsub2_then_zsub_hi |
| 43743 | 0, // dsub0_dsub1 |
| 43744 | 0, // dsub0_dsub1_dsub2 |
| 43745 | 0, // dsub1_dsub2 |
| 43746 | 0, // dsub1_dsub2_dsub3 |
| 43747 | 0, // dsub2_dsub3 |
| 43748 | 0, // dsub_dsub1 |
| 43749 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43750 | 0, // dsub_dsub1_dsub2 |
| 43751 | 0, // qsub0_qsub1 |
| 43752 | 0, // qsub0_qsub1_qsub2 |
| 43753 | 0, // qsub1_qsub2 |
| 43754 | 0, // qsub1_qsub2_qsub3 |
| 43755 | 0, // qsub2_qsub3 |
| 43756 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43757 | 0, // x8sub_0_x8sub_1 |
| 43758 | 0, // x8sub_2_x8sub_3 |
| 43759 | 0, // x8sub_4_x8sub_5 |
| 43760 | 0, // x8sub_6_x8sub_7 |
| 43761 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43762 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43763 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43764 | 84, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 43765 | 0, // zsub_qsub1 |
| 43766 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43767 | 0, // zsub_qsub1_qsub2 |
| 43768 | 0, // zsub0_zsub1 |
| 43769 | 0, // zsub0_zsub1_zsub2 |
| 43770 | 0, // zsub1_zsub2 |
| 43771 | 0, // zsub1_zsub2_zsub3 |
| 43772 | 0, // zsub2_zsub3 |
| 43773 | 0, // zsub0_zsub2 |
| 43774 | 0, // zsub1_zsub3 |
| 43775 | }, |
| 43776 | { // XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43777 | 0, // bsub |
| 43778 | 0, // bsub_hi |
| 43779 | 0, // dsub |
| 43780 | 0, // dsub0 |
| 43781 | 0, // dsub1 |
| 43782 | 0, // dsub2 |
| 43783 | 0, // dsub3 |
| 43784 | 0, // dsub_hi |
| 43785 | 0, // hsub |
| 43786 | 0, // hsub_hi |
| 43787 | 0, // psub |
| 43788 | 0, // psub0 |
| 43789 | 0, // psub1 |
| 43790 | 0, // qsub0 |
| 43791 | 0, // qsub1 |
| 43792 | 0, // qsub2 |
| 43793 | 0, // qsub3 |
| 43794 | 0, // ssub |
| 43795 | 0, // ssub_hi |
| 43796 | 85, // sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43797 | 85, // sub_32_hi -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43798 | 0, // sube32 |
| 43799 | 85, // sube64 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43800 | 0, // subo32 |
| 43801 | 85, // subo64 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43802 | 0, // x8sub_0 |
| 43803 | 0, // x8sub_1 |
| 43804 | 0, // x8sub_2 |
| 43805 | 0, // x8sub_3 |
| 43806 | 0, // x8sub_4 |
| 43807 | 0, // x8sub_5 |
| 43808 | 0, // x8sub_6 |
| 43809 | 0, // x8sub_7 |
| 43810 | 0, // zasubb |
| 43811 | 0, // zasubd0 |
| 43812 | 0, // zasubd1 |
| 43813 | 0, // zasubh0 |
| 43814 | 0, // zasubh1 |
| 43815 | 0, // zasubq0 |
| 43816 | 0, // zasubq1 |
| 43817 | 0, // zasubs0 |
| 43818 | 0, // zasubs1 |
| 43819 | 0, // zsub |
| 43820 | 0, // zsub0 |
| 43821 | 0, // zsub1 |
| 43822 | 0, // zsub2 |
| 43823 | 0, // zsub3 |
| 43824 | 0, // zsub_hi |
| 43825 | 0, // zasubd1_then_zasubq0 |
| 43826 | 0, // zasubd1_then_zasubq1 |
| 43827 | 0, // zasubs1_then_zasubd0 |
| 43828 | 0, // zasubs1_then_zasubd1 |
| 43829 | 0, // zasubs1_then_zasubq0 |
| 43830 | 0, // zasubs1_then_zasubq1 |
| 43831 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43832 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43833 | 0, // zasubh1_then_zasubd0 |
| 43834 | 0, // zasubh1_then_zasubd1 |
| 43835 | 0, // zasubh1_then_zasubq0 |
| 43836 | 0, // zasubh1_then_zasubq1 |
| 43837 | 0, // zasubh1_then_zasubs0 |
| 43838 | 0, // zasubh1_then_zasubs1 |
| 43839 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43840 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43841 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43842 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43843 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43844 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43845 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43846 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43847 | 0, // dsub1_then_bsub |
| 43848 | 0, // dsub1_then_bsub_hi |
| 43849 | 0, // dsub1_then_hsub |
| 43850 | 0, // dsub1_then_hsub_hi |
| 43851 | 0, // dsub1_then_ssub |
| 43852 | 0, // dsub1_then_ssub_hi |
| 43853 | 0, // dsub3_then_bsub |
| 43854 | 0, // dsub3_then_bsub_hi |
| 43855 | 0, // dsub3_then_hsub |
| 43856 | 0, // dsub3_then_hsub_hi |
| 43857 | 0, // dsub3_then_ssub |
| 43858 | 0, // dsub3_then_ssub_hi |
| 43859 | 0, // dsub2_then_bsub |
| 43860 | 0, // dsub2_then_bsub_hi |
| 43861 | 0, // dsub2_then_hsub |
| 43862 | 0, // dsub2_then_hsub_hi |
| 43863 | 0, // dsub2_then_ssub |
| 43864 | 0, // dsub2_then_ssub_hi |
| 43865 | 0, // psub1_then_psub |
| 43866 | 0, // qsub1_then_dsub_hi |
| 43867 | 0, // qsub3_then_dsub_hi |
| 43868 | 0, // qsub2_then_dsub_hi |
| 43869 | 0, // x8sub_7_then_sub_32 |
| 43870 | 0, // x8sub_7_then_sub_32_hi |
| 43871 | 0, // x8sub_6_then_sub_32 |
| 43872 | 0, // x8sub_6_then_sub_32_hi |
| 43873 | 0, // x8sub_5_then_sub_32 |
| 43874 | 0, // x8sub_5_then_sub_32_hi |
| 43875 | 0, // x8sub_4_then_sub_32 |
| 43876 | 0, // x8sub_4_then_sub_32_hi |
| 43877 | 0, // x8sub_3_then_sub_32 |
| 43878 | 0, // x8sub_3_then_sub_32_hi |
| 43879 | 0, // x8sub_2_then_sub_32 |
| 43880 | 0, // x8sub_2_then_sub_32_hi |
| 43881 | 0, // x8sub_1_then_sub_32 |
| 43882 | 0, // x8sub_1_then_sub_32_hi |
| 43883 | 85, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43884 | 85, // subo64_then_sub_32_hi -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43885 | 0, // zsub1_then_zsub_hi |
| 43886 | 0, // zsub3_then_zsub_hi |
| 43887 | 0, // zsub2_then_zsub_hi |
| 43888 | 0, // dsub0_dsub1 |
| 43889 | 0, // dsub0_dsub1_dsub2 |
| 43890 | 0, // dsub1_dsub2 |
| 43891 | 0, // dsub1_dsub2_dsub3 |
| 43892 | 0, // dsub2_dsub3 |
| 43893 | 0, // dsub_dsub1 |
| 43894 | 0, // dsub_dsub1_dsub2_dsub3 |
| 43895 | 0, // dsub_dsub1_dsub2 |
| 43896 | 0, // qsub0_qsub1 |
| 43897 | 0, // qsub0_qsub1_qsub2 |
| 43898 | 0, // qsub1_qsub2 |
| 43899 | 0, // qsub1_qsub2_qsub3 |
| 43900 | 0, // qsub2_qsub3 |
| 43901 | 0, // sub_32_x8sub_1_then_sub_32 |
| 43902 | 0, // x8sub_0_x8sub_1 |
| 43903 | 0, // x8sub_2_x8sub_3 |
| 43904 | 0, // x8sub_4_x8sub_5 |
| 43905 | 0, // x8sub_6_x8sub_7 |
| 43906 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 43907 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 43908 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 43909 | 85, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 43910 | 0, // zsub_qsub1 |
| 43911 | 0, // zsub_qsub1_qsub2_qsub3 |
| 43912 | 0, // zsub_qsub1_qsub2 |
| 43913 | 0, // zsub0_zsub1 |
| 43914 | 0, // zsub0_zsub1_zsub2 |
| 43915 | 0, // zsub1_zsub2 |
| 43916 | 0, // zsub1_zsub2_zsub3 |
| 43917 | 0, // zsub2_zsub3 |
| 43918 | 0, // zsub0_zsub2 |
| 43919 | 0, // zsub1_zsub3 |
| 43920 | }, |
| 43921 | { // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 43922 | 0, // bsub |
| 43923 | 0, // bsub_hi |
| 43924 | 0, // dsub |
| 43925 | 0, // dsub0 |
| 43926 | 0, // dsub1 |
| 43927 | 0, // dsub2 |
| 43928 | 0, // dsub3 |
| 43929 | 0, // dsub_hi |
| 43930 | 0, // hsub |
| 43931 | 0, // hsub_hi |
| 43932 | 0, // psub |
| 43933 | 0, // psub0 |
| 43934 | 0, // psub1 |
| 43935 | 0, // qsub0 |
| 43936 | 0, // qsub1 |
| 43937 | 0, // qsub2 |
| 43938 | 0, // qsub3 |
| 43939 | 0, // ssub |
| 43940 | 0, // ssub_hi |
| 43941 | 86, // sub_32 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 43942 | 86, // sub_32_hi -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 43943 | 0, // sube32 |
| 43944 | 86, // sube64 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 43945 | 0, // subo32 |
| 43946 | 86, // subo64 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 43947 | 0, // x8sub_0 |
| 43948 | 0, // x8sub_1 |
| 43949 | 0, // x8sub_2 |
| 43950 | 0, // x8sub_3 |
| 43951 | 0, // x8sub_4 |
| 43952 | 0, // x8sub_5 |
| 43953 | 0, // x8sub_6 |
| 43954 | 0, // x8sub_7 |
| 43955 | 0, // zasubb |
| 43956 | 0, // zasubd0 |
| 43957 | 0, // zasubd1 |
| 43958 | 0, // zasubh0 |
| 43959 | 0, // zasubh1 |
| 43960 | 0, // zasubq0 |
| 43961 | 0, // zasubq1 |
| 43962 | 0, // zasubs0 |
| 43963 | 0, // zasubs1 |
| 43964 | 0, // zsub |
| 43965 | 0, // zsub0 |
| 43966 | 0, // zsub1 |
| 43967 | 0, // zsub2 |
| 43968 | 0, // zsub3 |
| 43969 | 0, // zsub_hi |
| 43970 | 0, // zasubd1_then_zasubq0 |
| 43971 | 0, // zasubd1_then_zasubq1 |
| 43972 | 0, // zasubs1_then_zasubd0 |
| 43973 | 0, // zasubs1_then_zasubd1 |
| 43974 | 0, // zasubs1_then_zasubq0 |
| 43975 | 0, // zasubs1_then_zasubq1 |
| 43976 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 43977 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 43978 | 0, // zasubh1_then_zasubd0 |
| 43979 | 0, // zasubh1_then_zasubd1 |
| 43980 | 0, // zasubh1_then_zasubq0 |
| 43981 | 0, // zasubh1_then_zasubq1 |
| 43982 | 0, // zasubh1_then_zasubs0 |
| 43983 | 0, // zasubh1_then_zasubs1 |
| 43984 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 43985 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 43986 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 43987 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 43988 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 43989 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 43990 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 43991 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 43992 | 0, // dsub1_then_bsub |
| 43993 | 0, // dsub1_then_bsub_hi |
| 43994 | 0, // dsub1_then_hsub |
| 43995 | 0, // dsub1_then_hsub_hi |
| 43996 | 0, // dsub1_then_ssub |
| 43997 | 0, // dsub1_then_ssub_hi |
| 43998 | 0, // dsub3_then_bsub |
| 43999 | 0, // dsub3_then_bsub_hi |
| 44000 | 0, // dsub3_then_hsub |
| 44001 | 0, // dsub3_then_hsub_hi |
| 44002 | 0, // dsub3_then_ssub |
| 44003 | 0, // dsub3_then_ssub_hi |
| 44004 | 0, // dsub2_then_bsub |
| 44005 | 0, // dsub2_then_bsub_hi |
| 44006 | 0, // dsub2_then_hsub |
| 44007 | 0, // dsub2_then_hsub_hi |
| 44008 | 0, // dsub2_then_ssub |
| 44009 | 0, // dsub2_then_ssub_hi |
| 44010 | 0, // psub1_then_psub |
| 44011 | 0, // qsub1_then_dsub_hi |
| 44012 | 0, // qsub3_then_dsub_hi |
| 44013 | 0, // qsub2_then_dsub_hi |
| 44014 | 0, // x8sub_7_then_sub_32 |
| 44015 | 0, // x8sub_7_then_sub_32_hi |
| 44016 | 0, // x8sub_6_then_sub_32 |
| 44017 | 0, // x8sub_6_then_sub_32_hi |
| 44018 | 0, // x8sub_5_then_sub_32 |
| 44019 | 0, // x8sub_5_then_sub_32_hi |
| 44020 | 0, // x8sub_4_then_sub_32 |
| 44021 | 0, // x8sub_4_then_sub_32_hi |
| 44022 | 0, // x8sub_3_then_sub_32 |
| 44023 | 0, // x8sub_3_then_sub_32_hi |
| 44024 | 0, // x8sub_2_then_sub_32 |
| 44025 | 0, // x8sub_2_then_sub_32_hi |
| 44026 | 0, // x8sub_1_then_sub_32 |
| 44027 | 0, // x8sub_1_then_sub_32_hi |
| 44028 | 86, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 44029 | 86, // subo64_then_sub_32_hi -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 44030 | 0, // zsub1_then_zsub_hi |
| 44031 | 0, // zsub3_then_zsub_hi |
| 44032 | 0, // zsub2_then_zsub_hi |
| 44033 | 0, // dsub0_dsub1 |
| 44034 | 0, // dsub0_dsub1_dsub2 |
| 44035 | 0, // dsub1_dsub2 |
| 44036 | 0, // dsub1_dsub2_dsub3 |
| 44037 | 0, // dsub2_dsub3 |
| 44038 | 0, // dsub_dsub1 |
| 44039 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44040 | 0, // dsub_dsub1_dsub2 |
| 44041 | 0, // qsub0_qsub1 |
| 44042 | 0, // qsub0_qsub1_qsub2 |
| 44043 | 0, // qsub1_qsub2 |
| 44044 | 0, // qsub1_qsub2_qsub3 |
| 44045 | 0, // qsub2_qsub3 |
| 44046 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44047 | 0, // x8sub_0_x8sub_1 |
| 44048 | 0, // x8sub_2_x8sub_3 |
| 44049 | 0, // x8sub_4_x8sub_5 |
| 44050 | 0, // x8sub_6_x8sub_7 |
| 44051 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44052 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44053 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44054 | 86, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 44055 | 0, // zsub_qsub1 |
| 44056 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44057 | 0, // zsub_qsub1_qsub2 |
| 44058 | 0, // zsub0_zsub1 |
| 44059 | 0, // zsub0_zsub1_zsub2 |
| 44060 | 0, // zsub1_zsub2 |
| 44061 | 0, // zsub1_zsub2_zsub3 |
| 44062 | 0, // zsub2_zsub3 |
| 44063 | 0, // zsub0_zsub2 |
| 44064 | 0, // zsub1_zsub3 |
| 44065 | }, |
| 44066 | { // XSeqPairsClass_with_sube64_in_GPR64arg |
| 44067 | 0, // bsub |
| 44068 | 0, // bsub_hi |
| 44069 | 0, // dsub |
| 44070 | 0, // dsub0 |
| 44071 | 0, // dsub1 |
| 44072 | 0, // dsub2 |
| 44073 | 0, // dsub3 |
| 44074 | 0, // dsub_hi |
| 44075 | 0, // hsub |
| 44076 | 0, // hsub_hi |
| 44077 | 0, // psub |
| 44078 | 0, // psub0 |
| 44079 | 0, // psub1 |
| 44080 | 0, // qsub0 |
| 44081 | 0, // qsub1 |
| 44082 | 0, // qsub2 |
| 44083 | 0, // qsub3 |
| 44084 | 0, // ssub |
| 44085 | 0, // ssub_hi |
| 44086 | 87, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44087 | 87, // sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44088 | 0, // sube32 |
| 44089 | 87, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44090 | 0, // subo32 |
| 44091 | 87, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44092 | 0, // x8sub_0 |
| 44093 | 0, // x8sub_1 |
| 44094 | 0, // x8sub_2 |
| 44095 | 0, // x8sub_3 |
| 44096 | 0, // x8sub_4 |
| 44097 | 0, // x8sub_5 |
| 44098 | 0, // x8sub_6 |
| 44099 | 0, // x8sub_7 |
| 44100 | 0, // zasubb |
| 44101 | 0, // zasubd0 |
| 44102 | 0, // zasubd1 |
| 44103 | 0, // zasubh0 |
| 44104 | 0, // zasubh1 |
| 44105 | 0, // zasubq0 |
| 44106 | 0, // zasubq1 |
| 44107 | 0, // zasubs0 |
| 44108 | 0, // zasubs1 |
| 44109 | 0, // zsub |
| 44110 | 0, // zsub0 |
| 44111 | 0, // zsub1 |
| 44112 | 0, // zsub2 |
| 44113 | 0, // zsub3 |
| 44114 | 0, // zsub_hi |
| 44115 | 0, // zasubd1_then_zasubq0 |
| 44116 | 0, // zasubd1_then_zasubq1 |
| 44117 | 0, // zasubs1_then_zasubd0 |
| 44118 | 0, // zasubs1_then_zasubd1 |
| 44119 | 0, // zasubs1_then_zasubq0 |
| 44120 | 0, // zasubs1_then_zasubq1 |
| 44121 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44122 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44123 | 0, // zasubh1_then_zasubd0 |
| 44124 | 0, // zasubh1_then_zasubd1 |
| 44125 | 0, // zasubh1_then_zasubq0 |
| 44126 | 0, // zasubh1_then_zasubq1 |
| 44127 | 0, // zasubh1_then_zasubs0 |
| 44128 | 0, // zasubh1_then_zasubs1 |
| 44129 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44130 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44131 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44132 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44133 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44134 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44135 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44136 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44137 | 0, // dsub1_then_bsub |
| 44138 | 0, // dsub1_then_bsub_hi |
| 44139 | 0, // dsub1_then_hsub |
| 44140 | 0, // dsub1_then_hsub_hi |
| 44141 | 0, // dsub1_then_ssub |
| 44142 | 0, // dsub1_then_ssub_hi |
| 44143 | 0, // dsub3_then_bsub |
| 44144 | 0, // dsub3_then_bsub_hi |
| 44145 | 0, // dsub3_then_hsub |
| 44146 | 0, // dsub3_then_hsub_hi |
| 44147 | 0, // dsub3_then_ssub |
| 44148 | 0, // dsub3_then_ssub_hi |
| 44149 | 0, // dsub2_then_bsub |
| 44150 | 0, // dsub2_then_bsub_hi |
| 44151 | 0, // dsub2_then_hsub |
| 44152 | 0, // dsub2_then_hsub_hi |
| 44153 | 0, // dsub2_then_ssub |
| 44154 | 0, // dsub2_then_ssub_hi |
| 44155 | 0, // psub1_then_psub |
| 44156 | 0, // qsub1_then_dsub_hi |
| 44157 | 0, // qsub3_then_dsub_hi |
| 44158 | 0, // qsub2_then_dsub_hi |
| 44159 | 0, // x8sub_7_then_sub_32 |
| 44160 | 0, // x8sub_7_then_sub_32_hi |
| 44161 | 0, // x8sub_6_then_sub_32 |
| 44162 | 0, // x8sub_6_then_sub_32_hi |
| 44163 | 0, // x8sub_5_then_sub_32 |
| 44164 | 0, // x8sub_5_then_sub_32_hi |
| 44165 | 0, // x8sub_4_then_sub_32 |
| 44166 | 0, // x8sub_4_then_sub_32_hi |
| 44167 | 0, // x8sub_3_then_sub_32 |
| 44168 | 0, // x8sub_3_then_sub_32_hi |
| 44169 | 0, // x8sub_2_then_sub_32 |
| 44170 | 0, // x8sub_2_then_sub_32_hi |
| 44171 | 0, // x8sub_1_then_sub_32 |
| 44172 | 0, // x8sub_1_then_sub_32_hi |
| 44173 | 87, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44174 | 87, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44175 | 0, // zsub1_then_zsub_hi |
| 44176 | 0, // zsub3_then_zsub_hi |
| 44177 | 0, // zsub2_then_zsub_hi |
| 44178 | 0, // dsub0_dsub1 |
| 44179 | 0, // dsub0_dsub1_dsub2 |
| 44180 | 0, // dsub1_dsub2 |
| 44181 | 0, // dsub1_dsub2_dsub3 |
| 44182 | 0, // dsub2_dsub3 |
| 44183 | 0, // dsub_dsub1 |
| 44184 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44185 | 0, // dsub_dsub1_dsub2 |
| 44186 | 0, // qsub0_qsub1 |
| 44187 | 0, // qsub0_qsub1_qsub2 |
| 44188 | 0, // qsub1_qsub2 |
| 44189 | 0, // qsub1_qsub2_qsub3 |
| 44190 | 0, // qsub2_qsub3 |
| 44191 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44192 | 0, // x8sub_0_x8sub_1 |
| 44193 | 0, // x8sub_2_x8sub_3 |
| 44194 | 0, // x8sub_4_x8sub_5 |
| 44195 | 0, // x8sub_6_x8sub_7 |
| 44196 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44197 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44198 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44199 | 87, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 44200 | 0, // zsub_qsub1 |
| 44201 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44202 | 0, // zsub_qsub1_qsub2 |
| 44203 | 0, // zsub0_zsub1 |
| 44204 | 0, // zsub0_zsub1_zsub2 |
| 44205 | 0, // zsub1_zsub2 |
| 44206 | 0, // zsub1_zsub2_zsub3 |
| 44207 | 0, // zsub2_zsub3 |
| 44208 | 0, // zsub0_zsub2 |
| 44209 | 0, // zsub1_zsub3 |
| 44210 | }, |
| 44211 | { // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44212 | 0, // bsub |
| 44213 | 0, // bsub_hi |
| 44214 | 0, // dsub |
| 44215 | 0, // dsub0 |
| 44216 | 0, // dsub1 |
| 44217 | 0, // dsub2 |
| 44218 | 0, // dsub3 |
| 44219 | 0, // dsub_hi |
| 44220 | 0, // hsub |
| 44221 | 0, // hsub_hi |
| 44222 | 0, // psub |
| 44223 | 0, // psub0 |
| 44224 | 0, // psub1 |
| 44225 | 0, // qsub0 |
| 44226 | 0, // qsub1 |
| 44227 | 0, // qsub2 |
| 44228 | 0, // qsub3 |
| 44229 | 0, // ssub |
| 44230 | 0, // ssub_hi |
| 44231 | 88, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44232 | 88, // sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44233 | 0, // sube32 |
| 44234 | 88, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44235 | 0, // subo32 |
| 44236 | 88, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44237 | 0, // x8sub_0 |
| 44238 | 0, // x8sub_1 |
| 44239 | 0, // x8sub_2 |
| 44240 | 0, // x8sub_3 |
| 44241 | 0, // x8sub_4 |
| 44242 | 0, // x8sub_5 |
| 44243 | 0, // x8sub_6 |
| 44244 | 0, // x8sub_7 |
| 44245 | 0, // zasubb |
| 44246 | 0, // zasubd0 |
| 44247 | 0, // zasubd1 |
| 44248 | 0, // zasubh0 |
| 44249 | 0, // zasubh1 |
| 44250 | 0, // zasubq0 |
| 44251 | 0, // zasubq1 |
| 44252 | 0, // zasubs0 |
| 44253 | 0, // zasubs1 |
| 44254 | 0, // zsub |
| 44255 | 0, // zsub0 |
| 44256 | 0, // zsub1 |
| 44257 | 0, // zsub2 |
| 44258 | 0, // zsub3 |
| 44259 | 0, // zsub_hi |
| 44260 | 0, // zasubd1_then_zasubq0 |
| 44261 | 0, // zasubd1_then_zasubq1 |
| 44262 | 0, // zasubs1_then_zasubd0 |
| 44263 | 0, // zasubs1_then_zasubd1 |
| 44264 | 0, // zasubs1_then_zasubq0 |
| 44265 | 0, // zasubs1_then_zasubq1 |
| 44266 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44267 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44268 | 0, // zasubh1_then_zasubd0 |
| 44269 | 0, // zasubh1_then_zasubd1 |
| 44270 | 0, // zasubh1_then_zasubq0 |
| 44271 | 0, // zasubh1_then_zasubq1 |
| 44272 | 0, // zasubh1_then_zasubs0 |
| 44273 | 0, // zasubh1_then_zasubs1 |
| 44274 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44275 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44276 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44277 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44278 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44279 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44280 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44281 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44282 | 0, // dsub1_then_bsub |
| 44283 | 0, // dsub1_then_bsub_hi |
| 44284 | 0, // dsub1_then_hsub |
| 44285 | 0, // dsub1_then_hsub_hi |
| 44286 | 0, // dsub1_then_ssub |
| 44287 | 0, // dsub1_then_ssub_hi |
| 44288 | 0, // dsub3_then_bsub |
| 44289 | 0, // dsub3_then_bsub_hi |
| 44290 | 0, // dsub3_then_hsub |
| 44291 | 0, // dsub3_then_hsub_hi |
| 44292 | 0, // dsub3_then_ssub |
| 44293 | 0, // dsub3_then_ssub_hi |
| 44294 | 0, // dsub2_then_bsub |
| 44295 | 0, // dsub2_then_bsub_hi |
| 44296 | 0, // dsub2_then_hsub |
| 44297 | 0, // dsub2_then_hsub_hi |
| 44298 | 0, // dsub2_then_ssub |
| 44299 | 0, // dsub2_then_ssub_hi |
| 44300 | 0, // psub1_then_psub |
| 44301 | 0, // qsub1_then_dsub_hi |
| 44302 | 0, // qsub3_then_dsub_hi |
| 44303 | 0, // qsub2_then_dsub_hi |
| 44304 | 0, // x8sub_7_then_sub_32 |
| 44305 | 0, // x8sub_7_then_sub_32_hi |
| 44306 | 0, // x8sub_6_then_sub_32 |
| 44307 | 0, // x8sub_6_then_sub_32_hi |
| 44308 | 0, // x8sub_5_then_sub_32 |
| 44309 | 0, // x8sub_5_then_sub_32_hi |
| 44310 | 0, // x8sub_4_then_sub_32 |
| 44311 | 0, // x8sub_4_then_sub_32_hi |
| 44312 | 0, // x8sub_3_then_sub_32 |
| 44313 | 0, // x8sub_3_then_sub_32_hi |
| 44314 | 0, // x8sub_2_then_sub_32 |
| 44315 | 0, // x8sub_2_then_sub_32_hi |
| 44316 | 0, // x8sub_1_then_sub_32 |
| 44317 | 0, // x8sub_1_then_sub_32_hi |
| 44318 | 88, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44319 | 88, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44320 | 0, // zsub1_then_zsub_hi |
| 44321 | 0, // zsub3_then_zsub_hi |
| 44322 | 0, // zsub2_then_zsub_hi |
| 44323 | 0, // dsub0_dsub1 |
| 44324 | 0, // dsub0_dsub1_dsub2 |
| 44325 | 0, // dsub1_dsub2 |
| 44326 | 0, // dsub1_dsub2_dsub3 |
| 44327 | 0, // dsub2_dsub3 |
| 44328 | 0, // dsub_dsub1 |
| 44329 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44330 | 0, // dsub_dsub1_dsub2 |
| 44331 | 0, // qsub0_qsub1 |
| 44332 | 0, // qsub0_qsub1_qsub2 |
| 44333 | 0, // qsub1_qsub2 |
| 44334 | 0, // qsub1_qsub2_qsub3 |
| 44335 | 0, // qsub2_qsub3 |
| 44336 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44337 | 0, // x8sub_0_x8sub_1 |
| 44338 | 0, // x8sub_2_x8sub_3 |
| 44339 | 0, // x8sub_4_x8sub_5 |
| 44340 | 0, // x8sub_6_x8sub_7 |
| 44341 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44342 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44343 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44344 | 88, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 44345 | 0, // zsub_qsub1 |
| 44346 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44347 | 0, // zsub_qsub1_qsub2 |
| 44348 | 0, // zsub0_zsub1 |
| 44349 | 0, // zsub0_zsub1_zsub2 |
| 44350 | 0, // zsub1_zsub2 |
| 44351 | 0, // zsub1_zsub2_zsub3 |
| 44352 | 0, // zsub2_zsub3 |
| 44353 | 0, // zsub0_zsub2 |
| 44354 | 0, // zsub1_zsub3 |
| 44355 | }, |
| 44356 | { // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44357 | 0, // bsub |
| 44358 | 0, // bsub_hi |
| 44359 | 0, // dsub |
| 44360 | 0, // dsub0 |
| 44361 | 0, // dsub1 |
| 44362 | 0, // dsub2 |
| 44363 | 0, // dsub3 |
| 44364 | 0, // dsub_hi |
| 44365 | 0, // hsub |
| 44366 | 0, // hsub_hi |
| 44367 | 0, // psub |
| 44368 | 0, // psub0 |
| 44369 | 0, // psub1 |
| 44370 | 0, // qsub0 |
| 44371 | 0, // qsub1 |
| 44372 | 0, // qsub2 |
| 44373 | 0, // qsub3 |
| 44374 | 0, // ssub |
| 44375 | 0, // ssub_hi |
| 44376 | 89, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44377 | 89, // sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44378 | 0, // sube32 |
| 44379 | 89, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44380 | 0, // subo32 |
| 44381 | 89, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44382 | 0, // x8sub_0 |
| 44383 | 0, // x8sub_1 |
| 44384 | 0, // x8sub_2 |
| 44385 | 0, // x8sub_3 |
| 44386 | 0, // x8sub_4 |
| 44387 | 0, // x8sub_5 |
| 44388 | 0, // x8sub_6 |
| 44389 | 0, // x8sub_7 |
| 44390 | 0, // zasubb |
| 44391 | 0, // zasubd0 |
| 44392 | 0, // zasubd1 |
| 44393 | 0, // zasubh0 |
| 44394 | 0, // zasubh1 |
| 44395 | 0, // zasubq0 |
| 44396 | 0, // zasubq1 |
| 44397 | 0, // zasubs0 |
| 44398 | 0, // zasubs1 |
| 44399 | 0, // zsub |
| 44400 | 0, // zsub0 |
| 44401 | 0, // zsub1 |
| 44402 | 0, // zsub2 |
| 44403 | 0, // zsub3 |
| 44404 | 0, // zsub_hi |
| 44405 | 0, // zasubd1_then_zasubq0 |
| 44406 | 0, // zasubd1_then_zasubq1 |
| 44407 | 0, // zasubs1_then_zasubd0 |
| 44408 | 0, // zasubs1_then_zasubd1 |
| 44409 | 0, // zasubs1_then_zasubq0 |
| 44410 | 0, // zasubs1_then_zasubq1 |
| 44411 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44412 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44413 | 0, // zasubh1_then_zasubd0 |
| 44414 | 0, // zasubh1_then_zasubd1 |
| 44415 | 0, // zasubh1_then_zasubq0 |
| 44416 | 0, // zasubh1_then_zasubq1 |
| 44417 | 0, // zasubh1_then_zasubs0 |
| 44418 | 0, // zasubh1_then_zasubs1 |
| 44419 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44420 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44421 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44422 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44423 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44424 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44425 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44426 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44427 | 0, // dsub1_then_bsub |
| 44428 | 0, // dsub1_then_bsub_hi |
| 44429 | 0, // dsub1_then_hsub |
| 44430 | 0, // dsub1_then_hsub_hi |
| 44431 | 0, // dsub1_then_ssub |
| 44432 | 0, // dsub1_then_ssub_hi |
| 44433 | 0, // dsub3_then_bsub |
| 44434 | 0, // dsub3_then_bsub_hi |
| 44435 | 0, // dsub3_then_hsub |
| 44436 | 0, // dsub3_then_hsub_hi |
| 44437 | 0, // dsub3_then_ssub |
| 44438 | 0, // dsub3_then_ssub_hi |
| 44439 | 0, // dsub2_then_bsub |
| 44440 | 0, // dsub2_then_bsub_hi |
| 44441 | 0, // dsub2_then_hsub |
| 44442 | 0, // dsub2_then_hsub_hi |
| 44443 | 0, // dsub2_then_ssub |
| 44444 | 0, // dsub2_then_ssub_hi |
| 44445 | 0, // psub1_then_psub |
| 44446 | 0, // qsub1_then_dsub_hi |
| 44447 | 0, // qsub3_then_dsub_hi |
| 44448 | 0, // qsub2_then_dsub_hi |
| 44449 | 0, // x8sub_7_then_sub_32 |
| 44450 | 0, // x8sub_7_then_sub_32_hi |
| 44451 | 0, // x8sub_6_then_sub_32 |
| 44452 | 0, // x8sub_6_then_sub_32_hi |
| 44453 | 0, // x8sub_5_then_sub_32 |
| 44454 | 0, // x8sub_5_then_sub_32_hi |
| 44455 | 0, // x8sub_4_then_sub_32 |
| 44456 | 0, // x8sub_4_then_sub_32_hi |
| 44457 | 0, // x8sub_3_then_sub_32 |
| 44458 | 0, // x8sub_3_then_sub_32_hi |
| 44459 | 0, // x8sub_2_then_sub_32 |
| 44460 | 0, // x8sub_2_then_sub_32_hi |
| 44461 | 0, // x8sub_1_then_sub_32 |
| 44462 | 0, // x8sub_1_then_sub_32_hi |
| 44463 | 89, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44464 | 89, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44465 | 0, // zsub1_then_zsub_hi |
| 44466 | 0, // zsub3_then_zsub_hi |
| 44467 | 0, // zsub2_then_zsub_hi |
| 44468 | 0, // dsub0_dsub1 |
| 44469 | 0, // dsub0_dsub1_dsub2 |
| 44470 | 0, // dsub1_dsub2 |
| 44471 | 0, // dsub1_dsub2_dsub3 |
| 44472 | 0, // dsub2_dsub3 |
| 44473 | 0, // dsub_dsub1 |
| 44474 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44475 | 0, // dsub_dsub1_dsub2 |
| 44476 | 0, // qsub0_qsub1 |
| 44477 | 0, // qsub0_qsub1_qsub2 |
| 44478 | 0, // qsub1_qsub2 |
| 44479 | 0, // qsub1_qsub2_qsub3 |
| 44480 | 0, // qsub2_qsub3 |
| 44481 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44482 | 0, // x8sub_0_x8sub_1 |
| 44483 | 0, // x8sub_2_x8sub_3 |
| 44484 | 0, // x8sub_4_x8sub_5 |
| 44485 | 0, // x8sub_6_x8sub_7 |
| 44486 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44487 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44488 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44489 | 89, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 44490 | 0, // zsub_qsub1 |
| 44491 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44492 | 0, // zsub_qsub1_qsub2 |
| 44493 | 0, // zsub0_zsub1 |
| 44494 | 0, // zsub0_zsub1_zsub2 |
| 44495 | 0, // zsub1_zsub2 |
| 44496 | 0, // zsub1_zsub2_zsub3 |
| 44497 | 0, // zsub2_zsub3 |
| 44498 | 0, // zsub0_zsub2 |
| 44499 | 0, // zsub1_zsub3 |
| 44500 | }, |
| 44501 | { // XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44502 | 0, // bsub |
| 44503 | 0, // bsub_hi |
| 44504 | 0, // dsub |
| 44505 | 0, // dsub0 |
| 44506 | 0, // dsub1 |
| 44507 | 0, // dsub2 |
| 44508 | 0, // dsub3 |
| 44509 | 0, // dsub_hi |
| 44510 | 0, // hsub |
| 44511 | 0, // hsub_hi |
| 44512 | 0, // psub |
| 44513 | 0, // psub0 |
| 44514 | 0, // psub1 |
| 44515 | 0, // qsub0 |
| 44516 | 0, // qsub1 |
| 44517 | 0, // qsub2 |
| 44518 | 0, // qsub3 |
| 44519 | 0, // ssub |
| 44520 | 0, // ssub_hi |
| 44521 | 90, // sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44522 | 90, // sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44523 | 0, // sube32 |
| 44524 | 90, // sube64 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44525 | 0, // subo32 |
| 44526 | 90, // subo64 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44527 | 0, // x8sub_0 |
| 44528 | 0, // x8sub_1 |
| 44529 | 0, // x8sub_2 |
| 44530 | 0, // x8sub_3 |
| 44531 | 0, // x8sub_4 |
| 44532 | 0, // x8sub_5 |
| 44533 | 0, // x8sub_6 |
| 44534 | 0, // x8sub_7 |
| 44535 | 0, // zasubb |
| 44536 | 0, // zasubd0 |
| 44537 | 0, // zasubd1 |
| 44538 | 0, // zasubh0 |
| 44539 | 0, // zasubh1 |
| 44540 | 0, // zasubq0 |
| 44541 | 0, // zasubq1 |
| 44542 | 0, // zasubs0 |
| 44543 | 0, // zasubs1 |
| 44544 | 0, // zsub |
| 44545 | 0, // zsub0 |
| 44546 | 0, // zsub1 |
| 44547 | 0, // zsub2 |
| 44548 | 0, // zsub3 |
| 44549 | 0, // zsub_hi |
| 44550 | 0, // zasubd1_then_zasubq0 |
| 44551 | 0, // zasubd1_then_zasubq1 |
| 44552 | 0, // zasubs1_then_zasubd0 |
| 44553 | 0, // zasubs1_then_zasubd1 |
| 44554 | 0, // zasubs1_then_zasubq0 |
| 44555 | 0, // zasubs1_then_zasubq1 |
| 44556 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44557 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44558 | 0, // zasubh1_then_zasubd0 |
| 44559 | 0, // zasubh1_then_zasubd1 |
| 44560 | 0, // zasubh1_then_zasubq0 |
| 44561 | 0, // zasubh1_then_zasubq1 |
| 44562 | 0, // zasubh1_then_zasubs0 |
| 44563 | 0, // zasubh1_then_zasubs1 |
| 44564 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44565 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44566 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44567 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44568 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44569 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44570 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44571 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44572 | 0, // dsub1_then_bsub |
| 44573 | 0, // dsub1_then_bsub_hi |
| 44574 | 0, // dsub1_then_hsub |
| 44575 | 0, // dsub1_then_hsub_hi |
| 44576 | 0, // dsub1_then_ssub |
| 44577 | 0, // dsub1_then_ssub_hi |
| 44578 | 0, // dsub3_then_bsub |
| 44579 | 0, // dsub3_then_bsub_hi |
| 44580 | 0, // dsub3_then_hsub |
| 44581 | 0, // dsub3_then_hsub_hi |
| 44582 | 0, // dsub3_then_ssub |
| 44583 | 0, // dsub3_then_ssub_hi |
| 44584 | 0, // dsub2_then_bsub |
| 44585 | 0, // dsub2_then_bsub_hi |
| 44586 | 0, // dsub2_then_hsub |
| 44587 | 0, // dsub2_then_hsub_hi |
| 44588 | 0, // dsub2_then_ssub |
| 44589 | 0, // dsub2_then_ssub_hi |
| 44590 | 0, // psub1_then_psub |
| 44591 | 0, // qsub1_then_dsub_hi |
| 44592 | 0, // qsub3_then_dsub_hi |
| 44593 | 0, // qsub2_then_dsub_hi |
| 44594 | 0, // x8sub_7_then_sub_32 |
| 44595 | 0, // x8sub_7_then_sub_32_hi |
| 44596 | 0, // x8sub_6_then_sub_32 |
| 44597 | 0, // x8sub_6_then_sub_32_hi |
| 44598 | 0, // x8sub_5_then_sub_32 |
| 44599 | 0, // x8sub_5_then_sub_32_hi |
| 44600 | 0, // x8sub_4_then_sub_32 |
| 44601 | 0, // x8sub_4_then_sub_32_hi |
| 44602 | 0, // x8sub_3_then_sub_32 |
| 44603 | 0, // x8sub_3_then_sub_32_hi |
| 44604 | 0, // x8sub_2_then_sub_32 |
| 44605 | 0, // x8sub_2_then_sub_32_hi |
| 44606 | 0, // x8sub_1_then_sub_32 |
| 44607 | 0, // x8sub_1_then_sub_32_hi |
| 44608 | 90, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44609 | 90, // subo64_then_sub_32_hi -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44610 | 0, // zsub1_then_zsub_hi |
| 44611 | 0, // zsub3_then_zsub_hi |
| 44612 | 0, // zsub2_then_zsub_hi |
| 44613 | 0, // dsub0_dsub1 |
| 44614 | 0, // dsub0_dsub1_dsub2 |
| 44615 | 0, // dsub1_dsub2 |
| 44616 | 0, // dsub1_dsub2_dsub3 |
| 44617 | 0, // dsub2_dsub3 |
| 44618 | 0, // dsub_dsub1 |
| 44619 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44620 | 0, // dsub_dsub1_dsub2 |
| 44621 | 0, // qsub0_qsub1 |
| 44622 | 0, // qsub0_qsub1_qsub2 |
| 44623 | 0, // qsub1_qsub2 |
| 44624 | 0, // qsub1_qsub2_qsub3 |
| 44625 | 0, // qsub2_qsub3 |
| 44626 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44627 | 0, // x8sub_0_x8sub_1 |
| 44628 | 0, // x8sub_2_x8sub_3 |
| 44629 | 0, // x8sub_4_x8sub_5 |
| 44630 | 0, // x8sub_6_x8sub_7 |
| 44631 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44632 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44633 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44634 | 90, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 44635 | 0, // zsub_qsub1 |
| 44636 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44637 | 0, // zsub_qsub1_qsub2 |
| 44638 | 0, // zsub0_zsub1 |
| 44639 | 0, // zsub0_zsub1_zsub2 |
| 44640 | 0, // zsub1_zsub2 |
| 44641 | 0, // zsub1_zsub2_zsub3 |
| 44642 | 0, // zsub2_zsub3 |
| 44643 | 0, // zsub0_zsub2 |
| 44644 | 0, // zsub1_zsub3 |
| 44645 | }, |
| 44646 | { // XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44647 | 0, // bsub |
| 44648 | 0, // bsub_hi |
| 44649 | 0, // dsub |
| 44650 | 0, // dsub0 |
| 44651 | 0, // dsub1 |
| 44652 | 0, // dsub2 |
| 44653 | 0, // dsub3 |
| 44654 | 0, // dsub_hi |
| 44655 | 0, // hsub |
| 44656 | 0, // hsub_hi |
| 44657 | 0, // psub |
| 44658 | 0, // psub0 |
| 44659 | 0, // psub1 |
| 44660 | 0, // qsub0 |
| 44661 | 0, // qsub1 |
| 44662 | 0, // qsub2 |
| 44663 | 0, // qsub3 |
| 44664 | 0, // ssub |
| 44665 | 0, // ssub_hi |
| 44666 | 91, // sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44667 | 91, // sub_32_hi -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44668 | 0, // sube32 |
| 44669 | 91, // sube64 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44670 | 0, // subo32 |
| 44671 | 91, // subo64 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44672 | 0, // x8sub_0 |
| 44673 | 0, // x8sub_1 |
| 44674 | 0, // x8sub_2 |
| 44675 | 0, // x8sub_3 |
| 44676 | 0, // x8sub_4 |
| 44677 | 0, // x8sub_5 |
| 44678 | 0, // x8sub_6 |
| 44679 | 0, // x8sub_7 |
| 44680 | 0, // zasubb |
| 44681 | 0, // zasubd0 |
| 44682 | 0, // zasubd1 |
| 44683 | 0, // zasubh0 |
| 44684 | 0, // zasubh1 |
| 44685 | 0, // zasubq0 |
| 44686 | 0, // zasubq1 |
| 44687 | 0, // zasubs0 |
| 44688 | 0, // zasubs1 |
| 44689 | 0, // zsub |
| 44690 | 0, // zsub0 |
| 44691 | 0, // zsub1 |
| 44692 | 0, // zsub2 |
| 44693 | 0, // zsub3 |
| 44694 | 0, // zsub_hi |
| 44695 | 0, // zasubd1_then_zasubq0 |
| 44696 | 0, // zasubd1_then_zasubq1 |
| 44697 | 0, // zasubs1_then_zasubd0 |
| 44698 | 0, // zasubs1_then_zasubd1 |
| 44699 | 0, // zasubs1_then_zasubq0 |
| 44700 | 0, // zasubs1_then_zasubq1 |
| 44701 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44702 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44703 | 0, // zasubh1_then_zasubd0 |
| 44704 | 0, // zasubh1_then_zasubd1 |
| 44705 | 0, // zasubh1_then_zasubq0 |
| 44706 | 0, // zasubh1_then_zasubq1 |
| 44707 | 0, // zasubh1_then_zasubs0 |
| 44708 | 0, // zasubh1_then_zasubs1 |
| 44709 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44710 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44711 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44712 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44713 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44714 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44715 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44716 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44717 | 0, // dsub1_then_bsub |
| 44718 | 0, // dsub1_then_bsub_hi |
| 44719 | 0, // dsub1_then_hsub |
| 44720 | 0, // dsub1_then_hsub_hi |
| 44721 | 0, // dsub1_then_ssub |
| 44722 | 0, // dsub1_then_ssub_hi |
| 44723 | 0, // dsub3_then_bsub |
| 44724 | 0, // dsub3_then_bsub_hi |
| 44725 | 0, // dsub3_then_hsub |
| 44726 | 0, // dsub3_then_hsub_hi |
| 44727 | 0, // dsub3_then_ssub |
| 44728 | 0, // dsub3_then_ssub_hi |
| 44729 | 0, // dsub2_then_bsub |
| 44730 | 0, // dsub2_then_bsub_hi |
| 44731 | 0, // dsub2_then_hsub |
| 44732 | 0, // dsub2_then_hsub_hi |
| 44733 | 0, // dsub2_then_ssub |
| 44734 | 0, // dsub2_then_ssub_hi |
| 44735 | 0, // psub1_then_psub |
| 44736 | 0, // qsub1_then_dsub_hi |
| 44737 | 0, // qsub3_then_dsub_hi |
| 44738 | 0, // qsub2_then_dsub_hi |
| 44739 | 0, // x8sub_7_then_sub_32 |
| 44740 | 0, // x8sub_7_then_sub_32_hi |
| 44741 | 0, // x8sub_6_then_sub_32 |
| 44742 | 0, // x8sub_6_then_sub_32_hi |
| 44743 | 0, // x8sub_5_then_sub_32 |
| 44744 | 0, // x8sub_5_then_sub_32_hi |
| 44745 | 0, // x8sub_4_then_sub_32 |
| 44746 | 0, // x8sub_4_then_sub_32_hi |
| 44747 | 0, // x8sub_3_then_sub_32 |
| 44748 | 0, // x8sub_3_then_sub_32_hi |
| 44749 | 0, // x8sub_2_then_sub_32 |
| 44750 | 0, // x8sub_2_then_sub_32_hi |
| 44751 | 0, // x8sub_1_then_sub_32 |
| 44752 | 0, // x8sub_1_then_sub_32_hi |
| 44753 | 91, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44754 | 91, // subo64_then_sub_32_hi -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44755 | 0, // zsub1_then_zsub_hi |
| 44756 | 0, // zsub3_then_zsub_hi |
| 44757 | 0, // zsub2_then_zsub_hi |
| 44758 | 0, // dsub0_dsub1 |
| 44759 | 0, // dsub0_dsub1_dsub2 |
| 44760 | 0, // dsub1_dsub2 |
| 44761 | 0, // dsub1_dsub2_dsub3 |
| 44762 | 0, // dsub2_dsub3 |
| 44763 | 0, // dsub_dsub1 |
| 44764 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44765 | 0, // dsub_dsub1_dsub2 |
| 44766 | 0, // qsub0_qsub1 |
| 44767 | 0, // qsub0_qsub1_qsub2 |
| 44768 | 0, // qsub1_qsub2 |
| 44769 | 0, // qsub1_qsub2_qsub3 |
| 44770 | 0, // qsub2_qsub3 |
| 44771 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44772 | 0, // x8sub_0_x8sub_1 |
| 44773 | 0, // x8sub_2_x8sub_3 |
| 44774 | 0, // x8sub_4_x8sub_5 |
| 44775 | 0, // x8sub_6_x8sub_7 |
| 44776 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44777 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44778 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44779 | 91, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 44780 | 0, // zsub_qsub1 |
| 44781 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44782 | 0, // zsub_qsub1_qsub2 |
| 44783 | 0, // zsub0_zsub1 |
| 44784 | 0, // zsub0_zsub1_zsub2 |
| 44785 | 0, // zsub1_zsub2 |
| 44786 | 0, // zsub1_zsub2_zsub3 |
| 44787 | 0, // zsub2_zsub3 |
| 44788 | 0, // zsub0_zsub2 |
| 44789 | 0, // zsub1_zsub3 |
| 44790 | }, |
| 44791 | { // FPR128 |
| 44792 | 92, // bsub -> FPR128 |
| 44793 | 92, // bsub_hi -> FPR128 |
| 44794 | 92, // dsub -> FPR128 |
| 44795 | 0, // dsub0 |
| 44796 | 0, // dsub1 |
| 44797 | 0, // dsub2 |
| 44798 | 0, // dsub3 |
| 44799 | 92, // dsub_hi -> FPR128 |
| 44800 | 92, // hsub -> FPR128 |
| 44801 | 92, // hsub_hi -> FPR128 |
| 44802 | 0, // psub |
| 44803 | 0, // psub0 |
| 44804 | 0, // psub1 |
| 44805 | 0, // qsub0 |
| 44806 | 0, // qsub1 |
| 44807 | 0, // qsub2 |
| 44808 | 0, // qsub3 |
| 44809 | 92, // ssub -> FPR128 |
| 44810 | 92, // ssub_hi -> FPR128 |
| 44811 | 0, // sub_32 |
| 44812 | 0, // sub_32_hi |
| 44813 | 0, // sube32 |
| 44814 | 0, // sube64 |
| 44815 | 0, // subo32 |
| 44816 | 0, // subo64 |
| 44817 | 0, // x8sub_0 |
| 44818 | 0, // x8sub_1 |
| 44819 | 0, // x8sub_2 |
| 44820 | 0, // x8sub_3 |
| 44821 | 0, // x8sub_4 |
| 44822 | 0, // x8sub_5 |
| 44823 | 0, // x8sub_6 |
| 44824 | 0, // x8sub_7 |
| 44825 | 0, // zasubb |
| 44826 | 0, // zasubd0 |
| 44827 | 0, // zasubd1 |
| 44828 | 0, // zasubh0 |
| 44829 | 0, // zasubh1 |
| 44830 | 0, // zasubq0 |
| 44831 | 0, // zasubq1 |
| 44832 | 0, // zasubs0 |
| 44833 | 0, // zasubs1 |
| 44834 | 0, // zsub |
| 44835 | 0, // zsub0 |
| 44836 | 0, // zsub1 |
| 44837 | 0, // zsub2 |
| 44838 | 0, // zsub3 |
| 44839 | 0, // zsub_hi |
| 44840 | 0, // zasubd1_then_zasubq0 |
| 44841 | 0, // zasubd1_then_zasubq1 |
| 44842 | 0, // zasubs1_then_zasubd0 |
| 44843 | 0, // zasubs1_then_zasubd1 |
| 44844 | 0, // zasubs1_then_zasubq0 |
| 44845 | 0, // zasubs1_then_zasubq1 |
| 44846 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44847 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44848 | 0, // zasubh1_then_zasubd0 |
| 44849 | 0, // zasubh1_then_zasubd1 |
| 44850 | 0, // zasubh1_then_zasubq0 |
| 44851 | 0, // zasubh1_then_zasubq1 |
| 44852 | 0, // zasubh1_then_zasubs0 |
| 44853 | 0, // zasubh1_then_zasubs1 |
| 44854 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 44855 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 44856 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 44857 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 44858 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 44859 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 44860 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 44861 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 44862 | 0, // dsub1_then_bsub |
| 44863 | 0, // dsub1_then_bsub_hi |
| 44864 | 0, // dsub1_then_hsub |
| 44865 | 0, // dsub1_then_hsub_hi |
| 44866 | 0, // dsub1_then_ssub |
| 44867 | 0, // dsub1_then_ssub_hi |
| 44868 | 0, // dsub3_then_bsub |
| 44869 | 0, // dsub3_then_bsub_hi |
| 44870 | 0, // dsub3_then_hsub |
| 44871 | 0, // dsub3_then_hsub_hi |
| 44872 | 0, // dsub3_then_ssub |
| 44873 | 0, // dsub3_then_ssub_hi |
| 44874 | 0, // dsub2_then_bsub |
| 44875 | 0, // dsub2_then_bsub_hi |
| 44876 | 0, // dsub2_then_hsub |
| 44877 | 0, // dsub2_then_hsub_hi |
| 44878 | 0, // dsub2_then_ssub |
| 44879 | 0, // dsub2_then_ssub_hi |
| 44880 | 0, // psub1_then_psub |
| 44881 | 0, // qsub1_then_dsub_hi |
| 44882 | 0, // qsub3_then_dsub_hi |
| 44883 | 0, // qsub2_then_dsub_hi |
| 44884 | 0, // x8sub_7_then_sub_32 |
| 44885 | 0, // x8sub_7_then_sub_32_hi |
| 44886 | 0, // x8sub_6_then_sub_32 |
| 44887 | 0, // x8sub_6_then_sub_32_hi |
| 44888 | 0, // x8sub_5_then_sub_32 |
| 44889 | 0, // x8sub_5_then_sub_32_hi |
| 44890 | 0, // x8sub_4_then_sub_32 |
| 44891 | 0, // x8sub_4_then_sub_32_hi |
| 44892 | 0, // x8sub_3_then_sub_32 |
| 44893 | 0, // x8sub_3_then_sub_32_hi |
| 44894 | 0, // x8sub_2_then_sub_32 |
| 44895 | 0, // x8sub_2_then_sub_32_hi |
| 44896 | 0, // x8sub_1_then_sub_32 |
| 44897 | 0, // x8sub_1_then_sub_32_hi |
| 44898 | 0, // subo64_then_sub_32 |
| 44899 | 0, // subo64_then_sub_32_hi |
| 44900 | 0, // zsub1_then_zsub_hi |
| 44901 | 0, // zsub3_then_zsub_hi |
| 44902 | 0, // zsub2_then_zsub_hi |
| 44903 | 0, // dsub0_dsub1 |
| 44904 | 0, // dsub0_dsub1_dsub2 |
| 44905 | 0, // dsub1_dsub2 |
| 44906 | 0, // dsub1_dsub2_dsub3 |
| 44907 | 0, // dsub2_dsub3 |
| 44908 | 0, // dsub_dsub1 |
| 44909 | 0, // dsub_dsub1_dsub2_dsub3 |
| 44910 | 0, // dsub_dsub1_dsub2 |
| 44911 | 0, // qsub0_qsub1 |
| 44912 | 0, // qsub0_qsub1_qsub2 |
| 44913 | 0, // qsub1_qsub2 |
| 44914 | 0, // qsub1_qsub2_qsub3 |
| 44915 | 0, // qsub2_qsub3 |
| 44916 | 0, // sub_32_x8sub_1_then_sub_32 |
| 44917 | 0, // x8sub_0_x8sub_1 |
| 44918 | 0, // x8sub_2_x8sub_3 |
| 44919 | 0, // x8sub_4_x8sub_5 |
| 44920 | 0, // x8sub_6_x8sub_7 |
| 44921 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 44922 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 44923 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 44924 | 0, // sub_32_subo64_then_sub_32 |
| 44925 | 0, // zsub_qsub1 |
| 44926 | 0, // zsub_qsub1_qsub2_qsub3 |
| 44927 | 0, // zsub_qsub1_qsub2 |
| 44928 | 0, // zsub0_zsub1 |
| 44929 | 0, // zsub0_zsub1_zsub2 |
| 44930 | 0, // zsub1_zsub2 |
| 44931 | 0, // zsub1_zsub2_zsub3 |
| 44932 | 0, // zsub2_zsub3 |
| 44933 | 0, // zsub0_zsub2 |
| 44934 | 0, // zsub1_zsub3 |
| 44935 | }, |
| 44936 | { // ZPR |
| 44937 | 93, // bsub -> ZPR |
| 44938 | 93, // bsub_hi -> ZPR |
| 44939 | 93, // dsub -> ZPR |
| 44940 | 0, // dsub0 |
| 44941 | 0, // dsub1 |
| 44942 | 0, // dsub2 |
| 44943 | 0, // dsub3 |
| 44944 | 93, // dsub_hi -> ZPR |
| 44945 | 93, // hsub -> ZPR |
| 44946 | 93, // hsub_hi -> ZPR |
| 44947 | 0, // psub |
| 44948 | 0, // psub0 |
| 44949 | 0, // psub1 |
| 44950 | 0, // qsub0 |
| 44951 | 0, // qsub1 |
| 44952 | 0, // qsub2 |
| 44953 | 0, // qsub3 |
| 44954 | 93, // ssub -> ZPR |
| 44955 | 93, // ssub_hi -> ZPR |
| 44956 | 0, // sub_32 |
| 44957 | 0, // sub_32_hi |
| 44958 | 0, // sube32 |
| 44959 | 0, // sube64 |
| 44960 | 0, // subo32 |
| 44961 | 0, // subo64 |
| 44962 | 0, // x8sub_0 |
| 44963 | 0, // x8sub_1 |
| 44964 | 0, // x8sub_2 |
| 44965 | 0, // x8sub_3 |
| 44966 | 0, // x8sub_4 |
| 44967 | 0, // x8sub_5 |
| 44968 | 0, // x8sub_6 |
| 44969 | 0, // x8sub_7 |
| 44970 | 0, // zasubb |
| 44971 | 0, // zasubd0 |
| 44972 | 0, // zasubd1 |
| 44973 | 0, // zasubh0 |
| 44974 | 0, // zasubh1 |
| 44975 | 0, // zasubq0 |
| 44976 | 0, // zasubq1 |
| 44977 | 0, // zasubs0 |
| 44978 | 0, // zasubs1 |
| 44979 | 93, // zsub -> ZPR |
| 44980 | 0, // zsub0 |
| 44981 | 0, // zsub1 |
| 44982 | 0, // zsub2 |
| 44983 | 0, // zsub3 |
| 44984 | 93, // zsub_hi -> ZPR |
| 44985 | 0, // zasubd1_then_zasubq0 |
| 44986 | 0, // zasubd1_then_zasubq1 |
| 44987 | 0, // zasubs1_then_zasubd0 |
| 44988 | 0, // zasubs1_then_zasubd1 |
| 44989 | 0, // zasubs1_then_zasubq0 |
| 44990 | 0, // zasubs1_then_zasubq1 |
| 44991 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 44992 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 44993 | 0, // zasubh1_then_zasubd0 |
| 44994 | 0, // zasubh1_then_zasubd1 |
| 44995 | 0, // zasubh1_then_zasubq0 |
| 44996 | 0, // zasubh1_then_zasubq1 |
| 44997 | 0, // zasubh1_then_zasubs0 |
| 44998 | 0, // zasubh1_then_zasubs1 |
| 44999 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45000 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45001 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45002 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45003 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45004 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45005 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45006 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45007 | 0, // dsub1_then_bsub |
| 45008 | 0, // dsub1_then_bsub_hi |
| 45009 | 0, // dsub1_then_hsub |
| 45010 | 0, // dsub1_then_hsub_hi |
| 45011 | 0, // dsub1_then_ssub |
| 45012 | 0, // dsub1_then_ssub_hi |
| 45013 | 0, // dsub3_then_bsub |
| 45014 | 0, // dsub3_then_bsub_hi |
| 45015 | 0, // dsub3_then_hsub |
| 45016 | 0, // dsub3_then_hsub_hi |
| 45017 | 0, // dsub3_then_ssub |
| 45018 | 0, // dsub3_then_ssub_hi |
| 45019 | 0, // dsub2_then_bsub |
| 45020 | 0, // dsub2_then_bsub_hi |
| 45021 | 0, // dsub2_then_hsub |
| 45022 | 0, // dsub2_then_hsub_hi |
| 45023 | 0, // dsub2_then_ssub |
| 45024 | 0, // dsub2_then_ssub_hi |
| 45025 | 0, // psub1_then_psub |
| 45026 | 0, // qsub1_then_dsub_hi |
| 45027 | 0, // qsub3_then_dsub_hi |
| 45028 | 0, // qsub2_then_dsub_hi |
| 45029 | 0, // x8sub_7_then_sub_32 |
| 45030 | 0, // x8sub_7_then_sub_32_hi |
| 45031 | 0, // x8sub_6_then_sub_32 |
| 45032 | 0, // x8sub_6_then_sub_32_hi |
| 45033 | 0, // x8sub_5_then_sub_32 |
| 45034 | 0, // x8sub_5_then_sub_32_hi |
| 45035 | 0, // x8sub_4_then_sub_32 |
| 45036 | 0, // x8sub_4_then_sub_32_hi |
| 45037 | 0, // x8sub_3_then_sub_32 |
| 45038 | 0, // x8sub_3_then_sub_32_hi |
| 45039 | 0, // x8sub_2_then_sub_32 |
| 45040 | 0, // x8sub_2_then_sub_32_hi |
| 45041 | 0, // x8sub_1_then_sub_32 |
| 45042 | 0, // x8sub_1_then_sub_32_hi |
| 45043 | 0, // subo64_then_sub_32 |
| 45044 | 0, // subo64_then_sub_32_hi |
| 45045 | 0, // zsub1_then_zsub_hi |
| 45046 | 0, // zsub3_then_zsub_hi |
| 45047 | 0, // zsub2_then_zsub_hi |
| 45048 | 0, // dsub0_dsub1 |
| 45049 | 0, // dsub0_dsub1_dsub2 |
| 45050 | 0, // dsub1_dsub2 |
| 45051 | 0, // dsub1_dsub2_dsub3 |
| 45052 | 0, // dsub2_dsub3 |
| 45053 | 0, // dsub_dsub1 |
| 45054 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45055 | 0, // dsub_dsub1_dsub2 |
| 45056 | 0, // qsub0_qsub1 |
| 45057 | 0, // qsub0_qsub1_qsub2 |
| 45058 | 0, // qsub1_qsub2 |
| 45059 | 0, // qsub1_qsub2_qsub3 |
| 45060 | 0, // qsub2_qsub3 |
| 45061 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45062 | 0, // x8sub_0_x8sub_1 |
| 45063 | 0, // x8sub_2_x8sub_3 |
| 45064 | 0, // x8sub_4_x8sub_5 |
| 45065 | 0, // x8sub_6_x8sub_7 |
| 45066 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45067 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45068 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45069 | 0, // sub_32_subo64_then_sub_32 |
| 45070 | 0, // zsub_qsub1 |
| 45071 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45072 | 0, // zsub_qsub1_qsub2 |
| 45073 | 0, // zsub0_zsub1 |
| 45074 | 0, // zsub0_zsub1_zsub2 |
| 45075 | 0, // zsub1_zsub2 |
| 45076 | 0, // zsub1_zsub2_zsub3 |
| 45077 | 0, // zsub2_zsub3 |
| 45078 | 0, // zsub0_zsub2 |
| 45079 | 0, // zsub1_zsub3 |
| 45080 | }, |
| 45081 | { // FPR128_lo |
| 45082 | 94, // bsub -> FPR128_lo |
| 45083 | 94, // bsub_hi -> FPR128_lo |
| 45084 | 94, // dsub -> FPR128_lo |
| 45085 | 0, // dsub0 |
| 45086 | 0, // dsub1 |
| 45087 | 0, // dsub2 |
| 45088 | 0, // dsub3 |
| 45089 | 94, // dsub_hi -> FPR128_lo |
| 45090 | 94, // hsub -> FPR128_lo |
| 45091 | 94, // hsub_hi -> FPR128_lo |
| 45092 | 0, // psub |
| 45093 | 0, // psub0 |
| 45094 | 0, // psub1 |
| 45095 | 0, // qsub0 |
| 45096 | 0, // qsub1 |
| 45097 | 0, // qsub2 |
| 45098 | 0, // qsub3 |
| 45099 | 94, // ssub -> FPR128_lo |
| 45100 | 94, // ssub_hi -> FPR128_lo |
| 45101 | 0, // sub_32 |
| 45102 | 0, // sub_32_hi |
| 45103 | 0, // sube32 |
| 45104 | 0, // sube64 |
| 45105 | 0, // subo32 |
| 45106 | 0, // subo64 |
| 45107 | 0, // x8sub_0 |
| 45108 | 0, // x8sub_1 |
| 45109 | 0, // x8sub_2 |
| 45110 | 0, // x8sub_3 |
| 45111 | 0, // x8sub_4 |
| 45112 | 0, // x8sub_5 |
| 45113 | 0, // x8sub_6 |
| 45114 | 0, // x8sub_7 |
| 45115 | 0, // zasubb |
| 45116 | 0, // zasubd0 |
| 45117 | 0, // zasubd1 |
| 45118 | 0, // zasubh0 |
| 45119 | 0, // zasubh1 |
| 45120 | 0, // zasubq0 |
| 45121 | 0, // zasubq1 |
| 45122 | 0, // zasubs0 |
| 45123 | 0, // zasubs1 |
| 45124 | 0, // zsub |
| 45125 | 0, // zsub0 |
| 45126 | 0, // zsub1 |
| 45127 | 0, // zsub2 |
| 45128 | 0, // zsub3 |
| 45129 | 0, // zsub_hi |
| 45130 | 0, // zasubd1_then_zasubq0 |
| 45131 | 0, // zasubd1_then_zasubq1 |
| 45132 | 0, // zasubs1_then_zasubd0 |
| 45133 | 0, // zasubs1_then_zasubd1 |
| 45134 | 0, // zasubs1_then_zasubq0 |
| 45135 | 0, // zasubs1_then_zasubq1 |
| 45136 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45137 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45138 | 0, // zasubh1_then_zasubd0 |
| 45139 | 0, // zasubh1_then_zasubd1 |
| 45140 | 0, // zasubh1_then_zasubq0 |
| 45141 | 0, // zasubh1_then_zasubq1 |
| 45142 | 0, // zasubh1_then_zasubs0 |
| 45143 | 0, // zasubh1_then_zasubs1 |
| 45144 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45145 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45146 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45147 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45148 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45149 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45150 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45151 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45152 | 0, // dsub1_then_bsub |
| 45153 | 0, // dsub1_then_bsub_hi |
| 45154 | 0, // dsub1_then_hsub |
| 45155 | 0, // dsub1_then_hsub_hi |
| 45156 | 0, // dsub1_then_ssub |
| 45157 | 0, // dsub1_then_ssub_hi |
| 45158 | 0, // dsub3_then_bsub |
| 45159 | 0, // dsub3_then_bsub_hi |
| 45160 | 0, // dsub3_then_hsub |
| 45161 | 0, // dsub3_then_hsub_hi |
| 45162 | 0, // dsub3_then_ssub |
| 45163 | 0, // dsub3_then_ssub_hi |
| 45164 | 0, // dsub2_then_bsub |
| 45165 | 0, // dsub2_then_bsub_hi |
| 45166 | 0, // dsub2_then_hsub |
| 45167 | 0, // dsub2_then_hsub_hi |
| 45168 | 0, // dsub2_then_ssub |
| 45169 | 0, // dsub2_then_ssub_hi |
| 45170 | 0, // psub1_then_psub |
| 45171 | 0, // qsub1_then_dsub_hi |
| 45172 | 0, // qsub3_then_dsub_hi |
| 45173 | 0, // qsub2_then_dsub_hi |
| 45174 | 0, // x8sub_7_then_sub_32 |
| 45175 | 0, // x8sub_7_then_sub_32_hi |
| 45176 | 0, // x8sub_6_then_sub_32 |
| 45177 | 0, // x8sub_6_then_sub_32_hi |
| 45178 | 0, // x8sub_5_then_sub_32 |
| 45179 | 0, // x8sub_5_then_sub_32_hi |
| 45180 | 0, // x8sub_4_then_sub_32 |
| 45181 | 0, // x8sub_4_then_sub_32_hi |
| 45182 | 0, // x8sub_3_then_sub_32 |
| 45183 | 0, // x8sub_3_then_sub_32_hi |
| 45184 | 0, // x8sub_2_then_sub_32 |
| 45185 | 0, // x8sub_2_then_sub_32_hi |
| 45186 | 0, // x8sub_1_then_sub_32 |
| 45187 | 0, // x8sub_1_then_sub_32_hi |
| 45188 | 0, // subo64_then_sub_32 |
| 45189 | 0, // subo64_then_sub_32_hi |
| 45190 | 0, // zsub1_then_zsub_hi |
| 45191 | 0, // zsub3_then_zsub_hi |
| 45192 | 0, // zsub2_then_zsub_hi |
| 45193 | 0, // dsub0_dsub1 |
| 45194 | 0, // dsub0_dsub1_dsub2 |
| 45195 | 0, // dsub1_dsub2 |
| 45196 | 0, // dsub1_dsub2_dsub3 |
| 45197 | 0, // dsub2_dsub3 |
| 45198 | 0, // dsub_dsub1 |
| 45199 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45200 | 0, // dsub_dsub1_dsub2 |
| 45201 | 0, // qsub0_qsub1 |
| 45202 | 0, // qsub0_qsub1_qsub2 |
| 45203 | 0, // qsub1_qsub2 |
| 45204 | 0, // qsub1_qsub2_qsub3 |
| 45205 | 0, // qsub2_qsub3 |
| 45206 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45207 | 0, // x8sub_0_x8sub_1 |
| 45208 | 0, // x8sub_2_x8sub_3 |
| 45209 | 0, // x8sub_4_x8sub_5 |
| 45210 | 0, // x8sub_6_x8sub_7 |
| 45211 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45212 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45213 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45214 | 0, // sub_32_subo64_then_sub_32 |
| 45215 | 0, // zsub_qsub1 |
| 45216 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45217 | 0, // zsub_qsub1_qsub2 |
| 45218 | 0, // zsub0_zsub1 |
| 45219 | 0, // zsub0_zsub1_zsub2 |
| 45220 | 0, // zsub1_zsub2 |
| 45221 | 0, // zsub1_zsub2_zsub3 |
| 45222 | 0, // zsub2_zsub3 |
| 45223 | 0, // zsub0_zsub2 |
| 45224 | 0, // zsub1_zsub3 |
| 45225 | }, |
| 45226 | { // MPR128 |
| 45227 | 0, // bsub |
| 45228 | 0, // bsub_hi |
| 45229 | 0, // dsub |
| 45230 | 0, // dsub0 |
| 45231 | 0, // dsub1 |
| 45232 | 0, // dsub2 |
| 45233 | 0, // dsub3 |
| 45234 | 0, // dsub_hi |
| 45235 | 0, // hsub |
| 45236 | 0, // hsub_hi |
| 45237 | 0, // psub |
| 45238 | 0, // psub0 |
| 45239 | 0, // psub1 |
| 45240 | 0, // qsub0 |
| 45241 | 0, // qsub1 |
| 45242 | 0, // qsub2 |
| 45243 | 0, // qsub3 |
| 45244 | 0, // ssub |
| 45245 | 0, // ssub_hi |
| 45246 | 0, // sub_32 |
| 45247 | 0, // sub_32_hi |
| 45248 | 0, // sube32 |
| 45249 | 0, // sube64 |
| 45250 | 0, // subo32 |
| 45251 | 0, // subo64 |
| 45252 | 0, // x8sub_0 |
| 45253 | 0, // x8sub_1 |
| 45254 | 0, // x8sub_2 |
| 45255 | 0, // x8sub_3 |
| 45256 | 0, // x8sub_4 |
| 45257 | 0, // x8sub_5 |
| 45258 | 0, // x8sub_6 |
| 45259 | 0, // x8sub_7 |
| 45260 | 0, // zasubb |
| 45261 | 0, // zasubd0 |
| 45262 | 0, // zasubd1 |
| 45263 | 0, // zasubh0 |
| 45264 | 0, // zasubh1 |
| 45265 | 0, // zasubq0 |
| 45266 | 0, // zasubq1 |
| 45267 | 0, // zasubs0 |
| 45268 | 0, // zasubs1 |
| 45269 | 0, // zsub |
| 45270 | 0, // zsub0 |
| 45271 | 0, // zsub1 |
| 45272 | 0, // zsub2 |
| 45273 | 0, // zsub3 |
| 45274 | 0, // zsub_hi |
| 45275 | 0, // zasubd1_then_zasubq0 |
| 45276 | 0, // zasubd1_then_zasubq1 |
| 45277 | 0, // zasubs1_then_zasubd0 |
| 45278 | 0, // zasubs1_then_zasubd1 |
| 45279 | 0, // zasubs1_then_zasubq0 |
| 45280 | 0, // zasubs1_then_zasubq1 |
| 45281 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45282 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45283 | 0, // zasubh1_then_zasubd0 |
| 45284 | 0, // zasubh1_then_zasubd1 |
| 45285 | 0, // zasubh1_then_zasubq0 |
| 45286 | 0, // zasubh1_then_zasubq1 |
| 45287 | 0, // zasubh1_then_zasubs0 |
| 45288 | 0, // zasubh1_then_zasubs1 |
| 45289 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45290 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45291 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45292 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45293 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45294 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45295 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45296 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45297 | 0, // dsub1_then_bsub |
| 45298 | 0, // dsub1_then_bsub_hi |
| 45299 | 0, // dsub1_then_hsub |
| 45300 | 0, // dsub1_then_hsub_hi |
| 45301 | 0, // dsub1_then_ssub |
| 45302 | 0, // dsub1_then_ssub_hi |
| 45303 | 0, // dsub3_then_bsub |
| 45304 | 0, // dsub3_then_bsub_hi |
| 45305 | 0, // dsub3_then_hsub |
| 45306 | 0, // dsub3_then_hsub_hi |
| 45307 | 0, // dsub3_then_ssub |
| 45308 | 0, // dsub3_then_ssub_hi |
| 45309 | 0, // dsub2_then_bsub |
| 45310 | 0, // dsub2_then_bsub_hi |
| 45311 | 0, // dsub2_then_hsub |
| 45312 | 0, // dsub2_then_hsub_hi |
| 45313 | 0, // dsub2_then_ssub |
| 45314 | 0, // dsub2_then_ssub_hi |
| 45315 | 0, // psub1_then_psub |
| 45316 | 0, // qsub1_then_dsub_hi |
| 45317 | 0, // qsub3_then_dsub_hi |
| 45318 | 0, // qsub2_then_dsub_hi |
| 45319 | 0, // x8sub_7_then_sub_32 |
| 45320 | 0, // x8sub_7_then_sub_32_hi |
| 45321 | 0, // x8sub_6_then_sub_32 |
| 45322 | 0, // x8sub_6_then_sub_32_hi |
| 45323 | 0, // x8sub_5_then_sub_32 |
| 45324 | 0, // x8sub_5_then_sub_32_hi |
| 45325 | 0, // x8sub_4_then_sub_32 |
| 45326 | 0, // x8sub_4_then_sub_32_hi |
| 45327 | 0, // x8sub_3_then_sub_32 |
| 45328 | 0, // x8sub_3_then_sub_32_hi |
| 45329 | 0, // x8sub_2_then_sub_32 |
| 45330 | 0, // x8sub_2_then_sub_32_hi |
| 45331 | 0, // x8sub_1_then_sub_32 |
| 45332 | 0, // x8sub_1_then_sub_32_hi |
| 45333 | 0, // subo64_then_sub_32 |
| 45334 | 0, // subo64_then_sub_32_hi |
| 45335 | 0, // zsub1_then_zsub_hi |
| 45336 | 0, // zsub3_then_zsub_hi |
| 45337 | 0, // zsub2_then_zsub_hi |
| 45338 | 0, // dsub0_dsub1 |
| 45339 | 0, // dsub0_dsub1_dsub2 |
| 45340 | 0, // dsub1_dsub2 |
| 45341 | 0, // dsub1_dsub2_dsub3 |
| 45342 | 0, // dsub2_dsub3 |
| 45343 | 0, // dsub_dsub1 |
| 45344 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45345 | 0, // dsub_dsub1_dsub2 |
| 45346 | 0, // qsub0_qsub1 |
| 45347 | 0, // qsub0_qsub1_qsub2 |
| 45348 | 0, // qsub1_qsub2 |
| 45349 | 0, // qsub1_qsub2_qsub3 |
| 45350 | 0, // qsub2_qsub3 |
| 45351 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45352 | 0, // x8sub_0_x8sub_1 |
| 45353 | 0, // x8sub_2_x8sub_3 |
| 45354 | 0, // x8sub_4_x8sub_5 |
| 45355 | 0, // x8sub_6_x8sub_7 |
| 45356 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45357 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45358 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45359 | 0, // sub_32_subo64_then_sub_32 |
| 45360 | 0, // zsub_qsub1 |
| 45361 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45362 | 0, // zsub_qsub1_qsub2 |
| 45363 | 0, // zsub0_zsub1 |
| 45364 | 0, // zsub0_zsub1_zsub2 |
| 45365 | 0, // zsub1_zsub2 |
| 45366 | 0, // zsub1_zsub2_zsub3 |
| 45367 | 0, // zsub2_zsub3 |
| 45368 | 0, // zsub0_zsub2 |
| 45369 | 0, // zsub1_zsub3 |
| 45370 | }, |
| 45371 | { // ZPRMul2 |
| 45372 | 96, // bsub -> ZPRMul2 |
| 45373 | 96, // bsub_hi -> ZPRMul2 |
| 45374 | 96, // dsub -> ZPRMul2 |
| 45375 | 0, // dsub0 |
| 45376 | 0, // dsub1 |
| 45377 | 0, // dsub2 |
| 45378 | 0, // dsub3 |
| 45379 | 96, // dsub_hi -> ZPRMul2 |
| 45380 | 96, // hsub -> ZPRMul2 |
| 45381 | 96, // hsub_hi -> ZPRMul2 |
| 45382 | 0, // psub |
| 45383 | 0, // psub0 |
| 45384 | 0, // psub1 |
| 45385 | 0, // qsub0 |
| 45386 | 0, // qsub1 |
| 45387 | 0, // qsub2 |
| 45388 | 0, // qsub3 |
| 45389 | 96, // ssub -> ZPRMul2 |
| 45390 | 96, // ssub_hi -> ZPRMul2 |
| 45391 | 0, // sub_32 |
| 45392 | 0, // sub_32_hi |
| 45393 | 0, // sube32 |
| 45394 | 0, // sube64 |
| 45395 | 0, // subo32 |
| 45396 | 0, // subo64 |
| 45397 | 0, // x8sub_0 |
| 45398 | 0, // x8sub_1 |
| 45399 | 0, // x8sub_2 |
| 45400 | 0, // x8sub_3 |
| 45401 | 0, // x8sub_4 |
| 45402 | 0, // x8sub_5 |
| 45403 | 0, // x8sub_6 |
| 45404 | 0, // x8sub_7 |
| 45405 | 0, // zasubb |
| 45406 | 0, // zasubd0 |
| 45407 | 0, // zasubd1 |
| 45408 | 0, // zasubh0 |
| 45409 | 0, // zasubh1 |
| 45410 | 0, // zasubq0 |
| 45411 | 0, // zasubq1 |
| 45412 | 0, // zasubs0 |
| 45413 | 0, // zasubs1 |
| 45414 | 96, // zsub -> ZPRMul2 |
| 45415 | 0, // zsub0 |
| 45416 | 0, // zsub1 |
| 45417 | 0, // zsub2 |
| 45418 | 0, // zsub3 |
| 45419 | 96, // zsub_hi -> ZPRMul2 |
| 45420 | 0, // zasubd1_then_zasubq0 |
| 45421 | 0, // zasubd1_then_zasubq1 |
| 45422 | 0, // zasubs1_then_zasubd0 |
| 45423 | 0, // zasubs1_then_zasubd1 |
| 45424 | 0, // zasubs1_then_zasubq0 |
| 45425 | 0, // zasubs1_then_zasubq1 |
| 45426 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45427 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45428 | 0, // zasubh1_then_zasubd0 |
| 45429 | 0, // zasubh1_then_zasubd1 |
| 45430 | 0, // zasubh1_then_zasubq0 |
| 45431 | 0, // zasubh1_then_zasubq1 |
| 45432 | 0, // zasubh1_then_zasubs0 |
| 45433 | 0, // zasubh1_then_zasubs1 |
| 45434 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45435 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45436 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45437 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45438 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45439 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45440 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45441 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45442 | 0, // dsub1_then_bsub |
| 45443 | 0, // dsub1_then_bsub_hi |
| 45444 | 0, // dsub1_then_hsub |
| 45445 | 0, // dsub1_then_hsub_hi |
| 45446 | 0, // dsub1_then_ssub |
| 45447 | 0, // dsub1_then_ssub_hi |
| 45448 | 0, // dsub3_then_bsub |
| 45449 | 0, // dsub3_then_bsub_hi |
| 45450 | 0, // dsub3_then_hsub |
| 45451 | 0, // dsub3_then_hsub_hi |
| 45452 | 0, // dsub3_then_ssub |
| 45453 | 0, // dsub3_then_ssub_hi |
| 45454 | 0, // dsub2_then_bsub |
| 45455 | 0, // dsub2_then_bsub_hi |
| 45456 | 0, // dsub2_then_hsub |
| 45457 | 0, // dsub2_then_hsub_hi |
| 45458 | 0, // dsub2_then_ssub |
| 45459 | 0, // dsub2_then_ssub_hi |
| 45460 | 0, // psub1_then_psub |
| 45461 | 0, // qsub1_then_dsub_hi |
| 45462 | 0, // qsub3_then_dsub_hi |
| 45463 | 0, // qsub2_then_dsub_hi |
| 45464 | 0, // x8sub_7_then_sub_32 |
| 45465 | 0, // x8sub_7_then_sub_32_hi |
| 45466 | 0, // x8sub_6_then_sub_32 |
| 45467 | 0, // x8sub_6_then_sub_32_hi |
| 45468 | 0, // x8sub_5_then_sub_32 |
| 45469 | 0, // x8sub_5_then_sub_32_hi |
| 45470 | 0, // x8sub_4_then_sub_32 |
| 45471 | 0, // x8sub_4_then_sub_32_hi |
| 45472 | 0, // x8sub_3_then_sub_32 |
| 45473 | 0, // x8sub_3_then_sub_32_hi |
| 45474 | 0, // x8sub_2_then_sub_32 |
| 45475 | 0, // x8sub_2_then_sub_32_hi |
| 45476 | 0, // x8sub_1_then_sub_32 |
| 45477 | 0, // x8sub_1_then_sub_32_hi |
| 45478 | 0, // subo64_then_sub_32 |
| 45479 | 0, // subo64_then_sub_32_hi |
| 45480 | 0, // zsub1_then_zsub_hi |
| 45481 | 0, // zsub3_then_zsub_hi |
| 45482 | 0, // zsub2_then_zsub_hi |
| 45483 | 0, // dsub0_dsub1 |
| 45484 | 0, // dsub0_dsub1_dsub2 |
| 45485 | 0, // dsub1_dsub2 |
| 45486 | 0, // dsub1_dsub2_dsub3 |
| 45487 | 0, // dsub2_dsub3 |
| 45488 | 0, // dsub_dsub1 |
| 45489 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45490 | 0, // dsub_dsub1_dsub2 |
| 45491 | 0, // qsub0_qsub1 |
| 45492 | 0, // qsub0_qsub1_qsub2 |
| 45493 | 0, // qsub1_qsub2 |
| 45494 | 0, // qsub1_qsub2_qsub3 |
| 45495 | 0, // qsub2_qsub3 |
| 45496 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45497 | 0, // x8sub_0_x8sub_1 |
| 45498 | 0, // x8sub_2_x8sub_3 |
| 45499 | 0, // x8sub_4_x8sub_5 |
| 45500 | 0, // x8sub_6_x8sub_7 |
| 45501 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45502 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45503 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45504 | 0, // sub_32_subo64_then_sub_32 |
| 45505 | 0, // zsub_qsub1 |
| 45506 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45507 | 0, // zsub_qsub1_qsub2 |
| 45508 | 0, // zsub0_zsub1 |
| 45509 | 0, // zsub0_zsub1_zsub2 |
| 45510 | 0, // zsub1_zsub2 |
| 45511 | 0, // zsub1_zsub2_zsub3 |
| 45512 | 0, // zsub2_zsub3 |
| 45513 | 0, // zsub0_zsub2 |
| 45514 | 0, // zsub1_zsub3 |
| 45515 | }, |
| 45516 | { // ZPR_4b |
| 45517 | 97, // bsub -> ZPR_4b |
| 45518 | 97, // bsub_hi -> ZPR_4b |
| 45519 | 97, // dsub -> ZPR_4b |
| 45520 | 0, // dsub0 |
| 45521 | 0, // dsub1 |
| 45522 | 0, // dsub2 |
| 45523 | 0, // dsub3 |
| 45524 | 97, // dsub_hi -> ZPR_4b |
| 45525 | 97, // hsub -> ZPR_4b |
| 45526 | 97, // hsub_hi -> ZPR_4b |
| 45527 | 0, // psub |
| 45528 | 0, // psub0 |
| 45529 | 0, // psub1 |
| 45530 | 0, // qsub0 |
| 45531 | 0, // qsub1 |
| 45532 | 0, // qsub2 |
| 45533 | 0, // qsub3 |
| 45534 | 97, // ssub -> ZPR_4b |
| 45535 | 97, // ssub_hi -> ZPR_4b |
| 45536 | 0, // sub_32 |
| 45537 | 0, // sub_32_hi |
| 45538 | 0, // sube32 |
| 45539 | 0, // sube64 |
| 45540 | 0, // subo32 |
| 45541 | 0, // subo64 |
| 45542 | 0, // x8sub_0 |
| 45543 | 0, // x8sub_1 |
| 45544 | 0, // x8sub_2 |
| 45545 | 0, // x8sub_3 |
| 45546 | 0, // x8sub_4 |
| 45547 | 0, // x8sub_5 |
| 45548 | 0, // x8sub_6 |
| 45549 | 0, // x8sub_7 |
| 45550 | 0, // zasubb |
| 45551 | 0, // zasubd0 |
| 45552 | 0, // zasubd1 |
| 45553 | 0, // zasubh0 |
| 45554 | 0, // zasubh1 |
| 45555 | 0, // zasubq0 |
| 45556 | 0, // zasubq1 |
| 45557 | 0, // zasubs0 |
| 45558 | 0, // zasubs1 |
| 45559 | 97, // zsub -> ZPR_4b |
| 45560 | 0, // zsub0 |
| 45561 | 0, // zsub1 |
| 45562 | 0, // zsub2 |
| 45563 | 0, // zsub3 |
| 45564 | 97, // zsub_hi -> ZPR_4b |
| 45565 | 0, // zasubd1_then_zasubq0 |
| 45566 | 0, // zasubd1_then_zasubq1 |
| 45567 | 0, // zasubs1_then_zasubd0 |
| 45568 | 0, // zasubs1_then_zasubd1 |
| 45569 | 0, // zasubs1_then_zasubq0 |
| 45570 | 0, // zasubs1_then_zasubq1 |
| 45571 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45572 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45573 | 0, // zasubh1_then_zasubd0 |
| 45574 | 0, // zasubh1_then_zasubd1 |
| 45575 | 0, // zasubh1_then_zasubq0 |
| 45576 | 0, // zasubh1_then_zasubq1 |
| 45577 | 0, // zasubh1_then_zasubs0 |
| 45578 | 0, // zasubh1_then_zasubs1 |
| 45579 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45580 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45581 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45582 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45583 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45584 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45585 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45586 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45587 | 0, // dsub1_then_bsub |
| 45588 | 0, // dsub1_then_bsub_hi |
| 45589 | 0, // dsub1_then_hsub |
| 45590 | 0, // dsub1_then_hsub_hi |
| 45591 | 0, // dsub1_then_ssub |
| 45592 | 0, // dsub1_then_ssub_hi |
| 45593 | 0, // dsub3_then_bsub |
| 45594 | 0, // dsub3_then_bsub_hi |
| 45595 | 0, // dsub3_then_hsub |
| 45596 | 0, // dsub3_then_hsub_hi |
| 45597 | 0, // dsub3_then_ssub |
| 45598 | 0, // dsub3_then_ssub_hi |
| 45599 | 0, // dsub2_then_bsub |
| 45600 | 0, // dsub2_then_bsub_hi |
| 45601 | 0, // dsub2_then_hsub |
| 45602 | 0, // dsub2_then_hsub_hi |
| 45603 | 0, // dsub2_then_ssub |
| 45604 | 0, // dsub2_then_ssub_hi |
| 45605 | 0, // psub1_then_psub |
| 45606 | 0, // qsub1_then_dsub_hi |
| 45607 | 0, // qsub3_then_dsub_hi |
| 45608 | 0, // qsub2_then_dsub_hi |
| 45609 | 0, // x8sub_7_then_sub_32 |
| 45610 | 0, // x8sub_7_then_sub_32_hi |
| 45611 | 0, // x8sub_6_then_sub_32 |
| 45612 | 0, // x8sub_6_then_sub_32_hi |
| 45613 | 0, // x8sub_5_then_sub_32 |
| 45614 | 0, // x8sub_5_then_sub_32_hi |
| 45615 | 0, // x8sub_4_then_sub_32 |
| 45616 | 0, // x8sub_4_then_sub_32_hi |
| 45617 | 0, // x8sub_3_then_sub_32 |
| 45618 | 0, // x8sub_3_then_sub_32_hi |
| 45619 | 0, // x8sub_2_then_sub_32 |
| 45620 | 0, // x8sub_2_then_sub_32_hi |
| 45621 | 0, // x8sub_1_then_sub_32 |
| 45622 | 0, // x8sub_1_then_sub_32_hi |
| 45623 | 0, // subo64_then_sub_32 |
| 45624 | 0, // subo64_then_sub_32_hi |
| 45625 | 0, // zsub1_then_zsub_hi |
| 45626 | 0, // zsub3_then_zsub_hi |
| 45627 | 0, // zsub2_then_zsub_hi |
| 45628 | 0, // dsub0_dsub1 |
| 45629 | 0, // dsub0_dsub1_dsub2 |
| 45630 | 0, // dsub1_dsub2 |
| 45631 | 0, // dsub1_dsub2_dsub3 |
| 45632 | 0, // dsub2_dsub3 |
| 45633 | 0, // dsub_dsub1 |
| 45634 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45635 | 0, // dsub_dsub1_dsub2 |
| 45636 | 0, // qsub0_qsub1 |
| 45637 | 0, // qsub0_qsub1_qsub2 |
| 45638 | 0, // qsub1_qsub2 |
| 45639 | 0, // qsub1_qsub2_qsub3 |
| 45640 | 0, // qsub2_qsub3 |
| 45641 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45642 | 0, // x8sub_0_x8sub_1 |
| 45643 | 0, // x8sub_2_x8sub_3 |
| 45644 | 0, // x8sub_4_x8sub_5 |
| 45645 | 0, // x8sub_6_x8sub_7 |
| 45646 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45647 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45648 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45649 | 0, // sub_32_subo64_then_sub_32 |
| 45650 | 0, // zsub_qsub1 |
| 45651 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45652 | 0, // zsub_qsub1_qsub2 |
| 45653 | 0, // zsub0_zsub1 |
| 45654 | 0, // zsub0_zsub1_zsub2 |
| 45655 | 0, // zsub1_zsub2 |
| 45656 | 0, // zsub1_zsub2_zsub3 |
| 45657 | 0, // zsub2_zsub3 |
| 45658 | 0, // zsub0_zsub2 |
| 45659 | 0, // zsub1_zsub3 |
| 45660 | }, |
| 45661 | { // FPR128_0to7 |
| 45662 | 98, // bsub -> FPR128_0to7 |
| 45663 | 98, // bsub_hi -> FPR128_0to7 |
| 45664 | 98, // dsub -> FPR128_0to7 |
| 45665 | 0, // dsub0 |
| 45666 | 0, // dsub1 |
| 45667 | 0, // dsub2 |
| 45668 | 0, // dsub3 |
| 45669 | 98, // dsub_hi -> FPR128_0to7 |
| 45670 | 98, // hsub -> FPR128_0to7 |
| 45671 | 98, // hsub_hi -> FPR128_0to7 |
| 45672 | 0, // psub |
| 45673 | 0, // psub0 |
| 45674 | 0, // psub1 |
| 45675 | 0, // qsub0 |
| 45676 | 0, // qsub1 |
| 45677 | 0, // qsub2 |
| 45678 | 0, // qsub3 |
| 45679 | 98, // ssub -> FPR128_0to7 |
| 45680 | 98, // ssub_hi -> FPR128_0to7 |
| 45681 | 0, // sub_32 |
| 45682 | 0, // sub_32_hi |
| 45683 | 0, // sube32 |
| 45684 | 0, // sube64 |
| 45685 | 0, // subo32 |
| 45686 | 0, // subo64 |
| 45687 | 0, // x8sub_0 |
| 45688 | 0, // x8sub_1 |
| 45689 | 0, // x8sub_2 |
| 45690 | 0, // x8sub_3 |
| 45691 | 0, // x8sub_4 |
| 45692 | 0, // x8sub_5 |
| 45693 | 0, // x8sub_6 |
| 45694 | 0, // x8sub_7 |
| 45695 | 0, // zasubb |
| 45696 | 0, // zasubd0 |
| 45697 | 0, // zasubd1 |
| 45698 | 0, // zasubh0 |
| 45699 | 0, // zasubh1 |
| 45700 | 0, // zasubq0 |
| 45701 | 0, // zasubq1 |
| 45702 | 0, // zasubs0 |
| 45703 | 0, // zasubs1 |
| 45704 | 0, // zsub |
| 45705 | 0, // zsub0 |
| 45706 | 0, // zsub1 |
| 45707 | 0, // zsub2 |
| 45708 | 0, // zsub3 |
| 45709 | 0, // zsub_hi |
| 45710 | 0, // zasubd1_then_zasubq0 |
| 45711 | 0, // zasubd1_then_zasubq1 |
| 45712 | 0, // zasubs1_then_zasubd0 |
| 45713 | 0, // zasubs1_then_zasubd1 |
| 45714 | 0, // zasubs1_then_zasubq0 |
| 45715 | 0, // zasubs1_then_zasubq1 |
| 45716 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45717 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45718 | 0, // zasubh1_then_zasubd0 |
| 45719 | 0, // zasubh1_then_zasubd1 |
| 45720 | 0, // zasubh1_then_zasubq0 |
| 45721 | 0, // zasubh1_then_zasubq1 |
| 45722 | 0, // zasubh1_then_zasubs0 |
| 45723 | 0, // zasubh1_then_zasubs1 |
| 45724 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45725 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45726 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45727 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45728 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45729 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45730 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45731 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45732 | 0, // dsub1_then_bsub |
| 45733 | 0, // dsub1_then_bsub_hi |
| 45734 | 0, // dsub1_then_hsub |
| 45735 | 0, // dsub1_then_hsub_hi |
| 45736 | 0, // dsub1_then_ssub |
| 45737 | 0, // dsub1_then_ssub_hi |
| 45738 | 0, // dsub3_then_bsub |
| 45739 | 0, // dsub3_then_bsub_hi |
| 45740 | 0, // dsub3_then_hsub |
| 45741 | 0, // dsub3_then_hsub_hi |
| 45742 | 0, // dsub3_then_ssub |
| 45743 | 0, // dsub3_then_ssub_hi |
| 45744 | 0, // dsub2_then_bsub |
| 45745 | 0, // dsub2_then_bsub_hi |
| 45746 | 0, // dsub2_then_hsub |
| 45747 | 0, // dsub2_then_hsub_hi |
| 45748 | 0, // dsub2_then_ssub |
| 45749 | 0, // dsub2_then_ssub_hi |
| 45750 | 0, // psub1_then_psub |
| 45751 | 0, // qsub1_then_dsub_hi |
| 45752 | 0, // qsub3_then_dsub_hi |
| 45753 | 0, // qsub2_then_dsub_hi |
| 45754 | 0, // x8sub_7_then_sub_32 |
| 45755 | 0, // x8sub_7_then_sub_32_hi |
| 45756 | 0, // x8sub_6_then_sub_32 |
| 45757 | 0, // x8sub_6_then_sub_32_hi |
| 45758 | 0, // x8sub_5_then_sub_32 |
| 45759 | 0, // x8sub_5_then_sub_32_hi |
| 45760 | 0, // x8sub_4_then_sub_32 |
| 45761 | 0, // x8sub_4_then_sub_32_hi |
| 45762 | 0, // x8sub_3_then_sub_32 |
| 45763 | 0, // x8sub_3_then_sub_32_hi |
| 45764 | 0, // x8sub_2_then_sub_32 |
| 45765 | 0, // x8sub_2_then_sub_32_hi |
| 45766 | 0, // x8sub_1_then_sub_32 |
| 45767 | 0, // x8sub_1_then_sub_32_hi |
| 45768 | 0, // subo64_then_sub_32 |
| 45769 | 0, // subo64_then_sub_32_hi |
| 45770 | 0, // zsub1_then_zsub_hi |
| 45771 | 0, // zsub3_then_zsub_hi |
| 45772 | 0, // zsub2_then_zsub_hi |
| 45773 | 0, // dsub0_dsub1 |
| 45774 | 0, // dsub0_dsub1_dsub2 |
| 45775 | 0, // dsub1_dsub2 |
| 45776 | 0, // dsub1_dsub2_dsub3 |
| 45777 | 0, // dsub2_dsub3 |
| 45778 | 0, // dsub_dsub1 |
| 45779 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45780 | 0, // dsub_dsub1_dsub2 |
| 45781 | 0, // qsub0_qsub1 |
| 45782 | 0, // qsub0_qsub1_qsub2 |
| 45783 | 0, // qsub1_qsub2 |
| 45784 | 0, // qsub1_qsub2_qsub3 |
| 45785 | 0, // qsub2_qsub3 |
| 45786 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45787 | 0, // x8sub_0_x8sub_1 |
| 45788 | 0, // x8sub_2_x8sub_3 |
| 45789 | 0, // x8sub_4_x8sub_5 |
| 45790 | 0, // x8sub_6_x8sub_7 |
| 45791 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45792 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45793 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45794 | 0, // sub_32_subo64_then_sub_32 |
| 45795 | 0, // zsub_qsub1 |
| 45796 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45797 | 0, // zsub_qsub1_qsub2 |
| 45798 | 0, // zsub0_zsub1 |
| 45799 | 0, // zsub0_zsub1_zsub2 |
| 45800 | 0, // zsub1_zsub2 |
| 45801 | 0, // zsub1_zsub2_zsub3 |
| 45802 | 0, // zsub2_zsub3 |
| 45803 | 0, // zsub0_zsub2 |
| 45804 | 0, // zsub1_zsub3 |
| 45805 | }, |
| 45806 | { // ZPRMul2_Hi |
| 45807 | 99, // bsub -> ZPRMul2_Hi |
| 45808 | 99, // bsub_hi -> ZPRMul2_Hi |
| 45809 | 99, // dsub -> ZPRMul2_Hi |
| 45810 | 0, // dsub0 |
| 45811 | 0, // dsub1 |
| 45812 | 0, // dsub2 |
| 45813 | 0, // dsub3 |
| 45814 | 99, // dsub_hi -> ZPRMul2_Hi |
| 45815 | 99, // hsub -> ZPRMul2_Hi |
| 45816 | 99, // hsub_hi -> ZPRMul2_Hi |
| 45817 | 0, // psub |
| 45818 | 0, // psub0 |
| 45819 | 0, // psub1 |
| 45820 | 0, // qsub0 |
| 45821 | 0, // qsub1 |
| 45822 | 0, // qsub2 |
| 45823 | 0, // qsub3 |
| 45824 | 99, // ssub -> ZPRMul2_Hi |
| 45825 | 99, // ssub_hi -> ZPRMul2_Hi |
| 45826 | 0, // sub_32 |
| 45827 | 0, // sub_32_hi |
| 45828 | 0, // sube32 |
| 45829 | 0, // sube64 |
| 45830 | 0, // subo32 |
| 45831 | 0, // subo64 |
| 45832 | 0, // x8sub_0 |
| 45833 | 0, // x8sub_1 |
| 45834 | 0, // x8sub_2 |
| 45835 | 0, // x8sub_3 |
| 45836 | 0, // x8sub_4 |
| 45837 | 0, // x8sub_5 |
| 45838 | 0, // x8sub_6 |
| 45839 | 0, // x8sub_7 |
| 45840 | 0, // zasubb |
| 45841 | 0, // zasubd0 |
| 45842 | 0, // zasubd1 |
| 45843 | 0, // zasubh0 |
| 45844 | 0, // zasubh1 |
| 45845 | 0, // zasubq0 |
| 45846 | 0, // zasubq1 |
| 45847 | 0, // zasubs0 |
| 45848 | 0, // zasubs1 |
| 45849 | 99, // zsub -> ZPRMul2_Hi |
| 45850 | 0, // zsub0 |
| 45851 | 0, // zsub1 |
| 45852 | 0, // zsub2 |
| 45853 | 0, // zsub3 |
| 45854 | 99, // zsub_hi -> ZPRMul2_Hi |
| 45855 | 0, // zasubd1_then_zasubq0 |
| 45856 | 0, // zasubd1_then_zasubq1 |
| 45857 | 0, // zasubs1_then_zasubd0 |
| 45858 | 0, // zasubs1_then_zasubd1 |
| 45859 | 0, // zasubs1_then_zasubq0 |
| 45860 | 0, // zasubs1_then_zasubq1 |
| 45861 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 45862 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 45863 | 0, // zasubh1_then_zasubd0 |
| 45864 | 0, // zasubh1_then_zasubd1 |
| 45865 | 0, // zasubh1_then_zasubq0 |
| 45866 | 0, // zasubh1_then_zasubq1 |
| 45867 | 0, // zasubh1_then_zasubs0 |
| 45868 | 0, // zasubh1_then_zasubs1 |
| 45869 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 45870 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 45871 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 45872 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 45873 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 45874 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 45875 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 45876 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 45877 | 0, // dsub1_then_bsub |
| 45878 | 0, // dsub1_then_bsub_hi |
| 45879 | 0, // dsub1_then_hsub |
| 45880 | 0, // dsub1_then_hsub_hi |
| 45881 | 0, // dsub1_then_ssub |
| 45882 | 0, // dsub1_then_ssub_hi |
| 45883 | 0, // dsub3_then_bsub |
| 45884 | 0, // dsub3_then_bsub_hi |
| 45885 | 0, // dsub3_then_hsub |
| 45886 | 0, // dsub3_then_hsub_hi |
| 45887 | 0, // dsub3_then_ssub |
| 45888 | 0, // dsub3_then_ssub_hi |
| 45889 | 0, // dsub2_then_bsub |
| 45890 | 0, // dsub2_then_bsub_hi |
| 45891 | 0, // dsub2_then_hsub |
| 45892 | 0, // dsub2_then_hsub_hi |
| 45893 | 0, // dsub2_then_ssub |
| 45894 | 0, // dsub2_then_ssub_hi |
| 45895 | 0, // psub1_then_psub |
| 45896 | 0, // qsub1_then_dsub_hi |
| 45897 | 0, // qsub3_then_dsub_hi |
| 45898 | 0, // qsub2_then_dsub_hi |
| 45899 | 0, // x8sub_7_then_sub_32 |
| 45900 | 0, // x8sub_7_then_sub_32_hi |
| 45901 | 0, // x8sub_6_then_sub_32 |
| 45902 | 0, // x8sub_6_then_sub_32_hi |
| 45903 | 0, // x8sub_5_then_sub_32 |
| 45904 | 0, // x8sub_5_then_sub_32_hi |
| 45905 | 0, // x8sub_4_then_sub_32 |
| 45906 | 0, // x8sub_4_then_sub_32_hi |
| 45907 | 0, // x8sub_3_then_sub_32 |
| 45908 | 0, // x8sub_3_then_sub_32_hi |
| 45909 | 0, // x8sub_2_then_sub_32 |
| 45910 | 0, // x8sub_2_then_sub_32_hi |
| 45911 | 0, // x8sub_1_then_sub_32 |
| 45912 | 0, // x8sub_1_then_sub_32_hi |
| 45913 | 0, // subo64_then_sub_32 |
| 45914 | 0, // subo64_then_sub_32_hi |
| 45915 | 0, // zsub1_then_zsub_hi |
| 45916 | 0, // zsub3_then_zsub_hi |
| 45917 | 0, // zsub2_then_zsub_hi |
| 45918 | 0, // dsub0_dsub1 |
| 45919 | 0, // dsub0_dsub1_dsub2 |
| 45920 | 0, // dsub1_dsub2 |
| 45921 | 0, // dsub1_dsub2_dsub3 |
| 45922 | 0, // dsub2_dsub3 |
| 45923 | 0, // dsub_dsub1 |
| 45924 | 0, // dsub_dsub1_dsub2_dsub3 |
| 45925 | 0, // dsub_dsub1_dsub2 |
| 45926 | 0, // qsub0_qsub1 |
| 45927 | 0, // qsub0_qsub1_qsub2 |
| 45928 | 0, // qsub1_qsub2 |
| 45929 | 0, // qsub1_qsub2_qsub3 |
| 45930 | 0, // qsub2_qsub3 |
| 45931 | 0, // sub_32_x8sub_1_then_sub_32 |
| 45932 | 0, // x8sub_0_x8sub_1 |
| 45933 | 0, // x8sub_2_x8sub_3 |
| 45934 | 0, // x8sub_4_x8sub_5 |
| 45935 | 0, // x8sub_6_x8sub_7 |
| 45936 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 45937 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 45938 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 45939 | 0, // sub_32_subo64_then_sub_32 |
| 45940 | 0, // zsub_qsub1 |
| 45941 | 0, // zsub_qsub1_qsub2_qsub3 |
| 45942 | 0, // zsub_qsub1_qsub2 |
| 45943 | 0, // zsub0_zsub1 |
| 45944 | 0, // zsub0_zsub1_zsub2 |
| 45945 | 0, // zsub1_zsub2 |
| 45946 | 0, // zsub1_zsub2_zsub3 |
| 45947 | 0, // zsub2_zsub3 |
| 45948 | 0, // zsub0_zsub2 |
| 45949 | 0, // zsub1_zsub3 |
| 45950 | }, |
| 45951 | { // ZPRMul2_Lo |
| 45952 | 100, // bsub -> ZPRMul2_Lo |
| 45953 | 100, // bsub_hi -> ZPRMul2_Lo |
| 45954 | 100, // dsub -> ZPRMul2_Lo |
| 45955 | 0, // dsub0 |
| 45956 | 0, // dsub1 |
| 45957 | 0, // dsub2 |
| 45958 | 0, // dsub3 |
| 45959 | 100, // dsub_hi -> ZPRMul2_Lo |
| 45960 | 100, // hsub -> ZPRMul2_Lo |
| 45961 | 100, // hsub_hi -> ZPRMul2_Lo |
| 45962 | 0, // psub |
| 45963 | 0, // psub0 |
| 45964 | 0, // psub1 |
| 45965 | 0, // qsub0 |
| 45966 | 0, // qsub1 |
| 45967 | 0, // qsub2 |
| 45968 | 0, // qsub3 |
| 45969 | 100, // ssub -> ZPRMul2_Lo |
| 45970 | 100, // ssub_hi -> ZPRMul2_Lo |
| 45971 | 0, // sub_32 |
| 45972 | 0, // sub_32_hi |
| 45973 | 0, // sube32 |
| 45974 | 0, // sube64 |
| 45975 | 0, // subo32 |
| 45976 | 0, // subo64 |
| 45977 | 0, // x8sub_0 |
| 45978 | 0, // x8sub_1 |
| 45979 | 0, // x8sub_2 |
| 45980 | 0, // x8sub_3 |
| 45981 | 0, // x8sub_4 |
| 45982 | 0, // x8sub_5 |
| 45983 | 0, // x8sub_6 |
| 45984 | 0, // x8sub_7 |
| 45985 | 0, // zasubb |
| 45986 | 0, // zasubd0 |
| 45987 | 0, // zasubd1 |
| 45988 | 0, // zasubh0 |
| 45989 | 0, // zasubh1 |
| 45990 | 0, // zasubq0 |
| 45991 | 0, // zasubq1 |
| 45992 | 0, // zasubs0 |
| 45993 | 0, // zasubs1 |
| 45994 | 100, // zsub -> ZPRMul2_Lo |
| 45995 | 0, // zsub0 |
| 45996 | 0, // zsub1 |
| 45997 | 0, // zsub2 |
| 45998 | 0, // zsub3 |
| 45999 | 100, // zsub_hi -> ZPRMul2_Lo |
| 46000 | 0, // zasubd1_then_zasubq0 |
| 46001 | 0, // zasubd1_then_zasubq1 |
| 46002 | 0, // zasubs1_then_zasubd0 |
| 46003 | 0, // zasubs1_then_zasubd1 |
| 46004 | 0, // zasubs1_then_zasubq0 |
| 46005 | 0, // zasubs1_then_zasubq1 |
| 46006 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46007 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46008 | 0, // zasubh1_then_zasubd0 |
| 46009 | 0, // zasubh1_then_zasubd1 |
| 46010 | 0, // zasubh1_then_zasubq0 |
| 46011 | 0, // zasubh1_then_zasubq1 |
| 46012 | 0, // zasubh1_then_zasubs0 |
| 46013 | 0, // zasubh1_then_zasubs1 |
| 46014 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46015 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46016 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46017 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46018 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46019 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46020 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46021 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46022 | 0, // dsub1_then_bsub |
| 46023 | 0, // dsub1_then_bsub_hi |
| 46024 | 0, // dsub1_then_hsub |
| 46025 | 0, // dsub1_then_hsub_hi |
| 46026 | 0, // dsub1_then_ssub |
| 46027 | 0, // dsub1_then_ssub_hi |
| 46028 | 0, // dsub3_then_bsub |
| 46029 | 0, // dsub3_then_bsub_hi |
| 46030 | 0, // dsub3_then_hsub |
| 46031 | 0, // dsub3_then_hsub_hi |
| 46032 | 0, // dsub3_then_ssub |
| 46033 | 0, // dsub3_then_ssub_hi |
| 46034 | 0, // dsub2_then_bsub |
| 46035 | 0, // dsub2_then_bsub_hi |
| 46036 | 0, // dsub2_then_hsub |
| 46037 | 0, // dsub2_then_hsub_hi |
| 46038 | 0, // dsub2_then_ssub |
| 46039 | 0, // dsub2_then_ssub_hi |
| 46040 | 0, // psub1_then_psub |
| 46041 | 0, // qsub1_then_dsub_hi |
| 46042 | 0, // qsub3_then_dsub_hi |
| 46043 | 0, // qsub2_then_dsub_hi |
| 46044 | 0, // x8sub_7_then_sub_32 |
| 46045 | 0, // x8sub_7_then_sub_32_hi |
| 46046 | 0, // x8sub_6_then_sub_32 |
| 46047 | 0, // x8sub_6_then_sub_32_hi |
| 46048 | 0, // x8sub_5_then_sub_32 |
| 46049 | 0, // x8sub_5_then_sub_32_hi |
| 46050 | 0, // x8sub_4_then_sub_32 |
| 46051 | 0, // x8sub_4_then_sub_32_hi |
| 46052 | 0, // x8sub_3_then_sub_32 |
| 46053 | 0, // x8sub_3_then_sub_32_hi |
| 46054 | 0, // x8sub_2_then_sub_32 |
| 46055 | 0, // x8sub_2_then_sub_32_hi |
| 46056 | 0, // x8sub_1_then_sub_32 |
| 46057 | 0, // x8sub_1_then_sub_32_hi |
| 46058 | 0, // subo64_then_sub_32 |
| 46059 | 0, // subo64_then_sub_32_hi |
| 46060 | 0, // zsub1_then_zsub_hi |
| 46061 | 0, // zsub3_then_zsub_hi |
| 46062 | 0, // zsub2_then_zsub_hi |
| 46063 | 0, // dsub0_dsub1 |
| 46064 | 0, // dsub0_dsub1_dsub2 |
| 46065 | 0, // dsub1_dsub2 |
| 46066 | 0, // dsub1_dsub2_dsub3 |
| 46067 | 0, // dsub2_dsub3 |
| 46068 | 0, // dsub_dsub1 |
| 46069 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46070 | 0, // dsub_dsub1_dsub2 |
| 46071 | 0, // qsub0_qsub1 |
| 46072 | 0, // qsub0_qsub1_qsub2 |
| 46073 | 0, // qsub1_qsub2 |
| 46074 | 0, // qsub1_qsub2_qsub3 |
| 46075 | 0, // qsub2_qsub3 |
| 46076 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46077 | 0, // x8sub_0_x8sub_1 |
| 46078 | 0, // x8sub_2_x8sub_3 |
| 46079 | 0, // x8sub_4_x8sub_5 |
| 46080 | 0, // x8sub_6_x8sub_7 |
| 46081 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46082 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46083 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46084 | 0, // sub_32_subo64_then_sub_32 |
| 46085 | 0, // zsub_qsub1 |
| 46086 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46087 | 0, // zsub_qsub1_qsub2 |
| 46088 | 0, // zsub0_zsub1 |
| 46089 | 0, // zsub0_zsub1_zsub2 |
| 46090 | 0, // zsub1_zsub2 |
| 46091 | 0, // zsub1_zsub2_zsub3 |
| 46092 | 0, // zsub2_zsub3 |
| 46093 | 0, // zsub0_zsub2 |
| 46094 | 0, // zsub1_zsub3 |
| 46095 | }, |
| 46096 | { // ZPRMul4 |
| 46097 | 101, // bsub -> ZPRMul4 |
| 46098 | 101, // bsub_hi -> ZPRMul4 |
| 46099 | 101, // dsub -> ZPRMul4 |
| 46100 | 0, // dsub0 |
| 46101 | 0, // dsub1 |
| 46102 | 0, // dsub2 |
| 46103 | 0, // dsub3 |
| 46104 | 101, // dsub_hi -> ZPRMul4 |
| 46105 | 101, // hsub -> ZPRMul4 |
| 46106 | 101, // hsub_hi -> ZPRMul4 |
| 46107 | 0, // psub |
| 46108 | 0, // psub0 |
| 46109 | 0, // psub1 |
| 46110 | 0, // qsub0 |
| 46111 | 0, // qsub1 |
| 46112 | 0, // qsub2 |
| 46113 | 0, // qsub3 |
| 46114 | 101, // ssub -> ZPRMul4 |
| 46115 | 101, // ssub_hi -> ZPRMul4 |
| 46116 | 0, // sub_32 |
| 46117 | 0, // sub_32_hi |
| 46118 | 0, // sube32 |
| 46119 | 0, // sube64 |
| 46120 | 0, // subo32 |
| 46121 | 0, // subo64 |
| 46122 | 0, // x8sub_0 |
| 46123 | 0, // x8sub_1 |
| 46124 | 0, // x8sub_2 |
| 46125 | 0, // x8sub_3 |
| 46126 | 0, // x8sub_4 |
| 46127 | 0, // x8sub_5 |
| 46128 | 0, // x8sub_6 |
| 46129 | 0, // x8sub_7 |
| 46130 | 0, // zasubb |
| 46131 | 0, // zasubd0 |
| 46132 | 0, // zasubd1 |
| 46133 | 0, // zasubh0 |
| 46134 | 0, // zasubh1 |
| 46135 | 0, // zasubq0 |
| 46136 | 0, // zasubq1 |
| 46137 | 0, // zasubs0 |
| 46138 | 0, // zasubs1 |
| 46139 | 101, // zsub -> ZPRMul4 |
| 46140 | 0, // zsub0 |
| 46141 | 0, // zsub1 |
| 46142 | 0, // zsub2 |
| 46143 | 0, // zsub3 |
| 46144 | 101, // zsub_hi -> ZPRMul4 |
| 46145 | 0, // zasubd1_then_zasubq0 |
| 46146 | 0, // zasubd1_then_zasubq1 |
| 46147 | 0, // zasubs1_then_zasubd0 |
| 46148 | 0, // zasubs1_then_zasubd1 |
| 46149 | 0, // zasubs1_then_zasubq0 |
| 46150 | 0, // zasubs1_then_zasubq1 |
| 46151 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46152 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46153 | 0, // zasubh1_then_zasubd0 |
| 46154 | 0, // zasubh1_then_zasubd1 |
| 46155 | 0, // zasubh1_then_zasubq0 |
| 46156 | 0, // zasubh1_then_zasubq1 |
| 46157 | 0, // zasubh1_then_zasubs0 |
| 46158 | 0, // zasubh1_then_zasubs1 |
| 46159 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46160 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46161 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46162 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46163 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46164 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46165 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46166 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46167 | 0, // dsub1_then_bsub |
| 46168 | 0, // dsub1_then_bsub_hi |
| 46169 | 0, // dsub1_then_hsub |
| 46170 | 0, // dsub1_then_hsub_hi |
| 46171 | 0, // dsub1_then_ssub |
| 46172 | 0, // dsub1_then_ssub_hi |
| 46173 | 0, // dsub3_then_bsub |
| 46174 | 0, // dsub3_then_bsub_hi |
| 46175 | 0, // dsub3_then_hsub |
| 46176 | 0, // dsub3_then_hsub_hi |
| 46177 | 0, // dsub3_then_ssub |
| 46178 | 0, // dsub3_then_ssub_hi |
| 46179 | 0, // dsub2_then_bsub |
| 46180 | 0, // dsub2_then_bsub_hi |
| 46181 | 0, // dsub2_then_hsub |
| 46182 | 0, // dsub2_then_hsub_hi |
| 46183 | 0, // dsub2_then_ssub |
| 46184 | 0, // dsub2_then_ssub_hi |
| 46185 | 0, // psub1_then_psub |
| 46186 | 0, // qsub1_then_dsub_hi |
| 46187 | 0, // qsub3_then_dsub_hi |
| 46188 | 0, // qsub2_then_dsub_hi |
| 46189 | 0, // x8sub_7_then_sub_32 |
| 46190 | 0, // x8sub_7_then_sub_32_hi |
| 46191 | 0, // x8sub_6_then_sub_32 |
| 46192 | 0, // x8sub_6_then_sub_32_hi |
| 46193 | 0, // x8sub_5_then_sub_32 |
| 46194 | 0, // x8sub_5_then_sub_32_hi |
| 46195 | 0, // x8sub_4_then_sub_32 |
| 46196 | 0, // x8sub_4_then_sub_32_hi |
| 46197 | 0, // x8sub_3_then_sub_32 |
| 46198 | 0, // x8sub_3_then_sub_32_hi |
| 46199 | 0, // x8sub_2_then_sub_32 |
| 46200 | 0, // x8sub_2_then_sub_32_hi |
| 46201 | 0, // x8sub_1_then_sub_32 |
| 46202 | 0, // x8sub_1_then_sub_32_hi |
| 46203 | 0, // subo64_then_sub_32 |
| 46204 | 0, // subo64_then_sub_32_hi |
| 46205 | 0, // zsub1_then_zsub_hi |
| 46206 | 0, // zsub3_then_zsub_hi |
| 46207 | 0, // zsub2_then_zsub_hi |
| 46208 | 0, // dsub0_dsub1 |
| 46209 | 0, // dsub0_dsub1_dsub2 |
| 46210 | 0, // dsub1_dsub2 |
| 46211 | 0, // dsub1_dsub2_dsub3 |
| 46212 | 0, // dsub2_dsub3 |
| 46213 | 0, // dsub_dsub1 |
| 46214 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46215 | 0, // dsub_dsub1_dsub2 |
| 46216 | 0, // qsub0_qsub1 |
| 46217 | 0, // qsub0_qsub1_qsub2 |
| 46218 | 0, // qsub1_qsub2 |
| 46219 | 0, // qsub1_qsub2_qsub3 |
| 46220 | 0, // qsub2_qsub3 |
| 46221 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46222 | 0, // x8sub_0_x8sub_1 |
| 46223 | 0, // x8sub_2_x8sub_3 |
| 46224 | 0, // x8sub_4_x8sub_5 |
| 46225 | 0, // x8sub_6_x8sub_7 |
| 46226 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46227 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46228 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46229 | 0, // sub_32_subo64_then_sub_32 |
| 46230 | 0, // zsub_qsub1 |
| 46231 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46232 | 0, // zsub_qsub1_qsub2 |
| 46233 | 0, // zsub0_zsub1 |
| 46234 | 0, // zsub0_zsub1_zsub2 |
| 46235 | 0, // zsub1_zsub2 |
| 46236 | 0, // zsub1_zsub2_zsub3 |
| 46237 | 0, // zsub2_zsub3 |
| 46238 | 0, // zsub0_zsub2 |
| 46239 | 0, // zsub1_zsub3 |
| 46240 | }, |
| 46241 | { // ZPR_3b |
| 46242 | 102, // bsub -> ZPR_3b |
| 46243 | 102, // bsub_hi -> ZPR_3b |
| 46244 | 102, // dsub -> ZPR_3b |
| 46245 | 0, // dsub0 |
| 46246 | 0, // dsub1 |
| 46247 | 0, // dsub2 |
| 46248 | 0, // dsub3 |
| 46249 | 102, // dsub_hi -> ZPR_3b |
| 46250 | 102, // hsub -> ZPR_3b |
| 46251 | 102, // hsub_hi -> ZPR_3b |
| 46252 | 0, // psub |
| 46253 | 0, // psub0 |
| 46254 | 0, // psub1 |
| 46255 | 0, // qsub0 |
| 46256 | 0, // qsub1 |
| 46257 | 0, // qsub2 |
| 46258 | 0, // qsub3 |
| 46259 | 102, // ssub -> ZPR_3b |
| 46260 | 102, // ssub_hi -> ZPR_3b |
| 46261 | 0, // sub_32 |
| 46262 | 0, // sub_32_hi |
| 46263 | 0, // sube32 |
| 46264 | 0, // sube64 |
| 46265 | 0, // subo32 |
| 46266 | 0, // subo64 |
| 46267 | 0, // x8sub_0 |
| 46268 | 0, // x8sub_1 |
| 46269 | 0, // x8sub_2 |
| 46270 | 0, // x8sub_3 |
| 46271 | 0, // x8sub_4 |
| 46272 | 0, // x8sub_5 |
| 46273 | 0, // x8sub_6 |
| 46274 | 0, // x8sub_7 |
| 46275 | 0, // zasubb |
| 46276 | 0, // zasubd0 |
| 46277 | 0, // zasubd1 |
| 46278 | 0, // zasubh0 |
| 46279 | 0, // zasubh1 |
| 46280 | 0, // zasubq0 |
| 46281 | 0, // zasubq1 |
| 46282 | 0, // zasubs0 |
| 46283 | 0, // zasubs1 |
| 46284 | 102, // zsub -> ZPR_3b |
| 46285 | 0, // zsub0 |
| 46286 | 0, // zsub1 |
| 46287 | 0, // zsub2 |
| 46288 | 0, // zsub3 |
| 46289 | 102, // zsub_hi -> ZPR_3b |
| 46290 | 0, // zasubd1_then_zasubq0 |
| 46291 | 0, // zasubd1_then_zasubq1 |
| 46292 | 0, // zasubs1_then_zasubd0 |
| 46293 | 0, // zasubs1_then_zasubd1 |
| 46294 | 0, // zasubs1_then_zasubq0 |
| 46295 | 0, // zasubs1_then_zasubq1 |
| 46296 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46297 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46298 | 0, // zasubh1_then_zasubd0 |
| 46299 | 0, // zasubh1_then_zasubd1 |
| 46300 | 0, // zasubh1_then_zasubq0 |
| 46301 | 0, // zasubh1_then_zasubq1 |
| 46302 | 0, // zasubh1_then_zasubs0 |
| 46303 | 0, // zasubh1_then_zasubs1 |
| 46304 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46305 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46306 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46307 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46308 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46309 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46310 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46311 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46312 | 0, // dsub1_then_bsub |
| 46313 | 0, // dsub1_then_bsub_hi |
| 46314 | 0, // dsub1_then_hsub |
| 46315 | 0, // dsub1_then_hsub_hi |
| 46316 | 0, // dsub1_then_ssub |
| 46317 | 0, // dsub1_then_ssub_hi |
| 46318 | 0, // dsub3_then_bsub |
| 46319 | 0, // dsub3_then_bsub_hi |
| 46320 | 0, // dsub3_then_hsub |
| 46321 | 0, // dsub3_then_hsub_hi |
| 46322 | 0, // dsub3_then_ssub |
| 46323 | 0, // dsub3_then_ssub_hi |
| 46324 | 0, // dsub2_then_bsub |
| 46325 | 0, // dsub2_then_bsub_hi |
| 46326 | 0, // dsub2_then_hsub |
| 46327 | 0, // dsub2_then_hsub_hi |
| 46328 | 0, // dsub2_then_ssub |
| 46329 | 0, // dsub2_then_ssub_hi |
| 46330 | 0, // psub1_then_psub |
| 46331 | 0, // qsub1_then_dsub_hi |
| 46332 | 0, // qsub3_then_dsub_hi |
| 46333 | 0, // qsub2_then_dsub_hi |
| 46334 | 0, // x8sub_7_then_sub_32 |
| 46335 | 0, // x8sub_7_then_sub_32_hi |
| 46336 | 0, // x8sub_6_then_sub_32 |
| 46337 | 0, // x8sub_6_then_sub_32_hi |
| 46338 | 0, // x8sub_5_then_sub_32 |
| 46339 | 0, // x8sub_5_then_sub_32_hi |
| 46340 | 0, // x8sub_4_then_sub_32 |
| 46341 | 0, // x8sub_4_then_sub_32_hi |
| 46342 | 0, // x8sub_3_then_sub_32 |
| 46343 | 0, // x8sub_3_then_sub_32_hi |
| 46344 | 0, // x8sub_2_then_sub_32 |
| 46345 | 0, // x8sub_2_then_sub_32_hi |
| 46346 | 0, // x8sub_1_then_sub_32 |
| 46347 | 0, // x8sub_1_then_sub_32_hi |
| 46348 | 0, // subo64_then_sub_32 |
| 46349 | 0, // subo64_then_sub_32_hi |
| 46350 | 0, // zsub1_then_zsub_hi |
| 46351 | 0, // zsub3_then_zsub_hi |
| 46352 | 0, // zsub2_then_zsub_hi |
| 46353 | 0, // dsub0_dsub1 |
| 46354 | 0, // dsub0_dsub1_dsub2 |
| 46355 | 0, // dsub1_dsub2 |
| 46356 | 0, // dsub1_dsub2_dsub3 |
| 46357 | 0, // dsub2_dsub3 |
| 46358 | 0, // dsub_dsub1 |
| 46359 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46360 | 0, // dsub_dsub1_dsub2 |
| 46361 | 0, // qsub0_qsub1 |
| 46362 | 0, // qsub0_qsub1_qsub2 |
| 46363 | 0, // qsub1_qsub2 |
| 46364 | 0, // qsub1_qsub2_qsub3 |
| 46365 | 0, // qsub2_qsub3 |
| 46366 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46367 | 0, // x8sub_0_x8sub_1 |
| 46368 | 0, // x8sub_2_x8sub_3 |
| 46369 | 0, // x8sub_4_x8sub_5 |
| 46370 | 0, // x8sub_6_x8sub_7 |
| 46371 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46372 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46373 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46374 | 0, // sub_32_subo64_then_sub_32 |
| 46375 | 0, // zsub_qsub1 |
| 46376 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46377 | 0, // zsub_qsub1_qsub2 |
| 46378 | 0, // zsub0_zsub1 |
| 46379 | 0, // zsub0_zsub1_zsub2 |
| 46380 | 0, // zsub1_zsub2 |
| 46381 | 0, // zsub1_zsub2_zsub3 |
| 46382 | 0, // zsub2_zsub3 |
| 46383 | 0, // zsub0_zsub2 |
| 46384 | 0, // zsub1_zsub3 |
| 46385 | }, |
| 46386 | { // ZPR_K |
| 46387 | 103, // bsub -> ZPR_K |
| 46388 | 103, // bsub_hi -> ZPR_K |
| 46389 | 103, // dsub -> ZPR_K |
| 46390 | 0, // dsub0 |
| 46391 | 0, // dsub1 |
| 46392 | 0, // dsub2 |
| 46393 | 0, // dsub3 |
| 46394 | 103, // dsub_hi -> ZPR_K |
| 46395 | 103, // hsub -> ZPR_K |
| 46396 | 103, // hsub_hi -> ZPR_K |
| 46397 | 0, // psub |
| 46398 | 0, // psub0 |
| 46399 | 0, // psub1 |
| 46400 | 0, // qsub0 |
| 46401 | 0, // qsub1 |
| 46402 | 0, // qsub2 |
| 46403 | 0, // qsub3 |
| 46404 | 103, // ssub -> ZPR_K |
| 46405 | 103, // ssub_hi -> ZPR_K |
| 46406 | 0, // sub_32 |
| 46407 | 0, // sub_32_hi |
| 46408 | 0, // sube32 |
| 46409 | 0, // sube64 |
| 46410 | 0, // subo32 |
| 46411 | 0, // subo64 |
| 46412 | 0, // x8sub_0 |
| 46413 | 0, // x8sub_1 |
| 46414 | 0, // x8sub_2 |
| 46415 | 0, // x8sub_3 |
| 46416 | 0, // x8sub_4 |
| 46417 | 0, // x8sub_5 |
| 46418 | 0, // x8sub_6 |
| 46419 | 0, // x8sub_7 |
| 46420 | 0, // zasubb |
| 46421 | 0, // zasubd0 |
| 46422 | 0, // zasubd1 |
| 46423 | 0, // zasubh0 |
| 46424 | 0, // zasubh1 |
| 46425 | 0, // zasubq0 |
| 46426 | 0, // zasubq1 |
| 46427 | 0, // zasubs0 |
| 46428 | 0, // zasubs1 |
| 46429 | 103, // zsub -> ZPR_K |
| 46430 | 0, // zsub0 |
| 46431 | 0, // zsub1 |
| 46432 | 0, // zsub2 |
| 46433 | 0, // zsub3 |
| 46434 | 103, // zsub_hi -> ZPR_K |
| 46435 | 0, // zasubd1_then_zasubq0 |
| 46436 | 0, // zasubd1_then_zasubq1 |
| 46437 | 0, // zasubs1_then_zasubd0 |
| 46438 | 0, // zasubs1_then_zasubd1 |
| 46439 | 0, // zasubs1_then_zasubq0 |
| 46440 | 0, // zasubs1_then_zasubq1 |
| 46441 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46442 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46443 | 0, // zasubh1_then_zasubd0 |
| 46444 | 0, // zasubh1_then_zasubd1 |
| 46445 | 0, // zasubh1_then_zasubq0 |
| 46446 | 0, // zasubh1_then_zasubq1 |
| 46447 | 0, // zasubh1_then_zasubs0 |
| 46448 | 0, // zasubh1_then_zasubs1 |
| 46449 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46450 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46451 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46452 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46453 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46454 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46455 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46456 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46457 | 0, // dsub1_then_bsub |
| 46458 | 0, // dsub1_then_bsub_hi |
| 46459 | 0, // dsub1_then_hsub |
| 46460 | 0, // dsub1_then_hsub_hi |
| 46461 | 0, // dsub1_then_ssub |
| 46462 | 0, // dsub1_then_ssub_hi |
| 46463 | 0, // dsub3_then_bsub |
| 46464 | 0, // dsub3_then_bsub_hi |
| 46465 | 0, // dsub3_then_hsub |
| 46466 | 0, // dsub3_then_hsub_hi |
| 46467 | 0, // dsub3_then_ssub |
| 46468 | 0, // dsub3_then_ssub_hi |
| 46469 | 0, // dsub2_then_bsub |
| 46470 | 0, // dsub2_then_bsub_hi |
| 46471 | 0, // dsub2_then_hsub |
| 46472 | 0, // dsub2_then_hsub_hi |
| 46473 | 0, // dsub2_then_ssub |
| 46474 | 0, // dsub2_then_ssub_hi |
| 46475 | 0, // psub1_then_psub |
| 46476 | 0, // qsub1_then_dsub_hi |
| 46477 | 0, // qsub3_then_dsub_hi |
| 46478 | 0, // qsub2_then_dsub_hi |
| 46479 | 0, // x8sub_7_then_sub_32 |
| 46480 | 0, // x8sub_7_then_sub_32_hi |
| 46481 | 0, // x8sub_6_then_sub_32 |
| 46482 | 0, // x8sub_6_then_sub_32_hi |
| 46483 | 0, // x8sub_5_then_sub_32 |
| 46484 | 0, // x8sub_5_then_sub_32_hi |
| 46485 | 0, // x8sub_4_then_sub_32 |
| 46486 | 0, // x8sub_4_then_sub_32_hi |
| 46487 | 0, // x8sub_3_then_sub_32 |
| 46488 | 0, // x8sub_3_then_sub_32_hi |
| 46489 | 0, // x8sub_2_then_sub_32 |
| 46490 | 0, // x8sub_2_then_sub_32_hi |
| 46491 | 0, // x8sub_1_then_sub_32 |
| 46492 | 0, // x8sub_1_then_sub_32_hi |
| 46493 | 0, // subo64_then_sub_32 |
| 46494 | 0, // subo64_then_sub_32_hi |
| 46495 | 0, // zsub1_then_zsub_hi |
| 46496 | 0, // zsub3_then_zsub_hi |
| 46497 | 0, // zsub2_then_zsub_hi |
| 46498 | 0, // dsub0_dsub1 |
| 46499 | 0, // dsub0_dsub1_dsub2 |
| 46500 | 0, // dsub1_dsub2 |
| 46501 | 0, // dsub1_dsub2_dsub3 |
| 46502 | 0, // dsub2_dsub3 |
| 46503 | 0, // dsub_dsub1 |
| 46504 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46505 | 0, // dsub_dsub1_dsub2 |
| 46506 | 0, // qsub0_qsub1 |
| 46507 | 0, // qsub0_qsub1_qsub2 |
| 46508 | 0, // qsub1_qsub2 |
| 46509 | 0, // qsub1_qsub2_qsub3 |
| 46510 | 0, // qsub2_qsub3 |
| 46511 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46512 | 0, // x8sub_0_x8sub_1 |
| 46513 | 0, // x8sub_2_x8sub_3 |
| 46514 | 0, // x8sub_4_x8sub_5 |
| 46515 | 0, // x8sub_6_x8sub_7 |
| 46516 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46517 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46518 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46519 | 0, // sub_32_subo64_then_sub_32 |
| 46520 | 0, // zsub_qsub1 |
| 46521 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46522 | 0, // zsub_qsub1_qsub2 |
| 46523 | 0, // zsub0_zsub1 |
| 46524 | 0, // zsub0_zsub1_zsub2 |
| 46525 | 0, // zsub1_zsub2 |
| 46526 | 0, // zsub1_zsub2_zsub3 |
| 46527 | 0, // zsub2_zsub3 |
| 46528 | 0, // zsub0_zsub2 |
| 46529 | 0, // zsub1_zsub3 |
| 46530 | }, |
| 46531 | { // ZPRMul2_Hi_and_ZPRMul4 |
| 46532 | 104, // bsub -> ZPRMul2_Hi_and_ZPRMul4 |
| 46533 | 104, // bsub_hi -> ZPRMul2_Hi_and_ZPRMul4 |
| 46534 | 104, // dsub -> ZPRMul2_Hi_and_ZPRMul4 |
| 46535 | 0, // dsub0 |
| 46536 | 0, // dsub1 |
| 46537 | 0, // dsub2 |
| 46538 | 0, // dsub3 |
| 46539 | 104, // dsub_hi -> ZPRMul2_Hi_and_ZPRMul4 |
| 46540 | 104, // hsub -> ZPRMul2_Hi_and_ZPRMul4 |
| 46541 | 104, // hsub_hi -> ZPRMul2_Hi_and_ZPRMul4 |
| 46542 | 0, // psub |
| 46543 | 0, // psub0 |
| 46544 | 0, // psub1 |
| 46545 | 0, // qsub0 |
| 46546 | 0, // qsub1 |
| 46547 | 0, // qsub2 |
| 46548 | 0, // qsub3 |
| 46549 | 104, // ssub -> ZPRMul2_Hi_and_ZPRMul4 |
| 46550 | 104, // ssub_hi -> ZPRMul2_Hi_and_ZPRMul4 |
| 46551 | 0, // sub_32 |
| 46552 | 0, // sub_32_hi |
| 46553 | 0, // sube32 |
| 46554 | 0, // sube64 |
| 46555 | 0, // subo32 |
| 46556 | 0, // subo64 |
| 46557 | 0, // x8sub_0 |
| 46558 | 0, // x8sub_1 |
| 46559 | 0, // x8sub_2 |
| 46560 | 0, // x8sub_3 |
| 46561 | 0, // x8sub_4 |
| 46562 | 0, // x8sub_5 |
| 46563 | 0, // x8sub_6 |
| 46564 | 0, // x8sub_7 |
| 46565 | 0, // zasubb |
| 46566 | 0, // zasubd0 |
| 46567 | 0, // zasubd1 |
| 46568 | 0, // zasubh0 |
| 46569 | 0, // zasubh1 |
| 46570 | 0, // zasubq0 |
| 46571 | 0, // zasubq1 |
| 46572 | 0, // zasubs0 |
| 46573 | 0, // zasubs1 |
| 46574 | 104, // zsub -> ZPRMul2_Hi_and_ZPRMul4 |
| 46575 | 0, // zsub0 |
| 46576 | 0, // zsub1 |
| 46577 | 0, // zsub2 |
| 46578 | 0, // zsub3 |
| 46579 | 104, // zsub_hi -> ZPRMul2_Hi_and_ZPRMul4 |
| 46580 | 0, // zasubd1_then_zasubq0 |
| 46581 | 0, // zasubd1_then_zasubq1 |
| 46582 | 0, // zasubs1_then_zasubd0 |
| 46583 | 0, // zasubs1_then_zasubd1 |
| 46584 | 0, // zasubs1_then_zasubq0 |
| 46585 | 0, // zasubs1_then_zasubq1 |
| 46586 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46587 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46588 | 0, // zasubh1_then_zasubd0 |
| 46589 | 0, // zasubh1_then_zasubd1 |
| 46590 | 0, // zasubh1_then_zasubq0 |
| 46591 | 0, // zasubh1_then_zasubq1 |
| 46592 | 0, // zasubh1_then_zasubs0 |
| 46593 | 0, // zasubh1_then_zasubs1 |
| 46594 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46595 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46596 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46597 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46598 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46599 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46600 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46601 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46602 | 0, // dsub1_then_bsub |
| 46603 | 0, // dsub1_then_bsub_hi |
| 46604 | 0, // dsub1_then_hsub |
| 46605 | 0, // dsub1_then_hsub_hi |
| 46606 | 0, // dsub1_then_ssub |
| 46607 | 0, // dsub1_then_ssub_hi |
| 46608 | 0, // dsub3_then_bsub |
| 46609 | 0, // dsub3_then_bsub_hi |
| 46610 | 0, // dsub3_then_hsub |
| 46611 | 0, // dsub3_then_hsub_hi |
| 46612 | 0, // dsub3_then_ssub |
| 46613 | 0, // dsub3_then_ssub_hi |
| 46614 | 0, // dsub2_then_bsub |
| 46615 | 0, // dsub2_then_bsub_hi |
| 46616 | 0, // dsub2_then_hsub |
| 46617 | 0, // dsub2_then_hsub_hi |
| 46618 | 0, // dsub2_then_ssub |
| 46619 | 0, // dsub2_then_ssub_hi |
| 46620 | 0, // psub1_then_psub |
| 46621 | 0, // qsub1_then_dsub_hi |
| 46622 | 0, // qsub3_then_dsub_hi |
| 46623 | 0, // qsub2_then_dsub_hi |
| 46624 | 0, // x8sub_7_then_sub_32 |
| 46625 | 0, // x8sub_7_then_sub_32_hi |
| 46626 | 0, // x8sub_6_then_sub_32 |
| 46627 | 0, // x8sub_6_then_sub_32_hi |
| 46628 | 0, // x8sub_5_then_sub_32 |
| 46629 | 0, // x8sub_5_then_sub_32_hi |
| 46630 | 0, // x8sub_4_then_sub_32 |
| 46631 | 0, // x8sub_4_then_sub_32_hi |
| 46632 | 0, // x8sub_3_then_sub_32 |
| 46633 | 0, // x8sub_3_then_sub_32_hi |
| 46634 | 0, // x8sub_2_then_sub_32 |
| 46635 | 0, // x8sub_2_then_sub_32_hi |
| 46636 | 0, // x8sub_1_then_sub_32 |
| 46637 | 0, // x8sub_1_then_sub_32_hi |
| 46638 | 0, // subo64_then_sub_32 |
| 46639 | 0, // subo64_then_sub_32_hi |
| 46640 | 0, // zsub1_then_zsub_hi |
| 46641 | 0, // zsub3_then_zsub_hi |
| 46642 | 0, // zsub2_then_zsub_hi |
| 46643 | 0, // dsub0_dsub1 |
| 46644 | 0, // dsub0_dsub1_dsub2 |
| 46645 | 0, // dsub1_dsub2 |
| 46646 | 0, // dsub1_dsub2_dsub3 |
| 46647 | 0, // dsub2_dsub3 |
| 46648 | 0, // dsub_dsub1 |
| 46649 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46650 | 0, // dsub_dsub1_dsub2 |
| 46651 | 0, // qsub0_qsub1 |
| 46652 | 0, // qsub0_qsub1_qsub2 |
| 46653 | 0, // qsub1_qsub2 |
| 46654 | 0, // qsub1_qsub2_qsub3 |
| 46655 | 0, // qsub2_qsub3 |
| 46656 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46657 | 0, // x8sub_0_x8sub_1 |
| 46658 | 0, // x8sub_2_x8sub_3 |
| 46659 | 0, // x8sub_4_x8sub_5 |
| 46660 | 0, // x8sub_6_x8sub_7 |
| 46661 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46662 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46663 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46664 | 0, // sub_32_subo64_then_sub_32 |
| 46665 | 0, // zsub_qsub1 |
| 46666 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46667 | 0, // zsub_qsub1_qsub2 |
| 46668 | 0, // zsub0_zsub1 |
| 46669 | 0, // zsub0_zsub1_zsub2 |
| 46670 | 0, // zsub1_zsub2 |
| 46671 | 0, // zsub1_zsub2_zsub3 |
| 46672 | 0, // zsub2_zsub3 |
| 46673 | 0, // zsub0_zsub2 |
| 46674 | 0, // zsub1_zsub3 |
| 46675 | }, |
| 46676 | { // ZPRMul2_Lo_and_ZPRMul4 |
| 46677 | 105, // bsub -> ZPRMul2_Lo_and_ZPRMul4 |
| 46678 | 105, // bsub_hi -> ZPRMul2_Lo_and_ZPRMul4 |
| 46679 | 105, // dsub -> ZPRMul2_Lo_and_ZPRMul4 |
| 46680 | 0, // dsub0 |
| 46681 | 0, // dsub1 |
| 46682 | 0, // dsub2 |
| 46683 | 0, // dsub3 |
| 46684 | 105, // dsub_hi -> ZPRMul2_Lo_and_ZPRMul4 |
| 46685 | 105, // hsub -> ZPRMul2_Lo_and_ZPRMul4 |
| 46686 | 105, // hsub_hi -> ZPRMul2_Lo_and_ZPRMul4 |
| 46687 | 0, // psub |
| 46688 | 0, // psub0 |
| 46689 | 0, // psub1 |
| 46690 | 0, // qsub0 |
| 46691 | 0, // qsub1 |
| 46692 | 0, // qsub2 |
| 46693 | 0, // qsub3 |
| 46694 | 105, // ssub -> ZPRMul2_Lo_and_ZPRMul4 |
| 46695 | 105, // ssub_hi -> ZPRMul2_Lo_and_ZPRMul4 |
| 46696 | 0, // sub_32 |
| 46697 | 0, // sub_32_hi |
| 46698 | 0, // sube32 |
| 46699 | 0, // sube64 |
| 46700 | 0, // subo32 |
| 46701 | 0, // subo64 |
| 46702 | 0, // x8sub_0 |
| 46703 | 0, // x8sub_1 |
| 46704 | 0, // x8sub_2 |
| 46705 | 0, // x8sub_3 |
| 46706 | 0, // x8sub_4 |
| 46707 | 0, // x8sub_5 |
| 46708 | 0, // x8sub_6 |
| 46709 | 0, // x8sub_7 |
| 46710 | 0, // zasubb |
| 46711 | 0, // zasubd0 |
| 46712 | 0, // zasubd1 |
| 46713 | 0, // zasubh0 |
| 46714 | 0, // zasubh1 |
| 46715 | 0, // zasubq0 |
| 46716 | 0, // zasubq1 |
| 46717 | 0, // zasubs0 |
| 46718 | 0, // zasubs1 |
| 46719 | 105, // zsub -> ZPRMul2_Lo_and_ZPRMul4 |
| 46720 | 0, // zsub0 |
| 46721 | 0, // zsub1 |
| 46722 | 0, // zsub2 |
| 46723 | 0, // zsub3 |
| 46724 | 105, // zsub_hi -> ZPRMul2_Lo_and_ZPRMul4 |
| 46725 | 0, // zasubd1_then_zasubq0 |
| 46726 | 0, // zasubd1_then_zasubq1 |
| 46727 | 0, // zasubs1_then_zasubd0 |
| 46728 | 0, // zasubs1_then_zasubd1 |
| 46729 | 0, // zasubs1_then_zasubq0 |
| 46730 | 0, // zasubs1_then_zasubq1 |
| 46731 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46732 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46733 | 0, // zasubh1_then_zasubd0 |
| 46734 | 0, // zasubh1_then_zasubd1 |
| 46735 | 0, // zasubh1_then_zasubq0 |
| 46736 | 0, // zasubh1_then_zasubq1 |
| 46737 | 0, // zasubh1_then_zasubs0 |
| 46738 | 0, // zasubh1_then_zasubs1 |
| 46739 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46740 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46741 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46742 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46743 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46744 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46745 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46746 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46747 | 0, // dsub1_then_bsub |
| 46748 | 0, // dsub1_then_bsub_hi |
| 46749 | 0, // dsub1_then_hsub |
| 46750 | 0, // dsub1_then_hsub_hi |
| 46751 | 0, // dsub1_then_ssub |
| 46752 | 0, // dsub1_then_ssub_hi |
| 46753 | 0, // dsub3_then_bsub |
| 46754 | 0, // dsub3_then_bsub_hi |
| 46755 | 0, // dsub3_then_hsub |
| 46756 | 0, // dsub3_then_hsub_hi |
| 46757 | 0, // dsub3_then_ssub |
| 46758 | 0, // dsub3_then_ssub_hi |
| 46759 | 0, // dsub2_then_bsub |
| 46760 | 0, // dsub2_then_bsub_hi |
| 46761 | 0, // dsub2_then_hsub |
| 46762 | 0, // dsub2_then_hsub_hi |
| 46763 | 0, // dsub2_then_ssub |
| 46764 | 0, // dsub2_then_ssub_hi |
| 46765 | 0, // psub1_then_psub |
| 46766 | 0, // qsub1_then_dsub_hi |
| 46767 | 0, // qsub3_then_dsub_hi |
| 46768 | 0, // qsub2_then_dsub_hi |
| 46769 | 0, // x8sub_7_then_sub_32 |
| 46770 | 0, // x8sub_7_then_sub_32_hi |
| 46771 | 0, // x8sub_6_then_sub_32 |
| 46772 | 0, // x8sub_6_then_sub_32_hi |
| 46773 | 0, // x8sub_5_then_sub_32 |
| 46774 | 0, // x8sub_5_then_sub_32_hi |
| 46775 | 0, // x8sub_4_then_sub_32 |
| 46776 | 0, // x8sub_4_then_sub_32_hi |
| 46777 | 0, // x8sub_3_then_sub_32 |
| 46778 | 0, // x8sub_3_then_sub_32_hi |
| 46779 | 0, // x8sub_2_then_sub_32 |
| 46780 | 0, // x8sub_2_then_sub_32_hi |
| 46781 | 0, // x8sub_1_then_sub_32 |
| 46782 | 0, // x8sub_1_then_sub_32_hi |
| 46783 | 0, // subo64_then_sub_32 |
| 46784 | 0, // subo64_then_sub_32_hi |
| 46785 | 0, // zsub1_then_zsub_hi |
| 46786 | 0, // zsub3_then_zsub_hi |
| 46787 | 0, // zsub2_then_zsub_hi |
| 46788 | 0, // dsub0_dsub1 |
| 46789 | 0, // dsub0_dsub1_dsub2 |
| 46790 | 0, // dsub1_dsub2 |
| 46791 | 0, // dsub1_dsub2_dsub3 |
| 46792 | 0, // dsub2_dsub3 |
| 46793 | 0, // dsub_dsub1 |
| 46794 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46795 | 0, // dsub_dsub1_dsub2 |
| 46796 | 0, // qsub0_qsub1 |
| 46797 | 0, // qsub0_qsub1_qsub2 |
| 46798 | 0, // qsub1_qsub2 |
| 46799 | 0, // qsub1_qsub2_qsub3 |
| 46800 | 0, // qsub2_qsub3 |
| 46801 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46802 | 0, // x8sub_0_x8sub_1 |
| 46803 | 0, // x8sub_2_x8sub_3 |
| 46804 | 0, // x8sub_4_x8sub_5 |
| 46805 | 0, // x8sub_6_x8sub_7 |
| 46806 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46807 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46808 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46809 | 0, // sub_32_subo64_then_sub_32 |
| 46810 | 0, // zsub_qsub1 |
| 46811 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46812 | 0, // zsub_qsub1_qsub2 |
| 46813 | 0, // zsub0_zsub1 |
| 46814 | 0, // zsub0_zsub1_zsub2 |
| 46815 | 0, // zsub1_zsub2 |
| 46816 | 0, // zsub1_zsub2_zsub3 |
| 46817 | 0, // zsub2_zsub3 |
| 46818 | 0, // zsub0_zsub2 |
| 46819 | 0, // zsub1_zsub3 |
| 46820 | }, |
| 46821 | { // ZPRMul2_and_ZPR_3b |
| 46822 | 106, // bsub -> ZPRMul2_and_ZPR_3b |
| 46823 | 106, // bsub_hi -> ZPRMul2_and_ZPR_3b |
| 46824 | 106, // dsub -> ZPRMul2_and_ZPR_3b |
| 46825 | 0, // dsub0 |
| 46826 | 0, // dsub1 |
| 46827 | 0, // dsub2 |
| 46828 | 0, // dsub3 |
| 46829 | 106, // dsub_hi -> ZPRMul2_and_ZPR_3b |
| 46830 | 106, // hsub -> ZPRMul2_and_ZPR_3b |
| 46831 | 106, // hsub_hi -> ZPRMul2_and_ZPR_3b |
| 46832 | 0, // psub |
| 46833 | 0, // psub0 |
| 46834 | 0, // psub1 |
| 46835 | 0, // qsub0 |
| 46836 | 0, // qsub1 |
| 46837 | 0, // qsub2 |
| 46838 | 0, // qsub3 |
| 46839 | 106, // ssub -> ZPRMul2_and_ZPR_3b |
| 46840 | 106, // ssub_hi -> ZPRMul2_and_ZPR_3b |
| 46841 | 0, // sub_32 |
| 46842 | 0, // sub_32_hi |
| 46843 | 0, // sube32 |
| 46844 | 0, // sube64 |
| 46845 | 0, // subo32 |
| 46846 | 0, // subo64 |
| 46847 | 0, // x8sub_0 |
| 46848 | 0, // x8sub_1 |
| 46849 | 0, // x8sub_2 |
| 46850 | 0, // x8sub_3 |
| 46851 | 0, // x8sub_4 |
| 46852 | 0, // x8sub_5 |
| 46853 | 0, // x8sub_6 |
| 46854 | 0, // x8sub_7 |
| 46855 | 0, // zasubb |
| 46856 | 0, // zasubd0 |
| 46857 | 0, // zasubd1 |
| 46858 | 0, // zasubh0 |
| 46859 | 0, // zasubh1 |
| 46860 | 0, // zasubq0 |
| 46861 | 0, // zasubq1 |
| 46862 | 0, // zasubs0 |
| 46863 | 0, // zasubs1 |
| 46864 | 106, // zsub -> ZPRMul2_and_ZPR_3b |
| 46865 | 0, // zsub0 |
| 46866 | 0, // zsub1 |
| 46867 | 0, // zsub2 |
| 46868 | 0, // zsub3 |
| 46869 | 106, // zsub_hi -> ZPRMul2_and_ZPR_3b |
| 46870 | 0, // zasubd1_then_zasubq0 |
| 46871 | 0, // zasubd1_then_zasubq1 |
| 46872 | 0, // zasubs1_then_zasubd0 |
| 46873 | 0, // zasubs1_then_zasubd1 |
| 46874 | 0, // zasubs1_then_zasubq0 |
| 46875 | 0, // zasubs1_then_zasubq1 |
| 46876 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 46877 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 46878 | 0, // zasubh1_then_zasubd0 |
| 46879 | 0, // zasubh1_then_zasubd1 |
| 46880 | 0, // zasubh1_then_zasubq0 |
| 46881 | 0, // zasubh1_then_zasubq1 |
| 46882 | 0, // zasubh1_then_zasubs0 |
| 46883 | 0, // zasubh1_then_zasubs1 |
| 46884 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 46885 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 46886 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 46887 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 46888 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 46889 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 46890 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 46891 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 46892 | 0, // dsub1_then_bsub |
| 46893 | 0, // dsub1_then_bsub_hi |
| 46894 | 0, // dsub1_then_hsub |
| 46895 | 0, // dsub1_then_hsub_hi |
| 46896 | 0, // dsub1_then_ssub |
| 46897 | 0, // dsub1_then_ssub_hi |
| 46898 | 0, // dsub3_then_bsub |
| 46899 | 0, // dsub3_then_bsub_hi |
| 46900 | 0, // dsub3_then_hsub |
| 46901 | 0, // dsub3_then_hsub_hi |
| 46902 | 0, // dsub3_then_ssub |
| 46903 | 0, // dsub3_then_ssub_hi |
| 46904 | 0, // dsub2_then_bsub |
| 46905 | 0, // dsub2_then_bsub_hi |
| 46906 | 0, // dsub2_then_hsub |
| 46907 | 0, // dsub2_then_hsub_hi |
| 46908 | 0, // dsub2_then_ssub |
| 46909 | 0, // dsub2_then_ssub_hi |
| 46910 | 0, // psub1_then_psub |
| 46911 | 0, // qsub1_then_dsub_hi |
| 46912 | 0, // qsub3_then_dsub_hi |
| 46913 | 0, // qsub2_then_dsub_hi |
| 46914 | 0, // x8sub_7_then_sub_32 |
| 46915 | 0, // x8sub_7_then_sub_32_hi |
| 46916 | 0, // x8sub_6_then_sub_32 |
| 46917 | 0, // x8sub_6_then_sub_32_hi |
| 46918 | 0, // x8sub_5_then_sub_32 |
| 46919 | 0, // x8sub_5_then_sub_32_hi |
| 46920 | 0, // x8sub_4_then_sub_32 |
| 46921 | 0, // x8sub_4_then_sub_32_hi |
| 46922 | 0, // x8sub_3_then_sub_32 |
| 46923 | 0, // x8sub_3_then_sub_32_hi |
| 46924 | 0, // x8sub_2_then_sub_32 |
| 46925 | 0, // x8sub_2_then_sub_32_hi |
| 46926 | 0, // x8sub_1_then_sub_32 |
| 46927 | 0, // x8sub_1_then_sub_32_hi |
| 46928 | 0, // subo64_then_sub_32 |
| 46929 | 0, // subo64_then_sub_32_hi |
| 46930 | 0, // zsub1_then_zsub_hi |
| 46931 | 0, // zsub3_then_zsub_hi |
| 46932 | 0, // zsub2_then_zsub_hi |
| 46933 | 0, // dsub0_dsub1 |
| 46934 | 0, // dsub0_dsub1_dsub2 |
| 46935 | 0, // dsub1_dsub2 |
| 46936 | 0, // dsub1_dsub2_dsub3 |
| 46937 | 0, // dsub2_dsub3 |
| 46938 | 0, // dsub_dsub1 |
| 46939 | 0, // dsub_dsub1_dsub2_dsub3 |
| 46940 | 0, // dsub_dsub1_dsub2 |
| 46941 | 0, // qsub0_qsub1 |
| 46942 | 0, // qsub0_qsub1_qsub2 |
| 46943 | 0, // qsub1_qsub2 |
| 46944 | 0, // qsub1_qsub2_qsub3 |
| 46945 | 0, // qsub2_qsub3 |
| 46946 | 0, // sub_32_x8sub_1_then_sub_32 |
| 46947 | 0, // x8sub_0_x8sub_1 |
| 46948 | 0, // x8sub_2_x8sub_3 |
| 46949 | 0, // x8sub_4_x8sub_5 |
| 46950 | 0, // x8sub_6_x8sub_7 |
| 46951 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 46952 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 46953 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 46954 | 0, // sub_32_subo64_then_sub_32 |
| 46955 | 0, // zsub_qsub1 |
| 46956 | 0, // zsub_qsub1_qsub2_qsub3 |
| 46957 | 0, // zsub_qsub1_qsub2 |
| 46958 | 0, // zsub0_zsub1 |
| 46959 | 0, // zsub0_zsub1_zsub2 |
| 46960 | 0, // zsub1_zsub2 |
| 46961 | 0, // zsub1_zsub2_zsub3 |
| 46962 | 0, // zsub2_zsub3 |
| 46963 | 0, // zsub0_zsub2 |
| 46964 | 0, // zsub1_zsub3 |
| 46965 | }, |
| 46966 | { // ZPRMul2_and_ZPR_K |
| 46967 | 107, // bsub -> ZPRMul2_and_ZPR_K |
| 46968 | 107, // bsub_hi -> ZPRMul2_and_ZPR_K |
| 46969 | 107, // dsub -> ZPRMul2_and_ZPR_K |
| 46970 | 0, // dsub0 |
| 46971 | 0, // dsub1 |
| 46972 | 0, // dsub2 |
| 46973 | 0, // dsub3 |
| 46974 | 107, // dsub_hi -> ZPRMul2_and_ZPR_K |
| 46975 | 107, // hsub -> ZPRMul2_and_ZPR_K |
| 46976 | 107, // hsub_hi -> ZPRMul2_and_ZPR_K |
| 46977 | 0, // psub |
| 46978 | 0, // psub0 |
| 46979 | 0, // psub1 |
| 46980 | 0, // qsub0 |
| 46981 | 0, // qsub1 |
| 46982 | 0, // qsub2 |
| 46983 | 0, // qsub3 |
| 46984 | 107, // ssub -> ZPRMul2_and_ZPR_K |
| 46985 | 107, // ssub_hi -> ZPRMul2_and_ZPR_K |
| 46986 | 0, // sub_32 |
| 46987 | 0, // sub_32_hi |
| 46988 | 0, // sube32 |
| 46989 | 0, // sube64 |
| 46990 | 0, // subo32 |
| 46991 | 0, // subo64 |
| 46992 | 0, // x8sub_0 |
| 46993 | 0, // x8sub_1 |
| 46994 | 0, // x8sub_2 |
| 46995 | 0, // x8sub_3 |
| 46996 | 0, // x8sub_4 |
| 46997 | 0, // x8sub_5 |
| 46998 | 0, // x8sub_6 |
| 46999 | 0, // x8sub_7 |
| 47000 | 0, // zasubb |
| 47001 | 0, // zasubd0 |
| 47002 | 0, // zasubd1 |
| 47003 | 0, // zasubh0 |
| 47004 | 0, // zasubh1 |
| 47005 | 0, // zasubq0 |
| 47006 | 0, // zasubq1 |
| 47007 | 0, // zasubs0 |
| 47008 | 0, // zasubs1 |
| 47009 | 107, // zsub -> ZPRMul2_and_ZPR_K |
| 47010 | 0, // zsub0 |
| 47011 | 0, // zsub1 |
| 47012 | 0, // zsub2 |
| 47013 | 0, // zsub3 |
| 47014 | 107, // zsub_hi -> ZPRMul2_and_ZPR_K |
| 47015 | 0, // zasubd1_then_zasubq0 |
| 47016 | 0, // zasubd1_then_zasubq1 |
| 47017 | 0, // zasubs1_then_zasubd0 |
| 47018 | 0, // zasubs1_then_zasubd1 |
| 47019 | 0, // zasubs1_then_zasubq0 |
| 47020 | 0, // zasubs1_then_zasubq1 |
| 47021 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47022 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47023 | 0, // zasubh1_then_zasubd0 |
| 47024 | 0, // zasubh1_then_zasubd1 |
| 47025 | 0, // zasubh1_then_zasubq0 |
| 47026 | 0, // zasubh1_then_zasubq1 |
| 47027 | 0, // zasubh1_then_zasubs0 |
| 47028 | 0, // zasubh1_then_zasubs1 |
| 47029 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47030 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47031 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47032 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47033 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47034 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47035 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47036 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47037 | 0, // dsub1_then_bsub |
| 47038 | 0, // dsub1_then_bsub_hi |
| 47039 | 0, // dsub1_then_hsub |
| 47040 | 0, // dsub1_then_hsub_hi |
| 47041 | 0, // dsub1_then_ssub |
| 47042 | 0, // dsub1_then_ssub_hi |
| 47043 | 0, // dsub3_then_bsub |
| 47044 | 0, // dsub3_then_bsub_hi |
| 47045 | 0, // dsub3_then_hsub |
| 47046 | 0, // dsub3_then_hsub_hi |
| 47047 | 0, // dsub3_then_ssub |
| 47048 | 0, // dsub3_then_ssub_hi |
| 47049 | 0, // dsub2_then_bsub |
| 47050 | 0, // dsub2_then_bsub_hi |
| 47051 | 0, // dsub2_then_hsub |
| 47052 | 0, // dsub2_then_hsub_hi |
| 47053 | 0, // dsub2_then_ssub |
| 47054 | 0, // dsub2_then_ssub_hi |
| 47055 | 0, // psub1_then_psub |
| 47056 | 0, // qsub1_then_dsub_hi |
| 47057 | 0, // qsub3_then_dsub_hi |
| 47058 | 0, // qsub2_then_dsub_hi |
| 47059 | 0, // x8sub_7_then_sub_32 |
| 47060 | 0, // x8sub_7_then_sub_32_hi |
| 47061 | 0, // x8sub_6_then_sub_32 |
| 47062 | 0, // x8sub_6_then_sub_32_hi |
| 47063 | 0, // x8sub_5_then_sub_32 |
| 47064 | 0, // x8sub_5_then_sub_32_hi |
| 47065 | 0, // x8sub_4_then_sub_32 |
| 47066 | 0, // x8sub_4_then_sub_32_hi |
| 47067 | 0, // x8sub_3_then_sub_32 |
| 47068 | 0, // x8sub_3_then_sub_32_hi |
| 47069 | 0, // x8sub_2_then_sub_32 |
| 47070 | 0, // x8sub_2_then_sub_32_hi |
| 47071 | 0, // x8sub_1_then_sub_32 |
| 47072 | 0, // x8sub_1_then_sub_32_hi |
| 47073 | 0, // subo64_then_sub_32 |
| 47074 | 0, // subo64_then_sub_32_hi |
| 47075 | 0, // zsub1_then_zsub_hi |
| 47076 | 0, // zsub3_then_zsub_hi |
| 47077 | 0, // zsub2_then_zsub_hi |
| 47078 | 0, // dsub0_dsub1 |
| 47079 | 0, // dsub0_dsub1_dsub2 |
| 47080 | 0, // dsub1_dsub2 |
| 47081 | 0, // dsub1_dsub2_dsub3 |
| 47082 | 0, // dsub2_dsub3 |
| 47083 | 0, // dsub_dsub1 |
| 47084 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47085 | 0, // dsub_dsub1_dsub2 |
| 47086 | 0, // qsub0_qsub1 |
| 47087 | 0, // qsub0_qsub1_qsub2 |
| 47088 | 0, // qsub1_qsub2 |
| 47089 | 0, // qsub1_qsub2_qsub3 |
| 47090 | 0, // qsub2_qsub3 |
| 47091 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47092 | 0, // x8sub_0_x8sub_1 |
| 47093 | 0, // x8sub_2_x8sub_3 |
| 47094 | 0, // x8sub_4_x8sub_5 |
| 47095 | 0, // x8sub_6_x8sub_7 |
| 47096 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47097 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47098 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47099 | 0, // sub_32_subo64_then_sub_32 |
| 47100 | 0, // zsub_qsub1 |
| 47101 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47102 | 0, // zsub_qsub1_qsub2 |
| 47103 | 0, // zsub0_zsub1 |
| 47104 | 0, // zsub0_zsub1_zsub2 |
| 47105 | 0, // zsub1_zsub2 |
| 47106 | 0, // zsub1_zsub2_zsub3 |
| 47107 | 0, // zsub2_zsub3 |
| 47108 | 0, // zsub0_zsub2 |
| 47109 | 0, // zsub1_zsub3 |
| 47110 | }, |
| 47111 | { // ZPRMul4_and_ZPR_3b |
| 47112 | 108, // bsub -> ZPRMul4_and_ZPR_3b |
| 47113 | 108, // bsub_hi -> ZPRMul4_and_ZPR_3b |
| 47114 | 108, // dsub -> ZPRMul4_and_ZPR_3b |
| 47115 | 0, // dsub0 |
| 47116 | 0, // dsub1 |
| 47117 | 0, // dsub2 |
| 47118 | 0, // dsub3 |
| 47119 | 108, // dsub_hi -> ZPRMul4_and_ZPR_3b |
| 47120 | 108, // hsub -> ZPRMul4_and_ZPR_3b |
| 47121 | 108, // hsub_hi -> ZPRMul4_and_ZPR_3b |
| 47122 | 0, // psub |
| 47123 | 0, // psub0 |
| 47124 | 0, // psub1 |
| 47125 | 0, // qsub0 |
| 47126 | 0, // qsub1 |
| 47127 | 0, // qsub2 |
| 47128 | 0, // qsub3 |
| 47129 | 108, // ssub -> ZPRMul4_and_ZPR_3b |
| 47130 | 108, // ssub_hi -> ZPRMul4_and_ZPR_3b |
| 47131 | 0, // sub_32 |
| 47132 | 0, // sub_32_hi |
| 47133 | 0, // sube32 |
| 47134 | 0, // sube64 |
| 47135 | 0, // subo32 |
| 47136 | 0, // subo64 |
| 47137 | 0, // x8sub_0 |
| 47138 | 0, // x8sub_1 |
| 47139 | 0, // x8sub_2 |
| 47140 | 0, // x8sub_3 |
| 47141 | 0, // x8sub_4 |
| 47142 | 0, // x8sub_5 |
| 47143 | 0, // x8sub_6 |
| 47144 | 0, // x8sub_7 |
| 47145 | 0, // zasubb |
| 47146 | 0, // zasubd0 |
| 47147 | 0, // zasubd1 |
| 47148 | 0, // zasubh0 |
| 47149 | 0, // zasubh1 |
| 47150 | 0, // zasubq0 |
| 47151 | 0, // zasubq1 |
| 47152 | 0, // zasubs0 |
| 47153 | 0, // zasubs1 |
| 47154 | 108, // zsub -> ZPRMul4_and_ZPR_3b |
| 47155 | 0, // zsub0 |
| 47156 | 0, // zsub1 |
| 47157 | 0, // zsub2 |
| 47158 | 0, // zsub3 |
| 47159 | 108, // zsub_hi -> ZPRMul4_and_ZPR_3b |
| 47160 | 0, // zasubd1_then_zasubq0 |
| 47161 | 0, // zasubd1_then_zasubq1 |
| 47162 | 0, // zasubs1_then_zasubd0 |
| 47163 | 0, // zasubs1_then_zasubd1 |
| 47164 | 0, // zasubs1_then_zasubq0 |
| 47165 | 0, // zasubs1_then_zasubq1 |
| 47166 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47167 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47168 | 0, // zasubh1_then_zasubd0 |
| 47169 | 0, // zasubh1_then_zasubd1 |
| 47170 | 0, // zasubh1_then_zasubq0 |
| 47171 | 0, // zasubh1_then_zasubq1 |
| 47172 | 0, // zasubh1_then_zasubs0 |
| 47173 | 0, // zasubh1_then_zasubs1 |
| 47174 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47175 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47176 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47177 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47178 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47179 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47180 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47181 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47182 | 0, // dsub1_then_bsub |
| 47183 | 0, // dsub1_then_bsub_hi |
| 47184 | 0, // dsub1_then_hsub |
| 47185 | 0, // dsub1_then_hsub_hi |
| 47186 | 0, // dsub1_then_ssub |
| 47187 | 0, // dsub1_then_ssub_hi |
| 47188 | 0, // dsub3_then_bsub |
| 47189 | 0, // dsub3_then_bsub_hi |
| 47190 | 0, // dsub3_then_hsub |
| 47191 | 0, // dsub3_then_hsub_hi |
| 47192 | 0, // dsub3_then_ssub |
| 47193 | 0, // dsub3_then_ssub_hi |
| 47194 | 0, // dsub2_then_bsub |
| 47195 | 0, // dsub2_then_bsub_hi |
| 47196 | 0, // dsub2_then_hsub |
| 47197 | 0, // dsub2_then_hsub_hi |
| 47198 | 0, // dsub2_then_ssub |
| 47199 | 0, // dsub2_then_ssub_hi |
| 47200 | 0, // psub1_then_psub |
| 47201 | 0, // qsub1_then_dsub_hi |
| 47202 | 0, // qsub3_then_dsub_hi |
| 47203 | 0, // qsub2_then_dsub_hi |
| 47204 | 0, // x8sub_7_then_sub_32 |
| 47205 | 0, // x8sub_7_then_sub_32_hi |
| 47206 | 0, // x8sub_6_then_sub_32 |
| 47207 | 0, // x8sub_6_then_sub_32_hi |
| 47208 | 0, // x8sub_5_then_sub_32 |
| 47209 | 0, // x8sub_5_then_sub_32_hi |
| 47210 | 0, // x8sub_4_then_sub_32 |
| 47211 | 0, // x8sub_4_then_sub_32_hi |
| 47212 | 0, // x8sub_3_then_sub_32 |
| 47213 | 0, // x8sub_3_then_sub_32_hi |
| 47214 | 0, // x8sub_2_then_sub_32 |
| 47215 | 0, // x8sub_2_then_sub_32_hi |
| 47216 | 0, // x8sub_1_then_sub_32 |
| 47217 | 0, // x8sub_1_then_sub_32_hi |
| 47218 | 0, // subo64_then_sub_32 |
| 47219 | 0, // subo64_then_sub_32_hi |
| 47220 | 0, // zsub1_then_zsub_hi |
| 47221 | 0, // zsub3_then_zsub_hi |
| 47222 | 0, // zsub2_then_zsub_hi |
| 47223 | 0, // dsub0_dsub1 |
| 47224 | 0, // dsub0_dsub1_dsub2 |
| 47225 | 0, // dsub1_dsub2 |
| 47226 | 0, // dsub1_dsub2_dsub3 |
| 47227 | 0, // dsub2_dsub3 |
| 47228 | 0, // dsub_dsub1 |
| 47229 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47230 | 0, // dsub_dsub1_dsub2 |
| 47231 | 0, // qsub0_qsub1 |
| 47232 | 0, // qsub0_qsub1_qsub2 |
| 47233 | 0, // qsub1_qsub2 |
| 47234 | 0, // qsub1_qsub2_qsub3 |
| 47235 | 0, // qsub2_qsub3 |
| 47236 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47237 | 0, // x8sub_0_x8sub_1 |
| 47238 | 0, // x8sub_2_x8sub_3 |
| 47239 | 0, // x8sub_4_x8sub_5 |
| 47240 | 0, // x8sub_6_x8sub_7 |
| 47241 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47242 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47243 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47244 | 0, // sub_32_subo64_then_sub_32 |
| 47245 | 0, // zsub_qsub1 |
| 47246 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47247 | 0, // zsub_qsub1_qsub2 |
| 47248 | 0, // zsub0_zsub1 |
| 47249 | 0, // zsub0_zsub1_zsub2 |
| 47250 | 0, // zsub1_zsub2 |
| 47251 | 0, // zsub1_zsub2_zsub3 |
| 47252 | 0, // zsub2_zsub3 |
| 47253 | 0, // zsub0_zsub2 |
| 47254 | 0, // zsub1_zsub3 |
| 47255 | }, |
| 47256 | { // ZPRMul4_and_ZPR_K |
| 47257 | 109, // bsub -> ZPRMul4_and_ZPR_K |
| 47258 | 109, // bsub_hi -> ZPRMul4_and_ZPR_K |
| 47259 | 109, // dsub -> ZPRMul4_and_ZPR_K |
| 47260 | 0, // dsub0 |
| 47261 | 0, // dsub1 |
| 47262 | 0, // dsub2 |
| 47263 | 0, // dsub3 |
| 47264 | 109, // dsub_hi -> ZPRMul4_and_ZPR_K |
| 47265 | 109, // hsub -> ZPRMul4_and_ZPR_K |
| 47266 | 109, // hsub_hi -> ZPRMul4_and_ZPR_K |
| 47267 | 0, // psub |
| 47268 | 0, // psub0 |
| 47269 | 0, // psub1 |
| 47270 | 0, // qsub0 |
| 47271 | 0, // qsub1 |
| 47272 | 0, // qsub2 |
| 47273 | 0, // qsub3 |
| 47274 | 109, // ssub -> ZPRMul4_and_ZPR_K |
| 47275 | 109, // ssub_hi -> ZPRMul4_and_ZPR_K |
| 47276 | 0, // sub_32 |
| 47277 | 0, // sub_32_hi |
| 47278 | 0, // sube32 |
| 47279 | 0, // sube64 |
| 47280 | 0, // subo32 |
| 47281 | 0, // subo64 |
| 47282 | 0, // x8sub_0 |
| 47283 | 0, // x8sub_1 |
| 47284 | 0, // x8sub_2 |
| 47285 | 0, // x8sub_3 |
| 47286 | 0, // x8sub_4 |
| 47287 | 0, // x8sub_5 |
| 47288 | 0, // x8sub_6 |
| 47289 | 0, // x8sub_7 |
| 47290 | 0, // zasubb |
| 47291 | 0, // zasubd0 |
| 47292 | 0, // zasubd1 |
| 47293 | 0, // zasubh0 |
| 47294 | 0, // zasubh1 |
| 47295 | 0, // zasubq0 |
| 47296 | 0, // zasubq1 |
| 47297 | 0, // zasubs0 |
| 47298 | 0, // zasubs1 |
| 47299 | 109, // zsub -> ZPRMul4_and_ZPR_K |
| 47300 | 0, // zsub0 |
| 47301 | 0, // zsub1 |
| 47302 | 0, // zsub2 |
| 47303 | 0, // zsub3 |
| 47304 | 109, // zsub_hi -> ZPRMul4_and_ZPR_K |
| 47305 | 0, // zasubd1_then_zasubq0 |
| 47306 | 0, // zasubd1_then_zasubq1 |
| 47307 | 0, // zasubs1_then_zasubd0 |
| 47308 | 0, // zasubs1_then_zasubd1 |
| 47309 | 0, // zasubs1_then_zasubq0 |
| 47310 | 0, // zasubs1_then_zasubq1 |
| 47311 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47312 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47313 | 0, // zasubh1_then_zasubd0 |
| 47314 | 0, // zasubh1_then_zasubd1 |
| 47315 | 0, // zasubh1_then_zasubq0 |
| 47316 | 0, // zasubh1_then_zasubq1 |
| 47317 | 0, // zasubh1_then_zasubs0 |
| 47318 | 0, // zasubh1_then_zasubs1 |
| 47319 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47320 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47321 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47322 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47323 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47324 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47325 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47326 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47327 | 0, // dsub1_then_bsub |
| 47328 | 0, // dsub1_then_bsub_hi |
| 47329 | 0, // dsub1_then_hsub |
| 47330 | 0, // dsub1_then_hsub_hi |
| 47331 | 0, // dsub1_then_ssub |
| 47332 | 0, // dsub1_then_ssub_hi |
| 47333 | 0, // dsub3_then_bsub |
| 47334 | 0, // dsub3_then_bsub_hi |
| 47335 | 0, // dsub3_then_hsub |
| 47336 | 0, // dsub3_then_hsub_hi |
| 47337 | 0, // dsub3_then_ssub |
| 47338 | 0, // dsub3_then_ssub_hi |
| 47339 | 0, // dsub2_then_bsub |
| 47340 | 0, // dsub2_then_bsub_hi |
| 47341 | 0, // dsub2_then_hsub |
| 47342 | 0, // dsub2_then_hsub_hi |
| 47343 | 0, // dsub2_then_ssub |
| 47344 | 0, // dsub2_then_ssub_hi |
| 47345 | 0, // psub1_then_psub |
| 47346 | 0, // qsub1_then_dsub_hi |
| 47347 | 0, // qsub3_then_dsub_hi |
| 47348 | 0, // qsub2_then_dsub_hi |
| 47349 | 0, // x8sub_7_then_sub_32 |
| 47350 | 0, // x8sub_7_then_sub_32_hi |
| 47351 | 0, // x8sub_6_then_sub_32 |
| 47352 | 0, // x8sub_6_then_sub_32_hi |
| 47353 | 0, // x8sub_5_then_sub_32 |
| 47354 | 0, // x8sub_5_then_sub_32_hi |
| 47355 | 0, // x8sub_4_then_sub_32 |
| 47356 | 0, // x8sub_4_then_sub_32_hi |
| 47357 | 0, // x8sub_3_then_sub_32 |
| 47358 | 0, // x8sub_3_then_sub_32_hi |
| 47359 | 0, // x8sub_2_then_sub_32 |
| 47360 | 0, // x8sub_2_then_sub_32_hi |
| 47361 | 0, // x8sub_1_then_sub_32 |
| 47362 | 0, // x8sub_1_then_sub_32_hi |
| 47363 | 0, // subo64_then_sub_32 |
| 47364 | 0, // subo64_then_sub_32_hi |
| 47365 | 0, // zsub1_then_zsub_hi |
| 47366 | 0, // zsub3_then_zsub_hi |
| 47367 | 0, // zsub2_then_zsub_hi |
| 47368 | 0, // dsub0_dsub1 |
| 47369 | 0, // dsub0_dsub1_dsub2 |
| 47370 | 0, // dsub1_dsub2 |
| 47371 | 0, // dsub1_dsub2_dsub3 |
| 47372 | 0, // dsub2_dsub3 |
| 47373 | 0, // dsub_dsub1 |
| 47374 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47375 | 0, // dsub_dsub1_dsub2 |
| 47376 | 0, // qsub0_qsub1 |
| 47377 | 0, // qsub0_qsub1_qsub2 |
| 47378 | 0, // qsub1_qsub2 |
| 47379 | 0, // qsub1_qsub2_qsub3 |
| 47380 | 0, // qsub2_qsub3 |
| 47381 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47382 | 0, // x8sub_0_x8sub_1 |
| 47383 | 0, // x8sub_2_x8sub_3 |
| 47384 | 0, // x8sub_4_x8sub_5 |
| 47385 | 0, // x8sub_6_x8sub_7 |
| 47386 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47387 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47388 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47389 | 0, // sub_32_subo64_then_sub_32 |
| 47390 | 0, // zsub_qsub1 |
| 47391 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47392 | 0, // zsub_qsub1_qsub2 |
| 47393 | 0, // zsub0_zsub1 |
| 47394 | 0, // zsub0_zsub1_zsub2 |
| 47395 | 0, // zsub1_zsub2 |
| 47396 | 0, // zsub1_zsub2_zsub3 |
| 47397 | 0, // zsub2_zsub3 |
| 47398 | 0, // zsub0_zsub2 |
| 47399 | 0, // zsub1_zsub3 |
| 47400 | }, |
| 47401 | { // DDD |
| 47402 | 110, // bsub -> DDD |
| 47403 | 110, // bsub_hi -> DDD |
| 47404 | 0, // dsub |
| 47405 | 110, // dsub0 -> DDD |
| 47406 | 110, // dsub1 -> DDD |
| 47407 | 110, // dsub2 -> DDD |
| 47408 | 0, // dsub3 |
| 47409 | 0, // dsub_hi |
| 47410 | 110, // hsub -> DDD |
| 47411 | 110, // hsub_hi -> DDD |
| 47412 | 0, // psub |
| 47413 | 0, // psub0 |
| 47414 | 0, // psub1 |
| 47415 | 0, // qsub0 |
| 47416 | 0, // qsub1 |
| 47417 | 0, // qsub2 |
| 47418 | 0, // qsub3 |
| 47419 | 110, // ssub -> DDD |
| 47420 | 110, // ssub_hi -> DDD |
| 47421 | 0, // sub_32 |
| 47422 | 0, // sub_32_hi |
| 47423 | 0, // sube32 |
| 47424 | 0, // sube64 |
| 47425 | 0, // subo32 |
| 47426 | 0, // subo64 |
| 47427 | 0, // x8sub_0 |
| 47428 | 0, // x8sub_1 |
| 47429 | 0, // x8sub_2 |
| 47430 | 0, // x8sub_3 |
| 47431 | 0, // x8sub_4 |
| 47432 | 0, // x8sub_5 |
| 47433 | 0, // x8sub_6 |
| 47434 | 0, // x8sub_7 |
| 47435 | 0, // zasubb |
| 47436 | 0, // zasubd0 |
| 47437 | 0, // zasubd1 |
| 47438 | 0, // zasubh0 |
| 47439 | 0, // zasubh1 |
| 47440 | 0, // zasubq0 |
| 47441 | 0, // zasubq1 |
| 47442 | 0, // zasubs0 |
| 47443 | 0, // zasubs1 |
| 47444 | 0, // zsub |
| 47445 | 0, // zsub0 |
| 47446 | 0, // zsub1 |
| 47447 | 0, // zsub2 |
| 47448 | 0, // zsub3 |
| 47449 | 0, // zsub_hi |
| 47450 | 0, // zasubd1_then_zasubq0 |
| 47451 | 0, // zasubd1_then_zasubq1 |
| 47452 | 0, // zasubs1_then_zasubd0 |
| 47453 | 0, // zasubs1_then_zasubd1 |
| 47454 | 0, // zasubs1_then_zasubq0 |
| 47455 | 0, // zasubs1_then_zasubq1 |
| 47456 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47457 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47458 | 0, // zasubh1_then_zasubd0 |
| 47459 | 0, // zasubh1_then_zasubd1 |
| 47460 | 0, // zasubh1_then_zasubq0 |
| 47461 | 0, // zasubh1_then_zasubq1 |
| 47462 | 0, // zasubh1_then_zasubs0 |
| 47463 | 0, // zasubh1_then_zasubs1 |
| 47464 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47465 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47466 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47467 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47468 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47469 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47470 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47471 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47472 | 110, // dsub1_then_bsub -> DDD |
| 47473 | 110, // dsub1_then_bsub_hi -> DDD |
| 47474 | 110, // dsub1_then_hsub -> DDD |
| 47475 | 110, // dsub1_then_hsub_hi -> DDD |
| 47476 | 110, // dsub1_then_ssub -> DDD |
| 47477 | 110, // dsub1_then_ssub_hi -> DDD |
| 47478 | 0, // dsub3_then_bsub |
| 47479 | 0, // dsub3_then_bsub_hi |
| 47480 | 0, // dsub3_then_hsub |
| 47481 | 0, // dsub3_then_hsub_hi |
| 47482 | 0, // dsub3_then_ssub |
| 47483 | 0, // dsub3_then_ssub_hi |
| 47484 | 110, // dsub2_then_bsub -> DDD |
| 47485 | 110, // dsub2_then_bsub_hi -> DDD |
| 47486 | 110, // dsub2_then_hsub -> DDD |
| 47487 | 110, // dsub2_then_hsub_hi -> DDD |
| 47488 | 110, // dsub2_then_ssub -> DDD |
| 47489 | 110, // dsub2_then_ssub_hi -> DDD |
| 47490 | 0, // psub1_then_psub |
| 47491 | 0, // qsub1_then_dsub_hi |
| 47492 | 0, // qsub3_then_dsub_hi |
| 47493 | 0, // qsub2_then_dsub_hi |
| 47494 | 0, // x8sub_7_then_sub_32 |
| 47495 | 0, // x8sub_7_then_sub_32_hi |
| 47496 | 0, // x8sub_6_then_sub_32 |
| 47497 | 0, // x8sub_6_then_sub_32_hi |
| 47498 | 0, // x8sub_5_then_sub_32 |
| 47499 | 0, // x8sub_5_then_sub_32_hi |
| 47500 | 0, // x8sub_4_then_sub_32 |
| 47501 | 0, // x8sub_4_then_sub_32_hi |
| 47502 | 0, // x8sub_3_then_sub_32 |
| 47503 | 0, // x8sub_3_then_sub_32_hi |
| 47504 | 0, // x8sub_2_then_sub_32 |
| 47505 | 0, // x8sub_2_then_sub_32_hi |
| 47506 | 0, // x8sub_1_then_sub_32 |
| 47507 | 0, // x8sub_1_then_sub_32_hi |
| 47508 | 0, // subo64_then_sub_32 |
| 47509 | 0, // subo64_then_sub_32_hi |
| 47510 | 0, // zsub1_then_zsub_hi |
| 47511 | 0, // zsub3_then_zsub_hi |
| 47512 | 0, // zsub2_then_zsub_hi |
| 47513 | 110, // dsub0_dsub1 -> DDD |
| 47514 | 0, // dsub0_dsub1_dsub2 |
| 47515 | 110, // dsub1_dsub2 -> DDD |
| 47516 | 0, // dsub1_dsub2_dsub3 |
| 47517 | 0, // dsub2_dsub3 |
| 47518 | 0, // dsub_dsub1 |
| 47519 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47520 | 0, // dsub_dsub1_dsub2 |
| 47521 | 0, // qsub0_qsub1 |
| 47522 | 0, // qsub0_qsub1_qsub2 |
| 47523 | 0, // qsub1_qsub2 |
| 47524 | 0, // qsub1_qsub2_qsub3 |
| 47525 | 0, // qsub2_qsub3 |
| 47526 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47527 | 0, // x8sub_0_x8sub_1 |
| 47528 | 0, // x8sub_2_x8sub_3 |
| 47529 | 0, // x8sub_4_x8sub_5 |
| 47530 | 0, // x8sub_6_x8sub_7 |
| 47531 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47532 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47533 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47534 | 0, // sub_32_subo64_then_sub_32 |
| 47535 | 0, // zsub_qsub1 |
| 47536 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47537 | 0, // zsub_qsub1_qsub2 |
| 47538 | 0, // zsub0_zsub1 |
| 47539 | 0, // zsub0_zsub1_zsub2 |
| 47540 | 0, // zsub1_zsub2 |
| 47541 | 0, // zsub1_zsub2_zsub3 |
| 47542 | 0, // zsub2_zsub3 |
| 47543 | 0, // zsub0_zsub2 |
| 47544 | 0, // zsub1_zsub3 |
| 47545 | }, |
| 47546 | { // DDD_with_dsub0_in_FPR64_lo |
| 47547 | 111, // bsub -> DDD_with_dsub0_in_FPR64_lo |
| 47548 | 111, // bsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47549 | 0, // dsub |
| 47550 | 111, // dsub0 -> DDD_with_dsub0_in_FPR64_lo |
| 47551 | 111, // dsub1 -> DDD_with_dsub0_in_FPR64_lo |
| 47552 | 111, // dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 47553 | 0, // dsub3 |
| 47554 | 0, // dsub_hi |
| 47555 | 111, // hsub -> DDD_with_dsub0_in_FPR64_lo |
| 47556 | 111, // hsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47557 | 0, // psub |
| 47558 | 0, // psub0 |
| 47559 | 0, // psub1 |
| 47560 | 0, // qsub0 |
| 47561 | 0, // qsub1 |
| 47562 | 0, // qsub2 |
| 47563 | 0, // qsub3 |
| 47564 | 111, // ssub -> DDD_with_dsub0_in_FPR64_lo |
| 47565 | 111, // ssub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47566 | 0, // sub_32 |
| 47567 | 0, // sub_32_hi |
| 47568 | 0, // sube32 |
| 47569 | 0, // sube64 |
| 47570 | 0, // subo32 |
| 47571 | 0, // subo64 |
| 47572 | 0, // x8sub_0 |
| 47573 | 0, // x8sub_1 |
| 47574 | 0, // x8sub_2 |
| 47575 | 0, // x8sub_3 |
| 47576 | 0, // x8sub_4 |
| 47577 | 0, // x8sub_5 |
| 47578 | 0, // x8sub_6 |
| 47579 | 0, // x8sub_7 |
| 47580 | 0, // zasubb |
| 47581 | 0, // zasubd0 |
| 47582 | 0, // zasubd1 |
| 47583 | 0, // zasubh0 |
| 47584 | 0, // zasubh1 |
| 47585 | 0, // zasubq0 |
| 47586 | 0, // zasubq1 |
| 47587 | 0, // zasubs0 |
| 47588 | 0, // zasubs1 |
| 47589 | 0, // zsub |
| 47590 | 0, // zsub0 |
| 47591 | 0, // zsub1 |
| 47592 | 0, // zsub2 |
| 47593 | 0, // zsub3 |
| 47594 | 0, // zsub_hi |
| 47595 | 0, // zasubd1_then_zasubq0 |
| 47596 | 0, // zasubd1_then_zasubq1 |
| 47597 | 0, // zasubs1_then_zasubd0 |
| 47598 | 0, // zasubs1_then_zasubd1 |
| 47599 | 0, // zasubs1_then_zasubq0 |
| 47600 | 0, // zasubs1_then_zasubq1 |
| 47601 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47602 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47603 | 0, // zasubh1_then_zasubd0 |
| 47604 | 0, // zasubh1_then_zasubd1 |
| 47605 | 0, // zasubh1_then_zasubq0 |
| 47606 | 0, // zasubh1_then_zasubq1 |
| 47607 | 0, // zasubh1_then_zasubs0 |
| 47608 | 0, // zasubh1_then_zasubs1 |
| 47609 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47610 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47611 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47612 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47613 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47614 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47615 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47616 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47617 | 111, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo |
| 47618 | 111, // dsub1_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47619 | 111, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo |
| 47620 | 111, // dsub1_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47621 | 111, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo |
| 47622 | 111, // dsub1_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47623 | 0, // dsub3_then_bsub |
| 47624 | 0, // dsub3_then_bsub_hi |
| 47625 | 0, // dsub3_then_hsub |
| 47626 | 0, // dsub3_then_hsub_hi |
| 47627 | 0, // dsub3_then_ssub |
| 47628 | 0, // dsub3_then_ssub_hi |
| 47629 | 111, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo |
| 47630 | 111, // dsub2_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47631 | 111, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo |
| 47632 | 111, // dsub2_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47633 | 111, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo |
| 47634 | 111, // dsub2_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo |
| 47635 | 0, // psub1_then_psub |
| 47636 | 0, // qsub1_then_dsub_hi |
| 47637 | 0, // qsub3_then_dsub_hi |
| 47638 | 0, // qsub2_then_dsub_hi |
| 47639 | 0, // x8sub_7_then_sub_32 |
| 47640 | 0, // x8sub_7_then_sub_32_hi |
| 47641 | 0, // x8sub_6_then_sub_32 |
| 47642 | 0, // x8sub_6_then_sub_32_hi |
| 47643 | 0, // x8sub_5_then_sub_32 |
| 47644 | 0, // x8sub_5_then_sub_32_hi |
| 47645 | 0, // x8sub_4_then_sub_32 |
| 47646 | 0, // x8sub_4_then_sub_32_hi |
| 47647 | 0, // x8sub_3_then_sub_32 |
| 47648 | 0, // x8sub_3_then_sub_32_hi |
| 47649 | 0, // x8sub_2_then_sub_32 |
| 47650 | 0, // x8sub_2_then_sub_32_hi |
| 47651 | 0, // x8sub_1_then_sub_32 |
| 47652 | 0, // x8sub_1_then_sub_32_hi |
| 47653 | 0, // subo64_then_sub_32 |
| 47654 | 0, // subo64_then_sub_32_hi |
| 47655 | 0, // zsub1_then_zsub_hi |
| 47656 | 0, // zsub3_then_zsub_hi |
| 47657 | 0, // zsub2_then_zsub_hi |
| 47658 | 111, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo |
| 47659 | 0, // dsub0_dsub1_dsub2 |
| 47660 | 111, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 47661 | 0, // dsub1_dsub2_dsub3 |
| 47662 | 0, // dsub2_dsub3 |
| 47663 | 0, // dsub_dsub1 |
| 47664 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47665 | 0, // dsub_dsub1_dsub2 |
| 47666 | 0, // qsub0_qsub1 |
| 47667 | 0, // qsub0_qsub1_qsub2 |
| 47668 | 0, // qsub1_qsub2 |
| 47669 | 0, // qsub1_qsub2_qsub3 |
| 47670 | 0, // qsub2_qsub3 |
| 47671 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47672 | 0, // x8sub_0_x8sub_1 |
| 47673 | 0, // x8sub_2_x8sub_3 |
| 47674 | 0, // x8sub_4_x8sub_5 |
| 47675 | 0, // x8sub_6_x8sub_7 |
| 47676 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47677 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47678 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47679 | 0, // sub_32_subo64_then_sub_32 |
| 47680 | 0, // zsub_qsub1 |
| 47681 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47682 | 0, // zsub_qsub1_qsub2 |
| 47683 | 0, // zsub0_zsub1 |
| 47684 | 0, // zsub0_zsub1_zsub2 |
| 47685 | 0, // zsub1_zsub2 |
| 47686 | 0, // zsub1_zsub2_zsub3 |
| 47687 | 0, // zsub2_zsub3 |
| 47688 | 0, // zsub0_zsub2 |
| 47689 | 0, // zsub1_zsub3 |
| 47690 | }, |
| 47691 | { // DDD_with_dsub1_in_FPR64_lo |
| 47692 | 112, // bsub -> DDD_with_dsub1_in_FPR64_lo |
| 47693 | 112, // bsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47694 | 0, // dsub |
| 47695 | 112, // dsub0 -> DDD_with_dsub1_in_FPR64_lo |
| 47696 | 112, // dsub1 -> DDD_with_dsub1_in_FPR64_lo |
| 47697 | 112, // dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 47698 | 0, // dsub3 |
| 47699 | 0, // dsub_hi |
| 47700 | 112, // hsub -> DDD_with_dsub1_in_FPR64_lo |
| 47701 | 112, // hsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47702 | 0, // psub |
| 47703 | 0, // psub0 |
| 47704 | 0, // psub1 |
| 47705 | 0, // qsub0 |
| 47706 | 0, // qsub1 |
| 47707 | 0, // qsub2 |
| 47708 | 0, // qsub3 |
| 47709 | 112, // ssub -> DDD_with_dsub1_in_FPR64_lo |
| 47710 | 112, // ssub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47711 | 0, // sub_32 |
| 47712 | 0, // sub_32_hi |
| 47713 | 0, // sube32 |
| 47714 | 0, // sube64 |
| 47715 | 0, // subo32 |
| 47716 | 0, // subo64 |
| 47717 | 0, // x8sub_0 |
| 47718 | 0, // x8sub_1 |
| 47719 | 0, // x8sub_2 |
| 47720 | 0, // x8sub_3 |
| 47721 | 0, // x8sub_4 |
| 47722 | 0, // x8sub_5 |
| 47723 | 0, // x8sub_6 |
| 47724 | 0, // x8sub_7 |
| 47725 | 0, // zasubb |
| 47726 | 0, // zasubd0 |
| 47727 | 0, // zasubd1 |
| 47728 | 0, // zasubh0 |
| 47729 | 0, // zasubh1 |
| 47730 | 0, // zasubq0 |
| 47731 | 0, // zasubq1 |
| 47732 | 0, // zasubs0 |
| 47733 | 0, // zasubs1 |
| 47734 | 0, // zsub |
| 47735 | 0, // zsub0 |
| 47736 | 0, // zsub1 |
| 47737 | 0, // zsub2 |
| 47738 | 0, // zsub3 |
| 47739 | 0, // zsub_hi |
| 47740 | 0, // zasubd1_then_zasubq0 |
| 47741 | 0, // zasubd1_then_zasubq1 |
| 47742 | 0, // zasubs1_then_zasubd0 |
| 47743 | 0, // zasubs1_then_zasubd1 |
| 47744 | 0, // zasubs1_then_zasubq0 |
| 47745 | 0, // zasubs1_then_zasubq1 |
| 47746 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47747 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47748 | 0, // zasubh1_then_zasubd0 |
| 47749 | 0, // zasubh1_then_zasubd1 |
| 47750 | 0, // zasubh1_then_zasubq0 |
| 47751 | 0, // zasubh1_then_zasubq1 |
| 47752 | 0, // zasubh1_then_zasubs0 |
| 47753 | 0, // zasubh1_then_zasubs1 |
| 47754 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47755 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47756 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47757 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47758 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47759 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47760 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47761 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47762 | 112, // dsub1_then_bsub -> DDD_with_dsub1_in_FPR64_lo |
| 47763 | 112, // dsub1_then_bsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47764 | 112, // dsub1_then_hsub -> DDD_with_dsub1_in_FPR64_lo |
| 47765 | 112, // dsub1_then_hsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47766 | 112, // dsub1_then_ssub -> DDD_with_dsub1_in_FPR64_lo |
| 47767 | 112, // dsub1_then_ssub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47768 | 0, // dsub3_then_bsub |
| 47769 | 0, // dsub3_then_bsub_hi |
| 47770 | 0, // dsub3_then_hsub |
| 47771 | 0, // dsub3_then_hsub_hi |
| 47772 | 0, // dsub3_then_ssub |
| 47773 | 0, // dsub3_then_ssub_hi |
| 47774 | 112, // dsub2_then_bsub -> DDD_with_dsub1_in_FPR64_lo |
| 47775 | 112, // dsub2_then_bsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47776 | 112, // dsub2_then_hsub -> DDD_with_dsub1_in_FPR64_lo |
| 47777 | 112, // dsub2_then_hsub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47778 | 112, // dsub2_then_ssub -> DDD_with_dsub1_in_FPR64_lo |
| 47779 | 112, // dsub2_then_ssub_hi -> DDD_with_dsub1_in_FPR64_lo |
| 47780 | 0, // psub1_then_psub |
| 47781 | 0, // qsub1_then_dsub_hi |
| 47782 | 0, // qsub3_then_dsub_hi |
| 47783 | 0, // qsub2_then_dsub_hi |
| 47784 | 0, // x8sub_7_then_sub_32 |
| 47785 | 0, // x8sub_7_then_sub_32_hi |
| 47786 | 0, // x8sub_6_then_sub_32 |
| 47787 | 0, // x8sub_6_then_sub_32_hi |
| 47788 | 0, // x8sub_5_then_sub_32 |
| 47789 | 0, // x8sub_5_then_sub_32_hi |
| 47790 | 0, // x8sub_4_then_sub_32 |
| 47791 | 0, // x8sub_4_then_sub_32_hi |
| 47792 | 0, // x8sub_3_then_sub_32 |
| 47793 | 0, // x8sub_3_then_sub_32_hi |
| 47794 | 0, // x8sub_2_then_sub_32 |
| 47795 | 0, // x8sub_2_then_sub_32_hi |
| 47796 | 0, // x8sub_1_then_sub_32 |
| 47797 | 0, // x8sub_1_then_sub_32_hi |
| 47798 | 0, // subo64_then_sub_32 |
| 47799 | 0, // subo64_then_sub_32_hi |
| 47800 | 0, // zsub1_then_zsub_hi |
| 47801 | 0, // zsub3_then_zsub_hi |
| 47802 | 0, // zsub2_then_zsub_hi |
| 47803 | 112, // dsub0_dsub1 -> DDD_with_dsub1_in_FPR64_lo |
| 47804 | 0, // dsub0_dsub1_dsub2 |
| 47805 | 112, // dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 47806 | 0, // dsub1_dsub2_dsub3 |
| 47807 | 0, // dsub2_dsub3 |
| 47808 | 0, // dsub_dsub1 |
| 47809 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47810 | 0, // dsub_dsub1_dsub2 |
| 47811 | 0, // qsub0_qsub1 |
| 47812 | 0, // qsub0_qsub1_qsub2 |
| 47813 | 0, // qsub1_qsub2 |
| 47814 | 0, // qsub1_qsub2_qsub3 |
| 47815 | 0, // qsub2_qsub3 |
| 47816 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47817 | 0, // x8sub_0_x8sub_1 |
| 47818 | 0, // x8sub_2_x8sub_3 |
| 47819 | 0, // x8sub_4_x8sub_5 |
| 47820 | 0, // x8sub_6_x8sub_7 |
| 47821 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47822 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47823 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47824 | 0, // sub_32_subo64_then_sub_32 |
| 47825 | 0, // zsub_qsub1 |
| 47826 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47827 | 0, // zsub_qsub1_qsub2 |
| 47828 | 0, // zsub0_zsub1 |
| 47829 | 0, // zsub0_zsub1_zsub2 |
| 47830 | 0, // zsub1_zsub2 |
| 47831 | 0, // zsub1_zsub2_zsub3 |
| 47832 | 0, // zsub2_zsub3 |
| 47833 | 0, // zsub0_zsub2 |
| 47834 | 0, // zsub1_zsub3 |
| 47835 | }, |
| 47836 | { // DDD_with_dsub2_in_FPR64_lo |
| 47837 | 113, // bsub -> DDD_with_dsub2_in_FPR64_lo |
| 47838 | 113, // bsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47839 | 0, // dsub |
| 47840 | 113, // dsub0 -> DDD_with_dsub2_in_FPR64_lo |
| 47841 | 113, // dsub1 -> DDD_with_dsub2_in_FPR64_lo |
| 47842 | 113, // dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 47843 | 0, // dsub3 |
| 47844 | 0, // dsub_hi |
| 47845 | 113, // hsub -> DDD_with_dsub2_in_FPR64_lo |
| 47846 | 113, // hsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47847 | 0, // psub |
| 47848 | 0, // psub0 |
| 47849 | 0, // psub1 |
| 47850 | 0, // qsub0 |
| 47851 | 0, // qsub1 |
| 47852 | 0, // qsub2 |
| 47853 | 0, // qsub3 |
| 47854 | 113, // ssub -> DDD_with_dsub2_in_FPR64_lo |
| 47855 | 113, // ssub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47856 | 0, // sub_32 |
| 47857 | 0, // sub_32_hi |
| 47858 | 0, // sube32 |
| 47859 | 0, // sube64 |
| 47860 | 0, // subo32 |
| 47861 | 0, // subo64 |
| 47862 | 0, // x8sub_0 |
| 47863 | 0, // x8sub_1 |
| 47864 | 0, // x8sub_2 |
| 47865 | 0, // x8sub_3 |
| 47866 | 0, // x8sub_4 |
| 47867 | 0, // x8sub_5 |
| 47868 | 0, // x8sub_6 |
| 47869 | 0, // x8sub_7 |
| 47870 | 0, // zasubb |
| 47871 | 0, // zasubd0 |
| 47872 | 0, // zasubd1 |
| 47873 | 0, // zasubh0 |
| 47874 | 0, // zasubh1 |
| 47875 | 0, // zasubq0 |
| 47876 | 0, // zasubq1 |
| 47877 | 0, // zasubs0 |
| 47878 | 0, // zasubs1 |
| 47879 | 0, // zsub |
| 47880 | 0, // zsub0 |
| 47881 | 0, // zsub1 |
| 47882 | 0, // zsub2 |
| 47883 | 0, // zsub3 |
| 47884 | 0, // zsub_hi |
| 47885 | 0, // zasubd1_then_zasubq0 |
| 47886 | 0, // zasubd1_then_zasubq1 |
| 47887 | 0, // zasubs1_then_zasubd0 |
| 47888 | 0, // zasubs1_then_zasubd1 |
| 47889 | 0, // zasubs1_then_zasubq0 |
| 47890 | 0, // zasubs1_then_zasubq1 |
| 47891 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 47892 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 47893 | 0, // zasubh1_then_zasubd0 |
| 47894 | 0, // zasubh1_then_zasubd1 |
| 47895 | 0, // zasubh1_then_zasubq0 |
| 47896 | 0, // zasubh1_then_zasubq1 |
| 47897 | 0, // zasubh1_then_zasubs0 |
| 47898 | 0, // zasubh1_then_zasubs1 |
| 47899 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 47900 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 47901 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 47902 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 47903 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 47904 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 47905 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 47906 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 47907 | 113, // dsub1_then_bsub -> DDD_with_dsub2_in_FPR64_lo |
| 47908 | 113, // dsub1_then_bsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47909 | 113, // dsub1_then_hsub -> DDD_with_dsub2_in_FPR64_lo |
| 47910 | 113, // dsub1_then_hsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47911 | 113, // dsub1_then_ssub -> DDD_with_dsub2_in_FPR64_lo |
| 47912 | 113, // dsub1_then_ssub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47913 | 0, // dsub3_then_bsub |
| 47914 | 0, // dsub3_then_bsub_hi |
| 47915 | 0, // dsub3_then_hsub |
| 47916 | 0, // dsub3_then_hsub_hi |
| 47917 | 0, // dsub3_then_ssub |
| 47918 | 0, // dsub3_then_ssub_hi |
| 47919 | 113, // dsub2_then_bsub -> DDD_with_dsub2_in_FPR64_lo |
| 47920 | 113, // dsub2_then_bsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47921 | 113, // dsub2_then_hsub -> DDD_with_dsub2_in_FPR64_lo |
| 47922 | 113, // dsub2_then_hsub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47923 | 113, // dsub2_then_ssub -> DDD_with_dsub2_in_FPR64_lo |
| 47924 | 113, // dsub2_then_ssub_hi -> DDD_with_dsub2_in_FPR64_lo |
| 47925 | 0, // psub1_then_psub |
| 47926 | 0, // qsub1_then_dsub_hi |
| 47927 | 0, // qsub3_then_dsub_hi |
| 47928 | 0, // qsub2_then_dsub_hi |
| 47929 | 0, // x8sub_7_then_sub_32 |
| 47930 | 0, // x8sub_7_then_sub_32_hi |
| 47931 | 0, // x8sub_6_then_sub_32 |
| 47932 | 0, // x8sub_6_then_sub_32_hi |
| 47933 | 0, // x8sub_5_then_sub_32 |
| 47934 | 0, // x8sub_5_then_sub_32_hi |
| 47935 | 0, // x8sub_4_then_sub_32 |
| 47936 | 0, // x8sub_4_then_sub_32_hi |
| 47937 | 0, // x8sub_3_then_sub_32 |
| 47938 | 0, // x8sub_3_then_sub_32_hi |
| 47939 | 0, // x8sub_2_then_sub_32 |
| 47940 | 0, // x8sub_2_then_sub_32_hi |
| 47941 | 0, // x8sub_1_then_sub_32 |
| 47942 | 0, // x8sub_1_then_sub_32_hi |
| 47943 | 0, // subo64_then_sub_32 |
| 47944 | 0, // subo64_then_sub_32_hi |
| 47945 | 0, // zsub1_then_zsub_hi |
| 47946 | 0, // zsub3_then_zsub_hi |
| 47947 | 0, // zsub2_then_zsub_hi |
| 47948 | 113, // dsub0_dsub1 -> DDD_with_dsub2_in_FPR64_lo |
| 47949 | 0, // dsub0_dsub1_dsub2 |
| 47950 | 113, // dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 47951 | 0, // dsub1_dsub2_dsub3 |
| 47952 | 0, // dsub2_dsub3 |
| 47953 | 0, // dsub_dsub1 |
| 47954 | 0, // dsub_dsub1_dsub2_dsub3 |
| 47955 | 0, // dsub_dsub1_dsub2 |
| 47956 | 0, // qsub0_qsub1 |
| 47957 | 0, // qsub0_qsub1_qsub2 |
| 47958 | 0, // qsub1_qsub2 |
| 47959 | 0, // qsub1_qsub2_qsub3 |
| 47960 | 0, // qsub2_qsub3 |
| 47961 | 0, // sub_32_x8sub_1_then_sub_32 |
| 47962 | 0, // x8sub_0_x8sub_1 |
| 47963 | 0, // x8sub_2_x8sub_3 |
| 47964 | 0, // x8sub_4_x8sub_5 |
| 47965 | 0, // x8sub_6_x8sub_7 |
| 47966 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 47967 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 47968 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 47969 | 0, // sub_32_subo64_then_sub_32 |
| 47970 | 0, // zsub_qsub1 |
| 47971 | 0, // zsub_qsub1_qsub2_qsub3 |
| 47972 | 0, // zsub_qsub1_qsub2 |
| 47973 | 0, // zsub0_zsub1 |
| 47974 | 0, // zsub0_zsub1_zsub2 |
| 47975 | 0, // zsub1_zsub2 |
| 47976 | 0, // zsub1_zsub2_zsub3 |
| 47977 | 0, // zsub2_zsub3 |
| 47978 | 0, // zsub0_zsub2 |
| 47979 | 0, // zsub1_zsub3 |
| 47980 | }, |
| 47981 | { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47982 | 114, // bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47983 | 114, // bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47984 | 0, // dsub |
| 47985 | 114, // dsub0 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47986 | 114, // dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47987 | 114, // dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47988 | 0, // dsub3 |
| 47989 | 0, // dsub_hi |
| 47990 | 114, // hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47991 | 114, // hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 47992 | 0, // psub |
| 47993 | 0, // psub0 |
| 47994 | 0, // psub1 |
| 47995 | 0, // qsub0 |
| 47996 | 0, // qsub1 |
| 47997 | 0, // qsub2 |
| 47998 | 0, // qsub3 |
| 47999 | 114, // ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48000 | 114, // ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48001 | 0, // sub_32 |
| 48002 | 0, // sub_32_hi |
| 48003 | 0, // sube32 |
| 48004 | 0, // sube64 |
| 48005 | 0, // subo32 |
| 48006 | 0, // subo64 |
| 48007 | 0, // x8sub_0 |
| 48008 | 0, // x8sub_1 |
| 48009 | 0, // x8sub_2 |
| 48010 | 0, // x8sub_3 |
| 48011 | 0, // x8sub_4 |
| 48012 | 0, // x8sub_5 |
| 48013 | 0, // x8sub_6 |
| 48014 | 0, // x8sub_7 |
| 48015 | 0, // zasubb |
| 48016 | 0, // zasubd0 |
| 48017 | 0, // zasubd1 |
| 48018 | 0, // zasubh0 |
| 48019 | 0, // zasubh1 |
| 48020 | 0, // zasubq0 |
| 48021 | 0, // zasubq1 |
| 48022 | 0, // zasubs0 |
| 48023 | 0, // zasubs1 |
| 48024 | 0, // zsub |
| 48025 | 0, // zsub0 |
| 48026 | 0, // zsub1 |
| 48027 | 0, // zsub2 |
| 48028 | 0, // zsub3 |
| 48029 | 0, // zsub_hi |
| 48030 | 0, // zasubd1_then_zasubq0 |
| 48031 | 0, // zasubd1_then_zasubq1 |
| 48032 | 0, // zasubs1_then_zasubd0 |
| 48033 | 0, // zasubs1_then_zasubd1 |
| 48034 | 0, // zasubs1_then_zasubq0 |
| 48035 | 0, // zasubs1_then_zasubq1 |
| 48036 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48037 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48038 | 0, // zasubh1_then_zasubd0 |
| 48039 | 0, // zasubh1_then_zasubd1 |
| 48040 | 0, // zasubh1_then_zasubq0 |
| 48041 | 0, // zasubh1_then_zasubq1 |
| 48042 | 0, // zasubh1_then_zasubs0 |
| 48043 | 0, // zasubh1_then_zasubs1 |
| 48044 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48045 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48046 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48047 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48048 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48049 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48050 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48051 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48052 | 114, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48053 | 114, // dsub1_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48054 | 114, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48055 | 114, // dsub1_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48056 | 114, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48057 | 114, // dsub1_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48058 | 0, // dsub3_then_bsub |
| 48059 | 0, // dsub3_then_bsub_hi |
| 48060 | 0, // dsub3_then_hsub |
| 48061 | 0, // dsub3_then_hsub_hi |
| 48062 | 0, // dsub3_then_ssub |
| 48063 | 0, // dsub3_then_ssub_hi |
| 48064 | 114, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48065 | 114, // dsub2_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48066 | 114, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48067 | 114, // dsub2_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48068 | 114, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48069 | 114, // dsub2_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48070 | 0, // psub1_then_psub |
| 48071 | 0, // qsub1_then_dsub_hi |
| 48072 | 0, // qsub3_then_dsub_hi |
| 48073 | 0, // qsub2_then_dsub_hi |
| 48074 | 0, // x8sub_7_then_sub_32 |
| 48075 | 0, // x8sub_7_then_sub_32_hi |
| 48076 | 0, // x8sub_6_then_sub_32 |
| 48077 | 0, // x8sub_6_then_sub_32_hi |
| 48078 | 0, // x8sub_5_then_sub_32 |
| 48079 | 0, // x8sub_5_then_sub_32_hi |
| 48080 | 0, // x8sub_4_then_sub_32 |
| 48081 | 0, // x8sub_4_then_sub_32_hi |
| 48082 | 0, // x8sub_3_then_sub_32 |
| 48083 | 0, // x8sub_3_then_sub_32_hi |
| 48084 | 0, // x8sub_2_then_sub_32 |
| 48085 | 0, // x8sub_2_then_sub_32_hi |
| 48086 | 0, // x8sub_1_then_sub_32 |
| 48087 | 0, // x8sub_1_then_sub_32_hi |
| 48088 | 0, // subo64_then_sub_32 |
| 48089 | 0, // subo64_then_sub_32_hi |
| 48090 | 0, // zsub1_then_zsub_hi |
| 48091 | 0, // zsub3_then_zsub_hi |
| 48092 | 0, // zsub2_then_zsub_hi |
| 48093 | 114, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48094 | 0, // dsub0_dsub1_dsub2 |
| 48095 | 114, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 48096 | 0, // dsub1_dsub2_dsub3 |
| 48097 | 0, // dsub2_dsub3 |
| 48098 | 0, // dsub_dsub1 |
| 48099 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48100 | 0, // dsub_dsub1_dsub2 |
| 48101 | 0, // qsub0_qsub1 |
| 48102 | 0, // qsub0_qsub1_qsub2 |
| 48103 | 0, // qsub1_qsub2 |
| 48104 | 0, // qsub1_qsub2_qsub3 |
| 48105 | 0, // qsub2_qsub3 |
| 48106 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48107 | 0, // x8sub_0_x8sub_1 |
| 48108 | 0, // x8sub_2_x8sub_3 |
| 48109 | 0, // x8sub_4_x8sub_5 |
| 48110 | 0, // x8sub_6_x8sub_7 |
| 48111 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48112 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48113 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48114 | 0, // sub_32_subo64_then_sub_32 |
| 48115 | 0, // zsub_qsub1 |
| 48116 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48117 | 0, // zsub_qsub1_qsub2 |
| 48118 | 0, // zsub0_zsub1 |
| 48119 | 0, // zsub0_zsub1_zsub2 |
| 48120 | 0, // zsub1_zsub2 |
| 48121 | 0, // zsub1_zsub2_zsub3 |
| 48122 | 0, // zsub2_zsub3 |
| 48123 | 0, // zsub0_zsub2 |
| 48124 | 0, // zsub1_zsub3 |
| 48125 | }, |
| 48126 | { // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48127 | 115, // bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48128 | 115, // bsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48129 | 0, // dsub |
| 48130 | 115, // dsub0 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48131 | 115, // dsub1 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48132 | 115, // dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48133 | 0, // dsub3 |
| 48134 | 0, // dsub_hi |
| 48135 | 115, // hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48136 | 115, // hsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48137 | 0, // psub |
| 48138 | 0, // psub0 |
| 48139 | 0, // psub1 |
| 48140 | 0, // qsub0 |
| 48141 | 0, // qsub1 |
| 48142 | 0, // qsub2 |
| 48143 | 0, // qsub3 |
| 48144 | 115, // ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48145 | 115, // ssub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48146 | 0, // sub_32 |
| 48147 | 0, // sub_32_hi |
| 48148 | 0, // sube32 |
| 48149 | 0, // sube64 |
| 48150 | 0, // subo32 |
| 48151 | 0, // subo64 |
| 48152 | 0, // x8sub_0 |
| 48153 | 0, // x8sub_1 |
| 48154 | 0, // x8sub_2 |
| 48155 | 0, // x8sub_3 |
| 48156 | 0, // x8sub_4 |
| 48157 | 0, // x8sub_5 |
| 48158 | 0, // x8sub_6 |
| 48159 | 0, // x8sub_7 |
| 48160 | 0, // zasubb |
| 48161 | 0, // zasubd0 |
| 48162 | 0, // zasubd1 |
| 48163 | 0, // zasubh0 |
| 48164 | 0, // zasubh1 |
| 48165 | 0, // zasubq0 |
| 48166 | 0, // zasubq1 |
| 48167 | 0, // zasubs0 |
| 48168 | 0, // zasubs1 |
| 48169 | 0, // zsub |
| 48170 | 0, // zsub0 |
| 48171 | 0, // zsub1 |
| 48172 | 0, // zsub2 |
| 48173 | 0, // zsub3 |
| 48174 | 0, // zsub_hi |
| 48175 | 0, // zasubd1_then_zasubq0 |
| 48176 | 0, // zasubd1_then_zasubq1 |
| 48177 | 0, // zasubs1_then_zasubd0 |
| 48178 | 0, // zasubs1_then_zasubd1 |
| 48179 | 0, // zasubs1_then_zasubq0 |
| 48180 | 0, // zasubs1_then_zasubq1 |
| 48181 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48182 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48183 | 0, // zasubh1_then_zasubd0 |
| 48184 | 0, // zasubh1_then_zasubd1 |
| 48185 | 0, // zasubh1_then_zasubq0 |
| 48186 | 0, // zasubh1_then_zasubq1 |
| 48187 | 0, // zasubh1_then_zasubs0 |
| 48188 | 0, // zasubh1_then_zasubs1 |
| 48189 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48190 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48191 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48192 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48193 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48194 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48195 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48196 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48197 | 115, // dsub1_then_bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48198 | 115, // dsub1_then_bsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48199 | 115, // dsub1_then_hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48200 | 115, // dsub1_then_hsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48201 | 115, // dsub1_then_ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48202 | 115, // dsub1_then_ssub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48203 | 0, // dsub3_then_bsub |
| 48204 | 0, // dsub3_then_bsub_hi |
| 48205 | 0, // dsub3_then_hsub |
| 48206 | 0, // dsub3_then_hsub_hi |
| 48207 | 0, // dsub3_then_ssub |
| 48208 | 0, // dsub3_then_ssub_hi |
| 48209 | 115, // dsub2_then_bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48210 | 115, // dsub2_then_bsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48211 | 115, // dsub2_then_hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48212 | 115, // dsub2_then_hsub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48213 | 115, // dsub2_then_ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48214 | 115, // dsub2_then_ssub_hi -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48215 | 0, // psub1_then_psub |
| 48216 | 0, // qsub1_then_dsub_hi |
| 48217 | 0, // qsub3_then_dsub_hi |
| 48218 | 0, // qsub2_then_dsub_hi |
| 48219 | 0, // x8sub_7_then_sub_32 |
| 48220 | 0, // x8sub_7_then_sub_32_hi |
| 48221 | 0, // x8sub_6_then_sub_32 |
| 48222 | 0, // x8sub_6_then_sub_32_hi |
| 48223 | 0, // x8sub_5_then_sub_32 |
| 48224 | 0, // x8sub_5_then_sub_32_hi |
| 48225 | 0, // x8sub_4_then_sub_32 |
| 48226 | 0, // x8sub_4_then_sub_32_hi |
| 48227 | 0, // x8sub_3_then_sub_32 |
| 48228 | 0, // x8sub_3_then_sub_32_hi |
| 48229 | 0, // x8sub_2_then_sub_32 |
| 48230 | 0, // x8sub_2_then_sub_32_hi |
| 48231 | 0, // x8sub_1_then_sub_32 |
| 48232 | 0, // x8sub_1_then_sub_32_hi |
| 48233 | 0, // subo64_then_sub_32 |
| 48234 | 0, // subo64_then_sub_32_hi |
| 48235 | 0, // zsub1_then_zsub_hi |
| 48236 | 0, // zsub3_then_zsub_hi |
| 48237 | 0, // zsub2_then_zsub_hi |
| 48238 | 115, // dsub0_dsub1 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48239 | 0, // dsub0_dsub1_dsub2 |
| 48240 | 115, // dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48241 | 0, // dsub1_dsub2_dsub3 |
| 48242 | 0, // dsub2_dsub3 |
| 48243 | 0, // dsub_dsub1 |
| 48244 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48245 | 0, // dsub_dsub1_dsub2 |
| 48246 | 0, // qsub0_qsub1 |
| 48247 | 0, // qsub0_qsub1_qsub2 |
| 48248 | 0, // qsub1_qsub2 |
| 48249 | 0, // qsub1_qsub2_qsub3 |
| 48250 | 0, // qsub2_qsub3 |
| 48251 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48252 | 0, // x8sub_0_x8sub_1 |
| 48253 | 0, // x8sub_2_x8sub_3 |
| 48254 | 0, // x8sub_4_x8sub_5 |
| 48255 | 0, // x8sub_6_x8sub_7 |
| 48256 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48257 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48258 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48259 | 0, // sub_32_subo64_then_sub_32 |
| 48260 | 0, // zsub_qsub1 |
| 48261 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48262 | 0, // zsub_qsub1_qsub2 |
| 48263 | 0, // zsub0_zsub1 |
| 48264 | 0, // zsub0_zsub1_zsub2 |
| 48265 | 0, // zsub1_zsub2 |
| 48266 | 0, // zsub1_zsub2_zsub3 |
| 48267 | 0, // zsub2_zsub3 |
| 48268 | 0, // zsub0_zsub2 |
| 48269 | 0, // zsub1_zsub3 |
| 48270 | }, |
| 48271 | { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48272 | 116, // bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48273 | 116, // bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48274 | 0, // dsub |
| 48275 | 116, // dsub0 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48276 | 116, // dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48277 | 116, // dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48278 | 0, // dsub3 |
| 48279 | 0, // dsub_hi |
| 48280 | 116, // hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48281 | 116, // hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48282 | 0, // psub |
| 48283 | 0, // psub0 |
| 48284 | 0, // psub1 |
| 48285 | 0, // qsub0 |
| 48286 | 0, // qsub1 |
| 48287 | 0, // qsub2 |
| 48288 | 0, // qsub3 |
| 48289 | 116, // ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48290 | 116, // ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48291 | 0, // sub_32 |
| 48292 | 0, // sub_32_hi |
| 48293 | 0, // sube32 |
| 48294 | 0, // sube64 |
| 48295 | 0, // subo32 |
| 48296 | 0, // subo64 |
| 48297 | 0, // x8sub_0 |
| 48298 | 0, // x8sub_1 |
| 48299 | 0, // x8sub_2 |
| 48300 | 0, // x8sub_3 |
| 48301 | 0, // x8sub_4 |
| 48302 | 0, // x8sub_5 |
| 48303 | 0, // x8sub_6 |
| 48304 | 0, // x8sub_7 |
| 48305 | 0, // zasubb |
| 48306 | 0, // zasubd0 |
| 48307 | 0, // zasubd1 |
| 48308 | 0, // zasubh0 |
| 48309 | 0, // zasubh1 |
| 48310 | 0, // zasubq0 |
| 48311 | 0, // zasubq1 |
| 48312 | 0, // zasubs0 |
| 48313 | 0, // zasubs1 |
| 48314 | 0, // zsub |
| 48315 | 0, // zsub0 |
| 48316 | 0, // zsub1 |
| 48317 | 0, // zsub2 |
| 48318 | 0, // zsub3 |
| 48319 | 0, // zsub_hi |
| 48320 | 0, // zasubd1_then_zasubq0 |
| 48321 | 0, // zasubd1_then_zasubq1 |
| 48322 | 0, // zasubs1_then_zasubd0 |
| 48323 | 0, // zasubs1_then_zasubd1 |
| 48324 | 0, // zasubs1_then_zasubq0 |
| 48325 | 0, // zasubs1_then_zasubq1 |
| 48326 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48327 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48328 | 0, // zasubh1_then_zasubd0 |
| 48329 | 0, // zasubh1_then_zasubd1 |
| 48330 | 0, // zasubh1_then_zasubq0 |
| 48331 | 0, // zasubh1_then_zasubq1 |
| 48332 | 0, // zasubh1_then_zasubs0 |
| 48333 | 0, // zasubh1_then_zasubs1 |
| 48334 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48335 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48336 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48337 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48338 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48339 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48340 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48341 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48342 | 116, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48343 | 116, // dsub1_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48344 | 116, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48345 | 116, // dsub1_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48346 | 116, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48347 | 116, // dsub1_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48348 | 0, // dsub3_then_bsub |
| 48349 | 0, // dsub3_then_bsub_hi |
| 48350 | 0, // dsub3_then_hsub |
| 48351 | 0, // dsub3_then_hsub_hi |
| 48352 | 0, // dsub3_then_ssub |
| 48353 | 0, // dsub3_then_ssub_hi |
| 48354 | 116, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48355 | 116, // dsub2_then_bsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48356 | 116, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48357 | 116, // dsub2_then_hsub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48358 | 116, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48359 | 116, // dsub2_then_ssub_hi -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48360 | 0, // psub1_then_psub |
| 48361 | 0, // qsub1_then_dsub_hi |
| 48362 | 0, // qsub3_then_dsub_hi |
| 48363 | 0, // qsub2_then_dsub_hi |
| 48364 | 0, // x8sub_7_then_sub_32 |
| 48365 | 0, // x8sub_7_then_sub_32_hi |
| 48366 | 0, // x8sub_6_then_sub_32 |
| 48367 | 0, // x8sub_6_then_sub_32_hi |
| 48368 | 0, // x8sub_5_then_sub_32 |
| 48369 | 0, // x8sub_5_then_sub_32_hi |
| 48370 | 0, // x8sub_4_then_sub_32 |
| 48371 | 0, // x8sub_4_then_sub_32_hi |
| 48372 | 0, // x8sub_3_then_sub_32 |
| 48373 | 0, // x8sub_3_then_sub_32_hi |
| 48374 | 0, // x8sub_2_then_sub_32 |
| 48375 | 0, // x8sub_2_then_sub_32_hi |
| 48376 | 0, // x8sub_1_then_sub_32 |
| 48377 | 0, // x8sub_1_then_sub_32_hi |
| 48378 | 0, // subo64_then_sub_32 |
| 48379 | 0, // subo64_then_sub_32_hi |
| 48380 | 0, // zsub1_then_zsub_hi |
| 48381 | 0, // zsub3_then_zsub_hi |
| 48382 | 0, // zsub2_then_zsub_hi |
| 48383 | 116, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48384 | 0, // dsub0_dsub1_dsub2 |
| 48385 | 116, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 48386 | 0, // dsub1_dsub2_dsub3 |
| 48387 | 0, // dsub2_dsub3 |
| 48388 | 0, // dsub_dsub1 |
| 48389 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48390 | 0, // dsub_dsub1_dsub2 |
| 48391 | 0, // qsub0_qsub1 |
| 48392 | 0, // qsub0_qsub1_qsub2 |
| 48393 | 0, // qsub1_qsub2 |
| 48394 | 0, // qsub1_qsub2_qsub3 |
| 48395 | 0, // qsub2_qsub3 |
| 48396 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48397 | 0, // x8sub_0_x8sub_1 |
| 48398 | 0, // x8sub_2_x8sub_3 |
| 48399 | 0, // x8sub_4_x8sub_5 |
| 48400 | 0, // x8sub_6_x8sub_7 |
| 48401 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48402 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48403 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48404 | 0, // sub_32_subo64_then_sub_32 |
| 48405 | 0, // zsub_qsub1 |
| 48406 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48407 | 0, // zsub_qsub1_qsub2 |
| 48408 | 0, // zsub0_zsub1 |
| 48409 | 0, // zsub0_zsub1_zsub2 |
| 48410 | 0, // zsub1_zsub2 |
| 48411 | 0, // zsub1_zsub2_zsub3 |
| 48412 | 0, // zsub2_zsub3 |
| 48413 | 0, // zsub0_zsub2 |
| 48414 | 0, // zsub1_zsub3 |
| 48415 | }, |
| 48416 | { // DDDD |
| 48417 | 117, // bsub -> DDDD |
| 48418 | 117, // bsub_hi -> DDDD |
| 48419 | 0, // dsub |
| 48420 | 117, // dsub0 -> DDDD |
| 48421 | 117, // dsub1 -> DDDD |
| 48422 | 117, // dsub2 -> DDDD |
| 48423 | 117, // dsub3 -> DDDD |
| 48424 | 0, // dsub_hi |
| 48425 | 117, // hsub -> DDDD |
| 48426 | 117, // hsub_hi -> DDDD |
| 48427 | 0, // psub |
| 48428 | 0, // psub0 |
| 48429 | 0, // psub1 |
| 48430 | 0, // qsub0 |
| 48431 | 0, // qsub1 |
| 48432 | 0, // qsub2 |
| 48433 | 0, // qsub3 |
| 48434 | 117, // ssub -> DDDD |
| 48435 | 117, // ssub_hi -> DDDD |
| 48436 | 0, // sub_32 |
| 48437 | 0, // sub_32_hi |
| 48438 | 0, // sube32 |
| 48439 | 0, // sube64 |
| 48440 | 0, // subo32 |
| 48441 | 0, // subo64 |
| 48442 | 0, // x8sub_0 |
| 48443 | 0, // x8sub_1 |
| 48444 | 0, // x8sub_2 |
| 48445 | 0, // x8sub_3 |
| 48446 | 0, // x8sub_4 |
| 48447 | 0, // x8sub_5 |
| 48448 | 0, // x8sub_6 |
| 48449 | 0, // x8sub_7 |
| 48450 | 0, // zasubb |
| 48451 | 0, // zasubd0 |
| 48452 | 0, // zasubd1 |
| 48453 | 0, // zasubh0 |
| 48454 | 0, // zasubh1 |
| 48455 | 0, // zasubq0 |
| 48456 | 0, // zasubq1 |
| 48457 | 0, // zasubs0 |
| 48458 | 0, // zasubs1 |
| 48459 | 0, // zsub |
| 48460 | 0, // zsub0 |
| 48461 | 0, // zsub1 |
| 48462 | 0, // zsub2 |
| 48463 | 0, // zsub3 |
| 48464 | 0, // zsub_hi |
| 48465 | 0, // zasubd1_then_zasubq0 |
| 48466 | 0, // zasubd1_then_zasubq1 |
| 48467 | 0, // zasubs1_then_zasubd0 |
| 48468 | 0, // zasubs1_then_zasubd1 |
| 48469 | 0, // zasubs1_then_zasubq0 |
| 48470 | 0, // zasubs1_then_zasubq1 |
| 48471 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48472 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48473 | 0, // zasubh1_then_zasubd0 |
| 48474 | 0, // zasubh1_then_zasubd1 |
| 48475 | 0, // zasubh1_then_zasubq0 |
| 48476 | 0, // zasubh1_then_zasubq1 |
| 48477 | 0, // zasubh1_then_zasubs0 |
| 48478 | 0, // zasubh1_then_zasubs1 |
| 48479 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48480 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48481 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48482 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48483 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48484 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48485 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48486 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48487 | 117, // dsub1_then_bsub -> DDDD |
| 48488 | 117, // dsub1_then_bsub_hi -> DDDD |
| 48489 | 117, // dsub1_then_hsub -> DDDD |
| 48490 | 117, // dsub1_then_hsub_hi -> DDDD |
| 48491 | 117, // dsub1_then_ssub -> DDDD |
| 48492 | 117, // dsub1_then_ssub_hi -> DDDD |
| 48493 | 117, // dsub3_then_bsub -> DDDD |
| 48494 | 117, // dsub3_then_bsub_hi -> DDDD |
| 48495 | 117, // dsub3_then_hsub -> DDDD |
| 48496 | 117, // dsub3_then_hsub_hi -> DDDD |
| 48497 | 117, // dsub3_then_ssub -> DDDD |
| 48498 | 117, // dsub3_then_ssub_hi -> DDDD |
| 48499 | 117, // dsub2_then_bsub -> DDDD |
| 48500 | 117, // dsub2_then_bsub_hi -> DDDD |
| 48501 | 117, // dsub2_then_hsub -> DDDD |
| 48502 | 117, // dsub2_then_hsub_hi -> DDDD |
| 48503 | 117, // dsub2_then_ssub -> DDDD |
| 48504 | 117, // dsub2_then_ssub_hi -> DDDD |
| 48505 | 0, // psub1_then_psub |
| 48506 | 0, // qsub1_then_dsub_hi |
| 48507 | 0, // qsub3_then_dsub_hi |
| 48508 | 0, // qsub2_then_dsub_hi |
| 48509 | 0, // x8sub_7_then_sub_32 |
| 48510 | 0, // x8sub_7_then_sub_32_hi |
| 48511 | 0, // x8sub_6_then_sub_32 |
| 48512 | 0, // x8sub_6_then_sub_32_hi |
| 48513 | 0, // x8sub_5_then_sub_32 |
| 48514 | 0, // x8sub_5_then_sub_32_hi |
| 48515 | 0, // x8sub_4_then_sub_32 |
| 48516 | 0, // x8sub_4_then_sub_32_hi |
| 48517 | 0, // x8sub_3_then_sub_32 |
| 48518 | 0, // x8sub_3_then_sub_32_hi |
| 48519 | 0, // x8sub_2_then_sub_32 |
| 48520 | 0, // x8sub_2_then_sub_32_hi |
| 48521 | 0, // x8sub_1_then_sub_32 |
| 48522 | 0, // x8sub_1_then_sub_32_hi |
| 48523 | 0, // subo64_then_sub_32 |
| 48524 | 0, // subo64_then_sub_32_hi |
| 48525 | 0, // zsub1_then_zsub_hi |
| 48526 | 0, // zsub3_then_zsub_hi |
| 48527 | 0, // zsub2_then_zsub_hi |
| 48528 | 117, // dsub0_dsub1 -> DDDD |
| 48529 | 117, // dsub0_dsub1_dsub2 -> DDDD |
| 48530 | 117, // dsub1_dsub2 -> DDDD |
| 48531 | 117, // dsub1_dsub2_dsub3 -> DDDD |
| 48532 | 117, // dsub2_dsub3 -> DDDD |
| 48533 | 0, // dsub_dsub1 |
| 48534 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48535 | 0, // dsub_dsub1_dsub2 |
| 48536 | 0, // qsub0_qsub1 |
| 48537 | 0, // qsub0_qsub1_qsub2 |
| 48538 | 0, // qsub1_qsub2 |
| 48539 | 0, // qsub1_qsub2_qsub3 |
| 48540 | 0, // qsub2_qsub3 |
| 48541 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48542 | 0, // x8sub_0_x8sub_1 |
| 48543 | 0, // x8sub_2_x8sub_3 |
| 48544 | 0, // x8sub_4_x8sub_5 |
| 48545 | 0, // x8sub_6_x8sub_7 |
| 48546 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48547 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48548 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48549 | 0, // sub_32_subo64_then_sub_32 |
| 48550 | 0, // zsub_qsub1 |
| 48551 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48552 | 0, // zsub_qsub1_qsub2 |
| 48553 | 0, // zsub0_zsub1 |
| 48554 | 0, // zsub0_zsub1_zsub2 |
| 48555 | 0, // zsub1_zsub2 |
| 48556 | 0, // zsub1_zsub2_zsub3 |
| 48557 | 0, // zsub2_zsub3 |
| 48558 | 0, // zsub0_zsub2 |
| 48559 | 0, // zsub1_zsub3 |
| 48560 | }, |
| 48561 | { // DDDD_with_dsub0_in_FPR64_lo |
| 48562 | 118, // bsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48563 | 118, // bsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48564 | 0, // dsub |
| 48565 | 118, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo |
| 48566 | 118, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo |
| 48567 | 118, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo |
| 48568 | 118, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 48569 | 0, // dsub_hi |
| 48570 | 118, // hsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48571 | 118, // hsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48572 | 0, // psub |
| 48573 | 0, // psub0 |
| 48574 | 0, // psub1 |
| 48575 | 0, // qsub0 |
| 48576 | 0, // qsub1 |
| 48577 | 0, // qsub2 |
| 48578 | 0, // qsub3 |
| 48579 | 118, // ssub -> DDDD_with_dsub0_in_FPR64_lo |
| 48580 | 118, // ssub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48581 | 0, // sub_32 |
| 48582 | 0, // sub_32_hi |
| 48583 | 0, // sube32 |
| 48584 | 0, // sube64 |
| 48585 | 0, // subo32 |
| 48586 | 0, // subo64 |
| 48587 | 0, // x8sub_0 |
| 48588 | 0, // x8sub_1 |
| 48589 | 0, // x8sub_2 |
| 48590 | 0, // x8sub_3 |
| 48591 | 0, // x8sub_4 |
| 48592 | 0, // x8sub_5 |
| 48593 | 0, // x8sub_6 |
| 48594 | 0, // x8sub_7 |
| 48595 | 0, // zasubb |
| 48596 | 0, // zasubd0 |
| 48597 | 0, // zasubd1 |
| 48598 | 0, // zasubh0 |
| 48599 | 0, // zasubh1 |
| 48600 | 0, // zasubq0 |
| 48601 | 0, // zasubq1 |
| 48602 | 0, // zasubs0 |
| 48603 | 0, // zasubs1 |
| 48604 | 0, // zsub |
| 48605 | 0, // zsub0 |
| 48606 | 0, // zsub1 |
| 48607 | 0, // zsub2 |
| 48608 | 0, // zsub3 |
| 48609 | 0, // zsub_hi |
| 48610 | 0, // zasubd1_then_zasubq0 |
| 48611 | 0, // zasubd1_then_zasubq1 |
| 48612 | 0, // zasubs1_then_zasubd0 |
| 48613 | 0, // zasubs1_then_zasubd1 |
| 48614 | 0, // zasubs1_then_zasubq0 |
| 48615 | 0, // zasubs1_then_zasubq1 |
| 48616 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48617 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48618 | 0, // zasubh1_then_zasubd0 |
| 48619 | 0, // zasubh1_then_zasubd1 |
| 48620 | 0, // zasubh1_then_zasubq0 |
| 48621 | 0, // zasubh1_then_zasubq1 |
| 48622 | 0, // zasubh1_then_zasubs0 |
| 48623 | 0, // zasubh1_then_zasubs1 |
| 48624 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48625 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48626 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48627 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48628 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48629 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48630 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48631 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48632 | 118, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48633 | 118, // dsub1_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48634 | 118, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48635 | 118, // dsub1_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48636 | 118, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo |
| 48637 | 118, // dsub1_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48638 | 118, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48639 | 118, // dsub3_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48640 | 118, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48641 | 118, // dsub3_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48642 | 118, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo |
| 48643 | 118, // dsub3_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48644 | 118, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48645 | 118, // dsub2_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48646 | 118, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo |
| 48647 | 118, // dsub2_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48648 | 118, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo |
| 48649 | 118, // dsub2_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo |
| 48650 | 0, // psub1_then_psub |
| 48651 | 0, // qsub1_then_dsub_hi |
| 48652 | 0, // qsub3_then_dsub_hi |
| 48653 | 0, // qsub2_then_dsub_hi |
| 48654 | 0, // x8sub_7_then_sub_32 |
| 48655 | 0, // x8sub_7_then_sub_32_hi |
| 48656 | 0, // x8sub_6_then_sub_32 |
| 48657 | 0, // x8sub_6_then_sub_32_hi |
| 48658 | 0, // x8sub_5_then_sub_32 |
| 48659 | 0, // x8sub_5_then_sub_32_hi |
| 48660 | 0, // x8sub_4_then_sub_32 |
| 48661 | 0, // x8sub_4_then_sub_32_hi |
| 48662 | 0, // x8sub_3_then_sub_32 |
| 48663 | 0, // x8sub_3_then_sub_32_hi |
| 48664 | 0, // x8sub_2_then_sub_32 |
| 48665 | 0, // x8sub_2_then_sub_32_hi |
| 48666 | 0, // x8sub_1_then_sub_32 |
| 48667 | 0, // x8sub_1_then_sub_32_hi |
| 48668 | 0, // subo64_then_sub_32 |
| 48669 | 0, // subo64_then_sub_32_hi |
| 48670 | 0, // zsub1_then_zsub_hi |
| 48671 | 0, // zsub3_then_zsub_hi |
| 48672 | 0, // zsub2_then_zsub_hi |
| 48673 | 118, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo |
| 48674 | 118, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo |
| 48675 | 118, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo |
| 48676 | 118, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 48677 | 118, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 48678 | 0, // dsub_dsub1 |
| 48679 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48680 | 0, // dsub_dsub1_dsub2 |
| 48681 | 0, // qsub0_qsub1 |
| 48682 | 0, // qsub0_qsub1_qsub2 |
| 48683 | 0, // qsub1_qsub2 |
| 48684 | 0, // qsub1_qsub2_qsub3 |
| 48685 | 0, // qsub2_qsub3 |
| 48686 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48687 | 0, // x8sub_0_x8sub_1 |
| 48688 | 0, // x8sub_2_x8sub_3 |
| 48689 | 0, // x8sub_4_x8sub_5 |
| 48690 | 0, // x8sub_6_x8sub_7 |
| 48691 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48692 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48693 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48694 | 0, // sub_32_subo64_then_sub_32 |
| 48695 | 0, // zsub_qsub1 |
| 48696 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48697 | 0, // zsub_qsub1_qsub2 |
| 48698 | 0, // zsub0_zsub1 |
| 48699 | 0, // zsub0_zsub1_zsub2 |
| 48700 | 0, // zsub1_zsub2 |
| 48701 | 0, // zsub1_zsub2_zsub3 |
| 48702 | 0, // zsub2_zsub3 |
| 48703 | 0, // zsub0_zsub2 |
| 48704 | 0, // zsub1_zsub3 |
| 48705 | }, |
| 48706 | { // DDDD_with_dsub1_in_FPR64_lo |
| 48707 | 119, // bsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48708 | 119, // bsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48709 | 0, // dsub |
| 48710 | 119, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo |
| 48711 | 119, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo |
| 48712 | 119, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo |
| 48713 | 119, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo |
| 48714 | 0, // dsub_hi |
| 48715 | 119, // hsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48716 | 119, // hsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48717 | 0, // psub |
| 48718 | 0, // psub0 |
| 48719 | 0, // psub1 |
| 48720 | 0, // qsub0 |
| 48721 | 0, // qsub1 |
| 48722 | 0, // qsub2 |
| 48723 | 0, // qsub3 |
| 48724 | 119, // ssub -> DDDD_with_dsub1_in_FPR64_lo |
| 48725 | 119, // ssub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48726 | 0, // sub_32 |
| 48727 | 0, // sub_32_hi |
| 48728 | 0, // sube32 |
| 48729 | 0, // sube64 |
| 48730 | 0, // subo32 |
| 48731 | 0, // subo64 |
| 48732 | 0, // x8sub_0 |
| 48733 | 0, // x8sub_1 |
| 48734 | 0, // x8sub_2 |
| 48735 | 0, // x8sub_3 |
| 48736 | 0, // x8sub_4 |
| 48737 | 0, // x8sub_5 |
| 48738 | 0, // x8sub_6 |
| 48739 | 0, // x8sub_7 |
| 48740 | 0, // zasubb |
| 48741 | 0, // zasubd0 |
| 48742 | 0, // zasubd1 |
| 48743 | 0, // zasubh0 |
| 48744 | 0, // zasubh1 |
| 48745 | 0, // zasubq0 |
| 48746 | 0, // zasubq1 |
| 48747 | 0, // zasubs0 |
| 48748 | 0, // zasubs1 |
| 48749 | 0, // zsub |
| 48750 | 0, // zsub0 |
| 48751 | 0, // zsub1 |
| 48752 | 0, // zsub2 |
| 48753 | 0, // zsub3 |
| 48754 | 0, // zsub_hi |
| 48755 | 0, // zasubd1_then_zasubq0 |
| 48756 | 0, // zasubd1_then_zasubq1 |
| 48757 | 0, // zasubs1_then_zasubd0 |
| 48758 | 0, // zasubs1_then_zasubd1 |
| 48759 | 0, // zasubs1_then_zasubq0 |
| 48760 | 0, // zasubs1_then_zasubq1 |
| 48761 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48762 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48763 | 0, // zasubh1_then_zasubd0 |
| 48764 | 0, // zasubh1_then_zasubd1 |
| 48765 | 0, // zasubh1_then_zasubq0 |
| 48766 | 0, // zasubh1_then_zasubq1 |
| 48767 | 0, // zasubh1_then_zasubs0 |
| 48768 | 0, // zasubh1_then_zasubs1 |
| 48769 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48770 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48771 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48772 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48773 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48774 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48775 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48776 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48777 | 119, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48778 | 119, // dsub1_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48779 | 119, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48780 | 119, // dsub1_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48781 | 119, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo |
| 48782 | 119, // dsub1_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48783 | 119, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48784 | 119, // dsub3_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48785 | 119, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48786 | 119, // dsub3_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48787 | 119, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo |
| 48788 | 119, // dsub3_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48789 | 119, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48790 | 119, // dsub2_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48791 | 119, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo |
| 48792 | 119, // dsub2_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48793 | 119, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo |
| 48794 | 119, // dsub2_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo |
| 48795 | 0, // psub1_then_psub |
| 48796 | 0, // qsub1_then_dsub_hi |
| 48797 | 0, // qsub3_then_dsub_hi |
| 48798 | 0, // qsub2_then_dsub_hi |
| 48799 | 0, // x8sub_7_then_sub_32 |
| 48800 | 0, // x8sub_7_then_sub_32_hi |
| 48801 | 0, // x8sub_6_then_sub_32 |
| 48802 | 0, // x8sub_6_then_sub_32_hi |
| 48803 | 0, // x8sub_5_then_sub_32 |
| 48804 | 0, // x8sub_5_then_sub_32_hi |
| 48805 | 0, // x8sub_4_then_sub_32 |
| 48806 | 0, // x8sub_4_then_sub_32_hi |
| 48807 | 0, // x8sub_3_then_sub_32 |
| 48808 | 0, // x8sub_3_then_sub_32_hi |
| 48809 | 0, // x8sub_2_then_sub_32 |
| 48810 | 0, // x8sub_2_then_sub_32_hi |
| 48811 | 0, // x8sub_1_then_sub_32 |
| 48812 | 0, // x8sub_1_then_sub_32_hi |
| 48813 | 0, // subo64_then_sub_32 |
| 48814 | 0, // subo64_then_sub_32_hi |
| 48815 | 0, // zsub1_then_zsub_hi |
| 48816 | 0, // zsub3_then_zsub_hi |
| 48817 | 0, // zsub2_then_zsub_hi |
| 48818 | 119, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo |
| 48819 | 119, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo |
| 48820 | 119, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo |
| 48821 | 119, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo |
| 48822 | 119, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo |
| 48823 | 0, // dsub_dsub1 |
| 48824 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48825 | 0, // dsub_dsub1_dsub2 |
| 48826 | 0, // qsub0_qsub1 |
| 48827 | 0, // qsub0_qsub1_qsub2 |
| 48828 | 0, // qsub1_qsub2 |
| 48829 | 0, // qsub1_qsub2_qsub3 |
| 48830 | 0, // qsub2_qsub3 |
| 48831 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48832 | 0, // x8sub_0_x8sub_1 |
| 48833 | 0, // x8sub_2_x8sub_3 |
| 48834 | 0, // x8sub_4_x8sub_5 |
| 48835 | 0, // x8sub_6_x8sub_7 |
| 48836 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48837 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48838 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48839 | 0, // sub_32_subo64_then_sub_32 |
| 48840 | 0, // zsub_qsub1 |
| 48841 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48842 | 0, // zsub_qsub1_qsub2 |
| 48843 | 0, // zsub0_zsub1 |
| 48844 | 0, // zsub0_zsub1_zsub2 |
| 48845 | 0, // zsub1_zsub2 |
| 48846 | 0, // zsub1_zsub2_zsub3 |
| 48847 | 0, // zsub2_zsub3 |
| 48848 | 0, // zsub0_zsub2 |
| 48849 | 0, // zsub1_zsub3 |
| 48850 | }, |
| 48851 | { // DDDD_with_dsub2_in_FPR64_lo |
| 48852 | 120, // bsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48853 | 120, // bsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48854 | 0, // dsub |
| 48855 | 120, // dsub0 -> DDDD_with_dsub2_in_FPR64_lo |
| 48856 | 120, // dsub1 -> DDDD_with_dsub2_in_FPR64_lo |
| 48857 | 120, // dsub2 -> DDDD_with_dsub2_in_FPR64_lo |
| 48858 | 120, // dsub3 -> DDDD_with_dsub2_in_FPR64_lo |
| 48859 | 0, // dsub_hi |
| 48860 | 120, // hsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48861 | 120, // hsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48862 | 0, // psub |
| 48863 | 0, // psub0 |
| 48864 | 0, // psub1 |
| 48865 | 0, // qsub0 |
| 48866 | 0, // qsub1 |
| 48867 | 0, // qsub2 |
| 48868 | 0, // qsub3 |
| 48869 | 120, // ssub -> DDDD_with_dsub2_in_FPR64_lo |
| 48870 | 120, // ssub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48871 | 0, // sub_32 |
| 48872 | 0, // sub_32_hi |
| 48873 | 0, // sube32 |
| 48874 | 0, // sube64 |
| 48875 | 0, // subo32 |
| 48876 | 0, // subo64 |
| 48877 | 0, // x8sub_0 |
| 48878 | 0, // x8sub_1 |
| 48879 | 0, // x8sub_2 |
| 48880 | 0, // x8sub_3 |
| 48881 | 0, // x8sub_4 |
| 48882 | 0, // x8sub_5 |
| 48883 | 0, // x8sub_6 |
| 48884 | 0, // x8sub_7 |
| 48885 | 0, // zasubb |
| 48886 | 0, // zasubd0 |
| 48887 | 0, // zasubd1 |
| 48888 | 0, // zasubh0 |
| 48889 | 0, // zasubh1 |
| 48890 | 0, // zasubq0 |
| 48891 | 0, // zasubq1 |
| 48892 | 0, // zasubs0 |
| 48893 | 0, // zasubs1 |
| 48894 | 0, // zsub |
| 48895 | 0, // zsub0 |
| 48896 | 0, // zsub1 |
| 48897 | 0, // zsub2 |
| 48898 | 0, // zsub3 |
| 48899 | 0, // zsub_hi |
| 48900 | 0, // zasubd1_then_zasubq0 |
| 48901 | 0, // zasubd1_then_zasubq1 |
| 48902 | 0, // zasubs1_then_zasubd0 |
| 48903 | 0, // zasubs1_then_zasubd1 |
| 48904 | 0, // zasubs1_then_zasubq0 |
| 48905 | 0, // zasubs1_then_zasubq1 |
| 48906 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 48907 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 48908 | 0, // zasubh1_then_zasubd0 |
| 48909 | 0, // zasubh1_then_zasubd1 |
| 48910 | 0, // zasubh1_then_zasubq0 |
| 48911 | 0, // zasubh1_then_zasubq1 |
| 48912 | 0, // zasubh1_then_zasubs0 |
| 48913 | 0, // zasubh1_then_zasubs1 |
| 48914 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 48915 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 48916 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 48917 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 48918 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 48919 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 48920 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 48921 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 48922 | 120, // dsub1_then_bsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48923 | 120, // dsub1_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48924 | 120, // dsub1_then_hsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48925 | 120, // dsub1_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48926 | 120, // dsub1_then_ssub -> DDDD_with_dsub2_in_FPR64_lo |
| 48927 | 120, // dsub1_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48928 | 120, // dsub3_then_bsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48929 | 120, // dsub3_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48930 | 120, // dsub3_then_hsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48931 | 120, // dsub3_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48932 | 120, // dsub3_then_ssub -> DDDD_with_dsub2_in_FPR64_lo |
| 48933 | 120, // dsub3_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48934 | 120, // dsub2_then_bsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48935 | 120, // dsub2_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48936 | 120, // dsub2_then_hsub -> DDDD_with_dsub2_in_FPR64_lo |
| 48937 | 120, // dsub2_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48938 | 120, // dsub2_then_ssub -> DDDD_with_dsub2_in_FPR64_lo |
| 48939 | 120, // dsub2_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo |
| 48940 | 0, // psub1_then_psub |
| 48941 | 0, // qsub1_then_dsub_hi |
| 48942 | 0, // qsub3_then_dsub_hi |
| 48943 | 0, // qsub2_then_dsub_hi |
| 48944 | 0, // x8sub_7_then_sub_32 |
| 48945 | 0, // x8sub_7_then_sub_32_hi |
| 48946 | 0, // x8sub_6_then_sub_32 |
| 48947 | 0, // x8sub_6_then_sub_32_hi |
| 48948 | 0, // x8sub_5_then_sub_32 |
| 48949 | 0, // x8sub_5_then_sub_32_hi |
| 48950 | 0, // x8sub_4_then_sub_32 |
| 48951 | 0, // x8sub_4_then_sub_32_hi |
| 48952 | 0, // x8sub_3_then_sub_32 |
| 48953 | 0, // x8sub_3_then_sub_32_hi |
| 48954 | 0, // x8sub_2_then_sub_32 |
| 48955 | 0, // x8sub_2_then_sub_32_hi |
| 48956 | 0, // x8sub_1_then_sub_32 |
| 48957 | 0, // x8sub_1_then_sub_32_hi |
| 48958 | 0, // subo64_then_sub_32 |
| 48959 | 0, // subo64_then_sub_32_hi |
| 48960 | 0, // zsub1_then_zsub_hi |
| 48961 | 0, // zsub3_then_zsub_hi |
| 48962 | 0, // zsub2_then_zsub_hi |
| 48963 | 120, // dsub0_dsub1 -> DDDD_with_dsub2_in_FPR64_lo |
| 48964 | 120, // dsub0_dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo |
| 48965 | 120, // dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo |
| 48966 | 120, // dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo |
| 48967 | 120, // dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo |
| 48968 | 0, // dsub_dsub1 |
| 48969 | 0, // dsub_dsub1_dsub2_dsub3 |
| 48970 | 0, // dsub_dsub1_dsub2 |
| 48971 | 0, // qsub0_qsub1 |
| 48972 | 0, // qsub0_qsub1_qsub2 |
| 48973 | 0, // qsub1_qsub2 |
| 48974 | 0, // qsub1_qsub2_qsub3 |
| 48975 | 0, // qsub2_qsub3 |
| 48976 | 0, // sub_32_x8sub_1_then_sub_32 |
| 48977 | 0, // x8sub_0_x8sub_1 |
| 48978 | 0, // x8sub_2_x8sub_3 |
| 48979 | 0, // x8sub_4_x8sub_5 |
| 48980 | 0, // x8sub_6_x8sub_7 |
| 48981 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 48982 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 48983 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 48984 | 0, // sub_32_subo64_then_sub_32 |
| 48985 | 0, // zsub_qsub1 |
| 48986 | 0, // zsub_qsub1_qsub2_qsub3 |
| 48987 | 0, // zsub_qsub1_qsub2 |
| 48988 | 0, // zsub0_zsub1 |
| 48989 | 0, // zsub0_zsub1_zsub2 |
| 48990 | 0, // zsub1_zsub2 |
| 48991 | 0, // zsub1_zsub2_zsub3 |
| 48992 | 0, // zsub2_zsub3 |
| 48993 | 0, // zsub0_zsub2 |
| 48994 | 0, // zsub1_zsub3 |
| 48995 | }, |
| 48996 | { // DDDD_with_dsub3_in_FPR64_lo |
| 48997 | 121, // bsub -> DDDD_with_dsub3_in_FPR64_lo |
| 48998 | 121, // bsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 48999 | 0, // dsub |
| 49000 | 121, // dsub0 -> DDDD_with_dsub3_in_FPR64_lo |
| 49001 | 121, // dsub1 -> DDDD_with_dsub3_in_FPR64_lo |
| 49002 | 121, // dsub2 -> DDDD_with_dsub3_in_FPR64_lo |
| 49003 | 121, // dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 49004 | 0, // dsub_hi |
| 49005 | 121, // hsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49006 | 121, // hsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49007 | 0, // psub |
| 49008 | 0, // psub0 |
| 49009 | 0, // psub1 |
| 49010 | 0, // qsub0 |
| 49011 | 0, // qsub1 |
| 49012 | 0, // qsub2 |
| 49013 | 0, // qsub3 |
| 49014 | 121, // ssub -> DDDD_with_dsub3_in_FPR64_lo |
| 49015 | 121, // ssub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49016 | 0, // sub_32 |
| 49017 | 0, // sub_32_hi |
| 49018 | 0, // sube32 |
| 49019 | 0, // sube64 |
| 49020 | 0, // subo32 |
| 49021 | 0, // subo64 |
| 49022 | 0, // x8sub_0 |
| 49023 | 0, // x8sub_1 |
| 49024 | 0, // x8sub_2 |
| 49025 | 0, // x8sub_3 |
| 49026 | 0, // x8sub_4 |
| 49027 | 0, // x8sub_5 |
| 49028 | 0, // x8sub_6 |
| 49029 | 0, // x8sub_7 |
| 49030 | 0, // zasubb |
| 49031 | 0, // zasubd0 |
| 49032 | 0, // zasubd1 |
| 49033 | 0, // zasubh0 |
| 49034 | 0, // zasubh1 |
| 49035 | 0, // zasubq0 |
| 49036 | 0, // zasubq1 |
| 49037 | 0, // zasubs0 |
| 49038 | 0, // zasubs1 |
| 49039 | 0, // zsub |
| 49040 | 0, // zsub0 |
| 49041 | 0, // zsub1 |
| 49042 | 0, // zsub2 |
| 49043 | 0, // zsub3 |
| 49044 | 0, // zsub_hi |
| 49045 | 0, // zasubd1_then_zasubq0 |
| 49046 | 0, // zasubd1_then_zasubq1 |
| 49047 | 0, // zasubs1_then_zasubd0 |
| 49048 | 0, // zasubs1_then_zasubd1 |
| 49049 | 0, // zasubs1_then_zasubq0 |
| 49050 | 0, // zasubs1_then_zasubq1 |
| 49051 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49052 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49053 | 0, // zasubh1_then_zasubd0 |
| 49054 | 0, // zasubh1_then_zasubd1 |
| 49055 | 0, // zasubh1_then_zasubq0 |
| 49056 | 0, // zasubh1_then_zasubq1 |
| 49057 | 0, // zasubh1_then_zasubs0 |
| 49058 | 0, // zasubh1_then_zasubs1 |
| 49059 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49060 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49061 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49062 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49063 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49064 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49065 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49066 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49067 | 121, // dsub1_then_bsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49068 | 121, // dsub1_then_bsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49069 | 121, // dsub1_then_hsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49070 | 121, // dsub1_then_hsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49071 | 121, // dsub1_then_ssub -> DDDD_with_dsub3_in_FPR64_lo |
| 49072 | 121, // dsub1_then_ssub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49073 | 121, // dsub3_then_bsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49074 | 121, // dsub3_then_bsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49075 | 121, // dsub3_then_hsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49076 | 121, // dsub3_then_hsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49077 | 121, // dsub3_then_ssub -> DDDD_with_dsub3_in_FPR64_lo |
| 49078 | 121, // dsub3_then_ssub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49079 | 121, // dsub2_then_bsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49080 | 121, // dsub2_then_bsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49081 | 121, // dsub2_then_hsub -> DDDD_with_dsub3_in_FPR64_lo |
| 49082 | 121, // dsub2_then_hsub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49083 | 121, // dsub2_then_ssub -> DDDD_with_dsub3_in_FPR64_lo |
| 49084 | 121, // dsub2_then_ssub_hi -> DDDD_with_dsub3_in_FPR64_lo |
| 49085 | 0, // psub1_then_psub |
| 49086 | 0, // qsub1_then_dsub_hi |
| 49087 | 0, // qsub3_then_dsub_hi |
| 49088 | 0, // qsub2_then_dsub_hi |
| 49089 | 0, // x8sub_7_then_sub_32 |
| 49090 | 0, // x8sub_7_then_sub_32_hi |
| 49091 | 0, // x8sub_6_then_sub_32 |
| 49092 | 0, // x8sub_6_then_sub_32_hi |
| 49093 | 0, // x8sub_5_then_sub_32 |
| 49094 | 0, // x8sub_5_then_sub_32_hi |
| 49095 | 0, // x8sub_4_then_sub_32 |
| 49096 | 0, // x8sub_4_then_sub_32_hi |
| 49097 | 0, // x8sub_3_then_sub_32 |
| 49098 | 0, // x8sub_3_then_sub_32_hi |
| 49099 | 0, // x8sub_2_then_sub_32 |
| 49100 | 0, // x8sub_2_then_sub_32_hi |
| 49101 | 0, // x8sub_1_then_sub_32 |
| 49102 | 0, // x8sub_1_then_sub_32_hi |
| 49103 | 0, // subo64_then_sub_32 |
| 49104 | 0, // subo64_then_sub_32_hi |
| 49105 | 0, // zsub1_then_zsub_hi |
| 49106 | 0, // zsub3_then_zsub_hi |
| 49107 | 0, // zsub2_then_zsub_hi |
| 49108 | 121, // dsub0_dsub1 -> DDDD_with_dsub3_in_FPR64_lo |
| 49109 | 121, // dsub0_dsub1_dsub2 -> DDDD_with_dsub3_in_FPR64_lo |
| 49110 | 121, // dsub1_dsub2 -> DDDD_with_dsub3_in_FPR64_lo |
| 49111 | 121, // dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 49112 | 121, // dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 49113 | 0, // dsub_dsub1 |
| 49114 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49115 | 0, // dsub_dsub1_dsub2 |
| 49116 | 0, // qsub0_qsub1 |
| 49117 | 0, // qsub0_qsub1_qsub2 |
| 49118 | 0, // qsub1_qsub2 |
| 49119 | 0, // qsub1_qsub2_qsub3 |
| 49120 | 0, // qsub2_qsub3 |
| 49121 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49122 | 0, // x8sub_0_x8sub_1 |
| 49123 | 0, // x8sub_2_x8sub_3 |
| 49124 | 0, // x8sub_4_x8sub_5 |
| 49125 | 0, // x8sub_6_x8sub_7 |
| 49126 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49127 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49128 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49129 | 0, // sub_32_subo64_then_sub_32 |
| 49130 | 0, // zsub_qsub1 |
| 49131 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49132 | 0, // zsub_qsub1_qsub2 |
| 49133 | 0, // zsub0_zsub1 |
| 49134 | 0, // zsub0_zsub1_zsub2 |
| 49135 | 0, // zsub1_zsub2 |
| 49136 | 0, // zsub1_zsub2_zsub3 |
| 49137 | 0, // zsub2_zsub3 |
| 49138 | 0, // zsub0_zsub2 |
| 49139 | 0, // zsub1_zsub3 |
| 49140 | }, |
| 49141 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49142 | 122, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49143 | 122, // bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49144 | 0, // dsub |
| 49145 | 122, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49146 | 122, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49147 | 122, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49148 | 122, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49149 | 0, // dsub_hi |
| 49150 | 122, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49151 | 122, // hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49152 | 0, // psub |
| 49153 | 0, // psub0 |
| 49154 | 0, // psub1 |
| 49155 | 0, // qsub0 |
| 49156 | 0, // qsub1 |
| 49157 | 0, // qsub2 |
| 49158 | 0, // qsub3 |
| 49159 | 122, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49160 | 122, // ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49161 | 0, // sub_32 |
| 49162 | 0, // sub_32_hi |
| 49163 | 0, // sube32 |
| 49164 | 0, // sube64 |
| 49165 | 0, // subo32 |
| 49166 | 0, // subo64 |
| 49167 | 0, // x8sub_0 |
| 49168 | 0, // x8sub_1 |
| 49169 | 0, // x8sub_2 |
| 49170 | 0, // x8sub_3 |
| 49171 | 0, // x8sub_4 |
| 49172 | 0, // x8sub_5 |
| 49173 | 0, // x8sub_6 |
| 49174 | 0, // x8sub_7 |
| 49175 | 0, // zasubb |
| 49176 | 0, // zasubd0 |
| 49177 | 0, // zasubd1 |
| 49178 | 0, // zasubh0 |
| 49179 | 0, // zasubh1 |
| 49180 | 0, // zasubq0 |
| 49181 | 0, // zasubq1 |
| 49182 | 0, // zasubs0 |
| 49183 | 0, // zasubs1 |
| 49184 | 0, // zsub |
| 49185 | 0, // zsub0 |
| 49186 | 0, // zsub1 |
| 49187 | 0, // zsub2 |
| 49188 | 0, // zsub3 |
| 49189 | 0, // zsub_hi |
| 49190 | 0, // zasubd1_then_zasubq0 |
| 49191 | 0, // zasubd1_then_zasubq1 |
| 49192 | 0, // zasubs1_then_zasubd0 |
| 49193 | 0, // zasubs1_then_zasubd1 |
| 49194 | 0, // zasubs1_then_zasubq0 |
| 49195 | 0, // zasubs1_then_zasubq1 |
| 49196 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49197 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49198 | 0, // zasubh1_then_zasubd0 |
| 49199 | 0, // zasubh1_then_zasubd1 |
| 49200 | 0, // zasubh1_then_zasubq0 |
| 49201 | 0, // zasubh1_then_zasubq1 |
| 49202 | 0, // zasubh1_then_zasubs0 |
| 49203 | 0, // zasubh1_then_zasubs1 |
| 49204 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49205 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49206 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49207 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49208 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49209 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49210 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49211 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49212 | 122, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49213 | 122, // dsub1_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49214 | 122, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49215 | 122, // dsub1_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49216 | 122, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49217 | 122, // dsub1_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49218 | 122, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49219 | 122, // dsub3_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49220 | 122, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49221 | 122, // dsub3_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49222 | 122, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49223 | 122, // dsub3_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49224 | 122, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49225 | 122, // dsub2_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49226 | 122, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49227 | 122, // dsub2_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49228 | 122, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49229 | 122, // dsub2_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49230 | 0, // psub1_then_psub |
| 49231 | 0, // qsub1_then_dsub_hi |
| 49232 | 0, // qsub3_then_dsub_hi |
| 49233 | 0, // qsub2_then_dsub_hi |
| 49234 | 0, // x8sub_7_then_sub_32 |
| 49235 | 0, // x8sub_7_then_sub_32_hi |
| 49236 | 0, // x8sub_6_then_sub_32 |
| 49237 | 0, // x8sub_6_then_sub_32_hi |
| 49238 | 0, // x8sub_5_then_sub_32 |
| 49239 | 0, // x8sub_5_then_sub_32_hi |
| 49240 | 0, // x8sub_4_then_sub_32 |
| 49241 | 0, // x8sub_4_then_sub_32_hi |
| 49242 | 0, // x8sub_3_then_sub_32 |
| 49243 | 0, // x8sub_3_then_sub_32_hi |
| 49244 | 0, // x8sub_2_then_sub_32 |
| 49245 | 0, // x8sub_2_then_sub_32_hi |
| 49246 | 0, // x8sub_1_then_sub_32 |
| 49247 | 0, // x8sub_1_then_sub_32_hi |
| 49248 | 0, // subo64_then_sub_32 |
| 49249 | 0, // subo64_then_sub_32_hi |
| 49250 | 0, // zsub1_then_zsub_hi |
| 49251 | 0, // zsub3_then_zsub_hi |
| 49252 | 0, // zsub2_then_zsub_hi |
| 49253 | 122, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49254 | 122, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49255 | 122, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49256 | 122, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49257 | 122, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 49258 | 0, // dsub_dsub1 |
| 49259 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49260 | 0, // dsub_dsub1_dsub2 |
| 49261 | 0, // qsub0_qsub1 |
| 49262 | 0, // qsub0_qsub1_qsub2 |
| 49263 | 0, // qsub1_qsub2 |
| 49264 | 0, // qsub1_qsub2_qsub3 |
| 49265 | 0, // qsub2_qsub3 |
| 49266 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49267 | 0, // x8sub_0_x8sub_1 |
| 49268 | 0, // x8sub_2_x8sub_3 |
| 49269 | 0, // x8sub_4_x8sub_5 |
| 49270 | 0, // x8sub_6_x8sub_7 |
| 49271 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49272 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49273 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49274 | 0, // sub_32_subo64_then_sub_32 |
| 49275 | 0, // zsub_qsub1 |
| 49276 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49277 | 0, // zsub_qsub1_qsub2 |
| 49278 | 0, // zsub0_zsub1 |
| 49279 | 0, // zsub0_zsub1_zsub2 |
| 49280 | 0, // zsub1_zsub2 |
| 49281 | 0, // zsub1_zsub2_zsub3 |
| 49282 | 0, // zsub2_zsub3 |
| 49283 | 0, // zsub0_zsub2 |
| 49284 | 0, // zsub1_zsub3 |
| 49285 | }, |
| 49286 | { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49287 | 123, // bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49288 | 123, // bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49289 | 0, // dsub |
| 49290 | 123, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49291 | 123, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49292 | 123, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49293 | 123, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49294 | 0, // dsub_hi |
| 49295 | 123, // hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49296 | 123, // hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49297 | 0, // psub |
| 49298 | 0, // psub0 |
| 49299 | 0, // psub1 |
| 49300 | 0, // qsub0 |
| 49301 | 0, // qsub1 |
| 49302 | 0, // qsub2 |
| 49303 | 0, // qsub3 |
| 49304 | 123, // ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49305 | 123, // ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49306 | 0, // sub_32 |
| 49307 | 0, // sub_32_hi |
| 49308 | 0, // sube32 |
| 49309 | 0, // sube64 |
| 49310 | 0, // subo32 |
| 49311 | 0, // subo64 |
| 49312 | 0, // x8sub_0 |
| 49313 | 0, // x8sub_1 |
| 49314 | 0, // x8sub_2 |
| 49315 | 0, // x8sub_3 |
| 49316 | 0, // x8sub_4 |
| 49317 | 0, // x8sub_5 |
| 49318 | 0, // x8sub_6 |
| 49319 | 0, // x8sub_7 |
| 49320 | 0, // zasubb |
| 49321 | 0, // zasubd0 |
| 49322 | 0, // zasubd1 |
| 49323 | 0, // zasubh0 |
| 49324 | 0, // zasubh1 |
| 49325 | 0, // zasubq0 |
| 49326 | 0, // zasubq1 |
| 49327 | 0, // zasubs0 |
| 49328 | 0, // zasubs1 |
| 49329 | 0, // zsub |
| 49330 | 0, // zsub0 |
| 49331 | 0, // zsub1 |
| 49332 | 0, // zsub2 |
| 49333 | 0, // zsub3 |
| 49334 | 0, // zsub_hi |
| 49335 | 0, // zasubd1_then_zasubq0 |
| 49336 | 0, // zasubd1_then_zasubq1 |
| 49337 | 0, // zasubs1_then_zasubd0 |
| 49338 | 0, // zasubs1_then_zasubd1 |
| 49339 | 0, // zasubs1_then_zasubq0 |
| 49340 | 0, // zasubs1_then_zasubq1 |
| 49341 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49342 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49343 | 0, // zasubh1_then_zasubd0 |
| 49344 | 0, // zasubh1_then_zasubd1 |
| 49345 | 0, // zasubh1_then_zasubq0 |
| 49346 | 0, // zasubh1_then_zasubq1 |
| 49347 | 0, // zasubh1_then_zasubs0 |
| 49348 | 0, // zasubh1_then_zasubs1 |
| 49349 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49350 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49351 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49352 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49353 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49354 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49355 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49356 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49357 | 123, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49358 | 123, // dsub1_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49359 | 123, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49360 | 123, // dsub1_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49361 | 123, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49362 | 123, // dsub1_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49363 | 123, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49364 | 123, // dsub3_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49365 | 123, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49366 | 123, // dsub3_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49367 | 123, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49368 | 123, // dsub3_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49369 | 123, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49370 | 123, // dsub2_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49371 | 123, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49372 | 123, // dsub2_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49373 | 123, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49374 | 123, // dsub2_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49375 | 0, // psub1_then_psub |
| 49376 | 0, // qsub1_then_dsub_hi |
| 49377 | 0, // qsub3_then_dsub_hi |
| 49378 | 0, // qsub2_then_dsub_hi |
| 49379 | 0, // x8sub_7_then_sub_32 |
| 49380 | 0, // x8sub_7_then_sub_32_hi |
| 49381 | 0, // x8sub_6_then_sub_32 |
| 49382 | 0, // x8sub_6_then_sub_32_hi |
| 49383 | 0, // x8sub_5_then_sub_32 |
| 49384 | 0, // x8sub_5_then_sub_32_hi |
| 49385 | 0, // x8sub_4_then_sub_32 |
| 49386 | 0, // x8sub_4_then_sub_32_hi |
| 49387 | 0, // x8sub_3_then_sub_32 |
| 49388 | 0, // x8sub_3_then_sub_32_hi |
| 49389 | 0, // x8sub_2_then_sub_32 |
| 49390 | 0, // x8sub_2_then_sub_32_hi |
| 49391 | 0, // x8sub_1_then_sub_32 |
| 49392 | 0, // x8sub_1_then_sub_32_hi |
| 49393 | 0, // subo64_then_sub_32 |
| 49394 | 0, // subo64_then_sub_32_hi |
| 49395 | 0, // zsub1_then_zsub_hi |
| 49396 | 0, // zsub3_then_zsub_hi |
| 49397 | 0, // zsub2_then_zsub_hi |
| 49398 | 123, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49399 | 123, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49400 | 123, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49401 | 123, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49402 | 123, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49403 | 0, // dsub_dsub1 |
| 49404 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49405 | 0, // dsub_dsub1_dsub2 |
| 49406 | 0, // qsub0_qsub1 |
| 49407 | 0, // qsub0_qsub1_qsub2 |
| 49408 | 0, // qsub1_qsub2 |
| 49409 | 0, // qsub1_qsub2_qsub3 |
| 49410 | 0, // qsub2_qsub3 |
| 49411 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49412 | 0, // x8sub_0_x8sub_1 |
| 49413 | 0, // x8sub_2_x8sub_3 |
| 49414 | 0, // x8sub_4_x8sub_5 |
| 49415 | 0, // x8sub_6_x8sub_7 |
| 49416 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49417 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49418 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49419 | 0, // sub_32_subo64_then_sub_32 |
| 49420 | 0, // zsub_qsub1 |
| 49421 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49422 | 0, // zsub_qsub1_qsub2 |
| 49423 | 0, // zsub0_zsub1 |
| 49424 | 0, // zsub0_zsub1_zsub2 |
| 49425 | 0, // zsub1_zsub2 |
| 49426 | 0, // zsub1_zsub2_zsub3 |
| 49427 | 0, // zsub2_zsub3 |
| 49428 | 0, // zsub0_zsub2 |
| 49429 | 0, // zsub1_zsub3 |
| 49430 | }, |
| 49431 | { // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49432 | 124, // bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49433 | 124, // bsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49434 | 0, // dsub |
| 49435 | 124, // dsub0 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49436 | 124, // dsub1 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49437 | 124, // dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49438 | 124, // dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49439 | 0, // dsub_hi |
| 49440 | 124, // hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49441 | 124, // hsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49442 | 0, // psub |
| 49443 | 0, // psub0 |
| 49444 | 0, // psub1 |
| 49445 | 0, // qsub0 |
| 49446 | 0, // qsub1 |
| 49447 | 0, // qsub2 |
| 49448 | 0, // qsub3 |
| 49449 | 124, // ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49450 | 124, // ssub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49451 | 0, // sub_32 |
| 49452 | 0, // sub_32_hi |
| 49453 | 0, // sube32 |
| 49454 | 0, // sube64 |
| 49455 | 0, // subo32 |
| 49456 | 0, // subo64 |
| 49457 | 0, // x8sub_0 |
| 49458 | 0, // x8sub_1 |
| 49459 | 0, // x8sub_2 |
| 49460 | 0, // x8sub_3 |
| 49461 | 0, // x8sub_4 |
| 49462 | 0, // x8sub_5 |
| 49463 | 0, // x8sub_6 |
| 49464 | 0, // x8sub_7 |
| 49465 | 0, // zasubb |
| 49466 | 0, // zasubd0 |
| 49467 | 0, // zasubd1 |
| 49468 | 0, // zasubh0 |
| 49469 | 0, // zasubh1 |
| 49470 | 0, // zasubq0 |
| 49471 | 0, // zasubq1 |
| 49472 | 0, // zasubs0 |
| 49473 | 0, // zasubs1 |
| 49474 | 0, // zsub |
| 49475 | 0, // zsub0 |
| 49476 | 0, // zsub1 |
| 49477 | 0, // zsub2 |
| 49478 | 0, // zsub3 |
| 49479 | 0, // zsub_hi |
| 49480 | 0, // zasubd1_then_zasubq0 |
| 49481 | 0, // zasubd1_then_zasubq1 |
| 49482 | 0, // zasubs1_then_zasubd0 |
| 49483 | 0, // zasubs1_then_zasubd1 |
| 49484 | 0, // zasubs1_then_zasubq0 |
| 49485 | 0, // zasubs1_then_zasubq1 |
| 49486 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49487 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49488 | 0, // zasubh1_then_zasubd0 |
| 49489 | 0, // zasubh1_then_zasubd1 |
| 49490 | 0, // zasubh1_then_zasubq0 |
| 49491 | 0, // zasubh1_then_zasubq1 |
| 49492 | 0, // zasubh1_then_zasubs0 |
| 49493 | 0, // zasubh1_then_zasubs1 |
| 49494 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49495 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49496 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49497 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49498 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49499 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49500 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49501 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49502 | 124, // dsub1_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49503 | 124, // dsub1_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49504 | 124, // dsub1_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49505 | 124, // dsub1_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49506 | 124, // dsub1_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49507 | 124, // dsub1_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49508 | 124, // dsub3_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49509 | 124, // dsub3_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49510 | 124, // dsub3_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49511 | 124, // dsub3_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49512 | 124, // dsub3_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49513 | 124, // dsub3_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49514 | 124, // dsub2_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49515 | 124, // dsub2_then_bsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49516 | 124, // dsub2_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49517 | 124, // dsub2_then_hsub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49518 | 124, // dsub2_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49519 | 124, // dsub2_then_ssub_hi -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49520 | 0, // psub1_then_psub |
| 49521 | 0, // qsub1_then_dsub_hi |
| 49522 | 0, // qsub3_then_dsub_hi |
| 49523 | 0, // qsub2_then_dsub_hi |
| 49524 | 0, // x8sub_7_then_sub_32 |
| 49525 | 0, // x8sub_7_then_sub_32_hi |
| 49526 | 0, // x8sub_6_then_sub_32 |
| 49527 | 0, // x8sub_6_then_sub_32_hi |
| 49528 | 0, // x8sub_5_then_sub_32 |
| 49529 | 0, // x8sub_5_then_sub_32_hi |
| 49530 | 0, // x8sub_4_then_sub_32 |
| 49531 | 0, // x8sub_4_then_sub_32_hi |
| 49532 | 0, // x8sub_3_then_sub_32 |
| 49533 | 0, // x8sub_3_then_sub_32_hi |
| 49534 | 0, // x8sub_2_then_sub_32 |
| 49535 | 0, // x8sub_2_then_sub_32_hi |
| 49536 | 0, // x8sub_1_then_sub_32 |
| 49537 | 0, // x8sub_1_then_sub_32_hi |
| 49538 | 0, // subo64_then_sub_32 |
| 49539 | 0, // subo64_then_sub_32_hi |
| 49540 | 0, // zsub1_then_zsub_hi |
| 49541 | 0, // zsub3_then_zsub_hi |
| 49542 | 0, // zsub2_then_zsub_hi |
| 49543 | 124, // dsub0_dsub1 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49544 | 124, // dsub0_dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49545 | 124, // dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49546 | 124, // dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49547 | 124, // dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49548 | 0, // dsub_dsub1 |
| 49549 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49550 | 0, // dsub_dsub1_dsub2 |
| 49551 | 0, // qsub0_qsub1 |
| 49552 | 0, // qsub0_qsub1_qsub2 |
| 49553 | 0, // qsub1_qsub2 |
| 49554 | 0, // qsub1_qsub2_qsub3 |
| 49555 | 0, // qsub2_qsub3 |
| 49556 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49557 | 0, // x8sub_0_x8sub_1 |
| 49558 | 0, // x8sub_2_x8sub_3 |
| 49559 | 0, // x8sub_4_x8sub_5 |
| 49560 | 0, // x8sub_6_x8sub_7 |
| 49561 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49562 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49563 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49564 | 0, // sub_32_subo64_then_sub_32 |
| 49565 | 0, // zsub_qsub1 |
| 49566 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49567 | 0, // zsub_qsub1_qsub2 |
| 49568 | 0, // zsub0_zsub1 |
| 49569 | 0, // zsub0_zsub1_zsub2 |
| 49570 | 0, // zsub1_zsub2 |
| 49571 | 0, // zsub1_zsub2_zsub3 |
| 49572 | 0, // zsub2_zsub3 |
| 49573 | 0, // zsub0_zsub2 |
| 49574 | 0, // zsub1_zsub3 |
| 49575 | }, |
| 49576 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49577 | 125, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49578 | 125, // bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49579 | 0, // dsub |
| 49580 | 125, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49581 | 125, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49582 | 125, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49583 | 125, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49584 | 0, // dsub_hi |
| 49585 | 125, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49586 | 125, // hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49587 | 0, // psub |
| 49588 | 0, // psub0 |
| 49589 | 0, // psub1 |
| 49590 | 0, // qsub0 |
| 49591 | 0, // qsub1 |
| 49592 | 0, // qsub2 |
| 49593 | 0, // qsub3 |
| 49594 | 125, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49595 | 125, // ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49596 | 0, // sub_32 |
| 49597 | 0, // sub_32_hi |
| 49598 | 0, // sube32 |
| 49599 | 0, // sube64 |
| 49600 | 0, // subo32 |
| 49601 | 0, // subo64 |
| 49602 | 0, // x8sub_0 |
| 49603 | 0, // x8sub_1 |
| 49604 | 0, // x8sub_2 |
| 49605 | 0, // x8sub_3 |
| 49606 | 0, // x8sub_4 |
| 49607 | 0, // x8sub_5 |
| 49608 | 0, // x8sub_6 |
| 49609 | 0, // x8sub_7 |
| 49610 | 0, // zasubb |
| 49611 | 0, // zasubd0 |
| 49612 | 0, // zasubd1 |
| 49613 | 0, // zasubh0 |
| 49614 | 0, // zasubh1 |
| 49615 | 0, // zasubq0 |
| 49616 | 0, // zasubq1 |
| 49617 | 0, // zasubs0 |
| 49618 | 0, // zasubs1 |
| 49619 | 0, // zsub |
| 49620 | 0, // zsub0 |
| 49621 | 0, // zsub1 |
| 49622 | 0, // zsub2 |
| 49623 | 0, // zsub3 |
| 49624 | 0, // zsub_hi |
| 49625 | 0, // zasubd1_then_zasubq0 |
| 49626 | 0, // zasubd1_then_zasubq1 |
| 49627 | 0, // zasubs1_then_zasubd0 |
| 49628 | 0, // zasubs1_then_zasubd1 |
| 49629 | 0, // zasubs1_then_zasubq0 |
| 49630 | 0, // zasubs1_then_zasubq1 |
| 49631 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49632 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49633 | 0, // zasubh1_then_zasubd0 |
| 49634 | 0, // zasubh1_then_zasubd1 |
| 49635 | 0, // zasubh1_then_zasubq0 |
| 49636 | 0, // zasubh1_then_zasubq1 |
| 49637 | 0, // zasubh1_then_zasubs0 |
| 49638 | 0, // zasubh1_then_zasubs1 |
| 49639 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49640 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49641 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49642 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49643 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49644 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49645 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49646 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49647 | 125, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49648 | 125, // dsub1_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49649 | 125, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49650 | 125, // dsub1_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49651 | 125, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49652 | 125, // dsub1_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49653 | 125, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49654 | 125, // dsub3_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49655 | 125, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49656 | 125, // dsub3_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49657 | 125, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49658 | 125, // dsub3_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49659 | 125, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49660 | 125, // dsub2_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49661 | 125, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49662 | 125, // dsub2_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49663 | 125, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49664 | 125, // dsub2_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49665 | 0, // psub1_then_psub |
| 49666 | 0, // qsub1_then_dsub_hi |
| 49667 | 0, // qsub3_then_dsub_hi |
| 49668 | 0, // qsub2_then_dsub_hi |
| 49669 | 0, // x8sub_7_then_sub_32 |
| 49670 | 0, // x8sub_7_then_sub_32_hi |
| 49671 | 0, // x8sub_6_then_sub_32 |
| 49672 | 0, // x8sub_6_then_sub_32_hi |
| 49673 | 0, // x8sub_5_then_sub_32 |
| 49674 | 0, // x8sub_5_then_sub_32_hi |
| 49675 | 0, // x8sub_4_then_sub_32 |
| 49676 | 0, // x8sub_4_then_sub_32_hi |
| 49677 | 0, // x8sub_3_then_sub_32 |
| 49678 | 0, // x8sub_3_then_sub_32_hi |
| 49679 | 0, // x8sub_2_then_sub_32 |
| 49680 | 0, // x8sub_2_then_sub_32_hi |
| 49681 | 0, // x8sub_1_then_sub_32 |
| 49682 | 0, // x8sub_1_then_sub_32_hi |
| 49683 | 0, // subo64_then_sub_32 |
| 49684 | 0, // subo64_then_sub_32_hi |
| 49685 | 0, // zsub1_then_zsub_hi |
| 49686 | 0, // zsub3_then_zsub_hi |
| 49687 | 0, // zsub2_then_zsub_hi |
| 49688 | 125, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49689 | 125, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49690 | 125, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49691 | 125, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49692 | 125, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 49693 | 0, // dsub_dsub1 |
| 49694 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49695 | 0, // dsub_dsub1_dsub2 |
| 49696 | 0, // qsub0_qsub1 |
| 49697 | 0, // qsub0_qsub1_qsub2 |
| 49698 | 0, // qsub1_qsub2 |
| 49699 | 0, // qsub1_qsub2_qsub3 |
| 49700 | 0, // qsub2_qsub3 |
| 49701 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49702 | 0, // x8sub_0_x8sub_1 |
| 49703 | 0, // x8sub_2_x8sub_3 |
| 49704 | 0, // x8sub_4_x8sub_5 |
| 49705 | 0, // x8sub_6_x8sub_7 |
| 49706 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49707 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49708 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49709 | 0, // sub_32_subo64_then_sub_32 |
| 49710 | 0, // zsub_qsub1 |
| 49711 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49712 | 0, // zsub_qsub1_qsub2 |
| 49713 | 0, // zsub0_zsub1 |
| 49714 | 0, // zsub0_zsub1_zsub2 |
| 49715 | 0, // zsub1_zsub2 |
| 49716 | 0, // zsub1_zsub2_zsub3 |
| 49717 | 0, // zsub2_zsub3 |
| 49718 | 0, // zsub0_zsub2 |
| 49719 | 0, // zsub1_zsub3 |
| 49720 | }, |
| 49721 | { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49722 | 126, // bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49723 | 126, // bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49724 | 0, // dsub |
| 49725 | 126, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49726 | 126, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49727 | 126, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49728 | 126, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49729 | 0, // dsub_hi |
| 49730 | 126, // hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49731 | 126, // hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49732 | 0, // psub |
| 49733 | 0, // psub0 |
| 49734 | 0, // psub1 |
| 49735 | 0, // qsub0 |
| 49736 | 0, // qsub1 |
| 49737 | 0, // qsub2 |
| 49738 | 0, // qsub3 |
| 49739 | 126, // ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49740 | 126, // ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49741 | 0, // sub_32 |
| 49742 | 0, // sub_32_hi |
| 49743 | 0, // sube32 |
| 49744 | 0, // sube64 |
| 49745 | 0, // subo32 |
| 49746 | 0, // subo64 |
| 49747 | 0, // x8sub_0 |
| 49748 | 0, // x8sub_1 |
| 49749 | 0, // x8sub_2 |
| 49750 | 0, // x8sub_3 |
| 49751 | 0, // x8sub_4 |
| 49752 | 0, // x8sub_5 |
| 49753 | 0, // x8sub_6 |
| 49754 | 0, // x8sub_7 |
| 49755 | 0, // zasubb |
| 49756 | 0, // zasubd0 |
| 49757 | 0, // zasubd1 |
| 49758 | 0, // zasubh0 |
| 49759 | 0, // zasubh1 |
| 49760 | 0, // zasubq0 |
| 49761 | 0, // zasubq1 |
| 49762 | 0, // zasubs0 |
| 49763 | 0, // zasubs1 |
| 49764 | 0, // zsub |
| 49765 | 0, // zsub0 |
| 49766 | 0, // zsub1 |
| 49767 | 0, // zsub2 |
| 49768 | 0, // zsub3 |
| 49769 | 0, // zsub_hi |
| 49770 | 0, // zasubd1_then_zasubq0 |
| 49771 | 0, // zasubd1_then_zasubq1 |
| 49772 | 0, // zasubs1_then_zasubd0 |
| 49773 | 0, // zasubs1_then_zasubd1 |
| 49774 | 0, // zasubs1_then_zasubq0 |
| 49775 | 0, // zasubs1_then_zasubq1 |
| 49776 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49777 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49778 | 0, // zasubh1_then_zasubd0 |
| 49779 | 0, // zasubh1_then_zasubd1 |
| 49780 | 0, // zasubh1_then_zasubq0 |
| 49781 | 0, // zasubh1_then_zasubq1 |
| 49782 | 0, // zasubh1_then_zasubs0 |
| 49783 | 0, // zasubh1_then_zasubs1 |
| 49784 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49785 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49786 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49787 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49788 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49789 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49790 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49791 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49792 | 126, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49793 | 126, // dsub1_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49794 | 126, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49795 | 126, // dsub1_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49796 | 126, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49797 | 126, // dsub1_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49798 | 126, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49799 | 126, // dsub3_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49800 | 126, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49801 | 126, // dsub3_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49802 | 126, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49803 | 126, // dsub3_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49804 | 126, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49805 | 126, // dsub2_then_bsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49806 | 126, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49807 | 126, // dsub2_then_hsub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49808 | 126, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49809 | 126, // dsub2_then_ssub_hi -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49810 | 0, // psub1_then_psub |
| 49811 | 0, // qsub1_then_dsub_hi |
| 49812 | 0, // qsub3_then_dsub_hi |
| 49813 | 0, // qsub2_then_dsub_hi |
| 49814 | 0, // x8sub_7_then_sub_32 |
| 49815 | 0, // x8sub_7_then_sub_32_hi |
| 49816 | 0, // x8sub_6_then_sub_32 |
| 49817 | 0, // x8sub_6_then_sub_32_hi |
| 49818 | 0, // x8sub_5_then_sub_32 |
| 49819 | 0, // x8sub_5_then_sub_32_hi |
| 49820 | 0, // x8sub_4_then_sub_32 |
| 49821 | 0, // x8sub_4_then_sub_32_hi |
| 49822 | 0, // x8sub_3_then_sub_32 |
| 49823 | 0, // x8sub_3_then_sub_32_hi |
| 49824 | 0, // x8sub_2_then_sub_32 |
| 49825 | 0, // x8sub_2_then_sub_32_hi |
| 49826 | 0, // x8sub_1_then_sub_32 |
| 49827 | 0, // x8sub_1_then_sub_32_hi |
| 49828 | 0, // subo64_then_sub_32 |
| 49829 | 0, // subo64_then_sub_32_hi |
| 49830 | 0, // zsub1_then_zsub_hi |
| 49831 | 0, // zsub3_then_zsub_hi |
| 49832 | 0, // zsub2_then_zsub_hi |
| 49833 | 126, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49834 | 126, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49835 | 126, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49836 | 126, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49837 | 126, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49838 | 0, // dsub_dsub1 |
| 49839 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49840 | 0, // dsub_dsub1_dsub2 |
| 49841 | 0, // qsub0_qsub1 |
| 49842 | 0, // qsub0_qsub1_qsub2 |
| 49843 | 0, // qsub1_qsub2 |
| 49844 | 0, // qsub1_qsub2_qsub3 |
| 49845 | 0, // qsub2_qsub3 |
| 49846 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49847 | 0, // x8sub_0_x8sub_1 |
| 49848 | 0, // x8sub_2_x8sub_3 |
| 49849 | 0, // x8sub_4_x8sub_5 |
| 49850 | 0, // x8sub_6_x8sub_7 |
| 49851 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49852 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49853 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49854 | 0, // sub_32_subo64_then_sub_32 |
| 49855 | 0, // zsub_qsub1 |
| 49856 | 0, // zsub_qsub1_qsub2_qsub3 |
| 49857 | 0, // zsub_qsub1_qsub2 |
| 49858 | 0, // zsub0_zsub1 |
| 49859 | 0, // zsub0_zsub1_zsub2 |
| 49860 | 0, // zsub1_zsub2 |
| 49861 | 0, // zsub1_zsub2_zsub3 |
| 49862 | 0, // zsub2_zsub3 |
| 49863 | 0, // zsub0_zsub2 |
| 49864 | 0, // zsub1_zsub3 |
| 49865 | }, |
| 49866 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49867 | 127, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49868 | 127, // bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49869 | 0, // dsub |
| 49870 | 127, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49871 | 127, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49872 | 127, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49873 | 127, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49874 | 0, // dsub_hi |
| 49875 | 127, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49876 | 127, // hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49877 | 0, // psub |
| 49878 | 0, // psub0 |
| 49879 | 0, // psub1 |
| 49880 | 0, // qsub0 |
| 49881 | 0, // qsub1 |
| 49882 | 0, // qsub2 |
| 49883 | 0, // qsub3 |
| 49884 | 127, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49885 | 127, // ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49886 | 0, // sub_32 |
| 49887 | 0, // sub_32_hi |
| 49888 | 0, // sube32 |
| 49889 | 0, // sube64 |
| 49890 | 0, // subo32 |
| 49891 | 0, // subo64 |
| 49892 | 0, // x8sub_0 |
| 49893 | 0, // x8sub_1 |
| 49894 | 0, // x8sub_2 |
| 49895 | 0, // x8sub_3 |
| 49896 | 0, // x8sub_4 |
| 49897 | 0, // x8sub_5 |
| 49898 | 0, // x8sub_6 |
| 49899 | 0, // x8sub_7 |
| 49900 | 0, // zasubb |
| 49901 | 0, // zasubd0 |
| 49902 | 0, // zasubd1 |
| 49903 | 0, // zasubh0 |
| 49904 | 0, // zasubh1 |
| 49905 | 0, // zasubq0 |
| 49906 | 0, // zasubq1 |
| 49907 | 0, // zasubs0 |
| 49908 | 0, // zasubs1 |
| 49909 | 0, // zsub |
| 49910 | 0, // zsub0 |
| 49911 | 0, // zsub1 |
| 49912 | 0, // zsub2 |
| 49913 | 0, // zsub3 |
| 49914 | 0, // zsub_hi |
| 49915 | 0, // zasubd1_then_zasubq0 |
| 49916 | 0, // zasubd1_then_zasubq1 |
| 49917 | 0, // zasubs1_then_zasubd0 |
| 49918 | 0, // zasubs1_then_zasubd1 |
| 49919 | 0, // zasubs1_then_zasubq0 |
| 49920 | 0, // zasubs1_then_zasubq1 |
| 49921 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 49922 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 49923 | 0, // zasubh1_then_zasubd0 |
| 49924 | 0, // zasubh1_then_zasubd1 |
| 49925 | 0, // zasubh1_then_zasubq0 |
| 49926 | 0, // zasubh1_then_zasubq1 |
| 49927 | 0, // zasubh1_then_zasubs0 |
| 49928 | 0, // zasubh1_then_zasubs1 |
| 49929 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 49930 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 49931 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 49932 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 49933 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 49934 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 49935 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 49936 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 49937 | 127, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49938 | 127, // dsub1_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49939 | 127, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49940 | 127, // dsub1_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49941 | 127, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49942 | 127, // dsub1_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49943 | 127, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49944 | 127, // dsub3_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49945 | 127, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49946 | 127, // dsub3_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49947 | 127, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49948 | 127, // dsub3_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49949 | 127, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49950 | 127, // dsub2_then_bsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49951 | 127, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49952 | 127, // dsub2_then_hsub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49953 | 127, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49954 | 127, // dsub2_then_ssub_hi -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49955 | 0, // psub1_then_psub |
| 49956 | 0, // qsub1_then_dsub_hi |
| 49957 | 0, // qsub3_then_dsub_hi |
| 49958 | 0, // qsub2_then_dsub_hi |
| 49959 | 0, // x8sub_7_then_sub_32 |
| 49960 | 0, // x8sub_7_then_sub_32_hi |
| 49961 | 0, // x8sub_6_then_sub_32 |
| 49962 | 0, // x8sub_6_then_sub_32_hi |
| 49963 | 0, // x8sub_5_then_sub_32 |
| 49964 | 0, // x8sub_5_then_sub_32_hi |
| 49965 | 0, // x8sub_4_then_sub_32 |
| 49966 | 0, // x8sub_4_then_sub_32_hi |
| 49967 | 0, // x8sub_3_then_sub_32 |
| 49968 | 0, // x8sub_3_then_sub_32_hi |
| 49969 | 0, // x8sub_2_then_sub_32 |
| 49970 | 0, // x8sub_2_then_sub_32_hi |
| 49971 | 0, // x8sub_1_then_sub_32 |
| 49972 | 0, // x8sub_1_then_sub_32_hi |
| 49973 | 0, // subo64_then_sub_32 |
| 49974 | 0, // subo64_then_sub_32_hi |
| 49975 | 0, // zsub1_then_zsub_hi |
| 49976 | 0, // zsub3_then_zsub_hi |
| 49977 | 0, // zsub2_then_zsub_hi |
| 49978 | 127, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49979 | 127, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49980 | 127, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49981 | 127, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49982 | 127, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 49983 | 0, // dsub_dsub1 |
| 49984 | 0, // dsub_dsub1_dsub2_dsub3 |
| 49985 | 0, // dsub_dsub1_dsub2 |
| 49986 | 0, // qsub0_qsub1 |
| 49987 | 0, // qsub0_qsub1_qsub2 |
| 49988 | 0, // qsub1_qsub2 |
| 49989 | 0, // qsub1_qsub2_qsub3 |
| 49990 | 0, // qsub2_qsub3 |
| 49991 | 0, // sub_32_x8sub_1_then_sub_32 |
| 49992 | 0, // x8sub_0_x8sub_1 |
| 49993 | 0, // x8sub_2_x8sub_3 |
| 49994 | 0, // x8sub_4_x8sub_5 |
| 49995 | 0, // x8sub_6_x8sub_7 |
| 49996 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 49997 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 49998 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 49999 | 0, // sub_32_subo64_then_sub_32 |
| 50000 | 0, // zsub_qsub1 |
| 50001 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50002 | 0, // zsub_qsub1_qsub2 |
| 50003 | 0, // zsub0_zsub1 |
| 50004 | 0, // zsub0_zsub1_zsub2 |
| 50005 | 0, // zsub1_zsub2 |
| 50006 | 0, // zsub1_zsub2_zsub3 |
| 50007 | 0, // zsub2_zsub3 |
| 50008 | 0, // zsub0_zsub2 |
| 50009 | 0, // zsub1_zsub3 |
| 50010 | }, |
| 50011 | |
| 50012 | 128, // bsub -> QQ |
| 50013 | 128, // bsub_hi -> QQ |
| 50014 | 128, // dsub -> QQ |
| 50015 | 0, // dsub0 |
| 50016 | 128, // dsub1 -> QQ |
| 50017 | 0, // dsub2 |
| 50018 | 0, // dsub3 |
| 50019 | 128, // dsub_hi -> QQ |
| 50020 | 128, // hsub -> QQ |
| 50021 | 128, // hsub_hi -> QQ |
| 50022 | 0, // psub |
| 50023 | 0, // psub0 |
| 50024 | 0, // psub1 |
| 50025 | 128, // qsub0 -> QQ |
| 50026 | 128, // qsub1 -> QQ |
| 50027 | 0, // qsub2 |
| 50028 | 0, // qsub3 |
| 50029 | 128, // ssub -> QQ |
| 50030 | 128, // ssub_hi -> QQ |
| 50031 | 0, // sub_32 |
| 50032 | 0, // sub_32_hi |
| 50033 | 0, // sube32 |
| 50034 | 0, // sube64 |
| 50035 | 0, // subo32 |
| 50036 | 0, // subo64 |
| 50037 | 0, // x8sub_0 |
| 50038 | 0, // x8sub_1 |
| 50039 | 0, // x8sub_2 |
| 50040 | 0, // x8sub_3 |
| 50041 | 0, // x8sub_4 |
| 50042 | 0, // x8sub_5 |
| 50043 | 0, // x8sub_6 |
| 50044 | 0, // x8sub_7 |
| 50045 | 0, // zasubb |
| 50046 | 0, // zasubd0 |
| 50047 | 0, // zasubd1 |
| 50048 | 0, // zasubh0 |
| 50049 | 0, // zasubh1 |
| 50050 | 0, // zasubq0 |
| 50051 | 0, // zasubq1 |
| 50052 | 0, // zasubs0 |
| 50053 | 0, // zasubs1 |
| 50054 | 0, // zsub |
| 50055 | 0, // zsub0 |
| 50056 | 0, // zsub1 |
| 50057 | 0, // zsub2 |
| 50058 | 0, // zsub3 |
| 50059 | 0, // zsub_hi |
| 50060 | 0, // zasubd1_then_zasubq0 |
| 50061 | 0, // zasubd1_then_zasubq1 |
| 50062 | 0, // zasubs1_then_zasubd0 |
| 50063 | 0, // zasubs1_then_zasubd1 |
| 50064 | 0, // zasubs1_then_zasubq0 |
| 50065 | 0, // zasubs1_then_zasubq1 |
| 50066 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50067 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50068 | 0, // zasubh1_then_zasubd0 |
| 50069 | 0, // zasubh1_then_zasubd1 |
| 50070 | 0, // zasubh1_then_zasubq0 |
| 50071 | 0, // zasubh1_then_zasubq1 |
| 50072 | 0, // zasubh1_then_zasubs0 |
| 50073 | 0, // zasubh1_then_zasubs1 |
| 50074 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50075 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50076 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50077 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50078 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50079 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50080 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50081 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50082 | 128, // dsub1_then_bsub -> QQ |
| 50083 | 128, // dsub1_then_bsub_hi -> QQ |
| 50084 | 128, // dsub1_then_hsub -> QQ |
| 50085 | 128, // dsub1_then_hsub_hi -> QQ |
| 50086 | 128, // dsub1_then_ssub -> QQ |
| 50087 | 128, // dsub1_then_ssub_hi -> QQ |
| 50088 | 0, // dsub3_then_bsub |
| 50089 | 0, // dsub3_then_bsub_hi |
| 50090 | 0, // dsub3_then_hsub |
| 50091 | 0, // dsub3_then_hsub_hi |
| 50092 | 0, // dsub3_then_ssub |
| 50093 | 0, // dsub3_then_ssub_hi |
| 50094 | 0, // dsub2_then_bsub |
| 50095 | 0, // dsub2_then_bsub_hi |
| 50096 | 0, // dsub2_then_hsub |
| 50097 | 0, // dsub2_then_hsub_hi |
| 50098 | 0, // dsub2_then_ssub |
| 50099 | 0, // dsub2_then_ssub_hi |
| 50100 | 0, // psub1_then_psub |
| 50101 | 128, // qsub1_then_dsub_hi -> QQ |
| 50102 | 0, // qsub3_then_dsub_hi |
| 50103 | 0, // qsub2_then_dsub_hi |
| 50104 | 0, // x8sub_7_then_sub_32 |
| 50105 | 0, // x8sub_7_then_sub_32_hi |
| 50106 | 0, // x8sub_6_then_sub_32 |
| 50107 | 0, // x8sub_6_then_sub_32_hi |
| 50108 | 0, // x8sub_5_then_sub_32 |
| 50109 | 0, // x8sub_5_then_sub_32_hi |
| 50110 | 0, // x8sub_4_then_sub_32 |
| 50111 | 0, // x8sub_4_then_sub_32_hi |
| 50112 | 0, // x8sub_3_then_sub_32 |
| 50113 | 0, // x8sub_3_then_sub_32_hi |
| 50114 | 0, // x8sub_2_then_sub_32 |
| 50115 | 0, // x8sub_2_then_sub_32_hi |
| 50116 | 0, // x8sub_1_then_sub_32 |
| 50117 | 0, // x8sub_1_then_sub_32_hi |
| 50118 | 0, // subo64_then_sub_32 |
| 50119 | 0, // subo64_then_sub_32_hi |
| 50120 | 0, // zsub1_then_zsub_hi |
| 50121 | 0, // zsub3_then_zsub_hi |
| 50122 | 0, // zsub2_then_zsub_hi |
| 50123 | 0, // dsub0_dsub1 |
| 50124 | 0, // dsub0_dsub1_dsub2 |
| 50125 | 0, // dsub1_dsub2 |
| 50126 | 0, // dsub1_dsub2_dsub3 |
| 50127 | 0, // dsub2_dsub3 |
| 50128 | 128, // dsub_dsub1 -> QQ |
| 50129 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50130 | 0, // dsub_dsub1_dsub2 |
| 50131 | 0, // qsub0_qsub1 |
| 50132 | 0, // qsub0_qsub1_qsub2 |
| 50133 | 0, // qsub1_qsub2 |
| 50134 | 0, // qsub1_qsub2_qsub3 |
| 50135 | 0, // qsub2_qsub3 |
| 50136 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50137 | 0, // x8sub_0_x8sub_1 |
| 50138 | 0, // x8sub_2_x8sub_3 |
| 50139 | 0, // x8sub_4_x8sub_5 |
| 50140 | 0, // x8sub_6_x8sub_7 |
| 50141 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50142 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50143 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50144 | 0, // sub_32_subo64_then_sub_32 |
| 50145 | 0, // zsub_qsub1 |
| 50146 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50147 | 0, // zsub_qsub1_qsub2 |
| 50148 | 0, // zsub0_zsub1 |
| 50149 | 0, // zsub0_zsub1_zsub2 |
| 50150 | 0, // zsub1_zsub2 |
| 50151 | 0, // zsub1_zsub2_zsub3 |
| 50152 | 0, // zsub2_zsub3 |
| 50153 | 0, // zsub0_zsub2 |
| 50154 | 0, // zsub1_zsub3 |
| 50155 | }, |
| 50156 | { // ZPR2 |
| 50157 | 129, // bsub -> ZPR2 |
| 50158 | 129, // bsub_hi -> ZPR2 |
| 50159 | 129, // dsub -> ZPR2 |
| 50160 | 0, // dsub0 |
| 50161 | 129, // dsub1 -> ZPR2 |
| 50162 | 0, // dsub2 |
| 50163 | 0, // dsub3 |
| 50164 | 129, // dsub_hi -> ZPR2 |
| 50165 | 129, // hsub -> ZPR2 |
| 50166 | 129, // hsub_hi -> ZPR2 |
| 50167 | 0, // psub |
| 50168 | 0, // psub0 |
| 50169 | 0, // psub1 |
| 50170 | 0, // qsub0 |
| 50171 | 129, // qsub1 -> ZPR2 |
| 50172 | 0, // qsub2 |
| 50173 | 0, // qsub3 |
| 50174 | 129, // ssub -> ZPR2 |
| 50175 | 129, // ssub_hi -> ZPR2 |
| 50176 | 0, // sub_32 |
| 50177 | 0, // sub_32_hi |
| 50178 | 0, // sube32 |
| 50179 | 0, // sube64 |
| 50180 | 0, // subo32 |
| 50181 | 0, // subo64 |
| 50182 | 0, // x8sub_0 |
| 50183 | 0, // x8sub_1 |
| 50184 | 0, // x8sub_2 |
| 50185 | 0, // x8sub_3 |
| 50186 | 0, // x8sub_4 |
| 50187 | 0, // x8sub_5 |
| 50188 | 0, // x8sub_6 |
| 50189 | 0, // x8sub_7 |
| 50190 | 0, // zasubb |
| 50191 | 0, // zasubd0 |
| 50192 | 0, // zasubd1 |
| 50193 | 0, // zasubh0 |
| 50194 | 0, // zasubh1 |
| 50195 | 0, // zasubq0 |
| 50196 | 0, // zasubq1 |
| 50197 | 0, // zasubs0 |
| 50198 | 0, // zasubs1 |
| 50199 | 129, // zsub -> ZPR2 |
| 50200 | 129, // zsub0 -> ZPR2 |
| 50201 | 129, // zsub1 -> ZPR2 |
| 50202 | 0, // zsub2 |
| 50203 | 0, // zsub3 |
| 50204 | 129, // zsub_hi -> ZPR2 |
| 50205 | 0, // zasubd1_then_zasubq0 |
| 50206 | 0, // zasubd1_then_zasubq1 |
| 50207 | 0, // zasubs1_then_zasubd0 |
| 50208 | 0, // zasubs1_then_zasubd1 |
| 50209 | 0, // zasubs1_then_zasubq0 |
| 50210 | 0, // zasubs1_then_zasubq1 |
| 50211 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50212 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50213 | 0, // zasubh1_then_zasubd0 |
| 50214 | 0, // zasubh1_then_zasubd1 |
| 50215 | 0, // zasubh1_then_zasubq0 |
| 50216 | 0, // zasubh1_then_zasubq1 |
| 50217 | 0, // zasubh1_then_zasubs0 |
| 50218 | 0, // zasubh1_then_zasubs1 |
| 50219 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50220 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50221 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50222 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50223 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50224 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50225 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50226 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50227 | 129, // dsub1_then_bsub -> ZPR2 |
| 50228 | 129, // dsub1_then_bsub_hi -> ZPR2 |
| 50229 | 129, // dsub1_then_hsub -> ZPR2 |
| 50230 | 129, // dsub1_then_hsub_hi -> ZPR2 |
| 50231 | 129, // dsub1_then_ssub -> ZPR2 |
| 50232 | 129, // dsub1_then_ssub_hi -> ZPR2 |
| 50233 | 0, // dsub3_then_bsub |
| 50234 | 0, // dsub3_then_bsub_hi |
| 50235 | 0, // dsub3_then_hsub |
| 50236 | 0, // dsub3_then_hsub_hi |
| 50237 | 0, // dsub3_then_ssub |
| 50238 | 0, // dsub3_then_ssub_hi |
| 50239 | 0, // dsub2_then_bsub |
| 50240 | 0, // dsub2_then_bsub_hi |
| 50241 | 0, // dsub2_then_hsub |
| 50242 | 0, // dsub2_then_hsub_hi |
| 50243 | 0, // dsub2_then_ssub |
| 50244 | 0, // dsub2_then_ssub_hi |
| 50245 | 0, // psub1_then_psub |
| 50246 | 129, // qsub1_then_dsub_hi -> ZPR2 |
| 50247 | 0, // qsub3_then_dsub_hi |
| 50248 | 0, // qsub2_then_dsub_hi |
| 50249 | 0, // x8sub_7_then_sub_32 |
| 50250 | 0, // x8sub_7_then_sub_32_hi |
| 50251 | 0, // x8sub_6_then_sub_32 |
| 50252 | 0, // x8sub_6_then_sub_32_hi |
| 50253 | 0, // x8sub_5_then_sub_32 |
| 50254 | 0, // x8sub_5_then_sub_32_hi |
| 50255 | 0, // x8sub_4_then_sub_32 |
| 50256 | 0, // x8sub_4_then_sub_32_hi |
| 50257 | 0, // x8sub_3_then_sub_32 |
| 50258 | 0, // x8sub_3_then_sub_32_hi |
| 50259 | 0, // x8sub_2_then_sub_32 |
| 50260 | 0, // x8sub_2_then_sub_32_hi |
| 50261 | 0, // x8sub_1_then_sub_32 |
| 50262 | 0, // x8sub_1_then_sub_32_hi |
| 50263 | 0, // subo64_then_sub_32 |
| 50264 | 0, // subo64_then_sub_32_hi |
| 50265 | 129, // zsub1_then_zsub_hi -> ZPR2 |
| 50266 | 0, // zsub3_then_zsub_hi |
| 50267 | 0, // zsub2_then_zsub_hi |
| 50268 | 0, // dsub0_dsub1 |
| 50269 | 0, // dsub0_dsub1_dsub2 |
| 50270 | 0, // dsub1_dsub2 |
| 50271 | 0, // dsub1_dsub2_dsub3 |
| 50272 | 0, // dsub2_dsub3 |
| 50273 | 129, // dsub_dsub1 -> ZPR2 |
| 50274 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50275 | 0, // dsub_dsub1_dsub2 |
| 50276 | 0, // qsub0_qsub1 |
| 50277 | 0, // qsub0_qsub1_qsub2 |
| 50278 | 0, // qsub1_qsub2 |
| 50279 | 0, // qsub1_qsub2_qsub3 |
| 50280 | 0, // qsub2_qsub3 |
| 50281 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50282 | 0, // x8sub_0_x8sub_1 |
| 50283 | 0, // x8sub_2_x8sub_3 |
| 50284 | 0, // x8sub_4_x8sub_5 |
| 50285 | 0, // x8sub_6_x8sub_7 |
| 50286 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50287 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50288 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50289 | 0, // sub_32_subo64_then_sub_32 |
| 50290 | 129, // zsub_qsub1 -> ZPR2 |
| 50291 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50292 | 0, // zsub_qsub1_qsub2 |
| 50293 | 0, // zsub0_zsub1 |
| 50294 | 0, // zsub0_zsub1_zsub2 |
| 50295 | 0, // zsub1_zsub2 |
| 50296 | 0, // zsub1_zsub2_zsub3 |
| 50297 | 0, // zsub2_zsub3 |
| 50298 | 0, // zsub0_zsub2 |
| 50299 | 0, // zsub1_zsub3 |
| 50300 | }, |
| 50301 | { // ZPR2StridedOrContiguous |
| 50302 | 130, // bsub -> ZPR2StridedOrContiguous |
| 50303 | 130, // bsub_hi -> ZPR2StridedOrContiguous |
| 50304 | 130, // dsub -> ZPR2StridedOrContiguous |
| 50305 | 0, // dsub0 |
| 50306 | 130, // dsub1 -> ZPR2StridedOrContiguous |
| 50307 | 0, // dsub2 |
| 50308 | 0, // dsub3 |
| 50309 | 130, // dsub_hi -> ZPR2StridedOrContiguous |
| 50310 | 130, // hsub -> ZPR2StridedOrContiguous |
| 50311 | 130, // hsub_hi -> ZPR2StridedOrContiguous |
| 50312 | 0, // psub |
| 50313 | 0, // psub0 |
| 50314 | 0, // psub1 |
| 50315 | 0, // qsub0 |
| 50316 | 130, // qsub1 -> ZPR2StridedOrContiguous |
| 50317 | 0, // qsub2 |
| 50318 | 0, // qsub3 |
| 50319 | 130, // ssub -> ZPR2StridedOrContiguous |
| 50320 | 130, // ssub_hi -> ZPR2StridedOrContiguous |
| 50321 | 0, // sub_32 |
| 50322 | 0, // sub_32_hi |
| 50323 | 0, // sube32 |
| 50324 | 0, // sube64 |
| 50325 | 0, // subo32 |
| 50326 | 0, // subo64 |
| 50327 | 0, // x8sub_0 |
| 50328 | 0, // x8sub_1 |
| 50329 | 0, // x8sub_2 |
| 50330 | 0, // x8sub_3 |
| 50331 | 0, // x8sub_4 |
| 50332 | 0, // x8sub_5 |
| 50333 | 0, // x8sub_6 |
| 50334 | 0, // x8sub_7 |
| 50335 | 0, // zasubb |
| 50336 | 0, // zasubd0 |
| 50337 | 0, // zasubd1 |
| 50338 | 0, // zasubh0 |
| 50339 | 0, // zasubh1 |
| 50340 | 0, // zasubq0 |
| 50341 | 0, // zasubq1 |
| 50342 | 0, // zasubs0 |
| 50343 | 0, // zasubs1 |
| 50344 | 130, // zsub -> ZPR2StridedOrContiguous |
| 50345 | 130, // zsub0 -> ZPR2StridedOrContiguous |
| 50346 | 130, // zsub1 -> ZPR2StridedOrContiguous |
| 50347 | 0, // zsub2 |
| 50348 | 0, // zsub3 |
| 50349 | 130, // zsub_hi -> ZPR2StridedOrContiguous |
| 50350 | 0, // zasubd1_then_zasubq0 |
| 50351 | 0, // zasubd1_then_zasubq1 |
| 50352 | 0, // zasubs1_then_zasubd0 |
| 50353 | 0, // zasubs1_then_zasubd1 |
| 50354 | 0, // zasubs1_then_zasubq0 |
| 50355 | 0, // zasubs1_then_zasubq1 |
| 50356 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50357 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50358 | 0, // zasubh1_then_zasubd0 |
| 50359 | 0, // zasubh1_then_zasubd1 |
| 50360 | 0, // zasubh1_then_zasubq0 |
| 50361 | 0, // zasubh1_then_zasubq1 |
| 50362 | 0, // zasubh1_then_zasubs0 |
| 50363 | 0, // zasubh1_then_zasubs1 |
| 50364 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50365 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50366 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50367 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50368 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50369 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50370 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50371 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50372 | 130, // dsub1_then_bsub -> ZPR2StridedOrContiguous |
| 50373 | 130, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous |
| 50374 | 130, // dsub1_then_hsub -> ZPR2StridedOrContiguous |
| 50375 | 130, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous |
| 50376 | 130, // dsub1_then_ssub -> ZPR2StridedOrContiguous |
| 50377 | 130, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous |
| 50378 | 0, // dsub3_then_bsub |
| 50379 | 0, // dsub3_then_bsub_hi |
| 50380 | 0, // dsub3_then_hsub |
| 50381 | 0, // dsub3_then_hsub_hi |
| 50382 | 0, // dsub3_then_ssub |
| 50383 | 0, // dsub3_then_ssub_hi |
| 50384 | 0, // dsub2_then_bsub |
| 50385 | 0, // dsub2_then_bsub_hi |
| 50386 | 0, // dsub2_then_hsub |
| 50387 | 0, // dsub2_then_hsub_hi |
| 50388 | 0, // dsub2_then_ssub |
| 50389 | 0, // dsub2_then_ssub_hi |
| 50390 | 0, // psub1_then_psub |
| 50391 | 130, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous |
| 50392 | 0, // qsub3_then_dsub_hi |
| 50393 | 0, // qsub2_then_dsub_hi |
| 50394 | 0, // x8sub_7_then_sub_32 |
| 50395 | 0, // x8sub_7_then_sub_32_hi |
| 50396 | 0, // x8sub_6_then_sub_32 |
| 50397 | 0, // x8sub_6_then_sub_32_hi |
| 50398 | 0, // x8sub_5_then_sub_32 |
| 50399 | 0, // x8sub_5_then_sub_32_hi |
| 50400 | 0, // x8sub_4_then_sub_32 |
| 50401 | 0, // x8sub_4_then_sub_32_hi |
| 50402 | 0, // x8sub_3_then_sub_32 |
| 50403 | 0, // x8sub_3_then_sub_32_hi |
| 50404 | 0, // x8sub_2_then_sub_32 |
| 50405 | 0, // x8sub_2_then_sub_32_hi |
| 50406 | 0, // x8sub_1_then_sub_32 |
| 50407 | 0, // x8sub_1_then_sub_32_hi |
| 50408 | 0, // subo64_then_sub_32 |
| 50409 | 0, // subo64_then_sub_32_hi |
| 50410 | 130, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous |
| 50411 | 0, // zsub3_then_zsub_hi |
| 50412 | 0, // zsub2_then_zsub_hi |
| 50413 | 0, // dsub0_dsub1 |
| 50414 | 0, // dsub0_dsub1_dsub2 |
| 50415 | 0, // dsub1_dsub2 |
| 50416 | 0, // dsub1_dsub2_dsub3 |
| 50417 | 0, // dsub2_dsub3 |
| 50418 | 134, // dsub_dsub1 -> ZPR2Mul2 |
| 50419 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50420 | 0, // dsub_dsub1_dsub2 |
| 50421 | 0, // qsub0_qsub1 |
| 50422 | 0, // qsub0_qsub1_qsub2 |
| 50423 | 0, // qsub1_qsub2 |
| 50424 | 0, // qsub1_qsub2_qsub3 |
| 50425 | 0, // qsub2_qsub3 |
| 50426 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50427 | 0, // x8sub_0_x8sub_1 |
| 50428 | 0, // x8sub_2_x8sub_3 |
| 50429 | 0, // x8sub_4_x8sub_5 |
| 50430 | 0, // x8sub_6_x8sub_7 |
| 50431 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50432 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50433 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50434 | 0, // sub_32_subo64_then_sub_32 |
| 50435 | 134, // zsub_qsub1 -> ZPR2Mul2 |
| 50436 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50437 | 0, // zsub_qsub1_qsub2 |
| 50438 | 0, // zsub0_zsub1 |
| 50439 | 0, // zsub0_zsub1_zsub2 |
| 50440 | 0, // zsub1_zsub2 |
| 50441 | 0, // zsub1_zsub2_zsub3 |
| 50442 | 0, // zsub2_zsub3 |
| 50443 | 0, // zsub0_zsub2 |
| 50444 | 0, // zsub1_zsub3 |
| 50445 | }, |
| 50446 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50447 | 131, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50448 | 131, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50449 | 131, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50450 | 0, // dsub0 |
| 50451 | 131, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50452 | 0, // dsub2 |
| 50453 | 0, // dsub3 |
| 50454 | 131, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50455 | 131, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50456 | 131, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50457 | 0, // psub |
| 50458 | 0, // psub0 |
| 50459 | 0, // psub1 |
| 50460 | 0, // qsub0 |
| 50461 | 131, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50462 | 0, // qsub2 |
| 50463 | 0, // qsub3 |
| 50464 | 131, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50465 | 131, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50466 | 0, // sub_32 |
| 50467 | 0, // sub_32_hi |
| 50468 | 0, // sube32 |
| 50469 | 0, // sube64 |
| 50470 | 0, // subo32 |
| 50471 | 0, // subo64 |
| 50472 | 0, // x8sub_0 |
| 50473 | 0, // x8sub_1 |
| 50474 | 0, // x8sub_2 |
| 50475 | 0, // x8sub_3 |
| 50476 | 0, // x8sub_4 |
| 50477 | 0, // x8sub_5 |
| 50478 | 0, // x8sub_6 |
| 50479 | 0, // x8sub_7 |
| 50480 | 0, // zasubb |
| 50481 | 0, // zasubd0 |
| 50482 | 0, // zasubd1 |
| 50483 | 0, // zasubh0 |
| 50484 | 0, // zasubh1 |
| 50485 | 0, // zasubq0 |
| 50486 | 0, // zasubq1 |
| 50487 | 0, // zasubs0 |
| 50488 | 0, // zasubs1 |
| 50489 | 131, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50490 | 131, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50491 | 131, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50492 | 0, // zsub2 |
| 50493 | 0, // zsub3 |
| 50494 | 131, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50495 | 0, // zasubd1_then_zasubq0 |
| 50496 | 0, // zasubd1_then_zasubq1 |
| 50497 | 0, // zasubs1_then_zasubd0 |
| 50498 | 0, // zasubs1_then_zasubd1 |
| 50499 | 0, // zasubs1_then_zasubq0 |
| 50500 | 0, // zasubs1_then_zasubq1 |
| 50501 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50502 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50503 | 0, // zasubh1_then_zasubd0 |
| 50504 | 0, // zasubh1_then_zasubd1 |
| 50505 | 0, // zasubh1_then_zasubq0 |
| 50506 | 0, // zasubh1_then_zasubq1 |
| 50507 | 0, // zasubh1_then_zasubs0 |
| 50508 | 0, // zasubh1_then_zasubs1 |
| 50509 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50510 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50511 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50512 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50513 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50514 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50515 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50516 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50517 | 131, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50518 | 131, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50519 | 131, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50520 | 131, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50521 | 131, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50522 | 131, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50523 | 0, // dsub3_then_bsub |
| 50524 | 0, // dsub3_then_bsub_hi |
| 50525 | 0, // dsub3_then_hsub |
| 50526 | 0, // dsub3_then_hsub_hi |
| 50527 | 0, // dsub3_then_ssub |
| 50528 | 0, // dsub3_then_ssub_hi |
| 50529 | 0, // dsub2_then_bsub |
| 50530 | 0, // dsub2_then_bsub_hi |
| 50531 | 0, // dsub2_then_hsub |
| 50532 | 0, // dsub2_then_hsub_hi |
| 50533 | 0, // dsub2_then_ssub |
| 50534 | 0, // dsub2_then_ssub_hi |
| 50535 | 0, // psub1_then_psub |
| 50536 | 131, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50537 | 0, // qsub3_then_dsub_hi |
| 50538 | 0, // qsub2_then_dsub_hi |
| 50539 | 0, // x8sub_7_then_sub_32 |
| 50540 | 0, // x8sub_7_then_sub_32_hi |
| 50541 | 0, // x8sub_6_then_sub_32 |
| 50542 | 0, // x8sub_6_then_sub_32_hi |
| 50543 | 0, // x8sub_5_then_sub_32 |
| 50544 | 0, // x8sub_5_then_sub_32_hi |
| 50545 | 0, // x8sub_4_then_sub_32 |
| 50546 | 0, // x8sub_4_then_sub_32_hi |
| 50547 | 0, // x8sub_3_then_sub_32 |
| 50548 | 0, // x8sub_3_then_sub_32_hi |
| 50549 | 0, // x8sub_2_then_sub_32 |
| 50550 | 0, // x8sub_2_then_sub_32_hi |
| 50551 | 0, // x8sub_1_then_sub_32 |
| 50552 | 0, // x8sub_1_then_sub_32_hi |
| 50553 | 0, // subo64_then_sub_32 |
| 50554 | 0, // subo64_then_sub_32_hi |
| 50555 | 131, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 50556 | 0, // zsub3_then_zsub_hi |
| 50557 | 0, // zsub2_then_zsub_hi |
| 50558 | 0, // dsub0_dsub1 |
| 50559 | 0, // dsub0_dsub1_dsub2 |
| 50560 | 0, // dsub1_dsub2 |
| 50561 | 0, // dsub1_dsub2_dsub3 |
| 50562 | 0, // dsub2_dsub3 |
| 50563 | 134, // dsub_dsub1 -> ZPR2Mul2 |
| 50564 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50565 | 0, // dsub_dsub1_dsub2 |
| 50566 | 0, // qsub0_qsub1 |
| 50567 | 0, // qsub0_qsub1_qsub2 |
| 50568 | 0, // qsub1_qsub2 |
| 50569 | 0, // qsub1_qsub2_qsub3 |
| 50570 | 0, // qsub2_qsub3 |
| 50571 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50572 | 0, // x8sub_0_x8sub_1 |
| 50573 | 0, // x8sub_2_x8sub_3 |
| 50574 | 0, // x8sub_4_x8sub_5 |
| 50575 | 0, // x8sub_6_x8sub_7 |
| 50576 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50577 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50578 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50579 | 0, // sub_32_subo64_then_sub_32 |
| 50580 | 134, // zsub_qsub1 -> ZPR2Mul2 |
| 50581 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50582 | 0, // zsub_qsub1_qsub2 |
| 50583 | 0, // zsub0_zsub1 |
| 50584 | 0, // zsub0_zsub1_zsub2 |
| 50585 | 0, // zsub1_zsub2 |
| 50586 | 0, // zsub1_zsub2_zsub3 |
| 50587 | 0, // zsub2_zsub3 |
| 50588 | 0, // zsub0_zsub2 |
| 50589 | 0, // zsub1_zsub3 |
| 50590 | }, |
| 50591 | { // QQ_with_dsub1_in_FPR64_lo |
| 50592 | 132, // bsub -> QQ_with_dsub1_in_FPR64_lo |
| 50593 | 132, // bsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50594 | 132, // dsub -> QQ_with_dsub1_in_FPR64_lo |
| 50595 | 0, // dsub0 |
| 50596 | 132, // dsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 50597 | 0, // dsub2 |
| 50598 | 0, // dsub3 |
| 50599 | 132, // dsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50600 | 132, // hsub -> QQ_with_dsub1_in_FPR64_lo |
| 50601 | 132, // hsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50602 | 0, // psub |
| 50603 | 0, // psub0 |
| 50604 | 0, // psub1 |
| 50605 | 132, // qsub0 -> QQ_with_dsub1_in_FPR64_lo |
| 50606 | 132, // qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 50607 | 0, // qsub2 |
| 50608 | 0, // qsub3 |
| 50609 | 132, // ssub -> QQ_with_dsub1_in_FPR64_lo |
| 50610 | 132, // ssub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50611 | 0, // sub_32 |
| 50612 | 0, // sub_32_hi |
| 50613 | 0, // sube32 |
| 50614 | 0, // sube64 |
| 50615 | 0, // subo32 |
| 50616 | 0, // subo64 |
| 50617 | 0, // x8sub_0 |
| 50618 | 0, // x8sub_1 |
| 50619 | 0, // x8sub_2 |
| 50620 | 0, // x8sub_3 |
| 50621 | 0, // x8sub_4 |
| 50622 | 0, // x8sub_5 |
| 50623 | 0, // x8sub_6 |
| 50624 | 0, // x8sub_7 |
| 50625 | 0, // zasubb |
| 50626 | 0, // zasubd0 |
| 50627 | 0, // zasubd1 |
| 50628 | 0, // zasubh0 |
| 50629 | 0, // zasubh1 |
| 50630 | 0, // zasubq0 |
| 50631 | 0, // zasubq1 |
| 50632 | 0, // zasubs0 |
| 50633 | 0, // zasubs1 |
| 50634 | 0, // zsub |
| 50635 | 0, // zsub0 |
| 50636 | 0, // zsub1 |
| 50637 | 0, // zsub2 |
| 50638 | 0, // zsub3 |
| 50639 | 0, // zsub_hi |
| 50640 | 0, // zasubd1_then_zasubq0 |
| 50641 | 0, // zasubd1_then_zasubq1 |
| 50642 | 0, // zasubs1_then_zasubd0 |
| 50643 | 0, // zasubs1_then_zasubd1 |
| 50644 | 0, // zasubs1_then_zasubq0 |
| 50645 | 0, // zasubs1_then_zasubq1 |
| 50646 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50647 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50648 | 0, // zasubh1_then_zasubd0 |
| 50649 | 0, // zasubh1_then_zasubd1 |
| 50650 | 0, // zasubh1_then_zasubq0 |
| 50651 | 0, // zasubh1_then_zasubq1 |
| 50652 | 0, // zasubh1_then_zasubs0 |
| 50653 | 0, // zasubh1_then_zasubs1 |
| 50654 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50655 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50656 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50657 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50658 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50659 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50660 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50661 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50662 | 132, // dsub1_then_bsub -> QQ_with_dsub1_in_FPR64_lo |
| 50663 | 132, // dsub1_then_bsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50664 | 132, // dsub1_then_hsub -> QQ_with_dsub1_in_FPR64_lo |
| 50665 | 132, // dsub1_then_hsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50666 | 132, // dsub1_then_ssub -> QQ_with_dsub1_in_FPR64_lo |
| 50667 | 132, // dsub1_then_ssub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50668 | 0, // dsub3_then_bsub |
| 50669 | 0, // dsub3_then_bsub_hi |
| 50670 | 0, // dsub3_then_hsub |
| 50671 | 0, // dsub3_then_hsub_hi |
| 50672 | 0, // dsub3_then_ssub |
| 50673 | 0, // dsub3_then_ssub_hi |
| 50674 | 0, // dsub2_then_bsub |
| 50675 | 0, // dsub2_then_bsub_hi |
| 50676 | 0, // dsub2_then_hsub |
| 50677 | 0, // dsub2_then_hsub_hi |
| 50678 | 0, // dsub2_then_ssub |
| 50679 | 0, // dsub2_then_ssub_hi |
| 50680 | 0, // psub1_then_psub |
| 50681 | 132, // qsub1_then_dsub_hi -> QQ_with_dsub1_in_FPR64_lo |
| 50682 | 0, // qsub3_then_dsub_hi |
| 50683 | 0, // qsub2_then_dsub_hi |
| 50684 | 0, // x8sub_7_then_sub_32 |
| 50685 | 0, // x8sub_7_then_sub_32_hi |
| 50686 | 0, // x8sub_6_then_sub_32 |
| 50687 | 0, // x8sub_6_then_sub_32_hi |
| 50688 | 0, // x8sub_5_then_sub_32 |
| 50689 | 0, // x8sub_5_then_sub_32_hi |
| 50690 | 0, // x8sub_4_then_sub_32 |
| 50691 | 0, // x8sub_4_then_sub_32_hi |
| 50692 | 0, // x8sub_3_then_sub_32 |
| 50693 | 0, // x8sub_3_then_sub_32_hi |
| 50694 | 0, // x8sub_2_then_sub_32 |
| 50695 | 0, // x8sub_2_then_sub_32_hi |
| 50696 | 0, // x8sub_1_then_sub_32 |
| 50697 | 0, // x8sub_1_then_sub_32_hi |
| 50698 | 0, // subo64_then_sub_32 |
| 50699 | 0, // subo64_then_sub_32_hi |
| 50700 | 0, // zsub1_then_zsub_hi |
| 50701 | 0, // zsub3_then_zsub_hi |
| 50702 | 0, // zsub2_then_zsub_hi |
| 50703 | 0, // dsub0_dsub1 |
| 50704 | 0, // dsub0_dsub1_dsub2 |
| 50705 | 0, // dsub1_dsub2 |
| 50706 | 0, // dsub1_dsub2_dsub3 |
| 50707 | 0, // dsub2_dsub3 |
| 50708 | 132, // dsub_dsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 50709 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50710 | 0, // dsub_dsub1_dsub2 |
| 50711 | 0, // qsub0_qsub1 |
| 50712 | 0, // qsub0_qsub1_qsub2 |
| 50713 | 0, // qsub1_qsub2 |
| 50714 | 0, // qsub1_qsub2_qsub3 |
| 50715 | 0, // qsub2_qsub3 |
| 50716 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50717 | 0, // x8sub_0_x8sub_1 |
| 50718 | 0, // x8sub_2_x8sub_3 |
| 50719 | 0, // x8sub_4_x8sub_5 |
| 50720 | 0, // x8sub_6_x8sub_7 |
| 50721 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50722 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50723 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50724 | 0, // sub_32_subo64_then_sub_32 |
| 50725 | 0, // zsub_qsub1 |
| 50726 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50727 | 0, // zsub_qsub1_qsub2 |
| 50728 | 0, // zsub0_zsub1 |
| 50729 | 0, // zsub0_zsub1_zsub2 |
| 50730 | 0, // zsub1_zsub2 |
| 50731 | 0, // zsub1_zsub2_zsub3 |
| 50732 | 0, // zsub2_zsub3 |
| 50733 | 0, // zsub0_zsub2 |
| 50734 | 0, // zsub1_zsub3 |
| 50735 | }, |
| 50736 | { // QQ_with_qsub0_in_FPR128_lo |
| 50737 | 133, // bsub -> QQ_with_qsub0_in_FPR128_lo |
| 50738 | 133, // bsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50739 | 133, // dsub -> QQ_with_qsub0_in_FPR128_lo |
| 50740 | 0, // dsub0 |
| 50741 | 133, // dsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 50742 | 0, // dsub2 |
| 50743 | 0, // dsub3 |
| 50744 | 133, // dsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50745 | 133, // hsub -> QQ_with_qsub0_in_FPR128_lo |
| 50746 | 133, // hsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50747 | 0, // psub |
| 50748 | 0, // psub0 |
| 50749 | 0, // psub1 |
| 50750 | 133, // qsub0 -> QQ_with_qsub0_in_FPR128_lo |
| 50751 | 133, // qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 50752 | 0, // qsub2 |
| 50753 | 0, // qsub3 |
| 50754 | 133, // ssub -> QQ_with_qsub0_in_FPR128_lo |
| 50755 | 133, // ssub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50756 | 0, // sub_32 |
| 50757 | 0, // sub_32_hi |
| 50758 | 0, // sube32 |
| 50759 | 0, // sube64 |
| 50760 | 0, // subo32 |
| 50761 | 0, // subo64 |
| 50762 | 0, // x8sub_0 |
| 50763 | 0, // x8sub_1 |
| 50764 | 0, // x8sub_2 |
| 50765 | 0, // x8sub_3 |
| 50766 | 0, // x8sub_4 |
| 50767 | 0, // x8sub_5 |
| 50768 | 0, // x8sub_6 |
| 50769 | 0, // x8sub_7 |
| 50770 | 0, // zasubb |
| 50771 | 0, // zasubd0 |
| 50772 | 0, // zasubd1 |
| 50773 | 0, // zasubh0 |
| 50774 | 0, // zasubh1 |
| 50775 | 0, // zasubq0 |
| 50776 | 0, // zasubq1 |
| 50777 | 0, // zasubs0 |
| 50778 | 0, // zasubs1 |
| 50779 | 0, // zsub |
| 50780 | 0, // zsub0 |
| 50781 | 0, // zsub1 |
| 50782 | 0, // zsub2 |
| 50783 | 0, // zsub3 |
| 50784 | 0, // zsub_hi |
| 50785 | 0, // zasubd1_then_zasubq0 |
| 50786 | 0, // zasubd1_then_zasubq1 |
| 50787 | 0, // zasubs1_then_zasubd0 |
| 50788 | 0, // zasubs1_then_zasubd1 |
| 50789 | 0, // zasubs1_then_zasubq0 |
| 50790 | 0, // zasubs1_then_zasubq1 |
| 50791 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50792 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50793 | 0, // zasubh1_then_zasubd0 |
| 50794 | 0, // zasubh1_then_zasubd1 |
| 50795 | 0, // zasubh1_then_zasubq0 |
| 50796 | 0, // zasubh1_then_zasubq1 |
| 50797 | 0, // zasubh1_then_zasubs0 |
| 50798 | 0, // zasubh1_then_zasubs1 |
| 50799 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50800 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50801 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50802 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50803 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50804 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50805 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50806 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50807 | 133, // dsub1_then_bsub -> QQ_with_qsub0_in_FPR128_lo |
| 50808 | 133, // dsub1_then_bsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50809 | 133, // dsub1_then_hsub -> QQ_with_qsub0_in_FPR128_lo |
| 50810 | 133, // dsub1_then_hsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50811 | 133, // dsub1_then_ssub -> QQ_with_qsub0_in_FPR128_lo |
| 50812 | 133, // dsub1_then_ssub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50813 | 0, // dsub3_then_bsub |
| 50814 | 0, // dsub3_then_bsub_hi |
| 50815 | 0, // dsub3_then_hsub |
| 50816 | 0, // dsub3_then_hsub_hi |
| 50817 | 0, // dsub3_then_ssub |
| 50818 | 0, // dsub3_then_ssub_hi |
| 50819 | 0, // dsub2_then_bsub |
| 50820 | 0, // dsub2_then_bsub_hi |
| 50821 | 0, // dsub2_then_hsub |
| 50822 | 0, // dsub2_then_hsub_hi |
| 50823 | 0, // dsub2_then_ssub |
| 50824 | 0, // dsub2_then_ssub_hi |
| 50825 | 0, // psub1_then_psub |
| 50826 | 133, // qsub1_then_dsub_hi -> QQ_with_qsub0_in_FPR128_lo |
| 50827 | 0, // qsub3_then_dsub_hi |
| 50828 | 0, // qsub2_then_dsub_hi |
| 50829 | 0, // x8sub_7_then_sub_32 |
| 50830 | 0, // x8sub_7_then_sub_32_hi |
| 50831 | 0, // x8sub_6_then_sub_32 |
| 50832 | 0, // x8sub_6_then_sub_32_hi |
| 50833 | 0, // x8sub_5_then_sub_32 |
| 50834 | 0, // x8sub_5_then_sub_32_hi |
| 50835 | 0, // x8sub_4_then_sub_32 |
| 50836 | 0, // x8sub_4_then_sub_32_hi |
| 50837 | 0, // x8sub_3_then_sub_32 |
| 50838 | 0, // x8sub_3_then_sub_32_hi |
| 50839 | 0, // x8sub_2_then_sub_32 |
| 50840 | 0, // x8sub_2_then_sub_32_hi |
| 50841 | 0, // x8sub_1_then_sub_32 |
| 50842 | 0, // x8sub_1_then_sub_32_hi |
| 50843 | 0, // subo64_then_sub_32 |
| 50844 | 0, // subo64_then_sub_32_hi |
| 50845 | 0, // zsub1_then_zsub_hi |
| 50846 | 0, // zsub3_then_zsub_hi |
| 50847 | 0, // zsub2_then_zsub_hi |
| 50848 | 0, // dsub0_dsub1 |
| 50849 | 0, // dsub0_dsub1_dsub2 |
| 50850 | 0, // dsub1_dsub2 |
| 50851 | 0, // dsub1_dsub2_dsub3 |
| 50852 | 0, // dsub2_dsub3 |
| 50853 | 133, // dsub_dsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 50854 | 0, // dsub_dsub1_dsub2_dsub3 |
| 50855 | 0, // dsub_dsub1_dsub2 |
| 50856 | 0, // qsub0_qsub1 |
| 50857 | 0, // qsub0_qsub1_qsub2 |
| 50858 | 0, // qsub1_qsub2 |
| 50859 | 0, // qsub1_qsub2_qsub3 |
| 50860 | 0, // qsub2_qsub3 |
| 50861 | 0, // sub_32_x8sub_1_then_sub_32 |
| 50862 | 0, // x8sub_0_x8sub_1 |
| 50863 | 0, // x8sub_2_x8sub_3 |
| 50864 | 0, // x8sub_4_x8sub_5 |
| 50865 | 0, // x8sub_6_x8sub_7 |
| 50866 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 50867 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 50868 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 50869 | 0, // sub_32_subo64_then_sub_32 |
| 50870 | 0, // zsub_qsub1 |
| 50871 | 0, // zsub_qsub1_qsub2_qsub3 |
| 50872 | 0, // zsub_qsub1_qsub2 |
| 50873 | 0, // zsub0_zsub1 |
| 50874 | 0, // zsub0_zsub1_zsub2 |
| 50875 | 0, // zsub1_zsub2 |
| 50876 | 0, // zsub1_zsub2_zsub3 |
| 50877 | 0, // zsub2_zsub3 |
| 50878 | 0, // zsub0_zsub2 |
| 50879 | 0, // zsub1_zsub3 |
| 50880 | }, |
| 50881 | { // ZPR2Mul2 |
| 50882 | 134, // bsub -> ZPR2Mul2 |
| 50883 | 134, // bsub_hi -> ZPR2Mul2 |
| 50884 | 134, // dsub -> ZPR2Mul2 |
| 50885 | 0, // dsub0 |
| 50886 | 134, // dsub1 -> ZPR2Mul2 |
| 50887 | 0, // dsub2 |
| 50888 | 0, // dsub3 |
| 50889 | 134, // dsub_hi -> ZPR2Mul2 |
| 50890 | 134, // hsub -> ZPR2Mul2 |
| 50891 | 134, // hsub_hi -> ZPR2Mul2 |
| 50892 | 0, // psub |
| 50893 | 0, // psub0 |
| 50894 | 0, // psub1 |
| 50895 | 0, // qsub0 |
| 50896 | 134, // qsub1 -> ZPR2Mul2 |
| 50897 | 0, // qsub2 |
| 50898 | 0, // qsub3 |
| 50899 | 134, // ssub -> ZPR2Mul2 |
| 50900 | 134, // ssub_hi -> ZPR2Mul2 |
| 50901 | 0, // sub_32 |
| 50902 | 0, // sub_32_hi |
| 50903 | 0, // sube32 |
| 50904 | 0, // sube64 |
| 50905 | 0, // subo32 |
| 50906 | 0, // subo64 |
| 50907 | 0, // x8sub_0 |
| 50908 | 0, // x8sub_1 |
| 50909 | 0, // x8sub_2 |
| 50910 | 0, // x8sub_3 |
| 50911 | 0, // x8sub_4 |
| 50912 | 0, // x8sub_5 |
| 50913 | 0, // x8sub_6 |
| 50914 | 0, // x8sub_7 |
| 50915 | 0, // zasubb |
| 50916 | 0, // zasubd0 |
| 50917 | 0, // zasubd1 |
| 50918 | 0, // zasubh0 |
| 50919 | 0, // zasubh1 |
| 50920 | 0, // zasubq0 |
| 50921 | 0, // zasubq1 |
| 50922 | 0, // zasubs0 |
| 50923 | 0, // zasubs1 |
| 50924 | 134, // zsub -> ZPR2Mul2 |
| 50925 | 134, // zsub0 -> ZPR2Mul2 |
| 50926 | 134, // zsub1 -> ZPR2Mul2 |
| 50927 | 0, // zsub2 |
| 50928 | 0, // zsub3 |
| 50929 | 134, // zsub_hi -> ZPR2Mul2 |
| 50930 | 0, // zasubd1_then_zasubq0 |
| 50931 | 0, // zasubd1_then_zasubq1 |
| 50932 | 0, // zasubs1_then_zasubd0 |
| 50933 | 0, // zasubs1_then_zasubd1 |
| 50934 | 0, // zasubs1_then_zasubq0 |
| 50935 | 0, // zasubs1_then_zasubq1 |
| 50936 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 50937 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 50938 | 0, // zasubh1_then_zasubd0 |
| 50939 | 0, // zasubh1_then_zasubd1 |
| 50940 | 0, // zasubh1_then_zasubq0 |
| 50941 | 0, // zasubh1_then_zasubq1 |
| 50942 | 0, // zasubh1_then_zasubs0 |
| 50943 | 0, // zasubh1_then_zasubs1 |
| 50944 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 50945 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 50946 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 50947 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 50948 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 50949 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 50950 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 50951 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 50952 | 134, // dsub1_then_bsub -> ZPR2Mul2 |
| 50953 | 134, // dsub1_then_bsub_hi -> ZPR2Mul2 |
| 50954 | 134, // dsub1_then_hsub -> ZPR2Mul2 |
| 50955 | 134, // dsub1_then_hsub_hi -> ZPR2Mul2 |
| 50956 | 134, // dsub1_then_ssub -> ZPR2Mul2 |
| 50957 | 134, // dsub1_then_ssub_hi -> ZPR2Mul2 |
| 50958 | 0, // dsub3_then_bsub |
| 50959 | 0, // dsub3_then_bsub_hi |
| 50960 | 0, // dsub3_then_hsub |
| 50961 | 0, // dsub3_then_hsub_hi |
| 50962 | 0, // dsub3_then_ssub |
| 50963 | 0, // dsub3_then_ssub_hi |
| 50964 | 0, // dsub2_then_bsub |
| 50965 | 0, // dsub2_then_bsub_hi |
| 50966 | 0, // dsub2_then_hsub |
| 50967 | 0, // dsub2_then_hsub_hi |
| 50968 | 0, // dsub2_then_ssub |
| 50969 | 0, // dsub2_then_ssub_hi |
| 50970 | 0, // psub1_then_psub |
| 50971 | 134, // qsub1_then_dsub_hi -> ZPR2Mul2 |
| 50972 | 0, // qsub3_then_dsub_hi |
| 50973 | 0, // qsub2_then_dsub_hi |
| 50974 | 0, // x8sub_7_then_sub_32 |
| 50975 | 0, // x8sub_7_then_sub_32_hi |
| 50976 | 0, // x8sub_6_then_sub_32 |
| 50977 | 0, // x8sub_6_then_sub_32_hi |
| 50978 | 0, // x8sub_5_then_sub_32 |
| 50979 | 0, // x8sub_5_then_sub_32_hi |
| 50980 | 0, // x8sub_4_then_sub_32 |
| 50981 | 0, // x8sub_4_then_sub_32_hi |
| 50982 | 0, // x8sub_3_then_sub_32 |
| 50983 | 0, // x8sub_3_then_sub_32_hi |
| 50984 | 0, // x8sub_2_then_sub_32 |
| 50985 | 0, // x8sub_2_then_sub_32_hi |
| 50986 | 0, // x8sub_1_then_sub_32 |
| 50987 | 0, // x8sub_1_then_sub_32_hi |
| 50988 | 0, // subo64_then_sub_32 |
| 50989 | 0, // subo64_then_sub_32_hi |
| 50990 | 134, // zsub1_then_zsub_hi -> ZPR2Mul2 |
| 50991 | 0, // zsub3_then_zsub_hi |
| 50992 | 0, // zsub2_then_zsub_hi |
| 50993 | 0, // dsub0_dsub1 |
| 50994 | 0, // dsub0_dsub1_dsub2 |
| 50995 | 0, // dsub1_dsub2 |
| 50996 | 0, // dsub1_dsub2_dsub3 |
| 50997 | 0, // dsub2_dsub3 |
| 50998 | 134, // dsub_dsub1 -> ZPR2Mul2 |
| 50999 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51000 | 0, // dsub_dsub1_dsub2 |
| 51001 | 0, // qsub0_qsub1 |
| 51002 | 0, // qsub0_qsub1_qsub2 |
| 51003 | 0, // qsub1_qsub2 |
| 51004 | 0, // qsub1_qsub2_qsub3 |
| 51005 | 0, // qsub2_qsub3 |
| 51006 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51007 | 0, // x8sub_0_x8sub_1 |
| 51008 | 0, // x8sub_2_x8sub_3 |
| 51009 | 0, // x8sub_4_x8sub_5 |
| 51010 | 0, // x8sub_6_x8sub_7 |
| 51011 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51012 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51013 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51014 | 0, // sub_32_subo64_then_sub_32 |
| 51015 | 134, // zsub_qsub1 -> ZPR2Mul2 |
| 51016 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51017 | 0, // zsub_qsub1_qsub2 |
| 51018 | 0, // zsub0_zsub1 |
| 51019 | 0, // zsub0_zsub1_zsub2 |
| 51020 | 0, // zsub1_zsub2 |
| 51021 | 0, // zsub1_zsub2_zsub3 |
| 51022 | 0, // zsub2_zsub3 |
| 51023 | 0, // zsub0_zsub2 |
| 51024 | 0, // zsub1_zsub3 |
| 51025 | }, |
| 51026 | { // ZPR2Strided |
| 51027 | 135, // bsub -> ZPR2Strided |
| 51028 | 135, // bsub_hi -> ZPR2Strided |
| 51029 | 135, // dsub -> ZPR2Strided |
| 51030 | 0, // dsub0 |
| 51031 | 135, // dsub1 -> ZPR2Strided |
| 51032 | 0, // dsub2 |
| 51033 | 0, // dsub3 |
| 51034 | 135, // dsub_hi -> ZPR2Strided |
| 51035 | 135, // hsub -> ZPR2Strided |
| 51036 | 135, // hsub_hi -> ZPR2Strided |
| 51037 | 0, // psub |
| 51038 | 0, // psub0 |
| 51039 | 0, // psub1 |
| 51040 | 0, // qsub0 |
| 51041 | 135, // qsub1 -> ZPR2Strided |
| 51042 | 0, // qsub2 |
| 51043 | 0, // qsub3 |
| 51044 | 135, // ssub -> ZPR2Strided |
| 51045 | 135, // ssub_hi -> ZPR2Strided |
| 51046 | 0, // sub_32 |
| 51047 | 0, // sub_32_hi |
| 51048 | 0, // sube32 |
| 51049 | 0, // sube64 |
| 51050 | 0, // subo32 |
| 51051 | 0, // subo64 |
| 51052 | 0, // x8sub_0 |
| 51053 | 0, // x8sub_1 |
| 51054 | 0, // x8sub_2 |
| 51055 | 0, // x8sub_3 |
| 51056 | 0, // x8sub_4 |
| 51057 | 0, // x8sub_5 |
| 51058 | 0, // x8sub_6 |
| 51059 | 0, // x8sub_7 |
| 51060 | 0, // zasubb |
| 51061 | 0, // zasubd0 |
| 51062 | 0, // zasubd1 |
| 51063 | 0, // zasubh0 |
| 51064 | 0, // zasubh1 |
| 51065 | 0, // zasubq0 |
| 51066 | 0, // zasubq1 |
| 51067 | 0, // zasubs0 |
| 51068 | 0, // zasubs1 |
| 51069 | 135, // zsub -> ZPR2Strided |
| 51070 | 135, // zsub0 -> ZPR2Strided |
| 51071 | 135, // zsub1 -> ZPR2Strided |
| 51072 | 0, // zsub2 |
| 51073 | 0, // zsub3 |
| 51074 | 135, // zsub_hi -> ZPR2Strided |
| 51075 | 0, // zasubd1_then_zasubq0 |
| 51076 | 0, // zasubd1_then_zasubq1 |
| 51077 | 0, // zasubs1_then_zasubd0 |
| 51078 | 0, // zasubs1_then_zasubd1 |
| 51079 | 0, // zasubs1_then_zasubq0 |
| 51080 | 0, // zasubs1_then_zasubq1 |
| 51081 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51082 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51083 | 0, // zasubh1_then_zasubd0 |
| 51084 | 0, // zasubh1_then_zasubd1 |
| 51085 | 0, // zasubh1_then_zasubq0 |
| 51086 | 0, // zasubh1_then_zasubq1 |
| 51087 | 0, // zasubh1_then_zasubs0 |
| 51088 | 0, // zasubh1_then_zasubs1 |
| 51089 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51090 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51091 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51092 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51093 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51094 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51095 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51096 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51097 | 135, // dsub1_then_bsub -> ZPR2Strided |
| 51098 | 135, // dsub1_then_bsub_hi -> ZPR2Strided |
| 51099 | 135, // dsub1_then_hsub -> ZPR2Strided |
| 51100 | 135, // dsub1_then_hsub_hi -> ZPR2Strided |
| 51101 | 135, // dsub1_then_ssub -> ZPR2Strided |
| 51102 | 135, // dsub1_then_ssub_hi -> ZPR2Strided |
| 51103 | 0, // dsub3_then_bsub |
| 51104 | 0, // dsub3_then_bsub_hi |
| 51105 | 0, // dsub3_then_hsub |
| 51106 | 0, // dsub3_then_hsub_hi |
| 51107 | 0, // dsub3_then_ssub |
| 51108 | 0, // dsub3_then_ssub_hi |
| 51109 | 0, // dsub2_then_bsub |
| 51110 | 0, // dsub2_then_bsub_hi |
| 51111 | 0, // dsub2_then_hsub |
| 51112 | 0, // dsub2_then_hsub_hi |
| 51113 | 0, // dsub2_then_ssub |
| 51114 | 0, // dsub2_then_ssub_hi |
| 51115 | 0, // psub1_then_psub |
| 51116 | 135, // qsub1_then_dsub_hi -> ZPR2Strided |
| 51117 | 0, // qsub3_then_dsub_hi |
| 51118 | 0, // qsub2_then_dsub_hi |
| 51119 | 0, // x8sub_7_then_sub_32 |
| 51120 | 0, // x8sub_7_then_sub_32_hi |
| 51121 | 0, // x8sub_6_then_sub_32 |
| 51122 | 0, // x8sub_6_then_sub_32_hi |
| 51123 | 0, // x8sub_5_then_sub_32 |
| 51124 | 0, // x8sub_5_then_sub_32_hi |
| 51125 | 0, // x8sub_4_then_sub_32 |
| 51126 | 0, // x8sub_4_then_sub_32_hi |
| 51127 | 0, // x8sub_3_then_sub_32 |
| 51128 | 0, // x8sub_3_then_sub_32_hi |
| 51129 | 0, // x8sub_2_then_sub_32 |
| 51130 | 0, // x8sub_2_then_sub_32_hi |
| 51131 | 0, // x8sub_1_then_sub_32 |
| 51132 | 0, // x8sub_1_then_sub_32_hi |
| 51133 | 0, // subo64_then_sub_32 |
| 51134 | 0, // subo64_then_sub_32_hi |
| 51135 | 135, // zsub1_then_zsub_hi -> ZPR2Strided |
| 51136 | 0, // zsub3_then_zsub_hi |
| 51137 | 0, // zsub2_then_zsub_hi |
| 51138 | 0, // dsub0_dsub1 |
| 51139 | 0, // dsub0_dsub1_dsub2 |
| 51140 | 0, // dsub1_dsub2 |
| 51141 | 0, // dsub1_dsub2_dsub3 |
| 51142 | 0, // dsub2_dsub3 |
| 51143 | 0, // dsub_dsub1 |
| 51144 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51145 | 0, // dsub_dsub1_dsub2 |
| 51146 | 0, // qsub0_qsub1 |
| 51147 | 0, // qsub0_qsub1_qsub2 |
| 51148 | 0, // qsub1_qsub2 |
| 51149 | 0, // qsub1_qsub2_qsub3 |
| 51150 | 0, // qsub2_qsub3 |
| 51151 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51152 | 0, // x8sub_0_x8sub_1 |
| 51153 | 0, // x8sub_2_x8sub_3 |
| 51154 | 0, // x8sub_4_x8sub_5 |
| 51155 | 0, // x8sub_6_x8sub_7 |
| 51156 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51157 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51158 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51159 | 0, // sub_32_subo64_then_sub_32 |
| 51160 | 0, // zsub_qsub1 |
| 51161 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51162 | 0, // zsub_qsub1_qsub2 |
| 51163 | 0, // zsub0_zsub1 |
| 51164 | 0, // zsub0_zsub1_zsub2 |
| 51165 | 0, // zsub1_zsub2 |
| 51166 | 0, // zsub1_zsub2_zsub3 |
| 51167 | 0, // zsub2_zsub3 |
| 51168 | 0, // zsub0_zsub2 |
| 51169 | 0, // zsub1_zsub3 |
| 51170 | }, |
| 51171 | { // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51172 | 136, // bsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51173 | 136, // bsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51174 | 136, // dsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51175 | 0, // dsub0 |
| 51176 | 136, // dsub1 -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51177 | 0, // dsub2 |
| 51178 | 0, // dsub3 |
| 51179 | 136, // dsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51180 | 136, // hsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51181 | 136, // hsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51182 | 0, // psub |
| 51183 | 0, // psub0 |
| 51184 | 0, // psub1 |
| 51185 | 0, // qsub0 |
| 51186 | 136, // qsub1 -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51187 | 0, // qsub2 |
| 51188 | 0, // qsub3 |
| 51189 | 136, // ssub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51190 | 136, // ssub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51191 | 0, // sub_32 |
| 51192 | 0, // sub_32_hi |
| 51193 | 0, // sube32 |
| 51194 | 0, // sube64 |
| 51195 | 0, // subo32 |
| 51196 | 0, // subo64 |
| 51197 | 0, // x8sub_0 |
| 51198 | 0, // x8sub_1 |
| 51199 | 0, // x8sub_2 |
| 51200 | 0, // x8sub_3 |
| 51201 | 0, // x8sub_4 |
| 51202 | 0, // x8sub_5 |
| 51203 | 0, // x8sub_6 |
| 51204 | 0, // x8sub_7 |
| 51205 | 0, // zasubb |
| 51206 | 0, // zasubd0 |
| 51207 | 0, // zasubd1 |
| 51208 | 0, // zasubh0 |
| 51209 | 0, // zasubh1 |
| 51210 | 0, // zasubq0 |
| 51211 | 0, // zasubq1 |
| 51212 | 0, // zasubs0 |
| 51213 | 0, // zasubs1 |
| 51214 | 136, // zsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51215 | 136, // zsub0 -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51216 | 136, // zsub1 -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51217 | 0, // zsub2 |
| 51218 | 0, // zsub3 |
| 51219 | 136, // zsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51220 | 0, // zasubd1_then_zasubq0 |
| 51221 | 0, // zasubd1_then_zasubq1 |
| 51222 | 0, // zasubs1_then_zasubd0 |
| 51223 | 0, // zasubs1_then_zasubd1 |
| 51224 | 0, // zasubs1_then_zasubq0 |
| 51225 | 0, // zasubs1_then_zasubq1 |
| 51226 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51227 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51228 | 0, // zasubh1_then_zasubd0 |
| 51229 | 0, // zasubh1_then_zasubd1 |
| 51230 | 0, // zasubh1_then_zasubq0 |
| 51231 | 0, // zasubh1_then_zasubq1 |
| 51232 | 0, // zasubh1_then_zasubs0 |
| 51233 | 0, // zasubh1_then_zasubs1 |
| 51234 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51235 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51236 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51237 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51238 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51239 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51240 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51241 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51242 | 136, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51243 | 136, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51244 | 136, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51245 | 136, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51246 | 136, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51247 | 136, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51248 | 0, // dsub3_then_bsub |
| 51249 | 0, // dsub3_then_bsub_hi |
| 51250 | 0, // dsub3_then_hsub |
| 51251 | 0, // dsub3_then_hsub_hi |
| 51252 | 0, // dsub3_then_ssub |
| 51253 | 0, // dsub3_then_ssub_hi |
| 51254 | 0, // dsub2_then_bsub |
| 51255 | 0, // dsub2_then_bsub_hi |
| 51256 | 0, // dsub2_then_hsub |
| 51257 | 0, // dsub2_then_hsub_hi |
| 51258 | 0, // dsub2_then_ssub |
| 51259 | 0, // dsub2_then_ssub_hi |
| 51260 | 0, // psub1_then_psub |
| 51261 | 136, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51262 | 0, // qsub3_then_dsub_hi |
| 51263 | 0, // qsub2_then_dsub_hi |
| 51264 | 0, // x8sub_7_then_sub_32 |
| 51265 | 0, // x8sub_7_then_sub_32_hi |
| 51266 | 0, // x8sub_6_then_sub_32 |
| 51267 | 0, // x8sub_6_then_sub_32_hi |
| 51268 | 0, // x8sub_5_then_sub_32 |
| 51269 | 0, // x8sub_5_then_sub_32_hi |
| 51270 | 0, // x8sub_4_then_sub_32 |
| 51271 | 0, // x8sub_4_then_sub_32_hi |
| 51272 | 0, // x8sub_3_then_sub_32 |
| 51273 | 0, // x8sub_3_then_sub_32_hi |
| 51274 | 0, // x8sub_2_then_sub_32 |
| 51275 | 0, // x8sub_2_then_sub_32_hi |
| 51276 | 0, // x8sub_1_then_sub_32 |
| 51277 | 0, // x8sub_1_then_sub_32_hi |
| 51278 | 0, // subo64_then_sub_32 |
| 51279 | 0, // subo64_then_sub_32_hi |
| 51280 | 136, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 51281 | 0, // zsub3_then_zsub_hi |
| 51282 | 0, // zsub2_then_zsub_hi |
| 51283 | 0, // dsub0_dsub1 |
| 51284 | 0, // dsub0_dsub1_dsub2 |
| 51285 | 0, // dsub1_dsub2 |
| 51286 | 0, // dsub1_dsub2_dsub3 |
| 51287 | 0, // dsub2_dsub3 |
| 51288 | 149, // dsub_dsub1 -> ZPR2Mul2_Lo |
| 51289 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51290 | 0, // dsub_dsub1_dsub2 |
| 51291 | 0, // qsub0_qsub1 |
| 51292 | 0, // qsub0_qsub1_qsub2 |
| 51293 | 0, // qsub1_qsub2 |
| 51294 | 0, // qsub1_qsub2_qsub3 |
| 51295 | 0, // qsub2_qsub3 |
| 51296 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51297 | 0, // x8sub_0_x8sub_1 |
| 51298 | 0, // x8sub_2_x8sub_3 |
| 51299 | 0, // x8sub_4_x8sub_5 |
| 51300 | 0, // x8sub_6_x8sub_7 |
| 51301 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51302 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51303 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51304 | 0, // sub_32_subo64_then_sub_32 |
| 51305 | 149, // zsub_qsub1 -> ZPR2Mul2_Lo |
| 51306 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51307 | 0, // zsub_qsub1_qsub2 |
| 51308 | 0, // zsub0_zsub1 |
| 51309 | 0, // zsub0_zsub1_zsub2 |
| 51310 | 0, // zsub1_zsub2 |
| 51311 | 0, // zsub1_zsub2_zsub3 |
| 51312 | 0, // zsub2_zsub3 |
| 51313 | 0, // zsub0_zsub2 |
| 51314 | 0, // zsub1_zsub3 |
| 51315 | }, |
| 51316 | { // ZPR2_with_dsub1_in_FPR64_lo |
| 51317 | 137, // bsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51318 | 137, // bsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51319 | 137, // dsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51320 | 0, // dsub0 |
| 51321 | 137, // dsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51322 | 0, // dsub2 |
| 51323 | 0, // dsub3 |
| 51324 | 137, // dsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51325 | 137, // hsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51326 | 137, // hsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51327 | 0, // psub |
| 51328 | 0, // psub0 |
| 51329 | 0, // psub1 |
| 51330 | 0, // qsub0 |
| 51331 | 137, // qsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51332 | 0, // qsub2 |
| 51333 | 0, // qsub3 |
| 51334 | 137, // ssub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51335 | 137, // ssub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51336 | 0, // sub_32 |
| 51337 | 0, // sub_32_hi |
| 51338 | 0, // sube32 |
| 51339 | 0, // sube64 |
| 51340 | 0, // subo32 |
| 51341 | 0, // subo64 |
| 51342 | 0, // x8sub_0 |
| 51343 | 0, // x8sub_1 |
| 51344 | 0, // x8sub_2 |
| 51345 | 0, // x8sub_3 |
| 51346 | 0, // x8sub_4 |
| 51347 | 0, // x8sub_5 |
| 51348 | 0, // x8sub_6 |
| 51349 | 0, // x8sub_7 |
| 51350 | 0, // zasubb |
| 51351 | 0, // zasubd0 |
| 51352 | 0, // zasubd1 |
| 51353 | 0, // zasubh0 |
| 51354 | 0, // zasubh1 |
| 51355 | 0, // zasubq0 |
| 51356 | 0, // zasubq1 |
| 51357 | 0, // zasubs0 |
| 51358 | 0, // zasubs1 |
| 51359 | 137, // zsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51360 | 137, // zsub0 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51361 | 137, // zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51362 | 0, // zsub2 |
| 51363 | 0, // zsub3 |
| 51364 | 137, // zsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51365 | 0, // zasubd1_then_zasubq0 |
| 51366 | 0, // zasubd1_then_zasubq1 |
| 51367 | 0, // zasubs1_then_zasubd0 |
| 51368 | 0, // zasubs1_then_zasubd1 |
| 51369 | 0, // zasubs1_then_zasubq0 |
| 51370 | 0, // zasubs1_then_zasubq1 |
| 51371 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51372 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51373 | 0, // zasubh1_then_zasubd0 |
| 51374 | 0, // zasubh1_then_zasubd1 |
| 51375 | 0, // zasubh1_then_zasubq0 |
| 51376 | 0, // zasubh1_then_zasubq1 |
| 51377 | 0, // zasubh1_then_zasubs0 |
| 51378 | 0, // zasubh1_then_zasubs1 |
| 51379 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51380 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51381 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51382 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51383 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51384 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51385 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51386 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51387 | 137, // dsub1_then_bsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51388 | 137, // dsub1_then_bsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51389 | 137, // dsub1_then_hsub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51390 | 137, // dsub1_then_hsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51391 | 137, // dsub1_then_ssub -> ZPR2_with_dsub1_in_FPR64_lo |
| 51392 | 137, // dsub1_then_ssub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51393 | 0, // dsub3_then_bsub |
| 51394 | 0, // dsub3_then_bsub_hi |
| 51395 | 0, // dsub3_then_hsub |
| 51396 | 0, // dsub3_then_hsub_hi |
| 51397 | 0, // dsub3_then_ssub |
| 51398 | 0, // dsub3_then_ssub_hi |
| 51399 | 0, // dsub2_then_bsub |
| 51400 | 0, // dsub2_then_bsub_hi |
| 51401 | 0, // dsub2_then_hsub |
| 51402 | 0, // dsub2_then_hsub_hi |
| 51403 | 0, // dsub2_then_ssub |
| 51404 | 0, // dsub2_then_ssub_hi |
| 51405 | 0, // psub1_then_psub |
| 51406 | 137, // qsub1_then_dsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51407 | 0, // qsub3_then_dsub_hi |
| 51408 | 0, // qsub2_then_dsub_hi |
| 51409 | 0, // x8sub_7_then_sub_32 |
| 51410 | 0, // x8sub_7_then_sub_32_hi |
| 51411 | 0, // x8sub_6_then_sub_32 |
| 51412 | 0, // x8sub_6_then_sub_32_hi |
| 51413 | 0, // x8sub_5_then_sub_32 |
| 51414 | 0, // x8sub_5_then_sub_32_hi |
| 51415 | 0, // x8sub_4_then_sub_32 |
| 51416 | 0, // x8sub_4_then_sub_32_hi |
| 51417 | 0, // x8sub_3_then_sub_32 |
| 51418 | 0, // x8sub_3_then_sub_32_hi |
| 51419 | 0, // x8sub_2_then_sub_32 |
| 51420 | 0, // x8sub_2_then_sub_32_hi |
| 51421 | 0, // x8sub_1_then_sub_32 |
| 51422 | 0, // x8sub_1_then_sub_32_hi |
| 51423 | 0, // subo64_then_sub_32 |
| 51424 | 0, // subo64_then_sub_32_hi |
| 51425 | 137, // zsub1_then_zsub_hi -> ZPR2_with_dsub1_in_FPR64_lo |
| 51426 | 0, // zsub3_then_zsub_hi |
| 51427 | 0, // zsub2_then_zsub_hi |
| 51428 | 0, // dsub0_dsub1 |
| 51429 | 0, // dsub0_dsub1_dsub2 |
| 51430 | 0, // dsub1_dsub2 |
| 51431 | 0, // dsub1_dsub2_dsub3 |
| 51432 | 0, // dsub2_dsub3 |
| 51433 | 137, // dsub_dsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51434 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51435 | 0, // dsub_dsub1_dsub2 |
| 51436 | 0, // qsub0_qsub1 |
| 51437 | 0, // qsub0_qsub1_qsub2 |
| 51438 | 0, // qsub1_qsub2 |
| 51439 | 0, // qsub1_qsub2_qsub3 |
| 51440 | 0, // qsub2_qsub3 |
| 51441 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51442 | 0, // x8sub_0_x8sub_1 |
| 51443 | 0, // x8sub_2_x8sub_3 |
| 51444 | 0, // x8sub_4_x8sub_5 |
| 51445 | 0, // x8sub_6_x8sub_7 |
| 51446 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51447 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51448 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51449 | 0, // sub_32_subo64_then_sub_32 |
| 51450 | 137, // zsub_qsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 51451 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51452 | 0, // zsub_qsub1_qsub2 |
| 51453 | 0, // zsub0_zsub1 |
| 51454 | 0, // zsub0_zsub1_zsub2 |
| 51455 | 0, // zsub1_zsub2 |
| 51456 | 0, // zsub1_zsub2_zsub3 |
| 51457 | 0, // zsub2_zsub3 |
| 51458 | 0, // zsub0_zsub2 |
| 51459 | 0, // zsub1_zsub3 |
| 51460 | }, |
| 51461 | { // ZPR2_with_zsub1_in_ZPRMul2 |
| 51462 | 138, // bsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51463 | 138, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51464 | 138, // dsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51465 | 0, // dsub0 |
| 51466 | 138, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51467 | 0, // dsub2 |
| 51468 | 0, // dsub3 |
| 51469 | 138, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51470 | 138, // hsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51471 | 138, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51472 | 0, // psub |
| 51473 | 0, // psub0 |
| 51474 | 0, // psub1 |
| 51475 | 0, // qsub0 |
| 51476 | 138, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51477 | 0, // qsub2 |
| 51478 | 0, // qsub3 |
| 51479 | 138, // ssub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51480 | 138, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51481 | 0, // sub_32 |
| 51482 | 0, // sub_32_hi |
| 51483 | 0, // sube32 |
| 51484 | 0, // sube64 |
| 51485 | 0, // subo32 |
| 51486 | 0, // subo64 |
| 51487 | 0, // x8sub_0 |
| 51488 | 0, // x8sub_1 |
| 51489 | 0, // x8sub_2 |
| 51490 | 0, // x8sub_3 |
| 51491 | 0, // x8sub_4 |
| 51492 | 0, // x8sub_5 |
| 51493 | 0, // x8sub_6 |
| 51494 | 0, // x8sub_7 |
| 51495 | 0, // zasubb |
| 51496 | 0, // zasubd0 |
| 51497 | 0, // zasubd1 |
| 51498 | 0, // zasubh0 |
| 51499 | 0, // zasubh1 |
| 51500 | 0, // zasubq0 |
| 51501 | 0, // zasubq1 |
| 51502 | 0, // zasubs0 |
| 51503 | 0, // zasubs1 |
| 51504 | 138, // zsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51505 | 138, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51506 | 138, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51507 | 0, // zsub2 |
| 51508 | 0, // zsub3 |
| 51509 | 138, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51510 | 0, // zasubd1_then_zasubq0 |
| 51511 | 0, // zasubd1_then_zasubq1 |
| 51512 | 0, // zasubs1_then_zasubd0 |
| 51513 | 0, // zasubs1_then_zasubd1 |
| 51514 | 0, // zasubs1_then_zasubq0 |
| 51515 | 0, // zasubs1_then_zasubq1 |
| 51516 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51517 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51518 | 0, // zasubh1_then_zasubd0 |
| 51519 | 0, // zasubh1_then_zasubd1 |
| 51520 | 0, // zasubh1_then_zasubq0 |
| 51521 | 0, // zasubh1_then_zasubq1 |
| 51522 | 0, // zasubh1_then_zasubs0 |
| 51523 | 0, // zasubh1_then_zasubs1 |
| 51524 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51525 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51526 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51527 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51528 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51529 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51530 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51531 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51532 | 138, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51533 | 138, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51534 | 138, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51535 | 138, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51536 | 138, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51537 | 138, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51538 | 0, // dsub3_then_bsub |
| 51539 | 0, // dsub3_then_bsub_hi |
| 51540 | 0, // dsub3_then_hsub |
| 51541 | 0, // dsub3_then_hsub_hi |
| 51542 | 0, // dsub3_then_ssub |
| 51543 | 0, // dsub3_then_ssub_hi |
| 51544 | 0, // dsub2_then_bsub |
| 51545 | 0, // dsub2_then_bsub_hi |
| 51546 | 0, // dsub2_then_hsub |
| 51547 | 0, // dsub2_then_hsub_hi |
| 51548 | 0, // dsub2_then_ssub |
| 51549 | 0, // dsub2_then_ssub_hi |
| 51550 | 0, // psub1_then_psub |
| 51551 | 138, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51552 | 0, // qsub3_then_dsub_hi |
| 51553 | 0, // qsub2_then_dsub_hi |
| 51554 | 0, // x8sub_7_then_sub_32 |
| 51555 | 0, // x8sub_7_then_sub_32_hi |
| 51556 | 0, // x8sub_6_then_sub_32 |
| 51557 | 0, // x8sub_6_then_sub_32_hi |
| 51558 | 0, // x8sub_5_then_sub_32 |
| 51559 | 0, // x8sub_5_then_sub_32_hi |
| 51560 | 0, // x8sub_4_then_sub_32 |
| 51561 | 0, // x8sub_4_then_sub_32_hi |
| 51562 | 0, // x8sub_3_then_sub_32 |
| 51563 | 0, // x8sub_3_then_sub_32_hi |
| 51564 | 0, // x8sub_2_then_sub_32 |
| 51565 | 0, // x8sub_2_then_sub_32_hi |
| 51566 | 0, // x8sub_1_then_sub_32 |
| 51567 | 0, // x8sub_1_then_sub_32_hi |
| 51568 | 0, // subo64_then_sub_32 |
| 51569 | 0, // subo64_then_sub_32_hi |
| 51570 | 138, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51571 | 0, // zsub3_then_zsub_hi |
| 51572 | 0, // zsub2_then_zsub_hi |
| 51573 | 0, // dsub0_dsub1 |
| 51574 | 0, // dsub0_dsub1_dsub2 |
| 51575 | 0, // dsub1_dsub2 |
| 51576 | 0, // dsub1_dsub2_dsub3 |
| 51577 | 0, // dsub2_dsub3 |
| 51578 | 138, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51579 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51580 | 0, // dsub_dsub1_dsub2 |
| 51581 | 0, // qsub0_qsub1 |
| 51582 | 0, // qsub0_qsub1_qsub2 |
| 51583 | 0, // qsub1_qsub2 |
| 51584 | 0, // qsub1_qsub2_qsub3 |
| 51585 | 0, // qsub2_qsub3 |
| 51586 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51587 | 0, // x8sub_0_x8sub_1 |
| 51588 | 0, // x8sub_2_x8sub_3 |
| 51589 | 0, // x8sub_4_x8sub_5 |
| 51590 | 0, // x8sub_6_x8sub_7 |
| 51591 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51592 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51593 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51594 | 0, // sub_32_subo64_then_sub_32 |
| 51595 | 138, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 51596 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51597 | 0, // zsub_qsub1_qsub2 |
| 51598 | 0, // zsub0_zsub1 |
| 51599 | 0, // zsub0_zsub1_zsub2 |
| 51600 | 0, // zsub1_zsub2 |
| 51601 | 0, // zsub1_zsub2_zsub3 |
| 51602 | 0, // zsub2_zsub3 |
| 51603 | 0, // zsub0_zsub2 |
| 51604 | 0, // zsub1_zsub3 |
| 51605 | }, |
| 51606 | { // ZPR2_with_zsub_in_FPR128_lo |
| 51607 | 139, // bsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51608 | 139, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51609 | 139, // dsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51610 | 0, // dsub0 |
| 51611 | 139, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 51612 | 0, // dsub2 |
| 51613 | 0, // dsub3 |
| 51614 | 139, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51615 | 139, // hsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51616 | 139, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51617 | 0, // psub |
| 51618 | 0, // psub0 |
| 51619 | 0, // psub1 |
| 51620 | 0, // qsub0 |
| 51621 | 139, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 51622 | 0, // qsub2 |
| 51623 | 0, // qsub3 |
| 51624 | 139, // ssub -> ZPR2_with_zsub_in_FPR128_lo |
| 51625 | 139, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51626 | 0, // sub_32 |
| 51627 | 0, // sub_32_hi |
| 51628 | 0, // sube32 |
| 51629 | 0, // sube64 |
| 51630 | 0, // subo32 |
| 51631 | 0, // subo64 |
| 51632 | 0, // x8sub_0 |
| 51633 | 0, // x8sub_1 |
| 51634 | 0, // x8sub_2 |
| 51635 | 0, // x8sub_3 |
| 51636 | 0, // x8sub_4 |
| 51637 | 0, // x8sub_5 |
| 51638 | 0, // x8sub_6 |
| 51639 | 0, // x8sub_7 |
| 51640 | 0, // zasubb |
| 51641 | 0, // zasubd0 |
| 51642 | 0, // zasubd1 |
| 51643 | 0, // zasubh0 |
| 51644 | 0, // zasubh1 |
| 51645 | 0, // zasubq0 |
| 51646 | 0, // zasubq1 |
| 51647 | 0, // zasubs0 |
| 51648 | 0, // zasubs1 |
| 51649 | 139, // zsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51650 | 139, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo |
| 51651 | 139, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 51652 | 0, // zsub2 |
| 51653 | 0, // zsub3 |
| 51654 | 139, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51655 | 0, // zasubd1_then_zasubq0 |
| 51656 | 0, // zasubd1_then_zasubq1 |
| 51657 | 0, // zasubs1_then_zasubd0 |
| 51658 | 0, // zasubs1_then_zasubd1 |
| 51659 | 0, // zasubs1_then_zasubq0 |
| 51660 | 0, // zasubs1_then_zasubq1 |
| 51661 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51662 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51663 | 0, // zasubh1_then_zasubd0 |
| 51664 | 0, // zasubh1_then_zasubd1 |
| 51665 | 0, // zasubh1_then_zasubq0 |
| 51666 | 0, // zasubh1_then_zasubq1 |
| 51667 | 0, // zasubh1_then_zasubs0 |
| 51668 | 0, // zasubh1_then_zasubs1 |
| 51669 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51670 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51671 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51672 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51673 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51674 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51675 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51676 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51677 | 139, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51678 | 139, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51679 | 139, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo |
| 51680 | 139, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51681 | 139, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo |
| 51682 | 139, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51683 | 0, // dsub3_then_bsub |
| 51684 | 0, // dsub3_then_bsub_hi |
| 51685 | 0, // dsub3_then_hsub |
| 51686 | 0, // dsub3_then_hsub_hi |
| 51687 | 0, // dsub3_then_ssub |
| 51688 | 0, // dsub3_then_ssub_hi |
| 51689 | 0, // dsub2_then_bsub |
| 51690 | 0, // dsub2_then_bsub_hi |
| 51691 | 0, // dsub2_then_hsub |
| 51692 | 0, // dsub2_then_hsub_hi |
| 51693 | 0, // dsub2_then_ssub |
| 51694 | 0, // dsub2_then_ssub_hi |
| 51695 | 0, // psub1_then_psub |
| 51696 | 139, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51697 | 0, // qsub3_then_dsub_hi |
| 51698 | 0, // qsub2_then_dsub_hi |
| 51699 | 0, // x8sub_7_then_sub_32 |
| 51700 | 0, // x8sub_7_then_sub_32_hi |
| 51701 | 0, // x8sub_6_then_sub_32 |
| 51702 | 0, // x8sub_6_then_sub_32_hi |
| 51703 | 0, // x8sub_5_then_sub_32 |
| 51704 | 0, // x8sub_5_then_sub_32_hi |
| 51705 | 0, // x8sub_4_then_sub_32 |
| 51706 | 0, // x8sub_4_then_sub_32_hi |
| 51707 | 0, // x8sub_3_then_sub_32 |
| 51708 | 0, // x8sub_3_then_sub_32_hi |
| 51709 | 0, // x8sub_2_then_sub_32 |
| 51710 | 0, // x8sub_2_then_sub_32_hi |
| 51711 | 0, // x8sub_1_then_sub_32 |
| 51712 | 0, // x8sub_1_then_sub_32_hi |
| 51713 | 0, // subo64_then_sub_32 |
| 51714 | 0, // subo64_then_sub_32_hi |
| 51715 | 139, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo |
| 51716 | 0, // zsub3_then_zsub_hi |
| 51717 | 0, // zsub2_then_zsub_hi |
| 51718 | 0, // dsub0_dsub1 |
| 51719 | 0, // dsub0_dsub1_dsub2 |
| 51720 | 0, // dsub1_dsub2 |
| 51721 | 0, // dsub1_dsub2_dsub3 |
| 51722 | 0, // dsub2_dsub3 |
| 51723 | 139, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 51724 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51725 | 0, // dsub_dsub1_dsub2 |
| 51726 | 0, // qsub0_qsub1 |
| 51727 | 0, // qsub0_qsub1_qsub2 |
| 51728 | 0, // qsub1_qsub2 |
| 51729 | 0, // qsub1_qsub2_qsub3 |
| 51730 | 0, // qsub2_qsub3 |
| 51731 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51732 | 0, // x8sub_0_x8sub_1 |
| 51733 | 0, // x8sub_2_x8sub_3 |
| 51734 | 0, // x8sub_4_x8sub_5 |
| 51735 | 0, // x8sub_6_x8sub_7 |
| 51736 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51737 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51738 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51739 | 0, // sub_32_subo64_then_sub_32 |
| 51740 | 139, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 51741 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51742 | 0, // zsub_qsub1_qsub2 |
| 51743 | 0, // zsub0_zsub1 |
| 51744 | 0, // zsub0_zsub1_zsub2 |
| 51745 | 0, // zsub1_zsub2 |
| 51746 | 0, // zsub1_zsub2_zsub3 |
| 51747 | 0, // zsub2_zsub3 |
| 51748 | 0, // zsub0_zsub2 |
| 51749 | 0, // zsub1_zsub3 |
| 51750 | }, |
| 51751 | { // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51752 | 140, // bsub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51753 | 140, // bsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51754 | 140, // dsub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51755 | 0, // dsub0 |
| 51756 | 140, // dsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51757 | 0, // dsub2 |
| 51758 | 0, // dsub3 |
| 51759 | 140, // dsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51760 | 140, // hsub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51761 | 140, // hsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51762 | 0, // psub |
| 51763 | 0, // psub0 |
| 51764 | 0, // psub1 |
| 51765 | 140, // qsub0 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51766 | 140, // qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51767 | 0, // qsub2 |
| 51768 | 0, // qsub3 |
| 51769 | 140, // ssub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51770 | 140, // ssub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51771 | 0, // sub_32 |
| 51772 | 0, // sub_32_hi |
| 51773 | 0, // sube32 |
| 51774 | 0, // sube64 |
| 51775 | 0, // subo32 |
| 51776 | 0, // subo64 |
| 51777 | 0, // x8sub_0 |
| 51778 | 0, // x8sub_1 |
| 51779 | 0, // x8sub_2 |
| 51780 | 0, // x8sub_3 |
| 51781 | 0, // x8sub_4 |
| 51782 | 0, // x8sub_5 |
| 51783 | 0, // x8sub_6 |
| 51784 | 0, // x8sub_7 |
| 51785 | 0, // zasubb |
| 51786 | 0, // zasubd0 |
| 51787 | 0, // zasubd1 |
| 51788 | 0, // zasubh0 |
| 51789 | 0, // zasubh1 |
| 51790 | 0, // zasubq0 |
| 51791 | 0, // zasubq1 |
| 51792 | 0, // zasubs0 |
| 51793 | 0, // zasubs1 |
| 51794 | 0, // zsub |
| 51795 | 0, // zsub0 |
| 51796 | 0, // zsub1 |
| 51797 | 0, // zsub2 |
| 51798 | 0, // zsub3 |
| 51799 | 0, // zsub_hi |
| 51800 | 0, // zasubd1_then_zasubq0 |
| 51801 | 0, // zasubd1_then_zasubq1 |
| 51802 | 0, // zasubs1_then_zasubd0 |
| 51803 | 0, // zasubs1_then_zasubd1 |
| 51804 | 0, // zasubs1_then_zasubq0 |
| 51805 | 0, // zasubs1_then_zasubq1 |
| 51806 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51807 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51808 | 0, // zasubh1_then_zasubd0 |
| 51809 | 0, // zasubh1_then_zasubd1 |
| 51810 | 0, // zasubh1_then_zasubq0 |
| 51811 | 0, // zasubh1_then_zasubq1 |
| 51812 | 0, // zasubh1_then_zasubs0 |
| 51813 | 0, // zasubh1_then_zasubs1 |
| 51814 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51815 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51816 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51817 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51818 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51819 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51820 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51821 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51822 | 140, // dsub1_then_bsub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51823 | 140, // dsub1_then_bsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51824 | 140, // dsub1_then_hsub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51825 | 140, // dsub1_then_hsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51826 | 140, // dsub1_then_ssub -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51827 | 140, // dsub1_then_ssub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51828 | 0, // dsub3_then_bsub |
| 51829 | 0, // dsub3_then_bsub_hi |
| 51830 | 0, // dsub3_then_hsub |
| 51831 | 0, // dsub3_then_hsub_hi |
| 51832 | 0, // dsub3_then_ssub |
| 51833 | 0, // dsub3_then_ssub_hi |
| 51834 | 0, // dsub2_then_bsub |
| 51835 | 0, // dsub2_then_bsub_hi |
| 51836 | 0, // dsub2_then_hsub |
| 51837 | 0, // dsub2_then_hsub_hi |
| 51838 | 0, // dsub2_then_ssub |
| 51839 | 0, // dsub2_then_ssub_hi |
| 51840 | 0, // psub1_then_psub |
| 51841 | 140, // qsub1_then_dsub_hi -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51842 | 0, // qsub3_then_dsub_hi |
| 51843 | 0, // qsub2_then_dsub_hi |
| 51844 | 0, // x8sub_7_then_sub_32 |
| 51845 | 0, // x8sub_7_then_sub_32_hi |
| 51846 | 0, // x8sub_6_then_sub_32 |
| 51847 | 0, // x8sub_6_then_sub_32_hi |
| 51848 | 0, // x8sub_5_then_sub_32 |
| 51849 | 0, // x8sub_5_then_sub_32_hi |
| 51850 | 0, // x8sub_4_then_sub_32 |
| 51851 | 0, // x8sub_4_then_sub_32_hi |
| 51852 | 0, // x8sub_3_then_sub_32 |
| 51853 | 0, // x8sub_3_then_sub_32_hi |
| 51854 | 0, // x8sub_2_then_sub_32 |
| 51855 | 0, // x8sub_2_then_sub_32_hi |
| 51856 | 0, // x8sub_1_then_sub_32 |
| 51857 | 0, // x8sub_1_then_sub_32_hi |
| 51858 | 0, // subo64_then_sub_32 |
| 51859 | 0, // subo64_then_sub_32_hi |
| 51860 | 0, // zsub1_then_zsub_hi |
| 51861 | 0, // zsub3_then_zsub_hi |
| 51862 | 0, // zsub2_then_zsub_hi |
| 51863 | 0, // dsub0_dsub1 |
| 51864 | 0, // dsub0_dsub1_dsub2 |
| 51865 | 0, // dsub1_dsub2 |
| 51866 | 0, // dsub1_dsub2_dsub3 |
| 51867 | 0, // dsub2_dsub3 |
| 51868 | 140, // dsub_dsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 51869 | 0, // dsub_dsub1_dsub2_dsub3 |
| 51870 | 0, // dsub_dsub1_dsub2 |
| 51871 | 0, // qsub0_qsub1 |
| 51872 | 0, // qsub0_qsub1_qsub2 |
| 51873 | 0, // qsub1_qsub2 |
| 51874 | 0, // qsub1_qsub2_qsub3 |
| 51875 | 0, // qsub2_qsub3 |
| 51876 | 0, // sub_32_x8sub_1_then_sub_32 |
| 51877 | 0, // x8sub_0_x8sub_1 |
| 51878 | 0, // x8sub_2_x8sub_3 |
| 51879 | 0, // x8sub_4_x8sub_5 |
| 51880 | 0, // x8sub_6_x8sub_7 |
| 51881 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 51882 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 51883 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 51884 | 0, // sub_32_subo64_then_sub_32 |
| 51885 | 0, // zsub_qsub1 |
| 51886 | 0, // zsub_qsub1_qsub2_qsub3 |
| 51887 | 0, // zsub_qsub1_qsub2 |
| 51888 | 0, // zsub0_zsub1 |
| 51889 | 0, // zsub0_zsub1_zsub2 |
| 51890 | 0, // zsub1_zsub2 |
| 51891 | 0, // zsub1_zsub2_zsub3 |
| 51892 | 0, // zsub2_zsub3 |
| 51893 | 0, // zsub0_zsub2 |
| 51894 | 0, // zsub1_zsub3 |
| 51895 | }, |
| 51896 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51897 | 141, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51898 | 141, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51899 | 141, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51900 | 0, // dsub0 |
| 51901 | 141, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51902 | 0, // dsub2 |
| 51903 | 0, // dsub3 |
| 51904 | 141, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51905 | 141, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51906 | 141, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51907 | 0, // psub |
| 51908 | 0, // psub0 |
| 51909 | 0, // psub1 |
| 51910 | 0, // qsub0 |
| 51911 | 141, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51912 | 0, // qsub2 |
| 51913 | 0, // qsub3 |
| 51914 | 141, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51915 | 141, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51916 | 0, // sub_32 |
| 51917 | 0, // sub_32_hi |
| 51918 | 0, // sube32 |
| 51919 | 0, // sube64 |
| 51920 | 0, // subo32 |
| 51921 | 0, // subo64 |
| 51922 | 0, // x8sub_0 |
| 51923 | 0, // x8sub_1 |
| 51924 | 0, // x8sub_2 |
| 51925 | 0, // x8sub_3 |
| 51926 | 0, // x8sub_4 |
| 51927 | 0, // x8sub_5 |
| 51928 | 0, // x8sub_6 |
| 51929 | 0, // x8sub_7 |
| 51930 | 0, // zasubb |
| 51931 | 0, // zasubd0 |
| 51932 | 0, // zasubd1 |
| 51933 | 0, // zasubh0 |
| 51934 | 0, // zasubh1 |
| 51935 | 0, // zasubq0 |
| 51936 | 0, // zasubq1 |
| 51937 | 0, // zasubs0 |
| 51938 | 0, // zasubs1 |
| 51939 | 141, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51940 | 141, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51941 | 141, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51942 | 0, // zsub2 |
| 51943 | 0, // zsub3 |
| 51944 | 141, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51945 | 0, // zasubd1_then_zasubq0 |
| 51946 | 0, // zasubd1_then_zasubq1 |
| 51947 | 0, // zasubs1_then_zasubd0 |
| 51948 | 0, // zasubs1_then_zasubd1 |
| 51949 | 0, // zasubs1_then_zasubq0 |
| 51950 | 0, // zasubs1_then_zasubq1 |
| 51951 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 51952 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 51953 | 0, // zasubh1_then_zasubd0 |
| 51954 | 0, // zasubh1_then_zasubd1 |
| 51955 | 0, // zasubh1_then_zasubq0 |
| 51956 | 0, // zasubh1_then_zasubq1 |
| 51957 | 0, // zasubh1_then_zasubs0 |
| 51958 | 0, // zasubh1_then_zasubs1 |
| 51959 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 51960 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 51961 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 51962 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 51963 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 51964 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 51965 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 51966 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 51967 | 141, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51968 | 141, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51969 | 141, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51970 | 141, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51971 | 141, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51972 | 141, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51973 | 0, // dsub3_then_bsub |
| 51974 | 0, // dsub3_then_bsub_hi |
| 51975 | 0, // dsub3_then_hsub |
| 51976 | 0, // dsub3_then_hsub_hi |
| 51977 | 0, // dsub3_then_ssub |
| 51978 | 0, // dsub3_then_ssub_hi |
| 51979 | 0, // dsub2_then_bsub |
| 51980 | 0, // dsub2_then_bsub_hi |
| 51981 | 0, // dsub2_then_hsub |
| 51982 | 0, // dsub2_then_hsub_hi |
| 51983 | 0, // dsub2_then_ssub |
| 51984 | 0, // dsub2_then_ssub_hi |
| 51985 | 0, // psub1_then_psub |
| 51986 | 141, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 51987 | 0, // qsub3_then_dsub_hi |
| 51988 | 0, // qsub2_then_dsub_hi |
| 51989 | 0, // x8sub_7_then_sub_32 |
| 51990 | 0, // x8sub_7_then_sub_32_hi |
| 51991 | 0, // x8sub_6_then_sub_32 |
| 51992 | 0, // x8sub_6_then_sub_32_hi |
| 51993 | 0, // x8sub_5_then_sub_32 |
| 51994 | 0, // x8sub_5_then_sub_32_hi |
| 51995 | 0, // x8sub_4_then_sub_32 |
| 51996 | 0, // x8sub_4_then_sub_32_hi |
| 51997 | 0, // x8sub_3_then_sub_32 |
| 51998 | 0, // x8sub_3_then_sub_32_hi |
| 51999 | 0, // x8sub_2_then_sub_32 |
| 52000 | 0, // x8sub_2_then_sub_32_hi |
| 52001 | 0, // x8sub_1_then_sub_32 |
| 52002 | 0, // x8sub_1_then_sub_32_hi |
| 52003 | 0, // subo64_then_sub_32 |
| 52004 | 0, // subo64_then_sub_32_hi |
| 52005 | 141, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 52006 | 0, // zsub3_then_zsub_hi |
| 52007 | 0, // zsub2_then_zsub_hi |
| 52008 | 0, // dsub0_dsub1 |
| 52009 | 0, // dsub0_dsub1_dsub2 |
| 52010 | 0, // dsub1_dsub2 |
| 52011 | 0, // dsub1_dsub2_dsub3 |
| 52012 | 0, // dsub2_dsub3 |
| 52013 | 141, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 52014 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52015 | 0, // dsub_dsub1_dsub2 |
| 52016 | 0, // qsub0_qsub1 |
| 52017 | 0, // qsub0_qsub1_qsub2 |
| 52018 | 0, // qsub1_qsub2 |
| 52019 | 0, // qsub1_qsub2_qsub3 |
| 52020 | 0, // qsub2_qsub3 |
| 52021 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52022 | 0, // x8sub_0_x8sub_1 |
| 52023 | 0, // x8sub_2_x8sub_3 |
| 52024 | 0, // x8sub_4_x8sub_5 |
| 52025 | 0, // x8sub_6_x8sub_7 |
| 52026 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52027 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52028 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52029 | 0, // sub_32_subo64_then_sub_32 |
| 52030 | 141, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 52031 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52032 | 0, // zsub_qsub1_qsub2 |
| 52033 | 0, // zsub0_zsub1 |
| 52034 | 0, // zsub0_zsub1_zsub2 |
| 52035 | 0, // zsub1_zsub2 |
| 52036 | 0, // zsub1_zsub2_zsub3 |
| 52037 | 0, // zsub2_zsub3 |
| 52038 | 0, // zsub0_zsub2 |
| 52039 | 0, // zsub1_zsub3 |
| 52040 | }, |
| 52041 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52042 | 142, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52043 | 142, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52044 | 142, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52045 | 0, // dsub0 |
| 52046 | 142, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52047 | 0, // dsub2 |
| 52048 | 0, // dsub3 |
| 52049 | 142, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52050 | 142, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52051 | 142, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52052 | 0, // psub |
| 52053 | 0, // psub0 |
| 52054 | 0, // psub1 |
| 52055 | 0, // qsub0 |
| 52056 | 142, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52057 | 0, // qsub2 |
| 52058 | 0, // qsub3 |
| 52059 | 142, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52060 | 142, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52061 | 0, // sub_32 |
| 52062 | 0, // sub_32_hi |
| 52063 | 0, // sube32 |
| 52064 | 0, // sube64 |
| 52065 | 0, // subo32 |
| 52066 | 0, // subo64 |
| 52067 | 0, // x8sub_0 |
| 52068 | 0, // x8sub_1 |
| 52069 | 0, // x8sub_2 |
| 52070 | 0, // x8sub_3 |
| 52071 | 0, // x8sub_4 |
| 52072 | 0, // x8sub_5 |
| 52073 | 0, // x8sub_6 |
| 52074 | 0, // x8sub_7 |
| 52075 | 0, // zasubb |
| 52076 | 0, // zasubd0 |
| 52077 | 0, // zasubd1 |
| 52078 | 0, // zasubh0 |
| 52079 | 0, // zasubh1 |
| 52080 | 0, // zasubq0 |
| 52081 | 0, // zasubq1 |
| 52082 | 0, // zasubs0 |
| 52083 | 0, // zasubs1 |
| 52084 | 142, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52085 | 142, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52086 | 142, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52087 | 0, // zsub2 |
| 52088 | 0, // zsub3 |
| 52089 | 142, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52090 | 0, // zasubd1_then_zasubq0 |
| 52091 | 0, // zasubd1_then_zasubq1 |
| 52092 | 0, // zasubs1_then_zasubd0 |
| 52093 | 0, // zasubs1_then_zasubd1 |
| 52094 | 0, // zasubs1_then_zasubq0 |
| 52095 | 0, // zasubs1_then_zasubq1 |
| 52096 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52097 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52098 | 0, // zasubh1_then_zasubd0 |
| 52099 | 0, // zasubh1_then_zasubd1 |
| 52100 | 0, // zasubh1_then_zasubq0 |
| 52101 | 0, // zasubh1_then_zasubq1 |
| 52102 | 0, // zasubh1_then_zasubs0 |
| 52103 | 0, // zasubh1_then_zasubs1 |
| 52104 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52105 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52106 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52107 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52108 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52109 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52110 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52111 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52112 | 142, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52113 | 142, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52114 | 142, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52115 | 142, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52116 | 142, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52117 | 142, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52118 | 0, // dsub3_then_bsub |
| 52119 | 0, // dsub3_then_bsub_hi |
| 52120 | 0, // dsub3_then_hsub |
| 52121 | 0, // dsub3_then_hsub_hi |
| 52122 | 0, // dsub3_then_ssub |
| 52123 | 0, // dsub3_then_ssub_hi |
| 52124 | 0, // dsub2_then_bsub |
| 52125 | 0, // dsub2_then_bsub_hi |
| 52126 | 0, // dsub2_then_hsub |
| 52127 | 0, // dsub2_then_hsub_hi |
| 52128 | 0, // dsub2_then_ssub |
| 52129 | 0, // dsub2_then_ssub_hi |
| 52130 | 0, // psub1_then_psub |
| 52131 | 142, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52132 | 0, // qsub3_then_dsub_hi |
| 52133 | 0, // qsub2_then_dsub_hi |
| 52134 | 0, // x8sub_7_then_sub_32 |
| 52135 | 0, // x8sub_7_then_sub_32_hi |
| 52136 | 0, // x8sub_6_then_sub_32 |
| 52137 | 0, // x8sub_6_then_sub_32_hi |
| 52138 | 0, // x8sub_5_then_sub_32 |
| 52139 | 0, // x8sub_5_then_sub_32_hi |
| 52140 | 0, // x8sub_4_then_sub_32 |
| 52141 | 0, // x8sub_4_then_sub_32_hi |
| 52142 | 0, // x8sub_3_then_sub_32 |
| 52143 | 0, // x8sub_3_then_sub_32_hi |
| 52144 | 0, // x8sub_2_then_sub_32 |
| 52145 | 0, // x8sub_2_then_sub_32_hi |
| 52146 | 0, // x8sub_1_then_sub_32 |
| 52147 | 0, // x8sub_1_then_sub_32_hi |
| 52148 | 0, // subo64_then_sub_32 |
| 52149 | 0, // subo64_then_sub_32_hi |
| 52150 | 142, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 52151 | 0, // zsub3_then_zsub_hi |
| 52152 | 0, // zsub2_then_zsub_hi |
| 52153 | 0, // dsub0_dsub1 |
| 52154 | 0, // dsub0_dsub1_dsub2 |
| 52155 | 0, // dsub1_dsub2 |
| 52156 | 0, // dsub1_dsub2_dsub3 |
| 52157 | 0, // dsub2_dsub3 |
| 52158 | 148, // dsub_dsub1 -> ZPR2Mul2_Hi |
| 52159 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52160 | 0, // dsub_dsub1_dsub2 |
| 52161 | 0, // qsub0_qsub1 |
| 52162 | 0, // qsub0_qsub1_qsub2 |
| 52163 | 0, // qsub1_qsub2 |
| 52164 | 0, // qsub1_qsub2_qsub3 |
| 52165 | 0, // qsub2_qsub3 |
| 52166 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52167 | 0, // x8sub_0_x8sub_1 |
| 52168 | 0, // x8sub_2_x8sub_3 |
| 52169 | 0, // x8sub_4_x8sub_5 |
| 52170 | 0, // x8sub_6_x8sub_7 |
| 52171 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52172 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52173 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52174 | 0, // sub_32_subo64_then_sub_32 |
| 52175 | 148, // zsub_qsub1 -> ZPR2Mul2_Hi |
| 52176 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52177 | 0, // zsub_qsub1_qsub2 |
| 52178 | 0, // zsub0_zsub1 |
| 52179 | 0, // zsub0_zsub1_zsub2 |
| 52180 | 0, // zsub1_zsub2 |
| 52181 | 0, // zsub1_zsub2_zsub3 |
| 52182 | 0, // zsub2_zsub3 |
| 52183 | 0, // zsub0_zsub2 |
| 52184 | 0, // zsub1_zsub3 |
| 52185 | }, |
| 52186 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52187 | 143, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52188 | 143, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52189 | 143, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52190 | 0, // dsub0 |
| 52191 | 143, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52192 | 0, // dsub2 |
| 52193 | 0, // dsub3 |
| 52194 | 143, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52195 | 143, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52196 | 143, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52197 | 0, // psub |
| 52198 | 0, // psub0 |
| 52199 | 0, // psub1 |
| 52200 | 0, // qsub0 |
| 52201 | 143, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52202 | 0, // qsub2 |
| 52203 | 0, // qsub3 |
| 52204 | 143, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52205 | 143, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52206 | 0, // sub_32 |
| 52207 | 0, // sub_32_hi |
| 52208 | 0, // sube32 |
| 52209 | 0, // sube64 |
| 52210 | 0, // subo32 |
| 52211 | 0, // subo64 |
| 52212 | 0, // x8sub_0 |
| 52213 | 0, // x8sub_1 |
| 52214 | 0, // x8sub_2 |
| 52215 | 0, // x8sub_3 |
| 52216 | 0, // x8sub_4 |
| 52217 | 0, // x8sub_5 |
| 52218 | 0, // x8sub_6 |
| 52219 | 0, // x8sub_7 |
| 52220 | 0, // zasubb |
| 52221 | 0, // zasubd0 |
| 52222 | 0, // zasubd1 |
| 52223 | 0, // zasubh0 |
| 52224 | 0, // zasubh1 |
| 52225 | 0, // zasubq0 |
| 52226 | 0, // zasubq1 |
| 52227 | 0, // zasubs0 |
| 52228 | 0, // zasubs1 |
| 52229 | 143, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52230 | 143, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52231 | 143, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52232 | 0, // zsub2 |
| 52233 | 0, // zsub3 |
| 52234 | 143, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52235 | 0, // zasubd1_then_zasubq0 |
| 52236 | 0, // zasubd1_then_zasubq1 |
| 52237 | 0, // zasubs1_then_zasubd0 |
| 52238 | 0, // zasubs1_then_zasubd1 |
| 52239 | 0, // zasubs1_then_zasubq0 |
| 52240 | 0, // zasubs1_then_zasubq1 |
| 52241 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52242 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52243 | 0, // zasubh1_then_zasubd0 |
| 52244 | 0, // zasubh1_then_zasubd1 |
| 52245 | 0, // zasubh1_then_zasubq0 |
| 52246 | 0, // zasubh1_then_zasubq1 |
| 52247 | 0, // zasubh1_then_zasubs0 |
| 52248 | 0, // zasubh1_then_zasubs1 |
| 52249 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52250 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52251 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52252 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52253 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52254 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52255 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52256 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52257 | 143, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52258 | 143, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52259 | 143, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52260 | 143, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52261 | 143, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52262 | 143, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52263 | 0, // dsub3_then_bsub |
| 52264 | 0, // dsub3_then_bsub_hi |
| 52265 | 0, // dsub3_then_hsub |
| 52266 | 0, // dsub3_then_hsub_hi |
| 52267 | 0, // dsub3_then_ssub |
| 52268 | 0, // dsub3_then_ssub_hi |
| 52269 | 0, // dsub2_then_bsub |
| 52270 | 0, // dsub2_then_bsub_hi |
| 52271 | 0, // dsub2_then_hsub |
| 52272 | 0, // dsub2_then_hsub_hi |
| 52273 | 0, // dsub2_then_ssub |
| 52274 | 0, // dsub2_then_ssub_hi |
| 52275 | 0, // psub1_then_psub |
| 52276 | 143, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52277 | 0, // qsub3_then_dsub_hi |
| 52278 | 0, // qsub2_then_dsub_hi |
| 52279 | 0, // x8sub_7_then_sub_32 |
| 52280 | 0, // x8sub_7_then_sub_32_hi |
| 52281 | 0, // x8sub_6_then_sub_32 |
| 52282 | 0, // x8sub_6_then_sub_32_hi |
| 52283 | 0, // x8sub_5_then_sub_32 |
| 52284 | 0, // x8sub_5_then_sub_32_hi |
| 52285 | 0, // x8sub_4_then_sub_32 |
| 52286 | 0, // x8sub_4_then_sub_32_hi |
| 52287 | 0, // x8sub_3_then_sub_32 |
| 52288 | 0, // x8sub_3_then_sub_32_hi |
| 52289 | 0, // x8sub_2_then_sub_32 |
| 52290 | 0, // x8sub_2_then_sub_32_hi |
| 52291 | 0, // x8sub_1_then_sub_32 |
| 52292 | 0, // x8sub_1_then_sub_32_hi |
| 52293 | 0, // subo64_then_sub_32 |
| 52294 | 0, // subo64_then_sub_32_hi |
| 52295 | 143, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 52296 | 0, // zsub3_then_zsub_hi |
| 52297 | 0, // zsub2_then_zsub_hi |
| 52298 | 0, // dsub0_dsub1 |
| 52299 | 0, // dsub0_dsub1_dsub2 |
| 52300 | 0, // dsub1_dsub2 |
| 52301 | 0, // dsub1_dsub2_dsub3 |
| 52302 | 0, // dsub2_dsub3 |
| 52303 | 149, // dsub_dsub1 -> ZPR2Mul2_Lo |
| 52304 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52305 | 0, // dsub_dsub1_dsub2 |
| 52306 | 0, // qsub0_qsub1 |
| 52307 | 0, // qsub0_qsub1_qsub2 |
| 52308 | 0, // qsub1_qsub2 |
| 52309 | 0, // qsub1_qsub2_qsub3 |
| 52310 | 0, // qsub2_qsub3 |
| 52311 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52312 | 0, // x8sub_0_x8sub_1 |
| 52313 | 0, // x8sub_2_x8sub_3 |
| 52314 | 0, // x8sub_4_x8sub_5 |
| 52315 | 0, // x8sub_6_x8sub_7 |
| 52316 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52317 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52318 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52319 | 0, // sub_32_subo64_then_sub_32 |
| 52320 | 149, // zsub_qsub1 -> ZPR2Mul2_Lo |
| 52321 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52322 | 0, // zsub_qsub1_qsub2 |
| 52323 | 0, // zsub0_zsub1 |
| 52324 | 0, // zsub0_zsub1_zsub2 |
| 52325 | 0, // zsub1_zsub2 |
| 52326 | 0, // zsub1_zsub2_zsub3 |
| 52327 | 0, // zsub2_zsub3 |
| 52328 | 0, // zsub0_zsub2 |
| 52329 | 0, // zsub1_zsub3 |
| 52330 | }, |
| 52331 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52332 | 144, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52333 | 144, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52334 | 144, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52335 | 0, // dsub0 |
| 52336 | 144, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52337 | 0, // dsub2 |
| 52338 | 0, // dsub3 |
| 52339 | 144, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52340 | 144, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52341 | 144, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52342 | 0, // psub |
| 52343 | 0, // psub0 |
| 52344 | 0, // psub1 |
| 52345 | 0, // qsub0 |
| 52346 | 144, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52347 | 0, // qsub2 |
| 52348 | 0, // qsub3 |
| 52349 | 144, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52350 | 144, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52351 | 0, // sub_32 |
| 52352 | 0, // sub_32_hi |
| 52353 | 0, // sube32 |
| 52354 | 0, // sube64 |
| 52355 | 0, // subo32 |
| 52356 | 0, // subo64 |
| 52357 | 0, // x8sub_0 |
| 52358 | 0, // x8sub_1 |
| 52359 | 0, // x8sub_2 |
| 52360 | 0, // x8sub_3 |
| 52361 | 0, // x8sub_4 |
| 52362 | 0, // x8sub_5 |
| 52363 | 0, // x8sub_6 |
| 52364 | 0, // x8sub_7 |
| 52365 | 0, // zasubb |
| 52366 | 0, // zasubd0 |
| 52367 | 0, // zasubd1 |
| 52368 | 0, // zasubh0 |
| 52369 | 0, // zasubh1 |
| 52370 | 0, // zasubq0 |
| 52371 | 0, // zasubq1 |
| 52372 | 0, // zasubs0 |
| 52373 | 0, // zasubs1 |
| 52374 | 144, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52375 | 144, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52376 | 144, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52377 | 0, // zsub2 |
| 52378 | 0, // zsub3 |
| 52379 | 144, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52380 | 0, // zasubd1_then_zasubq0 |
| 52381 | 0, // zasubd1_then_zasubq1 |
| 52382 | 0, // zasubs1_then_zasubd0 |
| 52383 | 0, // zasubs1_then_zasubd1 |
| 52384 | 0, // zasubs1_then_zasubq0 |
| 52385 | 0, // zasubs1_then_zasubq1 |
| 52386 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52387 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52388 | 0, // zasubh1_then_zasubd0 |
| 52389 | 0, // zasubh1_then_zasubd1 |
| 52390 | 0, // zasubh1_then_zasubq0 |
| 52391 | 0, // zasubh1_then_zasubq1 |
| 52392 | 0, // zasubh1_then_zasubs0 |
| 52393 | 0, // zasubh1_then_zasubs1 |
| 52394 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52395 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52396 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52397 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52398 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52399 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52400 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52401 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52402 | 144, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52403 | 144, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52404 | 144, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52405 | 144, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52406 | 144, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52407 | 144, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52408 | 0, // dsub3_then_bsub |
| 52409 | 0, // dsub3_then_bsub_hi |
| 52410 | 0, // dsub3_then_hsub |
| 52411 | 0, // dsub3_then_hsub_hi |
| 52412 | 0, // dsub3_then_ssub |
| 52413 | 0, // dsub3_then_ssub_hi |
| 52414 | 0, // dsub2_then_bsub |
| 52415 | 0, // dsub2_then_bsub_hi |
| 52416 | 0, // dsub2_then_hsub |
| 52417 | 0, // dsub2_then_hsub_hi |
| 52418 | 0, // dsub2_then_ssub |
| 52419 | 0, // dsub2_then_ssub_hi |
| 52420 | 0, // psub1_then_psub |
| 52421 | 144, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52422 | 0, // qsub3_then_dsub_hi |
| 52423 | 0, // qsub2_then_dsub_hi |
| 52424 | 0, // x8sub_7_then_sub_32 |
| 52425 | 0, // x8sub_7_then_sub_32_hi |
| 52426 | 0, // x8sub_6_then_sub_32 |
| 52427 | 0, // x8sub_6_then_sub_32_hi |
| 52428 | 0, // x8sub_5_then_sub_32 |
| 52429 | 0, // x8sub_5_then_sub_32_hi |
| 52430 | 0, // x8sub_4_then_sub_32 |
| 52431 | 0, // x8sub_4_then_sub_32_hi |
| 52432 | 0, // x8sub_3_then_sub_32 |
| 52433 | 0, // x8sub_3_then_sub_32_hi |
| 52434 | 0, // x8sub_2_then_sub_32 |
| 52435 | 0, // x8sub_2_then_sub_32_hi |
| 52436 | 0, // x8sub_1_then_sub_32 |
| 52437 | 0, // x8sub_1_then_sub_32_hi |
| 52438 | 0, // subo64_then_sub_32 |
| 52439 | 0, // subo64_then_sub_32_hi |
| 52440 | 144, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 52441 | 0, // zsub3_then_zsub_hi |
| 52442 | 0, // zsub2_then_zsub_hi |
| 52443 | 0, // dsub0_dsub1 |
| 52444 | 0, // dsub0_dsub1_dsub2 |
| 52445 | 0, // dsub1_dsub2 |
| 52446 | 0, // dsub1_dsub2_dsub3 |
| 52447 | 0, // dsub2_dsub3 |
| 52448 | 155, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 52449 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52450 | 0, // dsub_dsub1_dsub2 |
| 52451 | 0, // qsub0_qsub1 |
| 52452 | 0, // qsub0_qsub1_qsub2 |
| 52453 | 0, // qsub1_qsub2 |
| 52454 | 0, // qsub1_qsub2_qsub3 |
| 52455 | 0, // qsub2_qsub3 |
| 52456 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52457 | 0, // x8sub_0_x8sub_1 |
| 52458 | 0, // x8sub_2_x8sub_3 |
| 52459 | 0, // x8sub_4_x8sub_5 |
| 52460 | 0, // x8sub_6_x8sub_7 |
| 52461 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52462 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52463 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52464 | 0, // sub_32_subo64_then_sub_32 |
| 52465 | 155, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 52466 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52467 | 0, // zsub_qsub1_qsub2 |
| 52468 | 0, // zsub0_zsub1 |
| 52469 | 0, // zsub0_zsub1_zsub2 |
| 52470 | 0, // zsub1_zsub2 |
| 52471 | 0, // zsub1_zsub2_zsub3 |
| 52472 | 0, // zsub2_zsub3 |
| 52473 | 0, // zsub0_zsub2 |
| 52474 | 0, // zsub1_zsub3 |
| 52475 | }, |
| 52476 | { // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52477 | 145, // bsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52478 | 145, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52479 | 145, // dsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52480 | 0, // dsub0 |
| 52481 | 145, // dsub1 -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52482 | 0, // dsub2 |
| 52483 | 0, // dsub3 |
| 52484 | 145, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52485 | 145, // hsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52486 | 145, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52487 | 0, // psub |
| 52488 | 0, // psub0 |
| 52489 | 0, // psub1 |
| 52490 | 0, // qsub0 |
| 52491 | 145, // qsub1 -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52492 | 0, // qsub2 |
| 52493 | 0, // qsub3 |
| 52494 | 145, // ssub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52495 | 145, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52496 | 0, // sub_32 |
| 52497 | 0, // sub_32_hi |
| 52498 | 0, // sube32 |
| 52499 | 0, // sube64 |
| 52500 | 0, // subo32 |
| 52501 | 0, // subo64 |
| 52502 | 0, // x8sub_0 |
| 52503 | 0, // x8sub_1 |
| 52504 | 0, // x8sub_2 |
| 52505 | 0, // x8sub_3 |
| 52506 | 0, // x8sub_4 |
| 52507 | 0, // x8sub_5 |
| 52508 | 0, // x8sub_6 |
| 52509 | 0, // x8sub_7 |
| 52510 | 0, // zasubb |
| 52511 | 0, // zasubd0 |
| 52512 | 0, // zasubd1 |
| 52513 | 0, // zasubh0 |
| 52514 | 0, // zasubh1 |
| 52515 | 0, // zasubq0 |
| 52516 | 0, // zasubq1 |
| 52517 | 0, // zasubs0 |
| 52518 | 0, // zasubs1 |
| 52519 | 145, // zsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52520 | 145, // zsub0 -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52521 | 145, // zsub1 -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52522 | 0, // zsub2 |
| 52523 | 0, // zsub3 |
| 52524 | 145, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52525 | 0, // zasubd1_then_zasubq0 |
| 52526 | 0, // zasubd1_then_zasubq1 |
| 52527 | 0, // zasubs1_then_zasubd0 |
| 52528 | 0, // zasubs1_then_zasubd1 |
| 52529 | 0, // zasubs1_then_zasubq0 |
| 52530 | 0, // zasubs1_then_zasubq1 |
| 52531 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52532 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52533 | 0, // zasubh1_then_zasubd0 |
| 52534 | 0, // zasubh1_then_zasubd1 |
| 52535 | 0, // zasubh1_then_zasubq0 |
| 52536 | 0, // zasubh1_then_zasubq1 |
| 52537 | 0, // zasubh1_then_zasubs0 |
| 52538 | 0, // zasubh1_then_zasubs1 |
| 52539 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52540 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52541 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52542 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52543 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52544 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52545 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52546 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52547 | 145, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52548 | 145, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52549 | 145, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52550 | 145, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52551 | 145, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52552 | 145, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52553 | 0, // dsub3_then_bsub |
| 52554 | 0, // dsub3_then_bsub_hi |
| 52555 | 0, // dsub3_then_hsub |
| 52556 | 0, // dsub3_then_hsub_hi |
| 52557 | 0, // dsub3_then_ssub |
| 52558 | 0, // dsub3_then_ssub_hi |
| 52559 | 0, // dsub2_then_bsub |
| 52560 | 0, // dsub2_then_bsub_hi |
| 52561 | 0, // dsub2_then_hsub |
| 52562 | 0, // dsub2_then_hsub_hi |
| 52563 | 0, // dsub2_then_ssub |
| 52564 | 0, // dsub2_then_ssub_hi |
| 52565 | 0, // psub1_then_psub |
| 52566 | 145, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52567 | 0, // qsub3_then_dsub_hi |
| 52568 | 0, // qsub2_then_dsub_hi |
| 52569 | 0, // x8sub_7_then_sub_32 |
| 52570 | 0, // x8sub_7_then_sub_32_hi |
| 52571 | 0, // x8sub_6_then_sub_32 |
| 52572 | 0, // x8sub_6_then_sub_32_hi |
| 52573 | 0, // x8sub_5_then_sub_32 |
| 52574 | 0, // x8sub_5_then_sub_32_hi |
| 52575 | 0, // x8sub_4_then_sub_32 |
| 52576 | 0, // x8sub_4_then_sub_32_hi |
| 52577 | 0, // x8sub_3_then_sub_32 |
| 52578 | 0, // x8sub_3_then_sub_32_hi |
| 52579 | 0, // x8sub_2_then_sub_32 |
| 52580 | 0, // x8sub_2_then_sub_32_hi |
| 52581 | 0, // x8sub_1_then_sub_32 |
| 52582 | 0, // x8sub_1_then_sub_32_hi |
| 52583 | 0, // subo64_then_sub_32 |
| 52584 | 0, // subo64_then_sub_32_hi |
| 52585 | 145, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 52586 | 0, // zsub3_then_zsub_hi |
| 52587 | 0, // zsub2_then_zsub_hi |
| 52588 | 0, // dsub0_dsub1 |
| 52589 | 0, // dsub0_dsub1_dsub2 |
| 52590 | 0, // dsub1_dsub2 |
| 52591 | 0, // dsub1_dsub2_dsub3 |
| 52592 | 0, // dsub2_dsub3 |
| 52593 | 173, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 52594 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52595 | 0, // dsub_dsub1_dsub2 |
| 52596 | 0, // qsub0_qsub1 |
| 52597 | 0, // qsub0_qsub1_qsub2 |
| 52598 | 0, // qsub1_qsub2 |
| 52599 | 0, // qsub1_qsub2_qsub3 |
| 52600 | 0, // qsub2_qsub3 |
| 52601 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52602 | 0, // x8sub_0_x8sub_1 |
| 52603 | 0, // x8sub_2_x8sub_3 |
| 52604 | 0, // x8sub_4_x8sub_5 |
| 52605 | 0, // x8sub_6_x8sub_7 |
| 52606 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52607 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52608 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52609 | 0, // sub_32_subo64_then_sub_32 |
| 52610 | 173, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 52611 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52612 | 0, // zsub_qsub1_qsub2 |
| 52613 | 0, // zsub0_zsub1 |
| 52614 | 0, // zsub0_zsub1_zsub2 |
| 52615 | 0, // zsub1_zsub2 |
| 52616 | 0, // zsub1_zsub2_zsub3 |
| 52617 | 0, // zsub2_zsub3 |
| 52618 | 0, // zsub0_zsub2 |
| 52619 | 0, // zsub1_zsub3 |
| 52620 | }, |
| 52621 | { // QQ_with_qsub0_in_FPR128_0to7 |
| 52622 | 146, // bsub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52623 | 146, // bsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52624 | 146, // dsub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52625 | 0, // dsub0 |
| 52626 | 146, // dsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 52627 | 0, // dsub2 |
| 52628 | 0, // dsub3 |
| 52629 | 146, // dsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52630 | 146, // hsub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52631 | 146, // hsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52632 | 0, // psub |
| 52633 | 0, // psub0 |
| 52634 | 0, // psub1 |
| 52635 | 146, // qsub0 -> QQ_with_qsub0_in_FPR128_0to7 |
| 52636 | 146, // qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 52637 | 0, // qsub2 |
| 52638 | 0, // qsub3 |
| 52639 | 146, // ssub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52640 | 146, // ssub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52641 | 0, // sub_32 |
| 52642 | 0, // sub_32_hi |
| 52643 | 0, // sube32 |
| 52644 | 0, // sube64 |
| 52645 | 0, // subo32 |
| 52646 | 0, // subo64 |
| 52647 | 0, // x8sub_0 |
| 52648 | 0, // x8sub_1 |
| 52649 | 0, // x8sub_2 |
| 52650 | 0, // x8sub_3 |
| 52651 | 0, // x8sub_4 |
| 52652 | 0, // x8sub_5 |
| 52653 | 0, // x8sub_6 |
| 52654 | 0, // x8sub_7 |
| 52655 | 0, // zasubb |
| 52656 | 0, // zasubd0 |
| 52657 | 0, // zasubd1 |
| 52658 | 0, // zasubh0 |
| 52659 | 0, // zasubh1 |
| 52660 | 0, // zasubq0 |
| 52661 | 0, // zasubq1 |
| 52662 | 0, // zasubs0 |
| 52663 | 0, // zasubs1 |
| 52664 | 0, // zsub |
| 52665 | 0, // zsub0 |
| 52666 | 0, // zsub1 |
| 52667 | 0, // zsub2 |
| 52668 | 0, // zsub3 |
| 52669 | 0, // zsub_hi |
| 52670 | 0, // zasubd1_then_zasubq0 |
| 52671 | 0, // zasubd1_then_zasubq1 |
| 52672 | 0, // zasubs1_then_zasubd0 |
| 52673 | 0, // zasubs1_then_zasubd1 |
| 52674 | 0, // zasubs1_then_zasubq0 |
| 52675 | 0, // zasubs1_then_zasubq1 |
| 52676 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52677 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52678 | 0, // zasubh1_then_zasubd0 |
| 52679 | 0, // zasubh1_then_zasubd1 |
| 52680 | 0, // zasubh1_then_zasubq0 |
| 52681 | 0, // zasubh1_then_zasubq1 |
| 52682 | 0, // zasubh1_then_zasubs0 |
| 52683 | 0, // zasubh1_then_zasubs1 |
| 52684 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52685 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52686 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52687 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52688 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52689 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52690 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52691 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52692 | 146, // dsub1_then_bsub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52693 | 146, // dsub1_then_bsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52694 | 146, // dsub1_then_hsub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52695 | 146, // dsub1_then_hsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52696 | 146, // dsub1_then_ssub -> QQ_with_qsub0_in_FPR128_0to7 |
| 52697 | 146, // dsub1_then_ssub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52698 | 0, // dsub3_then_bsub |
| 52699 | 0, // dsub3_then_bsub_hi |
| 52700 | 0, // dsub3_then_hsub |
| 52701 | 0, // dsub3_then_hsub_hi |
| 52702 | 0, // dsub3_then_ssub |
| 52703 | 0, // dsub3_then_ssub_hi |
| 52704 | 0, // dsub2_then_bsub |
| 52705 | 0, // dsub2_then_bsub_hi |
| 52706 | 0, // dsub2_then_hsub |
| 52707 | 0, // dsub2_then_hsub_hi |
| 52708 | 0, // dsub2_then_ssub |
| 52709 | 0, // dsub2_then_ssub_hi |
| 52710 | 0, // psub1_then_psub |
| 52711 | 146, // qsub1_then_dsub_hi -> QQ_with_qsub0_in_FPR128_0to7 |
| 52712 | 0, // qsub3_then_dsub_hi |
| 52713 | 0, // qsub2_then_dsub_hi |
| 52714 | 0, // x8sub_7_then_sub_32 |
| 52715 | 0, // x8sub_7_then_sub_32_hi |
| 52716 | 0, // x8sub_6_then_sub_32 |
| 52717 | 0, // x8sub_6_then_sub_32_hi |
| 52718 | 0, // x8sub_5_then_sub_32 |
| 52719 | 0, // x8sub_5_then_sub_32_hi |
| 52720 | 0, // x8sub_4_then_sub_32 |
| 52721 | 0, // x8sub_4_then_sub_32_hi |
| 52722 | 0, // x8sub_3_then_sub_32 |
| 52723 | 0, // x8sub_3_then_sub_32_hi |
| 52724 | 0, // x8sub_2_then_sub_32 |
| 52725 | 0, // x8sub_2_then_sub_32_hi |
| 52726 | 0, // x8sub_1_then_sub_32 |
| 52727 | 0, // x8sub_1_then_sub_32_hi |
| 52728 | 0, // subo64_then_sub_32 |
| 52729 | 0, // subo64_then_sub_32_hi |
| 52730 | 0, // zsub1_then_zsub_hi |
| 52731 | 0, // zsub3_then_zsub_hi |
| 52732 | 0, // zsub2_then_zsub_hi |
| 52733 | 0, // dsub0_dsub1 |
| 52734 | 0, // dsub0_dsub1_dsub2 |
| 52735 | 0, // dsub1_dsub2 |
| 52736 | 0, // dsub1_dsub2_dsub3 |
| 52737 | 0, // dsub2_dsub3 |
| 52738 | 146, // dsub_dsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 52739 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52740 | 0, // dsub_dsub1_dsub2 |
| 52741 | 0, // qsub0_qsub1 |
| 52742 | 0, // qsub0_qsub1_qsub2 |
| 52743 | 0, // qsub1_qsub2 |
| 52744 | 0, // qsub1_qsub2_qsub3 |
| 52745 | 0, // qsub2_qsub3 |
| 52746 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52747 | 0, // x8sub_0_x8sub_1 |
| 52748 | 0, // x8sub_2_x8sub_3 |
| 52749 | 0, // x8sub_4_x8sub_5 |
| 52750 | 0, // x8sub_6_x8sub_7 |
| 52751 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52752 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52753 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52754 | 0, // sub_32_subo64_then_sub_32 |
| 52755 | 0, // zsub_qsub1 |
| 52756 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52757 | 0, // zsub_qsub1_qsub2 |
| 52758 | 0, // zsub0_zsub1 |
| 52759 | 0, // zsub0_zsub1_zsub2 |
| 52760 | 0, // zsub1_zsub2 |
| 52761 | 0, // zsub1_zsub2_zsub3 |
| 52762 | 0, // zsub2_zsub3 |
| 52763 | 0, // zsub0_zsub2 |
| 52764 | 0, // zsub1_zsub3 |
| 52765 | }, |
| 52766 | { // QQ_with_qsub1_in_FPR128_0to7 |
| 52767 | 147, // bsub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52768 | 147, // bsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52769 | 147, // dsub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52770 | 0, // dsub0 |
| 52771 | 147, // dsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 52772 | 0, // dsub2 |
| 52773 | 0, // dsub3 |
| 52774 | 147, // dsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52775 | 147, // hsub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52776 | 147, // hsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52777 | 0, // psub |
| 52778 | 0, // psub0 |
| 52779 | 0, // psub1 |
| 52780 | 147, // qsub0 -> QQ_with_qsub1_in_FPR128_0to7 |
| 52781 | 147, // qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 52782 | 0, // qsub2 |
| 52783 | 0, // qsub3 |
| 52784 | 147, // ssub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52785 | 147, // ssub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52786 | 0, // sub_32 |
| 52787 | 0, // sub_32_hi |
| 52788 | 0, // sube32 |
| 52789 | 0, // sube64 |
| 52790 | 0, // subo32 |
| 52791 | 0, // subo64 |
| 52792 | 0, // x8sub_0 |
| 52793 | 0, // x8sub_1 |
| 52794 | 0, // x8sub_2 |
| 52795 | 0, // x8sub_3 |
| 52796 | 0, // x8sub_4 |
| 52797 | 0, // x8sub_5 |
| 52798 | 0, // x8sub_6 |
| 52799 | 0, // x8sub_7 |
| 52800 | 0, // zasubb |
| 52801 | 0, // zasubd0 |
| 52802 | 0, // zasubd1 |
| 52803 | 0, // zasubh0 |
| 52804 | 0, // zasubh1 |
| 52805 | 0, // zasubq0 |
| 52806 | 0, // zasubq1 |
| 52807 | 0, // zasubs0 |
| 52808 | 0, // zasubs1 |
| 52809 | 0, // zsub |
| 52810 | 0, // zsub0 |
| 52811 | 0, // zsub1 |
| 52812 | 0, // zsub2 |
| 52813 | 0, // zsub3 |
| 52814 | 0, // zsub_hi |
| 52815 | 0, // zasubd1_then_zasubq0 |
| 52816 | 0, // zasubd1_then_zasubq1 |
| 52817 | 0, // zasubs1_then_zasubd0 |
| 52818 | 0, // zasubs1_then_zasubd1 |
| 52819 | 0, // zasubs1_then_zasubq0 |
| 52820 | 0, // zasubs1_then_zasubq1 |
| 52821 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52822 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52823 | 0, // zasubh1_then_zasubd0 |
| 52824 | 0, // zasubh1_then_zasubd1 |
| 52825 | 0, // zasubh1_then_zasubq0 |
| 52826 | 0, // zasubh1_then_zasubq1 |
| 52827 | 0, // zasubh1_then_zasubs0 |
| 52828 | 0, // zasubh1_then_zasubs1 |
| 52829 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52830 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52831 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52832 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52833 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52834 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52835 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52836 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52837 | 147, // dsub1_then_bsub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52838 | 147, // dsub1_then_bsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52839 | 147, // dsub1_then_hsub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52840 | 147, // dsub1_then_hsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52841 | 147, // dsub1_then_ssub -> QQ_with_qsub1_in_FPR128_0to7 |
| 52842 | 147, // dsub1_then_ssub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52843 | 0, // dsub3_then_bsub |
| 52844 | 0, // dsub3_then_bsub_hi |
| 52845 | 0, // dsub3_then_hsub |
| 52846 | 0, // dsub3_then_hsub_hi |
| 52847 | 0, // dsub3_then_ssub |
| 52848 | 0, // dsub3_then_ssub_hi |
| 52849 | 0, // dsub2_then_bsub |
| 52850 | 0, // dsub2_then_bsub_hi |
| 52851 | 0, // dsub2_then_hsub |
| 52852 | 0, // dsub2_then_hsub_hi |
| 52853 | 0, // dsub2_then_ssub |
| 52854 | 0, // dsub2_then_ssub_hi |
| 52855 | 0, // psub1_then_psub |
| 52856 | 147, // qsub1_then_dsub_hi -> QQ_with_qsub1_in_FPR128_0to7 |
| 52857 | 0, // qsub3_then_dsub_hi |
| 52858 | 0, // qsub2_then_dsub_hi |
| 52859 | 0, // x8sub_7_then_sub_32 |
| 52860 | 0, // x8sub_7_then_sub_32_hi |
| 52861 | 0, // x8sub_6_then_sub_32 |
| 52862 | 0, // x8sub_6_then_sub_32_hi |
| 52863 | 0, // x8sub_5_then_sub_32 |
| 52864 | 0, // x8sub_5_then_sub_32_hi |
| 52865 | 0, // x8sub_4_then_sub_32 |
| 52866 | 0, // x8sub_4_then_sub_32_hi |
| 52867 | 0, // x8sub_3_then_sub_32 |
| 52868 | 0, // x8sub_3_then_sub_32_hi |
| 52869 | 0, // x8sub_2_then_sub_32 |
| 52870 | 0, // x8sub_2_then_sub_32_hi |
| 52871 | 0, // x8sub_1_then_sub_32 |
| 52872 | 0, // x8sub_1_then_sub_32_hi |
| 52873 | 0, // subo64_then_sub_32 |
| 52874 | 0, // subo64_then_sub_32_hi |
| 52875 | 0, // zsub1_then_zsub_hi |
| 52876 | 0, // zsub3_then_zsub_hi |
| 52877 | 0, // zsub2_then_zsub_hi |
| 52878 | 0, // dsub0_dsub1 |
| 52879 | 0, // dsub0_dsub1_dsub2 |
| 52880 | 0, // dsub1_dsub2 |
| 52881 | 0, // dsub1_dsub2_dsub3 |
| 52882 | 0, // dsub2_dsub3 |
| 52883 | 147, // dsub_dsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 52884 | 0, // dsub_dsub1_dsub2_dsub3 |
| 52885 | 0, // dsub_dsub1_dsub2 |
| 52886 | 0, // qsub0_qsub1 |
| 52887 | 0, // qsub0_qsub1_qsub2 |
| 52888 | 0, // qsub1_qsub2 |
| 52889 | 0, // qsub1_qsub2_qsub3 |
| 52890 | 0, // qsub2_qsub3 |
| 52891 | 0, // sub_32_x8sub_1_then_sub_32 |
| 52892 | 0, // x8sub_0_x8sub_1 |
| 52893 | 0, // x8sub_2_x8sub_3 |
| 52894 | 0, // x8sub_4_x8sub_5 |
| 52895 | 0, // x8sub_6_x8sub_7 |
| 52896 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 52897 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 52898 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 52899 | 0, // sub_32_subo64_then_sub_32 |
| 52900 | 0, // zsub_qsub1 |
| 52901 | 0, // zsub_qsub1_qsub2_qsub3 |
| 52902 | 0, // zsub_qsub1_qsub2 |
| 52903 | 0, // zsub0_zsub1 |
| 52904 | 0, // zsub0_zsub1_zsub2 |
| 52905 | 0, // zsub1_zsub2 |
| 52906 | 0, // zsub1_zsub2_zsub3 |
| 52907 | 0, // zsub2_zsub3 |
| 52908 | 0, // zsub0_zsub2 |
| 52909 | 0, // zsub1_zsub3 |
| 52910 | }, |
| 52911 | { // ZPR2Mul2_Hi |
| 52912 | 148, // bsub -> ZPR2Mul2_Hi |
| 52913 | 148, // bsub_hi -> ZPR2Mul2_Hi |
| 52914 | 148, // dsub -> ZPR2Mul2_Hi |
| 52915 | 0, // dsub0 |
| 52916 | 148, // dsub1 -> ZPR2Mul2_Hi |
| 52917 | 0, // dsub2 |
| 52918 | 0, // dsub3 |
| 52919 | 148, // dsub_hi -> ZPR2Mul2_Hi |
| 52920 | 148, // hsub -> ZPR2Mul2_Hi |
| 52921 | 148, // hsub_hi -> ZPR2Mul2_Hi |
| 52922 | 0, // psub |
| 52923 | 0, // psub0 |
| 52924 | 0, // psub1 |
| 52925 | 0, // qsub0 |
| 52926 | 148, // qsub1 -> ZPR2Mul2_Hi |
| 52927 | 0, // qsub2 |
| 52928 | 0, // qsub3 |
| 52929 | 148, // ssub -> ZPR2Mul2_Hi |
| 52930 | 148, // ssub_hi -> ZPR2Mul2_Hi |
| 52931 | 0, // sub_32 |
| 52932 | 0, // sub_32_hi |
| 52933 | 0, // sube32 |
| 52934 | 0, // sube64 |
| 52935 | 0, // subo32 |
| 52936 | 0, // subo64 |
| 52937 | 0, // x8sub_0 |
| 52938 | 0, // x8sub_1 |
| 52939 | 0, // x8sub_2 |
| 52940 | 0, // x8sub_3 |
| 52941 | 0, // x8sub_4 |
| 52942 | 0, // x8sub_5 |
| 52943 | 0, // x8sub_6 |
| 52944 | 0, // x8sub_7 |
| 52945 | 0, // zasubb |
| 52946 | 0, // zasubd0 |
| 52947 | 0, // zasubd1 |
| 52948 | 0, // zasubh0 |
| 52949 | 0, // zasubh1 |
| 52950 | 0, // zasubq0 |
| 52951 | 0, // zasubq1 |
| 52952 | 0, // zasubs0 |
| 52953 | 0, // zasubs1 |
| 52954 | 148, // zsub -> ZPR2Mul2_Hi |
| 52955 | 148, // zsub0 -> ZPR2Mul2_Hi |
| 52956 | 148, // zsub1 -> ZPR2Mul2_Hi |
| 52957 | 0, // zsub2 |
| 52958 | 0, // zsub3 |
| 52959 | 148, // zsub_hi -> ZPR2Mul2_Hi |
| 52960 | 0, // zasubd1_then_zasubq0 |
| 52961 | 0, // zasubd1_then_zasubq1 |
| 52962 | 0, // zasubs1_then_zasubd0 |
| 52963 | 0, // zasubs1_then_zasubd1 |
| 52964 | 0, // zasubs1_then_zasubq0 |
| 52965 | 0, // zasubs1_then_zasubq1 |
| 52966 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 52967 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 52968 | 0, // zasubh1_then_zasubd0 |
| 52969 | 0, // zasubh1_then_zasubd1 |
| 52970 | 0, // zasubh1_then_zasubq0 |
| 52971 | 0, // zasubh1_then_zasubq1 |
| 52972 | 0, // zasubh1_then_zasubs0 |
| 52973 | 0, // zasubh1_then_zasubs1 |
| 52974 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 52975 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 52976 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 52977 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 52978 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 52979 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 52980 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 52981 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 52982 | 148, // dsub1_then_bsub -> ZPR2Mul2_Hi |
| 52983 | 148, // dsub1_then_bsub_hi -> ZPR2Mul2_Hi |
| 52984 | 148, // dsub1_then_hsub -> ZPR2Mul2_Hi |
| 52985 | 148, // dsub1_then_hsub_hi -> ZPR2Mul2_Hi |
| 52986 | 148, // dsub1_then_ssub -> ZPR2Mul2_Hi |
| 52987 | 148, // dsub1_then_ssub_hi -> ZPR2Mul2_Hi |
| 52988 | 0, // dsub3_then_bsub |
| 52989 | 0, // dsub3_then_bsub_hi |
| 52990 | 0, // dsub3_then_hsub |
| 52991 | 0, // dsub3_then_hsub_hi |
| 52992 | 0, // dsub3_then_ssub |
| 52993 | 0, // dsub3_then_ssub_hi |
| 52994 | 0, // dsub2_then_bsub |
| 52995 | 0, // dsub2_then_bsub_hi |
| 52996 | 0, // dsub2_then_hsub |
| 52997 | 0, // dsub2_then_hsub_hi |
| 52998 | 0, // dsub2_then_ssub |
| 52999 | 0, // dsub2_then_ssub_hi |
| 53000 | 0, // psub1_then_psub |
| 53001 | 148, // qsub1_then_dsub_hi -> ZPR2Mul2_Hi |
| 53002 | 0, // qsub3_then_dsub_hi |
| 53003 | 0, // qsub2_then_dsub_hi |
| 53004 | 0, // x8sub_7_then_sub_32 |
| 53005 | 0, // x8sub_7_then_sub_32_hi |
| 53006 | 0, // x8sub_6_then_sub_32 |
| 53007 | 0, // x8sub_6_then_sub_32_hi |
| 53008 | 0, // x8sub_5_then_sub_32 |
| 53009 | 0, // x8sub_5_then_sub_32_hi |
| 53010 | 0, // x8sub_4_then_sub_32 |
| 53011 | 0, // x8sub_4_then_sub_32_hi |
| 53012 | 0, // x8sub_3_then_sub_32 |
| 53013 | 0, // x8sub_3_then_sub_32_hi |
| 53014 | 0, // x8sub_2_then_sub_32 |
| 53015 | 0, // x8sub_2_then_sub_32_hi |
| 53016 | 0, // x8sub_1_then_sub_32 |
| 53017 | 0, // x8sub_1_then_sub_32_hi |
| 53018 | 0, // subo64_then_sub_32 |
| 53019 | 0, // subo64_then_sub_32_hi |
| 53020 | 148, // zsub1_then_zsub_hi -> ZPR2Mul2_Hi |
| 53021 | 0, // zsub3_then_zsub_hi |
| 53022 | 0, // zsub2_then_zsub_hi |
| 53023 | 0, // dsub0_dsub1 |
| 53024 | 0, // dsub0_dsub1_dsub2 |
| 53025 | 0, // dsub1_dsub2 |
| 53026 | 0, // dsub1_dsub2_dsub3 |
| 53027 | 0, // dsub2_dsub3 |
| 53028 | 148, // dsub_dsub1 -> ZPR2Mul2_Hi |
| 53029 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53030 | 0, // dsub_dsub1_dsub2 |
| 53031 | 0, // qsub0_qsub1 |
| 53032 | 0, // qsub0_qsub1_qsub2 |
| 53033 | 0, // qsub1_qsub2 |
| 53034 | 0, // qsub1_qsub2_qsub3 |
| 53035 | 0, // qsub2_qsub3 |
| 53036 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53037 | 0, // x8sub_0_x8sub_1 |
| 53038 | 0, // x8sub_2_x8sub_3 |
| 53039 | 0, // x8sub_4_x8sub_5 |
| 53040 | 0, // x8sub_6_x8sub_7 |
| 53041 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53042 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53043 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53044 | 0, // sub_32_subo64_then_sub_32 |
| 53045 | 148, // zsub_qsub1 -> ZPR2Mul2_Hi |
| 53046 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53047 | 0, // zsub_qsub1_qsub2 |
| 53048 | 0, // zsub0_zsub1 |
| 53049 | 0, // zsub0_zsub1_zsub2 |
| 53050 | 0, // zsub1_zsub2 |
| 53051 | 0, // zsub1_zsub2_zsub3 |
| 53052 | 0, // zsub2_zsub3 |
| 53053 | 0, // zsub0_zsub2 |
| 53054 | 0, // zsub1_zsub3 |
| 53055 | }, |
| 53056 | { // ZPR2Mul2_Lo |
| 53057 | 149, // bsub -> ZPR2Mul2_Lo |
| 53058 | 149, // bsub_hi -> ZPR2Mul2_Lo |
| 53059 | 149, // dsub -> ZPR2Mul2_Lo |
| 53060 | 0, // dsub0 |
| 53061 | 149, // dsub1 -> ZPR2Mul2_Lo |
| 53062 | 0, // dsub2 |
| 53063 | 0, // dsub3 |
| 53064 | 149, // dsub_hi -> ZPR2Mul2_Lo |
| 53065 | 149, // hsub -> ZPR2Mul2_Lo |
| 53066 | 149, // hsub_hi -> ZPR2Mul2_Lo |
| 53067 | 0, // psub |
| 53068 | 0, // psub0 |
| 53069 | 0, // psub1 |
| 53070 | 0, // qsub0 |
| 53071 | 149, // qsub1 -> ZPR2Mul2_Lo |
| 53072 | 0, // qsub2 |
| 53073 | 0, // qsub3 |
| 53074 | 149, // ssub -> ZPR2Mul2_Lo |
| 53075 | 149, // ssub_hi -> ZPR2Mul2_Lo |
| 53076 | 0, // sub_32 |
| 53077 | 0, // sub_32_hi |
| 53078 | 0, // sube32 |
| 53079 | 0, // sube64 |
| 53080 | 0, // subo32 |
| 53081 | 0, // subo64 |
| 53082 | 0, // x8sub_0 |
| 53083 | 0, // x8sub_1 |
| 53084 | 0, // x8sub_2 |
| 53085 | 0, // x8sub_3 |
| 53086 | 0, // x8sub_4 |
| 53087 | 0, // x8sub_5 |
| 53088 | 0, // x8sub_6 |
| 53089 | 0, // x8sub_7 |
| 53090 | 0, // zasubb |
| 53091 | 0, // zasubd0 |
| 53092 | 0, // zasubd1 |
| 53093 | 0, // zasubh0 |
| 53094 | 0, // zasubh1 |
| 53095 | 0, // zasubq0 |
| 53096 | 0, // zasubq1 |
| 53097 | 0, // zasubs0 |
| 53098 | 0, // zasubs1 |
| 53099 | 149, // zsub -> ZPR2Mul2_Lo |
| 53100 | 149, // zsub0 -> ZPR2Mul2_Lo |
| 53101 | 149, // zsub1 -> ZPR2Mul2_Lo |
| 53102 | 0, // zsub2 |
| 53103 | 0, // zsub3 |
| 53104 | 149, // zsub_hi -> ZPR2Mul2_Lo |
| 53105 | 0, // zasubd1_then_zasubq0 |
| 53106 | 0, // zasubd1_then_zasubq1 |
| 53107 | 0, // zasubs1_then_zasubd0 |
| 53108 | 0, // zasubs1_then_zasubd1 |
| 53109 | 0, // zasubs1_then_zasubq0 |
| 53110 | 0, // zasubs1_then_zasubq1 |
| 53111 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53112 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53113 | 0, // zasubh1_then_zasubd0 |
| 53114 | 0, // zasubh1_then_zasubd1 |
| 53115 | 0, // zasubh1_then_zasubq0 |
| 53116 | 0, // zasubh1_then_zasubq1 |
| 53117 | 0, // zasubh1_then_zasubs0 |
| 53118 | 0, // zasubh1_then_zasubs1 |
| 53119 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53120 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53121 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53122 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53123 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53124 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53125 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53126 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53127 | 149, // dsub1_then_bsub -> ZPR2Mul2_Lo |
| 53128 | 149, // dsub1_then_bsub_hi -> ZPR2Mul2_Lo |
| 53129 | 149, // dsub1_then_hsub -> ZPR2Mul2_Lo |
| 53130 | 149, // dsub1_then_hsub_hi -> ZPR2Mul2_Lo |
| 53131 | 149, // dsub1_then_ssub -> ZPR2Mul2_Lo |
| 53132 | 149, // dsub1_then_ssub_hi -> ZPR2Mul2_Lo |
| 53133 | 0, // dsub3_then_bsub |
| 53134 | 0, // dsub3_then_bsub_hi |
| 53135 | 0, // dsub3_then_hsub |
| 53136 | 0, // dsub3_then_hsub_hi |
| 53137 | 0, // dsub3_then_ssub |
| 53138 | 0, // dsub3_then_ssub_hi |
| 53139 | 0, // dsub2_then_bsub |
| 53140 | 0, // dsub2_then_bsub_hi |
| 53141 | 0, // dsub2_then_hsub |
| 53142 | 0, // dsub2_then_hsub_hi |
| 53143 | 0, // dsub2_then_ssub |
| 53144 | 0, // dsub2_then_ssub_hi |
| 53145 | 0, // psub1_then_psub |
| 53146 | 149, // qsub1_then_dsub_hi -> ZPR2Mul2_Lo |
| 53147 | 0, // qsub3_then_dsub_hi |
| 53148 | 0, // qsub2_then_dsub_hi |
| 53149 | 0, // x8sub_7_then_sub_32 |
| 53150 | 0, // x8sub_7_then_sub_32_hi |
| 53151 | 0, // x8sub_6_then_sub_32 |
| 53152 | 0, // x8sub_6_then_sub_32_hi |
| 53153 | 0, // x8sub_5_then_sub_32 |
| 53154 | 0, // x8sub_5_then_sub_32_hi |
| 53155 | 0, // x8sub_4_then_sub_32 |
| 53156 | 0, // x8sub_4_then_sub_32_hi |
| 53157 | 0, // x8sub_3_then_sub_32 |
| 53158 | 0, // x8sub_3_then_sub_32_hi |
| 53159 | 0, // x8sub_2_then_sub_32 |
| 53160 | 0, // x8sub_2_then_sub_32_hi |
| 53161 | 0, // x8sub_1_then_sub_32 |
| 53162 | 0, // x8sub_1_then_sub_32_hi |
| 53163 | 0, // subo64_then_sub_32 |
| 53164 | 0, // subo64_then_sub_32_hi |
| 53165 | 149, // zsub1_then_zsub_hi -> ZPR2Mul2_Lo |
| 53166 | 0, // zsub3_then_zsub_hi |
| 53167 | 0, // zsub2_then_zsub_hi |
| 53168 | 0, // dsub0_dsub1 |
| 53169 | 0, // dsub0_dsub1_dsub2 |
| 53170 | 0, // dsub1_dsub2 |
| 53171 | 0, // dsub1_dsub2_dsub3 |
| 53172 | 0, // dsub2_dsub3 |
| 53173 | 149, // dsub_dsub1 -> ZPR2Mul2_Lo |
| 53174 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53175 | 0, // dsub_dsub1_dsub2 |
| 53176 | 0, // qsub0_qsub1 |
| 53177 | 0, // qsub0_qsub1_qsub2 |
| 53178 | 0, // qsub1_qsub2 |
| 53179 | 0, // qsub1_qsub2_qsub3 |
| 53180 | 0, // qsub2_qsub3 |
| 53181 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53182 | 0, // x8sub_0_x8sub_1 |
| 53183 | 0, // x8sub_2_x8sub_3 |
| 53184 | 0, // x8sub_4_x8sub_5 |
| 53185 | 0, // x8sub_6_x8sub_7 |
| 53186 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53187 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53188 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53189 | 0, // sub_32_subo64_then_sub_32 |
| 53190 | 149, // zsub_qsub1 -> ZPR2Mul2_Lo |
| 53191 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53192 | 0, // zsub_qsub1_qsub2 |
| 53193 | 0, // zsub0_zsub1 |
| 53194 | 0, // zsub0_zsub1_zsub2 |
| 53195 | 0, // zsub1_zsub2 |
| 53196 | 0, // zsub1_zsub2_zsub3 |
| 53197 | 0, // zsub2_zsub3 |
| 53198 | 0, // zsub0_zsub2 |
| 53199 | 0, // zsub1_zsub3 |
| 53200 | }, |
| 53201 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53202 | 150, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53203 | 150, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53204 | 150, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53205 | 0, // dsub0 |
| 53206 | 150, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53207 | 0, // dsub2 |
| 53208 | 0, // dsub3 |
| 53209 | 150, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53210 | 150, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53211 | 150, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53212 | 0, // psub |
| 53213 | 0, // psub0 |
| 53214 | 0, // psub1 |
| 53215 | 0, // qsub0 |
| 53216 | 150, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53217 | 0, // qsub2 |
| 53218 | 0, // qsub3 |
| 53219 | 150, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53220 | 150, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53221 | 0, // sub_32 |
| 53222 | 0, // sub_32_hi |
| 53223 | 0, // sube32 |
| 53224 | 0, // sube64 |
| 53225 | 0, // subo32 |
| 53226 | 0, // subo64 |
| 53227 | 0, // x8sub_0 |
| 53228 | 0, // x8sub_1 |
| 53229 | 0, // x8sub_2 |
| 53230 | 0, // x8sub_3 |
| 53231 | 0, // x8sub_4 |
| 53232 | 0, // x8sub_5 |
| 53233 | 0, // x8sub_6 |
| 53234 | 0, // x8sub_7 |
| 53235 | 0, // zasubb |
| 53236 | 0, // zasubd0 |
| 53237 | 0, // zasubd1 |
| 53238 | 0, // zasubh0 |
| 53239 | 0, // zasubh1 |
| 53240 | 0, // zasubq0 |
| 53241 | 0, // zasubq1 |
| 53242 | 0, // zasubs0 |
| 53243 | 0, // zasubs1 |
| 53244 | 150, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53245 | 150, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53246 | 150, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53247 | 0, // zsub2 |
| 53248 | 0, // zsub3 |
| 53249 | 150, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53250 | 0, // zasubd1_then_zasubq0 |
| 53251 | 0, // zasubd1_then_zasubq1 |
| 53252 | 0, // zasubs1_then_zasubd0 |
| 53253 | 0, // zasubs1_then_zasubd1 |
| 53254 | 0, // zasubs1_then_zasubq0 |
| 53255 | 0, // zasubs1_then_zasubq1 |
| 53256 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53257 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53258 | 0, // zasubh1_then_zasubd0 |
| 53259 | 0, // zasubh1_then_zasubd1 |
| 53260 | 0, // zasubh1_then_zasubq0 |
| 53261 | 0, // zasubh1_then_zasubq1 |
| 53262 | 0, // zasubh1_then_zasubs0 |
| 53263 | 0, // zasubh1_then_zasubs1 |
| 53264 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53265 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53266 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53267 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53268 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53269 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53270 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53271 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53272 | 150, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53273 | 150, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53274 | 150, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53275 | 150, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53276 | 150, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53277 | 150, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53278 | 0, // dsub3_then_bsub |
| 53279 | 0, // dsub3_then_bsub_hi |
| 53280 | 0, // dsub3_then_hsub |
| 53281 | 0, // dsub3_then_hsub_hi |
| 53282 | 0, // dsub3_then_ssub |
| 53283 | 0, // dsub3_then_ssub_hi |
| 53284 | 0, // dsub2_then_bsub |
| 53285 | 0, // dsub2_then_bsub_hi |
| 53286 | 0, // dsub2_then_hsub |
| 53287 | 0, // dsub2_then_hsub_hi |
| 53288 | 0, // dsub2_then_ssub |
| 53289 | 0, // dsub2_then_ssub_hi |
| 53290 | 0, // psub1_then_psub |
| 53291 | 150, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53292 | 0, // qsub3_then_dsub_hi |
| 53293 | 0, // qsub2_then_dsub_hi |
| 53294 | 0, // x8sub_7_then_sub_32 |
| 53295 | 0, // x8sub_7_then_sub_32_hi |
| 53296 | 0, // x8sub_6_then_sub_32 |
| 53297 | 0, // x8sub_6_then_sub_32_hi |
| 53298 | 0, // x8sub_5_then_sub_32 |
| 53299 | 0, // x8sub_5_then_sub_32_hi |
| 53300 | 0, // x8sub_4_then_sub_32 |
| 53301 | 0, // x8sub_4_then_sub_32_hi |
| 53302 | 0, // x8sub_3_then_sub_32 |
| 53303 | 0, // x8sub_3_then_sub_32_hi |
| 53304 | 0, // x8sub_2_then_sub_32 |
| 53305 | 0, // x8sub_2_then_sub_32_hi |
| 53306 | 0, // x8sub_1_then_sub_32 |
| 53307 | 0, // x8sub_1_then_sub_32_hi |
| 53308 | 0, // subo64_then_sub_32 |
| 53309 | 0, // subo64_then_sub_32_hi |
| 53310 | 150, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 53311 | 0, // zsub3_then_zsub_hi |
| 53312 | 0, // zsub2_then_zsub_hi |
| 53313 | 0, // dsub0_dsub1 |
| 53314 | 0, // dsub0_dsub1_dsub2 |
| 53315 | 0, // dsub1_dsub2 |
| 53316 | 0, // dsub1_dsub2_dsub3 |
| 53317 | 0, // dsub2_dsub3 |
| 53318 | 173, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 53319 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53320 | 0, // dsub_dsub1_dsub2 |
| 53321 | 0, // qsub0_qsub1 |
| 53322 | 0, // qsub0_qsub1_qsub2 |
| 53323 | 0, // qsub1_qsub2 |
| 53324 | 0, // qsub1_qsub2_qsub3 |
| 53325 | 0, // qsub2_qsub3 |
| 53326 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53327 | 0, // x8sub_0_x8sub_1 |
| 53328 | 0, // x8sub_2_x8sub_3 |
| 53329 | 0, // x8sub_4_x8sub_5 |
| 53330 | 0, // x8sub_6_x8sub_7 |
| 53331 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53332 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53333 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53334 | 0, // sub_32_subo64_then_sub_32 |
| 53335 | 173, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 53336 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53337 | 0, // zsub_qsub1_qsub2 |
| 53338 | 0, // zsub0_zsub1 |
| 53339 | 0, // zsub0_zsub1_zsub2 |
| 53340 | 0, // zsub1_zsub2 |
| 53341 | 0, // zsub1_zsub2_zsub3 |
| 53342 | 0, // zsub2_zsub3 |
| 53343 | 0, // zsub0_zsub2 |
| 53344 | 0, // zsub1_zsub3 |
| 53345 | }, |
| 53346 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53347 | 151, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53348 | 151, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53349 | 151, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53350 | 0, // dsub0 |
| 53351 | 151, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53352 | 0, // dsub2 |
| 53353 | 0, // dsub3 |
| 53354 | 151, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53355 | 151, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53356 | 151, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53357 | 0, // psub |
| 53358 | 0, // psub0 |
| 53359 | 0, // psub1 |
| 53360 | 0, // qsub0 |
| 53361 | 151, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53362 | 0, // qsub2 |
| 53363 | 0, // qsub3 |
| 53364 | 151, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53365 | 151, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53366 | 0, // sub_32 |
| 53367 | 0, // sub_32_hi |
| 53368 | 0, // sube32 |
| 53369 | 0, // sube64 |
| 53370 | 0, // subo32 |
| 53371 | 0, // subo64 |
| 53372 | 0, // x8sub_0 |
| 53373 | 0, // x8sub_1 |
| 53374 | 0, // x8sub_2 |
| 53375 | 0, // x8sub_3 |
| 53376 | 0, // x8sub_4 |
| 53377 | 0, // x8sub_5 |
| 53378 | 0, // x8sub_6 |
| 53379 | 0, // x8sub_7 |
| 53380 | 0, // zasubb |
| 53381 | 0, // zasubd0 |
| 53382 | 0, // zasubd1 |
| 53383 | 0, // zasubh0 |
| 53384 | 0, // zasubh1 |
| 53385 | 0, // zasubq0 |
| 53386 | 0, // zasubq1 |
| 53387 | 0, // zasubs0 |
| 53388 | 0, // zasubs1 |
| 53389 | 151, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53390 | 151, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53391 | 151, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53392 | 0, // zsub2 |
| 53393 | 0, // zsub3 |
| 53394 | 151, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53395 | 0, // zasubd1_then_zasubq0 |
| 53396 | 0, // zasubd1_then_zasubq1 |
| 53397 | 0, // zasubs1_then_zasubd0 |
| 53398 | 0, // zasubs1_then_zasubd1 |
| 53399 | 0, // zasubs1_then_zasubq0 |
| 53400 | 0, // zasubs1_then_zasubq1 |
| 53401 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53402 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53403 | 0, // zasubh1_then_zasubd0 |
| 53404 | 0, // zasubh1_then_zasubd1 |
| 53405 | 0, // zasubh1_then_zasubq0 |
| 53406 | 0, // zasubh1_then_zasubq1 |
| 53407 | 0, // zasubh1_then_zasubs0 |
| 53408 | 0, // zasubh1_then_zasubs1 |
| 53409 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53410 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53411 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53412 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53413 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53414 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53415 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53416 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53417 | 151, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53418 | 151, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53419 | 151, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53420 | 151, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53421 | 151, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53422 | 151, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53423 | 0, // dsub3_then_bsub |
| 53424 | 0, // dsub3_then_bsub_hi |
| 53425 | 0, // dsub3_then_hsub |
| 53426 | 0, // dsub3_then_hsub_hi |
| 53427 | 0, // dsub3_then_ssub |
| 53428 | 0, // dsub3_then_ssub_hi |
| 53429 | 0, // dsub2_then_bsub |
| 53430 | 0, // dsub2_then_bsub_hi |
| 53431 | 0, // dsub2_then_hsub |
| 53432 | 0, // dsub2_then_hsub_hi |
| 53433 | 0, // dsub2_then_ssub |
| 53434 | 0, // dsub2_then_ssub_hi |
| 53435 | 0, // psub1_then_psub |
| 53436 | 151, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53437 | 0, // qsub3_then_dsub_hi |
| 53438 | 0, // qsub2_then_dsub_hi |
| 53439 | 0, // x8sub_7_then_sub_32 |
| 53440 | 0, // x8sub_7_then_sub_32_hi |
| 53441 | 0, // x8sub_6_then_sub_32 |
| 53442 | 0, // x8sub_6_then_sub_32_hi |
| 53443 | 0, // x8sub_5_then_sub_32 |
| 53444 | 0, // x8sub_5_then_sub_32_hi |
| 53445 | 0, // x8sub_4_then_sub_32 |
| 53446 | 0, // x8sub_4_then_sub_32_hi |
| 53447 | 0, // x8sub_3_then_sub_32 |
| 53448 | 0, // x8sub_3_then_sub_32_hi |
| 53449 | 0, // x8sub_2_then_sub_32 |
| 53450 | 0, // x8sub_2_then_sub_32_hi |
| 53451 | 0, // x8sub_1_then_sub_32 |
| 53452 | 0, // x8sub_1_then_sub_32_hi |
| 53453 | 0, // subo64_then_sub_32 |
| 53454 | 0, // subo64_then_sub_32_hi |
| 53455 | 151, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 53456 | 0, // zsub3_then_zsub_hi |
| 53457 | 0, // zsub2_then_zsub_hi |
| 53458 | 0, // dsub0_dsub1 |
| 53459 | 0, // dsub0_dsub1_dsub2 |
| 53460 | 0, // dsub1_dsub2 |
| 53461 | 0, // dsub1_dsub2_dsub3 |
| 53462 | 0, // dsub2_dsub3 |
| 53463 | 172, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 53464 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53465 | 0, // dsub_dsub1_dsub2 |
| 53466 | 0, // qsub0_qsub1 |
| 53467 | 0, // qsub0_qsub1_qsub2 |
| 53468 | 0, // qsub1_qsub2 |
| 53469 | 0, // qsub1_qsub2_qsub3 |
| 53470 | 0, // qsub2_qsub3 |
| 53471 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53472 | 0, // x8sub_0_x8sub_1 |
| 53473 | 0, // x8sub_2_x8sub_3 |
| 53474 | 0, // x8sub_4_x8sub_5 |
| 53475 | 0, // x8sub_6_x8sub_7 |
| 53476 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53477 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53478 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53479 | 0, // sub_32_subo64_then_sub_32 |
| 53480 | 172, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 53481 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53482 | 0, // zsub_qsub1_qsub2 |
| 53483 | 0, // zsub0_zsub1 |
| 53484 | 0, // zsub0_zsub1_zsub2 |
| 53485 | 0, // zsub1_zsub2 |
| 53486 | 0, // zsub1_zsub2_zsub3 |
| 53487 | 0, // zsub2_zsub3 |
| 53488 | 0, // zsub0_zsub2 |
| 53489 | 0, // zsub1_zsub3 |
| 53490 | }, |
| 53491 | { // ZPR2Strided_with_dsub_in_FPR64_lo |
| 53492 | 152, // bsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53493 | 152, // bsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53494 | 152, // dsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53495 | 0, // dsub0 |
| 53496 | 152, // dsub1 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53497 | 0, // dsub2 |
| 53498 | 0, // dsub3 |
| 53499 | 152, // dsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53500 | 152, // hsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53501 | 152, // hsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53502 | 0, // psub |
| 53503 | 0, // psub0 |
| 53504 | 0, // psub1 |
| 53505 | 0, // qsub0 |
| 53506 | 152, // qsub1 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53507 | 0, // qsub2 |
| 53508 | 0, // qsub3 |
| 53509 | 152, // ssub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53510 | 152, // ssub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53511 | 0, // sub_32 |
| 53512 | 0, // sub_32_hi |
| 53513 | 0, // sube32 |
| 53514 | 0, // sube64 |
| 53515 | 0, // subo32 |
| 53516 | 0, // subo64 |
| 53517 | 0, // x8sub_0 |
| 53518 | 0, // x8sub_1 |
| 53519 | 0, // x8sub_2 |
| 53520 | 0, // x8sub_3 |
| 53521 | 0, // x8sub_4 |
| 53522 | 0, // x8sub_5 |
| 53523 | 0, // x8sub_6 |
| 53524 | 0, // x8sub_7 |
| 53525 | 0, // zasubb |
| 53526 | 0, // zasubd0 |
| 53527 | 0, // zasubd1 |
| 53528 | 0, // zasubh0 |
| 53529 | 0, // zasubh1 |
| 53530 | 0, // zasubq0 |
| 53531 | 0, // zasubq1 |
| 53532 | 0, // zasubs0 |
| 53533 | 0, // zasubs1 |
| 53534 | 152, // zsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53535 | 152, // zsub0 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53536 | 152, // zsub1 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53537 | 0, // zsub2 |
| 53538 | 0, // zsub3 |
| 53539 | 152, // zsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53540 | 0, // zasubd1_then_zasubq0 |
| 53541 | 0, // zasubd1_then_zasubq1 |
| 53542 | 0, // zasubs1_then_zasubd0 |
| 53543 | 0, // zasubs1_then_zasubd1 |
| 53544 | 0, // zasubs1_then_zasubq0 |
| 53545 | 0, // zasubs1_then_zasubq1 |
| 53546 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53547 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53548 | 0, // zasubh1_then_zasubd0 |
| 53549 | 0, // zasubh1_then_zasubd1 |
| 53550 | 0, // zasubh1_then_zasubq0 |
| 53551 | 0, // zasubh1_then_zasubq1 |
| 53552 | 0, // zasubh1_then_zasubs0 |
| 53553 | 0, // zasubh1_then_zasubs1 |
| 53554 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53555 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53556 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53557 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53558 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53559 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53560 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53561 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53562 | 152, // dsub1_then_bsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53563 | 152, // dsub1_then_bsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53564 | 152, // dsub1_then_hsub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53565 | 152, // dsub1_then_hsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53566 | 152, // dsub1_then_ssub -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53567 | 152, // dsub1_then_ssub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53568 | 0, // dsub3_then_bsub |
| 53569 | 0, // dsub3_then_bsub_hi |
| 53570 | 0, // dsub3_then_hsub |
| 53571 | 0, // dsub3_then_hsub_hi |
| 53572 | 0, // dsub3_then_ssub |
| 53573 | 0, // dsub3_then_ssub_hi |
| 53574 | 0, // dsub2_then_bsub |
| 53575 | 0, // dsub2_then_bsub_hi |
| 53576 | 0, // dsub2_then_hsub |
| 53577 | 0, // dsub2_then_hsub_hi |
| 53578 | 0, // dsub2_then_ssub |
| 53579 | 0, // dsub2_then_ssub_hi |
| 53580 | 0, // psub1_then_psub |
| 53581 | 152, // qsub1_then_dsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53582 | 0, // qsub3_then_dsub_hi |
| 53583 | 0, // qsub2_then_dsub_hi |
| 53584 | 0, // x8sub_7_then_sub_32 |
| 53585 | 0, // x8sub_7_then_sub_32_hi |
| 53586 | 0, // x8sub_6_then_sub_32 |
| 53587 | 0, // x8sub_6_then_sub_32_hi |
| 53588 | 0, // x8sub_5_then_sub_32 |
| 53589 | 0, // x8sub_5_then_sub_32_hi |
| 53590 | 0, // x8sub_4_then_sub_32 |
| 53591 | 0, // x8sub_4_then_sub_32_hi |
| 53592 | 0, // x8sub_3_then_sub_32 |
| 53593 | 0, // x8sub_3_then_sub_32_hi |
| 53594 | 0, // x8sub_2_then_sub_32 |
| 53595 | 0, // x8sub_2_then_sub_32_hi |
| 53596 | 0, // x8sub_1_then_sub_32 |
| 53597 | 0, // x8sub_1_then_sub_32_hi |
| 53598 | 0, // subo64_then_sub_32 |
| 53599 | 0, // subo64_then_sub_32_hi |
| 53600 | 152, // zsub1_then_zsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 53601 | 0, // zsub3_then_zsub_hi |
| 53602 | 0, // zsub2_then_zsub_hi |
| 53603 | 0, // dsub0_dsub1 |
| 53604 | 0, // dsub0_dsub1_dsub2 |
| 53605 | 0, // dsub1_dsub2 |
| 53606 | 0, // dsub1_dsub2_dsub3 |
| 53607 | 0, // dsub2_dsub3 |
| 53608 | 0, // dsub_dsub1 |
| 53609 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53610 | 0, // dsub_dsub1_dsub2 |
| 53611 | 0, // qsub0_qsub1 |
| 53612 | 0, // qsub0_qsub1_qsub2 |
| 53613 | 0, // qsub1_qsub2 |
| 53614 | 0, // qsub1_qsub2_qsub3 |
| 53615 | 0, // qsub2_qsub3 |
| 53616 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53617 | 0, // x8sub_0_x8sub_1 |
| 53618 | 0, // x8sub_2_x8sub_3 |
| 53619 | 0, // x8sub_4_x8sub_5 |
| 53620 | 0, // x8sub_6_x8sub_7 |
| 53621 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53622 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53623 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53624 | 0, // sub_32_subo64_then_sub_32 |
| 53625 | 0, // zsub_qsub1 |
| 53626 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53627 | 0, // zsub_qsub1_qsub2 |
| 53628 | 0, // zsub0_zsub1 |
| 53629 | 0, // zsub0_zsub1_zsub2 |
| 53630 | 0, // zsub1_zsub2 |
| 53631 | 0, // zsub1_zsub2_zsub3 |
| 53632 | 0, // zsub2_zsub3 |
| 53633 | 0, // zsub0_zsub2 |
| 53634 | 0, // zsub1_zsub3 |
| 53635 | }, |
| 53636 | { // ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53637 | 153, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53638 | 153, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53639 | 153, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53640 | 0, // dsub0 |
| 53641 | 153, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53642 | 0, // dsub2 |
| 53643 | 0, // dsub3 |
| 53644 | 153, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53645 | 153, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53646 | 153, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53647 | 0, // psub |
| 53648 | 0, // psub0 |
| 53649 | 0, // psub1 |
| 53650 | 0, // qsub0 |
| 53651 | 153, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53652 | 0, // qsub2 |
| 53653 | 0, // qsub3 |
| 53654 | 153, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53655 | 153, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53656 | 0, // sub_32 |
| 53657 | 0, // sub_32_hi |
| 53658 | 0, // sube32 |
| 53659 | 0, // sube64 |
| 53660 | 0, // subo32 |
| 53661 | 0, // subo64 |
| 53662 | 0, // x8sub_0 |
| 53663 | 0, // x8sub_1 |
| 53664 | 0, // x8sub_2 |
| 53665 | 0, // x8sub_3 |
| 53666 | 0, // x8sub_4 |
| 53667 | 0, // x8sub_5 |
| 53668 | 0, // x8sub_6 |
| 53669 | 0, // x8sub_7 |
| 53670 | 0, // zasubb |
| 53671 | 0, // zasubd0 |
| 53672 | 0, // zasubd1 |
| 53673 | 0, // zasubh0 |
| 53674 | 0, // zasubh1 |
| 53675 | 0, // zasubq0 |
| 53676 | 0, // zasubq1 |
| 53677 | 0, // zasubs0 |
| 53678 | 0, // zasubs1 |
| 53679 | 153, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53680 | 153, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53681 | 153, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53682 | 0, // zsub2 |
| 53683 | 0, // zsub3 |
| 53684 | 153, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53685 | 0, // zasubd1_then_zasubq0 |
| 53686 | 0, // zasubd1_then_zasubq1 |
| 53687 | 0, // zasubs1_then_zasubd0 |
| 53688 | 0, // zasubs1_then_zasubd1 |
| 53689 | 0, // zasubs1_then_zasubq0 |
| 53690 | 0, // zasubs1_then_zasubq1 |
| 53691 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53692 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53693 | 0, // zasubh1_then_zasubd0 |
| 53694 | 0, // zasubh1_then_zasubd1 |
| 53695 | 0, // zasubh1_then_zasubq0 |
| 53696 | 0, // zasubh1_then_zasubq1 |
| 53697 | 0, // zasubh1_then_zasubs0 |
| 53698 | 0, // zasubh1_then_zasubs1 |
| 53699 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53700 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53701 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53702 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53703 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53704 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53705 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53706 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53707 | 153, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53708 | 153, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53709 | 153, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53710 | 153, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53711 | 153, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53712 | 153, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53713 | 0, // dsub3_then_bsub |
| 53714 | 0, // dsub3_then_bsub_hi |
| 53715 | 0, // dsub3_then_hsub |
| 53716 | 0, // dsub3_then_hsub_hi |
| 53717 | 0, // dsub3_then_ssub |
| 53718 | 0, // dsub3_then_ssub_hi |
| 53719 | 0, // dsub2_then_bsub |
| 53720 | 0, // dsub2_then_bsub_hi |
| 53721 | 0, // dsub2_then_hsub |
| 53722 | 0, // dsub2_then_hsub_hi |
| 53723 | 0, // dsub2_then_ssub |
| 53724 | 0, // dsub2_then_ssub_hi |
| 53725 | 0, // psub1_then_psub |
| 53726 | 153, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53727 | 0, // qsub3_then_dsub_hi |
| 53728 | 0, // qsub2_then_dsub_hi |
| 53729 | 0, // x8sub_7_then_sub_32 |
| 53730 | 0, // x8sub_7_then_sub_32_hi |
| 53731 | 0, // x8sub_6_then_sub_32 |
| 53732 | 0, // x8sub_6_then_sub_32_hi |
| 53733 | 0, // x8sub_5_then_sub_32 |
| 53734 | 0, // x8sub_5_then_sub_32_hi |
| 53735 | 0, // x8sub_4_then_sub_32 |
| 53736 | 0, // x8sub_4_then_sub_32_hi |
| 53737 | 0, // x8sub_3_then_sub_32 |
| 53738 | 0, // x8sub_3_then_sub_32_hi |
| 53739 | 0, // x8sub_2_then_sub_32 |
| 53740 | 0, // x8sub_2_then_sub_32_hi |
| 53741 | 0, // x8sub_1_then_sub_32 |
| 53742 | 0, // x8sub_1_then_sub_32_hi |
| 53743 | 0, // subo64_then_sub_32 |
| 53744 | 0, // subo64_then_sub_32_hi |
| 53745 | 153, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 53746 | 0, // zsub3_then_zsub_hi |
| 53747 | 0, // zsub2_then_zsub_hi |
| 53748 | 0, // dsub0_dsub1 |
| 53749 | 0, // dsub0_dsub1_dsub2 |
| 53750 | 0, // dsub1_dsub2 |
| 53751 | 0, // dsub1_dsub2_dsub3 |
| 53752 | 0, // dsub2_dsub3 |
| 53753 | 0, // dsub_dsub1 |
| 53754 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53755 | 0, // dsub_dsub1_dsub2 |
| 53756 | 0, // qsub0_qsub1 |
| 53757 | 0, // qsub0_qsub1_qsub2 |
| 53758 | 0, // qsub1_qsub2 |
| 53759 | 0, // qsub1_qsub2_qsub3 |
| 53760 | 0, // qsub2_qsub3 |
| 53761 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53762 | 0, // x8sub_0_x8sub_1 |
| 53763 | 0, // x8sub_2_x8sub_3 |
| 53764 | 0, // x8sub_4_x8sub_5 |
| 53765 | 0, // x8sub_6_x8sub_7 |
| 53766 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53767 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53768 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53769 | 0, // sub_32_subo64_then_sub_32 |
| 53770 | 0, // zsub_qsub1 |
| 53771 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53772 | 0, // zsub_qsub1_qsub2 |
| 53773 | 0, // zsub0_zsub1 |
| 53774 | 0, // zsub0_zsub1_zsub2 |
| 53775 | 0, // zsub1_zsub2 |
| 53776 | 0, // zsub1_zsub2_zsub3 |
| 53777 | 0, // zsub2_zsub3 |
| 53778 | 0, // zsub0_zsub2 |
| 53779 | 0, // zsub1_zsub3 |
| 53780 | }, |
| 53781 | { // ZPR2_with_qsub1_in_FPR128_0to7 |
| 53782 | 154, // bsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53783 | 154, // bsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53784 | 154, // dsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53785 | 0, // dsub0 |
| 53786 | 154, // dsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53787 | 0, // dsub2 |
| 53788 | 0, // dsub3 |
| 53789 | 154, // dsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53790 | 154, // hsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53791 | 154, // hsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53792 | 0, // psub |
| 53793 | 0, // psub0 |
| 53794 | 0, // psub1 |
| 53795 | 0, // qsub0 |
| 53796 | 154, // qsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53797 | 0, // qsub2 |
| 53798 | 0, // qsub3 |
| 53799 | 154, // ssub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53800 | 154, // ssub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53801 | 0, // sub_32 |
| 53802 | 0, // sub_32_hi |
| 53803 | 0, // sube32 |
| 53804 | 0, // sube64 |
| 53805 | 0, // subo32 |
| 53806 | 0, // subo64 |
| 53807 | 0, // x8sub_0 |
| 53808 | 0, // x8sub_1 |
| 53809 | 0, // x8sub_2 |
| 53810 | 0, // x8sub_3 |
| 53811 | 0, // x8sub_4 |
| 53812 | 0, // x8sub_5 |
| 53813 | 0, // x8sub_6 |
| 53814 | 0, // x8sub_7 |
| 53815 | 0, // zasubb |
| 53816 | 0, // zasubd0 |
| 53817 | 0, // zasubd1 |
| 53818 | 0, // zasubh0 |
| 53819 | 0, // zasubh1 |
| 53820 | 0, // zasubq0 |
| 53821 | 0, // zasubq1 |
| 53822 | 0, // zasubs0 |
| 53823 | 0, // zasubs1 |
| 53824 | 154, // zsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53825 | 154, // zsub0 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53826 | 154, // zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53827 | 0, // zsub2 |
| 53828 | 0, // zsub3 |
| 53829 | 154, // zsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53830 | 0, // zasubd1_then_zasubq0 |
| 53831 | 0, // zasubd1_then_zasubq1 |
| 53832 | 0, // zasubs1_then_zasubd0 |
| 53833 | 0, // zasubs1_then_zasubd1 |
| 53834 | 0, // zasubs1_then_zasubq0 |
| 53835 | 0, // zasubs1_then_zasubq1 |
| 53836 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53837 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53838 | 0, // zasubh1_then_zasubd0 |
| 53839 | 0, // zasubh1_then_zasubd1 |
| 53840 | 0, // zasubh1_then_zasubq0 |
| 53841 | 0, // zasubh1_then_zasubq1 |
| 53842 | 0, // zasubh1_then_zasubs0 |
| 53843 | 0, // zasubh1_then_zasubs1 |
| 53844 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53845 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53846 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53847 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53848 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53849 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53850 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53851 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53852 | 154, // dsub1_then_bsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53853 | 154, // dsub1_then_bsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53854 | 154, // dsub1_then_hsub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53855 | 154, // dsub1_then_hsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53856 | 154, // dsub1_then_ssub -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53857 | 154, // dsub1_then_ssub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53858 | 0, // dsub3_then_bsub |
| 53859 | 0, // dsub3_then_bsub_hi |
| 53860 | 0, // dsub3_then_hsub |
| 53861 | 0, // dsub3_then_hsub_hi |
| 53862 | 0, // dsub3_then_ssub |
| 53863 | 0, // dsub3_then_ssub_hi |
| 53864 | 0, // dsub2_then_bsub |
| 53865 | 0, // dsub2_then_bsub_hi |
| 53866 | 0, // dsub2_then_hsub |
| 53867 | 0, // dsub2_then_hsub_hi |
| 53868 | 0, // dsub2_then_ssub |
| 53869 | 0, // dsub2_then_ssub_hi |
| 53870 | 0, // psub1_then_psub |
| 53871 | 154, // qsub1_then_dsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53872 | 0, // qsub3_then_dsub_hi |
| 53873 | 0, // qsub2_then_dsub_hi |
| 53874 | 0, // x8sub_7_then_sub_32 |
| 53875 | 0, // x8sub_7_then_sub_32_hi |
| 53876 | 0, // x8sub_6_then_sub_32 |
| 53877 | 0, // x8sub_6_then_sub_32_hi |
| 53878 | 0, // x8sub_5_then_sub_32 |
| 53879 | 0, // x8sub_5_then_sub_32_hi |
| 53880 | 0, // x8sub_4_then_sub_32 |
| 53881 | 0, // x8sub_4_then_sub_32_hi |
| 53882 | 0, // x8sub_3_then_sub_32 |
| 53883 | 0, // x8sub_3_then_sub_32_hi |
| 53884 | 0, // x8sub_2_then_sub_32 |
| 53885 | 0, // x8sub_2_then_sub_32_hi |
| 53886 | 0, // x8sub_1_then_sub_32 |
| 53887 | 0, // x8sub_1_then_sub_32_hi |
| 53888 | 0, // subo64_then_sub_32 |
| 53889 | 0, // subo64_then_sub_32_hi |
| 53890 | 154, // zsub1_then_zsub_hi -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53891 | 0, // zsub3_then_zsub_hi |
| 53892 | 0, // zsub2_then_zsub_hi |
| 53893 | 0, // dsub0_dsub1 |
| 53894 | 0, // dsub0_dsub1_dsub2 |
| 53895 | 0, // dsub1_dsub2 |
| 53896 | 0, // dsub1_dsub2_dsub3 |
| 53897 | 0, // dsub2_dsub3 |
| 53898 | 154, // dsub_dsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53899 | 0, // dsub_dsub1_dsub2_dsub3 |
| 53900 | 0, // dsub_dsub1_dsub2 |
| 53901 | 0, // qsub0_qsub1 |
| 53902 | 0, // qsub0_qsub1_qsub2 |
| 53903 | 0, // qsub1_qsub2 |
| 53904 | 0, // qsub1_qsub2_qsub3 |
| 53905 | 0, // qsub2_qsub3 |
| 53906 | 0, // sub_32_x8sub_1_then_sub_32 |
| 53907 | 0, // x8sub_0_x8sub_1 |
| 53908 | 0, // x8sub_2_x8sub_3 |
| 53909 | 0, // x8sub_4_x8sub_5 |
| 53910 | 0, // x8sub_6_x8sub_7 |
| 53911 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 53912 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 53913 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 53914 | 0, // sub_32_subo64_then_sub_32 |
| 53915 | 154, // zsub_qsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 53916 | 0, // zsub_qsub1_qsub2_qsub3 |
| 53917 | 0, // zsub_qsub1_qsub2 |
| 53918 | 0, // zsub0_zsub1 |
| 53919 | 0, // zsub0_zsub1_zsub2 |
| 53920 | 0, // zsub1_zsub2 |
| 53921 | 0, // zsub1_zsub2_zsub3 |
| 53922 | 0, // zsub2_zsub3 |
| 53923 | 0, // zsub0_zsub2 |
| 53924 | 0, // zsub1_zsub3 |
| 53925 | }, |
| 53926 | { // ZPR2_with_zsub0_in_ZPRMul4 |
| 53927 | 155, // bsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53928 | 155, // bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53929 | 155, // dsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53930 | 0, // dsub0 |
| 53931 | 155, // dsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53932 | 0, // dsub2 |
| 53933 | 0, // dsub3 |
| 53934 | 155, // dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53935 | 155, // hsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53936 | 155, // hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53937 | 0, // psub |
| 53938 | 0, // psub0 |
| 53939 | 0, // psub1 |
| 53940 | 0, // qsub0 |
| 53941 | 155, // qsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53942 | 0, // qsub2 |
| 53943 | 0, // qsub3 |
| 53944 | 155, // ssub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53945 | 155, // ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53946 | 0, // sub_32 |
| 53947 | 0, // sub_32_hi |
| 53948 | 0, // sube32 |
| 53949 | 0, // sube64 |
| 53950 | 0, // subo32 |
| 53951 | 0, // subo64 |
| 53952 | 0, // x8sub_0 |
| 53953 | 0, // x8sub_1 |
| 53954 | 0, // x8sub_2 |
| 53955 | 0, // x8sub_3 |
| 53956 | 0, // x8sub_4 |
| 53957 | 0, // x8sub_5 |
| 53958 | 0, // x8sub_6 |
| 53959 | 0, // x8sub_7 |
| 53960 | 0, // zasubb |
| 53961 | 0, // zasubd0 |
| 53962 | 0, // zasubd1 |
| 53963 | 0, // zasubh0 |
| 53964 | 0, // zasubh1 |
| 53965 | 0, // zasubq0 |
| 53966 | 0, // zasubq1 |
| 53967 | 0, // zasubs0 |
| 53968 | 0, // zasubs1 |
| 53969 | 155, // zsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53970 | 155, // zsub0 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53971 | 155, // zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53972 | 0, // zsub2 |
| 53973 | 0, // zsub3 |
| 53974 | 155, // zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53975 | 0, // zasubd1_then_zasubq0 |
| 53976 | 0, // zasubd1_then_zasubq1 |
| 53977 | 0, // zasubs1_then_zasubd0 |
| 53978 | 0, // zasubs1_then_zasubd1 |
| 53979 | 0, // zasubs1_then_zasubq0 |
| 53980 | 0, // zasubs1_then_zasubq1 |
| 53981 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 53982 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 53983 | 0, // zasubh1_then_zasubd0 |
| 53984 | 0, // zasubh1_then_zasubd1 |
| 53985 | 0, // zasubh1_then_zasubq0 |
| 53986 | 0, // zasubh1_then_zasubq1 |
| 53987 | 0, // zasubh1_then_zasubs0 |
| 53988 | 0, // zasubh1_then_zasubs1 |
| 53989 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 53990 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 53991 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 53992 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 53993 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 53994 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 53995 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 53996 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 53997 | 155, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53998 | 155, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 53999 | 155, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54000 | 155, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54001 | 155, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54002 | 155, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54003 | 0, // dsub3_then_bsub |
| 54004 | 0, // dsub3_then_bsub_hi |
| 54005 | 0, // dsub3_then_hsub |
| 54006 | 0, // dsub3_then_hsub_hi |
| 54007 | 0, // dsub3_then_ssub |
| 54008 | 0, // dsub3_then_ssub_hi |
| 54009 | 0, // dsub2_then_bsub |
| 54010 | 0, // dsub2_then_bsub_hi |
| 54011 | 0, // dsub2_then_hsub |
| 54012 | 0, // dsub2_then_hsub_hi |
| 54013 | 0, // dsub2_then_ssub |
| 54014 | 0, // dsub2_then_ssub_hi |
| 54015 | 0, // psub1_then_psub |
| 54016 | 155, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54017 | 0, // qsub3_then_dsub_hi |
| 54018 | 0, // qsub2_then_dsub_hi |
| 54019 | 0, // x8sub_7_then_sub_32 |
| 54020 | 0, // x8sub_7_then_sub_32_hi |
| 54021 | 0, // x8sub_6_then_sub_32 |
| 54022 | 0, // x8sub_6_then_sub_32_hi |
| 54023 | 0, // x8sub_5_then_sub_32 |
| 54024 | 0, // x8sub_5_then_sub_32_hi |
| 54025 | 0, // x8sub_4_then_sub_32 |
| 54026 | 0, // x8sub_4_then_sub_32_hi |
| 54027 | 0, // x8sub_3_then_sub_32 |
| 54028 | 0, // x8sub_3_then_sub_32_hi |
| 54029 | 0, // x8sub_2_then_sub_32 |
| 54030 | 0, // x8sub_2_then_sub_32_hi |
| 54031 | 0, // x8sub_1_then_sub_32 |
| 54032 | 0, // x8sub_1_then_sub_32_hi |
| 54033 | 0, // subo64_then_sub_32 |
| 54034 | 0, // subo64_then_sub_32_hi |
| 54035 | 155, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54036 | 0, // zsub3_then_zsub_hi |
| 54037 | 0, // zsub2_then_zsub_hi |
| 54038 | 0, // dsub0_dsub1 |
| 54039 | 0, // dsub0_dsub1_dsub2 |
| 54040 | 0, // dsub1_dsub2 |
| 54041 | 0, // dsub1_dsub2_dsub3 |
| 54042 | 0, // dsub2_dsub3 |
| 54043 | 155, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54044 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54045 | 0, // dsub_dsub1_dsub2 |
| 54046 | 0, // qsub0_qsub1 |
| 54047 | 0, // qsub0_qsub1_qsub2 |
| 54048 | 0, // qsub1_qsub2 |
| 54049 | 0, // qsub1_qsub2_qsub3 |
| 54050 | 0, // qsub2_qsub3 |
| 54051 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54052 | 0, // x8sub_0_x8sub_1 |
| 54053 | 0, // x8sub_2_x8sub_3 |
| 54054 | 0, // x8sub_4_x8sub_5 |
| 54055 | 0, // x8sub_6_x8sub_7 |
| 54056 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54057 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54058 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54059 | 0, // sub_32_subo64_then_sub_32 |
| 54060 | 155, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 54061 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54062 | 0, // zsub_qsub1_qsub2 |
| 54063 | 0, // zsub0_zsub1 |
| 54064 | 0, // zsub0_zsub1_zsub2 |
| 54065 | 0, // zsub1_zsub2 |
| 54066 | 0, // zsub1_zsub2_zsub3 |
| 54067 | 0, // zsub2_zsub3 |
| 54068 | 0, // zsub0_zsub2 |
| 54069 | 0, // zsub1_zsub3 |
| 54070 | }, |
| 54071 | { // ZPR2_with_zsub0_in_ZPR_K |
| 54072 | 156, // bsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54073 | 156, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54074 | 156, // dsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54075 | 0, // dsub0 |
| 54076 | 156, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 54077 | 0, // dsub2 |
| 54078 | 0, // dsub3 |
| 54079 | 156, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54080 | 156, // hsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54081 | 156, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54082 | 0, // psub |
| 54083 | 0, // psub0 |
| 54084 | 0, // psub1 |
| 54085 | 0, // qsub0 |
| 54086 | 156, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 54087 | 0, // qsub2 |
| 54088 | 0, // qsub3 |
| 54089 | 156, // ssub -> ZPR2_with_zsub0_in_ZPR_K |
| 54090 | 156, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54091 | 0, // sub_32 |
| 54092 | 0, // sub_32_hi |
| 54093 | 0, // sube32 |
| 54094 | 0, // sube64 |
| 54095 | 0, // subo32 |
| 54096 | 0, // subo64 |
| 54097 | 0, // x8sub_0 |
| 54098 | 0, // x8sub_1 |
| 54099 | 0, // x8sub_2 |
| 54100 | 0, // x8sub_3 |
| 54101 | 0, // x8sub_4 |
| 54102 | 0, // x8sub_5 |
| 54103 | 0, // x8sub_6 |
| 54104 | 0, // x8sub_7 |
| 54105 | 0, // zasubb |
| 54106 | 0, // zasubd0 |
| 54107 | 0, // zasubd1 |
| 54108 | 0, // zasubh0 |
| 54109 | 0, // zasubh1 |
| 54110 | 0, // zasubq0 |
| 54111 | 0, // zasubq1 |
| 54112 | 0, // zasubs0 |
| 54113 | 0, // zasubs1 |
| 54114 | 156, // zsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54115 | 156, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K |
| 54116 | 156, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 54117 | 0, // zsub2 |
| 54118 | 0, // zsub3 |
| 54119 | 156, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54120 | 0, // zasubd1_then_zasubq0 |
| 54121 | 0, // zasubd1_then_zasubq1 |
| 54122 | 0, // zasubs1_then_zasubd0 |
| 54123 | 0, // zasubs1_then_zasubd1 |
| 54124 | 0, // zasubs1_then_zasubq0 |
| 54125 | 0, // zasubs1_then_zasubq1 |
| 54126 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54127 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54128 | 0, // zasubh1_then_zasubd0 |
| 54129 | 0, // zasubh1_then_zasubd1 |
| 54130 | 0, // zasubh1_then_zasubq0 |
| 54131 | 0, // zasubh1_then_zasubq1 |
| 54132 | 0, // zasubh1_then_zasubs0 |
| 54133 | 0, // zasubh1_then_zasubs1 |
| 54134 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54135 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54136 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54137 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54138 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54139 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54140 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54141 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54142 | 156, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54143 | 156, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54144 | 156, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K |
| 54145 | 156, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54146 | 156, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K |
| 54147 | 156, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54148 | 0, // dsub3_then_bsub |
| 54149 | 0, // dsub3_then_bsub_hi |
| 54150 | 0, // dsub3_then_hsub |
| 54151 | 0, // dsub3_then_hsub_hi |
| 54152 | 0, // dsub3_then_ssub |
| 54153 | 0, // dsub3_then_ssub_hi |
| 54154 | 0, // dsub2_then_bsub |
| 54155 | 0, // dsub2_then_bsub_hi |
| 54156 | 0, // dsub2_then_hsub |
| 54157 | 0, // dsub2_then_hsub_hi |
| 54158 | 0, // dsub2_then_ssub |
| 54159 | 0, // dsub2_then_ssub_hi |
| 54160 | 0, // psub1_then_psub |
| 54161 | 156, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54162 | 0, // qsub3_then_dsub_hi |
| 54163 | 0, // qsub2_then_dsub_hi |
| 54164 | 0, // x8sub_7_then_sub_32 |
| 54165 | 0, // x8sub_7_then_sub_32_hi |
| 54166 | 0, // x8sub_6_then_sub_32 |
| 54167 | 0, // x8sub_6_then_sub_32_hi |
| 54168 | 0, // x8sub_5_then_sub_32 |
| 54169 | 0, // x8sub_5_then_sub_32_hi |
| 54170 | 0, // x8sub_4_then_sub_32 |
| 54171 | 0, // x8sub_4_then_sub_32_hi |
| 54172 | 0, // x8sub_3_then_sub_32 |
| 54173 | 0, // x8sub_3_then_sub_32_hi |
| 54174 | 0, // x8sub_2_then_sub_32 |
| 54175 | 0, // x8sub_2_then_sub_32_hi |
| 54176 | 0, // x8sub_1_then_sub_32 |
| 54177 | 0, // x8sub_1_then_sub_32_hi |
| 54178 | 0, // subo64_then_sub_32 |
| 54179 | 0, // subo64_then_sub_32_hi |
| 54180 | 156, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K |
| 54181 | 0, // zsub3_then_zsub_hi |
| 54182 | 0, // zsub2_then_zsub_hi |
| 54183 | 0, // dsub0_dsub1 |
| 54184 | 0, // dsub0_dsub1_dsub2 |
| 54185 | 0, // dsub1_dsub2 |
| 54186 | 0, // dsub1_dsub2_dsub3 |
| 54187 | 0, // dsub2_dsub3 |
| 54188 | 156, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 54189 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54190 | 0, // dsub_dsub1_dsub2 |
| 54191 | 0, // qsub0_qsub1 |
| 54192 | 0, // qsub0_qsub1_qsub2 |
| 54193 | 0, // qsub1_qsub2 |
| 54194 | 0, // qsub1_qsub2_qsub3 |
| 54195 | 0, // qsub2_qsub3 |
| 54196 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54197 | 0, // x8sub_0_x8sub_1 |
| 54198 | 0, // x8sub_2_x8sub_3 |
| 54199 | 0, // x8sub_4_x8sub_5 |
| 54200 | 0, // x8sub_6_x8sub_7 |
| 54201 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54202 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54203 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54204 | 0, // sub_32_subo64_then_sub_32 |
| 54205 | 156, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 54206 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54207 | 0, // zsub_qsub1_qsub2 |
| 54208 | 0, // zsub0_zsub1 |
| 54209 | 0, // zsub0_zsub1_zsub2 |
| 54210 | 0, // zsub1_zsub2 |
| 54211 | 0, // zsub1_zsub2_zsub3 |
| 54212 | 0, // zsub2_zsub3 |
| 54213 | 0, // zsub0_zsub2 |
| 54214 | 0, // zsub1_zsub3 |
| 54215 | }, |
| 54216 | { // ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54217 | 157, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54218 | 157, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54219 | 157, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54220 | 0, // dsub0 |
| 54221 | 157, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54222 | 0, // dsub2 |
| 54223 | 0, // dsub3 |
| 54224 | 157, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54225 | 157, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54226 | 157, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54227 | 0, // psub |
| 54228 | 0, // psub0 |
| 54229 | 0, // psub1 |
| 54230 | 0, // qsub0 |
| 54231 | 157, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54232 | 0, // qsub2 |
| 54233 | 0, // qsub3 |
| 54234 | 157, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54235 | 157, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54236 | 0, // sub_32 |
| 54237 | 0, // sub_32_hi |
| 54238 | 0, // sube32 |
| 54239 | 0, // sube64 |
| 54240 | 0, // subo32 |
| 54241 | 0, // subo64 |
| 54242 | 0, // x8sub_0 |
| 54243 | 0, // x8sub_1 |
| 54244 | 0, // x8sub_2 |
| 54245 | 0, // x8sub_3 |
| 54246 | 0, // x8sub_4 |
| 54247 | 0, // x8sub_5 |
| 54248 | 0, // x8sub_6 |
| 54249 | 0, // x8sub_7 |
| 54250 | 0, // zasubb |
| 54251 | 0, // zasubd0 |
| 54252 | 0, // zasubd1 |
| 54253 | 0, // zasubh0 |
| 54254 | 0, // zasubh1 |
| 54255 | 0, // zasubq0 |
| 54256 | 0, // zasubq1 |
| 54257 | 0, // zasubs0 |
| 54258 | 0, // zasubs1 |
| 54259 | 157, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54260 | 157, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54261 | 157, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54262 | 0, // zsub2 |
| 54263 | 0, // zsub3 |
| 54264 | 157, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54265 | 0, // zasubd1_then_zasubq0 |
| 54266 | 0, // zasubd1_then_zasubq1 |
| 54267 | 0, // zasubs1_then_zasubd0 |
| 54268 | 0, // zasubs1_then_zasubd1 |
| 54269 | 0, // zasubs1_then_zasubq0 |
| 54270 | 0, // zasubs1_then_zasubq1 |
| 54271 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54272 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54273 | 0, // zasubh1_then_zasubd0 |
| 54274 | 0, // zasubh1_then_zasubd1 |
| 54275 | 0, // zasubh1_then_zasubq0 |
| 54276 | 0, // zasubh1_then_zasubq1 |
| 54277 | 0, // zasubh1_then_zasubs0 |
| 54278 | 0, // zasubh1_then_zasubs1 |
| 54279 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54280 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54281 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54282 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54283 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54284 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54285 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54286 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54287 | 157, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54288 | 157, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54289 | 157, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54290 | 157, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54291 | 157, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54292 | 157, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54293 | 0, // dsub3_then_bsub |
| 54294 | 0, // dsub3_then_bsub_hi |
| 54295 | 0, // dsub3_then_hsub |
| 54296 | 0, // dsub3_then_hsub_hi |
| 54297 | 0, // dsub3_then_ssub |
| 54298 | 0, // dsub3_then_ssub_hi |
| 54299 | 0, // dsub2_then_bsub |
| 54300 | 0, // dsub2_then_bsub_hi |
| 54301 | 0, // dsub2_then_hsub |
| 54302 | 0, // dsub2_then_hsub_hi |
| 54303 | 0, // dsub2_then_ssub |
| 54304 | 0, // dsub2_then_ssub_hi |
| 54305 | 0, // psub1_then_psub |
| 54306 | 157, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54307 | 0, // qsub3_then_dsub_hi |
| 54308 | 0, // qsub2_then_dsub_hi |
| 54309 | 0, // x8sub_7_then_sub_32 |
| 54310 | 0, // x8sub_7_then_sub_32_hi |
| 54311 | 0, // x8sub_6_then_sub_32 |
| 54312 | 0, // x8sub_6_then_sub_32_hi |
| 54313 | 0, // x8sub_5_then_sub_32 |
| 54314 | 0, // x8sub_5_then_sub_32_hi |
| 54315 | 0, // x8sub_4_then_sub_32 |
| 54316 | 0, // x8sub_4_then_sub_32_hi |
| 54317 | 0, // x8sub_3_then_sub_32 |
| 54318 | 0, // x8sub_3_then_sub_32_hi |
| 54319 | 0, // x8sub_2_then_sub_32 |
| 54320 | 0, // x8sub_2_then_sub_32_hi |
| 54321 | 0, // x8sub_1_then_sub_32 |
| 54322 | 0, // x8sub_1_then_sub_32_hi |
| 54323 | 0, // subo64_then_sub_32 |
| 54324 | 0, // subo64_then_sub_32_hi |
| 54325 | 157, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54326 | 0, // zsub3_then_zsub_hi |
| 54327 | 0, // zsub2_then_zsub_hi |
| 54328 | 0, // dsub0_dsub1 |
| 54329 | 0, // dsub0_dsub1_dsub2 |
| 54330 | 0, // dsub1_dsub2 |
| 54331 | 0, // dsub1_dsub2_dsub3 |
| 54332 | 0, // dsub2_dsub3 |
| 54333 | 157, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54334 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54335 | 0, // dsub_dsub1_dsub2 |
| 54336 | 0, // qsub0_qsub1 |
| 54337 | 0, // qsub0_qsub1_qsub2 |
| 54338 | 0, // qsub1_qsub2 |
| 54339 | 0, // qsub1_qsub2_qsub3 |
| 54340 | 0, // qsub2_qsub3 |
| 54341 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54342 | 0, // x8sub_0_x8sub_1 |
| 54343 | 0, // x8sub_2_x8sub_3 |
| 54344 | 0, // x8sub_4_x8sub_5 |
| 54345 | 0, // x8sub_6_x8sub_7 |
| 54346 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54347 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54348 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54349 | 0, // sub_32_subo64_then_sub_32 |
| 54350 | 157, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 54351 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54352 | 0, // zsub_qsub1_qsub2 |
| 54353 | 0, // zsub0_zsub1 |
| 54354 | 0, // zsub0_zsub1_zsub2 |
| 54355 | 0, // zsub1_zsub2 |
| 54356 | 0, // zsub1_zsub2_zsub3 |
| 54357 | 0, // zsub2_zsub3 |
| 54358 | 0, // zsub0_zsub2 |
| 54359 | 0, // zsub1_zsub3 |
| 54360 | }, |
| 54361 | { // ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54362 | 158, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54363 | 158, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54364 | 158, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54365 | 0, // dsub0 |
| 54366 | 158, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54367 | 0, // dsub2 |
| 54368 | 0, // dsub3 |
| 54369 | 158, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54370 | 158, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54371 | 158, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54372 | 0, // psub |
| 54373 | 0, // psub0 |
| 54374 | 0, // psub1 |
| 54375 | 0, // qsub0 |
| 54376 | 158, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54377 | 0, // qsub2 |
| 54378 | 0, // qsub3 |
| 54379 | 158, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54380 | 158, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54381 | 0, // sub_32 |
| 54382 | 0, // sub_32_hi |
| 54383 | 0, // sube32 |
| 54384 | 0, // sube64 |
| 54385 | 0, // subo32 |
| 54386 | 0, // subo64 |
| 54387 | 0, // x8sub_0 |
| 54388 | 0, // x8sub_1 |
| 54389 | 0, // x8sub_2 |
| 54390 | 0, // x8sub_3 |
| 54391 | 0, // x8sub_4 |
| 54392 | 0, // x8sub_5 |
| 54393 | 0, // x8sub_6 |
| 54394 | 0, // x8sub_7 |
| 54395 | 0, // zasubb |
| 54396 | 0, // zasubd0 |
| 54397 | 0, // zasubd1 |
| 54398 | 0, // zasubh0 |
| 54399 | 0, // zasubh1 |
| 54400 | 0, // zasubq0 |
| 54401 | 0, // zasubq1 |
| 54402 | 0, // zasubs0 |
| 54403 | 0, // zasubs1 |
| 54404 | 158, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54405 | 158, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54406 | 158, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54407 | 0, // zsub2 |
| 54408 | 0, // zsub3 |
| 54409 | 158, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54410 | 0, // zasubd1_then_zasubq0 |
| 54411 | 0, // zasubd1_then_zasubq1 |
| 54412 | 0, // zasubs1_then_zasubd0 |
| 54413 | 0, // zasubs1_then_zasubd1 |
| 54414 | 0, // zasubs1_then_zasubq0 |
| 54415 | 0, // zasubs1_then_zasubq1 |
| 54416 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54417 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54418 | 0, // zasubh1_then_zasubd0 |
| 54419 | 0, // zasubh1_then_zasubd1 |
| 54420 | 0, // zasubh1_then_zasubq0 |
| 54421 | 0, // zasubh1_then_zasubq1 |
| 54422 | 0, // zasubh1_then_zasubs0 |
| 54423 | 0, // zasubh1_then_zasubs1 |
| 54424 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54425 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54426 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54427 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54428 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54429 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54430 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54431 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54432 | 158, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54433 | 158, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54434 | 158, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54435 | 158, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54436 | 158, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54437 | 158, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54438 | 0, // dsub3_then_bsub |
| 54439 | 0, // dsub3_then_bsub_hi |
| 54440 | 0, // dsub3_then_hsub |
| 54441 | 0, // dsub3_then_hsub_hi |
| 54442 | 0, // dsub3_then_ssub |
| 54443 | 0, // dsub3_then_ssub_hi |
| 54444 | 0, // dsub2_then_bsub |
| 54445 | 0, // dsub2_then_bsub_hi |
| 54446 | 0, // dsub2_then_hsub |
| 54447 | 0, // dsub2_then_hsub_hi |
| 54448 | 0, // dsub2_then_ssub |
| 54449 | 0, // dsub2_then_ssub_hi |
| 54450 | 0, // psub1_then_psub |
| 54451 | 158, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54452 | 0, // qsub3_then_dsub_hi |
| 54453 | 0, // qsub2_then_dsub_hi |
| 54454 | 0, // x8sub_7_then_sub_32 |
| 54455 | 0, // x8sub_7_then_sub_32_hi |
| 54456 | 0, // x8sub_6_then_sub_32 |
| 54457 | 0, // x8sub_6_then_sub_32_hi |
| 54458 | 0, // x8sub_5_then_sub_32 |
| 54459 | 0, // x8sub_5_then_sub_32_hi |
| 54460 | 0, // x8sub_4_then_sub_32 |
| 54461 | 0, // x8sub_4_then_sub_32_hi |
| 54462 | 0, // x8sub_3_then_sub_32 |
| 54463 | 0, // x8sub_3_then_sub_32_hi |
| 54464 | 0, // x8sub_2_then_sub_32 |
| 54465 | 0, // x8sub_2_then_sub_32_hi |
| 54466 | 0, // x8sub_1_then_sub_32 |
| 54467 | 0, // x8sub_1_then_sub_32_hi |
| 54468 | 0, // subo64_then_sub_32 |
| 54469 | 0, // subo64_then_sub_32_hi |
| 54470 | 158, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54471 | 0, // zsub3_then_zsub_hi |
| 54472 | 0, // zsub2_then_zsub_hi |
| 54473 | 0, // dsub0_dsub1 |
| 54474 | 0, // dsub0_dsub1_dsub2 |
| 54475 | 0, // dsub1_dsub2 |
| 54476 | 0, // dsub1_dsub2_dsub3 |
| 54477 | 0, // dsub2_dsub3 |
| 54478 | 158, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54479 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54480 | 0, // dsub_dsub1_dsub2 |
| 54481 | 0, // qsub0_qsub1 |
| 54482 | 0, // qsub0_qsub1_qsub2 |
| 54483 | 0, // qsub1_qsub2 |
| 54484 | 0, // qsub1_qsub2_qsub3 |
| 54485 | 0, // qsub2_qsub3 |
| 54486 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54487 | 0, // x8sub_0_x8sub_1 |
| 54488 | 0, // x8sub_2_x8sub_3 |
| 54489 | 0, // x8sub_4_x8sub_5 |
| 54490 | 0, // x8sub_6_x8sub_7 |
| 54491 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54492 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54493 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54494 | 0, // sub_32_subo64_then_sub_32 |
| 54495 | 158, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 54496 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54497 | 0, // zsub_qsub1_qsub2 |
| 54498 | 0, // zsub0_zsub1 |
| 54499 | 0, // zsub0_zsub1_zsub2 |
| 54500 | 0, // zsub1_zsub2 |
| 54501 | 0, // zsub1_zsub2_zsub3 |
| 54502 | 0, // zsub2_zsub3 |
| 54503 | 0, // zsub0_zsub2 |
| 54504 | 0, // zsub1_zsub3 |
| 54505 | }, |
| 54506 | { // ZPR2_with_zsub1_in_ZPRMul4 |
| 54507 | 159, // bsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54508 | 159, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54509 | 159, // dsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54510 | 0, // dsub0 |
| 54511 | 159, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54512 | 0, // dsub2 |
| 54513 | 0, // dsub3 |
| 54514 | 159, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54515 | 159, // hsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54516 | 159, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54517 | 0, // psub |
| 54518 | 0, // psub0 |
| 54519 | 0, // psub1 |
| 54520 | 0, // qsub0 |
| 54521 | 159, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54522 | 0, // qsub2 |
| 54523 | 0, // qsub3 |
| 54524 | 159, // ssub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54525 | 159, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54526 | 0, // sub_32 |
| 54527 | 0, // sub_32_hi |
| 54528 | 0, // sube32 |
| 54529 | 0, // sube64 |
| 54530 | 0, // subo32 |
| 54531 | 0, // subo64 |
| 54532 | 0, // x8sub_0 |
| 54533 | 0, // x8sub_1 |
| 54534 | 0, // x8sub_2 |
| 54535 | 0, // x8sub_3 |
| 54536 | 0, // x8sub_4 |
| 54537 | 0, // x8sub_5 |
| 54538 | 0, // x8sub_6 |
| 54539 | 0, // x8sub_7 |
| 54540 | 0, // zasubb |
| 54541 | 0, // zasubd0 |
| 54542 | 0, // zasubd1 |
| 54543 | 0, // zasubh0 |
| 54544 | 0, // zasubh1 |
| 54545 | 0, // zasubq0 |
| 54546 | 0, // zasubq1 |
| 54547 | 0, // zasubs0 |
| 54548 | 0, // zasubs1 |
| 54549 | 159, // zsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54550 | 159, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54551 | 159, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54552 | 0, // zsub2 |
| 54553 | 0, // zsub3 |
| 54554 | 159, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54555 | 0, // zasubd1_then_zasubq0 |
| 54556 | 0, // zasubd1_then_zasubq1 |
| 54557 | 0, // zasubs1_then_zasubd0 |
| 54558 | 0, // zasubs1_then_zasubd1 |
| 54559 | 0, // zasubs1_then_zasubq0 |
| 54560 | 0, // zasubs1_then_zasubq1 |
| 54561 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54562 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54563 | 0, // zasubh1_then_zasubd0 |
| 54564 | 0, // zasubh1_then_zasubd1 |
| 54565 | 0, // zasubh1_then_zasubq0 |
| 54566 | 0, // zasubh1_then_zasubq1 |
| 54567 | 0, // zasubh1_then_zasubs0 |
| 54568 | 0, // zasubh1_then_zasubs1 |
| 54569 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54570 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54571 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54572 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54573 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54574 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54575 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54576 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54577 | 159, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54578 | 159, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54579 | 159, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54580 | 159, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54581 | 159, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54582 | 159, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54583 | 0, // dsub3_then_bsub |
| 54584 | 0, // dsub3_then_bsub_hi |
| 54585 | 0, // dsub3_then_hsub |
| 54586 | 0, // dsub3_then_hsub_hi |
| 54587 | 0, // dsub3_then_ssub |
| 54588 | 0, // dsub3_then_ssub_hi |
| 54589 | 0, // dsub2_then_bsub |
| 54590 | 0, // dsub2_then_bsub_hi |
| 54591 | 0, // dsub2_then_hsub |
| 54592 | 0, // dsub2_then_hsub_hi |
| 54593 | 0, // dsub2_then_ssub |
| 54594 | 0, // dsub2_then_ssub_hi |
| 54595 | 0, // psub1_then_psub |
| 54596 | 159, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54597 | 0, // qsub3_then_dsub_hi |
| 54598 | 0, // qsub2_then_dsub_hi |
| 54599 | 0, // x8sub_7_then_sub_32 |
| 54600 | 0, // x8sub_7_then_sub_32_hi |
| 54601 | 0, // x8sub_6_then_sub_32 |
| 54602 | 0, // x8sub_6_then_sub_32_hi |
| 54603 | 0, // x8sub_5_then_sub_32 |
| 54604 | 0, // x8sub_5_then_sub_32_hi |
| 54605 | 0, // x8sub_4_then_sub_32 |
| 54606 | 0, // x8sub_4_then_sub_32_hi |
| 54607 | 0, // x8sub_3_then_sub_32 |
| 54608 | 0, // x8sub_3_then_sub_32_hi |
| 54609 | 0, // x8sub_2_then_sub_32 |
| 54610 | 0, // x8sub_2_then_sub_32_hi |
| 54611 | 0, // x8sub_1_then_sub_32 |
| 54612 | 0, // x8sub_1_then_sub_32_hi |
| 54613 | 0, // subo64_then_sub_32 |
| 54614 | 0, // subo64_then_sub_32_hi |
| 54615 | 159, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54616 | 0, // zsub3_then_zsub_hi |
| 54617 | 0, // zsub2_then_zsub_hi |
| 54618 | 0, // dsub0_dsub1 |
| 54619 | 0, // dsub0_dsub1_dsub2 |
| 54620 | 0, // dsub1_dsub2 |
| 54621 | 0, // dsub1_dsub2_dsub3 |
| 54622 | 0, // dsub2_dsub3 |
| 54623 | 159, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54624 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54625 | 0, // dsub_dsub1_dsub2 |
| 54626 | 0, // qsub0_qsub1 |
| 54627 | 0, // qsub0_qsub1_qsub2 |
| 54628 | 0, // qsub1_qsub2 |
| 54629 | 0, // qsub1_qsub2_qsub3 |
| 54630 | 0, // qsub2_qsub3 |
| 54631 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54632 | 0, // x8sub_0_x8sub_1 |
| 54633 | 0, // x8sub_2_x8sub_3 |
| 54634 | 0, // x8sub_4_x8sub_5 |
| 54635 | 0, // x8sub_6_x8sub_7 |
| 54636 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54637 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54638 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54639 | 0, // sub_32_subo64_then_sub_32 |
| 54640 | 159, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 54641 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54642 | 0, // zsub_qsub1_qsub2 |
| 54643 | 0, // zsub0_zsub1 |
| 54644 | 0, // zsub0_zsub1_zsub2 |
| 54645 | 0, // zsub1_zsub2 |
| 54646 | 0, // zsub1_zsub2_zsub3 |
| 54647 | 0, // zsub2_zsub3 |
| 54648 | 0, // zsub0_zsub2 |
| 54649 | 0, // zsub1_zsub3 |
| 54650 | }, |
| 54651 | { // ZPR2_with_zsub1_in_ZPR_K |
| 54652 | 160, // bsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54653 | 160, // bsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54654 | 160, // dsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54655 | 0, // dsub0 |
| 54656 | 160, // dsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 54657 | 0, // dsub2 |
| 54658 | 0, // dsub3 |
| 54659 | 160, // dsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54660 | 160, // hsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54661 | 160, // hsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54662 | 0, // psub |
| 54663 | 0, // psub0 |
| 54664 | 0, // psub1 |
| 54665 | 0, // qsub0 |
| 54666 | 160, // qsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 54667 | 0, // qsub2 |
| 54668 | 0, // qsub3 |
| 54669 | 160, // ssub -> ZPR2_with_zsub1_in_ZPR_K |
| 54670 | 160, // ssub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54671 | 0, // sub_32 |
| 54672 | 0, // sub_32_hi |
| 54673 | 0, // sube32 |
| 54674 | 0, // sube64 |
| 54675 | 0, // subo32 |
| 54676 | 0, // subo64 |
| 54677 | 0, // x8sub_0 |
| 54678 | 0, // x8sub_1 |
| 54679 | 0, // x8sub_2 |
| 54680 | 0, // x8sub_3 |
| 54681 | 0, // x8sub_4 |
| 54682 | 0, // x8sub_5 |
| 54683 | 0, // x8sub_6 |
| 54684 | 0, // x8sub_7 |
| 54685 | 0, // zasubb |
| 54686 | 0, // zasubd0 |
| 54687 | 0, // zasubd1 |
| 54688 | 0, // zasubh0 |
| 54689 | 0, // zasubh1 |
| 54690 | 0, // zasubq0 |
| 54691 | 0, // zasubq1 |
| 54692 | 0, // zasubs0 |
| 54693 | 0, // zasubs1 |
| 54694 | 160, // zsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54695 | 160, // zsub0 -> ZPR2_with_zsub1_in_ZPR_K |
| 54696 | 160, // zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 54697 | 0, // zsub2 |
| 54698 | 0, // zsub3 |
| 54699 | 160, // zsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54700 | 0, // zasubd1_then_zasubq0 |
| 54701 | 0, // zasubd1_then_zasubq1 |
| 54702 | 0, // zasubs1_then_zasubd0 |
| 54703 | 0, // zasubs1_then_zasubd1 |
| 54704 | 0, // zasubs1_then_zasubq0 |
| 54705 | 0, // zasubs1_then_zasubq1 |
| 54706 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54707 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54708 | 0, // zasubh1_then_zasubd0 |
| 54709 | 0, // zasubh1_then_zasubd1 |
| 54710 | 0, // zasubh1_then_zasubq0 |
| 54711 | 0, // zasubh1_then_zasubq1 |
| 54712 | 0, // zasubh1_then_zasubs0 |
| 54713 | 0, // zasubh1_then_zasubs1 |
| 54714 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54715 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54716 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54717 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54718 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54719 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54720 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54721 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54722 | 160, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54723 | 160, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54724 | 160, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPR_K |
| 54725 | 160, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54726 | 160, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPR_K |
| 54727 | 160, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54728 | 0, // dsub3_then_bsub |
| 54729 | 0, // dsub3_then_bsub_hi |
| 54730 | 0, // dsub3_then_hsub |
| 54731 | 0, // dsub3_then_hsub_hi |
| 54732 | 0, // dsub3_then_ssub |
| 54733 | 0, // dsub3_then_ssub_hi |
| 54734 | 0, // dsub2_then_bsub |
| 54735 | 0, // dsub2_then_bsub_hi |
| 54736 | 0, // dsub2_then_hsub |
| 54737 | 0, // dsub2_then_hsub_hi |
| 54738 | 0, // dsub2_then_ssub |
| 54739 | 0, // dsub2_then_ssub_hi |
| 54740 | 0, // psub1_then_psub |
| 54741 | 160, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54742 | 0, // qsub3_then_dsub_hi |
| 54743 | 0, // qsub2_then_dsub_hi |
| 54744 | 0, // x8sub_7_then_sub_32 |
| 54745 | 0, // x8sub_7_then_sub_32_hi |
| 54746 | 0, // x8sub_6_then_sub_32 |
| 54747 | 0, // x8sub_6_then_sub_32_hi |
| 54748 | 0, // x8sub_5_then_sub_32 |
| 54749 | 0, // x8sub_5_then_sub_32_hi |
| 54750 | 0, // x8sub_4_then_sub_32 |
| 54751 | 0, // x8sub_4_then_sub_32_hi |
| 54752 | 0, // x8sub_3_then_sub_32 |
| 54753 | 0, // x8sub_3_then_sub_32_hi |
| 54754 | 0, // x8sub_2_then_sub_32 |
| 54755 | 0, // x8sub_2_then_sub_32_hi |
| 54756 | 0, // x8sub_1_then_sub_32 |
| 54757 | 0, // x8sub_1_then_sub_32_hi |
| 54758 | 0, // subo64_then_sub_32 |
| 54759 | 0, // subo64_then_sub_32_hi |
| 54760 | 160, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPR_K |
| 54761 | 0, // zsub3_then_zsub_hi |
| 54762 | 0, // zsub2_then_zsub_hi |
| 54763 | 0, // dsub0_dsub1 |
| 54764 | 0, // dsub0_dsub1_dsub2 |
| 54765 | 0, // dsub1_dsub2 |
| 54766 | 0, // dsub1_dsub2_dsub3 |
| 54767 | 0, // dsub2_dsub3 |
| 54768 | 160, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 54769 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54770 | 0, // dsub_dsub1_dsub2 |
| 54771 | 0, // qsub0_qsub1 |
| 54772 | 0, // qsub0_qsub1_qsub2 |
| 54773 | 0, // qsub1_qsub2 |
| 54774 | 0, // qsub1_qsub2_qsub3 |
| 54775 | 0, // qsub2_qsub3 |
| 54776 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54777 | 0, // x8sub_0_x8sub_1 |
| 54778 | 0, // x8sub_2_x8sub_3 |
| 54779 | 0, // x8sub_4_x8sub_5 |
| 54780 | 0, // x8sub_6_x8sub_7 |
| 54781 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54782 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54783 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54784 | 0, // sub_32_subo64_then_sub_32 |
| 54785 | 160, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 54786 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54787 | 0, // zsub_qsub1_qsub2 |
| 54788 | 0, // zsub0_zsub1 |
| 54789 | 0, // zsub0_zsub1_zsub2 |
| 54790 | 0, // zsub1_zsub2 |
| 54791 | 0, // zsub1_zsub2_zsub3 |
| 54792 | 0, // zsub2_zsub3 |
| 54793 | 0, // zsub0_zsub2 |
| 54794 | 0, // zsub1_zsub3 |
| 54795 | }, |
| 54796 | { // ZPR2_with_zsub_in_FPR128_0to7 |
| 54797 | 161, // bsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54798 | 161, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54799 | 161, // dsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54800 | 0, // dsub0 |
| 54801 | 161, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54802 | 0, // dsub2 |
| 54803 | 0, // dsub3 |
| 54804 | 161, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54805 | 161, // hsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54806 | 161, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54807 | 0, // psub |
| 54808 | 0, // psub0 |
| 54809 | 0, // psub1 |
| 54810 | 0, // qsub0 |
| 54811 | 161, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54812 | 0, // qsub2 |
| 54813 | 0, // qsub3 |
| 54814 | 161, // ssub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54815 | 161, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54816 | 0, // sub_32 |
| 54817 | 0, // sub_32_hi |
| 54818 | 0, // sube32 |
| 54819 | 0, // sube64 |
| 54820 | 0, // subo32 |
| 54821 | 0, // subo64 |
| 54822 | 0, // x8sub_0 |
| 54823 | 0, // x8sub_1 |
| 54824 | 0, // x8sub_2 |
| 54825 | 0, // x8sub_3 |
| 54826 | 0, // x8sub_4 |
| 54827 | 0, // x8sub_5 |
| 54828 | 0, // x8sub_6 |
| 54829 | 0, // x8sub_7 |
| 54830 | 0, // zasubb |
| 54831 | 0, // zasubd0 |
| 54832 | 0, // zasubd1 |
| 54833 | 0, // zasubh0 |
| 54834 | 0, // zasubh1 |
| 54835 | 0, // zasubq0 |
| 54836 | 0, // zasubq1 |
| 54837 | 0, // zasubs0 |
| 54838 | 0, // zasubs1 |
| 54839 | 161, // zsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54840 | 161, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54841 | 161, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54842 | 0, // zsub2 |
| 54843 | 0, // zsub3 |
| 54844 | 161, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54845 | 0, // zasubd1_then_zasubq0 |
| 54846 | 0, // zasubd1_then_zasubq1 |
| 54847 | 0, // zasubs1_then_zasubd0 |
| 54848 | 0, // zasubs1_then_zasubd1 |
| 54849 | 0, // zasubs1_then_zasubq0 |
| 54850 | 0, // zasubs1_then_zasubq1 |
| 54851 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54852 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54853 | 0, // zasubh1_then_zasubd0 |
| 54854 | 0, // zasubh1_then_zasubd1 |
| 54855 | 0, // zasubh1_then_zasubq0 |
| 54856 | 0, // zasubh1_then_zasubq1 |
| 54857 | 0, // zasubh1_then_zasubs0 |
| 54858 | 0, // zasubh1_then_zasubs1 |
| 54859 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 54860 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 54861 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 54862 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 54863 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 54864 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 54865 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 54866 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 54867 | 161, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54868 | 161, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54869 | 161, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54870 | 161, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54871 | 161, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54872 | 161, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54873 | 0, // dsub3_then_bsub |
| 54874 | 0, // dsub3_then_bsub_hi |
| 54875 | 0, // dsub3_then_hsub |
| 54876 | 0, // dsub3_then_hsub_hi |
| 54877 | 0, // dsub3_then_ssub |
| 54878 | 0, // dsub3_then_ssub_hi |
| 54879 | 0, // dsub2_then_bsub |
| 54880 | 0, // dsub2_then_bsub_hi |
| 54881 | 0, // dsub2_then_hsub |
| 54882 | 0, // dsub2_then_hsub_hi |
| 54883 | 0, // dsub2_then_ssub |
| 54884 | 0, // dsub2_then_ssub_hi |
| 54885 | 0, // psub1_then_psub |
| 54886 | 161, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54887 | 0, // qsub3_then_dsub_hi |
| 54888 | 0, // qsub2_then_dsub_hi |
| 54889 | 0, // x8sub_7_then_sub_32 |
| 54890 | 0, // x8sub_7_then_sub_32_hi |
| 54891 | 0, // x8sub_6_then_sub_32 |
| 54892 | 0, // x8sub_6_then_sub_32_hi |
| 54893 | 0, // x8sub_5_then_sub_32 |
| 54894 | 0, // x8sub_5_then_sub_32_hi |
| 54895 | 0, // x8sub_4_then_sub_32 |
| 54896 | 0, // x8sub_4_then_sub_32_hi |
| 54897 | 0, // x8sub_3_then_sub_32 |
| 54898 | 0, // x8sub_3_then_sub_32_hi |
| 54899 | 0, // x8sub_2_then_sub_32 |
| 54900 | 0, // x8sub_2_then_sub_32_hi |
| 54901 | 0, // x8sub_1_then_sub_32 |
| 54902 | 0, // x8sub_1_then_sub_32_hi |
| 54903 | 0, // subo64_then_sub_32 |
| 54904 | 0, // subo64_then_sub_32_hi |
| 54905 | 161, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54906 | 0, // zsub3_then_zsub_hi |
| 54907 | 0, // zsub2_then_zsub_hi |
| 54908 | 0, // dsub0_dsub1 |
| 54909 | 0, // dsub0_dsub1_dsub2 |
| 54910 | 0, // dsub1_dsub2 |
| 54911 | 0, // dsub1_dsub2_dsub3 |
| 54912 | 0, // dsub2_dsub3 |
| 54913 | 161, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54914 | 0, // dsub_dsub1_dsub2_dsub3 |
| 54915 | 0, // dsub_dsub1_dsub2 |
| 54916 | 0, // qsub0_qsub1 |
| 54917 | 0, // qsub0_qsub1_qsub2 |
| 54918 | 0, // qsub1_qsub2 |
| 54919 | 0, // qsub1_qsub2_qsub3 |
| 54920 | 0, // qsub2_qsub3 |
| 54921 | 0, // sub_32_x8sub_1_then_sub_32 |
| 54922 | 0, // x8sub_0_x8sub_1 |
| 54923 | 0, // x8sub_2_x8sub_3 |
| 54924 | 0, // x8sub_4_x8sub_5 |
| 54925 | 0, // x8sub_6_x8sub_7 |
| 54926 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 54927 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 54928 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 54929 | 0, // sub_32_subo64_then_sub_32 |
| 54930 | 161, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 54931 | 0, // zsub_qsub1_qsub2_qsub3 |
| 54932 | 0, // zsub_qsub1_qsub2 |
| 54933 | 0, // zsub0_zsub1 |
| 54934 | 0, // zsub0_zsub1_zsub2 |
| 54935 | 0, // zsub1_zsub2 |
| 54936 | 0, // zsub1_zsub2_zsub3 |
| 54937 | 0, // zsub2_zsub3 |
| 54938 | 0, // zsub0_zsub2 |
| 54939 | 0, // zsub1_zsub3 |
| 54940 | }, |
| 54941 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54942 | 162, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54943 | 162, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54944 | 162, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54945 | 0, // dsub0 |
| 54946 | 162, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54947 | 0, // dsub2 |
| 54948 | 0, // dsub3 |
| 54949 | 162, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54950 | 162, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54951 | 162, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54952 | 0, // psub |
| 54953 | 0, // psub0 |
| 54954 | 0, // psub1 |
| 54955 | 0, // qsub0 |
| 54956 | 162, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54957 | 0, // qsub2 |
| 54958 | 0, // qsub3 |
| 54959 | 162, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54960 | 162, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54961 | 0, // sub_32 |
| 54962 | 0, // sub_32_hi |
| 54963 | 0, // sube32 |
| 54964 | 0, // sube64 |
| 54965 | 0, // subo32 |
| 54966 | 0, // subo64 |
| 54967 | 0, // x8sub_0 |
| 54968 | 0, // x8sub_1 |
| 54969 | 0, // x8sub_2 |
| 54970 | 0, // x8sub_3 |
| 54971 | 0, // x8sub_4 |
| 54972 | 0, // x8sub_5 |
| 54973 | 0, // x8sub_6 |
| 54974 | 0, // x8sub_7 |
| 54975 | 0, // zasubb |
| 54976 | 0, // zasubd0 |
| 54977 | 0, // zasubd1 |
| 54978 | 0, // zasubh0 |
| 54979 | 0, // zasubh1 |
| 54980 | 0, // zasubq0 |
| 54981 | 0, // zasubq1 |
| 54982 | 0, // zasubs0 |
| 54983 | 0, // zasubs1 |
| 54984 | 162, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54985 | 162, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54986 | 162, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54987 | 0, // zsub2 |
| 54988 | 0, // zsub3 |
| 54989 | 162, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 54990 | 0, // zasubd1_then_zasubq0 |
| 54991 | 0, // zasubd1_then_zasubq1 |
| 54992 | 0, // zasubs1_then_zasubd0 |
| 54993 | 0, // zasubs1_then_zasubd1 |
| 54994 | 0, // zasubs1_then_zasubq0 |
| 54995 | 0, // zasubs1_then_zasubq1 |
| 54996 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 54997 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 54998 | 0, // zasubh1_then_zasubd0 |
| 54999 | 0, // zasubh1_then_zasubd1 |
| 55000 | 0, // zasubh1_then_zasubq0 |
| 55001 | 0, // zasubh1_then_zasubq1 |
| 55002 | 0, // zasubh1_then_zasubs0 |
| 55003 | 0, // zasubh1_then_zasubs1 |
| 55004 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55005 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55006 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55007 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55008 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55009 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55010 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55011 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55012 | 162, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55013 | 162, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55014 | 162, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55015 | 162, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55016 | 162, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55017 | 162, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55018 | 0, // dsub3_then_bsub |
| 55019 | 0, // dsub3_then_bsub_hi |
| 55020 | 0, // dsub3_then_hsub |
| 55021 | 0, // dsub3_then_hsub_hi |
| 55022 | 0, // dsub3_then_ssub |
| 55023 | 0, // dsub3_then_ssub_hi |
| 55024 | 0, // dsub2_then_bsub |
| 55025 | 0, // dsub2_then_bsub_hi |
| 55026 | 0, // dsub2_then_hsub |
| 55027 | 0, // dsub2_then_hsub_hi |
| 55028 | 0, // dsub2_then_ssub |
| 55029 | 0, // dsub2_then_ssub_hi |
| 55030 | 0, // psub1_then_psub |
| 55031 | 162, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55032 | 0, // qsub3_then_dsub_hi |
| 55033 | 0, // qsub2_then_dsub_hi |
| 55034 | 0, // x8sub_7_then_sub_32 |
| 55035 | 0, // x8sub_7_then_sub_32_hi |
| 55036 | 0, // x8sub_6_then_sub_32 |
| 55037 | 0, // x8sub_6_then_sub_32_hi |
| 55038 | 0, // x8sub_5_then_sub_32 |
| 55039 | 0, // x8sub_5_then_sub_32_hi |
| 55040 | 0, // x8sub_4_then_sub_32 |
| 55041 | 0, // x8sub_4_then_sub_32_hi |
| 55042 | 0, // x8sub_3_then_sub_32 |
| 55043 | 0, // x8sub_3_then_sub_32_hi |
| 55044 | 0, // x8sub_2_then_sub_32 |
| 55045 | 0, // x8sub_2_then_sub_32_hi |
| 55046 | 0, // x8sub_1_then_sub_32 |
| 55047 | 0, // x8sub_1_then_sub_32_hi |
| 55048 | 0, // subo64_then_sub_32 |
| 55049 | 0, // subo64_then_sub_32_hi |
| 55050 | 162, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55051 | 0, // zsub3_then_zsub_hi |
| 55052 | 0, // zsub2_then_zsub_hi |
| 55053 | 0, // dsub0_dsub1 |
| 55054 | 0, // dsub0_dsub1_dsub2 |
| 55055 | 0, // dsub1_dsub2 |
| 55056 | 0, // dsub1_dsub2_dsub3 |
| 55057 | 0, // dsub2_dsub3 |
| 55058 | 162, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55059 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55060 | 0, // dsub_dsub1_dsub2 |
| 55061 | 0, // qsub0_qsub1 |
| 55062 | 0, // qsub0_qsub1_qsub2 |
| 55063 | 0, // qsub1_qsub2 |
| 55064 | 0, // qsub1_qsub2_qsub3 |
| 55065 | 0, // qsub2_qsub3 |
| 55066 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55067 | 0, // x8sub_0_x8sub_1 |
| 55068 | 0, // x8sub_2_x8sub_3 |
| 55069 | 0, // x8sub_4_x8sub_5 |
| 55070 | 0, // x8sub_6_x8sub_7 |
| 55071 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55072 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55073 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55074 | 0, // sub_32_subo64_then_sub_32 |
| 55075 | 162, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 55076 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55077 | 0, // zsub_qsub1_qsub2 |
| 55078 | 0, // zsub0_zsub1 |
| 55079 | 0, // zsub0_zsub1_zsub2 |
| 55080 | 0, // zsub1_zsub2 |
| 55081 | 0, // zsub1_zsub2_zsub3 |
| 55082 | 0, // zsub2_zsub3 |
| 55083 | 0, // zsub0_zsub2 |
| 55084 | 0, // zsub1_zsub3 |
| 55085 | }, |
| 55086 | { // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55087 | 163, // bsub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55088 | 163, // bsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55089 | 163, // dsub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55090 | 0, // dsub0 |
| 55091 | 163, // dsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55092 | 0, // dsub2 |
| 55093 | 0, // dsub3 |
| 55094 | 163, // dsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55095 | 163, // hsub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55096 | 163, // hsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55097 | 0, // psub |
| 55098 | 0, // psub0 |
| 55099 | 0, // psub1 |
| 55100 | 163, // qsub0 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55101 | 163, // qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55102 | 0, // qsub2 |
| 55103 | 0, // qsub3 |
| 55104 | 163, // ssub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55105 | 163, // ssub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55106 | 0, // sub_32 |
| 55107 | 0, // sub_32_hi |
| 55108 | 0, // sube32 |
| 55109 | 0, // sube64 |
| 55110 | 0, // subo32 |
| 55111 | 0, // subo64 |
| 55112 | 0, // x8sub_0 |
| 55113 | 0, // x8sub_1 |
| 55114 | 0, // x8sub_2 |
| 55115 | 0, // x8sub_3 |
| 55116 | 0, // x8sub_4 |
| 55117 | 0, // x8sub_5 |
| 55118 | 0, // x8sub_6 |
| 55119 | 0, // x8sub_7 |
| 55120 | 0, // zasubb |
| 55121 | 0, // zasubd0 |
| 55122 | 0, // zasubd1 |
| 55123 | 0, // zasubh0 |
| 55124 | 0, // zasubh1 |
| 55125 | 0, // zasubq0 |
| 55126 | 0, // zasubq1 |
| 55127 | 0, // zasubs0 |
| 55128 | 0, // zasubs1 |
| 55129 | 0, // zsub |
| 55130 | 0, // zsub0 |
| 55131 | 0, // zsub1 |
| 55132 | 0, // zsub2 |
| 55133 | 0, // zsub3 |
| 55134 | 0, // zsub_hi |
| 55135 | 0, // zasubd1_then_zasubq0 |
| 55136 | 0, // zasubd1_then_zasubq1 |
| 55137 | 0, // zasubs1_then_zasubd0 |
| 55138 | 0, // zasubs1_then_zasubd1 |
| 55139 | 0, // zasubs1_then_zasubq0 |
| 55140 | 0, // zasubs1_then_zasubq1 |
| 55141 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55142 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55143 | 0, // zasubh1_then_zasubd0 |
| 55144 | 0, // zasubh1_then_zasubd1 |
| 55145 | 0, // zasubh1_then_zasubq0 |
| 55146 | 0, // zasubh1_then_zasubq1 |
| 55147 | 0, // zasubh1_then_zasubs0 |
| 55148 | 0, // zasubh1_then_zasubs1 |
| 55149 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55150 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55151 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55152 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55153 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55154 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55155 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55156 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55157 | 163, // dsub1_then_bsub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55158 | 163, // dsub1_then_bsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55159 | 163, // dsub1_then_hsub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55160 | 163, // dsub1_then_hsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55161 | 163, // dsub1_then_ssub -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55162 | 163, // dsub1_then_ssub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55163 | 0, // dsub3_then_bsub |
| 55164 | 0, // dsub3_then_bsub_hi |
| 55165 | 0, // dsub3_then_hsub |
| 55166 | 0, // dsub3_then_hsub_hi |
| 55167 | 0, // dsub3_then_ssub |
| 55168 | 0, // dsub3_then_ssub_hi |
| 55169 | 0, // dsub2_then_bsub |
| 55170 | 0, // dsub2_then_bsub_hi |
| 55171 | 0, // dsub2_then_hsub |
| 55172 | 0, // dsub2_then_hsub_hi |
| 55173 | 0, // dsub2_then_ssub |
| 55174 | 0, // dsub2_then_ssub_hi |
| 55175 | 0, // psub1_then_psub |
| 55176 | 163, // qsub1_then_dsub_hi -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55177 | 0, // qsub3_then_dsub_hi |
| 55178 | 0, // qsub2_then_dsub_hi |
| 55179 | 0, // x8sub_7_then_sub_32 |
| 55180 | 0, // x8sub_7_then_sub_32_hi |
| 55181 | 0, // x8sub_6_then_sub_32 |
| 55182 | 0, // x8sub_6_then_sub_32_hi |
| 55183 | 0, // x8sub_5_then_sub_32 |
| 55184 | 0, // x8sub_5_then_sub_32_hi |
| 55185 | 0, // x8sub_4_then_sub_32 |
| 55186 | 0, // x8sub_4_then_sub_32_hi |
| 55187 | 0, // x8sub_3_then_sub_32 |
| 55188 | 0, // x8sub_3_then_sub_32_hi |
| 55189 | 0, // x8sub_2_then_sub_32 |
| 55190 | 0, // x8sub_2_then_sub_32_hi |
| 55191 | 0, // x8sub_1_then_sub_32 |
| 55192 | 0, // x8sub_1_then_sub_32_hi |
| 55193 | 0, // subo64_then_sub_32 |
| 55194 | 0, // subo64_then_sub_32_hi |
| 55195 | 0, // zsub1_then_zsub_hi |
| 55196 | 0, // zsub3_then_zsub_hi |
| 55197 | 0, // zsub2_then_zsub_hi |
| 55198 | 0, // dsub0_dsub1 |
| 55199 | 0, // dsub0_dsub1_dsub2 |
| 55200 | 0, // dsub1_dsub2 |
| 55201 | 0, // dsub1_dsub2_dsub3 |
| 55202 | 0, // dsub2_dsub3 |
| 55203 | 163, // dsub_dsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 55204 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55205 | 0, // dsub_dsub1_dsub2 |
| 55206 | 0, // qsub0_qsub1 |
| 55207 | 0, // qsub0_qsub1_qsub2 |
| 55208 | 0, // qsub1_qsub2 |
| 55209 | 0, // qsub1_qsub2_qsub3 |
| 55210 | 0, // qsub2_qsub3 |
| 55211 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55212 | 0, // x8sub_0_x8sub_1 |
| 55213 | 0, // x8sub_2_x8sub_3 |
| 55214 | 0, // x8sub_4_x8sub_5 |
| 55215 | 0, // x8sub_6_x8sub_7 |
| 55216 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55217 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55218 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55219 | 0, // sub_32_subo64_then_sub_32 |
| 55220 | 0, // zsub_qsub1 |
| 55221 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55222 | 0, // zsub_qsub1_qsub2 |
| 55223 | 0, // zsub0_zsub1 |
| 55224 | 0, // zsub0_zsub1_zsub2 |
| 55225 | 0, // zsub1_zsub2 |
| 55226 | 0, // zsub1_zsub2_zsub3 |
| 55227 | 0, // zsub2_zsub3 |
| 55228 | 0, // zsub0_zsub2 |
| 55229 | 0, // zsub1_zsub3 |
| 55230 | }, |
| 55231 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55232 | 164, // bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55233 | 164, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55234 | 164, // dsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55235 | 0, // dsub0 |
| 55236 | 164, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55237 | 0, // dsub2 |
| 55238 | 0, // dsub3 |
| 55239 | 164, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55240 | 164, // hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55241 | 164, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55242 | 0, // psub |
| 55243 | 0, // psub0 |
| 55244 | 0, // psub1 |
| 55245 | 0, // qsub0 |
| 55246 | 164, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55247 | 0, // qsub2 |
| 55248 | 0, // qsub3 |
| 55249 | 164, // ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55250 | 164, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55251 | 0, // sub_32 |
| 55252 | 0, // sub_32_hi |
| 55253 | 0, // sube32 |
| 55254 | 0, // sube64 |
| 55255 | 0, // subo32 |
| 55256 | 0, // subo64 |
| 55257 | 0, // x8sub_0 |
| 55258 | 0, // x8sub_1 |
| 55259 | 0, // x8sub_2 |
| 55260 | 0, // x8sub_3 |
| 55261 | 0, // x8sub_4 |
| 55262 | 0, // x8sub_5 |
| 55263 | 0, // x8sub_6 |
| 55264 | 0, // x8sub_7 |
| 55265 | 0, // zasubb |
| 55266 | 0, // zasubd0 |
| 55267 | 0, // zasubd1 |
| 55268 | 0, // zasubh0 |
| 55269 | 0, // zasubh1 |
| 55270 | 0, // zasubq0 |
| 55271 | 0, // zasubq1 |
| 55272 | 0, // zasubs0 |
| 55273 | 0, // zasubs1 |
| 55274 | 164, // zsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55275 | 164, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55276 | 164, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55277 | 0, // zsub2 |
| 55278 | 0, // zsub3 |
| 55279 | 164, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55280 | 0, // zasubd1_then_zasubq0 |
| 55281 | 0, // zasubd1_then_zasubq1 |
| 55282 | 0, // zasubs1_then_zasubd0 |
| 55283 | 0, // zasubs1_then_zasubd1 |
| 55284 | 0, // zasubs1_then_zasubq0 |
| 55285 | 0, // zasubs1_then_zasubq1 |
| 55286 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55287 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55288 | 0, // zasubh1_then_zasubd0 |
| 55289 | 0, // zasubh1_then_zasubd1 |
| 55290 | 0, // zasubh1_then_zasubq0 |
| 55291 | 0, // zasubh1_then_zasubq1 |
| 55292 | 0, // zasubh1_then_zasubs0 |
| 55293 | 0, // zasubh1_then_zasubs1 |
| 55294 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55295 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55296 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55297 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55298 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55299 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55300 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55301 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55302 | 164, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55303 | 164, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55304 | 164, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55305 | 164, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55306 | 164, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55307 | 164, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55308 | 0, // dsub3_then_bsub |
| 55309 | 0, // dsub3_then_bsub_hi |
| 55310 | 0, // dsub3_then_hsub |
| 55311 | 0, // dsub3_then_hsub_hi |
| 55312 | 0, // dsub3_then_ssub |
| 55313 | 0, // dsub3_then_ssub_hi |
| 55314 | 0, // dsub2_then_bsub |
| 55315 | 0, // dsub2_then_bsub_hi |
| 55316 | 0, // dsub2_then_hsub |
| 55317 | 0, // dsub2_then_hsub_hi |
| 55318 | 0, // dsub2_then_ssub |
| 55319 | 0, // dsub2_then_ssub_hi |
| 55320 | 0, // psub1_then_psub |
| 55321 | 164, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55322 | 0, // qsub3_then_dsub_hi |
| 55323 | 0, // qsub2_then_dsub_hi |
| 55324 | 0, // x8sub_7_then_sub_32 |
| 55325 | 0, // x8sub_7_then_sub_32_hi |
| 55326 | 0, // x8sub_6_then_sub_32 |
| 55327 | 0, // x8sub_6_then_sub_32_hi |
| 55328 | 0, // x8sub_5_then_sub_32 |
| 55329 | 0, // x8sub_5_then_sub_32_hi |
| 55330 | 0, // x8sub_4_then_sub_32 |
| 55331 | 0, // x8sub_4_then_sub_32_hi |
| 55332 | 0, // x8sub_3_then_sub_32 |
| 55333 | 0, // x8sub_3_then_sub_32_hi |
| 55334 | 0, // x8sub_2_then_sub_32 |
| 55335 | 0, // x8sub_2_then_sub_32_hi |
| 55336 | 0, // x8sub_1_then_sub_32 |
| 55337 | 0, // x8sub_1_then_sub_32_hi |
| 55338 | 0, // subo64_then_sub_32 |
| 55339 | 0, // subo64_then_sub_32_hi |
| 55340 | 164, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55341 | 0, // zsub3_then_zsub_hi |
| 55342 | 0, // zsub2_then_zsub_hi |
| 55343 | 0, // dsub0_dsub1 |
| 55344 | 0, // dsub0_dsub1_dsub2 |
| 55345 | 0, // dsub1_dsub2 |
| 55346 | 0, // dsub1_dsub2_dsub3 |
| 55347 | 0, // dsub2_dsub3 |
| 55348 | 164, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55349 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55350 | 0, // dsub_dsub1_dsub2 |
| 55351 | 0, // qsub0_qsub1 |
| 55352 | 0, // qsub0_qsub1_qsub2 |
| 55353 | 0, // qsub1_qsub2 |
| 55354 | 0, // qsub1_qsub2_qsub3 |
| 55355 | 0, // qsub2_qsub3 |
| 55356 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55357 | 0, // x8sub_0_x8sub_1 |
| 55358 | 0, // x8sub_2_x8sub_3 |
| 55359 | 0, // x8sub_4_x8sub_5 |
| 55360 | 0, // x8sub_6_x8sub_7 |
| 55361 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55362 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55363 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55364 | 0, // sub_32_subo64_then_sub_32 |
| 55365 | 164, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 55366 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55367 | 0, // zsub_qsub1_qsub2 |
| 55368 | 0, // zsub0_zsub1 |
| 55369 | 0, // zsub0_zsub1_zsub2 |
| 55370 | 0, // zsub1_zsub2 |
| 55371 | 0, // zsub1_zsub2_zsub3 |
| 55372 | 0, // zsub2_zsub3 |
| 55373 | 0, // zsub0_zsub2 |
| 55374 | 0, // zsub1_zsub3 |
| 55375 | }, |
| 55376 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55377 | 165, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55378 | 165, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55379 | 165, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55380 | 0, // dsub0 |
| 55381 | 165, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55382 | 0, // dsub2 |
| 55383 | 0, // dsub3 |
| 55384 | 165, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55385 | 165, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55386 | 165, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55387 | 0, // psub |
| 55388 | 0, // psub0 |
| 55389 | 0, // psub1 |
| 55390 | 0, // qsub0 |
| 55391 | 165, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55392 | 0, // qsub2 |
| 55393 | 0, // qsub3 |
| 55394 | 165, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55395 | 165, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55396 | 0, // sub_32 |
| 55397 | 0, // sub_32_hi |
| 55398 | 0, // sube32 |
| 55399 | 0, // sube64 |
| 55400 | 0, // subo32 |
| 55401 | 0, // subo64 |
| 55402 | 0, // x8sub_0 |
| 55403 | 0, // x8sub_1 |
| 55404 | 0, // x8sub_2 |
| 55405 | 0, // x8sub_3 |
| 55406 | 0, // x8sub_4 |
| 55407 | 0, // x8sub_5 |
| 55408 | 0, // x8sub_6 |
| 55409 | 0, // x8sub_7 |
| 55410 | 0, // zasubb |
| 55411 | 0, // zasubd0 |
| 55412 | 0, // zasubd1 |
| 55413 | 0, // zasubh0 |
| 55414 | 0, // zasubh1 |
| 55415 | 0, // zasubq0 |
| 55416 | 0, // zasubq1 |
| 55417 | 0, // zasubs0 |
| 55418 | 0, // zasubs1 |
| 55419 | 165, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55420 | 165, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55421 | 165, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55422 | 0, // zsub2 |
| 55423 | 0, // zsub3 |
| 55424 | 165, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55425 | 0, // zasubd1_then_zasubq0 |
| 55426 | 0, // zasubd1_then_zasubq1 |
| 55427 | 0, // zasubs1_then_zasubd0 |
| 55428 | 0, // zasubs1_then_zasubd1 |
| 55429 | 0, // zasubs1_then_zasubq0 |
| 55430 | 0, // zasubs1_then_zasubq1 |
| 55431 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55432 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55433 | 0, // zasubh1_then_zasubd0 |
| 55434 | 0, // zasubh1_then_zasubd1 |
| 55435 | 0, // zasubh1_then_zasubq0 |
| 55436 | 0, // zasubh1_then_zasubq1 |
| 55437 | 0, // zasubh1_then_zasubs0 |
| 55438 | 0, // zasubh1_then_zasubs1 |
| 55439 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55440 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55441 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55442 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55443 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55444 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55445 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55446 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55447 | 165, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55448 | 165, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55449 | 165, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55450 | 165, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55451 | 165, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55452 | 165, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55453 | 0, // dsub3_then_bsub |
| 55454 | 0, // dsub3_then_bsub_hi |
| 55455 | 0, // dsub3_then_hsub |
| 55456 | 0, // dsub3_then_hsub_hi |
| 55457 | 0, // dsub3_then_ssub |
| 55458 | 0, // dsub3_then_ssub_hi |
| 55459 | 0, // dsub2_then_bsub |
| 55460 | 0, // dsub2_then_bsub_hi |
| 55461 | 0, // dsub2_then_hsub |
| 55462 | 0, // dsub2_then_hsub_hi |
| 55463 | 0, // dsub2_then_ssub |
| 55464 | 0, // dsub2_then_ssub_hi |
| 55465 | 0, // psub1_then_psub |
| 55466 | 165, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55467 | 0, // qsub3_then_dsub_hi |
| 55468 | 0, // qsub2_then_dsub_hi |
| 55469 | 0, // x8sub_7_then_sub_32 |
| 55470 | 0, // x8sub_7_then_sub_32_hi |
| 55471 | 0, // x8sub_6_then_sub_32 |
| 55472 | 0, // x8sub_6_then_sub_32_hi |
| 55473 | 0, // x8sub_5_then_sub_32 |
| 55474 | 0, // x8sub_5_then_sub_32_hi |
| 55475 | 0, // x8sub_4_then_sub_32 |
| 55476 | 0, // x8sub_4_then_sub_32_hi |
| 55477 | 0, // x8sub_3_then_sub_32 |
| 55478 | 0, // x8sub_3_then_sub_32_hi |
| 55479 | 0, // x8sub_2_then_sub_32 |
| 55480 | 0, // x8sub_2_then_sub_32_hi |
| 55481 | 0, // x8sub_1_then_sub_32 |
| 55482 | 0, // x8sub_1_then_sub_32_hi |
| 55483 | 0, // subo64_then_sub_32 |
| 55484 | 0, // subo64_then_sub_32_hi |
| 55485 | 165, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55486 | 0, // zsub3_then_zsub_hi |
| 55487 | 0, // zsub2_then_zsub_hi |
| 55488 | 0, // dsub0_dsub1 |
| 55489 | 0, // dsub0_dsub1_dsub2 |
| 55490 | 0, // dsub1_dsub2 |
| 55491 | 0, // dsub1_dsub2_dsub3 |
| 55492 | 0, // dsub2_dsub3 |
| 55493 | 165, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55494 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55495 | 0, // dsub_dsub1_dsub2 |
| 55496 | 0, // qsub0_qsub1 |
| 55497 | 0, // qsub0_qsub1_qsub2 |
| 55498 | 0, // qsub1_qsub2 |
| 55499 | 0, // qsub1_qsub2_qsub3 |
| 55500 | 0, // qsub2_qsub3 |
| 55501 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55502 | 0, // x8sub_0_x8sub_1 |
| 55503 | 0, // x8sub_2_x8sub_3 |
| 55504 | 0, // x8sub_4_x8sub_5 |
| 55505 | 0, // x8sub_6_x8sub_7 |
| 55506 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55507 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55508 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55509 | 0, // sub_32_subo64_then_sub_32 |
| 55510 | 165, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 55511 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55512 | 0, // zsub_qsub1_qsub2 |
| 55513 | 0, // zsub0_zsub1 |
| 55514 | 0, // zsub0_zsub1_zsub2 |
| 55515 | 0, // zsub1_zsub2 |
| 55516 | 0, // zsub1_zsub2_zsub3 |
| 55517 | 0, // zsub2_zsub3 |
| 55518 | 0, // zsub0_zsub2 |
| 55519 | 0, // zsub1_zsub3 |
| 55520 | }, |
| 55521 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55522 | 166, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55523 | 166, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55524 | 166, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55525 | 0, // dsub0 |
| 55526 | 166, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55527 | 0, // dsub2 |
| 55528 | 0, // dsub3 |
| 55529 | 166, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55530 | 166, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55531 | 166, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55532 | 0, // psub |
| 55533 | 0, // psub0 |
| 55534 | 0, // psub1 |
| 55535 | 0, // qsub0 |
| 55536 | 166, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55537 | 0, // qsub2 |
| 55538 | 0, // qsub3 |
| 55539 | 166, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55540 | 166, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55541 | 0, // sub_32 |
| 55542 | 0, // sub_32_hi |
| 55543 | 0, // sube32 |
| 55544 | 0, // sube64 |
| 55545 | 0, // subo32 |
| 55546 | 0, // subo64 |
| 55547 | 0, // x8sub_0 |
| 55548 | 0, // x8sub_1 |
| 55549 | 0, // x8sub_2 |
| 55550 | 0, // x8sub_3 |
| 55551 | 0, // x8sub_4 |
| 55552 | 0, // x8sub_5 |
| 55553 | 0, // x8sub_6 |
| 55554 | 0, // x8sub_7 |
| 55555 | 0, // zasubb |
| 55556 | 0, // zasubd0 |
| 55557 | 0, // zasubd1 |
| 55558 | 0, // zasubh0 |
| 55559 | 0, // zasubh1 |
| 55560 | 0, // zasubq0 |
| 55561 | 0, // zasubq1 |
| 55562 | 0, // zasubs0 |
| 55563 | 0, // zasubs1 |
| 55564 | 166, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55565 | 166, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55566 | 166, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55567 | 0, // zsub2 |
| 55568 | 0, // zsub3 |
| 55569 | 166, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55570 | 0, // zasubd1_then_zasubq0 |
| 55571 | 0, // zasubd1_then_zasubq1 |
| 55572 | 0, // zasubs1_then_zasubd0 |
| 55573 | 0, // zasubs1_then_zasubd1 |
| 55574 | 0, // zasubs1_then_zasubq0 |
| 55575 | 0, // zasubs1_then_zasubq1 |
| 55576 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55577 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55578 | 0, // zasubh1_then_zasubd0 |
| 55579 | 0, // zasubh1_then_zasubd1 |
| 55580 | 0, // zasubh1_then_zasubq0 |
| 55581 | 0, // zasubh1_then_zasubq1 |
| 55582 | 0, // zasubh1_then_zasubs0 |
| 55583 | 0, // zasubh1_then_zasubs1 |
| 55584 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55585 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55586 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55587 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55588 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55589 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55590 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55591 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55592 | 166, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55593 | 166, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55594 | 166, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55595 | 166, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55596 | 166, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55597 | 166, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55598 | 0, // dsub3_then_bsub |
| 55599 | 0, // dsub3_then_bsub_hi |
| 55600 | 0, // dsub3_then_hsub |
| 55601 | 0, // dsub3_then_hsub_hi |
| 55602 | 0, // dsub3_then_ssub |
| 55603 | 0, // dsub3_then_ssub_hi |
| 55604 | 0, // dsub2_then_bsub |
| 55605 | 0, // dsub2_then_bsub_hi |
| 55606 | 0, // dsub2_then_hsub |
| 55607 | 0, // dsub2_then_hsub_hi |
| 55608 | 0, // dsub2_then_ssub |
| 55609 | 0, // dsub2_then_ssub_hi |
| 55610 | 0, // psub1_then_psub |
| 55611 | 166, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55612 | 0, // qsub3_then_dsub_hi |
| 55613 | 0, // qsub2_then_dsub_hi |
| 55614 | 0, // x8sub_7_then_sub_32 |
| 55615 | 0, // x8sub_7_then_sub_32_hi |
| 55616 | 0, // x8sub_6_then_sub_32 |
| 55617 | 0, // x8sub_6_then_sub_32_hi |
| 55618 | 0, // x8sub_5_then_sub_32 |
| 55619 | 0, // x8sub_5_then_sub_32_hi |
| 55620 | 0, // x8sub_4_then_sub_32 |
| 55621 | 0, // x8sub_4_then_sub_32_hi |
| 55622 | 0, // x8sub_3_then_sub_32 |
| 55623 | 0, // x8sub_3_then_sub_32_hi |
| 55624 | 0, // x8sub_2_then_sub_32 |
| 55625 | 0, // x8sub_2_then_sub_32_hi |
| 55626 | 0, // x8sub_1_then_sub_32 |
| 55627 | 0, // x8sub_1_then_sub_32_hi |
| 55628 | 0, // subo64_then_sub_32 |
| 55629 | 0, // subo64_then_sub_32_hi |
| 55630 | 166, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 55631 | 0, // zsub3_then_zsub_hi |
| 55632 | 0, // zsub2_then_zsub_hi |
| 55633 | 0, // dsub0_dsub1 |
| 55634 | 0, // dsub0_dsub1_dsub2 |
| 55635 | 0, // dsub1_dsub2 |
| 55636 | 0, // dsub1_dsub2_dsub3 |
| 55637 | 0, // dsub2_dsub3 |
| 55638 | 170, // dsub_dsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 55639 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55640 | 0, // dsub_dsub1_dsub2 |
| 55641 | 0, // qsub0_qsub1 |
| 55642 | 0, // qsub0_qsub1_qsub2 |
| 55643 | 0, // qsub1_qsub2 |
| 55644 | 0, // qsub1_qsub2_qsub3 |
| 55645 | 0, // qsub2_qsub3 |
| 55646 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55647 | 0, // x8sub_0_x8sub_1 |
| 55648 | 0, // x8sub_2_x8sub_3 |
| 55649 | 0, // x8sub_4_x8sub_5 |
| 55650 | 0, // x8sub_6_x8sub_7 |
| 55651 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55652 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55653 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55654 | 0, // sub_32_subo64_then_sub_32 |
| 55655 | 170, // zsub_qsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 55656 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55657 | 0, // zsub_qsub1_qsub2 |
| 55658 | 0, // zsub0_zsub1 |
| 55659 | 0, // zsub0_zsub1_zsub2 |
| 55660 | 0, // zsub1_zsub2 |
| 55661 | 0, // zsub1_zsub2_zsub3 |
| 55662 | 0, // zsub2_zsub3 |
| 55663 | 0, // zsub0_zsub2 |
| 55664 | 0, // zsub1_zsub3 |
| 55665 | }, |
| 55666 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55667 | 167, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55668 | 167, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55669 | 167, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55670 | 0, // dsub0 |
| 55671 | 167, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55672 | 0, // dsub2 |
| 55673 | 0, // dsub3 |
| 55674 | 167, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55675 | 167, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55676 | 167, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55677 | 0, // psub |
| 55678 | 0, // psub0 |
| 55679 | 0, // psub1 |
| 55680 | 0, // qsub0 |
| 55681 | 167, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55682 | 0, // qsub2 |
| 55683 | 0, // qsub3 |
| 55684 | 167, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55685 | 167, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55686 | 0, // sub_32 |
| 55687 | 0, // sub_32_hi |
| 55688 | 0, // sube32 |
| 55689 | 0, // sube64 |
| 55690 | 0, // subo32 |
| 55691 | 0, // subo64 |
| 55692 | 0, // x8sub_0 |
| 55693 | 0, // x8sub_1 |
| 55694 | 0, // x8sub_2 |
| 55695 | 0, // x8sub_3 |
| 55696 | 0, // x8sub_4 |
| 55697 | 0, // x8sub_5 |
| 55698 | 0, // x8sub_6 |
| 55699 | 0, // x8sub_7 |
| 55700 | 0, // zasubb |
| 55701 | 0, // zasubd0 |
| 55702 | 0, // zasubd1 |
| 55703 | 0, // zasubh0 |
| 55704 | 0, // zasubh1 |
| 55705 | 0, // zasubq0 |
| 55706 | 0, // zasubq1 |
| 55707 | 0, // zasubs0 |
| 55708 | 0, // zasubs1 |
| 55709 | 167, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55710 | 167, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55711 | 167, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55712 | 0, // zsub2 |
| 55713 | 0, // zsub3 |
| 55714 | 167, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55715 | 0, // zasubd1_then_zasubq0 |
| 55716 | 0, // zasubd1_then_zasubq1 |
| 55717 | 0, // zasubs1_then_zasubd0 |
| 55718 | 0, // zasubs1_then_zasubd1 |
| 55719 | 0, // zasubs1_then_zasubq0 |
| 55720 | 0, // zasubs1_then_zasubq1 |
| 55721 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55722 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55723 | 0, // zasubh1_then_zasubd0 |
| 55724 | 0, // zasubh1_then_zasubd1 |
| 55725 | 0, // zasubh1_then_zasubq0 |
| 55726 | 0, // zasubh1_then_zasubq1 |
| 55727 | 0, // zasubh1_then_zasubs0 |
| 55728 | 0, // zasubh1_then_zasubs1 |
| 55729 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55730 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55731 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55732 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55733 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55734 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55735 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55736 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55737 | 167, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55738 | 167, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55739 | 167, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55740 | 167, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55741 | 167, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55742 | 167, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55743 | 0, // dsub3_then_bsub |
| 55744 | 0, // dsub3_then_bsub_hi |
| 55745 | 0, // dsub3_then_hsub |
| 55746 | 0, // dsub3_then_hsub_hi |
| 55747 | 0, // dsub3_then_ssub |
| 55748 | 0, // dsub3_then_ssub_hi |
| 55749 | 0, // dsub2_then_bsub |
| 55750 | 0, // dsub2_then_bsub_hi |
| 55751 | 0, // dsub2_then_hsub |
| 55752 | 0, // dsub2_then_hsub_hi |
| 55753 | 0, // dsub2_then_ssub |
| 55754 | 0, // dsub2_then_ssub_hi |
| 55755 | 0, // psub1_then_psub |
| 55756 | 167, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55757 | 0, // qsub3_then_dsub_hi |
| 55758 | 0, // qsub2_then_dsub_hi |
| 55759 | 0, // x8sub_7_then_sub_32 |
| 55760 | 0, // x8sub_7_then_sub_32_hi |
| 55761 | 0, // x8sub_6_then_sub_32 |
| 55762 | 0, // x8sub_6_then_sub_32_hi |
| 55763 | 0, // x8sub_5_then_sub_32 |
| 55764 | 0, // x8sub_5_then_sub_32_hi |
| 55765 | 0, // x8sub_4_then_sub_32 |
| 55766 | 0, // x8sub_4_then_sub_32_hi |
| 55767 | 0, // x8sub_3_then_sub_32 |
| 55768 | 0, // x8sub_3_then_sub_32_hi |
| 55769 | 0, // x8sub_2_then_sub_32 |
| 55770 | 0, // x8sub_2_then_sub_32_hi |
| 55771 | 0, // x8sub_1_then_sub_32 |
| 55772 | 0, // x8sub_1_then_sub_32_hi |
| 55773 | 0, // subo64_then_sub_32 |
| 55774 | 0, // subo64_then_sub_32_hi |
| 55775 | 167, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 55776 | 0, // zsub3_then_zsub_hi |
| 55777 | 0, // zsub2_then_zsub_hi |
| 55778 | 0, // dsub0_dsub1 |
| 55779 | 0, // dsub0_dsub1_dsub2 |
| 55780 | 0, // dsub1_dsub2 |
| 55781 | 0, // dsub1_dsub2_dsub3 |
| 55782 | 0, // dsub2_dsub3 |
| 55783 | 171, // dsub_dsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 55784 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55785 | 0, // dsub_dsub1_dsub2 |
| 55786 | 0, // qsub0_qsub1 |
| 55787 | 0, // qsub0_qsub1_qsub2 |
| 55788 | 0, // qsub1_qsub2 |
| 55789 | 0, // qsub1_qsub2_qsub3 |
| 55790 | 0, // qsub2_qsub3 |
| 55791 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55792 | 0, // x8sub_0_x8sub_1 |
| 55793 | 0, // x8sub_2_x8sub_3 |
| 55794 | 0, // x8sub_4_x8sub_5 |
| 55795 | 0, // x8sub_6_x8sub_7 |
| 55796 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55797 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55798 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55799 | 0, // sub_32_subo64_then_sub_32 |
| 55800 | 171, // zsub_qsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 55801 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55802 | 0, // zsub_qsub1_qsub2 |
| 55803 | 0, // zsub0_zsub1 |
| 55804 | 0, // zsub0_zsub1_zsub2 |
| 55805 | 0, // zsub1_zsub2 |
| 55806 | 0, // zsub1_zsub2_zsub3 |
| 55807 | 0, // zsub2_zsub3 |
| 55808 | 0, // zsub0_zsub2 |
| 55809 | 0, // zsub1_zsub3 |
| 55810 | }, |
| 55811 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55812 | 168, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55813 | 168, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55814 | 168, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55815 | 0, // dsub0 |
| 55816 | 168, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55817 | 0, // dsub2 |
| 55818 | 0, // dsub3 |
| 55819 | 168, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55820 | 168, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55821 | 168, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55822 | 0, // psub |
| 55823 | 0, // psub0 |
| 55824 | 0, // psub1 |
| 55825 | 0, // qsub0 |
| 55826 | 168, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55827 | 0, // qsub2 |
| 55828 | 0, // qsub3 |
| 55829 | 168, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55830 | 168, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55831 | 0, // sub_32 |
| 55832 | 0, // sub_32_hi |
| 55833 | 0, // sube32 |
| 55834 | 0, // sube64 |
| 55835 | 0, // subo32 |
| 55836 | 0, // subo64 |
| 55837 | 0, // x8sub_0 |
| 55838 | 0, // x8sub_1 |
| 55839 | 0, // x8sub_2 |
| 55840 | 0, // x8sub_3 |
| 55841 | 0, // x8sub_4 |
| 55842 | 0, // x8sub_5 |
| 55843 | 0, // x8sub_6 |
| 55844 | 0, // x8sub_7 |
| 55845 | 0, // zasubb |
| 55846 | 0, // zasubd0 |
| 55847 | 0, // zasubd1 |
| 55848 | 0, // zasubh0 |
| 55849 | 0, // zasubh1 |
| 55850 | 0, // zasubq0 |
| 55851 | 0, // zasubq1 |
| 55852 | 0, // zasubs0 |
| 55853 | 0, // zasubs1 |
| 55854 | 168, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55855 | 168, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55856 | 168, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55857 | 0, // zsub2 |
| 55858 | 0, // zsub3 |
| 55859 | 168, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55860 | 0, // zasubd1_then_zasubq0 |
| 55861 | 0, // zasubd1_then_zasubq1 |
| 55862 | 0, // zasubs1_then_zasubd0 |
| 55863 | 0, // zasubs1_then_zasubd1 |
| 55864 | 0, // zasubs1_then_zasubq0 |
| 55865 | 0, // zasubs1_then_zasubq1 |
| 55866 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 55867 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 55868 | 0, // zasubh1_then_zasubd0 |
| 55869 | 0, // zasubh1_then_zasubd1 |
| 55870 | 0, // zasubh1_then_zasubq0 |
| 55871 | 0, // zasubh1_then_zasubq1 |
| 55872 | 0, // zasubh1_then_zasubs0 |
| 55873 | 0, // zasubh1_then_zasubs1 |
| 55874 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 55875 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 55876 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 55877 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 55878 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 55879 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 55880 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 55881 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 55882 | 168, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55883 | 168, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55884 | 168, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55885 | 168, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55886 | 168, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55887 | 168, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55888 | 0, // dsub3_then_bsub |
| 55889 | 0, // dsub3_then_bsub_hi |
| 55890 | 0, // dsub3_then_hsub |
| 55891 | 0, // dsub3_then_hsub_hi |
| 55892 | 0, // dsub3_then_ssub |
| 55893 | 0, // dsub3_then_ssub_hi |
| 55894 | 0, // dsub2_then_bsub |
| 55895 | 0, // dsub2_then_bsub_hi |
| 55896 | 0, // dsub2_then_hsub |
| 55897 | 0, // dsub2_then_hsub_hi |
| 55898 | 0, // dsub2_then_ssub |
| 55899 | 0, // dsub2_then_ssub_hi |
| 55900 | 0, // psub1_then_psub |
| 55901 | 168, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55902 | 0, // qsub3_then_dsub_hi |
| 55903 | 0, // qsub2_then_dsub_hi |
| 55904 | 0, // x8sub_7_then_sub_32 |
| 55905 | 0, // x8sub_7_then_sub_32_hi |
| 55906 | 0, // x8sub_6_then_sub_32 |
| 55907 | 0, // x8sub_6_then_sub_32_hi |
| 55908 | 0, // x8sub_5_then_sub_32 |
| 55909 | 0, // x8sub_5_then_sub_32_hi |
| 55910 | 0, // x8sub_4_then_sub_32 |
| 55911 | 0, // x8sub_4_then_sub_32_hi |
| 55912 | 0, // x8sub_3_then_sub_32 |
| 55913 | 0, // x8sub_3_then_sub_32_hi |
| 55914 | 0, // x8sub_2_then_sub_32 |
| 55915 | 0, // x8sub_2_then_sub_32_hi |
| 55916 | 0, // x8sub_1_then_sub_32 |
| 55917 | 0, // x8sub_1_then_sub_32_hi |
| 55918 | 0, // subo64_then_sub_32 |
| 55919 | 0, // subo64_then_sub_32_hi |
| 55920 | 168, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 55921 | 0, // zsub3_then_zsub_hi |
| 55922 | 0, // zsub2_then_zsub_hi |
| 55923 | 0, // dsub0_dsub1 |
| 55924 | 0, // dsub0_dsub1_dsub2 |
| 55925 | 0, // dsub1_dsub2 |
| 55926 | 0, // dsub1_dsub2_dsub3 |
| 55927 | 0, // dsub2_dsub3 |
| 55928 | 172, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 55929 | 0, // dsub_dsub1_dsub2_dsub3 |
| 55930 | 0, // dsub_dsub1_dsub2 |
| 55931 | 0, // qsub0_qsub1 |
| 55932 | 0, // qsub0_qsub1_qsub2 |
| 55933 | 0, // qsub1_qsub2 |
| 55934 | 0, // qsub1_qsub2_qsub3 |
| 55935 | 0, // qsub2_qsub3 |
| 55936 | 0, // sub_32_x8sub_1_then_sub_32 |
| 55937 | 0, // x8sub_0_x8sub_1 |
| 55938 | 0, // x8sub_2_x8sub_3 |
| 55939 | 0, // x8sub_4_x8sub_5 |
| 55940 | 0, // x8sub_6_x8sub_7 |
| 55941 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 55942 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 55943 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 55944 | 0, // sub_32_subo64_then_sub_32 |
| 55945 | 172, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 55946 | 0, // zsub_qsub1_qsub2_qsub3 |
| 55947 | 0, // zsub_qsub1_qsub2 |
| 55948 | 0, // zsub0_zsub1 |
| 55949 | 0, // zsub0_zsub1_zsub2 |
| 55950 | 0, // zsub1_zsub2 |
| 55951 | 0, // zsub1_zsub2_zsub3 |
| 55952 | 0, // zsub2_zsub3 |
| 55953 | 0, // zsub0_zsub2 |
| 55954 | 0, // zsub1_zsub3 |
| 55955 | }, |
| 55956 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55957 | 169, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55958 | 169, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55959 | 169, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55960 | 0, // dsub0 |
| 55961 | 169, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55962 | 0, // dsub2 |
| 55963 | 0, // dsub3 |
| 55964 | 169, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55965 | 169, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55966 | 169, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55967 | 0, // psub |
| 55968 | 0, // psub0 |
| 55969 | 0, // psub1 |
| 55970 | 0, // qsub0 |
| 55971 | 169, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55972 | 0, // qsub2 |
| 55973 | 0, // qsub3 |
| 55974 | 169, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55975 | 169, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 55976 | 0, // sub_32 |
| 55977 | 0, // sub_32_hi |
| 55978 | 0, // sube32 |
| 55979 | 0, // sube64 |
| 55980 | 0, // subo32 |
| 55981 | 0, // subo64 |
| 55982 | 0, // x8sub_0 |
| 55983 | 0, // x8sub_1 |
| 55984 | 0, // x8sub_2 |
| 55985 | 0, // x8sub_3 |
| 55986 | 0, // x8sub_4 |
| 55987 | 0, // x8sub_5 |
| 55988 | 0, // x8sub_6 |
| 55989 | 0, // x8sub_7 |
| 55990 | 0, // zasubb |
| 55991 | 0, // zasubd0 |
| 55992 | 0, // zasubd1 |
| 55993 | 0, // zasubh0 |
| 55994 | 0, // zasubh1 |
| 55995 | 0, // zasubq0 |
| 55996 | 0, // zasubq1 |
| 55997 | 0, // zasubs0 |
| 55998 | 0, // zasubs1 |
| 55999 | 169, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56000 | 169, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56001 | 169, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56002 | 0, // zsub2 |
| 56003 | 0, // zsub3 |
| 56004 | 169, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56005 | 0, // zasubd1_then_zasubq0 |
| 56006 | 0, // zasubd1_then_zasubq1 |
| 56007 | 0, // zasubs1_then_zasubd0 |
| 56008 | 0, // zasubs1_then_zasubd1 |
| 56009 | 0, // zasubs1_then_zasubq0 |
| 56010 | 0, // zasubs1_then_zasubq1 |
| 56011 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56012 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56013 | 0, // zasubh1_then_zasubd0 |
| 56014 | 0, // zasubh1_then_zasubd1 |
| 56015 | 0, // zasubh1_then_zasubq0 |
| 56016 | 0, // zasubh1_then_zasubq1 |
| 56017 | 0, // zasubh1_then_zasubs0 |
| 56018 | 0, // zasubh1_then_zasubs1 |
| 56019 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56020 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56021 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56022 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56023 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56024 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56025 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56026 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56027 | 169, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56028 | 169, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56029 | 169, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56030 | 169, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56031 | 169, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56032 | 169, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56033 | 0, // dsub3_then_bsub |
| 56034 | 0, // dsub3_then_bsub_hi |
| 56035 | 0, // dsub3_then_hsub |
| 56036 | 0, // dsub3_then_hsub_hi |
| 56037 | 0, // dsub3_then_ssub |
| 56038 | 0, // dsub3_then_ssub_hi |
| 56039 | 0, // dsub2_then_bsub |
| 56040 | 0, // dsub2_then_bsub_hi |
| 56041 | 0, // dsub2_then_hsub |
| 56042 | 0, // dsub2_then_hsub_hi |
| 56043 | 0, // dsub2_then_ssub |
| 56044 | 0, // dsub2_then_ssub_hi |
| 56045 | 0, // psub1_then_psub |
| 56046 | 169, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56047 | 0, // qsub3_then_dsub_hi |
| 56048 | 0, // qsub2_then_dsub_hi |
| 56049 | 0, // x8sub_7_then_sub_32 |
| 56050 | 0, // x8sub_7_then_sub_32_hi |
| 56051 | 0, // x8sub_6_then_sub_32 |
| 56052 | 0, // x8sub_6_then_sub_32_hi |
| 56053 | 0, // x8sub_5_then_sub_32 |
| 56054 | 0, // x8sub_5_then_sub_32_hi |
| 56055 | 0, // x8sub_4_then_sub_32 |
| 56056 | 0, // x8sub_4_then_sub_32_hi |
| 56057 | 0, // x8sub_3_then_sub_32 |
| 56058 | 0, // x8sub_3_then_sub_32_hi |
| 56059 | 0, // x8sub_2_then_sub_32 |
| 56060 | 0, // x8sub_2_then_sub_32_hi |
| 56061 | 0, // x8sub_1_then_sub_32 |
| 56062 | 0, // x8sub_1_then_sub_32_hi |
| 56063 | 0, // subo64_then_sub_32 |
| 56064 | 0, // subo64_then_sub_32_hi |
| 56065 | 169, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56066 | 0, // zsub3_then_zsub_hi |
| 56067 | 0, // zsub2_then_zsub_hi |
| 56068 | 0, // dsub0_dsub1 |
| 56069 | 0, // dsub0_dsub1_dsub2 |
| 56070 | 0, // dsub1_dsub2 |
| 56071 | 0, // dsub1_dsub2_dsub3 |
| 56072 | 0, // dsub2_dsub3 |
| 56073 | 169, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56074 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56075 | 0, // dsub_dsub1_dsub2 |
| 56076 | 0, // qsub0_qsub1 |
| 56077 | 0, // qsub0_qsub1_qsub2 |
| 56078 | 0, // qsub1_qsub2 |
| 56079 | 0, // qsub1_qsub2_qsub3 |
| 56080 | 0, // qsub2_qsub3 |
| 56081 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56082 | 0, // x8sub_0_x8sub_1 |
| 56083 | 0, // x8sub_2_x8sub_3 |
| 56084 | 0, // x8sub_4_x8sub_5 |
| 56085 | 0, // x8sub_6_x8sub_7 |
| 56086 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56087 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56088 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56089 | 0, // sub_32_subo64_then_sub_32 |
| 56090 | 169, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 56091 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56092 | 0, // zsub_qsub1_qsub2 |
| 56093 | 0, // zsub0_zsub1 |
| 56094 | 0, // zsub0_zsub1_zsub2 |
| 56095 | 0, // zsub1_zsub2 |
| 56096 | 0, // zsub1_zsub2_zsub3 |
| 56097 | 0, // zsub2_zsub3 |
| 56098 | 0, // zsub0_zsub2 |
| 56099 | 0, // zsub1_zsub3 |
| 56100 | }, |
| 56101 | { // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56102 | 170, // bsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56103 | 170, // bsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56104 | 170, // dsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56105 | 0, // dsub0 |
| 56106 | 170, // dsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56107 | 0, // dsub2 |
| 56108 | 0, // dsub3 |
| 56109 | 170, // dsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56110 | 170, // hsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56111 | 170, // hsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56112 | 0, // psub |
| 56113 | 0, // psub0 |
| 56114 | 0, // psub1 |
| 56115 | 0, // qsub0 |
| 56116 | 170, // qsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56117 | 0, // qsub2 |
| 56118 | 0, // qsub3 |
| 56119 | 170, // ssub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56120 | 170, // ssub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56121 | 0, // sub_32 |
| 56122 | 0, // sub_32_hi |
| 56123 | 0, // sube32 |
| 56124 | 0, // sube64 |
| 56125 | 0, // subo32 |
| 56126 | 0, // subo64 |
| 56127 | 0, // x8sub_0 |
| 56128 | 0, // x8sub_1 |
| 56129 | 0, // x8sub_2 |
| 56130 | 0, // x8sub_3 |
| 56131 | 0, // x8sub_4 |
| 56132 | 0, // x8sub_5 |
| 56133 | 0, // x8sub_6 |
| 56134 | 0, // x8sub_7 |
| 56135 | 0, // zasubb |
| 56136 | 0, // zasubd0 |
| 56137 | 0, // zasubd1 |
| 56138 | 0, // zasubh0 |
| 56139 | 0, // zasubh1 |
| 56140 | 0, // zasubq0 |
| 56141 | 0, // zasubq1 |
| 56142 | 0, // zasubs0 |
| 56143 | 0, // zasubs1 |
| 56144 | 170, // zsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56145 | 170, // zsub0 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56146 | 170, // zsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56147 | 0, // zsub2 |
| 56148 | 0, // zsub3 |
| 56149 | 170, // zsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56150 | 0, // zasubd1_then_zasubq0 |
| 56151 | 0, // zasubd1_then_zasubq1 |
| 56152 | 0, // zasubs1_then_zasubd0 |
| 56153 | 0, // zasubs1_then_zasubd1 |
| 56154 | 0, // zasubs1_then_zasubq0 |
| 56155 | 0, // zasubs1_then_zasubq1 |
| 56156 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56157 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56158 | 0, // zasubh1_then_zasubd0 |
| 56159 | 0, // zasubh1_then_zasubd1 |
| 56160 | 0, // zasubh1_then_zasubq0 |
| 56161 | 0, // zasubh1_then_zasubq1 |
| 56162 | 0, // zasubh1_then_zasubs0 |
| 56163 | 0, // zasubh1_then_zasubs1 |
| 56164 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56165 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56166 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56167 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56168 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56169 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56170 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56171 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56172 | 170, // dsub1_then_bsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56173 | 170, // dsub1_then_bsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56174 | 170, // dsub1_then_hsub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56175 | 170, // dsub1_then_hsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56176 | 170, // dsub1_then_ssub -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56177 | 170, // dsub1_then_ssub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56178 | 0, // dsub3_then_bsub |
| 56179 | 0, // dsub3_then_bsub_hi |
| 56180 | 0, // dsub3_then_hsub |
| 56181 | 0, // dsub3_then_hsub_hi |
| 56182 | 0, // dsub3_then_ssub |
| 56183 | 0, // dsub3_then_ssub_hi |
| 56184 | 0, // dsub2_then_bsub |
| 56185 | 0, // dsub2_then_bsub_hi |
| 56186 | 0, // dsub2_then_hsub |
| 56187 | 0, // dsub2_then_hsub_hi |
| 56188 | 0, // dsub2_then_ssub |
| 56189 | 0, // dsub2_then_ssub_hi |
| 56190 | 0, // psub1_then_psub |
| 56191 | 170, // qsub1_then_dsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56192 | 0, // qsub3_then_dsub_hi |
| 56193 | 0, // qsub2_then_dsub_hi |
| 56194 | 0, // x8sub_7_then_sub_32 |
| 56195 | 0, // x8sub_7_then_sub_32_hi |
| 56196 | 0, // x8sub_6_then_sub_32 |
| 56197 | 0, // x8sub_6_then_sub_32_hi |
| 56198 | 0, // x8sub_5_then_sub_32 |
| 56199 | 0, // x8sub_5_then_sub_32_hi |
| 56200 | 0, // x8sub_4_then_sub_32 |
| 56201 | 0, // x8sub_4_then_sub_32_hi |
| 56202 | 0, // x8sub_3_then_sub_32 |
| 56203 | 0, // x8sub_3_then_sub_32_hi |
| 56204 | 0, // x8sub_2_then_sub_32 |
| 56205 | 0, // x8sub_2_then_sub_32_hi |
| 56206 | 0, // x8sub_1_then_sub_32 |
| 56207 | 0, // x8sub_1_then_sub_32_hi |
| 56208 | 0, // subo64_then_sub_32 |
| 56209 | 0, // subo64_then_sub_32_hi |
| 56210 | 170, // zsub1_then_zsub_hi -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56211 | 0, // zsub3_then_zsub_hi |
| 56212 | 0, // zsub2_then_zsub_hi |
| 56213 | 0, // dsub0_dsub1 |
| 56214 | 0, // dsub0_dsub1_dsub2 |
| 56215 | 0, // dsub1_dsub2 |
| 56216 | 0, // dsub1_dsub2_dsub3 |
| 56217 | 0, // dsub2_dsub3 |
| 56218 | 170, // dsub_dsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56219 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56220 | 0, // dsub_dsub1_dsub2 |
| 56221 | 0, // qsub0_qsub1 |
| 56222 | 0, // qsub0_qsub1_qsub2 |
| 56223 | 0, // qsub1_qsub2 |
| 56224 | 0, // qsub1_qsub2_qsub3 |
| 56225 | 0, // qsub2_qsub3 |
| 56226 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56227 | 0, // x8sub_0_x8sub_1 |
| 56228 | 0, // x8sub_2_x8sub_3 |
| 56229 | 0, // x8sub_4_x8sub_5 |
| 56230 | 0, // x8sub_6_x8sub_7 |
| 56231 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56232 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56233 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56234 | 0, // sub_32_subo64_then_sub_32 |
| 56235 | 170, // zsub_qsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56236 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56237 | 0, // zsub_qsub1_qsub2 |
| 56238 | 0, // zsub0_zsub1 |
| 56239 | 0, // zsub0_zsub1_zsub2 |
| 56240 | 0, // zsub1_zsub2 |
| 56241 | 0, // zsub1_zsub2_zsub3 |
| 56242 | 0, // zsub2_zsub3 |
| 56243 | 0, // zsub0_zsub2 |
| 56244 | 0, // zsub1_zsub3 |
| 56245 | }, |
| 56246 | { // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56247 | 171, // bsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56248 | 171, // bsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56249 | 171, // dsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56250 | 0, // dsub0 |
| 56251 | 171, // dsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56252 | 0, // dsub2 |
| 56253 | 0, // dsub3 |
| 56254 | 171, // dsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56255 | 171, // hsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56256 | 171, // hsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56257 | 0, // psub |
| 56258 | 0, // psub0 |
| 56259 | 0, // psub1 |
| 56260 | 0, // qsub0 |
| 56261 | 171, // qsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56262 | 0, // qsub2 |
| 56263 | 0, // qsub3 |
| 56264 | 171, // ssub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56265 | 171, // ssub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56266 | 0, // sub_32 |
| 56267 | 0, // sub_32_hi |
| 56268 | 0, // sube32 |
| 56269 | 0, // sube64 |
| 56270 | 0, // subo32 |
| 56271 | 0, // subo64 |
| 56272 | 0, // x8sub_0 |
| 56273 | 0, // x8sub_1 |
| 56274 | 0, // x8sub_2 |
| 56275 | 0, // x8sub_3 |
| 56276 | 0, // x8sub_4 |
| 56277 | 0, // x8sub_5 |
| 56278 | 0, // x8sub_6 |
| 56279 | 0, // x8sub_7 |
| 56280 | 0, // zasubb |
| 56281 | 0, // zasubd0 |
| 56282 | 0, // zasubd1 |
| 56283 | 0, // zasubh0 |
| 56284 | 0, // zasubh1 |
| 56285 | 0, // zasubq0 |
| 56286 | 0, // zasubq1 |
| 56287 | 0, // zasubs0 |
| 56288 | 0, // zasubs1 |
| 56289 | 171, // zsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56290 | 171, // zsub0 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56291 | 171, // zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56292 | 0, // zsub2 |
| 56293 | 0, // zsub3 |
| 56294 | 171, // zsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56295 | 0, // zasubd1_then_zasubq0 |
| 56296 | 0, // zasubd1_then_zasubq1 |
| 56297 | 0, // zasubs1_then_zasubd0 |
| 56298 | 0, // zasubs1_then_zasubd1 |
| 56299 | 0, // zasubs1_then_zasubq0 |
| 56300 | 0, // zasubs1_then_zasubq1 |
| 56301 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56302 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56303 | 0, // zasubh1_then_zasubd0 |
| 56304 | 0, // zasubh1_then_zasubd1 |
| 56305 | 0, // zasubh1_then_zasubq0 |
| 56306 | 0, // zasubh1_then_zasubq1 |
| 56307 | 0, // zasubh1_then_zasubs0 |
| 56308 | 0, // zasubh1_then_zasubs1 |
| 56309 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56310 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56311 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56312 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56313 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56314 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56315 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56316 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56317 | 171, // dsub1_then_bsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56318 | 171, // dsub1_then_bsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56319 | 171, // dsub1_then_hsub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56320 | 171, // dsub1_then_hsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56321 | 171, // dsub1_then_ssub -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56322 | 171, // dsub1_then_ssub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56323 | 0, // dsub3_then_bsub |
| 56324 | 0, // dsub3_then_bsub_hi |
| 56325 | 0, // dsub3_then_hsub |
| 56326 | 0, // dsub3_then_hsub_hi |
| 56327 | 0, // dsub3_then_ssub |
| 56328 | 0, // dsub3_then_ssub_hi |
| 56329 | 0, // dsub2_then_bsub |
| 56330 | 0, // dsub2_then_bsub_hi |
| 56331 | 0, // dsub2_then_hsub |
| 56332 | 0, // dsub2_then_hsub_hi |
| 56333 | 0, // dsub2_then_ssub |
| 56334 | 0, // dsub2_then_ssub_hi |
| 56335 | 0, // psub1_then_psub |
| 56336 | 171, // qsub1_then_dsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56337 | 0, // qsub3_then_dsub_hi |
| 56338 | 0, // qsub2_then_dsub_hi |
| 56339 | 0, // x8sub_7_then_sub_32 |
| 56340 | 0, // x8sub_7_then_sub_32_hi |
| 56341 | 0, // x8sub_6_then_sub_32 |
| 56342 | 0, // x8sub_6_then_sub_32_hi |
| 56343 | 0, // x8sub_5_then_sub_32 |
| 56344 | 0, // x8sub_5_then_sub_32_hi |
| 56345 | 0, // x8sub_4_then_sub_32 |
| 56346 | 0, // x8sub_4_then_sub_32_hi |
| 56347 | 0, // x8sub_3_then_sub_32 |
| 56348 | 0, // x8sub_3_then_sub_32_hi |
| 56349 | 0, // x8sub_2_then_sub_32 |
| 56350 | 0, // x8sub_2_then_sub_32_hi |
| 56351 | 0, // x8sub_1_then_sub_32 |
| 56352 | 0, // x8sub_1_then_sub_32_hi |
| 56353 | 0, // subo64_then_sub_32 |
| 56354 | 0, // subo64_then_sub_32_hi |
| 56355 | 171, // zsub1_then_zsub_hi -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56356 | 0, // zsub3_then_zsub_hi |
| 56357 | 0, // zsub2_then_zsub_hi |
| 56358 | 0, // dsub0_dsub1 |
| 56359 | 0, // dsub0_dsub1_dsub2 |
| 56360 | 0, // dsub1_dsub2 |
| 56361 | 0, // dsub1_dsub2_dsub3 |
| 56362 | 0, // dsub2_dsub3 |
| 56363 | 171, // dsub_dsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56364 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56365 | 0, // dsub_dsub1_dsub2 |
| 56366 | 0, // qsub0_qsub1 |
| 56367 | 0, // qsub0_qsub1_qsub2 |
| 56368 | 0, // qsub1_qsub2 |
| 56369 | 0, // qsub1_qsub2_qsub3 |
| 56370 | 0, // qsub2_qsub3 |
| 56371 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56372 | 0, // x8sub_0_x8sub_1 |
| 56373 | 0, // x8sub_2_x8sub_3 |
| 56374 | 0, // x8sub_4_x8sub_5 |
| 56375 | 0, // x8sub_6_x8sub_7 |
| 56376 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56377 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56378 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56379 | 0, // sub_32_subo64_then_sub_32 |
| 56380 | 171, // zsub_qsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 56381 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56382 | 0, // zsub_qsub1_qsub2 |
| 56383 | 0, // zsub0_zsub1 |
| 56384 | 0, // zsub0_zsub1_zsub2 |
| 56385 | 0, // zsub1_zsub2 |
| 56386 | 0, // zsub1_zsub2_zsub3 |
| 56387 | 0, // zsub2_zsub3 |
| 56388 | 0, // zsub0_zsub2 |
| 56389 | 0, // zsub1_zsub3 |
| 56390 | }, |
| 56391 | { // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56392 | 172, // bsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56393 | 172, // bsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56394 | 172, // dsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56395 | 0, // dsub0 |
| 56396 | 172, // dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56397 | 0, // dsub2 |
| 56398 | 0, // dsub3 |
| 56399 | 172, // dsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56400 | 172, // hsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56401 | 172, // hsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56402 | 0, // psub |
| 56403 | 0, // psub0 |
| 56404 | 0, // psub1 |
| 56405 | 0, // qsub0 |
| 56406 | 172, // qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56407 | 0, // qsub2 |
| 56408 | 0, // qsub3 |
| 56409 | 172, // ssub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56410 | 172, // ssub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56411 | 0, // sub_32 |
| 56412 | 0, // sub_32_hi |
| 56413 | 0, // sube32 |
| 56414 | 0, // sube64 |
| 56415 | 0, // subo32 |
| 56416 | 0, // subo64 |
| 56417 | 0, // x8sub_0 |
| 56418 | 0, // x8sub_1 |
| 56419 | 0, // x8sub_2 |
| 56420 | 0, // x8sub_3 |
| 56421 | 0, // x8sub_4 |
| 56422 | 0, // x8sub_5 |
| 56423 | 0, // x8sub_6 |
| 56424 | 0, // x8sub_7 |
| 56425 | 0, // zasubb |
| 56426 | 0, // zasubd0 |
| 56427 | 0, // zasubd1 |
| 56428 | 0, // zasubh0 |
| 56429 | 0, // zasubh1 |
| 56430 | 0, // zasubq0 |
| 56431 | 0, // zasubq1 |
| 56432 | 0, // zasubs0 |
| 56433 | 0, // zasubs1 |
| 56434 | 172, // zsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56435 | 172, // zsub0 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56436 | 172, // zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56437 | 0, // zsub2 |
| 56438 | 0, // zsub3 |
| 56439 | 172, // zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56440 | 0, // zasubd1_then_zasubq0 |
| 56441 | 0, // zasubd1_then_zasubq1 |
| 56442 | 0, // zasubs1_then_zasubd0 |
| 56443 | 0, // zasubs1_then_zasubd1 |
| 56444 | 0, // zasubs1_then_zasubq0 |
| 56445 | 0, // zasubs1_then_zasubq1 |
| 56446 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56447 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56448 | 0, // zasubh1_then_zasubd0 |
| 56449 | 0, // zasubh1_then_zasubd1 |
| 56450 | 0, // zasubh1_then_zasubq0 |
| 56451 | 0, // zasubh1_then_zasubq1 |
| 56452 | 0, // zasubh1_then_zasubs0 |
| 56453 | 0, // zasubh1_then_zasubs1 |
| 56454 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56455 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56456 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56457 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56458 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56459 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56460 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56461 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56462 | 172, // dsub1_then_bsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56463 | 172, // dsub1_then_bsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56464 | 172, // dsub1_then_hsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56465 | 172, // dsub1_then_hsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56466 | 172, // dsub1_then_ssub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56467 | 172, // dsub1_then_ssub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56468 | 0, // dsub3_then_bsub |
| 56469 | 0, // dsub3_then_bsub_hi |
| 56470 | 0, // dsub3_then_hsub |
| 56471 | 0, // dsub3_then_hsub_hi |
| 56472 | 0, // dsub3_then_ssub |
| 56473 | 0, // dsub3_then_ssub_hi |
| 56474 | 0, // dsub2_then_bsub |
| 56475 | 0, // dsub2_then_bsub_hi |
| 56476 | 0, // dsub2_then_hsub |
| 56477 | 0, // dsub2_then_hsub_hi |
| 56478 | 0, // dsub2_then_ssub |
| 56479 | 0, // dsub2_then_ssub_hi |
| 56480 | 0, // psub1_then_psub |
| 56481 | 172, // qsub1_then_dsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56482 | 0, // qsub3_then_dsub_hi |
| 56483 | 0, // qsub2_then_dsub_hi |
| 56484 | 0, // x8sub_7_then_sub_32 |
| 56485 | 0, // x8sub_7_then_sub_32_hi |
| 56486 | 0, // x8sub_6_then_sub_32 |
| 56487 | 0, // x8sub_6_then_sub_32_hi |
| 56488 | 0, // x8sub_5_then_sub_32 |
| 56489 | 0, // x8sub_5_then_sub_32_hi |
| 56490 | 0, // x8sub_4_then_sub_32 |
| 56491 | 0, // x8sub_4_then_sub_32_hi |
| 56492 | 0, // x8sub_3_then_sub_32 |
| 56493 | 0, // x8sub_3_then_sub_32_hi |
| 56494 | 0, // x8sub_2_then_sub_32 |
| 56495 | 0, // x8sub_2_then_sub_32_hi |
| 56496 | 0, // x8sub_1_then_sub_32 |
| 56497 | 0, // x8sub_1_then_sub_32_hi |
| 56498 | 0, // subo64_then_sub_32 |
| 56499 | 0, // subo64_then_sub_32_hi |
| 56500 | 172, // zsub1_then_zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56501 | 0, // zsub3_then_zsub_hi |
| 56502 | 0, // zsub2_then_zsub_hi |
| 56503 | 0, // dsub0_dsub1 |
| 56504 | 0, // dsub0_dsub1_dsub2 |
| 56505 | 0, // dsub1_dsub2 |
| 56506 | 0, // dsub1_dsub2_dsub3 |
| 56507 | 0, // dsub2_dsub3 |
| 56508 | 172, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56509 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56510 | 0, // dsub_dsub1_dsub2 |
| 56511 | 0, // qsub0_qsub1 |
| 56512 | 0, // qsub0_qsub1_qsub2 |
| 56513 | 0, // qsub1_qsub2 |
| 56514 | 0, // qsub1_qsub2_qsub3 |
| 56515 | 0, // qsub2_qsub3 |
| 56516 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56517 | 0, // x8sub_0_x8sub_1 |
| 56518 | 0, // x8sub_2_x8sub_3 |
| 56519 | 0, // x8sub_4_x8sub_5 |
| 56520 | 0, // x8sub_6_x8sub_7 |
| 56521 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56522 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56523 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56524 | 0, // sub_32_subo64_then_sub_32 |
| 56525 | 172, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 56526 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56527 | 0, // zsub_qsub1_qsub2 |
| 56528 | 0, // zsub0_zsub1 |
| 56529 | 0, // zsub0_zsub1_zsub2 |
| 56530 | 0, // zsub1_zsub2 |
| 56531 | 0, // zsub1_zsub2_zsub3 |
| 56532 | 0, // zsub2_zsub3 |
| 56533 | 0, // zsub0_zsub2 |
| 56534 | 0, // zsub1_zsub3 |
| 56535 | }, |
| 56536 | { // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56537 | 173, // bsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56538 | 173, // bsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56539 | 173, // dsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56540 | 0, // dsub0 |
| 56541 | 173, // dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56542 | 0, // dsub2 |
| 56543 | 0, // dsub3 |
| 56544 | 173, // dsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56545 | 173, // hsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56546 | 173, // hsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56547 | 0, // psub |
| 56548 | 0, // psub0 |
| 56549 | 0, // psub1 |
| 56550 | 0, // qsub0 |
| 56551 | 173, // qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56552 | 0, // qsub2 |
| 56553 | 0, // qsub3 |
| 56554 | 173, // ssub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56555 | 173, // ssub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56556 | 0, // sub_32 |
| 56557 | 0, // sub_32_hi |
| 56558 | 0, // sube32 |
| 56559 | 0, // sube64 |
| 56560 | 0, // subo32 |
| 56561 | 0, // subo64 |
| 56562 | 0, // x8sub_0 |
| 56563 | 0, // x8sub_1 |
| 56564 | 0, // x8sub_2 |
| 56565 | 0, // x8sub_3 |
| 56566 | 0, // x8sub_4 |
| 56567 | 0, // x8sub_5 |
| 56568 | 0, // x8sub_6 |
| 56569 | 0, // x8sub_7 |
| 56570 | 0, // zasubb |
| 56571 | 0, // zasubd0 |
| 56572 | 0, // zasubd1 |
| 56573 | 0, // zasubh0 |
| 56574 | 0, // zasubh1 |
| 56575 | 0, // zasubq0 |
| 56576 | 0, // zasubq1 |
| 56577 | 0, // zasubs0 |
| 56578 | 0, // zasubs1 |
| 56579 | 173, // zsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56580 | 173, // zsub0 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56581 | 173, // zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56582 | 0, // zsub2 |
| 56583 | 0, // zsub3 |
| 56584 | 173, // zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56585 | 0, // zasubd1_then_zasubq0 |
| 56586 | 0, // zasubd1_then_zasubq1 |
| 56587 | 0, // zasubs1_then_zasubd0 |
| 56588 | 0, // zasubs1_then_zasubd1 |
| 56589 | 0, // zasubs1_then_zasubq0 |
| 56590 | 0, // zasubs1_then_zasubq1 |
| 56591 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56592 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56593 | 0, // zasubh1_then_zasubd0 |
| 56594 | 0, // zasubh1_then_zasubd1 |
| 56595 | 0, // zasubh1_then_zasubq0 |
| 56596 | 0, // zasubh1_then_zasubq1 |
| 56597 | 0, // zasubh1_then_zasubs0 |
| 56598 | 0, // zasubh1_then_zasubs1 |
| 56599 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56600 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56601 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56602 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56603 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56604 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56605 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56606 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56607 | 173, // dsub1_then_bsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56608 | 173, // dsub1_then_bsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56609 | 173, // dsub1_then_hsub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56610 | 173, // dsub1_then_hsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56611 | 173, // dsub1_then_ssub -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56612 | 173, // dsub1_then_ssub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56613 | 0, // dsub3_then_bsub |
| 56614 | 0, // dsub3_then_bsub_hi |
| 56615 | 0, // dsub3_then_hsub |
| 56616 | 0, // dsub3_then_hsub_hi |
| 56617 | 0, // dsub3_then_ssub |
| 56618 | 0, // dsub3_then_ssub_hi |
| 56619 | 0, // dsub2_then_bsub |
| 56620 | 0, // dsub2_then_bsub_hi |
| 56621 | 0, // dsub2_then_hsub |
| 56622 | 0, // dsub2_then_hsub_hi |
| 56623 | 0, // dsub2_then_ssub |
| 56624 | 0, // dsub2_then_ssub_hi |
| 56625 | 0, // psub1_then_psub |
| 56626 | 173, // qsub1_then_dsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56627 | 0, // qsub3_then_dsub_hi |
| 56628 | 0, // qsub2_then_dsub_hi |
| 56629 | 0, // x8sub_7_then_sub_32 |
| 56630 | 0, // x8sub_7_then_sub_32_hi |
| 56631 | 0, // x8sub_6_then_sub_32 |
| 56632 | 0, // x8sub_6_then_sub_32_hi |
| 56633 | 0, // x8sub_5_then_sub_32 |
| 56634 | 0, // x8sub_5_then_sub_32_hi |
| 56635 | 0, // x8sub_4_then_sub_32 |
| 56636 | 0, // x8sub_4_then_sub_32_hi |
| 56637 | 0, // x8sub_3_then_sub_32 |
| 56638 | 0, // x8sub_3_then_sub_32_hi |
| 56639 | 0, // x8sub_2_then_sub_32 |
| 56640 | 0, // x8sub_2_then_sub_32_hi |
| 56641 | 0, // x8sub_1_then_sub_32 |
| 56642 | 0, // x8sub_1_then_sub_32_hi |
| 56643 | 0, // subo64_then_sub_32 |
| 56644 | 0, // subo64_then_sub_32_hi |
| 56645 | 173, // zsub1_then_zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56646 | 0, // zsub3_then_zsub_hi |
| 56647 | 0, // zsub2_then_zsub_hi |
| 56648 | 0, // dsub0_dsub1 |
| 56649 | 0, // dsub0_dsub1_dsub2 |
| 56650 | 0, // dsub1_dsub2 |
| 56651 | 0, // dsub1_dsub2_dsub3 |
| 56652 | 0, // dsub2_dsub3 |
| 56653 | 173, // dsub_dsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56654 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56655 | 0, // dsub_dsub1_dsub2 |
| 56656 | 0, // qsub0_qsub1 |
| 56657 | 0, // qsub0_qsub1_qsub2 |
| 56658 | 0, // qsub1_qsub2 |
| 56659 | 0, // qsub1_qsub2_qsub3 |
| 56660 | 0, // qsub2_qsub3 |
| 56661 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56662 | 0, // x8sub_0_x8sub_1 |
| 56663 | 0, // x8sub_2_x8sub_3 |
| 56664 | 0, // x8sub_4_x8sub_5 |
| 56665 | 0, // x8sub_6_x8sub_7 |
| 56666 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56667 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56668 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56669 | 0, // sub_32_subo64_then_sub_32 |
| 56670 | 173, // zsub_qsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 56671 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56672 | 0, // zsub_qsub1_qsub2 |
| 56673 | 0, // zsub0_zsub1 |
| 56674 | 0, // zsub0_zsub1_zsub2 |
| 56675 | 0, // zsub1_zsub2 |
| 56676 | 0, // zsub1_zsub2_zsub3 |
| 56677 | 0, // zsub2_zsub3 |
| 56678 | 0, // zsub0_zsub2 |
| 56679 | 0, // zsub1_zsub3 |
| 56680 | }, |
| 56681 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56682 | 174, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56683 | 174, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56684 | 174, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56685 | 0, // dsub0 |
| 56686 | 174, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56687 | 0, // dsub2 |
| 56688 | 0, // dsub3 |
| 56689 | 174, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56690 | 174, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56691 | 174, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56692 | 0, // psub |
| 56693 | 0, // psub0 |
| 56694 | 0, // psub1 |
| 56695 | 0, // qsub0 |
| 56696 | 174, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56697 | 0, // qsub2 |
| 56698 | 0, // qsub3 |
| 56699 | 174, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56700 | 174, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56701 | 0, // sub_32 |
| 56702 | 0, // sub_32_hi |
| 56703 | 0, // sube32 |
| 56704 | 0, // sube64 |
| 56705 | 0, // subo32 |
| 56706 | 0, // subo64 |
| 56707 | 0, // x8sub_0 |
| 56708 | 0, // x8sub_1 |
| 56709 | 0, // x8sub_2 |
| 56710 | 0, // x8sub_3 |
| 56711 | 0, // x8sub_4 |
| 56712 | 0, // x8sub_5 |
| 56713 | 0, // x8sub_6 |
| 56714 | 0, // x8sub_7 |
| 56715 | 0, // zasubb |
| 56716 | 0, // zasubd0 |
| 56717 | 0, // zasubd1 |
| 56718 | 0, // zasubh0 |
| 56719 | 0, // zasubh1 |
| 56720 | 0, // zasubq0 |
| 56721 | 0, // zasubq1 |
| 56722 | 0, // zasubs0 |
| 56723 | 0, // zasubs1 |
| 56724 | 174, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56725 | 174, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56726 | 174, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56727 | 0, // zsub2 |
| 56728 | 0, // zsub3 |
| 56729 | 174, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56730 | 0, // zasubd1_then_zasubq0 |
| 56731 | 0, // zasubd1_then_zasubq1 |
| 56732 | 0, // zasubs1_then_zasubd0 |
| 56733 | 0, // zasubs1_then_zasubd1 |
| 56734 | 0, // zasubs1_then_zasubq0 |
| 56735 | 0, // zasubs1_then_zasubq1 |
| 56736 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56737 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56738 | 0, // zasubh1_then_zasubd0 |
| 56739 | 0, // zasubh1_then_zasubd1 |
| 56740 | 0, // zasubh1_then_zasubq0 |
| 56741 | 0, // zasubh1_then_zasubq1 |
| 56742 | 0, // zasubh1_then_zasubs0 |
| 56743 | 0, // zasubh1_then_zasubs1 |
| 56744 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56745 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56746 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56747 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56748 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56749 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56750 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56751 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56752 | 174, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56753 | 174, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56754 | 174, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56755 | 174, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56756 | 174, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56757 | 174, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56758 | 0, // dsub3_then_bsub |
| 56759 | 0, // dsub3_then_bsub_hi |
| 56760 | 0, // dsub3_then_hsub |
| 56761 | 0, // dsub3_then_hsub_hi |
| 56762 | 0, // dsub3_then_ssub |
| 56763 | 0, // dsub3_then_ssub_hi |
| 56764 | 0, // dsub2_then_bsub |
| 56765 | 0, // dsub2_then_bsub_hi |
| 56766 | 0, // dsub2_then_hsub |
| 56767 | 0, // dsub2_then_hsub_hi |
| 56768 | 0, // dsub2_then_ssub |
| 56769 | 0, // dsub2_then_ssub_hi |
| 56770 | 0, // psub1_then_psub |
| 56771 | 174, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56772 | 0, // qsub3_then_dsub_hi |
| 56773 | 0, // qsub2_then_dsub_hi |
| 56774 | 0, // x8sub_7_then_sub_32 |
| 56775 | 0, // x8sub_7_then_sub_32_hi |
| 56776 | 0, // x8sub_6_then_sub_32 |
| 56777 | 0, // x8sub_6_then_sub_32_hi |
| 56778 | 0, // x8sub_5_then_sub_32 |
| 56779 | 0, // x8sub_5_then_sub_32_hi |
| 56780 | 0, // x8sub_4_then_sub_32 |
| 56781 | 0, // x8sub_4_then_sub_32_hi |
| 56782 | 0, // x8sub_3_then_sub_32 |
| 56783 | 0, // x8sub_3_then_sub_32_hi |
| 56784 | 0, // x8sub_2_then_sub_32 |
| 56785 | 0, // x8sub_2_then_sub_32_hi |
| 56786 | 0, // x8sub_1_then_sub_32 |
| 56787 | 0, // x8sub_1_then_sub_32_hi |
| 56788 | 0, // subo64_then_sub_32 |
| 56789 | 0, // subo64_then_sub_32_hi |
| 56790 | 174, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56791 | 0, // zsub3_then_zsub_hi |
| 56792 | 0, // zsub2_then_zsub_hi |
| 56793 | 0, // dsub0_dsub1 |
| 56794 | 0, // dsub0_dsub1_dsub2 |
| 56795 | 0, // dsub1_dsub2 |
| 56796 | 0, // dsub1_dsub2_dsub3 |
| 56797 | 0, // dsub2_dsub3 |
| 56798 | 193, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56799 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56800 | 0, // dsub_dsub1_dsub2 |
| 56801 | 0, // qsub0_qsub1 |
| 56802 | 0, // qsub0_qsub1_qsub2 |
| 56803 | 0, // qsub1_qsub2 |
| 56804 | 0, // qsub1_qsub2_qsub3 |
| 56805 | 0, // qsub2_qsub3 |
| 56806 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56807 | 0, // x8sub_0_x8sub_1 |
| 56808 | 0, // x8sub_2_x8sub_3 |
| 56809 | 0, // x8sub_4_x8sub_5 |
| 56810 | 0, // x8sub_6_x8sub_7 |
| 56811 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56812 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56813 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56814 | 0, // sub_32_subo64_then_sub_32 |
| 56815 | 193, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 56816 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56817 | 0, // zsub_qsub1_qsub2 |
| 56818 | 0, // zsub0_zsub1 |
| 56819 | 0, // zsub0_zsub1_zsub2 |
| 56820 | 0, // zsub1_zsub2 |
| 56821 | 0, // zsub1_zsub2_zsub3 |
| 56822 | 0, // zsub2_zsub3 |
| 56823 | 0, // zsub0_zsub2 |
| 56824 | 0, // zsub1_zsub3 |
| 56825 | }, |
| 56826 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56827 | 175, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56828 | 175, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56829 | 175, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56830 | 0, // dsub0 |
| 56831 | 175, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56832 | 0, // dsub2 |
| 56833 | 0, // dsub3 |
| 56834 | 175, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56835 | 175, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56836 | 175, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56837 | 0, // psub |
| 56838 | 0, // psub0 |
| 56839 | 0, // psub1 |
| 56840 | 0, // qsub0 |
| 56841 | 175, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56842 | 0, // qsub2 |
| 56843 | 0, // qsub3 |
| 56844 | 175, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56845 | 175, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56846 | 0, // sub_32 |
| 56847 | 0, // sub_32_hi |
| 56848 | 0, // sube32 |
| 56849 | 0, // sube64 |
| 56850 | 0, // subo32 |
| 56851 | 0, // subo64 |
| 56852 | 0, // x8sub_0 |
| 56853 | 0, // x8sub_1 |
| 56854 | 0, // x8sub_2 |
| 56855 | 0, // x8sub_3 |
| 56856 | 0, // x8sub_4 |
| 56857 | 0, // x8sub_5 |
| 56858 | 0, // x8sub_6 |
| 56859 | 0, // x8sub_7 |
| 56860 | 0, // zasubb |
| 56861 | 0, // zasubd0 |
| 56862 | 0, // zasubd1 |
| 56863 | 0, // zasubh0 |
| 56864 | 0, // zasubh1 |
| 56865 | 0, // zasubq0 |
| 56866 | 0, // zasubq1 |
| 56867 | 0, // zasubs0 |
| 56868 | 0, // zasubs1 |
| 56869 | 175, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56870 | 175, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56871 | 175, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56872 | 0, // zsub2 |
| 56873 | 0, // zsub3 |
| 56874 | 175, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56875 | 0, // zasubd1_then_zasubq0 |
| 56876 | 0, // zasubd1_then_zasubq1 |
| 56877 | 0, // zasubs1_then_zasubd0 |
| 56878 | 0, // zasubs1_then_zasubd1 |
| 56879 | 0, // zasubs1_then_zasubq0 |
| 56880 | 0, // zasubs1_then_zasubq1 |
| 56881 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 56882 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 56883 | 0, // zasubh1_then_zasubd0 |
| 56884 | 0, // zasubh1_then_zasubd1 |
| 56885 | 0, // zasubh1_then_zasubq0 |
| 56886 | 0, // zasubh1_then_zasubq1 |
| 56887 | 0, // zasubh1_then_zasubs0 |
| 56888 | 0, // zasubh1_then_zasubs1 |
| 56889 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 56890 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 56891 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 56892 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 56893 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 56894 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 56895 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 56896 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 56897 | 175, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56898 | 175, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56899 | 175, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56900 | 175, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56901 | 175, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56902 | 175, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56903 | 0, // dsub3_then_bsub |
| 56904 | 0, // dsub3_then_bsub_hi |
| 56905 | 0, // dsub3_then_hsub |
| 56906 | 0, // dsub3_then_hsub_hi |
| 56907 | 0, // dsub3_then_ssub |
| 56908 | 0, // dsub3_then_ssub_hi |
| 56909 | 0, // dsub2_then_bsub |
| 56910 | 0, // dsub2_then_bsub_hi |
| 56911 | 0, // dsub2_then_hsub |
| 56912 | 0, // dsub2_then_hsub_hi |
| 56913 | 0, // dsub2_then_ssub |
| 56914 | 0, // dsub2_then_ssub_hi |
| 56915 | 0, // psub1_then_psub |
| 56916 | 175, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56917 | 0, // qsub3_then_dsub_hi |
| 56918 | 0, // qsub2_then_dsub_hi |
| 56919 | 0, // x8sub_7_then_sub_32 |
| 56920 | 0, // x8sub_7_then_sub_32_hi |
| 56921 | 0, // x8sub_6_then_sub_32 |
| 56922 | 0, // x8sub_6_then_sub_32_hi |
| 56923 | 0, // x8sub_5_then_sub_32 |
| 56924 | 0, // x8sub_5_then_sub_32_hi |
| 56925 | 0, // x8sub_4_then_sub_32 |
| 56926 | 0, // x8sub_4_then_sub_32_hi |
| 56927 | 0, // x8sub_3_then_sub_32 |
| 56928 | 0, // x8sub_3_then_sub_32_hi |
| 56929 | 0, // x8sub_2_then_sub_32 |
| 56930 | 0, // x8sub_2_then_sub_32_hi |
| 56931 | 0, // x8sub_1_then_sub_32 |
| 56932 | 0, // x8sub_1_then_sub_32_hi |
| 56933 | 0, // subo64_then_sub_32 |
| 56934 | 0, // subo64_then_sub_32_hi |
| 56935 | 175, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 56936 | 0, // zsub3_then_zsub_hi |
| 56937 | 0, // zsub2_then_zsub_hi |
| 56938 | 0, // dsub0_dsub1 |
| 56939 | 0, // dsub0_dsub1_dsub2 |
| 56940 | 0, // dsub1_dsub2 |
| 56941 | 0, // dsub1_dsub2_dsub3 |
| 56942 | 0, // dsub2_dsub3 |
| 56943 | 0, // dsub_dsub1 |
| 56944 | 0, // dsub_dsub1_dsub2_dsub3 |
| 56945 | 0, // dsub_dsub1_dsub2 |
| 56946 | 0, // qsub0_qsub1 |
| 56947 | 0, // qsub0_qsub1_qsub2 |
| 56948 | 0, // qsub1_qsub2 |
| 56949 | 0, // qsub1_qsub2_qsub3 |
| 56950 | 0, // qsub2_qsub3 |
| 56951 | 0, // sub_32_x8sub_1_then_sub_32 |
| 56952 | 0, // x8sub_0_x8sub_1 |
| 56953 | 0, // x8sub_2_x8sub_3 |
| 56954 | 0, // x8sub_4_x8sub_5 |
| 56955 | 0, // x8sub_6_x8sub_7 |
| 56956 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 56957 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 56958 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 56959 | 0, // sub_32_subo64_then_sub_32 |
| 56960 | 0, // zsub_qsub1 |
| 56961 | 0, // zsub_qsub1_qsub2_qsub3 |
| 56962 | 0, // zsub_qsub1_qsub2 |
| 56963 | 0, // zsub0_zsub1 |
| 56964 | 0, // zsub0_zsub1_zsub2 |
| 56965 | 0, // zsub1_zsub2 |
| 56966 | 0, // zsub1_zsub2_zsub3 |
| 56967 | 0, // zsub2_zsub3 |
| 56968 | 0, // zsub0_zsub2 |
| 56969 | 0, // zsub1_zsub3 |
| 56970 | }, |
| 56971 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56972 | 176, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56973 | 176, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56974 | 176, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56975 | 0, // dsub0 |
| 56976 | 176, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56977 | 0, // dsub2 |
| 56978 | 0, // dsub3 |
| 56979 | 176, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56980 | 176, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56981 | 176, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56982 | 0, // psub |
| 56983 | 0, // psub0 |
| 56984 | 0, // psub1 |
| 56985 | 0, // qsub0 |
| 56986 | 176, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56987 | 0, // qsub2 |
| 56988 | 0, // qsub3 |
| 56989 | 176, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56990 | 176, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 56991 | 0, // sub_32 |
| 56992 | 0, // sub_32_hi |
| 56993 | 0, // sube32 |
| 56994 | 0, // sube64 |
| 56995 | 0, // subo32 |
| 56996 | 0, // subo64 |
| 56997 | 0, // x8sub_0 |
| 56998 | 0, // x8sub_1 |
| 56999 | 0, // x8sub_2 |
| 57000 | 0, // x8sub_3 |
| 57001 | 0, // x8sub_4 |
| 57002 | 0, // x8sub_5 |
| 57003 | 0, // x8sub_6 |
| 57004 | 0, // x8sub_7 |
| 57005 | 0, // zasubb |
| 57006 | 0, // zasubd0 |
| 57007 | 0, // zasubd1 |
| 57008 | 0, // zasubh0 |
| 57009 | 0, // zasubh1 |
| 57010 | 0, // zasubq0 |
| 57011 | 0, // zasubq1 |
| 57012 | 0, // zasubs0 |
| 57013 | 0, // zasubs1 |
| 57014 | 176, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57015 | 176, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57016 | 176, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57017 | 0, // zsub2 |
| 57018 | 0, // zsub3 |
| 57019 | 176, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57020 | 0, // zasubd1_then_zasubq0 |
| 57021 | 0, // zasubd1_then_zasubq1 |
| 57022 | 0, // zasubs1_then_zasubd0 |
| 57023 | 0, // zasubs1_then_zasubd1 |
| 57024 | 0, // zasubs1_then_zasubq0 |
| 57025 | 0, // zasubs1_then_zasubq1 |
| 57026 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57027 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57028 | 0, // zasubh1_then_zasubd0 |
| 57029 | 0, // zasubh1_then_zasubd1 |
| 57030 | 0, // zasubh1_then_zasubq0 |
| 57031 | 0, // zasubh1_then_zasubq1 |
| 57032 | 0, // zasubh1_then_zasubs0 |
| 57033 | 0, // zasubh1_then_zasubs1 |
| 57034 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57035 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57036 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57037 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57038 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57039 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57040 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57041 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57042 | 176, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57043 | 176, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57044 | 176, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57045 | 176, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57046 | 176, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57047 | 176, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57048 | 0, // dsub3_then_bsub |
| 57049 | 0, // dsub3_then_bsub_hi |
| 57050 | 0, // dsub3_then_hsub |
| 57051 | 0, // dsub3_then_hsub_hi |
| 57052 | 0, // dsub3_then_ssub |
| 57053 | 0, // dsub3_then_ssub_hi |
| 57054 | 0, // dsub2_then_bsub |
| 57055 | 0, // dsub2_then_bsub_hi |
| 57056 | 0, // dsub2_then_hsub |
| 57057 | 0, // dsub2_then_hsub_hi |
| 57058 | 0, // dsub2_then_ssub |
| 57059 | 0, // dsub2_then_ssub_hi |
| 57060 | 0, // psub1_then_psub |
| 57061 | 176, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57062 | 0, // qsub3_then_dsub_hi |
| 57063 | 0, // qsub2_then_dsub_hi |
| 57064 | 0, // x8sub_7_then_sub_32 |
| 57065 | 0, // x8sub_7_then_sub_32_hi |
| 57066 | 0, // x8sub_6_then_sub_32 |
| 57067 | 0, // x8sub_6_then_sub_32_hi |
| 57068 | 0, // x8sub_5_then_sub_32 |
| 57069 | 0, // x8sub_5_then_sub_32_hi |
| 57070 | 0, // x8sub_4_then_sub_32 |
| 57071 | 0, // x8sub_4_then_sub_32_hi |
| 57072 | 0, // x8sub_3_then_sub_32 |
| 57073 | 0, // x8sub_3_then_sub_32_hi |
| 57074 | 0, // x8sub_2_then_sub_32 |
| 57075 | 0, // x8sub_2_then_sub_32_hi |
| 57076 | 0, // x8sub_1_then_sub_32 |
| 57077 | 0, // x8sub_1_then_sub_32_hi |
| 57078 | 0, // subo64_then_sub_32 |
| 57079 | 0, // subo64_then_sub_32_hi |
| 57080 | 176, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 57081 | 0, // zsub3_then_zsub_hi |
| 57082 | 0, // zsub2_then_zsub_hi |
| 57083 | 0, // dsub0_dsub1 |
| 57084 | 0, // dsub0_dsub1_dsub2 |
| 57085 | 0, // dsub1_dsub2 |
| 57086 | 0, // dsub1_dsub2_dsub3 |
| 57087 | 0, // dsub2_dsub3 |
| 57088 | 0, // dsub_dsub1 |
| 57089 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57090 | 0, // dsub_dsub1_dsub2 |
| 57091 | 0, // qsub0_qsub1 |
| 57092 | 0, // qsub0_qsub1_qsub2 |
| 57093 | 0, // qsub1_qsub2 |
| 57094 | 0, // qsub1_qsub2_qsub3 |
| 57095 | 0, // qsub2_qsub3 |
| 57096 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57097 | 0, // x8sub_0_x8sub_1 |
| 57098 | 0, // x8sub_2_x8sub_3 |
| 57099 | 0, // x8sub_4_x8sub_5 |
| 57100 | 0, // x8sub_6_x8sub_7 |
| 57101 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57102 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57103 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57104 | 0, // sub_32_subo64_then_sub_32 |
| 57105 | 0, // zsub_qsub1 |
| 57106 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57107 | 0, // zsub_qsub1_qsub2 |
| 57108 | 0, // zsub0_zsub1 |
| 57109 | 0, // zsub0_zsub1_zsub2 |
| 57110 | 0, // zsub1_zsub2 |
| 57111 | 0, // zsub1_zsub2_zsub3 |
| 57112 | 0, // zsub2_zsub3 |
| 57113 | 0, // zsub0_zsub2 |
| 57114 | 0, // zsub1_zsub3 |
| 57115 | }, |
| 57116 | { // ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57117 | 177, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57118 | 177, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57119 | 177, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57120 | 0, // dsub0 |
| 57121 | 177, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57122 | 0, // dsub2 |
| 57123 | 0, // dsub3 |
| 57124 | 177, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57125 | 177, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57126 | 177, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57127 | 0, // psub |
| 57128 | 0, // psub0 |
| 57129 | 0, // psub1 |
| 57130 | 0, // qsub0 |
| 57131 | 177, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57132 | 0, // qsub2 |
| 57133 | 0, // qsub3 |
| 57134 | 177, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57135 | 177, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57136 | 0, // sub_32 |
| 57137 | 0, // sub_32_hi |
| 57138 | 0, // sube32 |
| 57139 | 0, // sube64 |
| 57140 | 0, // subo32 |
| 57141 | 0, // subo64 |
| 57142 | 0, // x8sub_0 |
| 57143 | 0, // x8sub_1 |
| 57144 | 0, // x8sub_2 |
| 57145 | 0, // x8sub_3 |
| 57146 | 0, // x8sub_4 |
| 57147 | 0, // x8sub_5 |
| 57148 | 0, // x8sub_6 |
| 57149 | 0, // x8sub_7 |
| 57150 | 0, // zasubb |
| 57151 | 0, // zasubd0 |
| 57152 | 0, // zasubd1 |
| 57153 | 0, // zasubh0 |
| 57154 | 0, // zasubh1 |
| 57155 | 0, // zasubq0 |
| 57156 | 0, // zasubq1 |
| 57157 | 0, // zasubs0 |
| 57158 | 0, // zasubs1 |
| 57159 | 177, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57160 | 177, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57161 | 177, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57162 | 0, // zsub2 |
| 57163 | 0, // zsub3 |
| 57164 | 177, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57165 | 0, // zasubd1_then_zasubq0 |
| 57166 | 0, // zasubd1_then_zasubq1 |
| 57167 | 0, // zasubs1_then_zasubd0 |
| 57168 | 0, // zasubs1_then_zasubd1 |
| 57169 | 0, // zasubs1_then_zasubq0 |
| 57170 | 0, // zasubs1_then_zasubq1 |
| 57171 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57172 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57173 | 0, // zasubh1_then_zasubd0 |
| 57174 | 0, // zasubh1_then_zasubd1 |
| 57175 | 0, // zasubh1_then_zasubq0 |
| 57176 | 0, // zasubh1_then_zasubq1 |
| 57177 | 0, // zasubh1_then_zasubs0 |
| 57178 | 0, // zasubh1_then_zasubs1 |
| 57179 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57180 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57181 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57182 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57183 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57184 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57185 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57186 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57187 | 177, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57188 | 177, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57189 | 177, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57190 | 177, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57191 | 177, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57192 | 177, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57193 | 0, // dsub3_then_bsub |
| 57194 | 0, // dsub3_then_bsub_hi |
| 57195 | 0, // dsub3_then_hsub |
| 57196 | 0, // dsub3_then_hsub_hi |
| 57197 | 0, // dsub3_then_ssub |
| 57198 | 0, // dsub3_then_ssub_hi |
| 57199 | 0, // dsub2_then_bsub |
| 57200 | 0, // dsub2_then_bsub_hi |
| 57201 | 0, // dsub2_then_hsub |
| 57202 | 0, // dsub2_then_hsub_hi |
| 57203 | 0, // dsub2_then_ssub |
| 57204 | 0, // dsub2_then_ssub_hi |
| 57205 | 0, // psub1_then_psub |
| 57206 | 177, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57207 | 0, // qsub3_then_dsub_hi |
| 57208 | 0, // qsub2_then_dsub_hi |
| 57209 | 0, // x8sub_7_then_sub_32 |
| 57210 | 0, // x8sub_7_then_sub_32_hi |
| 57211 | 0, // x8sub_6_then_sub_32 |
| 57212 | 0, // x8sub_6_then_sub_32_hi |
| 57213 | 0, // x8sub_5_then_sub_32 |
| 57214 | 0, // x8sub_5_then_sub_32_hi |
| 57215 | 0, // x8sub_4_then_sub_32 |
| 57216 | 0, // x8sub_4_then_sub_32_hi |
| 57217 | 0, // x8sub_3_then_sub_32 |
| 57218 | 0, // x8sub_3_then_sub_32_hi |
| 57219 | 0, // x8sub_2_then_sub_32 |
| 57220 | 0, // x8sub_2_then_sub_32_hi |
| 57221 | 0, // x8sub_1_then_sub_32 |
| 57222 | 0, // x8sub_1_then_sub_32_hi |
| 57223 | 0, // subo64_then_sub_32 |
| 57224 | 0, // subo64_then_sub_32_hi |
| 57225 | 177, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 57226 | 0, // zsub3_then_zsub_hi |
| 57227 | 0, // zsub2_then_zsub_hi |
| 57228 | 0, // dsub0_dsub1 |
| 57229 | 0, // dsub0_dsub1_dsub2 |
| 57230 | 0, // dsub1_dsub2 |
| 57231 | 0, // dsub1_dsub2_dsub3 |
| 57232 | 0, // dsub2_dsub3 |
| 57233 | 0, // dsub_dsub1 |
| 57234 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57235 | 0, // dsub_dsub1_dsub2 |
| 57236 | 0, // qsub0_qsub1 |
| 57237 | 0, // qsub0_qsub1_qsub2 |
| 57238 | 0, // qsub1_qsub2 |
| 57239 | 0, // qsub1_qsub2_qsub3 |
| 57240 | 0, // qsub2_qsub3 |
| 57241 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57242 | 0, // x8sub_0_x8sub_1 |
| 57243 | 0, // x8sub_2_x8sub_3 |
| 57244 | 0, // x8sub_4_x8sub_5 |
| 57245 | 0, // x8sub_6_x8sub_7 |
| 57246 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57247 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57248 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57249 | 0, // sub_32_subo64_then_sub_32 |
| 57250 | 0, // zsub_qsub1 |
| 57251 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57252 | 0, // zsub_qsub1_qsub2 |
| 57253 | 0, // zsub0_zsub1 |
| 57254 | 0, // zsub0_zsub1_zsub2 |
| 57255 | 0, // zsub1_zsub2 |
| 57256 | 0, // zsub1_zsub2_zsub3 |
| 57257 | 0, // zsub2_zsub3 |
| 57258 | 0, // zsub0_zsub2 |
| 57259 | 0, // zsub1_zsub3 |
| 57260 | }, |
| 57261 | { // ZPR2Strided_with_zsub0_in_ZPR_K |
| 57262 | 178, // bsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57263 | 178, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57264 | 178, // dsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57265 | 0, // dsub0 |
| 57266 | 178, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57267 | 0, // dsub2 |
| 57268 | 0, // dsub3 |
| 57269 | 178, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57270 | 178, // hsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57271 | 178, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57272 | 0, // psub |
| 57273 | 0, // psub0 |
| 57274 | 0, // psub1 |
| 57275 | 0, // qsub0 |
| 57276 | 178, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57277 | 0, // qsub2 |
| 57278 | 0, // qsub3 |
| 57279 | 178, // ssub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57280 | 178, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57281 | 0, // sub_32 |
| 57282 | 0, // sub_32_hi |
| 57283 | 0, // sube32 |
| 57284 | 0, // sube64 |
| 57285 | 0, // subo32 |
| 57286 | 0, // subo64 |
| 57287 | 0, // x8sub_0 |
| 57288 | 0, // x8sub_1 |
| 57289 | 0, // x8sub_2 |
| 57290 | 0, // x8sub_3 |
| 57291 | 0, // x8sub_4 |
| 57292 | 0, // x8sub_5 |
| 57293 | 0, // x8sub_6 |
| 57294 | 0, // x8sub_7 |
| 57295 | 0, // zasubb |
| 57296 | 0, // zasubd0 |
| 57297 | 0, // zasubd1 |
| 57298 | 0, // zasubh0 |
| 57299 | 0, // zasubh1 |
| 57300 | 0, // zasubq0 |
| 57301 | 0, // zasubq1 |
| 57302 | 0, // zasubs0 |
| 57303 | 0, // zasubs1 |
| 57304 | 178, // zsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57305 | 178, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57306 | 178, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57307 | 0, // zsub2 |
| 57308 | 0, // zsub3 |
| 57309 | 178, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57310 | 0, // zasubd1_then_zasubq0 |
| 57311 | 0, // zasubd1_then_zasubq1 |
| 57312 | 0, // zasubs1_then_zasubd0 |
| 57313 | 0, // zasubs1_then_zasubd1 |
| 57314 | 0, // zasubs1_then_zasubq0 |
| 57315 | 0, // zasubs1_then_zasubq1 |
| 57316 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57317 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57318 | 0, // zasubh1_then_zasubd0 |
| 57319 | 0, // zasubh1_then_zasubd1 |
| 57320 | 0, // zasubh1_then_zasubq0 |
| 57321 | 0, // zasubh1_then_zasubq1 |
| 57322 | 0, // zasubh1_then_zasubs0 |
| 57323 | 0, // zasubh1_then_zasubs1 |
| 57324 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57325 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57326 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57327 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57328 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57329 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57330 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57331 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57332 | 178, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57333 | 178, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57334 | 178, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57335 | 178, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57336 | 178, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57337 | 178, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57338 | 0, // dsub3_then_bsub |
| 57339 | 0, // dsub3_then_bsub_hi |
| 57340 | 0, // dsub3_then_hsub |
| 57341 | 0, // dsub3_then_hsub_hi |
| 57342 | 0, // dsub3_then_ssub |
| 57343 | 0, // dsub3_then_ssub_hi |
| 57344 | 0, // dsub2_then_bsub |
| 57345 | 0, // dsub2_then_bsub_hi |
| 57346 | 0, // dsub2_then_hsub |
| 57347 | 0, // dsub2_then_hsub_hi |
| 57348 | 0, // dsub2_then_ssub |
| 57349 | 0, // dsub2_then_ssub_hi |
| 57350 | 0, // psub1_then_psub |
| 57351 | 178, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57352 | 0, // qsub3_then_dsub_hi |
| 57353 | 0, // qsub2_then_dsub_hi |
| 57354 | 0, // x8sub_7_then_sub_32 |
| 57355 | 0, // x8sub_7_then_sub_32_hi |
| 57356 | 0, // x8sub_6_then_sub_32 |
| 57357 | 0, // x8sub_6_then_sub_32_hi |
| 57358 | 0, // x8sub_5_then_sub_32 |
| 57359 | 0, // x8sub_5_then_sub_32_hi |
| 57360 | 0, // x8sub_4_then_sub_32 |
| 57361 | 0, // x8sub_4_then_sub_32_hi |
| 57362 | 0, // x8sub_3_then_sub_32 |
| 57363 | 0, // x8sub_3_then_sub_32_hi |
| 57364 | 0, // x8sub_2_then_sub_32 |
| 57365 | 0, // x8sub_2_then_sub_32_hi |
| 57366 | 0, // x8sub_1_then_sub_32 |
| 57367 | 0, // x8sub_1_then_sub_32_hi |
| 57368 | 0, // subo64_then_sub_32 |
| 57369 | 0, // subo64_then_sub_32_hi |
| 57370 | 178, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 57371 | 0, // zsub3_then_zsub_hi |
| 57372 | 0, // zsub2_then_zsub_hi |
| 57373 | 0, // dsub0_dsub1 |
| 57374 | 0, // dsub0_dsub1_dsub2 |
| 57375 | 0, // dsub1_dsub2 |
| 57376 | 0, // dsub1_dsub2_dsub3 |
| 57377 | 0, // dsub2_dsub3 |
| 57378 | 0, // dsub_dsub1 |
| 57379 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57380 | 0, // dsub_dsub1_dsub2 |
| 57381 | 0, // qsub0_qsub1 |
| 57382 | 0, // qsub0_qsub1_qsub2 |
| 57383 | 0, // qsub1_qsub2 |
| 57384 | 0, // qsub1_qsub2_qsub3 |
| 57385 | 0, // qsub2_qsub3 |
| 57386 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57387 | 0, // x8sub_0_x8sub_1 |
| 57388 | 0, // x8sub_2_x8sub_3 |
| 57389 | 0, // x8sub_4_x8sub_5 |
| 57390 | 0, // x8sub_6_x8sub_7 |
| 57391 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57392 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57393 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57394 | 0, // sub_32_subo64_then_sub_32 |
| 57395 | 0, // zsub_qsub1 |
| 57396 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57397 | 0, // zsub_qsub1_qsub2 |
| 57398 | 0, // zsub0_zsub1 |
| 57399 | 0, // zsub0_zsub1_zsub2 |
| 57400 | 0, // zsub1_zsub2 |
| 57401 | 0, // zsub1_zsub2_zsub3 |
| 57402 | 0, // zsub2_zsub3 |
| 57403 | 0, // zsub0_zsub2 |
| 57404 | 0, // zsub1_zsub3 |
| 57405 | }, |
| 57406 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57407 | 179, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57408 | 179, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57409 | 179, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57410 | 0, // dsub0 |
| 57411 | 179, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57412 | 0, // dsub2 |
| 57413 | 0, // dsub3 |
| 57414 | 179, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57415 | 179, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57416 | 179, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57417 | 0, // psub |
| 57418 | 0, // psub0 |
| 57419 | 0, // psub1 |
| 57420 | 0, // qsub0 |
| 57421 | 179, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57422 | 0, // qsub2 |
| 57423 | 0, // qsub3 |
| 57424 | 179, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57425 | 179, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57426 | 0, // sub_32 |
| 57427 | 0, // sub_32_hi |
| 57428 | 0, // sube32 |
| 57429 | 0, // sube64 |
| 57430 | 0, // subo32 |
| 57431 | 0, // subo64 |
| 57432 | 0, // x8sub_0 |
| 57433 | 0, // x8sub_1 |
| 57434 | 0, // x8sub_2 |
| 57435 | 0, // x8sub_3 |
| 57436 | 0, // x8sub_4 |
| 57437 | 0, // x8sub_5 |
| 57438 | 0, // x8sub_6 |
| 57439 | 0, // x8sub_7 |
| 57440 | 0, // zasubb |
| 57441 | 0, // zasubd0 |
| 57442 | 0, // zasubd1 |
| 57443 | 0, // zasubh0 |
| 57444 | 0, // zasubh1 |
| 57445 | 0, // zasubq0 |
| 57446 | 0, // zasubq1 |
| 57447 | 0, // zasubs0 |
| 57448 | 0, // zasubs1 |
| 57449 | 179, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57450 | 179, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57451 | 179, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57452 | 0, // zsub2 |
| 57453 | 0, // zsub3 |
| 57454 | 179, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57455 | 0, // zasubd1_then_zasubq0 |
| 57456 | 0, // zasubd1_then_zasubq1 |
| 57457 | 0, // zasubs1_then_zasubd0 |
| 57458 | 0, // zasubs1_then_zasubd1 |
| 57459 | 0, // zasubs1_then_zasubq0 |
| 57460 | 0, // zasubs1_then_zasubq1 |
| 57461 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57462 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57463 | 0, // zasubh1_then_zasubd0 |
| 57464 | 0, // zasubh1_then_zasubd1 |
| 57465 | 0, // zasubh1_then_zasubq0 |
| 57466 | 0, // zasubh1_then_zasubq1 |
| 57467 | 0, // zasubh1_then_zasubs0 |
| 57468 | 0, // zasubh1_then_zasubs1 |
| 57469 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57470 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57471 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57472 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57473 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57474 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57475 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57476 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57477 | 179, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57478 | 179, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57479 | 179, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57480 | 179, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57481 | 179, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57482 | 179, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57483 | 0, // dsub3_then_bsub |
| 57484 | 0, // dsub3_then_bsub_hi |
| 57485 | 0, // dsub3_then_hsub |
| 57486 | 0, // dsub3_then_hsub_hi |
| 57487 | 0, // dsub3_then_ssub |
| 57488 | 0, // dsub3_then_ssub_hi |
| 57489 | 0, // dsub2_then_bsub |
| 57490 | 0, // dsub2_then_bsub_hi |
| 57491 | 0, // dsub2_then_hsub |
| 57492 | 0, // dsub2_then_hsub_hi |
| 57493 | 0, // dsub2_then_ssub |
| 57494 | 0, // dsub2_then_ssub_hi |
| 57495 | 0, // psub1_then_psub |
| 57496 | 179, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57497 | 0, // qsub3_then_dsub_hi |
| 57498 | 0, // qsub2_then_dsub_hi |
| 57499 | 0, // x8sub_7_then_sub_32 |
| 57500 | 0, // x8sub_7_then_sub_32_hi |
| 57501 | 0, // x8sub_6_then_sub_32 |
| 57502 | 0, // x8sub_6_then_sub_32_hi |
| 57503 | 0, // x8sub_5_then_sub_32 |
| 57504 | 0, // x8sub_5_then_sub_32_hi |
| 57505 | 0, // x8sub_4_then_sub_32 |
| 57506 | 0, // x8sub_4_then_sub_32_hi |
| 57507 | 0, // x8sub_3_then_sub_32 |
| 57508 | 0, // x8sub_3_then_sub_32_hi |
| 57509 | 0, // x8sub_2_then_sub_32 |
| 57510 | 0, // x8sub_2_then_sub_32_hi |
| 57511 | 0, // x8sub_1_then_sub_32 |
| 57512 | 0, // x8sub_1_then_sub_32_hi |
| 57513 | 0, // subo64_then_sub_32 |
| 57514 | 0, // subo64_then_sub_32_hi |
| 57515 | 179, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57516 | 0, // zsub3_then_zsub_hi |
| 57517 | 0, // zsub2_then_zsub_hi |
| 57518 | 0, // dsub0_dsub1 |
| 57519 | 0, // dsub0_dsub1_dsub2 |
| 57520 | 0, // dsub1_dsub2 |
| 57521 | 0, // dsub1_dsub2_dsub3 |
| 57522 | 0, // dsub2_dsub3 |
| 57523 | 179, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57524 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57525 | 0, // dsub_dsub1_dsub2 |
| 57526 | 0, // qsub0_qsub1 |
| 57527 | 0, // qsub0_qsub1_qsub2 |
| 57528 | 0, // qsub1_qsub2 |
| 57529 | 0, // qsub1_qsub2_qsub3 |
| 57530 | 0, // qsub2_qsub3 |
| 57531 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57532 | 0, // x8sub_0_x8sub_1 |
| 57533 | 0, // x8sub_2_x8sub_3 |
| 57534 | 0, // x8sub_4_x8sub_5 |
| 57535 | 0, // x8sub_6_x8sub_7 |
| 57536 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57537 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57538 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57539 | 0, // sub_32_subo64_then_sub_32 |
| 57540 | 179, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 57541 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57542 | 0, // zsub_qsub1_qsub2 |
| 57543 | 0, // zsub0_zsub1 |
| 57544 | 0, // zsub0_zsub1_zsub2 |
| 57545 | 0, // zsub1_zsub2 |
| 57546 | 0, // zsub1_zsub2_zsub3 |
| 57547 | 0, // zsub2_zsub3 |
| 57548 | 0, // zsub0_zsub2 |
| 57549 | 0, // zsub1_zsub3 |
| 57550 | }, |
| 57551 | { // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57552 | 180, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57553 | 180, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57554 | 180, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57555 | 0, // dsub0 |
| 57556 | 180, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57557 | 0, // dsub2 |
| 57558 | 0, // dsub3 |
| 57559 | 180, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57560 | 180, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57561 | 180, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57562 | 0, // psub |
| 57563 | 0, // psub0 |
| 57564 | 0, // psub1 |
| 57565 | 0, // qsub0 |
| 57566 | 180, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57567 | 0, // qsub2 |
| 57568 | 0, // qsub3 |
| 57569 | 180, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57570 | 180, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57571 | 0, // sub_32 |
| 57572 | 0, // sub_32_hi |
| 57573 | 0, // sube32 |
| 57574 | 0, // sube64 |
| 57575 | 0, // subo32 |
| 57576 | 0, // subo64 |
| 57577 | 0, // x8sub_0 |
| 57578 | 0, // x8sub_1 |
| 57579 | 0, // x8sub_2 |
| 57580 | 0, // x8sub_3 |
| 57581 | 0, // x8sub_4 |
| 57582 | 0, // x8sub_5 |
| 57583 | 0, // x8sub_6 |
| 57584 | 0, // x8sub_7 |
| 57585 | 0, // zasubb |
| 57586 | 0, // zasubd0 |
| 57587 | 0, // zasubd1 |
| 57588 | 0, // zasubh0 |
| 57589 | 0, // zasubh1 |
| 57590 | 0, // zasubq0 |
| 57591 | 0, // zasubq1 |
| 57592 | 0, // zasubs0 |
| 57593 | 0, // zasubs1 |
| 57594 | 180, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57595 | 180, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57596 | 180, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57597 | 0, // zsub2 |
| 57598 | 0, // zsub3 |
| 57599 | 180, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57600 | 0, // zasubd1_then_zasubq0 |
| 57601 | 0, // zasubd1_then_zasubq1 |
| 57602 | 0, // zasubs1_then_zasubd0 |
| 57603 | 0, // zasubs1_then_zasubd1 |
| 57604 | 0, // zasubs1_then_zasubq0 |
| 57605 | 0, // zasubs1_then_zasubq1 |
| 57606 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57607 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57608 | 0, // zasubh1_then_zasubd0 |
| 57609 | 0, // zasubh1_then_zasubd1 |
| 57610 | 0, // zasubh1_then_zasubq0 |
| 57611 | 0, // zasubh1_then_zasubq1 |
| 57612 | 0, // zasubh1_then_zasubs0 |
| 57613 | 0, // zasubh1_then_zasubs1 |
| 57614 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57615 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57616 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57617 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57618 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57619 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57620 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57621 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57622 | 180, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57623 | 180, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57624 | 180, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57625 | 180, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57626 | 180, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57627 | 180, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57628 | 0, // dsub3_then_bsub |
| 57629 | 0, // dsub3_then_bsub_hi |
| 57630 | 0, // dsub3_then_hsub |
| 57631 | 0, // dsub3_then_hsub_hi |
| 57632 | 0, // dsub3_then_ssub |
| 57633 | 0, // dsub3_then_ssub_hi |
| 57634 | 0, // dsub2_then_bsub |
| 57635 | 0, // dsub2_then_bsub_hi |
| 57636 | 0, // dsub2_then_hsub |
| 57637 | 0, // dsub2_then_hsub_hi |
| 57638 | 0, // dsub2_then_ssub |
| 57639 | 0, // dsub2_then_ssub_hi |
| 57640 | 0, // psub1_then_psub |
| 57641 | 180, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57642 | 0, // qsub3_then_dsub_hi |
| 57643 | 0, // qsub2_then_dsub_hi |
| 57644 | 0, // x8sub_7_then_sub_32 |
| 57645 | 0, // x8sub_7_then_sub_32_hi |
| 57646 | 0, // x8sub_6_then_sub_32 |
| 57647 | 0, // x8sub_6_then_sub_32_hi |
| 57648 | 0, // x8sub_5_then_sub_32 |
| 57649 | 0, // x8sub_5_then_sub_32_hi |
| 57650 | 0, // x8sub_4_then_sub_32 |
| 57651 | 0, // x8sub_4_then_sub_32_hi |
| 57652 | 0, // x8sub_3_then_sub_32 |
| 57653 | 0, // x8sub_3_then_sub_32_hi |
| 57654 | 0, // x8sub_2_then_sub_32 |
| 57655 | 0, // x8sub_2_then_sub_32_hi |
| 57656 | 0, // x8sub_1_then_sub_32 |
| 57657 | 0, // x8sub_1_then_sub_32_hi |
| 57658 | 0, // subo64_then_sub_32 |
| 57659 | 0, // subo64_then_sub_32_hi |
| 57660 | 180, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57661 | 0, // zsub3_then_zsub_hi |
| 57662 | 0, // zsub2_then_zsub_hi |
| 57663 | 0, // dsub0_dsub1 |
| 57664 | 0, // dsub0_dsub1_dsub2 |
| 57665 | 0, // dsub1_dsub2 |
| 57666 | 0, // dsub1_dsub2_dsub3 |
| 57667 | 0, // dsub2_dsub3 |
| 57668 | 180, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57669 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57670 | 0, // dsub_dsub1_dsub2 |
| 57671 | 0, // qsub0_qsub1 |
| 57672 | 0, // qsub0_qsub1_qsub2 |
| 57673 | 0, // qsub1_qsub2 |
| 57674 | 0, // qsub1_qsub2_qsub3 |
| 57675 | 0, // qsub2_qsub3 |
| 57676 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57677 | 0, // x8sub_0_x8sub_1 |
| 57678 | 0, // x8sub_2_x8sub_3 |
| 57679 | 0, // x8sub_4_x8sub_5 |
| 57680 | 0, // x8sub_6_x8sub_7 |
| 57681 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57682 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57683 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57684 | 0, // sub_32_subo64_then_sub_32 |
| 57685 | 180, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 57686 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57687 | 0, // zsub_qsub1_qsub2 |
| 57688 | 0, // zsub0_zsub1 |
| 57689 | 0, // zsub0_zsub1_zsub2 |
| 57690 | 0, // zsub1_zsub2 |
| 57691 | 0, // zsub1_zsub2_zsub3 |
| 57692 | 0, // zsub2_zsub3 |
| 57693 | 0, // zsub0_zsub2 |
| 57694 | 0, // zsub1_zsub3 |
| 57695 | }, |
| 57696 | { // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57697 | 181, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57698 | 181, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57699 | 181, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57700 | 0, // dsub0 |
| 57701 | 181, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57702 | 0, // dsub2 |
| 57703 | 0, // dsub3 |
| 57704 | 181, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57705 | 181, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57706 | 181, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57707 | 0, // psub |
| 57708 | 0, // psub0 |
| 57709 | 0, // psub1 |
| 57710 | 0, // qsub0 |
| 57711 | 181, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57712 | 0, // qsub2 |
| 57713 | 0, // qsub3 |
| 57714 | 181, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57715 | 181, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57716 | 0, // sub_32 |
| 57717 | 0, // sub_32_hi |
| 57718 | 0, // sube32 |
| 57719 | 0, // sube64 |
| 57720 | 0, // subo32 |
| 57721 | 0, // subo64 |
| 57722 | 0, // x8sub_0 |
| 57723 | 0, // x8sub_1 |
| 57724 | 0, // x8sub_2 |
| 57725 | 0, // x8sub_3 |
| 57726 | 0, // x8sub_4 |
| 57727 | 0, // x8sub_5 |
| 57728 | 0, // x8sub_6 |
| 57729 | 0, // x8sub_7 |
| 57730 | 0, // zasubb |
| 57731 | 0, // zasubd0 |
| 57732 | 0, // zasubd1 |
| 57733 | 0, // zasubh0 |
| 57734 | 0, // zasubh1 |
| 57735 | 0, // zasubq0 |
| 57736 | 0, // zasubq1 |
| 57737 | 0, // zasubs0 |
| 57738 | 0, // zasubs1 |
| 57739 | 181, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57740 | 181, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57741 | 181, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57742 | 0, // zsub2 |
| 57743 | 0, // zsub3 |
| 57744 | 181, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57745 | 0, // zasubd1_then_zasubq0 |
| 57746 | 0, // zasubd1_then_zasubq1 |
| 57747 | 0, // zasubs1_then_zasubd0 |
| 57748 | 0, // zasubs1_then_zasubd1 |
| 57749 | 0, // zasubs1_then_zasubq0 |
| 57750 | 0, // zasubs1_then_zasubq1 |
| 57751 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57752 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57753 | 0, // zasubh1_then_zasubd0 |
| 57754 | 0, // zasubh1_then_zasubd1 |
| 57755 | 0, // zasubh1_then_zasubq0 |
| 57756 | 0, // zasubh1_then_zasubq1 |
| 57757 | 0, // zasubh1_then_zasubs0 |
| 57758 | 0, // zasubh1_then_zasubs1 |
| 57759 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57760 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57761 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57762 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57763 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57764 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57765 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57766 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57767 | 181, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57768 | 181, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57769 | 181, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57770 | 181, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57771 | 181, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57772 | 181, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57773 | 0, // dsub3_then_bsub |
| 57774 | 0, // dsub3_then_bsub_hi |
| 57775 | 0, // dsub3_then_hsub |
| 57776 | 0, // dsub3_then_hsub_hi |
| 57777 | 0, // dsub3_then_ssub |
| 57778 | 0, // dsub3_then_ssub_hi |
| 57779 | 0, // dsub2_then_bsub |
| 57780 | 0, // dsub2_then_bsub_hi |
| 57781 | 0, // dsub2_then_hsub |
| 57782 | 0, // dsub2_then_hsub_hi |
| 57783 | 0, // dsub2_then_ssub |
| 57784 | 0, // dsub2_then_ssub_hi |
| 57785 | 0, // psub1_then_psub |
| 57786 | 181, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57787 | 0, // qsub3_then_dsub_hi |
| 57788 | 0, // qsub2_then_dsub_hi |
| 57789 | 0, // x8sub_7_then_sub_32 |
| 57790 | 0, // x8sub_7_then_sub_32_hi |
| 57791 | 0, // x8sub_6_then_sub_32 |
| 57792 | 0, // x8sub_6_then_sub_32_hi |
| 57793 | 0, // x8sub_5_then_sub_32 |
| 57794 | 0, // x8sub_5_then_sub_32_hi |
| 57795 | 0, // x8sub_4_then_sub_32 |
| 57796 | 0, // x8sub_4_then_sub_32_hi |
| 57797 | 0, // x8sub_3_then_sub_32 |
| 57798 | 0, // x8sub_3_then_sub_32_hi |
| 57799 | 0, // x8sub_2_then_sub_32 |
| 57800 | 0, // x8sub_2_then_sub_32_hi |
| 57801 | 0, // x8sub_1_then_sub_32 |
| 57802 | 0, // x8sub_1_then_sub_32_hi |
| 57803 | 0, // subo64_then_sub_32 |
| 57804 | 0, // subo64_then_sub_32_hi |
| 57805 | 181, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57806 | 0, // zsub3_then_zsub_hi |
| 57807 | 0, // zsub2_then_zsub_hi |
| 57808 | 0, // dsub0_dsub1 |
| 57809 | 0, // dsub0_dsub1_dsub2 |
| 57810 | 0, // dsub1_dsub2 |
| 57811 | 0, // dsub1_dsub2_dsub3 |
| 57812 | 0, // dsub2_dsub3 |
| 57813 | 181, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57814 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57815 | 0, // dsub_dsub1_dsub2 |
| 57816 | 0, // qsub0_qsub1 |
| 57817 | 0, // qsub0_qsub1_qsub2 |
| 57818 | 0, // qsub1_qsub2 |
| 57819 | 0, // qsub1_qsub2_qsub3 |
| 57820 | 0, // qsub2_qsub3 |
| 57821 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57822 | 0, // x8sub_0_x8sub_1 |
| 57823 | 0, // x8sub_2_x8sub_3 |
| 57824 | 0, // x8sub_4_x8sub_5 |
| 57825 | 0, // x8sub_6_x8sub_7 |
| 57826 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57827 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57828 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57829 | 0, // sub_32_subo64_then_sub_32 |
| 57830 | 181, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 57831 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57832 | 0, // zsub_qsub1_qsub2 |
| 57833 | 0, // zsub0_zsub1 |
| 57834 | 0, // zsub0_zsub1_zsub2 |
| 57835 | 0, // zsub1_zsub2 |
| 57836 | 0, // zsub1_zsub2_zsub3 |
| 57837 | 0, // zsub2_zsub3 |
| 57838 | 0, // zsub0_zsub2 |
| 57839 | 0, // zsub1_zsub3 |
| 57840 | }, |
| 57841 | { // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57842 | 182, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57843 | 182, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57844 | 182, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57845 | 0, // dsub0 |
| 57846 | 182, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57847 | 0, // dsub2 |
| 57848 | 0, // dsub3 |
| 57849 | 182, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57850 | 182, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57851 | 182, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57852 | 0, // psub |
| 57853 | 0, // psub0 |
| 57854 | 0, // psub1 |
| 57855 | 0, // qsub0 |
| 57856 | 182, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57857 | 0, // qsub2 |
| 57858 | 0, // qsub3 |
| 57859 | 182, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57860 | 182, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57861 | 0, // sub_32 |
| 57862 | 0, // sub_32_hi |
| 57863 | 0, // sube32 |
| 57864 | 0, // sube64 |
| 57865 | 0, // subo32 |
| 57866 | 0, // subo64 |
| 57867 | 0, // x8sub_0 |
| 57868 | 0, // x8sub_1 |
| 57869 | 0, // x8sub_2 |
| 57870 | 0, // x8sub_3 |
| 57871 | 0, // x8sub_4 |
| 57872 | 0, // x8sub_5 |
| 57873 | 0, // x8sub_6 |
| 57874 | 0, // x8sub_7 |
| 57875 | 0, // zasubb |
| 57876 | 0, // zasubd0 |
| 57877 | 0, // zasubd1 |
| 57878 | 0, // zasubh0 |
| 57879 | 0, // zasubh1 |
| 57880 | 0, // zasubq0 |
| 57881 | 0, // zasubq1 |
| 57882 | 0, // zasubs0 |
| 57883 | 0, // zasubs1 |
| 57884 | 182, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57885 | 182, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57886 | 182, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57887 | 0, // zsub2 |
| 57888 | 0, // zsub3 |
| 57889 | 182, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57890 | 0, // zasubd1_then_zasubq0 |
| 57891 | 0, // zasubd1_then_zasubq1 |
| 57892 | 0, // zasubs1_then_zasubd0 |
| 57893 | 0, // zasubs1_then_zasubd1 |
| 57894 | 0, // zasubs1_then_zasubq0 |
| 57895 | 0, // zasubs1_then_zasubq1 |
| 57896 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 57897 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 57898 | 0, // zasubh1_then_zasubd0 |
| 57899 | 0, // zasubh1_then_zasubd1 |
| 57900 | 0, // zasubh1_then_zasubq0 |
| 57901 | 0, // zasubh1_then_zasubq1 |
| 57902 | 0, // zasubh1_then_zasubs0 |
| 57903 | 0, // zasubh1_then_zasubs1 |
| 57904 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 57905 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 57906 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 57907 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 57908 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 57909 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 57910 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 57911 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 57912 | 182, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57913 | 182, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57914 | 182, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57915 | 182, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57916 | 182, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57917 | 182, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57918 | 0, // dsub3_then_bsub |
| 57919 | 0, // dsub3_then_bsub_hi |
| 57920 | 0, // dsub3_then_hsub |
| 57921 | 0, // dsub3_then_hsub_hi |
| 57922 | 0, // dsub3_then_ssub |
| 57923 | 0, // dsub3_then_ssub_hi |
| 57924 | 0, // dsub2_then_bsub |
| 57925 | 0, // dsub2_then_bsub_hi |
| 57926 | 0, // dsub2_then_hsub |
| 57927 | 0, // dsub2_then_hsub_hi |
| 57928 | 0, // dsub2_then_ssub |
| 57929 | 0, // dsub2_then_ssub_hi |
| 57930 | 0, // psub1_then_psub |
| 57931 | 182, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57932 | 0, // qsub3_then_dsub_hi |
| 57933 | 0, // qsub2_then_dsub_hi |
| 57934 | 0, // x8sub_7_then_sub_32 |
| 57935 | 0, // x8sub_7_then_sub_32_hi |
| 57936 | 0, // x8sub_6_then_sub_32 |
| 57937 | 0, // x8sub_6_then_sub_32_hi |
| 57938 | 0, // x8sub_5_then_sub_32 |
| 57939 | 0, // x8sub_5_then_sub_32_hi |
| 57940 | 0, // x8sub_4_then_sub_32 |
| 57941 | 0, // x8sub_4_then_sub_32_hi |
| 57942 | 0, // x8sub_3_then_sub_32 |
| 57943 | 0, // x8sub_3_then_sub_32_hi |
| 57944 | 0, // x8sub_2_then_sub_32 |
| 57945 | 0, // x8sub_2_then_sub_32_hi |
| 57946 | 0, // x8sub_1_then_sub_32 |
| 57947 | 0, // x8sub_1_then_sub_32_hi |
| 57948 | 0, // subo64_then_sub_32 |
| 57949 | 0, // subo64_then_sub_32_hi |
| 57950 | 182, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57951 | 0, // zsub3_then_zsub_hi |
| 57952 | 0, // zsub2_then_zsub_hi |
| 57953 | 0, // dsub0_dsub1 |
| 57954 | 0, // dsub0_dsub1_dsub2 |
| 57955 | 0, // dsub1_dsub2 |
| 57956 | 0, // dsub1_dsub2_dsub3 |
| 57957 | 0, // dsub2_dsub3 |
| 57958 | 182, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57959 | 0, // dsub_dsub1_dsub2_dsub3 |
| 57960 | 0, // dsub_dsub1_dsub2 |
| 57961 | 0, // qsub0_qsub1 |
| 57962 | 0, // qsub0_qsub1_qsub2 |
| 57963 | 0, // qsub1_qsub2 |
| 57964 | 0, // qsub1_qsub2_qsub3 |
| 57965 | 0, // qsub2_qsub3 |
| 57966 | 0, // sub_32_x8sub_1_then_sub_32 |
| 57967 | 0, // x8sub_0_x8sub_1 |
| 57968 | 0, // x8sub_2_x8sub_3 |
| 57969 | 0, // x8sub_4_x8sub_5 |
| 57970 | 0, // x8sub_6_x8sub_7 |
| 57971 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 57972 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 57973 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 57974 | 0, // sub_32_subo64_then_sub_32 |
| 57975 | 182, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 57976 | 0, // zsub_qsub1_qsub2_qsub3 |
| 57977 | 0, // zsub_qsub1_qsub2 |
| 57978 | 0, // zsub0_zsub1 |
| 57979 | 0, // zsub0_zsub1_zsub2 |
| 57980 | 0, // zsub1_zsub2 |
| 57981 | 0, // zsub1_zsub2_zsub3 |
| 57982 | 0, // zsub2_zsub3 |
| 57983 | 0, // zsub0_zsub2 |
| 57984 | 0, // zsub1_zsub3 |
| 57985 | }, |
| 57986 | { // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57987 | 183, // bsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57988 | 183, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57989 | 183, // dsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57990 | 0, // dsub0 |
| 57991 | 183, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57992 | 0, // dsub2 |
| 57993 | 0, // dsub3 |
| 57994 | 183, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57995 | 183, // hsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57996 | 183, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 57997 | 0, // psub |
| 57998 | 0, // psub0 |
| 57999 | 0, // psub1 |
| 58000 | 0, // qsub0 |
| 58001 | 183, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58002 | 0, // qsub2 |
| 58003 | 0, // qsub3 |
| 58004 | 183, // ssub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58005 | 183, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58006 | 0, // sub_32 |
| 58007 | 0, // sub_32_hi |
| 58008 | 0, // sube32 |
| 58009 | 0, // sube64 |
| 58010 | 0, // subo32 |
| 58011 | 0, // subo64 |
| 58012 | 0, // x8sub_0 |
| 58013 | 0, // x8sub_1 |
| 58014 | 0, // x8sub_2 |
| 58015 | 0, // x8sub_3 |
| 58016 | 0, // x8sub_4 |
| 58017 | 0, // x8sub_5 |
| 58018 | 0, // x8sub_6 |
| 58019 | 0, // x8sub_7 |
| 58020 | 0, // zasubb |
| 58021 | 0, // zasubd0 |
| 58022 | 0, // zasubd1 |
| 58023 | 0, // zasubh0 |
| 58024 | 0, // zasubh1 |
| 58025 | 0, // zasubq0 |
| 58026 | 0, // zasubq1 |
| 58027 | 0, // zasubs0 |
| 58028 | 0, // zasubs1 |
| 58029 | 183, // zsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58030 | 183, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58031 | 183, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58032 | 0, // zsub2 |
| 58033 | 0, // zsub3 |
| 58034 | 183, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58035 | 0, // zasubd1_then_zasubq0 |
| 58036 | 0, // zasubd1_then_zasubq1 |
| 58037 | 0, // zasubs1_then_zasubd0 |
| 58038 | 0, // zasubs1_then_zasubd1 |
| 58039 | 0, // zasubs1_then_zasubq0 |
| 58040 | 0, // zasubs1_then_zasubq1 |
| 58041 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58042 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58043 | 0, // zasubh1_then_zasubd0 |
| 58044 | 0, // zasubh1_then_zasubd1 |
| 58045 | 0, // zasubh1_then_zasubq0 |
| 58046 | 0, // zasubh1_then_zasubq1 |
| 58047 | 0, // zasubh1_then_zasubs0 |
| 58048 | 0, // zasubh1_then_zasubs1 |
| 58049 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58050 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58051 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58052 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58053 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58054 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58055 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58056 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58057 | 183, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58058 | 183, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58059 | 183, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58060 | 183, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58061 | 183, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58062 | 183, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58063 | 0, // dsub3_then_bsub |
| 58064 | 0, // dsub3_then_bsub_hi |
| 58065 | 0, // dsub3_then_hsub |
| 58066 | 0, // dsub3_then_hsub_hi |
| 58067 | 0, // dsub3_then_ssub |
| 58068 | 0, // dsub3_then_ssub_hi |
| 58069 | 0, // dsub2_then_bsub |
| 58070 | 0, // dsub2_then_bsub_hi |
| 58071 | 0, // dsub2_then_hsub |
| 58072 | 0, // dsub2_then_hsub_hi |
| 58073 | 0, // dsub2_then_ssub |
| 58074 | 0, // dsub2_then_ssub_hi |
| 58075 | 0, // psub1_then_psub |
| 58076 | 183, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58077 | 0, // qsub3_then_dsub_hi |
| 58078 | 0, // qsub2_then_dsub_hi |
| 58079 | 0, // x8sub_7_then_sub_32 |
| 58080 | 0, // x8sub_7_then_sub_32_hi |
| 58081 | 0, // x8sub_6_then_sub_32 |
| 58082 | 0, // x8sub_6_then_sub_32_hi |
| 58083 | 0, // x8sub_5_then_sub_32 |
| 58084 | 0, // x8sub_5_then_sub_32_hi |
| 58085 | 0, // x8sub_4_then_sub_32 |
| 58086 | 0, // x8sub_4_then_sub_32_hi |
| 58087 | 0, // x8sub_3_then_sub_32 |
| 58088 | 0, // x8sub_3_then_sub_32_hi |
| 58089 | 0, // x8sub_2_then_sub_32 |
| 58090 | 0, // x8sub_2_then_sub_32_hi |
| 58091 | 0, // x8sub_1_then_sub_32 |
| 58092 | 0, // x8sub_1_then_sub_32_hi |
| 58093 | 0, // subo64_then_sub_32 |
| 58094 | 0, // subo64_then_sub_32_hi |
| 58095 | 183, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58096 | 0, // zsub3_then_zsub_hi |
| 58097 | 0, // zsub2_then_zsub_hi |
| 58098 | 0, // dsub0_dsub1 |
| 58099 | 0, // dsub0_dsub1_dsub2 |
| 58100 | 0, // dsub1_dsub2 |
| 58101 | 0, // dsub1_dsub2_dsub3 |
| 58102 | 0, // dsub2_dsub3 |
| 58103 | 183, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58104 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58105 | 0, // dsub_dsub1_dsub2 |
| 58106 | 0, // qsub0_qsub1 |
| 58107 | 0, // qsub0_qsub1_qsub2 |
| 58108 | 0, // qsub1_qsub2 |
| 58109 | 0, // qsub1_qsub2_qsub3 |
| 58110 | 0, // qsub2_qsub3 |
| 58111 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58112 | 0, // x8sub_0_x8sub_1 |
| 58113 | 0, // x8sub_2_x8sub_3 |
| 58114 | 0, // x8sub_4_x8sub_5 |
| 58115 | 0, // x8sub_6_x8sub_7 |
| 58116 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58117 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58118 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58119 | 0, // sub_32_subo64_then_sub_32 |
| 58120 | 183, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 58121 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58122 | 0, // zsub_qsub1_qsub2 |
| 58123 | 0, // zsub0_zsub1 |
| 58124 | 0, // zsub0_zsub1_zsub2 |
| 58125 | 0, // zsub1_zsub2 |
| 58126 | 0, // zsub1_zsub2_zsub3 |
| 58127 | 0, // zsub2_zsub3 |
| 58128 | 0, // zsub0_zsub2 |
| 58129 | 0, // zsub1_zsub3 |
| 58130 | }, |
| 58131 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58132 | 184, // bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58133 | 184, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58134 | 184, // dsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58135 | 0, // dsub0 |
| 58136 | 184, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58137 | 0, // dsub2 |
| 58138 | 0, // dsub3 |
| 58139 | 184, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58140 | 184, // hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58141 | 184, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58142 | 0, // psub |
| 58143 | 0, // psub0 |
| 58144 | 0, // psub1 |
| 58145 | 0, // qsub0 |
| 58146 | 184, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58147 | 0, // qsub2 |
| 58148 | 0, // qsub3 |
| 58149 | 184, // ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58150 | 184, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58151 | 0, // sub_32 |
| 58152 | 0, // sub_32_hi |
| 58153 | 0, // sube32 |
| 58154 | 0, // sube64 |
| 58155 | 0, // subo32 |
| 58156 | 0, // subo64 |
| 58157 | 0, // x8sub_0 |
| 58158 | 0, // x8sub_1 |
| 58159 | 0, // x8sub_2 |
| 58160 | 0, // x8sub_3 |
| 58161 | 0, // x8sub_4 |
| 58162 | 0, // x8sub_5 |
| 58163 | 0, // x8sub_6 |
| 58164 | 0, // x8sub_7 |
| 58165 | 0, // zasubb |
| 58166 | 0, // zasubd0 |
| 58167 | 0, // zasubd1 |
| 58168 | 0, // zasubh0 |
| 58169 | 0, // zasubh1 |
| 58170 | 0, // zasubq0 |
| 58171 | 0, // zasubq1 |
| 58172 | 0, // zasubs0 |
| 58173 | 0, // zasubs1 |
| 58174 | 184, // zsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58175 | 184, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58176 | 184, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58177 | 0, // zsub2 |
| 58178 | 0, // zsub3 |
| 58179 | 184, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58180 | 0, // zasubd1_then_zasubq0 |
| 58181 | 0, // zasubd1_then_zasubq1 |
| 58182 | 0, // zasubs1_then_zasubd0 |
| 58183 | 0, // zasubs1_then_zasubd1 |
| 58184 | 0, // zasubs1_then_zasubq0 |
| 58185 | 0, // zasubs1_then_zasubq1 |
| 58186 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58187 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58188 | 0, // zasubh1_then_zasubd0 |
| 58189 | 0, // zasubh1_then_zasubd1 |
| 58190 | 0, // zasubh1_then_zasubq0 |
| 58191 | 0, // zasubh1_then_zasubq1 |
| 58192 | 0, // zasubh1_then_zasubs0 |
| 58193 | 0, // zasubh1_then_zasubs1 |
| 58194 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58195 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58196 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58197 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58198 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58199 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58200 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58201 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58202 | 184, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58203 | 184, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58204 | 184, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58205 | 184, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58206 | 184, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58207 | 184, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58208 | 0, // dsub3_then_bsub |
| 58209 | 0, // dsub3_then_bsub_hi |
| 58210 | 0, // dsub3_then_hsub |
| 58211 | 0, // dsub3_then_hsub_hi |
| 58212 | 0, // dsub3_then_ssub |
| 58213 | 0, // dsub3_then_ssub_hi |
| 58214 | 0, // dsub2_then_bsub |
| 58215 | 0, // dsub2_then_bsub_hi |
| 58216 | 0, // dsub2_then_hsub |
| 58217 | 0, // dsub2_then_hsub_hi |
| 58218 | 0, // dsub2_then_ssub |
| 58219 | 0, // dsub2_then_ssub_hi |
| 58220 | 0, // psub1_then_psub |
| 58221 | 184, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58222 | 0, // qsub3_then_dsub_hi |
| 58223 | 0, // qsub2_then_dsub_hi |
| 58224 | 0, // x8sub_7_then_sub_32 |
| 58225 | 0, // x8sub_7_then_sub_32_hi |
| 58226 | 0, // x8sub_6_then_sub_32 |
| 58227 | 0, // x8sub_6_then_sub_32_hi |
| 58228 | 0, // x8sub_5_then_sub_32 |
| 58229 | 0, // x8sub_5_then_sub_32_hi |
| 58230 | 0, // x8sub_4_then_sub_32 |
| 58231 | 0, // x8sub_4_then_sub_32_hi |
| 58232 | 0, // x8sub_3_then_sub_32 |
| 58233 | 0, // x8sub_3_then_sub_32_hi |
| 58234 | 0, // x8sub_2_then_sub_32 |
| 58235 | 0, // x8sub_2_then_sub_32_hi |
| 58236 | 0, // x8sub_1_then_sub_32 |
| 58237 | 0, // x8sub_1_then_sub_32_hi |
| 58238 | 0, // subo64_then_sub_32 |
| 58239 | 0, // subo64_then_sub_32_hi |
| 58240 | 184, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58241 | 0, // zsub3_then_zsub_hi |
| 58242 | 0, // zsub2_then_zsub_hi |
| 58243 | 0, // dsub0_dsub1 |
| 58244 | 0, // dsub0_dsub1_dsub2 |
| 58245 | 0, // dsub1_dsub2 |
| 58246 | 0, // dsub1_dsub2_dsub3 |
| 58247 | 0, // dsub2_dsub3 |
| 58248 | 184, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58249 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58250 | 0, // dsub_dsub1_dsub2 |
| 58251 | 0, // qsub0_qsub1 |
| 58252 | 0, // qsub0_qsub1_qsub2 |
| 58253 | 0, // qsub1_qsub2 |
| 58254 | 0, // qsub1_qsub2_qsub3 |
| 58255 | 0, // qsub2_qsub3 |
| 58256 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58257 | 0, // x8sub_0_x8sub_1 |
| 58258 | 0, // x8sub_2_x8sub_3 |
| 58259 | 0, // x8sub_4_x8sub_5 |
| 58260 | 0, // x8sub_6_x8sub_7 |
| 58261 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58262 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58263 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58264 | 0, // sub_32_subo64_then_sub_32 |
| 58265 | 184, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 58266 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58267 | 0, // zsub_qsub1_qsub2 |
| 58268 | 0, // zsub0_zsub1 |
| 58269 | 0, // zsub0_zsub1_zsub2 |
| 58270 | 0, // zsub1_zsub2 |
| 58271 | 0, // zsub1_zsub2_zsub3 |
| 58272 | 0, // zsub2_zsub3 |
| 58273 | 0, // zsub0_zsub2 |
| 58274 | 0, // zsub1_zsub3 |
| 58275 | }, |
| 58276 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58277 | 185, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58278 | 185, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58279 | 185, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58280 | 0, // dsub0 |
| 58281 | 185, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58282 | 0, // dsub2 |
| 58283 | 0, // dsub3 |
| 58284 | 185, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58285 | 185, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58286 | 185, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58287 | 0, // psub |
| 58288 | 0, // psub0 |
| 58289 | 0, // psub1 |
| 58290 | 0, // qsub0 |
| 58291 | 185, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58292 | 0, // qsub2 |
| 58293 | 0, // qsub3 |
| 58294 | 185, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58295 | 185, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58296 | 0, // sub_32 |
| 58297 | 0, // sub_32_hi |
| 58298 | 0, // sube32 |
| 58299 | 0, // sube64 |
| 58300 | 0, // subo32 |
| 58301 | 0, // subo64 |
| 58302 | 0, // x8sub_0 |
| 58303 | 0, // x8sub_1 |
| 58304 | 0, // x8sub_2 |
| 58305 | 0, // x8sub_3 |
| 58306 | 0, // x8sub_4 |
| 58307 | 0, // x8sub_5 |
| 58308 | 0, // x8sub_6 |
| 58309 | 0, // x8sub_7 |
| 58310 | 0, // zasubb |
| 58311 | 0, // zasubd0 |
| 58312 | 0, // zasubd1 |
| 58313 | 0, // zasubh0 |
| 58314 | 0, // zasubh1 |
| 58315 | 0, // zasubq0 |
| 58316 | 0, // zasubq1 |
| 58317 | 0, // zasubs0 |
| 58318 | 0, // zasubs1 |
| 58319 | 185, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58320 | 185, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58321 | 185, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58322 | 0, // zsub2 |
| 58323 | 0, // zsub3 |
| 58324 | 185, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58325 | 0, // zasubd1_then_zasubq0 |
| 58326 | 0, // zasubd1_then_zasubq1 |
| 58327 | 0, // zasubs1_then_zasubd0 |
| 58328 | 0, // zasubs1_then_zasubd1 |
| 58329 | 0, // zasubs1_then_zasubq0 |
| 58330 | 0, // zasubs1_then_zasubq1 |
| 58331 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58332 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58333 | 0, // zasubh1_then_zasubd0 |
| 58334 | 0, // zasubh1_then_zasubd1 |
| 58335 | 0, // zasubh1_then_zasubq0 |
| 58336 | 0, // zasubh1_then_zasubq1 |
| 58337 | 0, // zasubh1_then_zasubs0 |
| 58338 | 0, // zasubh1_then_zasubs1 |
| 58339 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58340 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58341 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58342 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58343 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58344 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58345 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58346 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58347 | 185, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58348 | 185, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58349 | 185, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58350 | 185, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58351 | 185, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58352 | 185, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58353 | 0, // dsub3_then_bsub |
| 58354 | 0, // dsub3_then_bsub_hi |
| 58355 | 0, // dsub3_then_hsub |
| 58356 | 0, // dsub3_then_hsub_hi |
| 58357 | 0, // dsub3_then_ssub |
| 58358 | 0, // dsub3_then_ssub_hi |
| 58359 | 0, // dsub2_then_bsub |
| 58360 | 0, // dsub2_then_bsub_hi |
| 58361 | 0, // dsub2_then_hsub |
| 58362 | 0, // dsub2_then_hsub_hi |
| 58363 | 0, // dsub2_then_ssub |
| 58364 | 0, // dsub2_then_ssub_hi |
| 58365 | 0, // psub1_then_psub |
| 58366 | 185, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58367 | 0, // qsub3_then_dsub_hi |
| 58368 | 0, // qsub2_then_dsub_hi |
| 58369 | 0, // x8sub_7_then_sub_32 |
| 58370 | 0, // x8sub_7_then_sub_32_hi |
| 58371 | 0, // x8sub_6_then_sub_32 |
| 58372 | 0, // x8sub_6_then_sub_32_hi |
| 58373 | 0, // x8sub_5_then_sub_32 |
| 58374 | 0, // x8sub_5_then_sub_32_hi |
| 58375 | 0, // x8sub_4_then_sub_32 |
| 58376 | 0, // x8sub_4_then_sub_32_hi |
| 58377 | 0, // x8sub_3_then_sub_32 |
| 58378 | 0, // x8sub_3_then_sub_32_hi |
| 58379 | 0, // x8sub_2_then_sub_32 |
| 58380 | 0, // x8sub_2_then_sub_32_hi |
| 58381 | 0, // x8sub_1_then_sub_32 |
| 58382 | 0, // x8sub_1_then_sub_32_hi |
| 58383 | 0, // subo64_then_sub_32 |
| 58384 | 0, // subo64_then_sub_32_hi |
| 58385 | 185, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58386 | 0, // zsub3_then_zsub_hi |
| 58387 | 0, // zsub2_then_zsub_hi |
| 58388 | 0, // dsub0_dsub1 |
| 58389 | 0, // dsub0_dsub1_dsub2 |
| 58390 | 0, // dsub1_dsub2 |
| 58391 | 0, // dsub1_dsub2_dsub3 |
| 58392 | 0, // dsub2_dsub3 |
| 58393 | 185, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58394 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58395 | 0, // dsub_dsub1_dsub2 |
| 58396 | 0, // qsub0_qsub1 |
| 58397 | 0, // qsub0_qsub1_qsub2 |
| 58398 | 0, // qsub1_qsub2 |
| 58399 | 0, // qsub1_qsub2_qsub3 |
| 58400 | 0, // qsub2_qsub3 |
| 58401 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58402 | 0, // x8sub_0_x8sub_1 |
| 58403 | 0, // x8sub_2_x8sub_3 |
| 58404 | 0, // x8sub_4_x8sub_5 |
| 58405 | 0, // x8sub_6_x8sub_7 |
| 58406 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58407 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58408 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58409 | 0, // sub_32_subo64_then_sub_32 |
| 58410 | 185, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 58411 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58412 | 0, // zsub_qsub1_qsub2 |
| 58413 | 0, // zsub0_zsub1 |
| 58414 | 0, // zsub0_zsub1_zsub2 |
| 58415 | 0, // zsub1_zsub2 |
| 58416 | 0, // zsub1_zsub2_zsub3 |
| 58417 | 0, // zsub2_zsub3 |
| 58418 | 0, // zsub0_zsub2 |
| 58419 | 0, // zsub1_zsub3 |
| 58420 | }, |
| 58421 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58422 | 186, // bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58423 | 186, // bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58424 | 186, // dsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58425 | 0, // dsub0 |
| 58426 | 186, // dsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58427 | 0, // dsub2 |
| 58428 | 0, // dsub3 |
| 58429 | 186, // dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58430 | 186, // hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58431 | 186, // hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58432 | 0, // psub |
| 58433 | 0, // psub0 |
| 58434 | 0, // psub1 |
| 58435 | 0, // qsub0 |
| 58436 | 186, // qsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58437 | 0, // qsub2 |
| 58438 | 0, // qsub3 |
| 58439 | 186, // ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58440 | 186, // ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58441 | 0, // sub_32 |
| 58442 | 0, // sub_32_hi |
| 58443 | 0, // sube32 |
| 58444 | 0, // sube64 |
| 58445 | 0, // subo32 |
| 58446 | 0, // subo64 |
| 58447 | 0, // x8sub_0 |
| 58448 | 0, // x8sub_1 |
| 58449 | 0, // x8sub_2 |
| 58450 | 0, // x8sub_3 |
| 58451 | 0, // x8sub_4 |
| 58452 | 0, // x8sub_5 |
| 58453 | 0, // x8sub_6 |
| 58454 | 0, // x8sub_7 |
| 58455 | 0, // zasubb |
| 58456 | 0, // zasubd0 |
| 58457 | 0, // zasubd1 |
| 58458 | 0, // zasubh0 |
| 58459 | 0, // zasubh1 |
| 58460 | 0, // zasubq0 |
| 58461 | 0, // zasubq1 |
| 58462 | 0, // zasubs0 |
| 58463 | 0, // zasubs1 |
| 58464 | 186, // zsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58465 | 186, // zsub0 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58466 | 186, // zsub1 -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58467 | 0, // zsub2 |
| 58468 | 0, // zsub3 |
| 58469 | 186, // zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58470 | 0, // zasubd1_then_zasubq0 |
| 58471 | 0, // zasubd1_then_zasubq1 |
| 58472 | 0, // zasubs1_then_zasubd0 |
| 58473 | 0, // zasubs1_then_zasubd1 |
| 58474 | 0, // zasubs1_then_zasubq0 |
| 58475 | 0, // zasubs1_then_zasubq1 |
| 58476 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58477 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58478 | 0, // zasubh1_then_zasubd0 |
| 58479 | 0, // zasubh1_then_zasubd1 |
| 58480 | 0, // zasubh1_then_zasubq0 |
| 58481 | 0, // zasubh1_then_zasubq1 |
| 58482 | 0, // zasubh1_then_zasubs0 |
| 58483 | 0, // zasubh1_then_zasubs1 |
| 58484 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58485 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58486 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58487 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58488 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58489 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58490 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58491 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58492 | 186, // dsub1_then_bsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58493 | 186, // dsub1_then_bsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58494 | 186, // dsub1_then_hsub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58495 | 186, // dsub1_then_hsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58496 | 186, // dsub1_then_ssub -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58497 | 186, // dsub1_then_ssub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58498 | 0, // dsub3_then_bsub |
| 58499 | 0, // dsub3_then_bsub_hi |
| 58500 | 0, // dsub3_then_hsub |
| 58501 | 0, // dsub3_then_hsub_hi |
| 58502 | 0, // dsub3_then_ssub |
| 58503 | 0, // dsub3_then_ssub_hi |
| 58504 | 0, // dsub2_then_bsub |
| 58505 | 0, // dsub2_then_bsub_hi |
| 58506 | 0, // dsub2_then_hsub |
| 58507 | 0, // dsub2_then_hsub_hi |
| 58508 | 0, // dsub2_then_ssub |
| 58509 | 0, // dsub2_then_ssub_hi |
| 58510 | 0, // psub1_then_psub |
| 58511 | 186, // qsub1_then_dsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58512 | 0, // qsub3_then_dsub_hi |
| 58513 | 0, // qsub2_then_dsub_hi |
| 58514 | 0, // x8sub_7_then_sub_32 |
| 58515 | 0, // x8sub_7_then_sub_32_hi |
| 58516 | 0, // x8sub_6_then_sub_32 |
| 58517 | 0, // x8sub_6_then_sub_32_hi |
| 58518 | 0, // x8sub_5_then_sub_32 |
| 58519 | 0, // x8sub_5_then_sub_32_hi |
| 58520 | 0, // x8sub_4_then_sub_32 |
| 58521 | 0, // x8sub_4_then_sub_32_hi |
| 58522 | 0, // x8sub_3_then_sub_32 |
| 58523 | 0, // x8sub_3_then_sub_32_hi |
| 58524 | 0, // x8sub_2_then_sub_32 |
| 58525 | 0, // x8sub_2_then_sub_32_hi |
| 58526 | 0, // x8sub_1_then_sub_32 |
| 58527 | 0, // x8sub_1_then_sub_32_hi |
| 58528 | 0, // subo64_then_sub_32 |
| 58529 | 0, // subo64_then_sub_32_hi |
| 58530 | 186, // zsub1_then_zsub_hi -> ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58531 | 0, // zsub3_then_zsub_hi |
| 58532 | 0, // zsub2_then_zsub_hi |
| 58533 | 0, // dsub0_dsub1 |
| 58534 | 0, // dsub0_dsub1_dsub2 |
| 58535 | 0, // dsub1_dsub2 |
| 58536 | 0, // dsub1_dsub2_dsub3 |
| 58537 | 0, // dsub2_dsub3 |
| 58538 | 194, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58539 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58540 | 0, // dsub_dsub1_dsub2 |
| 58541 | 0, // qsub0_qsub1 |
| 58542 | 0, // qsub0_qsub1_qsub2 |
| 58543 | 0, // qsub1_qsub2 |
| 58544 | 0, // qsub1_qsub2_qsub3 |
| 58545 | 0, // qsub2_qsub3 |
| 58546 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58547 | 0, // x8sub_0_x8sub_1 |
| 58548 | 0, // x8sub_2_x8sub_3 |
| 58549 | 0, // x8sub_4_x8sub_5 |
| 58550 | 0, // x8sub_6_x8sub_7 |
| 58551 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58552 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58553 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58554 | 0, // sub_32_subo64_then_sub_32 |
| 58555 | 194, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 58556 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58557 | 0, // zsub_qsub1_qsub2 |
| 58558 | 0, // zsub0_zsub1 |
| 58559 | 0, // zsub0_zsub1_zsub2 |
| 58560 | 0, // zsub1_zsub2 |
| 58561 | 0, // zsub1_zsub2_zsub3 |
| 58562 | 0, // zsub2_zsub3 |
| 58563 | 0, // zsub0_zsub2 |
| 58564 | 0, // zsub1_zsub3 |
| 58565 | }, |
| 58566 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58567 | 187, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58568 | 187, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58569 | 187, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58570 | 0, // dsub0 |
| 58571 | 187, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58572 | 0, // dsub2 |
| 58573 | 0, // dsub3 |
| 58574 | 187, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58575 | 187, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58576 | 187, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58577 | 0, // psub |
| 58578 | 0, // psub0 |
| 58579 | 0, // psub1 |
| 58580 | 0, // qsub0 |
| 58581 | 187, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58582 | 0, // qsub2 |
| 58583 | 0, // qsub3 |
| 58584 | 187, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58585 | 187, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58586 | 0, // sub_32 |
| 58587 | 0, // sub_32_hi |
| 58588 | 0, // sube32 |
| 58589 | 0, // sube64 |
| 58590 | 0, // subo32 |
| 58591 | 0, // subo64 |
| 58592 | 0, // x8sub_0 |
| 58593 | 0, // x8sub_1 |
| 58594 | 0, // x8sub_2 |
| 58595 | 0, // x8sub_3 |
| 58596 | 0, // x8sub_4 |
| 58597 | 0, // x8sub_5 |
| 58598 | 0, // x8sub_6 |
| 58599 | 0, // x8sub_7 |
| 58600 | 0, // zasubb |
| 58601 | 0, // zasubd0 |
| 58602 | 0, // zasubd1 |
| 58603 | 0, // zasubh0 |
| 58604 | 0, // zasubh1 |
| 58605 | 0, // zasubq0 |
| 58606 | 0, // zasubq1 |
| 58607 | 0, // zasubs0 |
| 58608 | 0, // zasubs1 |
| 58609 | 187, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58610 | 187, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58611 | 187, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58612 | 0, // zsub2 |
| 58613 | 0, // zsub3 |
| 58614 | 187, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58615 | 0, // zasubd1_then_zasubq0 |
| 58616 | 0, // zasubd1_then_zasubq1 |
| 58617 | 0, // zasubs1_then_zasubd0 |
| 58618 | 0, // zasubs1_then_zasubd1 |
| 58619 | 0, // zasubs1_then_zasubq0 |
| 58620 | 0, // zasubs1_then_zasubq1 |
| 58621 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58622 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58623 | 0, // zasubh1_then_zasubd0 |
| 58624 | 0, // zasubh1_then_zasubd1 |
| 58625 | 0, // zasubh1_then_zasubq0 |
| 58626 | 0, // zasubh1_then_zasubq1 |
| 58627 | 0, // zasubh1_then_zasubs0 |
| 58628 | 0, // zasubh1_then_zasubs1 |
| 58629 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58630 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58631 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58632 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58633 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58634 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58635 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58636 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58637 | 187, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58638 | 187, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58639 | 187, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58640 | 187, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58641 | 187, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58642 | 187, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58643 | 0, // dsub3_then_bsub |
| 58644 | 0, // dsub3_then_bsub_hi |
| 58645 | 0, // dsub3_then_hsub |
| 58646 | 0, // dsub3_then_hsub_hi |
| 58647 | 0, // dsub3_then_ssub |
| 58648 | 0, // dsub3_then_ssub_hi |
| 58649 | 0, // dsub2_then_bsub |
| 58650 | 0, // dsub2_then_bsub_hi |
| 58651 | 0, // dsub2_then_hsub |
| 58652 | 0, // dsub2_then_hsub_hi |
| 58653 | 0, // dsub2_then_ssub |
| 58654 | 0, // dsub2_then_ssub_hi |
| 58655 | 0, // psub1_then_psub |
| 58656 | 187, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58657 | 0, // qsub3_then_dsub_hi |
| 58658 | 0, // qsub2_then_dsub_hi |
| 58659 | 0, // x8sub_7_then_sub_32 |
| 58660 | 0, // x8sub_7_then_sub_32_hi |
| 58661 | 0, // x8sub_6_then_sub_32 |
| 58662 | 0, // x8sub_6_then_sub_32_hi |
| 58663 | 0, // x8sub_5_then_sub_32 |
| 58664 | 0, // x8sub_5_then_sub_32_hi |
| 58665 | 0, // x8sub_4_then_sub_32 |
| 58666 | 0, // x8sub_4_then_sub_32_hi |
| 58667 | 0, // x8sub_3_then_sub_32 |
| 58668 | 0, // x8sub_3_then_sub_32_hi |
| 58669 | 0, // x8sub_2_then_sub_32 |
| 58670 | 0, // x8sub_2_then_sub_32_hi |
| 58671 | 0, // x8sub_1_then_sub_32 |
| 58672 | 0, // x8sub_1_then_sub_32_hi |
| 58673 | 0, // subo64_then_sub_32 |
| 58674 | 0, // subo64_then_sub_32_hi |
| 58675 | 187, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58676 | 0, // zsub3_then_zsub_hi |
| 58677 | 0, // zsub2_then_zsub_hi |
| 58678 | 0, // dsub0_dsub1 |
| 58679 | 0, // dsub0_dsub1_dsub2 |
| 58680 | 0, // dsub1_dsub2 |
| 58681 | 0, // dsub1_dsub2_dsub3 |
| 58682 | 0, // dsub2_dsub3 |
| 58683 | 187, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58684 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58685 | 0, // dsub_dsub1_dsub2 |
| 58686 | 0, // qsub0_qsub1 |
| 58687 | 0, // qsub0_qsub1_qsub2 |
| 58688 | 0, // qsub1_qsub2 |
| 58689 | 0, // qsub1_qsub2_qsub3 |
| 58690 | 0, // qsub2_qsub3 |
| 58691 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58692 | 0, // x8sub_0_x8sub_1 |
| 58693 | 0, // x8sub_2_x8sub_3 |
| 58694 | 0, // x8sub_4_x8sub_5 |
| 58695 | 0, // x8sub_6_x8sub_7 |
| 58696 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58697 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58698 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58699 | 0, // sub_32_subo64_then_sub_32 |
| 58700 | 187, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 58701 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58702 | 0, // zsub_qsub1_qsub2 |
| 58703 | 0, // zsub0_zsub1 |
| 58704 | 0, // zsub0_zsub1_zsub2 |
| 58705 | 0, // zsub1_zsub2 |
| 58706 | 0, // zsub1_zsub2_zsub3 |
| 58707 | 0, // zsub2_zsub3 |
| 58708 | 0, // zsub0_zsub2 |
| 58709 | 0, // zsub1_zsub3 |
| 58710 | }, |
| 58711 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58712 | 188, // bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58713 | 188, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58714 | 188, // dsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58715 | 0, // dsub0 |
| 58716 | 188, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58717 | 0, // dsub2 |
| 58718 | 0, // dsub3 |
| 58719 | 188, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58720 | 188, // hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58721 | 188, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58722 | 0, // psub |
| 58723 | 0, // psub0 |
| 58724 | 0, // psub1 |
| 58725 | 0, // qsub0 |
| 58726 | 188, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58727 | 0, // qsub2 |
| 58728 | 0, // qsub3 |
| 58729 | 188, // ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58730 | 188, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58731 | 0, // sub_32 |
| 58732 | 0, // sub_32_hi |
| 58733 | 0, // sube32 |
| 58734 | 0, // sube64 |
| 58735 | 0, // subo32 |
| 58736 | 0, // subo64 |
| 58737 | 0, // x8sub_0 |
| 58738 | 0, // x8sub_1 |
| 58739 | 0, // x8sub_2 |
| 58740 | 0, // x8sub_3 |
| 58741 | 0, // x8sub_4 |
| 58742 | 0, // x8sub_5 |
| 58743 | 0, // x8sub_6 |
| 58744 | 0, // x8sub_7 |
| 58745 | 0, // zasubb |
| 58746 | 0, // zasubd0 |
| 58747 | 0, // zasubd1 |
| 58748 | 0, // zasubh0 |
| 58749 | 0, // zasubh1 |
| 58750 | 0, // zasubq0 |
| 58751 | 0, // zasubq1 |
| 58752 | 0, // zasubs0 |
| 58753 | 0, // zasubs1 |
| 58754 | 188, // zsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58755 | 188, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58756 | 188, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58757 | 0, // zsub2 |
| 58758 | 0, // zsub3 |
| 58759 | 188, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58760 | 0, // zasubd1_then_zasubq0 |
| 58761 | 0, // zasubd1_then_zasubq1 |
| 58762 | 0, // zasubs1_then_zasubd0 |
| 58763 | 0, // zasubs1_then_zasubd1 |
| 58764 | 0, // zasubs1_then_zasubq0 |
| 58765 | 0, // zasubs1_then_zasubq1 |
| 58766 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58767 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58768 | 0, // zasubh1_then_zasubd0 |
| 58769 | 0, // zasubh1_then_zasubd1 |
| 58770 | 0, // zasubh1_then_zasubq0 |
| 58771 | 0, // zasubh1_then_zasubq1 |
| 58772 | 0, // zasubh1_then_zasubs0 |
| 58773 | 0, // zasubh1_then_zasubs1 |
| 58774 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58775 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58776 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58777 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58778 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58779 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58780 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58781 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58782 | 188, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58783 | 188, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58784 | 188, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58785 | 188, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58786 | 188, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58787 | 188, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58788 | 0, // dsub3_then_bsub |
| 58789 | 0, // dsub3_then_bsub_hi |
| 58790 | 0, // dsub3_then_hsub |
| 58791 | 0, // dsub3_then_hsub_hi |
| 58792 | 0, // dsub3_then_ssub |
| 58793 | 0, // dsub3_then_ssub_hi |
| 58794 | 0, // dsub2_then_bsub |
| 58795 | 0, // dsub2_then_bsub_hi |
| 58796 | 0, // dsub2_then_hsub |
| 58797 | 0, // dsub2_then_hsub_hi |
| 58798 | 0, // dsub2_then_ssub |
| 58799 | 0, // dsub2_then_ssub_hi |
| 58800 | 0, // psub1_then_psub |
| 58801 | 188, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58802 | 0, // qsub3_then_dsub_hi |
| 58803 | 0, // qsub2_then_dsub_hi |
| 58804 | 0, // x8sub_7_then_sub_32 |
| 58805 | 0, // x8sub_7_then_sub_32_hi |
| 58806 | 0, // x8sub_6_then_sub_32 |
| 58807 | 0, // x8sub_6_then_sub_32_hi |
| 58808 | 0, // x8sub_5_then_sub_32 |
| 58809 | 0, // x8sub_5_then_sub_32_hi |
| 58810 | 0, // x8sub_4_then_sub_32 |
| 58811 | 0, // x8sub_4_then_sub_32_hi |
| 58812 | 0, // x8sub_3_then_sub_32 |
| 58813 | 0, // x8sub_3_then_sub_32_hi |
| 58814 | 0, // x8sub_2_then_sub_32 |
| 58815 | 0, // x8sub_2_then_sub_32_hi |
| 58816 | 0, // x8sub_1_then_sub_32 |
| 58817 | 0, // x8sub_1_then_sub_32_hi |
| 58818 | 0, // subo64_then_sub_32 |
| 58819 | 0, // subo64_then_sub_32_hi |
| 58820 | 188, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58821 | 0, // zsub3_then_zsub_hi |
| 58822 | 0, // zsub2_then_zsub_hi |
| 58823 | 0, // dsub0_dsub1 |
| 58824 | 0, // dsub0_dsub1_dsub2 |
| 58825 | 0, // dsub1_dsub2 |
| 58826 | 0, // dsub1_dsub2_dsub3 |
| 58827 | 0, // dsub2_dsub3 |
| 58828 | 188, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58829 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58830 | 0, // dsub_dsub1_dsub2 |
| 58831 | 0, // qsub0_qsub1 |
| 58832 | 0, // qsub0_qsub1_qsub2 |
| 58833 | 0, // qsub1_qsub2 |
| 58834 | 0, // qsub1_qsub2_qsub3 |
| 58835 | 0, // qsub2_qsub3 |
| 58836 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58837 | 0, // x8sub_0_x8sub_1 |
| 58838 | 0, // x8sub_2_x8sub_3 |
| 58839 | 0, // x8sub_4_x8sub_5 |
| 58840 | 0, // x8sub_6_x8sub_7 |
| 58841 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58842 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58843 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58844 | 0, // sub_32_subo64_then_sub_32 |
| 58845 | 188, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 58846 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58847 | 0, // zsub_qsub1_qsub2 |
| 58848 | 0, // zsub0_zsub1 |
| 58849 | 0, // zsub0_zsub1_zsub2 |
| 58850 | 0, // zsub1_zsub2 |
| 58851 | 0, // zsub1_zsub2_zsub3 |
| 58852 | 0, // zsub2_zsub3 |
| 58853 | 0, // zsub0_zsub2 |
| 58854 | 0, // zsub1_zsub3 |
| 58855 | }, |
| 58856 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58857 | 189, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58858 | 189, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58859 | 189, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58860 | 0, // dsub0 |
| 58861 | 189, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58862 | 0, // dsub2 |
| 58863 | 0, // dsub3 |
| 58864 | 189, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58865 | 189, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58866 | 189, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58867 | 0, // psub |
| 58868 | 0, // psub0 |
| 58869 | 0, // psub1 |
| 58870 | 0, // qsub0 |
| 58871 | 189, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58872 | 0, // qsub2 |
| 58873 | 0, // qsub3 |
| 58874 | 189, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58875 | 189, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58876 | 0, // sub_32 |
| 58877 | 0, // sub_32_hi |
| 58878 | 0, // sube32 |
| 58879 | 0, // sube64 |
| 58880 | 0, // subo32 |
| 58881 | 0, // subo64 |
| 58882 | 0, // x8sub_0 |
| 58883 | 0, // x8sub_1 |
| 58884 | 0, // x8sub_2 |
| 58885 | 0, // x8sub_3 |
| 58886 | 0, // x8sub_4 |
| 58887 | 0, // x8sub_5 |
| 58888 | 0, // x8sub_6 |
| 58889 | 0, // x8sub_7 |
| 58890 | 0, // zasubb |
| 58891 | 0, // zasubd0 |
| 58892 | 0, // zasubd1 |
| 58893 | 0, // zasubh0 |
| 58894 | 0, // zasubh1 |
| 58895 | 0, // zasubq0 |
| 58896 | 0, // zasubq1 |
| 58897 | 0, // zasubs0 |
| 58898 | 0, // zasubs1 |
| 58899 | 189, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58900 | 189, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58901 | 189, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58902 | 0, // zsub2 |
| 58903 | 0, // zsub3 |
| 58904 | 189, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58905 | 0, // zasubd1_then_zasubq0 |
| 58906 | 0, // zasubd1_then_zasubq1 |
| 58907 | 0, // zasubs1_then_zasubd0 |
| 58908 | 0, // zasubs1_then_zasubd1 |
| 58909 | 0, // zasubs1_then_zasubq0 |
| 58910 | 0, // zasubs1_then_zasubq1 |
| 58911 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 58912 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 58913 | 0, // zasubh1_then_zasubd0 |
| 58914 | 0, // zasubh1_then_zasubd1 |
| 58915 | 0, // zasubh1_then_zasubq0 |
| 58916 | 0, // zasubh1_then_zasubq1 |
| 58917 | 0, // zasubh1_then_zasubs0 |
| 58918 | 0, // zasubh1_then_zasubs1 |
| 58919 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 58920 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 58921 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 58922 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 58923 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 58924 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 58925 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 58926 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 58927 | 189, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58928 | 189, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58929 | 189, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58930 | 189, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58931 | 189, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58932 | 189, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58933 | 0, // dsub3_then_bsub |
| 58934 | 0, // dsub3_then_bsub_hi |
| 58935 | 0, // dsub3_then_hsub |
| 58936 | 0, // dsub3_then_hsub_hi |
| 58937 | 0, // dsub3_then_ssub |
| 58938 | 0, // dsub3_then_ssub_hi |
| 58939 | 0, // dsub2_then_bsub |
| 58940 | 0, // dsub2_then_bsub_hi |
| 58941 | 0, // dsub2_then_hsub |
| 58942 | 0, // dsub2_then_hsub_hi |
| 58943 | 0, // dsub2_then_ssub |
| 58944 | 0, // dsub2_then_ssub_hi |
| 58945 | 0, // psub1_then_psub |
| 58946 | 189, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58947 | 0, // qsub3_then_dsub_hi |
| 58948 | 0, // qsub2_then_dsub_hi |
| 58949 | 0, // x8sub_7_then_sub_32 |
| 58950 | 0, // x8sub_7_then_sub_32_hi |
| 58951 | 0, // x8sub_6_then_sub_32 |
| 58952 | 0, // x8sub_6_then_sub_32_hi |
| 58953 | 0, // x8sub_5_then_sub_32 |
| 58954 | 0, // x8sub_5_then_sub_32_hi |
| 58955 | 0, // x8sub_4_then_sub_32 |
| 58956 | 0, // x8sub_4_then_sub_32_hi |
| 58957 | 0, // x8sub_3_then_sub_32 |
| 58958 | 0, // x8sub_3_then_sub_32_hi |
| 58959 | 0, // x8sub_2_then_sub_32 |
| 58960 | 0, // x8sub_2_then_sub_32_hi |
| 58961 | 0, // x8sub_1_then_sub_32 |
| 58962 | 0, // x8sub_1_then_sub_32_hi |
| 58963 | 0, // subo64_then_sub_32 |
| 58964 | 0, // subo64_then_sub_32_hi |
| 58965 | 189, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58966 | 0, // zsub3_then_zsub_hi |
| 58967 | 0, // zsub2_then_zsub_hi |
| 58968 | 0, // dsub0_dsub1 |
| 58969 | 0, // dsub0_dsub1_dsub2 |
| 58970 | 0, // dsub1_dsub2 |
| 58971 | 0, // dsub1_dsub2_dsub3 |
| 58972 | 0, // dsub2_dsub3 |
| 58973 | 189, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58974 | 0, // dsub_dsub1_dsub2_dsub3 |
| 58975 | 0, // dsub_dsub1_dsub2 |
| 58976 | 0, // qsub0_qsub1 |
| 58977 | 0, // qsub0_qsub1_qsub2 |
| 58978 | 0, // qsub1_qsub2 |
| 58979 | 0, // qsub1_qsub2_qsub3 |
| 58980 | 0, // qsub2_qsub3 |
| 58981 | 0, // sub_32_x8sub_1_then_sub_32 |
| 58982 | 0, // x8sub_0_x8sub_1 |
| 58983 | 0, // x8sub_2_x8sub_3 |
| 58984 | 0, // x8sub_4_x8sub_5 |
| 58985 | 0, // x8sub_6_x8sub_7 |
| 58986 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 58987 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 58988 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 58989 | 0, // sub_32_subo64_then_sub_32 |
| 58990 | 189, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 58991 | 0, // zsub_qsub1_qsub2_qsub3 |
| 58992 | 0, // zsub_qsub1_qsub2 |
| 58993 | 0, // zsub0_zsub1 |
| 58994 | 0, // zsub0_zsub1_zsub2 |
| 58995 | 0, // zsub1_zsub2 |
| 58996 | 0, // zsub1_zsub2_zsub3 |
| 58997 | 0, // zsub2_zsub3 |
| 58998 | 0, // zsub0_zsub2 |
| 58999 | 0, // zsub1_zsub3 |
| 59000 | }, |
| 59001 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59002 | 190, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59003 | 190, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59004 | 190, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59005 | 0, // dsub0 |
| 59006 | 190, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59007 | 0, // dsub2 |
| 59008 | 0, // dsub3 |
| 59009 | 190, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59010 | 190, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59011 | 190, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59012 | 0, // psub |
| 59013 | 0, // psub0 |
| 59014 | 0, // psub1 |
| 59015 | 0, // qsub0 |
| 59016 | 190, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59017 | 0, // qsub2 |
| 59018 | 0, // qsub3 |
| 59019 | 190, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59020 | 190, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59021 | 0, // sub_32 |
| 59022 | 0, // sub_32_hi |
| 59023 | 0, // sube32 |
| 59024 | 0, // sube64 |
| 59025 | 0, // subo32 |
| 59026 | 0, // subo64 |
| 59027 | 0, // x8sub_0 |
| 59028 | 0, // x8sub_1 |
| 59029 | 0, // x8sub_2 |
| 59030 | 0, // x8sub_3 |
| 59031 | 0, // x8sub_4 |
| 59032 | 0, // x8sub_5 |
| 59033 | 0, // x8sub_6 |
| 59034 | 0, // x8sub_7 |
| 59035 | 0, // zasubb |
| 59036 | 0, // zasubd0 |
| 59037 | 0, // zasubd1 |
| 59038 | 0, // zasubh0 |
| 59039 | 0, // zasubh1 |
| 59040 | 0, // zasubq0 |
| 59041 | 0, // zasubq1 |
| 59042 | 0, // zasubs0 |
| 59043 | 0, // zasubs1 |
| 59044 | 190, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59045 | 190, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59046 | 190, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59047 | 0, // zsub2 |
| 59048 | 0, // zsub3 |
| 59049 | 190, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59050 | 0, // zasubd1_then_zasubq0 |
| 59051 | 0, // zasubd1_then_zasubq1 |
| 59052 | 0, // zasubs1_then_zasubd0 |
| 59053 | 0, // zasubs1_then_zasubd1 |
| 59054 | 0, // zasubs1_then_zasubq0 |
| 59055 | 0, // zasubs1_then_zasubq1 |
| 59056 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59057 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59058 | 0, // zasubh1_then_zasubd0 |
| 59059 | 0, // zasubh1_then_zasubd1 |
| 59060 | 0, // zasubh1_then_zasubq0 |
| 59061 | 0, // zasubh1_then_zasubq1 |
| 59062 | 0, // zasubh1_then_zasubs0 |
| 59063 | 0, // zasubh1_then_zasubs1 |
| 59064 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59065 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59066 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59067 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59068 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59069 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59070 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59071 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59072 | 190, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59073 | 190, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59074 | 190, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59075 | 190, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59076 | 190, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59077 | 190, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59078 | 0, // dsub3_then_bsub |
| 59079 | 0, // dsub3_then_bsub_hi |
| 59080 | 0, // dsub3_then_hsub |
| 59081 | 0, // dsub3_then_hsub_hi |
| 59082 | 0, // dsub3_then_ssub |
| 59083 | 0, // dsub3_then_ssub_hi |
| 59084 | 0, // dsub2_then_bsub |
| 59085 | 0, // dsub2_then_bsub_hi |
| 59086 | 0, // dsub2_then_hsub |
| 59087 | 0, // dsub2_then_hsub_hi |
| 59088 | 0, // dsub2_then_ssub |
| 59089 | 0, // dsub2_then_ssub_hi |
| 59090 | 0, // psub1_then_psub |
| 59091 | 190, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59092 | 0, // qsub3_then_dsub_hi |
| 59093 | 0, // qsub2_then_dsub_hi |
| 59094 | 0, // x8sub_7_then_sub_32 |
| 59095 | 0, // x8sub_7_then_sub_32_hi |
| 59096 | 0, // x8sub_6_then_sub_32 |
| 59097 | 0, // x8sub_6_then_sub_32_hi |
| 59098 | 0, // x8sub_5_then_sub_32 |
| 59099 | 0, // x8sub_5_then_sub_32_hi |
| 59100 | 0, // x8sub_4_then_sub_32 |
| 59101 | 0, // x8sub_4_then_sub_32_hi |
| 59102 | 0, // x8sub_3_then_sub_32 |
| 59103 | 0, // x8sub_3_then_sub_32_hi |
| 59104 | 0, // x8sub_2_then_sub_32 |
| 59105 | 0, // x8sub_2_then_sub_32_hi |
| 59106 | 0, // x8sub_1_then_sub_32 |
| 59107 | 0, // x8sub_1_then_sub_32_hi |
| 59108 | 0, // subo64_then_sub_32 |
| 59109 | 0, // subo64_then_sub_32_hi |
| 59110 | 190, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 59111 | 0, // zsub3_then_zsub_hi |
| 59112 | 0, // zsub2_then_zsub_hi |
| 59113 | 0, // dsub0_dsub1 |
| 59114 | 0, // dsub0_dsub1_dsub2 |
| 59115 | 0, // dsub1_dsub2 |
| 59116 | 0, // dsub1_dsub2_dsub3 |
| 59117 | 0, // dsub2_dsub3 |
| 59118 | 0, // dsub_dsub1 |
| 59119 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59120 | 0, // dsub_dsub1_dsub2 |
| 59121 | 0, // qsub0_qsub1 |
| 59122 | 0, // qsub0_qsub1_qsub2 |
| 59123 | 0, // qsub1_qsub2 |
| 59124 | 0, // qsub1_qsub2_qsub3 |
| 59125 | 0, // qsub2_qsub3 |
| 59126 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59127 | 0, // x8sub_0_x8sub_1 |
| 59128 | 0, // x8sub_2_x8sub_3 |
| 59129 | 0, // x8sub_4_x8sub_5 |
| 59130 | 0, // x8sub_6_x8sub_7 |
| 59131 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59132 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59133 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59134 | 0, // sub_32_subo64_then_sub_32 |
| 59135 | 0, // zsub_qsub1 |
| 59136 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59137 | 0, // zsub_qsub1_qsub2 |
| 59138 | 0, // zsub0_zsub1 |
| 59139 | 0, // zsub0_zsub1_zsub2 |
| 59140 | 0, // zsub1_zsub2 |
| 59141 | 0, // zsub1_zsub2_zsub3 |
| 59142 | 0, // zsub2_zsub3 |
| 59143 | 0, // zsub0_zsub2 |
| 59144 | 0, // zsub1_zsub3 |
| 59145 | }, |
| 59146 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59147 | 191, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59148 | 191, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59149 | 191, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59150 | 0, // dsub0 |
| 59151 | 191, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59152 | 0, // dsub2 |
| 59153 | 0, // dsub3 |
| 59154 | 191, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59155 | 191, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59156 | 191, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59157 | 0, // psub |
| 59158 | 0, // psub0 |
| 59159 | 0, // psub1 |
| 59160 | 0, // qsub0 |
| 59161 | 191, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59162 | 0, // qsub2 |
| 59163 | 0, // qsub3 |
| 59164 | 191, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59165 | 191, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59166 | 0, // sub_32 |
| 59167 | 0, // sub_32_hi |
| 59168 | 0, // sube32 |
| 59169 | 0, // sube64 |
| 59170 | 0, // subo32 |
| 59171 | 0, // subo64 |
| 59172 | 0, // x8sub_0 |
| 59173 | 0, // x8sub_1 |
| 59174 | 0, // x8sub_2 |
| 59175 | 0, // x8sub_3 |
| 59176 | 0, // x8sub_4 |
| 59177 | 0, // x8sub_5 |
| 59178 | 0, // x8sub_6 |
| 59179 | 0, // x8sub_7 |
| 59180 | 0, // zasubb |
| 59181 | 0, // zasubd0 |
| 59182 | 0, // zasubd1 |
| 59183 | 0, // zasubh0 |
| 59184 | 0, // zasubh1 |
| 59185 | 0, // zasubq0 |
| 59186 | 0, // zasubq1 |
| 59187 | 0, // zasubs0 |
| 59188 | 0, // zasubs1 |
| 59189 | 191, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59190 | 191, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59191 | 191, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59192 | 0, // zsub2 |
| 59193 | 0, // zsub3 |
| 59194 | 191, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59195 | 0, // zasubd1_then_zasubq0 |
| 59196 | 0, // zasubd1_then_zasubq1 |
| 59197 | 0, // zasubs1_then_zasubd0 |
| 59198 | 0, // zasubs1_then_zasubd1 |
| 59199 | 0, // zasubs1_then_zasubq0 |
| 59200 | 0, // zasubs1_then_zasubq1 |
| 59201 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59202 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59203 | 0, // zasubh1_then_zasubd0 |
| 59204 | 0, // zasubh1_then_zasubd1 |
| 59205 | 0, // zasubh1_then_zasubq0 |
| 59206 | 0, // zasubh1_then_zasubq1 |
| 59207 | 0, // zasubh1_then_zasubs0 |
| 59208 | 0, // zasubh1_then_zasubs1 |
| 59209 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59210 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59211 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59212 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59213 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59214 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59215 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59216 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59217 | 191, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59218 | 191, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59219 | 191, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59220 | 191, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59221 | 191, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59222 | 191, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59223 | 0, // dsub3_then_bsub |
| 59224 | 0, // dsub3_then_bsub_hi |
| 59225 | 0, // dsub3_then_hsub |
| 59226 | 0, // dsub3_then_hsub_hi |
| 59227 | 0, // dsub3_then_ssub |
| 59228 | 0, // dsub3_then_ssub_hi |
| 59229 | 0, // dsub2_then_bsub |
| 59230 | 0, // dsub2_then_bsub_hi |
| 59231 | 0, // dsub2_then_hsub |
| 59232 | 0, // dsub2_then_hsub_hi |
| 59233 | 0, // dsub2_then_ssub |
| 59234 | 0, // dsub2_then_ssub_hi |
| 59235 | 0, // psub1_then_psub |
| 59236 | 191, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59237 | 0, // qsub3_then_dsub_hi |
| 59238 | 0, // qsub2_then_dsub_hi |
| 59239 | 0, // x8sub_7_then_sub_32 |
| 59240 | 0, // x8sub_7_then_sub_32_hi |
| 59241 | 0, // x8sub_6_then_sub_32 |
| 59242 | 0, // x8sub_6_then_sub_32_hi |
| 59243 | 0, // x8sub_5_then_sub_32 |
| 59244 | 0, // x8sub_5_then_sub_32_hi |
| 59245 | 0, // x8sub_4_then_sub_32 |
| 59246 | 0, // x8sub_4_then_sub_32_hi |
| 59247 | 0, // x8sub_3_then_sub_32 |
| 59248 | 0, // x8sub_3_then_sub_32_hi |
| 59249 | 0, // x8sub_2_then_sub_32 |
| 59250 | 0, // x8sub_2_then_sub_32_hi |
| 59251 | 0, // x8sub_1_then_sub_32 |
| 59252 | 0, // x8sub_1_then_sub_32_hi |
| 59253 | 0, // subo64_then_sub_32 |
| 59254 | 0, // subo64_then_sub_32_hi |
| 59255 | 191, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 59256 | 0, // zsub3_then_zsub_hi |
| 59257 | 0, // zsub2_then_zsub_hi |
| 59258 | 0, // dsub0_dsub1 |
| 59259 | 0, // dsub0_dsub1_dsub2 |
| 59260 | 0, // dsub1_dsub2 |
| 59261 | 0, // dsub1_dsub2_dsub3 |
| 59262 | 0, // dsub2_dsub3 |
| 59263 | 0, // dsub_dsub1 |
| 59264 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59265 | 0, // dsub_dsub1_dsub2 |
| 59266 | 0, // qsub0_qsub1 |
| 59267 | 0, // qsub0_qsub1_qsub2 |
| 59268 | 0, // qsub1_qsub2 |
| 59269 | 0, // qsub1_qsub2_qsub3 |
| 59270 | 0, // qsub2_qsub3 |
| 59271 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59272 | 0, // x8sub_0_x8sub_1 |
| 59273 | 0, // x8sub_2_x8sub_3 |
| 59274 | 0, // x8sub_4_x8sub_5 |
| 59275 | 0, // x8sub_6_x8sub_7 |
| 59276 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59277 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59278 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59279 | 0, // sub_32_subo64_then_sub_32 |
| 59280 | 0, // zsub_qsub1 |
| 59281 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59282 | 0, // zsub_qsub1_qsub2 |
| 59283 | 0, // zsub0_zsub1 |
| 59284 | 0, // zsub0_zsub1_zsub2 |
| 59285 | 0, // zsub1_zsub2 |
| 59286 | 0, // zsub1_zsub2_zsub3 |
| 59287 | 0, // zsub2_zsub3 |
| 59288 | 0, // zsub0_zsub2 |
| 59289 | 0, // zsub1_zsub3 |
| 59290 | }, |
| 59291 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59292 | 192, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59293 | 192, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59294 | 192, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59295 | 0, // dsub0 |
| 59296 | 192, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59297 | 0, // dsub2 |
| 59298 | 0, // dsub3 |
| 59299 | 192, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59300 | 192, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59301 | 192, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59302 | 0, // psub |
| 59303 | 0, // psub0 |
| 59304 | 0, // psub1 |
| 59305 | 0, // qsub0 |
| 59306 | 192, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59307 | 0, // qsub2 |
| 59308 | 0, // qsub3 |
| 59309 | 192, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59310 | 192, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59311 | 0, // sub_32 |
| 59312 | 0, // sub_32_hi |
| 59313 | 0, // sube32 |
| 59314 | 0, // sube64 |
| 59315 | 0, // subo32 |
| 59316 | 0, // subo64 |
| 59317 | 0, // x8sub_0 |
| 59318 | 0, // x8sub_1 |
| 59319 | 0, // x8sub_2 |
| 59320 | 0, // x8sub_3 |
| 59321 | 0, // x8sub_4 |
| 59322 | 0, // x8sub_5 |
| 59323 | 0, // x8sub_6 |
| 59324 | 0, // x8sub_7 |
| 59325 | 0, // zasubb |
| 59326 | 0, // zasubd0 |
| 59327 | 0, // zasubd1 |
| 59328 | 0, // zasubh0 |
| 59329 | 0, // zasubh1 |
| 59330 | 0, // zasubq0 |
| 59331 | 0, // zasubq1 |
| 59332 | 0, // zasubs0 |
| 59333 | 0, // zasubs1 |
| 59334 | 192, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59335 | 192, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59336 | 192, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59337 | 0, // zsub2 |
| 59338 | 0, // zsub3 |
| 59339 | 192, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59340 | 0, // zasubd1_then_zasubq0 |
| 59341 | 0, // zasubd1_then_zasubq1 |
| 59342 | 0, // zasubs1_then_zasubd0 |
| 59343 | 0, // zasubs1_then_zasubd1 |
| 59344 | 0, // zasubs1_then_zasubq0 |
| 59345 | 0, // zasubs1_then_zasubq1 |
| 59346 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59347 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59348 | 0, // zasubh1_then_zasubd0 |
| 59349 | 0, // zasubh1_then_zasubd1 |
| 59350 | 0, // zasubh1_then_zasubq0 |
| 59351 | 0, // zasubh1_then_zasubq1 |
| 59352 | 0, // zasubh1_then_zasubs0 |
| 59353 | 0, // zasubh1_then_zasubs1 |
| 59354 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59355 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59356 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59357 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59358 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59359 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59360 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59361 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59362 | 192, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59363 | 192, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59364 | 192, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59365 | 192, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59366 | 192, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59367 | 192, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59368 | 0, // dsub3_then_bsub |
| 59369 | 0, // dsub3_then_bsub_hi |
| 59370 | 0, // dsub3_then_hsub |
| 59371 | 0, // dsub3_then_hsub_hi |
| 59372 | 0, // dsub3_then_ssub |
| 59373 | 0, // dsub3_then_ssub_hi |
| 59374 | 0, // dsub2_then_bsub |
| 59375 | 0, // dsub2_then_bsub_hi |
| 59376 | 0, // dsub2_then_hsub |
| 59377 | 0, // dsub2_then_hsub_hi |
| 59378 | 0, // dsub2_then_ssub |
| 59379 | 0, // dsub2_then_ssub_hi |
| 59380 | 0, // psub1_then_psub |
| 59381 | 192, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59382 | 0, // qsub3_then_dsub_hi |
| 59383 | 0, // qsub2_then_dsub_hi |
| 59384 | 0, // x8sub_7_then_sub_32 |
| 59385 | 0, // x8sub_7_then_sub_32_hi |
| 59386 | 0, // x8sub_6_then_sub_32 |
| 59387 | 0, // x8sub_6_then_sub_32_hi |
| 59388 | 0, // x8sub_5_then_sub_32 |
| 59389 | 0, // x8sub_5_then_sub_32_hi |
| 59390 | 0, // x8sub_4_then_sub_32 |
| 59391 | 0, // x8sub_4_then_sub_32_hi |
| 59392 | 0, // x8sub_3_then_sub_32 |
| 59393 | 0, // x8sub_3_then_sub_32_hi |
| 59394 | 0, // x8sub_2_then_sub_32 |
| 59395 | 0, // x8sub_2_then_sub_32_hi |
| 59396 | 0, // x8sub_1_then_sub_32 |
| 59397 | 0, // x8sub_1_then_sub_32_hi |
| 59398 | 0, // subo64_then_sub_32 |
| 59399 | 0, // subo64_then_sub_32_hi |
| 59400 | 192, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 59401 | 0, // zsub3_then_zsub_hi |
| 59402 | 0, // zsub2_then_zsub_hi |
| 59403 | 0, // dsub0_dsub1 |
| 59404 | 0, // dsub0_dsub1_dsub2 |
| 59405 | 0, // dsub1_dsub2 |
| 59406 | 0, // dsub1_dsub2_dsub3 |
| 59407 | 0, // dsub2_dsub3 |
| 59408 | 0, // dsub_dsub1 |
| 59409 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59410 | 0, // dsub_dsub1_dsub2 |
| 59411 | 0, // qsub0_qsub1 |
| 59412 | 0, // qsub0_qsub1_qsub2 |
| 59413 | 0, // qsub1_qsub2 |
| 59414 | 0, // qsub1_qsub2_qsub3 |
| 59415 | 0, // qsub2_qsub3 |
| 59416 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59417 | 0, // x8sub_0_x8sub_1 |
| 59418 | 0, // x8sub_2_x8sub_3 |
| 59419 | 0, // x8sub_4_x8sub_5 |
| 59420 | 0, // x8sub_6_x8sub_7 |
| 59421 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59422 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59423 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59424 | 0, // sub_32_subo64_then_sub_32 |
| 59425 | 0, // zsub_qsub1 |
| 59426 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59427 | 0, // zsub_qsub1_qsub2 |
| 59428 | 0, // zsub0_zsub1 |
| 59429 | 0, // zsub0_zsub1_zsub2 |
| 59430 | 0, // zsub1_zsub2 |
| 59431 | 0, // zsub1_zsub2_zsub3 |
| 59432 | 0, // zsub2_zsub3 |
| 59433 | 0, // zsub0_zsub2 |
| 59434 | 0, // zsub1_zsub3 |
| 59435 | }, |
| 59436 | { // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59437 | 193, // bsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59438 | 193, // bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59439 | 193, // dsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59440 | 0, // dsub0 |
| 59441 | 193, // dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59442 | 0, // dsub2 |
| 59443 | 0, // dsub3 |
| 59444 | 193, // dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59445 | 193, // hsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59446 | 193, // hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59447 | 0, // psub |
| 59448 | 0, // psub0 |
| 59449 | 0, // psub1 |
| 59450 | 0, // qsub0 |
| 59451 | 193, // qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59452 | 0, // qsub2 |
| 59453 | 0, // qsub3 |
| 59454 | 193, // ssub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59455 | 193, // ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59456 | 0, // sub_32 |
| 59457 | 0, // sub_32_hi |
| 59458 | 0, // sube32 |
| 59459 | 0, // sube64 |
| 59460 | 0, // subo32 |
| 59461 | 0, // subo64 |
| 59462 | 0, // x8sub_0 |
| 59463 | 0, // x8sub_1 |
| 59464 | 0, // x8sub_2 |
| 59465 | 0, // x8sub_3 |
| 59466 | 0, // x8sub_4 |
| 59467 | 0, // x8sub_5 |
| 59468 | 0, // x8sub_6 |
| 59469 | 0, // x8sub_7 |
| 59470 | 0, // zasubb |
| 59471 | 0, // zasubd0 |
| 59472 | 0, // zasubd1 |
| 59473 | 0, // zasubh0 |
| 59474 | 0, // zasubh1 |
| 59475 | 0, // zasubq0 |
| 59476 | 0, // zasubq1 |
| 59477 | 0, // zasubs0 |
| 59478 | 0, // zasubs1 |
| 59479 | 193, // zsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59480 | 193, // zsub0 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59481 | 193, // zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59482 | 0, // zsub2 |
| 59483 | 0, // zsub3 |
| 59484 | 193, // zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59485 | 0, // zasubd1_then_zasubq0 |
| 59486 | 0, // zasubd1_then_zasubq1 |
| 59487 | 0, // zasubs1_then_zasubd0 |
| 59488 | 0, // zasubs1_then_zasubd1 |
| 59489 | 0, // zasubs1_then_zasubq0 |
| 59490 | 0, // zasubs1_then_zasubq1 |
| 59491 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59492 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59493 | 0, // zasubh1_then_zasubd0 |
| 59494 | 0, // zasubh1_then_zasubd1 |
| 59495 | 0, // zasubh1_then_zasubq0 |
| 59496 | 0, // zasubh1_then_zasubq1 |
| 59497 | 0, // zasubh1_then_zasubs0 |
| 59498 | 0, // zasubh1_then_zasubs1 |
| 59499 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59500 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59501 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59502 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59503 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59504 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59505 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59506 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59507 | 193, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59508 | 193, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59509 | 193, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59510 | 193, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59511 | 193, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59512 | 193, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59513 | 0, // dsub3_then_bsub |
| 59514 | 0, // dsub3_then_bsub_hi |
| 59515 | 0, // dsub3_then_hsub |
| 59516 | 0, // dsub3_then_hsub_hi |
| 59517 | 0, // dsub3_then_ssub |
| 59518 | 0, // dsub3_then_ssub_hi |
| 59519 | 0, // dsub2_then_bsub |
| 59520 | 0, // dsub2_then_bsub_hi |
| 59521 | 0, // dsub2_then_hsub |
| 59522 | 0, // dsub2_then_hsub_hi |
| 59523 | 0, // dsub2_then_ssub |
| 59524 | 0, // dsub2_then_ssub_hi |
| 59525 | 0, // psub1_then_psub |
| 59526 | 193, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59527 | 0, // qsub3_then_dsub_hi |
| 59528 | 0, // qsub2_then_dsub_hi |
| 59529 | 0, // x8sub_7_then_sub_32 |
| 59530 | 0, // x8sub_7_then_sub_32_hi |
| 59531 | 0, // x8sub_6_then_sub_32 |
| 59532 | 0, // x8sub_6_then_sub_32_hi |
| 59533 | 0, // x8sub_5_then_sub_32 |
| 59534 | 0, // x8sub_5_then_sub_32_hi |
| 59535 | 0, // x8sub_4_then_sub_32 |
| 59536 | 0, // x8sub_4_then_sub_32_hi |
| 59537 | 0, // x8sub_3_then_sub_32 |
| 59538 | 0, // x8sub_3_then_sub_32_hi |
| 59539 | 0, // x8sub_2_then_sub_32 |
| 59540 | 0, // x8sub_2_then_sub_32_hi |
| 59541 | 0, // x8sub_1_then_sub_32 |
| 59542 | 0, // x8sub_1_then_sub_32_hi |
| 59543 | 0, // subo64_then_sub_32 |
| 59544 | 0, // subo64_then_sub_32_hi |
| 59545 | 193, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59546 | 0, // zsub3_then_zsub_hi |
| 59547 | 0, // zsub2_then_zsub_hi |
| 59548 | 0, // dsub0_dsub1 |
| 59549 | 0, // dsub0_dsub1_dsub2 |
| 59550 | 0, // dsub1_dsub2 |
| 59551 | 0, // dsub1_dsub2_dsub3 |
| 59552 | 0, // dsub2_dsub3 |
| 59553 | 193, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59554 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59555 | 0, // dsub_dsub1_dsub2 |
| 59556 | 0, // qsub0_qsub1 |
| 59557 | 0, // qsub0_qsub1_qsub2 |
| 59558 | 0, // qsub1_qsub2 |
| 59559 | 0, // qsub1_qsub2_qsub3 |
| 59560 | 0, // qsub2_qsub3 |
| 59561 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59562 | 0, // x8sub_0_x8sub_1 |
| 59563 | 0, // x8sub_2_x8sub_3 |
| 59564 | 0, // x8sub_4_x8sub_5 |
| 59565 | 0, // x8sub_6_x8sub_7 |
| 59566 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59567 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59568 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59569 | 0, // sub_32_subo64_then_sub_32 |
| 59570 | 193, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 59571 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59572 | 0, // zsub_qsub1_qsub2 |
| 59573 | 0, // zsub0_zsub1 |
| 59574 | 0, // zsub0_zsub1_zsub2 |
| 59575 | 0, // zsub1_zsub2 |
| 59576 | 0, // zsub1_zsub2_zsub3 |
| 59577 | 0, // zsub2_zsub3 |
| 59578 | 0, // zsub0_zsub2 |
| 59579 | 0, // zsub1_zsub3 |
| 59580 | }, |
| 59581 | { // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59582 | 194, // bsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59583 | 194, // bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59584 | 194, // dsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59585 | 0, // dsub0 |
| 59586 | 194, // dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59587 | 0, // dsub2 |
| 59588 | 0, // dsub3 |
| 59589 | 194, // dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59590 | 194, // hsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59591 | 194, // hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59592 | 0, // psub |
| 59593 | 0, // psub0 |
| 59594 | 0, // psub1 |
| 59595 | 0, // qsub0 |
| 59596 | 194, // qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59597 | 0, // qsub2 |
| 59598 | 0, // qsub3 |
| 59599 | 194, // ssub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59600 | 194, // ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59601 | 0, // sub_32 |
| 59602 | 0, // sub_32_hi |
| 59603 | 0, // sube32 |
| 59604 | 0, // sube64 |
| 59605 | 0, // subo32 |
| 59606 | 0, // subo64 |
| 59607 | 0, // x8sub_0 |
| 59608 | 0, // x8sub_1 |
| 59609 | 0, // x8sub_2 |
| 59610 | 0, // x8sub_3 |
| 59611 | 0, // x8sub_4 |
| 59612 | 0, // x8sub_5 |
| 59613 | 0, // x8sub_6 |
| 59614 | 0, // x8sub_7 |
| 59615 | 0, // zasubb |
| 59616 | 0, // zasubd0 |
| 59617 | 0, // zasubd1 |
| 59618 | 0, // zasubh0 |
| 59619 | 0, // zasubh1 |
| 59620 | 0, // zasubq0 |
| 59621 | 0, // zasubq1 |
| 59622 | 0, // zasubs0 |
| 59623 | 0, // zasubs1 |
| 59624 | 194, // zsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59625 | 194, // zsub0 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59626 | 194, // zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59627 | 0, // zsub2 |
| 59628 | 0, // zsub3 |
| 59629 | 194, // zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59630 | 0, // zasubd1_then_zasubq0 |
| 59631 | 0, // zasubd1_then_zasubq1 |
| 59632 | 0, // zasubs1_then_zasubd0 |
| 59633 | 0, // zasubs1_then_zasubd1 |
| 59634 | 0, // zasubs1_then_zasubq0 |
| 59635 | 0, // zasubs1_then_zasubq1 |
| 59636 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59637 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59638 | 0, // zasubh1_then_zasubd0 |
| 59639 | 0, // zasubh1_then_zasubd1 |
| 59640 | 0, // zasubh1_then_zasubq0 |
| 59641 | 0, // zasubh1_then_zasubq1 |
| 59642 | 0, // zasubh1_then_zasubs0 |
| 59643 | 0, // zasubh1_then_zasubs1 |
| 59644 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59645 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59646 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59647 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59648 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59649 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59650 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59651 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59652 | 194, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59653 | 194, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59654 | 194, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59655 | 194, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59656 | 194, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59657 | 194, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59658 | 0, // dsub3_then_bsub |
| 59659 | 0, // dsub3_then_bsub_hi |
| 59660 | 0, // dsub3_then_hsub |
| 59661 | 0, // dsub3_then_hsub_hi |
| 59662 | 0, // dsub3_then_ssub |
| 59663 | 0, // dsub3_then_ssub_hi |
| 59664 | 0, // dsub2_then_bsub |
| 59665 | 0, // dsub2_then_bsub_hi |
| 59666 | 0, // dsub2_then_hsub |
| 59667 | 0, // dsub2_then_hsub_hi |
| 59668 | 0, // dsub2_then_ssub |
| 59669 | 0, // dsub2_then_ssub_hi |
| 59670 | 0, // psub1_then_psub |
| 59671 | 194, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59672 | 0, // qsub3_then_dsub_hi |
| 59673 | 0, // qsub2_then_dsub_hi |
| 59674 | 0, // x8sub_7_then_sub_32 |
| 59675 | 0, // x8sub_7_then_sub_32_hi |
| 59676 | 0, // x8sub_6_then_sub_32 |
| 59677 | 0, // x8sub_6_then_sub_32_hi |
| 59678 | 0, // x8sub_5_then_sub_32 |
| 59679 | 0, // x8sub_5_then_sub_32_hi |
| 59680 | 0, // x8sub_4_then_sub_32 |
| 59681 | 0, // x8sub_4_then_sub_32_hi |
| 59682 | 0, // x8sub_3_then_sub_32 |
| 59683 | 0, // x8sub_3_then_sub_32_hi |
| 59684 | 0, // x8sub_2_then_sub_32 |
| 59685 | 0, // x8sub_2_then_sub_32_hi |
| 59686 | 0, // x8sub_1_then_sub_32 |
| 59687 | 0, // x8sub_1_then_sub_32_hi |
| 59688 | 0, // subo64_then_sub_32 |
| 59689 | 0, // subo64_then_sub_32_hi |
| 59690 | 194, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59691 | 0, // zsub3_then_zsub_hi |
| 59692 | 0, // zsub2_then_zsub_hi |
| 59693 | 0, // dsub0_dsub1 |
| 59694 | 0, // dsub0_dsub1_dsub2 |
| 59695 | 0, // dsub1_dsub2 |
| 59696 | 0, // dsub1_dsub2_dsub3 |
| 59697 | 0, // dsub2_dsub3 |
| 59698 | 194, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59699 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59700 | 0, // dsub_dsub1_dsub2 |
| 59701 | 0, // qsub0_qsub1 |
| 59702 | 0, // qsub0_qsub1_qsub2 |
| 59703 | 0, // qsub1_qsub2 |
| 59704 | 0, // qsub1_qsub2_qsub3 |
| 59705 | 0, // qsub2_qsub3 |
| 59706 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59707 | 0, // x8sub_0_x8sub_1 |
| 59708 | 0, // x8sub_2_x8sub_3 |
| 59709 | 0, // x8sub_4_x8sub_5 |
| 59710 | 0, // x8sub_6_x8sub_7 |
| 59711 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59712 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59713 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59714 | 0, // sub_32_subo64_then_sub_32 |
| 59715 | 194, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 59716 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59717 | 0, // zsub_qsub1_qsub2 |
| 59718 | 0, // zsub0_zsub1 |
| 59719 | 0, // zsub0_zsub1_zsub2 |
| 59720 | 0, // zsub1_zsub2 |
| 59721 | 0, // zsub1_zsub2_zsub3 |
| 59722 | 0, // zsub2_zsub3 |
| 59723 | 0, // zsub0_zsub2 |
| 59724 | 0, // zsub1_zsub3 |
| 59725 | }, |
| 59726 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59727 | 195, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59728 | 195, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59729 | 195, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59730 | 0, // dsub0 |
| 59731 | 195, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59732 | 0, // dsub2 |
| 59733 | 0, // dsub3 |
| 59734 | 195, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59735 | 195, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59736 | 195, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59737 | 0, // psub |
| 59738 | 0, // psub0 |
| 59739 | 0, // psub1 |
| 59740 | 0, // qsub0 |
| 59741 | 195, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59742 | 0, // qsub2 |
| 59743 | 0, // qsub3 |
| 59744 | 195, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59745 | 195, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59746 | 0, // sub_32 |
| 59747 | 0, // sub_32_hi |
| 59748 | 0, // sube32 |
| 59749 | 0, // sube64 |
| 59750 | 0, // subo32 |
| 59751 | 0, // subo64 |
| 59752 | 0, // x8sub_0 |
| 59753 | 0, // x8sub_1 |
| 59754 | 0, // x8sub_2 |
| 59755 | 0, // x8sub_3 |
| 59756 | 0, // x8sub_4 |
| 59757 | 0, // x8sub_5 |
| 59758 | 0, // x8sub_6 |
| 59759 | 0, // x8sub_7 |
| 59760 | 0, // zasubb |
| 59761 | 0, // zasubd0 |
| 59762 | 0, // zasubd1 |
| 59763 | 0, // zasubh0 |
| 59764 | 0, // zasubh1 |
| 59765 | 0, // zasubq0 |
| 59766 | 0, // zasubq1 |
| 59767 | 0, // zasubs0 |
| 59768 | 0, // zasubs1 |
| 59769 | 195, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59770 | 195, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59771 | 195, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59772 | 0, // zsub2 |
| 59773 | 0, // zsub3 |
| 59774 | 195, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59775 | 0, // zasubd1_then_zasubq0 |
| 59776 | 0, // zasubd1_then_zasubq1 |
| 59777 | 0, // zasubs1_then_zasubd0 |
| 59778 | 0, // zasubs1_then_zasubd1 |
| 59779 | 0, // zasubs1_then_zasubq0 |
| 59780 | 0, // zasubs1_then_zasubq1 |
| 59781 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59782 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59783 | 0, // zasubh1_then_zasubd0 |
| 59784 | 0, // zasubh1_then_zasubd1 |
| 59785 | 0, // zasubh1_then_zasubq0 |
| 59786 | 0, // zasubh1_then_zasubq1 |
| 59787 | 0, // zasubh1_then_zasubs0 |
| 59788 | 0, // zasubh1_then_zasubs1 |
| 59789 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59790 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59791 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59792 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59793 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59794 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59795 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59796 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59797 | 195, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59798 | 195, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59799 | 195, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59800 | 195, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59801 | 195, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59802 | 195, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59803 | 0, // dsub3_then_bsub |
| 59804 | 0, // dsub3_then_bsub_hi |
| 59805 | 0, // dsub3_then_hsub |
| 59806 | 0, // dsub3_then_hsub_hi |
| 59807 | 0, // dsub3_then_ssub |
| 59808 | 0, // dsub3_then_ssub_hi |
| 59809 | 0, // dsub2_then_bsub |
| 59810 | 0, // dsub2_then_bsub_hi |
| 59811 | 0, // dsub2_then_hsub |
| 59812 | 0, // dsub2_then_hsub_hi |
| 59813 | 0, // dsub2_then_ssub |
| 59814 | 0, // dsub2_then_ssub_hi |
| 59815 | 0, // psub1_then_psub |
| 59816 | 195, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59817 | 0, // qsub3_then_dsub_hi |
| 59818 | 0, // qsub2_then_dsub_hi |
| 59819 | 0, // x8sub_7_then_sub_32 |
| 59820 | 0, // x8sub_7_then_sub_32_hi |
| 59821 | 0, // x8sub_6_then_sub_32 |
| 59822 | 0, // x8sub_6_then_sub_32_hi |
| 59823 | 0, // x8sub_5_then_sub_32 |
| 59824 | 0, // x8sub_5_then_sub_32_hi |
| 59825 | 0, // x8sub_4_then_sub_32 |
| 59826 | 0, // x8sub_4_then_sub_32_hi |
| 59827 | 0, // x8sub_3_then_sub_32 |
| 59828 | 0, // x8sub_3_then_sub_32_hi |
| 59829 | 0, // x8sub_2_then_sub_32 |
| 59830 | 0, // x8sub_2_then_sub_32_hi |
| 59831 | 0, // x8sub_1_then_sub_32 |
| 59832 | 0, // x8sub_1_then_sub_32_hi |
| 59833 | 0, // subo64_then_sub_32 |
| 59834 | 0, // subo64_then_sub_32_hi |
| 59835 | 195, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59836 | 0, // zsub3_then_zsub_hi |
| 59837 | 0, // zsub2_then_zsub_hi |
| 59838 | 0, // dsub0_dsub1 |
| 59839 | 0, // dsub0_dsub1_dsub2 |
| 59840 | 0, // dsub1_dsub2 |
| 59841 | 0, // dsub1_dsub2_dsub3 |
| 59842 | 0, // dsub2_dsub3 |
| 59843 | 195, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59844 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59845 | 0, // dsub_dsub1_dsub2 |
| 59846 | 0, // qsub0_qsub1 |
| 59847 | 0, // qsub0_qsub1_qsub2 |
| 59848 | 0, // qsub1_qsub2 |
| 59849 | 0, // qsub1_qsub2_qsub3 |
| 59850 | 0, // qsub2_qsub3 |
| 59851 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59852 | 0, // x8sub_0_x8sub_1 |
| 59853 | 0, // x8sub_2_x8sub_3 |
| 59854 | 0, // x8sub_4_x8sub_5 |
| 59855 | 0, // x8sub_6_x8sub_7 |
| 59856 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 59857 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 59858 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 59859 | 0, // sub_32_subo64_then_sub_32 |
| 59860 | 195, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 59861 | 0, // zsub_qsub1_qsub2_qsub3 |
| 59862 | 0, // zsub_qsub1_qsub2 |
| 59863 | 0, // zsub0_zsub1 |
| 59864 | 0, // zsub0_zsub1_zsub2 |
| 59865 | 0, // zsub1_zsub2 |
| 59866 | 0, // zsub1_zsub2_zsub3 |
| 59867 | 0, // zsub2_zsub3 |
| 59868 | 0, // zsub0_zsub2 |
| 59869 | 0, // zsub1_zsub3 |
| 59870 | }, |
| 59871 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59872 | 196, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59873 | 196, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59874 | 196, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59875 | 0, // dsub0 |
| 59876 | 196, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59877 | 0, // dsub2 |
| 59878 | 0, // dsub3 |
| 59879 | 196, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59880 | 196, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59881 | 196, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59882 | 0, // psub |
| 59883 | 0, // psub0 |
| 59884 | 0, // psub1 |
| 59885 | 0, // qsub0 |
| 59886 | 196, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59887 | 0, // qsub2 |
| 59888 | 0, // qsub3 |
| 59889 | 196, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59890 | 196, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59891 | 0, // sub_32 |
| 59892 | 0, // sub_32_hi |
| 59893 | 0, // sube32 |
| 59894 | 0, // sube64 |
| 59895 | 0, // subo32 |
| 59896 | 0, // subo64 |
| 59897 | 0, // x8sub_0 |
| 59898 | 0, // x8sub_1 |
| 59899 | 0, // x8sub_2 |
| 59900 | 0, // x8sub_3 |
| 59901 | 0, // x8sub_4 |
| 59902 | 0, // x8sub_5 |
| 59903 | 0, // x8sub_6 |
| 59904 | 0, // x8sub_7 |
| 59905 | 0, // zasubb |
| 59906 | 0, // zasubd0 |
| 59907 | 0, // zasubd1 |
| 59908 | 0, // zasubh0 |
| 59909 | 0, // zasubh1 |
| 59910 | 0, // zasubq0 |
| 59911 | 0, // zasubq1 |
| 59912 | 0, // zasubs0 |
| 59913 | 0, // zasubs1 |
| 59914 | 196, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59915 | 196, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59916 | 196, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59917 | 0, // zsub2 |
| 59918 | 0, // zsub3 |
| 59919 | 196, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59920 | 0, // zasubd1_then_zasubq0 |
| 59921 | 0, // zasubd1_then_zasubq1 |
| 59922 | 0, // zasubs1_then_zasubd0 |
| 59923 | 0, // zasubs1_then_zasubd1 |
| 59924 | 0, // zasubs1_then_zasubq0 |
| 59925 | 0, // zasubs1_then_zasubq1 |
| 59926 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 59927 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 59928 | 0, // zasubh1_then_zasubd0 |
| 59929 | 0, // zasubh1_then_zasubd1 |
| 59930 | 0, // zasubh1_then_zasubq0 |
| 59931 | 0, // zasubh1_then_zasubq1 |
| 59932 | 0, // zasubh1_then_zasubs0 |
| 59933 | 0, // zasubh1_then_zasubs1 |
| 59934 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 59935 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 59936 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 59937 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 59938 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 59939 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 59940 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 59941 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 59942 | 196, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59943 | 196, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59944 | 196, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59945 | 196, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59946 | 196, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59947 | 196, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59948 | 0, // dsub3_then_bsub |
| 59949 | 0, // dsub3_then_bsub_hi |
| 59950 | 0, // dsub3_then_hsub |
| 59951 | 0, // dsub3_then_hsub_hi |
| 59952 | 0, // dsub3_then_ssub |
| 59953 | 0, // dsub3_then_ssub_hi |
| 59954 | 0, // dsub2_then_bsub |
| 59955 | 0, // dsub2_then_bsub_hi |
| 59956 | 0, // dsub2_then_hsub |
| 59957 | 0, // dsub2_then_hsub_hi |
| 59958 | 0, // dsub2_then_ssub |
| 59959 | 0, // dsub2_then_ssub_hi |
| 59960 | 0, // psub1_then_psub |
| 59961 | 196, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59962 | 0, // qsub3_then_dsub_hi |
| 59963 | 0, // qsub2_then_dsub_hi |
| 59964 | 0, // x8sub_7_then_sub_32 |
| 59965 | 0, // x8sub_7_then_sub_32_hi |
| 59966 | 0, // x8sub_6_then_sub_32 |
| 59967 | 0, // x8sub_6_then_sub_32_hi |
| 59968 | 0, // x8sub_5_then_sub_32 |
| 59969 | 0, // x8sub_5_then_sub_32_hi |
| 59970 | 0, // x8sub_4_then_sub_32 |
| 59971 | 0, // x8sub_4_then_sub_32_hi |
| 59972 | 0, // x8sub_3_then_sub_32 |
| 59973 | 0, // x8sub_3_then_sub_32_hi |
| 59974 | 0, // x8sub_2_then_sub_32 |
| 59975 | 0, // x8sub_2_then_sub_32_hi |
| 59976 | 0, // x8sub_1_then_sub_32 |
| 59977 | 0, // x8sub_1_then_sub_32_hi |
| 59978 | 0, // subo64_then_sub_32 |
| 59979 | 0, // subo64_then_sub_32_hi |
| 59980 | 196, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59981 | 0, // zsub3_then_zsub_hi |
| 59982 | 0, // zsub2_then_zsub_hi |
| 59983 | 0, // dsub0_dsub1 |
| 59984 | 0, // dsub0_dsub1_dsub2 |
| 59985 | 0, // dsub1_dsub2 |
| 59986 | 0, // dsub1_dsub2_dsub3 |
| 59987 | 0, // dsub2_dsub3 |
| 59988 | 196, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 59989 | 0, // dsub_dsub1_dsub2_dsub3 |
| 59990 | 0, // dsub_dsub1_dsub2 |
| 59991 | 0, // qsub0_qsub1 |
| 59992 | 0, // qsub0_qsub1_qsub2 |
| 59993 | 0, // qsub1_qsub2 |
| 59994 | 0, // qsub1_qsub2_qsub3 |
| 59995 | 0, // qsub2_qsub3 |
| 59996 | 0, // sub_32_x8sub_1_then_sub_32 |
| 59997 | 0, // x8sub_0_x8sub_1 |
| 59998 | 0, // x8sub_2_x8sub_3 |
| 59999 | 0, // x8sub_4_x8sub_5 |
| 60000 | 0, // x8sub_6_x8sub_7 |
| 60001 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60002 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60003 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60004 | 0, // sub_32_subo64_then_sub_32 |
| 60005 | 196, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60006 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60007 | 0, // zsub_qsub1_qsub2 |
| 60008 | 0, // zsub0_zsub1 |
| 60009 | 0, // zsub0_zsub1_zsub2 |
| 60010 | 0, // zsub1_zsub2 |
| 60011 | 0, // zsub1_zsub2_zsub3 |
| 60012 | 0, // zsub2_zsub3 |
| 60013 | 0, // zsub0_zsub2 |
| 60014 | 0, // zsub1_zsub3 |
| 60015 | }, |
| 60016 | { // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60017 | 197, // bsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60018 | 197, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60019 | 197, // dsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60020 | 0, // dsub0 |
| 60021 | 197, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60022 | 0, // dsub2 |
| 60023 | 0, // dsub3 |
| 60024 | 197, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60025 | 197, // hsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60026 | 197, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60027 | 0, // psub |
| 60028 | 0, // psub0 |
| 60029 | 0, // psub1 |
| 60030 | 0, // qsub0 |
| 60031 | 197, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60032 | 0, // qsub2 |
| 60033 | 0, // qsub3 |
| 60034 | 197, // ssub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60035 | 197, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60036 | 0, // sub_32 |
| 60037 | 0, // sub_32_hi |
| 60038 | 0, // sube32 |
| 60039 | 0, // sube64 |
| 60040 | 0, // subo32 |
| 60041 | 0, // subo64 |
| 60042 | 0, // x8sub_0 |
| 60043 | 0, // x8sub_1 |
| 60044 | 0, // x8sub_2 |
| 60045 | 0, // x8sub_3 |
| 60046 | 0, // x8sub_4 |
| 60047 | 0, // x8sub_5 |
| 60048 | 0, // x8sub_6 |
| 60049 | 0, // x8sub_7 |
| 60050 | 0, // zasubb |
| 60051 | 0, // zasubd0 |
| 60052 | 0, // zasubd1 |
| 60053 | 0, // zasubh0 |
| 60054 | 0, // zasubh1 |
| 60055 | 0, // zasubq0 |
| 60056 | 0, // zasubq1 |
| 60057 | 0, // zasubs0 |
| 60058 | 0, // zasubs1 |
| 60059 | 197, // zsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60060 | 197, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60061 | 197, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60062 | 0, // zsub2 |
| 60063 | 0, // zsub3 |
| 60064 | 197, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60065 | 0, // zasubd1_then_zasubq0 |
| 60066 | 0, // zasubd1_then_zasubq1 |
| 60067 | 0, // zasubs1_then_zasubd0 |
| 60068 | 0, // zasubs1_then_zasubd1 |
| 60069 | 0, // zasubs1_then_zasubq0 |
| 60070 | 0, // zasubs1_then_zasubq1 |
| 60071 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60072 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60073 | 0, // zasubh1_then_zasubd0 |
| 60074 | 0, // zasubh1_then_zasubd1 |
| 60075 | 0, // zasubh1_then_zasubq0 |
| 60076 | 0, // zasubh1_then_zasubq1 |
| 60077 | 0, // zasubh1_then_zasubs0 |
| 60078 | 0, // zasubh1_then_zasubs1 |
| 60079 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60080 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60081 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60082 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60083 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60084 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60085 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60086 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60087 | 197, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60088 | 197, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60089 | 197, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60090 | 197, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60091 | 197, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60092 | 197, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60093 | 0, // dsub3_then_bsub |
| 60094 | 0, // dsub3_then_bsub_hi |
| 60095 | 0, // dsub3_then_hsub |
| 60096 | 0, // dsub3_then_hsub_hi |
| 60097 | 0, // dsub3_then_ssub |
| 60098 | 0, // dsub3_then_ssub_hi |
| 60099 | 0, // dsub2_then_bsub |
| 60100 | 0, // dsub2_then_bsub_hi |
| 60101 | 0, // dsub2_then_hsub |
| 60102 | 0, // dsub2_then_hsub_hi |
| 60103 | 0, // dsub2_then_ssub |
| 60104 | 0, // dsub2_then_ssub_hi |
| 60105 | 0, // psub1_then_psub |
| 60106 | 197, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60107 | 0, // qsub3_then_dsub_hi |
| 60108 | 0, // qsub2_then_dsub_hi |
| 60109 | 0, // x8sub_7_then_sub_32 |
| 60110 | 0, // x8sub_7_then_sub_32_hi |
| 60111 | 0, // x8sub_6_then_sub_32 |
| 60112 | 0, // x8sub_6_then_sub_32_hi |
| 60113 | 0, // x8sub_5_then_sub_32 |
| 60114 | 0, // x8sub_5_then_sub_32_hi |
| 60115 | 0, // x8sub_4_then_sub_32 |
| 60116 | 0, // x8sub_4_then_sub_32_hi |
| 60117 | 0, // x8sub_3_then_sub_32 |
| 60118 | 0, // x8sub_3_then_sub_32_hi |
| 60119 | 0, // x8sub_2_then_sub_32 |
| 60120 | 0, // x8sub_2_then_sub_32_hi |
| 60121 | 0, // x8sub_1_then_sub_32 |
| 60122 | 0, // x8sub_1_then_sub_32_hi |
| 60123 | 0, // subo64_then_sub_32 |
| 60124 | 0, // subo64_then_sub_32_hi |
| 60125 | 197, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60126 | 0, // zsub3_then_zsub_hi |
| 60127 | 0, // zsub2_then_zsub_hi |
| 60128 | 0, // dsub0_dsub1 |
| 60129 | 0, // dsub0_dsub1_dsub2 |
| 60130 | 0, // dsub1_dsub2 |
| 60131 | 0, // dsub1_dsub2_dsub3 |
| 60132 | 0, // dsub2_dsub3 |
| 60133 | 197, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60134 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60135 | 0, // dsub_dsub1_dsub2 |
| 60136 | 0, // qsub0_qsub1 |
| 60137 | 0, // qsub0_qsub1_qsub2 |
| 60138 | 0, // qsub1_qsub2 |
| 60139 | 0, // qsub1_qsub2_qsub3 |
| 60140 | 0, // qsub2_qsub3 |
| 60141 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60142 | 0, // x8sub_0_x8sub_1 |
| 60143 | 0, // x8sub_2_x8sub_3 |
| 60144 | 0, // x8sub_4_x8sub_5 |
| 60145 | 0, // x8sub_6_x8sub_7 |
| 60146 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60147 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60148 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60149 | 0, // sub_32_subo64_then_sub_32 |
| 60150 | 197, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60151 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60152 | 0, // zsub_qsub1_qsub2 |
| 60153 | 0, // zsub0_zsub1 |
| 60154 | 0, // zsub0_zsub1_zsub2 |
| 60155 | 0, // zsub1_zsub2 |
| 60156 | 0, // zsub1_zsub2_zsub3 |
| 60157 | 0, // zsub2_zsub3 |
| 60158 | 0, // zsub0_zsub2 |
| 60159 | 0, // zsub1_zsub3 |
| 60160 | }, |
| 60161 | { // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60162 | 198, // bsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60163 | 198, // bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60164 | 198, // dsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60165 | 0, // dsub0 |
| 60166 | 198, // dsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60167 | 0, // dsub2 |
| 60168 | 0, // dsub3 |
| 60169 | 198, // dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60170 | 198, // hsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60171 | 198, // hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60172 | 0, // psub |
| 60173 | 0, // psub0 |
| 60174 | 0, // psub1 |
| 60175 | 0, // qsub0 |
| 60176 | 198, // qsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60177 | 0, // qsub2 |
| 60178 | 0, // qsub3 |
| 60179 | 198, // ssub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60180 | 198, // ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60181 | 0, // sub_32 |
| 60182 | 0, // sub_32_hi |
| 60183 | 0, // sube32 |
| 60184 | 0, // sube64 |
| 60185 | 0, // subo32 |
| 60186 | 0, // subo64 |
| 60187 | 0, // x8sub_0 |
| 60188 | 0, // x8sub_1 |
| 60189 | 0, // x8sub_2 |
| 60190 | 0, // x8sub_3 |
| 60191 | 0, // x8sub_4 |
| 60192 | 0, // x8sub_5 |
| 60193 | 0, // x8sub_6 |
| 60194 | 0, // x8sub_7 |
| 60195 | 0, // zasubb |
| 60196 | 0, // zasubd0 |
| 60197 | 0, // zasubd1 |
| 60198 | 0, // zasubh0 |
| 60199 | 0, // zasubh1 |
| 60200 | 0, // zasubq0 |
| 60201 | 0, // zasubq1 |
| 60202 | 0, // zasubs0 |
| 60203 | 0, // zasubs1 |
| 60204 | 198, // zsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60205 | 198, // zsub0 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60206 | 198, // zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60207 | 0, // zsub2 |
| 60208 | 0, // zsub3 |
| 60209 | 198, // zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60210 | 0, // zasubd1_then_zasubq0 |
| 60211 | 0, // zasubd1_then_zasubq1 |
| 60212 | 0, // zasubs1_then_zasubd0 |
| 60213 | 0, // zasubs1_then_zasubd1 |
| 60214 | 0, // zasubs1_then_zasubq0 |
| 60215 | 0, // zasubs1_then_zasubq1 |
| 60216 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60217 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60218 | 0, // zasubh1_then_zasubd0 |
| 60219 | 0, // zasubh1_then_zasubd1 |
| 60220 | 0, // zasubh1_then_zasubq0 |
| 60221 | 0, // zasubh1_then_zasubq1 |
| 60222 | 0, // zasubh1_then_zasubs0 |
| 60223 | 0, // zasubh1_then_zasubs1 |
| 60224 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60225 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60226 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60227 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60228 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60229 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60230 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60231 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60232 | 198, // dsub1_then_bsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60233 | 198, // dsub1_then_bsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60234 | 198, // dsub1_then_hsub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60235 | 198, // dsub1_then_hsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60236 | 198, // dsub1_then_ssub -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60237 | 198, // dsub1_then_ssub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60238 | 0, // dsub3_then_bsub |
| 60239 | 0, // dsub3_then_bsub_hi |
| 60240 | 0, // dsub3_then_hsub |
| 60241 | 0, // dsub3_then_hsub_hi |
| 60242 | 0, // dsub3_then_ssub |
| 60243 | 0, // dsub3_then_ssub_hi |
| 60244 | 0, // dsub2_then_bsub |
| 60245 | 0, // dsub2_then_bsub_hi |
| 60246 | 0, // dsub2_then_hsub |
| 60247 | 0, // dsub2_then_hsub_hi |
| 60248 | 0, // dsub2_then_ssub |
| 60249 | 0, // dsub2_then_ssub_hi |
| 60250 | 0, // psub1_then_psub |
| 60251 | 198, // qsub1_then_dsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60252 | 0, // qsub3_then_dsub_hi |
| 60253 | 0, // qsub2_then_dsub_hi |
| 60254 | 0, // x8sub_7_then_sub_32 |
| 60255 | 0, // x8sub_7_then_sub_32_hi |
| 60256 | 0, // x8sub_6_then_sub_32 |
| 60257 | 0, // x8sub_6_then_sub_32_hi |
| 60258 | 0, // x8sub_5_then_sub_32 |
| 60259 | 0, // x8sub_5_then_sub_32_hi |
| 60260 | 0, // x8sub_4_then_sub_32 |
| 60261 | 0, // x8sub_4_then_sub_32_hi |
| 60262 | 0, // x8sub_3_then_sub_32 |
| 60263 | 0, // x8sub_3_then_sub_32_hi |
| 60264 | 0, // x8sub_2_then_sub_32 |
| 60265 | 0, // x8sub_2_then_sub_32_hi |
| 60266 | 0, // x8sub_1_then_sub_32 |
| 60267 | 0, // x8sub_1_then_sub_32_hi |
| 60268 | 0, // subo64_then_sub_32 |
| 60269 | 0, // subo64_then_sub_32_hi |
| 60270 | 198, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60271 | 0, // zsub3_then_zsub_hi |
| 60272 | 0, // zsub2_then_zsub_hi |
| 60273 | 0, // dsub0_dsub1 |
| 60274 | 0, // dsub0_dsub1_dsub2 |
| 60275 | 0, // dsub1_dsub2 |
| 60276 | 0, // dsub1_dsub2_dsub3 |
| 60277 | 0, // dsub2_dsub3 |
| 60278 | 198, // dsub_dsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60279 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60280 | 0, // dsub_dsub1_dsub2 |
| 60281 | 0, // qsub0_qsub1 |
| 60282 | 0, // qsub0_qsub1_qsub2 |
| 60283 | 0, // qsub1_qsub2 |
| 60284 | 0, // qsub1_qsub2_qsub3 |
| 60285 | 0, // qsub2_qsub3 |
| 60286 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60287 | 0, // x8sub_0_x8sub_1 |
| 60288 | 0, // x8sub_2_x8sub_3 |
| 60289 | 0, // x8sub_4_x8sub_5 |
| 60290 | 0, // x8sub_6_x8sub_7 |
| 60291 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60292 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60293 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60294 | 0, // sub_32_subo64_then_sub_32 |
| 60295 | 198, // zsub_qsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 60296 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60297 | 0, // zsub_qsub1_qsub2 |
| 60298 | 0, // zsub0_zsub1 |
| 60299 | 0, // zsub0_zsub1_zsub2 |
| 60300 | 0, // zsub1_zsub2 |
| 60301 | 0, // zsub1_zsub2_zsub3 |
| 60302 | 0, // zsub2_zsub3 |
| 60303 | 0, // zsub0_zsub2 |
| 60304 | 0, // zsub1_zsub3 |
| 60305 | }, |
| 60306 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60307 | 199, // bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60308 | 199, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60309 | 199, // dsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60310 | 0, // dsub0 |
| 60311 | 199, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60312 | 0, // dsub2 |
| 60313 | 0, // dsub3 |
| 60314 | 199, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60315 | 199, // hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60316 | 199, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60317 | 0, // psub |
| 60318 | 0, // psub0 |
| 60319 | 0, // psub1 |
| 60320 | 0, // qsub0 |
| 60321 | 199, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60322 | 0, // qsub2 |
| 60323 | 0, // qsub3 |
| 60324 | 199, // ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60325 | 199, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60326 | 0, // sub_32 |
| 60327 | 0, // sub_32_hi |
| 60328 | 0, // sube32 |
| 60329 | 0, // sube64 |
| 60330 | 0, // subo32 |
| 60331 | 0, // subo64 |
| 60332 | 0, // x8sub_0 |
| 60333 | 0, // x8sub_1 |
| 60334 | 0, // x8sub_2 |
| 60335 | 0, // x8sub_3 |
| 60336 | 0, // x8sub_4 |
| 60337 | 0, // x8sub_5 |
| 60338 | 0, // x8sub_6 |
| 60339 | 0, // x8sub_7 |
| 60340 | 0, // zasubb |
| 60341 | 0, // zasubd0 |
| 60342 | 0, // zasubd1 |
| 60343 | 0, // zasubh0 |
| 60344 | 0, // zasubh1 |
| 60345 | 0, // zasubq0 |
| 60346 | 0, // zasubq1 |
| 60347 | 0, // zasubs0 |
| 60348 | 0, // zasubs1 |
| 60349 | 199, // zsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60350 | 199, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60351 | 199, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60352 | 0, // zsub2 |
| 60353 | 0, // zsub3 |
| 60354 | 199, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60355 | 0, // zasubd1_then_zasubq0 |
| 60356 | 0, // zasubd1_then_zasubq1 |
| 60357 | 0, // zasubs1_then_zasubd0 |
| 60358 | 0, // zasubs1_then_zasubd1 |
| 60359 | 0, // zasubs1_then_zasubq0 |
| 60360 | 0, // zasubs1_then_zasubq1 |
| 60361 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60362 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60363 | 0, // zasubh1_then_zasubd0 |
| 60364 | 0, // zasubh1_then_zasubd1 |
| 60365 | 0, // zasubh1_then_zasubq0 |
| 60366 | 0, // zasubh1_then_zasubq1 |
| 60367 | 0, // zasubh1_then_zasubs0 |
| 60368 | 0, // zasubh1_then_zasubs1 |
| 60369 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60370 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60371 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60372 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60373 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60374 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60375 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60376 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60377 | 199, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60378 | 199, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60379 | 199, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60380 | 199, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60381 | 199, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60382 | 199, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60383 | 0, // dsub3_then_bsub |
| 60384 | 0, // dsub3_then_bsub_hi |
| 60385 | 0, // dsub3_then_hsub |
| 60386 | 0, // dsub3_then_hsub_hi |
| 60387 | 0, // dsub3_then_ssub |
| 60388 | 0, // dsub3_then_ssub_hi |
| 60389 | 0, // dsub2_then_bsub |
| 60390 | 0, // dsub2_then_bsub_hi |
| 60391 | 0, // dsub2_then_hsub |
| 60392 | 0, // dsub2_then_hsub_hi |
| 60393 | 0, // dsub2_then_ssub |
| 60394 | 0, // dsub2_then_ssub_hi |
| 60395 | 0, // psub1_then_psub |
| 60396 | 199, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60397 | 0, // qsub3_then_dsub_hi |
| 60398 | 0, // qsub2_then_dsub_hi |
| 60399 | 0, // x8sub_7_then_sub_32 |
| 60400 | 0, // x8sub_7_then_sub_32_hi |
| 60401 | 0, // x8sub_6_then_sub_32 |
| 60402 | 0, // x8sub_6_then_sub_32_hi |
| 60403 | 0, // x8sub_5_then_sub_32 |
| 60404 | 0, // x8sub_5_then_sub_32_hi |
| 60405 | 0, // x8sub_4_then_sub_32 |
| 60406 | 0, // x8sub_4_then_sub_32_hi |
| 60407 | 0, // x8sub_3_then_sub_32 |
| 60408 | 0, // x8sub_3_then_sub_32_hi |
| 60409 | 0, // x8sub_2_then_sub_32 |
| 60410 | 0, // x8sub_2_then_sub_32_hi |
| 60411 | 0, // x8sub_1_then_sub_32 |
| 60412 | 0, // x8sub_1_then_sub_32_hi |
| 60413 | 0, // subo64_then_sub_32 |
| 60414 | 0, // subo64_then_sub_32_hi |
| 60415 | 199, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60416 | 0, // zsub3_then_zsub_hi |
| 60417 | 0, // zsub2_then_zsub_hi |
| 60418 | 0, // dsub0_dsub1 |
| 60419 | 0, // dsub0_dsub1_dsub2 |
| 60420 | 0, // dsub1_dsub2 |
| 60421 | 0, // dsub1_dsub2_dsub3 |
| 60422 | 0, // dsub2_dsub3 |
| 60423 | 199, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60424 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60425 | 0, // dsub_dsub1_dsub2 |
| 60426 | 0, // qsub0_qsub1 |
| 60427 | 0, // qsub0_qsub1_qsub2 |
| 60428 | 0, // qsub1_qsub2 |
| 60429 | 0, // qsub1_qsub2_qsub3 |
| 60430 | 0, // qsub2_qsub3 |
| 60431 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60432 | 0, // x8sub_0_x8sub_1 |
| 60433 | 0, // x8sub_2_x8sub_3 |
| 60434 | 0, // x8sub_4_x8sub_5 |
| 60435 | 0, // x8sub_6_x8sub_7 |
| 60436 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60437 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60438 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60439 | 0, // sub_32_subo64_then_sub_32 |
| 60440 | 199, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 60441 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60442 | 0, // zsub_qsub1_qsub2 |
| 60443 | 0, // zsub0_zsub1 |
| 60444 | 0, // zsub0_zsub1_zsub2 |
| 60445 | 0, // zsub1_zsub2 |
| 60446 | 0, // zsub1_zsub2_zsub3 |
| 60447 | 0, // zsub2_zsub3 |
| 60448 | 0, // zsub0_zsub2 |
| 60449 | 0, // zsub1_zsub3 |
| 60450 | }, |
| 60451 | { // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60452 | 200, // bsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60453 | 200, // bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60454 | 200, // dsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60455 | 0, // dsub0 |
| 60456 | 200, // dsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60457 | 0, // dsub2 |
| 60458 | 0, // dsub3 |
| 60459 | 200, // dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60460 | 200, // hsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60461 | 200, // hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60462 | 0, // psub |
| 60463 | 0, // psub0 |
| 60464 | 0, // psub1 |
| 60465 | 0, // qsub0 |
| 60466 | 200, // qsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60467 | 0, // qsub2 |
| 60468 | 0, // qsub3 |
| 60469 | 200, // ssub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60470 | 200, // ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60471 | 0, // sub_32 |
| 60472 | 0, // sub_32_hi |
| 60473 | 0, // sube32 |
| 60474 | 0, // sube64 |
| 60475 | 0, // subo32 |
| 60476 | 0, // subo64 |
| 60477 | 0, // x8sub_0 |
| 60478 | 0, // x8sub_1 |
| 60479 | 0, // x8sub_2 |
| 60480 | 0, // x8sub_3 |
| 60481 | 0, // x8sub_4 |
| 60482 | 0, // x8sub_5 |
| 60483 | 0, // x8sub_6 |
| 60484 | 0, // x8sub_7 |
| 60485 | 0, // zasubb |
| 60486 | 0, // zasubd0 |
| 60487 | 0, // zasubd1 |
| 60488 | 0, // zasubh0 |
| 60489 | 0, // zasubh1 |
| 60490 | 0, // zasubq0 |
| 60491 | 0, // zasubq1 |
| 60492 | 0, // zasubs0 |
| 60493 | 0, // zasubs1 |
| 60494 | 200, // zsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60495 | 200, // zsub0 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60496 | 200, // zsub1 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60497 | 0, // zsub2 |
| 60498 | 0, // zsub3 |
| 60499 | 200, // zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60500 | 0, // zasubd1_then_zasubq0 |
| 60501 | 0, // zasubd1_then_zasubq1 |
| 60502 | 0, // zasubs1_then_zasubd0 |
| 60503 | 0, // zasubs1_then_zasubd1 |
| 60504 | 0, // zasubs1_then_zasubq0 |
| 60505 | 0, // zasubs1_then_zasubq1 |
| 60506 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60507 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60508 | 0, // zasubh1_then_zasubd0 |
| 60509 | 0, // zasubh1_then_zasubd1 |
| 60510 | 0, // zasubh1_then_zasubq0 |
| 60511 | 0, // zasubh1_then_zasubq1 |
| 60512 | 0, // zasubh1_then_zasubs0 |
| 60513 | 0, // zasubh1_then_zasubs1 |
| 60514 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60515 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60516 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60517 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60518 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60519 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60520 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60521 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60522 | 200, // dsub1_then_bsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60523 | 200, // dsub1_then_bsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60524 | 200, // dsub1_then_hsub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60525 | 200, // dsub1_then_hsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60526 | 200, // dsub1_then_ssub -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60527 | 200, // dsub1_then_ssub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60528 | 0, // dsub3_then_bsub |
| 60529 | 0, // dsub3_then_bsub_hi |
| 60530 | 0, // dsub3_then_hsub |
| 60531 | 0, // dsub3_then_hsub_hi |
| 60532 | 0, // dsub3_then_ssub |
| 60533 | 0, // dsub3_then_ssub_hi |
| 60534 | 0, // dsub2_then_bsub |
| 60535 | 0, // dsub2_then_bsub_hi |
| 60536 | 0, // dsub2_then_hsub |
| 60537 | 0, // dsub2_then_hsub_hi |
| 60538 | 0, // dsub2_then_ssub |
| 60539 | 0, // dsub2_then_ssub_hi |
| 60540 | 0, // psub1_then_psub |
| 60541 | 200, // qsub1_then_dsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60542 | 0, // qsub3_then_dsub_hi |
| 60543 | 0, // qsub2_then_dsub_hi |
| 60544 | 0, // x8sub_7_then_sub_32 |
| 60545 | 0, // x8sub_7_then_sub_32_hi |
| 60546 | 0, // x8sub_6_then_sub_32 |
| 60547 | 0, // x8sub_6_then_sub_32_hi |
| 60548 | 0, // x8sub_5_then_sub_32 |
| 60549 | 0, // x8sub_5_then_sub_32_hi |
| 60550 | 0, // x8sub_4_then_sub_32 |
| 60551 | 0, // x8sub_4_then_sub_32_hi |
| 60552 | 0, // x8sub_3_then_sub_32 |
| 60553 | 0, // x8sub_3_then_sub_32_hi |
| 60554 | 0, // x8sub_2_then_sub_32 |
| 60555 | 0, // x8sub_2_then_sub_32_hi |
| 60556 | 0, // x8sub_1_then_sub_32 |
| 60557 | 0, // x8sub_1_then_sub_32_hi |
| 60558 | 0, // subo64_then_sub_32 |
| 60559 | 0, // subo64_then_sub_32_hi |
| 60560 | 200, // zsub1_then_zsub_hi -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 60561 | 0, // zsub3_then_zsub_hi |
| 60562 | 0, // zsub2_then_zsub_hi |
| 60563 | 0, // dsub0_dsub1 |
| 60564 | 0, // dsub0_dsub1_dsub2 |
| 60565 | 0, // dsub1_dsub2 |
| 60566 | 0, // dsub1_dsub2_dsub3 |
| 60567 | 0, // dsub2_dsub3 |
| 60568 | 0, // dsub_dsub1 |
| 60569 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60570 | 0, // dsub_dsub1_dsub2 |
| 60571 | 0, // qsub0_qsub1 |
| 60572 | 0, // qsub0_qsub1_qsub2 |
| 60573 | 0, // qsub1_qsub2 |
| 60574 | 0, // qsub1_qsub2_qsub3 |
| 60575 | 0, // qsub2_qsub3 |
| 60576 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60577 | 0, // x8sub_0_x8sub_1 |
| 60578 | 0, // x8sub_2_x8sub_3 |
| 60579 | 0, // x8sub_4_x8sub_5 |
| 60580 | 0, // x8sub_6_x8sub_7 |
| 60581 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60582 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60583 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60584 | 0, // sub_32_subo64_then_sub_32 |
| 60585 | 0, // zsub_qsub1 |
| 60586 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60587 | 0, // zsub_qsub1_qsub2 |
| 60588 | 0, // zsub0_zsub1 |
| 60589 | 0, // zsub0_zsub1_zsub2 |
| 60590 | 0, // zsub1_zsub2 |
| 60591 | 0, // zsub1_zsub2_zsub3 |
| 60592 | 0, // zsub2_zsub3 |
| 60593 | 0, // zsub0_zsub2 |
| 60594 | 0, // zsub1_zsub3 |
| 60595 | }, |
| 60596 | { // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60597 | 201, // bsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60598 | 201, // bsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60599 | 201, // dsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60600 | 0, // dsub0 |
| 60601 | 201, // dsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60602 | 0, // dsub2 |
| 60603 | 0, // dsub3 |
| 60604 | 201, // dsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60605 | 201, // hsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60606 | 201, // hsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60607 | 0, // psub |
| 60608 | 0, // psub0 |
| 60609 | 0, // psub1 |
| 60610 | 0, // qsub0 |
| 60611 | 201, // qsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60612 | 0, // qsub2 |
| 60613 | 0, // qsub3 |
| 60614 | 201, // ssub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60615 | 201, // ssub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60616 | 0, // sub_32 |
| 60617 | 0, // sub_32_hi |
| 60618 | 0, // sube32 |
| 60619 | 0, // sube64 |
| 60620 | 0, // subo32 |
| 60621 | 0, // subo64 |
| 60622 | 0, // x8sub_0 |
| 60623 | 0, // x8sub_1 |
| 60624 | 0, // x8sub_2 |
| 60625 | 0, // x8sub_3 |
| 60626 | 0, // x8sub_4 |
| 60627 | 0, // x8sub_5 |
| 60628 | 0, // x8sub_6 |
| 60629 | 0, // x8sub_7 |
| 60630 | 0, // zasubb |
| 60631 | 0, // zasubd0 |
| 60632 | 0, // zasubd1 |
| 60633 | 0, // zasubh0 |
| 60634 | 0, // zasubh1 |
| 60635 | 0, // zasubq0 |
| 60636 | 0, // zasubq1 |
| 60637 | 0, // zasubs0 |
| 60638 | 0, // zasubs1 |
| 60639 | 201, // zsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60640 | 201, // zsub0 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60641 | 201, // zsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60642 | 0, // zsub2 |
| 60643 | 0, // zsub3 |
| 60644 | 201, // zsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60645 | 0, // zasubd1_then_zasubq0 |
| 60646 | 0, // zasubd1_then_zasubq1 |
| 60647 | 0, // zasubs1_then_zasubd0 |
| 60648 | 0, // zasubs1_then_zasubd1 |
| 60649 | 0, // zasubs1_then_zasubq0 |
| 60650 | 0, // zasubs1_then_zasubq1 |
| 60651 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60652 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60653 | 0, // zasubh1_then_zasubd0 |
| 60654 | 0, // zasubh1_then_zasubd1 |
| 60655 | 0, // zasubh1_then_zasubq0 |
| 60656 | 0, // zasubh1_then_zasubq1 |
| 60657 | 0, // zasubh1_then_zasubs0 |
| 60658 | 0, // zasubh1_then_zasubs1 |
| 60659 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60660 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60661 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60662 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60663 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60664 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60665 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60666 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60667 | 201, // dsub1_then_bsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60668 | 201, // dsub1_then_bsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60669 | 201, // dsub1_then_hsub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60670 | 201, // dsub1_then_hsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60671 | 201, // dsub1_then_ssub -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60672 | 201, // dsub1_then_ssub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60673 | 0, // dsub3_then_bsub |
| 60674 | 0, // dsub3_then_bsub_hi |
| 60675 | 0, // dsub3_then_hsub |
| 60676 | 0, // dsub3_then_hsub_hi |
| 60677 | 0, // dsub3_then_ssub |
| 60678 | 0, // dsub3_then_ssub_hi |
| 60679 | 0, // dsub2_then_bsub |
| 60680 | 0, // dsub2_then_bsub_hi |
| 60681 | 0, // dsub2_then_hsub |
| 60682 | 0, // dsub2_then_hsub_hi |
| 60683 | 0, // dsub2_then_ssub |
| 60684 | 0, // dsub2_then_ssub_hi |
| 60685 | 0, // psub1_then_psub |
| 60686 | 201, // qsub1_then_dsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60687 | 0, // qsub3_then_dsub_hi |
| 60688 | 0, // qsub2_then_dsub_hi |
| 60689 | 0, // x8sub_7_then_sub_32 |
| 60690 | 0, // x8sub_7_then_sub_32_hi |
| 60691 | 0, // x8sub_6_then_sub_32 |
| 60692 | 0, // x8sub_6_then_sub_32_hi |
| 60693 | 0, // x8sub_5_then_sub_32 |
| 60694 | 0, // x8sub_5_then_sub_32_hi |
| 60695 | 0, // x8sub_4_then_sub_32 |
| 60696 | 0, // x8sub_4_then_sub_32_hi |
| 60697 | 0, // x8sub_3_then_sub_32 |
| 60698 | 0, // x8sub_3_then_sub_32_hi |
| 60699 | 0, // x8sub_2_then_sub_32 |
| 60700 | 0, // x8sub_2_then_sub_32_hi |
| 60701 | 0, // x8sub_1_then_sub_32 |
| 60702 | 0, // x8sub_1_then_sub_32_hi |
| 60703 | 0, // subo64_then_sub_32 |
| 60704 | 0, // subo64_then_sub_32_hi |
| 60705 | 201, // zsub1_then_zsub_hi -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60706 | 0, // zsub3_then_zsub_hi |
| 60707 | 0, // zsub2_then_zsub_hi |
| 60708 | 0, // dsub0_dsub1 |
| 60709 | 0, // dsub0_dsub1_dsub2 |
| 60710 | 0, // dsub1_dsub2 |
| 60711 | 0, // dsub1_dsub2_dsub3 |
| 60712 | 0, // dsub2_dsub3 |
| 60713 | 201, // dsub_dsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60714 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60715 | 0, // dsub_dsub1_dsub2 |
| 60716 | 0, // qsub0_qsub1 |
| 60717 | 0, // qsub0_qsub1_qsub2 |
| 60718 | 0, // qsub1_qsub2 |
| 60719 | 0, // qsub1_qsub2_qsub3 |
| 60720 | 0, // qsub2_qsub3 |
| 60721 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60722 | 0, // x8sub_0_x8sub_1 |
| 60723 | 0, // x8sub_2_x8sub_3 |
| 60724 | 0, // x8sub_4_x8sub_5 |
| 60725 | 0, // x8sub_6_x8sub_7 |
| 60726 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60727 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60728 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60729 | 0, // sub_32_subo64_then_sub_32 |
| 60730 | 201, // zsub_qsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 60731 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60732 | 0, // zsub_qsub1_qsub2 |
| 60733 | 0, // zsub0_zsub1 |
| 60734 | 0, // zsub0_zsub1_zsub2 |
| 60735 | 0, // zsub1_zsub2 |
| 60736 | 0, // zsub1_zsub2_zsub3 |
| 60737 | 0, // zsub2_zsub3 |
| 60738 | 0, // zsub0_zsub2 |
| 60739 | 0, // zsub1_zsub3 |
| 60740 | }, |
| 60741 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60742 | 202, // bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60743 | 202, // bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60744 | 202, // dsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60745 | 0, // dsub0 |
| 60746 | 202, // dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60747 | 0, // dsub2 |
| 60748 | 0, // dsub3 |
| 60749 | 202, // dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60750 | 202, // hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60751 | 202, // hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60752 | 0, // psub |
| 60753 | 0, // psub0 |
| 60754 | 0, // psub1 |
| 60755 | 0, // qsub0 |
| 60756 | 202, // qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60757 | 0, // qsub2 |
| 60758 | 0, // qsub3 |
| 60759 | 202, // ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60760 | 202, // ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60761 | 0, // sub_32 |
| 60762 | 0, // sub_32_hi |
| 60763 | 0, // sube32 |
| 60764 | 0, // sube64 |
| 60765 | 0, // subo32 |
| 60766 | 0, // subo64 |
| 60767 | 0, // x8sub_0 |
| 60768 | 0, // x8sub_1 |
| 60769 | 0, // x8sub_2 |
| 60770 | 0, // x8sub_3 |
| 60771 | 0, // x8sub_4 |
| 60772 | 0, // x8sub_5 |
| 60773 | 0, // x8sub_6 |
| 60774 | 0, // x8sub_7 |
| 60775 | 0, // zasubb |
| 60776 | 0, // zasubd0 |
| 60777 | 0, // zasubd1 |
| 60778 | 0, // zasubh0 |
| 60779 | 0, // zasubh1 |
| 60780 | 0, // zasubq0 |
| 60781 | 0, // zasubq1 |
| 60782 | 0, // zasubs0 |
| 60783 | 0, // zasubs1 |
| 60784 | 202, // zsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60785 | 202, // zsub0 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60786 | 202, // zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60787 | 0, // zsub2 |
| 60788 | 0, // zsub3 |
| 60789 | 202, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60790 | 0, // zasubd1_then_zasubq0 |
| 60791 | 0, // zasubd1_then_zasubq1 |
| 60792 | 0, // zasubs1_then_zasubd0 |
| 60793 | 0, // zasubs1_then_zasubd1 |
| 60794 | 0, // zasubs1_then_zasubq0 |
| 60795 | 0, // zasubs1_then_zasubq1 |
| 60796 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60797 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60798 | 0, // zasubh1_then_zasubd0 |
| 60799 | 0, // zasubh1_then_zasubd1 |
| 60800 | 0, // zasubh1_then_zasubq0 |
| 60801 | 0, // zasubh1_then_zasubq1 |
| 60802 | 0, // zasubh1_then_zasubs0 |
| 60803 | 0, // zasubh1_then_zasubs1 |
| 60804 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60805 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60806 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60807 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60808 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60809 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60810 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60811 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60812 | 202, // dsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60813 | 202, // dsub1_then_bsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60814 | 202, // dsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60815 | 202, // dsub1_then_hsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60816 | 202, // dsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60817 | 202, // dsub1_then_ssub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60818 | 0, // dsub3_then_bsub |
| 60819 | 0, // dsub3_then_bsub_hi |
| 60820 | 0, // dsub3_then_hsub |
| 60821 | 0, // dsub3_then_hsub_hi |
| 60822 | 0, // dsub3_then_ssub |
| 60823 | 0, // dsub3_then_ssub_hi |
| 60824 | 0, // dsub2_then_bsub |
| 60825 | 0, // dsub2_then_bsub_hi |
| 60826 | 0, // dsub2_then_hsub |
| 60827 | 0, // dsub2_then_hsub_hi |
| 60828 | 0, // dsub2_then_ssub |
| 60829 | 0, // dsub2_then_ssub_hi |
| 60830 | 0, // psub1_then_psub |
| 60831 | 202, // qsub1_then_dsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60832 | 0, // qsub3_then_dsub_hi |
| 60833 | 0, // qsub2_then_dsub_hi |
| 60834 | 0, // x8sub_7_then_sub_32 |
| 60835 | 0, // x8sub_7_then_sub_32_hi |
| 60836 | 0, // x8sub_6_then_sub_32 |
| 60837 | 0, // x8sub_6_then_sub_32_hi |
| 60838 | 0, // x8sub_5_then_sub_32 |
| 60839 | 0, // x8sub_5_then_sub_32_hi |
| 60840 | 0, // x8sub_4_then_sub_32 |
| 60841 | 0, // x8sub_4_then_sub_32_hi |
| 60842 | 0, // x8sub_3_then_sub_32 |
| 60843 | 0, // x8sub_3_then_sub_32_hi |
| 60844 | 0, // x8sub_2_then_sub_32 |
| 60845 | 0, // x8sub_2_then_sub_32_hi |
| 60846 | 0, // x8sub_1_then_sub_32 |
| 60847 | 0, // x8sub_1_then_sub_32_hi |
| 60848 | 0, // subo64_then_sub_32 |
| 60849 | 0, // subo64_then_sub_32_hi |
| 60850 | 202, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60851 | 0, // zsub3_then_zsub_hi |
| 60852 | 0, // zsub2_then_zsub_hi |
| 60853 | 0, // dsub0_dsub1 |
| 60854 | 0, // dsub0_dsub1_dsub2 |
| 60855 | 0, // dsub1_dsub2 |
| 60856 | 0, // dsub1_dsub2_dsub3 |
| 60857 | 0, // dsub2_dsub3 |
| 60858 | 202, // dsub_dsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60859 | 0, // dsub_dsub1_dsub2_dsub3 |
| 60860 | 0, // dsub_dsub1_dsub2 |
| 60861 | 0, // qsub0_qsub1 |
| 60862 | 0, // qsub0_qsub1_qsub2 |
| 60863 | 0, // qsub1_qsub2 |
| 60864 | 0, // qsub1_qsub2_qsub3 |
| 60865 | 0, // qsub2_qsub3 |
| 60866 | 0, // sub_32_x8sub_1_then_sub_32 |
| 60867 | 0, // x8sub_0_x8sub_1 |
| 60868 | 0, // x8sub_2_x8sub_3 |
| 60869 | 0, // x8sub_4_x8sub_5 |
| 60870 | 0, // x8sub_6_x8sub_7 |
| 60871 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 60872 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 60873 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 60874 | 0, // sub_32_subo64_then_sub_32 |
| 60875 | 202, // zsub_qsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 60876 | 0, // zsub_qsub1_qsub2_qsub3 |
| 60877 | 0, // zsub_qsub1_qsub2 |
| 60878 | 0, // zsub0_zsub1 |
| 60879 | 0, // zsub0_zsub1_zsub2 |
| 60880 | 0, // zsub1_zsub2 |
| 60881 | 0, // zsub1_zsub2_zsub3 |
| 60882 | 0, // zsub2_zsub3 |
| 60883 | 0, // zsub0_zsub2 |
| 60884 | 0, // zsub1_zsub3 |
| 60885 | }, |
| 60886 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60887 | 203, // bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60888 | 203, // bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60889 | 203, // dsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60890 | 0, // dsub0 |
| 60891 | 203, // dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60892 | 0, // dsub2 |
| 60893 | 0, // dsub3 |
| 60894 | 203, // dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60895 | 203, // hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60896 | 203, // hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60897 | 0, // psub |
| 60898 | 0, // psub0 |
| 60899 | 0, // psub1 |
| 60900 | 0, // qsub0 |
| 60901 | 203, // qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60902 | 0, // qsub2 |
| 60903 | 0, // qsub3 |
| 60904 | 203, // ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60905 | 203, // ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60906 | 0, // sub_32 |
| 60907 | 0, // sub_32_hi |
| 60908 | 0, // sube32 |
| 60909 | 0, // sube64 |
| 60910 | 0, // subo32 |
| 60911 | 0, // subo64 |
| 60912 | 0, // x8sub_0 |
| 60913 | 0, // x8sub_1 |
| 60914 | 0, // x8sub_2 |
| 60915 | 0, // x8sub_3 |
| 60916 | 0, // x8sub_4 |
| 60917 | 0, // x8sub_5 |
| 60918 | 0, // x8sub_6 |
| 60919 | 0, // x8sub_7 |
| 60920 | 0, // zasubb |
| 60921 | 0, // zasubd0 |
| 60922 | 0, // zasubd1 |
| 60923 | 0, // zasubh0 |
| 60924 | 0, // zasubh1 |
| 60925 | 0, // zasubq0 |
| 60926 | 0, // zasubq1 |
| 60927 | 0, // zasubs0 |
| 60928 | 0, // zasubs1 |
| 60929 | 203, // zsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60930 | 203, // zsub0 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60931 | 203, // zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60932 | 0, // zsub2 |
| 60933 | 0, // zsub3 |
| 60934 | 203, // zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60935 | 0, // zasubd1_then_zasubq0 |
| 60936 | 0, // zasubd1_then_zasubq1 |
| 60937 | 0, // zasubs1_then_zasubd0 |
| 60938 | 0, // zasubs1_then_zasubd1 |
| 60939 | 0, // zasubs1_then_zasubq0 |
| 60940 | 0, // zasubs1_then_zasubq1 |
| 60941 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 60942 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 60943 | 0, // zasubh1_then_zasubd0 |
| 60944 | 0, // zasubh1_then_zasubd1 |
| 60945 | 0, // zasubh1_then_zasubq0 |
| 60946 | 0, // zasubh1_then_zasubq1 |
| 60947 | 0, // zasubh1_then_zasubs0 |
| 60948 | 0, // zasubh1_then_zasubs1 |
| 60949 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 60950 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 60951 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 60952 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 60953 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 60954 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 60955 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 60956 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 60957 | 203, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60958 | 203, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60959 | 203, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60960 | 203, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60961 | 203, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60962 | 203, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60963 | 0, // dsub3_then_bsub |
| 60964 | 0, // dsub3_then_bsub_hi |
| 60965 | 0, // dsub3_then_hsub |
| 60966 | 0, // dsub3_then_hsub_hi |
| 60967 | 0, // dsub3_then_ssub |
| 60968 | 0, // dsub3_then_ssub_hi |
| 60969 | 0, // dsub2_then_bsub |
| 60970 | 0, // dsub2_then_bsub_hi |
| 60971 | 0, // dsub2_then_hsub |
| 60972 | 0, // dsub2_then_hsub_hi |
| 60973 | 0, // dsub2_then_ssub |
| 60974 | 0, // dsub2_then_ssub_hi |
| 60975 | 0, // psub1_then_psub |
| 60976 | 203, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60977 | 0, // qsub3_then_dsub_hi |
| 60978 | 0, // qsub2_then_dsub_hi |
| 60979 | 0, // x8sub_7_then_sub_32 |
| 60980 | 0, // x8sub_7_then_sub_32_hi |
| 60981 | 0, // x8sub_6_then_sub_32 |
| 60982 | 0, // x8sub_6_then_sub_32_hi |
| 60983 | 0, // x8sub_5_then_sub_32 |
| 60984 | 0, // x8sub_5_then_sub_32_hi |
| 60985 | 0, // x8sub_4_then_sub_32 |
| 60986 | 0, // x8sub_4_then_sub_32_hi |
| 60987 | 0, // x8sub_3_then_sub_32 |
| 60988 | 0, // x8sub_3_then_sub_32_hi |
| 60989 | 0, // x8sub_2_then_sub_32 |
| 60990 | 0, // x8sub_2_then_sub_32_hi |
| 60991 | 0, // x8sub_1_then_sub_32 |
| 60992 | 0, // x8sub_1_then_sub_32_hi |
| 60993 | 0, // subo64_then_sub_32 |
| 60994 | 0, // subo64_then_sub_32_hi |
| 60995 | 203, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 60996 | 0, // zsub3_then_zsub_hi |
| 60997 | 0, // zsub2_then_zsub_hi |
| 60998 | 0, // dsub0_dsub1 |
| 60999 | 0, // dsub0_dsub1_dsub2 |
| 61000 | 0, // dsub1_dsub2 |
| 61001 | 0, // dsub1_dsub2_dsub3 |
| 61002 | 0, // dsub2_dsub3 |
| 61003 | 203, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 61004 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61005 | 0, // dsub_dsub1_dsub2 |
| 61006 | 0, // qsub0_qsub1 |
| 61007 | 0, // qsub0_qsub1_qsub2 |
| 61008 | 0, // qsub1_qsub2 |
| 61009 | 0, // qsub1_qsub2_qsub3 |
| 61010 | 0, // qsub2_qsub3 |
| 61011 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61012 | 0, // x8sub_0_x8sub_1 |
| 61013 | 0, // x8sub_2_x8sub_3 |
| 61014 | 0, // x8sub_4_x8sub_5 |
| 61015 | 0, // x8sub_6_x8sub_7 |
| 61016 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61017 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61018 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61019 | 0, // sub_32_subo64_then_sub_32 |
| 61020 | 203, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 61021 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61022 | 0, // zsub_qsub1_qsub2 |
| 61023 | 0, // zsub0_zsub1 |
| 61024 | 0, // zsub0_zsub1_zsub2 |
| 61025 | 0, // zsub1_zsub2 |
| 61026 | 0, // zsub1_zsub2_zsub3 |
| 61027 | 0, // zsub2_zsub3 |
| 61028 | 0, // zsub0_zsub2 |
| 61029 | 0, // zsub1_zsub3 |
| 61030 | }, |
| 61031 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61032 | 204, // bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61033 | 204, // bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61034 | 204, // dsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61035 | 0, // dsub0 |
| 61036 | 204, // dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61037 | 0, // dsub2 |
| 61038 | 0, // dsub3 |
| 61039 | 204, // dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61040 | 204, // hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61041 | 204, // hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61042 | 0, // psub |
| 61043 | 0, // psub0 |
| 61044 | 0, // psub1 |
| 61045 | 0, // qsub0 |
| 61046 | 204, // qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61047 | 0, // qsub2 |
| 61048 | 0, // qsub3 |
| 61049 | 204, // ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61050 | 204, // ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61051 | 0, // sub_32 |
| 61052 | 0, // sub_32_hi |
| 61053 | 0, // sube32 |
| 61054 | 0, // sube64 |
| 61055 | 0, // subo32 |
| 61056 | 0, // subo64 |
| 61057 | 0, // x8sub_0 |
| 61058 | 0, // x8sub_1 |
| 61059 | 0, // x8sub_2 |
| 61060 | 0, // x8sub_3 |
| 61061 | 0, // x8sub_4 |
| 61062 | 0, // x8sub_5 |
| 61063 | 0, // x8sub_6 |
| 61064 | 0, // x8sub_7 |
| 61065 | 0, // zasubb |
| 61066 | 0, // zasubd0 |
| 61067 | 0, // zasubd1 |
| 61068 | 0, // zasubh0 |
| 61069 | 0, // zasubh1 |
| 61070 | 0, // zasubq0 |
| 61071 | 0, // zasubq1 |
| 61072 | 0, // zasubs0 |
| 61073 | 0, // zasubs1 |
| 61074 | 204, // zsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61075 | 204, // zsub0 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61076 | 204, // zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61077 | 0, // zsub2 |
| 61078 | 0, // zsub3 |
| 61079 | 204, // zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61080 | 0, // zasubd1_then_zasubq0 |
| 61081 | 0, // zasubd1_then_zasubq1 |
| 61082 | 0, // zasubs1_then_zasubd0 |
| 61083 | 0, // zasubs1_then_zasubd1 |
| 61084 | 0, // zasubs1_then_zasubq0 |
| 61085 | 0, // zasubs1_then_zasubq1 |
| 61086 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61087 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61088 | 0, // zasubh1_then_zasubd0 |
| 61089 | 0, // zasubh1_then_zasubd1 |
| 61090 | 0, // zasubh1_then_zasubq0 |
| 61091 | 0, // zasubh1_then_zasubq1 |
| 61092 | 0, // zasubh1_then_zasubs0 |
| 61093 | 0, // zasubh1_then_zasubs1 |
| 61094 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61095 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61096 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61097 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61098 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61099 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61100 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61101 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61102 | 204, // dsub1_then_bsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61103 | 204, // dsub1_then_bsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61104 | 204, // dsub1_then_hsub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61105 | 204, // dsub1_then_hsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61106 | 204, // dsub1_then_ssub -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61107 | 204, // dsub1_then_ssub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61108 | 0, // dsub3_then_bsub |
| 61109 | 0, // dsub3_then_bsub_hi |
| 61110 | 0, // dsub3_then_hsub |
| 61111 | 0, // dsub3_then_hsub_hi |
| 61112 | 0, // dsub3_then_ssub |
| 61113 | 0, // dsub3_then_ssub_hi |
| 61114 | 0, // dsub2_then_bsub |
| 61115 | 0, // dsub2_then_bsub_hi |
| 61116 | 0, // dsub2_then_hsub |
| 61117 | 0, // dsub2_then_hsub_hi |
| 61118 | 0, // dsub2_then_ssub |
| 61119 | 0, // dsub2_then_ssub_hi |
| 61120 | 0, // psub1_then_psub |
| 61121 | 204, // qsub1_then_dsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61122 | 0, // qsub3_then_dsub_hi |
| 61123 | 0, // qsub2_then_dsub_hi |
| 61124 | 0, // x8sub_7_then_sub_32 |
| 61125 | 0, // x8sub_7_then_sub_32_hi |
| 61126 | 0, // x8sub_6_then_sub_32 |
| 61127 | 0, // x8sub_6_then_sub_32_hi |
| 61128 | 0, // x8sub_5_then_sub_32 |
| 61129 | 0, // x8sub_5_then_sub_32_hi |
| 61130 | 0, // x8sub_4_then_sub_32 |
| 61131 | 0, // x8sub_4_then_sub_32_hi |
| 61132 | 0, // x8sub_3_then_sub_32 |
| 61133 | 0, // x8sub_3_then_sub_32_hi |
| 61134 | 0, // x8sub_2_then_sub_32 |
| 61135 | 0, // x8sub_2_then_sub_32_hi |
| 61136 | 0, // x8sub_1_then_sub_32 |
| 61137 | 0, // x8sub_1_then_sub_32_hi |
| 61138 | 0, // subo64_then_sub_32 |
| 61139 | 0, // subo64_then_sub_32_hi |
| 61140 | 204, // zsub1_then_zsub_hi -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61141 | 0, // zsub3_then_zsub_hi |
| 61142 | 0, // zsub2_then_zsub_hi |
| 61143 | 0, // dsub0_dsub1 |
| 61144 | 0, // dsub0_dsub1_dsub2 |
| 61145 | 0, // dsub1_dsub2 |
| 61146 | 0, // dsub1_dsub2_dsub3 |
| 61147 | 0, // dsub2_dsub3 |
| 61148 | 204, // dsub_dsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61149 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61150 | 0, // dsub_dsub1_dsub2 |
| 61151 | 0, // qsub0_qsub1 |
| 61152 | 0, // qsub0_qsub1_qsub2 |
| 61153 | 0, // qsub1_qsub2 |
| 61154 | 0, // qsub1_qsub2_qsub3 |
| 61155 | 0, // qsub2_qsub3 |
| 61156 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61157 | 0, // x8sub_0_x8sub_1 |
| 61158 | 0, // x8sub_2_x8sub_3 |
| 61159 | 0, // x8sub_4_x8sub_5 |
| 61160 | 0, // x8sub_6_x8sub_7 |
| 61161 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61162 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61163 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61164 | 0, // sub_32_subo64_then_sub_32 |
| 61165 | 204, // zsub_qsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 61166 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61167 | 0, // zsub_qsub1_qsub2 |
| 61168 | 0, // zsub0_zsub1 |
| 61169 | 0, // zsub0_zsub1_zsub2 |
| 61170 | 0, // zsub1_zsub2 |
| 61171 | 0, // zsub1_zsub2_zsub3 |
| 61172 | 0, // zsub2_zsub3 |
| 61173 | 0, // zsub0_zsub2 |
| 61174 | 0, // zsub1_zsub3 |
| 61175 | }, |
| 61176 | { // MPR64 |
| 61177 | 0, // bsub |
| 61178 | 0, // bsub_hi |
| 61179 | 0, // dsub |
| 61180 | 0, // dsub0 |
| 61181 | 0, // dsub1 |
| 61182 | 0, // dsub2 |
| 61183 | 0, // dsub3 |
| 61184 | 0, // dsub_hi |
| 61185 | 0, // hsub |
| 61186 | 0, // hsub_hi |
| 61187 | 0, // psub |
| 61188 | 0, // psub0 |
| 61189 | 0, // psub1 |
| 61190 | 0, // qsub0 |
| 61191 | 0, // qsub1 |
| 61192 | 0, // qsub2 |
| 61193 | 0, // qsub3 |
| 61194 | 0, // ssub |
| 61195 | 0, // ssub_hi |
| 61196 | 0, // sub_32 |
| 61197 | 0, // sub_32_hi |
| 61198 | 0, // sube32 |
| 61199 | 0, // sube64 |
| 61200 | 0, // subo32 |
| 61201 | 0, // subo64 |
| 61202 | 0, // x8sub_0 |
| 61203 | 0, // x8sub_1 |
| 61204 | 0, // x8sub_2 |
| 61205 | 0, // x8sub_3 |
| 61206 | 0, // x8sub_4 |
| 61207 | 0, // x8sub_5 |
| 61208 | 0, // x8sub_6 |
| 61209 | 0, // x8sub_7 |
| 61210 | 0, // zasubb |
| 61211 | 0, // zasubd0 |
| 61212 | 0, // zasubd1 |
| 61213 | 0, // zasubh0 |
| 61214 | 0, // zasubh1 |
| 61215 | 205, // zasubq0 -> MPR64 |
| 61216 | 205, // zasubq1 -> MPR64 |
| 61217 | 0, // zasubs0 |
| 61218 | 0, // zasubs1 |
| 61219 | 0, // zsub |
| 61220 | 0, // zsub0 |
| 61221 | 0, // zsub1 |
| 61222 | 0, // zsub2 |
| 61223 | 0, // zsub3 |
| 61224 | 0, // zsub_hi |
| 61225 | 0, // zasubd1_then_zasubq0 |
| 61226 | 0, // zasubd1_then_zasubq1 |
| 61227 | 0, // zasubs1_then_zasubd0 |
| 61228 | 0, // zasubs1_then_zasubd1 |
| 61229 | 0, // zasubs1_then_zasubq0 |
| 61230 | 0, // zasubs1_then_zasubq1 |
| 61231 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61232 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61233 | 0, // zasubh1_then_zasubd0 |
| 61234 | 0, // zasubh1_then_zasubd1 |
| 61235 | 0, // zasubh1_then_zasubq0 |
| 61236 | 0, // zasubh1_then_zasubq1 |
| 61237 | 0, // zasubh1_then_zasubs0 |
| 61238 | 0, // zasubh1_then_zasubs1 |
| 61239 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61240 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61241 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61242 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61243 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61244 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61245 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61246 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61247 | 0, // dsub1_then_bsub |
| 61248 | 0, // dsub1_then_bsub_hi |
| 61249 | 0, // dsub1_then_hsub |
| 61250 | 0, // dsub1_then_hsub_hi |
| 61251 | 0, // dsub1_then_ssub |
| 61252 | 0, // dsub1_then_ssub_hi |
| 61253 | 0, // dsub3_then_bsub |
| 61254 | 0, // dsub3_then_bsub_hi |
| 61255 | 0, // dsub3_then_hsub |
| 61256 | 0, // dsub3_then_hsub_hi |
| 61257 | 0, // dsub3_then_ssub |
| 61258 | 0, // dsub3_then_ssub_hi |
| 61259 | 0, // dsub2_then_bsub |
| 61260 | 0, // dsub2_then_bsub_hi |
| 61261 | 0, // dsub2_then_hsub |
| 61262 | 0, // dsub2_then_hsub_hi |
| 61263 | 0, // dsub2_then_ssub |
| 61264 | 0, // dsub2_then_ssub_hi |
| 61265 | 0, // psub1_then_psub |
| 61266 | 0, // qsub1_then_dsub_hi |
| 61267 | 0, // qsub3_then_dsub_hi |
| 61268 | 0, // qsub2_then_dsub_hi |
| 61269 | 0, // x8sub_7_then_sub_32 |
| 61270 | 0, // x8sub_7_then_sub_32_hi |
| 61271 | 0, // x8sub_6_then_sub_32 |
| 61272 | 0, // x8sub_6_then_sub_32_hi |
| 61273 | 0, // x8sub_5_then_sub_32 |
| 61274 | 0, // x8sub_5_then_sub_32_hi |
| 61275 | 0, // x8sub_4_then_sub_32 |
| 61276 | 0, // x8sub_4_then_sub_32_hi |
| 61277 | 0, // x8sub_3_then_sub_32 |
| 61278 | 0, // x8sub_3_then_sub_32_hi |
| 61279 | 0, // x8sub_2_then_sub_32 |
| 61280 | 0, // x8sub_2_then_sub_32_hi |
| 61281 | 0, // x8sub_1_then_sub_32 |
| 61282 | 0, // x8sub_1_then_sub_32_hi |
| 61283 | 0, // subo64_then_sub_32 |
| 61284 | 0, // subo64_then_sub_32_hi |
| 61285 | 0, // zsub1_then_zsub_hi |
| 61286 | 0, // zsub3_then_zsub_hi |
| 61287 | 0, // zsub2_then_zsub_hi |
| 61288 | 0, // dsub0_dsub1 |
| 61289 | 0, // dsub0_dsub1_dsub2 |
| 61290 | 0, // dsub1_dsub2 |
| 61291 | 0, // dsub1_dsub2_dsub3 |
| 61292 | 0, // dsub2_dsub3 |
| 61293 | 0, // dsub_dsub1 |
| 61294 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61295 | 0, // dsub_dsub1_dsub2 |
| 61296 | 0, // qsub0_qsub1 |
| 61297 | 0, // qsub0_qsub1_qsub2 |
| 61298 | 0, // qsub1_qsub2 |
| 61299 | 0, // qsub1_qsub2_qsub3 |
| 61300 | 0, // qsub2_qsub3 |
| 61301 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61302 | 0, // x8sub_0_x8sub_1 |
| 61303 | 0, // x8sub_2_x8sub_3 |
| 61304 | 0, // x8sub_4_x8sub_5 |
| 61305 | 0, // x8sub_6_x8sub_7 |
| 61306 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61307 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61308 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61309 | 0, // sub_32_subo64_then_sub_32 |
| 61310 | 0, // zsub_qsub1 |
| 61311 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61312 | 0, // zsub_qsub1_qsub2 |
| 61313 | 0, // zsub0_zsub1 |
| 61314 | 0, // zsub0_zsub1_zsub2 |
| 61315 | 0, // zsub1_zsub2 |
| 61316 | 0, // zsub1_zsub2_zsub3 |
| 61317 | 0, // zsub2_zsub3 |
| 61318 | 0, // zsub0_zsub2 |
| 61319 | 0, // zsub1_zsub3 |
| 61320 | }, |
| 61321 | { // QQQ |
| 61322 | 206, // bsub -> QQQ |
| 61323 | 206, // bsub_hi -> QQQ |
| 61324 | 206, // dsub -> QQQ |
| 61325 | 0, // dsub0 |
| 61326 | 206, // dsub1 -> QQQ |
| 61327 | 206, // dsub2 -> QQQ |
| 61328 | 0, // dsub3 |
| 61329 | 206, // dsub_hi -> QQQ |
| 61330 | 206, // hsub -> QQQ |
| 61331 | 206, // hsub_hi -> QQQ |
| 61332 | 0, // psub |
| 61333 | 0, // psub0 |
| 61334 | 0, // psub1 |
| 61335 | 206, // qsub0 -> QQQ |
| 61336 | 206, // qsub1 -> QQQ |
| 61337 | 206, // qsub2 -> QQQ |
| 61338 | 0, // qsub3 |
| 61339 | 206, // ssub -> QQQ |
| 61340 | 206, // ssub_hi -> QQQ |
| 61341 | 0, // sub_32 |
| 61342 | 0, // sub_32_hi |
| 61343 | 0, // sube32 |
| 61344 | 0, // sube64 |
| 61345 | 0, // subo32 |
| 61346 | 0, // subo64 |
| 61347 | 0, // x8sub_0 |
| 61348 | 0, // x8sub_1 |
| 61349 | 0, // x8sub_2 |
| 61350 | 0, // x8sub_3 |
| 61351 | 0, // x8sub_4 |
| 61352 | 0, // x8sub_5 |
| 61353 | 0, // x8sub_6 |
| 61354 | 0, // x8sub_7 |
| 61355 | 0, // zasubb |
| 61356 | 0, // zasubd0 |
| 61357 | 0, // zasubd1 |
| 61358 | 0, // zasubh0 |
| 61359 | 0, // zasubh1 |
| 61360 | 0, // zasubq0 |
| 61361 | 0, // zasubq1 |
| 61362 | 0, // zasubs0 |
| 61363 | 0, // zasubs1 |
| 61364 | 0, // zsub |
| 61365 | 0, // zsub0 |
| 61366 | 0, // zsub1 |
| 61367 | 0, // zsub2 |
| 61368 | 0, // zsub3 |
| 61369 | 0, // zsub_hi |
| 61370 | 0, // zasubd1_then_zasubq0 |
| 61371 | 0, // zasubd1_then_zasubq1 |
| 61372 | 0, // zasubs1_then_zasubd0 |
| 61373 | 0, // zasubs1_then_zasubd1 |
| 61374 | 0, // zasubs1_then_zasubq0 |
| 61375 | 0, // zasubs1_then_zasubq1 |
| 61376 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61377 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61378 | 0, // zasubh1_then_zasubd0 |
| 61379 | 0, // zasubh1_then_zasubd1 |
| 61380 | 0, // zasubh1_then_zasubq0 |
| 61381 | 0, // zasubh1_then_zasubq1 |
| 61382 | 0, // zasubh1_then_zasubs0 |
| 61383 | 0, // zasubh1_then_zasubs1 |
| 61384 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61385 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61386 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61387 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61388 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61389 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61390 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61391 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61392 | 206, // dsub1_then_bsub -> QQQ |
| 61393 | 206, // dsub1_then_bsub_hi -> QQQ |
| 61394 | 206, // dsub1_then_hsub -> QQQ |
| 61395 | 206, // dsub1_then_hsub_hi -> QQQ |
| 61396 | 206, // dsub1_then_ssub -> QQQ |
| 61397 | 206, // dsub1_then_ssub_hi -> QQQ |
| 61398 | 0, // dsub3_then_bsub |
| 61399 | 0, // dsub3_then_bsub_hi |
| 61400 | 0, // dsub3_then_hsub |
| 61401 | 0, // dsub3_then_hsub_hi |
| 61402 | 0, // dsub3_then_ssub |
| 61403 | 0, // dsub3_then_ssub_hi |
| 61404 | 206, // dsub2_then_bsub -> QQQ |
| 61405 | 206, // dsub2_then_bsub_hi -> QQQ |
| 61406 | 206, // dsub2_then_hsub -> QQQ |
| 61407 | 206, // dsub2_then_hsub_hi -> QQQ |
| 61408 | 206, // dsub2_then_ssub -> QQQ |
| 61409 | 206, // dsub2_then_ssub_hi -> QQQ |
| 61410 | 0, // psub1_then_psub |
| 61411 | 206, // qsub1_then_dsub_hi -> QQQ |
| 61412 | 0, // qsub3_then_dsub_hi |
| 61413 | 206, // qsub2_then_dsub_hi -> QQQ |
| 61414 | 0, // x8sub_7_then_sub_32 |
| 61415 | 0, // x8sub_7_then_sub_32_hi |
| 61416 | 0, // x8sub_6_then_sub_32 |
| 61417 | 0, // x8sub_6_then_sub_32_hi |
| 61418 | 0, // x8sub_5_then_sub_32 |
| 61419 | 0, // x8sub_5_then_sub_32_hi |
| 61420 | 0, // x8sub_4_then_sub_32 |
| 61421 | 0, // x8sub_4_then_sub_32_hi |
| 61422 | 0, // x8sub_3_then_sub_32 |
| 61423 | 0, // x8sub_3_then_sub_32_hi |
| 61424 | 0, // x8sub_2_then_sub_32 |
| 61425 | 0, // x8sub_2_then_sub_32_hi |
| 61426 | 0, // x8sub_1_then_sub_32 |
| 61427 | 0, // x8sub_1_then_sub_32_hi |
| 61428 | 0, // subo64_then_sub_32 |
| 61429 | 0, // subo64_then_sub_32_hi |
| 61430 | 0, // zsub1_then_zsub_hi |
| 61431 | 0, // zsub3_then_zsub_hi |
| 61432 | 0, // zsub2_then_zsub_hi |
| 61433 | 0, // dsub0_dsub1 |
| 61434 | 0, // dsub0_dsub1_dsub2 |
| 61435 | 206, // dsub1_dsub2 -> QQQ |
| 61436 | 0, // dsub1_dsub2_dsub3 |
| 61437 | 0, // dsub2_dsub3 |
| 61438 | 206, // dsub_dsub1 -> QQQ |
| 61439 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61440 | 206, // dsub_dsub1_dsub2 -> QQQ |
| 61441 | 206, // qsub0_qsub1 -> QQQ |
| 61442 | 0, // qsub0_qsub1_qsub2 |
| 61443 | 206, // qsub1_qsub2 -> QQQ |
| 61444 | 0, // qsub1_qsub2_qsub3 |
| 61445 | 0, // qsub2_qsub3 |
| 61446 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61447 | 0, // x8sub_0_x8sub_1 |
| 61448 | 0, // x8sub_2_x8sub_3 |
| 61449 | 0, // x8sub_4_x8sub_5 |
| 61450 | 0, // x8sub_6_x8sub_7 |
| 61451 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61452 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61453 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61454 | 0, // sub_32_subo64_then_sub_32 |
| 61455 | 0, // zsub_qsub1 |
| 61456 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61457 | 0, // zsub_qsub1_qsub2 |
| 61458 | 0, // zsub0_zsub1 |
| 61459 | 0, // zsub0_zsub1_zsub2 |
| 61460 | 0, // zsub1_zsub2 |
| 61461 | 0, // zsub1_zsub2_zsub3 |
| 61462 | 0, // zsub2_zsub3 |
| 61463 | 0, // zsub0_zsub2 |
| 61464 | 0, // zsub1_zsub3 |
| 61465 | }, |
| 61466 | { // ZPR3 |
| 61467 | 207, // bsub -> ZPR3 |
| 61468 | 207, // bsub_hi -> ZPR3 |
| 61469 | 207, // dsub -> ZPR3 |
| 61470 | 0, // dsub0 |
| 61471 | 207, // dsub1 -> ZPR3 |
| 61472 | 207, // dsub2 -> ZPR3 |
| 61473 | 0, // dsub3 |
| 61474 | 207, // dsub_hi -> ZPR3 |
| 61475 | 207, // hsub -> ZPR3 |
| 61476 | 207, // hsub_hi -> ZPR3 |
| 61477 | 0, // psub |
| 61478 | 0, // psub0 |
| 61479 | 0, // psub1 |
| 61480 | 0, // qsub0 |
| 61481 | 207, // qsub1 -> ZPR3 |
| 61482 | 207, // qsub2 -> ZPR3 |
| 61483 | 0, // qsub3 |
| 61484 | 207, // ssub -> ZPR3 |
| 61485 | 207, // ssub_hi -> ZPR3 |
| 61486 | 0, // sub_32 |
| 61487 | 0, // sub_32_hi |
| 61488 | 0, // sube32 |
| 61489 | 0, // sube64 |
| 61490 | 0, // subo32 |
| 61491 | 0, // subo64 |
| 61492 | 0, // x8sub_0 |
| 61493 | 0, // x8sub_1 |
| 61494 | 0, // x8sub_2 |
| 61495 | 0, // x8sub_3 |
| 61496 | 0, // x8sub_4 |
| 61497 | 0, // x8sub_5 |
| 61498 | 0, // x8sub_6 |
| 61499 | 0, // x8sub_7 |
| 61500 | 0, // zasubb |
| 61501 | 0, // zasubd0 |
| 61502 | 0, // zasubd1 |
| 61503 | 0, // zasubh0 |
| 61504 | 0, // zasubh1 |
| 61505 | 0, // zasubq0 |
| 61506 | 0, // zasubq1 |
| 61507 | 0, // zasubs0 |
| 61508 | 0, // zasubs1 |
| 61509 | 207, // zsub -> ZPR3 |
| 61510 | 207, // zsub0 -> ZPR3 |
| 61511 | 207, // zsub1 -> ZPR3 |
| 61512 | 207, // zsub2 -> ZPR3 |
| 61513 | 0, // zsub3 |
| 61514 | 207, // zsub_hi -> ZPR3 |
| 61515 | 0, // zasubd1_then_zasubq0 |
| 61516 | 0, // zasubd1_then_zasubq1 |
| 61517 | 0, // zasubs1_then_zasubd0 |
| 61518 | 0, // zasubs1_then_zasubd1 |
| 61519 | 0, // zasubs1_then_zasubq0 |
| 61520 | 0, // zasubs1_then_zasubq1 |
| 61521 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61522 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61523 | 0, // zasubh1_then_zasubd0 |
| 61524 | 0, // zasubh1_then_zasubd1 |
| 61525 | 0, // zasubh1_then_zasubq0 |
| 61526 | 0, // zasubh1_then_zasubq1 |
| 61527 | 0, // zasubh1_then_zasubs0 |
| 61528 | 0, // zasubh1_then_zasubs1 |
| 61529 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61530 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61531 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61532 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61533 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61534 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61535 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61536 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61537 | 207, // dsub1_then_bsub -> ZPR3 |
| 61538 | 207, // dsub1_then_bsub_hi -> ZPR3 |
| 61539 | 207, // dsub1_then_hsub -> ZPR3 |
| 61540 | 207, // dsub1_then_hsub_hi -> ZPR3 |
| 61541 | 207, // dsub1_then_ssub -> ZPR3 |
| 61542 | 207, // dsub1_then_ssub_hi -> ZPR3 |
| 61543 | 0, // dsub3_then_bsub |
| 61544 | 0, // dsub3_then_bsub_hi |
| 61545 | 0, // dsub3_then_hsub |
| 61546 | 0, // dsub3_then_hsub_hi |
| 61547 | 0, // dsub3_then_ssub |
| 61548 | 0, // dsub3_then_ssub_hi |
| 61549 | 207, // dsub2_then_bsub -> ZPR3 |
| 61550 | 207, // dsub2_then_bsub_hi -> ZPR3 |
| 61551 | 207, // dsub2_then_hsub -> ZPR3 |
| 61552 | 207, // dsub2_then_hsub_hi -> ZPR3 |
| 61553 | 207, // dsub2_then_ssub -> ZPR3 |
| 61554 | 207, // dsub2_then_ssub_hi -> ZPR3 |
| 61555 | 0, // psub1_then_psub |
| 61556 | 207, // qsub1_then_dsub_hi -> ZPR3 |
| 61557 | 0, // qsub3_then_dsub_hi |
| 61558 | 207, // qsub2_then_dsub_hi -> ZPR3 |
| 61559 | 0, // x8sub_7_then_sub_32 |
| 61560 | 0, // x8sub_7_then_sub_32_hi |
| 61561 | 0, // x8sub_6_then_sub_32 |
| 61562 | 0, // x8sub_6_then_sub_32_hi |
| 61563 | 0, // x8sub_5_then_sub_32 |
| 61564 | 0, // x8sub_5_then_sub_32_hi |
| 61565 | 0, // x8sub_4_then_sub_32 |
| 61566 | 0, // x8sub_4_then_sub_32_hi |
| 61567 | 0, // x8sub_3_then_sub_32 |
| 61568 | 0, // x8sub_3_then_sub_32_hi |
| 61569 | 0, // x8sub_2_then_sub_32 |
| 61570 | 0, // x8sub_2_then_sub_32_hi |
| 61571 | 0, // x8sub_1_then_sub_32 |
| 61572 | 0, // x8sub_1_then_sub_32_hi |
| 61573 | 0, // subo64_then_sub_32 |
| 61574 | 0, // subo64_then_sub_32_hi |
| 61575 | 207, // zsub1_then_zsub_hi -> ZPR3 |
| 61576 | 0, // zsub3_then_zsub_hi |
| 61577 | 207, // zsub2_then_zsub_hi -> ZPR3 |
| 61578 | 0, // dsub0_dsub1 |
| 61579 | 0, // dsub0_dsub1_dsub2 |
| 61580 | 207, // dsub1_dsub2 -> ZPR3 |
| 61581 | 0, // dsub1_dsub2_dsub3 |
| 61582 | 0, // dsub2_dsub3 |
| 61583 | 207, // dsub_dsub1 -> ZPR3 |
| 61584 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61585 | 207, // dsub_dsub1_dsub2 -> ZPR3 |
| 61586 | 0, // qsub0_qsub1 |
| 61587 | 0, // qsub0_qsub1_qsub2 |
| 61588 | 207, // qsub1_qsub2 -> ZPR3 |
| 61589 | 0, // qsub1_qsub2_qsub3 |
| 61590 | 0, // qsub2_qsub3 |
| 61591 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61592 | 0, // x8sub_0_x8sub_1 |
| 61593 | 0, // x8sub_2_x8sub_3 |
| 61594 | 0, // x8sub_4_x8sub_5 |
| 61595 | 0, // x8sub_6_x8sub_7 |
| 61596 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61597 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61598 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61599 | 0, // sub_32_subo64_then_sub_32 |
| 61600 | 207, // zsub_qsub1 -> ZPR3 |
| 61601 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61602 | 207, // zsub_qsub1_qsub2 -> ZPR3 |
| 61603 | 207, // zsub0_zsub1 -> ZPR3 |
| 61604 | 0, // zsub0_zsub1_zsub2 |
| 61605 | 207, // zsub1_zsub2 -> ZPR3 |
| 61606 | 0, // zsub1_zsub2_zsub3 |
| 61607 | 0, // zsub2_zsub3 |
| 61608 | 0, // zsub0_zsub2 |
| 61609 | 0, // zsub1_zsub3 |
| 61610 | }, |
| 61611 | { // QQQ_with_dsub1_in_FPR64_lo |
| 61612 | 208, // bsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61613 | 208, // bsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61614 | 208, // dsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61615 | 0, // dsub0 |
| 61616 | 208, // dsub1 -> QQQ_with_dsub1_in_FPR64_lo |
| 61617 | 208, // dsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 61618 | 0, // dsub3 |
| 61619 | 208, // dsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61620 | 208, // hsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61621 | 208, // hsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61622 | 0, // psub |
| 61623 | 0, // psub0 |
| 61624 | 0, // psub1 |
| 61625 | 208, // qsub0 -> QQQ_with_dsub1_in_FPR64_lo |
| 61626 | 208, // qsub1 -> QQQ_with_dsub1_in_FPR64_lo |
| 61627 | 208, // qsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 61628 | 0, // qsub3 |
| 61629 | 208, // ssub -> QQQ_with_dsub1_in_FPR64_lo |
| 61630 | 208, // ssub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61631 | 0, // sub_32 |
| 61632 | 0, // sub_32_hi |
| 61633 | 0, // sube32 |
| 61634 | 0, // sube64 |
| 61635 | 0, // subo32 |
| 61636 | 0, // subo64 |
| 61637 | 0, // x8sub_0 |
| 61638 | 0, // x8sub_1 |
| 61639 | 0, // x8sub_2 |
| 61640 | 0, // x8sub_3 |
| 61641 | 0, // x8sub_4 |
| 61642 | 0, // x8sub_5 |
| 61643 | 0, // x8sub_6 |
| 61644 | 0, // x8sub_7 |
| 61645 | 0, // zasubb |
| 61646 | 0, // zasubd0 |
| 61647 | 0, // zasubd1 |
| 61648 | 0, // zasubh0 |
| 61649 | 0, // zasubh1 |
| 61650 | 0, // zasubq0 |
| 61651 | 0, // zasubq1 |
| 61652 | 0, // zasubs0 |
| 61653 | 0, // zasubs1 |
| 61654 | 0, // zsub |
| 61655 | 0, // zsub0 |
| 61656 | 0, // zsub1 |
| 61657 | 0, // zsub2 |
| 61658 | 0, // zsub3 |
| 61659 | 0, // zsub_hi |
| 61660 | 0, // zasubd1_then_zasubq0 |
| 61661 | 0, // zasubd1_then_zasubq1 |
| 61662 | 0, // zasubs1_then_zasubd0 |
| 61663 | 0, // zasubs1_then_zasubd1 |
| 61664 | 0, // zasubs1_then_zasubq0 |
| 61665 | 0, // zasubs1_then_zasubq1 |
| 61666 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61667 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61668 | 0, // zasubh1_then_zasubd0 |
| 61669 | 0, // zasubh1_then_zasubd1 |
| 61670 | 0, // zasubh1_then_zasubq0 |
| 61671 | 0, // zasubh1_then_zasubq1 |
| 61672 | 0, // zasubh1_then_zasubs0 |
| 61673 | 0, // zasubh1_then_zasubs1 |
| 61674 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61675 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61676 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61677 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61678 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61679 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61680 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61681 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61682 | 208, // dsub1_then_bsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61683 | 208, // dsub1_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61684 | 208, // dsub1_then_hsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61685 | 208, // dsub1_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61686 | 208, // dsub1_then_ssub -> QQQ_with_dsub1_in_FPR64_lo |
| 61687 | 208, // dsub1_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61688 | 0, // dsub3_then_bsub |
| 61689 | 0, // dsub3_then_bsub_hi |
| 61690 | 0, // dsub3_then_hsub |
| 61691 | 0, // dsub3_then_hsub_hi |
| 61692 | 0, // dsub3_then_ssub |
| 61693 | 0, // dsub3_then_ssub_hi |
| 61694 | 208, // dsub2_then_bsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61695 | 208, // dsub2_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61696 | 208, // dsub2_then_hsub -> QQQ_with_dsub1_in_FPR64_lo |
| 61697 | 208, // dsub2_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61698 | 208, // dsub2_then_ssub -> QQQ_with_dsub1_in_FPR64_lo |
| 61699 | 208, // dsub2_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61700 | 0, // psub1_then_psub |
| 61701 | 208, // qsub1_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61702 | 0, // qsub3_then_dsub_hi |
| 61703 | 208, // qsub2_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo |
| 61704 | 0, // x8sub_7_then_sub_32 |
| 61705 | 0, // x8sub_7_then_sub_32_hi |
| 61706 | 0, // x8sub_6_then_sub_32 |
| 61707 | 0, // x8sub_6_then_sub_32_hi |
| 61708 | 0, // x8sub_5_then_sub_32 |
| 61709 | 0, // x8sub_5_then_sub_32_hi |
| 61710 | 0, // x8sub_4_then_sub_32 |
| 61711 | 0, // x8sub_4_then_sub_32_hi |
| 61712 | 0, // x8sub_3_then_sub_32 |
| 61713 | 0, // x8sub_3_then_sub_32_hi |
| 61714 | 0, // x8sub_2_then_sub_32 |
| 61715 | 0, // x8sub_2_then_sub_32_hi |
| 61716 | 0, // x8sub_1_then_sub_32 |
| 61717 | 0, // x8sub_1_then_sub_32_hi |
| 61718 | 0, // subo64_then_sub_32 |
| 61719 | 0, // subo64_then_sub_32_hi |
| 61720 | 0, // zsub1_then_zsub_hi |
| 61721 | 0, // zsub3_then_zsub_hi |
| 61722 | 0, // zsub2_then_zsub_hi |
| 61723 | 0, // dsub0_dsub1 |
| 61724 | 0, // dsub0_dsub1_dsub2 |
| 61725 | 208, // dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 61726 | 0, // dsub1_dsub2_dsub3 |
| 61727 | 0, // dsub2_dsub3 |
| 61728 | 208, // dsub_dsub1 -> QQQ_with_dsub1_in_FPR64_lo |
| 61729 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61730 | 208, // dsub_dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 61731 | 208, // qsub0_qsub1 -> QQQ_with_dsub1_in_FPR64_lo |
| 61732 | 0, // qsub0_qsub1_qsub2 |
| 61733 | 208, // qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 61734 | 0, // qsub1_qsub2_qsub3 |
| 61735 | 0, // qsub2_qsub3 |
| 61736 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61737 | 0, // x8sub_0_x8sub_1 |
| 61738 | 0, // x8sub_2_x8sub_3 |
| 61739 | 0, // x8sub_4_x8sub_5 |
| 61740 | 0, // x8sub_6_x8sub_7 |
| 61741 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61742 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61743 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61744 | 0, // sub_32_subo64_then_sub_32 |
| 61745 | 0, // zsub_qsub1 |
| 61746 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61747 | 0, // zsub_qsub1_qsub2 |
| 61748 | 0, // zsub0_zsub1 |
| 61749 | 0, // zsub0_zsub1_zsub2 |
| 61750 | 0, // zsub1_zsub2 |
| 61751 | 0, // zsub1_zsub2_zsub3 |
| 61752 | 0, // zsub2_zsub3 |
| 61753 | 0, // zsub0_zsub2 |
| 61754 | 0, // zsub1_zsub3 |
| 61755 | }, |
| 61756 | { // QQQ_with_dsub2_in_FPR64_lo |
| 61757 | 209, // bsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61758 | 209, // bsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61759 | 209, // dsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61760 | 0, // dsub0 |
| 61761 | 209, // dsub1 -> QQQ_with_dsub2_in_FPR64_lo |
| 61762 | 209, // dsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 61763 | 0, // dsub3 |
| 61764 | 209, // dsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61765 | 209, // hsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61766 | 209, // hsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61767 | 0, // psub |
| 61768 | 0, // psub0 |
| 61769 | 0, // psub1 |
| 61770 | 209, // qsub0 -> QQQ_with_dsub2_in_FPR64_lo |
| 61771 | 209, // qsub1 -> QQQ_with_dsub2_in_FPR64_lo |
| 61772 | 209, // qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 61773 | 0, // qsub3 |
| 61774 | 209, // ssub -> QQQ_with_dsub2_in_FPR64_lo |
| 61775 | 209, // ssub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61776 | 0, // sub_32 |
| 61777 | 0, // sub_32_hi |
| 61778 | 0, // sube32 |
| 61779 | 0, // sube64 |
| 61780 | 0, // subo32 |
| 61781 | 0, // subo64 |
| 61782 | 0, // x8sub_0 |
| 61783 | 0, // x8sub_1 |
| 61784 | 0, // x8sub_2 |
| 61785 | 0, // x8sub_3 |
| 61786 | 0, // x8sub_4 |
| 61787 | 0, // x8sub_5 |
| 61788 | 0, // x8sub_6 |
| 61789 | 0, // x8sub_7 |
| 61790 | 0, // zasubb |
| 61791 | 0, // zasubd0 |
| 61792 | 0, // zasubd1 |
| 61793 | 0, // zasubh0 |
| 61794 | 0, // zasubh1 |
| 61795 | 0, // zasubq0 |
| 61796 | 0, // zasubq1 |
| 61797 | 0, // zasubs0 |
| 61798 | 0, // zasubs1 |
| 61799 | 0, // zsub |
| 61800 | 0, // zsub0 |
| 61801 | 0, // zsub1 |
| 61802 | 0, // zsub2 |
| 61803 | 0, // zsub3 |
| 61804 | 0, // zsub_hi |
| 61805 | 0, // zasubd1_then_zasubq0 |
| 61806 | 0, // zasubd1_then_zasubq1 |
| 61807 | 0, // zasubs1_then_zasubd0 |
| 61808 | 0, // zasubs1_then_zasubd1 |
| 61809 | 0, // zasubs1_then_zasubq0 |
| 61810 | 0, // zasubs1_then_zasubq1 |
| 61811 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61812 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61813 | 0, // zasubh1_then_zasubd0 |
| 61814 | 0, // zasubh1_then_zasubd1 |
| 61815 | 0, // zasubh1_then_zasubq0 |
| 61816 | 0, // zasubh1_then_zasubq1 |
| 61817 | 0, // zasubh1_then_zasubs0 |
| 61818 | 0, // zasubh1_then_zasubs1 |
| 61819 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61820 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61821 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61822 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61823 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61824 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61825 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61826 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61827 | 209, // dsub1_then_bsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61828 | 209, // dsub1_then_bsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61829 | 209, // dsub1_then_hsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61830 | 209, // dsub1_then_hsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61831 | 209, // dsub1_then_ssub -> QQQ_with_dsub2_in_FPR64_lo |
| 61832 | 209, // dsub1_then_ssub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61833 | 0, // dsub3_then_bsub |
| 61834 | 0, // dsub3_then_bsub_hi |
| 61835 | 0, // dsub3_then_hsub |
| 61836 | 0, // dsub3_then_hsub_hi |
| 61837 | 0, // dsub3_then_ssub |
| 61838 | 0, // dsub3_then_ssub_hi |
| 61839 | 209, // dsub2_then_bsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61840 | 209, // dsub2_then_bsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61841 | 209, // dsub2_then_hsub -> QQQ_with_dsub2_in_FPR64_lo |
| 61842 | 209, // dsub2_then_hsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61843 | 209, // dsub2_then_ssub -> QQQ_with_dsub2_in_FPR64_lo |
| 61844 | 209, // dsub2_then_ssub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61845 | 0, // psub1_then_psub |
| 61846 | 209, // qsub1_then_dsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61847 | 0, // qsub3_then_dsub_hi |
| 61848 | 209, // qsub2_then_dsub_hi -> QQQ_with_dsub2_in_FPR64_lo |
| 61849 | 0, // x8sub_7_then_sub_32 |
| 61850 | 0, // x8sub_7_then_sub_32_hi |
| 61851 | 0, // x8sub_6_then_sub_32 |
| 61852 | 0, // x8sub_6_then_sub_32_hi |
| 61853 | 0, // x8sub_5_then_sub_32 |
| 61854 | 0, // x8sub_5_then_sub_32_hi |
| 61855 | 0, // x8sub_4_then_sub_32 |
| 61856 | 0, // x8sub_4_then_sub_32_hi |
| 61857 | 0, // x8sub_3_then_sub_32 |
| 61858 | 0, // x8sub_3_then_sub_32_hi |
| 61859 | 0, // x8sub_2_then_sub_32 |
| 61860 | 0, // x8sub_2_then_sub_32_hi |
| 61861 | 0, // x8sub_1_then_sub_32 |
| 61862 | 0, // x8sub_1_then_sub_32_hi |
| 61863 | 0, // subo64_then_sub_32 |
| 61864 | 0, // subo64_then_sub_32_hi |
| 61865 | 0, // zsub1_then_zsub_hi |
| 61866 | 0, // zsub3_then_zsub_hi |
| 61867 | 0, // zsub2_then_zsub_hi |
| 61868 | 0, // dsub0_dsub1 |
| 61869 | 0, // dsub0_dsub1_dsub2 |
| 61870 | 209, // dsub1_dsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 61871 | 0, // dsub1_dsub2_dsub3 |
| 61872 | 0, // dsub2_dsub3 |
| 61873 | 209, // dsub_dsub1 -> QQQ_with_dsub2_in_FPR64_lo |
| 61874 | 0, // dsub_dsub1_dsub2_dsub3 |
| 61875 | 209, // dsub_dsub1_dsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 61876 | 209, // qsub0_qsub1 -> QQQ_with_dsub2_in_FPR64_lo |
| 61877 | 0, // qsub0_qsub1_qsub2 |
| 61878 | 209, // qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 61879 | 0, // qsub1_qsub2_qsub3 |
| 61880 | 0, // qsub2_qsub3 |
| 61881 | 0, // sub_32_x8sub_1_then_sub_32 |
| 61882 | 0, // x8sub_0_x8sub_1 |
| 61883 | 0, // x8sub_2_x8sub_3 |
| 61884 | 0, // x8sub_4_x8sub_5 |
| 61885 | 0, // x8sub_6_x8sub_7 |
| 61886 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 61887 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 61888 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 61889 | 0, // sub_32_subo64_then_sub_32 |
| 61890 | 0, // zsub_qsub1 |
| 61891 | 0, // zsub_qsub1_qsub2_qsub3 |
| 61892 | 0, // zsub_qsub1_qsub2 |
| 61893 | 0, // zsub0_zsub1 |
| 61894 | 0, // zsub0_zsub1_zsub2 |
| 61895 | 0, // zsub1_zsub2 |
| 61896 | 0, // zsub1_zsub2_zsub3 |
| 61897 | 0, // zsub2_zsub3 |
| 61898 | 0, // zsub0_zsub2 |
| 61899 | 0, // zsub1_zsub3 |
| 61900 | }, |
| 61901 | { // QQQ_with_qsub0_in_FPR128_lo |
| 61902 | 210, // bsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61903 | 210, // bsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61904 | 210, // dsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61905 | 0, // dsub0 |
| 61906 | 210, // dsub1 -> QQQ_with_qsub0_in_FPR128_lo |
| 61907 | 210, // dsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 61908 | 0, // dsub3 |
| 61909 | 210, // dsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61910 | 210, // hsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61911 | 210, // hsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61912 | 0, // psub |
| 61913 | 0, // psub0 |
| 61914 | 0, // psub1 |
| 61915 | 210, // qsub0 -> QQQ_with_qsub0_in_FPR128_lo |
| 61916 | 210, // qsub1 -> QQQ_with_qsub0_in_FPR128_lo |
| 61917 | 210, // qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 61918 | 0, // qsub3 |
| 61919 | 210, // ssub -> QQQ_with_qsub0_in_FPR128_lo |
| 61920 | 210, // ssub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61921 | 0, // sub_32 |
| 61922 | 0, // sub_32_hi |
| 61923 | 0, // sube32 |
| 61924 | 0, // sube64 |
| 61925 | 0, // subo32 |
| 61926 | 0, // subo64 |
| 61927 | 0, // x8sub_0 |
| 61928 | 0, // x8sub_1 |
| 61929 | 0, // x8sub_2 |
| 61930 | 0, // x8sub_3 |
| 61931 | 0, // x8sub_4 |
| 61932 | 0, // x8sub_5 |
| 61933 | 0, // x8sub_6 |
| 61934 | 0, // x8sub_7 |
| 61935 | 0, // zasubb |
| 61936 | 0, // zasubd0 |
| 61937 | 0, // zasubd1 |
| 61938 | 0, // zasubh0 |
| 61939 | 0, // zasubh1 |
| 61940 | 0, // zasubq0 |
| 61941 | 0, // zasubq1 |
| 61942 | 0, // zasubs0 |
| 61943 | 0, // zasubs1 |
| 61944 | 0, // zsub |
| 61945 | 0, // zsub0 |
| 61946 | 0, // zsub1 |
| 61947 | 0, // zsub2 |
| 61948 | 0, // zsub3 |
| 61949 | 0, // zsub_hi |
| 61950 | 0, // zasubd1_then_zasubq0 |
| 61951 | 0, // zasubd1_then_zasubq1 |
| 61952 | 0, // zasubs1_then_zasubd0 |
| 61953 | 0, // zasubs1_then_zasubd1 |
| 61954 | 0, // zasubs1_then_zasubq0 |
| 61955 | 0, // zasubs1_then_zasubq1 |
| 61956 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 61957 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 61958 | 0, // zasubh1_then_zasubd0 |
| 61959 | 0, // zasubh1_then_zasubd1 |
| 61960 | 0, // zasubh1_then_zasubq0 |
| 61961 | 0, // zasubh1_then_zasubq1 |
| 61962 | 0, // zasubh1_then_zasubs0 |
| 61963 | 0, // zasubh1_then_zasubs1 |
| 61964 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 61965 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 61966 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 61967 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 61968 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 61969 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 61970 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 61971 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 61972 | 210, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61973 | 210, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61974 | 210, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61975 | 210, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61976 | 210, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_lo |
| 61977 | 210, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61978 | 0, // dsub3_then_bsub |
| 61979 | 0, // dsub3_then_bsub_hi |
| 61980 | 0, // dsub3_then_hsub |
| 61981 | 0, // dsub3_then_hsub_hi |
| 61982 | 0, // dsub3_then_ssub |
| 61983 | 0, // dsub3_then_ssub_hi |
| 61984 | 210, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61985 | 210, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61986 | 210, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_lo |
| 61987 | 210, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61988 | 210, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_lo |
| 61989 | 210, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61990 | 0, // psub1_then_psub |
| 61991 | 210, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61992 | 0, // qsub3_then_dsub_hi |
| 61993 | 210, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo |
| 61994 | 0, // x8sub_7_then_sub_32 |
| 61995 | 0, // x8sub_7_then_sub_32_hi |
| 61996 | 0, // x8sub_6_then_sub_32 |
| 61997 | 0, // x8sub_6_then_sub_32_hi |
| 61998 | 0, // x8sub_5_then_sub_32 |
| 61999 | 0, // x8sub_5_then_sub_32_hi |
| 62000 | 0, // x8sub_4_then_sub_32 |
| 62001 | 0, // x8sub_4_then_sub_32_hi |
| 62002 | 0, // x8sub_3_then_sub_32 |
| 62003 | 0, // x8sub_3_then_sub_32_hi |
| 62004 | 0, // x8sub_2_then_sub_32 |
| 62005 | 0, // x8sub_2_then_sub_32_hi |
| 62006 | 0, // x8sub_1_then_sub_32 |
| 62007 | 0, // x8sub_1_then_sub_32_hi |
| 62008 | 0, // subo64_then_sub_32 |
| 62009 | 0, // subo64_then_sub_32_hi |
| 62010 | 0, // zsub1_then_zsub_hi |
| 62011 | 0, // zsub3_then_zsub_hi |
| 62012 | 0, // zsub2_then_zsub_hi |
| 62013 | 0, // dsub0_dsub1 |
| 62014 | 0, // dsub0_dsub1_dsub2 |
| 62015 | 210, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 62016 | 0, // dsub1_dsub2_dsub3 |
| 62017 | 0, // dsub2_dsub3 |
| 62018 | 210, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_lo |
| 62019 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62020 | 210, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 62021 | 210, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_lo |
| 62022 | 0, // qsub0_qsub1_qsub2 |
| 62023 | 210, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 62024 | 0, // qsub1_qsub2_qsub3 |
| 62025 | 0, // qsub2_qsub3 |
| 62026 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62027 | 0, // x8sub_0_x8sub_1 |
| 62028 | 0, // x8sub_2_x8sub_3 |
| 62029 | 0, // x8sub_4_x8sub_5 |
| 62030 | 0, // x8sub_6_x8sub_7 |
| 62031 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62032 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62033 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62034 | 0, // sub_32_subo64_then_sub_32 |
| 62035 | 0, // zsub_qsub1 |
| 62036 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62037 | 0, // zsub_qsub1_qsub2 |
| 62038 | 0, // zsub0_zsub1 |
| 62039 | 0, // zsub0_zsub1_zsub2 |
| 62040 | 0, // zsub1_zsub2 |
| 62041 | 0, // zsub1_zsub2_zsub3 |
| 62042 | 0, // zsub2_zsub3 |
| 62043 | 0, // zsub0_zsub2 |
| 62044 | 0, // zsub1_zsub3 |
| 62045 | }, |
| 62046 | { // ZPR3_with_dsub1_in_FPR64_lo |
| 62047 | 211, // bsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62048 | 211, // bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62049 | 211, // dsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62050 | 0, // dsub0 |
| 62051 | 211, // dsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62052 | 211, // dsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62053 | 0, // dsub3 |
| 62054 | 211, // dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62055 | 211, // hsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62056 | 211, // hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62057 | 0, // psub |
| 62058 | 0, // psub0 |
| 62059 | 0, // psub1 |
| 62060 | 0, // qsub0 |
| 62061 | 211, // qsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62062 | 211, // qsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62063 | 0, // qsub3 |
| 62064 | 211, // ssub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62065 | 211, // ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62066 | 0, // sub_32 |
| 62067 | 0, // sub_32_hi |
| 62068 | 0, // sube32 |
| 62069 | 0, // sube64 |
| 62070 | 0, // subo32 |
| 62071 | 0, // subo64 |
| 62072 | 0, // x8sub_0 |
| 62073 | 0, // x8sub_1 |
| 62074 | 0, // x8sub_2 |
| 62075 | 0, // x8sub_3 |
| 62076 | 0, // x8sub_4 |
| 62077 | 0, // x8sub_5 |
| 62078 | 0, // x8sub_6 |
| 62079 | 0, // x8sub_7 |
| 62080 | 0, // zasubb |
| 62081 | 0, // zasubd0 |
| 62082 | 0, // zasubd1 |
| 62083 | 0, // zasubh0 |
| 62084 | 0, // zasubh1 |
| 62085 | 0, // zasubq0 |
| 62086 | 0, // zasubq1 |
| 62087 | 0, // zasubs0 |
| 62088 | 0, // zasubs1 |
| 62089 | 211, // zsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62090 | 211, // zsub0 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62091 | 211, // zsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62092 | 211, // zsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62093 | 0, // zsub3 |
| 62094 | 211, // zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62095 | 0, // zasubd1_then_zasubq0 |
| 62096 | 0, // zasubd1_then_zasubq1 |
| 62097 | 0, // zasubs1_then_zasubd0 |
| 62098 | 0, // zasubs1_then_zasubd1 |
| 62099 | 0, // zasubs1_then_zasubq0 |
| 62100 | 0, // zasubs1_then_zasubq1 |
| 62101 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62102 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62103 | 0, // zasubh1_then_zasubd0 |
| 62104 | 0, // zasubh1_then_zasubd1 |
| 62105 | 0, // zasubh1_then_zasubq0 |
| 62106 | 0, // zasubh1_then_zasubq1 |
| 62107 | 0, // zasubh1_then_zasubs0 |
| 62108 | 0, // zasubh1_then_zasubs1 |
| 62109 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62110 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62111 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62112 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62113 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62114 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62115 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62116 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62117 | 211, // dsub1_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62118 | 211, // dsub1_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62119 | 211, // dsub1_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62120 | 211, // dsub1_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62121 | 211, // dsub1_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62122 | 211, // dsub1_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62123 | 0, // dsub3_then_bsub |
| 62124 | 0, // dsub3_then_bsub_hi |
| 62125 | 0, // dsub3_then_hsub |
| 62126 | 0, // dsub3_then_hsub_hi |
| 62127 | 0, // dsub3_then_ssub |
| 62128 | 0, // dsub3_then_ssub_hi |
| 62129 | 211, // dsub2_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62130 | 211, // dsub2_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62131 | 211, // dsub2_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62132 | 211, // dsub2_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62133 | 211, // dsub2_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo |
| 62134 | 211, // dsub2_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62135 | 0, // psub1_then_psub |
| 62136 | 211, // qsub1_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62137 | 0, // qsub3_then_dsub_hi |
| 62138 | 211, // qsub2_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62139 | 0, // x8sub_7_then_sub_32 |
| 62140 | 0, // x8sub_7_then_sub_32_hi |
| 62141 | 0, // x8sub_6_then_sub_32 |
| 62142 | 0, // x8sub_6_then_sub_32_hi |
| 62143 | 0, // x8sub_5_then_sub_32 |
| 62144 | 0, // x8sub_5_then_sub_32_hi |
| 62145 | 0, // x8sub_4_then_sub_32 |
| 62146 | 0, // x8sub_4_then_sub_32_hi |
| 62147 | 0, // x8sub_3_then_sub_32 |
| 62148 | 0, // x8sub_3_then_sub_32_hi |
| 62149 | 0, // x8sub_2_then_sub_32 |
| 62150 | 0, // x8sub_2_then_sub_32_hi |
| 62151 | 0, // x8sub_1_then_sub_32 |
| 62152 | 0, // x8sub_1_then_sub_32_hi |
| 62153 | 0, // subo64_then_sub_32 |
| 62154 | 0, // subo64_then_sub_32_hi |
| 62155 | 211, // zsub1_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62156 | 0, // zsub3_then_zsub_hi |
| 62157 | 211, // zsub2_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo |
| 62158 | 0, // dsub0_dsub1 |
| 62159 | 0, // dsub0_dsub1_dsub2 |
| 62160 | 211, // dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62161 | 0, // dsub1_dsub2_dsub3 |
| 62162 | 0, // dsub2_dsub3 |
| 62163 | 211, // dsub_dsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62164 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62165 | 211, // dsub_dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62166 | 0, // qsub0_qsub1 |
| 62167 | 0, // qsub0_qsub1_qsub2 |
| 62168 | 211, // qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62169 | 0, // qsub1_qsub2_qsub3 |
| 62170 | 0, // qsub2_qsub3 |
| 62171 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62172 | 0, // x8sub_0_x8sub_1 |
| 62173 | 0, // x8sub_2_x8sub_3 |
| 62174 | 0, // x8sub_4_x8sub_5 |
| 62175 | 0, // x8sub_6_x8sub_7 |
| 62176 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62177 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62178 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62179 | 0, // sub_32_subo64_then_sub_32 |
| 62180 | 211, // zsub_qsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62181 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62182 | 211, // zsub_qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62183 | 211, // zsub0_zsub1 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62184 | 0, // zsub0_zsub1_zsub2 |
| 62185 | 211, // zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 62186 | 0, // zsub1_zsub2_zsub3 |
| 62187 | 0, // zsub2_zsub3 |
| 62188 | 0, // zsub0_zsub2 |
| 62189 | 0, // zsub1_zsub3 |
| 62190 | }, |
| 62191 | { // ZPR3_with_dsub2_in_FPR64_lo |
| 62192 | 212, // bsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62193 | 212, // bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62194 | 212, // dsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62195 | 0, // dsub0 |
| 62196 | 212, // dsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62197 | 212, // dsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62198 | 0, // dsub3 |
| 62199 | 212, // dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62200 | 212, // hsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62201 | 212, // hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62202 | 0, // psub |
| 62203 | 0, // psub0 |
| 62204 | 0, // psub1 |
| 62205 | 0, // qsub0 |
| 62206 | 212, // qsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62207 | 212, // qsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62208 | 0, // qsub3 |
| 62209 | 212, // ssub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62210 | 212, // ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62211 | 0, // sub_32 |
| 62212 | 0, // sub_32_hi |
| 62213 | 0, // sube32 |
| 62214 | 0, // sube64 |
| 62215 | 0, // subo32 |
| 62216 | 0, // subo64 |
| 62217 | 0, // x8sub_0 |
| 62218 | 0, // x8sub_1 |
| 62219 | 0, // x8sub_2 |
| 62220 | 0, // x8sub_3 |
| 62221 | 0, // x8sub_4 |
| 62222 | 0, // x8sub_5 |
| 62223 | 0, // x8sub_6 |
| 62224 | 0, // x8sub_7 |
| 62225 | 0, // zasubb |
| 62226 | 0, // zasubd0 |
| 62227 | 0, // zasubd1 |
| 62228 | 0, // zasubh0 |
| 62229 | 0, // zasubh1 |
| 62230 | 0, // zasubq0 |
| 62231 | 0, // zasubq1 |
| 62232 | 0, // zasubs0 |
| 62233 | 0, // zasubs1 |
| 62234 | 212, // zsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62235 | 212, // zsub0 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62236 | 212, // zsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62237 | 212, // zsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62238 | 0, // zsub3 |
| 62239 | 212, // zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62240 | 0, // zasubd1_then_zasubq0 |
| 62241 | 0, // zasubd1_then_zasubq1 |
| 62242 | 0, // zasubs1_then_zasubd0 |
| 62243 | 0, // zasubs1_then_zasubd1 |
| 62244 | 0, // zasubs1_then_zasubq0 |
| 62245 | 0, // zasubs1_then_zasubq1 |
| 62246 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62247 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62248 | 0, // zasubh1_then_zasubd0 |
| 62249 | 0, // zasubh1_then_zasubd1 |
| 62250 | 0, // zasubh1_then_zasubq0 |
| 62251 | 0, // zasubh1_then_zasubq1 |
| 62252 | 0, // zasubh1_then_zasubs0 |
| 62253 | 0, // zasubh1_then_zasubs1 |
| 62254 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62255 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62256 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62257 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62258 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62259 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62260 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62261 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62262 | 212, // dsub1_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62263 | 212, // dsub1_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62264 | 212, // dsub1_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62265 | 212, // dsub1_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62266 | 212, // dsub1_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62267 | 212, // dsub1_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62268 | 0, // dsub3_then_bsub |
| 62269 | 0, // dsub3_then_bsub_hi |
| 62270 | 0, // dsub3_then_hsub |
| 62271 | 0, // dsub3_then_hsub_hi |
| 62272 | 0, // dsub3_then_ssub |
| 62273 | 0, // dsub3_then_ssub_hi |
| 62274 | 212, // dsub2_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62275 | 212, // dsub2_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62276 | 212, // dsub2_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62277 | 212, // dsub2_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62278 | 212, // dsub2_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo |
| 62279 | 212, // dsub2_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62280 | 0, // psub1_then_psub |
| 62281 | 212, // qsub1_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62282 | 0, // qsub3_then_dsub_hi |
| 62283 | 212, // qsub2_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62284 | 0, // x8sub_7_then_sub_32 |
| 62285 | 0, // x8sub_7_then_sub_32_hi |
| 62286 | 0, // x8sub_6_then_sub_32 |
| 62287 | 0, // x8sub_6_then_sub_32_hi |
| 62288 | 0, // x8sub_5_then_sub_32 |
| 62289 | 0, // x8sub_5_then_sub_32_hi |
| 62290 | 0, // x8sub_4_then_sub_32 |
| 62291 | 0, // x8sub_4_then_sub_32_hi |
| 62292 | 0, // x8sub_3_then_sub_32 |
| 62293 | 0, // x8sub_3_then_sub_32_hi |
| 62294 | 0, // x8sub_2_then_sub_32 |
| 62295 | 0, // x8sub_2_then_sub_32_hi |
| 62296 | 0, // x8sub_1_then_sub_32 |
| 62297 | 0, // x8sub_1_then_sub_32_hi |
| 62298 | 0, // subo64_then_sub_32 |
| 62299 | 0, // subo64_then_sub_32_hi |
| 62300 | 212, // zsub1_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62301 | 0, // zsub3_then_zsub_hi |
| 62302 | 212, // zsub2_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo |
| 62303 | 0, // dsub0_dsub1 |
| 62304 | 0, // dsub0_dsub1_dsub2 |
| 62305 | 212, // dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62306 | 0, // dsub1_dsub2_dsub3 |
| 62307 | 0, // dsub2_dsub3 |
| 62308 | 212, // dsub_dsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62309 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62310 | 212, // dsub_dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62311 | 0, // qsub0_qsub1 |
| 62312 | 0, // qsub0_qsub1_qsub2 |
| 62313 | 212, // qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62314 | 0, // qsub1_qsub2_qsub3 |
| 62315 | 0, // qsub2_qsub3 |
| 62316 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62317 | 0, // x8sub_0_x8sub_1 |
| 62318 | 0, // x8sub_2_x8sub_3 |
| 62319 | 0, // x8sub_4_x8sub_5 |
| 62320 | 0, // x8sub_6_x8sub_7 |
| 62321 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62322 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62323 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62324 | 0, // sub_32_subo64_then_sub_32 |
| 62325 | 212, // zsub_qsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62326 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62327 | 212, // zsub_qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62328 | 212, // zsub0_zsub1 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62329 | 0, // zsub0_zsub1_zsub2 |
| 62330 | 212, // zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 62331 | 0, // zsub1_zsub2_zsub3 |
| 62332 | 0, // zsub2_zsub3 |
| 62333 | 0, // zsub0_zsub2 |
| 62334 | 0, // zsub1_zsub3 |
| 62335 | }, |
| 62336 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62337 | 213, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62338 | 213, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62339 | 213, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62340 | 0, // dsub0 |
| 62341 | 213, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62342 | 213, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62343 | 0, // dsub3 |
| 62344 | 213, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62345 | 213, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62346 | 213, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62347 | 0, // psub |
| 62348 | 0, // psub0 |
| 62349 | 0, // psub1 |
| 62350 | 0, // qsub0 |
| 62351 | 213, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62352 | 213, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62353 | 0, // qsub3 |
| 62354 | 213, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62355 | 213, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62356 | 0, // sub_32 |
| 62357 | 0, // sub_32_hi |
| 62358 | 0, // sube32 |
| 62359 | 0, // sube64 |
| 62360 | 0, // subo32 |
| 62361 | 0, // subo64 |
| 62362 | 0, // x8sub_0 |
| 62363 | 0, // x8sub_1 |
| 62364 | 0, // x8sub_2 |
| 62365 | 0, // x8sub_3 |
| 62366 | 0, // x8sub_4 |
| 62367 | 0, // x8sub_5 |
| 62368 | 0, // x8sub_6 |
| 62369 | 0, // x8sub_7 |
| 62370 | 0, // zasubb |
| 62371 | 0, // zasubd0 |
| 62372 | 0, // zasubd1 |
| 62373 | 0, // zasubh0 |
| 62374 | 0, // zasubh1 |
| 62375 | 0, // zasubq0 |
| 62376 | 0, // zasubq1 |
| 62377 | 0, // zasubs0 |
| 62378 | 0, // zasubs1 |
| 62379 | 213, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62380 | 213, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62381 | 213, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62382 | 213, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62383 | 0, // zsub3 |
| 62384 | 213, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62385 | 0, // zasubd1_then_zasubq0 |
| 62386 | 0, // zasubd1_then_zasubq1 |
| 62387 | 0, // zasubs1_then_zasubd0 |
| 62388 | 0, // zasubs1_then_zasubd1 |
| 62389 | 0, // zasubs1_then_zasubq0 |
| 62390 | 0, // zasubs1_then_zasubq1 |
| 62391 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62392 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62393 | 0, // zasubh1_then_zasubd0 |
| 62394 | 0, // zasubh1_then_zasubd1 |
| 62395 | 0, // zasubh1_then_zasubq0 |
| 62396 | 0, // zasubh1_then_zasubq1 |
| 62397 | 0, // zasubh1_then_zasubs0 |
| 62398 | 0, // zasubh1_then_zasubs1 |
| 62399 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62400 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62401 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62402 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62403 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62404 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62405 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62406 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62407 | 213, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62408 | 213, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62409 | 213, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62410 | 213, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62411 | 213, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62412 | 213, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62413 | 0, // dsub3_then_bsub |
| 62414 | 0, // dsub3_then_bsub_hi |
| 62415 | 0, // dsub3_then_hsub |
| 62416 | 0, // dsub3_then_hsub_hi |
| 62417 | 0, // dsub3_then_ssub |
| 62418 | 0, // dsub3_then_ssub_hi |
| 62419 | 213, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62420 | 213, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62421 | 213, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62422 | 213, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62423 | 213, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62424 | 213, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62425 | 0, // psub1_then_psub |
| 62426 | 213, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62427 | 0, // qsub3_then_dsub_hi |
| 62428 | 213, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62429 | 0, // x8sub_7_then_sub_32 |
| 62430 | 0, // x8sub_7_then_sub_32_hi |
| 62431 | 0, // x8sub_6_then_sub_32 |
| 62432 | 0, // x8sub_6_then_sub_32_hi |
| 62433 | 0, // x8sub_5_then_sub_32 |
| 62434 | 0, // x8sub_5_then_sub_32_hi |
| 62435 | 0, // x8sub_4_then_sub_32 |
| 62436 | 0, // x8sub_4_then_sub_32_hi |
| 62437 | 0, // x8sub_3_then_sub_32 |
| 62438 | 0, // x8sub_3_then_sub_32_hi |
| 62439 | 0, // x8sub_2_then_sub_32 |
| 62440 | 0, // x8sub_2_then_sub_32_hi |
| 62441 | 0, // x8sub_1_then_sub_32 |
| 62442 | 0, // x8sub_1_then_sub_32_hi |
| 62443 | 0, // subo64_then_sub_32 |
| 62444 | 0, // subo64_then_sub_32_hi |
| 62445 | 213, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62446 | 0, // zsub3_then_zsub_hi |
| 62447 | 213, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62448 | 0, // dsub0_dsub1 |
| 62449 | 0, // dsub0_dsub1_dsub2 |
| 62450 | 213, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62451 | 0, // dsub1_dsub2_dsub3 |
| 62452 | 0, // dsub2_dsub3 |
| 62453 | 213, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62454 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62455 | 213, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62456 | 0, // qsub0_qsub1 |
| 62457 | 0, // qsub0_qsub1_qsub2 |
| 62458 | 213, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62459 | 0, // qsub1_qsub2_qsub3 |
| 62460 | 0, // qsub2_qsub3 |
| 62461 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62462 | 0, // x8sub_0_x8sub_1 |
| 62463 | 0, // x8sub_2_x8sub_3 |
| 62464 | 0, // x8sub_4_x8sub_5 |
| 62465 | 0, // x8sub_6_x8sub_7 |
| 62466 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62467 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62468 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62469 | 0, // sub_32_subo64_then_sub_32 |
| 62470 | 213, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62471 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62472 | 213, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62473 | 213, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62474 | 0, // zsub0_zsub1_zsub2 |
| 62475 | 213, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 62476 | 0, // zsub1_zsub2_zsub3 |
| 62477 | 0, // zsub2_zsub3 |
| 62478 | 0, // zsub0_zsub2 |
| 62479 | 0, // zsub1_zsub3 |
| 62480 | }, |
| 62481 | { // ZPR3_with_zsub1_in_ZPRMul2 |
| 62482 | 214, // bsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62483 | 214, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62484 | 214, // dsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62485 | 0, // dsub0 |
| 62486 | 214, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62487 | 214, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62488 | 0, // dsub3 |
| 62489 | 214, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62490 | 214, // hsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62491 | 214, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62492 | 0, // psub |
| 62493 | 0, // psub0 |
| 62494 | 0, // psub1 |
| 62495 | 0, // qsub0 |
| 62496 | 214, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62497 | 214, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62498 | 0, // qsub3 |
| 62499 | 214, // ssub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62500 | 214, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62501 | 0, // sub_32 |
| 62502 | 0, // sub_32_hi |
| 62503 | 0, // sube32 |
| 62504 | 0, // sube64 |
| 62505 | 0, // subo32 |
| 62506 | 0, // subo64 |
| 62507 | 0, // x8sub_0 |
| 62508 | 0, // x8sub_1 |
| 62509 | 0, // x8sub_2 |
| 62510 | 0, // x8sub_3 |
| 62511 | 0, // x8sub_4 |
| 62512 | 0, // x8sub_5 |
| 62513 | 0, // x8sub_6 |
| 62514 | 0, // x8sub_7 |
| 62515 | 0, // zasubb |
| 62516 | 0, // zasubd0 |
| 62517 | 0, // zasubd1 |
| 62518 | 0, // zasubh0 |
| 62519 | 0, // zasubh1 |
| 62520 | 0, // zasubq0 |
| 62521 | 0, // zasubq1 |
| 62522 | 0, // zasubs0 |
| 62523 | 0, // zasubs1 |
| 62524 | 214, // zsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62525 | 214, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62526 | 214, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62527 | 214, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62528 | 0, // zsub3 |
| 62529 | 214, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62530 | 0, // zasubd1_then_zasubq0 |
| 62531 | 0, // zasubd1_then_zasubq1 |
| 62532 | 0, // zasubs1_then_zasubd0 |
| 62533 | 0, // zasubs1_then_zasubd1 |
| 62534 | 0, // zasubs1_then_zasubq0 |
| 62535 | 0, // zasubs1_then_zasubq1 |
| 62536 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62537 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62538 | 0, // zasubh1_then_zasubd0 |
| 62539 | 0, // zasubh1_then_zasubd1 |
| 62540 | 0, // zasubh1_then_zasubq0 |
| 62541 | 0, // zasubh1_then_zasubq1 |
| 62542 | 0, // zasubh1_then_zasubs0 |
| 62543 | 0, // zasubh1_then_zasubs1 |
| 62544 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62545 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62546 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62547 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62548 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62549 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62550 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62551 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62552 | 214, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62553 | 214, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62554 | 214, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62555 | 214, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62556 | 214, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62557 | 214, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62558 | 0, // dsub3_then_bsub |
| 62559 | 0, // dsub3_then_bsub_hi |
| 62560 | 0, // dsub3_then_hsub |
| 62561 | 0, // dsub3_then_hsub_hi |
| 62562 | 0, // dsub3_then_ssub |
| 62563 | 0, // dsub3_then_ssub_hi |
| 62564 | 214, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62565 | 214, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62566 | 214, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62567 | 214, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62568 | 214, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62569 | 214, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62570 | 0, // psub1_then_psub |
| 62571 | 214, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62572 | 0, // qsub3_then_dsub_hi |
| 62573 | 214, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62574 | 0, // x8sub_7_then_sub_32 |
| 62575 | 0, // x8sub_7_then_sub_32_hi |
| 62576 | 0, // x8sub_6_then_sub_32 |
| 62577 | 0, // x8sub_6_then_sub_32_hi |
| 62578 | 0, // x8sub_5_then_sub_32 |
| 62579 | 0, // x8sub_5_then_sub_32_hi |
| 62580 | 0, // x8sub_4_then_sub_32 |
| 62581 | 0, // x8sub_4_then_sub_32_hi |
| 62582 | 0, // x8sub_3_then_sub_32 |
| 62583 | 0, // x8sub_3_then_sub_32_hi |
| 62584 | 0, // x8sub_2_then_sub_32 |
| 62585 | 0, // x8sub_2_then_sub_32_hi |
| 62586 | 0, // x8sub_1_then_sub_32 |
| 62587 | 0, // x8sub_1_then_sub_32_hi |
| 62588 | 0, // subo64_then_sub_32 |
| 62589 | 0, // subo64_then_sub_32_hi |
| 62590 | 214, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62591 | 0, // zsub3_then_zsub_hi |
| 62592 | 214, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62593 | 0, // dsub0_dsub1 |
| 62594 | 0, // dsub0_dsub1_dsub2 |
| 62595 | 214, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62596 | 0, // dsub1_dsub2_dsub3 |
| 62597 | 0, // dsub2_dsub3 |
| 62598 | 214, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62599 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62600 | 214, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62601 | 0, // qsub0_qsub1 |
| 62602 | 0, // qsub0_qsub1_qsub2 |
| 62603 | 214, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62604 | 0, // qsub1_qsub2_qsub3 |
| 62605 | 0, // qsub2_qsub3 |
| 62606 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62607 | 0, // x8sub_0_x8sub_1 |
| 62608 | 0, // x8sub_2_x8sub_3 |
| 62609 | 0, // x8sub_4_x8sub_5 |
| 62610 | 0, // x8sub_6_x8sub_7 |
| 62611 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62612 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62613 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62614 | 0, // sub_32_subo64_then_sub_32 |
| 62615 | 214, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62616 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62617 | 214, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62618 | 214, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62619 | 0, // zsub0_zsub1_zsub2 |
| 62620 | 214, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 62621 | 0, // zsub1_zsub2_zsub3 |
| 62622 | 0, // zsub2_zsub3 |
| 62623 | 0, // zsub0_zsub2 |
| 62624 | 0, // zsub1_zsub3 |
| 62625 | }, |
| 62626 | { // ZPR3_with_zsub_in_FPR128_lo |
| 62627 | 215, // bsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62628 | 215, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62629 | 215, // dsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62630 | 0, // dsub0 |
| 62631 | 215, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62632 | 215, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62633 | 0, // dsub3 |
| 62634 | 215, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62635 | 215, // hsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62636 | 215, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62637 | 0, // psub |
| 62638 | 0, // psub0 |
| 62639 | 0, // psub1 |
| 62640 | 0, // qsub0 |
| 62641 | 215, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62642 | 215, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62643 | 0, // qsub3 |
| 62644 | 215, // ssub -> ZPR3_with_zsub_in_FPR128_lo |
| 62645 | 215, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62646 | 0, // sub_32 |
| 62647 | 0, // sub_32_hi |
| 62648 | 0, // sube32 |
| 62649 | 0, // sube64 |
| 62650 | 0, // subo32 |
| 62651 | 0, // subo64 |
| 62652 | 0, // x8sub_0 |
| 62653 | 0, // x8sub_1 |
| 62654 | 0, // x8sub_2 |
| 62655 | 0, // x8sub_3 |
| 62656 | 0, // x8sub_4 |
| 62657 | 0, // x8sub_5 |
| 62658 | 0, // x8sub_6 |
| 62659 | 0, // x8sub_7 |
| 62660 | 0, // zasubb |
| 62661 | 0, // zasubd0 |
| 62662 | 0, // zasubd1 |
| 62663 | 0, // zasubh0 |
| 62664 | 0, // zasubh1 |
| 62665 | 0, // zasubq0 |
| 62666 | 0, // zasubq1 |
| 62667 | 0, // zasubs0 |
| 62668 | 0, // zasubs1 |
| 62669 | 215, // zsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62670 | 215, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo |
| 62671 | 215, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62672 | 215, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62673 | 0, // zsub3 |
| 62674 | 215, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62675 | 0, // zasubd1_then_zasubq0 |
| 62676 | 0, // zasubd1_then_zasubq1 |
| 62677 | 0, // zasubs1_then_zasubd0 |
| 62678 | 0, // zasubs1_then_zasubd1 |
| 62679 | 0, // zasubs1_then_zasubq0 |
| 62680 | 0, // zasubs1_then_zasubq1 |
| 62681 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62682 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62683 | 0, // zasubh1_then_zasubd0 |
| 62684 | 0, // zasubh1_then_zasubd1 |
| 62685 | 0, // zasubh1_then_zasubq0 |
| 62686 | 0, // zasubh1_then_zasubq1 |
| 62687 | 0, // zasubh1_then_zasubs0 |
| 62688 | 0, // zasubh1_then_zasubs1 |
| 62689 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62690 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62691 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62692 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62693 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62694 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62695 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62696 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62697 | 215, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62698 | 215, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62699 | 215, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62700 | 215, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62701 | 215, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo |
| 62702 | 215, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62703 | 0, // dsub3_then_bsub |
| 62704 | 0, // dsub3_then_bsub_hi |
| 62705 | 0, // dsub3_then_hsub |
| 62706 | 0, // dsub3_then_hsub_hi |
| 62707 | 0, // dsub3_then_ssub |
| 62708 | 0, // dsub3_then_ssub_hi |
| 62709 | 215, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62710 | 215, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62711 | 215, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo |
| 62712 | 215, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62713 | 215, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo |
| 62714 | 215, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62715 | 0, // psub1_then_psub |
| 62716 | 215, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62717 | 0, // qsub3_then_dsub_hi |
| 62718 | 215, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62719 | 0, // x8sub_7_then_sub_32 |
| 62720 | 0, // x8sub_7_then_sub_32_hi |
| 62721 | 0, // x8sub_6_then_sub_32 |
| 62722 | 0, // x8sub_6_then_sub_32_hi |
| 62723 | 0, // x8sub_5_then_sub_32 |
| 62724 | 0, // x8sub_5_then_sub_32_hi |
| 62725 | 0, // x8sub_4_then_sub_32 |
| 62726 | 0, // x8sub_4_then_sub_32_hi |
| 62727 | 0, // x8sub_3_then_sub_32 |
| 62728 | 0, // x8sub_3_then_sub_32_hi |
| 62729 | 0, // x8sub_2_then_sub_32 |
| 62730 | 0, // x8sub_2_then_sub_32_hi |
| 62731 | 0, // x8sub_1_then_sub_32 |
| 62732 | 0, // x8sub_1_then_sub_32_hi |
| 62733 | 0, // subo64_then_sub_32 |
| 62734 | 0, // subo64_then_sub_32_hi |
| 62735 | 215, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62736 | 0, // zsub3_then_zsub_hi |
| 62737 | 215, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo |
| 62738 | 0, // dsub0_dsub1 |
| 62739 | 0, // dsub0_dsub1_dsub2 |
| 62740 | 215, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62741 | 0, // dsub1_dsub2_dsub3 |
| 62742 | 0, // dsub2_dsub3 |
| 62743 | 215, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62744 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62745 | 215, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62746 | 0, // qsub0_qsub1 |
| 62747 | 0, // qsub0_qsub1_qsub2 |
| 62748 | 215, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62749 | 0, // qsub1_qsub2_qsub3 |
| 62750 | 0, // qsub2_qsub3 |
| 62751 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62752 | 0, // x8sub_0_x8sub_1 |
| 62753 | 0, // x8sub_2_x8sub_3 |
| 62754 | 0, // x8sub_4_x8sub_5 |
| 62755 | 0, // x8sub_6_x8sub_7 |
| 62756 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62757 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62758 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62759 | 0, // sub_32_subo64_then_sub_32 |
| 62760 | 215, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62761 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62762 | 215, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62763 | 215, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo |
| 62764 | 0, // zsub0_zsub1_zsub2 |
| 62765 | 215, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 62766 | 0, // zsub1_zsub2_zsub3 |
| 62767 | 0, // zsub2_zsub3 |
| 62768 | 0, // zsub0_zsub2 |
| 62769 | 0, // zsub1_zsub3 |
| 62770 | }, |
| 62771 | { // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62772 | 216, // bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62773 | 216, // bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62774 | 216, // dsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62775 | 0, // dsub0 |
| 62776 | 216, // dsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62777 | 216, // dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62778 | 0, // dsub3 |
| 62779 | 216, // dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62780 | 216, // hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62781 | 216, // hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62782 | 0, // psub |
| 62783 | 0, // psub0 |
| 62784 | 0, // psub1 |
| 62785 | 216, // qsub0 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62786 | 216, // qsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62787 | 216, // qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62788 | 0, // qsub3 |
| 62789 | 216, // ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62790 | 216, // ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62791 | 0, // sub_32 |
| 62792 | 0, // sub_32_hi |
| 62793 | 0, // sube32 |
| 62794 | 0, // sube64 |
| 62795 | 0, // subo32 |
| 62796 | 0, // subo64 |
| 62797 | 0, // x8sub_0 |
| 62798 | 0, // x8sub_1 |
| 62799 | 0, // x8sub_2 |
| 62800 | 0, // x8sub_3 |
| 62801 | 0, // x8sub_4 |
| 62802 | 0, // x8sub_5 |
| 62803 | 0, // x8sub_6 |
| 62804 | 0, // x8sub_7 |
| 62805 | 0, // zasubb |
| 62806 | 0, // zasubd0 |
| 62807 | 0, // zasubd1 |
| 62808 | 0, // zasubh0 |
| 62809 | 0, // zasubh1 |
| 62810 | 0, // zasubq0 |
| 62811 | 0, // zasubq1 |
| 62812 | 0, // zasubs0 |
| 62813 | 0, // zasubs1 |
| 62814 | 0, // zsub |
| 62815 | 0, // zsub0 |
| 62816 | 0, // zsub1 |
| 62817 | 0, // zsub2 |
| 62818 | 0, // zsub3 |
| 62819 | 0, // zsub_hi |
| 62820 | 0, // zasubd1_then_zasubq0 |
| 62821 | 0, // zasubd1_then_zasubq1 |
| 62822 | 0, // zasubs1_then_zasubd0 |
| 62823 | 0, // zasubs1_then_zasubd1 |
| 62824 | 0, // zasubs1_then_zasubq0 |
| 62825 | 0, // zasubs1_then_zasubq1 |
| 62826 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62827 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62828 | 0, // zasubh1_then_zasubd0 |
| 62829 | 0, // zasubh1_then_zasubd1 |
| 62830 | 0, // zasubh1_then_zasubq0 |
| 62831 | 0, // zasubh1_then_zasubq1 |
| 62832 | 0, // zasubh1_then_zasubs0 |
| 62833 | 0, // zasubh1_then_zasubs1 |
| 62834 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62835 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62836 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62837 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62838 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62839 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62840 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62841 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62842 | 216, // dsub1_then_bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62843 | 216, // dsub1_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62844 | 216, // dsub1_then_hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62845 | 216, // dsub1_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62846 | 216, // dsub1_then_ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62847 | 216, // dsub1_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62848 | 0, // dsub3_then_bsub |
| 62849 | 0, // dsub3_then_bsub_hi |
| 62850 | 0, // dsub3_then_hsub |
| 62851 | 0, // dsub3_then_hsub_hi |
| 62852 | 0, // dsub3_then_ssub |
| 62853 | 0, // dsub3_then_ssub_hi |
| 62854 | 216, // dsub2_then_bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62855 | 216, // dsub2_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62856 | 216, // dsub2_then_hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62857 | 216, // dsub2_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62858 | 216, // dsub2_then_ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62859 | 216, // dsub2_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62860 | 0, // psub1_then_psub |
| 62861 | 216, // qsub1_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62862 | 0, // qsub3_then_dsub_hi |
| 62863 | 216, // qsub2_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62864 | 0, // x8sub_7_then_sub_32 |
| 62865 | 0, // x8sub_7_then_sub_32_hi |
| 62866 | 0, // x8sub_6_then_sub_32 |
| 62867 | 0, // x8sub_6_then_sub_32_hi |
| 62868 | 0, // x8sub_5_then_sub_32 |
| 62869 | 0, // x8sub_5_then_sub_32_hi |
| 62870 | 0, // x8sub_4_then_sub_32 |
| 62871 | 0, // x8sub_4_then_sub_32_hi |
| 62872 | 0, // x8sub_3_then_sub_32 |
| 62873 | 0, // x8sub_3_then_sub_32_hi |
| 62874 | 0, // x8sub_2_then_sub_32 |
| 62875 | 0, // x8sub_2_then_sub_32_hi |
| 62876 | 0, // x8sub_1_then_sub_32 |
| 62877 | 0, // x8sub_1_then_sub_32_hi |
| 62878 | 0, // subo64_then_sub_32 |
| 62879 | 0, // subo64_then_sub_32_hi |
| 62880 | 0, // zsub1_then_zsub_hi |
| 62881 | 0, // zsub3_then_zsub_hi |
| 62882 | 0, // zsub2_then_zsub_hi |
| 62883 | 0, // dsub0_dsub1 |
| 62884 | 0, // dsub0_dsub1_dsub2 |
| 62885 | 216, // dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62886 | 0, // dsub1_dsub2_dsub3 |
| 62887 | 0, // dsub2_dsub3 |
| 62888 | 216, // dsub_dsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62889 | 0, // dsub_dsub1_dsub2_dsub3 |
| 62890 | 216, // dsub_dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62891 | 216, // qsub0_qsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62892 | 0, // qsub0_qsub1_qsub2 |
| 62893 | 216, // qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 62894 | 0, // qsub1_qsub2_qsub3 |
| 62895 | 0, // qsub2_qsub3 |
| 62896 | 0, // sub_32_x8sub_1_then_sub_32 |
| 62897 | 0, // x8sub_0_x8sub_1 |
| 62898 | 0, // x8sub_2_x8sub_3 |
| 62899 | 0, // x8sub_4_x8sub_5 |
| 62900 | 0, // x8sub_6_x8sub_7 |
| 62901 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 62902 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 62903 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 62904 | 0, // sub_32_subo64_then_sub_32 |
| 62905 | 0, // zsub_qsub1 |
| 62906 | 0, // zsub_qsub1_qsub2_qsub3 |
| 62907 | 0, // zsub_qsub1_qsub2 |
| 62908 | 0, // zsub0_zsub1 |
| 62909 | 0, // zsub0_zsub1_zsub2 |
| 62910 | 0, // zsub1_zsub2 |
| 62911 | 0, // zsub1_zsub2_zsub3 |
| 62912 | 0, // zsub2_zsub3 |
| 62913 | 0, // zsub0_zsub2 |
| 62914 | 0, // zsub1_zsub3 |
| 62915 | }, |
| 62916 | { // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62917 | 217, // bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62918 | 217, // bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62919 | 217, // dsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62920 | 0, // dsub0 |
| 62921 | 217, // dsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62922 | 217, // dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62923 | 0, // dsub3 |
| 62924 | 217, // dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62925 | 217, // hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62926 | 217, // hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62927 | 0, // psub |
| 62928 | 0, // psub0 |
| 62929 | 0, // psub1 |
| 62930 | 217, // qsub0 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62931 | 217, // qsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62932 | 217, // qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62933 | 0, // qsub3 |
| 62934 | 217, // ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62935 | 217, // ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62936 | 0, // sub_32 |
| 62937 | 0, // sub_32_hi |
| 62938 | 0, // sube32 |
| 62939 | 0, // sube64 |
| 62940 | 0, // subo32 |
| 62941 | 0, // subo64 |
| 62942 | 0, // x8sub_0 |
| 62943 | 0, // x8sub_1 |
| 62944 | 0, // x8sub_2 |
| 62945 | 0, // x8sub_3 |
| 62946 | 0, // x8sub_4 |
| 62947 | 0, // x8sub_5 |
| 62948 | 0, // x8sub_6 |
| 62949 | 0, // x8sub_7 |
| 62950 | 0, // zasubb |
| 62951 | 0, // zasubd0 |
| 62952 | 0, // zasubd1 |
| 62953 | 0, // zasubh0 |
| 62954 | 0, // zasubh1 |
| 62955 | 0, // zasubq0 |
| 62956 | 0, // zasubq1 |
| 62957 | 0, // zasubs0 |
| 62958 | 0, // zasubs1 |
| 62959 | 0, // zsub |
| 62960 | 0, // zsub0 |
| 62961 | 0, // zsub1 |
| 62962 | 0, // zsub2 |
| 62963 | 0, // zsub3 |
| 62964 | 0, // zsub_hi |
| 62965 | 0, // zasubd1_then_zasubq0 |
| 62966 | 0, // zasubd1_then_zasubq1 |
| 62967 | 0, // zasubs1_then_zasubd0 |
| 62968 | 0, // zasubs1_then_zasubd1 |
| 62969 | 0, // zasubs1_then_zasubq0 |
| 62970 | 0, // zasubs1_then_zasubq1 |
| 62971 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 62972 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 62973 | 0, // zasubh1_then_zasubd0 |
| 62974 | 0, // zasubh1_then_zasubd1 |
| 62975 | 0, // zasubh1_then_zasubq0 |
| 62976 | 0, // zasubh1_then_zasubq1 |
| 62977 | 0, // zasubh1_then_zasubs0 |
| 62978 | 0, // zasubh1_then_zasubs1 |
| 62979 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 62980 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 62981 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 62982 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 62983 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 62984 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 62985 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 62986 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 62987 | 217, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62988 | 217, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62989 | 217, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62990 | 217, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62991 | 217, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62992 | 217, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 62993 | 0, // dsub3_then_bsub |
| 62994 | 0, // dsub3_then_bsub_hi |
| 62995 | 0, // dsub3_then_hsub |
| 62996 | 0, // dsub3_then_hsub_hi |
| 62997 | 0, // dsub3_then_ssub |
| 62998 | 0, // dsub3_then_ssub_hi |
| 62999 | 217, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63000 | 217, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63001 | 217, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63002 | 217, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63003 | 217, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63004 | 217, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63005 | 0, // psub1_then_psub |
| 63006 | 217, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63007 | 0, // qsub3_then_dsub_hi |
| 63008 | 217, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63009 | 0, // x8sub_7_then_sub_32 |
| 63010 | 0, // x8sub_7_then_sub_32_hi |
| 63011 | 0, // x8sub_6_then_sub_32 |
| 63012 | 0, // x8sub_6_then_sub_32_hi |
| 63013 | 0, // x8sub_5_then_sub_32 |
| 63014 | 0, // x8sub_5_then_sub_32_hi |
| 63015 | 0, // x8sub_4_then_sub_32 |
| 63016 | 0, // x8sub_4_then_sub_32_hi |
| 63017 | 0, // x8sub_3_then_sub_32 |
| 63018 | 0, // x8sub_3_then_sub_32_hi |
| 63019 | 0, // x8sub_2_then_sub_32 |
| 63020 | 0, // x8sub_2_then_sub_32_hi |
| 63021 | 0, // x8sub_1_then_sub_32 |
| 63022 | 0, // x8sub_1_then_sub_32_hi |
| 63023 | 0, // subo64_then_sub_32 |
| 63024 | 0, // subo64_then_sub_32_hi |
| 63025 | 0, // zsub1_then_zsub_hi |
| 63026 | 0, // zsub3_then_zsub_hi |
| 63027 | 0, // zsub2_then_zsub_hi |
| 63028 | 0, // dsub0_dsub1 |
| 63029 | 0, // dsub0_dsub1_dsub2 |
| 63030 | 217, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63031 | 0, // dsub1_dsub2_dsub3 |
| 63032 | 0, // dsub2_dsub3 |
| 63033 | 217, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63034 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63035 | 217, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63036 | 217, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63037 | 0, // qsub0_qsub1_qsub2 |
| 63038 | 217, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 63039 | 0, // qsub1_qsub2_qsub3 |
| 63040 | 0, // qsub2_qsub3 |
| 63041 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63042 | 0, // x8sub_0_x8sub_1 |
| 63043 | 0, // x8sub_2_x8sub_3 |
| 63044 | 0, // x8sub_4_x8sub_5 |
| 63045 | 0, // x8sub_6_x8sub_7 |
| 63046 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63047 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63048 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63049 | 0, // sub_32_subo64_then_sub_32 |
| 63050 | 0, // zsub_qsub1 |
| 63051 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63052 | 0, // zsub_qsub1_qsub2 |
| 63053 | 0, // zsub0_zsub1 |
| 63054 | 0, // zsub0_zsub1_zsub2 |
| 63055 | 0, // zsub1_zsub2 |
| 63056 | 0, // zsub1_zsub2_zsub3 |
| 63057 | 0, // zsub2_zsub3 |
| 63058 | 0, // zsub0_zsub2 |
| 63059 | 0, // zsub1_zsub3 |
| 63060 | }, |
| 63061 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63062 | 218, // bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63063 | 218, // bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63064 | 218, // dsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63065 | 0, // dsub0 |
| 63066 | 218, // dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63067 | 218, // dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63068 | 0, // dsub3 |
| 63069 | 218, // dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63070 | 218, // hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63071 | 218, // hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63072 | 0, // psub |
| 63073 | 0, // psub0 |
| 63074 | 0, // psub1 |
| 63075 | 0, // qsub0 |
| 63076 | 218, // qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63077 | 218, // qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63078 | 0, // qsub3 |
| 63079 | 218, // ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63080 | 218, // ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63081 | 0, // sub_32 |
| 63082 | 0, // sub_32_hi |
| 63083 | 0, // sube32 |
| 63084 | 0, // sube64 |
| 63085 | 0, // subo32 |
| 63086 | 0, // subo64 |
| 63087 | 0, // x8sub_0 |
| 63088 | 0, // x8sub_1 |
| 63089 | 0, // x8sub_2 |
| 63090 | 0, // x8sub_3 |
| 63091 | 0, // x8sub_4 |
| 63092 | 0, // x8sub_5 |
| 63093 | 0, // x8sub_6 |
| 63094 | 0, // x8sub_7 |
| 63095 | 0, // zasubb |
| 63096 | 0, // zasubd0 |
| 63097 | 0, // zasubd1 |
| 63098 | 0, // zasubh0 |
| 63099 | 0, // zasubh1 |
| 63100 | 0, // zasubq0 |
| 63101 | 0, // zasubq1 |
| 63102 | 0, // zasubs0 |
| 63103 | 0, // zasubs1 |
| 63104 | 218, // zsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63105 | 218, // zsub0 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63106 | 218, // zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63107 | 218, // zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63108 | 0, // zsub3 |
| 63109 | 218, // zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63110 | 0, // zasubd1_then_zasubq0 |
| 63111 | 0, // zasubd1_then_zasubq1 |
| 63112 | 0, // zasubs1_then_zasubd0 |
| 63113 | 0, // zasubs1_then_zasubd1 |
| 63114 | 0, // zasubs1_then_zasubq0 |
| 63115 | 0, // zasubs1_then_zasubq1 |
| 63116 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63117 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63118 | 0, // zasubh1_then_zasubd0 |
| 63119 | 0, // zasubh1_then_zasubd1 |
| 63120 | 0, // zasubh1_then_zasubq0 |
| 63121 | 0, // zasubh1_then_zasubq1 |
| 63122 | 0, // zasubh1_then_zasubs0 |
| 63123 | 0, // zasubh1_then_zasubs1 |
| 63124 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63125 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63126 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63127 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63128 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63129 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63130 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63131 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63132 | 218, // dsub1_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63133 | 218, // dsub1_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63134 | 218, // dsub1_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63135 | 218, // dsub1_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63136 | 218, // dsub1_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63137 | 218, // dsub1_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63138 | 0, // dsub3_then_bsub |
| 63139 | 0, // dsub3_then_bsub_hi |
| 63140 | 0, // dsub3_then_hsub |
| 63141 | 0, // dsub3_then_hsub_hi |
| 63142 | 0, // dsub3_then_ssub |
| 63143 | 0, // dsub3_then_ssub_hi |
| 63144 | 218, // dsub2_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63145 | 218, // dsub2_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63146 | 218, // dsub2_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63147 | 218, // dsub2_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63148 | 218, // dsub2_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63149 | 218, // dsub2_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63150 | 0, // psub1_then_psub |
| 63151 | 218, // qsub1_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63152 | 0, // qsub3_then_dsub_hi |
| 63153 | 218, // qsub2_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63154 | 0, // x8sub_7_then_sub_32 |
| 63155 | 0, // x8sub_7_then_sub_32_hi |
| 63156 | 0, // x8sub_6_then_sub_32 |
| 63157 | 0, // x8sub_6_then_sub_32_hi |
| 63158 | 0, // x8sub_5_then_sub_32 |
| 63159 | 0, // x8sub_5_then_sub_32_hi |
| 63160 | 0, // x8sub_4_then_sub_32 |
| 63161 | 0, // x8sub_4_then_sub_32_hi |
| 63162 | 0, // x8sub_3_then_sub_32 |
| 63163 | 0, // x8sub_3_then_sub_32_hi |
| 63164 | 0, // x8sub_2_then_sub_32 |
| 63165 | 0, // x8sub_2_then_sub_32_hi |
| 63166 | 0, // x8sub_1_then_sub_32 |
| 63167 | 0, // x8sub_1_then_sub_32_hi |
| 63168 | 0, // subo64_then_sub_32 |
| 63169 | 0, // subo64_then_sub_32_hi |
| 63170 | 218, // zsub1_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63171 | 0, // zsub3_then_zsub_hi |
| 63172 | 218, // zsub2_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63173 | 0, // dsub0_dsub1 |
| 63174 | 0, // dsub0_dsub1_dsub2 |
| 63175 | 218, // dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63176 | 0, // dsub1_dsub2_dsub3 |
| 63177 | 0, // dsub2_dsub3 |
| 63178 | 218, // dsub_dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63179 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63180 | 218, // dsub_dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63181 | 0, // qsub0_qsub1 |
| 63182 | 0, // qsub0_qsub1_qsub2 |
| 63183 | 218, // qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63184 | 0, // qsub1_qsub2_qsub3 |
| 63185 | 0, // qsub2_qsub3 |
| 63186 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63187 | 0, // x8sub_0_x8sub_1 |
| 63188 | 0, // x8sub_2_x8sub_3 |
| 63189 | 0, // x8sub_4_x8sub_5 |
| 63190 | 0, // x8sub_6_x8sub_7 |
| 63191 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63192 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63193 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63194 | 0, // sub_32_subo64_then_sub_32 |
| 63195 | 218, // zsub_qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63196 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63197 | 218, // zsub_qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63198 | 218, // zsub0_zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63199 | 0, // zsub0_zsub1_zsub2 |
| 63200 | 218, // zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63201 | 0, // zsub1_zsub2_zsub3 |
| 63202 | 0, // zsub2_zsub3 |
| 63203 | 0, // zsub0_zsub2 |
| 63204 | 0, // zsub1_zsub3 |
| 63205 | }, |
| 63206 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63207 | 219, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63208 | 219, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63209 | 219, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63210 | 0, // dsub0 |
| 63211 | 219, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63212 | 219, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63213 | 0, // dsub3 |
| 63214 | 219, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63215 | 219, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63216 | 219, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63217 | 0, // psub |
| 63218 | 0, // psub0 |
| 63219 | 0, // psub1 |
| 63220 | 0, // qsub0 |
| 63221 | 219, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63222 | 219, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63223 | 0, // qsub3 |
| 63224 | 219, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63225 | 219, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63226 | 0, // sub_32 |
| 63227 | 0, // sub_32_hi |
| 63228 | 0, // sube32 |
| 63229 | 0, // sube64 |
| 63230 | 0, // subo32 |
| 63231 | 0, // subo64 |
| 63232 | 0, // x8sub_0 |
| 63233 | 0, // x8sub_1 |
| 63234 | 0, // x8sub_2 |
| 63235 | 0, // x8sub_3 |
| 63236 | 0, // x8sub_4 |
| 63237 | 0, // x8sub_5 |
| 63238 | 0, // x8sub_6 |
| 63239 | 0, // x8sub_7 |
| 63240 | 0, // zasubb |
| 63241 | 0, // zasubd0 |
| 63242 | 0, // zasubd1 |
| 63243 | 0, // zasubh0 |
| 63244 | 0, // zasubh1 |
| 63245 | 0, // zasubq0 |
| 63246 | 0, // zasubq1 |
| 63247 | 0, // zasubs0 |
| 63248 | 0, // zasubs1 |
| 63249 | 219, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63250 | 219, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63251 | 219, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63252 | 219, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63253 | 0, // zsub3 |
| 63254 | 219, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63255 | 0, // zasubd1_then_zasubq0 |
| 63256 | 0, // zasubd1_then_zasubq1 |
| 63257 | 0, // zasubs1_then_zasubd0 |
| 63258 | 0, // zasubs1_then_zasubd1 |
| 63259 | 0, // zasubs1_then_zasubq0 |
| 63260 | 0, // zasubs1_then_zasubq1 |
| 63261 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63262 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63263 | 0, // zasubh1_then_zasubd0 |
| 63264 | 0, // zasubh1_then_zasubd1 |
| 63265 | 0, // zasubh1_then_zasubq0 |
| 63266 | 0, // zasubh1_then_zasubq1 |
| 63267 | 0, // zasubh1_then_zasubs0 |
| 63268 | 0, // zasubh1_then_zasubs1 |
| 63269 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63270 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63271 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63272 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63273 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63274 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63275 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63276 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63277 | 219, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63278 | 219, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63279 | 219, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63280 | 219, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63281 | 219, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63282 | 219, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63283 | 0, // dsub3_then_bsub |
| 63284 | 0, // dsub3_then_bsub_hi |
| 63285 | 0, // dsub3_then_hsub |
| 63286 | 0, // dsub3_then_hsub_hi |
| 63287 | 0, // dsub3_then_ssub |
| 63288 | 0, // dsub3_then_ssub_hi |
| 63289 | 219, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63290 | 219, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63291 | 219, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63292 | 219, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63293 | 219, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63294 | 219, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63295 | 0, // psub1_then_psub |
| 63296 | 219, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63297 | 0, // qsub3_then_dsub_hi |
| 63298 | 219, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63299 | 0, // x8sub_7_then_sub_32 |
| 63300 | 0, // x8sub_7_then_sub_32_hi |
| 63301 | 0, // x8sub_6_then_sub_32 |
| 63302 | 0, // x8sub_6_then_sub_32_hi |
| 63303 | 0, // x8sub_5_then_sub_32 |
| 63304 | 0, // x8sub_5_then_sub_32_hi |
| 63305 | 0, // x8sub_4_then_sub_32 |
| 63306 | 0, // x8sub_4_then_sub_32_hi |
| 63307 | 0, // x8sub_3_then_sub_32 |
| 63308 | 0, // x8sub_3_then_sub_32_hi |
| 63309 | 0, // x8sub_2_then_sub_32 |
| 63310 | 0, // x8sub_2_then_sub_32_hi |
| 63311 | 0, // x8sub_1_then_sub_32 |
| 63312 | 0, // x8sub_1_then_sub_32_hi |
| 63313 | 0, // subo64_then_sub_32 |
| 63314 | 0, // subo64_then_sub_32_hi |
| 63315 | 219, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63316 | 0, // zsub3_then_zsub_hi |
| 63317 | 219, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63318 | 0, // dsub0_dsub1 |
| 63319 | 0, // dsub0_dsub1_dsub2 |
| 63320 | 219, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63321 | 0, // dsub1_dsub2_dsub3 |
| 63322 | 0, // dsub2_dsub3 |
| 63323 | 219, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63324 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63325 | 219, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63326 | 0, // qsub0_qsub1 |
| 63327 | 0, // qsub0_qsub1_qsub2 |
| 63328 | 219, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63329 | 0, // qsub1_qsub2_qsub3 |
| 63330 | 0, // qsub2_qsub3 |
| 63331 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63332 | 0, // x8sub_0_x8sub_1 |
| 63333 | 0, // x8sub_2_x8sub_3 |
| 63334 | 0, // x8sub_4_x8sub_5 |
| 63335 | 0, // x8sub_6_x8sub_7 |
| 63336 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63337 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63338 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63339 | 0, // sub_32_subo64_then_sub_32 |
| 63340 | 219, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63341 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63342 | 219, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63343 | 219, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63344 | 0, // zsub0_zsub1_zsub2 |
| 63345 | 219, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 63346 | 0, // zsub1_zsub2_zsub3 |
| 63347 | 0, // zsub2_zsub3 |
| 63348 | 0, // zsub0_zsub2 |
| 63349 | 0, // zsub1_zsub3 |
| 63350 | }, |
| 63351 | { // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63352 | 220, // bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63353 | 220, // bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63354 | 220, // dsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63355 | 0, // dsub0 |
| 63356 | 220, // dsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63357 | 220, // dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63358 | 0, // dsub3 |
| 63359 | 220, // dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63360 | 220, // hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63361 | 220, // hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63362 | 0, // psub |
| 63363 | 0, // psub0 |
| 63364 | 0, // psub1 |
| 63365 | 220, // qsub0 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63366 | 220, // qsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63367 | 220, // qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63368 | 0, // qsub3 |
| 63369 | 220, // ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63370 | 220, // ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63371 | 0, // sub_32 |
| 63372 | 0, // sub_32_hi |
| 63373 | 0, // sube32 |
| 63374 | 0, // sube64 |
| 63375 | 0, // subo32 |
| 63376 | 0, // subo64 |
| 63377 | 0, // x8sub_0 |
| 63378 | 0, // x8sub_1 |
| 63379 | 0, // x8sub_2 |
| 63380 | 0, // x8sub_3 |
| 63381 | 0, // x8sub_4 |
| 63382 | 0, // x8sub_5 |
| 63383 | 0, // x8sub_6 |
| 63384 | 0, // x8sub_7 |
| 63385 | 0, // zasubb |
| 63386 | 0, // zasubd0 |
| 63387 | 0, // zasubd1 |
| 63388 | 0, // zasubh0 |
| 63389 | 0, // zasubh1 |
| 63390 | 0, // zasubq0 |
| 63391 | 0, // zasubq1 |
| 63392 | 0, // zasubs0 |
| 63393 | 0, // zasubs1 |
| 63394 | 0, // zsub |
| 63395 | 0, // zsub0 |
| 63396 | 0, // zsub1 |
| 63397 | 0, // zsub2 |
| 63398 | 0, // zsub3 |
| 63399 | 0, // zsub_hi |
| 63400 | 0, // zasubd1_then_zasubq0 |
| 63401 | 0, // zasubd1_then_zasubq1 |
| 63402 | 0, // zasubs1_then_zasubd0 |
| 63403 | 0, // zasubs1_then_zasubd1 |
| 63404 | 0, // zasubs1_then_zasubq0 |
| 63405 | 0, // zasubs1_then_zasubq1 |
| 63406 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63407 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63408 | 0, // zasubh1_then_zasubd0 |
| 63409 | 0, // zasubh1_then_zasubd1 |
| 63410 | 0, // zasubh1_then_zasubq0 |
| 63411 | 0, // zasubh1_then_zasubq1 |
| 63412 | 0, // zasubh1_then_zasubs0 |
| 63413 | 0, // zasubh1_then_zasubs1 |
| 63414 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63415 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63416 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63417 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63418 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63419 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63420 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63421 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63422 | 220, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63423 | 220, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63424 | 220, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63425 | 220, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63426 | 220, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63427 | 220, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63428 | 0, // dsub3_then_bsub |
| 63429 | 0, // dsub3_then_bsub_hi |
| 63430 | 0, // dsub3_then_hsub |
| 63431 | 0, // dsub3_then_hsub_hi |
| 63432 | 0, // dsub3_then_ssub |
| 63433 | 0, // dsub3_then_ssub_hi |
| 63434 | 220, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63435 | 220, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63436 | 220, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63437 | 220, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63438 | 220, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63439 | 220, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63440 | 0, // psub1_then_psub |
| 63441 | 220, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63442 | 0, // qsub3_then_dsub_hi |
| 63443 | 220, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63444 | 0, // x8sub_7_then_sub_32 |
| 63445 | 0, // x8sub_7_then_sub_32_hi |
| 63446 | 0, // x8sub_6_then_sub_32 |
| 63447 | 0, // x8sub_6_then_sub_32_hi |
| 63448 | 0, // x8sub_5_then_sub_32 |
| 63449 | 0, // x8sub_5_then_sub_32_hi |
| 63450 | 0, // x8sub_4_then_sub_32 |
| 63451 | 0, // x8sub_4_then_sub_32_hi |
| 63452 | 0, // x8sub_3_then_sub_32 |
| 63453 | 0, // x8sub_3_then_sub_32_hi |
| 63454 | 0, // x8sub_2_then_sub_32 |
| 63455 | 0, // x8sub_2_then_sub_32_hi |
| 63456 | 0, // x8sub_1_then_sub_32 |
| 63457 | 0, // x8sub_1_then_sub_32_hi |
| 63458 | 0, // subo64_then_sub_32 |
| 63459 | 0, // subo64_then_sub_32_hi |
| 63460 | 0, // zsub1_then_zsub_hi |
| 63461 | 0, // zsub3_then_zsub_hi |
| 63462 | 0, // zsub2_then_zsub_hi |
| 63463 | 0, // dsub0_dsub1 |
| 63464 | 0, // dsub0_dsub1_dsub2 |
| 63465 | 220, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63466 | 0, // dsub1_dsub2_dsub3 |
| 63467 | 0, // dsub2_dsub3 |
| 63468 | 220, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63469 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63470 | 220, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63471 | 220, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63472 | 0, // qsub0_qsub1_qsub2 |
| 63473 | 220, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 63474 | 0, // qsub1_qsub2_qsub3 |
| 63475 | 0, // qsub2_qsub3 |
| 63476 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63477 | 0, // x8sub_0_x8sub_1 |
| 63478 | 0, // x8sub_2_x8sub_3 |
| 63479 | 0, // x8sub_4_x8sub_5 |
| 63480 | 0, // x8sub_6_x8sub_7 |
| 63481 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63482 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63483 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63484 | 0, // sub_32_subo64_then_sub_32 |
| 63485 | 0, // zsub_qsub1 |
| 63486 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63487 | 0, // zsub_qsub1_qsub2 |
| 63488 | 0, // zsub0_zsub1 |
| 63489 | 0, // zsub0_zsub1_zsub2 |
| 63490 | 0, // zsub1_zsub2 |
| 63491 | 0, // zsub1_zsub2_zsub3 |
| 63492 | 0, // zsub2_zsub3 |
| 63493 | 0, // zsub0_zsub2 |
| 63494 | 0, // zsub1_zsub3 |
| 63495 | }, |
| 63496 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63497 | 221, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63498 | 221, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63499 | 221, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63500 | 0, // dsub0 |
| 63501 | 221, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63502 | 221, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63503 | 0, // dsub3 |
| 63504 | 221, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63505 | 221, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63506 | 221, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63507 | 0, // psub |
| 63508 | 0, // psub0 |
| 63509 | 0, // psub1 |
| 63510 | 0, // qsub0 |
| 63511 | 221, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63512 | 221, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63513 | 0, // qsub3 |
| 63514 | 221, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63515 | 221, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63516 | 0, // sub_32 |
| 63517 | 0, // sub_32_hi |
| 63518 | 0, // sube32 |
| 63519 | 0, // sube64 |
| 63520 | 0, // subo32 |
| 63521 | 0, // subo64 |
| 63522 | 0, // x8sub_0 |
| 63523 | 0, // x8sub_1 |
| 63524 | 0, // x8sub_2 |
| 63525 | 0, // x8sub_3 |
| 63526 | 0, // x8sub_4 |
| 63527 | 0, // x8sub_5 |
| 63528 | 0, // x8sub_6 |
| 63529 | 0, // x8sub_7 |
| 63530 | 0, // zasubb |
| 63531 | 0, // zasubd0 |
| 63532 | 0, // zasubd1 |
| 63533 | 0, // zasubh0 |
| 63534 | 0, // zasubh1 |
| 63535 | 0, // zasubq0 |
| 63536 | 0, // zasubq1 |
| 63537 | 0, // zasubs0 |
| 63538 | 0, // zasubs1 |
| 63539 | 221, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63540 | 221, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63541 | 221, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63542 | 221, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63543 | 0, // zsub3 |
| 63544 | 221, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63545 | 0, // zasubd1_then_zasubq0 |
| 63546 | 0, // zasubd1_then_zasubq1 |
| 63547 | 0, // zasubs1_then_zasubd0 |
| 63548 | 0, // zasubs1_then_zasubd1 |
| 63549 | 0, // zasubs1_then_zasubq0 |
| 63550 | 0, // zasubs1_then_zasubq1 |
| 63551 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63552 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63553 | 0, // zasubh1_then_zasubd0 |
| 63554 | 0, // zasubh1_then_zasubd1 |
| 63555 | 0, // zasubh1_then_zasubq0 |
| 63556 | 0, // zasubh1_then_zasubq1 |
| 63557 | 0, // zasubh1_then_zasubs0 |
| 63558 | 0, // zasubh1_then_zasubs1 |
| 63559 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63560 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63561 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63562 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63563 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63564 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63565 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63566 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63567 | 221, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63568 | 221, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63569 | 221, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63570 | 221, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63571 | 221, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63572 | 221, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63573 | 0, // dsub3_then_bsub |
| 63574 | 0, // dsub3_then_bsub_hi |
| 63575 | 0, // dsub3_then_hsub |
| 63576 | 0, // dsub3_then_hsub_hi |
| 63577 | 0, // dsub3_then_ssub |
| 63578 | 0, // dsub3_then_ssub_hi |
| 63579 | 221, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63580 | 221, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63581 | 221, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63582 | 221, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63583 | 221, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63584 | 221, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63585 | 0, // psub1_then_psub |
| 63586 | 221, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63587 | 0, // qsub3_then_dsub_hi |
| 63588 | 221, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63589 | 0, // x8sub_7_then_sub_32 |
| 63590 | 0, // x8sub_7_then_sub_32_hi |
| 63591 | 0, // x8sub_6_then_sub_32 |
| 63592 | 0, // x8sub_6_then_sub_32_hi |
| 63593 | 0, // x8sub_5_then_sub_32 |
| 63594 | 0, // x8sub_5_then_sub_32_hi |
| 63595 | 0, // x8sub_4_then_sub_32 |
| 63596 | 0, // x8sub_4_then_sub_32_hi |
| 63597 | 0, // x8sub_3_then_sub_32 |
| 63598 | 0, // x8sub_3_then_sub_32_hi |
| 63599 | 0, // x8sub_2_then_sub_32 |
| 63600 | 0, // x8sub_2_then_sub_32_hi |
| 63601 | 0, // x8sub_1_then_sub_32 |
| 63602 | 0, // x8sub_1_then_sub_32_hi |
| 63603 | 0, // subo64_then_sub_32 |
| 63604 | 0, // subo64_then_sub_32_hi |
| 63605 | 221, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63606 | 0, // zsub3_then_zsub_hi |
| 63607 | 221, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63608 | 0, // dsub0_dsub1 |
| 63609 | 0, // dsub0_dsub1_dsub2 |
| 63610 | 221, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63611 | 0, // dsub1_dsub2_dsub3 |
| 63612 | 0, // dsub2_dsub3 |
| 63613 | 221, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63614 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63615 | 221, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63616 | 0, // qsub0_qsub1 |
| 63617 | 0, // qsub0_qsub1_qsub2 |
| 63618 | 221, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63619 | 0, // qsub1_qsub2_qsub3 |
| 63620 | 0, // qsub2_qsub3 |
| 63621 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63622 | 0, // x8sub_0_x8sub_1 |
| 63623 | 0, // x8sub_2_x8sub_3 |
| 63624 | 0, // x8sub_4_x8sub_5 |
| 63625 | 0, // x8sub_6_x8sub_7 |
| 63626 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63627 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63628 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63629 | 0, // sub_32_subo64_then_sub_32 |
| 63630 | 221, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63631 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63632 | 221, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63633 | 221, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63634 | 0, // zsub0_zsub1_zsub2 |
| 63635 | 221, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 63636 | 0, // zsub1_zsub2_zsub3 |
| 63637 | 0, // zsub2_zsub3 |
| 63638 | 0, // zsub0_zsub2 |
| 63639 | 0, // zsub1_zsub3 |
| 63640 | }, |
| 63641 | { // QQQ_with_qsub0_in_FPR128_0to7 |
| 63642 | 222, // bsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63643 | 222, // bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63644 | 222, // dsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63645 | 0, // dsub0 |
| 63646 | 222, // dsub1 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63647 | 222, // dsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63648 | 0, // dsub3 |
| 63649 | 222, // dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63650 | 222, // hsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63651 | 222, // hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63652 | 0, // psub |
| 63653 | 0, // psub0 |
| 63654 | 0, // psub1 |
| 63655 | 222, // qsub0 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63656 | 222, // qsub1 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63657 | 222, // qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63658 | 0, // qsub3 |
| 63659 | 222, // ssub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63660 | 222, // ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63661 | 0, // sub_32 |
| 63662 | 0, // sub_32_hi |
| 63663 | 0, // sube32 |
| 63664 | 0, // sube64 |
| 63665 | 0, // subo32 |
| 63666 | 0, // subo64 |
| 63667 | 0, // x8sub_0 |
| 63668 | 0, // x8sub_1 |
| 63669 | 0, // x8sub_2 |
| 63670 | 0, // x8sub_3 |
| 63671 | 0, // x8sub_4 |
| 63672 | 0, // x8sub_5 |
| 63673 | 0, // x8sub_6 |
| 63674 | 0, // x8sub_7 |
| 63675 | 0, // zasubb |
| 63676 | 0, // zasubd0 |
| 63677 | 0, // zasubd1 |
| 63678 | 0, // zasubh0 |
| 63679 | 0, // zasubh1 |
| 63680 | 0, // zasubq0 |
| 63681 | 0, // zasubq1 |
| 63682 | 0, // zasubs0 |
| 63683 | 0, // zasubs1 |
| 63684 | 0, // zsub |
| 63685 | 0, // zsub0 |
| 63686 | 0, // zsub1 |
| 63687 | 0, // zsub2 |
| 63688 | 0, // zsub3 |
| 63689 | 0, // zsub_hi |
| 63690 | 0, // zasubd1_then_zasubq0 |
| 63691 | 0, // zasubd1_then_zasubq1 |
| 63692 | 0, // zasubs1_then_zasubd0 |
| 63693 | 0, // zasubs1_then_zasubd1 |
| 63694 | 0, // zasubs1_then_zasubq0 |
| 63695 | 0, // zasubs1_then_zasubq1 |
| 63696 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63697 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63698 | 0, // zasubh1_then_zasubd0 |
| 63699 | 0, // zasubh1_then_zasubd1 |
| 63700 | 0, // zasubh1_then_zasubq0 |
| 63701 | 0, // zasubh1_then_zasubq1 |
| 63702 | 0, // zasubh1_then_zasubs0 |
| 63703 | 0, // zasubh1_then_zasubs1 |
| 63704 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63705 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63706 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63707 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63708 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63709 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63710 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63711 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63712 | 222, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63713 | 222, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63714 | 222, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63715 | 222, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63716 | 222, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63717 | 222, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63718 | 0, // dsub3_then_bsub |
| 63719 | 0, // dsub3_then_bsub_hi |
| 63720 | 0, // dsub3_then_hsub |
| 63721 | 0, // dsub3_then_hsub_hi |
| 63722 | 0, // dsub3_then_ssub |
| 63723 | 0, // dsub3_then_ssub_hi |
| 63724 | 222, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63725 | 222, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63726 | 222, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63727 | 222, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63728 | 222, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63729 | 222, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63730 | 0, // psub1_then_psub |
| 63731 | 222, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63732 | 0, // qsub3_then_dsub_hi |
| 63733 | 222, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63734 | 0, // x8sub_7_then_sub_32 |
| 63735 | 0, // x8sub_7_then_sub_32_hi |
| 63736 | 0, // x8sub_6_then_sub_32 |
| 63737 | 0, // x8sub_6_then_sub_32_hi |
| 63738 | 0, // x8sub_5_then_sub_32 |
| 63739 | 0, // x8sub_5_then_sub_32_hi |
| 63740 | 0, // x8sub_4_then_sub_32 |
| 63741 | 0, // x8sub_4_then_sub_32_hi |
| 63742 | 0, // x8sub_3_then_sub_32 |
| 63743 | 0, // x8sub_3_then_sub_32_hi |
| 63744 | 0, // x8sub_2_then_sub_32 |
| 63745 | 0, // x8sub_2_then_sub_32_hi |
| 63746 | 0, // x8sub_1_then_sub_32 |
| 63747 | 0, // x8sub_1_then_sub_32_hi |
| 63748 | 0, // subo64_then_sub_32 |
| 63749 | 0, // subo64_then_sub_32_hi |
| 63750 | 0, // zsub1_then_zsub_hi |
| 63751 | 0, // zsub3_then_zsub_hi |
| 63752 | 0, // zsub2_then_zsub_hi |
| 63753 | 0, // dsub0_dsub1 |
| 63754 | 0, // dsub0_dsub1_dsub2 |
| 63755 | 222, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63756 | 0, // dsub1_dsub2_dsub3 |
| 63757 | 0, // dsub2_dsub3 |
| 63758 | 222, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63759 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63760 | 222, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63761 | 222, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63762 | 0, // qsub0_qsub1_qsub2 |
| 63763 | 222, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 63764 | 0, // qsub1_qsub2_qsub3 |
| 63765 | 0, // qsub2_qsub3 |
| 63766 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63767 | 0, // x8sub_0_x8sub_1 |
| 63768 | 0, // x8sub_2_x8sub_3 |
| 63769 | 0, // x8sub_4_x8sub_5 |
| 63770 | 0, // x8sub_6_x8sub_7 |
| 63771 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63772 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63773 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63774 | 0, // sub_32_subo64_then_sub_32 |
| 63775 | 0, // zsub_qsub1 |
| 63776 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63777 | 0, // zsub_qsub1_qsub2 |
| 63778 | 0, // zsub0_zsub1 |
| 63779 | 0, // zsub0_zsub1_zsub2 |
| 63780 | 0, // zsub1_zsub2 |
| 63781 | 0, // zsub1_zsub2_zsub3 |
| 63782 | 0, // zsub2_zsub3 |
| 63783 | 0, // zsub0_zsub2 |
| 63784 | 0, // zsub1_zsub3 |
| 63785 | }, |
| 63786 | { // QQQ_with_qsub1_in_FPR128_0to7 |
| 63787 | 223, // bsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63788 | 223, // bsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63789 | 223, // dsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63790 | 0, // dsub0 |
| 63791 | 223, // dsub1 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63792 | 223, // dsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63793 | 0, // dsub3 |
| 63794 | 223, // dsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63795 | 223, // hsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63796 | 223, // hsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63797 | 0, // psub |
| 63798 | 0, // psub0 |
| 63799 | 0, // psub1 |
| 63800 | 223, // qsub0 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63801 | 223, // qsub1 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63802 | 223, // qsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63803 | 0, // qsub3 |
| 63804 | 223, // ssub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63805 | 223, // ssub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63806 | 0, // sub_32 |
| 63807 | 0, // sub_32_hi |
| 63808 | 0, // sube32 |
| 63809 | 0, // sube64 |
| 63810 | 0, // subo32 |
| 63811 | 0, // subo64 |
| 63812 | 0, // x8sub_0 |
| 63813 | 0, // x8sub_1 |
| 63814 | 0, // x8sub_2 |
| 63815 | 0, // x8sub_3 |
| 63816 | 0, // x8sub_4 |
| 63817 | 0, // x8sub_5 |
| 63818 | 0, // x8sub_6 |
| 63819 | 0, // x8sub_7 |
| 63820 | 0, // zasubb |
| 63821 | 0, // zasubd0 |
| 63822 | 0, // zasubd1 |
| 63823 | 0, // zasubh0 |
| 63824 | 0, // zasubh1 |
| 63825 | 0, // zasubq0 |
| 63826 | 0, // zasubq1 |
| 63827 | 0, // zasubs0 |
| 63828 | 0, // zasubs1 |
| 63829 | 0, // zsub |
| 63830 | 0, // zsub0 |
| 63831 | 0, // zsub1 |
| 63832 | 0, // zsub2 |
| 63833 | 0, // zsub3 |
| 63834 | 0, // zsub_hi |
| 63835 | 0, // zasubd1_then_zasubq0 |
| 63836 | 0, // zasubd1_then_zasubq1 |
| 63837 | 0, // zasubs1_then_zasubd0 |
| 63838 | 0, // zasubs1_then_zasubd1 |
| 63839 | 0, // zasubs1_then_zasubq0 |
| 63840 | 0, // zasubs1_then_zasubq1 |
| 63841 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63842 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63843 | 0, // zasubh1_then_zasubd0 |
| 63844 | 0, // zasubh1_then_zasubd1 |
| 63845 | 0, // zasubh1_then_zasubq0 |
| 63846 | 0, // zasubh1_then_zasubq1 |
| 63847 | 0, // zasubh1_then_zasubs0 |
| 63848 | 0, // zasubh1_then_zasubs1 |
| 63849 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63850 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63851 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63852 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63853 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63854 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 63855 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 63856 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 63857 | 223, // dsub1_then_bsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63858 | 223, // dsub1_then_bsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63859 | 223, // dsub1_then_hsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63860 | 223, // dsub1_then_hsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63861 | 223, // dsub1_then_ssub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63862 | 223, // dsub1_then_ssub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63863 | 0, // dsub3_then_bsub |
| 63864 | 0, // dsub3_then_bsub_hi |
| 63865 | 0, // dsub3_then_hsub |
| 63866 | 0, // dsub3_then_hsub_hi |
| 63867 | 0, // dsub3_then_ssub |
| 63868 | 0, // dsub3_then_ssub_hi |
| 63869 | 223, // dsub2_then_bsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63870 | 223, // dsub2_then_bsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63871 | 223, // dsub2_then_hsub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63872 | 223, // dsub2_then_hsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63873 | 223, // dsub2_then_ssub -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63874 | 223, // dsub2_then_ssub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63875 | 0, // psub1_then_psub |
| 63876 | 223, // qsub1_then_dsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63877 | 0, // qsub3_then_dsub_hi |
| 63878 | 223, // qsub2_then_dsub_hi -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63879 | 0, // x8sub_7_then_sub_32 |
| 63880 | 0, // x8sub_7_then_sub_32_hi |
| 63881 | 0, // x8sub_6_then_sub_32 |
| 63882 | 0, // x8sub_6_then_sub_32_hi |
| 63883 | 0, // x8sub_5_then_sub_32 |
| 63884 | 0, // x8sub_5_then_sub_32_hi |
| 63885 | 0, // x8sub_4_then_sub_32 |
| 63886 | 0, // x8sub_4_then_sub_32_hi |
| 63887 | 0, // x8sub_3_then_sub_32 |
| 63888 | 0, // x8sub_3_then_sub_32_hi |
| 63889 | 0, // x8sub_2_then_sub_32 |
| 63890 | 0, // x8sub_2_then_sub_32_hi |
| 63891 | 0, // x8sub_1_then_sub_32 |
| 63892 | 0, // x8sub_1_then_sub_32_hi |
| 63893 | 0, // subo64_then_sub_32 |
| 63894 | 0, // subo64_then_sub_32_hi |
| 63895 | 0, // zsub1_then_zsub_hi |
| 63896 | 0, // zsub3_then_zsub_hi |
| 63897 | 0, // zsub2_then_zsub_hi |
| 63898 | 0, // dsub0_dsub1 |
| 63899 | 0, // dsub0_dsub1_dsub2 |
| 63900 | 223, // dsub1_dsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63901 | 0, // dsub1_dsub2_dsub3 |
| 63902 | 0, // dsub2_dsub3 |
| 63903 | 223, // dsub_dsub1 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63904 | 0, // dsub_dsub1_dsub2_dsub3 |
| 63905 | 223, // dsub_dsub1_dsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63906 | 223, // qsub0_qsub1 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63907 | 0, // qsub0_qsub1_qsub2 |
| 63908 | 223, // qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 63909 | 0, // qsub1_qsub2_qsub3 |
| 63910 | 0, // qsub2_qsub3 |
| 63911 | 0, // sub_32_x8sub_1_then_sub_32 |
| 63912 | 0, // x8sub_0_x8sub_1 |
| 63913 | 0, // x8sub_2_x8sub_3 |
| 63914 | 0, // x8sub_4_x8sub_5 |
| 63915 | 0, // x8sub_6_x8sub_7 |
| 63916 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 63917 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 63918 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 63919 | 0, // sub_32_subo64_then_sub_32 |
| 63920 | 0, // zsub_qsub1 |
| 63921 | 0, // zsub_qsub1_qsub2_qsub3 |
| 63922 | 0, // zsub_qsub1_qsub2 |
| 63923 | 0, // zsub0_zsub1 |
| 63924 | 0, // zsub0_zsub1_zsub2 |
| 63925 | 0, // zsub1_zsub2 |
| 63926 | 0, // zsub1_zsub2_zsub3 |
| 63927 | 0, // zsub2_zsub3 |
| 63928 | 0, // zsub0_zsub2 |
| 63929 | 0, // zsub1_zsub3 |
| 63930 | }, |
| 63931 | { // QQQ_with_qsub2_in_FPR128_0to7 |
| 63932 | 224, // bsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63933 | 224, // bsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63934 | 224, // dsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63935 | 0, // dsub0 |
| 63936 | 224, // dsub1 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63937 | 224, // dsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63938 | 0, // dsub3 |
| 63939 | 224, // dsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63940 | 224, // hsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63941 | 224, // hsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63942 | 0, // psub |
| 63943 | 0, // psub0 |
| 63944 | 0, // psub1 |
| 63945 | 224, // qsub0 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63946 | 224, // qsub1 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63947 | 224, // qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63948 | 0, // qsub3 |
| 63949 | 224, // ssub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63950 | 224, // ssub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 63951 | 0, // sub_32 |
| 63952 | 0, // sub_32_hi |
| 63953 | 0, // sube32 |
| 63954 | 0, // sube64 |
| 63955 | 0, // subo32 |
| 63956 | 0, // subo64 |
| 63957 | 0, // x8sub_0 |
| 63958 | 0, // x8sub_1 |
| 63959 | 0, // x8sub_2 |
| 63960 | 0, // x8sub_3 |
| 63961 | 0, // x8sub_4 |
| 63962 | 0, // x8sub_5 |
| 63963 | 0, // x8sub_6 |
| 63964 | 0, // x8sub_7 |
| 63965 | 0, // zasubb |
| 63966 | 0, // zasubd0 |
| 63967 | 0, // zasubd1 |
| 63968 | 0, // zasubh0 |
| 63969 | 0, // zasubh1 |
| 63970 | 0, // zasubq0 |
| 63971 | 0, // zasubq1 |
| 63972 | 0, // zasubs0 |
| 63973 | 0, // zasubs1 |
| 63974 | 0, // zsub |
| 63975 | 0, // zsub0 |
| 63976 | 0, // zsub1 |
| 63977 | 0, // zsub2 |
| 63978 | 0, // zsub3 |
| 63979 | 0, // zsub_hi |
| 63980 | 0, // zasubd1_then_zasubq0 |
| 63981 | 0, // zasubd1_then_zasubq1 |
| 63982 | 0, // zasubs1_then_zasubd0 |
| 63983 | 0, // zasubs1_then_zasubd1 |
| 63984 | 0, // zasubs1_then_zasubq0 |
| 63985 | 0, // zasubs1_then_zasubq1 |
| 63986 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 63987 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 63988 | 0, // zasubh1_then_zasubd0 |
| 63989 | 0, // zasubh1_then_zasubd1 |
| 63990 | 0, // zasubh1_then_zasubq0 |
| 63991 | 0, // zasubh1_then_zasubq1 |
| 63992 | 0, // zasubh1_then_zasubs0 |
| 63993 | 0, // zasubh1_then_zasubs1 |
| 63994 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 63995 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 63996 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 63997 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 63998 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 63999 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64000 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64001 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64002 | 224, // dsub1_then_bsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64003 | 224, // dsub1_then_bsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64004 | 224, // dsub1_then_hsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64005 | 224, // dsub1_then_hsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64006 | 224, // dsub1_then_ssub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64007 | 224, // dsub1_then_ssub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64008 | 0, // dsub3_then_bsub |
| 64009 | 0, // dsub3_then_bsub_hi |
| 64010 | 0, // dsub3_then_hsub |
| 64011 | 0, // dsub3_then_hsub_hi |
| 64012 | 0, // dsub3_then_ssub |
| 64013 | 0, // dsub3_then_ssub_hi |
| 64014 | 224, // dsub2_then_bsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64015 | 224, // dsub2_then_bsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64016 | 224, // dsub2_then_hsub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64017 | 224, // dsub2_then_hsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64018 | 224, // dsub2_then_ssub -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64019 | 224, // dsub2_then_ssub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64020 | 0, // psub1_then_psub |
| 64021 | 224, // qsub1_then_dsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64022 | 0, // qsub3_then_dsub_hi |
| 64023 | 224, // qsub2_then_dsub_hi -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64024 | 0, // x8sub_7_then_sub_32 |
| 64025 | 0, // x8sub_7_then_sub_32_hi |
| 64026 | 0, // x8sub_6_then_sub_32 |
| 64027 | 0, // x8sub_6_then_sub_32_hi |
| 64028 | 0, // x8sub_5_then_sub_32 |
| 64029 | 0, // x8sub_5_then_sub_32_hi |
| 64030 | 0, // x8sub_4_then_sub_32 |
| 64031 | 0, // x8sub_4_then_sub_32_hi |
| 64032 | 0, // x8sub_3_then_sub_32 |
| 64033 | 0, // x8sub_3_then_sub_32_hi |
| 64034 | 0, // x8sub_2_then_sub_32 |
| 64035 | 0, // x8sub_2_then_sub_32_hi |
| 64036 | 0, // x8sub_1_then_sub_32 |
| 64037 | 0, // x8sub_1_then_sub_32_hi |
| 64038 | 0, // subo64_then_sub_32 |
| 64039 | 0, // subo64_then_sub_32_hi |
| 64040 | 0, // zsub1_then_zsub_hi |
| 64041 | 0, // zsub3_then_zsub_hi |
| 64042 | 0, // zsub2_then_zsub_hi |
| 64043 | 0, // dsub0_dsub1 |
| 64044 | 0, // dsub0_dsub1_dsub2 |
| 64045 | 224, // dsub1_dsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64046 | 0, // dsub1_dsub2_dsub3 |
| 64047 | 0, // dsub2_dsub3 |
| 64048 | 224, // dsub_dsub1 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64049 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64050 | 224, // dsub_dsub1_dsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64051 | 224, // qsub0_qsub1 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64052 | 0, // qsub0_qsub1_qsub2 |
| 64053 | 224, // qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 64054 | 0, // qsub1_qsub2_qsub3 |
| 64055 | 0, // qsub2_qsub3 |
| 64056 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64057 | 0, // x8sub_0_x8sub_1 |
| 64058 | 0, // x8sub_2_x8sub_3 |
| 64059 | 0, // x8sub_4_x8sub_5 |
| 64060 | 0, // x8sub_6_x8sub_7 |
| 64061 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64062 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64063 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64064 | 0, // sub_32_subo64_then_sub_32 |
| 64065 | 0, // zsub_qsub1 |
| 64066 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64067 | 0, // zsub_qsub1_qsub2 |
| 64068 | 0, // zsub0_zsub1 |
| 64069 | 0, // zsub0_zsub1_zsub2 |
| 64070 | 0, // zsub1_zsub2 |
| 64071 | 0, // zsub1_zsub2_zsub3 |
| 64072 | 0, // zsub2_zsub3 |
| 64073 | 0, // zsub0_zsub2 |
| 64074 | 0, // zsub1_zsub3 |
| 64075 | }, |
| 64076 | { // ZPR3_with_qsub1_in_FPR128_0to7 |
| 64077 | 225, // bsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64078 | 225, // bsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64079 | 225, // dsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64080 | 0, // dsub0 |
| 64081 | 225, // dsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64082 | 225, // dsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64083 | 0, // dsub3 |
| 64084 | 225, // dsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64085 | 225, // hsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64086 | 225, // hsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64087 | 0, // psub |
| 64088 | 0, // psub0 |
| 64089 | 0, // psub1 |
| 64090 | 0, // qsub0 |
| 64091 | 225, // qsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64092 | 225, // qsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64093 | 0, // qsub3 |
| 64094 | 225, // ssub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64095 | 225, // ssub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64096 | 0, // sub_32 |
| 64097 | 0, // sub_32_hi |
| 64098 | 0, // sube32 |
| 64099 | 0, // sube64 |
| 64100 | 0, // subo32 |
| 64101 | 0, // subo64 |
| 64102 | 0, // x8sub_0 |
| 64103 | 0, // x8sub_1 |
| 64104 | 0, // x8sub_2 |
| 64105 | 0, // x8sub_3 |
| 64106 | 0, // x8sub_4 |
| 64107 | 0, // x8sub_5 |
| 64108 | 0, // x8sub_6 |
| 64109 | 0, // x8sub_7 |
| 64110 | 0, // zasubb |
| 64111 | 0, // zasubd0 |
| 64112 | 0, // zasubd1 |
| 64113 | 0, // zasubh0 |
| 64114 | 0, // zasubh1 |
| 64115 | 0, // zasubq0 |
| 64116 | 0, // zasubq1 |
| 64117 | 0, // zasubs0 |
| 64118 | 0, // zasubs1 |
| 64119 | 225, // zsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64120 | 225, // zsub0 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64121 | 225, // zsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64122 | 225, // zsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64123 | 0, // zsub3 |
| 64124 | 225, // zsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64125 | 0, // zasubd1_then_zasubq0 |
| 64126 | 0, // zasubd1_then_zasubq1 |
| 64127 | 0, // zasubs1_then_zasubd0 |
| 64128 | 0, // zasubs1_then_zasubd1 |
| 64129 | 0, // zasubs1_then_zasubq0 |
| 64130 | 0, // zasubs1_then_zasubq1 |
| 64131 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64132 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64133 | 0, // zasubh1_then_zasubd0 |
| 64134 | 0, // zasubh1_then_zasubd1 |
| 64135 | 0, // zasubh1_then_zasubq0 |
| 64136 | 0, // zasubh1_then_zasubq1 |
| 64137 | 0, // zasubh1_then_zasubs0 |
| 64138 | 0, // zasubh1_then_zasubs1 |
| 64139 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64140 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64141 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64142 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64143 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64144 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64145 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64146 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64147 | 225, // dsub1_then_bsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64148 | 225, // dsub1_then_bsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64149 | 225, // dsub1_then_hsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64150 | 225, // dsub1_then_hsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64151 | 225, // dsub1_then_ssub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64152 | 225, // dsub1_then_ssub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64153 | 0, // dsub3_then_bsub |
| 64154 | 0, // dsub3_then_bsub_hi |
| 64155 | 0, // dsub3_then_hsub |
| 64156 | 0, // dsub3_then_hsub_hi |
| 64157 | 0, // dsub3_then_ssub |
| 64158 | 0, // dsub3_then_ssub_hi |
| 64159 | 225, // dsub2_then_bsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64160 | 225, // dsub2_then_bsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64161 | 225, // dsub2_then_hsub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64162 | 225, // dsub2_then_hsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64163 | 225, // dsub2_then_ssub -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64164 | 225, // dsub2_then_ssub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64165 | 0, // psub1_then_psub |
| 64166 | 225, // qsub1_then_dsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64167 | 0, // qsub3_then_dsub_hi |
| 64168 | 225, // qsub2_then_dsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64169 | 0, // x8sub_7_then_sub_32 |
| 64170 | 0, // x8sub_7_then_sub_32_hi |
| 64171 | 0, // x8sub_6_then_sub_32 |
| 64172 | 0, // x8sub_6_then_sub_32_hi |
| 64173 | 0, // x8sub_5_then_sub_32 |
| 64174 | 0, // x8sub_5_then_sub_32_hi |
| 64175 | 0, // x8sub_4_then_sub_32 |
| 64176 | 0, // x8sub_4_then_sub_32_hi |
| 64177 | 0, // x8sub_3_then_sub_32 |
| 64178 | 0, // x8sub_3_then_sub_32_hi |
| 64179 | 0, // x8sub_2_then_sub_32 |
| 64180 | 0, // x8sub_2_then_sub_32_hi |
| 64181 | 0, // x8sub_1_then_sub_32 |
| 64182 | 0, // x8sub_1_then_sub_32_hi |
| 64183 | 0, // subo64_then_sub_32 |
| 64184 | 0, // subo64_then_sub_32_hi |
| 64185 | 225, // zsub1_then_zsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64186 | 0, // zsub3_then_zsub_hi |
| 64187 | 225, // zsub2_then_zsub_hi -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64188 | 0, // dsub0_dsub1 |
| 64189 | 0, // dsub0_dsub1_dsub2 |
| 64190 | 225, // dsub1_dsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64191 | 0, // dsub1_dsub2_dsub3 |
| 64192 | 0, // dsub2_dsub3 |
| 64193 | 225, // dsub_dsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64194 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64195 | 225, // dsub_dsub1_dsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64196 | 0, // qsub0_qsub1 |
| 64197 | 0, // qsub0_qsub1_qsub2 |
| 64198 | 225, // qsub1_qsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64199 | 0, // qsub1_qsub2_qsub3 |
| 64200 | 0, // qsub2_qsub3 |
| 64201 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64202 | 0, // x8sub_0_x8sub_1 |
| 64203 | 0, // x8sub_2_x8sub_3 |
| 64204 | 0, // x8sub_4_x8sub_5 |
| 64205 | 0, // x8sub_6_x8sub_7 |
| 64206 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64207 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64208 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64209 | 0, // sub_32_subo64_then_sub_32 |
| 64210 | 225, // zsub_qsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64211 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64212 | 225, // zsub_qsub1_qsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64213 | 225, // zsub0_zsub1 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64214 | 0, // zsub0_zsub1_zsub2 |
| 64215 | 225, // zsub1_zsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 64216 | 0, // zsub1_zsub2_zsub3 |
| 64217 | 0, // zsub2_zsub3 |
| 64218 | 0, // zsub0_zsub2 |
| 64219 | 0, // zsub1_zsub3 |
| 64220 | }, |
| 64221 | { // ZPR3_with_qsub2_in_FPR128_0to7 |
| 64222 | 226, // bsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64223 | 226, // bsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64224 | 226, // dsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64225 | 0, // dsub0 |
| 64226 | 226, // dsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64227 | 226, // dsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64228 | 0, // dsub3 |
| 64229 | 226, // dsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64230 | 226, // hsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64231 | 226, // hsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64232 | 0, // psub |
| 64233 | 0, // psub0 |
| 64234 | 0, // psub1 |
| 64235 | 0, // qsub0 |
| 64236 | 226, // qsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64237 | 226, // qsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64238 | 0, // qsub3 |
| 64239 | 226, // ssub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64240 | 226, // ssub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64241 | 0, // sub_32 |
| 64242 | 0, // sub_32_hi |
| 64243 | 0, // sube32 |
| 64244 | 0, // sube64 |
| 64245 | 0, // subo32 |
| 64246 | 0, // subo64 |
| 64247 | 0, // x8sub_0 |
| 64248 | 0, // x8sub_1 |
| 64249 | 0, // x8sub_2 |
| 64250 | 0, // x8sub_3 |
| 64251 | 0, // x8sub_4 |
| 64252 | 0, // x8sub_5 |
| 64253 | 0, // x8sub_6 |
| 64254 | 0, // x8sub_7 |
| 64255 | 0, // zasubb |
| 64256 | 0, // zasubd0 |
| 64257 | 0, // zasubd1 |
| 64258 | 0, // zasubh0 |
| 64259 | 0, // zasubh1 |
| 64260 | 0, // zasubq0 |
| 64261 | 0, // zasubq1 |
| 64262 | 0, // zasubs0 |
| 64263 | 0, // zasubs1 |
| 64264 | 226, // zsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64265 | 226, // zsub0 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64266 | 226, // zsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64267 | 226, // zsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64268 | 0, // zsub3 |
| 64269 | 226, // zsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64270 | 0, // zasubd1_then_zasubq0 |
| 64271 | 0, // zasubd1_then_zasubq1 |
| 64272 | 0, // zasubs1_then_zasubd0 |
| 64273 | 0, // zasubs1_then_zasubd1 |
| 64274 | 0, // zasubs1_then_zasubq0 |
| 64275 | 0, // zasubs1_then_zasubq1 |
| 64276 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64277 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64278 | 0, // zasubh1_then_zasubd0 |
| 64279 | 0, // zasubh1_then_zasubd1 |
| 64280 | 0, // zasubh1_then_zasubq0 |
| 64281 | 0, // zasubh1_then_zasubq1 |
| 64282 | 0, // zasubh1_then_zasubs0 |
| 64283 | 0, // zasubh1_then_zasubs1 |
| 64284 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64285 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64286 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64287 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64288 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64289 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64290 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64291 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64292 | 226, // dsub1_then_bsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64293 | 226, // dsub1_then_bsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64294 | 226, // dsub1_then_hsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64295 | 226, // dsub1_then_hsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64296 | 226, // dsub1_then_ssub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64297 | 226, // dsub1_then_ssub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64298 | 0, // dsub3_then_bsub |
| 64299 | 0, // dsub3_then_bsub_hi |
| 64300 | 0, // dsub3_then_hsub |
| 64301 | 0, // dsub3_then_hsub_hi |
| 64302 | 0, // dsub3_then_ssub |
| 64303 | 0, // dsub3_then_ssub_hi |
| 64304 | 226, // dsub2_then_bsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64305 | 226, // dsub2_then_bsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64306 | 226, // dsub2_then_hsub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64307 | 226, // dsub2_then_hsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64308 | 226, // dsub2_then_ssub -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64309 | 226, // dsub2_then_ssub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64310 | 0, // psub1_then_psub |
| 64311 | 226, // qsub1_then_dsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64312 | 0, // qsub3_then_dsub_hi |
| 64313 | 226, // qsub2_then_dsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64314 | 0, // x8sub_7_then_sub_32 |
| 64315 | 0, // x8sub_7_then_sub_32_hi |
| 64316 | 0, // x8sub_6_then_sub_32 |
| 64317 | 0, // x8sub_6_then_sub_32_hi |
| 64318 | 0, // x8sub_5_then_sub_32 |
| 64319 | 0, // x8sub_5_then_sub_32_hi |
| 64320 | 0, // x8sub_4_then_sub_32 |
| 64321 | 0, // x8sub_4_then_sub_32_hi |
| 64322 | 0, // x8sub_3_then_sub_32 |
| 64323 | 0, // x8sub_3_then_sub_32_hi |
| 64324 | 0, // x8sub_2_then_sub_32 |
| 64325 | 0, // x8sub_2_then_sub_32_hi |
| 64326 | 0, // x8sub_1_then_sub_32 |
| 64327 | 0, // x8sub_1_then_sub_32_hi |
| 64328 | 0, // subo64_then_sub_32 |
| 64329 | 0, // subo64_then_sub_32_hi |
| 64330 | 226, // zsub1_then_zsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64331 | 0, // zsub3_then_zsub_hi |
| 64332 | 226, // zsub2_then_zsub_hi -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64333 | 0, // dsub0_dsub1 |
| 64334 | 0, // dsub0_dsub1_dsub2 |
| 64335 | 226, // dsub1_dsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64336 | 0, // dsub1_dsub2_dsub3 |
| 64337 | 0, // dsub2_dsub3 |
| 64338 | 226, // dsub_dsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64339 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64340 | 226, // dsub_dsub1_dsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64341 | 0, // qsub0_qsub1 |
| 64342 | 0, // qsub0_qsub1_qsub2 |
| 64343 | 226, // qsub1_qsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64344 | 0, // qsub1_qsub2_qsub3 |
| 64345 | 0, // qsub2_qsub3 |
| 64346 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64347 | 0, // x8sub_0_x8sub_1 |
| 64348 | 0, // x8sub_2_x8sub_3 |
| 64349 | 0, // x8sub_4_x8sub_5 |
| 64350 | 0, // x8sub_6_x8sub_7 |
| 64351 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64352 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64353 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64354 | 0, // sub_32_subo64_then_sub_32 |
| 64355 | 226, // zsub_qsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64356 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64357 | 226, // zsub_qsub1_qsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64358 | 226, // zsub0_zsub1 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64359 | 0, // zsub0_zsub1_zsub2 |
| 64360 | 226, // zsub1_zsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 64361 | 0, // zsub1_zsub2_zsub3 |
| 64362 | 0, // zsub2_zsub3 |
| 64363 | 0, // zsub0_zsub2 |
| 64364 | 0, // zsub1_zsub3 |
| 64365 | }, |
| 64366 | { // ZPR3_with_zsub0_in_ZPRMul4 |
| 64367 | 227, // bsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64368 | 227, // bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64369 | 227, // dsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64370 | 0, // dsub0 |
| 64371 | 227, // dsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64372 | 227, // dsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64373 | 0, // dsub3 |
| 64374 | 227, // dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64375 | 227, // hsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64376 | 227, // hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64377 | 0, // psub |
| 64378 | 0, // psub0 |
| 64379 | 0, // psub1 |
| 64380 | 0, // qsub0 |
| 64381 | 227, // qsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64382 | 227, // qsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64383 | 0, // qsub3 |
| 64384 | 227, // ssub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64385 | 227, // ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64386 | 0, // sub_32 |
| 64387 | 0, // sub_32_hi |
| 64388 | 0, // sube32 |
| 64389 | 0, // sube64 |
| 64390 | 0, // subo32 |
| 64391 | 0, // subo64 |
| 64392 | 0, // x8sub_0 |
| 64393 | 0, // x8sub_1 |
| 64394 | 0, // x8sub_2 |
| 64395 | 0, // x8sub_3 |
| 64396 | 0, // x8sub_4 |
| 64397 | 0, // x8sub_5 |
| 64398 | 0, // x8sub_6 |
| 64399 | 0, // x8sub_7 |
| 64400 | 0, // zasubb |
| 64401 | 0, // zasubd0 |
| 64402 | 0, // zasubd1 |
| 64403 | 0, // zasubh0 |
| 64404 | 0, // zasubh1 |
| 64405 | 0, // zasubq0 |
| 64406 | 0, // zasubq1 |
| 64407 | 0, // zasubs0 |
| 64408 | 0, // zasubs1 |
| 64409 | 227, // zsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64410 | 227, // zsub0 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64411 | 227, // zsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64412 | 227, // zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64413 | 0, // zsub3 |
| 64414 | 227, // zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64415 | 0, // zasubd1_then_zasubq0 |
| 64416 | 0, // zasubd1_then_zasubq1 |
| 64417 | 0, // zasubs1_then_zasubd0 |
| 64418 | 0, // zasubs1_then_zasubd1 |
| 64419 | 0, // zasubs1_then_zasubq0 |
| 64420 | 0, // zasubs1_then_zasubq1 |
| 64421 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64422 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64423 | 0, // zasubh1_then_zasubd0 |
| 64424 | 0, // zasubh1_then_zasubd1 |
| 64425 | 0, // zasubh1_then_zasubq0 |
| 64426 | 0, // zasubh1_then_zasubq1 |
| 64427 | 0, // zasubh1_then_zasubs0 |
| 64428 | 0, // zasubh1_then_zasubs1 |
| 64429 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64430 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64431 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64432 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64433 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64434 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64435 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64436 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64437 | 227, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64438 | 227, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64439 | 227, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64440 | 227, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64441 | 227, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64442 | 227, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64443 | 0, // dsub3_then_bsub |
| 64444 | 0, // dsub3_then_bsub_hi |
| 64445 | 0, // dsub3_then_hsub |
| 64446 | 0, // dsub3_then_hsub_hi |
| 64447 | 0, // dsub3_then_ssub |
| 64448 | 0, // dsub3_then_ssub_hi |
| 64449 | 227, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64450 | 227, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64451 | 227, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64452 | 227, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64453 | 227, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64454 | 227, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64455 | 0, // psub1_then_psub |
| 64456 | 227, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64457 | 0, // qsub3_then_dsub_hi |
| 64458 | 227, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64459 | 0, // x8sub_7_then_sub_32 |
| 64460 | 0, // x8sub_7_then_sub_32_hi |
| 64461 | 0, // x8sub_6_then_sub_32 |
| 64462 | 0, // x8sub_6_then_sub_32_hi |
| 64463 | 0, // x8sub_5_then_sub_32 |
| 64464 | 0, // x8sub_5_then_sub_32_hi |
| 64465 | 0, // x8sub_4_then_sub_32 |
| 64466 | 0, // x8sub_4_then_sub_32_hi |
| 64467 | 0, // x8sub_3_then_sub_32 |
| 64468 | 0, // x8sub_3_then_sub_32_hi |
| 64469 | 0, // x8sub_2_then_sub_32 |
| 64470 | 0, // x8sub_2_then_sub_32_hi |
| 64471 | 0, // x8sub_1_then_sub_32 |
| 64472 | 0, // x8sub_1_then_sub_32_hi |
| 64473 | 0, // subo64_then_sub_32 |
| 64474 | 0, // subo64_then_sub_32_hi |
| 64475 | 227, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64476 | 0, // zsub3_then_zsub_hi |
| 64477 | 227, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64478 | 0, // dsub0_dsub1 |
| 64479 | 0, // dsub0_dsub1_dsub2 |
| 64480 | 227, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64481 | 0, // dsub1_dsub2_dsub3 |
| 64482 | 0, // dsub2_dsub3 |
| 64483 | 227, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64484 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64485 | 227, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64486 | 0, // qsub0_qsub1 |
| 64487 | 0, // qsub0_qsub1_qsub2 |
| 64488 | 227, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64489 | 0, // qsub1_qsub2_qsub3 |
| 64490 | 0, // qsub2_qsub3 |
| 64491 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64492 | 0, // x8sub_0_x8sub_1 |
| 64493 | 0, // x8sub_2_x8sub_3 |
| 64494 | 0, // x8sub_4_x8sub_5 |
| 64495 | 0, // x8sub_6_x8sub_7 |
| 64496 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64497 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64498 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64499 | 0, // sub_32_subo64_then_sub_32 |
| 64500 | 227, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64501 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64502 | 227, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64503 | 227, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64504 | 0, // zsub0_zsub1_zsub2 |
| 64505 | 227, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 64506 | 0, // zsub1_zsub2_zsub3 |
| 64507 | 0, // zsub2_zsub3 |
| 64508 | 0, // zsub0_zsub2 |
| 64509 | 0, // zsub1_zsub3 |
| 64510 | }, |
| 64511 | { // ZPR3_with_zsub0_in_ZPR_K |
| 64512 | 228, // bsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64513 | 228, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64514 | 228, // dsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64515 | 0, // dsub0 |
| 64516 | 228, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64517 | 228, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64518 | 0, // dsub3 |
| 64519 | 228, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64520 | 228, // hsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64521 | 228, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64522 | 0, // psub |
| 64523 | 0, // psub0 |
| 64524 | 0, // psub1 |
| 64525 | 0, // qsub0 |
| 64526 | 228, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64527 | 228, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64528 | 0, // qsub3 |
| 64529 | 228, // ssub -> ZPR3_with_zsub0_in_ZPR_K |
| 64530 | 228, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64531 | 0, // sub_32 |
| 64532 | 0, // sub_32_hi |
| 64533 | 0, // sube32 |
| 64534 | 0, // sube64 |
| 64535 | 0, // subo32 |
| 64536 | 0, // subo64 |
| 64537 | 0, // x8sub_0 |
| 64538 | 0, // x8sub_1 |
| 64539 | 0, // x8sub_2 |
| 64540 | 0, // x8sub_3 |
| 64541 | 0, // x8sub_4 |
| 64542 | 0, // x8sub_5 |
| 64543 | 0, // x8sub_6 |
| 64544 | 0, // x8sub_7 |
| 64545 | 0, // zasubb |
| 64546 | 0, // zasubd0 |
| 64547 | 0, // zasubd1 |
| 64548 | 0, // zasubh0 |
| 64549 | 0, // zasubh1 |
| 64550 | 0, // zasubq0 |
| 64551 | 0, // zasubq1 |
| 64552 | 0, // zasubs0 |
| 64553 | 0, // zasubs1 |
| 64554 | 228, // zsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64555 | 228, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K |
| 64556 | 228, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64557 | 228, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64558 | 0, // zsub3 |
| 64559 | 228, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64560 | 0, // zasubd1_then_zasubq0 |
| 64561 | 0, // zasubd1_then_zasubq1 |
| 64562 | 0, // zasubs1_then_zasubd0 |
| 64563 | 0, // zasubs1_then_zasubd1 |
| 64564 | 0, // zasubs1_then_zasubq0 |
| 64565 | 0, // zasubs1_then_zasubq1 |
| 64566 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64567 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64568 | 0, // zasubh1_then_zasubd0 |
| 64569 | 0, // zasubh1_then_zasubd1 |
| 64570 | 0, // zasubh1_then_zasubq0 |
| 64571 | 0, // zasubh1_then_zasubq1 |
| 64572 | 0, // zasubh1_then_zasubs0 |
| 64573 | 0, // zasubh1_then_zasubs1 |
| 64574 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64575 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64576 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64577 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64578 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64579 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64580 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64581 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64582 | 228, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64583 | 228, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64584 | 228, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64585 | 228, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64586 | 228, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K |
| 64587 | 228, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64588 | 0, // dsub3_then_bsub |
| 64589 | 0, // dsub3_then_bsub_hi |
| 64590 | 0, // dsub3_then_hsub |
| 64591 | 0, // dsub3_then_hsub_hi |
| 64592 | 0, // dsub3_then_ssub |
| 64593 | 0, // dsub3_then_ssub_hi |
| 64594 | 228, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64595 | 228, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64596 | 228, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K |
| 64597 | 228, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64598 | 228, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K |
| 64599 | 228, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64600 | 0, // psub1_then_psub |
| 64601 | 228, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64602 | 0, // qsub3_then_dsub_hi |
| 64603 | 228, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64604 | 0, // x8sub_7_then_sub_32 |
| 64605 | 0, // x8sub_7_then_sub_32_hi |
| 64606 | 0, // x8sub_6_then_sub_32 |
| 64607 | 0, // x8sub_6_then_sub_32_hi |
| 64608 | 0, // x8sub_5_then_sub_32 |
| 64609 | 0, // x8sub_5_then_sub_32_hi |
| 64610 | 0, // x8sub_4_then_sub_32 |
| 64611 | 0, // x8sub_4_then_sub_32_hi |
| 64612 | 0, // x8sub_3_then_sub_32 |
| 64613 | 0, // x8sub_3_then_sub_32_hi |
| 64614 | 0, // x8sub_2_then_sub_32 |
| 64615 | 0, // x8sub_2_then_sub_32_hi |
| 64616 | 0, // x8sub_1_then_sub_32 |
| 64617 | 0, // x8sub_1_then_sub_32_hi |
| 64618 | 0, // subo64_then_sub_32 |
| 64619 | 0, // subo64_then_sub_32_hi |
| 64620 | 228, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64621 | 0, // zsub3_then_zsub_hi |
| 64622 | 228, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K |
| 64623 | 0, // dsub0_dsub1 |
| 64624 | 0, // dsub0_dsub1_dsub2 |
| 64625 | 228, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64626 | 0, // dsub1_dsub2_dsub3 |
| 64627 | 0, // dsub2_dsub3 |
| 64628 | 228, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64629 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64630 | 228, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64631 | 0, // qsub0_qsub1 |
| 64632 | 0, // qsub0_qsub1_qsub2 |
| 64633 | 228, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64634 | 0, // qsub1_qsub2_qsub3 |
| 64635 | 0, // qsub2_qsub3 |
| 64636 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64637 | 0, // x8sub_0_x8sub_1 |
| 64638 | 0, // x8sub_2_x8sub_3 |
| 64639 | 0, // x8sub_4_x8sub_5 |
| 64640 | 0, // x8sub_6_x8sub_7 |
| 64641 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64642 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64643 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64644 | 0, // sub_32_subo64_then_sub_32 |
| 64645 | 228, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64646 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64647 | 228, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64648 | 228, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K |
| 64649 | 0, // zsub0_zsub1_zsub2 |
| 64650 | 228, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 64651 | 0, // zsub1_zsub2_zsub3 |
| 64652 | 0, // zsub2_zsub3 |
| 64653 | 0, // zsub0_zsub2 |
| 64654 | 0, // zsub1_zsub3 |
| 64655 | }, |
| 64656 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64657 | 229, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64658 | 229, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64659 | 229, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64660 | 0, // dsub0 |
| 64661 | 229, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64662 | 229, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64663 | 0, // dsub3 |
| 64664 | 229, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64665 | 229, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64666 | 229, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64667 | 0, // psub |
| 64668 | 0, // psub0 |
| 64669 | 0, // psub1 |
| 64670 | 0, // qsub0 |
| 64671 | 229, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64672 | 229, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64673 | 0, // qsub3 |
| 64674 | 229, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64675 | 229, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64676 | 0, // sub_32 |
| 64677 | 0, // sub_32_hi |
| 64678 | 0, // sube32 |
| 64679 | 0, // sube64 |
| 64680 | 0, // subo32 |
| 64681 | 0, // subo64 |
| 64682 | 0, // x8sub_0 |
| 64683 | 0, // x8sub_1 |
| 64684 | 0, // x8sub_2 |
| 64685 | 0, // x8sub_3 |
| 64686 | 0, // x8sub_4 |
| 64687 | 0, // x8sub_5 |
| 64688 | 0, // x8sub_6 |
| 64689 | 0, // x8sub_7 |
| 64690 | 0, // zasubb |
| 64691 | 0, // zasubd0 |
| 64692 | 0, // zasubd1 |
| 64693 | 0, // zasubh0 |
| 64694 | 0, // zasubh1 |
| 64695 | 0, // zasubq0 |
| 64696 | 0, // zasubq1 |
| 64697 | 0, // zasubs0 |
| 64698 | 0, // zasubs1 |
| 64699 | 229, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64700 | 229, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64701 | 229, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64702 | 229, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64703 | 0, // zsub3 |
| 64704 | 229, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64705 | 0, // zasubd1_then_zasubq0 |
| 64706 | 0, // zasubd1_then_zasubq1 |
| 64707 | 0, // zasubs1_then_zasubd0 |
| 64708 | 0, // zasubs1_then_zasubd1 |
| 64709 | 0, // zasubs1_then_zasubq0 |
| 64710 | 0, // zasubs1_then_zasubq1 |
| 64711 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64712 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64713 | 0, // zasubh1_then_zasubd0 |
| 64714 | 0, // zasubh1_then_zasubd1 |
| 64715 | 0, // zasubh1_then_zasubq0 |
| 64716 | 0, // zasubh1_then_zasubq1 |
| 64717 | 0, // zasubh1_then_zasubs0 |
| 64718 | 0, // zasubh1_then_zasubs1 |
| 64719 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64720 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64721 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64722 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64723 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64724 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64725 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64726 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64727 | 229, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64728 | 229, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64729 | 229, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64730 | 229, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64731 | 229, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64732 | 229, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64733 | 0, // dsub3_then_bsub |
| 64734 | 0, // dsub3_then_bsub_hi |
| 64735 | 0, // dsub3_then_hsub |
| 64736 | 0, // dsub3_then_hsub_hi |
| 64737 | 0, // dsub3_then_ssub |
| 64738 | 0, // dsub3_then_ssub_hi |
| 64739 | 229, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64740 | 229, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64741 | 229, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64742 | 229, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64743 | 229, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64744 | 229, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64745 | 0, // psub1_then_psub |
| 64746 | 229, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64747 | 0, // qsub3_then_dsub_hi |
| 64748 | 229, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64749 | 0, // x8sub_7_then_sub_32 |
| 64750 | 0, // x8sub_7_then_sub_32_hi |
| 64751 | 0, // x8sub_6_then_sub_32 |
| 64752 | 0, // x8sub_6_then_sub_32_hi |
| 64753 | 0, // x8sub_5_then_sub_32 |
| 64754 | 0, // x8sub_5_then_sub_32_hi |
| 64755 | 0, // x8sub_4_then_sub_32 |
| 64756 | 0, // x8sub_4_then_sub_32_hi |
| 64757 | 0, // x8sub_3_then_sub_32 |
| 64758 | 0, // x8sub_3_then_sub_32_hi |
| 64759 | 0, // x8sub_2_then_sub_32 |
| 64760 | 0, // x8sub_2_then_sub_32_hi |
| 64761 | 0, // x8sub_1_then_sub_32 |
| 64762 | 0, // x8sub_1_then_sub_32_hi |
| 64763 | 0, // subo64_then_sub_32 |
| 64764 | 0, // subo64_then_sub_32_hi |
| 64765 | 229, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64766 | 0, // zsub3_then_zsub_hi |
| 64767 | 229, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64768 | 0, // dsub0_dsub1 |
| 64769 | 0, // dsub0_dsub1_dsub2 |
| 64770 | 229, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64771 | 0, // dsub1_dsub2_dsub3 |
| 64772 | 0, // dsub2_dsub3 |
| 64773 | 229, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64774 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64775 | 229, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64776 | 0, // qsub0_qsub1 |
| 64777 | 0, // qsub0_qsub1_qsub2 |
| 64778 | 229, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64779 | 0, // qsub1_qsub2_qsub3 |
| 64780 | 0, // qsub2_qsub3 |
| 64781 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64782 | 0, // x8sub_0_x8sub_1 |
| 64783 | 0, // x8sub_2_x8sub_3 |
| 64784 | 0, // x8sub_4_x8sub_5 |
| 64785 | 0, // x8sub_6_x8sub_7 |
| 64786 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64787 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64788 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64789 | 0, // sub_32_subo64_then_sub_32 |
| 64790 | 229, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64791 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64792 | 229, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64793 | 229, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64794 | 0, // zsub0_zsub1_zsub2 |
| 64795 | 229, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 64796 | 0, // zsub1_zsub2_zsub3 |
| 64797 | 0, // zsub2_zsub3 |
| 64798 | 0, // zsub0_zsub2 |
| 64799 | 0, // zsub1_zsub3 |
| 64800 | }, |
| 64801 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64802 | 230, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64803 | 230, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64804 | 230, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64805 | 0, // dsub0 |
| 64806 | 230, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64807 | 230, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64808 | 0, // dsub3 |
| 64809 | 230, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64810 | 230, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64811 | 230, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64812 | 0, // psub |
| 64813 | 0, // psub0 |
| 64814 | 0, // psub1 |
| 64815 | 0, // qsub0 |
| 64816 | 230, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64817 | 230, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64818 | 0, // qsub3 |
| 64819 | 230, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64820 | 230, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64821 | 0, // sub_32 |
| 64822 | 0, // sub_32_hi |
| 64823 | 0, // sube32 |
| 64824 | 0, // sube64 |
| 64825 | 0, // subo32 |
| 64826 | 0, // subo64 |
| 64827 | 0, // x8sub_0 |
| 64828 | 0, // x8sub_1 |
| 64829 | 0, // x8sub_2 |
| 64830 | 0, // x8sub_3 |
| 64831 | 0, // x8sub_4 |
| 64832 | 0, // x8sub_5 |
| 64833 | 0, // x8sub_6 |
| 64834 | 0, // x8sub_7 |
| 64835 | 0, // zasubb |
| 64836 | 0, // zasubd0 |
| 64837 | 0, // zasubd1 |
| 64838 | 0, // zasubh0 |
| 64839 | 0, // zasubh1 |
| 64840 | 0, // zasubq0 |
| 64841 | 0, // zasubq1 |
| 64842 | 0, // zasubs0 |
| 64843 | 0, // zasubs1 |
| 64844 | 230, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64845 | 230, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64846 | 230, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64847 | 230, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64848 | 0, // zsub3 |
| 64849 | 230, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64850 | 0, // zasubd1_then_zasubq0 |
| 64851 | 0, // zasubd1_then_zasubq1 |
| 64852 | 0, // zasubs1_then_zasubd0 |
| 64853 | 0, // zasubs1_then_zasubd1 |
| 64854 | 0, // zasubs1_then_zasubq0 |
| 64855 | 0, // zasubs1_then_zasubq1 |
| 64856 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 64857 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 64858 | 0, // zasubh1_then_zasubd0 |
| 64859 | 0, // zasubh1_then_zasubd1 |
| 64860 | 0, // zasubh1_then_zasubq0 |
| 64861 | 0, // zasubh1_then_zasubq1 |
| 64862 | 0, // zasubh1_then_zasubs0 |
| 64863 | 0, // zasubh1_then_zasubs1 |
| 64864 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 64865 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 64866 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 64867 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 64868 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 64869 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 64870 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 64871 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 64872 | 230, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64873 | 230, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64874 | 230, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64875 | 230, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64876 | 230, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64877 | 230, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64878 | 0, // dsub3_then_bsub |
| 64879 | 0, // dsub3_then_bsub_hi |
| 64880 | 0, // dsub3_then_hsub |
| 64881 | 0, // dsub3_then_hsub_hi |
| 64882 | 0, // dsub3_then_ssub |
| 64883 | 0, // dsub3_then_ssub_hi |
| 64884 | 230, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64885 | 230, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64886 | 230, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64887 | 230, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64888 | 230, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64889 | 230, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64890 | 0, // psub1_then_psub |
| 64891 | 230, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64892 | 0, // qsub3_then_dsub_hi |
| 64893 | 230, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64894 | 0, // x8sub_7_then_sub_32 |
| 64895 | 0, // x8sub_7_then_sub_32_hi |
| 64896 | 0, // x8sub_6_then_sub_32 |
| 64897 | 0, // x8sub_6_then_sub_32_hi |
| 64898 | 0, // x8sub_5_then_sub_32 |
| 64899 | 0, // x8sub_5_then_sub_32_hi |
| 64900 | 0, // x8sub_4_then_sub_32 |
| 64901 | 0, // x8sub_4_then_sub_32_hi |
| 64902 | 0, // x8sub_3_then_sub_32 |
| 64903 | 0, // x8sub_3_then_sub_32_hi |
| 64904 | 0, // x8sub_2_then_sub_32 |
| 64905 | 0, // x8sub_2_then_sub_32_hi |
| 64906 | 0, // x8sub_1_then_sub_32 |
| 64907 | 0, // x8sub_1_then_sub_32_hi |
| 64908 | 0, // subo64_then_sub_32 |
| 64909 | 0, // subo64_then_sub_32_hi |
| 64910 | 230, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64911 | 0, // zsub3_then_zsub_hi |
| 64912 | 230, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64913 | 0, // dsub0_dsub1 |
| 64914 | 0, // dsub0_dsub1_dsub2 |
| 64915 | 230, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64916 | 0, // dsub1_dsub2_dsub3 |
| 64917 | 0, // dsub2_dsub3 |
| 64918 | 230, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64919 | 0, // dsub_dsub1_dsub2_dsub3 |
| 64920 | 230, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64921 | 0, // qsub0_qsub1 |
| 64922 | 0, // qsub0_qsub1_qsub2 |
| 64923 | 230, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64924 | 0, // qsub1_qsub2_qsub3 |
| 64925 | 0, // qsub2_qsub3 |
| 64926 | 0, // sub_32_x8sub_1_then_sub_32 |
| 64927 | 0, // x8sub_0_x8sub_1 |
| 64928 | 0, // x8sub_2_x8sub_3 |
| 64929 | 0, // x8sub_4_x8sub_5 |
| 64930 | 0, // x8sub_6_x8sub_7 |
| 64931 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 64932 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 64933 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 64934 | 0, // sub_32_subo64_then_sub_32 |
| 64935 | 230, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64936 | 0, // zsub_qsub1_qsub2_qsub3 |
| 64937 | 230, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64938 | 230, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64939 | 0, // zsub0_zsub1_zsub2 |
| 64940 | 230, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 64941 | 0, // zsub1_zsub2_zsub3 |
| 64942 | 0, // zsub2_zsub3 |
| 64943 | 0, // zsub0_zsub2 |
| 64944 | 0, // zsub1_zsub3 |
| 64945 | }, |
| 64946 | { // ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64947 | 231, // bsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64948 | 231, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64949 | 231, // dsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64950 | 0, // dsub0 |
| 64951 | 231, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64952 | 231, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64953 | 0, // dsub3 |
| 64954 | 231, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64955 | 231, // hsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64956 | 231, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64957 | 0, // psub |
| 64958 | 0, // psub0 |
| 64959 | 0, // psub1 |
| 64960 | 0, // qsub0 |
| 64961 | 231, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64962 | 231, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64963 | 0, // qsub3 |
| 64964 | 231, // ssub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64965 | 231, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64966 | 0, // sub_32 |
| 64967 | 0, // sub_32_hi |
| 64968 | 0, // sube32 |
| 64969 | 0, // sube64 |
| 64970 | 0, // subo32 |
| 64971 | 0, // subo64 |
| 64972 | 0, // x8sub_0 |
| 64973 | 0, // x8sub_1 |
| 64974 | 0, // x8sub_2 |
| 64975 | 0, // x8sub_3 |
| 64976 | 0, // x8sub_4 |
| 64977 | 0, // x8sub_5 |
| 64978 | 0, // x8sub_6 |
| 64979 | 0, // x8sub_7 |
| 64980 | 0, // zasubb |
| 64981 | 0, // zasubd0 |
| 64982 | 0, // zasubd1 |
| 64983 | 0, // zasubh0 |
| 64984 | 0, // zasubh1 |
| 64985 | 0, // zasubq0 |
| 64986 | 0, // zasubq1 |
| 64987 | 0, // zasubs0 |
| 64988 | 0, // zasubs1 |
| 64989 | 231, // zsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64990 | 231, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64991 | 231, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64992 | 231, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64993 | 0, // zsub3 |
| 64994 | 231, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 64995 | 0, // zasubd1_then_zasubq0 |
| 64996 | 0, // zasubd1_then_zasubq1 |
| 64997 | 0, // zasubs1_then_zasubd0 |
| 64998 | 0, // zasubs1_then_zasubd1 |
| 64999 | 0, // zasubs1_then_zasubq0 |
| 65000 | 0, // zasubs1_then_zasubq1 |
| 65001 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65002 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65003 | 0, // zasubh1_then_zasubd0 |
| 65004 | 0, // zasubh1_then_zasubd1 |
| 65005 | 0, // zasubh1_then_zasubq0 |
| 65006 | 0, // zasubh1_then_zasubq1 |
| 65007 | 0, // zasubh1_then_zasubs0 |
| 65008 | 0, // zasubh1_then_zasubs1 |
| 65009 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65010 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65011 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65012 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65013 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65014 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65015 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65016 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65017 | 231, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65018 | 231, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65019 | 231, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65020 | 231, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65021 | 231, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65022 | 231, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65023 | 0, // dsub3_then_bsub |
| 65024 | 0, // dsub3_then_bsub_hi |
| 65025 | 0, // dsub3_then_hsub |
| 65026 | 0, // dsub3_then_hsub_hi |
| 65027 | 0, // dsub3_then_ssub |
| 65028 | 0, // dsub3_then_ssub_hi |
| 65029 | 231, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65030 | 231, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65031 | 231, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65032 | 231, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65033 | 231, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65034 | 231, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65035 | 0, // psub1_then_psub |
| 65036 | 231, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65037 | 0, // qsub3_then_dsub_hi |
| 65038 | 231, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65039 | 0, // x8sub_7_then_sub_32 |
| 65040 | 0, // x8sub_7_then_sub_32_hi |
| 65041 | 0, // x8sub_6_then_sub_32 |
| 65042 | 0, // x8sub_6_then_sub_32_hi |
| 65043 | 0, // x8sub_5_then_sub_32 |
| 65044 | 0, // x8sub_5_then_sub_32_hi |
| 65045 | 0, // x8sub_4_then_sub_32 |
| 65046 | 0, // x8sub_4_then_sub_32_hi |
| 65047 | 0, // x8sub_3_then_sub_32 |
| 65048 | 0, // x8sub_3_then_sub_32_hi |
| 65049 | 0, // x8sub_2_then_sub_32 |
| 65050 | 0, // x8sub_2_then_sub_32_hi |
| 65051 | 0, // x8sub_1_then_sub_32 |
| 65052 | 0, // x8sub_1_then_sub_32_hi |
| 65053 | 0, // subo64_then_sub_32 |
| 65054 | 0, // subo64_then_sub_32_hi |
| 65055 | 231, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65056 | 0, // zsub3_then_zsub_hi |
| 65057 | 231, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65058 | 0, // dsub0_dsub1 |
| 65059 | 0, // dsub0_dsub1_dsub2 |
| 65060 | 231, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65061 | 0, // dsub1_dsub2_dsub3 |
| 65062 | 0, // dsub2_dsub3 |
| 65063 | 231, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65064 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65065 | 231, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65066 | 0, // qsub0_qsub1 |
| 65067 | 0, // qsub0_qsub1_qsub2 |
| 65068 | 231, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65069 | 0, // qsub1_qsub2_qsub3 |
| 65070 | 0, // qsub2_qsub3 |
| 65071 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65072 | 0, // x8sub_0_x8sub_1 |
| 65073 | 0, // x8sub_2_x8sub_3 |
| 65074 | 0, // x8sub_4_x8sub_5 |
| 65075 | 0, // x8sub_6_x8sub_7 |
| 65076 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65077 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65078 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65079 | 0, // sub_32_subo64_then_sub_32 |
| 65080 | 231, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65081 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65082 | 231, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65083 | 231, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65084 | 0, // zsub0_zsub1_zsub2 |
| 65085 | 231, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 65086 | 0, // zsub1_zsub2_zsub3 |
| 65087 | 0, // zsub2_zsub3 |
| 65088 | 0, // zsub0_zsub2 |
| 65089 | 0, // zsub1_zsub3 |
| 65090 | }, |
| 65091 | { // ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65092 | 232, // bsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65093 | 232, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65094 | 232, // dsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65095 | 0, // dsub0 |
| 65096 | 232, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65097 | 232, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65098 | 0, // dsub3 |
| 65099 | 232, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65100 | 232, // hsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65101 | 232, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65102 | 0, // psub |
| 65103 | 0, // psub0 |
| 65104 | 0, // psub1 |
| 65105 | 0, // qsub0 |
| 65106 | 232, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65107 | 232, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65108 | 0, // qsub3 |
| 65109 | 232, // ssub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65110 | 232, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65111 | 0, // sub_32 |
| 65112 | 0, // sub_32_hi |
| 65113 | 0, // sube32 |
| 65114 | 0, // sube64 |
| 65115 | 0, // subo32 |
| 65116 | 0, // subo64 |
| 65117 | 0, // x8sub_0 |
| 65118 | 0, // x8sub_1 |
| 65119 | 0, // x8sub_2 |
| 65120 | 0, // x8sub_3 |
| 65121 | 0, // x8sub_4 |
| 65122 | 0, // x8sub_5 |
| 65123 | 0, // x8sub_6 |
| 65124 | 0, // x8sub_7 |
| 65125 | 0, // zasubb |
| 65126 | 0, // zasubd0 |
| 65127 | 0, // zasubd1 |
| 65128 | 0, // zasubh0 |
| 65129 | 0, // zasubh1 |
| 65130 | 0, // zasubq0 |
| 65131 | 0, // zasubq1 |
| 65132 | 0, // zasubs0 |
| 65133 | 0, // zasubs1 |
| 65134 | 232, // zsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65135 | 232, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65136 | 232, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65137 | 232, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65138 | 0, // zsub3 |
| 65139 | 232, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65140 | 0, // zasubd1_then_zasubq0 |
| 65141 | 0, // zasubd1_then_zasubq1 |
| 65142 | 0, // zasubs1_then_zasubd0 |
| 65143 | 0, // zasubs1_then_zasubd1 |
| 65144 | 0, // zasubs1_then_zasubq0 |
| 65145 | 0, // zasubs1_then_zasubq1 |
| 65146 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65147 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65148 | 0, // zasubh1_then_zasubd0 |
| 65149 | 0, // zasubh1_then_zasubd1 |
| 65150 | 0, // zasubh1_then_zasubq0 |
| 65151 | 0, // zasubh1_then_zasubq1 |
| 65152 | 0, // zasubh1_then_zasubs0 |
| 65153 | 0, // zasubh1_then_zasubs1 |
| 65154 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65155 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65156 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65157 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65158 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65159 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65160 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65161 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65162 | 232, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65163 | 232, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65164 | 232, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65165 | 232, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65166 | 232, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65167 | 232, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65168 | 0, // dsub3_then_bsub |
| 65169 | 0, // dsub3_then_bsub_hi |
| 65170 | 0, // dsub3_then_hsub |
| 65171 | 0, // dsub3_then_hsub_hi |
| 65172 | 0, // dsub3_then_ssub |
| 65173 | 0, // dsub3_then_ssub_hi |
| 65174 | 232, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65175 | 232, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65176 | 232, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65177 | 232, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65178 | 232, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65179 | 232, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65180 | 0, // psub1_then_psub |
| 65181 | 232, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65182 | 0, // qsub3_then_dsub_hi |
| 65183 | 232, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65184 | 0, // x8sub_7_then_sub_32 |
| 65185 | 0, // x8sub_7_then_sub_32_hi |
| 65186 | 0, // x8sub_6_then_sub_32 |
| 65187 | 0, // x8sub_6_then_sub_32_hi |
| 65188 | 0, // x8sub_5_then_sub_32 |
| 65189 | 0, // x8sub_5_then_sub_32_hi |
| 65190 | 0, // x8sub_4_then_sub_32 |
| 65191 | 0, // x8sub_4_then_sub_32_hi |
| 65192 | 0, // x8sub_3_then_sub_32 |
| 65193 | 0, // x8sub_3_then_sub_32_hi |
| 65194 | 0, // x8sub_2_then_sub_32 |
| 65195 | 0, // x8sub_2_then_sub_32_hi |
| 65196 | 0, // x8sub_1_then_sub_32 |
| 65197 | 0, // x8sub_1_then_sub_32_hi |
| 65198 | 0, // subo64_then_sub_32 |
| 65199 | 0, // subo64_then_sub_32_hi |
| 65200 | 232, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65201 | 0, // zsub3_then_zsub_hi |
| 65202 | 232, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65203 | 0, // dsub0_dsub1 |
| 65204 | 0, // dsub0_dsub1_dsub2 |
| 65205 | 232, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65206 | 0, // dsub1_dsub2_dsub3 |
| 65207 | 0, // dsub2_dsub3 |
| 65208 | 232, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65209 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65210 | 232, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65211 | 0, // qsub0_qsub1 |
| 65212 | 0, // qsub0_qsub1_qsub2 |
| 65213 | 232, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65214 | 0, // qsub1_qsub2_qsub3 |
| 65215 | 0, // qsub2_qsub3 |
| 65216 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65217 | 0, // x8sub_0_x8sub_1 |
| 65218 | 0, // x8sub_2_x8sub_3 |
| 65219 | 0, // x8sub_4_x8sub_5 |
| 65220 | 0, // x8sub_6_x8sub_7 |
| 65221 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65222 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65223 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65224 | 0, // sub_32_subo64_then_sub_32 |
| 65225 | 232, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65226 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65227 | 232, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65228 | 232, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65229 | 0, // zsub0_zsub1_zsub2 |
| 65230 | 232, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 65231 | 0, // zsub1_zsub2_zsub3 |
| 65232 | 0, // zsub2_zsub3 |
| 65233 | 0, // zsub0_zsub2 |
| 65234 | 0, // zsub1_zsub3 |
| 65235 | }, |
| 65236 | { // ZPR3_with_zsub1_in_ZPRMul4 |
| 65237 | 233, // bsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65238 | 233, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65239 | 233, // dsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65240 | 0, // dsub0 |
| 65241 | 233, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65242 | 233, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65243 | 0, // dsub3 |
| 65244 | 233, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65245 | 233, // hsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65246 | 233, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65247 | 0, // psub |
| 65248 | 0, // psub0 |
| 65249 | 0, // psub1 |
| 65250 | 0, // qsub0 |
| 65251 | 233, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65252 | 233, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65253 | 0, // qsub3 |
| 65254 | 233, // ssub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65255 | 233, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65256 | 0, // sub_32 |
| 65257 | 0, // sub_32_hi |
| 65258 | 0, // sube32 |
| 65259 | 0, // sube64 |
| 65260 | 0, // subo32 |
| 65261 | 0, // subo64 |
| 65262 | 0, // x8sub_0 |
| 65263 | 0, // x8sub_1 |
| 65264 | 0, // x8sub_2 |
| 65265 | 0, // x8sub_3 |
| 65266 | 0, // x8sub_4 |
| 65267 | 0, // x8sub_5 |
| 65268 | 0, // x8sub_6 |
| 65269 | 0, // x8sub_7 |
| 65270 | 0, // zasubb |
| 65271 | 0, // zasubd0 |
| 65272 | 0, // zasubd1 |
| 65273 | 0, // zasubh0 |
| 65274 | 0, // zasubh1 |
| 65275 | 0, // zasubq0 |
| 65276 | 0, // zasubq1 |
| 65277 | 0, // zasubs0 |
| 65278 | 0, // zasubs1 |
| 65279 | 233, // zsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65280 | 233, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65281 | 233, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65282 | 233, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65283 | 0, // zsub3 |
| 65284 | 233, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65285 | 0, // zasubd1_then_zasubq0 |
| 65286 | 0, // zasubd1_then_zasubq1 |
| 65287 | 0, // zasubs1_then_zasubd0 |
| 65288 | 0, // zasubs1_then_zasubd1 |
| 65289 | 0, // zasubs1_then_zasubq0 |
| 65290 | 0, // zasubs1_then_zasubq1 |
| 65291 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65292 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65293 | 0, // zasubh1_then_zasubd0 |
| 65294 | 0, // zasubh1_then_zasubd1 |
| 65295 | 0, // zasubh1_then_zasubq0 |
| 65296 | 0, // zasubh1_then_zasubq1 |
| 65297 | 0, // zasubh1_then_zasubs0 |
| 65298 | 0, // zasubh1_then_zasubs1 |
| 65299 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65300 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65301 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65302 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65303 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65304 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65305 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65306 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65307 | 233, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65308 | 233, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65309 | 233, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65310 | 233, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65311 | 233, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65312 | 233, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65313 | 0, // dsub3_then_bsub |
| 65314 | 0, // dsub3_then_bsub_hi |
| 65315 | 0, // dsub3_then_hsub |
| 65316 | 0, // dsub3_then_hsub_hi |
| 65317 | 0, // dsub3_then_ssub |
| 65318 | 0, // dsub3_then_ssub_hi |
| 65319 | 233, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65320 | 233, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65321 | 233, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65322 | 233, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65323 | 233, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65324 | 233, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65325 | 0, // psub1_then_psub |
| 65326 | 233, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65327 | 0, // qsub3_then_dsub_hi |
| 65328 | 233, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65329 | 0, // x8sub_7_then_sub_32 |
| 65330 | 0, // x8sub_7_then_sub_32_hi |
| 65331 | 0, // x8sub_6_then_sub_32 |
| 65332 | 0, // x8sub_6_then_sub_32_hi |
| 65333 | 0, // x8sub_5_then_sub_32 |
| 65334 | 0, // x8sub_5_then_sub_32_hi |
| 65335 | 0, // x8sub_4_then_sub_32 |
| 65336 | 0, // x8sub_4_then_sub_32_hi |
| 65337 | 0, // x8sub_3_then_sub_32 |
| 65338 | 0, // x8sub_3_then_sub_32_hi |
| 65339 | 0, // x8sub_2_then_sub_32 |
| 65340 | 0, // x8sub_2_then_sub_32_hi |
| 65341 | 0, // x8sub_1_then_sub_32 |
| 65342 | 0, // x8sub_1_then_sub_32_hi |
| 65343 | 0, // subo64_then_sub_32 |
| 65344 | 0, // subo64_then_sub_32_hi |
| 65345 | 233, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65346 | 0, // zsub3_then_zsub_hi |
| 65347 | 233, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65348 | 0, // dsub0_dsub1 |
| 65349 | 0, // dsub0_dsub1_dsub2 |
| 65350 | 233, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65351 | 0, // dsub1_dsub2_dsub3 |
| 65352 | 0, // dsub2_dsub3 |
| 65353 | 233, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65354 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65355 | 233, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65356 | 0, // qsub0_qsub1 |
| 65357 | 0, // qsub0_qsub1_qsub2 |
| 65358 | 233, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65359 | 0, // qsub1_qsub2_qsub3 |
| 65360 | 0, // qsub2_qsub3 |
| 65361 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65362 | 0, // x8sub_0_x8sub_1 |
| 65363 | 0, // x8sub_2_x8sub_3 |
| 65364 | 0, // x8sub_4_x8sub_5 |
| 65365 | 0, // x8sub_6_x8sub_7 |
| 65366 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65367 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65368 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65369 | 0, // sub_32_subo64_then_sub_32 |
| 65370 | 233, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65371 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65372 | 233, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65373 | 233, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65374 | 0, // zsub0_zsub1_zsub2 |
| 65375 | 233, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 65376 | 0, // zsub1_zsub2_zsub3 |
| 65377 | 0, // zsub2_zsub3 |
| 65378 | 0, // zsub0_zsub2 |
| 65379 | 0, // zsub1_zsub3 |
| 65380 | }, |
| 65381 | { // ZPR3_with_zsub1_in_ZPR_K |
| 65382 | 234, // bsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65383 | 234, // bsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65384 | 234, // dsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65385 | 0, // dsub0 |
| 65386 | 234, // dsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65387 | 234, // dsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65388 | 0, // dsub3 |
| 65389 | 234, // dsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65390 | 234, // hsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65391 | 234, // hsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65392 | 0, // psub |
| 65393 | 0, // psub0 |
| 65394 | 0, // psub1 |
| 65395 | 0, // qsub0 |
| 65396 | 234, // qsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65397 | 234, // qsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65398 | 0, // qsub3 |
| 65399 | 234, // ssub -> ZPR3_with_zsub1_in_ZPR_K |
| 65400 | 234, // ssub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65401 | 0, // sub_32 |
| 65402 | 0, // sub_32_hi |
| 65403 | 0, // sube32 |
| 65404 | 0, // sube64 |
| 65405 | 0, // subo32 |
| 65406 | 0, // subo64 |
| 65407 | 0, // x8sub_0 |
| 65408 | 0, // x8sub_1 |
| 65409 | 0, // x8sub_2 |
| 65410 | 0, // x8sub_3 |
| 65411 | 0, // x8sub_4 |
| 65412 | 0, // x8sub_5 |
| 65413 | 0, // x8sub_6 |
| 65414 | 0, // x8sub_7 |
| 65415 | 0, // zasubb |
| 65416 | 0, // zasubd0 |
| 65417 | 0, // zasubd1 |
| 65418 | 0, // zasubh0 |
| 65419 | 0, // zasubh1 |
| 65420 | 0, // zasubq0 |
| 65421 | 0, // zasubq1 |
| 65422 | 0, // zasubs0 |
| 65423 | 0, // zasubs1 |
| 65424 | 234, // zsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65425 | 234, // zsub0 -> ZPR3_with_zsub1_in_ZPR_K |
| 65426 | 234, // zsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65427 | 234, // zsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65428 | 0, // zsub3 |
| 65429 | 234, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65430 | 0, // zasubd1_then_zasubq0 |
| 65431 | 0, // zasubd1_then_zasubq1 |
| 65432 | 0, // zasubs1_then_zasubd0 |
| 65433 | 0, // zasubs1_then_zasubd1 |
| 65434 | 0, // zasubs1_then_zasubq0 |
| 65435 | 0, // zasubs1_then_zasubq1 |
| 65436 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65437 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65438 | 0, // zasubh1_then_zasubd0 |
| 65439 | 0, // zasubh1_then_zasubd1 |
| 65440 | 0, // zasubh1_then_zasubq0 |
| 65441 | 0, // zasubh1_then_zasubq1 |
| 65442 | 0, // zasubh1_then_zasubs0 |
| 65443 | 0, // zasubh1_then_zasubs1 |
| 65444 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65445 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65446 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65447 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65448 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65449 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65450 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65451 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65452 | 234, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65453 | 234, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65454 | 234, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65455 | 234, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65456 | 234, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_K |
| 65457 | 234, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65458 | 0, // dsub3_then_bsub |
| 65459 | 0, // dsub3_then_bsub_hi |
| 65460 | 0, // dsub3_then_hsub |
| 65461 | 0, // dsub3_then_hsub_hi |
| 65462 | 0, // dsub3_then_ssub |
| 65463 | 0, // dsub3_then_ssub_hi |
| 65464 | 234, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65465 | 234, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65466 | 234, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_K |
| 65467 | 234, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65468 | 234, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_K |
| 65469 | 234, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65470 | 0, // psub1_then_psub |
| 65471 | 234, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65472 | 0, // qsub3_then_dsub_hi |
| 65473 | 234, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65474 | 0, // x8sub_7_then_sub_32 |
| 65475 | 0, // x8sub_7_then_sub_32_hi |
| 65476 | 0, // x8sub_6_then_sub_32 |
| 65477 | 0, // x8sub_6_then_sub_32_hi |
| 65478 | 0, // x8sub_5_then_sub_32 |
| 65479 | 0, // x8sub_5_then_sub_32_hi |
| 65480 | 0, // x8sub_4_then_sub_32 |
| 65481 | 0, // x8sub_4_then_sub_32_hi |
| 65482 | 0, // x8sub_3_then_sub_32 |
| 65483 | 0, // x8sub_3_then_sub_32_hi |
| 65484 | 0, // x8sub_2_then_sub_32 |
| 65485 | 0, // x8sub_2_then_sub_32_hi |
| 65486 | 0, // x8sub_1_then_sub_32 |
| 65487 | 0, // x8sub_1_then_sub_32_hi |
| 65488 | 0, // subo64_then_sub_32 |
| 65489 | 0, // subo64_then_sub_32_hi |
| 65490 | 234, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65491 | 0, // zsub3_then_zsub_hi |
| 65492 | 234, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_K |
| 65493 | 0, // dsub0_dsub1 |
| 65494 | 0, // dsub0_dsub1_dsub2 |
| 65495 | 234, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65496 | 0, // dsub1_dsub2_dsub3 |
| 65497 | 0, // dsub2_dsub3 |
| 65498 | 234, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65499 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65500 | 234, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65501 | 0, // qsub0_qsub1 |
| 65502 | 0, // qsub0_qsub1_qsub2 |
| 65503 | 234, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65504 | 0, // qsub1_qsub2_qsub3 |
| 65505 | 0, // qsub2_qsub3 |
| 65506 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65507 | 0, // x8sub_0_x8sub_1 |
| 65508 | 0, // x8sub_2_x8sub_3 |
| 65509 | 0, // x8sub_4_x8sub_5 |
| 65510 | 0, // x8sub_6_x8sub_7 |
| 65511 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65512 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65513 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65514 | 0, // sub_32_subo64_then_sub_32 |
| 65515 | 234, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65516 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65517 | 234, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65518 | 234, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_K |
| 65519 | 0, // zsub0_zsub1_zsub2 |
| 65520 | 234, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 65521 | 0, // zsub1_zsub2_zsub3 |
| 65522 | 0, // zsub2_zsub3 |
| 65523 | 0, // zsub0_zsub2 |
| 65524 | 0, // zsub1_zsub3 |
| 65525 | }, |
| 65526 | { // ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65527 | 235, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65528 | 235, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65529 | 235, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65530 | 0, // dsub0 |
| 65531 | 235, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65532 | 235, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65533 | 0, // dsub3 |
| 65534 | 235, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65535 | 235, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65536 | 235, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65537 | 0, // psub |
| 65538 | 0, // psub0 |
| 65539 | 0, // psub1 |
| 65540 | 0, // qsub0 |
| 65541 | 235, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65542 | 235, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65543 | 0, // qsub3 |
| 65544 | 235, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65545 | 235, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65546 | 0, // sub_32 |
| 65547 | 0, // sub_32_hi |
| 65548 | 0, // sube32 |
| 65549 | 0, // sube64 |
| 65550 | 0, // subo32 |
| 65551 | 0, // subo64 |
| 65552 | 0, // x8sub_0 |
| 65553 | 0, // x8sub_1 |
| 65554 | 0, // x8sub_2 |
| 65555 | 0, // x8sub_3 |
| 65556 | 0, // x8sub_4 |
| 65557 | 0, // x8sub_5 |
| 65558 | 0, // x8sub_6 |
| 65559 | 0, // x8sub_7 |
| 65560 | 0, // zasubb |
| 65561 | 0, // zasubd0 |
| 65562 | 0, // zasubd1 |
| 65563 | 0, // zasubh0 |
| 65564 | 0, // zasubh1 |
| 65565 | 0, // zasubq0 |
| 65566 | 0, // zasubq1 |
| 65567 | 0, // zasubs0 |
| 65568 | 0, // zasubs1 |
| 65569 | 235, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65570 | 235, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65571 | 235, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65572 | 235, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65573 | 0, // zsub3 |
| 65574 | 235, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65575 | 0, // zasubd1_then_zasubq0 |
| 65576 | 0, // zasubd1_then_zasubq1 |
| 65577 | 0, // zasubs1_then_zasubd0 |
| 65578 | 0, // zasubs1_then_zasubd1 |
| 65579 | 0, // zasubs1_then_zasubq0 |
| 65580 | 0, // zasubs1_then_zasubq1 |
| 65581 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65582 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65583 | 0, // zasubh1_then_zasubd0 |
| 65584 | 0, // zasubh1_then_zasubd1 |
| 65585 | 0, // zasubh1_then_zasubq0 |
| 65586 | 0, // zasubh1_then_zasubq1 |
| 65587 | 0, // zasubh1_then_zasubs0 |
| 65588 | 0, // zasubh1_then_zasubs1 |
| 65589 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65590 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65591 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65592 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65593 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65594 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65595 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65596 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65597 | 235, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65598 | 235, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65599 | 235, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65600 | 235, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65601 | 235, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65602 | 235, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65603 | 0, // dsub3_then_bsub |
| 65604 | 0, // dsub3_then_bsub_hi |
| 65605 | 0, // dsub3_then_hsub |
| 65606 | 0, // dsub3_then_hsub_hi |
| 65607 | 0, // dsub3_then_ssub |
| 65608 | 0, // dsub3_then_ssub_hi |
| 65609 | 235, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65610 | 235, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65611 | 235, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65612 | 235, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65613 | 235, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65614 | 235, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65615 | 0, // psub1_then_psub |
| 65616 | 235, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65617 | 0, // qsub3_then_dsub_hi |
| 65618 | 235, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65619 | 0, // x8sub_7_then_sub_32 |
| 65620 | 0, // x8sub_7_then_sub_32_hi |
| 65621 | 0, // x8sub_6_then_sub_32 |
| 65622 | 0, // x8sub_6_then_sub_32_hi |
| 65623 | 0, // x8sub_5_then_sub_32 |
| 65624 | 0, // x8sub_5_then_sub_32_hi |
| 65625 | 0, // x8sub_4_then_sub_32 |
| 65626 | 0, // x8sub_4_then_sub_32_hi |
| 65627 | 0, // x8sub_3_then_sub_32 |
| 65628 | 0, // x8sub_3_then_sub_32_hi |
| 65629 | 0, // x8sub_2_then_sub_32 |
| 65630 | 0, // x8sub_2_then_sub_32_hi |
| 65631 | 0, // x8sub_1_then_sub_32 |
| 65632 | 0, // x8sub_1_then_sub_32_hi |
| 65633 | 0, // subo64_then_sub_32 |
| 65634 | 0, // subo64_then_sub_32_hi |
| 65635 | 235, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65636 | 0, // zsub3_then_zsub_hi |
| 65637 | 235, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65638 | 0, // dsub0_dsub1 |
| 65639 | 0, // dsub0_dsub1_dsub2 |
| 65640 | 235, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65641 | 0, // dsub1_dsub2_dsub3 |
| 65642 | 0, // dsub2_dsub3 |
| 65643 | 235, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65644 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65645 | 235, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65646 | 0, // qsub0_qsub1 |
| 65647 | 0, // qsub0_qsub1_qsub2 |
| 65648 | 235, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65649 | 0, // qsub1_qsub2_qsub3 |
| 65650 | 0, // qsub2_qsub3 |
| 65651 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65652 | 0, // x8sub_0_x8sub_1 |
| 65653 | 0, // x8sub_2_x8sub_3 |
| 65654 | 0, // x8sub_4_x8sub_5 |
| 65655 | 0, // x8sub_6_x8sub_7 |
| 65656 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65657 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65658 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65659 | 0, // sub_32_subo64_then_sub_32 |
| 65660 | 235, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65661 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65662 | 235, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65663 | 235, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65664 | 0, // zsub0_zsub1_zsub2 |
| 65665 | 235, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 65666 | 0, // zsub1_zsub2_zsub3 |
| 65667 | 0, // zsub2_zsub3 |
| 65668 | 0, // zsub0_zsub2 |
| 65669 | 0, // zsub1_zsub3 |
| 65670 | }, |
| 65671 | { // ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65672 | 236, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65673 | 236, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65674 | 236, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65675 | 0, // dsub0 |
| 65676 | 236, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65677 | 236, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65678 | 0, // dsub3 |
| 65679 | 236, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65680 | 236, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65681 | 236, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65682 | 0, // psub |
| 65683 | 0, // psub0 |
| 65684 | 0, // psub1 |
| 65685 | 0, // qsub0 |
| 65686 | 236, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65687 | 236, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65688 | 0, // qsub3 |
| 65689 | 236, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65690 | 236, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65691 | 0, // sub_32 |
| 65692 | 0, // sub_32_hi |
| 65693 | 0, // sube32 |
| 65694 | 0, // sube64 |
| 65695 | 0, // subo32 |
| 65696 | 0, // subo64 |
| 65697 | 0, // x8sub_0 |
| 65698 | 0, // x8sub_1 |
| 65699 | 0, // x8sub_2 |
| 65700 | 0, // x8sub_3 |
| 65701 | 0, // x8sub_4 |
| 65702 | 0, // x8sub_5 |
| 65703 | 0, // x8sub_6 |
| 65704 | 0, // x8sub_7 |
| 65705 | 0, // zasubb |
| 65706 | 0, // zasubd0 |
| 65707 | 0, // zasubd1 |
| 65708 | 0, // zasubh0 |
| 65709 | 0, // zasubh1 |
| 65710 | 0, // zasubq0 |
| 65711 | 0, // zasubq1 |
| 65712 | 0, // zasubs0 |
| 65713 | 0, // zasubs1 |
| 65714 | 236, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65715 | 236, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65716 | 236, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65717 | 236, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65718 | 0, // zsub3 |
| 65719 | 236, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65720 | 0, // zasubd1_then_zasubq0 |
| 65721 | 0, // zasubd1_then_zasubq1 |
| 65722 | 0, // zasubs1_then_zasubd0 |
| 65723 | 0, // zasubs1_then_zasubd1 |
| 65724 | 0, // zasubs1_then_zasubq0 |
| 65725 | 0, // zasubs1_then_zasubq1 |
| 65726 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65727 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65728 | 0, // zasubh1_then_zasubd0 |
| 65729 | 0, // zasubh1_then_zasubd1 |
| 65730 | 0, // zasubh1_then_zasubq0 |
| 65731 | 0, // zasubh1_then_zasubq1 |
| 65732 | 0, // zasubh1_then_zasubs0 |
| 65733 | 0, // zasubh1_then_zasubs1 |
| 65734 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65735 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65736 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65737 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65738 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65739 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65740 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65741 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65742 | 236, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65743 | 236, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65744 | 236, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65745 | 236, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65746 | 236, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65747 | 236, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65748 | 0, // dsub3_then_bsub |
| 65749 | 0, // dsub3_then_bsub_hi |
| 65750 | 0, // dsub3_then_hsub |
| 65751 | 0, // dsub3_then_hsub_hi |
| 65752 | 0, // dsub3_then_ssub |
| 65753 | 0, // dsub3_then_ssub_hi |
| 65754 | 236, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65755 | 236, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65756 | 236, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65757 | 236, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65758 | 236, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65759 | 236, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65760 | 0, // psub1_then_psub |
| 65761 | 236, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65762 | 0, // qsub3_then_dsub_hi |
| 65763 | 236, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65764 | 0, // x8sub_7_then_sub_32 |
| 65765 | 0, // x8sub_7_then_sub_32_hi |
| 65766 | 0, // x8sub_6_then_sub_32 |
| 65767 | 0, // x8sub_6_then_sub_32_hi |
| 65768 | 0, // x8sub_5_then_sub_32 |
| 65769 | 0, // x8sub_5_then_sub_32_hi |
| 65770 | 0, // x8sub_4_then_sub_32 |
| 65771 | 0, // x8sub_4_then_sub_32_hi |
| 65772 | 0, // x8sub_3_then_sub_32 |
| 65773 | 0, // x8sub_3_then_sub_32_hi |
| 65774 | 0, // x8sub_2_then_sub_32 |
| 65775 | 0, // x8sub_2_then_sub_32_hi |
| 65776 | 0, // x8sub_1_then_sub_32 |
| 65777 | 0, // x8sub_1_then_sub_32_hi |
| 65778 | 0, // subo64_then_sub_32 |
| 65779 | 0, // subo64_then_sub_32_hi |
| 65780 | 236, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65781 | 0, // zsub3_then_zsub_hi |
| 65782 | 236, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65783 | 0, // dsub0_dsub1 |
| 65784 | 0, // dsub0_dsub1_dsub2 |
| 65785 | 236, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65786 | 0, // dsub1_dsub2_dsub3 |
| 65787 | 0, // dsub2_dsub3 |
| 65788 | 236, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65789 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65790 | 236, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65791 | 0, // qsub0_qsub1 |
| 65792 | 0, // qsub0_qsub1_qsub2 |
| 65793 | 236, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65794 | 0, // qsub1_qsub2_qsub3 |
| 65795 | 0, // qsub2_qsub3 |
| 65796 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65797 | 0, // x8sub_0_x8sub_1 |
| 65798 | 0, // x8sub_2_x8sub_3 |
| 65799 | 0, // x8sub_4_x8sub_5 |
| 65800 | 0, // x8sub_6_x8sub_7 |
| 65801 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65802 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65803 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65804 | 0, // sub_32_subo64_then_sub_32 |
| 65805 | 236, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65806 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65807 | 236, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65808 | 236, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65809 | 0, // zsub0_zsub1_zsub2 |
| 65810 | 236, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 65811 | 0, // zsub1_zsub2_zsub3 |
| 65812 | 0, // zsub2_zsub3 |
| 65813 | 0, // zsub0_zsub2 |
| 65814 | 0, // zsub1_zsub3 |
| 65815 | }, |
| 65816 | { // ZPR3_with_zsub2_in_ZPRMul4 |
| 65817 | 237, // bsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65818 | 237, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65819 | 237, // dsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65820 | 0, // dsub0 |
| 65821 | 237, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65822 | 237, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65823 | 0, // dsub3 |
| 65824 | 237, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65825 | 237, // hsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65826 | 237, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65827 | 0, // psub |
| 65828 | 0, // psub0 |
| 65829 | 0, // psub1 |
| 65830 | 0, // qsub0 |
| 65831 | 237, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65832 | 237, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65833 | 0, // qsub3 |
| 65834 | 237, // ssub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65835 | 237, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65836 | 0, // sub_32 |
| 65837 | 0, // sub_32_hi |
| 65838 | 0, // sube32 |
| 65839 | 0, // sube64 |
| 65840 | 0, // subo32 |
| 65841 | 0, // subo64 |
| 65842 | 0, // x8sub_0 |
| 65843 | 0, // x8sub_1 |
| 65844 | 0, // x8sub_2 |
| 65845 | 0, // x8sub_3 |
| 65846 | 0, // x8sub_4 |
| 65847 | 0, // x8sub_5 |
| 65848 | 0, // x8sub_6 |
| 65849 | 0, // x8sub_7 |
| 65850 | 0, // zasubb |
| 65851 | 0, // zasubd0 |
| 65852 | 0, // zasubd1 |
| 65853 | 0, // zasubh0 |
| 65854 | 0, // zasubh1 |
| 65855 | 0, // zasubq0 |
| 65856 | 0, // zasubq1 |
| 65857 | 0, // zasubs0 |
| 65858 | 0, // zasubs1 |
| 65859 | 237, // zsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65860 | 237, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65861 | 237, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65862 | 237, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65863 | 0, // zsub3 |
| 65864 | 237, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65865 | 0, // zasubd1_then_zasubq0 |
| 65866 | 0, // zasubd1_then_zasubq1 |
| 65867 | 0, // zasubs1_then_zasubd0 |
| 65868 | 0, // zasubs1_then_zasubd1 |
| 65869 | 0, // zasubs1_then_zasubq0 |
| 65870 | 0, // zasubs1_then_zasubq1 |
| 65871 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 65872 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 65873 | 0, // zasubh1_then_zasubd0 |
| 65874 | 0, // zasubh1_then_zasubd1 |
| 65875 | 0, // zasubh1_then_zasubq0 |
| 65876 | 0, // zasubh1_then_zasubq1 |
| 65877 | 0, // zasubh1_then_zasubs0 |
| 65878 | 0, // zasubh1_then_zasubs1 |
| 65879 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 65880 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 65881 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 65882 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 65883 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 65884 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 65885 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 65886 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 65887 | 237, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65888 | 237, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65889 | 237, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65890 | 237, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65891 | 237, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65892 | 237, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65893 | 0, // dsub3_then_bsub |
| 65894 | 0, // dsub3_then_bsub_hi |
| 65895 | 0, // dsub3_then_hsub |
| 65896 | 0, // dsub3_then_hsub_hi |
| 65897 | 0, // dsub3_then_ssub |
| 65898 | 0, // dsub3_then_ssub_hi |
| 65899 | 237, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65900 | 237, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65901 | 237, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65902 | 237, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65903 | 237, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65904 | 237, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65905 | 0, // psub1_then_psub |
| 65906 | 237, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65907 | 0, // qsub3_then_dsub_hi |
| 65908 | 237, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65909 | 0, // x8sub_7_then_sub_32 |
| 65910 | 0, // x8sub_7_then_sub_32_hi |
| 65911 | 0, // x8sub_6_then_sub_32 |
| 65912 | 0, // x8sub_6_then_sub_32_hi |
| 65913 | 0, // x8sub_5_then_sub_32 |
| 65914 | 0, // x8sub_5_then_sub_32_hi |
| 65915 | 0, // x8sub_4_then_sub_32 |
| 65916 | 0, // x8sub_4_then_sub_32_hi |
| 65917 | 0, // x8sub_3_then_sub_32 |
| 65918 | 0, // x8sub_3_then_sub_32_hi |
| 65919 | 0, // x8sub_2_then_sub_32 |
| 65920 | 0, // x8sub_2_then_sub_32_hi |
| 65921 | 0, // x8sub_1_then_sub_32 |
| 65922 | 0, // x8sub_1_then_sub_32_hi |
| 65923 | 0, // subo64_then_sub_32 |
| 65924 | 0, // subo64_then_sub_32_hi |
| 65925 | 237, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65926 | 0, // zsub3_then_zsub_hi |
| 65927 | 237, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65928 | 0, // dsub0_dsub1 |
| 65929 | 0, // dsub0_dsub1_dsub2 |
| 65930 | 237, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65931 | 0, // dsub1_dsub2_dsub3 |
| 65932 | 0, // dsub2_dsub3 |
| 65933 | 237, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65934 | 0, // dsub_dsub1_dsub2_dsub3 |
| 65935 | 237, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65936 | 0, // qsub0_qsub1 |
| 65937 | 0, // qsub0_qsub1_qsub2 |
| 65938 | 237, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65939 | 0, // qsub1_qsub2_qsub3 |
| 65940 | 0, // qsub2_qsub3 |
| 65941 | 0, // sub_32_x8sub_1_then_sub_32 |
| 65942 | 0, // x8sub_0_x8sub_1 |
| 65943 | 0, // x8sub_2_x8sub_3 |
| 65944 | 0, // x8sub_4_x8sub_5 |
| 65945 | 0, // x8sub_6_x8sub_7 |
| 65946 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 65947 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 65948 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 65949 | 0, // sub_32_subo64_then_sub_32 |
| 65950 | 237, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65951 | 0, // zsub_qsub1_qsub2_qsub3 |
| 65952 | 237, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65953 | 237, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65954 | 0, // zsub0_zsub1_zsub2 |
| 65955 | 237, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 65956 | 0, // zsub1_zsub2_zsub3 |
| 65957 | 0, // zsub2_zsub3 |
| 65958 | 0, // zsub0_zsub2 |
| 65959 | 0, // zsub1_zsub3 |
| 65960 | }, |
| 65961 | { // ZPR3_with_zsub2_in_ZPR_K |
| 65962 | 238, // bsub -> ZPR3_with_zsub2_in_ZPR_K |
| 65963 | 238, // bsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 65964 | 238, // dsub -> ZPR3_with_zsub2_in_ZPR_K |
| 65965 | 0, // dsub0 |
| 65966 | 238, // dsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 65967 | 238, // dsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 65968 | 0, // dsub3 |
| 65969 | 238, // dsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 65970 | 238, // hsub -> ZPR3_with_zsub2_in_ZPR_K |
| 65971 | 238, // hsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 65972 | 0, // psub |
| 65973 | 0, // psub0 |
| 65974 | 0, // psub1 |
| 65975 | 0, // qsub0 |
| 65976 | 238, // qsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 65977 | 238, // qsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 65978 | 0, // qsub3 |
| 65979 | 238, // ssub -> ZPR3_with_zsub2_in_ZPR_K |
| 65980 | 238, // ssub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 65981 | 0, // sub_32 |
| 65982 | 0, // sub_32_hi |
| 65983 | 0, // sube32 |
| 65984 | 0, // sube64 |
| 65985 | 0, // subo32 |
| 65986 | 0, // subo64 |
| 65987 | 0, // x8sub_0 |
| 65988 | 0, // x8sub_1 |
| 65989 | 0, // x8sub_2 |
| 65990 | 0, // x8sub_3 |
| 65991 | 0, // x8sub_4 |
| 65992 | 0, // x8sub_5 |
| 65993 | 0, // x8sub_6 |
| 65994 | 0, // x8sub_7 |
| 65995 | 0, // zasubb |
| 65996 | 0, // zasubd0 |
| 65997 | 0, // zasubd1 |
| 65998 | 0, // zasubh0 |
| 65999 | 0, // zasubh1 |
| 66000 | 0, // zasubq0 |
| 66001 | 0, // zasubq1 |
| 66002 | 0, // zasubs0 |
| 66003 | 0, // zasubs1 |
| 66004 | 238, // zsub -> ZPR3_with_zsub2_in_ZPR_K |
| 66005 | 238, // zsub0 -> ZPR3_with_zsub2_in_ZPR_K |
| 66006 | 238, // zsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 66007 | 238, // zsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66008 | 0, // zsub3 |
| 66009 | 238, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66010 | 0, // zasubd1_then_zasubq0 |
| 66011 | 0, // zasubd1_then_zasubq1 |
| 66012 | 0, // zasubs1_then_zasubd0 |
| 66013 | 0, // zasubs1_then_zasubd1 |
| 66014 | 0, // zasubs1_then_zasubq0 |
| 66015 | 0, // zasubs1_then_zasubq1 |
| 66016 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66017 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66018 | 0, // zasubh1_then_zasubd0 |
| 66019 | 0, // zasubh1_then_zasubd1 |
| 66020 | 0, // zasubh1_then_zasubq0 |
| 66021 | 0, // zasubh1_then_zasubq1 |
| 66022 | 0, // zasubh1_then_zasubs0 |
| 66023 | 0, // zasubh1_then_zasubs1 |
| 66024 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66025 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66026 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66027 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66028 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66029 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66030 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66031 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66032 | 238, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_K |
| 66033 | 238, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66034 | 238, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_K |
| 66035 | 238, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66036 | 238, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_K |
| 66037 | 238, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66038 | 0, // dsub3_then_bsub |
| 66039 | 0, // dsub3_then_bsub_hi |
| 66040 | 0, // dsub3_then_hsub |
| 66041 | 0, // dsub3_then_hsub_hi |
| 66042 | 0, // dsub3_then_ssub |
| 66043 | 0, // dsub3_then_ssub_hi |
| 66044 | 238, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_K |
| 66045 | 238, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66046 | 238, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_K |
| 66047 | 238, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66048 | 238, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_K |
| 66049 | 238, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66050 | 0, // psub1_then_psub |
| 66051 | 238, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66052 | 0, // qsub3_then_dsub_hi |
| 66053 | 238, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66054 | 0, // x8sub_7_then_sub_32 |
| 66055 | 0, // x8sub_7_then_sub_32_hi |
| 66056 | 0, // x8sub_6_then_sub_32 |
| 66057 | 0, // x8sub_6_then_sub_32_hi |
| 66058 | 0, // x8sub_5_then_sub_32 |
| 66059 | 0, // x8sub_5_then_sub_32_hi |
| 66060 | 0, // x8sub_4_then_sub_32 |
| 66061 | 0, // x8sub_4_then_sub_32_hi |
| 66062 | 0, // x8sub_3_then_sub_32 |
| 66063 | 0, // x8sub_3_then_sub_32_hi |
| 66064 | 0, // x8sub_2_then_sub_32 |
| 66065 | 0, // x8sub_2_then_sub_32_hi |
| 66066 | 0, // x8sub_1_then_sub_32 |
| 66067 | 0, // x8sub_1_then_sub_32_hi |
| 66068 | 0, // subo64_then_sub_32 |
| 66069 | 0, // subo64_then_sub_32_hi |
| 66070 | 238, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66071 | 0, // zsub3_then_zsub_hi |
| 66072 | 238, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_K |
| 66073 | 0, // dsub0_dsub1 |
| 66074 | 0, // dsub0_dsub1_dsub2 |
| 66075 | 238, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66076 | 0, // dsub1_dsub2_dsub3 |
| 66077 | 0, // dsub2_dsub3 |
| 66078 | 238, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 66079 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66080 | 238, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66081 | 0, // qsub0_qsub1 |
| 66082 | 0, // qsub0_qsub1_qsub2 |
| 66083 | 238, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66084 | 0, // qsub1_qsub2_qsub3 |
| 66085 | 0, // qsub2_qsub3 |
| 66086 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66087 | 0, // x8sub_0_x8sub_1 |
| 66088 | 0, // x8sub_2_x8sub_3 |
| 66089 | 0, // x8sub_4_x8sub_5 |
| 66090 | 0, // x8sub_6_x8sub_7 |
| 66091 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66092 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66093 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66094 | 0, // sub_32_subo64_then_sub_32 |
| 66095 | 238, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 66096 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66097 | 238, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66098 | 238, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_K |
| 66099 | 0, // zsub0_zsub1_zsub2 |
| 66100 | 238, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 66101 | 0, // zsub1_zsub2_zsub3 |
| 66102 | 0, // zsub2_zsub3 |
| 66103 | 0, // zsub0_zsub2 |
| 66104 | 0, // zsub1_zsub3 |
| 66105 | }, |
| 66106 | { // ZPR3_with_zsub_in_FPR128_0to7 |
| 66107 | 239, // bsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66108 | 239, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66109 | 239, // dsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66110 | 0, // dsub0 |
| 66111 | 239, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66112 | 239, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66113 | 0, // dsub3 |
| 66114 | 239, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66115 | 239, // hsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66116 | 239, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66117 | 0, // psub |
| 66118 | 0, // psub0 |
| 66119 | 0, // psub1 |
| 66120 | 0, // qsub0 |
| 66121 | 239, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66122 | 239, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66123 | 0, // qsub3 |
| 66124 | 239, // ssub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66125 | 239, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66126 | 0, // sub_32 |
| 66127 | 0, // sub_32_hi |
| 66128 | 0, // sube32 |
| 66129 | 0, // sube64 |
| 66130 | 0, // subo32 |
| 66131 | 0, // subo64 |
| 66132 | 0, // x8sub_0 |
| 66133 | 0, // x8sub_1 |
| 66134 | 0, // x8sub_2 |
| 66135 | 0, // x8sub_3 |
| 66136 | 0, // x8sub_4 |
| 66137 | 0, // x8sub_5 |
| 66138 | 0, // x8sub_6 |
| 66139 | 0, // x8sub_7 |
| 66140 | 0, // zasubb |
| 66141 | 0, // zasubd0 |
| 66142 | 0, // zasubd1 |
| 66143 | 0, // zasubh0 |
| 66144 | 0, // zasubh1 |
| 66145 | 0, // zasubq0 |
| 66146 | 0, // zasubq1 |
| 66147 | 0, // zasubs0 |
| 66148 | 0, // zasubs1 |
| 66149 | 239, // zsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66150 | 239, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66151 | 239, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66152 | 239, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66153 | 0, // zsub3 |
| 66154 | 239, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66155 | 0, // zasubd1_then_zasubq0 |
| 66156 | 0, // zasubd1_then_zasubq1 |
| 66157 | 0, // zasubs1_then_zasubd0 |
| 66158 | 0, // zasubs1_then_zasubd1 |
| 66159 | 0, // zasubs1_then_zasubq0 |
| 66160 | 0, // zasubs1_then_zasubq1 |
| 66161 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66162 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66163 | 0, // zasubh1_then_zasubd0 |
| 66164 | 0, // zasubh1_then_zasubd1 |
| 66165 | 0, // zasubh1_then_zasubq0 |
| 66166 | 0, // zasubh1_then_zasubq1 |
| 66167 | 0, // zasubh1_then_zasubs0 |
| 66168 | 0, // zasubh1_then_zasubs1 |
| 66169 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66170 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66171 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66172 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66173 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66174 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66175 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66176 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66177 | 239, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66178 | 239, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66179 | 239, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66180 | 239, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66181 | 239, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66182 | 239, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66183 | 0, // dsub3_then_bsub |
| 66184 | 0, // dsub3_then_bsub_hi |
| 66185 | 0, // dsub3_then_hsub |
| 66186 | 0, // dsub3_then_hsub_hi |
| 66187 | 0, // dsub3_then_ssub |
| 66188 | 0, // dsub3_then_ssub_hi |
| 66189 | 239, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66190 | 239, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66191 | 239, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66192 | 239, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66193 | 239, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66194 | 239, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66195 | 0, // psub1_then_psub |
| 66196 | 239, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66197 | 0, // qsub3_then_dsub_hi |
| 66198 | 239, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66199 | 0, // x8sub_7_then_sub_32 |
| 66200 | 0, // x8sub_7_then_sub_32_hi |
| 66201 | 0, // x8sub_6_then_sub_32 |
| 66202 | 0, // x8sub_6_then_sub_32_hi |
| 66203 | 0, // x8sub_5_then_sub_32 |
| 66204 | 0, // x8sub_5_then_sub_32_hi |
| 66205 | 0, // x8sub_4_then_sub_32 |
| 66206 | 0, // x8sub_4_then_sub_32_hi |
| 66207 | 0, // x8sub_3_then_sub_32 |
| 66208 | 0, // x8sub_3_then_sub_32_hi |
| 66209 | 0, // x8sub_2_then_sub_32 |
| 66210 | 0, // x8sub_2_then_sub_32_hi |
| 66211 | 0, // x8sub_1_then_sub_32 |
| 66212 | 0, // x8sub_1_then_sub_32_hi |
| 66213 | 0, // subo64_then_sub_32 |
| 66214 | 0, // subo64_then_sub_32_hi |
| 66215 | 239, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66216 | 0, // zsub3_then_zsub_hi |
| 66217 | 239, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66218 | 0, // dsub0_dsub1 |
| 66219 | 0, // dsub0_dsub1_dsub2 |
| 66220 | 239, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66221 | 0, // dsub1_dsub2_dsub3 |
| 66222 | 0, // dsub2_dsub3 |
| 66223 | 239, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66224 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66225 | 239, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66226 | 0, // qsub0_qsub1 |
| 66227 | 0, // qsub0_qsub1_qsub2 |
| 66228 | 239, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66229 | 0, // qsub1_qsub2_qsub3 |
| 66230 | 0, // qsub2_qsub3 |
| 66231 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66232 | 0, // x8sub_0_x8sub_1 |
| 66233 | 0, // x8sub_2_x8sub_3 |
| 66234 | 0, // x8sub_4_x8sub_5 |
| 66235 | 0, // x8sub_6_x8sub_7 |
| 66236 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66237 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66238 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66239 | 0, // sub_32_subo64_then_sub_32 |
| 66240 | 239, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66241 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66242 | 239, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66243 | 239, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66244 | 0, // zsub0_zsub1_zsub2 |
| 66245 | 239, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 66246 | 0, // zsub1_zsub2_zsub3 |
| 66247 | 0, // zsub2_zsub3 |
| 66248 | 0, // zsub0_zsub2 |
| 66249 | 0, // zsub1_zsub3 |
| 66250 | }, |
| 66251 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66252 | 240, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66253 | 240, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66254 | 240, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66255 | 0, // dsub0 |
| 66256 | 240, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66257 | 240, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66258 | 0, // dsub3 |
| 66259 | 240, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66260 | 240, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66261 | 240, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66262 | 0, // psub |
| 66263 | 0, // psub0 |
| 66264 | 0, // psub1 |
| 66265 | 0, // qsub0 |
| 66266 | 240, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66267 | 240, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66268 | 0, // qsub3 |
| 66269 | 240, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66270 | 240, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66271 | 0, // sub_32 |
| 66272 | 0, // sub_32_hi |
| 66273 | 0, // sube32 |
| 66274 | 0, // sube64 |
| 66275 | 0, // subo32 |
| 66276 | 0, // subo64 |
| 66277 | 0, // x8sub_0 |
| 66278 | 0, // x8sub_1 |
| 66279 | 0, // x8sub_2 |
| 66280 | 0, // x8sub_3 |
| 66281 | 0, // x8sub_4 |
| 66282 | 0, // x8sub_5 |
| 66283 | 0, // x8sub_6 |
| 66284 | 0, // x8sub_7 |
| 66285 | 0, // zasubb |
| 66286 | 0, // zasubd0 |
| 66287 | 0, // zasubd1 |
| 66288 | 0, // zasubh0 |
| 66289 | 0, // zasubh1 |
| 66290 | 0, // zasubq0 |
| 66291 | 0, // zasubq1 |
| 66292 | 0, // zasubs0 |
| 66293 | 0, // zasubs1 |
| 66294 | 240, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66295 | 240, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66296 | 240, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66297 | 240, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66298 | 0, // zsub3 |
| 66299 | 240, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66300 | 0, // zasubd1_then_zasubq0 |
| 66301 | 0, // zasubd1_then_zasubq1 |
| 66302 | 0, // zasubs1_then_zasubd0 |
| 66303 | 0, // zasubs1_then_zasubd1 |
| 66304 | 0, // zasubs1_then_zasubq0 |
| 66305 | 0, // zasubs1_then_zasubq1 |
| 66306 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66307 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66308 | 0, // zasubh1_then_zasubd0 |
| 66309 | 0, // zasubh1_then_zasubd1 |
| 66310 | 0, // zasubh1_then_zasubq0 |
| 66311 | 0, // zasubh1_then_zasubq1 |
| 66312 | 0, // zasubh1_then_zasubs0 |
| 66313 | 0, // zasubh1_then_zasubs1 |
| 66314 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66315 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66316 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66317 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66318 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66319 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66320 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66321 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66322 | 240, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66323 | 240, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66324 | 240, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66325 | 240, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66326 | 240, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66327 | 240, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66328 | 0, // dsub3_then_bsub |
| 66329 | 0, // dsub3_then_bsub_hi |
| 66330 | 0, // dsub3_then_hsub |
| 66331 | 0, // dsub3_then_hsub_hi |
| 66332 | 0, // dsub3_then_ssub |
| 66333 | 0, // dsub3_then_ssub_hi |
| 66334 | 240, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66335 | 240, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66336 | 240, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66337 | 240, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66338 | 240, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66339 | 240, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66340 | 0, // psub1_then_psub |
| 66341 | 240, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66342 | 0, // qsub3_then_dsub_hi |
| 66343 | 240, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66344 | 0, // x8sub_7_then_sub_32 |
| 66345 | 0, // x8sub_7_then_sub_32_hi |
| 66346 | 0, // x8sub_6_then_sub_32 |
| 66347 | 0, // x8sub_6_then_sub_32_hi |
| 66348 | 0, // x8sub_5_then_sub_32 |
| 66349 | 0, // x8sub_5_then_sub_32_hi |
| 66350 | 0, // x8sub_4_then_sub_32 |
| 66351 | 0, // x8sub_4_then_sub_32_hi |
| 66352 | 0, // x8sub_3_then_sub_32 |
| 66353 | 0, // x8sub_3_then_sub_32_hi |
| 66354 | 0, // x8sub_2_then_sub_32 |
| 66355 | 0, // x8sub_2_then_sub_32_hi |
| 66356 | 0, // x8sub_1_then_sub_32 |
| 66357 | 0, // x8sub_1_then_sub_32_hi |
| 66358 | 0, // subo64_then_sub_32 |
| 66359 | 0, // subo64_then_sub_32_hi |
| 66360 | 240, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66361 | 0, // zsub3_then_zsub_hi |
| 66362 | 240, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66363 | 0, // dsub0_dsub1 |
| 66364 | 0, // dsub0_dsub1_dsub2 |
| 66365 | 240, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66366 | 0, // dsub1_dsub2_dsub3 |
| 66367 | 0, // dsub2_dsub3 |
| 66368 | 240, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66369 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66370 | 240, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66371 | 0, // qsub0_qsub1 |
| 66372 | 0, // qsub0_qsub1_qsub2 |
| 66373 | 240, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66374 | 0, // qsub1_qsub2_qsub3 |
| 66375 | 0, // qsub2_qsub3 |
| 66376 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66377 | 0, // x8sub_0_x8sub_1 |
| 66378 | 0, // x8sub_2_x8sub_3 |
| 66379 | 0, // x8sub_4_x8sub_5 |
| 66380 | 0, // x8sub_6_x8sub_7 |
| 66381 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66382 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66383 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66384 | 0, // sub_32_subo64_then_sub_32 |
| 66385 | 240, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66386 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66387 | 240, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66388 | 240, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66389 | 0, // zsub0_zsub1_zsub2 |
| 66390 | 240, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 66391 | 0, // zsub1_zsub2_zsub3 |
| 66392 | 0, // zsub2_zsub3 |
| 66393 | 0, // zsub0_zsub2 |
| 66394 | 0, // zsub1_zsub3 |
| 66395 | }, |
| 66396 | { // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66397 | 241, // bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66398 | 241, // bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66399 | 241, // dsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66400 | 0, // dsub0 |
| 66401 | 241, // dsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66402 | 241, // dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66403 | 0, // dsub3 |
| 66404 | 241, // dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66405 | 241, // hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66406 | 241, // hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66407 | 0, // psub |
| 66408 | 0, // psub0 |
| 66409 | 0, // psub1 |
| 66410 | 241, // qsub0 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66411 | 241, // qsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66412 | 241, // qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66413 | 0, // qsub3 |
| 66414 | 241, // ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66415 | 241, // ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66416 | 0, // sub_32 |
| 66417 | 0, // sub_32_hi |
| 66418 | 0, // sube32 |
| 66419 | 0, // sube64 |
| 66420 | 0, // subo32 |
| 66421 | 0, // subo64 |
| 66422 | 0, // x8sub_0 |
| 66423 | 0, // x8sub_1 |
| 66424 | 0, // x8sub_2 |
| 66425 | 0, // x8sub_3 |
| 66426 | 0, // x8sub_4 |
| 66427 | 0, // x8sub_5 |
| 66428 | 0, // x8sub_6 |
| 66429 | 0, // x8sub_7 |
| 66430 | 0, // zasubb |
| 66431 | 0, // zasubd0 |
| 66432 | 0, // zasubd1 |
| 66433 | 0, // zasubh0 |
| 66434 | 0, // zasubh1 |
| 66435 | 0, // zasubq0 |
| 66436 | 0, // zasubq1 |
| 66437 | 0, // zasubs0 |
| 66438 | 0, // zasubs1 |
| 66439 | 0, // zsub |
| 66440 | 0, // zsub0 |
| 66441 | 0, // zsub1 |
| 66442 | 0, // zsub2 |
| 66443 | 0, // zsub3 |
| 66444 | 0, // zsub_hi |
| 66445 | 0, // zasubd1_then_zasubq0 |
| 66446 | 0, // zasubd1_then_zasubq1 |
| 66447 | 0, // zasubs1_then_zasubd0 |
| 66448 | 0, // zasubs1_then_zasubd1 |
| 66449 | 0, // zasubs1_then_zasubq0 |
| 66450 | 0, // zasubs1_then_zasubq1 |
| 66451 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66452 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66453 | 0, // zasubh1_then_zasubd0 |
| 66454 | 0, // zasubh1_then_zasubd1 |
| 66455 | 0, // zasubh1_then_zasubq0 |
| 66456 | 0, // zasubh1_then_zasubq1 |
| 66457 | 0, // zasubh1_then_zasubs0 |
| 66458 | 0, // zasubh1_then_zasubs1 |
| 66459 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66460 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66461 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66462 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66463 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66464 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66465 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66466 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66467 | 241, // dsub1_then_bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66468 | 241, // dsub1_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66469 | 241, // dsub1_then_hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66470 | 241, // dsub1_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66471 | 241, // dsub1_then_ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66472 | 241, // dsub1_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66473 | 0, // dsub3_then_bsub |
| 66474 | 0, // dsub3_then_bsub_hi |
| 66475 | 0, // dsub3_then_hsub |
| 66476 | 0, // dsub3_then_hsub_hi |
| 66477 | 0, // dsub3_then_ssub |
| 66478 | 0, // dsub3_then_ssub_hi |
| 66479 | 241, // dsub2_then_bsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66480 | 241, // dsub2_then_bsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66481 | 241, // dsub2_then_hsub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66482 | 241, // dsub2_then_hsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66483 | 241, // dsub2_then_ssub -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66484 | 241, // dsub2_then_ssub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66485 | 0, // psub1_then_psub |
| 66486 | 241, // qsub1_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66487 | 0, // qsub3_then_dsub_hi |
| 66488 | 241, // qsub2_then_dsub_hi -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66489 | 0, // x8sub_7_then_sub_32 |
| 66490 | 0, // x8sub_7_then_sub_32_hi |
| 66491 | 0, // x8sub_6_then_sub_32 |
| 66492 | 0, // x8sub_6_then_sub_32_hi |
| 66493 | 0, // x8sub_5_then_sub_32 |
| 66494 | 0, // x8sub_5_then_sub_32_hi |
| 66495 | 0, // x8sub_4_then_sub_32 |
| 66496 | 0, // x8sub_4_then_sub_32_hi |
| 66497 | 0, // x8sub_3_then_sub_32 |
| 66498 | 0, // x8sub_3_then_sub_32_hi |
| 66499 | 0, // x8sub_2_then_sub_32 |
| 66500 | 0, // x8sub_2_then_sub_32_hi |
| 66501 | 0, // x8sub_1_then_sub_32 |
| 66502 | 0, // x8sub_1_then_sub_32_hi |
| 66503 | 0, // subo64_then_sub_32 |
| 66504 | 0, // subo64_then_sub_32_hi |
| 66505 | 0, // zsub1_then_zsub_hi |
| 66506 | 0, // zsub3_then_zsub_hi |
| 66507 | 0, // zsub2_then_zsub_hi |
| 66508 | 0, // dsub0_dsub1 |
| 66509 | 0, // dsub0_dsub1_dsub2 |
| 66510 | 241, // dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66511 | 0, // dsub1_dsub2_dsub3 |
| 66512 | 0, // dsub2_dsub3 |
| 66513 | 241, // dsub_dsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66514 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66515 | 241, // dsub_dsub1_dsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66516 | 241, // qsub0_qsub1 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66517 | 0, // qsub0_qsub1_qsub2 |
| 66518 | 241, // qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 66519 | 0, // qsub1_qsub2_qsub3 |
| 66520 | 0, // qsub2_qsub3 |
| 66521 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66522 | 0, // x8sub_0_x8sub_1 |
| 66523 | 0, // x8sub_2_x8sub_3 |
| 66524 | 0, // x8sub_4_x8sub_5 |
| 66525 | 0, // x8sub_6_x8sub_7 |
| 66526 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66527 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66528 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66529 | 0, // sub_32_subo64_then_sub_32 |
| 66530 | 0, // zsub_qsub1 |
| 66531 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66532 | 0, // zsub_qsub1_qsub2 |
| 66533 | 0, // zsub0_zsub1 |
| 66534 | 0, // zsub0_zsub1_zsub2 |
| 66535 | 0, // zsub1_zsub2 |
| 66536 | 0, // zsub1_zsub2_zsub3 |
| 66537 | 0, // zsub2_zsub3 |
| 66538 | 0, // zsub0_zsub2 |
| 66539 | 0, // zsub1_zsub3 |
| 66540 | }, |
| 66541 | { // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66542 | 242, // bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66543 | 242, // bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66544 | 242, // dsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66545 | 0, // dsub0 |
| 66546 | 242, // dsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66547 | 242, // dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66548 | 0, // dsub3 |
| 66549 | 242, // dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66550 | 242, // hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66551 | 242, // hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66552 | 0, // psub |
| 66553 | 0, // psub0 |
| 66554 | 0, // psub1 |
| 66555 | 242, // qsub0 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66556 | 242, // qsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66557 | 242, // qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66558 | 0, // qsub3 |
| 66559 | 242, // ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66560 | 242, // ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66561 | 0, // sub_32 |
| 66562 | 0, // sub_32_hi |
| 66563 | 0, // sube32 |
| 66564 | 0, // sube64 |
| 66565 | 0, // subo32 |
| 66566 | 0, // subo64 |
| 66567 | 0, // x8sub_0 |
| 66568 | 0, // x8sub_1 |
| 66569 | 0, // x8sub_2 |
| 66570 | 0, // x8sub_3 |
| 66571 | 0, // x8sub_4 |
| 66572 | 0, // x8sub_5 |
| 66573 | 0, // x8sub_6 |
| 66574 | 0, // x8sub_7 |
| 66575 | 0, // zasubb |
| 66576 | 0, // zasubd0 |
| 66577 | 0, // zasubd1 |
| 66578 | 0, // zasubh0 |
| 66579 | 0, // zasubh1 |
| 66580 | 0, // zasubq0 |
| 66581 | 0, // zasubq1 |
| 66582 | 0, // zasubs0 |
| 66583 | 0, // zasubs1 |
| 66584 | 0, // zsub |
| 66585 | 0, // zsub0 |
| 66586 | 0, // zsub1 |
| 66587 | 0, // zsub2 |
| 66588 | 0, // zsub3 |
| 66589 | 0, // zsub_hi |
| 66590 | 0, // zasubd1_then_zasubq0 |
| 66591 | 0, // zasubd1_then_zasubq1 |
| 66592 | 0, // zasubs1_then_zasubd0 |
| 66593 | 0, // zasubs1_then_zasubd1 |
| 66594 | 0, // zasubs1_then_zasubq0 |
| 66595 | 0, // zasubs1_then_zasubq1 |
| 66596 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66597 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66598 | 0, // zasubh1_then_zasubd0 |
| 66599 | 0, // zasubh1_then_zasubd1 |
| 66600 | 0, // zasubh1_then_zasubq0 |
| 66601 | 0, // zasubh1_then_zasubq1 |
| 66602 | 0, // zasubh1_then_zasubs0 |
| 66603 | 0, // zasubh1_then_zasubs1 |
| 66604 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66605 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66606 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66607 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66608 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66609 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66610 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66611 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66612 | 242, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66613 | 242, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66614 | 242, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66615 | 242, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66616 | 242, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66617 | 242, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66618 | 0, // dsub3_then_bsub |
| 66619 | 0, // dsub3_then_bsub_hi |
| 66620 | 0, // dsub3_then_hsub |
| 66621 | 0, // dsub3_then_hsub_hi |
| 66622 | 0, // dsub3_then_ssub |
| 66623 | 0, // dsub3_then_ssub_hi |
| 66624 | 242, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66625 | 242, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66626 | 242, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66627 | 242, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66628 | 242, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66629 | 242, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66630 | 0, // psub1_then_psub |
| 66631 | 242, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66632 | 0, // qsub3_then_dsub_hi |
| 66633 | 242, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66634 | 0, // x8sub_7_then_sub_32 |
| 66635 | 0, // x8sub_7_then_sub_32_hi |
| 66636 | 0, // x8sub_6_then_sub_32 |
| 66637 | 0, // x8sub_6_then_sub_32_hi |
| 66638 | 0, // x8sub_5_then_sub_32 |
| 66639 | 0, // x8sub_5_then_sub_32_hi |
| 66640 | 0, // x8sub_4_then_sub_32 |
| 66641 | 0, // x8sub_4_then_sub_32_hi |
| 66642 | 0, // x8sub_3_then_sub_32 |
| 66643 | 0, // x8sub_3_then_sub_32_hi |
| 66644 | 0, // x8sub_2_then_sub_32 |
| 66645 | 0, // x8sub_2_then_sub_32_hi |
| 66646 | 0, // x8sub_1_then_sub_32 |
| 66647 | 0, // x8sub_1_then_sub_32_hi |
| 66648 | 0, // subo64_then_sub_32 |
| 66649 | 0, // subo64_then_sub_32_hi |
| 66650 | 0, // zsub1_then_zsub_hi |
| 66651 | 0, // zsub3_then_zsub_hi |
| 66652 | 0, // zsub2_then_zsub_hi |
| 66653 | 0, // dsub0_dsub1 |
| 66654 | 0, // dsub0_dsub1_dsub2 |
| 66655 | 242, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66656 | 0, // dsub1_dsub2_dsub3 |
| 66657 | 0, // dsub2_dsub3 |
| 66658 | 242, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66659 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66660 | 242, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66661 | 242, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66662 | 0, // qsub0_qsub1_qsub2 |
| 66663 | 242, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 66664 | 0, // qsub1_qsub2_qsub3 |
| 66665 | 0, // qsub2_qsub3 |
| 66666 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66667 | 0, // x8sub_0_x8sub_1 |
| 66668 | 0, // x8sub_2_x8sub_3 |
| 66669 | 0, // x8sub_4_x8sub_5 |
| 66670 | 0, // x8sub_6_x8sub_7 |
| 66671 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66672 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66673 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66674 | 0, // sub_32_subo64_then_sub_32 |
| 66675 | 0, // zsub_qsub1 |
| 66676 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66677 | 0, // zsub_qsub1_qsub2 |
| 66678 | 0, // zsub0_zsub1 |
| 66679 | 0, // zsub0_zsub1_zsub2 |
| 66680 | 0, // zsub1_zsub2 |
| 66681 | 0, // zsub1_zsub2_zsub3 |
| 66682 | 0, // zsub2_zsub3 |
| 66683 | 0, // zsub0_zsub2 |
| 66684 | 0, // zsub1_zsub3 |
| 66685 | }, |
| 66686 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66687 | 243, // bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66688 | 243, // bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66689 | 243, // dsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66690 | 0, // dsub0 |
| 66691 | 243, // dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66692 | 243, // dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66693 | 0, // dsub3 |
| 66694 | 243, // dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66695 | 243, // hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66696 | 243, // hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66697 | 0, // psub |
| 66698 | 0, // psub0 |
| 66699 | 0, // psub1 |
| 66700 | 0, // qsub0 |
| 66701 | 243, // qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66702 | 243, // qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66703 | 0, // qsub3 |
| 66704 | 243, // ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66705 | 243, // ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66706 | 0, // sub_32 |
| 66707 | 0, // sub_32_hi |
| 66708 | 0, // sube32 |
| 66709 | 0, // sube64 |
| 66710 | 0, // subo32 |
| 66711 | 0, // subo64 |
| 66712 | 0, // x8sub_0 |
| 66713 | 0, // x8sub_1 |
| 66714 | 0, // x8sub_2 |
| 66715 | 0, // x8sub_3 |
| 66716 | 0, // x8sub_4 |
| 66717 | 0, // x8sub_5 |
| 66718 | 0, // x8sub_6 |
| 66719 | 0, // x8sub_7 |
| 66720 | 0, // zasubb |
| 66721 | 0, // zasubd0 |
| 66722 | 0, // zasubd1 |
| 66723 | 0, // zasubh0 |
| 66724 | 0, // zasubh1 |
| 66725 | 0, // zasubq0 |
| 66726 | 0, // zasubq1 |
| 66727 | 0, // zasubs0 |
| 66728 | 0, // zasubs1 |
| 66729 | 243, // zsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66730 | 243, // zsub0 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66731 | 243, // zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66732 | 243, // zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66733 | 0, // zsub3 |
| 66734 | 243, // zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66735 | 0, // zasubd1_then_zasubq0 |
| 66736 | 0, // zasubd1_then_zasubq1 |
| 66737 | 0, // zasubs1_then_zasubd0 |
| 66738 | 0, // zasubs1_then_zasubd1 |
| 66739 | 0, // zasubs1_then_zasubq0 |
| 66740 | 0, // zasubs1_then_zasubq1 |
| 66741 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66742 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66743 | 0, // zasubh1_then_zasubd0 |
| 66744 | 0, // zasubh1_then_zasubd1 |
| 66745 | 0, // zasubh1_then_zasubq0 |
| 66746 | 0, // zasubh1_then_zasubq1 |
| 66747 | 0, // zasubh1_then_zasubs0 |
| 66748 | 0, // zasubh1_then_zasubs1 |
| 66749 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66750 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66751 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66752 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66753 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66754 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66755 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66756 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66757 | 243, // dsub1_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66758 | 243, // dsub1_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66759 | 243, // dsub1_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66760 | 243, // dsub1_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66761 | 243, // dsub1_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66762 | 243, // dsub1_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66763 | 0, // dsub3_then_bsub |
| 66764 | 0, // dsub3_then_bsub_hi |
| 66765 | 0, // dsub3_then_hsub |
| 66766 | 0, // dsub3_then_hsub_hi |
| 66767 | 0, // dsub3_then_ssub |
| 66768 | 0, // dsub3_then_ssub_hi |
| 66769 | 243, // dsub2_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66770 | 243, // dsub2_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66771 | 243, // dsub2_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66772 | 243, // dsub2_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66773 | 243, // dsub2_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66774 | 243, // dsub2_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66775 | 0, // psub1_then_psub |
| 66776 | 243, // qsub1_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66777 | 0, // qsub3_then_dsub_hi |
| 66778 | 243, // qsub2_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66779 | 0, // x8sub_7_then_sub_32 |
| 66780 | 0, // x8sub_7_then_sub_32_hi |
| 66781 | 0, // x8sub_6_then_sub_32 |
| 66782 | 0, // x8sub_6_then_sub_32_hi |
| 66783 | 0, // x8sub_5_then_sub_32 |
| 66784 | 0, // x8sub_5_then_sub_32_hi |
| 66785 | 0, // x8sub_4_then_sub_32 |
| 66786 | 0, // x8sub_4_then_sub_32_hi |
| 66787 | 0, // x8sub_3_then_sub_32 |
| 66788 | 0, // x8sub_3_then_sub_32_hi |
| 66789 | 0, // x8sub_2_then_sub_32 |
| 66790 | 0, // x8sub_2_then_sub_32_hi |
| 66791 | 0, // x8sub_1_then_sub_32 |
| 66792 | 0, // x8sub_1_then_sub_32_hi |
| 66793 | 0, // subo64_then_sub_32 |
| 66794 | 0, // subo64_then_sub_32_hi |
| 66795 | 243, // zsub1_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66796 | 0, // zsub3_then_zsub_hi |
| 66797 | 243, // zsub2_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66798 | 0, // dsub0_dsub1 |
| 66799 | 0, // dsub0_dsub1_dsub2 |
| 66800 | 243, // dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66801 | 0, // dsub1_dsub2_dsub3 |
| 66802 | 0, // dsub2_dsub3 |
| 66803 | 243, // dsub_dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66804 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66805 | 243, // dsub_dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66806 | 0, // qsub0_qsub1 |
| 66807 | 0, // qsub0_qsub1_qsub2 |
| 66808 | 243, // qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66809 | 0, // qsub1_qsub2_qsub3 |
| 66810 | 0, // qsub2_qsub3 |
| 66811 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66812 | 0, // x8sub_0_x8sub_1 |
| 66813 | 0, // x8sub_2_x8sub_3 |
| 66814 | 0, // x8sub_4_x8sub_5 |
| 66815 | 0, // x8sub_6_x8sub_7 |
| 66816 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66817 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66818 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66819 | 0, // sub_32_subo64_then_sub_32 |
| 66820 | 243, // zsub_qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66821 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66822 | 243, // zsub_qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66823 | 243, // zsub0_zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66824 | 0, // zsub0_zsub1_zsub2 |
| 66825 | 243, // zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 66826 | 0, // zsub1_zsub2_zsub3 |
| 66827 | 0, // zsub2_zsub3 |
| 66828 | 0, // zsub0_zsub2 |
| 66829 | 0, // zsub1_zsub3 |
| 66830 | }, |
| 66831 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66832 | 244, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66833 | 244, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66834 | 244, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66835 | 0, // dsub0 |
| 66836 | 244, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66837 | 244, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66838 | 0, // dsub3 |
| 66839 | 244, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66840 | 244, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66841 | 244, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66842 | 0, // psub |
| 66843 | 0, // psub0 |
| 66844 | 0, // psub1 |
| 66845 | 0, // qsub0 |
| 66846 | 244, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66847 | 244, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66848 | 0, // qsub3 |
| 66849 | 244, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66850 | 244, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66851 | 0, // sub_32 |
| 66852 | 0, // sub_32_hi |
| 66853 | 0, // sube32 |
| 66854 | 0, // sube64 |
| 66855 | 0, // subo32 |
| 66856 | 0, // subo64 |
| 66857 | 0, // x8sub_0 |
| 66858 | 0, // x8sub_1 |
| 66859 | 0, // x8sub_2 |
| 66860 | 0, // x8sub_3 |
| 66861 | 0, // x8sub_4 |
| 66862 | 0, // x8sub_5 |
| 66863 | 0, // x8sub_6 |
| 66864 | 0, // x8sub_7 |
| 66865 | 0, // zasubb |
| 66866 | 0, // zasubd0 |
| 66867 | 0, // zasubd1 |
| 66868 | 0, // zasubh0 |
| 66869 | 0, // zasubh1 |
| 66870 | 0, // zasubq0 |
| 66871 | 0, // zasubq1 |
| 66872 | 0, // zasubs0 |
| 66873 | 0, // zasubs1 |
| 66874 | 244, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66875 | 244, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66876 | 244, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66877 | 244, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66878 | 0, // zsub3 |
| 66879 | 244, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66880 | 0, // zasubd1_then_zasubq0 |
| 66881 | 0, // zasubd1_then_zasubq1 |
| 66882 | 0, // zasubs1_then_zasubd0 |
| 66883 | 0, // zasubs1_then_zasubd1 |
| 66884 | 0, // zasubs1_then_zasubq0 |
| 66885 | 0, // zasubs1_then_zasubq1 |
| 66886 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 66887 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 66888 | 0, // zasubh1_then_zasubd0 |
| 66889 | 0, // zasubh1_then_zasubd1 |
| 66890 | 0, // zasubh1_then_zasubq0 |
| 66891 | 0, // zasubh1_then_zasubq1 |
| 66892 | 0, // zasubh1_then_zasubs0 |
| 66893 | 0, // zasubh1_then_zasubs1 |
| 66894 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 66895 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 66896 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 66897 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 66898 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 66899 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 66900 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 66901 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 66902 | 244, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66903 | 244, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66904 | 244, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66905 | 244, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66906 | 244, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66907 | 244, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66908 | 0, // dsub3_then_bsub |
| 66909 | 0, // dsub3_then_bsub_hi |
| 66910 | 0, // dsub3_then_hsub |
| 66911 | 0, // dsub3_then_hsub_hi |
| 66912 | 0, // dsub3_then_ssub |
| 66913 | 0, // dsub3_then_ssub_hi |
| 66914 | 244, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66915 | 244, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66916 | 244, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66917 | 244, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66918 | 244, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66919 | 244, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66920 | 0, // psub1_then_psub |
| 66921 | 244, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66922 | 0, // qsub3_then_dsub_hi |
| 66923 | 244, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66924 | 0, // x8sub_7_then_sub_32 |
| 66925 | 0, // x8sub_7_then_sub_32_hi |
| 66926 | 0, // x8sub_6_then_sub_32 |
| 66927 | 0, // x8sub_6_then_sub_32_hi |
| 66928 | 0, // x8sub_5_then_sub_32 |
| 66929 | 0, // x8sub_5_then_sub_32_hi |
| 66930 | 0, // x8sub_4_then_sub_32 |
| 66931 | 0, // x8sub_4_then_sub_32_hi |
| 66932 | 0, // x8sub_3_then_sub_32 |
| 66933 | 0, // x8sub_3_then_sub_32_hi |
| 66934 | 0, // x8sub_2_then_sub_32 |
| 66935 | 0, // x8sub_2_then_sub_32_hi |
| 66936 | 0, // x8sub_1_then_sub_32 |
| 66937 | 0, // x8sub_1_then_sub_32_hi |
| 66938 | 0, // subo64_then_sub_32 |
| 66939 | 0, // subo64_then_sub_32_hi |
| 66940 | 244, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66941 | 0, // zsub3_then_zsub_hi |
| 66942 | 244, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66943 | 0, // dsub0_dsub1 |
| 66944 | 0, // dsub0_dsub1_dsub2 |
| 66945 | 244, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66946 | 0, // dsub1_dsub2_dsub3 |
| 66947 | 0, // dsub2_dsub3 |
| 66948 | 244, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66949 | 0, // dsub_dsub1_dsub2_dsub3 |
| 66950 | 244, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66951 | 0, // qsub0_qsub1 |
| 66952 | 0, // qsub0_qsub1_qsub2 |
| 66953 | 244, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66954 | 0, // qsub1_qsub2_qsub3 |
| 66955 | 0, // qsub2_qsub3 |
| 66956 | 0, // sub_32_x8sub_1_then_sub_32 |
| 66957 | 0, // x8sub_0_x8sub_1 |
| 66958 | 0, // x8sub_2_x8sub_3 |
| 66959 | 0, // x8sub_4_x8sub_5 |
| 66960 | 0, // x8sub_6_x8sub_7 |
| 66961 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 66962 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 66963 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 66964 | 0, // sub_32_subo64_then_sub_32 |
| 66965 | 244, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66966 | 0, // zsub_qsub1_qsub2_qsub3 |
| 66967 | 244, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66968 | 244, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66969 | 0, // zsub0_zsub1_zsub2 |
| 66970 | 244, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 66971 | 0, // zsub1_zsub2_zsub3 |
| 66972 | 0, // zsub2_zsub3 |
| 66973 | 0, // zsub0_zsub2 |
| 66974 | 0, // zsub1_zsub3 |
| 66975 | }, |
| 66976 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66977 | 245, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66978 | 245, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66979 | 245, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66980 | 0, // dsub0 |
| 66981 | 245, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66982 | 245, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66983 | 0, // dsub3 |
| 66984 | 245, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66985 | 245, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66986 | 245, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66987 | 0, // psub |
| 66988 | 0, // psub0 |
| 66989 | 0, // psub1 |
| 66990 | 0, // qsub0 |
| 66991 | 245, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66992 | 245, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66993 | 0, // qsub3 |
| 66994 | 245, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66995 | 245, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 66996 | 0, // sub_32 |
| 66997 | 0, // sub_32_hi |
| 66998 | 0, // sube32 |
| 66999 | 0, // sube64 |
| 67000 | 0, // subo32 |
| 67001 | 0, // subo64 |
| 67002 | 0, // x8sub_0 |
| 67003 | 0, // x8sub_1 |
| 67004 | 0, // x8sub_2 |
| 67005 | 0, // x8sub_3 |
| 67006 | 0, // x8sub_4 |
| 67007 | 0, // x8sub_5 |
| 67008 | 0, // x8sub_6 |
| 67009 | 0, // x8sub_7 |
| 67010 | 0, // zasubb |
| 67011 | 0, // zasubd0 |
| 67012 | 0, // zasubd1 |
| 67013 | 0, // zasubh0 |
| 67014 | 0, // zasubh1 |
| 67015 | 0, // zasubq0 |
| 67016 | 0, // zasubq1 |
| 67017 | 0, // zasubs0 |
| 67018 | 0, // zasubs1 |
| 67019 | 245, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67020 | 245, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67021 | 245, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67022 | 245, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67023 | 0, // zsub3 |
| 67024 | 245, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67025 | 0, // zasubd1_then_zasubq0 |
| 67026 | 0, // zasubd1_then_zasubq1 |
| 67027 | 0, // zasubs1_then_zasubd0 |
| 67028 | 0, // zasubs1_then_zasubd1 |
| 67029 | 0, // zasubs1_then_zasubq0 |
| 67030 | 0, // zasubs1_then_zasubq1 |
| 67031 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67032 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67033 | 0, // zasubh1_then_zasubd0 |
| 67034 | 0, // zasubh1_then_zasubd1 |
| 67035 | 0, // zasubh1_then_zasubq0 |
| 67036 | 0, // zasubh1_then_zasubq1 |
| 67037 | 0, // zasubh1_then_zasubs0 |
| 67038 | 0, // zasubh1_then_zasubs1 |
| 67039 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67040 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67041 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67042 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67043 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67044 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67045 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67046 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67047 | 245, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67048 | 245, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67049 | 245, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67050 | 245, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67051 | 245, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67052 | 245, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67053 | 0, // dsub3_then_bsub |
| 67054 | 0, // dsub3_then_bsub_hi |
| 67055 | 0, // dsub3_then_hsub |
| 67056 | 0, // dsub3_then_hsub_hi |
| 67057 | 0, // dsub3_then_ssub |
| 67058 | 0, // dsub3_then_ssub_hi |
| 67059 | 245, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67060 | 245, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67061 | 245, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67062 | 245, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67063 | 245, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67064 | 245, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67065 | 0, // psub1_then_psub |
| 67066 | 245, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67067 | 0, // qsub3_then_dsub_hi |
| 67068 | 245, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67069 | 0, // x8sub_7_then_sub_32 |
| 67070 | 0, // x8sub_7_then_sub_32_hi |
| 67071 | 0, // x8sub_6_then_sub_32 |
| 67072 | 0, // x8sub_6_then_sub_32_hi |
| 67073 | 0, // x8sub_5_then_sub_32 |
| 67074 | 0, // x8sub_5_then_sub_32_hi |
| 67075 | 0, // x8sub_4_then_sub_32 |
| 67076 | 0, // x8sub_4_then_sub_32_hi |
| 67077 | 0, // x8sub_3_then_sub_32 |
| 67078 | 0, // x8sub_3_then_sub_32_hi |
| 67079 | 0, // x8sub_2_then_sub_32 |
| 67080 | 0, // x8sub_2_then_sub_32_hi |
| 67081 | 0, // x8sub_1_then_sub_32 |
| 67082 | 0, // x8sub_1_then_sub_32_hi |
| 67083 | 0, // subo64_then_sub_32 |
| 67084 | 0, // subo64_then_sub_32_hi |
| 67085 | 245, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67086 | 0, // zsub3_then_zsub_hi |
| 67087 | 245, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67088 | 0, // dsub0_dsub1 |
| 67089 | 0, // dsub0_dsub1_dsub2 |
| 67090 | 245, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67091 | 0, // dsub1_dsub2_dsub3 |
| 67092 | 0, // dsub2_dsub3 |
| 67093 | 245, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67094 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67095 | 245, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67096 | 0, // qsub0_qsub1 |
| 67097 | 0, // qsub0_qsub1_qsub2 |
| 67098 | 245, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67099 | 0, // qsub1_qsub2_qsub3 |
| 67100 | 0, // qsub2_qsub3 |
| 67101 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67102 | 0, // x8sub_0_x8sub_1 |
| 67103 | 0, // x8sub_2_x8sub_3 |
| 67104 | 0, // x8sub_4_x8sub_5 |
| 67105 | 0, // x8sub_6_x8sub_7 |
| 67106 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67107 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67108 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67109 | 0, // sub_32_subo64_then_sub_32 |
| 67110 | 245, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67111 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67112 | 245, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67113 | 245, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67114 | 0, // zsub0_zsub1_zsub2 |
| 67115 | 245, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 67116 | 0, // zsub1_zsub2_zsub3 |
| 67117 | 0, // zsub2_zsub3 |
| 67118 | 0, // zsub0_zsub2 |
| 67119 | 0, // zsub1_zsub3 |
| 67120 | }, |
| 67121 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67122 | 246, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67123 | 246, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67124 | 246, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67125 | 0, // dsub0 |
| 67126 | 246, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67127 | 246, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67128 | 0, // dsub3 |
| 67129 | 246, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67130 | 246, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67131 | 246, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67132 | 0, // psub |
| 67133 | 0, // psub0 |
| 67134 | 0, // psub1 |
| 67135 | 0, // qsub0 |
| 67136 | 246, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67137 | 246, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67138 | 0, // qsub3 |
| 67139 | 246, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67140 | 246, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67141 | 0, // sub_32 |
| 67142 | 0, // sub_32_hi |
| 67143 | 0, // sube32 |
| 67144 | 0, // sube64 |
| 67145 | 0, // subo32 |
| 67146 | 0, // subo64 |
| 67147 | 0, // x8sub_0 |
| 67148 | 0, // x8sub_1 |
| 67149 | 0, // x8sub_2 |
| 67150 | 0, // x8sub_3 |
| 67151 | 0, // x8sub_4 |
| 67152 | 0, // x8sub_5 |
| 67153 | 0, // x8sub_6 |
| 67154 | 0, // x8sub_7 |
| 67155 | 0, // zasubb |
| 67156 | 0, // zasubd0 |
| 67157 | 0, // zasubd1 |
| 67158 | 0, // zasubh0 |
| 67159 | 0, // zasubh1 |
| 67160 | 0, // zasubq0 |
| 67161 | 0, // zasubq1 |
| 67162 | 0, // zasubs0 |
| 67163 | 0, // zasubs1 |
| 67164 | 246, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67165 | 246, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67166 | 246, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67167 | 246, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67168 | 0, // zsub3 |
| 67169 | 246, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67170 | 0, // zasubd1_then_zasubq0 |
| 67171 | 0, // zasubd1_then_zasubq1 |
| 67172 | 0, // zasubs1_then_zasubd0 |
| 67173 | 0, // zasubs1_then_zasubd1 |
| 67174 | 0, // zasubs1_then_zasubq0 |
| 67175 | 0, // zasubs1_then_zasubq1 |
| 67176 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67177 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67178 | 0, // zasubh1_then_zasubd0 |
| 67179 | 0, // zasubh1_then_zasubd1 |
| 67180 | 0, // zasubh1_then_zasubq0 |
| 67181 | 0, // zasubh1_then_zasubq1 |
| 67182 | 0, // zasubh1_then_zasubs0 |
| 67183 | 0, // zasubh1_then_zasubs1 |
| 67184 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67185 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67186 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67187 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67188 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67189 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67190 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67191 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67192 | 246, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67193 | 246, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67194 | 246, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67195 | 246, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67196 | 246, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67197 | 246, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67198 | 0, // dsub3_then_bsub |
| 67199 | 0, // dsub3_then_bsub_hi |
| 67200 | 0, // dsub3_then_hsub |
| 67201 | 0, // dsub3_then_hsub_hi |
| 67202 | 0, // dsub3_then_ssub |
| 67203 | 0, // dsub3_then_ssub_hi |
| 67204 | 246, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67205 | 246, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67206 | 246, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67207 | 246, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67208 | 246, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67209 | 246, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67210 | 0, // psub1_then_psub |
| 67211 | 246, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67212 | 0, // qsub3_then_dsub_hi |
| 67213 | 246, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67214 | 0, // x8sub_7_then_sub_32 |
| 67215 | 0, // x8sub_7_then_sub_32_hi |
| 67216 | 0, // x8sub_6_then_sub_32 |
| 67217 | 0, // x8sub_6_then_sub_32_hi |
| 67218 | 0, // x8sub_5_then_sub_32 |
| 67219 | 0, // x8sub_5_then_sub_32_hi |
| 67220 | 0, // x8sub_4_then_sub_32 |
| 67221 | 0, // x8sub_4_then_sub_32_hi |
| 67222 | 0, // x8sub_3_then_sub_32 |
| 67223 | 0, // x8sub_3_then_sub_32_hi |
| 67224 | 0, // x8sub_2_then_sub_32 |
| 67225 | 0, // x8sub_2_then_sub_32_hi |
| 67226 | 0, // x8sub_1_then_sub_32 |
| 67227 | 0, // x8sub_1_then_sub_32_hi |
| 67228 | 0, // subo64_then_sub_32 |
| 67229 | 0, // subo64_then_sub_32_hi |
| 67230 | 246, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67231 | 0, // zsub3_then_zsub_hi |
| 67232 | 246, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67233 | 0, // dsub0_dsub1 |
| 67234 | 0, // dsub0_dsub1_dsub2 |
| 67235 | 246, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67236 | 0, // dsub1_dsub2_dsub3 |
| 67237 | 0, // dsub2_dsub3 |
| 67238 | 246, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67239 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67240 | 246, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67241 | 0, // qsub0_qsub1 |
| 67242 | 0, // qsub0_qsub1_qsub2 |
| 67243 | 246, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67244 | 0, // qsub1_qsub2_qsub3 |
| 67245 | 0, // qsub2_qsub3 |
| 67246 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67247 | 0, // x8sub_0_x8sub_1 |
| 67248 | 0, // x8sub_2_x8sub_3 |
| 67249 | 0, // x8sub_4_x8sub_5 |
| 67250 | 0, // x8sub_6_x8sub_7 |
| 67251 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67252 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67253 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67254 | 0, // sub_32_subo64_then_sub_32 |
| 67255 | 246, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67256 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67257 | 246, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67258 | 246, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67259 | 0, // zsub0_zsub1_zsub2 |
| 67260 | 246, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 67261 | 0, // zsub1_zsub2_zsub3 |
| 67262 | 0, // zsub2_zsub3 |
| 67263 | 0, // zsub0_zsub2 |
| 67264 | 0, // zsub1_zsub3 |
| 67265 | }, |
| 67266 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67267 | 247, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67268 | 247, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67269 | 247, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67270 | 0, // dsub0 |
| 67271 | 247, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67272 | 247, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67273 | 0, // dsub3 |
| 67274 | 247, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67275 | 247, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67276 | 247, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67277 | 0, // psub |
| 67278 | 0, // psub0 |
| 67279 | 0, // psub1 |
| 67280 | 0, // qsub0 |
| 67281 | 247, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67282 | 247, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67283 | 0, // qsub3 |
| 67284 | 247, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67285 | 247, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67286 | 0, // sub_32 |
| 67287 | 0, // sub_32_hi |
| 67288 | 0, // sube32 |
| 67289 | 0, // sube64 |
| 67290 | 0, // subo32 |
| 67291 | 0, // subo64 |
| 67292 | 0, // x8sub_0 |
| 67293 | 0, // x8sub_1 |
| 67294 | 0, // x8sub_2 |
| 67295 | 0, // x8sub_3 |
| 67296 | 0, // x8sub_4 |
| 67297 | 0, // x8sub_5 |
| 67298 | 0, // x8sub_6 |
| 67299 | 0, // x8sub_7 |
| 67300 | 0, // zasubb |
| 67301 | 0, // zasubd0 |
| 67302 | 0, // zasubd1 |
| 67303 | 0, // zasubh0 |
| 67304 | 0, // zasubh1 |
| 67305 | 0, // zasubq0 |
| 67306 | 0, // zasubq1 |
| 67307 | 0, // zasubs0 |
| 67308 | 0, // zasubs1 |
| 67309 | 247, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67310 | 247, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67311 | 247, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67312 | 247, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67313 | 0, // zsub3 |
| 67314 | 247, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67315 | 0, // zasubd1_then_zasubq0 |
| 67316 | 0, // zasubd1_then_zasubq1 |
| 67317 | 0, // zasubs1_then_zasubd0 |
| 67318 | 0, // zasubs1_then_zasubd1 |
| 67319 | 0, // zasubs1_then_zasubq0 |
| 67320 | 0, // zasubs1_then_zasubq1 |
| 67321 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67322 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67323 | 0, // zasubh1_then_zasubd0 |
| 67324 | 0, // zasubh1_then_zasubd1 |
| 67325 | 0, // zasubh1_then_zasubq0 |
| 67326 | 0, // zasubh1_then_zasubq1 |
| 67327 | 0, // zasubh1_then_zasubs0 |
| 67328 | 0, // zasubh1_then_zasubs1 |
| 67329 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67330 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67331 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67332 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67333 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67334 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67335 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67336 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67337 | 247, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67338 | 247, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67339 | 247, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67340 | 247, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67341 | 247, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67342 | 247, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67343 | 0, // dsub3_then_bsub |
| 67344 | 0, // dsub3_then_bsub_hi |
| 67345 | 0, // dsub3_then_hsub |
| 67346 | 0, // dsub3_then_hsub_hi |
| 67347 | 0, // dsub3_then_ssub |
| 67348 | 0, // dsub3_then_ssub_hi |
| 67349 | 247, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67350 | 247, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67351 | 247, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67352 | 247, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67353 | 247, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67354 | 247, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67355 | 0, // psub1_then_psub |
| 67356 | 247, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67357 | 0, // qsub3_then_dsub_hi |
| 67358 | 247, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67359 | 0, // x8sub_7_then_sub_32 |
| 67360 | 0, // x8sub_7_then_sub_32_hi |
| 67361 | 0, // x8sub_6_then_sub_32 |
| 67362 | 0, // x8sub_6_then_sub_32_hi |
| 67363 | 0, // x8sub_5_then_sub_32 |
| 67364 | 0, // x8sub_5_then_sub_32_hi |
| 67365 | 0, // x8sub_4_then_sub_32 |
| 67366 | 0, // x8sub_4_then_sub_32_hi |
| 67367 | 0, // x8sub_3_then_sub_32 |
| 67368 | 0, // x8sub_3_then_sub_32_hi |
| 67369 | 0, // x8sub_2_then_sub_32 |
| 67370 | 0, // x8sub_2_then_sub_32_hi |
| 67371 | 0, // x8sub_1_then_sub_32 |
| 67372 | 0, // x8sub_1_then_sub_32_hi |
| 67373 | 0, // subo64_then_sub_32 |
| 67374 | 0, // subo64_then_sub_32_hi |
| 67375 | 247, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67376 | 0, // zsub3_then_zsub_hi |
| 67377 | 247, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67378 | 0, // dsub0_dsub1 |
| 67379 | 0, // dsub0_dsub1_dsub2 |
| 67380 | 247, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67381 | 0, // dsub1_dsub2_dsub3 |
| 67382 | 0, // dsub2_dsub3 |
| 67383 | 247, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67384 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67385 | 247, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67386 | 0, // qsub0_qsub1 |
| 67387 | 0, // qsub0_qsub1_qsub2 |
| 67388 | 247, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67389 | 0, // qsub1_qsub2_qsub3 |
| 67390 | 0, // qsub2_qsub3 |
| 67391 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67392 | 0, // x8sub_0_x8sub_1 |
| 67393 | 0, // x8sub_2_x8sub_3 |
| 67394 | 0, // x8sub_4_x8sub_5 |
| 67395 | 0, // x8sub_6_x8sub_7 |
| 67396 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67397 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67398 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67399 | 0, // sub_32_subo64_then_sub_32 |
| 67400 | 247, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67401 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67402 | 247, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67403 | 247, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67404 | 0, // zsub0_zsub1_zsub2 |
| 67405 | 247, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 67406 | 0, // zsub1_zsub2_zsub3 |
| 67407 | 0, // zsub2_zsub3 |
| 67408 | 0, // zsub0_zsub2 |
| 67409 | 0, // zsub1_zsub3 |
| 67410 | }, |
| 67411 | { // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67412 | 248, // bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67413 | 248, // bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67414 | 248, // dsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67415 | 0, // dsub0 |
| 67416 | 248, // dsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67417 | 248, // dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67418 | 0, // dsub3 |
| 67419 | 248, // dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67420 | 248, // hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67421 | 248, // hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67422 | 0, // psub |
| 67423 | 0, // psub0 |
| 67424 | 0, // psub1 |
| 67425 | 248, // qsub0 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67426 | 248, // qsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67427 | 248, // qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67428 | 0, // qsub3 |
| 67429 | 248, // ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67430 | 248, // ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67431 | 0, // sub_32 |
| 67432 | 0, // sub_32_hi |
| 67433 | 0, // sube32 |
| 67434 | 0, // sube64 |
| 67435 | 0, // subo32 |
| 67436 | 0, // subo64 |
| 67437 | 0, // x8sub_0 |
| 67438 | 0, // x8sub_1 |
| 67439 | 0, // x8sub_2 |
| 67440 | 0, // x8sub_3 |
| 67441 | 0, // x8sub_4 |
| 67442 | 0, // x8sub_5 |
| 67443 | 0, // x8sub_6 |
| 67444 | 0, // x8sub_7 |
| 67445 | 0, // zasubb |
| 67446 | 0, // zasubd0 |
| 67447 | 0, // zasubd1 |
| 67448 | 0, // zasubh0 |
| 67449 | 0, // zasubh1 |
| 67450 | 0, // zasubq0 |
| 67451 | 0, // zasubq1 |
| 67452 | 0, // zasubs0 |
| 67453 | 0, // zasubs1 |
| 67454 | 0, // zsub |
| 67455 | 0, // zsub0 |
| 67456 | 0, // zsub1 |
| 67457 | 0, // zsub2 |
| 67458 | 0, // zsub3 |
| 67459 | 0, // zsub_hi |
| 67460 | 0, // zasubd1_then_zasubq0 |
| 67461 | 0, // zasubd1_then_zasubq1 |
| 67462 | 0, // zasubs1_then_zasubd0 |
| 67463 | 0, // zasubs1_then_zasubd1 |
| 67464 | 0, // zasubs1_then_zasubq0 |
| 67465 | 0, // zasubs1_then_zasubq1 |
| 67466 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67467 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67468 | 0, // zasubh1_then_zasubd0 |
| 67469 | 0, // zasubh1_then_zasubd1 |
| 67470 | 0, // zasubh1_then_zasubq0 |
| 67471 | 0, // zasubh1_then_zasubq1 |
| 67472 | 0, // zasubh1_then_zasubs0 |
| 67473 | 0, // zasubh1_then_zasubs1 |
| 67474 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67475 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67476 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67477 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67478 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67479 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67480 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67481 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67482 | 248, // dsub1_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67483 | 248, // dsub1_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67484 | 248, // dsub1_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67485 | 248, // dsub1_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67486 | 248, // dsub1_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67487 | 248, // dsub1_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67488 | 0, // dsub3_then_bsub |
| 67489 | 0, // dsub3_then_bsub_hi |
| 67490 | 0, // dsub3_then_hsub |
| 67491 | 0, // dsub3_then_hsub_hi |
| 67492 | 0, // dsub3_then_ssub |
| 67493 | 0, // dsub3_then_ssub_hi |
| 67494 | 248, // dsub2_then_bsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67495 | 248, // dsub2_then_bsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67496 | 248, // dsub2_then_hsub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67497 | 248, // dsub2_then_hsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67498 | 248, // dsub2_then_ssub -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67499 | 248, // dsub2_then_ssub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67500 | 0, // psub1_then_psub |
| 67501 | 248, // qsub1_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67502 | 0, // qsub3_then_dsub_hi |
| 67503 | 248, // qsub2_then_dsub_hi -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67504 | 0, // x8sub_7_then_sub_32 |
| 67505 | 0, // x8sub_7_then_sub_32_hi |
| 67506 | 0, // x8sub_6_then_sub_32 |
| 67507 | 0, // x8sub_6_then_sub_32_hi |
| 67508 | 0, // x8sub_5_then_sub_32 |
| 67509 | 0, // x8sub_5_then_sub_32_hi |
| 67510 | 0, // x8sub_4_then_sub_32 |
| 67511 | 0, // x8sub_4_then_sub_32_hi |
| 67512 | 0, // x8sub_3_then_sub_32 |
| 67513 | 0, // x8sub_3_then_sub_32_hi |
| 67514 | 0, // x8sub_2_then_sub_32 |
| 67515 | 0, // x8sub_2_then_sub_32_hi |
| 67516 | 0, // x8sub_1_then_sub_32 |
| 67517 | 0, // x8sub_1_then_sub_32_hi |
| 67518 | 0, // subo64_then_sub_32 |
| 67519 | 0, // subo64_then_sub_32_hi |
| 67520 | 0, // zsub1_then_zsub_hi |
| 67521 | 0, // zsub3_then_zsub_hi |
| 67522 | 0, // zsub2_then_zsub_hi |
| 67523 | 0, // dsub0_dsub1 |
| 67524 | 0, // dsub0_dsub1_dsub2 |
| 67525 | 248, // dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67526 | 0, // dsub1_dsub2_dsub3 |
| 67527 | 0, // dsub2_dsub3 |
| 67528 | 248, // dsub_dsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67529 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67530 | 248, // dsub_dsub1_dsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67531 | 248, // qsub0_qsub1 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67532 | 0, // qsub0_qsub1_qsub2 |
| 67533 | 248, // qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 67534 | 0, // qsub1_qsub2_qsub3 |
| 67535 | 0, // qsub2_qsub3 |
| 67536 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67537 | 0, // x8sub_0_x8sub_1 |
| 67538 | 0, // x8sub_2_x8sub_3 |
| 67539 | 0, // x8sub_4_x8sub_5 |
| 67540 | 0, // x8sub_6_x8sub_7 |
| 67541 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67542 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67543 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67544 | 0, // sub_32_subo64_then_sub_32 |
| 67545 | 0, // zsub_qsub1 |
| 67546 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67547 | 0, // zsub_qsub1_qsub2 |
| 67548 | 0, // zsub0_zsub1 |
| 67549 | 0, // zsub0_zsub1_zsub2 |
| 67550 | 0, // zsub1_zsub2 |
| 67551 | 0, // zsub1_zsub2_zsub3 |
| 67552 | 0, // zsub2_zsub3 |
| 67553 | 0, // zsub0_zsub2 |
| 67554 | 0, // zsub1_zsub3 |
| 67555 | }, |
| 67556 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67557 | 249, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67558 | 249, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67559 | 249, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67560 | 0, // dsub0 |
| 67561 | 249, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67562 | 249, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67563 | 0, // dsub3 |
| 67564 | 249, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67565 | 249, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67566 | 249, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67567 | 0, // psub |
| 67568 | 0, // psub0 |
| 67569 | 0, // psub1 |
| 67570 | 0, // qsub0 |
| 67571 | 249, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67572 | 249, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67573 | 0, // qsub3 |
| 67574 | 249, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67575 | 249, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67576 | 0, // sub_32 |
| 67577 | 0, // sub_32_hi |
| 67578 | 0, // sube32 |
| 67579 | 0, // sube64 |
| 67580 | 0, // subo32 |
| 67581 | 0, // subo64 |
| 67582 | 0, // x8sub_0 |
| 67583 | 0, // x8sub_1 |
| 67584 | 0, // x8sub_2 |
| 67585 | 0, // x8sub_3 |
| 67586 | 0, // x8sub_4 |
| 67587 | 0, // x8sub_5 |
| 67588 | 0, // x8sub_6 |
| 67589 | 0, // x8sub_7 |
| 67590 | 0, // zasubb |
| 67591 | 0, // zasubd0 |
| 67592 | 0, // zasubd1 |
| 67593 | 0, // zasubh0 |
| 67594 | 0, // zasubh1 |
| 67595 | 0, // zasubq0 |
| 67596 | 0, // zasubq1 |
| 67597 | 0, // zasubs0 |
| 67598 | 0, // zasubs1 |
| 67599 | 249, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67600 | 249, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67601 | 249, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67602 | 249, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67603 | 0, // zsub3 |
| 67604 | 249, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67605 | 0, // zasubd1_then_zasubq0 |
| 67606 | 0, // zasubd1_then_zasubq1 |
| 67607 | 0, // zasubs1_then_zasubd0 |
| 67608 | 0, // zasubs1_then_zasubd1 |
| 67609 | 0, // zasubs1_then_zasubq0 |
| 67610 | 0, // zasubs1_then_zasubq1 |
| 67611 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67612 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67613 | 0, // zasubh1_then_zasubd0 |
| 67614 | 0, // zasubh1_then_zasubd1 |
| 67615 | 0, // zasubh1_then_zasubq0 |
| 67616 | 0, // zasubh1_then_zasubq1 |
| 67617 | 0, // zasubh1_then_zasubs0 |
| 67618 | 0, // zasubh1_then_zasubs1 |
| 67619 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67620 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67621 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67622 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67623 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67624 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67625 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67626 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67627 | 249, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67628 | 249, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67629 | 249, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67630 | 249, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67631 | 249, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67632 | 249, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67633 | 0, // dsub3_then_bsub |
| 67634 | 0, // dsub3_then_bsub_hi |
| 67635 | 0, // dsub3_then_hsub |
| 67636 | 0, // dsub3_then_hsub_hi |
| 67637 | 0, // dsub3_then_ssub |
| 67638 | 0, // dsub3_then_ssub_hi |
| 67639 | 249, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67640 | 249, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67641 | 249, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67642 | 249, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67643 | 249, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67644 | 249, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67645 | 0, // psub1_then_psub |
| 67646 | 249, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67647 | 0, // qsub3_then_dsub_hi |
| 67648 | 249, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67649 | 0, // x8sub_7_then_sub_32 |
| 67650 | 0, // x8sub_7_then_sub_32_hi |
| 67651 | 0, // x8sub_6_then_sub_32 |
| 67652 | 0, // x8sub_6_then_sub_32_hi |
| 67653 | 0, // x8sub_5_then_sub_32 |
| 67654 | 0, // x8sub_5_then_sub_32_hi |
| 67655 | 0, // x8sub_4_then_sub_32 |
| 67656 | 0, // x8sub_4_then_sub_32_hi |
| 67657 | 0, // x8sub_3_then_sub_32 |
| 67658 | 0, // x8sub_3_then_sub_32_hi |
| 67659 | 0, // x8sub_2_then_sub_32 |
| 67660 | 0, // x8sub_2_then_sub_32_hi |
| 67661 | 0, // x8sub_1_then_sub_32 |
| 67662 | 0, // x8sub_1_then_sub_32_hi |
| 67663 | 0, // subo64_then_sub_32 |
| 67664 | 0, // subo64_then_sub_32_hi |
| 67665 | 249, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67666 | 0, // zsub3_then_zsub_hi |
| 67667 | 249, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67668 | 0, // dsub0_dsub1 |
| 67669 | 0, // dsub0_dsub1_dsub2 |
| 67670 | 249, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67671 | 0, // dsub1_dsub2_dsub3 |
| 67672 | 0, // dsub2_dsub3 |
| 67673 | 249, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67674 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67675 | 249, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67676 | 0, // qsub0_qsub1 |
| 67677 | 0, // qsub0_qsub1_qsub2 |
| 67678 | 249, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67679 | 0, // qsub1_qsub2_qsub3 |
| 67680 | 0, // qsub2_qsub3 |
| 67681 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67682 | 0, // x8sub_0_x8sub_1 |
| 67683 | 0, // x8sub_2_x8sub_3 |
| 67684 | 0, // x8sub_4_x8sub_5 |
| 67685 | 0, // x8sub_6_x8sub_7 |
| 67686 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67687 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67688 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67689 | 0, // sub_32_subo64_then_sub_32 |
| 67690 | 249, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67691 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67692 | 249, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67693 | 249, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67694 | 0, // zsub0_zsub1_zsub2 |
| 67695 | 249, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 67696 | 0, // zsub1_zsub2_zsub3 |
| 67697 | 0, // zsub2_zsub3 |
| 67698 | 0, // zsub0_zsub2 |
| 67699 | 0, // zsub1_zsub3 |
| 67700 | }, |
| 67701 | { // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67702 | 250, // bsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67703 | 250, // bsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67704 | 250, // dsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67705 | 0, // dsub0 |
| 67706 | 250, // dsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67707 | 250, // dsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67708 | 0, // dsub3 |
| 67709 | 250, // dsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67710 | 250, // hsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67711 | 250, // hsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67712 | 0, // psub |
| 67713 | 0, // psub0 |
| 67714 | 0, // psub1 |
| 67715 | 0, // qsub0 |
| 67716 | 250, // qsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67717 | 250, // qsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67718 | 0, // qsub3 |
| 67719 | 250, // ssub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67720 | 250, // ssub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67721 | 0, // sub_32 |
| 67722 | 0, // sub_32_hi |
| 67723 | 0, // sube32 |
| 67724 | 0, // sube64 |
| 67725 | 0, // subo32 |
| 67726 | 0, // subo64 |
| 67727 | 0, // x8sub_0 |
| 67728 | 0, // x8sub_1 |
| 67729 | 0, // x8sub_2 |
| 67730 | 0, // x8sub_3 |
| 67731 | 0, // x8sub_4 |
| 67732 | 0, // x8sub_5 |
| 67733 | 0, // x8sub_6 |
| 67734 | 0, // x8sub_7 |
| 67735 | 0, // zasubb |
| 67736 | 0, // zasubd0 |
| 67737 | 0, // zasubd1 |
| 67738 | 0, // zasubh0 |
| 67739 | 0, // zasubh1 |
| 67740 | 0, // zasubq0 |
| 67741 | 0, // zasubq1 |
| 67742 | 0, // zasubs0 |
| 67743 | 0, // zasubs1 |
| 67744 | 250, // zsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67745 | 250, // zsub0 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67746 | 250, // zsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67747 | 250, // zsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67748 | 0, // zsub3 |
| 67749 | 250, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67750 | 0, // zasubd1_then_zasubq0 |
| 67751 | 0, // zasubd1_then_zasubq1 |
| 67752 | 0, // zasubs1_then_zasubd0 |
| 67753 | 0, // zasubs1_then_zasubd1 |
| 67754 | 0, // zasubs1_then_zasubq0 |
| 67755 | 0, // zasubs1_then_zasubq1 |
| 67756 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67757 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67758 | 0, // zasubh1_then_zasubd0 |
| 67759 | 0, // zasubh1_then_zasubd1 |
| 67760 | 0, // zasubh1_then_zasubq0 |
| 67761 | 0, // zasubh1_then_zasubq1 |
| 67762 | 0, // zasubh1_then_zasubs0 |
| 67763 | 0, // zasubh1_then_zasubs1 |
| 67764 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67765 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67766 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67767 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67768 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67769 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67770 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67771 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67772 | 250, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67773 | 250, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67774 | 250, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67775 | 250, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67776 | 250, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67777 | 250, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67778 | 0, // dsub3_then_bsub |
| 67779 | 0, // dsub3_then_bsub_hi |
| 67780 | 0, // dsub3_then_hsub |
| 67781 | 0, // dsub3_then_hsub_hi |
| 67782 | 0, // dsub3_then_ssub |
| 67783 | 0, // dsub3_then_ssub_hi |
| 67784 | 250, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67785 | 250, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67786 | 250, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67787 | 250, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67788 | 250, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67789 | 250, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67790 | 0, // psub1_then_psub |
| 67791 | 250, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67792 | 0, // qsub3_then_dsub_hi |
| 67793 | 250, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67794 | 0, // x8sub_7_then_sub_32 |
| 67795 | 0, // x8sub_7_then_sub_32_hi |
| 67796 | 0, // x8sub_6_then_sub_32 |
| 67797 | 0, // x8sub_6_then_sub_32_hi |
| 67798 | 0, // x8sub_5_then_sub_32 |
| 67799 | 0, // x8sub_5_then_sub_32_hi |
| 67800 | 0, // x8sub_4_then_sub_32 |
| 67801 | 0, // x8sub_4_then_sub_32_hi |
| 67802 | 0, // x8sub_3_then_sub_32 |
| 67803 | 0, // x8sub_3_then_sub_32_hi |
| 67804 | 0, // x8sub_2_then_sub_32 |
| 67805 | 0, // x8sub_2_then_sub_32_hi |
| 67806 | 0, // x8sub_1_then_sub_32 |
| 67807 | 0, // x8sub_1_then_sub_32_hi |
| 67808 | 0, // subo64_then_sub_32 |
| 67809 | 0, // subo64_then_sub_32_hi |
| 67810 | 250, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67811 | 0, // zsub3_then_zsub_hi |
| 67812 | 250, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67813 | 0, // dsub0_dsub1 |
| 67814 | 0, // dsub0_dsub1_dsub2 |
| 67815 | 250, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67816 | 0, // dsub1_dsub2_dsub3 |
| 67817 | 0, // dsub2_dsub3 |
| 67818 | 250, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67819 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67820 | 250, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67821 | 0, // qsub0_qsub1 |
| 67822 | 0, // qsub0_qsub1_qsub2 |
| 67823 | 250, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67824 | 0, // qsub1_qsub2_qsub3 |
| 67825 | 0, // qsub2_qsub3 |
| 67826 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67827 | 0, // x8sub_0_x8sub_1 |
| 67828 | 0, // x8sub_2_x8sub_3 |
| 67829 | 0, // x8sub_4_x8sub_5 |
| 67830 | 0, // x8sub_6_x8sub_7 |
| 67831 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67832 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67833 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67834 | 0, // sub_32_subo64_then_sub_32 |
| 67835 | 250, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67836 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67837 | 250, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67838 | 250, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67839 | 0, // zsub0_zsub1_zsub2 |
| 67840 | 250, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 67841 | 0, // zsub1_zsub2_zsub3 |
| 67842 | 0, // zsub2_zsub3 |
| 67843 | 0, // zsub0_zsub2 |
| 67844 | 0, // zsub1_zsub3 |
| 67845 | }, |
| 67846 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67847 | 251, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67848 | 251, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67849 | 251, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67850 | 0, // dsub0 |
| 67851 | 251, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67852 | 251, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67853 | 0, // dsub3 |
| 67854 | 251, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67855 | 251, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67856 | 251, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67857 | 0, // psub |
| 67858 | 0, // psub0 |
| 67859 | 0, // psub1 |
| 67860 | 0, // qsub0 |
| 67861 | 251, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67862 | 251, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67863 | 0, // qsub3 |
| 67864 | 251, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67865 | 251, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67866 | 0, // sub_32 |
| 67867 | 0, // sub_32_hi |
| 67868 | 0, // sube32 |
| 67869 | 0, // sube64 |
| 67870 | 0, // subo32 |
| 67871 | 0, // subo64 |
| 67872 | 0, // x8sub_0 |
| 67873 | 0, // x8sub_1 |
| 67874 | 0, // x8sub_2 |
| 67875 | 0, // x8sub_3 |
| 67876 | 0, // x8sub_4 |
| 67877 | 0, // x8sub_5 |
| 67878 | 0, // x8sub_6 |
| 67879 | 0, // x8sub_7 |
| 67880 | 0, // zasubb |
| 67881 | 0, // zasubd0 |
| 67882 | 0, // zasubd1 |
| 67883 | 0, // zasubh0 |
| 67884 | 0, // zasubh1 |
| 67885 | 0, // zasubq0 |
| 67886 | 0, // zasubq1 |
| 67887 | 0, // zasubs0 |
| 67888 | 0, // zasubs1 |
| 67889 | 251, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67890 | 251, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67891 | 251, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67892 | 251, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67893 | 0, // zsub3 |
| 67894 | 251, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67895 | 0, // zasubd1_then_zasubq0 |
| 67896 | 0, // zasubd1_then_zasubq1 |
| 67897 | 0, // zasubs1_then_zasubd0 |
| 67898 | 0, // zasubs1_then_zasubd1 |
| 67899 | 0, // zasubs1_then_zasubq0 |
| 67900 | 0, // zasubs1_then_zasubq1 |
| 67901 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 67902 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 67903 | 0, // zasubh1_then_zasubd0 |
| 67904 | 0, // zasubh1_then_zasubd1 |
| 67905 | 0, // zasubh1_then_zasubq0 |
| 67906 | 0, // zasubh1_then_zasubq1 |
| 67907 | 0, // zasubh1_then_zasubs0 |
| 67908 | 0, // zasubh1_then_zasubs1 |
| 67909 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 67910 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 67911 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 67912 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 67913 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 67914 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 67915 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 67916 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 67917 | 251, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67918 | 251, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67919 | 251, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67920 | 251, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67921 | 251, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67922 | 251, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67923 | 0, // dsub3_then_bsub |
| 67924 | 0, // dsub3_then_bsub_hi |
| 67925 | 0, // dsub3_then_hsub |
| 67926 | 0, // dsub3_then_hsub_hi |
| 67927 | 0, // dsub3_then_ssub |
| 67928 | 0, // dsub3_then_ssub_hi |
| 67929 | 251, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67930 | 251, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67931 | 251, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67932 | 251, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67933 | 251, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67934 | 251, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67935 | 0, // psub1_then_psub |
| 67936 | 251, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67937 | 0, // qsub3_then_dsub_hi |
| 67938 | 251, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67939 | 0, // x8sub_7_then_sub_32 |
| 67940 | 0, // x8sub_7_then_sub_32_hi |
| 67941 | 0, // x8sub_6_then_sub_32 |
| 67942 | 0, // x8sub_6_then_sub_32_hi |
| 67943 | 0, // x8sub_5_then_sub_32 |
| 67944 | 0, // x8sub_5_then_sub_32_hi |
| 67945 | 0, // x8sub_4_then_sub_32 |
| 67946 | 0, // x8sub_4_then_sub_32_hi |
| 67947 | 0, // x8sub_3_then_sub_32 |
| 67948 | 0, // x8sub_3_then_sub_32_hi |
| 67949 | 0, // x8sub_2_then_sub_32 |
| 67950 | 0, // x8sub_2_then_sub_32_hi |
| 67951 | 0, // x8sub_1_then_sub_32 |
| 67952 | 0, // x8sub_1_then_sub_32_hi |
| 67953 | 0, // subo64_then_sub_32 |
| 67954 | 0, // subo64_then_sub_32_hi |
| 67955 | 251, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67956 | 0, // zsub3_then_zsub_hi |
| 67957 | 251, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67958 | 0, // dsub0_dsub1 |
| 67959 | 0, // dsub0_dsub1_dsub2 |
| 67960 | 251, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67961 | 0, // dsub1_dsub2_dsub3 |
| 67962 | 0, // dsub2_dsub3 |
| 67963 | 251, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67964 | 0, // dsub_dsub1_dsub2_dsub3 |
| 67965 | 251, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67966 | 0, // qsub0_qsub1 |
| 67967 | 0, // qsub0_qsub1_qsub2 |
| 67968 | 251, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67969 | 0, // qsub1_qsub2_qsub3 |
| 67970 | 0, // qsub2_qsub3 |
| 67971 | 0, // sub_32_x8sub_1_then_sub_32 |
| 67972 | 0, // x8sub_0_x8sub_1 |
| 67973 | 0, // x8sub_2_x8sub_3 |
| 67974 | 0, // x8sub_4_x8sub_5 |
| 67975 | 0, // x8sub_6_x8sub_7 |
| 67976 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 67977 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 67978 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 67979 | 0, // sub_32_subo64_then_sub_32 |
| 67980 | 251, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67981 | 0, // zsub_qsub1_qsub2_qsub3 |
| 67982 | 251, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67983 | 251, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67984 | 0, // zsub0_zsub1_zsub2 |
| 67985 | 251, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 67986 | 0, // zsub1_zsub2_zsub3 |
| 67987 | 0, // zsub2_zsub3 |
| 67988 | 0, // zsub0_zsub2 |
| 67989 | 0, // zsub1_zsub3 |
| 67990 | }, |
| 67991 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67992 | 252, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67993 | 252, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67994 | 252, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67995 | 0, // dsub0 |
| 67996 | 252, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67997 | 252, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 67998 | 0, // dsub3 |
| 67999 | 252, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68000 | 252, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68001 | 252, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68002 | 0, // psub |
| 68003 | 0, // psub0 |
| 68004 | 0, // psub1 |
| 68005 | 0, // qsub0 |
| 68006 | 252, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68007 | 252, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68008 | 0, // qsub3 |
| 68009 | 252, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68010 | 252, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68011 | 0, // sub_32 |
| 68012 | 0, // sub_32_hi |
| 68013 | 0, // sube32 |
| 68014 | 0, // sube64 |
| 68015 | 0, // subo32 |
| 68016 | 0, // subo64 |
| 68017 | 0, // x8sub_0 |
| 68018 | 0, // x8sub_1 |
| 68019 | 0, // x8sub_2 |
| 68020 | 0, // x8sub_3 |
| 68021 | 0, // x8sub_4 |
| 68022 | 0, // x8sub_5 |
| 68023 | 0, // x8sub_6 |
| 68024 | 0, // x8sub_7 |
| 68025 | 0, // zasubb |
| 68026 | 0, // zasubd0 |
| 68027 | 0, // zasubd1 |
| 68028 | 0, // zasubh0 |
| 68029 | 0, // zasubh1 |
| 68030 | 0, // zasubq0 |
| 68031 | 0, // zasubq1 |
| 68032 | 0, // zasubs0 |
| 68033 | 0, // zasubs1 |
| 68034 | 252, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68035 | 252, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68036 | 252, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68037 | 252, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68038 | 0, // zsub3 |
| 68039 | 252, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68040 | 0, // zasubd1_then_zasubq0 |
| 68041 | 0, // zasubd1_then_zasubq1 |
| 68042 | 0, // zasubs1_then_zasubd0 |
| 68043 | 0, // zasubs1_then_zasubd1 |
| 68044 | 0, // zasubs1_then_zasubq0 |
| 68045 | 0, // zasubs1_then_zasubq1 |
| 68046 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68047 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68048 | 0, // zasubh1_then_zasubd0 |
| 68049 | 0, // zasubh1_then_zasubd1 |
| 68050 | 0, // zasubh1_then_zasubq0 |
| 68051 | 0, // zasubh1_then_zasubq1 |
| 68052 | 0, // zasubh1_then_zasubs0 |
| 68053 | 0, // zasubh1_then_zasubs1 |
| 68054 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68055 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68056 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68057 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68058 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68059 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68060 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68061 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68062 | 252, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68063 | 252, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68064 | 252, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68065 | 252, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68066 | 252, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68067 | 252, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68068 | 0, // dsub3_then_bsub |
| 68069 | 0, // dsub3_then_bsub_hi |
| 68070 | 0, // dsub3_then_hsub |
| 68071 | 0, // dsub3_then_hsub_hi |
| 68072 | 0, // dsub3_then_ssub |
| 68073 | 0, // dsub3_then_ssub_hi |
| 68074 | 252, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68075 | 252, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68076 | 252, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68077 | 252, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68078 | 252, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68079 | 252, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68080 | 0, // psub1_then_psub |
| 68081 | 252, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68082 | 0, // qsub3_then_dsub_hi |
| 68083 | 252, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68084 | 0, // x8sub_7_then_sub_32 |
| 68085 | 0, // x8sub_7_then_sub_32_hi |
| 68086 | 0, // x8sub_6_then_sub_32 |
| 68087 | 0, // x8sub_6_then_sub_32_hi |
| 68088 | 0, // x8sub_5_then_sub_32 |
| 68089 | 0, // x8sub_5_then_sub_32_hi |
| 68090 | 0, // x8sub_4_then_sub_32 |
| 68091 | 0, // x8sub_4_then_sub_32_hi |
| 68092 | 0, // x8sub_3_then_sub_32 |
| 68093 | 0, // x8sub_3_then_sub_32_hi |
| 68094 | 0, // x8sub_2_then_sub_32 |
| 68095 | 0, // x8sub_2_then_sub_32_hi |
| 68096 | 0, // x8sub_1_then_sub_32 |
| 68097 | 0, // x8sub_1_then_sub_32_hi |
| 68098 | 0, // subo64_then_sub_32 |
| 68099 | 0, // subo64_then_sub_32_hi |
| 68100 | 252, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68101 | 0, // zsub3_then_zsub_hi |
| 68102 | 252, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68103 | 0, // dsub0_dsub1 |
| 68104 | 0, // dsub0_dsub1_dsub2 |
| 68105 | 252, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68106 | 0, // dsub1_dsub2_dsub3 |
| 68107 | 0, // dsub2_dsub3 |
| 68108 | 252, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68109 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68110 | 252, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68111 | 0, // qsub0_qsub1 |
| 68112 | 0, // qsub0_qsub1_qsub2 |
| 68113 | 252, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68114 | 0, // qsub1_qsub2_qsub3 |
| 68115 | 0, // qsub2_qsub3 |
| 68116 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68117 | 0, // x8sub_0_x8sub_1 |
| 68118 | 0, // x8sub_2_x8sub_3 |
| 68119 | 0, // x8sub_4_x8sub_5 |
| 68120 | 0, // x8sub_6_x8sub_7 |
| 68121 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68122 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68123 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68124 | 0, // sub_32_subo64_then_sub_32 |
| 68125 | 252, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68126 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68127 | 252, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68128 | 252, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68129 | 0, // zsub0_zsub1_zsub2 |
| 68130 | 252, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 68131 | 0, // zsub1_zsub2_zsub3 |
| 68132 | 0, // zsub2_zsub3 |
| 68133 | 0, // zsub0_zsub2 |
| 68134 | 0, // zsub1_zsub3 |
| 68135 | }, |
| 68136 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68137 | 253, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68138 | 253, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68139 | 253, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68140 | 0, // dsub0 |
| 68141 | 253, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68142 | 253, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68143 | 0, // dsub3 |
| 68144 | 253, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68145 | 253, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68146 | 253, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68147 | 0, // psub |
| 68148 | 0, // psub0 |
| 68149 | 0, // psub1 |
| 68150 | 0, // qsub0 |
| 68151 | 253, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68152 | 253, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68153 | 0, // qsub3 |
| 68154 | 253, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68155 | 253, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68156 | 0, // sub_32 |
| 68157 | 0, // sub_32_hi |
| 68158 | 0, // sube32 |
| 68159 | 0, // sube64 |
| 68160 | 0, // subo32 |
| 68161 | 0, // subo64 |
| 68162 | 0, // x8sub_0 |
| 68163 | 0, // x8sub_1 |
| 68164 | 0, // x8sub_2 |
| 68165 | 0, // x8sub_3 |
| 68166 | 0, // x8sub_4 |
| 68167 | 0, // x8sub_5 |
| 68168 | 0, // x8sub_6 |
| 68169 | 0, // x8sub_7 |
| 68170 | 0, // zasubb |
| 68171 | 0, // zasubd0 |
| 68172 | 0, // zasubd1 |
| 68173 | 0, // zasubh0 |
| 68174 | 0, // zasubh1 |
| 68175 | 0, // zasubq0 |
| 68176 | 0, // zasubq1 |
| 68177 | 0, // zasubs0 |
| 68178 | 0, // zasubs1 |
| 68179 | 253, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68180 | 253, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68181 | 253, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68182 | 253, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68183 | 0, // zsub3 |
| 68184 | 253, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68185 | 0, // zasubd1_then_zasubq0 |
| 68186 | 0, // zasubd1_then_zasubq1 |
| 68187 | 0, // zasubs1_then_zasubd0 |
| 68188 | 0, // zasubs1_then_zasubd1 |
| 68189 | 0, // zasubs1_then_zasubq0 |
| 68190 | 0, // zasubs1_then_zasubq1 |
| 68191 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68192 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68193 | 0, // zasubh1_then_zasubd0 |
| 68194 | 0, // zasubh1_then_zasubd1 |
| 68195 | 0, // zasubh1_then_zasubq0 |
| 68196 | 0, // zasubh1_then_zasubq1 |
| 68197 | 0, // zasubh1_then_zasubs0 |
| 68198 | 0, // zasubh1_then_zasubs1 |
| 68199 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68200 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68201 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68202 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68203 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68204 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68205 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68206 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68207 | 253, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68208 | 253, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68209 | 253, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68210 | 253, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68211 | 253, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68212 | 253, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68213 | 0, // dsub3_then_bsub |
| 68214 | 0, // dsub3_then_bsub_hi |
| 68215 | 0, // dsub3_then_hsub |
| 68216 | 0, // dsub3_then_hsub_hi |
| 68217 | 0, // dsub3_then_ssub |
| 68218 | 0, // dsub3_then_ssub_hi |
| 68219 | 253, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68220 | 253, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68221 | 253, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68222 | 253, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68223 | 253, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68224 | 253, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68225 | 0, // psub1_then_psub |
| 68226 | 253, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68227 | 0, // qsub3_then_dsub_hi |
| 68228 | 253, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68229 | 0, // x8sub_7_then_sub_32 |
| 68230 | 0, // x8sub_7_then_sub_32_hi |
| 68231 | 0, // x8sub_6_then_sub_32 |
| 68232 | 0, // x8sub_6_then_sub_32_hi |
| 68233 | 0, // x8sub_5_then_sub_32 |
| 68234 | 0, // x8sub_5_then_sub_32_hi |
| 68235 | 0, // x8sub_4_then_sub_32 |
| 68236 | 0, // x8sub_4_then_sub_32_hi |
| 68237 | 0, // x8sub_3_then_sub_32 |
| 68238 | 0, // x8sub_3_then_sub_32_hi |
| 68239 | 0, // x8sub_2_then_sub_32 |
| 68240 | 0, // x8sub_2_then_sub_32_hi |
| 68241 | 0, // x8sub_1_then_sub_32 |
| 68242 | 0, // x8sub_1_then_sub_32_hi |
| 68243 | 0, // subo64_then_sub_32 |
| 68244 | 0, // subo64_then_sub_32_hi |
| 68245 | 253, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68246 | 0, // zsub3_then_zsub_hi |
| 68247 | 253, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68248 | 0, // dsub0_dsub1 |
| 68249 | 0, // dsub0_dsub1_dsub2 |
| 68250 | 253, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68251 | 0, // dsub1_dsub2_dsub3 |
| 68252 | 0, // dsub2_dsub3 |
| 68253 | 253, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68254 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68255 | 253, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68256 | 0, // qsub0_qsub1 |
| 68257 | 0, // qsub0_qsub1_qsub2 |
| 68258 | 253, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68259 | 0, // qsub1_qsub2_qsub3 |
| 68260 | 0, // qsub2_qsub3 |
| 68261 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68262 | 0, // x8sub_0_x8sub_1 |
| 68263 | 0, // x8sub_2_x8sub_3 |
| 68264 | 0, // x8sub_4_x8sub_5 |
| 68265 | 0, // x8sub_6_x8sub_7 |
| 68266 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68267 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68268 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68269 | 0, // sub_32_subo64_then_sub_32 |
| 68270 | 253, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68271 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68272 | 253, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68273 | 253, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68274 | 0, // zsub0_zsub1_zsub2 |
| 68275 | 253, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 68276 | 0, // zsub1_zsub2_zsub3 |
| 68277 | 0, // zsub2_zsub3 |
| 68278 | 0, // zsub0_zsub2 |
| 68279 | 0, // zsub1_zsub3 |
| 68280 | }, |
| 68281 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68282 | 254, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68283 | 254, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68284 | 254, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68285 | 0, // dsub0 |
| 68286 | 254, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68287 | 254, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68288 | 0, // dsub3 |
| 68289 | 254, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68290 | 254, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68291 | 254, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68292 | 0, // psub |
| 68293 | 0, // psub0 |
| 68294 | 0, // psub1 |
| 68295 | 0, // qsub0 |
| 68296 | 254, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68297 | 254, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68298 | 0, // qsub3 |
| 68299 | 254, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68300 | 254, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68301 | 0, // sub_32 |
| 68302 | 0, // sub_32_hi |
| 68303 | 0, // sube32 |
| 68304 | 0, // sube64 |
| 68305 | 0, // subo32 |
| 68306 | 0, // subo64 |
| 68307 | 0, // x8sub_0 |
| 68308 | 0, // x8sub_1 |
| 68309 | 0, // x8sub_2 |
| 68310 | 0, // x8sub_3 |
| 68311 | 0, // x8sub_4 |
| 68312 | 0, // x8sub_5 |
| 68313 | 0, // x8sub_6 |
| 68314 | 0, // x8sub_7 |
| 68315 | 0, // zasubb |
| 68316 | 0, // zasubd0 |
| 68317 | 0, // zasubd1 |
| 68318 | 0, // zasubh0 |
| 68319 | 0, // zasubh1 |
| 68320 | 0, // zasubq0 |
| 68321 | 0, // zasubq1 |
| 68322 | 0, // zasubs0 |
| 68323 | 0, // zasubs1 |
| 68324 | 254, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68325 | 254, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68326 | 254, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68327 | 254, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68328 | 0, // zsub3 |
| 68329 | 254, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68330 | 0, // zasubd1_then_zasubq0 |
| 68331 | 0, // zasubd1_then_zasubq1 |
| 68332 | 0, // zasubs1_then_zasubd0 |
| 68333 | 0, // zasubs1_then_zasubd1 |
| 68334 | 0, // zasubs1_then_zasubq0 |
| 68335 | 0, // zasubs1_then_zasubq1 |
| 68336 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68337 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68338 | 0, // zasubh1_then_zasubd0 |
| 68339 | 0, // zasubh1_then_zasubd1 |
| 68340 | 0, // zasubh1_then_zasubq0 |
| 68341 | 0, // zasubh1_then_zasubq1 |
| 68342 | 0, // zasubh1_then_zasubs0 |
| 68343 | 0, // zasubh1_then_zasubs1 |
| 68344 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68345 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68346 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68347 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68348 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68349 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68350 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68351 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68352 | 254, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68353 | 254, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68354 | 254, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68355 | 254, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68356 | 254, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68357 | 254, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68358 | 0, // dsub3_then_bsub |
| 68359 | 0, // dsub3_then_bsub_hi |
| 68360 | 0, // dsub3_then_hsub |
| 68361 | 0, // dsub3_then_hsub_hi |
| 68362 | 0, // dsub3_then_ssub |
| 68363 | 0, // dsub3_then_ssub_hi |
| 68364 | 254, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68365 | 254, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68366 | 254, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68367 | 254, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68368 | 254, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68369 | 254, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68370 | 0, // psub1_then_psub |
| 68371 | 254, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68372 | 0, // qsub3_then_dsub_hi |
| 68373 | 254, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68374 | 0, // x8sub_7_then_sub_32 |
| 68375 | 0, // x8sub_7_then_sub_32_hi |
| 68376 | 0, // x8sub_6_then_sub_32 |
| 68377 | 0, // x8sub_6_then_sub_32_hi |
| 68378 | 0, // x8sub_5_then_sub_32 |
| 68379 | 0, // x8sub_5_then_sub_32_hi |
| 68380 | 0, // x8sub_4_then_sub_32 |
| 68381 | 0, // x8sub_4_then_sub_32_hi |
| 68382 | 0, // x8sub_3_then_sub_32 |
| 68383 | 0, // x8sub_3_then_sub_32_hi |
| 68384 | 0, // x8sub_2_then_sub_32 |
| 68385 | 0, // x8sub_2_then_sub_32_hi |
| 68386 | 0, // x8sub_1_then_sub_32 |
| 68387 | 0, // x8sub_1_then_sub_32_hi |
| 68388 | 0, // subo64_then_sub_32 |
| 68389 | 0, // subo64_then_sub_32_hi |
| 68390 | 254, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68391 | 0, // zsub3_then_zsub_hi |
| 68392 | 254, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68393 | 0, // dsub0_dsub1 |
| 68394 | 0, // dsub0_dsub1_dsub2 |
| 68395 | 254, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68396 | 0, // dsub1_dsub2_dsub3 |
| 68397 | 0, // dsub2_dsub3 |
| 68398 | 254, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68399 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68400 | 254, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68401 | 0, // qsub0_qsub1 |
| 68402 | 0, // qsub0_qsub1_qsub2 |
| 68403 | 254, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68404 | 0, // qsub1_qsub2_qsub3 |
| 68405 | 0, // qsub2_qsub3 |
| 68406 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68407 | 0, // x8sub_0_x8sub_1 |
| 68408 | 0, // x8sub_2_x8sub_3 |
| 68409 | 0, // x8sub_4_x8sub_5 |
| 68410 | 0, // x8sub_6_x8sub_7 |
| 68411 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68412 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68413 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68414 | 0, // sub_32_subo64_then_sub_32 |
| 68415 | 254, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68416 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68417 | 254, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68418 | 254, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68419 | 0, // zsub0_zsub1_zsub2 |
| 68420 | 254, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68421 | 0, // zsub1_zsub2_zsub3 |
| 68422 | 0, // zsub2_zsub3 |
| 68423 | 0, // zsub0_zsub2 |
| 68424 | 0, // zsub1_zsub3 |
| 68425 | }, |
| 68426 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68427 | 255, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68428 | 255, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68429 | 255, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68430 | 0, // dsub0 |
| 68431 | 255, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68432 | 255, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68433 | 0, // dsub3 |
| 68434 | 255, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68435 | 255, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68436 | 255, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68437 | 0, // psub |
| 68438 | 0, // psub0 |
| 68439 | 0, // psub1 |
| 68440 | 0, // qsub0 |
| 68441 | 255, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68442 | 255, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68443 | 0, // qsub3 |
| 68444 | 255, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68445 | 255, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68446 | 0, // sub_32 |
| 68447 | 0, // sub_32_hi |
| 68448 | 0, // sube32 |
| 68449 | 0, // sube64 |
| 68450 | 0, // subo32 |
| 68451 | 0, // subo64 |
| 68452 | 0, // x8sub_0 |
| 68453 | 0, // x8sub_1 |
| 68454 | 0, // x8sub_2 |
| 68455 | 0, // x8sub_3 |
| 68456 | 0, // x8sub_4 |
| 68457 | 0, // x8sub_5 |
| 68458 | 0, // x8sub_6 |
| 68459 | 0, // x8sub_7 |
| 68460 | 0, // zasubb |
| 68461 | 0, // zasubd0 |
| 68462 | 0, // zasubd1 |
| 68463 | 0, // zasubh0 |
| 68464 | 0, // zasubh1 |
| 68465 | 0, // zasubq0 |
| 68466 | 0, // zasubq1 |
| 68467 | 0, // zasubs0 |
| 68468 | 0, // zasubs1 |
| 68469 | 255, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68470 | 255, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68471 | 255, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68472 | 255, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68473 | 0, // zsub3 |
| 68474 | 255, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68475 | 0, // zasubd1_then_zasubq0 |
| 68476 | 0, // zasubd1_then_zasubq1 |
| 68477 | 0, // zasubs1_then_zasubd0 |
| 68478 | 0, // zasubs1_then_zasubd1 |
| 68479 | 0, // zasubs1_then_zasubq0 |
| 68480 | 0, // zasubs1_then_zasubq1 |
| 68481 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68482 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68483 | 0, // zasubh1_then_zasubd0 |
| 68484 | 0, // zasubh1_then_zasubd1 |
| 68485 | 0, // zasubh1_then_zasubq0 |
| 68486 | 0, // zasubh1_then_zasubq1 |
| 68487 | 0, // zasubh1_then_zasubs0 |
| 68488 | 0, // zasubh1_then_zasubs1 |
| 68489 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68490 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68491 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68492 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68493 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68494 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68495 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68496 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68497 | 255, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68498 | 255, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68499 | 255, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68500 | 255, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68501 | 255, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68502 | 255, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68503 | 0, // dsub3_then_bsub |
| 68504 | 0, // dsub3_then_bsub_hi |
| 68505 | 0, // dsub3_then_hsub |
| 68506 | 0, // dsub3_then_hsub_hi |
| 68507 | 0, // dsub3_then_ssub |
| 68508 | 0, // dsub3_then_ssub_hi |
| 68509 | 255, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68510 | 255, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68511 | 255, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68512 | 255, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68513 | 255, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68514 | 255, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68515 | 0, // psub1_then_psub |
| 68516 | 255, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68517 | 0, // qsub3_then_dsub_hi |
| 68518 | 255, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68519 | 0, // x8sub_7_then_sub_32 |
| 68520 | 0, // x8sub_7_then_sub_32_hi |
| 68521 | 0, // x8sub_6_then_sub_32 |
| 68522 | 0, // x8sub_6_then_sub_32_hi |
| 68523 | 0, // x8sub_5_then_sub_32 |
| 68524 | 0, // x8sub_5_then_sub_32_hi |
| 68525 | 0, // x8sub_4_then_sub_32 |
| 68526 | 0, // x8sub_4_then_sub_32_hi |
| 68527 | 0, // x8sub_3_then_sub_32 |
| 68528 | 0, // x8sub_3_then_sub_32_hi |
| 68529 | 0, // x8sub_2_then_sub_32 |
| 68530 | 0, // x8sub_2_then_sub_32_hi |
| 68531 | 0, // x8sub_1_then_sub_32 |
| 68532 | 0, // x8sub_1_then_sub_32_hi |
| 68533 | 0, // subo64_then_sub_32 |
| 68534 | 0, // subo64_then_sub_32_hi |
| 68535 | 255, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68536 | 0, // zsub3_then_zsub_hi |
| 68537 | 255, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68538 | 0, // dsub0_dsub1 |
| 68539 | 0, // dsub0_dsub1_dsub2 |
| 68540 | 255, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68541 | 0, // dsub1_dsub2_dsub3 |
| 68542 | 0, // dsub2_dsub3 |
| 68543 | 255, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68544 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68545 | 255, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68546 | 0, // qsub0_qsub1 |
| 68547 | 0, // qsub0_qsub1_qsub2 |
| 68548 | 255, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68549 | 0, // qsub1_qsub2_qsub3 |
| 68550 | 0, // qsub2_qsub3 |
| 68551 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68552 | 0, // x8sub_0_x8sub_1 |
| 68553 | 0, // x8sub_2_x8sub_3 |
| 68554 | 0, // x8sub_4_x8sub_5 |
| 68555 | 0, // x8sub_6_x8sub_7 |
| 68556 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68557 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68558 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68559 | 0, // sub_32_subo64_then_sub_32 |
| 68560 | 255, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68561 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68562 | 255, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68563 | 255, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68564 | 0, // zsub0_zsub1_zsub2 |
| 68565 | 255, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 68566 | 0, // zsub1_zsub2_zsub3 |
| 68567 | 0, // zsub2_zsub3 |
| 68568 | 0, // zsub0_zsub2 |
| 68569 | 0, // zsub1_zsub3 |
| 68570 | }, |
| 68571 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68572 | 256, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68573 | 256, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68574 | 256, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68575 | 0, // dsub0 |
| 68576 | 256, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68577 | 256, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68578 | 0, // dsub3 |
| 68579 | 256, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68580 | 256, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68581 | 256, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68582 | 0, // psub |
| 68583 | 0, // psub0 |
| 68584 | 0, // psub1 |
| 68585 | 0, // qsub0 |
| 68586 | 256, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68587 | 256, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68588 | 0, // qsub3 |
| 68589 | 256, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68590 | 256, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68591 | 0, // sub_32 |
| 68592 | 0, // sub_32_hi |
| 68593 | 0, // sube32 |
| 68594 | 0, // sube64 |
| 68595 | 0, // subo32 |
| 68596 | 0, // subo64 |
| 68597 | 0, // x8sub_0 |
| 68598 | 0, // x8sub_1 |
| 68599 | 0, // x8sub_2 |
| 68600 | 0, // x8sub_3 |
| 68601 | 0, // x8sub_4 |
| 68602 | 0, // x8sub_5 |
| 68603 | 0, // x8sub_6 |
| 68604 | 0, // x8sub_7 |
| 68605 | 0, // zasubb |
| 68606 | 0, // zasubd0 |
| 68607 | 0, // zasubd1 |
| 68608 | 0, // zasubh0 |
| 68609 | 0, // zasubh1 |
| 68610 | 0, // zasubq0 |
| 68611 | 0, // zasubq1 |
| 68612 | 0, // zasubs0 |
| 68613 | 0, // zasubs1 |
| 68614 | 256, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68615 | 256, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68616 | 256, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68617 | 256, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68618 | 0, // zsub3 |
| 68619 | 256, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68620 | 0, // zasubd1_then_zasubq0 |
| 68621 | 0, // zasubd1_then_zasubq1 |
| 68622 | 0, // zasubs1_then_zasubd0 |
| 68623 | 0, // zasubs1_then_zasubd1 |
| 68624 | 0, // zasubs1_then_zasubq0 |
| 68625 | 0, // zasubs1_then_zasubq1 |
| 68626 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68627 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68628 | 0, // zasubh1_then_zasubd0 |
| 68629 | 0, // zasubh1_then_zasubd1 |
| 68630 | 0, // zasubh1_then_zasubq0 |
| 68631 | 0, // zasubh1_then_zasubq1 |
| 68632 | 0, // zasubh1_then_zasubs0 |
| 68633 | 0, // zasubh1_then_zasubs1 |
| 68634 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68635 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68636 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68637 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68638 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68639 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68640 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68641 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68642 | 256, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68643 | 256, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68644 | 256, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68645 | 256, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68646 | 256, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68647 | 256, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68648 | 0, // dsub3_then_bsub |
| 68649 | 0, // dsub3_then_bsub_hi |
| 68650 | 0, // dsub3_then_hsub |
| 68651 | 0, // dsub3_then_hsub_hi |
| 68652 | 0, // dsub3_then_ssub |
| 68653 | 0, // dsub3_then_ssub_hi |
| 68654 | 256, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68655 | 256, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68656 | 256, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68657 | 256, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68658 | 256, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68659 | 256, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68660 | 0, // psub1_then_psub |
| 68661 | 256, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68662 | 0, // qsub3_then_dsub_hi |
| 68663 | 256, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68664 | 0, // x8sub_7_then_sub_32 |
| 68665 | 0, // x8sub_7_then_sub_32_hi |
| 68666 | 0, // x8sub_6_then_sub_32 |
| 68667 | 0, // x8sub_6_then_sub_32_hi |
| 68668 | 0, // x8sub_5_then_sub_32 |
| 68669 | 0, // x8sub_5_then_sub_32_hi |
| 68670 | 0, // x8sub_4_then_sub_32 |
| 68671 | 0, // x8sub_4_then_sub_32_hi |
| 68672 | 0, // x8sub_3_then_sub_32 |
| 68673 | 0, // x8sub_3_then_sub_32_hi |
| 68674 | 0, // x8sub_2_then_sub_32 |
| 68675 | 0, // x8sub_2_then_sub_32_hi |
| 68676 | 0, // x8sub_1_then_sub_32 |
| 68677 | 0, // x8sub_1_then_sub_32_hi |
| 68678 | 0, // subo64_then_sub_32 |
| 68679 | 0, // subo64_then_sub_32_hi |
| 68680 | 256, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68681 | 0, // zsub3_then_zsub_hi |
| 68682 | 256, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68683 | 0, // dsub0_dsub1 |
| 68684 | 0, // dsub0_dsub1_dsub2 |
| 68685 | 256, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68686 | 0, // dsub1_dsub2_dsub3 |
| 68687 | 0, // dsub2_dsub3 |
| 68688 | 256, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68689 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68690 | 256, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68691 | 0, // qsub0_qsub1 |
| 68692 | 0, // qsub0_qsub1_qsub2 |
| 68693 | 256, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68694 | 0, // qsub1_qsub2_qsub3 |
| 68695 | 0, // qsub2_qsub3 |
| 68696 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68697 | 0, // x8sub_0_x8sub_1 |
| 68698 | 0, // x8sub_2_x8sub_3 |
| 68699 | 0, // x8sub_4_x8sub_5 |
| 68700 | 0, // x8sub_6_x8sub_7 |
| 68701 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68702 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68703 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68704 | 0, // sub_32_subo64_then_sub_32 |
| 68705 | 256, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68706 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68707 | 256, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68708 | 256, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68709 | 0, // zsub0_zsub1_zsub2 |
| 68710 | 256, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 68711 | 0, // zsub1_zsub2_zsub3 |
| 68712 | 0, // zsub2_zsub3 |
| 68713 | 0, // zsub0_zsub2 |
| 68714 | 0, // zsub1_zsub3 |
| 68715 | }, |
| 68716 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68717 | 257, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68718 | 257, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68719 | 257, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68720 | 0, // dsub0 |
| 68721 | 257, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68722 | 257, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68723 | 0, // dsub3 |
| 68724 | 257, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68725 | 257, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68726 | 257, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68727 | 0, // psub |
| 68728 | 0, // psub0 |
| 68729 | 0, // psub1 |
| 68730 | 0, // qsub0 |
| 68731 | 257, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68732 | 257, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68733 | 0, // qsub3 |
| 68734 | 257, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68735 | 257, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68736 | 0, // sub_32 |
| 68737 | 0, // sub_32_hi |
| 68738 | 0, // sube32 |
| 68739 | 0, // sube64 |
| 68740 | 0, // subo32 |
| 68741 | 0, // subo64 |
| 68742 | 0, // x8sub_0 |
| 68743 | 0, // x8sub_1 |
| 68744 | 0, // x8sub_2 |
| 68745 | 0, // x8sub_3 |
| 68746 | 0, // x8sub_4 |
| 68747 | 0, // x8sub_5 |
| 68748 | 0, // x8sub_6 |
| 68749 | 0, // x8sub_7 |
| 68750 | 0, // zasubb |
| 68751 | 0, // zasubd0 |
| 68752 | 0, // zasubd1 |
| 68753 | 0, // zasubh0 |
| 68754 | 0, // zasubh1 |
| 68755 | 0, // zasubq0 |
| 68756 | 0, // zasubq1 |
| 68757 | 0, // zasubs0 |
| 68758 | 0, // zasubs1 |
| 68759 | 257, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68760 | 257, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68761 | 257, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68762 | 257, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68763 | 0, // zsub3 |
| 68764 | 257, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68765 | 0, // zasubd1_then_zasubq0 |
| 68766 | 0, // zasubd1_then_zasubq1 |
| 68767 | 0, // zasubs1_then_zasubd0 |
| 68768 | 0, // zasubs1_then_zasubd1 |
| 68769 | 0, // zasubs1_then_zasubq0 |
| 68770 | 0, // zasubs1_then_zasubq1 |
| 68771 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68772 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68773 | 0, // zasubh1_then_zasubd0 |
| 68774 | 0, // zasubh1_then_zasubd1 |
| 68775 | 0, // zasubh1_then_zasubq0 |
| 68776 | 0, // zasubh1_then_zasubq1 |
| 68777 | 0, // zasubh1_then_zasubs0 |
| 68778 | 0, // zasubh1_then_zasubs1 |
| 68779 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68780 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68781 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68782 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68783 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68784 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68785 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68786 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68787 | 257, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68788 | 257, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68789 | 257, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68790 | 257, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68791 | 257, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68792 | 257, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68793 | 0, // dsub3_then_bsub |
| 68794 | 0, // dsub3_then_bsub_hi |
| 68795 | 0, // dsub3_then_hsub |
| 68796 | 0, // dsub3_then_hsub_hi |
| 68797 | 0, // dsub3_then_ssub |
| 68798 | 0, // dsub3_then_ssub_hi |
| 68799 | 257, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68800 | 257, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68801 | 257, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68802 | 257, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68803 | 257, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68804 | 257, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68805 | 0, // psub1_then_psub |
| 68806 | 257, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68807 | 0, // qsub3_then_dsub_hi |
| 68808 | 257, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68809 | 0, // x8sub_7_then_sub_32 |
| 68810 | 0, // x8sub_7_then_sub_32_hi |
| 68811 | 0, // x8sub_6_then_sub_32 |
| 68812 | 0, // x8sub_6_then_sub_32_hi |
| 68813 | 0, // x8sub_5_then_sub_32 |
| 68814 | 0, // x8sub_5_then_sub_32_hi |
| 68815 | 0, // x8sub_4_then_sub_32 |
| 68816 | 0, // x8sub_4_then_sub_32_hi |
| 68817 | 0, // x8sub_3_then_sub_32 |
| 68818 | 0, // x8sub_3_then_sub_32_hi |
| 68819 | 0, // x8sub_2_then_sub_32 |
| 68820 | 0, // x8sub_2_then_sub_32_hi |
| 68821 | 0, // x8sub_1_then_sub_32 |
| 68822 | 0, // x8sub_1_then_sub_32_hi |
| 68823 | 0, // subo64_then_sub_32 |
| 68824 | 0, // subo64_then_sub_32_hi |
| 68825 | 257, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68826 | 0, // zsub3_then_zsub_hi |
| 68827 | 257, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68828 | 0, // dsub0_dsub1 |
| 68829 | 0, // dsub0_dsub1_dsub2 |
| 68830 | 257, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68831 | 0, // dsub1_dsub2_dsub3 |
| 68832 | 0, // dsub2_dsub3 |
| 68833 | 257, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68834 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68835 | 257, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68836 | 0, // qsub0_qsub1 |
| 68837 | 0, // qsub0_qsub1_qsub2 |
| 68838 | 257, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68839 | 0, // qsub1_qsub2_qsub3 |
| 68840 | 0, // qsub2_qsub3 |
| 68841 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68842 | 0, // x8sub_0_x8sub_1 |
| 68843 | 0, // x8sub_2_x8sub_3 |
| 68844 | 0, // x8sub_4_x8sub_5 |
| 68845 | 0, // x8sub_6_x8sub_7 |
| 68846 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68847 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68848 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68849 | 0, // sub_32_subo64_then_sub_32 |
| 68850 | 257, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68851 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68852 | 257, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68853 | 257, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68854 | 0, // zsub0_zsub1_zsub2 |
| 68855 | 257, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 68856 | 0, // zsub1_zsub2_zsub3 |
| 68857 | 0, // zsub2_zsub3 |
| 68858 | 0, // zsub0_zsub2 |
| 68859 | 0, // zsub1_zsub3 |
| 68860 | }, |
| 68861 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68862 | 258, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68863 | 258, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68864 | 258, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68865 | 0, // dsub0 |
| 68866 | 258, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68867 | 258, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68868 | 0, // dsub3 |
| 68869 | 258, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68870 | 258, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68871 | 258, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68872 | 0, // psub |
| 68873 | 0, // psub0 |
| 68874 | 0, // psub1 |
| 68875 | 0, // qsub0 |
| 68876 | 258, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68877 | 258, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68878 | 0, // qsub3 |
| 68879 | 258, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68880 | 258, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68881 | 0, // sub_32 |
| 68882 | 0, // sub_32_hi |
| 68883 | 0, // sube32 |
| 68884 | 0, // sube64 |
| 68885 | 0, // subo32 |
| 68886 | 0, // subo64 |
| 68887 | 0, // x8sub_0 |
| 68888 | 0, // x8sub_1 |
| 68889 | 0, // x8sub_2 |
| 68890 | 0, // x8sub_3 |
| 68891 | 0, // x8sub_4 |
| 68892 | 0, // x8sub_5 |
| 68893 | 0, // x8sub_6 |
| 68894 | 0, // x8sub_7 |
| 68895 | 0, // zasubb |
| 68896 | 0, // zasubd0 |
| 68897 | 0, // zasubd1 |
| 68898 | 0, // zasubh0 |
| 68899 | 0, // zasubh1 |
| 68900 | 0, // zasubq0 |
| 68901 | 0, // zasubq1 |
| 68902 | 0, // zasubs0 |
| 68903 | 0, // zasubs1 |
| 68904 | 258, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68905 | 258, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68906 | 258, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68907 | 258, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68908 | 0, // zsub3 |
| 68909 | 258, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68910 | 0, // zasubd1_then_zasubq0 |
| 68911 | 0, // zasubd1_then_zasubq1 |
| 68912 | 0, // zasubs1_then_zasubd0 |
| 68913 | 0, // zasubs1_then_zasubd1 |
| 68914 | 0, // zasubs1_then_zasubq0 |
| 68915 | 0, // zasubs1_then_zasubq1 |
| 68916 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 68917 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 68918 | 0, // zasubh1_then_zasubd0 |
| 68919 | 0, // zasubh1_then_zasubd1 |
| 68920 | 0, // zasubh1_then_zasubq0 |
| 68921 | 0, // zasubh1_then_zasubq1 |
| 68922 | 0, // zasubh1_then_zasubs0 |
| 68923 | 0, // zasubh1_then_zasubs1 |
| 68924 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 68925 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 68926 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 68927 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 68928 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 68929 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 68930 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 68931 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 68932 | 258, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68933 | 258, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68934 | 258, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68935 | 258, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68936 | 258, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68937 | 258, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68938 | 0, // dsub3_then_bsub |
| 68939 | 0, // dsub3_then_bsub_hi |
| 68940 | 0, // dsub3_then_hsub |
| 68941 | 0, // dsub3_then_hsub_hi |
| 68942 | 0, // dsub3_then_ssub |
| 68943 | 0, // dsub3_then_ssub_hi |
| 68944 | 258, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68945 | 258, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68946 | 258, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68947 | 258, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68948 | 258, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68949 | 258, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68950 | 0, // psub1_then_psub |
| 68951 | 258, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68952 | 0, // qsub3_then_dsub_hi |
| 68953 | 258, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68954 | 0, // x8sub_7_then_sub_32 |
| 68955 | 0, // x8sub_7_then_sub_32_hi |
| 68956 | 0, // x8sub_6_then_sub_32 |
| 68957 | 0, // x8sub_6_then_sub_32_hi |
| 68958 | 0, // x8sub_5_then_sub_32 |
| 68959 | 0, // x8sub_5_then_sub_32_hi |
| 68960 | 0, // x8sub_4_then_sub_32 |
| 68961 | 0, // x8sub_4_then_sub_32_hi |
| 68962 | 0, // x8sub_3_then_sub_32 |
| 68963 | 0, // x8sub_3_then_sub_32_hi |
| 68964 | 0, // x8sub_2_then_sub_32 |
| 68965 | 0, // x8sub_2_then_sub_32_hi |
| 68966 | 0, // x8sub_1_then_sub_32 |
| 68967 | 0, // x8sub_1_then_sub_32_hi |
| 68968 | 0, // subo64_then_sub_32 |
| 68969 | 0, // subo64_then_sub_32_hi |
| 68970 | 258, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68971 | 0, // zsub3_then_zsub_hi |
| 68972 | 258, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68973 | 0, // dsub0_dsub1 |
| 68974 | 0, // dsub0_dsub1_dsub2 |
| 68975 | 258, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68976 | 0, // dsub1_dsub2_dsub3 |
| 68977 | 0, // dsub2_dsub3 |
| 68978 | 258, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68979 | 0, // dsub_dsub1_dsub2_dsub3 |
| 68980 | 258, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68981 | 0, // qsub0_qsub1 |
| 68982 | 0, // qsub0_qsub1_qsub2 |
| 68983 | 258, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68984 | 0, // qsub1_qsub2_qsub3 |
| 68985 | 0, // qsub2_qsub3 |
| 68986 | 0, // sub_32_x8sub_1_then_sub_32 |
| 68987 | 0, // x8sub_0_x8sub_1 |
| 68988 | 0, // x8sub_2_x8sub_3 |
| 68989 | 0, // x8sub_4_x8sub_5 |
| 68990 | 0, // x8sub_6_x8sub_7 |
| 68991 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 68992 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 68993 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 68994 | 0, // sub_32_subo64_then_sub_32 |
| 68995 | 258, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68996 | 0, // zsub_qsub1_qsub2_qsub3 |
| 68997 | 258, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68998 | 258, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 68999 | 0, // zsub0_zsub1_zsub2 |
| 69000 | 258, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69001 | 0, // zsub1_zsub2_zsub3 |
| 69002 | 0, // zsub2_zsub3 |
| 69003 | 0, // zsub0_zsub2 |
| 69004 | 0, // zsub1_zsub3 |
| 69005 | }, |
| 69006 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69007 | 259, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69008 | 259, // bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69009 | 259, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69010 | 0, // dsub0 |
| 69011 | 259, // dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69012 | 259, // dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69013 | 0, // dsub3 |
| 69014 | 259, // dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69015 | 259, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69016 | 259, // hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69017 | 0, // psub |
| 69018 | 0, // psub0 |
| 69019 | 0, // psub1 |
| 69020 | 0, // qsub0 |
| 69021 | 259, // qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69022 | 259, // qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69023 | 0, // qsub3 |
| 69024 | 259, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69025 | 259, // ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69026 | 0, // sub_32 |
| 69027 | 0, // sub_32_hi |
| 69028 | 0, // sube32 |
| 69029 | 0, // sube64 |
| 69030 | 0, // subo32 |
| 69031 | 0, // subo64 |
| 69032 | 0, // x8sub_0 |
| 69033 | 0, // x8sub_1 |
| 69034 | 0, // x8sub_2 |
| 69035 | 0, // x8sub_3 |
| 69036 | 0, // x8sub_4 |
| 69037 | 0, // x8sub_5 |
| 69038 | 0, // x8sub_6 |
| 69039 | 0, // x8sub_7 |
| 69040 | 0, // zasubb |
| 69041 | 0, // zasubd0 |
| 69042 | 0, // zasubd1 |
| 69043 | 0, // zasubh0 |
| 69044 | 0, // zasubh1 |
| 69045 | 0, // zasubq0 |
| 69046 | 0, // zasubq1 |
| 69047 | 0, // zasubs0 |
| 69048 | 0, // zasubs1 |
| 69049 | 259, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69050 | 259, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69051 | 259, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69052 | 259, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69053 | 0, // zsub3 |
| 69054 | 259, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69055 | 0, // zasubd1_then_zasubq0 |
| 69056 | 0, // zasubd1_then_zasubq1 |
| 69057 | 0, // zasubs1_then_zasubd0 |
| 69058 | 0, // zasubs1_then_zasubd1 |
| 69059 | 0, // zasubs1_then_zasubq0 |
| 69060 | 0, // zasubs1_then_zasubq1 |
| 69061 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69062 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69063 | 0, // zasubh1_then_zasubd0 |
| 69064 | 0, // zasubh1_then_zasubd1 |
| 69065 | 0, // zasubh1_then_zasubq0 |
| 69066 | 0, // zasubh1_then_zasubq1 |
| 69067 | 0, // zasubh1_then_zasubs0 |
| 69068 | 0, // zasubh1_then_zasubs1 |
| 69069 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69070 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69071 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69072 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69073 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69074 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69075 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69076 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69077 | 259, // dsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69078 | 259, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69079 | 259, // dsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69080 | 259, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69081 | 259, // dsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69082 | 259, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69083 | 0, // dsub3_then_bsub |
| 69084 | 0, // dsub3_then_bsub_hi |
| 69085 | 0, // dsub3_then_hsub |
| 69086 | 0, // dsub3_then_hsub_hi |
| 69087 | 0, // dsub3_then_ssub |
| 69088 | 0, // dsub3_then_ssub_hi |
| 69089 | 259, // dsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69090 | 259, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69091 | 259, // dsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69092 | 259, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69093 | 259, // dsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69094 | 259, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69095 | 0, // psub1_then_psub |
| 69096 | 259, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69097 | 0, // qsub3_then_dsub_hi |
| 69098 | 259, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69099 | 0, // x8sub_7_then_sub_32 |
| 69100 | 0, // x8sub_7_then_sub_32_hi |
| 69101 | 0, // x8sub_6_then_sub_32 |
| 69102 | 0, // x8sub_6_then_sub_32_hi |
| 69103 | 0, // x8sub_5_then_sub_32 |
| 69104 | 0, // x8sub_5_then_sub_32_hi |
| 69105 | 0, // x8sub_4_then_sub_32 |
| 69106 | 0, // x8sub_4_then_sub_32_hi |
| 69107 | 0, // x8sub_3_then_sub_32 |
| 69108 | 0, // x8sub_3_then_sub_32_hi |
| 69109 | 0, // x8sub_2_then_sub_32 |
| 69110 | 0, // x8sub_2_then_sub_32_hi |
| 69111 | 0, // x8sub_1_then_sub_32 |
| 69112 | 0, // x8sub_1_then_sub_32_hi |
| 69113 | 0, // subo64_then_sub_32 |
| 69114 | 0, // subo64_then_sub_32_hi |
| 69115 | 259, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69116 | 0, // zsub3_then_zsub_hi |
| 69117 | 259, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69118 | 0, // dsub0_dsub1 |
| 69119 | 0, // dsub0_dsub1_dsub2 |
| 69120 | 259, // dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69121 | 0, // dsub1_dsub2_dsub3 |
| 69122 | 0, // dsub2_dsub3 |
| 69123 | 259, // dsub_dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69124 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69125 | 259, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69126 | 0, // qsub0_qsub1 |
| 69127 | 0, // qsub0_qsub1_qsub2 |
| 69128 | 259, // qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69129 | 0, // qsub1_qsub2_qsub3 |
| 69130 | 0, // qsub2_qsub3 |
| 69131 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69132 | 0, // x8sub_0_x8sub_1 |
| 69133 | 0, // x8sub_2_x8sub_3 |
| 69134 | 0, // x8sub_4_x8sub_5 |
| 69135 | 0, // x8sub_6_x8sub_7 |
| 69136 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69137 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69138 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69139 | 0, // sub_32_subo64_then_sub_32 |
| 69140 | 259, // zsub_qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69141 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69142 | 259, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69143 | 259, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69144 | 0, // zsub0_zsub1_zsub2 |
| 69145 | 259, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69146 | 0, // zsub1_zsub2_zsub3 |
| 69147 | 0, // zsub2_zsub3 |
| 69148 | 0, // zsub0_zsub2 |
| 69149 | 0, // zsub1_zsub3 |
| 69150 | }, |
| 69151 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69152 | 260, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69153 | 260, // bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69154 | 260, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69155 | 0, // dsub0 |
| 69156 | 260, // dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69157 | 260, // dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69158 | 0, // dsub3 |
| 69159 | 260, // dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69160 | 260, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69161 | 260, // hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69162 | 0, // psub |
| 69163 | 0, // psub0 |
| 69164 | 0, // psub1 |
| 69165 | 0, // qsub0 |
| 69166 | 260, // qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69167 | 260, // qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69168 | 0, // qsub3 |
| 69169 | 260, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69170 | 260, // ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69171 | 0, // sub_32 |
| 69172 | 0, // sub_32_hi |
| 69173 | 0, // sube32 |
| 69174 | 0, // sube64 |
| 69175 | 0, // subo32 |
| 69176 | 0, // subo64 |
| 69177 | 0, // x8sub_0 |
| 69178 | 0, // x8sub_1 |
| 69179 | 0, // x8sub_2 |
| 69180 | 0, // x8sub_3 |
| 69181 | 0, // x8sub_4 |
| 69182 | 0, // x8sub_5 |
| 69183 | 0, // x8sub_6 |
| 69184 | 0, // x8sub_7 |
| 69185 | 0, // zasubb |
| 69186 | 0, // zasubd0 |
| 69187 | 0, // zasubd1 |
| 69188 | 0, // zasubh0 |
| 69189 | 0, // zasubh1 |
| 69190 | 0, // zasubq0 |
| 69191 | 0, // zasubq1 |
| 69192 | 0, // zasubs0 |
| 69193 | 0, // zasubs1 |
| 69194 | 260, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69195 | 260, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69196 | 260, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69197 | 260, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69198 | 0, // zsub3 |
| 69199 | 260, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69200 | 0, // zasubd1_then_zasubq0 |
| 69201 | 0, // zasubd1_then_zasubq1 |
| 69202 | 0, // zasubs1_then_zasubd0 |
| 69203 | 0, // zasubs1_then_zasubd1 |
| 69204 | 0, // zasubs1_then_zasubq0 |
| 69205 | 0, // zasubs1_then_zasubq1 |
| 69206 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69207 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69208 | 0, // zasubh1_then_zasubd0 |
| 69209 | 0, // zasubh1_then_zasubd1 |
| 69210 | 0, // zasubh1_then_zasubq0 |
| 69211 | 0, // zasubh1_then_zasubq1 |
| 69212 | 0, // zasubh1_then_zasubs0 |
| 69213 | 0, // zasubh1_then_zasubs1 |
| 69214 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69215 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69216 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69217 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69218 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69219 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69220 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69221 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69222 | 260, // dsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69223 | 260, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69224 | 260, // dsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69225 | 260, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69226 | 260, // dsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69227 | 260, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69228 | 0, // dsub3_then_bsub |
| 69229 | 0, // dsub3_then_bsub_hi |
| 69230 | 0, // dsub3_then_hsub |
| 69231 | 0, // dsub3_then_hsub_hi |
| 69232 | 0, // dsub3_then_ssub |
| 69233 | 0, // dsub3_then_ssub_hi |
| 69234 | 260, // dsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69235 | 260, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69236 | 260, // dsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69237 | 260, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69238 | 260, // dsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69239 | 260, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69240 | 0, // psub1_then_psub |
| 69241 | 260, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69242 | 0, // qsub3_then_dsub_hi |
| 69243 | 260, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69244 | 0, // x8sub_7_then_sub_32 |
| 69245 | 0, // x8sub_7_then_sub_32_hi |
| 69246 | 0, // x8sub_6_then_sub_32 |
| 69247 | 0, // x8sub_6_then_sub_32_hi |
| 69248 | 0, // x8sub_5_then_sub_32 |
| 69249 | 0, // x8sub_5_then_sub_32_hi |
| 69250 | 0, // x8sub_4_then_sub_32 |
| 69251 | 0, // x8sub_4_then_sub_32_hi |
| 69252 | 0, // x8sub_3_then_sub_32 |
| 69253 | 0, // x8sub_3_then_sub_32_hi |
| 69254 | 0, // x8sub_2_then_sub_32 |
| 69255 | 0, // x8sub_2_then_sub_32_hi |
| 69256 | 0, // x8sub_1_then_sub_32 |
| 69257 | 0, // x8sub_1_then_sub_32_hi |
| 69258 | 0, // subo64_then_sub_32 |
| 69259 | 0, // subo64_then_sub_32_hi |
| 69260 | 260, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69261 | 0, // zsub3_then_zsub_hi |
| 69262 | 260, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69263 | 0, // dsub0_dsub1 |
| 69264 | 0, // dsub0_dsub1_dsub2 |
| 69265 | 260, // dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69266 | 0, // dsub1_dsub2_dsub3 |
| 69267 | 0, // dsub2_dsub3 |
| 69268 | 260, // dsub_dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69269 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69270 | 260, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69271 | 0, // qsub0_qsub1 |
| 69272 | 0, // qsub0_qsub1_qsub2 |
| 69273 | 260, // qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69274 | 0, // qsub1_qsub2_qsub3 |
| 69275 | 0, // qsub2_qsub3 |
| 69276 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69277 | 0, // x8sub_0_x8sub_1 |
| 69278 | 0, // x8sub_2_x8sub_3 |
| 69279 | 0, // x8sub_4_x8sub_5 |
| 69280 | 0, // x8sub_6_x8sub_7 |
| 69281 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69282 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69283 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69284 | 0, // sub_32_subo64_then_sub_32 |
| 69285 | 260, // zsub_qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69286 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69287 | 260, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69288 | 260, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69289 | 0, // zsub0_zsub1_zsub2 |
| 69290 | 260, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 69291 | 0, // zsub1_zsub2_zsub3 |
| 69292 | 0, // zsub2_zsub3 |
| 69293 | 0, // zsub0_zsub2 |
| 69294 | 0, // zsub1_zsub3 |
| 69295 | }, |
| 69296 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69297 | 261, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69298 | 261, // bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69299 | 261, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69300 | 0, // dsub0 |
| 69301 | 261, // dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69302 | 261, // dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69303 | 0, // dsub3 |
| 69304 | 261, // dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69305 | 261, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69306 | 261, // hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69307 | 0, // psub |
| 69308 | 0, // psub0 |
| 69309 | 0, // psub1 |
| 69310 | 0, // qsub0 |
| 69311 | 261, // qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69312 | 261, // qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69313 | 0, // qsub3 |
| 69314 | 261, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69315 | 261, // ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69316 | 0, // sub_32 |
| 69317 | 0, // sub_32_hi |
| 69318 | 0, // sube32 |
| 69319 | 0, // sube64 |
| 69320 | 0, // subo32 |
| 69321 | 0, // subo64 |
| 69322 | 0, // x8sub_0 |
| 69323 | 0, // x8sub_1 |
| 69324 | 0, // x8sub_2 |
| 69325 | 0, // x8sub_3 |
| 69326 | 0, // x8sub_4 |
| 69327 | 0, // x8sub_5 |
| 69328 | 0, // x8sub_6 |
| 69329 | 0, // x8sub_7 |
| 69330 | 0, // zasubb |
| 69331 | 0, // zasubd0 |
| 69332 | 0, // zasubd1 |
| 69333 | 0, // zasubh0 |
| 69334 | 0, // zasubh1 |
| 69335 | 0, // zasubq0 |
| 69336 | 0, // zasubq1 |
| 69337 | 0, // zasubs0 |
| 69338 | 0, // zasubs1 |
| 69339 | 261, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69340 | 261, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69341 | 261, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69342 | 261, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69343 | 0, // zsub3 |
| 69344 | 261, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69345 | 0, // zasubd1_then_zasubq0 |
| 69346 | 0, // zasubd1_then_zasubq1 |
| 69347 | 0, // zasubs1_then_zasubd0 |
| 69348 | 0, // zasubs1_then_zasubd1 |
| 69349 | 0, // zasubs1_then_zasubq0 |
| 69350 | 0, // zasubs1_then_zasubq1 |
| 69351 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69352 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69353 | 0, // zasubh1_then_zasubd0 |
| 69354 | 0, // zasubh1_then_zasubd1 |
| 69355 | 0, // zasubh1_then_zasubq0 |
| 69356 | 0, // zasubh1_then_zasubq1 |
| 69357 | 0, // zasubh1_then_zasubs0 |
| 69358 | 0, // zasubh1_then_zasubs1 |
| 69359 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69360 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69361 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69362 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69363 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69364 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69365 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69366 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69367 | 261, // dsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69368 | 261, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69369 | 261, // dsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69370 | 261, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69371 | 261, // dsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69372 | 261, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69373 | 0, // dsub3_then_bsub |
| 69374 | 0, // dsub3_then_bsub_hi |
| 69375 | 0, // dsub3_then_hsub |
| 69376 | 0, // dsub3_then_hsub_hi |
| 69377 | 0, // dsub3_then_ssub |
| 69378 | 0, // dsub3_then_ssub_hi |
| 69379 | 261, // dsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69380 | 261, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69381 | 261, // dsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69382 | 261, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69383 | 261, // dsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69384 | 261, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69385 | 0, // psub1_then_psub |
| 69386 | 261, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69387 | 0, // qsub3_then_dsub_hi |
| 69388 | 261, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69389 | 0, // x8sub_7_then_sub_32 |
| 69390 | 0, // x8sub_7_then_sub_32_hi |
| 69391 | 0, // x8sub_6_then_sub_32 |
| 69392 | 0, // x8sub_6_then_sub_32_hi |
| 69393 | 0, // x8sub_5_then_sub_32 |
| 69394 | 0, // x8sub_5_then_sub_32_hi |
| 69395 | 0, // x8sub_4_then_sub_32 |
| 69396 | 0, // x8sub_4_then_sub_32_hi |
| 69397 | 0, // x8sub_3_then_sub_32 |
| 69398 | 0, // x8sub_3_then_sub_32_hi |
| 69399 | 0, // x8sub_2_then_sub_32 |
| 69400 | 0, // x8sub_2_then_sub_32_hi |
| 69401 | 0, // x8sub_1_then_sub_32 |
| 69402 | 0, // x8sub_1_then_sub_32_hi |
| 69403 | 0, // subo64_then_sub_32 |
| 69404 | 0, // subo64_then_sub_32_hi |
| 69405 | 261, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69406 | 0, // zsub3_then_zsub_hi |
| 69407 | 261, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69408 | 0, // dsub0_dsub1 |
| 69409 | 0, // dsub0_dsub1_dsub2 |
| 69410 | 261, // dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69411 | 0, // dsub1_dsub2_dsub3 |
| 69412 | 0, // dsub2_dsub3 |
| 69413 | 261, // dsub_dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69414 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69415 | 261, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69416 | 0, // qsub0_qsub1 |
| 69417 | 0, // qsub0_qsub1_qsub2 |
| 69418 | 261, // qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69419 | 0, // qsub1_qsub2_qsub3 |
| 69420 | 0, // qsub2_qsub3 |
| 69421 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69422 | 0, // x8sub_0_x8sub_1 |
| 69423 | 0, // x8sub_2_x8sub_3 |
| 69424 | 0, // x8sub_4_x8sub_5 |
| 69425 | 0, // x8sub_6_x8sub_7 |
| 69426 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69427 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69428 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69429 | 0, // sub_32_subo64_then_sub_32 |
| 69430 | 261, // zsub_qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69431 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69432 | 261, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69433 | 261, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69434 | 0, // zsub0_zsub1_zsub2 |
| 69435 | 261, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 69436 | 0, // zsub1_zsub2_zsub3 |
| 69437 | 0, // zsub2_zsub3 |
| 69438 | 0, // zsub0_zsub2 |
| 69439 | 0, // zsub1_zsub3 |
| 69440 | }, |
| 69441 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69442 | 262, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69443 | 262, // bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69444 | 262, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69445 | 0, // dsub0 |
| 69446 | 262, // dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69447 | 262, // dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69448 | 0, // dsub3 |
| 69449 | 262, // dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69450 | 262, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69451 | 262, // hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69452 | 0, // psub |
| 69453 | 0, // psub0 |
| 69454 | 0, // psub1 |
| 69455 | 0, // qsub0 |
| 69456 | 262, // qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69457 | 262, // qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69458 | 0, // qsub3 |
| 69459 | 262, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69460 | 262, // ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69461 | 0, // sub_32 |
| 69462 | 0, // sub_32_hi |
| 69463 | 0, // sube32 |
| 69464 | 0, // sube64 |
| 69465 | 0, // subo32 |
| 69466 | 0, // subo64 |
| 69467 | 0, // x8sub_0 |
| 69468 | 0, // x8sub_1 |
| 69469 | 0, // x8sub_2 |
| 69470 | 0, // x8sub_3 |
| 69471 | 0, // x8sub_4 |
| 69472 | 0, // x8sub_5 |
| 69473 | 0, // x8sub_6 |
| 69474 | 0, // x8sub_7 |
| 69475 | 0, // zasubb |
| 69476 | 0, // zasubd0 |
| 69477 | 0, // zasubd1 |
| 69478 | 0, // zasubh0 |
| 69479 | 0, // zasubh1 |
| 69480 | 0, // zasubq0 |
| 69481 | 0, // zasubq1 |
| 69482 | 0, // zasubs0 |
| 69483 | 0, // zasubs1 |
| 69484 | 262, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69485 | 262, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69486 | 262, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69487 | 262, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69488 | 0, // zsub3 |
| 69489 | 262, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69490 | 0, // zasubd1_then_zasubq0 |
| 69491 | 0, // zasubd1_then_zasubq1 |
| 69492 | 0, // zasubs1_then_zasubd0 |
| 69493 | 0, // zasubs1_then_zasubd1 |
| 69494 | 0, // zasubs1_then_zasubq0 |
| 69495 | 0, // zasubs1_then_zasubq1 |
| 69496 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69497 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69498 | 0, // zasubh1_then_zasubd0 |
| 69499 | 0, // zasubh1_then_zasubd1 |
| 69500 | 0, // zasubh1_then_zasubq0 |
| 69501 | 0, // zasubh1_then_zasubq1 |
| 69502 | 0, // zasubh1_then_zasubs0 |
| 69503 | 0, // zasubh1_then_zasubs1 |
| 69504 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69505 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69506 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69507 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69508 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69509 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69510 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69511 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69512 | 262, // dsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69513 | 262, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69514 | 262, // dsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69515 | 262, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69516 | 262, // dsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69517 | 262, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69518 | 0, // dsub3_then_bsub |
| 69519 | 0, // dsub3_then_bsub_hi |
| 69520 | 0, // dsub3_then_hsub |
| 69521 | 0, // dsub3_then_hsub_hi |
| 69522 | 0, // dsub3_then_ssub |
| 69523 | 0, // dsub3_then_ssub_hi |
| 69524 | 262, // dsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69525 | 262, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69526 | 262, // dsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69527 | 262, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69528 | 262, // dsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69529 | 262, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69530 | 0, // psub1_then_psub |
| 69531 | 262, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69532 | 0, // qsub3_then_dsub_hi |
| 69533 | 262, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69534 | 0, // x8sub_7_then_sub_32 |
| 69535 | 0, // x8sub_7_then_sub_32_hi |
| 69536 | 0, // x8sub_6_then_sub_32 |
| 69537 | 0, // x8sub_6_then_sub_32_hi |
| 69538 | 0, // x8sub_5_then_sub_32 |
| 69539 | 0, // x8sub_5_then_sub_32_hi |
| 69540 | 0, // x8sub_4_then_sub_32 |
| 69541 | 0, // x8sub_4_then_sub_32_hi |
| 69542 | 0, // x8sub_3_then_sub_32 |
| 69543 | 0, // x8sub_3_then_sub_32_hi |
| 69544 | 0, // x8sub_2_then_sub_32 |
| 69545 | 0, // x8sub_2_then_sub_32_hi |
| 69546 | 0, // x8sub_1_then_sub_32 |
| 69547 | 0, // x8sub_1_then_sub_32_hi |
| 69548 | 0, // subo64_then_sub_32 |
| 69549 | 0, // subo64_then_sub_32_hi |
| 69550 | 262, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69551 | 0, // zsub3_then_zsub_hi |
| 69552 | 262, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69553 | 0, // dsub0_dsub1 |
| 69554 | 0, // dsub0_dsub1_dsub2 |
| 69555 | 262, // dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69556 | 0, // dsub1_dsub2_dsub3 |
| 69557 | 0, // dsub2_dsub3 |
| 69558 | 262, // dsub_dsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69559 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69560 | 262, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69561 | 0, // qsub0_qsub1 |
| 69562 | 0, // qsub0_qsub1_qsub2 |
| 69563 | 262, // qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69564 | 0, // qsub1_qsub2_qsub3 |
| 69565 | 0, // qsub2_qsub3 |
| 69566 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69567 | 0, // x8sub_0_x8sub_1 |
| 69568 | 0, // x8sub_2_x8sub_3 |
| 69569 | 0, // x8sub_4_x8sub_5 |
| 69570 | 0, // x8sub_6_x8sub_7 |
| 69571 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69572 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69573 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69574 | 0, // sub_32_subo64_then_sub_32 |
| 69575 | 262, // zsub_qsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69576 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69577 | 262, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69578 | 262, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69579 | 0, // zsub0_zsub1_zsub2 |
| 69580 | 262, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 69581 | 0, // zsub1_zsub2_zsub3 |
| 69582 | 0, // zsub2_zsub3 |
| 69583 | 0, // zsub0_zsub2 |
| 69584 | 0, // zsub1_zsub3 |
| 69585 | }, |
| 69586 | { // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69587 | 263, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69588 | 263, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69589 | 263, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69590 | 0, // dsub0 |
| 69591 | 263, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69592 | 263, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69593 | 0, // dsub3 |
| 69594 | 263, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69595 | 263, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69596 | 263, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69597 | 0, // psub |
| 69598 | 0, // psub0 |
| 69599 | 0, // psub1 |
| 69600 | 0, // qsub0 |
| 69601 | 263, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69602 | 263, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69603 | 0, // qsub3 |
| 69604 | 263, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69605 | 263, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69606 | 0, // sub_32 |
| 69607 | 0, // sub_32_hi |
| 69608 | 0, // sube32 |
| 69609 | 0, // sube64 |
| 69610 | 0, // subo32 |
| 69611 | 0, // subo64 |
| 69612 | 0, // x8sub_0 |
| 69613 | 0, // x8sub_1 |
| 69614 | 0, // x8sub_2 |
| 69615 | 0, // x8sub_3 |
| 69616 | 0, // x8sub_4 |
| 69617 | 0, // x8sub_5 |
| 69618 | 0, // x8sub_6 |
| 69619 | 0, // x8sub_7 |
| 69620 | 0, // zasubb |
| 69621 | 0, // zasubd0 |
| 69622 | 0, // zasubd1 |
| 69623 | 0, // zasubh0 |
| 69624 | 0, // zasubh1 |
| 69625 | 0, // zasubq0 |
| 69626 | 0, // zasubq1 |
| 69627 | 0, // zasubs0 |
| 69628 | 0, // zasubs1 |
| 69629 | 263, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69630 | 263, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69631 | 263, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69632 | 263, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69633 | 0, // zsub3 |
| 69634 | 263, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69635 | 0, // zasubd1_then_zasubq0 |
| 69636 | 0, // zasubd1_then_zasubq1 |
| 69637 | 0, // zasubs1_then_zasubd0 |
| 69638 | 0, // zasubs1_then_zasubd1 |
| 69639 | 0, // zasubs1_then_zasubq0 |
| 69640 | 0, // zasubs1_then_zasubq1 |
| 69641 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69642 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69643 | 0, // zasubh1_then_zasubd0 |
| 69644 | 0, // zasubh1_then_zasubd1 |
| 69645 | 0, // zasubh1_then_zasubq0 |
| 69646 | 0, // zasubh1_then_zasubq1 |
| 69647 | 0, // zasubh1_then_zasubs0 |
| 69648 | 0, // zasubh1_then_zasubs1 |
| 69649 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69650 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69651 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69652 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69653 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69654 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69655 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69656 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69657 | 263, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69658 | 263, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69659 | 263, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69660 | 263, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69661 | 263, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69662 | 263, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69663 | 0, // dsub3_then_bsub |
| 69664 | 0, // dsub3_then_bsub_hi |
| 69665 | 0, // dsub3_then_hsub |
| 69666 | 0, // dsub3_then_hsub_hi |
| 69667 | 0, // dsub3_then_ssub |
| 69668 | 0, // dsub3_then_ssub_hi |
| 69669 | 263, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69670 | 263, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69671 | 263, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69672 | 263, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69673 | 263, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69674 | 263, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69675 | 0, // psub1_then_psub |
| 69676 | 263, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69677 | 0, // qsub3_then_dsub_hi |
| 69678 | 263, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69679 | 0, // x8sub_7_then_sub_32 |
| 69680 | 0, // x8sub_7_then_sub_32_hi |
| 69681 | 0, // x8sub_6_then_sub_32 |
| 69682 | 0, // x8sub_6_then_sub_32_hi |
| 69683 | 0, // x8sub_5_then_sub_32 |
| 69684 | 0, // x8sub_5_then_sub_32_hi |
| 69685 | 0, // x8sub_4_then_sub_32 |
| 69686 | 0, // x8sub_4_then_sub_32_hi |
| 69687 | 0, // x8sub_3_then_sub_32 |
| 69688 | 0, // x8sub_3_then_sub_32_hi |
| 69689 | 0, // x8sub_2_then_sub_32 |
| 69690 | 0, // x8sub_2_then_sub_32_hi |
| 69691 | 0, // x8sub_1_then_sub_32 |
| 69692 | 0, // x8sub_1_then_sub_32_hi |
| 69693 | 0, // subo64_then_sub_32 |
| 69694 | 0, // subo64_then_sub_32_hi |
| 69695 | 263, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69696 | 0, // zsub3_then_zsub_hi |
| 69697 | 263, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69698 | 0, // dsub0_dsub1 |
| 69699 | 0, // dsub0_dsub1_dsub2 |
| 69700 | 263, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69701 | 0, // dsub1_dsub2_dsub3 |
| 69702 | 0, // dsub2_dsub3 |
| 69703 | 263, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69704 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69705 | 263, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69706 | 0, // qsub0_qsub1 |
| 69707 | 0, // qsub0_qsub1_qsub2 |
| 69708 | 263, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69709 | 0, // qsub1_qsub2_qsub3 |
| 69710 | 0, // qsub2_qsub3 |
| 69711 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69712 | 0, // x8sub_0_x8sub_1 |
| 69713 | 0, // x8sub_2_x8sub_3 |
| 69714 | 0, // x8sub_4_x8sub_5 |
| 69715 | 0, // x8sub_6_x8sub_7 |
| 69716 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69717 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69718 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69719 | 0, // sub_32_subo64_then_sub_32 |
| 69720 | 263, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69721 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69722 | 263, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69723 | 263, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69724 | 0, // zsub0_zsub1_zsub2 |
| 69725 | 263, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 69726 | 0, // zsub1_zsub2_zsub3 |
| 69727 | 0, // zsub2_zsub3 |
| 69728 | 0, // zsub0_zsub2 |
| 69729 | 0, // zsub1_zsub3 |
| 69730 | }, |
| 69731 | { // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69732 | 264, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69733 | 264, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69734 | 264, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69735 | 0, // dsub0 |
| 69736 | 264, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69737 | 264, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69738 | 0, // dsub3 |
| 69739 | 264, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69740 | 264, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69741 | 264, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69742 | 0, // psub |
| 69743 | 0, // psub0 |
| 69744 | 0, // psub1 |
| 69745 | 0, // qsub0 |
| 69746 | 264, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69747 | 264, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69748 | 0, // qsub3 |
| 69749 | 264, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69750 | 264, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69751 | 0, // sub_32 |
| 69752 | 0, // sub_32_hi |
| 69753 | 0, // sube32 |
| 69754 | 0, // sube64 |
| 69755 | 0, // subo32 |
| 69756 | 0, // subo64 |
| 69757 | 0, // x8sub_0 |
| 69758 | 0, // x8sub_1 |
| 69759 | 0, // x8sub_2 |
| 69760 | 0, // x8sub_3 |
| 69761 | 0, // x8sub_4 |
| 69762 | 0, // x8sub_5 |
| 69763 | 0, // x8sub_6 |
| 69764 | 0, // x8sub_7 |
| 69765 | 0, // zasubb |
| 69766 | 0, // zasubd0 |
| 69767 | 0, // zasubd1 |
| 69768 | 0, // zasubh0 |
| 69769 | 0, // zasubh1 |
| 69770 | 0, // zasubq0 |
| 69771 | 0, // zasubq1 |
| 69772 | 0, // zasubs0 |
| 69773 | 0, // zasubs1 |
| 69774 | 264, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69775 | 264, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69776 | 264, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69777 | 264, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69778 | 0, // zsub3 |
| 69779 | 264, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69780 | 0, // zasubd1_then_zasubq0 |
| 69781 | 0, // zasubd1_then_zasubq1 |
| 69782 | 0, // zasubs1_then_zasubd0 |
| 69783 | 0, // zasubs1_then_zasubd1 |
| 69784 | 0, // zasubs1_then_zasubq0 |
| 69785 | 0, // zasubs1_then_zasubq1 |
| 69786 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69787 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69788 | 0, // zasubh1_then_zasubd0 |
| 69789 | 0, // zasubh1_then_zasubd1 |
| 69790 | 0, // zasubh1_then_zasubq0 |
| 69791 | 0, // zasubh1_then_zasubq1 |
| 69792 | 0, // zasubh1_then_zasubs0 |
| 69793 | 0, // zasubh1_then_zasubs1 |
| 69794 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69795 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69796 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69797 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69798 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69799 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69800 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69801 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69802 | 264, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69803 | 264, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69804 | 264, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69805 | 264, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69806 | 264, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69807 | 264, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69808 | 0, // dsub3_then_bsub |
| 69809 | 0, // dsub3_then_bsub_hi |
| 69810 | 0, // dsub3_then_hsub |
| 69811 | 0, // dsub3_then_hsub_hi |
| 69812 | 0, // dsub3_then_ssub |
| 69813 | 0, // dsub3_then_ssub_hi |
| 69814 | 264, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69815 | 264, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69816 | 264, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69817 | 264, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69818 | 264, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69819 | 264, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69820 | 0, // psub1_then_psub |
| 69821 | 264, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69822 | 0, // qsub3_then_dsub_hi |
| 69823 | 264, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69824 | 0, // x8sub_7_then_sub_32 |
| 69825 | 0, // x8sub_7_then_sub_32_hi |
| 69826 | 0, // x8sub_6_then_sub_32 |
| 69827 | 0, // x8sub_6_then_sub_32_hi |
| 69828 | 0, // x8sub_5_then_sub_32 |
| 69829 | 0, // x8sub_5_then_sub_32_hi |
| 69830 | 0, // x8sub_4_then_sub_32 |
| 69831 | 0, // x8sub_4_then_sub_32_hi |
| 69832 | 0, // x8sub_3_then_sub_32 |
| 69833 | 0, // x8sub_3_then_sub_32_hi |
| 69834 | 0, // x8sub_2_then_sub_32 |
| 69835 | 0, // x8sub_2_then_sub_32_hi |
| 69836 | 0, // x8sub_1_then_sub_32 |
| 69837 | 0, // x8sub_1_then_sub_32_hi |
| 69838 | 0, // subo64_then_sub_32 |
| 69839 | 0, // subo64_then_sub_32_hi |
| 69840 | 264, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69841 | 0, // zsub3_then_zsub_hi |
| 69842 | 264, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69843 | 0, // dsub0_dsub1 |
| 69844 | 0, // dsub0_dsub1_dsub2 |
| 69845 | 264, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69846 | 0, // dsub1_dsub2_dsub3 |
| 69847 | 0, // dsub2_dsub3 |
| 69848 | 264, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69849 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69850 | 264, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69851 | 0, // qsub0_qsub1 |
| 69852 | 0, // qsub0_qsub1_qsub2 |
| 69853 | 264, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69854 | 0, // qsub1_qsub2_qsub3 |
| 69855 | 0, // qsub2_qsub3 |
| 69856 | 0, // sub_32_x8sub_1_then_sub_32 |
| 69857 | 0, // x8sub_0_x8sub_1 |
| 69858 | 0, // x8sub_2_x8sub_3 |
| 69859 | 0, // x8sub_4_x8sub_5 |
| 69860 | 0, // x8sub_6_x8sub_7 |
| 69861 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 69862 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 69863 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 69864 | 0, // sub_32_subo64_then_sub_32 |
| 69865 | 264, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69866 | 0, // zsub_qsub1_qsub2_qsub3 |
| 69867 | 264, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69868 | 264, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69869 | 0, // zsub0_zsub1_zsub2 |
| 69870 | 264, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 69871 | 0, // zsub1_zsub2_zsub3 |
| 69872 | 0, // zsub2_zsub3 |
| 69873 | 0, // zsub0_zsub2 |
| 69874 | 0, // zsub1_zsub3 |
| 69875 | }, |
| 69876 | { // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69877 | 265, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69878 | 265, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69879 | 265, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69880 | 0, // dsub0 |
| 69881 | 265, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69882 | 265, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69883 | 0, // dsub3 |
| 69884 | 265, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69885 | 265, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69886 | 265, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69887 | 0, // psub |
| 69888 | 0, // psub0 |
| 69889 | 0, // psub1 |
| 69890 | 0, // qsub0 |
| 69891 | 265, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69892 | 265, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69893 | 0, // qsub3 |
| 69894 | 265, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69895 | 265, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69896 | 0, // sub_32 |
| 69897 | 0, // sub_32_hi |
| 69898 | 0, // sube32 |
| 69899 | 0, // sube64 |
| 69900 | 0, // subo32 |
| 69901 | 0, // subo64 |
| 69902 | 0, // x8sub_0 |
| 69903 | 0, // x8sub_1 |
| 69904 | 0, // x8sub_2 |
| 69905 | 0, // x8sub_3 |
| 69906 | 0, // x8sub_4 |
| 69907 | 0, // x8sub_5 |
| 69908 | 0, // x8sub_6 |
| 69909 | 0, // x8sub_7 |
| 69910 | 0, // zasubb |
| 69911 | 0, // zasubd0 |
| 69912 | 0, // zasubd1 |
| 69913 | 0, // zasubh0 |
| 69914 | 0, // zasubh1 |
| 69915 | 0, // zasubq0 |
| 69916 | 0, // zasubq1 |
| 69917 | 0, // zasubs0 |
| 69918 | 0, // zasubs1 |
| 69919 | 265, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69920 | 265, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69921 | 265, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69922 | 265, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69923 | 0, // zsub3 |
| 69924 | 265, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69925 | 0, // zasubd1_then_zasubq0 |
| 69926 | 0, // zasubd1_then_zasubq1 |
| 69927 | 0, // zasubs1_then_zasubd0 |
| 69928 | 0, // zasubs1_then_zasubd1 |
| 69929 | 0, // zasubs1_then_zasubq0 |
| 69930 | 0, // zasubs1_then_zasubq1 |
| 69931 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 69932 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 69933 | 0, // zasubh1_then_zasubd0 |
| 69934 | 0, // zasubh1_then_zasubd1 |
| 69935 | 0, // zasubh1_then_zasubq0 |
| 69936 | 0, // zasubh1_then_zasubq1 |
| 69937 | 0, // zasubh1_then_zasubs0 |
| 69938 | 0, // zasubh1_then_zasubs1 |
| 69939 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 69940 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 69941 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 69942 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 69943 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 69944 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 69945 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 69946 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 69947 | 265, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69948 | 265, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69949 | 265, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69950 | 265, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69951 | 265, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69952 | 265, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69953 | 0, // dsub3_then_bsub |
| 69954 | 0, // dsub3_then_bsub_hi |
| 69955 | 0, // dsub3_then_hsub |
| 69956 | 0, // dsub3_then_hsub_hi |
| 69957 | 0, // dsub3_then_ssub |
| 69958 | 0, // dsub3_then_ssub_hi |
| 69959 | 265, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69960 | 265, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69961 | 265, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69962 | 265, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69963 | 265, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69964 | 265, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69965 | 0, // psub1_then_psub |
| 69966 | 265, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69967 | 0, // qsub3_then_dsub_hi |
| 69968 | 265, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69969 | 0, // x8sub_7_then_sub_32 |
| 69970 | 0, // x8sub_7_then_sub_32_hi |
| 69971 | 0, // x8sub_6_then_sub_32 |
| 69972 | 0, // x8sub_6_then_sub_32_hi |
| 69973 | 0, // x8sub_5_then_sub_32 |
| 69974 | 0, // x8sub_5_then_sub_32_hi |
| 69975 | 0, // x8sub_4_then_sub_32 |
| 69976 | 0, // x8sub_4_then_sub_32_hi |
| 69977 | 0, // x8sub_3_then_sub_32 |
| 69978 | 0, // x8sub_3_then_sub_32_hi |
| 69979 | 0, // x8sub_2_then_sub_32 |
| 69980 | 0, // x8sub_2_then_sub_32_hi |
| 69981 | 0, // x8sub_1_then_sub_32 |
| 69982 | 0, // x8sub_1_then_sub_32_hi |
| 69983 | 0, // subo64_then_sub_32 |
| 69984 | 0, // subo64_then_sub_32_hi |
| 69985 | 265, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69986 | 0, // zsub3_then_zsub_hi |
| 69987 | 265, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69988 | 0, // dsub0_dsub1 |
| 69989 | 0, // dsub0_dsub1_dsub2 |
| 69990 | 265, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69991 | 0, // dsub1_dsub2_dsub3 |
| 69992 | 0, // dsub2_dsub3 |
| 69993 | 265, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69994 | 0, // dsub_dsub1_dsub2_dsub3 |
| 69995 | 265, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69996 | 0, // qsub0_qsub1 |
| 69997 | 0, // qsub0_qsub1_qsub2 |
| 69998 | 265, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 69999 | 0, // qsub1_qsub2_qsub3 |
| 70000 | 0, // qsub2_qsub3 |
| 70001 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70002 | 0, // x8sub_0_x8sub_1 |
| 70003 | 0, // x8sub_2_x8sub_3 |
| 70004 | 0, // x8sub_4_x8sub_5 |
| 70005 | 0, // x8sub_6_x8sub_7 |
| 70006 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70007 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70008 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70009 | 0, // sub_32_subo64_then_sub_32 |
| 70010 | 265, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 70011 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70012 | 265, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 70013 | 265, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 70014 | 0, // zsub0_zsub1_zsub2 |
| 70015 | 265, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 70016 | 0, // zsub1_zsub2_zsub3 |
| 70017 | 0, // zsub2_zsub3 |
| 70018 | 0, // zsub0_zsub2 |
| 70019 | 0, // zsub1_zsub3 |
| 70020 | }, |
| 70021 | { // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70022 | 266, // bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70023 | 266, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70024 | 266, // dsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70025 | 0, // dsub0 |
| 70026 | 266, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70027 | 266, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70028 | 0, // dsub3 |
| 70029 | 266, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70030 | 266, // hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70031 | 266, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70032 | 0, // psub |
| 70033 | 0, // psub0 |
| 70034 | 0, // psub1 |
| 70035 | 0, // qsub0 |
| 70036 | 266, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70037 | 266, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70038 | 0, // qsub3 |
| 70039 | 266, // ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70040 | 266, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70041 | 0, // sub_32 |
| 70042 | 0, // sub_32_hi |
| 70043 | 0, // sube32 |
| 70044 | 0, // sube64 |
| 70045 | 0, // subo32 |
| 70046 | 0, // subo64 |
| 70047 | 0, // x8sub_0 |
| 70048 | 0, // x8sub_1 |
| 70049 | 0, // x8sub_2 |
| 70050 | 0, // x8sub_3 |
| 70051 | 0, // x8sub_4 |
| 70052 | 0, // x8sub_5 |
| 70053 | 0, // x8sub_6 |
| 70054 | 0, // x8sub_7 |
| 70055 | 0, // zasubb |
| 70056 | 0, // zasubd0 |
| 70057 | 0, // zasubd1 |
| 70058 | 0, // zasubh0 |
| 70059 | 0, // zasubh1 |
| 70060 | 0, // zasubq0 |
| 70061 | 0, // zasubq1 |
| 70062 | 0, // zasubs0 |
| 70063 | 0, // zasubs1 |
| 70064 | 266, // zsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70065 | 266, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70066 | 266, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70067 | 266, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70068 | 0, // zsub3 |
| 70069 | 266, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70070 | 0, // zasubd1_then_zasubq0 |
| 70071 | 0, // zasubd1_then_zasubq1 |
| 70072 | 0, // zasubs1_then_zasubd0 |
| 70073 | 0, // zasubs1_then_zasubd1 |
| 70074 | 0, // zasubs1_then_zasubq0 |
| 70075 | 0, // zasubs1_then_zasubq1 |
| 70076 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70077 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70078 | 0, // zasubh1_then_zasubd0 |
| 70079 | 0, // zasubh1_then_zasubd1 |
| 70080 | 0, // zasubh1_then_zasubq0 |
| 70081 | 0, // zasubh1_then_zasubq1 |
| 70082 | 0, // zasubh1_then_zasubs0 |
| 70083 | 0, // zasubh1_then_zasubs1 |
| 70084 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70085 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70086 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70087 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70088 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70089 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70090 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70091 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70092 | 266, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70093 | 266, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70094 | 266, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70095 | 266, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70096 | 266, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70097 | 266, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70098 | 0, // dsub3_then_bsub |
| 70099 | 0, // dsub3_then_bsub_hi |
| 70100 | 0, // dsub3_then_hsub |
| 70101 | 0, // dsub3_then_hsub_hi |
| 70102 | 0, // dsub3_then_ssub |
| 70103 | 0, // dsub3_then_ssub_hi |
| 70104 | 266, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70105 | 266, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70106 | 266, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70107 | 266, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70108 | 266, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70109 | 266, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70110 | 0, // psub1_then_psub |
| 70111 | 266, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70112 | 0, // qsub3_then_dsub_hi |
| 70113 | 266, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70114 | 0, // x8sub_7_then_sub_32 |
| 70115 | 0, // x8sub_7_then_sub_32_hi |
| 70116 | 0, // x8sub_6_then_sub_32 |
| 70117 | 0, // x8sub_6_then_sub_32_hi |
| 70118 | 0, // x8sub_5_then_sub_32 |
| 70119 | 0, // x8sub_5_then_sub_32_hi |
| 70120 | 0, // x8sub_4_then_sub_32 |
| 70121 | 0, // x8sub_4_then_sub_32_hi |
| 70122 | 0, // x8sub_3_then_sub_32 |
| 70123 | 0, // x8sub_3_then_sub_32_hi |
| 70124 | 0, // x8sub_2_then_sub_32 |
| 70125 | 0, // x8sub_2_then_sub_32_hi |
| 70126 | 0, // x8sub_1_then_sub_32 |
| 70127 | 0, // x8sub_1_then_sub_32_hi |
| 70128 | 0, // subo64_then_sub_32 |
| 70129 | 0, // subo64_then_sub_32_hi |
| 70130 | 266, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70131 | 0, // zsub3_then_zsub_hi |
| 70132 | 266, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70133 | 0, // dsub0_dsub1 |
| 70134 | 0, // dsub0_dsub1_dsub2 |
| 70135 | 266, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70136 | 0, // dsub1_dsub2_dsub3 |
| 70137 | 0, // dsub2_dsub3 |
| 70138 | 266, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70139 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70140 | 266, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70141 | 0, // qsub0_qsub1 |
| 70142 | 0, // qsub0_qsub1_qsub2 |
| 70143 | 266, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70144 | 0, // qsub1_qsub2_qsub3 |
| 70145 | 0, // qsub2_qsub3 |
| 70146 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70147 | 0, // x8sub_0_x8sub_1 |
| 70148 | 0, // x8sub_2_x8sub_3 |
| 70149 | 0, // x8sub_4_x8sub_5 |
| 70150 | 0, // x8sub_6_x8sub_7 |
| 70151 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70152 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70153 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70154 | 0, // sub_32_subo64_then_sub_32 |
| 70155 | 266, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70156 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70157 | 266, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70158 | 266, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70159 | 0, // zsub0_zsub1_zsub2 |
| 70160 | 266, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 70161 | 0, // zsub1_zsub2_zsub3 |
| 70162 | 0, // zsub2_zsub3 |
| 70163 | 0, // zsub0_zsub2 |
| 70164 | 0, // zsub1_zsub3 |
| 70165 | }, |
| 70166 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70167 | 267, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70168 | 267, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70169 | 267, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70170 | 0, // dsub0 |
| 70171 | 267, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70172 | 267, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70173 | 0, // dsub3 |
| 70174 | 267, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70175 | 267, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70176 | 267, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70177 | 0, // psub |
| 70178 | 0, // psub0 |
| 70179 | 0, // psub1 |
| 70180 | 0, // qsub0 |
| 70181 | 267, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70182 | 267, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70183 | 0, // qsub3 |
| 70184 | 267, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70185 | 267, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70186 | 0, // sub_32 |
| 70187 | 0, // sub_32_hi |
| 70188 | 0, // sube32 |
| 70189 | 0, // sube64 |
| 70190 | 0, // subo32 |
| 70191 | 0, // subo64 |
| 70192 | 0, // x8sub_0 |
| 70193 | 0, // x8sub_1 |
| 70194 | 0, // x8sub_2 |
| 70195 | 0, // x8sub_3 |
| 70196 | 0, // x8sub_4 |
| 70197 | 0, // x8sub_5 |
| 70198 | 0, // x8sub_6 |
| 70199 | 0, // x8sub_7 |
| 70200 | 0, // zasubb |
| 70201 | 0, // zasubd0 |
| 70202 | 0, // zasubd1 |
| 70203 | 0, // zasubh0 |
| 70204 | 0, // zasubh1 |
| 70205 | 0, // zasubq0 |
| 70206 | 0, // zasubq1 |
| 70207 | 0, // zasubs0 |
| 70208 | 0, // zasubs1 |
| 70209 | 267, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70210 | 267, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70211 | 267, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70212 | 267, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70213 | 0, // zsub3 |
| 70214 | 267, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70215 | 0, // zasubd1_then_zasubq0 |
| 70216 | 0, // zasubd1_then_zasubq1 |
| 70217 | 0, // zasubs1_then_zasubd0 |
| 70218 | 0, // zasubs1_then_zasubd1 |
| 70219 | 0, // zasubs1_then_zasubq0 |
| 70220 | 0, // zasubs1_then_zasubq1 |
| 70221 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70222 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70223 | 0, // zasubh1_then_zasubd0 |
| 70224 | 0, // zasubh1_then_zasubd1 |
| 70225 | 0, // zasubh1_then_zasubq0 |
| 70226 | 0, // zasubh1_then_zasubq1 |
| 70227 | 0, // zasubh1_then_zasubs0 |
| 70228 | 0, // zasubh1_then_zasubs1 |
| 70229 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70230 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70231 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70232 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70233 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70234 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70235 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70236 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70237 | 267, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70238 | 267, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70239 | 267, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70240 | 267, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70241 | 267, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70242 | 267, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70243 | 0, // dsub3_then_bsub |
| 70244 | 0, // dsub3_then_bsub_hi |
| 70245 | 0, // dsub3_then_hsub |
| 70246 | 0, // dsub3_then_hsub_hi |
| 70247 | 0, // dsub3_then_ssub |
| 70248 | 0, // dsub3_then_ssub_hi |
| 70249 | 267, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70250 | 267, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70251 | 267, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70252 | 267, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70253 | 267, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70254 | 267, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70255 | 0, // psub1_then_psub |
| 70256 | 267, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70257 | 0, // qsub3_then_dsub_hi |
| 70258 | 267, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70259 | 0, // x8sub_7_then_sub_32 |
| 70260 | 0, // x8sub_7_then_sub_32_hi |
| 70261 | 0, // x8sub_6_then_sub_32 |
| 70262 | 0, // x8sub_6_then_sub_32_hi |
| 70263 | 0, // x8sub_5_then_sub_32 |
| 70264 | 0, // x8sub_5_then_sub_32_hi |
| 70265 | 0, // x8sub_4_then_sub_32 |
| 70266 | 0, // x8sub_4_then_sub_32_hi |
| 70267 | 0, // x8sub_3_then_sub_32 |
| 70268 | 0, // x8sub_3_then_sub_32_hi |
| 70269 | 0, // x8sub_2_then_sub_32 |
| 70270 | 0, // x8sub_2_then_sub_32_hi |
| 70271 | 0, // x8sub_1_then_sub_32 |
| 70272 | 0, // x8sub_1_then_sub_32_hi |
| 70273 | 0, // subo64_then_sub_32 |
| 70274 | 0, // subo64_then_sub_32_hi |
| 70275 | 267, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70276 | 0, // zsub3_then_zsub_hi |
| 70277 | 267, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70278 | 0, // dsub0_dsub1 |
| 70279 | 0, // dsub0_dsub1_dsub2 |
| 70280 | 267, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70281 | 0, // dsub1_dsub2_dsub3 |
| 70282 | 0, // dsub2_dsub3 |
| 70283 | 267, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70284 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70285 | 267, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70286 | 0, // qsub0_qsub1 |
| 70287 | 0, // qsub0_qsub1_qsub2 |
| 70288 | 267, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70289 | 0, // qsub1_qsub2_qsub3 |
| 70290 | 0, // qsub2_qsub3 |
| 70291 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70292 | 0, // x8sub_0_x8sub_1 |
| 70293 | 0, // x8sub_2_x8sub_3 |
| 70294 | 0, // x8sub_4_x8sub_5 |
| 70295 | 0, // x8sub_6_x8sub_7 |
| 70296 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70297 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70298 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70299 | 0, // sub_32_subo64_then_sub_32 |
| 70300 | 267, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70301 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70302 | 267, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70303 | 267, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70304 | 0, // zsub0_zsub1_zsub2 |
| 70305 | 267, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 70306 | 0, // zsub1_zsub2_zsub3 |
| 70307 | 0, // zsub2_zsub3 |
| 70308 | 0, // zsub0_zsub2 |
| 70309 | 0, // zsub1_zsub3 |
| 70310 | }, |
| 70311 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70312 | 268, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70313 | 268, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70314 | 268, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70315 | 0, // dsub0 |
| 70316 | 268, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70317 | 268, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70318 | 0, // dsub3 |
| 70319 | 268, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70320 | 268, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70321 | 268, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70322 | 0, // psub |
| 70323 | 0, // psub0 |
| 70324 | 0, // psub1 |
| 70325 | 0, // qsub0 |
| 70326 | 268, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70327 | 268, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70328 | 0, // qsub3 |
| 70329 | 268, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70330 | 268, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70331 | 0, // sub_32 |
| 70332 | 0, // sub_32_hi |
| 70333 | 0, // sube32 |
| 70334 | 0, // sube64 |
| 70335 | 0, // subo32 |
| 70336 | 0, // subo64 |
| 70337 | 0, // x8sub_0 |
| 70338 | 0, // x8sub_1 |
| 70339 | 0, // x8sub_2 |
| 70340 | 0, // x8sub_3 |
| 70341 | 0, // x8sub_4 |
| 70342 | 0, // x8sub_5 |
| 70343 | 0, // x8sub_6 |
| 70344 | 0, // x8sub_7 |
| 70345 | 0, // zasubb |
| 70346 | 0, // zasubd0 |
| 70347 | 0, // zasubd1 |
| 70348 | 0, // zasubh0 |
| 70349 | 0, // zasubh1 |
| 70350 | 0, // zasubq0 |
| 70351 | 0, // zasubq1 |
| 70352 | 0, // zasubs0 |
| 70353 | 0, // zasubs1 |
| 70354 | 268, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70355 | 268, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70356 | 268, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70357 | 268, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70358 | 0, // zsub3 |
| 70359 | 268, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70360 | 0, // zasubd1_then_zasubq0 |
| 70361 | 0, // zasubd1_then_zasubq1 |
| 70362 | 0, // zasubs1_then_zasubd0 |
| 70363 | 0, // zasubs1_then_zasubd1 |
| 70364 | 0, // zasubs1_then_zasubq0 |
| 70365 | 0, // zasubs1_then_zasubq1 |
| 70366 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70367 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70368 | 0, // zasubh1_then_zasubd0 |
| 70369 | 0, // zasubh1_then_zasubd1 |
| 70370 | 0, // zasubh1_then_zasubq0 |
| 70371 | 0, // zasubh1_then_zasubq1 |
| 70372 | 0, // zasubh1_then_zasubs0 |
| 70373 | 0, // zasubh1_then_zasubs1 |
| 70374 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70375 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70376 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70377 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70378 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70379 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70380 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70381 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70382 | 268, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70383 | 268, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70384 | 268, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70385 | 268, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70386 | 268, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70387 | 268, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70388 | 0, // dsub3_then_bsub |
| 70389 | 0, // dsub3_then_bsub_hi |
| 70390 | 0, // dsub3_then_hsub |
| 70391 | 0, // dsub3_then_hsub_hi |
| 70392 | 0, // dsub3_then_ssub |
| 70393 | 0, // dsub3_then_ssub_hi |
| 70394 | 268, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70395 | 268, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70396 | 268, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70397 | 268, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70398 | 268, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70399 | 268, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70400 | 0, // psub1_then_psub |
| 70401 | 268, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70402 | 0, // qsub3_then_dsub_hi |
| 70403 | 268, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70404 | 0, // x8sub_7_then_sub_32 |
| 70405 | 0, // x8sub_7_then_sub_32_hi |
| 70406 | 0, // x8sub_6_then_sub_32 |
| 70407 | 0, // x8sub_6_then_sub_32_hi |
| 70408 | 0, // x8sub_5_then_sub_32 |
| 70409 | 0, // x8sub_5_then_sub_32_hi |
| 70410 | 0, // x8sub_4_then_sub_32 |
| 70411 | 0, // x8sub_4_then_sub_32_hi |
| 70412 | 0, // x8sub_3_then_sub_32 |
| 70413 | 0, // x8sub_3_then_sub_32_hi |
| 70414 | 0, // x8sub_2_then_sub_32 |
| 70415 | 0, // x8sub_2_then_sub_32_hi |
| 70416 | 0, // x8sub_1_then_sub_32 |
| 70417 | 0, // x8sub_1_then_sub_32_hi |
| 70418 | 0, // subo64_then_sub_32 |
| 70419 | 0, // subo64_then_sub_32_hi |
| 70420 | 268, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70421 | 0, // zsub3_then_zsub_hi |
| 70422 | 268, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70423 | 0, // dsub0_dsub1 |
| 70424 | 0, // dsub0_dsub1_dsub2 |
| 70425 | 268, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70426 | 0, // dsub1_dsub2_dsub3 |
| 70427 | 0, // dsub2_dsub3 |
| 70428 | 268, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70429 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70430 | 268, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70431 | 0, // qsub0_qsub1 |
| 70432 | 0, // qsub0_qsub1_qsub2 |
| 70433 | 268, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70434 | 0, // qsub1_qsub2_qsub3 |
| 70435 | 0, // qsub2_qsub3 |
| 70436 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70437 | 0, // x8sub_0_x8sub_1 |
| 70438 | 0, // x8sub_2_x8sub_3 |
| 70439 | 0, // x8sub_4_x8sub_5 |
| 70440 | 0, // x8sub_6_x8sub_7 |
| 70441 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70442 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70443 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70444 | 0, // sub_32_subo64_then_sub_32 |
| 70445 | 268, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70446 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70447 | 268, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70448 | 268, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70449 | 0, // zsub0_zsub1_zsub2 |
| 70450 | 268, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 70451 | 0, // zsub1_zsub2_zsub3 |
| 70452 | 0, // zsub2_zsub3 |
| 70453 | 0, // zsub0_zsub2 |
| 70454 | 0, // zsub1_zsub3 |
| 70455 | }, |
| 70456 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70457 | 269, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70458 | 269, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70459 | 269, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70460 | 0, // dsub0 |
| 70461 | 269, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70462 | 269, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70463 | 0, // dsub3 |
| 70464 | 269, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70465 | 269, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70466 | 269, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70467 | 0, // psub |
| 70468 | 0, // psub0 |
| 70469 | 0, // psub1 |
| 70470 | 0, // qsub0 |
| 70471 | 269, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70472 | 269, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70473 | 0, // qsub3 |
| 70474 | 269, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70475 | 269, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70476 | 0, // sub_32 |
| 70477 | 0, // sub_32_hi |
| 70478 | 0, // sube32 |
| 70479 | 0, // sube64 |
| 70480 | 0, // subo32 |
| 70481 | 0, // subo64 |
| 70482 | 0, // x8sub_0 |
| 70483 | 0, // x8sub_1 |
| 70484 | 0, // x8sub_2 |
| 70485 | 0, // x8sub_3 |
| 70486 | 0, // x8sub_4 |
| 70487 | 0, // x8sub_5 |
| 70488 | 0, // x8sub_6 |
| 70489 | 0, // x8sub_7 |
| 70490 | 0, // zasubb |
| 70491 | 0, // zasubd0 |
| 70492 | 0, // zasubd1 |
| 70493 | 0, // zasubh0 |
| 70494 | 0, // zasubh1 |
| 70495 | 0, // zasubq0 |
| 70496 | 0, // zasubq1 |
| 70497 | 0, // zasubs0 |
| 70498 | 0, // zasubs1 |
| 70499 | 269, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70500 | 269, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70501 | 269, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70502 | 269, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70503 | 0, // zsub3 |
| 70504 | 269, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70505 | 0, // zasubd1_then_zasubq0 |
| 70506 | 0, // zasubd1_then_zasubq1 |
| 70507 | 0, // zasubs1_then_zasubd0 |
| 70508 | 0, // zasubs1_then_zasubd1 |
| 70509 | 0, // zasubs1_then_zasubq0 |
| 70510 | 0, // zasubs1_then_zasubq1 |
| 70511 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70512 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70513 | 0, // zasubh1_then_zasubd0 |
| 70514 | 0, // zasubh1_then_zasubd1 |
| 70515 | 0, // zasubh1_then_zasubq0 |
| 70516 | 0, // zasubh1_then_zasubq1 |
| 70517 | 0, // zasubh1_then_zasubs0 |
| 70518 | 0, // zasubh1_then_zasubs1 |
| 70519 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70520 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70521 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70522 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70523 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70524 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70525 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70526 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70527 | 269, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70528 | 269, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70529 | 269, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70530 | 269, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70531 | 269, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70532 | 269, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70533 | 0, // dsub3_then_bsub |
| 70534 | 0, // dsub3_then_bsub_hi |
| 70535 | 0, // dsub3_then_hsub |
| 70536 | 0, // dsub3_then_hsub_hi |
| 70537 | 0, // dsub3_then_ssub |
| 70538 | 0, // dsub3_then_ssub_hi |
| 70539 | 269, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70540 | 269, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70541 | 269, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70542 | 269, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70543 | 269, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70544 | 269, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70545 | 0, // psub1_then_psub |
| 70546 | 269, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70547 | 0, // qsub3_then_dsub_hi |
| 70548 | 269, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70549 | 0, // x8sub_7_then_sub_32 |
| 70550 | 0, // x8sub_7_then_sub_32_hi |
| 70551 | 0, // x8sub_6_then_sub_32 |
| 70552 | 0, // x8sub_6_then_sub_32_hi |
| 70553 | 0, // x8sub_5_then_sub_32 |
| 70554 | 0, // x8sub_5_then_sub_32_hi |
| 70555 | 0, // x8sub_4_then_sub_32 |
| 70556 | 0, // x8sub_4_then_sub_32_hi |
| 70557 | 0, // x8sub_3_then_sub_32 |
| 70558 | 0, // x8sub_3_then_sub_32_hi |
| 70559 | 0, // x8sub_2_then_sub_32 |
| 70560 | 0, // x8sub_2_then_sub_32_hi |
| 70561 | 0, // x8sub_1_then_sub_32 |
| 70562 | 0, // x8sub_1_then_sub_32_hi |
| 70563 | 0, // subo64_then_sub_32 |
| 70564 | 0, // subo64_then_sub_32_hi |
| 70565 | 269, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70566 | 0, // zsub3_then_zsub_hi |
| 70567 | 269, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70568 | 0, // dsub0_dsub1 |
| 70569 | 0, // dsub0_dsub1_dsub2 |
| 70570 | 269, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70571 | 0, // dsub1_dsub2_dsub3 |
| 70572 | 0, // dsub2_dsub3 |
| 70573 | 269, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70574 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70575 | 269, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70576 | 0, // qsub0_qsub1 |
| 70577 | 0, // qsub0_qsub1_qsub2 |
| 70578 | 269, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70579 | 0, // qsub1_qsub2_qsub3 |
| 70580 | 0, // qsub2_qsub3 |
| 70581 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70582 | 0, // x8sub_0_x8sub_1 |
| 70583 | 0, // x8sub_2_x8sub_3 |
| 70584 | 0, // x8sub_4_x8sub_5 |
| 70585 | 0, // x8sub_6_x8sub_7 |
| 70586 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70587 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70588 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70589 | 0, // sub_32_subo64_then_sub_32 |
| 70590 | 269, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70591 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70592 | 269, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70593 | 269, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70594 | 0, // zsub0_zsub1_zsub2 |
| 70595 | 269, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 70596 | 0, // zsub1_zsub2_zsub3 |
| 70597 | 0, // zsub2_zsub3 |
| 70598 | 0, // zsub0_zsub2 |
| 70599 | 0, // zsub1_zsub3 |
| 70600 | }, |
| 70601 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70602 | 270, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70603 | 270, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70604 | 270, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70605 | 0, // dsub0 |
| 70606 | 270, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70607 | 270, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70608 | 0, // dsub3 |
| 70609 | 270, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70610 | 270, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70611 | 270, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70612 | 0, // psub |
| 70613 | 0, // psub0 |
| 70614 | 0, // psub1 |
| 70615 | 0, // qsub0 |
| 70616 | 270, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70617 | 270, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70618 | 0, // qsub3 |
| 70619 | 270, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70620 | 270, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70621 | 0, // sub_32 |
| 70622 | 0, // sub_32_hi |
| 70623 | 0, // sube32 |
| 70624 | 0, // sube64 |
| 70625 | 0, // subo32 |
| 70626 | 0, // subo64 |
| 70627 | 0, // x8sub_0 |
| 70628 | 0, // x8sub_1 |
| 70629 | 0, // x8sub_2 |
| 70630 | 0, // x8sub_3 |
| 70631 | 0, // x8sub_4 |
| 70632 | 0, // x8sub_5 |
| 70633 | 0, // x8sub_6 |
| 70634 | 0, // x8sub_7 |
| 70635 | 0, // zasubb |
| 70636 | 0, // zasubd0 |
| 70637 | 0, // zasubd1 |
| 70638 | 0, // zasubh0 |
| 70639 | 0, // zasubh1 |
| 70640 | 0, // zasubq0 |
| 70641 | 0, // zasubq1 |
| 70642 | 0, // zasubs0 |
| 70643 | 0, // zasubs1 |
| 70644 | 270, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70645 | 270, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70646 | 270, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70647 | 270, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70648 | 0, // zsub3 |
| 70649 | 270, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70650 | 0, // zasubd1_then_zasubq0 |
| 70651 | 0, // zasubd1_then_zasubq1 |
| 70652 | 0, // zasubs1_then_zasubd0 |
| 70653 | 0, // zasubs1_then_zasubd1 |
| 70654 | 0, // zasubs1_then_zasubq0 |
| 70655 | 0, // zasubs1_then_zasubq1 |
| 70656 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70657 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70658 | 0, // zasubh1_then_zasubd0 |
| 70659 | 0, // zasubh1_then_zasubd1 |
| 70660 | 0, // zasubh1_then_zasubq0 |
| 70661 | 0, // zasubh1_then_zasubq1 |
| 70662 | 0, // zasubh1_then_zasubs0 |
| 70663 | 0, // zasubh1_then_zasubs1 |
| 70664 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70665 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70666 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70667 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70668 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70669 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70670 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70671 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70672 | 270, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70673 | 270, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70674 | 270, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70675 | 270, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70676 | 270, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70677 | 270, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70678 | 0, // dsub3_then_bsub |
| 70679 | 0, // dsub3_then_bsub_hi |
| 70680 | 0, // dsub3_then_hsub |
| 70681 | 0, // dsub3_then_hsub_hi |
| 70682 | 0, // dsub3_then_ssub |
| 70683 | 0, // dsub3_then_ssub_hi |
| 70684 | 270, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70685 | 270, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70686 | 270, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70687 | 270, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70688 | 270, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70689 | 270, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70690 | 0, // psub1_then_psub |
| 70691 | 270, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70692 | 0, // qsub3_then_dsub_hi |
| 70693 | 270, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70694 | 0, // x8sub_7_then_sub_32 |
| 70695 | 0, // x8sub_7_then_sub_32_hi |
| 70696 | 0, // x8sub_6_then_sub_32 |
| 70697 | 0, // x8sub_6_then_sub_32_hi |
| 70698 | 0, // x8sub_5_then_sub_32 |
| 70699 | 0, // x8sub_5_then_sub_32_hi |
| 70700 | 0, // x8sub_4_then_sub_32 |
| 70701 | 0, // x8sub_4_then_sub_32_hi |
| 70702 | 0, // x8sub_3_then_sub_32 |
| 70703 | 0, // x8sub_3_then_sub_32_hi |
| 70704 | 0, // x8sub_2_then_sub_32 |
| 70705 | 0, // x8sub_2_then_sub_32_hi |
| 70706 | 0, // x8sub_1_then_sub_32 |
| 70707 | 0, // x8sub_1_then_sub_32_hi |
| 70708 | 0, // subo64_then_sub_32 |
| 70709 | 0, // subo64_then_sub_32_hi |
| 70710 | 270, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70711 | 0, // zsub3_then_zsub_hi |
| 70712 | 270, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70713 | 0, // dsub0_dsub1 |
| 70714 | 0, // dsub0_dsub1_dsub2 |
| 70715 | 270, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70716 | 0, // dsub1_dsub2_dsub3 |
| 70717 | 0, // dsub2_dsub3 |
| 70718 | 270, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70719 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70720 | 270, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70721 | 0, // qsub0_qsub1 |
| 70722 | 0, // qsub0_qsub1_qsub2 |
| 70723 | 270, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70724 | 0, // qsub1_qsub2_qsub3 |
| 70725 | 0, // qsub2_qsub3 |
| 70726 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70727 | 0, // x8sub_0_x8sub_1 |
| 70728 | 0, // x8sub_2_x8sub_3 |
| 70729 | 0, // x8sub_4_x8sub_5 |
| 70730 | 0, // x8sub_6_x8sub_7 |
| 70731 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70732 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70733 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70734 | 0, // sub_32_subo64_then_sub_32 |
| 70735 | 270, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70736 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70737 | 270, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70738 | 270, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70739 | 0, // zsub0_zsub1_zsub2 |
| 70740 | 270, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 70741 | 0, // zsub1_zsub2_zsub3 |
| 70742 | 0, // zsub2_zsub3 |
| 70743 | 0, // zsub0_zsub2 |
| 70744 | 0, // zsub1_zsub3 |
| 70745 | }, |
| 70746 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70747 | 271, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70748 | 271, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70749 | 271, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70750 | 0, // dsub0 |
| 70751 | 271, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70752 | 271, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70753 | 0, // dsub3 |
| 70754 | 271, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70755 | 271, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70756 | 271, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70757 | 0, // psub |
| 70758 | 0, // psub0 |
| 70759 | 0, // psub1 |
| 70760 | 0, // qsub0 |
| 70761 | 271, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70762 | 271, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70763 | 0, // qsub3 |
| 70764 | 271, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70765 | 271, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70766 | 0, // sub_32 |
| 70767 | 0, // sub_32_hi |
| 70768 | 0, // sube32 |
| 70769 | 0, // sube64 |
| 70770 | 0, // subo32 |
| 70771 | 0, // subo64 |
| 70772 | 0, // x8sub_0 |
| 70773 | 0, // x8sub_1 |
| 70774 | 0, // x8sub_2 |
| 70775 | 0, // x8sub_3 |
| 70776 | 0, // x8sub_4 |
| 70777 | 0, // x8sub_5 |
| 70778 | 0, // x8sub_6 |
| 70779 | 0, // x8sub_7 |
| 70780 | 0, // zasubb |
| 70781 | 0, // zasubd0 |
| 70782 | 0, // zasubd1 |
| 70783 | 0, // zasubh0 |
| 70784 | 0, // zasubh1 |
| 70785 | 0, // zasubq0 |
| 70786 | 0, // zasubq1 |
| 70787 | 0, // zasubs0 |
| 70788 | 0, // zasubs1 |
| 70789 | 271, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70790 | 271, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70791 | 271, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70792 | 271, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70793 | 0, // zsub3 |
| 70794 | 271, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70795 | 0, // zasubd1_then_zasubq0 |
| 70796 | 0, // zasubd1_then_zasubq1 |
| 70797 | 0, // zasubs1_then_zasubd0 |
| 70798 | 0, // zasubs1_then_zasubd1 |
| 70799 | 0, // zasubs1_then_zasubq0 |
| 70800 | 0, // zasubs1_then_zasubq1 |
| 70801 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70802 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70803 | 0, // zasubh1_then_zasubd0 |
| 70804 | 0, // zasubh1_then_zasubd1 |
| 70805 | 0, // zasubh1_then_zasubq0 |
| 70806 | 0, // zasubh1_then_zasubq1 |
| 70807 | 0, // zasubh1_then_zasubs0 |
| 70808 | 0, // zasubh1_then_zasubs1 |
| 70809 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70810 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70811 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70812 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70813 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70814 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70815 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70816 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70817 | 271, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70818 | 271, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70819 | 271, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70820 | 271, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70821 | 271, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70822 | 271, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70823 | 0, // dsub3_then_bsub |
| 70824 | 0, // dsub3_then_bsub_hi |
| 70825 | 0, // dsub3_then_hsub |
| 70826 | 0, // dsub3_then_hsub_hi |
| 70827 | 0, // dsub3_then_ssub |
| 70828 | 0, // dsub3_then_ssub_hi |
| 70829 | 271, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70830 | 271, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70831 | 271, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70832 | 271, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70833 | 271, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70834 | 271, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70835 | 0, // psub1_then_psub |
| 70836 | 271, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70837 | 0, // qsub3_then_dsub_hi |
| 70838 | 271, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70839 | 0, // x8sub_7_then_sub_32 |
| 70840 | 0, // x8sub_7_then_sub_32_hi |
| 70841 | 0, // x8sub_6_then_sub_32 |
| 70842 | 0, // x8sub_6_then_sub_32_hi |
| 70843 | 0, // x8sub_5_then_sub_32 |
| 70844 | 0, // x8sub_5_then_sub_32_hi |
| 70845 | 0, // x8sub_4_then_sub_32 |
| 70846 | 0, // x8sub_4_then_sub_32_hi |
| 70847 | 0, // x8sub_3_then_sub_32 |
| 70848 | 0, // x8sub_3_then_sub_32_hi |
| 70849 | 0, // x8sub_2_then_sub_32 |
| 70850 | 0, // x8sub_2_then_sub_32_hi |
| 70851 | 0, // x8sub_1_then_sub_32 |
| 70852 | 0, // x8sub_1_then_sub_32_hi |
| 70853 | 0, // subo64_then_sub_32 |
| 70854 | 0, // subo64_then_sub_32_hi |
| 70855 | 271, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70856 | 0, // zsub3_then_zsub_hi |
| 70857 | 271, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70858 | 0, // dsub0_dsub1 |
| 70859 | 0, // dsub0_dsub1_dsub2 |
| 70860 | 271, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70861 | 0, // dsub1_dsub2_dsub3 |
| 70862 | 0, // dsub2_dsub3 |
| 70863 | 271, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70864 | 0, // dsub_dsub1_dsub2_dsub3 |
| 70865 | 271, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70866 | 0, // qsub0_qsub1 |
| 70867 | 0, // qsub0_qsub1_qsub2 |
| 70868 | 271, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70869 | 0, // qsub1_qsub2_qsub3 |
| 70870 | 0, // qsub2_qsub3 |
| 70871 | 0, // sub_32_x8sub_1_then_sub_32 |
| 70872 | 0, // x8sub_0_x8sub_1 |
| 70873 | 0, // x8sub_2_x8sub_3 |
| 70874 | 0, // x8sub_4_x8sub_5 |
| 70875 | 0, // x8sub_6_x8sub_7 |
| 70876 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 70877 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 70878 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 70879 | 0, // sub_32_subo64_then_sub_32 |
| 70880 | 271, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70881 | 0, // zsub_qsub1_qsub2_qsub3 |
| 70882 | 271, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70883 | 271, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70884 | 0, // zsub0_zsub1_zsub2 |
| 70885 | 271, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 70886 | 0, // zsub1_zsub2_zsub3 |
| 70887 | 0, // zsub2_zsub3 |
| 70888 | 0, // zsub0_zsub2 |
| 70889 | 0, // zsub1_zsub3 |
| 70890 | }, |
| 70891 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70892 | 272, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70893 | 272, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70894 | 272, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70895 | 0, // dsub0 |
| 70896 | 272, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70897 | 272, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70898 | 0, // dsub3 |
| 70899 | 272, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70900 | 272, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70901 | 272, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70902 | 0, // psub |
| 70903 | 0, // psub0 |
| 70904 | 0, // psub1 |
| 70905 | 0, // qsub0 |
| 70906 | 272, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70907 | 272, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70908 | 0, // qsub3 |
| 70909 | 272, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70910 | 272, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70911 | 0, // sub_32 |
| 70912 | 0, // sub_32_hi |
| 70913 | 0, // sube32 |
| 70914 | 0, // sube64 |
| 70915 | 0, // subo32 |
| 70916 | 0, // subo64 |
| 70917 | 0, // x8sub_0 |
| 70918 | 0, // x8sub_1 |
| 70919 | 0, // x8sub_2 |
| 70920 | 0, // x8sub_3 |
| 70921 | 0, // x8sub_4 |
| 70922 | 0, // x8sub_5 |
| 70923 | 0, // x8sub_6 |
| 70924 | 0, // x8sub_7 |
| 70925 | 0, // zasubb |
| 70926 | 0, // zasubd0 |
| 70927 | 0, // zasubd1 |
| 70928 | 0, // zasubh0 |
| 70929 | 0, // zasubh1 |
| 70930 | 0, // zasubq0 |
| 70931 | 0, // zasubq1 |
| 70932 | 0, // zasubs0 |
| 70933 | 0, // zasubs1 |
| 70934 | 272, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70935 | 272, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70936 | 272, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70937 | 272, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70938 | 0, // zsub3 |
| 70939 | 272, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70940 | 0, // zasubd1_then_zasubq0 |
| 70941 | 0, // zasubd1_then_zasubq1 |
| 70942 | 0, // zasubs1_then_zasubd0 |
| 70943 | 0, // zasubs1_then_zasubd1 |
| 70944 | 0, // zasubs1_then_zasubq0 |
| 70945 | 0, // zasubs1_then_zasubq1 |
| 70946 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 70947 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 70948 | 0, // zasubh1_then_zasubd0 |
| 70949 | 0, // zasubh1_then_zasubd1 |
| 70950 | 0, // zasubh1_then_zasubq0 |
| 70951 | 0, // zasubh1_then_zasubq1 |
| 70952 | 0, // zasubh1_then_zasubs0 |
| 70953 | 0, // zasubh1_then_zasubs1 |
| 70954 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 70955 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 70956 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 70957 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 70958 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 70959 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 70960 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 70961 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 70962 | 272, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70963 | 272, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70964 | 272, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70965 | 272, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70966 | 272, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70967 | 272, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70968 | 0, // dsub3_then_bsub |
| 70969 | 0, // dsub3_then_bsub_hi |
| 70970 | 0, // dsub3_then_hsub |
| 70971 | 0, // dsub3_then_hsub_hi |
| 70972 | 0, // dsub3_then_ssub |
| 70973 | 0, // dsub3_then_ssub_hi |
| 70974 | 272, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70975 | 272, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70976 | 272, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70977 | 272, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70978 | 272, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70979 | 272, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70980 | 0, // psub1_then_psub |
| 70981 | 272, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70982 | 0, // qsub3_then_dsub_hi |
| 70983 | 272, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 70984 | 0, // x8sub_7_then_sub_32 |
| 70985 | 0, // x8sub_7_then_sub_32_hi |
| 70986 | 0, // x8sub_6_then_sub_32 |
| 70987 | 0, // x8sub_6_then_sub_32_hi |
| 70988 | 0, // x8sub_5_then_sub_32 |
| 70989 | 0, // x8sub_5_then_sub_32_hi |
| 70990 | 0, // x8sub_4_then_sub_32 |
| 70991 | 0, // x8sub_4_then_sub_32_hi |
| 70992 | 0, // x8sub_3_then_sub_32 |
| 70993 | 0, // x8sub_3_then_sub_32_hi |
| 70994 | 0, // x8sub_2_then_sub_32 |
| 70995 | 0, // x8sub_2_then_sub_32_hi |
| 70996 | 0, // x8sub_1_then_sub_32 |
| 70997 | 0, // x8sub_1_then_sub_32_hi |
| 70998 | 0, // subo64_then_sub_32 |
| 70999 | 0, // subo64_then_sub_32_hi |
| 71000 | 272, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71001 | 0, // zsub3_then_zsub_hi |
| 71002 | 272, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71003 | 0, // dsub0_dsub1 |
| 71004 | 0, // dsub0_dsub1_dsub2 |
| 71005 | 272, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71006 | 0, // dsub1_dsub2_dsub3 |
| 71007 | 0, // dsub2_dsub3 |
| 71008 | 272, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71009 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71010 | 272, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71011 | 0, // qsub0_qsub1 |
| 71012 | 0, // qsub0_qsub1_qsub2 |
| 71013 | 272, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71014 | 0, // qsub1_qsub2_qsub3 |
| 71015 | 0, // qsub2_qsub3 |
| 71016 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71017 | 0, // x8sub_0_x8sub_1 |
| 71018 | 0, // x8sub_2_x8sub_3 |
| 71019 | 0, // x8sub_4_x8sub_5 |
| 71020 | 0, // x8sub_6_x8sub_7 |
| 71021 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71022 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71023 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71024 | 0, // sub_32_subo64_then_sub_32 |
| 71025 | 272, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71026 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71027 | 272, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71028 | 272, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71029 | 0, // zsub0_zsub1_zsub2 |
| 71030 | 272, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 71031 | 0, // zsub1_zsub2_zsub3 |
| 71032 | 0, // zsub2_zsub3 |
| 71033 | 0, // zsub0_zsub2 |
| 71034 | 0, // zsub1_zsub3 |
| 71035 | }, |
| 71036 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71037 | 273, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71038 | 273, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71039 | 273, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71040 | 0, // dsub0 |
| 71041 | 273, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71042 | 273, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71043 | 0, // dsub3 |
| 71044 | 273, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71045 | 273, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71046 | 273, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71047 | 0, // psub |
| 71048 | 0, // psub0 |
| 71049 | 0, // psub1 |
| 71050 | 0, // qsub0 |
| 71051 | 273, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71052 | 273, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71053 | 0, // qsub3 |
| 71054 | 273, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71055 | 273, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71056 | 0, // sub_32 |
| 71057 | 0, // sub_32_hi |
| 71058 | 0, // sube32 |
| 71059 | 0, // sube64 |
| 71060 | 0, // subo32 |
| 71061 | 0, // subo64 |
| 71062 | 0, // x8sub_0 |
| 71063 | 0, // x8sub_1 |
| 71064 | 0, // x8sub_2 |
| 71065 | 0, // x8sub_3 |
| 71066 | 0, // x8sub_4 |
| 71067 | 0, // x8sub_5 |
| 71068 | 0, // x8sub_6 |
| 71069 | 0, // x8sub_7 |
| 71070 | 0, // zasubb |
| 71071 | 0, // zasubd0 |
| 71072 | 0, // zasubd1 |
| 71073 | 0, // zasubh0 |
| 71074 | 0, // zasubh1 |
| 71075 | 0, // zasubq0 |
| 71076 | 0, // zasubq1 |
| 71077 | 0, // zasubs0 |
| 71078 | 0, // zasubs1 |
| 71079 | 273, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71080 | 273, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71081 | 273, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71082 | 273, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71083 | 0, // zsub3 |
| 71084 | 273, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71085 | 0, // zasubd1_then_zasubq0 |
| 71086 | 0, // zasubd1_then_zasubq1 |
| 71087 | 0, // zasubs1_then_zasubd0 |
| 71088 | 0, // zasubs1_then_zasubd1 |
| 71089 | 0, // zasubs1_then_zasubq0 |
| 71090 | 0, // zasubs1_then_zasubq1 |
| 71091 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71092 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71093 | 0, // zasubh1_then_zasubd0 |
| 71094 | 0, // zasubh1_then_zasubd1 |
| 71095 | 0, // zasubh1_then_zasubq0 |
| 71096 | 0, // zasubh1_then_zasubq1 |
| 71097 | 0, // zasubh1_then_zasubs0 |
| 71098 | 0, // zasubh1_then_zasubs1 |
| 71099 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71100 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71101 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71102 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71103 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71104 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71105 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71106 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71107 | 273, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71108 | 273, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71109 | 273, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71110 | 273, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71111 | 273, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71112 | 273, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71113 | 0, // dsub3_then_bsub |
| 71114 | 0, // dsub3_then_bsub_hi |
| 71115 | 0, // dsub3_then_hsub |
| 71116 | 0, // dsub3_then_hsub_hi |
| 71117 | 0, // dsub3_then_ssub |
| 71118 | 0, // dsub3_then_ssub_hi |
| 71119 | 273, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71120 | 273, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71121 | 273, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71122 | 273, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71123 | 273, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71124 | 273, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71125 | 0, // psub1_then_psub |
| 71126 | 273, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71127 | 0, // qsub3_then_dsub_hi |
| 71128 | 273, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71129 | 0, // x8sub_7_then_sub_32 |
| 71130 | 0, // x8sub_7_then_sub_32_hi |
| 71131 | 0, // x8sub_6_then_sub_32 |
| 71132 | 0, // x8sub_6_then_sub_32_hi |
| 71133 | 0, // x8sub_5_then_sub_32 |
| 71134 | 0, // x8sub_5_then_sub_32_hi |
| 71135 | 0, // x8sub_4_then_sub_32 |
| 71136 | 0, // x8sub_4_then_sub_32_hi |
| 71137 | 0, // x8sub_3_then_sub_32 |
| 71138 | 0, // x8sub_3_then_sub_32_hi |
| 71139 | 0, // x8sub_2_then_sub_32 |
| 71140 | 0, // x8sub_2_then_sub_32_hi |
| 71141 | 0, // x8sub_1_then_sub_32 |
| 71142 | 0, // x8sub_1_then_sub_32_hi |
| 71143 | 0, // subo64_then_sub_32 |
| 71144 | 0, // subo64_then_sub_32_hi |
| 71145 | 273, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71146 | 0, // zsub3_then_zsub_hi |
| 71147 | 273, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71148 | 0, // dsub0_dsub1 |
| 71149 | 0, // dsub0_dsub1_dsub2 |
| 71150 | 273, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71151 | 0, // dsub1_dsub2_dsub3 |
| 71152 | 0, // dsub2_dsub3 |
| 71153 | 273, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71154 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71155 | 273, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71156 | 0, // qsub0_qsub1 |
| 71157 | 0, // qsub0_qsub1_qsub2 |
| 71158 | 273, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71159 | 0, // qsub1_qsub2_qsub3 |
| 71160 | 0, // qsub2_qsub3 |
| 71161 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71162 | 0, // x8sub_0_x8sub_1 |
| 71163 | 0, // x8sub_2_x8sub_3 |
| 71164 | 0, // x8sub_4_x8sub_5 |
| 71165 | 0, // x8sub_6_x8sub_7 |
| 71166 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71167 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71168 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71169 | 0, // sub_32_subo64_then_sub_32 |
| 71170 | 273, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71171 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71172 | 273, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71173 | 273, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71174 | 0, // zsub0_zsub1_zsub2 |
| 71175 | 273, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 71176 | 0, // zsub1_zsub2_zsub3 |
| 71177 | 0, // zsub2_zsub3 |
| 71178 | 0, // zsub0_zsub2 |
| 71179 | 0, // zsub1_zsub3 |
| 71180 | }, |
| 71181 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71182 | 274, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71183 | 274, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71184 | 274, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71185 | 0, // dsub0 |
| 71186 | 274, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71187 | 274, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71188 | 0, // dsub3 |
| 71189 | 274, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71190 | 274, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71191 | 274, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71192 | 0, // psub |
| 71193 | 0, // psub0 |
| 71194 | 0, // psub1 |
| 71195 | 0, // qsub0 |
| 71196 | 274, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71197 | 274, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71198 | 0, // qsub3 |
| 71199 | 274, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71200 | 274, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71201 | 0, // sub_32 |
| 71202 | 0, // sub_32_hi |
| 71203 | 0, // sube32 |
| 71204 | 0, // sube64 |
| 71205 | 0, // subo32 |
| 71206 | 0, // subo64 |
| 71207 | 0, // x8sub_0 |
| 71208 | 0, // x8sub_1 |
| 71209 | 0, // x8sub_2 |
| 71210 | 0, // x8sub_3 |
| 71211 | 0, // x8sub_4 |
| 71212 | 0, // x8sub_5 |
| 71213 | 0, // x8sub_6 |
| 71214 | 0, // x8sub_7 |
| 71215 | 0, // zasubb |
| 71216 | 0, // zasubd0 |
| 71217 | 0, // zasubd1 |
| 71218 | 0, // zasubh0 |
| 71219 | 0, // zasubh1 |
| 71220 | 0, // zasubq0 |
| 71221 | 0, // zasubq1 |
| 71222 | 0, // zasubs0 |
| 71223 | 0, // zasubs1 |
| 71224 | 274, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71225 | 274, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71226 | 274, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71227 | 274, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71228 | 0, // zsub3 |
| 71229 | 274, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71230 | 0, // zasubd1_then_zasubq0 |
| 71231 | 0, // zasubd1_then_zasubq1 |
| 71232 | 0, // zasubs1_then_zasubd0 |
| 71233 | 0, // zasubs1_then_zasubd1 |
| 71234 | 0, // zasubs1_then_zasubq0 |
| 71235 | 0, // zasubs1_then_zasubq1 |
| 71236 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71237 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71238 | 0, // zasubh1_then_zasubd0 |
| 71239 | 0, // zasubh1_then_zasubd1 |
| 71240 | 0, // zasubh1_then_zasubq0 |
| 71241 | 0, // zasubh1_then_zasubq1 |
| 71242 | 0, // zasubh1_then_zasubs0 |
| 71243 | 0, // zasubh1_then_zasubs1 |
| 71244 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71245 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71246 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71247 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71248 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71249 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71250 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71251 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71252 | 274, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71253 | 274, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71254 | 274, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71255 | 274, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71256 | 274, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71257 | 274, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71258 | 0, // dsub3_then_bsub |
| 71259 | 0, // dsub3_then_bsub_hi |
| 71260 | 0, // dsub3_then_hsub |
| 71261 | 0, // dsub3_then_hsub_hi |
| 71262 | 0, // dsub3_then_ssub |
| 71263 | 0, // dsub3_then_ssub_hi |
| 71264 | 274, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71265 | 274, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71266 | 274, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71267 | 274, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71268 | 274, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71269 | 274, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71270 | 0, // psub1_then_psub |
| 71271 | 274, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71272 | 0, // qsub3_then_dsub_hi |
| 71273 | 274, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71274 | 0, // x8sub_7_then_sub_32 |
| 71275 | 0, // x8sub_7_then_sub_32_hi |
| 71276 | 0, // x8sub_6_then_sub_32 |
| 71277 | 0, // x8sub_6_then_sub_32_hi |
| 71278 | 0, // x8sub_5_then_sub_32 |
| 71279 | 0, // x8sub_5_then_sub_32_hi |
| 71280 | 0, // x8sub_4_then_sub_32 |
| 71281 | 0, // x8sub_4_then_sub_32_hi |
| 71282 | 0, // x8sub_3_then_sub_32 |
| 71283 | 0, // x8sub_3_then_sub_32_hi |
| 71284 | 0, // x8sub_2_then_sub_32 |
| 71285 | 0, // x8sub_2_then_sub_32_hi |
| 71286 | 0, // x8sub_1_then_sub_32 |
| 71287 | 0, // x8sub_1_then_sub_32_hi |
| 71288 | 0, // subo64_then_sub_32 |
| 71289 | 0, // subo64_then_sub_32_hi |
| 71290 | 274, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71291 | 0, // zsub3_then_zsub_hi |
| 71292 | 274, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71293 | 0, // dsub0_dsub1 |
| 71294 | 0, // dsub0_dsub1_dsub2 |
| 71295 | 274, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71296 | 0, // dsub1_dsub2_dsub3 |
| 71297 | 0, // dsub2_dsub3 |
| 71298 | 274, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71299 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71300 | 274, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71301 | 0, // qsub0_qsub1 |
| 71302 | 0, // qsub0_qsub1_qsub2 |
| 71303 | 274, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71304 | 0, // qsub1_qsub2_qsub3 |
| 71305 | 0, // qsub2_qsub3 |
| 71306 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71307 | 0, // x8sub_0_x8sub_1 |
| 71308 | 0, // x8sub_2_x8sub_3 |
| 71309 | 0, // x8sub_4_x8sub_5 |
| 71310 | 0, // x8sub_6_x8sub_7 |
| 71311 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71312 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71313 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71314 | 0, // sub_32_subo64_then_sub_32 |
| 71315 | 274, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71316 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71317 | 274, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71318 | 274, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71319 | 0, // zsub0_zsub1_zsub2 |
| 71320 | 274, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 71321 | 0, // zsub1_zsub2_zsub3 |
| 71322 | 0, // zsub2_zsub3 |
| 71323 | 0, // zsub0_zsub2 |
| 71324 | 0, // zsub1_zsub3 |
| 71325 | }, |
| 71326 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71327 | 275, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71328 | 275, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71329 | 275, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71330 | 0, // dsub0 |
| 71331 | 275, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71332 | 275, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71333 | 0, // dsub3 |
| 71334 | 275, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71335 | 275, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71336 | 275, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71337 | 0, // psub |
| 71338 | 0, // psub0 |
| 71339 | 0, // psub1 |
| 71340 | 0, // qsub0 |
| 71341 | 275, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71342 | 275, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71343 | 0, // qsub3 |
| 71344 | 275, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71345 | 275, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71346 | 0, // sub_32 |
| 71347 | 0, // sub_32_hi |
| 71348 | 0, // sube32 |
| 71349 | 0, // sube64 |
| 71350 | 0, // subo32 |
| 71351 | 0, // subo64 |
| 71352 | 0, // x8sub_0 |
| 71353 | 0, // x8sub_1 |
| 71354 | 0, // x8sub_2 |
| 71355 | 0, // x8sub_3 |
| 71356 | 0, // x8sub_4 |
| 71357 | 0, // x8sub_5 |
| 71358 | 0, // x8sub_6 |
| 71359 | 0, // x8sub_7 |
| 71360 | 0, // zasubb |
| 71361 | 0, // zasubd0 |
| 71362 | 0, // zasubd1 |
| 71363 | 0, // zasubh0 |
| 71364 | 0, // zasubh1 |
| 71365 | 0, // zasubq0 |
| 71366 | 0, // zasubq1 |
| 71367 | 0, // zasubs0 |
| 71368 | 0, // zasubs1 |
| 71369 | 275, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71370 | 275, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71371 | 275, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71372 | 275, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71373 | 0, // zsub3 |
| 71374 | 275, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71375 | 0, // zasubd1_then_zasubq0 |
| 71376 | 0, // zasubd1_then_zasubq1 |
| 71377 | 0, // zasubs1_then_zasubd0 |
| 71378 | 0, // zasubs1_then_zasubd1 |
| 71379 | 0, // zasubs1_then_zasubq0 |
| 71380 | 0, // zasubs1_then_zasubq1 |
| 71381 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71382 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71383 | 0, // zasubh1_then_zasubd0 |
| 71384 | 0, // zasubh1_then_zasubd1 |
| 71385 | 0, // zasubh1_then_zasubq0 |
| 71386 | 0, // zasubh1_then_zasubq1 |
| 71387 | 0, // zasubh1_then_zasubs0 |
| 71388 | 0, // zasubh1_then_zasubs1 |
| 71389 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71390 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71391 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71392 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71393 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71394 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71395 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71396 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71397 | 275, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71398 | 275, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71399 | 275, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71400 | 275, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71401 | 275, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71402 | 275, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71403 | 0, // dsub3_then_bsub |
| 71404 | 0, // dsub3_then_bsub_hi |
| 71405 | 0, // dsub3_then_hsub |
| 71406 | 0, // dsub3_then_hsub_hi |
| 71407 | 0, // dsub3_then_ssub |
| 71408 | 0, // dsub3_then_ssub_hi |
| 71409 | 275, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71410 | 275, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71411 | 275, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71412 | 275, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71413 | 275, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71414 | 275, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71415 | 0, // psub1_then_psub |
| 71416 | 275, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71417 | 0, // qsub3_then_dsub_hi |
| 71418 | 275, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71419 | 0, // x8sub_7_then_sub_32 |
| 71420 | 0, // x8sub_7_then_sub_32_hi |
| 71421 | 0, // x8sub_6_then_sub_32 |
| 71422 | 0, // x8sub_6_then_sub_32_hi |
| 71423 | 0, // x8sub_5_then_sub_32 |
| 71424 | 0, // x8sub_5_then_sub_32_hi |
| 71425 | 0, // x8sub_4_then_sub_32 |
| 71426 | 0, // x8sub_4_then_sub_32_hi |
| 71427 | 0, // x8sub_3_then_sub_32 |
| 71428 | 0, // x8sub_3_then_sub_32_hi |
| 71429 | 0, // x8sub_2_then_sub_32 |
| 71430 | 0, // x8sub_2_then_sub_32_hi |
| 71431 | 0, // x8sub_1_then_sub_32 |
| 71432 | 0, // x8sub_1_then_sub_32_hi |
| 71433 | 0, // subo64_then_sub_32 |
| 71434 | 0, // subo64_then_sub_32_hi |
| 71435 | 275, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71436 | 0, // zsub3_then_zsub_hi |
| 71437 | 275, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71438 | 0, // dsub0_dsub1 |
| 71439 | 0, // dsub0_dsub1_dsub2 |
| 71440 | 275, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71441 | 0, // dsub1_dsub2_dsub3 |
| 71442 | 0, // dsub2_dsub3 |
| 71443 | 275, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71444 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71445 | 275, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71446 | 0, // qsub0_qsub1 |
| 71447 | 0, // qsub0_qsub1_qsub2 |
| 71448 | 275, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71449 | 0, // qsub1_qsub2_qsub3 |
| 71450 | 0, // qsub2_qsub3 |
| 71451 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71452 | 0, // x8sub_0_x8sub_1 |
| 71453 | 0, // x8sub_2_x8sub_3 |
| 71454 | 0, // x8sub_4_x8sub_5 |
| 71455 | 0, // x8sub_6_x8sub_7 |
| 71456 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71457 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71458 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71459 | 0, // sub_32_subo64_then_sub_32 |
| 71460 | 275, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71461 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71462 | 275, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71463 | 275, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71464 | 0, // zsub0_zsub1_zsub2 |
| 71465 | 275, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 71466 | 0, // zsub1_zsub2_zsub3 |
| 71467 | 0, // zsub2_zsub3 |
| 71468 | 0, // zsub0_zsub2 |
| 71469 | 0, // zsub1_zsub3 |
| 71470 | }, |
| 71471 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71472 | 276, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71473 | 276, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71474 | 276, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71475 | 0, // dsub0 |
| 71476 | 276, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71477 | 276, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71478 | 0, // dsub3 |
| 71479 | 276, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71480 | 276, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71481 | 276, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71482 | 0, // psub |
| 71483 | 0, // psub0 |
| 71484 | 0, // psub1 |
| 71485 | 0, // qsub0 |
| 71486 | 276, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71487 | 276, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71488 | 0, // qsub3 |
| 71489 | 276, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71490 | 276, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71491 | 0, // sub_32 |
| 71492 | 0, // sub_32_hi |
| 71493 | 0, // sube32 |
| 71494 | 0, // sube64 |
| 71495 | 0, // subo32 |
| 71496 | 0, // subo64 |
| 71497 | 0, // x8sub_0 |
| 71498 | 0, // x8sub_1 |
| 71499 | 0, // x8sub_2 |
| 71500 | 0, // x8sub_3 |
| 71501 | 0, // x8sub_4 |
| 71502 | 0, // x8sub_5 |
| 71503 | 0, // x8sub_6 |
| 71504 | 0, // x8sub_7 |
| 71505 | 0, // zasubb |
| 71506 | 0, // zasubd0 |
| 71507 | 0, // zasubd1 |
| 71508 | 0, // zasubh0 |
| 71509 | 0, // zasubh1 |
| 71510 | 0, // zasubq0 |
| 71511 | 0, // zasubq1 |
| 71512 | 0, // zasubs0 |
| 71513 | 0, // zasubs1 |
| 71514 | 276, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71515 | 276, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71516 | 276, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71517 | 276, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71518 | 0, // zsub3 |
| 71519 | 276, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71520 | 0, // zasubd1_then_zasubq0 |
| 71521 | 0, // zasubd1_then_zasubq1 |
| 71522 | 0, // zasubs1_then_zasubd0 |
| 71523 | 0, // zasubs1_then_zasubd1 |
| 71524 | 0, // zasubs1_then_zasubq0 |
| 71525 | 0, // zasubs1_then_zasubq1 |
| 71526 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71527 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71528 | 0, // zasubh1_then_zasubd0 |
| 71529 | 0, // zasubh1_then_zasubd1 |
| 71530 | 0, // zasubh1_then_zasubq0 |
| 71531 | 0, // zasubh1_then_zasubq1 |
| 71532 | 0, // zasubh1_then_zasubs0 |
| 71533 | 0, // zasubh1_then_zasubs1 |
| 71534 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71535 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71536 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71537 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71538 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71539 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71540 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71541 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71542 | 276, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71543 | 276, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71544 | 276, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71545 | 276, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71546 | 276, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71547 | 276, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71548 | 0, // dsub3_then_bsub |
| 71549 | 0, // dsub3_then_bsub_hi |
| 71550 | 0, // dsub3_then_hsub |
| 71551 | 0, // dsub3_then_hsub_hi |
| 71552 | 0, // dsub3_then_ssub |
| 71553 | 0, // dsub3_then_ssub_hi |
| 71554 | 276, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71555 | 276, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71556 | 276, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71557 | 276, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71558 | 276, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71559 | 276, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71560 | 0, // psub1_then_psub |
| 71561 | 276, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71562 | 0, // qsub3_then_dsub_hi |
| 71563 | 276, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71564 | 0, // x8sub_7_then_sub_32 |
| 71565 | 0, // x8sub_7_then_sub_32_hi |
| 71566 | 0, // x8sub_6_then_sub_32 |
| 71567 | 0, // x8sub_6_then_sub_32_hi |
| 71568 | 0, // x8sub_5_then_sub_32 |
| 71569 | 0, // x8sub_5_then_sub_32_hi |
| 71570 | 0, // x8sub_4_then_sub_32 |
| 71571 | 0, // x8sub_4_then_sub_32_hi |
| 71572 | 0, // x8sub_3_then_sub_32 |
| 71573 | 0, // x8sub_3_then_sub_32_hi |
| 71574 | 0, // x8sub_2_then_sub_32 |
| 71575 | 0, // x8sub_2_then_sub_32_hi |
| 71576 | 0, // x8sub_1_then_sub_32 |
| 71577 | 0, // x8sub_1_then_sub_32_hi |
| 71578 | 0, // subo64_then_sub_32 |
| 71579 | 0, // subo64_then_sub_32_hi |
| 71580 | 276, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71581 | 0, // zsub3_then_zsub_hi |
| 71582 | 276, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71583 | 0, // dsub0_dsub1 |
| 71584 | 0, // dsub0_dsub1_dsub2 |
| 71585 | 276, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71586 | 0, // dsub1_dsub2_dsub3 |
| 71587 | 0, // dsub2_dsub3 |
| 71588 | 276, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71589 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71590 | 276, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71591 | 0, // qsub0_qsub1 |
| 71592 | 0, // qsub0_qsub1_qsub2 |
| 71593 | 276, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71594 | 0, // qsub1_qsub2_qsub3 |
| 71595 | 0, // qsub2_qsub3 |
| 71596 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71597 | 0, // x8sub_0_x8sub_1 |
| 71598 | 0, // x8sub_2_x8sub_3 |
| 71599 | 0, // x8sub_4_x8sub_5 |
| 71600 | 0, // x8sub_6_x8sub_7 |
| 71601 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71602 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71603 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71604 | 0, // sub_32_subo64_then_sub_32 |
| 71605 | 276, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71606 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71607 | 276, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71608 | 276, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71609 | 0, // zsub0_zsub1_zsub2 |
| 71610 | 276, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 71611 | 0, // zsub1_zsub2_zsub3 |
| 71612 | 0, // zsub2_zsub3 |
| 71613 | 0, // zsub0_zsub2 |
| 71614 | 0, // zsub1_zsub3 |
| 71615 | }, |
| 71616 | { // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71617 | 277, // bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71618 | 277, // bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71619 | 277, // dsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71620 | 0, // dsub0 |
| 71621 | 277, // dsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71622 | 277, // dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71623 | 0, // dsub3 |
| 71624 | 277, // dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71625 | 277, // hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71626 | 277, // hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71627 | 0, // psub |
| 71628 | 0, // psub0 |
| 71629 | 0, // psub1 |
| 71630 | 0, // qsub0 |
| 71631 | 277, // qsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71632 | 277, // qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71633 | 0, // qsub3 |
| 71634 | 277, // ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71635 | 277, // ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71636 | 0, // sub_32 |
| 71637 | 0, // sub_32_hi |
| 71638 | 0, // sube32 |
| 71639 | 0, // sube64 |
| 71640 | 0, // subo32 |
| 71641 | 0, // subo64 |
| 71642 | 0, // x8sub_0 |
| 71643 | 0, // x8sub_1 |
| 71644 | 0, // x8sub_2 |
| 71645 | 0, // x8sub_3 |
| 71646 | 0, // x8sub_4 |
| 71647 | 0, // x8sub_5 |
| 71648 | 0, // x8sub_6 |
| 71649 | 0, // x8sub_7 |
| 71650 | 0, // zasubb |
| 71651 | 0, // zasubd0 |
| 71652 | 0, // zasubd1 |
| 71653 | 0, // zasubh0 |
| 71654 | 0, // zasubh1 |
| 71655 | 0, // zasubq0 |
| 71656 | 0, // zasubq1 |
| 71657 | 0, // zasubs0 |
| 71658 | 0, // zasubs1 |
| 71659 | 277, // zsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71660 | 277, // zsub0 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71661 | 277, // zsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71662 | 277, // zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71663 | 0, // zsub3 |
| 71664 | 277, // zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71665 | 0, // zasubd1_then_zasubq0 |
| 71666 | 0, // zasubd1_then_zasubq1 |
| 71667 | 0, // zasubs1_then_zasubd0 |
| 71668 | 0, // zasubs1_then_zasubd1 |
| 71669 | 0, // zasubs1_then_zasubq0 |
| 71670 | 0, // zasubs1_then_zasubq1 |
| 71671 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71672 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71673 | 0, // zasubh1_then_zasubd0 |
| 71674 | 0, // zasubh1_then_zasubd1 |
| 71675 | 0, // zasubh1_then_zasubq0 |
| 71676 | 0, // zasubh1_then_zasubq1 |
| 71677 | 0, // zasubh1_then_zasubs0 |
| 71678 | 0, // zasubh1_then_zasubs1 |
| 71679 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71680 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71681 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71682 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71683 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71684 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71685 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71686 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71687 | 277, // dsub1_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71688 | 277, // dsub1_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71689 | 277, // dsub1_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71690 | 277, // dsub1_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71691 | 277, // dsub1_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71692 | 277, // dsub1_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71693 | 0, // dsub3_then_bsub |
| 71694 | 0, // dsub3_then_bsub_hi |
| 71695 | 0, // dsub3_then_hsub |
| 71696 | 0, // dsub3_then_hsub_hi |
| 71697 | 0, // dsub3_then_ssub |
| 71698 | 0, // dsub3_then_ssub_hi |
| 71699 | 277, // dsub2_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71700 | 277, // dsub2_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71701 | 277, // dsub2_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71702 | 277, // dsub2_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71703 | 277, // dsub2_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71704 | 277, // dsub2_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71705 | 0, // psub1_then_psub |
| 71706 | 277, // qsub1_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71707 | 0, // qsub3_then_dsub_hi |
| 71708 | 277, // qsub2_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71709 | 0, // x8sub_7_then_sub_32 |
| 71710 | 0, // x8sub_7_then_sub_32_hi |
| 71711 | 0, // x8sub_6_then_sub_32 |
| 71712 | 0, // x8sub_6_then_sub_32_hi |
| 71713 | 0, // x8sub_5_then_sub_32 |
| 71714 | 0, // x8sub_5_then_sub_32_hi |
| 71715 | 0, // x8sub_4_then_sub_32 |
| 71716 | 0, // x8sub_4_then_sub_32_hi |
| 71717 | 0, // x8sub_3_then_sub_32 |
| 71718 | 0, // x8sub_3_then_sub_32_hi |
| 71719 | 0, // x8sub_2_then_sub_32 |
| 71720 | 0, // x8sub_2_then_sub_32_hi |
| 71721 | 0, // x8sub_1_then_sub_32 |
| 71722 | 0, // x8sub_1_then_sub_32_hi |
| 71723 | 0, // subo64_then_sub_32 |
| 71724 | 0, // subo64_then_sub_32_hi |
| 71725 | 277, // zsub1_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71726 | 0, // zsub3_then_zsub_hi |
| 71727 | 277, // zsub2_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71728 | 0, // dsub0_dsub1 |
| 71729 | 0, // dsub0_dsub1_dsub2 |
| 71730 | 277, // dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71731 | 0, // dsub1_dsub2_dsub3 |
| 71732 | 0, // dsub2_dsub3 |
| 71733 | 277, // dsub_dsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71734 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71735 | 277, // dsub_dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71736 | 0, // qsub0_qsub1 |
| 71737 | 0, // qsub0_qsub1_qsub2 |
| 71738 | 277, // qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71739 | 0, // qsub1_qsub2_qsub3 |
| 71740 | 0, // qsub2_qsub3 |
| 71741 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71742 | 0, // x8sub_0_x8sub_1 |
| 71743 | 0, // x8sub_2_x8sub_3 |
| 71744 | 0, // x8sub_4_x8sub_5 |
| 71745 | 0, // x8sub_6_x8sub_7 |
| 71746 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71747 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71748 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71749 | 0, // sub_32_subo64_then_sub_32 |
| 71750 | 277, // zsub_qsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71751 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71752 | 277, // zsub_qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71753 | 277, // zsub0_zsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71754 | 0, // zsub0_zsub1_zsub2 |
| 71755 | 277, // zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 71756 | 0, // zsub1_zsub2_zsub3 |
| 71757 | 0, // zsub2_zsub3 |
| 71758 | 0, // zsub0_zsub2 |
| 71759 | 0, // zsub1_zsub3 |
| 71760 | }, |
| 71761 | { // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71762 | 278, // bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71763 | 278, // bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71764 | 278, // dsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71765 | 0, // dsub0 |
| 71766 | 278, // dsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71767 | 278, // dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71768 | 0, // dsub3 |
| 71769 | 278, // dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71770 | 278, // hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71771 | 278, // hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71772 | 0, // psub |
| 71773 | 0, // psub0 |
| 71774 | 0, // psub1 |
| 71775 | 0, // qsub0 |
| 71776 | 278, // qsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71777 | 278, // qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71778 | 0, // qsub3 |
| 71779 | 278, // ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71780 | 278, // ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71781 | 0, // sub_32 |
| 71782 | 0, // sub_32_hi |
| 71783 | 0, // sube32 |
| 71784 | 0, // sube64 |
| 71785 | 0, // subo32 |
| 71786 | 0, // subo64 |
| 71787 | 0, // x8sub_0 |
| 71788 | 0, // x8sub_1 |
| 71789 | 0, // x8sub_2 |
| 71790 | 0, // x8sub_3 |
| 71791 | 0, // x8sub_4 |
| 71792 | 0, // x8sub_5 |
| 71793 | 0, // x8sub_6 |
| 71794 | 0, // x8sub_7 |
| 71795 | 0, // zasubb |
| 71796 | 0, // zasubd0 |
| 71797 | 0, // zasubd1 |
| 71798 | 0, // zasubh0 |
| 71799 | 0, // zasubh1 |
| 71800 | 0, // zasubq0 |
| 71801 | 0, // zasubq1 |
| 71802 | 0, // zasubs0 |
| 71803 | 0, // zasubs1 |
| 71804 | 278, // zsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71805 | 278, // zsub0 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71806 | 278, // zsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71807 | 278, // zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71808 | 0, // zsub3 |
| 71809 | 278, // zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71810 | 0, // zasubd1_then_zasubq0 |
| 71811 | 0, // zasubd1_then_zasubq1 |
| 71812 | 0, // zasubs1_then_zasubd0 |
| 71813 | 0, // zasubs1_then_zasubd1 |
| 71814 | 0, // zasubs1_then_zasubq0 |
| 71815 | 0, // zasubs1_then_zasubq1 |
| 71816 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71817 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71818 | 0, // zasubh1_then_zasubd0 |
| 71819 | 0, // zasubh1_then_zasubd1 |
| 71820 | 0, // zasubh1_then_zasubq0 |
| 71821 | 0, // zasubh1_then_zasubq1 |
| 71822 | 0, // zasubh1_then_zasubs0 |
| 71823 | 0, // zasubh1_then_zasubs1 |
| 71824 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71825 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71826 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71827 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71828 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71829 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71830 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71831 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71832 | 278, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71833 | 278, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71834 | 278, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71835 | 278, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71836 | 278, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71837 | 278, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71838 | 0, // dsub3_then_bsub |
| 71839 | 0, // dsub3_then_bsub_hi |
| 71840 | 0, // dsub3_then_hsub |
| 71841 | 0, // dsub3_then_hsub_hi |
| 71842 | 0, // dsub3_then_ssub |
| 71843 | 0, // dsub3_then_ssub_hi |
| 71844 | 278, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71845 | 278, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71846 | 278, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71847 | 278, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71848 | 278, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71849 | 278, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71850 | 0, // psub1_then_psub |
| 71851 | 278, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71852 | 0, // qsub3_then_dsub_hi |
| 71853 | 278, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71854 | 0, // x8sub_7_then_sub_32 |
| 71855 | 0, // x8sub_7_then_sub_32_hi |
| 71856 | 0, // x8sub_6_then_sub_32 |
| 71857 | 0, // x8sub_6_then_sub_32_hi |
| 71858 | 0, // x8sub_5_then_sub_32 |
| 71859 | 0, // x8sub_5_then_sub_32_hi |
| 71860 | 0, // x8sub_4_then_sub_32 |
| 71861 | 0, // x8sub_4_then_sub_32_hi |
| 71862 | 0, // x8sub_3_then_sub_32 |
| 71863 | 0, // x8sub_3_then_sub_32_hi |
| 71864 | 0, // x8sub_2_then_sub_32 |
| 71865 | 0, // x8sub_2_then_sub_32_hi |
| 71866 | 0, // x8sub_1_then_sub_32 |
| 71867 | 0, // x8sub_1_then_sub_32_hi |
| 71868 | 0, // subo64_then_sub_32 |
| 71869 | 0, // subo64_then_sub_32_hi |
| 71870 | 278, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71871 | 0, // zsub3_then_zsub_hi |
| 71872 | 278, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71873 | 0, // dsub0_dsub1 |
| 71874 | 0, // dsub0_dsub1_dsub2 |
| 71875 | 278, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71876 | 0, // dsub1_dsub2_dsub3 |
| 71877 | 0, // dsub2_dsub3 |
| 71878 | 278, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71879 | 0, // dsub_dsub1_dsub2_dsub3 |
| 71880 | 278, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71881 | 0, // qsub0_qsub1 |
| 71882 | 0, // qsub0_qsub1_qsub2 |
| 71883 | 278, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71884 | 0, // qsub1_qsub2_qsub3 |
| 71885 | 0, // qsub2_qsub3 |
| 71886 | 0, // sub_32_x8sub_1_then_sub_32 |
| 71887 | 0, // x8sub_0_x8sub_1 |
| 71888 | 0, // x8sub_2_x8sub_3 |
| 71889 | 0, // x8sub_4_x8sub_5 |
| 71890 | 0, // x8sub_6_x8sub_7 |
| 71891 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 71892 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 71893 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 71894 | 0, // sub_32_subo64_then_sub_32 |
| 71895 | 278, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71896 | 0, // zsub_qsub1_qsub2_qsub3 |
| 71897 | 278, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71898 | 278, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71899 | 0, // zsub0_zsub1_zsub2 |
| 71900 | 278, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 71901 | 0, // zsub1_zsub2_zsub3 |
| 71902 | 0, // zsub2_zsub3 |
| 71903 | 0, // zsub0_zsub2 |
| 71904 | 0, // zsub1_zsub3 |
| 71905 | }, |
| 71906 | { // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71907 | 279, // bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71908 | 279, // bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71909 | 279, // dsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71910 | 0, // dsub0 |
| 71911 | 279, // dsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71912 | 279, // dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71913 | 0, // dsub3 |
| 71914 | 279, // dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71915 | 279, // hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71916 | 279, // hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71917 | 0, // psub |
| 71918 | 0, // psub0 |
| 71919 | 0, // psub1 |
| 71920 | 0, // qsub0 |
| 71921 | 279, // qsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71922 | 279, // qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71923 | 0, // qsub3 |
| 71924 | 279, // ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71925 | 279, // ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71926 | 0, // sub_32 |
| 71927 | 0, // sub_32_hi |
| 71928 | 0, // sube32 |
| 71929 | 0, // sube64 |
| 71930 | 0, // subo32 |
| 71931 | 0, // subo64 |
| 71932 | 0, // x8sub_0 |
| 71933 | 0, // x8sub_1 |
| 71934 | 0, // x8sub_2 |
| 71935 | 0, // x8sub_3 |
| 71936 | 0, // x8sub_4 |
| 71937 | 0, // x8sub_5 |
| 71938 | 0, // x8sub_6 |
| 71939 | 0, // x8sub_7 |
| 71940 | 0, // zasubb |
| 71941 | 0, // zasubd0 |
| 71942 | 0, // zasubd1 |
| 71943 | 0, // zasubh0 |
| 71944 | 0, // zasubh1 |
| 71945 | 0, // zasubq0 |
| 71946 | 0, // zasubq1 |
| 71947 | 0, // zasubs0 |
| 71948 | 0, // zasubs1 |
| 71949 | 279, // zsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71950 | 279, // zsub0 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71951 | 279, // zsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71952 | 279, // zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71953 | 0, // zsub3 |
| 71954 | 279, // zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71955 | 0, // zasubd1_then_zasubq0 |
| 71956 | 0, // zasubd1_then_zasubq1 |
| 71957 | 0, // zasubs1_then_zasubd0 |
| 71958 | 0, // zasubs1_then_zasubd1 |
| 71959 | 0, // zasubs1_then_zasubq0 |
| 71960 | 0, // zasubs1_then_zasubq1 |
| 71961 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 71962 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 71963 | 0, // zasubh1_then_zasubd0 |
| 71964 | 0, // zasubh1_then_zasubd1 |
| 71965 | 0, // zasubh1_then_zasubq0 |
| 71966 | 0, // zasubh1_then_zasubq1 |
| 71967 | 0, // zasubh1_then_zasubs0 |
| 71968 | 0, // zasubh1_then_zasubs1 |
| 71969 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 71970 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 71971 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 71972 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 71973 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 71974 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 71975 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 71976 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 71977 | 279, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71978 | 279, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71979 | 279, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71980 | 279, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71981 | 279, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71982 | 279, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71983 | 0, // dsub3_then_bsub |
| 71984 | 0, // dsub3_then_bsub_hi |
| 71985 | 0, // dsub3_then_hsub |
| 71986 | 0, // dsub3_then_hsub_hi |
| 71987 | 0, // dsub3_then_ssub |
| 71988 | 0, // dsub3_then_ssub_hi |
| 71989 | 279, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71990 | 279, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71991 | 279, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71992 | 279, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71993 | 279, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71994 | 279, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71995 | 0, // psub1_then_psub |
| 71996 | 279, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71997 | 0, // qsub3_then_dsub_hi |
| 71998 | 279, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 71999 | 0, // x8sub_7_then_sub_32 |
| 72000 | 0, // x8sub_7_then_sub_32_hi |
| 72001 | 0, // x8sub_6_then_sub_32 |
| 72002 | 0, // x8sub_6_then_sub_32_hi |
| 72003 | 0, // x8sub_5_then_sub_32 |
| 72004 | 0, // x8sub_5_then_sub_32_hi |
| 72005 | 0, // x8sub_4_then_sub_32 |
| 72006 | 0, // x8sub_4_then_sub_32_hi |
| 72007 | 0, // x8sub_3_then_sub_32 |
| 72008 | 0, // x8sub_3_then_sub_32_hi |
| 72009 | 0, // x8sub_2_then_sub_32 |
| 72010 | 0, // x8sub_2_then_sub_32_hi |
| 72011 | 0, // x8sub_1_then_sub_32 |
| 72012 | 0, // x8sub_1_then_sub_32_hi |
| 72013 | 0, // subo64_then_sub_32 |
| 72014 | 0, // subo64_then_sub_32_hi |
| 72015 | 279, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72016 | 0, // zsub3_then_zsub_hi |
| 72017 | 279, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72018 | 0, // dsub0_dsub1 |
| 72019 | 0, // dsub0_dsub1_dsub2 |
| 72020 | 279, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72021 | 0, // dsub1_dsub2_dsub3 |
| 72022 | 0, // dsub2_dsub3 |
| 72023 | 279, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72024 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72025 | 279, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72026 | 0, // qsub0_qsub1 |
| 72027 | 0, // qsub0_qsub1_qsub2 |
| 72028 | 279, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72029 | 0, // qsub1_qsub2_qsub3 |
| 72030 | 0, // qsub2_qsub3 |
| 72031 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72032 | 0, // x8sub_0_x8sub_1 |
| 72033 | 0, // x8sub_2_x8sub_3 |
| 72034 | 0, // x8sub_4_x8sub_5 |
| 72035 | 0, // x8sub_6_x8sub_7 |
| 72036 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72037 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72038 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72039 | 0, // sub_32_subo64_then_sub_32 |
| 72040 | 279, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72041 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72042 | 279, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72043 | 279, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72044 | 0, // zsub0_zsub1_zsub2 |
| 72045 | 279, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 72046 | 0, // zsub1_zsub2_zsub3 |
| 72047 | 0, // zsub2_zsub3 |
| 72048 | 0, // zsub0_zsub2 |
| 72049 | 0, // zsub1_zsub3 |
| 72050 | }, |
| 72051 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72052 | 280, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72053 | 280, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72054 | 280, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72055 | 0, // dsub0 |
| 72056 | 280, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72057 | 280, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72058 | 0, // dsub3 |
| 72059 | 280, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72060 | 280, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72061 | 280, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72062 | 0, // psub |
| 72063 | 0, // psub0 |
| 72064 | 0, // psub1 |
| 72065 | 0, // qsub0 |
| 72066 | 280, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72067 | 280, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72068 | 0, // qsub3 |
| 72069 | 280, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72070 | 280, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72071 | 0, // sub_32 |
| 72072 | 0, // sub_32_hi |
| 72073 | 0, // sube32 |
| 72074 | 0, // sube64 |
| 72075 | 0, // subo32 |
| 72076 | 0, // subo64 |
| 72077 | 0, // x8sub_0 |
| 72078 | 0, // x8sub_1 |
| 72079 | 0, // x8sub_2 |
| 72080 | 0, // x8sub_3 |
| 72081 | 0, // x8sub_4 |
| 72082 | 0, // x8sub_5 |
| 72083 | 0, // x8sub_6 |
| 72084 | 0, // x8sub_7 |
| 72085 | 0, // zasubb |
| 72086 | 0, // zasubd0 |
| 72087 | 0, // zasubd1 |
| 72088 | 0, // zasubh0 |
| 72089 | 0, // zasubh1 |
| 72090 | 0, // zasubq0 |
| 72091 | 0, // zasubq1 |
| 72092 | 0, // zasubs0 |
| 72093 | 0, // zasubs1 |
| 72094 | 280, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72095 | 280, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72096 | 280, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72097 | 280, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72098 | 0, // zsub3 |
| 72099 | 280, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72100 | 0, // zasubd1_then_zasubq0 |
| 72101 | 0, // zasubd1_then_zasubq1 |
| 72102 | 0, // zasubs1_then_zasubd0 |
| 72103 | 0, // zasubs1_then_zasubd1 |
| 72104 | 0, // zasubs1_then_zasubq0 |
| 72105 | 0, // zasubs1_then_zasubq1 |
| 72106 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72107 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72108 | 0, // zasubh1_then_zasubd0 |
| 72109 | 0, // zasubh1_then_zasubd1 |
| 72110 | 0, // zasubh1_then_zasubq0 |
| 72111 | 0, // zasubh1_then_zasubq1 |
| 72112 | 0, // zasubh1_then_zasubs0 |
| 72113 | 0, // zasubh1_then_zasubs1 |
| 72114 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72115 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72116 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72117 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72118 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72119 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72120 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72121 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72122 | 280, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72123 | 280, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72124 | 280, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72125 | 280, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72126 | 280, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72127 | 280, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72128 | 0, // dsub3_then_bsub |
| 72129 | 0, // dsub3_then_bsub_hi |
| 72130 | 0, // dsub3_then_hsub |
| 72131 | 0, // dsub3_then_hsub_hi |
| 72132 | 0, // dsub3_then_ssub |
| 72133 | 0, // dsub3_then_ssub_hi |
| 72134 | 280, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72135 | 280, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72136 | 280, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72137 | 280, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72138 | 280, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72139 | 280, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72140 | 0, // psub1_then_psub |
| 72141 | 280, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72142 | 0, // qsub3_then_dsub_hi |
| 72143 | 280, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72144 | 0, // x8sub_7_then_sub_32 |
| 72145 | 0, // x8sub_7_then_sub_32_hi |
| 72146 | 0, // x8sub_6_then_sub_32 |
| 72147 | 0, // x8sub_6_then_sub_32_hi |
| 72148 | 0, // x8sub_5_then_sub_32 |
| 72149 | 0, // x8sub_5_then_sub_32_hi |
| 72150 | 0, // x8sub_4_then_sub_32 |
| 72151 | 0, // x8sub_4_then_sub_32_hi |
| 72152 | 0, // x8sub_3_then_sub_32 |
| 72153 | 0, // x8sub_3_then_sub_32_hi |
| 72154 | 0, // x8sub_2_then_sub_32 |
| 72155 | 0, // x8sub_2_then_sub_32_hi |
| 72156 | 0, // x8sub_1_then_sub_32 |
| 72157 | 0, // x8sub_1_then_sub_32_hi |
| 72158 | 0, // subo64_then_sub_32 |
| 72159 | 0, // subo64_then_sub_32_hi |
| 72160 | 280, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72161 | 0, // zsub3_then_zsub_hi |
| 72162 | 280, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72163 | 0, // dsub0_dsub1 |
| 72164 | 0, // dsub0_dsub1_dsub2 |
| 72165 | 280, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72166 | 0, // dsub1_dsub2_dsub3 |
| 72167 | 0, // dsub2_dsub3 |
| 72168 | 280, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72169 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72170 | 280, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72171 | 0, // qsub0_qsub1 |
| 72172 | 0, // qsub0_qsub1_qsub2 |
| 72173 | 280, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72174 | 0, // qsub1_qsub2_qsub3 |
| 72175 | 0, // qsub2_qsub3 |
| 72176 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72177 | 0, // x8sub_0_x8sub_1 |
| 72178 | 0, // x8sub_2_x8sub_3 |
| 72179 | 0, // x8sub_4_x8sub_5 |
| 72180 | 0, // x8sub_6_x8sub_7 |
| 72181 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72182 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72183 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72184 | 0, // sub_32_subo64_then_sub_32 |
| 72185 | 280, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72186 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72187 | 280, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72188 | 280, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72189 | 0, // zsub0_zsub1_zsub2 |
| 72190 | 280, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 72191 | 0, // zsub1_zsub2_zsub3 |
| 72192 | 0, // zsub2_zsub3 |
| 72193 | 0, // zsub0_zsub2 |
| 72194 | 0, // zsub1_zsub3 |
| 72195 | }, |
| 72196 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72197 | 281, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72198 | 281, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72199 | 281, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72200 | 0, // dsub0 |
| 72201 | 281, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72202 | 281, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72203 | 0, // dsub3 |
| 72204 | 281, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72205 | 281, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72206 | 281, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72207 | 0, // psub |
| 72208 | 0, // psub0 |
| 72209 | 0, // psub1 |
| 72210 | 0, // qsub0 |
| 72211 | 281, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72212 | 281, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72213 | 0, // qsub3 |
| 72214 | 281, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72215 | 281, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72216 | 0, // sub_32 |
| 72217 | 0, // sub_32_hi |
| 72218 | 0, // sube32 |
| 72219 | 0, // sube64 |
| 72220 | 0, // subo32 |
| 72221 | 0, // subo64 |
| 72222 | 0, // x8sub_0 |
| 72223 | 0, // x8sub_1 |
| 72224 | 0, // x8sub_2 |
| 72225 | 0, // x8sub_3 |
| 72226 | 0, // x8sub_4 |
| 72227 | 0, // x8sub_5 |
| 72228 | 0, // x8sub_6 |
| 72229 | 0, // x8sub_7 |
| 72230 | 0, // zasubb |
| 72231 | 0, // zasubd0 |
| 72232 | 0, // zasubd1 |
| 72233 | 0, // zasubh0 |
| 72234 | 0, // zasubh1 |
| 72235 | 0, // zasubq0 |
| 72236 | 0, // zasubq1 |
| 72237 | 0, // zasubs0 |
| 72238 | 0, // zasubs1 |
| 72239 | 281, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72240 | 281, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72241 | 281, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72242 | 281, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72243 | 0, // zsub3 |
| 72244 | 281, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72245 | 0, // zasubd1_then_zasubq0 |
| 72246 | 0, // zasubd1_then_zasubq1 |
| 72247 | 0, // zasubs1_then_zasubd0 |
| 72248 | 0, // zasubs1_then_zasubd1 |
| 72249 | 0, // zasubs1_then_zasubq0 |
| 72250 | 0, // zasubs1_then_zasubq1 |
| 72251 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72252 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72253 | 0, // zasubh1_then_zasubd0 |
| 72254 | 0, // zasubh1_then_zasubd1 |
| 72255 | 0, // zasubh1_then_zasubq0 |
| 72256 | 0, // zasubh1_then_zasubq1 |
| 72257 | 0, // zasubh1_then_zasubs0 |
| 72258 | 0, // zasubh1_then_zasubs1 |
| 72259 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72260 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72261 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72262 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72263 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72264 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72265 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72266 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72267 | 281, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72268 | 281, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72269 | 281, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72270 | 281, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72271 | 281, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72272 | 281, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72273 | 0, // dsub3_then_bsub |
| 72274 | 0, // dsub3_then_bsub_hi |
| 72275 | 0, // dsub3_then_hsub |
| 72276 | 0, // dsub3_then_hsub_hi |
| 72277 | 0, // dsub3_then_ssub |
| 72278 | 0, // dsub3_then_ssub_hi |
| 72279 | 281, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72280 | 281, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72281 | 281, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72282 | 281, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72283 | 281, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72284 | 281, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72285 | 0, // psub1_then_psub |
| 72286 | 281, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72287 | 0, // qsub3_then_dsub_hi |
| 72288 | 281, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72289 | 0, // x8sub_7_then_sub_32 |
| 72290 | 0, // x8sub_7_then_sub_32_hi |
| 72291 | 0, // x8sub_6_then_sub_32 |
| 72292 | 0, // x8sub_6_then_sub_32_hi |
| 72293 | 0, // x8sub_5_then_sub_32 |
| 72294 | 0, // x8sub_5_then_sub_32_hi |
| 72295 | 0, // x8sub_4_then_sub_32 |
| 72296 | 0, // x8sub_4_then_sub_32_hi |
| 72297 | 0, // x8sub_3_then_sub_32 |
| 72298 | 0, // x8sub_3_then_sub_32_hi |
| 72299 | 0, // x8sub_2_then_sub_32 |
| 72300 | 0, // x8sub_2_then_sub_32_hi |
| 72301 | 0, // x8sub_1_then_sub_32 |
| 72302 | 0, // x8sub_1_then_sub_32_hi |
| 72303 | 0, // subo64_then_sub_32 |
| 72304 | 0, // subo64_then_sub_32_hi |
| 72305 | 281, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72306 | 0, // zsub3_then_zsub_hi |
| 72307 | 281, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72308 | 0, // dsub0_dsub1 |
| 72309 | 0, // dsub0_dsub1_dsub2 |
| 72310 | 281, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72311 | 0, // dsub1_dsub2_dsub3 |
| 72312 | 0, // dsub2_dsub3 |
| 72313 | 281, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72314 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72315 | 281, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72316 | 0, // qsub0_qsub1 |
| 72317 | 0, // qsub0_qsub1_qsub2 |
| 72318 | 281, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72319 | 0, // qsub1_qsub2_qsub3 |
| 72320 | 0, // qsub2_qsub3 |
| 72321 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72322 | 0, // x8sub_0_x8sub_1 |
| 72323 | 0, // x8sub_2_x8sub_3 |
| 72324 | 0, // x8sub_4_x8sub_5 |
| 72325 | 0, // x8sub_6_x8sub_7 |
| 72326 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72327 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72328 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72329 | 0, // sub_32_subo64_then_sub_32 |
| 72330 | 281, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72331 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72332 | 281, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72333 | 281, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72334 | 0, // zsub0_zsub1_zsub2 |
| 72335 | 281, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 72336 | 0, // zsub1_zsub2_zsub3 |
| 72337 | 0, // zsub2_zsub3 |
| 72338 | 0, // zsub0_zsub2 |
| 72339 | 0, // zsub1_zsub3 |
| 72340 | }, |
| 72341 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72342 | 282, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72343 | 282, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72344 | 282, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72345 | 0, // dsub0 |
| 72346 | 282, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72347 | 282, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72348 | 0, // dsub3 |
| 72349 | 282, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72350 | 282, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72351 | 282, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72352 | 0, // psub |
| 72353 | 0, // psub0 |
| 72354 | 0, // psub1 |
| 72355 | 0, // qsub0 |
| 72356 | 282, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72357 | 282, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72358 | 0, // qsub3 |
| 72359 | 282, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72360 | 282, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72361 | 0, // sub_32 |
| 72362 | 0, // sub_32_hi |
| 72363 | 0, // sube32 |
| 72364 | 0, // sube64 |
| 72365 | 0, // subo32 |
| 72366 | 0, // subo64 |
| 72367 | 0, // x8sub_0 |
| 72368 | 0, // x8sub_1 |
| 72369 | 0, // x8sub_2 |
| 72370 | 0, // x8sub_3 |
| 72371 | 0, // x8sub_4 |
| 72372 | 0, // x8sub_5 |
| 72373 | 0, // x8sub_6 |
| 72374 | 0, // x8sub_7 |
| 72375 | 0, // zasubb |
| 72376 | 0, // zasubd0 |
| 72377 | 0, // zasubd1 |
| 72378 | 0, // zasubh0 |
| 72379 | 0, // zasubh1 |
| 72380 | 0, // zasubq0 |
| 72381 | 0, // zasubq1 |
| 72382 | 0, // zasubs0 |
| 72383 | 0, // zasubs1 |
| 72384 | 282, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72385 | 282, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72386 | 282, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72387 | 282, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72388 | 0, // zsub3 |
| 72389 | 282, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72390 | 0, // zasubd1_then_zasubq0 |
| 72391 | 0, // zasubd1_then_zasubq1 |
| 72392 | 0, // zasubs1_then_zasubd0 |
| 72393 | 0, // zasubs1_then_zasubd1 |
| 72394 | 0, // zasubs1_then_zasubq0 |
| 72395 | 0, // zasubs1_then_zasubq1 |
| 72396 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72397 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72398 | 0, // zasubh1_then_zasubd0 |
| 72399 | 0, // zasubh1_then_zasubd1 |
| 72400 | 0, // zasubh1_then_zasubq0 |
| 72401 | 0, // zasubh1_then_zasubq1 |
| 72402 | 0, // zasubh1_then_zasubs0 |
| 72403 | 0, // zasubh1_then_zasubs1 |
| 72404 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72405 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72406 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72407 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72408 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72409 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72410 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72411 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72412 | 282, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72413 | 282, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72414 | 282, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72415 | 282, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72416 | 282, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72417 | 282, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72418 | 0, // dsub3_then_bsub |
| 72419 | 0, // dsub3_then_bsub_hi |
| 72420 | 0, // dsub3_then_hsub |
| 72421 | 0, // dsub3_then_hsub_hi |
| 72422 | 0, // dsub3_then_ssub |
| 72423 | 0, // dsub3_then_ssub_hi |
| 72424 | 282, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72425 | 282, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72426 | 282, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72427 | 282, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72428 | 282, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72429 | 282, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72430 | 0, // psub1_then_psub |
| 72431 | 282, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72432 | 0, // qsub3_then_dsub_hi |
| 72433 | 282, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72434 | 0, // x8sub_7_then_sub_32 |
| 72435 | 0, // x8sub_7_then_sub_32_hi |
| 72436 | 0, // x8sub_6_then_sub_32 |
| 72437 | 0, // x8sub_6_then_sub_32_hi |
| 72438 | 0, // x8sub_5_then_sub_32 |
| 72439 | 0, // x8sub_5_then_sub_32_hi |
| 72440 | 0, // x8sub_4_then_sub_32 |
| 72441 | 0, // x8sub_4_then_sub_32_hi |
| 72442 | 0, // x8sub_3_then_sub_32 |
| 72443 | 0, // x8sub_3_then_sub_32_hi |
| 72444 | 0, // x8sub_2_then_sub_32 |
| 72445 | 0, // x8sub_2_then_sub_32_hi |
| 72446 | 0, // x8sub_1_then_sub_32 |
| 72447 | 0, // x8sub_1_then_sub_32_hi |
| 72448 | 0, // subo64_then_sub_32 |
| 72449 | 0, // subo64_then_sub_32_hi |
| 72450 | 282, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72451 | 0, // zsub3_then_zsub_hi |
| 72452 | 282, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72453 | 0, // dsub0_dsub1 |
| 72454 | 0, // dsub0_dsub1_dsub2 |
| 72455 | 282, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72456 | 0, // dsub1_dsub2_dsub3 |
| 72457 | 0, // dsub2_dsub3 |
| 72458 | 282, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72459 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72460 | 282, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72461 | 0, // qsub0_qsub1 |
| 72462 | 0, // qsub0_qsub1_qsub2 |
| 72463 | 282, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72464 | 0, // qsub1_qsub2_qsub3 |
| 72465 | 0, // qsub2_qsub3 |
| 72466 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72467 | 0, // x8sub_0_x8sub_1 |
| 72468 | 0, // x8sub_2_x8sub_3 |
| 72469 | 0, // x8sub_4_x8sub_5 |
| 72470 | 0, // x8sub_6_x8sub_7 |
| 72471 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72472 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72473 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72474 | 0, // sub_32_subo64_then_sub_32 |
| 72475 | 282, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72476 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72477 | 282, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72478 | 282, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72479 | 0, // zsub0_zsub1_zsub2 |
| 72480 | 282, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 72481 | 0, // zsub1_zsub2_zsub3 |
| 72482 | 0, // zsub2_zsub3 |
| 72483 | 0, // zsub0_zsub2 |
| 72484 | 0, // zsub1_zsub3 |
| 72485 | }, |
| 72486 | { // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72487 | 283, // bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72488 | 283, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72489 | 283, // dsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72490 | 0, // dsub0 |
| 72491 | 283, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72492 | 283, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72493 | 0, // dsub3 |
| 72494 | 283, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72495 | 283, // hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72496 | 283, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72497 | 0, // psub |
| 72498 | 0, // psub0 |
| 72499 | 0, // psub1 |
| 72500 | 0, // qsub0 |
| 72501 | 283, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72502 | 283, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72503 | 0, // qsub3 |
| 72504 | 283, // ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72505 | 283, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72506 | 0, // sub_32 |
| 72507 | 0, // sub_32_hi |
| 72508 | 0, // sube32 |
| 72509 | 0, // sube64 |
| 72510 | 0, // subo32 |
| 72511 | 0, // subo64 |
| 72512 | 0, // x8sub_0 |
| 72513 | 0, // x8sub_1 |
| 72514 | 0, // x8sub_2 |
| 72515 | 0, // x8sub_3 |
| 72516 | 0, // x8sub_4 |
| 72517 | 0, // x8sub_5 |
| 72518 | 0, // x8sub_6 |
| 72519 | 0, // x8sub_7 |
| 72520 | 0, // zasubb |
| 72521 | 0, // zasubd0 |
| 72522 | 0, // zasubd1 |
| 72523 | 0, // zasubh0 |
| 72524 | 0, // zasubh1 |
| 72525 | 0, // zasubq0 |
| 72526 | 0, // zasubq1 |
| 72527 | 0, // zasubs0 |
| 72528 | 0, // zasubs1 |
| 72529 | 283, // zsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72530 | 283, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72531 | 283, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72532 | 283, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72533 | 0, // zsub3 |
| 72534 | 283, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72535 | 0, // zasubd1_then_zasubq0 |
| 72536 | 0, // zasubd1_then_zasubq1 |
| 72537 | 0, // zasubs1_then_zasubd0 |
| 72538 | 0, // zasubs1_then_zasubd1 |
| 72539 | 0, // zasubs1_then_zasubq0 |
| 72540 | 0, // zasubs1_then_zasubq1 |
| 72541 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72542 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72543 | 0, // zasubh1_then_zasubd0 |
| 72544 | 0, // zasubh1_then_zasubd1 |
| 72545 | 0, // zasubh1_then_zasubq0 |
| 72546 | 0, // zasubh1_then_zasubq1 |
| 72547 | 0, // zasubh1_then_zasubs0 |
| 72548 | 0, // zasubh1_then_zasubs1 |
| 72549 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72550 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72551 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72552 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72553 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72554 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72555 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72556 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72557 | 283, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72558 | 283, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72559 | 283, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72560 | 283, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72561 | 283, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72562 | 283, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72563 | 0, // dsub3_then_bsub |
| 72564 | 0, // dsub3_then_bsub_hi |
| 72565 | 0, // dsub3_then_hsub |
| 72566 | 0, // dsub3_then_hsub_hi |
| 72567 | 0, // dsub3_then_ssub |
| 72568 | 0, // dsub3_then_ssub_hi |
| 72569 | 283, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72570 | 283, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72571 | 283, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72572 | 283, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72573 | 283, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72574 | 283, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72575 | 0, // psub1_then_psub |
| 72576 | 283, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72577 | 0, // qsub3_then_dsub_hi |
| 72578 | 283, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72579 | 0, // x8sub_7_then_sub_32 |
| 72580 | 0, // x8sub_7_then_sub_32_hi |
| 72581 | 0, // x8sub_6_then_sub_32 |
| 72582 | 0, // x8sub_6_then_sub_32_hi |
| 72583 | 0, // x8sub_5_then_sub_32 |
| 72584 | 0, // x8sub_5_then_sub_32_hi |
| 72585 | 0, // x8sub_4_then_sub_32 |
| 72586 | 0, // x8sub_4_then_sub_32_hi |
| 72587 | 0, // x8sub_3_then_sub_32 |
| 72588 | 0, // x8sub_3_then_sub_32_hi |
| 72589 | 0, // x8sub_2_then_sub_32 |
| 72590 | 0, // x8sub_2_then_sub_32_hi |
| 72591 | 0, // x8sub_1_then_sub_32 |
| 72592 | 0, // x8sub_1_then_sub_32_hi |
| 72593 | 0, // subo64_then_sub_32 |
| 72594 | 0, // subo64_then_sub_32_hi |
| 72595 | 283, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72596 | 0, // zsub3_then_zsub_hi |
| 72597 | 283, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72598 | 0, // dsub0_dsub1 |
| 72599 | 0, // dsub0_dsub1_dsub2 |
| 72600 | 283, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72601 | 0, // dsub1_dsub2_dsub3 |
| 72602 | 0, // dsub2_dsub3 |
| 72603 | 283, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72604 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72605 | 283, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72606 | 0, // qsub0_qsub1 |
| 72607 | 0, // qsub0_qsub1_qsub2 |
| 72608 | 283, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72609 | 0, // qsub1_qsub2_qsub3 |
| 72610 | 0, // qsub2_qsub3 |
| 72611 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72612 | 0, // x8sub_0_x8sub_1 |
| 72613 | 0, // x8sub_2_x8sub_3 |
| 72614 | 0, // x8sub_4_x8sub_5 |
| 72615 | 0, // x8sub_6_x8sub_7 |
| 72616 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72617 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72618 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72619 | 0, // sub_32_subo64_then_sub_32 |
| 72620 | 283, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72621 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72622 | 283, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72623 | 283, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72624 | 0, // zsub0_zsub1_zsub2 |
| 72625 | 283, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 72626 | 0, // zsub1_zsub2_zsub3 |
| 72627 | 0, // zsub2_zsub3 |
| 72628 | 0, // zsub0_zsub2 |
| 72629 | 0, // zsub1_zsub3 |
| 72630 | }, |
| 72631 | { // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72632 | 284, // bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72633 | 284, // bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72634 | 284, // dsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72635 | 0, // dsub0 |
| 72636 | 284, // dsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72637 | 284, // dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72638 | 0, // dsub3 |
| 72639 | 284, // dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72640 | 284, // hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72641 | 284, // hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72642 | 0, // psub |
| 72643 | 0, // psub0 |
| 72644 | 0, // psub1 |
| 72645 | 0, // qsub0 |
| 72646 | 284, // qsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72647 | 284, // qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72648 | 0, // qsub3 |
| 72649 | 284, // ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72650 | 284, // ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72651 | 0, // sub_32 |
| 72652 | 0, // sub_32_hi |
| 72653 | 0, // sube32 |
| 72654 | 0, // sube64 |
| 72655 | 0, // subo32 |
| 72656 | 0, // subo64 |
| 72657 | 0, // x8sub_0 |
| 72658 | 0, // x8sub_1 |
| 72659 | 0, // x8sub_2 |
| 72660 | 0, // x8sub_3 |
| 72661 | 0, // x8sub_4 |
| 72662 | 0, // x8sub_5 |
| 72663 | 0, // x8sub_6 |
| 72664 | 0, // x8sub_7 |
| 72665 | 0, // zasubb |
| 72666 | 0, // zasubd0 |
| 72667 | 0, // zasubd1 |
| 72668 | 0, // zasubh0 |
| 72669 | 0, // zasubh1 |
| 72670 | 0, // zasubq0 |
| 72671 | 0, // zasubq1 |
| 72672 | 0, // zasubs0 |
| 72673 | 0, // zasubs1 |
| 72674 | 284, // zsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72675 | 284, // zsub0 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72676 | 284, // zsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72677 | 284, // zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72678 | 0, // zsub3 |
| 72679 | 284, // zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72680 | 0, // zasubd1_then_zasubq0 |
| 72681 | 0, // zasubd1_then_zasubq1 |
| 72682 | 0, // zasubs1_then_zasubd0 |
| 72683 | 0, // zasubs1_then_zasubd1 |
| 72684 | 0, // zasubs1_then_zasubq0 |
| 72685 | 0, // zasubs1_then_zasubq1 |
| 72686 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72687 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72688 | 0, // zasubh1_then_zasubd0 |
| 72689 | 0, // zasubh1_then_zasubd1 |
| 72690 | 0, // zasubh1_then_zasubq0 |
| 72691 | 0, // zasubh1_then_zasubq1 |
| 72692 | 0, // zasubh1_then_zasubs0 |
| 72693 | 0, // zasubh1_then_zasubs1 |
| 72694 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72695 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72696 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72697 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72698 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72699 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72700 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72701 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72702 | 284, // dsub1_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72703 | 284, // dsub1_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72704 | 284, // dsub1_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72705 | 284, // dsub1_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72706 | 284, // dsub1_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72707 | 284, // dsub1_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72708 | 0, // dsub3_then_bsub |
| 72709 | 0, // dsub3_then_bsub_hi |
| 72710 | 0, // dsub3_then_hsub |
| 72711 | 0, // dsub3_then_hsub_hi |
| 72712 | 0, // dsub3_then_ssub |
| 72713 | 0, // dsub3_then_ssub_hi |
| 72714 | 284, // dsub2_then_bsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72715 | 284, // dsub2_then_bsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72716 | 284, // dsub2_then_hsub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72717 | 284, // dsub2_then_hsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72718 | 284, // dsub2_then_ssub -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72719 | 284, // dsub2_then_ssub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72720 | 0, // psub1_then_psub |
| 72721 | 284, // qsub1_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72722 | 0, // qsub3_then_dsub_hi |
| 72723 | 284, // qsub2_then_dsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72724 | 0, // x8sub_7_then_sub_32 |
| 72725 | 0, // x8sub_7_then_sub_32_hi |
| 72726 | 0, // x8sub_6_then_sub_32 |
| 72727 | 0, // x8sub_6_then_sub_32_hi |
| 72728 | 0, // x8sub_5_then_sub_32 |
| 72729 | 0, // x8sub_5_then_sub_32_hi |
| 72730 | 0, // x8sub_4_then_sub_32 |
| 72731 | 0, // x8sub_4_then_sub_32_hi |
| 72732 | 0, // x8sub_3_then_sub_32 |
| 72733 | 0, // x8sub_3_then_sub_32_hi |
| 72734 | 0, // x8sub_2_then_sub_32 |
| 72735 | 0, // x8sub_2_then_sub_32_hi |
| 72736 | 0, // x8sub_1_then_sub_32 |
| 72737 | 0, // x8sub_1_then_sub_32_hi |
| 72738 | 0, // subo64_then_sub_32 |
| 72739 | 0, // subo64_then_sub_32_hi |
| 72740 | 284, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72741 | 0, // zsub3_then_zsub_hi |
| 72742 | 284, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72743 | 0, // dsub0_dsub1 |
| 72744 | 0, // dsub0_dsub1_dsub2 |
| 72745 | 284, // dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72746 | 0, // dsub1_dsub2_dsub3 |
| 72747 | 0, // dsub2_dsub3 |
| 72748 | 284, // dsub_dsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72749 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72750 | 284, // dsub_dsub1_dsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72751 | 0, // qsub0_qsub1 |
| 72752 | 0, // qsub0_qsub1_qsub2 |
| 72753 | 284, // qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72754 | 0, // qsub1_qsub2_qsub3 |
| 72755 | 0, // qsub2_qsub3 |
| 72756 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72757 | 0, // x8sub_0_x8sub_1 |
| 72758 | 0, // x8sub_2_x8sub_3 |
| 72759 | 0, // x8sub_4_x8sub_5 |
| 72760 | 0, // x8sub_6_x8sub_7 |
| 72761 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72762 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72763 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72764 | 0, // sub_32_subo64_then_sub_32 |
| 72765 | 284, // zsub_qsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72766 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72767 | 284, // zsub_qsub1_qsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72768 | 284, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72769 | 0, // zsub0_zsub1_zsub2 |
| 72770 | 284, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 72771 | 0, // zsub1_zsub2_zsub3 |
| 72772 | 0, // zsub2_zsub3 |
| 72773 | 0, // zsub0_zsub2 |
| 72774 | 0, // zsub1_zsub3 |
| 72775 | }, |
| 72776 | { // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72777 | 285, // bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72778 | 285, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72779 | 285, // dsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72780 | 0, // dsub0 |
| 72781 | 285, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72782 | 285, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72783 | 0, // dsub3 |
| 72784 | 285, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72785 | 285, // hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72786 | 285, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72787 | 0, // psub |
| 72788 | 0, // psub0 |
| 72789 | 0, // psub1 |
| 72790 | 0, // qsub0 |
| 72791 | 285, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72792 | 285, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72793 | 0, // qsub3 |
| 72794 | 285, // ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72795 | 285, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72796 | 0, // sub_32 |
| 72797 | 0, // sub_32_hi |
| 72798 | 0, // sube32 |
| 72799 | 0, // sube64 |
| 72800 | 0, // subo32 |
| 72801 | 0, // subo64 |
| 72802 | 0, // x8sub_0 |
| 72803 | 0, // x8sub_1 |
| 72804 | 0, // x8sub_2 |
| 72805 | 0, // x8sub_3 |
| 72806 | 0, // x8sub_4 |
| 72807 | 0, // x8sub_5 |
| 72808 | 0, // x8sub_6 |
| 72809 | 0, // x8sub_7 |
| 72810 | 0, // zasubb |
| 72811 | 0, // zasubd0 |
| 72812 | 0, // zasubd1 |
| 72813 | 0, // zasubh0 |
| 72814 | 0, // zasubh1 |
| 72815 | 0, // zasubq0 |
| 72816 | 0, // zasubq1 |
| 72817 | 0, // zasubs0 |
| 72818 | 0, // zasubs1 |
| 72819 | 285, // zsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72820 | 285, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72821 | 285, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72822 | 285, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72823 | 0, // zsub3 |
| 72824 | 285, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72825 | 0, // zasubd1_then_zasubq0 |
| 72826 | 0, // zasubd1_then_zasubq1 |
| 72827 | 0, // zasubs1_then_zasubd0 |
| 72828 | 0, // zasubs1_then_zasubd1 |
| 72829 | 0, // zasubs1_then_zasubq0 |
| 72830 | 0, // zasubs1_then_zasubq1 |
| 72831 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72832 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72833 | 0, // zasubh1_then_zasubd0 |
| 72834 | 0, // zasubh1_then_zasubd1 |
| 72835 | 0, // zasubh1_then_zasubq0 |
| 72836 | 0, // zasubh1_then_zasubq1 |
| 72837 | 0, // zasubh1_then_zasubs0 |
| 72838 | 0, // zasubh1_then_zasubs1 |
| 72839 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72840 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72841 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72842 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72843 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72844 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72845 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72846 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72847 | 285, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72848 | 285, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72849 | 285, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72850 | 285, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72851 | 285, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72852 | 285, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72853 | 0, // dsub3_then_bsub |
| 72854 | 0, // dsub3_then_bsub_hi |
| 72855 | 0, // dsub3_then_hsub |
| 72856 | 0, // dsub3_then_hsub_hi |
| 72857 | 0, // dsub3_then_ssub |
| 72858 | 0, // dsub3_then_ssub_hi |
| 72859 | 285, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72860 | 285, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72861 | 285, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72862 | 285, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72863 | 285, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72864 | 285, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72865 | 0, // psub1_then_psub |
| 72866 | 285, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72867 | 0, // qsub3_then_dsub_hi |
| 72868 | 285, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72869 | 0, // x8sub_7_then_sub_32 |
| 72870 | 0, // x8sub_7_then_sub_32_hi |
| 72871 | 0, // x8sub_6_then_sub_32 |
| 72872 | 0, // x8sub_6_then_sub_32_hi |
| 72873 | 0, // x8sub_5_then_sub_32 |
| 72874 | 0, // x8sub_5_then_sub_32_hi |
| 72875 | 0, // x8sub_4_then_sub_32 |
| 72876 | 0, // x8sub_4_then_sub_32_hi |
| 72877 | 0, // x8sub_3_then_sub_32 |
| 72878 | 0, // x8sub_3_then_sub_32_hi |
| 72879 | 0, // x8sub_2_then_sub_32 |
| 72880 | 0, // x8sub_2_then_sub_32_hi |
| 72881 | 0, // x8sub_1_then_sub_32 |
| 72882 | 0, // x8sub_1_then_sub_32_hi |
| 72883 | 0, // subo64_then_sub_32 |
| 72884 | 0, // subo64_then_sub_32_hi |
| 72885 | 285, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72886 | 0, // zsub3_then_zsub_hi |
| 72887 | 285, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72888 | 0, // dsub0_dsub1 |
| 72889 | 0, // dsub0_dsub1_dsub2 |
| 72890 | 285, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72891 | 0, // dsub1_dsub2_dsub3 |
| 72892 | 0, // dsub2_dsub3 |
| 72893 | 285, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72894 | 0, // dsub_dsub1_dsub2_dsub3 |
| 72895 | 285, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72896 | 0, // qsub0_qsub1 |
| 72897 | 0, // qsub0_qsub1_qsub2 |
| 72898 | 285, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72899 | 0, // qsub1_qsub2_qsub3 |
| 72900 | 0, // qsub2_qsub3 |
| 72901 | 0, // sub_32_x8sub_1_then_sub_32 |
| 72902 | 0, // x8sub_0_x8sub_1 |
| 72903 | 0, // x8sub_2_x8sub_3 |
| 72904 | 0, // x8sub_4_x8sub_5 |
| 72905 | 0, // x8sub_6_x8sub_7 |
| 72906 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 72907 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 72908 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 72909 | 0, // sub_32_subo64_then_sub_32 |
| 72910 | 285, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72911 | 0, // zsub_qsub1_qsub2_qsub3 |
| 72912 | 285, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72913 | 285, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72914 | 0, // zsub0_zsub1_zsub2 |
| 72915 | 285, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 72916 | 0, // zsub1_zsub2_zsub3 |
| 72917 | 0, // zsub2_zsub3 |
| 72918 | 0, // zsub0_zsub2 |
| 72919 | 0, // zsub1_zsub3 |
| 72920 | }, |
| 72921 | { // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72922 | 286, // bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72923 | 286, // bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72924 | 286, // dsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72925 | 0, // dsub0 |
| 72926 | 286, // dsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72927 | 286, // dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72928 | 0, // dsub3 |
| 72929 | 286, // dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72930 | 286, // hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72931 | 286, // hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72932 | 0, // psub |
| 72933 | 0, // psub0 |
| 72934 | 0, // psub1 |
| 72935 | 0, // qsub0 |
| 72936 | 286, // qsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72937 | 286, // qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72938 | 0, // qsub3 |
| 72939 | 286, // ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72940 | 286, // ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72941 | 0, // sub_32 |
| 72942 | 0, // sub_32_hi |
| 72943 | 0, // sube32 |
| 72944 | 0, // sube64 |
| 72945 | 0, // subo32 |
| 72946 | 0, // subo64 |
| 72947 | 0, // x8sub_0 |
| 72948 | 0, // x8sub_1 |
| 72949 | 0, // x8sub_2 |
| 72950 | 0, // x8sub_3 |
| 72951 | 0, // x8sub_4 |
| 72952 | 0, // x8sub_5 |
| 72953 | 0, // x8sub_6 |
| 72954 | 0, // x8sub_7 |
| 72955 | 0, // zasubb |
| 72956 | 0, // zasubd0 |
| 72957 | 0, // zasubd1 |
| 72958 | 0, // zasubh0 |
| 72959 | 0, // zasubh1 |
| 72960 | 0, // zasubq0 |
| 72961 | 0, // zasubq1 |
| 72962 | 0, // zasubs0 |
| 72963 | 0, // zasubs1 |
| 72964 | 286, // zsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72965 | 286, // zsub0 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72966 | 286, // zsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72967 | 286, // zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72968 | 0, // zsub3 |
| 72969 | 286, // zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72970 | 0, // zasubd1_then_zasubq0 |
| 72971 | 0, // zasubd1_then_zasubq1 |
| 72972 | 0, // zasubs1_then_zasubd0 |
| 72973 | 0, // zasubs1_then_zasubd1 |
| 72974 | 0, // zasubs1_then_zasubq0 |
| 72975 | 0, // zasubs1_then_zasubq1 |
| 72976 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 72977 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 72978 | 0, // zasubh1_then_zasubd0 |
| 72979 | 0, // zasubh1_then_zasubd1 |
| 72980 | 0, // zasubh1_then_zasubq0 |
| 72981 | 0, // zasubh1_then_zasubq1 |
| 72982 | 0, // zasubh1_then_zasubs0 |
| 72983 | 0, // zasubh1_then_zasubs1 |
| 72984 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 72985 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 72986 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 72987 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 72988 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 72989 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 72990 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 72991 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 72992 | 286, // dsub1_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72993 | 286, // dsub1_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72994 | 286, // dsub1_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72995 | 286, // dsub1_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72996 | 286, // dsub1_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72997 | 286, // dsub1_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 72998 | 0, // dsub3_then_bsub |
| 72999 | 0, // dsub3_then_bsub_hi |
| 73000 | 0, // dsub3_then_hsub |
| 73001 | 0, // dsub3_then_hsub_hi |
| 73002 | 0, // dsub3_then_ssub |
| 73003 | 0, // dsub3_then_ssub_hi |
| 73004 | 286, // dsub2_then_bsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73005 | 286, // dsub2_then_bsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73006 | 286, // dsub2_then_hsub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73007 | 286, // dsub2_then_hsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73008 | 286, // dsub2_then_ssub -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73009 | 286, // dsub2_then_ssub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73010 | 0, // psub1_then_psub |
| 73011 | 286, // qsub1_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73012 | 0, // qsub3_then_dsub_hi |
| 73013 | 286, // qsub2_then_dsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73014 | 0, // x8sub_7_then_sub_32 |
| 73015 | 0, // x8sub_7_then_sub_32_hi |
| 73016 | 0, // x8sub_6_then_sub_32 |
| 73017 | 0, // x8sub_6_then_sub_32_hi |
| 73018 | 0, // x8sub_5_then_sub_32 |
| 73019 | 0, // x8sub_5_then_sub_32_hi |
| 73020 | 0, // x8sub_4_then_sub_32 |
| 73021 | 0, // x8sub_4_then_sub_32_hi |
| 73022 | 0, // x8sub_3_then_sub_32 |
| 73023 | 0, // x8sub_3_then_sub_32_hi |
| 73024 | 0, // x8sub_2_then_sub_32 |
| 73025 | 0, // x8sub_2_then_sub_32_hi |
| 73026 | 0, // x8sub_1_then_sub_32 |
| 73027 | 0, // x8sub_1_then_sub_32_hi |
| 73028 | 0, // subo64_then_sub_32 |
| 73029 | 0, // subo64_then_sub_32_hi |
| 73030 | 286, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73031 | 0, // zsub3_then_zsub_hi |
| 73032 | 286, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73033 | 0, // dsub0_dsub1 |
| 73034 | 0, // dsub0_dsub1_dsub2 |
| 73035 | 286, // dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73036 | 0, // dsub1_dsub2_dsub3 |
| 73037 | 0, // dsub2_dsub3 |
| 73038 | 286, // dsub_dsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73039 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73040 | 286, // dsub_dsub1_dsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73041 | 0, // qsub0_qsub1 |
| 73042 | 0, // qsub0_qsub1_qsub2 |
| 73043 | 286, // qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73044 | 0, // qsub1_qsub2_qsub3 |
| 73045 | 0, // qsub2_qsub3 |
| 73046 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73047 | 0, // x8sub_0_x8sub_1 |
| 73048 | 0, // x8sub_2_x8sub_3 |
| 73049 | 0, // x8sub_4_x8sub_5 |
| 73050 | 0, // x8sub_6_x8sub_7 |
| 73051 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73052 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73053 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73054 | 0, // sub_32_subo64_then_sub_32 |
| 73055 | 286, // zsub_qsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73056 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73057 | 286, // zsub_qsub1_qsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73058 | 286, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73059 | 0, // zsub0_zsub1_zsub2 |
| 73060 | 286, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 73061 | 0, // zsub1_zsub2_zsub3 |
| 73062 | 0, // zsub2_zsub3 |
| 73063 | 0, // zsub0_zsub2 |
| 73064 | 0, // zsub1_zsub3 |
| 73065 | }, |
| 73066 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73067 | 287, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73068 | 287, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73069 | 287, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73070 | 0, // dsub0 |
| 73071 | 287, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73072 | 287, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73073 | 0, // dsub3 |
| 73074 | 287, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73075 | 287, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73076 | 287, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73077 | 0, // psub |
| 73078 | 0, // psub0 |
| 73079 | 0, // psub1 |
| 73080 | 0, // qsub0 |
| 73081 | 287, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73082 | 287, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73083 | 0, // qsub3 |
| 73084 | 287, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73085 | 287, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73086 | 0, // sub_32 |
| 73087 | 0, // sub_32_hi |
| 73088 | 0, // sube32 |
| 73089 | 0, // sube64 |
| 73090 | 0, // subo32 |
| 73091 | 0, // subo64 |
| 73092 | 0, // x8sub_0 |
| 73093 | 0, // x8sub_1 |
| 73094 | 0, // x8sub_2 |
| 73095 | 0, // x8sub_3 |
| 73096 | 0, // x8sub_4 |
| 73097 | 0, // x8sub_5 |
| 73098 | 0, // x8sub_6 |
| 73099 | 0, // x8sub_7 |
| 73100 | 0, // zasubb |
| 73101 | 0, // zasubd0 |
| 73102 | 0, // zasubd1 |
| 73103 | 0, // zasubh0 |
| 73104 | 0, // zasubh1 |
| 73105 | 0, // zasubq0 |
| 73106 | 0, // zasubq1 |
| 73107 | 0, // zasubs0 |
| 73108 | 0, // zasubs1 |
| 73109 | 287, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73110 | 287, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73111 | 287, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73112 | 287, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73113 | 0, // zsub3 |
| 73114 | 287, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73115 | 0, // zasubd1_then_zasubq0 |
| 73116 | 0, // zasubd1_then_zasubq1 |
| 73117 | 0, // zasubs1_then_zasubd0 |
| 73118 | 0, // zasubs1_then_zasubd1 |
| 73119 | 0, // zasubs1_then_zasubq0 |
| 73120 | 0, // zasubs1_then_zasubq1 |
| 73121 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73122 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73123 | 0, // zasubh1_then_zasubd0 |
| 73124 | 0, // zasubh1_then_zasubd1 |
| 73125 | 0, // zasubh1_then_zasubq0 |
| 73126 | 0, // zasubh1_then_zasubq1 |
| 73127 | 0, // zasubh1_then_zasubs0 |
| 73128 | 0, // zasubh1_then_zasubs1 |
| 73129 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73130 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73131 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73132 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73133 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73134 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73135 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73136 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73137 | 287, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73138 | 287, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73139 | 287, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73140 | 287, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73141 | 287, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73142 | 287, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73143 | 0, // dsub3_then_bsub |
| 73144 | 0, // dsub3_then_bsub_hi |
| 73145 | 0, // dsub3_then_hsub |
| 73146 | 0, // dsub3_then_hsub_hi |
| 73147 | 0, // dsub3_then_ssub |
| 73148 | 0, // dsub3_then_ssub_hi |
| 73149 | 287, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73150 | 287, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73151 | 287, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73152 | 287, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73153 | 287, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73154 | 287, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73155 | 0, // psub1_then_psub |
| 73156 | 287, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73157 | 0, // qsub3_then_dsub_hi |
| 73158 | 287, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73159 | 0, // x8sub_7_then_sub_32 |
| 73160 | 0, // x8sub_7_then_sub_32_hi |
| 73161 | 0, // x8sub_6_then_sub_32 |
| 73162 | 0, // x8sub_6_then_sub_32_hi |
| 73163 | 0, // x8sub_5_then_sub_32 |
| 73164 | 0, // x8sub_5_then_sub_32_hi |
| 73165 | 0, // x8sub_4_then_sub_32 |
| 73166 | 0, // x8sub_4_then_sub_32_hi |
| 73167 | 0, // x8sub_3_then_sub_32 |
| 73168 | 0, // x8sub_3_then_sub_32_hi |
| 73169 | 0, // x8sub_2_then_sub_32 |
| 73170 | 0, // x8sub_2_then_sub_32_hi |
| 73171 | 0, // x8sub_1_then_sub_32 |
| 73172 | 0, // x8sub_1_then_sub_32_hi |
| 73173 | 0, // subo64_then_sub_32 |
| 73174 | 0, // subo64_then_sub_32_hi |
| 73175 | 287, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73176 | 0, // zsub3_then_zsub_hi |
| 73177 | 287, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73178 | 0, // dsub0_dsub1 |
| 73179 | 0, // dsub0_dsub1_dsub2 |
| 73180 | 287, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73181 | 0, // dsub1_dsub2_dsub3 |
| 73182 | 0, // dsub2_dsub3 |
| 73183 | 287, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73184 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73185 | 287, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73186 | 0, // qsub0_qsub1 |
| 73187 | 0, // qsub0_qsub1_qsub2 |
| 73188 | 287, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73189 | 0, // qsub1_qsub2_qsub3 |
| 73190 | 0, // qsub2_qsub3 |
| 73191 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73192 | 0, // x8sub_0_x8sub_1 |
| 73193 | 0, // x8sub_2_x8sub_3 |
| 73194 | 0, // x8sub_4_x8sub_5 |
| 73195 | 0, // x8sub_6_x8sub_7 |
| 73196 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73197 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73198 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73199 | 0, // sub_32_subo64_then_sub_32 |
| 73200 | 287, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73201 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73202 | 287, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73203 | 287, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73204 | 0, // zsub0_zsub1_zsub2 |
| 73205 | 287, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 73206 | 0, // zsub1_zsub2_zsub3 |
| 73207 | 0, // zsub2_zsub3 |
| 73208 | 0, // zsub0_zsub2 |
| 73209 | 0, // zsub1_zsub3 |
| 73210 | }, |
| 73211 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73212 | 288, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73213 | 288, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73214 | 288, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73215 | 0, // dsub0 |
| 73216 | 288, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73217 | 288, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73218 | 0, // dsub3 |
| 73219 | 288, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73220 | 288, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73221 | 288, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73222 | 0, // psub |
| 73223 | 0, // psub0 |
| 73224 | 0, // psub1 |
| 73225 | 0, // qsub0 |
| 73226 | 288, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73227 | 288, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73228 | 0, // qsub3 |
| 73229 | 288, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73230 | 288, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73231 | 0, // sub_32 |
| 73232 | 0, // sub_32_hi |
| 73233 | 0, // sube32 |
| 73234 | 0, // sube64 |
| 73235 | 0, // subo32 |
| 73236 | 0, // subo64 |
| 73237 | 0, // x8sub_0 |
| 73238 | 0, // x8sub_1 |
| 73239 | 0, // x8sub_2 |
| 73240 | 0, // x8sub_3 |
| 73241 | 0, // x8sub_4 |
| 73242 | 0, // x8sub_5 |
| 73243 | 0, // x8sub_6 |
| 73244 | 0, // x8sub_7 |
| 73245 | 0, // zasubb |
| 73246 | 0, // zasubd0 |
| 73247 | 0, // zasubd1 |
| 73248 | 0, // zasubh0 |
| 73249 | 0, // zasubh1 |
| 73250 | 0, // zasubq0 |
| 73251 | 0, // zasubq1 |
| 73252 | 0, // zasubs0 |
| 73253 | 0, // zasubs1 |
| 73254 | 288, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73255 | 288, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73256 | 288, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73257 | 288, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73258 | 0, // zsub3 |
| 73259 | 288, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73260 | 0, // zasubd1_then_zasubq0 |
| 73261 | 0, // zasubd1_then_zasubq1 |
| 73262 | 0, // zasubs1_then_zasubd0 |
| 73263 | 0, // zasubs1_then_zasubd1 |
| 73264 | 0, // zasubs1_then_zasubq0 |
| 73265 | 0, // zasubs1_then_zasubq1 |
| 73266 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73267 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73268 | 0, // zasubh1_then_zasubd0 |
| 73269 | 0, // zasubh1_then_zasubd1 |
| 73270 | 0, // zasubh1_then_zasubq0 |
| 73271 | 0, // zasubh1_then_zasubq1 |
| 73272 | 0, // zasubh1_then_zasubs0 |
| 73273 | 0, // zasubh1_then_zasubs1 |
| 73274 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73275 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73276 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73277 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73278 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73279 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73280 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73281 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73282 | 288, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73283 | 288, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73284 | 288, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73285 | 288, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73286 | 288, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73287 | 288, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73288 | 0, // dsub3_then_bsub |
| 73289 | 0, // dsub3_then_bsub_hi |
| 73290 | 0, // dsub3_then_hsub |
| 73291 | 0, // dsub3_then_hsub_hi |
| 73292 | 0, // dsub3_then_ssub |
| 73293 | 0, // dsub3_then_ssub_hi |
| 73294 | 288, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73295 | 288, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73296 | 288, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73297 | 288, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73298 | 288, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73299 | 288, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73300 | 0, // psub1_then_psub |
| 73301 | 288, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73302 | 0, // qsub3_then_dsub_hi |
| 73303 | 288, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73304 | 0, // x8sub_7_then_sub_32 |
| 73305 | 0, // x8sub_7_then_sub_32_hi |
| 73306 | 0, // x8sub_6_then_sub_32 |
| 73307 | 0, // x8sub_6_then_sub_32_hi |
| 73308 | 0, // x8sub_5_then_sub_32 |
| 73309 | 0, // x8sub_5_then_sub_32_hi |
| 73310 | 0, // x8sub_4_then_sub_32 |
| 73311 | 0, // x8sub_4_then_sub_32_hi |
| 73312 | 0, // x8sub_3_then_sub_32 |
| 73313 | 0, // x8sub_3_then_sub_32_hi |
| 73314 | 0, // x8sub_2_then_sub_32 |
| 73315 | 0, // x8sub_2_then_sub_32_hi |
| 73316 | 0, // x8sub_1_then_sub_32 |
| 73317 | 0, // x8sub_1_then_sub_32_hi |
| 73318 | 0, // subo64_then_sub_32 |
| 73319 | 0, // subo64_then_sub_32_hi |
| 73320 | 288, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73321 | 0, // zsub3_then_zsub_hi |
| 73322 | 288, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73323 | 0, // dsub0_dsub1 |
| 73324 | 0, // dsub0_dsub1_dsub2 |
| 73325 | 288, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73326 | 0, // dsub1_dsub2_dsub3 |
| 73327 | 0, // dsub2_dsub3 |
| 73328 | 288, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73329 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73330 | 288, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73331 | 0, // qsub0_qsub1 |
| 73332 | 0, // qsub0_qsub1_qsub2 |
| 73333 | 288, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73334 | 0, // qsub1_qsub2_qsub3 |
| 73335 | 0, // qsub2_qsub3 |
| 73336 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73337 | 0, // x8sub_0_x8sub_1 |
| 73338 | 0, // x8sub_2_x8sub_3 |
| 73339 | 0, // x8sub_4_x8sub_5 |
| 73340 | 0, // x8sub_6_x8sub_7 |
| 73341 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73342 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73343 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73344 | 0, // sub_32_subo64_then_sub_32 |
| 73345 | 288, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73346 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73347 | 288, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73348 | 288, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73349 | 0, // zsub0_zsub1_zsub2 |
| 73350 | 288, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 73351 | 0, // zsub1_zsub2_zsub3 |
| 73352 | 0, // zsub2_zsub3 |
| 73353 | 0, // zsub0_zsub2 |
| 73354 | 0, // zsub1_zsub3 |
| 73355 | }, |
| 73356 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73357 | 289, // bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73358 | 289, // bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73359 | 289, // dsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73360 | 0, // dsub0 |
| 73361 | 289, // dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73362 | 289, // dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73363 | 0, // dsub3 |
| 73364 | 289, // dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73365 | 289, // hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73366 | 289, // hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73367 | 0, // psub |
| 73368 | 0, // psub0 |
| 73369 | 0, // psub1 |
| 73370 | 0, // qsub0 |
| 73371 | 289, // qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73372 | 289, // qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73373 | 0, // qsub3 |
| 73374 | 289, // ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73375 | 289, // ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73376 | 0, // sub_32 |
| 73377 | 0, // sub_32_hi |
| 73378 | 0, // sube32 |
| 73379 | 0, // sube64 |
| 73380 | 0, // subo32 |
| 73381 | 0, // subo64 |
| 73382 | 0, // x8sub_0 |
| 73383 | 0, // x8sub_1 |
| 73384 | 0, // x8sub_2 |
| 73385 | 0, // x8sub_3 |
| 73386 | 0, // x8sub_4 |
| 73387 | 0, // x8sub_5 |
| 73388 | 0, // x8sub_6 |
| 73389 | 0, // x8sub_7 |
| 73390 | 0, // zasubb |
| 73391 | 0, // zasubd0 |
| 73392 | 0, // zasubd1 |
| 73393 | 0, // zasubh0 |
| 73394 | 0, // zasubh1 |
| 73395 | 0, // zasubq0 |
| 73396 | 0, // zasubq1 |
| 73397 | 0, // zasubs0 |
| 73398 | 0, // zasubs1 |
| 73399 | 289, // zsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73400 | 289, // zsub0 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73401 | 289, // zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73402 | 289, // zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73403 | 0, // zsub3 |
| 73404 | 289, // zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73405 | 0, // zasubd1_then_zasubq0 |
| 73406 | 0, // zasubd1_then_zasubq1 |
| 73407 | 0, // zasubs1_then_zasubd0 |
| 73408 | 0, // zasubs1_then_zasubd1 |
| 73409 | 0, // zasubs1_then_zasubq0 |
| 73410 | 0, // zasubs1_then_zasubq1 |
| 73411 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73412 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73413 | 0, // zasubh1_then_zasubd0 |
| 73414 | 0, // zasubh1_then_zasubd1 |
| 73415 | 0, // zasubh1_then_zasubq0 |
| 73416 | 0, // zasubh1_then_zasubq1 |
| 73417 | 0, // zasubh1_then_zasubs0 |
| 73418 | 0, // zasubh1_then_zasubs1 |
| 73419 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73420 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73421 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73422 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73423 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73424 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73425 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73426 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73427 | 289, // dsub1_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73428 | 289, // dsub1_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73429 | 289, // dsub1_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73430 | 289, // dsub1_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73431 | 289, // dsub1_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73432 | 289, // dsub1_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73433 | 0, // dsub3_then_bsub |
| 73434 | 0, // dsub3_then_bsub_hi |
| 73435 | 0, // dsub3_then_hsub |
| 73436 | 0, // dsub3_then_hsub_hi |
| 73437 | 0, // dsub3_then_ssub |
| 73438 | 0, // dsub3_then_ssub_hi |
| 73439 | 289, // dsub2_then_bsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73440 | 289, // dsub2_then_bsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73441 | 289, // dsub2_then_hsub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73442 | 289, // dsub2_then_hsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73443 | 289, // dsub2_then_ssub -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73444 | 289, // dsub2_then_ssub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73445 | 0, // psub1_then_psub |
| 73446 | 289, // qsub1_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73447 | 0, // qsub3_then_dsub_hi |
| 73448 | 289, // qsub2_then_dsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73449 | 0, // x8sub_7_then_sub_32 |
| 73450 | 0, // x8sub_7_then_sub_32_hi |
| 73451 | 0, // x8sub_6_then_sub_32 |
| 73452 | 0, // x8sub_6_then_sub_32_hi |
| 73453 | 0, // x8sub_5_then_sub_32 |
| 73454 | 0, // x8sub_5_then_sub_32_hi |
| 73455 | 0, // x8sub_4_then_sub_32 |
| 73456 | 0, // x8sub_4_then_sub_32_hi |
| 73457 | 0, // x8sub_3_then_sub_32 |
| 73458 | 0, // x8sub_3_then_sub_32_hi |
| 73459 | 0, // x8sub_2_then_sub_32 |
| 73460 | 0, // x8sub_2_then_sub_32_hi |
| 73461 | 0, // x8sub_1_then_sub_32 |
| 73462 | 0, // x8sub_1_then_sub_32_hi |
| 73463 | 0, // subo64_then_sub_32 |
| 73464 | 0, // subo64_then_sub_32_hi |
| 73465 | 289, // zsub1_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73466 | 0, // zsub3_then_zsub_hi |
| 73467 | 289, // zsub2_then_zsub_hi -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73468 | 0, // dsub0_dsub1 |
| 73469 | 0, // dsub0_dsub1_dsub2 |
| 73470 | 289, // dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73471 | 0, // dsub1_dsub2_dsub3 |
| 73472 | 0, // dsub2_dsub3 |
| 73473 | 289, // dsub_dsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73474 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73475 | 289, // dsub_dsub1_dsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73476 | 0, // qsub0_qsub1 |
| 73477 | 0, // qsub0_qsub1_qsub2 |
| 73478 | 289, // qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73479 | 0, // qsub1_qsub2_qsub3 |
| 73480 | 0, // qsub2_qsub3 |
| 73481 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73482 | 0, // x8sub_0_x8sub_1 |
| 73483 | 0, // x8sub_2_x8sub_3 |
| 73484 | 0, // x8sub_4_x8sub_5 |
| 73485 | 0, // x8sub_6_x8sub_7 |
| 73486 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73487 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73488 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73489 | 0, // sub_32_subo64_then_sub_32 |
| 73490 | 289, // zsub_qsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73491 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73492 | 289, // zsub_qsub1_qsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73493 | 289, // zsub0_zsub1 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73494 | 0, // zsub0_zsub1_zsub2 |
| 73495 | 289, // zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 73496 | 0, // zsub1_zsub2_zsub3 |
| 73497 | 0, // zsub2_zsub3 |
| 73498 | 0, // zsub0_zsub2 |
| 73499 | 0, // zsub1_zsub3 |
| 73500 | }, |
| 73501 | { // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73502 | 290, // bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73503 | 290, // bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73504 | 290, // dsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73505 | 0, // dsub0 |
| 73506 | 290, // dsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73507 | 290, // dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73508 | 0, // dsub3 |
| 73509 | 290, // dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73510 | 290, // hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73511 | 290, // hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73512 | 0, // psub |
| 73513 | 0, // psub0 |
| 73514 | 0, // psub1 |
| 73515 | 0, // qsub0 |
| 73516 | 290, // qsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73517 | 290, // qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73518 | 0, // qsub3 |
| 73519 | 290, // ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73520 | 290, // ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73521 | 0, // sub_32 |
| 73522 | 0, // sub_32_hi |
| 73523 | 0, // sube32 |
| 73524 | 0, // sube64 |
| 73525 | 0, // subo32 |
| 73526 | 0, // subo64 |
| 73527 | 0, // x8sub_0 |
| 73528 | 0, // x8sub_1 |
| 73529 | 0, // x8sub_2 |
| 73530 | 0, // x8sub_3 |
| 73531 | 0, // x8sub_4 |
| 73532 | 0, // x8sub_5 |
| 73533 | 0, // x8sub_6 |
| 73534 | 0, // x8sub_7 |
| 73535 | 0, // zasubb |
| 73536 | 0, // zasubd0 |
| 73537 | 0, // zasubd1 |
| 73538 | 0, // zasubh0 |
| 73539 | 0, // zasubh1 |
| 73540 | 0, // zasubq0 |
| 73541 | 0, // zasubq1 |
| 73542 | 0, // zasubs0 |
| 73543 | 0, // zasubs1 |
| 73544 | 290, // zsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73545 | 290, // zsub0 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73546 | 290, // zsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73547 | 290, // zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73548 | 0, // zsub3 |
| 73549 | 290, // zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73550 | 0, // zasubd1_then_zasubq0 |
| 73551 | 0, // zasubd1_then_zasubq1 |
| 73552 | 0, // zasubs1_then_zasubd0 |
| 73553 | 0, // zasubs1_then_zasubd1 |
| 73554 | 0, // zasubs1_then_zasubq0 |
| 73555 | 0, // zasubs1_then_zasubq1 |
| 73556 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73557 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73558 | 0, // zasubh1_then_zasubd0 |
| 73559 | 0, // zasubh1_then_zasubd1 |
| 73560 | 0, // zasubh1_then_zasubq0 |
| 73561 | 0, // zasubh1_then_zasubq1 |
| 73562 | 0, // zasubh1_then_zasubs0 |
| 73563 | 0, // zasubh1_then_zasubs1 |
| 73564 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73565 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73566 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73567 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73568 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73569 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73570 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73571 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73572 | 290, // dsub1_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73573 | 290, // dsub1_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73574 | 290, // dsub1_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73575 | 290, // dsub1_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73576 | 290, // dsub1_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73577 | 290, // dsub1_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73578 | 0, // dsub3_then_bsub |
| 73579 | 0, // dsub3_then_bsub_hi |
| 73580 | 0, // dsub3_then_hsub |
| 73581 | 0, // dsub3_then_hsub_hi |
| 73582 | 0, // dsub3_then_ssub |
| 73583 | 0, // dsub3_then_ssub_hi |
| 73584 | 290, // dsub2_then_bsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73585 | 290, // dsub2_then_bsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73586 | 290, // dsub2_then_hsub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73587 | 290, // dsub2_then_hsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73588 | 290, // dsub2_then_ssub -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73589 | 290, // dsub2_then_ssub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73590 | 0, // psub1_then_psub |
| 73591 | 290, // qsub1_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73592 | 0, // qsub3_then_dsub_hi |
| 73593 | 290, // qsub2_then_dsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73594 | 0, // x8sub_7_then_sub_32 |
| 73595 | 0, // x8sub_7_then_sub_32_hi |
| 73596 | 0, // x8sub_6_then_sub_32 |
| 73597 | 0, // x8sub_6_then_sub_32_hi |
| 73598 | 0, // x8sub_5_then_sub_32 |
| 73599 | 0, // x8sub_5_then_sub_32_hi |
| 73600 | 0, // x8sub_4_then_sub_32 |
| 73601 | 0, // x8sub_4_then_sub_32_hi |
| 73602 | 0, // x8sub_3_then_sub_32 |
| 73603 | 0, // x8sub_3_then_sub_32_hi |
| 73604 | 0, // x8sub_2_then_sub_32 |
| 73605 | 0, // x8sub_2_then_sub_32_hi |
| 73606 | 0, // x8sub_1_then_sub_32 |
| 73607 | 0, // x8sub_1_then_sub_32_hi |
| 73608 | 0, // subo64_then_sub_32 |
| 73609 | 0, // subo64_then_sub_32_hi |
| 73610 | 290, // zsub1_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73611 | 0, // zsub3_then_zsub_hi |
| 73612 | 290, // zsub2_then_zsub_hi -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73613 | 0, // dsub0_dsub1 |
| 73614 | 0, // dsub0_dsub1_dsub2 |
| 73615 | 290, // dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73616 | 0, // dsub1_dsub2_dsub3 |
| 73617 | 0, // dsub2_dsub3 |
| 73618 | 290, // dsub_dsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73619 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73620 | 290, // dsub_dsub1_dsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73621 | 0, // qsub0_qsub1 |
| 73622 | 0, // qsub0_qsub1_qsub2 |
| 73623 | 290, // qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73624 | 0, // qsub1_qsub2_qsub3 |
| 73625 | 0, // qsub2_qsub3 |
| 73626 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73627 | 0, // x8sub_0_x8sub_1 |
| 73628 | 0, // x8sub_2_x8sub_3 |
| 73629 | 0, // x8sub_4_x8sub_5 |
| 73630 | 0, // x8sub_6_x8sub_7 |
| 73631 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73632 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73633 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73634 | 0, // sub_32_subo64_then_sub_32 |
| 73635 | 290, // zsub_qsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73636 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73637 | 290, // zsub_qsub1_qsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73638 | 290, // zsub0_zsub1 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73639 | 0, // zsub0_zsub1_zsub2 |
| 73640 | 290, // zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 73641 | 0, // zsub1_zsub2_zsub3 |
| 73642 | 0, // zsub2_zsub3 |
| 73643 | 0, // zsub0_zsub2 |
| 73644 | 0, // zsub1_zsub3 |
| 73645 | }, |
| 73646 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73647 | 291, // bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73648 | 291, // bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73649 | 291, // dsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73650 | 0, // dsub0 |
| 73651 | 291, // dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73652 | 291, // dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73653 | 0, // dsub3 |
| 73654 | 291, // dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73655 | 291, // hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73656 | 291, // hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73657 | 0, // psub |
| 73658 | 0, // psub0 |
| 73659 | 0, // psub1 |
| 73660 | 0, // qsub0 |
| 73661 | 291, // qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73662 | 291, // qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73663 | 0, // qsub3 |
| 73664 | 291, // ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73665 | 291, // ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73666 | 0, // sub_32 |
| 73667 | 0, // sub_32_hi |
| 73668 | 0, // sube32 |
| 73669 | 0, // sube64 |
| 73670 | 0, // subo32 |
| 73671 | 0, // subo64 |
| 73672 | 0, // x8sub_0 |
| 73673 | 0, // x8sub_1 |
| 73674 | 0, // x8sub_2 |
| 73675 | 0, // x8sub_3 |
| 73676 | 0, // x8sub_4 |
| 73677 | 0, // x8sub_5 |
| 73678 | 0, // x8sub_6 |
| 73679 | 0, // x8sub_7 |
| 73680 | 0, // zasubb |
| 73681 | 0, // zasubd0 |
| 73682 | 0, // zasubd1 |
| 73683 | 0, // zasubh0 |
| 73684 | 0, // zasubh1 |
| 73685 | 0, // zasubq0 |
| 73686 | 0, // zasubq1 |
| 73687 | 0, // zasubs0 |
| 73688 | 0, // zasubs1 |
| 73689 | 291, // zsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73690 | 291, // zsub0 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73691 | 291, // zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73692 | 291, // zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73693 | 0, // zsub3 |
| 73694 | 291, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73695 | 0, // zasubd1_then_zasubq0 |
| 73696 | 0, // zasubd1_then_zasubq1 |
| 73697 | 0, // zasubs1_then_zasubd0 |
| 73698 | 0, // zasubs1_then_zasubd1 |
| 73699 | 0, // zasubs1_then_zasubq0 |
| 73700 | 0, // zasubs1_then_zasubq1 |
| 73701 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73702 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73703 | 0, // zasubh1_then_zasubd0 |
| 73704 | 0, // zasubh1_then_zasubd1 |
| 73705 | 0, // zasubh1_then_zasubq0 |
| 73706 | 0, // zasubh1_then_zasubq1 |
| 73707 | 0, // zasubh1_then_zasubs0 |
| 73708 | 0, // zasubh1_then_zasubs1 |
| 73709 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73710 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73711 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73712 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73713 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73714 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73715 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73716 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73717 | 291, // dsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73718 | 291, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73719 | 291, // dsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73720 | 291, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73721 | 291, // dsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73722 | 291, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73723 | 0, // dsub3_then_bsub |
| 73724 | 0, // dsub3_then_bsub_hi |
| 73725 | 0, // dsub3_then_hsub |
| 73726 | 0, // dsub3_then_hsub_hi |
| 73727 | 0, // dsub3_then_ssub |
| 73728 | 0, // dsub3_then_ssub_hi |
| 73729 | 291, // dsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73730 | 291, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73731 | 291, // dsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73732 | 291, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73733 | 291, // dsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73734 | 291, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73735 | 0, // psub1_then_psub |
| 73736 | 291, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73737 | 0, // qsub3_then_dsub_hi |
| 73738 | 291, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73739 | 0, // x8sub_7_then_sub_32 |
| 73740 | 0, // x8sub_7_then_sub_32_hi |
| 73741 | 0, // x8sub_6_then_sub_32 |
| 73742 | 0, // x8sub_6_then_sub_32_hi |
| 73743 | 0, // x8sub_5_then_sub_32 |
| 73744 | 0, // x8sub_5_then_sub_32_hi |
| 73745 | 0, // x8sub_4_then_sub_32 |
| 73746 | 0, // x8sub_4_then_sub_32_hi |
| 73747 | 0, // x8sub_3_then_sub_32 |
| 73748 | 0, // x8sub_3_then_sub_32_hi |
| 73749 | 0, // x8sub_2_then_sub_32 |
| 73750 | 0, // x8sub_2_then_sub_32_hi |
| 73751 | 0, // x8sub_1_then_sub_32 |
| 73752 | 0, // x8sub_1_then_sub_32_hi |
| 73753 | 0, // subo64_then_sub_32 |
| 73754 | 0, // subo64_then_sub_32_hi |
| 73755 | 291, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73756 | 0, // zsub3_then_zsub_hi |
| 73757 | 291, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73758 | 0, // dsub0_dsub1 |
| 73759 | 0, // dsub0_dsub1_dsub2 |
| 73760 | 291, // dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73761 | 0, // dsub1_dsub2_dsub3 |
| 73762 | 0, // dsub2_dsub3 |
| 73763 | 291, // dsub_dsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73764 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73765 | 291, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73766 | 0, // qsub0_qsub1 |
| 73767 | 0, // qsub0_qsub1_qsub2 |
| 73768 | 291, // qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73769 | 0, // qsub1_qsub2_qsub3 |
| 73770 | 0, // qsub2_qsub3 |
| 73771 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73772 | 0, // x8sub_0_x8sub_1 |
| 73773 | 0, // x8sub_2_x8sub_3 |
| 73774 | 0, // x8sub_4_x8sub_5 |
| 73775 | 0, // x8sub_6_x8sub_7 |
| 73776 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73777 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73778 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73779 | 0, // sub_32_subo64_then_sub_32 |
| 73780 | 291, // zsub_qsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73781 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73782 | 291, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73783 | 291, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73784 | 0, // zsub0_zsub1_zsub2 |
| 73785 | 291, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 73786 | 0, // zsub1_zsub2_zsub3 |
| 73787 | 0, // zsub2_zsub3 |
| 73788 | 0, // zsub0_zsub2 |
| 73789 | 0, // zsub1_zsub3 |
| 73790 | }, |
| 73791 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73792 | 292, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73793 | 292, // bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73794 | 292, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73795 | 0, // dsub0 |
| 73796 | 292, // dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73797 | 292, // dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73798 | 0, // dsub3 |
| 73799 | 292, // dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73800 | 292, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73801 | 292, // hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73802 | 0, // psub |
| 73803 | 0, // psub0 |
| 73804 | 0, // psub1 |
| 73805 | 0, // qsub0 |
| 73806 | 292, // qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73807 | 292, // qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73808 | 0, // qsub3 |
| 73809 | 292, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73810 | 292, // ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73811 | 0, // sub_32 |
| 73812 | 0, // sub_32_hi |
| 73813 | 0, // sube32 |
| 73814 | 0, // sube64 |
| 73815 | 0, // subo32 |
| 73816 | 0, // subo64 |
| 73817 | 0, // x8sub_0 |
| 73818 | 0, // x8sub_1 |
| 73819 | 0, // x8sub_2 |
| 73820 | 0, // x8sub_3 |
| 73821 | 0, // x8sub_4 |
| 73822 | 0, // x8sub_5 |
| 73823 | 0, // x8sub_6 |
| 73824 | 0, // x8sub_7 |
| 73825 | 0, // zasubb |
| 73826 | 0, // zasubd0 |
| 73827 | 0, // zasubd1 |
| 73828 | 0, // zasubh0 |
| 73829 | 0, // zasubh1 |
| 73830 | 0, // zasubq0 |
| 73831 | 0, // zasubq1 |
| 73832 | 0, // zasubs0 |
| 73833 | 0, // zasubs1 |
| 73834 | 292, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73835 | 292, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73836 | 292, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73837 | 292, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73838 | 0, // zsub3 |
| 73839 | 292, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73840 | 0, // zasubd1_then_zasubq0 |
| 73841 | 0, // zasubd1_then_zasubq1 |
| 73842 | 0, // zasubs1_then_zasubd0 |
| 73843 | 0, // zasubs1_then_zasubd1 |
| 73844 | 0, // zasubs1_then_zasubq0 |
| 73845 | 0, // zasubs1_then_zasubq1 |
| 73846 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73847 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73848 | 0, // zasubh1_then_zasubd0 |
| 73849 | 0, // zasubh1_then_zasubd1 |
| 73850 | 0, // zasubh1_then_zasubq0 |
| 73851 | 0, // zasubh1_then_zasubq1 |
| 73852 | 0, // zasubh1_then_zasubs0 |
| 73853 | 0, // zasubh1_then_zasubs1 |
| 73854 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 73855 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 73856 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 73857 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 73858 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 73859 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 73860 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 73861 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 73862 | 292, // dsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73863 | 292, // dsub1_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73864 | 292, // dsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73865 | 292, // dsub1_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73866 | 292, // dsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73867 | 292, // dsub1_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73868 | 0, // dsub3_then_bsub |
| 73869 | 0, // dsub3_then_bsub_hi |
| 73870 | 0, // dsub3_then_hsub |
| 73871 | 0, // dsub3_then_hsub_hi |
| 73872 | 0, // dsub3_then_ssub |
| 73873 | 0, // dsub3_then_ssub_hi |
| 73874 | 292, // dsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73875 | 292, // dsub2_then_bsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73876 | 292, // dsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73877 | 292, // dsub2_then_hsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73878 | 292, // dsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73879 | 292, // dsub2_then_ssub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73880 | 0, // psub1_then_psub |
| 73881 | 292, // qsub1_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73882 | 0, // qsub3_then_dsub_hi |
| 73883 | 292, // qsub2_then_dsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73884 | 0, // x8sub_7_then_sub_32 |
| 73885 | 0, // x8sub_7_then_sub_32_hi |
| 73886 | 0, // x8sub_6_then_sub_32 |
| 73887 | 0, // x8sub_6_then_sub_32_hi |
| 73888 | 0, // x8sub_5_then_sub_32 |
| 73889 | 0, // x8sub_5_then_sub_32_hi |
| 73890 | 0, // x8sub_4_then_sub_32 |
| 73891 | 0, // x8sub_4_then_sub_32_hi |
| 73892 | 0, // x8sub_3_then_sub_32 |
| 73893 | 0, // x8sub_3_then_sub_32_hi |
| 73894 | 0, // x8sub_2_then_sub_32 |
| 73895 | 0, // x8sub_2_then_sub_32_hi |
| 73896 | 0, // x8sub_1_then_sub_32 |
| 73897 | 0, // x8sub_1_then_sub_32_hi |
| 73898 | 0, // subo64_then_sub_32 |
| 73899 | 0, // subo64_then_sub_32_hi |
| 73900 | 292, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73901 | 0, // zsub3_then_zsub_hi |
| 73902 | 292, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73903 | 0, // dsub0_dsub1 |
| 73904 | 0, // dsub0_dsub1_dsub2 |
| 73905 | 292, // dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73906 | 0, // dsub1_dsub2_dsub3 |
| 73907 | 0, // dsub2_dsub3 |
| 73908 | 292, // dsub_dsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73909 | 0, // dsub_dsub1_dsub2_dsub3 |
| 73910 | 292, // dsub_dsub1_dsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73911 | 0, // qsub0_qsub1 |
| 73912 | 0, // qsub0_qsub1_qsub2 |
| 73913 | 292, // qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73914 | 0, // qsub1_qsub2_qsub3 |
| 73915 | 0, // qsub2_qsub3 |
| 73916 | 0, // sub_32_x8sub_1_then_sub_32 |
| 73917 | 0, // x8sub_0_x8sub_1 |
| 73918 | 0, // x8sub_2_x8sub_3 |
| 73919 | 0, // x8sub_4_x8sub_5 |
| 73920 | 0, // x8sub_6_x8sub_7 |
| 73921 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 73922 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 73923 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 73924 | 0, // sub_32_subo64_then_sub_32 |
| 73925 | 292, // zsub_qsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73926 | 0, // zsub_qsub1_qsub2_qsub3 |
| 73927 | 292, // zsub_qsub1_qsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73928 | 292, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73929 | 0, // zsub0_zsub1_zsub2 |
| 73930 | 292, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 73931 | 0, // zsub1_zsub2_zsub3 |
| 73932 | 0, // zsub2_zsub3 |
| 73933 | 0, // zsub0_zsub2 |
| 73934 | 0, // zsub1_zsub3 |
| 73935 | }, |
| 73936 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73937 | 293, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73938 | 293, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73939 | 293, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73940 | 0, // dsub0 |
| 73941 | 293, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73942 | 293, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73943 | 0, // dsub3 |
| 73944 | 293, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73945 | 293, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73946 | 293, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73947 | 0, // psub |
| 73948 | 0, // psub0 |
| 73949 | 0, // psub1 |
| 73950 | 0, // qsub0 |
| 73951 | 293, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73952 | 293, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73953 | 0, // qsub3 |
| 73954 | 293, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73955 | 293, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73956 | 0, // sub_32 |
| 73957 | 0, // sub_32_hi |
| 73958 | 0, // sube32 |
| 73959 | 0, // sube64 |
| 73960 | 0, // subo32 |
| 73961 | 0, // subo64 |
| 73962 | 0, // x8sub_0 |
| 73963 | 0, // x8sub_1 |
| 73964 | 0, // x8sub_2 |
| 73965 | 0, // x8sub_3 |
| 73966 | 0, // x8sub_4 |
| 73967 | 0, // x8sub_5 |
| 73968 | 0, // x8sub_6 |
| 73969 | 0, // x8sub_7 |
| 73970 | 0, // zasubb |
| 73971 | 0, // zasubd0 |
| 73972 | 0, // zasubd1 |
| 73973 | 0, // zasubh0 |
| 73974 | 0, // zasubh1 |
| 73975 | 0, // zasubq0 |
| 73976 | 0, // zasubq1 |
| 73977 | 0, // zasubs0 |
| 73978 | 0, // zasubs1 |
| 73979 | 293, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73980 | 293, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73981 | 293, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73982 | 293, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73983 | 0, // zsub3 |
| 73984 | 293, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 73985 | 0, // zasubd1_then_zasubq0 |
| 73986 | 0, // zasubd1_then_zasubq1 |
| 73987 | 0, // zasubs1_then_zasubd0 |
| 73988 | 0, // zasubs1_then_zasubd1 |
| 73989 | 0, // zasubs1_then_zasubq0 |
| 73990 | 0, // zasubs1_then_zasubq1 |
| 73991 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 73992 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 73993 | 0, // zasubh1_then_zasubd0 |
| 73994 | 0, // zasubh1_then_zasubd1 |
| 73995 | 0, // zasubh1_then_zasubq0 |
| 73996 | 0, // zasubh1_then_zasubq1 |
| 73997 | 0, // zasubh1_then_zasubs0 |
| 73998 | 0, // zasubh1_then_zasubs1 |
| 73999 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74000 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74001 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74002 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74003 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74004 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74005 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74006 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74007 | 293, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74008 | 293, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74009 | 293, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74010 | 293, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74011 | 293, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74012 | 293, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74013 | 0, // dsub3_then_bsub |
| 74014 | 0, // dsub3_then_bsub_hi |
| 74015 | 0, // dsub3_then_hsub |
| 74016 | 0, // dsub3_then_hsub_hi |
| 74017 | 0, // dsub3_then_ssub |
| 74018 | 0, // dsub3_then_ssub_hi |
| 74019 | 293, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74020 | 293, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74021 | 293, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74022 | 293, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74023 | 293, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74024 | 293, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74025 | 0, // psub1_then_psub |
| 74026 | 293, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74027 | 0, // qsub3_then_dsub_hi |
| 74028 | 293, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74029 | 0, // x8sub_7_then_sub_32 |
| 74030 | 0, // x8sub_7_then_sub_32_hi |
| 74031 | 0, // x8sub_6_then_sub_32 |
| 74032 | 0, // x8sub_6_then_sub_32_hi |
| 74033 | 0, // x8sub_5_then_sub_32 |
| 74034 | 0, // x8sub_5_then_sub_32_hi |
| 74035 | 0, // x8sub_4_then_sub_32 |
| 74036 | 0, // x8sub_4_then_sub_32_hi |
| 74037 | 0, // x8sub_3_then_sub_32 |
| 74038 | 0, // x8sub_3_then_sub_32_hi |
| 74039 | 0, // x8sub_2_then_sub_32 |
| 74040 | 0, // x8sub_2_then_sub_32_hi |
| 74041 | 0, // x8sub_1_then_sub_32 |
| 74042 | 0, // x8sub_1_then_sub_32_hi |
| 74043 | 0, // subo64_then_sub_32 |
| 74044 | 0, // subo64_then_sub_32_hi |
| 74045 | 293, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74046 | 0, // zsub3_then_zsub_hi |
| 74047 | 293, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74048 | 0, // dsub0_dsub1 |
| 74049 | 0, // dsub0_dsub1_dsub2 |
| 74050 | 293, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74051 | 0, // dsub1_dsub2_dsub3 |
| 74052 | 0, // dsub2_dsub3 |
| 74053 | 293, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74054 | 0, // dsub_dsub1_dsub2_dsub3 |
| 74055 | 293, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74056 | 0, // qsub0_qsub1 |
| 74057 | 0, // qsub0_qsub1_qsub2 |
| 74058 | 293, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74059 | 0, // qsub1_qsub2_qsub3 |
| 74060 | 0, // qsub2_qsub3 |
| 74061 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74062 | 0, // x8sub_0_x8sub_1 |
| 74063 | 0, // x8sub_2_x8sub_3 |
| 74064 | 0, // x8sub_4_x8sub_5 |
| 74065 | 0, // x8sub_6_x8sub_7 |
| 74066 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74067 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74068 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74069 | 0, // sub_32_subo64_then_sub_32 |
| 74070 | 293, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74071 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74072 | 293, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74073 | 293, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74074 | 0, // zsub0_zsub1_zsub2 |
| 74075 | 293, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 74076 | 0, // zsub1_zsub2_zsub3 |
| 74077 | 0, // zsub2_zsub3 |
| 74078 | 0, // zsub0_zsub2 |
| 74079 | 0, // zsub1_zsub3 |
| 74080 | }, |
| 74081 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74082 | 294, // bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74083 | 294, // bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74084 | 294, // dsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74085 | 0, // dsub0 |
| 74086 | 294, // dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74087 | 294, // dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74088 | 0, // dsub3 |
| 74089 | 294, // dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74090 | 294, // hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74091 | 294, // hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74092 | 0, // psub |
| 74093 | 0, // psub0 |
| 74094 | 0, // psub1 |
| 74095 | 0, // qsub0 |
| 74096 | 294, // qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74097 | 294, // qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74098 | 0, // qsub3 |
| 74099 | 294, // ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74100 | 294, // ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74101 | 0, // sub_32 |
| 74102 | 0, // sub_32_hi |
| 74103 | 0, // sube32 |
| 74104 | 0, // sube64 |
| 74105 | 0, // subo32 |
| 74106 | 0, // subo64 |
| 74107 | 0, // x8sub_0 |
| 74108 | 0, // x8sub_1 |
| 74109 | 0, // x8sub_2 |
| 74110 | 0, // x8sub_3 |
| 74111 | 0, // x8sub_4 |
| 74112 | 0, // x8sub_5 |
| 74113 | 0, // x8sub_6 |
| 74114 | 0, // x8sub_7 |
| 74115 | 0, // zasubb |
| 74116 | 0, // zasubd0 |
| 74117 | 0, // zasubd1 |
| 74118 | 0, // zasubh0 |
| 74119 | 0, // zasubh1 |
| 74120 | 0, // zasubq0 |
| 74121 | 0, // zasubq1 |
| 74122 | 0, // zasubs0 |
| 74123 | 0, // zasubs1 |
| 74124 | 294, // zsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74125 | 294, // zsub0 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74126 | 294, // zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74127 | 294, // zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74128 | 0, // zsub3 |
| 74129 | 294, // zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74130 | 0, // zasubd1_then_zasubq0 |
| 74131 | 0, // zasubd1_then_zasubq1 |
| 74132 | 0, // zasubs1_then_zasubd0 |
| 74133 | 0, // zasubs1_then_zasubd1 |
| 74134 | 0, // zasubs1_then_zasubq0 |
| 74135 | 0, // zasubs1_then_zasubq1 |
| 74136 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74137 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74138 | 0, // zasubh1_then_zasubd0 |
| 74139 | 0, // zasubh1_then_zasubd1 |
| 74140 | 0, // zasubh1_then_zasubq0 |
| 74141 | 0, // zasubh1_then_zasubq1 |
| 74142 | 0, // zasubh1_then_zasubs0 |
| 74143 | 0, // zasubh1_then_zasubs1 |
| 74144 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74145 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74146 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74147 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74148 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74149 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74150 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74151 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74152 | 294, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74153 | 294, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74154 | 294, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74155 | 294, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74156 | 294, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74157 | 294, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74158 | 0, // dsub3_then_bsub |
| 74159 | 0, // dsub3_then_bsub_hi |
| 74160 | 0, // dsub3_then_hsub |
| 74161 | 0, // dsub3_then_hsub_hi |
| 74162 | 0, // dsub3_then_ssub |
| 74163 | 0, // dsub3_then_ssub_hi |
| 74164 | 294, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74165 | 294, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74166 | 294, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74167 | 294, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74168 | 294, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74169 | 294, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74170 | 0, // psub1_then_psub |
| 74171 | 294, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74172 | 0, // qsub3_then_dsub_hi |
| 74173 | 294, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74174 | 0, // x8sub_7_then_sub_32 |
| 74175 | 0, // x8sub_7_then_sub_32_hi |
| 74176 | 0, // x8sub_6_then_sub_32 |
| 74177 | 0, // x8sub_6_then_sub_32_hi |
| 74178 | 0, // x8sub_5_then_sub_32 |
| 74179 | 0, // x8sub_5_then_sub_32_hi |
| 74180 | 0, // x8sub_4_then_sub_32 |
| 74181 | 0, // x8sub_4_then_sub_32_hi |
| 74182 | 0, // x8sub_3_then_sub_32 |
| 74183 | 0, // x8sub_3_then_sub_32_hi |
| 74184 | 0, // x8sub_2_then_sub_32 |
| 74185 | 0, // x8sub_2_then_sub_32_hi |
| 74186 | 0, // x8sub_1_then_sub_32 |
| 74187 | 0, // x8sub_1_then_sub_32_hi |
| 74188 | 0, // subo64_then_sub_32 |
| 74189 | 0, // subo64_then_sub_32_hi |
| 74190 | 294, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74191 | 0, // zsub3_then_zsub_hi |
| 74192 | 294, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74193 | 0, // dsub0_dsub1 |
| 74194 | 0, // dsub0_dsub1_dsub2 |
| 74195 | 294, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74196 | 0, // dsub1_dsub2_dsub3 |
| 74197 | 0, // dsub2_dsub3 |
| 74198 | 294, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74199 | 0, // dsub_dsub1_dsub2_dsub3 |
| 74200 | 294, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74201 | 0, // qsub0_qsub1 |
| 74202 | 0, // qsub0_qsub1_qsub2 |
| 74203 | 294, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74204 | 0, // qsub1_qsub2_qsub3 |
| 74205 | 0, // qsub2_qsub3 |
| 74206 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74207 | 0, // x8sub_0_x8sub_1 |
| 74208 | 0, // x8sub_2_x8sub_3 |
| 74209 | 0, // x8sub_4_x8sub_5 |
| 74210 | 0, // x8sub_6_x8sub_7 |
| 74211 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74212 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74213 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74214 | 0, // sub_32_subo64_then_sub_32 |
| 74215 | 294, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74216 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74217 | 294, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74218 | 294, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74219 | 0, // zsub0_zsub1_zsub2 |
| 74220 | 294, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 74221 | 0, // zsub1_zsub2_zsub3 |
| 74222 | 0, // zsub2_zsub3 |
| 74223 | 0, // zsub0_zsub2 |
| 74224 | 0, // zsub1_zsub3 |
| 74225 | }, |
| 74226 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74227 | 295, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74228 | 295, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74229 | 295, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74230 | 0, // dsub0 |
| 74231 | 295, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74232 | 295, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74233 | 0, // dsub3 |
| 74234 | 295, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74235 | 295, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74236 | 295, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74237 | 0, // psub |
| 74238 | 0, // psub0 |
| 74239 | 0, // psub1 |
| 74240 | 0, // qsub0 |
| 74241 | 295, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74242 | 295, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74243 | 0, // qsub3 |
| 74244 | 295, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74245 | 295, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74246 | 0, // sub_32 |
| 74247 | 0, // sub_32_hi |
| 74248 | 0, // sube32 |
| 74249 | 0, // sube64 |
| 74250 | 0, // subo32 |
| 74251 | 0, // subo64 |
| 74252 | 0, // x8sub_0 |
| 74253 | 0, // x8sub_1 |
| 74254 | 0, // x8sub_2 |
| 74255 | 0, // x8sub_3 |
| 74256 | 0, // x8sub_4 |
| 74257 | 0, // x8sub_5 |
| 74258 | 0, // x8sub_6 |
| 74259 | 0, // x8sub_7 |
| 74260 | 0, // zasubb |
| 74261 | 0, // zasubd0 |
| 74262 | 0, // zasubd1 |
| 74263 | 0, // zasubh0 |
| 74264 | 0, // zasubh1 |
| 74265 | 0, // zasubq0 |
| 74266 | 0, // zasubq1 |
| 74267 | 0, // zasubs0 |
| 74268 | 0, // zasubs1 |
| 74269 | 295, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74270 | 295, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74271 | 295, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74272 | 295, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74273 | 0, // zsub3 |
| 74274 | 295, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74275 | 0, // zasubd1_then_zasubq0 |
| 74276 | 0, // zasubd1_then_zasubq1 |
| 74277 | 0, // zasubs1_then_zasubd0 |
| 74278 | 0, // zasubs1_then_zasubd1 |
| 74279 | 0, // zasubs1_then_zasubq0 |
| 74280 | 0, // zasubs1_then_zasubq1 |
| 74281 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74282 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74283 | 0, // zasubh1_then_zasubd0 |
| 74284 | 0, // zasubh1_then_zasubd1 |
| 74285 | 0, // zasubh1_then_zasubq0 |
| 74286 | 0, // zasubh1_then_zasubq1 |
| 74287 | 0, // zasubh1_then_zasubs0 |
| 74288 | 0, // zasubh1_then_zasubs1 |
| 74289 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74290 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74291 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74292 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74293 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74294 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74295 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74296 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74297 | 295, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74298 | 295, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74299 | 295, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74300 | 295, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74301 | 295, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74302 | 295, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74303 | 0, // dsub3_then_bsub |
| 74304 | 0, // dsub3_then_bsub_hi |
| 74305 | 0, // dsub3_then_hsub |
| 74306 | 0, // dsub3_then_hsub_hi |
| 74307 | 0, // dsub3_then_ssub |
| 74308 | 0, // dsub3_then_ssub_hi |
| 74309 | 295, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74310 | 295, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74311 | 295, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74312 | 295, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74313 | 295, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74314 | 295, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74315 | 0, // psub1_then_psub |
| 74316 | 295, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74317 | 0, // qsub3_then_dsub_hi |
| 74318 | 295, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74319 | 0, // x8sub_7_then_sub_32 |
| 74320 | 0, // x8sub_7_then_sub_32_hi |
| 74321 | 0, // x8sub_6_then_sub_32 |
| 74322 | 0, // x8sub_6_then_sub_32_hi |
| 74323 | 0, // x8sub_5_then_sub_32 |
| 74324 | 0, // x8sub_5_then_sub_32_hi |
| 74325 | 0, // x8sub_4_then_sub_32 |
| 74326 | 0, // x8sub_4_then_sub_32_hi |
| 74327 | 0, // x8sub_3_then_sub_32 |
| 74328 | 0, // x8sub_3_then_sub_32_hi |
| 74329 | 0, // x8sub_2_then_sub_32 |
| 74330 | 0, // x8sub_2_then_sub_32_hi |
| 74331 | 0, // x8sub_1_then_sub_32 |
| 74332 | 0, // x8sub_1_then_sub_32_hi |
| 74333 | 0, // subo64_then_sub_32 |
| 74334 | 0, // subo64_then_sub_32_hi |
| 74335 | 295, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74336 | 0, // zsub3_then_zsub_hi |
| 74337 | 295, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74338 | 0, // dsub0_dsub1 |
| 74339 | 0, // dsub0_dsub1_dsub2 |
| 74340 | 295, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74341 | 0, // dsub1_dsub2_dsub3 |
| 74342 | 0, // dsub2_dsub3 |
| 74343 | 295, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74344 | 0, // dsub_dsub1_dsub2_dsub3 |
| 74345 | 295, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74346 | 0, // qsub0_qsub1 |
| 74347 | 0, // qsub0_qsub1_qsub2 |
| 74348 | 295, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74349 | 0, // qsub1_qsub2_qsub3 |
| 74350 | 0, // qsub2_qsub3 |
| 74351 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74352 | 0, // x8sub_0_x8sub_1 |
| 74353 | 0, // x8sub_2_x8sub_3 |
| 74354 | 0, // x8sub_4_x8sub_5 |
| 74355 | 0, // x8sub_6_x8sub_7 |
| 74356 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74357 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74358 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74359 | 0, // sub_32_subo64_then_sub_32 |
| 74360 | 295, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74361 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74362 | 295, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74363 | 295, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74364 | 0, // zsub0_zsub1_zsub2 |
| 74365 | 295, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 74366 | 0, // zsub1_zsub2_zsub3 |
| 74367 | 0, // zsub2_zsub3 |
| 74368 | 0, // zsub0_zsub2 |
| 74369 | 0, // zsub1_zsub3 |
| 74370 | }, |
| 74371 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74372 | 296, // bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74373 | 296, // bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74374 | 296, // dsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74375 | 0, // dsub0 |
| 74376 | 296, // dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74377 | 296, // dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74378 | 0, // dsub3 |
| 74379 | 296, // dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74380 | 296, // hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74381 | 296, // hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74382 | 0, // psub |
| 74383 | 0, // psub0 |
| 74384 | 0, // psub1 |
| 74385 | 0, // qsub0 |
| 74386 | 296, // qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74387 | 296, // qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74388 | 0, // qsub3 |
| 74389 | 296, // ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74390 | 296, // ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74391 | 0, // sub_32 |
| 74392 | 0, // sub_32_hi |
| 74393 | 0, // sube32 |
| 74394 | 0, // sube64 |
| 74395 | 0, // subo32 |
| 74396 | 0, // subo64 |
| 74397 | 0, // x8sub_0 |
| 74398 | 0, // x8sub_1 |
| 74399 | 0, // x8sub_2 |
| 74400 | 0, // x8sub_3 |
| 74401 | 0, // x8sub_4 |
| 74402 | 0, // x8sub_5 |
| 74403 | 0, // x8sub_6 |
| 74404 | 0, // x8sub_7 |
| 74405 | 0, // zasubb |
| 74406 | 0, // zasubd0 |
| 74407 | 0, // zasubd1 |
| 74408 | 0, // zasubh0 |
| 74409 | 0, // zasubh1 |
| 74410 | 0, // zasubq0 |
| 74411 | 0, // zasubq1 |
| 74412 | 0, // zasubs0 |
| 74413 | 0, // zasubs1 |
| 74414 | 296, // zsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74415 | 296, // zsub0 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74416 | 296, // zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74417 | 296, // zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74418 | 0, // zsub3 |
| 74419 | 296, // zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74420 | 0, // zasubd1_then_zasubq0 |
| 74421 | 0, // zasubd1_then_zasubq1 |
| 74422 | 0, // zasubs1_then_zasubd0 |
| 74423 | 0, // zasubs1_then_zasubd1 |
| 74424 | 0, // zasubs1_then_zasubq0 |
| 74425 | 0, // zasubs1_then_zasubq1 |
| 74426 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74427 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74428 | 0, // zasubh1_then_zasubd0 |
| 74429 | 0, // zasubh1_then_zasubd1 |
| 74430 | 0, // zasubh1_then_zasubq0 |
| 74431 | 0, // zasubh1_then_zasubq1 |
| 74432 | 0, // zasubh1_then_zasubs0 |
| 74433 | 0, // zasubh1_then_zasubs1 |
| 74434 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74435 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74436 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74437 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74438 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74439 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74440 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74441 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74442 | 296, // dsub1_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74443 | 296, // dsub1_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74444 | 296, // dsub1_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74445 | 296, // dsub1_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74446 | 296, // dsub1_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74447 | 296, // dsub1_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74448 | 0, // dsub3_then_bsub |
| 74449 | 0, // dsub3_then_bsub_hi |
| 74450 | 0, // dsub3_then_hsub |
| 74451 | 0, // dsub3_then_hsub_hi |
| 74452 | 0, // dsub3_then_ssub |
| 74453 | 0, // dsub3_then_ssub_hi |
| 74454 | 296, // dsub2_then_bsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74455 | 296, // dsub2_then_bsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74456 | 296, // dsub2_then_hsub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74457 | 296, // dsub2_then_hsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74458 | 296, // dsub2_then_ssub -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74459 | 296, // dsub2_then_ssub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74460 | 0, // psub1_then_psub |
| 74461 | 296, // qsub1_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74462 | 0, // qsub3_then_dsub_hi |
| 74463 | 296, // qsub2_then_dsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74464 | 0, // x8sub_7_then_sub_32 |
| 74465 | 0, // x8sub_7_then_sub_32_hi |
| 74466 | 0, // x8sub_6_then_sub_32 |
| 74467 | 0, // x8sub_6_then_sub_32_hi |
| 74468 | 0, // x8sub_5_then_sub_32 |
| 74469 | 0, // x8sub_5_then_sub_32_hi |
| 74470 | 0, // x8sub_4_then_sub_32 |
| 74471 | 0, // x8sub_4_then_sub_32_hi |
| 74472 | 0, // x8sub_3_then_sub_32 |
| 74473 | 0, // x8sub_3_then_sub_32_hi |
| 74474 | 0, // x8sub_2_then_sub_32 |
| 74475 | 0, // x8sub_2_then_sub_32_hi |
| 74476 | 0, // x8sub_1_then_sub_32 |
| 74477 | 0, // x8sub_1_then_sub_32_hi |
| 74478 | 0, // subo64_then_sub_32 |
| 74479 | 0, // subo64_then_sub_32_hi |
| 74480 | 296, // zsub1_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74481 | 0, // zsub3_then_zsub_hi |
| 74482 | 296, // zsub2_then_zsub_hi -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74483 | 0, // dsub0_dsub1 |
| 74484 | 0, // dsub0_dsub1_dsub2 |
| 74485 | 296, // dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74486 | 0, // dsub1_dsub2_dsub3 |
| 74487 | 0, // dsub2_dsub3 |
| 74488 | 296, // dsub_dsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74489 | 0, // dsub_dsub1_dsub2_dsub3 |
| 74490 | 296, // dsub_dsub1_dsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74491 | 0, // qsub0_qsub1 |
| 74492 | 0, // qsub0_qsub1_qsub2 |
| 74493 | 296, // qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74494 | 0, // qsub1_qsub2_qsub3 |
| 74495 | 0, // qsub2_qsub3 |
| 74496 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74497 | 0, // x8sub_0_x8sub_1 |
| 74498 | 0, // x8sub_2_x8sub_3 |
| 74499 | 0, // x8sub_4_x8sub_5 |
| 74500 | 0, // x8sub_6_x8sub_7 |
| 74501 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74502 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74503 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74504 | 0, // sub_32_subo64_then_sub_32 |
| 74505 | 296, // zsub_qsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74506 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74507 | 296, // zsub_qsub1_qsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74508 | 296, // zsub0_zsub1 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74509 | 0, // zsub0_zsub1_zsub2 |
| 74510 | 296, // zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 74511 | 0, // zsub1_zsub2_zsub3 |
| 74512 | 0, // zsub2_zsub3 |
| 74513 | 0, // zsub0_zsub2 |
| 74514 | 0, // zsub1_zsub3 |
| 74515 | }, |
| 74516 | { // QQQQ |
| 74517 | 297, // bsub -> QQQQ |
| 74518 | 297, // bsub_hi -> QQQQ |
| 74519 | 297, // dsub -> QQQQ |
| 74520 | 0, // dsub0 |
| 74521 | 297, // dsub1 -> QQQQ |
| 74522 | 297, // dsub2 -> QQQQ |
| 74523 | 297, // dsub3 -> QQQQ |
| 74524 | 297, // dsub_hi -> QQQQ |
| 74525 | 297, // hsub -> QQQQ |
| 74526 | 297, // hsub_hi -> QQQQ |
| 74527 | 0, // psub |
| 74528 | 0, // psub0 |
| 74529 | 0, // psub1 |
| 74530 | 297, // qsub0 -> QQQQ |
| 74531 | 297, // qsub1 -> QQQQ |
| 74532 | 297, // qsub2 -> QQQQ |
| 74533 | 297, // qsub3 -> QQQQ |
| 74534 | 297, // ssub -> QQQQ |
| 74535 | 297, // ssub_hi -> QQQQ |
| 74536 | 0, // sub_32 |
| 74537 | 0, // sub_32_hi |
| 74538 | 0, // sube32 |
| 74539 | 0, // sube64 |
| 74540 | 0, // subo32 |
| 74541 | 0, // subo64 |
| 74542 | 0, // x8sub_0 |
| 74543 | 0, // x8sub_1 |
| 74544 | 0, // x8sub_2 |
| 74545 | 0, // x8sub_3 |
| 74546 | 0, // x8sub_4 |
| 74547 | 0, // x8sub_5 |
| 74548 | 0, // x8sub_6 |
| 74549 | 0, // x8sub_7 |
| 74550 | 0, // zasubb |
| 74551 | 0, // zasubd0 |
| 74552 | 0, // zasubd1 |
| 74553 | 0, // zasubh0 |
| 74554 | 0, // zasubh1 |
| 74555 | 0, // zasubq0 |
| 74556 | 0, // zasubq1 |
| 74557 | 0, // zasubs0 |
| 74558 | 0, // zasubs1 |
| 74559 | 0, // zsub |
| 74560 | 0, // zsub0 |
| 74561 | 0, // zsub1 |
| 74562 | 0, // zsub2 |
| 74563 | 0, // zsub3 |
| 74564 | 0, // zsub_hi |
| 74565 | 0, // zasubd1_then_zasubq0 |
| 74566 | 0, // zasubd1_then_zasubq1 |
| 74567 | 0, // zasubs1_then_zasubd0 |
| 74568 | 0, // zasubs1_then_zasubd1 |
| 74569 | 0, // zasubs1_then_zasubq0 |
| 74570 | 0, // zasubs1_then_zasubq1 |
| 74571 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74572 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74573 | 0, // zasubh1_then_zasubd0 |
| 74574 | 0, // zasubh1_then_zasubd1 |
| 74575 | 0, // zasubh1_then_zasubq0 |
| 74576 | 0, // zasubh1_then_zasubq1 |
| 74577 | 0, // zasubh1_then_zasubs0 |
| 74578 | 0, // zasubh1_then_zasubs1 |
| 74579 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74580 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74581 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74582 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74583 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74584 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74585 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74586 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74587 | 297, // dsub1_then_bsub -> QQQQ |
| 74588 | 297, // dsub1_then_bsub_hi -> QQQQ |
| 74589 | 297, // dsub1_then_hsub -> QQQQ |
| 74590 | 297, // dsub1_then_hsub_hi -> QQQQ |
| 74591 | 297, // dsub1_then_ssub -> QQQQ |
| 74592 | 297, // dsub1_then_ssub_hi -> QQQQ |
| 74593 | 297, // dsub3_then_bsub -> QQQQ |
| 74594 | 297, // dsub3_then_bsub_hi -> QQQQ |
| 74595 | 297, // dsub3_then_hsub -> QQQQ |
| 74596 | 297, // dsub3_then_hsub_hi -> QQQQ |
| 74597 | 297, // dsub3_then_ssub -> QQQQ |
| 74598 | 297, // dsub3_then_ssub_hi -> QQQQ |
| 74599 | 297, // dsub2_then_bsub -> QQQQ |
| 74600 | 297, // dsub2_then_bsub_hi -> QQQQ |
| 74601 | 297, // dsub2_then_hsub -> QQQQ |
| 74602 | 297, // dsub2_then_hsub_hi -> QQQQ |
| 74603 | 297, // dsub2_then_ssub -> QQQQ |
| 74604 | 297, // dsub2_then_ssub_hi -> QQQQ |
| 74605 | 0, // psub1_then_psub |
| 74606 | 297, // qsub1_then_dsub_hi -> QQQQ |
| 74607 | 297, // qsub3_then_dsub_hi -> QQQQ |
| 74608 | 297, // qsub2_then_dsub_hi -> QQQQ |
| 74609 | 0, // x8sub_7_then_sub_32 |
| 74610 | 0, // x8sub_7_then_sub_32_hi |
| 74611 | 0, // x8sub_6_then_sub_32 |
| 74612 | 0, // x8sub_6_then_sub_32_hi |
| 74613 | 0, // x8sub_5_then_sub_32 |
| 74614 | 0, // x8sub_5_then_sub_32_hi |
| 74615 | 0, // x8sub_4_then_sub_32 |
| 74616 | 0, // x8sub_4_then_sub_32_hi |
| 74617 | 0, // x8sub_3_then_sub_32 |
| 74618 | 0, // x8sub_3_then_sub_32_hi |
| 74619 | 0, // x8sub_2_then_sub_32 |
| 74620 | 0, // x8sub_2_then_sub_32_hi |
| 74621 | 0, // x8sub_1_then_sub_32 |
| 74622 | 0, // x8sub_1_then_sub_32_hi |
| 74623 | 0, // subo64_then_sub_32 |
| 74624 | 0, // subo64_then_sub_32_hi |
| 74625 | 0, // zsub1_then_zsub_hi |
| 74626 | 0, // zsub3_then_zsub_hi |
| 74627 | 0, // zsub2_then_zsub_hi |
| 74628 | 0, // dsub0_dsub1 |
| 74629 | 0, // dsub0_dsub1_dsub2 |
| 74630 | 297, // dsub1_dsub2 -> QQQQ |
| 74631 | 297, // dsub1_dsub2_dsub3 -> QQQQ |
| 74632 | 297, // dsub2_dsub3 -> QQQQ |
| 74633 | 297, // dsub_dsub1 -> QQQQ |
| 74634 | 297, // dsub_dsub1_dsub2_dsub3 -> QQQQ |
| 74635 | 297, // dsub_dsub1_dsub2 -> QQQQ |
| 74636 | 297, // qsub0_qsub1 -> QQQQ |
| 74637 | 297, // qsub0_qsub1_qsub2 -> QQQQ |
| 74638 | 297, // qsub1_qsub2 -> QQQQ |
| 74639 | 297, // qsub1_qsub2_qsub3 -> QQQQ |
| 74640 | 297, // qsub2_qsub3 -> QQQQ |
| 74641 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74642 | 0, // x8sub_0_x8sub_1 |
| 74643 | 0, // x8sub_2_x8sub_3 |
| 74644 | 0, // x8sub_4_x8sub_5 |
| 74645 | 0, // x8sub_6_x8sub_7 |
| 74646 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74647 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74648 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74649 | 0, // sub_32_subo64_then_sub_32 |
| 74650 | 0, // zsub_qsub1 |
| 74651 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74652 | 0, // zsub_qsub1_qsub2 |
| 74653 | 0, // zsub0_zsub1 |
| 74654 | 0, // zsub0_zsub1_zsub2 |
| 74655 | 0, // zsub1_zsub2 |
| 74656 | 0, // zsub1_zsub2_zsub3 |
| 74657 | 0, // zsub2_zsub3 |
| 74658 | 0, // zsub0_zsub2 |
| 74659 | 0, // zsub1_zsub3 |
| 74660 | }, |
| 74661 | { // ZPR4 |
| 74662 | 298, // bsub -> ZPR4 |
| 74663 | 298, // bsub_hi -> ZPR4 |
| 74664 | 298, // dsub -> ZPR4 |
| 74665 | 0, // dsub0 |
| 74666 | 298, // dsub1 -> ZPR4 |
| 74667 | 298, // dsub2 -> ZPR4 |
| 74668 | 298, // dsub3 -> ZPR4 |
| 74669 | 298, // dsub_hi -> ZPR4 |
| 74670 | 298, // hsub -> ZPR4 |
| 74671 | 298, // hsub_hi -> ZPR4 |
| 74672 | 0, // psub |
| 74673 | 0, // psub0 |
| 74674 | 0, // psub1 |
| 74675 | 0, // qsub0 |
| 74676 | 298, // qsub1 -> ZPR4 |
| 74677 | 298, // qsub2 -> ZPR4 |
| 74678 | 298, // qsub3 -> ZPR4 |
| 74679 | 298, // ssub -> ZPR4 |
| 74680 | 298, // ssub_hi -> ZPR4 |
| 74681 | 0, // sub_32 |
| 74682 | 0, // sub_32_hi |
| 74683 | 0, // sube32 |
| 74684 | 0, // sube64 |
| 74685 | 0, // subo32 |
| 74686 | 0, // subo64 |
| 74687 | 0, // x8sub_0 |
| 74688 | 0, // x8sub_1 |
| 74689 | 0, // x8sub_2 |
| 74690 | 0, // x8sub_3 |
| 74691 | 0, // x8sub_4 |
| 74692 | 0, // x8sub_5 |
| 74693 | 0, // x8sub_6 |
| 74694 | 0, // x8sub_7 |
| 74695 | 0, // zasubb |
| 74696 | 0, // zasubd0 |
| 74697 | 0, // zasubd1 |
| 74698 | 0, // zasubh0 |
| 74699 | 0, // zasubh1 |
| 74700 | 0, // zasubq0 |
| 74701 | 0, // zasubq1 |
| 74702 | 0, // zasubs0 |
| 74703 | 0, // zasubs1 |
| 74704 | 298, // zsub -> ZPR4 |
| 74705 | 298, // zsub0 -> ZPR4 |
| 74706 | 298, // zsub1 -> ZPR4 |
| 74707 | 298, // zsub2 -> ZPR4 |
| 74708 | 298, // zsub3 -> ZPR4 |
| 74709 | 298, // zsub_hi -> ZPR4 |
| 74710 | 0, // zasubd1_then_zasubq0 |
| 74711 | 0, // zasubd1_then_zasubq1 |
| 74712 | 0, // zasubs1_then_zasubd0 |
| 74713 | 0, // zasubs1_then_zasubd1 |
| 74714 | 0, // zasubs1_then_zasubq0 |
| 74715 | 0, // zasubs1_then_zasubq1 |
| 74716 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74717 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74718 | 0, // zasubh1_then_zasubd0 |
| 74719 | 0, // zasubh1_then_zasubd1 |
| 74720 | 0, // zasubh1_then_zasubq0 |
| 74721 | 0, // zasubh1_then_zasubq1 |
| 74722 | 0, // zasubh1_then_zasubs0 |
| 74723 | 0, // zasubh1_then_zasubs1 |
| 74724 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74725 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74726 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74727 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74728 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74729 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74730 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74731 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74732 | 298, // dsub1_then_bsub -> ZPR4 |
| 74733 | 298, // dsub1_then_bsub_hi -> ZPR4 |
| 74734 | 298, // dsub1_then_hsub -> ZPR4 |
| 74735 | 298, // dsub1_then_hsub_hi -> ZPR4 |
| 74736 | 298, // dsub1_then_ssub -> ZPR4 |
| 74737 | 298, // dsub1_then_ssub_hi -> ZPR4 |
| 74738 | 298, // dsub3_then_bsub -> ZPR4 |
| 74739 | 298, // dsub3_then_bsub_hi -> ZPR4 |
| 74740 | 298, // dsub3_then_hsub -> ZPR4 |
| 74741 | 298, // dsub3_then_hsub_hi -> ZPR4 |
| 74742 | 298, // dsub3_then_ssub -> ZPR4 |
| 74743 | 298, // dsub3_then_ssub_hi -> ZPR4 |
| 74744 | 298, // dsub2_then_bsub -> ZPR4 |
| 74745 | 298, // dsub2_then_bsub_hi -> ZPR4 |
| 74746 | 298, // dsub2_then_hsub -> ZPR4 |
| 74747 | 298, // dsub2_then_hsub_hi -> ZPR4 |
| 74748 | 298, // dsub2_then_ssub -> ZPR4 |
| 74749 | 298, // dsub2_then_ssub_hi -> ZPR4 |
| 74750 | 0, // psub1_then_psub |
| 74751 | 298, // qsub1_then_dsub_hi -> ZPR4 |
| 74752 | 298, // qsub3_then_dsub_hi -> ZPR4 |
| 74753 | 298, // qsub2_then_dsub_hi -> ZPR4 |
| 74754 | 0, // x8sub_7_then_sub_32 |
| 74755 | 0, // x8sub_7_then_sub_32_hi |
| 74756 | 0, // x8sub_6_then_sub_32 |
| 74757 | 0, // x8sub_6_then_sub_32_hi |
| 74758 | 0, // x8sub_5_then_sub_32 |
| 74759 | 0, // x8sub_5_then_sub_32_hi |
| 74760 | 0, // x8sub_4_then_sub_32 |
| 74761 | 0, // x8sub_4_then_sub_32_hi |
| 74762 | 0, // x8sub_3_then_sub_32 |
| 74763 | 0, // x8sub_3_then_sub_32_hi |
| 74764 | 0, // x8sub_2_then_sub_32 |
| 74765 | 0, // x8sub_2_then_sub_32_hi |
| 74766 | 0, // x8sub_1_then_sub_32 |
| 74767 | 0, // x8sub_1_then_sub_32_hi |
| 74768 | 0, // subo64_then_sub_32 |
| 74769 | 0, // subo64_then_sub_32_hi |
| 74770 | 298, // zsub1_then_zsub_hi -> ZPR4 |
| 74771 | 298, // zsub3_then_zsub_hi -> ZPR4 |
| 74772 | 298, // zsub2_then_zsub_hi -> ZPR4 |
| 74773 | 0, // dsub0_dsub1 |
| 74774 | 0, // dsub0_dsub1_dsub2 |
| 74775 | 298, // dsub1_dsub2 -> ZPR4 |
| 74776 | 298, // dsub1_dsub2_dsub3 -> ZPR4 |
| 74777 | 298, // dsub2_dsub3 -> ZPR4 |
| 74778 | 298, // dsub_dsub1 -> ZPR4 |
| 74779 | 298, // dsub_dsub1_dsub2_dsub3 -> ZPR4 |
| 74780 | 298, // dsub_dsub1_dsub2 -> ZPR4 |
| 74781 | 0, // qsub0_qsub1 |
| 74782 | 0, // qsub0_qsub1_qsub2 |
| 74783 | 298, // qsub1_qsub2 -> ZPR4 |
| 74784 | 298, // qsub1_qsub2_qsub3 -> ZPR4 |
| 74785 | 298, // qsub2_qsub3 -> ZPR4 |
| 74786 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74787 | 0, // x8sub_0_x8sub_1 |
| 74788 | 0, // x8sub_2_x8sub_3 |
| 74789 | 0, // x8sub_4_x8sub_5 |
| 74790 | 0, // x8sub_6_x8sub_7 |
| 74791 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74792 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74793 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74794 | 0, // sub_32_subo64_then_sub_32 |
| 74795 | 298, // zsub_qsub1 -> ZPR4 |
| 74796 | 298, // zsub_qsub1_qsub2_qsub3 -> ZPR4 |
| 74797 | 298, // zsub_qsub1_qsub2 -> ZPR4 |
| 74798 | 298, // zsub0_zsub1 -> ZPR4 |
| 74799 | 298, // zsub0_zsub1_zsub2 -> ZPR4 |
| 74800 | 298, // zsub1_zsub2 -> ZPR4 |
| 74801 | 298, // zsub1_zsub2_zsub3 -> ZPR4 |
| 74802 | 298, // zsub2_zsub3 -> ZPR4 |
| 74803 | 0, // zsub0_zsub2 |
| 74804 | 0, // zsub1_zsub3 |
| 74805 | }, |
| 74806 | { // QQQQ_with_dsub1_in_FPR64_lo |
| 74807 | 299, // bsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74808 | 299, // bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74809 | 299, // dsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74810 | 0, // dsub0 |
| 74811 | 299, // dsub1 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74812 | 299, // dsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74813 | 299, // dsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74814 | 299, // dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74815 | 299, // hsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74816 | 299, // hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74817 | 0, // psub |
| 74818 | 0, // psub0 |
| 74819 | 0, // psub1 |
| 74820 | 299, // qsub0 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74821 | 299, // qsub1 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74822 | 299, // qsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74823 | 299, // qsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74824 | 299, // ssub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74825 | 299, // ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74826 | 0, // sub_32 |
| 74827 | 0, // sub_32_hi |
| 74828 | 0, // sube32 |
| 74829 | 0, // sube64 |
| 74830 | 0, // subo32 |
| 74831 | 0, // subo64 |
| 74832 | 0, // x8sub_0 |
| 74833 | 0, // x8sub_1 |
| 74834 | 0, // x8sub_2 |
| 74835 | 0, // x8sub_3 |
| 74836 | 0, // x8sub_4 |
| 74837 | 0, // x8sub_5 |
| 74838 | 0, // x8sub_6 |
| 74839 | 0, // x8sub_7 |
| 74840 | 0, // zasubb |
| 74841 | 0, // zasubd0 |
| 74842 | 0, // zasubd1 |
| 74843 | 0, // zasubh0 |
| 74844 | 0, // zasubh1 |
| 74845 | 0, // zasubq0 |
| 74846 | 0, // zasubq1 |
| 74847 | 0, // zasubs0 |
| 74848 | 0, // zasubs1 |
| 74849 | 0, // zsub |
| 74850 | 0, // zsub0 |
| 74851 | 0, // zsub1 |
| 74852 | 0, // zsub2 |
| 74853 | 0, // zsub3 |
| 74854 | 0, // zsub_hi |
| 74855 | 0, // zasubd1_then_zasubq0 |
| 74856 | 0, // zasubd1_then_zasubq1 |
| 74857 | 0, // zasubs1_then_zasubd0 |
| 74858 | 0, // zasubs1_then_zasubd1 |
| 74859 | 0, // zasubs1_then_zasubq0 |
| 74860 | 0, // zasubs1_then_zasubq1 |
| 74861 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 74862 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 74863 | 0, // zasubh1_then_zasubd0 |
| 74864 | 0, // zasubh1_then_zasubd1 |
| 74865 | 0, // zasubh1_then_zasubq0 |
| 74866 | 0, // zasubh1_then_zasubq1 |
| 74867 | 0, // zasubh1_then_zasubs0 |
| 74868 | 0, // zasubh1_then_zasubs1 |
| 74869 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 74870 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 74871 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 74872 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 74873 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 74874 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 74875 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 74876 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 74877 | 299, // dsub1_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74878 | 299, // dsub1_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74879 | 299, // dsub1_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74880 | 299, // dsub1_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74881 | 299, // dsub1_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74882 | 299, // dsub1_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74883 | 299, // dsub3_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74884 | 299, // dsub3_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74885 | 299, // dsub3_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74886 | 299, // dsub3_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74887 | 299, // dsub3_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74888 | 299, // dsub3_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74889 | 299, // dsub2_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74890 | 299, // dsub2_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74891 | 299, // dsub2_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74892 | 299, // dsub2_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74893 | 299, // dsub2_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo |
| 74894 | 299, // dsub2_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74895 | 0, // psub1_then_psub |
| 74896 | 299, // qsub1_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74897 | 299, // qsub3_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74898 | 299, // qsub2_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo |
| 74899 | 0, // x8sub_7_then_sub_32 |
| 74900 | 0, // x8sub_7_then_sub_32_hi |
| 74901 | 0, // x8sub_6_then_sub_32 |
| 74902 | 0, // x8sub_6_then_sub_32_hi |
| 74903 | 0, // x8sub_5_then_sub_32 |
| 74904 | 0, // x8sub_5_then_sub_32_hi |
| 74905 | 0, // x8sub_4_then_sub_32 |
| 74906 | 0, // x8sub_4_then_sub_32_hi |
| 74907 | 0, // x8sub_3_then_sub_32 |
| 74908 | 0, // x8sub_3_then_sub_32_hi |
| 74909 | 0, // x8sub_2_then_sub_32 |
| 74910 | 0, // x8sub_2_then_sub_32_hi |
| 74911 | 0, // x8sub_1_then_sub_32 |
| 74912 | 0, // x8sub_1_then_sub_32_hi |
| 74913 | 0, // subo64_then_sub_32 |
| 74914 | 0, // subo64_then_sub_32_hi |
| 74915 | 0, // zsub1_then_zsub_hi |
| 74916 | 0, // zsub3_then_zsub_hi |
| 74917 | 0, // zsub2_then_zsub_hi |
| 74918 | 0, // dsub0_dsub1 |
| 74919 | 0, // dsub0_dsub1_dsub2 |
| 74920 | 299, // dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74921 | 299, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74922 | 299, // dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74923 | 299, // dsub_dsub1 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74924 | 299, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74925 | 299, // dsub_dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74926 | 299, // qsub0_qsub1 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74927 | 299, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74928 | 299, // qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74929 | 299, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74930 | 299, // qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 74931 | 0, // sub_32_x8sub_1_then_sub_32 |
| 74932 | 0, // x8sub_0_x8sub_1 |
| 74933 | 0, // x8sub_2_x8sub_3 |
| 74934 | 0, // x8sub_4_x8sub_5 |
| 74935 | 0, // x8sub_6_x8sub_7 |
| 74936 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 74937 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 74938 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 74939 | 0, // sub_32_subo64_then_sub_32 |
| 74940 | 0, // zsub_qsub1 |
| 74941 | 0, // zsub_qsub1_qsub2_qsub3 |
| 74942 | 0, // zsub_qsub1_qsub2 |
| 74943 | 0, // zsub0_zsub1 |
| 74944 | 0, // zsub0_zsub1_zsub2 |
| 74945 | 0, // zsub1_zsub2 |
| 74946 | 0, // zsub1_zsub2_zsub3 |
| 74947 | 0, // zsub2_zsub3 |
| 74948 | 0, // zsub0_zsub2 |
| 74949 | 0, // zsub1_zsub3 |
| 74950 | }, |
| 74951 | { // QQQQ_with_dsub2_in_FPR64_lo |
| 74952 | 300, // bsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 74953 | 300, // bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 74954 | 300, // dsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 74955 | 0, // dsub0 |
| 74956 | 300, // dsub1 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74957 | 300, // dsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74958 | 300, // dsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74959 | 300, // dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 74960 | 300, // hsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 74961 | 300, // hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 74962 | 0, // psub |
| 74963 | 0, // psub0 |
| 74964 | 0, // psub1 |
| 74965 | 300, // qsub0 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74966 | 300, // qsub1 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74967 | 300, // qsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74968 | 300, // qsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 74969 | 300, // ssub -> QQQQ_with_dsub2_in_FPR64_lo |
| 74970 | 300, // ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 74971 | 0, // sub_32 |
| 74972 | 0, // sub_32_hi |
| 74973 | 0, // sube32 |
| 74974 | 0, // sube64 |
| 74975 | 0, // subo32 |
| 74976 | 0, // subo64 |
| 74977 | 0, // x8sub_0 |
| 74978 | 0, // x8sub_1 |
| 74979 | 0, // x8sub_2 |
| 74980 | 0, // x8sub_3 |
| 74981 | 0, // x8sub_4 |
| 74982 | 0, // x8sub_5 |
| 74983 | 0, // x8sub_6 |
| 74984 | 0, // x8sub_7 |
| 74985 | 0, // zasubb |
| 74986 | 0, // zasubd0 |
| 74987 | 0, // zasubd1 |
| 74988 | 0, // zasubh0 |
| 74989 | 0, // zasubh1 |
| 74990 | 0, // zasubq0 |
| 74991 | 0, // zasubq1 |
| 74992 | 0, // zasubs0 |
| 74993 | 0, // zasubs1 |
| 74994 | 0, // zsub |
| 74995 | 0, // zsub0 |
| 74996 | 0, // zsub1 |
| 74997 | 0, // zsub2 |
| 74998 | 0, // zsub3 |
| 74999 | 0, // zsub_hi |
| 75000 | 0, // zasubd1_then_zasubq0 |
| 75001 | 0, // zasubd1_then_zasubq1 |
| 75002 | 0, // zasubs1_then_zasubd0 |
| 75003 | 0, // zasubs1_then_zasubd1 |
| 75004 | 0, // zasubs1_then_zasubq0 |
| 75005 | 0, // zasubs1_then_zasubq1 |
| 75006 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75007 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75008 | 0, // zasubh1_then_zasubd0 |
| 75009 | 0, // zasubh1_then_zasubd1 |
| 75010 | 0, // zasubh1_then_zasubq0 |
| 75011 | 0, // zasubh1_then_zasubq1 |
| 75012 | 0, // zasubh1_then_zasubs0 |
| 75013 | 0, // zasubh1_then_zasubs1 |
| 75014 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75015 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75016 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75017 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75018 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75019 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75020 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75021 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75022 | 300, // dsub1_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75023 | 300, // dsub1_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75024 | 300, // dsub1_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75025 | 300, // dsub1_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75026 | 300, // dsub1_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75027 | 300, // dsub1_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75028 | 300, // dsub3_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75029 | 300, // dsub3_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75030 | 300, // dsub3_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75031 | 300, // dsub3_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75032 | 300, // dsub3_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75033 | 300, // dsub3_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75034 | 300, // dsub2_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75035 | 300, // dsub2_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75036 | 300, // dsub2_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75037 | 300, // dsub2_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75038 | 300, // dsub2_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo |
| 75039 | 300, // dsub2_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75040 | 0, // psub1_then_psub |
| 75041 | 300, // qsub1_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75042 | 300, // qsub3_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75043 | 300, // qsub2_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo |
| 75044 | 0, // x8sub_7_then_sub_32 |
| 75045 | 0, // x8sub_7_then_sub_32_hi |
| 75046 | 0, // x8sub_6_then_sub_32 |
| 75047 | 0, // x8sub_6_then_sub_32_hi |
| 75048 | 0, // x8sub_5_then_sub_32 |
| 75049 | 0, // x8sub_5_then_sub_32_hi |
| 75050 | 0, // x8sub_4_then_sub_32 |
| 75051 | 0, // x8sub_4_then_sub_32_hi |
| 75052 | 0, // x8sub_3_then_sub_32 |
| 75053 | 0, // x8sub_3_then_sub_32_hi |
| 75054 | 0, // x8sub_2_then_sub_32 |
| 75055 | 0, // x8sub_2_then_sub_32_hi |
| 75056 | 0, // x8sub_1_then_sub_32 |
| 75057 | 0, // x8sub_1_then_sub_32_hi |
| 75058 | 0, // subo64_then_sub_32 |
| 75059 | 0, // subo64_then_sub_32_hi |
| 75060 | 0, // zsub1_then_zsub_hi |
| 75061 | 0, // zsub3_then_zsub_hi |
| 75062 | 0, // zsub2_then_zsub_hi |
| 75063 | 0, // dsub0_dsub1 |
| 75064 | 0, // dsub0_dsub1_dsub2 |
| 75065 | 300, // dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75066 | 300, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75067 | 300, // dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75068 | 300, // dsub_dsub1 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75069 | 300, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75070 | 300, // dsub_dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75071 | 300, // qsub0_qsub1 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75072 | 300, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75073 | 300, // qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75074 | 300, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75075 | 300, // qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 75076 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75077 | 0, // x8sub_0_x8sub_1 |
| 75078 | 0, // x8sub_2_x8sub_3 |
| 75079 | 0, // x8sub_4_x8sub_5 |
| 75080 | 0, // x8sub_6_x8sub_7 |
| 75081 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75082 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75083 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75084 | 0, // sub_32_subo64_then_sub_32 |
| 75085 | 0, // zsub_qsub1 |
| 75086 | 0, // zsub_qsub1_qsub2_qsub3 |
| 75087 | 0, // zsub_qsub1_qsub2 |
| 75088 | 0, // zsub0_zsub1 |
| 75089 | 0, // zsub0_zsub1_zsub2 |
| 75090 | 0, // zsub1_zsub2 |
| 75091 | 0, // zsub1_zsub2_zsub3 |
| 75092 | 0, // zsub2_zsub3 |
| 75093 | 0, // zsub0_zsub2 |
| 75094 | 0, // zsub1_zsub3 |
| 75095 | }, |
| 75096 | { // QQQQ_with_dsub3_in_FPR64_lo |
| 75097 | 301, // bsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75098 | 301, // bsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75099 | 301, // dsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75100 | 0, // dsub0 |
| 75101 | 301, // dsub1 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75102 | 301, // dsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75103 | 301, // dsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75104 | 301, // dsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75105 | 301, // hsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75106 | 301, // hsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75107 | 0, // psub |
| 75108 | 0, // psub0 |
| 75109 | 0, // psub1 |
| 75110 | 301, // qsub0 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75111 | 301, // qsub1 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75112 | 301, // qsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75113 | 301, // qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75114 | 301, // ssub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75115 | 301, // ssub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75116 | 0, // sub_32 |
| 75117 | 0, // sub_32_hi |
| 75118 | 0, // sube32 |
| 75119 | 0, // sube64 |
| 75120 | 0, // subo32 |
| 75121 | 0, // subo64 |
| 75122 | 0, // x8sub_0 |
| 75123 | 0, // x8sub_1 |
| 75124 | 0, // x8sub_2 |
| 75125 | 0, // x8sub_3 |
| 75126 | 0, // x8sub_4 |
| 75127 | 0, // x8sub_5 |
| 75128 | 0, // x8sub_6 |
| 75129 | 0, // x8sub_7 |
| 75130 | 0, // zasubb |
| 75131 | 0, // zasubd0 |
| 75132 | 0, // zasubd1 |
| 75133 | 0, // zasubh0 |
| 75134 | 0, // zasubh1 |
| 75135 | 0, // zasubq0 |
| 75136 | 0, // zasubq1 |
| 75137 | 0, // zasubs0 |
| 75138 | 0, // zasubs1 |
| 75139 | 0, // zsub |
| 75140 | 0, // zsub0 |
| 75141 | 0, // zsub1 |
| 75142 | 0, // zsub2 |
| 75143 | 0, // zsub3 |
| 75144 | 0, // zsub_hi |
| 75145 | 0, // zasubd1_then_zasubq0 |
| 75146 | 0, // zasubd1_then_zasubq1 |
| 75147 | 0, // zasubs1_then_zasubd0 |
| 75148 | 0, // zasubs1_then_zasubd1 |
| 75149 | 0, // zasubs1_then_zasubq0 |
| 75150 | 0, // zasubs1_then_zasubq1 |
| 75151 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75152 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75153 | 0, // zasubh1_then_zasubd0 |
| 75154 | 0, // zasubh1_then_zasubd1 |
| 75155 | 0, // zasubh1_then_zasubq0 |
| 75156 | 0, // zasubh1_then_zasubq1 |
| 75157 | 0, // zasubh1_then_zasubs0 |
| 75158 | 0, // zasubh1_then_zasubs1 |
| 75159 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75160 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75161 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75162 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75163 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75164 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75165 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75166 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75167 | 301, // dsub1_then_bsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75168 | 301, // dsub1_then_bsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75169 | 301, // dsub1_then_hsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75170 | 301, // dsub1_then_hsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75171 | 301, // dsub1_then_ssub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75172 | 301, // dsub1_then_ssub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75173 | 301, // dsub3_then_bsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75174 | 301, // dsub3_then_bsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75175 | 301, // dsub3_then_hsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75176 | 301, // dsub3_then_hsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75177 | 301, // dsub3_then_ssub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75178 | 301, // dsub3_then_ssub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75179 | 301, // dsub2_then_bsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75180 | 301, // dsub2_then_bsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75181 | 301, // dsub2_then_hsub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75182 | 301, // dsub2_then_hsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75183 | 301, // dsub2_then_ssub -> QQQQ_with_dsub3_in_FPR64_lo |
| 75184 | 301, // dsub2_then_ssub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75185 | 0, // psub1_then_psub |
| 75186 | 301, // qsub1_then_dsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75187 | 301, // qsub3_then_dsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75188 | 301, // qsub2_then_dsub_hi -> QQQQ_with_dsub3_in_FPR64_lo |
| 75189 | 0, // x8sub_7_then_sub_32 |
| 75190 | 0, // x8sub_7_then_sub_32_hi |
| 75191 | 0, // x8sub_6_then_sub_32 |
| 75192 | 0, // x8sub_6_then_sub_32_hi |
| 75193 | 0, // x8sub_5_then_sub_32 |
| 75194 | 0, // x8sub_5_then_sub_32_hi |
| 75195 | 0, // x8sub_4_then_sub_32 |
| 75196 | 0, // x8sub_4_then_sub_32_hi |
| 75197 | 0, // x8sub_3_then_sub_32 |
| 75198 | 0, // x8sub_3_then_sub_32_hi |
| 75199 | 0, // x8sub_2_then_sub_32 |
| 75200 | 0, // x8sub_2_then_sub_32_hi |
| 75201 | 0, // x8sub_1_then_sub_32 |
| 75202 | 0, // x8sub_1_then_sub_32_hi |
| 75203 | 0, // subo64_then_sub_32 |
| 75204 | 0, // subo64_then_sub_32_hi |
| 75205 | 0, // zsub1_then_zsub_hi |
| 75206 | 0, // zsub3_then_zsub_hi |
| 75207 | 0, // zsub2_then_zsub_hi |
| 75208 | 0, // dsub0_dsub1 |
| 75209 | 0, // dsub0_dsub1_dsub2 |
| 75210 | 301, // dsub1_dsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75211 | 301, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75212 | 301, // dsub2_dsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75213 | 301, // dsub_dsub1 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75214 | 301, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75215 | 301, // dsub_dsub1_dsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75216 | 301, // qsub0_qsub1 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75217 | 301, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75218 | 301, // qsub1_qsub2 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75219 | 301, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75220 | 301, // qsub2_qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 75221 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75222 | 0, // x8sub_0_x8sub_1 |
| 75223 | 0, // x8sub_2_x8sub_3 |
| 75224 | 0, // x8sub_4_x8sub_5 |
| 75225 | 0, // x8sub_6_x8sub_7 |
| 75226 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75227 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75228 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75229 | 0, // sub_32_subo64_then_sub_32 |
| 75230 | 0, // zsub_qsub1 |
| 75231 | 0, // zsub_qsub1_qsub2_qsub3 |
| 75232 | 0, // zsub_qsub1_qsub2 |
| 75233 | 0, // zsub0_zsub1 |
| 75234 | 0, // zsub0_zsub1_zsub2 |
| 75235 | 0, // zsub1_zsub2 |
| 75236 | 0, // zsub1_zsub2_zsub3 |
| 75237 | 0, // zsub2_zsub3 |
| 75238 | 0, // zsub0_zsub2 |
| 75239 | 0, // zsub1_zsub3 |
| 75240 | }, |
| 75241 | { // QQQQ_with_qsub0_in_FPR128_lo |
| 75242 | 302, // bsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75243 | 302, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75244 | 302, // dsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75245 | 0, // dsub0 |
| 75246 | 302, // dsub1 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75247 | 302, // dsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75248 | 302, // dsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75249 | 302, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75250 | 302, // hsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75251 | 302, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75252 | 0, // psub |
| 75253 | 0, // psub0 |
| 75254 | 0, // psub1 |
| 75255 | 302, // qsub0 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75256 | 302, // qsub1 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75257 | 302, // qsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75258 | 302, // qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75259 | 302, // ssub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75260 | 302, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75261 | 0, // sub_32 |
| 75262 | 0, // sub_32_hi |
| 75263 | 0, // sube32 |
| 75264 | 0, // sube64 |
| 75265 | 0, // subo32 |
| 75266 | 0, // subo64 |
| 75267 | 0, // x8sub_0 |
| 75268 | 0, // x8sub_1 |
| 75269 | 0, // x8sub_2 |
| 75270 | 0, // x8sub_3 |
| 75271 | 0, // x8sub_4 |
| 75272 | 0, // x8sub_5 |
| 75273 | 0, // x8sub_6 |
| 75274 | 0, // x8sub_7 |
| 75275 | 0, // zasubb |
| 75276 | 0, // zasubd0 |
| 75277 | 0, // zasubd1 |
| 75278 | 0, // zasubh0 |
| 75279 | 0, // zasubh1 |
| 75280 | 0, // zasubq0 |
| 75281 | 0, // zasubq1 |
| 75282 | 0, // zasubs0 |
| 75283 | 0, // zasubs1 |
| 75284 | 0, // zsub |
| 75285 | 0, // zsub0 |
| 75286 | 0, // zsub1 |
| 75287 | 0, // zsub2 |
| 75288 | 0, // zsub3 |
| 75289 | 0, // zsub_hi |
| 75290 | 0, // zasubd1_then_zasubq0 |
| 75291 | 0, // zasubd1_then_zasubq1 |
| 75292 | 0, // zasubs1_then_zasubd0 |
| 75293 | 0, // zasubs1_then_zasubd1 |
| 75294 | 0, // zasubs1_then_zasubq0 |
| 75295 | 0, // zasubs1_then_zasubq1 |
| 75296 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75297 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75298 | 0, // zasubh1_then_zasubd0 |
| 75299 | 0, // zasubh1_then_zasubd1 |
| 75300 | 0, // zasubh1_then_zasubq0 |
| 75301 | 0, // zasubh1_then_zasubq1 |
| 75302 | 0, // zasubh1_then_zasubs0 |
| 75303 | 0, // zasubh1_then_zasubs1 |
| 75304 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75305 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75306 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75307 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75308 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75309 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75310 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75311 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75312 | 302, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75313 | 302, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75314 | 302, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75315 | 302, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75316 | 302, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75317 | 302, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75318 | 302, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75319 | 302, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75320 | 302, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75321 | 302, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75322 | 302, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75323 | 302, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75324 | 302, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75325 | 302, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75326 | 302, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75327 | 302, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75328 | 302, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo |
| 75329 | 302, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75330 | 0, // psub1_then_psub |
| 75331 | 302, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75332 | 302, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75333 | 302, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo |
| 75334 | 0, // x8sub_7_then_sub_32 |
| 75335 | 0, // x8sub_7_then_sub_32_hi |
| 75336 | 0, // x8sub_6_then_sub_32 |
| 75337 | 0, // x8sub_6_then_sub_32_hi |
| 75338 | 0, // x8sub_5_then_sub_32 |
| 75339 | 0, // x8sub_5_then_sub_32_hi |
| 75340 | 0, // x8sub_4_then_sub_32 |
| 75341 | 0, // x8sub_4_then_sub_32_hi |
| 75342 | 0, // x8sub_3_then_sub_32 |
| 75343 | 0, // x8sub_3_then_sub_32_hi |
| 75344 | 0, // x8sub_2_then_sub_32 |
| 75345 | 0, // x8sub_2_then_sub_32_hi |
| 75346 | 0, // x8sub_1_then_sub_32 |
| 75347 | 0, // x8sub_1_then_sub_32_hi |
| 75348 | 0, // subo64_then_sub_32 |
| 75349 | 0, // subo64_then_sub_32_hi |
| 75350 | 0, // zsub1_then_zsub_hi |
| 75351 | 0, // zsub3_then_zsub_hi |
| 75352 | 0, // zsub2_then_zsub_hi |
| 75353 | 0, // dsub0_dsub1 |
| 75354 | 0, // dsub0_dsub1_dsub2 |
| 75355 | 302, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75356 | 302, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75357 | 302, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75358 | 302, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75359 | 302, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75360 | 302, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75361 | 302, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75362 | 302, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75363 | 302, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75364 | 302, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75365 | 302, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 75366 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75367 | 0, // x8sub_0_x8sub_1 |
| 75368 | 0, // x8sub_2_x8sub_3 |
| 75369 | 0, // x8sub_4_x8sub_5 |
| 75370 | 0, // x8sub_6_x8sub_7 |
| 75371 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75372 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75373 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75374 | 0, // sub_32_subo64_then_sub_32 |
| 75375 | 0, // zsub_qsub1 |
| 75376 | 0, // zsub_qsub1_qsub2_qsub3 |
| 75377 | 0, // zsub_qsub1_qsub2 |
| 75378 | 0, // zsub0_zsub1 |
| 75379 | 0, // zsub0_zsub1_zsub2 |
| 75380 | 0, // zsub1_zsub2 |
| 75381 | 0, // zsub1_zsub2_zsub3 |
| 75382 | 0, // zsub2_zsub3 |
| 75383 | 0, // zsub0_zsub2 |
| 75384 | 0, // zsub1_zsub3 |
| 75385 | }, |
| 75386 | { // ZPR4StridedOrContiguous |
| 75387 | 303, // bsub -> ZPR4StridedOrContiguous |
| 75388 | 303, // bsub_hi -> ZPR4StridedOrContiguous |
| 75389 | 303, // dsub -> ZPR4StridedOrContiguous |
| 75390 | 0, // dsub0 |
| 75391 | 303, // dsub1 -> ZPR4StridedOrContiguous |
| 75392 | 303, // dsub2 -> ZPR4StridedOrContiguous |
| 75393 | 303, // dsub3 -> ZPR4StridedOrContiguous |
| 75394 | 303, // dsub_hi -> ZPR4StridedOrContiguous |
| 75395 | 303, // hsub -> ZPR4StridedOrContiguous |
| 75396 | 303, // hsub_hi -> ZPR4StridedOrContiguous |
| 75397 | 0, // psub |
| 75398 | 0, // psub0 |
| 75399 | 0, // psub1 |
| 75400 | 0, // qsub0 |
| 75401 | 303, // qsub1 -> ZPR4StridedOrContiguous |
| 75402 | 303, // qsub2 -> ZPR4StridedOrContiguous |
| 75403 | 303, // qsub3 -> ZPR4StridedOrContiguous |
| 75404 | 303, // ssub -> ZPR4StridedOrContiguous |
| 75405 | 303, // ssub_hi -> ZPR4StridedOrContiguous |
| 75406 | 0, // sub_32 |
| 75407 | 0, // sub_32_hi |
| 75408 | 0, // sube32 |
| 75409 | 0, // sube64 |
| 75410 | 0, // subo32 |
| 75411 | 0, // subo64 |
| 75412 | 0, // x8sub_0 |
| 75413 | 0, // x8sub_1 |
| 75414 | 0, // x8sub_2 |
| 75415 | 0, // x8sub_3 |
| 75416 | 0, // x8sub_4 |
| 75417 | 0, // x8sub_5 |
| 75418 | 0, // x8sub_6 |
| 75419 | 0, // x8sub_7 |
| 75420 | 0, // zasubb |
| 75421 | 0, // zasubd0 |
| 75422 | 0, // zasubd1 |
| 75423 | 0, // zasubh0 |
| 75424 | 0, // zasubh1 |
| 75425 | 0, // zasubq0 |
| 75426 | 0, // zasubq1 |
| 75427 | 0, // zasubs0 |
| 75428 | 0, // zasubs1 |
| 75429 | 303, // zsub -> ZPR4StridedOrContiguous |
| 75430 | 303, // zsub0 -> ZPR4StridedOrContiguous |
| 75431 | 303, // zsub1 -> ZPR4StridedOrContiguous |
| 75432 | 303, // zsub2 -> ZPR4StridedOrContiguous |
| 75433 | 303, // zsub3 -> ZPR4StridedOrContiguous |
| 75434 | 303, // zsub_hi -> ZPR4StridedOrContiguous |
| 75435 | 0, // zasubd1_then_zasubq0 |
| 75436 | 0, // zasubd1_then_zasubq1 |
| 75437 | 0, // zasubs1_then_zasubd0 |
| 75438 | 0, // zasubs1_then_zasubd1 |
| 75439 | 0, // zasubs1_then_zasubq0 |
| 75440 | 0, // zasubs1_then_zasubq1 |
| 75441 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75442 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75443 | 0, // zasubh1_then_zasubd0 |
| 75444 | 0, // zasubh1_then_zasubd1 |
| 75445 | 0, // zasubh1_then_zasubq0 |
| 75446 | 0, // zasubh1_then_zasubq1 |
| 75447 | 0, // zasubh1_then_zasubs0 |
| 75448 | 0, // zasubh1_then_zasubs1 |
| 75449 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75450 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75451 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75452 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75453 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75454 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75455 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75456 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75457 | 303, // dsub1_then_bsub -> ZPR4StridedOrContiguous |
| 75458 | 303, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous |
| 75459 | 303, // dsub1_then_hsub -> ZPR4StridedOrContiguous |
| 75460 | 303, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous |
| 75461 | 303, // dsub1_then_ssub -> ZPR4StridedOrContiguous |
| 75462 | 303, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous |
| 75463 | 303, // dsub3_then_bsub -> ZPR4StridedOrContiguous |
| 75464 | 303, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous |
| 75465 | 303, // dsub3_then_hsub -> ZPR4StridedOrContiguous |
| 75466 | 303, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous |
| 75467 | 303, // dsub3_then_ssub -> ZPR4StridedOrContiguous |
| 75468 | 303, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous |
| 75469 | 303, // dsub2_then_bsub -> ZPR4StridedOrContiguous |
| 75470 | 303, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous |
| 75471 | 303, // dsub2_then_hsub -> ZPR4StridedOrContiguous |
| 75472 | 303, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous |
| 75473 | 303, // dsub2_then_ssub -> ZPR4StridedOrContiguous |
| 75474 | 303, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous |
| 75475 | 0, // psub1_then_psub |
| 75476 | 303, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous |
| 75477 | 303, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous |
| 75478 | 303, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous |
| 75479 | 0, // x8sub_7_then_sub_32 |
| 75480 | 0, // x8sub_7_then_sub_32_hi |
| 75481 | 0, // x8sub_6_then_sub_32 |
| 75482 | 0, // x8sub_6_then_sub_32_hi |
| 75483 | 0, // x8sub_5_then_sub_32 |
| 75484 | 0, // x8sub_5_then_sub_32_hi |
| 75485 | 0, // x8sub_4_then_sub_32 |
| 75486 | 0, // x8sub_4_then_sub_32_hi |
| 75487 | 0, // x8sub_3_then_sub_32 |
| 75488 | 0, // x8sub_3_then_sub_32_hi |
| 75489 | 0, // x8sub_2_then_sub_32 |
| 75490 | 0, // x8sub_2_then_sub_32_hi |
| 75491 | 0, // x8sub_1_then_sub_32 |
| 75492 | 0, // x8sub_1_then_sub_32_hi |
| 75493 | 0, // subo64_then_sub_32 |
| 75494 | 0, // subo64_then_sub_32_hi |
| 75495 | 303, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous |
| 75496 | 303, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous |
| 75497 | 303, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous |
| 75498 | 0, // dsub0_dsub1 |
| 75499 | 0, // dsub0_dsub1_dsub2 |
| 75500 | 328, // dsub1_dsub2 -> ZPR4Mul4 |
| 75501 | 328, // dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 75502 | 328, // dsub2_dsub3 -> ZPR4Mul4 |
| 75503 | 328, // dsub_dsub1 -> ZPR4Mul4 |
| 75504 | 328, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 75505 | 328, // dsub_dsub1_dsub2 -> ZPR4Mul4 |
| 75506 | 0, // qsub0_qsub1 |
| 75507 | 0, // qsub0_qsub1_qsub2 |
| 75508 | 328, // qsub1_qsub2 -> ZPR4Mul4 |
| 75509 | 328, // qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 75510 | 328, // qsub2_qsub3 -> ZPR4Mul4 |
| 75511 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75512 | 0, // x8sub_0_x8sub_1 |
| 75513 | 0, // x8sub_2_x8sub_3 |
| 75514 | 0, // x8sub_4_x8sub_5 |
| 75515 | 0, // x8sub_6_x8sub_7 |
| 75516 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75517 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75518 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75519 | 0, // sub_32_subo64_then_sub_32 |
| 75520 | 328, // zsub_qsub1 -> ZPR4Mul4 |
| 75521 | 328, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 75522 | 328, // zsub_qsub1_qsub2 -> ZPR4Mul4 |
| 75523 | 328, // zsub0_zsub1 -> ZPR4Mul4 |
| 75524 | 328, // zsub0_zsub1_zsub2 -> ZPR4Mul4 |
| 75525 | 328, // zsub1_zsub2 -> ZPR4Mul4 |
| 75526 | 328, // zsub1_zsub2_zsub3 -> ZPR4Mul4 |
| 75527 | 328, // zsub2_zsub3 -> ZPR4Mul4 |
| 75528 | 329, // zsub0_zsub2 -> ZPR4Strided |
| 75529 | 329, // zsub1_zsub3 -> ZPR4Strided |
| 75530 | }, |
| 75531 | { // ZPR4_with_dsub1_in_FPR64_lo |
| 75532 | 304, // bsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75533 | 304, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75534 | 304, // dsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75535 | 0, // dsub0 |
| 75536 | 304, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75537 | 304, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75538 | 304, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75539 | 304, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75540 | 304, // hsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75541 | 304, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75542 | 0, // psub |
| 75543 | 0, // psub0 |
| 75544 | 0, // psub1 |
| 75545 | 0, // qsub0 |
| 75546 | 304, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75547 | 304, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75548 | 304, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75549 | 304, // ssub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75550 | 304, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75551 | 0, // sub_32 |
| 75552 | 0, // sub_32_hi |
| 75553 | 0, // sube32 |
| 75554 | 0, // sube64 |
| 75555 | 0, // subo32 |
| 75556 | 0, // subo64 |
| 75557 | 0, // x8sub_0 |
| 75558 | 0, // x8sub_1 |
| 75559 | 0, // x8sub_2 |
| 75560 | 0, // x8sub_3 |
| 75561 | 0, // x8sub_4 |
| 75562 | 0, // x8sub_5 |
| 75563 | 0, // x8sub_6 |
| 75564 | 0, // x8sub_7 |
| 75565 | 0, // zasubb |
| 75566 | 0, // zasubd0 |
| 75567 | 0, // zasubd1 |
| 75568 | 0, // zasubh0 |
| 75569 | 0, // zasubh1 |
| 75570 | 0, // zasubq0 |
| 75571 | 0, // zasubq1 |
| 75572 | 0, // zasubs0 |
| 75573 | 0, // zasubs1 |
| 75574 | 304, // zsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75575 | 304, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75576 | 304, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75577 | 304, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75578 | 304, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75579 | 304, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75580 | 0, // zasubd1_then_zasubq0 |
| 75581 | 0, // zasubd1_then_zasubq1 |
| 75582 | 0, // zasubs1_then_zasubd0 |
| 75583 | 0, // zasubs1_then_zasubd1 |
| 75584 | 0, // zasubs1_then_zasubq0 |
| 75585 | 0, // zasubs1_then_zasubq1 |
| 75586 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75587 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75588 | 0, // zasubh1_then_zasubd0 |
| 75589 | 0, // zasubh1_then_zasubd1 |
| 75590 | 0, // zasubh1_then_zasubq0 |
| 75591 | 0, // zasubh1_then_zasubq1 |
| 75592 | 0, // zasubh1_then_zasubs0 |
| 75593 | 0, // zasubh1_then_zasubs1 |
| 75594 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75595 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75596 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75597 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75598 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75599 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75600 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75601 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75602 | 304, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75603 | 304, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75604 | 304, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75605 | 304, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75606 | 304, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75607 | 304, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75608 | 304, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75609 | 304, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75610 | 304, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75611 | 304, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75612 | 304, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75613 | 304, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75614 | 304, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75615 | 304, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75616 | 304, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75617 | 304, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75618 | 304, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo |
| 75619 | 304, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75620 | 0, // psub1_then_psub |
| 75621 | 304, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75622 | 304, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75623 | 304, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75624 | 0, // x8sub_7_then_sub_32 |
| 75625 | 0, // x8sub_7_then_sub_32_hi |
| 75626 | 0, // x8sub_6_then_sub_32 |
| 75627 | 0, // x8sub_6_then_sub_32_hi |
| 75628 | 0, // x8sub_5_then_sub_32 |
| 75629 | 0, // x8sub_5_then_sub_32_hi |
| 75630 | 0, // x8sub_4_then_sub_32 |
| 75631 | 0, // x8sub_4_then_sub_32_hi |
| 75632 | 0, // x8sub_3_then_sub_32 |
| 75633 | 0, // x8sub_3_then_sub_32_hi |
| 75634 | 0, // x8sub_2_then_sub_32 |
| 75635 | 0, // x8sub_2_then_sub_32_hi |
| 75636 | 0, // x8sub_1_then_sub_32 |
| 75637 | 0, // x8sub_1_then_sub_32_hi |
| 75638 | 0, // subo64_then_sub_32 |
| 75639 | 0, // subo64_then_sub_32_hi |
| 75640 | 304, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75641 | 304, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75642 | 304, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo |
| 75643 | 0, // dsub0_dsub1 |
| 75644 | 0, // dsub0_dsub1_dsub2 |
| 75645 | 304, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75646 | 304, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75647 | 304, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75648 | 304, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75649 | 304, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75650 | 304, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75651 | 0, // qsub0_qsub1 |
| 75652 | 0, // qsub0_qsub1_qsub2 |
| 75653 | 304, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75654 | 304, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75655 | 304, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75656 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75657 | 0, // x8sub_0_x8sub_1 |
| 75658 | 0, // x8sub_2_x8sub_3 |
| 75659 | 0, // x8sub_4_x8sub_5 |
| 75660 | 0, // x8sub_6_x8sub_7 |
| 75661 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75662 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75663 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75664 | 0, // sub_32_subo64_then_sub_32 |
| 75665 | 304, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75666 | 304, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75667 | 304, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75668 | 304, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75669 | 304, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75670 | 304, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75671 | 304, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75672 | 304, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo |
| 75673 | 0, // zsub0_zsub2 |
| 75674 | 0, // zsub1_zsub3 |
| 75675 | }, |
| 75676 | { // ZPR4_with_dsub2_in_FPR64_lo |
| 75677 | 305, // bsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75678 | 305, // bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75679 | 305, // dsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75680 | 0, // dsub0 |
| 75681 | 305, // dsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75682 | 305, // dsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75683 | 305, // dsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75684 | 305, // dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75685 | 305, // hsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75686 | 305, // hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75687 | 0, // psub |
| 75688 | 0, // psub0 |
| 75689 | 0, // psub1 |
| 75690 | 0, // qsub0 |
| 75691 | 305, // qsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75692 | 305, // qsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75693 | 305, // qsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75694 | 305, // ssub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75695 | 305, // ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75696 | 0, // sub_32 |
| 75697 | 0, // sub_32_hi |
| 75698 | 0, // sube32 |
| 75699 | 0, // sube64 |
| 75700 | 0, // subo32 |
| 75701 | 0, // subo64 |
| 75702 | 0, // x8sub_0 |
| 75703 | 0, // x8sub_1 |
| 75704 | 0, // x8sub_2 |
| 75705 | 0, // x8sub_3 |
| 75706 | 0, // x8sub_4 |
| 75707 | 0, // x8sub_5 |
| 75708 | 0, // x8sub_6 |
| 75709 | 0, // x8sub_7 |
| 75710 | 0, // zasubb |
| 75711 | 0, // zasubd0 |
| 75712 | 0, // zasubd1 |
| 75713 | 0, // zasubh0 |
| 75714 | 0, // zasubh1 |
| 75715 | 0, // zasubq0 |
| 75716 | 0, // zasubq1 |
| 75717 | 0, // zasubs0 |
| 75718 | 0, // zasubs1 |
| 75719 | 305, // zsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75720 | 305, // zsub0 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75721 | 305, // zsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75722 | 305, // zsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75723 | 305, // zsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75724 | 305, // zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75725 | 0, // zasubd1_then_zasubq0 |
| 75726 | 0, // zasubd1_then_zasubq1 |
| 75727 | 0, // zasubs1_then_zasubd0 |
| 75728 | 0, // zasubs1_then_zasubd1 |
| 75729 | 0, // zasubs1_then_zasubq0 |
| 75730 | 0, // zasubs1_then_zasubq1 |
| 75731 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75732 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75733 | 0, // zasubh1_then_zasubd0 |
| 75734 | 0, // zasubh1_then_zasubd1 |
| 75735 | 0, // zasubh1_then_zasubq0 |
| 75736 | 0, // zasubh1_then_zasubq1 |
| 75737 | 0, // zasubh1_then_zasubs0 |
| 75738 | 0, // zasubh1_then_zasubs1 |
| 75739 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75740 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75741 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75742 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75743 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75744 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75745 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75746 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75747 | 305, // dsub1_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75748 | 305, // dsub1_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75749 | 305, // dsub1_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75750 | 305, // dsub1_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75751 | 305, // dsub1_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75752 | 305, // dsub1_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75753 | 305, // dsub3_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75754 | 305, // dsub3_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75755 | 305, // dsub3_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75756 | 305, // dsub3_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75757 | 305, // dsub3_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75758 | 305, // dsub3_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75759 | 305, // dsub2_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75760 | 305, // dsub2_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75761 | 305, // dsub2_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75762 | 305, // dsub2_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75763 | 305, // dsub2_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo |
| 75764 | 305, // dsub2_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75765 | 0, // psub1_then_psub |
| 75766 | 305, // qsub1_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75767 | 305, // qsub3_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75768 | 305, // qsub2_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75769 | 0, // x8sub_7_then_sub_32 |
| 75770 | 0, // x8sub_7_then_sub_32_hi |
| 75771 | 0, // x8sub_6_then_sub_32 |
| 75772 | 0, // x8sub_6_then_sub_32_hi |
| 75773 | 0, // x8sub_5_then_sub_32 |
| 75774 | 0, // x8sub_5_then_sub_32_hi |
| 75775 | 0, // x8sub_4_then_sub_32 |
| 75776 | 0, // x8sub_4_then_sub_32_hi |
| 75777 | 0, // x8sub_3_then_sub_32 |
| 75778 | 0, // x8sub_3_then_sub_32_hi |
| 75779 | 0, // x8sub_2_then_sub_32 |
| 75780 | 0, // x8sub_2_then_sub_32_hi |
| 75781 | 0, // x8sub_1_then_sub_32 |
| 75782 | 0, // x8sub_1_then_sub_32_hi |
| 75783 | 0, // subo64_then_sub_32 |
| 75784 | 0, // subo64_then_sub_32_hi |
| 75785 | 305, // zsub1_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75786 | 305, // zsub3_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75787 | 305, // zsub2_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo |
| 75788 | 0, // dsub0_dsub1 |
| 75789 | 0, // dsub0_dsub1_dsub2 |
| 75790 | 305, // dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75791 | 305, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75792 | 305, // dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75793 | 305, // dsub_dsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75794 | 305, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75795 | 305, // dsub_dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75796 | 0, // qsub0_qsub1 |
| 75797 | 0, // qsub0_qsub1_qsub2 |
| 75798 | 305, // qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75799 | 305, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75800 | 305, // qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75801 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75802 | 0, // x8sub_0_x8sub_1 |
| 75803 | 0, // x8sub_2_x8sub_3 |
| 75804 | 0, // x8sub_4_x8sub_5 |
| 75805 | 0, // x8sub_6_x8sub_7 |
| 75806 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75807 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75808 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75809 | 0, // sub_32_subo64_then_sub_32 |
| 75810 | 305, // zsub_qsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75811 | 305, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75812 | 305, // zsub_qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75813 | 305, // zsub0_zsub1 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75814 | 305, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75815 | 305, // zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75816 | 305, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75817 | 305, // zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo |
| 75818 | 0, // zsub0_zsub2 |
| 75819 | 0, // zsub1_zsub3 |
| 75820 | }, |
| 75821 | { // ZPR4_with_dsub3_in_FPR64_lo |
| 75822 | 306, // bsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75823 | 306, // bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75824 | 306, // dsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75825 | 0, // dsub0 |
| 75826 | 306, // dsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75827 | 306, // dsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75828 | 306, // dsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75829 | 306, // dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75830 | 306, // hsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75831 | 306, // hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75832 | 0, // psub |
| 75833 | 0, // psub0 |
| 75834 | 0, // psub1 |
| 75835 | 0, // qsub0 |
| 75836 | 306, // qsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75837 | 306, // qsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75838 | 306, // qsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75839 | 306, // ssub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75840 | 306, // ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75841 | 0, // sub_32 |
| 75842 | 0, // sub_32_hi |
| 75843 | 0, // sube32 |
| 75844 | 0, // sube64 |
| 75845 | 0, // subo32 |
| 75846 | 0, // subo64 |
| 75847 | 0, // x8sub_0 |
| 75848 | 0, // x8sub_1 |
| 75849 | 0, // x8sub_2 |
| 75850 | 0, // x8sub_3 |
| 75851 | 0, // x8sub_4 |
| 75852 | 0, // x8sub_5 |
| 75853 | 0, // x8sub_6 |
| 75854 | 0, // x8sub_7 |
| 75855 | 0, // zasubb |
| 75856 | 0, // zasubd0 |
| 75857 | 0, // zasubd1 |
| 75858 | 0, // zasubh0 |
| 75859 | 0, // zasubh1 |
| 75860 | 0, // zasubq0 |
| 75861 | 0, // zasubq1 |
| 75862 | 0, // zasubs0 |
| 75863 | 0, // zasubs1 |
| 75864 | 306, // zsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75865 | 306, // zsub0 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75866 | 306, // zsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75867 | 306, // zsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75868 | 306, // zsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75869 | 306, // zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75870 | 0, // zasubd1_then_zasubq0 |
| 75871 | 0, // zasubd1_then_zasubq1 |
| 75872 | 0, // zasubs1_then_zasubd0 |
| 75873 | 0, // zasubs1_then_zasubd1 |
| 75874 | 0, // zasubs1_then_zasubq0 |
| 75875 | 0, // zasubs1_then_zasubq1 |
| 75876 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 75877 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 75878 | 0, // zasubh1_then_zasubd0 |
| 75879 | 0, // zasubh1_then_zasubd1 |
| 75880 | 0, // zasubh1_then_zasubq0 |
| 75881 | 0, // zasubh1_then_zasubq1 |
| 75882 | 0, // zasubh1_then_zasubs0 |
| 75883 | 0, // zasubh1_then_zasubs1 |
| 75884 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 75885 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 75886 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 75887 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 75888 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 75889 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 75890 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 75891 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 75892 | 306, // dsub1_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75893 | 306, // dsub1_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75894 | 306, // dsub1_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75895 | 306, // dsub1_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75896 | 306, // dsub1_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75897 | 306, // dsub1_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75898 | 306, // dsub3_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75899 | 306, // dsub3_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75900 | 306, // dsub3_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75901 | 306, // dsub3_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75902 | 306, // dsub3_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75903 | 306, // dsub3_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75904 | 306, // dsub2_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75905 | 306, // dsub2_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75906 | 306, // dsub2_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75907 | 306, // dsub2_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75908 | 306, // dsub2_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo |
| 75909 | 306, // dsub2_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75910 | 0, // psub1_then_psub |
| 75911 | 306, // qsub1_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75912 | 306, // qsub3_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75913 | 306, // qsub2_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75914 | 0, // x8sub_7_then_sub_32 |
| 75915 | 0, // x8sub_7_then_sub_32_hi |
| 75916 | 0, // x8sub_6_then_sub_32 |
| 75917 | 0, // x8sub_6_then_sub_32_hi |
| 75918 | 0, // x8sub_5_then_sub_32 |
| 75919 | 0, // x8sub_5_then_sub_32_hi |
| 75920 | 0, // x8sub_4_then_sub_32 |
| 75921 | 0, // x8sub_4_then_sub_32_hi |
| 75922 | 0, // x8sub_3_then_sub_32 |
| 75923 | 0, // x8sub_3_then_sub_32_hi |
| 75924 | 0, // x8sub_2_then_sub_32 |
| 75925 | 0, // x8sub_2_then_sub_32_hi |
| 75926 | 0, // x8sub_1_then_sub_32 |
| 75927 | 0, // x8sub_1_then_sub_32_hi |
| 75928 | 0, // subo64_then_sub_32 |
| 75929 | 0, // subo64_then_sub_32_hi |
| 75930 | 306, // zsub1_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75931 | 306, // zsub3_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75932 | 306, // zsub2_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo |
| 75933 | 0, // dsub0_dsub1 |
| 75934 | 0, // dsub0_dsub1_dsub2 |
| 75935 | 306, // dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75936 | 306, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75937 | 306, // dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75938 | 306, // dsub_dsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75939 | 306, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75940 | 306, // dsub_dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75941 | 0, // qsub0_qsub1 |
| 75942 | 0, // qsub0_qsub1_qsub2 |
| 75943 | 306, // qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75944 | 306, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75945 | 306, // qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75946 | 0, // sub_32_x8sub_1_then_sub_32 |
| 75947 | 0, // x8sub_0_x8sub_1 |
| 75948 | 0, // x8sub_2_x8sub_3 |
| 75949 | 0, // x8sub_4_x8sub_5 |
| 75950 | 0, // x8sub_6_x8sub_7 |
| 75951 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 75952 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 75953 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 75954 | 0, // sub_32_subo64_then_sub_32 |
| 75955 | 306, // zsub_qsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75956 | 306, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75957 | 306, // zsub_qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75958 | 306, // zsub0_zsub1 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75959 | 306, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75960 | 306, // zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75961 | 306, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75962 | 306, // zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo |
| 75963 | 0, // zsub0_zsub2 |
| 75964 | 0, // zsub1_zsub3 |
| 75965 | }, |
| 75966 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75967 | 307, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75968 | 307, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75969 | 307, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75970 | 0, // dsub0 |
| 75971 | 307, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75972 | 307, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75973 | 307, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75974 | 307, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75975 | 307, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75976 | 307, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75977 | 0, // psub |
| 75978 | 0, // psub0 |
| 75979 | 0, // psub1 |
| 75980 | 0, // qsub0 |
| 75981 | 307, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75982 | 307, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75983 | 307, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75984 | 307, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75985 | 307, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 75986 | 0, // sub_32 |
| 75987 | 0, // sub_32_hi |
| 75988 | 0, // sube32 |
| 75989 | 0, // sube64 |
| 75990 | 0, // subo32 |
| 75991 | 0, // subo64 |
| 75992 | 0, // x8sub_0 |
| 75993 | 0, // x8sub_1 |
| 75994 | 0, // x8sub_2 |
| 75995 | 0, // x8sub_3 |
| 75996 | 0, // x8sub_4 |
| 75997 | 0, // x8sub_5 |
| 75998 | 0, // x8sub_6 |
| 75999 | 0, // x8sub_7 |
| 76000 | 0, // zasubb |
| 76001 | 0, // zasubd0 |
| 76002 | 0, // zasubd1 |
| 76003 | 0, // zasubh0 |
| 76004 | 0, // zasubh1 |
| 76005 | 0, // zasubq0 |
| 76006 | 0, // zasubq1 |
| 76007 | 0, // zasubs0 |
| 76008 | 0, // zasubs1 |
| 76009 | 307, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76010 | 307, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76011 | 307, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76012 | 307, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76013 | 307, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76014 | 307, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76015 | 0, // zasubd1_then_zasubq0 |
| 76016 | 0, // zasubd1_then_zasubq1 |
| 76017 | 0, // zasubs1_then_zasubd0 |
| 76018 | 0, // zasubs1_then_zasubd1 |
| 76019 | 0, // zasubs1_then_zasubq0 |
| 76020 | 0, // zasubs1_then_zasubq1 |
| 76021 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76022 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76023 | 0, // zasubh1_then_zasubd0 |
| 76024 | 0, // zasubh1_then_zasubd1 |
| 76025 | 0, // zasubh1_then_zasubq0 |
| 76026 | 0, // zasubh1_then_zasubq1 |
| 76027 | 0, // zasubh1_then_zasubs0 |
| 76028 | 0, // zasubh1_then_zasubs1 |
| 76029 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76030 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76031 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76032 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76033 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76034 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76035 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76036 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76037 | 307, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76038 | 307, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76039 | 307, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76040 | 307, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76041 | 307, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76042 | 307, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76043 | 307, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76044 | 307, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76045 | 307, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76046 | 307, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76047 | 307, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76048 | 307, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76049 | 307, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76050 | 307, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76051 | 307, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76052 | 307, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76053 | 307, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76054 | 307, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76055 | 0, // psub1_then_psub |
| 76056 | 307, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76057 | 307, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76058 | 307, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76059 | 0, // x8sub_7_then_sub_32 |
| 76060 | 0, // x8sub_7_then_sub_32_hi |
| 76061 | 0, // x8sub_6_then_sub_32 |
| 76062 | 0, // x8sub_6_then_sub_32_hi |
| 76063 | 0, // x8sub_5_then_sub_32 |
| 76064 | 0, // x8sub_5_then_sub_32_hi |
| 76065 | 0, // x8sub_4_then_sub_32 |
| 76066 | 0, // x8sub_4_then_sub_32_hi |
| 76067 | 0, // x8sub_3_then_sub_32 |
| 76068 | 0, // x8sub_3_then_sub_32_hi |
| 76069 | 0, // x8sub_2_then_sub_32 |
| 76070 | 0, // x8sub_2_then_sub_32_hi |
| 76071 | 0, // x8sub_1_then_sub_32 |
| 76072 | 0, // x8sub_1_then_sub_32_hi |
| 76073 | 0, // subo64_then_sub_32 |
| 76074 | 0, // subo64_then_sub_32_hi |
| 76075 | 307, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76076 | 307, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76077 | 307, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76078 | 0, // dsub0_dsub1 |
| 76079 | 0, // dsub0_dsub1_dsub2 |
| 76080 | 307, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76081 | 307, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76082 | 307, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76083 | 307, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76084 | 307, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76085 | 307, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76086 | 0, // qsub0_qsub1 |
| 76087 | 0, // qsub0_qsub1_qsub2 |
| 76088 | 307, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76089 | 307, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76090 | 307, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76091 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76092 | 0, // x8sub_0_x8sub_1 |
| 76093 | 0, // x8sub_2_x8sub_3 |
| 76094 | 0, // x8sub_4_x8sub_5 |
| 76095 | 0, // x8sub_6_x8sub_7 |
| 76096 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76097 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76098 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76099 | 0, // sub_32_subo64_then_sub_32 |
| 76100 | 307, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76101 | 307, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76102 | 307, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76103 | 307, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76104 | 307, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76105 | 307, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76106 | 307, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76107 | 307, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 76108 | 0, // zsub0_zsub2 |
| 76109 | 0, // zsub1_zsub3 |
| 76110 | }, |
| 76111 | { // ZPR4_with_zsub1_in_ZPRMul2 |
| 76112 | 308, // bsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76113 | 308, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76114 | 308, // dsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76115 | 0, // dsub0 |
| 76116 | 308, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76117 | 308, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76118 | 308, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76119 | 308, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76120 | 308, // hsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76121 | 308, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76122 | 0, // psub |
| 76123 | 0, // psub0 |
| 76124 | 0, // psub1 |
| 76125 | 0, // qsub0 |
| 76126 | 308, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76127 | 308, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76128 | 308, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76129 | 308, // ssub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76130 | 308, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76131 | 0, // sub_32 |
| 76132 | 0, // sub_32_hi |
| 76133 | 0, // sube32 |
| 76134 | 0, // sube64 |
| 76135 | 0, // subo32 |
| 76136 | 0, // subo64 |
| 76137 | 0, // x8sub_0 |
| 76138 | 0, // x8sub_1 |
| 76139 | 0, // x8sub_2 |
| 76140 | 0, // x8sub_3 |
| 76141 | 0, // x8sub_4 |
| 76142 | 0, // x8sub_5 |
| 76143 | 0, // x8sub_6 |
| 76144 | 0, // x8sub_7 |
| 76145 | 0, // zasubb |
| 76146 | 0, // zasubd0 |
| 76147 | 0, // zasubd1 |
| 76148 | 0, // zasubh0 |
| 76149 | 0, // zasubh1 |
| 76150 | 0, // zasubq0 |
| 76151 | 0, // zasubq1 |
| 76152 | 0, // zasubs0 |
| 76153 | 0, // zasubs1 |
| 76154 | 308, // zsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76155 | 308, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76156 | 308, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76157 | 308, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76158 | 308, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76159 | 308, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76160 | 0, // zasubd1_then_zasubq0 |
| 76161 | 0, // zasubd1_then_zasubq1 |
| 76162 | 0, // zasubs1_then_zasubd0 |
| 76163 | 0, // zasubs1_then_zasubd1 |
| 76164 | 0, // zasubs1_then_zasubq0 |
| 76165 | 0, // zasubs1_then_zasubq1 |
| 76166 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76167 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76168 | 0, // zasubh1_then_zasubd0 |
| 76169 | 0, // zasubh1_then_zasubd1 |
| 76170 | 0, // zasubh1_then_zasubq0 |
| 76171 | 0, // zasubh1_then_zasubq1 |
| 76172 | 0, // zasubh1_then_zasubs0 |
| 76173 | 0, // zasubh1_then_zasubs1 |
| 76174 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76175 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76176 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76177 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76178 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76179 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76180 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76181 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76182 | 308, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76183 | 308, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76184 | 308, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76185 | 308, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76186 | 308, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76187 | 308, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76188 | 308, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76189 | 308, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76190 | 308, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76191 | 308, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76192 | 308, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76193 | 308, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76194 | 308, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76195 | 308, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76196 | 308, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76197 | 308, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76198 | 308, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76199 | 308, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76200 | 0, // psub1_then_psub |
| 76201 | 308, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76202 | 308, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76203 | 308, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76204 | 0, // x8sub_7_then_sub_32 |
| 76205 | 0, // x8sub_7_then_sub_32_hi |
| 76206 | 0, // x8sub_6_then_sub_32 |
| 76207 | 0, // x8sub_6_then_sub_32_hi |
| 76208 | 0, // x8sub_5_then_sub_32 |
| 76209 | 0, // x8sub_5_then_sub_32_hi |
| 76210 | 0, // x8sub_4_then_sub_32 |
| 76211 | 0, // x8sub_4_then_sub_32_hi |
| 76212 | 0, // x8sub_3_then_sub_32 |
| 76213 | 0, // x8sub_3_then_sub_32_hi |
| 76214 | 0, // x8sub_2_then_sub_32 |
| 76215 | 0, // x8sub_2_then_sub_32_hi |
| 76216 | 0, // x8sub_1_then_sub_32 |
| 76217 | 0, // x8sub_1_then_sub_32_hi |
| 76218 | 0, // subo64_then_sub_32 |
| 76219 | 0, // subo64_then_sub_32_hi |
| 76220 | 308, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76221 | 308, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76222 | 308, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76223 | 0, // dsub0_dsub1 |
| 76224 | 0, // dsub0_dsub1_dsub2 |
| 76225 | 308, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76226 | 308, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76227 | 308, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76228 | 308, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76229 | 308, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76230 | 308, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76231 | 0, // qsub0_qsub1 |
| 76232 | 0, // qsub0_qsub1_qsub2 |
| 76233 | 308, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76234 | 308, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76235 | 308, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76236 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76237 | 0, // x8sub_0_x8sub_1 |
| 76238 | 0, // x8sub_2_x8sub_3 |
| 76239 | 0, // x8sub_4_x8sub_5 |
| 76240 | 0, // x8sub_6_x8sub_7 |
| 76241 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76242 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76243 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76244 | 0, // sub_32_subo64_then_sub_32 |
| 76245 | 308, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76246 | 308, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76247 | 308, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76248 | 308, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76249 | 308, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76250 | 308, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76251 | 308, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76252 | 308, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2 |
| 76253 | 0, // zsub0_zsub2 |
| 76254 | 0, // zsub1_zsub3 |
| 76255 | }, |
| 76256 | { // ZPR4_with_zsub_in_FPR128_lo |
| 76257 | 309, // bsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76258 | 309, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76259 | 309, // dsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76260 | 0, // dsub0 |
| 76261 | 309, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76262 | 309, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76263 | 309, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76264 | 309, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76265 | 309, // hsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76266 | 309, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76267 | 0, // psub |
| 76268 | 0, // psub0 |
| 76269 | 0, // psub1 |
| 76270 | 0, // qsub0 |
| 76271 | 309, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76272 | 309, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76273 | 309, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76274 | 309, // ssub -> ZPR4_with_zsub_in_FPR128_lo |
| 76275 | 309, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76276 | 0, // sub_32 |
| 76277 | 0, // sub_32_hi |
| 76278 | 0, // sube32 |
| 76279 | 0, // sube64 |
| 76280 | 0, // subo32 |
| 76281 | 0, // subo64 |
| 76282 | 0, // x8sub_0 |
| 76283 | 0, // x8sub_1 |
| 76284 | 0, // x8sub_2 |
| 76285 | 0, // x8sub_3 |
| 76286 | 0, // x8sub_4 |
| 76287 | 0, // x8sub_5 |
| 76288 | 0, // x8sub_6 |
| 76289 | 0, // x8sub_7 |
| 76290 | 0, // zasubb |
| 76291 | 0, // zasubd0 |
| 76292 | 0, // zasubd1 |
| 76293 | 0, // zasubh0 |
| 76294 | 0, // zasubh1 |
| 76295 | 0, // zasubq0 |
| 76296 | 0, // zasubq1 |
| 76297 | 0, // zasubs0 |
| 76298 | 0, // zasubs1 |
| 76299 | 309, // zsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76300 | 309, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo |
| 76301 | 309, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76302 | 309, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76303 | 309, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76304 | 309, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76305 | 0, // zasubd1_then_zasubq0 |
| 76306 | 0, // zasubd1_then_zasubq1 |
| 76307 | 0, // zasubs1_then_zasubd0 |
| 76308 | 0, // zasubs1_then_zasubd1 |
| 76309 | 0, // zasubs1_then_zasubq0 |
| 76310 | 0, // zasubs1_then_zasubq1 |
| 76311 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76312 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76313 | 0, // zasubh1_then_zasubd0 |
| 76314 | 0, // zasubh1_then_zasubd1 |
| 76315 | 0, // zasubh1_then_zasubq0 |
| 76316 | 0, // zasubh1_then_zasubq1 |
| 76317 | 0, // zasubh1_then_zasubs0 |
| 76318 | 0, // zasubh1_then_zasubs1 |
| 76319 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76320 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76321 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76322 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76323 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76324 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76325 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76326 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76327 | 309, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76328 | 309, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76329 | 309, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76330 | 309, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76331 | 309, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo |
| 76332 | 309, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76333 | 309, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76334 | 309, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76335 | 309, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76336 | 309, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76337 | 309, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo |
| 76338 | 309, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76339 | 309, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76340 | 309, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76341 | 309, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo |
| 76342 | 309, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76343 | 309, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo |
| 76344 | 309, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76345 | 0, // psub1_then_psub |
| 76346 | 309, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76347 | 309, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76348 | 309, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76349 | 0, // x8sub_7_then_sub_32 |
| 76350 | 0, // x8sub_7_then_sub_32_hi |
| 76351 | 0, // x8sub_6_then_sub_32 |
| 76352 | 0, // x8sub_6_then_sub_32_hi |
| 76353 | 0, // x8sub_5_then_sub_32 |
| 76354 | 0, // x8sub_5_then_sub_32_hi |
| 76355 | 0, // x8sub_4_then_sub_32 |
| 76356 | 0, // x8sub_4_then_sub_32_hi |
| 76357 | 0, // x8sub_3_then_sub_32 |
| 76358 | 0, // x8sub_3_then_sub_32_hi |
| 76359 | 0, // x8sub_2_then_sub_32 |
| 76360 | 0, // x8sub_2_then_sub_32_hi |
| 76361 | 0, // x8sub_1_then_sub_32 |
| 76362 | 0, // x8sub_1_then_sub_32_hi |
| 76363 | 0, // subo64_then_sub_32 |
| 76364 | 0, // subo64_then_sub_32_hi |
| 76365 | 309, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76366 | 309, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76367 | 309, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo |
| 76368 | 0, // dsub0_dsub1 |
| 76369 | 0, // dsub0_dsub1_dsub2 |
| 76370 | 309, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76371 | 309, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76372 | 309, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76373 | 309, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76374 | 309, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76375 | 309, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76376 | 0, // qsub0_qsub1 |
| 76377 | 0, // qsub0_qsub1_qsub2 |
| 76378 | 309, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76379 | 309, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76380 | 309, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76381 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76382 | 0, // x8sub_0_x8sub_1 |
| 76383 | 0, // x8sub_2_x8sub_3 |
| 76384 | 0, // x8sub_4_x8sub_5 |
| 76385 | 0, // x8sub_6_x8sub_7 |
| 76386 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76387 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76388 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76389 | 0, // sub_32_subo64_then_sub_32 |
| 76390 | 309, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76391 | 309, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76392 | 309, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76393 | 309, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo |
| 76394 | 309, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76395 | 309, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo |
| 76396 | 309, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76397 | 309, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo |
| 76398 | 0, // zsub0_zsub2 |
| 76399 | 0, // zsub1_zsub3 |
| 76400 | }, |
| 76401 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76402 | 310, // bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76403 | 310, // bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76404 | 310, // dsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76405 | 0, // dsub0 |
| 76406 | 310, // dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76407 | 310, // dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76408 | 310, // dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76409 | 310, // dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76410 | 310, // hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76411 | 310, // hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76412 | 0, // psub |
| 76413 | 0, // psub0 |
| 76414 | 0, // psub1 |
| 76415 | 310, // qsub0 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76416 | 310, // qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76417 | 310, // qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76418 | 310, // qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76419 | 310, // ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76420 | 310, // ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76421 | 0, // sub_32 |
| 76422 | 0, // sub_32_hi |
| 76423 | 0, // sube32 |
| 76424 | 0, // sube64 |
| 76425 | 0, // subo32 |
| 76426 | 0, // subo64 |
| 76427 | 0, // x8sub_0 |
| 76428 | 0, // x8sub_1 |
| 76429 | 0, // x8sub_2 |
| 76430 | 0, // x8sub_3 |
| 76431 | 0, // x8sub_4 |
| 76432 | 0, // x8sub_5 |
| 76433 | 0, // x8sub_6 |
| 76434 | 0, // x8sub_7 |
| 76435 | 0, // zasubb |
| 76436 | 0, // zasubd0 |
| 76437 | 0, // zasubd1 |
| 76438 | 0, // zasubh0 |
| 76439 | 0, // zasubh1 |
| 76440 | 0, // zasubq0 |
| 76441 | 0, // zasubq1 |
| 76442 | 0, // zasubs0 |
| 76443 | 0, // zasubs1 |
| 76444 | 0, // zsub |
| 76445 | 0, // zsub0 |
| 76446 | 0, // zsub1 |
| 76447 | 0, // zsub2 |
| 76448 | 0, // zsub3 |
| 76449 | 0, // zsub_hi |
| 76450 | 0, // zasubd1_then_zasubq0 |
| 76451 | 0, // zasubd1_then_zasubq1 |
| 76452 | 0, // zasubs1_then_zasubd0 |
| 76453 | 0, // zasubs1_then_zasubd1 |
| 76454 | 0, // zasubs1_then_zasubq0 |
| 76455 | 0, // zasubs1_then_zasubq1 |
| 76456 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76457 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76458 | 0, // zasubh1_then_zasubd0 |
| 76459 | 0, // zasubh1_then_zasubd1 |
| 76460 | 0, // zasubh1_then_zasubq0 |
| 76461 | 0, // zasubh1_then_zasubq1 |
| 76462 | 0, // zasubh1_then_zasubs0 |
| 76463 | 0, // zasubh1_then_zasubs1 |
| 76464 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76465 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76466 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76467 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76468 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76469 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76470 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76471 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76472 | 310, // dsub1_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76473 | 310, // dsub1_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76474 | 310, // dsub1_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76475 | 310, // dsub1_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76476 | 310, // dsub1_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76477 | 310, // dsub1_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76478 | 310, // dsub3_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76479 | 310, // dsub3_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76480 | 310, // dsub3_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76481 | 310, // dsub3_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76482 | 310, // dsub3_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76483 | 310, // dsub3_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76484 | 310, // dsub2_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76485 | 310, // dsub2_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76486 | 310, // dsub2_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76487 | 310, // dsub2_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76488 | 310, // dsub2_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76489 | 310, // dsub2_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76490 | 0, // psub1_then_psub |
| 76491 | 310, // qsub1_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76492 | 310, // qsub3_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76493 | 310, // qsub2_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76494 | 0, // x8sub_7_then_sub_32 |
| 76495 | 0, // x8sub_7_then_sub_32_hi |
| 76496 | 0, // x8sub_6_then_sub_32 |
| 76497 | 0, // x8sub_6_then_sub_32_hi |
| 76498 | 0, // x8sub_5_then_sub_32 |
| 76499 | 0, // x8sub_5_then_sub_32_hi |
| 76500 | 0, // x8sub_4_then_sub_32 |
| 76501 | 0, // x8sub_4_then_sub_32_hi |
| 76502 | 0, // x8sub_3_then_sub_32 |
| 76503 | 0, // x8sub_3_then_sub_32_hi |
| 76504 | 0, // x8sub_2_then_sub_32 |
| 76505 | 0, // x8sub_2_then_sub_32_hi |
| 76506 | 0, // x8sub_1_then_sub_32 |
| 76507 | 0, // x8sub_1_then_sub_32_hi |
| 76508 | 0, // subo64_then_sub_32 |
| 76509 | 0, // subo64_then_sub_32_hi |
| 76510 | 0, // zsub1_then_zsub_hi |
| 76511 | 0, // zsub3_then_zsub_hi |
| 76512 | 0, // zsub2_then_zsub_hi |
| 76513 | 0, // dsub0_dsub1 |
| 76514 | 0, // dsub0_dsub1_dsub2 |
| 76515 | 310, // dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76516 | 310, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76517 | 310, // dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76518 | 310, // dsub_dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76519 | 310, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76520 | 310, // dsub_dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76521 | 310, // qsub0_qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76522 | 310, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76523 | 310, // qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76524 | 310, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76525 | 310, // qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 76526 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76527 | 0, // x8sub_0_x8sub_1 |
| 76528 | 0, // x8sub_2_x8sub_3 |
| 76529 | 0, // x8sub_4_x8sub_5 |
| 76530 | 0, // x8sub_6_x8sub_7 |
| 76531 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76532 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76533 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76534 | 0, // sub_32_subo64_then_sub_32 |
| 76535 | 0, // zsub_qsub1 |
| 76536 | 0, // zsub_qsub1_qsub2_qsub3 |
| 76537 | 0, // zsub_qsub1_qsub2 |
| 76538 | 0, // zsub0_zsub1 |
| 76539 | 0, // zsub0_zsub1_zsub2 |
| 76540 | 0, // zsub1_zsub2 |
| 76541 | 0, // zsub1_zsub2_zsub3 |
| 76542 | 0, // zsub2_zsub3 |
| 76543 | 0, // zsub0_zsub2 |
| 76544 | 0, // zsub1_zsub3 |
| 76545 | }, |
| 76546 | { // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76547 | 311, // bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76548 | 311, // bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76549 | 311, // dsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76550 | 0, // dsub0 |
| 76551 | 311, // dsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76552 | 311, // dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76553 | 311, // dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76554 | 311, // dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76555 | 311, // hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76556 | 311, // hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76557 | 0, // psub |
| 76558 | 0, // psub0 |
| 76559 | 0, // psub1 |
| 76560 | 311, // qsub0 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76561 | 311, // qsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76562 | 311, // qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76563 | 311, // qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76564 | 311, // ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76565 | 311, // ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76566 | 0, // sub_32 |
| 76567 | 0, // sub_32_hi |
| 76568 | 0, // sube32 |
| 76569 | 0, // sube64 |
| 76570 | 0, // subo32 |
| 76571 | 0, // subo64 |
| 76572 | 0, // x8sub_0 |
| 76573 | 0, // x8sub_1 |
| 76574 | 0, // x8sub_2 |
| 76575 | 0, // x8sub_3 |
| 76576 | 0, // x8sub_4 |
| 76577 | 0, // x8sub_5 |
| 76578 | 0, // x8sub_6 |
| 76579 | 0, // x8sub_7 |
| 76580 | 0, // zasubb |
| 76581 | 0, // zasubd0 |
| 76582 | 0, // zasubd1 |
| 76583 | 0, // zasubh0 |
| 76584 | 0, // zasubh1 |
| 76585 | 0, // zasubq0 |
| 76586 | 0, // zasubq1 |
| 76587 | 0, // zasubs0 |
| 76588 | 0, // zasubs1 |
| 76589 | 0, // zsub |
| 76590 | 0, // zsub0 |
| 76591 | 0, // zsub1 |
| 76592 | 0, // zsub2 |
| 76593 | 0, // zsub3 |
| 76594 | 0, // zsub_hi |
| 76595 | 0, // zasubd1_then_zasubq0 |
| 76596 | 0, // zasubd1_then_zasubq1 |
| 76597 | 0, // zasubs1_then_zasubd0 |
| 76598 | 0, // zasubs1_then_zasubd1 |
| 76599 | 0, // zasubs1_then_zasubq0 |
| 76600 | 0, // zasubs1_then_zasubq1 |
| 76601 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76602 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76603 | 0, // zasubh1_then_zasubd0 |
| 76604 | 0, // zasubh1_then_zasubd1 |
| 76605 | 0, // zasubh1_then_zasubq0 |
| 76606 | 0, // zasubh1_then_zasubq1 |
| 76607 | 0, // zasubh1_then_zasubs0 |
| 76608 | 0, // zasubh1_then_zasubs1 |
| 76609 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76610 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76611 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76612 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76613 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76614 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76615 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76616 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76617 | 311, // dsub1_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76618 | 311, // dsub1_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76619 | 311, // dsub1_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76620 | 311, // dsub1_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76621 | 311, // dsub1_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76622 | 311, // dsub1_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76623 | 311, // dsub3_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76624 | 311, // dsub3_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76625 | 311, // dsub3_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76626 | 311, // dsub3_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76627 | 311, // dsub3_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76628 | 311, // dsub3_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76629 | 311, // dsub2_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76630 | 311, // dsub2_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76631 | 311, // dsub2_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76632 | 311, // dsub2_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76633 | 311, // dsub2_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76634 | 311, // dsub2_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76635 | 0, // psub1_then_psub |
| 76636 | 311, // qsub1_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76637 | 311, // qsub3_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76638 | 311, // qsub2_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76639 | 0, // x8sub_7_then_sub_32 |
| 76640 | 0, // x8sub_7_then_sub_32_hi |
| 76641 | 0, // x8sub_6_then_sub_32 |
| 76642 | 0, // x8sub_6_then_sub_32_hi |
| 76643 | 0, // x8sub_5_then_sub_32 |
| 76644 | 0, // x8sub_5_then_sub_32_hi |
| 76645 | 0, // x8sub_4_then_sub_32 |
| 76646 | 0, // x8sub_4_then_sub_32_hi |
| 76647 | 0, // x8sub_3_then_sub_32 |
| 76648 | 0, // x8sub_3_then_sub_32_hi |
| 76649 | 0, // x8sub_2_then_sub_32 |
| 76650 | 0, // x8sub_2_then_sub_32_hi |
| 76651 | 0, // x8sub_1_then_sub_32 |
| 76652 | 0, // x8sub_1_then_sub_32_hi |
| 76653 | 0, // subo64_then_sub_32 |
| 76654 | 0, // subo64_then_sub_32_hi |
| 76655 | 0, // zsub1_then_zsub_hi |
| 76656 | 0, // zsub3_then_zsub_hi |
| 76657 | 0, // zsub2_then_zsub_hi |
| 76658 | 0, // dsub0_dsub1 |
| 76659 | 0, // dsub0_dsub1_dsub2 |
| 76660 | 311, // dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76661 | 311, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76662 | 311, // dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76663 | 311, // dsub_dsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76664 | 311, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76665 | 311, // dsub_dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76666 | 311, // qsub0_qsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76667 | 311, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76668 | 311, // qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76669 | 311, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76670 | 311, // qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 76671 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76672 | 0, // x8sub_0_x8sub_1 |
| 76673 | 0, // x8sub_2_x8sub_3 |
| 76674 | 0, // x8sub_4_x8sub_5 |
| 76675 | 0, // x8sub_6_x8sub_7 |
| 76676 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76677 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76678 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76679 | 0, // sub_32_subo64_then_sub_32 |
| 76680 | 0, // zsub_qsub1 |
| 76681 | 0, // zsub_qsub1_qsub2_qsub3 |
| 76682 | 0, // zsub_qsub1_qsub2 |
| 76683 | 0, // zsub0_zsub1 |
| 76684 | 0, // zsub0_zsub1_zsub2 |
| 76685 | 0, // zsub1_zsub2 |
| 76686 | 0, // zsub1_zsub2_zsub3 |
| 76687 | 0, // zsub2_zsub3 |
| 76688 | 0, // zsub0_zsub2 |
| 76689 | 0, // zsub1_zsub3 |
| 76690 | }, |
| 76691 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76692 | 312, // bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76693 | 312, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76694 | 312, // dsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76695 | 0, // dsub0 |
| 76696 | 312, // dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76697 | 312, // dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76698 | 312, // dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76699 | 312, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76700 | 312, // hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76701 | 312, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76702 | 0, // psub |
| 76703 | 0, // psub0 |
| 76704 | 0, // psub1 |
| 76705 | 312, // qsub0 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76706 | 312, // qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76707 | 312, // qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76708 | 312, // qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76709 | 312, // ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76710 | 312, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76711 | 0, // sub_32 |
| 76712 | 0, // sub_32_hi |
| 76713 | 0, // sube32 |
| 76714 | 0, // sube64 |
| 76715 | 0, // subo32 |
| 76716 | 0, // subo64 |
| 76717 | 0, // x8sub_0 |
| 76718 | 0, // x8sub_1 |
| 76719 | 0, // x8sub_2 |
| 76720 | 0, // x8sub_3 |
| 76721 | 0, // x8sub_4 |
| 76722 | 0, // x8sub_5 |
| 76723 | 0, // x8sub_6 |
| 76724 | 0, // x8sub_7 |
| 76725 | 0, // zasubb |
| 76726 | 0, // zasubd0 |
| 76727 | 0, // zasubd1 |
| 76728 | 0, // zasubh0 |
| 76729 | 0, // zasubh1 |
| 76730 | 0, // zasubq0 |
| 76731 | 0, // zasubq1 |
| 76732 | 0, // zasubs0 |
| 76733 | 0, // zasubs1 |
| 76734 | 0, // zsub |
| 76735 | 0, // zsub0 |
| 76736 | 0, // zsub1 |
| 76737 | 0, // zsub2 |
| 76738 | 0, // zsub3 |
| 76739 | 0, // zsub_hi |
| 76740 | 0, // zasubd1_then_zasubq0 |
| 76741 | 0, // zasubd1_then_zasubq1 |
| 76742 | 0, // zasubs1_then_zasubd0 |
| 76743 | 0, // zasubs1_then_zasubd1 |
| 76744 | 0, // zasubs1_then_zasubq0 |
| 76745 | 0, // zasubs1_then_zasubq1 |
| 76746 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76747 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76748 | 0, // zasubh1_then_zasubd0 |
| 76749 | 0, // zasubh1_then_zasubd1 |
| 76750 | 0, // zasubh1_then_zasubq0 |
| 76751 | 0, // zasubh1_then_zasubq1 |
| 76752 | 0, // zasubh1_then_zasubs0 |
| 76753 | 0, // zasubh1_then_zasubs1 |
| 76754 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76755 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76756 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76757 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76758 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76759 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76760 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76761 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76762 | 312, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76763 | 312, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76764 | 312, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76765 | 312, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76766 | 312, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76767 | 312, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76768 | 312, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76769 | 312, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76770 | 312, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76771 | 312, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76772 | 312, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76773 | 312, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76774 | 312, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76775 | 312, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76776 | 312, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76777 | 312, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76778 | 312, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76779 | 312, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76780 | 0, // psub1_then_psub |
| 76781 | 312, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76782 | 312, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76783 | 312, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76784 | 0, // x8sub_7_then_sub_32 |
| 76785 | 0, // x8sub_7_then_sub_32_hi |
| 76786 | 0, // x8sub_6_then_sub_32 |
| 76787 | 0, // x8sub_6_then_sub_32_hi |
| 76788 | 0, // x8sub_5_then_sub_32 |
| 76789 | 0, // x8sub_5_then_sub_32_hi |
| 76790 | 0, // x8sub_4_then_sub_32 |
| 76791 | 0, // x8sub_4_then_sub_32_hi |
| 76792 | 0, // x8sub_3_then_sub_32 |
| 76793 | 0, // x8sub_3_then_sub_32_hi |
| 76794 | 0, // x8sub_2_then_sub_32 |
| 76795 | 0, // x8sub_2_then_sub_32_hi |
| 76796 | 0, // x8sub_1_then_sub_32 |
| 76797 | 0, // x8sub_1_then_sub_32_hi |
| 76798 | 0, // subo64_then_sub_32 |
| 76799 | 0, // subo64_then_sub_32_hi |
| 76800 | 0, // zsub1_then_zsub_hi |
| 76801 | 0, // zsub3_then_zsub_hi |
| 76802 | 0, // zsub2_then_zsub_hi |
| 76803 | 0, // dsub0_dsub1 |
| 76804 | 0, // dsub0_dsub1_dsub2 |
| 76805 | 312, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76806 | 312, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76807 | 312, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76808 | 312, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76809 | 312, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76810 | 312, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76811 | 312, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76812 | 312, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76813 | 312, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76814 | 312, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76815 | 312, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 76816 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76817 | 0, // x8sub_0_x8sub_1 |
| 76818 | 0, // x8sub_2_x8sub_3 |
| 76819 | 0, // x8sub_4_x8sub_5 |
| 76820 | 0, // x8sub_6_x8sub_7 |
| 76821 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76822 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76823 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76824 | 0, // sub_32_subo64_then_sub_32 |
| 76825 | 0, // zsub_qsub1 |
| 76826 | 0, // zsub_qsub1_qsub2_qsub3 |
| 76827 | 0, // zsub_qsub1_qsub2 |
| 76828 | 0, // zsub0_zsub1 |
| 76829 | 0, // zsub0_zsub1_zsub2 |
| 76830 | 0, // zsub1_zsub2 |
| 76831 | 0, // zsub1_zsub2_zsub3 |
| 76832 | 0, // zsub2_zsub3 |
| 76833 | 0, // zsub0_zsub2 |
| 76834 | 0, // zsub1_zsub3 |
| 76835 | }, |
| 76836 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76837 | 313, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76838 | 313, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76839 | 313, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76840 | 0, // dsub0 |
| 76841 | 313, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76842 | 313, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76843 | 313, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76844 | 313, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76845 | 313, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76846 | 313, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76847 | 0, // psub |
| 76848 | 0, // psub0 |
| 76849 | 0, // psub1 |
| 76850 | 0, // qsub0 |
| 76851 | 313, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76852 | 313, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76853 | 313, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76854 | 313, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76855 | 313, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76856 | 0, // sub_32 |
| 76857 | 0, // sub_32_hi |
| 76858 | 0, // sube32 |
| 76859 | 0, // sube64 |
| 76860 | 0, // subo32 |
| 76861 | 0, // subo64 |
| 76862 | 0, // x8sub_0 |
| 76863 | 0, // x8sub_1 |
| 76864 | 0, // x8sub_2 |
| 76865 | 0, // x8sub_3 |
| 76866 | 0, // x8sub_4 |
| 76867 | 0, // x8sub_5 |
| 76868 | 0, // x8sub_6 |
| 76869 | 0, // x8sub_7 |
| 76870 | 0, // zasubb |
| 76871 | 0, // zasubd0 |
| 76872 | 0, // zasubd1 |
| 76873 | 0, // zasubh0 |
| 76874 | 0, // zasubh1 |
| 76875 | 0, // zasubq0 |
| 76876 | 0, // zasubq1 |
| 76877 | 0, // zasubs0 |
| 76878 | 0, // zasubs1 |
| 76879 | 313, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76880 | 313, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76881 | 313, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76882 | 313, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76883 | 313, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76884 | 313, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76885 | 0, // zasubd1_then_zasubq0 |
| 76886 | 0, // zasubd1_then_zasubq1 |
| 76887 | 0, // zasubs1_then_zasubd0 |
| 76888 | 0, // zasubs1_then_zasubd1 |
| 76889 | 0, // zasubs1_then_zasubq0 |
| 76890 | 0, // zasubs1_then_zasubq1 |
| 76891 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 76892 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 76893 | 0, // zasubh1_then_zasubd0 |
| 76894 | 0, // zasubh1_then_zasubd1 |
| 76895 | 0, // zasubh1_then_zasubq0 |
| 76896 | 0, // zasubh1_then_zasubq1 |
| 76897 | 0, // zasubh1_then_zasubs0 |
| 76898 | 0, // zasubh1_then_zasubs1 |
| 76899 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 76900 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 76901 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 76902 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 76903 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 76904 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 76905 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 76906 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 76907 | 313, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76908 | 313, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76909 | 313, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76910 | 313, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76911 | 313, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76912 | 313, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76913 | 313, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76914 | 313, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76915 | 313, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76916 | 313, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76917 | 313, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76918 | 313, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76919 | 313, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76920 | 313, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76921 | 313, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76922 | 313, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76923 | 313, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76924 | 313, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76925 | 0, // psub1_then_psub |
| 76926 | 313, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76927 | 313, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76928 | 313, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76929 | 0, // x8sub_7_then_sub_32 |
| 76930 | 0, // x8sub_7_then_sub_32_hi |
| 76931 | 0, // x8sub_6_then_sub_32 |
| 76932 | 0, // x8sub_6_then_sub_32_hi |
| 76933 | 0, // x8sub_5_then_sub_32 |
| 76934 | 0, // x8sub_5_then_sub_32_hi |
| 76935 | 0, // x8sub_4_then_sub_32 |
| 76936 | 0, // x8sub_4_then_sub_32_hi |
| 76937 | 0, // x8sub_3_then_sub_32 |
| 76938 | 0, // x8sub_3_then_sub_32_hi |
| 76939 | 0, // x8sub_2_then_sub_32 |
| 76940 | 0, // x8sub_2_then_sub_32_hi |
| 76941 | 0, // x8sub_1_then_sub_32 |
| 76942 | 0, // x8sub_1_then_sub_32_hi |
| 76943 | 0, // subo64_then_sub_32 |
| 76944 | 0, // subo64_then_sub_32_hi |
| 76945 | 313, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76946 | 313, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76947 | 313, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76948 | 0, // dsub0_dsub1 |
| 76949 | 0, // dsub0_dsub1_dsub2 |
| 76950 | 313, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76951 | 313, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76952 | 313, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76953 | 313, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76954 | 313, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76955 | 313, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76956 | 0, // qsub0_qsub1 |
| 76957 | 0, // qsub0_qsub1_qsub2 |
| 76958 | 313, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76959 | 313, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76960 | 313, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76961 | 0, // sub_32_x8sub_1_then_sub_32 |
| 76962 | 0, // x8sub_0_x8sub_1 |
| 76963 | 0, // x8sub_2_x8sub_3 |
| 76964 | 0, // x8sub_4_x8sub_5 |
| 76965 | 0, // x8sub_6_x8sub_7 |
| 76966 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 76967 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 76968 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 76969 | 0, // sub_32_subo64_then_sub_32 |
| 76970 | 313, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76971 | 313, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76972 | 313, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76973 | 313, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76974 | 313, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76975 | 313, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76976 | 313, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76977 | 313, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 76978 | 0, // zsub0_zsub2 |
| 76979 | 0, // zsub1_zsub3 |
| 76980 | }, |
| 76981 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76982 | 314, // bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76983 | 314, // bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76984 | 314, // dsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76985 | 0, // dsub0 |
| 76986 | 314, // dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76987 | 314, // dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76988 | 314, // dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76989 | 314, // dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76990 | 314, // hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76991 | 314, // hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76992 | 0, // psub |
| 76993 | 0, // psub0 |
| 76994 | 0, // psub1 |
| 76995 | 0, // qsub0 |
| 76996 | 314, // qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76997 | 314, // qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76998 | 314, // qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 76999 | 314, // ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77000 | 314, // ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77001 | 0, // sub_32 |
| 77002 | 0, // sub_32_hi |
| 77003 | 0, // sube32 |
| 77004 | 0, // sube64 |
| 77005 | 0, // subo32 |
| 77006 | 0, // subo64 |
| 77007 | 0, // x8sub_0 |
| 77008 | 0, // x8sub_1 |
| 77009 | 0, // x8sub_2 |
| 77010 | 0, // x8sub_3 |
| 77011 | 0, // x8sub_4 |
| 77012 | 0, // x8sub_5 |
| 77013 | 0, // x8sub_6 |
| 77014 | 0, // x8sub_7 |
| 77015 | 0, // zasubb |
| 77016 | 0, // zasubd0 |
| 77017 | 0, // zasubd1 |
| 77018 | 0, // zasubh0 |
| 77019 | 0, // zasubh1 |
| 77020 | 0, // zasubq0 |
| 77021 | 0, // zasubq1 |
| 77022 | 0, // zasubs0 |
| 77023 | 0, // zasubs1 |
| 77024 | 314, // zsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77025 | 314, // zsub0 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77026 | 314, // zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77027 | 314, // zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77028 | 314, // zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77029 | 314, // zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77030 | 0, // zasubd1_then_zasubq0 |
| 77031 | 0, // zasubd1_then_zasubq1 |
| 77032 | 0, // zasubs1_then_zasubd0 |
| 77033 | 0, // zasubs1_then_zasubd1 |
| 77034 | 0, // zasubs1_then_zasubq0 |
| 77035 | 0, // zasubs1_then_zasubq1 |
| 77036 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77037 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77038 | 0, // zasubh1_then_zasubd0 |
| 77039 | 0, // zasubh1_then_zasubd1 |
| 77040 | 0, // zasubh1_then_zasubq0 |
| 77041 | 0, // zasubh1_then_zasubq1 |
| 77042 | 0, // zasubh1_then_zasubs0 |
| 77043 | 0, // zasubh1_then_zasubs1 |
| 77044 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77045 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77046 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77047 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77048 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77049 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77050 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77051 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77052 | 314, // dsub1_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77053 | 314, // dsub1_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77054 | 314, // dsub1_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77055 | 314, // dsub1_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77056 | 314, // dsub1_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77057 | 314, // dsub1_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77058 | 314, // dsub3_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77059 | 314, // dsub3_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77060 | 314, // dsub3_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77061 | 314, // dsub3_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77062 | 314, // dsub3_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77063 | 314, // dsub3_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77064 | 314, // dsub2_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77065 | 314, // dsub2_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77066 | 314, // dsub2_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77067 | 314, // dsub2_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77068 | 314, // dsub2_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77069 | 314, // dsub2_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77070 | 0, // psub1_then_psub |
| 77071 | 314, // qsub1_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77072 | 314, // qsub3_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77073 | 314, // qsub2_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77074 | 0, // x8sub_7_then_sub_32 |
| 77075 | 0, // x8sub_7_then_sub_32_hi |
| 77076 | 0, // x8sub_6_then_sub_32 |
| 77077 | 0, // x8sub_6_then_sub_32_hi |
| 77078 | 0, // x8sub_5_then_sub_32 |
| 77079 | 0, // x8sub_5_then_sub_32_hi |
| 77080 | 0, // x8sub_4_then_sub_32 |
| 77081 | 0, // x8sub_4_then_sub_32_hi |
| 77082 | 0, // x8sub_3_then_sub_32 |
| 77083 | 0, // x8sub_3_then_sub_32_hi |
| 77084 | 0, // x8sub_2_then_sub_32 |
| 77085 | 0, // x8sub_2_then_sub_32_hi |
| 77086 | 0, // x8sub_1_then_sub_32 |
| 77087 | 0, // x8sub_1_then_sub_32_hi |
| 77088 | 0, // subo64_then_sub_32 |
| 77089 | 0, // subo64_then_sub_32_hi |
| 77090 | 314, // zsub1_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77091 | 314, // zsub3_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77092 | 314, // zsub2_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77093 | 0, // dsub0_dsub1 |
| 77094 | 0, // dsub0_dsub1_dsub2 |
| 77095 | 314, // dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77096 | 314, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77097 | 314, // dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77098 | 314, // dsub_dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77099 | 314, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77100 | 314, // dsub_dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77101 | 0, // qsub0_qsub1 |
| 77102 | 0, // qsub0_qsub1_qsub2 |
| 77103 | 314, // qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77104 | 314, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77105 | 314, // qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77106 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77107 | 0, // x8sub_0_x8sub_1 |
| 77108 | 0, // x8sub_2_x8sub_3 |
| 77109 | 0, // x8sub_4_x8sub_5 |
| 77110 | 0, // x8sub_6_x8sub_7 |
| 77111 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77112 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77113 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77114 | 0, // sub_32_subo64_then_sub_32 |
| 77115 | 314, // zsub_qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77116 | 314, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77117 | 314, // zsub_qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77118 | 314, // zsub0_zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77119 | 314, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77120 | 314, // zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77121 | 314, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77122 | 314, // zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77123 | 0, // zsub0_zsub2 |
| 77124 | 0, // zsub1_zsub3 |
| 77125 | }, |
| 77126 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77127 | 315, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77128 | 315, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77129 | 315, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77130 | 0, // dsub0 |
| 77131 | 315, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77132 | 315, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77133 | 315, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77134 | 315, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77135 | 315, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77136 | 315, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77137 | 0, // psub |
| 77138 | 0, // psub0 |
| 77139 | 0, // psub1 |
| 77140 | 0, // qsub0 |
| 77141 | 315, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77142 | 315, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77143 | 315, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77144 | 315, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77145 | 315, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77146 | 0, // sub_32 |
| 77147 | 0, // sub_32_hi |
| 77148 | 0, // sube32 |
| 77149 | 0, // sube64 |
| 77150 | 0, // subo32 |
| 77151 | 0, // subo64 |
| 77152 | 0, // x8sub_0 |
| 77153 | 0, // x8sub_1 |
| 77154 | 0, // x8sub_2 |
| 77155 | 0, // x8sub_3 |
| 77156 | 0, // x8sub_4 |
| 77157 | 0, // x8sub_5 |
| 77158 | 0, // x8sub_6 |
| 77159 | 0, // x8sub_7 |
| 77160 | 0, // zasubb |
| 77161 | 0, // zasubd0 |
| 77162 | 0, // zasubd1 |
| 77163 | 0, // zasubh0 |
| 77164 | 0, // zasubh1 |
| 77165 | 0, // zasubq0 |
| 77166 | 0, // zasubq1 |
| 77167 | 0, // zasubs0 |
| 77168 | 0, // zasubs1 |
| 77169 | 315, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77170 | 315, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77171 | 315, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77172 | 315, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77173 | 315, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77174 | 315, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77175 | 0, // zasubd1_then_zasubq0 |
| 77176 | 0, // zasubd1_then_zasubq1 |
| 77177 | 0, // zasubs1_then_zasubd0 |
| 77178 | 0, // zasubs1_then_zasubd1 |
| 77179 | 0, // zasubs1_then_zasubq0 |
| 77180 | 0, // zasubs1_then_zasubq1 |
| 77181 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77182 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77183 | 0, // zasubh1_then_zasubd0 |
| 77184 | 0, // zasubh1_then_zasubd1 |
| 77185 | 0, // zasubh1_then_zasubq0 |
| 77186 | 0, // zasubh1_then_zasubq1 |
| 77187 | 0, // zasubh1_then_zasubs0 |
| 77188 | 0, // zasubh1_then_zasubs1 |
| 77189 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77190 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77191 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77192 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77193 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77194 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77195 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77196 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77197 | 315, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77198 | 315, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77199 | 315, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77200 | 315, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77201 | 315, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77202 | 315, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77203 | 315, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77204 | 315, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77205 | 315, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77206 | 315, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77207 | 315, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77208 | 315, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77209 | 315, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77210 | 315, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77211 | 315, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77212 | 315, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77213 | 315, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77214 | 315, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77215 | 0, // psub1_then_psub |
| 77216 | 315, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77217 | 315, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77218 | 315, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77219 | 0, // x8sub_7_then_sub_32 |
| 77220 | 0, // x8sub_7_then_sub_32_hi |
| 77221 | 0, // x8sub_6_then_sub_32 |
| 77222 | 0, // x8sub_6_then_sub_32_hi |
| 77223 | 0, // x8sub_5_then_sub_32 |
| 77224 | 0, // x8sub_5_then_sub_32_hi |
| 77225 | 0, // x8sub_4_then_sub_32 |
| 77226 | 0, // x8sub_4_then_sub_32_hi |
| 77227 | 0, // x8sub_3_then_sub_32 |
| 77228 | 0, // x8sub_3_then_sub_32_hi |
| 77229 | 0, // x8sub_2_then_sub_32 |
| 77230 | 0, // x8sub_2_then_sub_32_hi |
| 77231 | 0, // x8sub_1_then_sub_32 |
| 77232 | 0, // x8sub_1_then_sub_32_hi |
| 77233 | 0, // subo64_then_sub_32 |
| 77234 | 0, // subo64_then_sub_32_hi |
| 77235 | 315, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77236 | 315, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77237 | 315, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77238 | 0, // dsub0_dsub1 |
| 77239 | 0, // dsub0_dsub1_dsub2 |
| 77240 | 315, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77241 | 315, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77242 | 315, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77243 | 315, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77244 | 315, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77245 | 315, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77246 | 0, // qsub0_qsub1 |
| 77247 | 0, // qsub0_qsub1_qsub2 |
| 77248 | 315, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77249 | 315, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77250 | 315, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77251 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77252 | 0, // x8sub_0_x8sub_1 |
| 77253 | 0, // x8sub_2_x8sub_3 |
| 77254 | 0, // x8sub_4_x8sub_5 |
| 77255 | 0, // x8sub_6_x8sub_7 |
| 77256 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77257 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77258 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77259 | 0, // sub_32_subo64_then_sub_32 |
| 77260 | 315, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77261 | 315, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77262 | 315, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77263 | 315, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77264 | 315, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77265 | 315, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77266 | 315, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77267 | 315, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 77268 | 0, // zsub0_zsub2 |
| 77269 | 0, // zsub1_zsub3 |
| 77270 | }, |
| 77271 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77272 | 316, // bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77273 | 316, // bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77274 | 316, // dsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77275 | 0, // dsub0 |
| 77276 | 316, // dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77277 | 316, // dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77278 | 316, // dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77279 | 316, // dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77280 | 316, // hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77281 | 316, // hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77282 | 0, // psub |
| 77283 | 0, // psub0 |
| 77284 | 0, // psub1 |
| 77285 | 316, // qsub0 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77286 | 316, // qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77287 | 316, // qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77288 | 316, // qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77289 | 316, // ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77290 | 316, // ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77291 | 0, // sub_32 |
| 77292 | 0, // sub_32_hi |
| 77293 | 0, // sube32 |
| 77294 | 0, // sube64 |
| 77295 | 0, // subo32 |
| 77296 | 0, // subo64 |
| 77297 | 0, // x8sub_0 |
| 77298 | 0, // x8sub_1 |
| 77299 | 0, // x8sub_2 |
| 77300 | 0, // x8sub_3 |
| 77301 | 0, // x8sub_4 |
| 77302 | 0, // x8sub_5 |
| 77303 | 0, // x8sub_6 |
| 77304 | 0, // x8sub_7 |
| 77305 | 0, // zasubb |
| 77306 | 0, // zasubd0 |
| 77307 | 0, // zasubd1 |
| 77308 | 0, // zasubh0 |
| 77309 | 0, // zasubh1 |
| 77310 | 0, // zasubq0 |
| 77311 | 0, // zasubq1 |
| 77312 | 0, // zasubs0 |
| 77313 | 0, // zasubs1 |
| 77314 | 0, // zsub |
| 77315 | 0, // zsub0 |
| 77316 | 0, // zsub1 |
| 77317 | 0, // zsub2 |
| 77318 | 0, // zsub3 |
| 77319 | 0, // zsub_hi |
| 77320 | 0, // zasubd1_then_zasubq0 |
| 77321 | 0, // zasubd1_then_zasubq1 |
| 77322 | 0, // zasubs1_then_zasubd0 |
| 77323 | 0, // zasubs1_then_zasubd1 |
| 77324 | 0, // zasubs1_then_zasubq0 |
| 77325 | 0, // zasubs1_then_zasubq1 |
| 77326 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77327 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77328 | 0, // zasubh1_then_zasubd0 |
| 77329 | 0, // zasubh1_then_zasubd1 |
| 77330 | 0, // zasubh1_then_zasubq0 |
| 77331 | 0, // zasubh1_then_zasubq1 |
| 77332 | 0, // zasubh1_then_zasubs0 |
| 77333 | 0, // zasubh1_then_zasubs1 |
| 77334 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77335 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77336 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77337 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77338 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77339 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77340 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77341 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77342 | 316, // dsub1_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77343 | 316, // dsub1_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77344 | 316, // dsub1_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77345 | 316, // dsub1_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77346 | 316, // dsub1_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77347 | 316, // dsub1_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77348 | 316, // dsub3_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77349 | 316, // dsub3_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77350 | 316, // dsub3_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77351 | 316, // dsub3_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77352 | 316, // dsub3_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77353 | 316, // dsub3_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77354 | 316, // dsub2_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77355 | 316, // dsub2_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77356 | 316, // dsub2_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77357 | 316, // dsub2_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77358 | 316, // dsub2_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77359 | 316, // dsub2_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77360 | 0, // psub1_then_psub |
| 77361 | 316, // qsub1_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77362 | 316, // qsub3_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77363 | 316, // qsub2_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77364 | 0, // x8sub_7_then_sub_32 |
| 77365 | 0, // x8sub_7_then_sub_32_hi |
| 77366 | 0, // x8sub_6_then_sub_32 |
| 77367 | 0, // x8sub_6_then_sub_32_hi |
| 77368 | 0, // x8sub_5_then_sub_32 |
| 77369 | 0, // x8sub_5_then_sub_32_hi |
| 77370 | 0, // x8sub_4_then_sub_32 |
| 77371 | 0, // x8sub_4_then_sub_32_hi |
| 77372 | 0, // x8sub_3_then_sub_32 |
| 77373 | 0, // x8sub_3_then_sub_32_hi |
| 77374 | 0, // x8sub_2_then_sub_32 |
| 77375 | 0, // x8sub_2_then_sub_32_hi |
| 77376 | 0, // x8sub_1_then_sub_32 |
| 77377 | 0, // x8sub_1_then_sub_32_hi |
| 77378 | 0, // subo64_then_sub_32 |
| 77379 | 0, // subo64_then_sub_32_hi |
| 77380 | 0, // zsub1_then_zsub_hi |
| 77381 | 0, // zsub3_then_zsub_hi |
| 77382 | 0, // zsub2_then_zsub_hi |
| 77383 | 0, // dsub0_dsub1 |
| 77384 | 0, // dsub0_dsub1_dsub2 |
| 77385 | 316, // dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77386 | 316, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77387 | 316, // dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77388 | 316, // dsub_dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77389 | 316, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77390 | 316, // dsub_dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77391 | 316, // qsub0_qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77392 | 316, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77393 | 316, // qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77394 | 316, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77395 | 316, // qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77396 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77397 | 0, // x8sub_0_x8sub_1 |
| 77398 | 0, // x8sub_2_x8sub_3 |
| 77399 | 0, // x8sub_4_x8sub_5 |
| 77400 | 0, // x8sub_6_x8sub_7 |
| 77401 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77402 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77403 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77404 | 0, // sub_32_subo64_then_sub_32 |
| 77405 | 0, // zsub_qsub1 |
| 77406 | 0, // zsub_qsub1_qsub2_qsub3 |
| 77407 | 0, // zsub_qsub1_qsub2 |
| 77408 | 0, // zsub0_zsub1 |
| 77409 | 0, // zsub0_zsub1_zsub2 |
| 77410 | 0, // zsub1_zsub2 |
| 77411 | 0, // zsub1_zsub2_zsub3 |
| 77412 | 0, // zsub2_zsub3 |
| 77413 | 0, // zsub0_zsub2 |
| 77414 | 0, // zsub1_zsub3 |
| 77415 | }, |
| 77416 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77417 | 317, // bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77418 | 317, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77419 | 317, // dsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77420 | 0, // dsub0 |
| 77421 | 317, // dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77422 | 317, // dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77423 | 317, // dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77424 | 317, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77425 | 317, // hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77426 | 317, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77427 | 0, // psub |
| 77428 | 0, // psub0 |
| 77429 | 0, // psub1 |
| 77430 | 317, // qsub0 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77431 | 317, // qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77432 | 317, // qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77433 | 317, // qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77434 | 317, // ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77435 | 317, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77436 | 0, // sub_32 |
| 77437 | 0, // sub_32_hi |
| 77438 | 0, // sube32 |
| 77439 | 0, // sube64 |
| 77440 | 0, // subo32 |
| 77441 | 0, // subo64 |
| 77442 | 0, // x8sub_0 |
| 77443 | 0, // x8sub_1 |
| 77444 | 0, // x8sub_2 |
| 77445 | 0, // x8sub_3 |
| 77446 | 0, // x8sub_4 |
| 77447 | 0, // x8sub_5 |
| 77448 | 0, // x8sub_6 |
| 77449 | 0, // x8sub_7 |
| 77450 | 0, // zasubb |
| 77451 | 0, // zasubd0 |
| 77452 | 0, // zasubd1 |
| 77453 | 0, // zasubh0 |
| 77454 | 0, // zasubh1 |
| 77455 | 0, // zasubq0 |
| 77456 | 0, // zasubq1 |
| 77457 | 0, // zasubs0 |
| 77458 | 0, // zasubs1 |
| 77459 | 0, // zsub |
| 77460 | 0, // zsub0 |
| 77461 | 0, // zsub1 |
| 77462 | 0, // zsub2 |
| 77463 | 0, // zsub3 |
| 77464 | 0, // zsub_hi |
| 77465 | 0, // zasubd1_then_zasubq0 |
| 77466 | 0, // zasubd1_then_zasubq1 |
| 77467 | 0, // zasubs1_then_zasubd0 |
| 77468 | 0, // zasubs1_then_zasubd1 |
| 77469 | 0, // zasubs1_then_zasubq0 |
| 77470 | 0, // zasubs1_then_zasubq1 |
| 77471 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77472 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77473 | 0, // zasubh1_then_zasubd0 |
| 77474 | 0, // zasubh1_then_zasubd1 |
| 77475 | 0, // zasubh1_then_zasubq0 |
| 77476 | 0, // zasubh1_then_zasubq1 |
| 77477 | 0, // zasubh1_then_zasubs0 |
| 77478 | 0, // zasubh1_then_zasubs1 |
| 77479 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77480 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77481 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77482 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77483 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77484 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77485 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77486 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77487 | 317, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77488 | 317, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77489 | 317, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77490 | 317, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77491 | 317, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77492 | 317, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77493 | 317, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77494 | 317, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77495 | 317, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77496 | 317, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77497 | 317, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77498 | 317, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77499 | 317, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77500 | 317, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77501 | 317, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77502 | 317, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77503 | 317, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77504 | 317, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77505 | 0, // psub1_then_psub |
| 77506 | 317, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77507 | 317, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77508 | 317, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77509 | 0, // x8sub_7_then_sub_32 |
| 77510 | 0, // x8sub_7_then_sub_32_hi |
| 77511 | 0, // x8sub_6_then_sub_32 |
| 77512 | 0, // x8sub_6_then_sub_32_hi |
| 77513 | 0, // x8sub_5_then_sub_32 |
| 77514 | 0, // x8sub_5_then_sub_32_hi |
| 77515 | 0, // x8sub_4_then_sub_32 |
| 77516 | 0, // x8sub_4_then_sub_32_hi |
| 77517 | 0, // x8sub_3_then_sub_32 |
| 77518 | 0, // x8sub_3_then_sub_32_hi |
| 77519 | 0, // x8sub_2_then_sub_32 |
| 77520 | 0, // x8sub_2_then_sub_32_hi |
| 77521 | 0, // x8sub_1_then_sub_32 |
| 77522 | 0, // x8sub_1_then_sub_32_hi |
| 77523 | 0, // subo64_then_sub_32 |
| 77524 | 0, // subo64_then_sub_32_hi |
| 77525 | 0, // zsub1_then_zsub_hi |
| 77526 | 0, // zsub3_then_zsub_hi |
| 77527 | 0, // zsub2_then_zsub_hi |
| 77528 | 0, // dsub0_dsub1 |
| 77529 | 0, // dsub0_dsub1_dsub2 |
| 77530 | 317, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77531 | 317, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77532 | 317, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77533 | 317, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77534 | 317, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77535 | 317, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77536 | 317, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77537 | 317, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77538 | 317, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77539 | 317, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77540 | 317, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 77541 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77542 | 0, // x8sub_0_x8sub_1 |
| 77543 | 0, // x8sub_2_x8sub_3 |
| 77544 | 0, // x8sub_4_x8sub_5 |
| 77545 | 0, // x8sub_6_x8sub_7 |
| 77546 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77547 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77548 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77549 | 0, // sub_32_subo64_then_sub_32 |
| 77550 | 0, // zsub_qsub1 |
| 77551 | 0, // zsub_qsub1_qsub2_qsub3 |
| 77552 | 0, // zsub_qsub1_qsub2 |
| 77553 | 0, // zsub0_zsub1 |
| 77554 | 0, // zsub0_zsub1_zsub2 |
| 77555 | 0, // zsub1_zsub2 |
| 77556 | 0, // zsub1_zsub2_zsub3 |
| 77557 | 0, // zsub2_zsub3 |
| 77558 | 0, // zsub0_zsub2 |
| 77559 | 0, // zsub1_zsub3 |
| 77560 | }, |
| 77561 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77562 | 318, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77563 | 318, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77564 | 318, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77565 | 0, // dsub0 |
| 77566 | 318, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77567 | 318, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77568 | 318, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77569 | 318, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77570 | 318, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77571 | 318, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77572 | 0, // psub |
| 77573 | 0, // psub0 |
| 77574 | 0, // psub1 |
| 77575 | 0, // qsub0 |
| 77576 | 318, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77577 | 318, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77578 | 318, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77579 | 318, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77580 | 318, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77581 | 0, // sub_32 |
| 77582 | 0, // sub_32_hi |
| 77583 | 0, // sube32 |
| 77584 | 0, // sube64 |
| 77585 | 0, // subo32 |
| 77586 | 0, // subo64 |
| 77587 | 0, // x8sub_0 |
| 77588 | 0, // x8sub_1 |
| 77589 | 0, // x8sub_2 |
| 77590 | 0, // x8sub_3 |
| 77591 | 0, // x8sub_4 |
| 77592 | 0, // x8sub_5 |
| 77593 | 0, // x8sub_6 |
| 77594 | 0, // x8sub_7 |
| 77595 | 0, // zasubb |
| 77596 | 0, // zasubd0 |
| 77597 | 0, // zasubd1 |
| 77598 | 0, // zasubh0 |
| 77599 | 0, // zasubh1 |
| 77600 | 0, // zasubq0 |
| 77601 | 0, // zasubq1 |
| 77602 | 0, // zasubs0 |
| 77603 | 0, // zasubs1 |
| 77604 | 318, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77605 | 318, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77606 | 318, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77607 | 318, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77608 | 318, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77609 | 318, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77610 | 0, // zasubd1_then_zasubq0 |
| 77611 | 0, // zasubd1_then_zasubq1 |
| 77612 | 0, // zasubs1_then_zasubd0 |
| 77613 | 0, // zasubs1_then_zasubd1 |
| 77614 | 0, // zasubs1_then_zasubq0 |
| 77615 | 0, // zasubs1_then_zasubq1 |
| 77616 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77617 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77618 | 0, // zasubh1_then_zasubd0 |
| 77619 | 0, // zasubh1_then_zasubd1 |
| 77620 | 0, // zasubh1_then_zasubq0 |
| 77621 | 0, // zasubh1_then_zasubq1 |
| 77622 | 0, // zasubh1_then_zasubs0 |
| 77623 | 0, // zasubh1_then_zasubs1 |
| 77624 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77625 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77626 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77627 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77628 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77629 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77630 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77631 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77632 | 318, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77633 | 318, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77634 | 318, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77635 | 318, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77636 | 318, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77637 | 318, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77638 | 318, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77639 | 318, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77640 | 318, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77641 | 318, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77642 | 318, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77643 | 318, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77644 | 318, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77645 | 318, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77646 | 318, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77647 | 318, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77648 | 318, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77649 | 318, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77650 | 0, // psub1_then_psub |
| 77651 | 318, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77652 | 318, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77653 | 318, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77654 | 0, // x8sub_7_then_sub_32 |
| 77655 | 0, // x8sub_7_then_sub_32_hi |
| 77656 | 0, // x8sub_6_then_sub_32 |
| 77657 | 0, // x8sub_6_then_sub_32_hi |
| 77658 | 0, // x8sub_5_then_sub_32 |
| 77659 | 0, // x8sub_5_then_sub_32_hi |
| 77660 | 0, // x8sub_4_then_sub_32 |
| 77661 | 0, // x8sub_4_then_sub_32_hi |
| 77662 | 0, // x8sub_3_then_sub_32 |
| 77663 | 0, // x8sub_3_then_sub_32_hi |
| 77664 | 0, // x8sub_2_then_sub_32 |
| 77665 | 0, // x8sub_2_then_sub_32_hi |
| 77666 | 0, // x8sub_1_then_sub_32 |
| 77667 | 0, // x8sub_1_then_sub_32_hi |
| 77668 | 0, // subo64_then_sub_32 |
| 77669 | 0, // subo64_then_sub_32_hi |
| 77670 | 318, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77671 | 318, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77672 | 318, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77673 | 0, // dsub0_dsub1 |
| 77674 | 0, // dsub0_dsub1_dsub2 |
| 77675 | 318, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77676 | 318, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77677 | 318, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77678 | 318, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77679 | 318, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77680 | 318, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77681 | 0, // qsub0_qsub1 |
| 77682 | 0, // qsub0_qsub1_qsub2 |
| 77683 | 318, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77684 | 318, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77685 | 318, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77686 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77687 | 0, // x8sub_0_x8sub_1 |
| 77688 | 0, // x8sub_2_x8sub_3 |
| 77689 | 0, // x8sub_4_x8sub_5 |
| 77690 | 0, // x8sub_6_x8sub_7 |
| 77691 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77692 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77693 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77694 | 0, // sub_32_subo64_then_sub_32 |
| 77695 | 318, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77696 | 318, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77697 | 318, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77698 | 318, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77699 | 318, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77700 | 318, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77701 | 318, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77702 | 318, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77703 | 0, // zsub0_zsub2 |
| 77704 | 0, // zsub1_zsub3 |
| 77705 | }, |
| 77706 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77707 | 319, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77708 | 319, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77709 | 319, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77710 | 0, // dsub0 |
| 77711 | 319, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77712 | 319, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77713 | 319, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77714 | 319, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77715 | 319, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77716 | 319, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77717 | 0, // psub |
| 77718 | 0, // psub0 |
| 77719 | 0, // psub1 |
| 77720 | 0, // qsub0 |
| 77721 | 319, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77722 | 319, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77723 | 319, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77724 | 319, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77725 | 319, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77726 | 0, // sub_32 |
| 77727 | 0, // sub_32_hi |
| 77728 | 0, // sube32 |
| 77729 | 0, // sube64 |
| 77730 | 0, // subo32 |
| 77731 | 0, // subo64 |
| 77732 | 0, // x8sub_0 |
| 77733 | 0, // x8sub_1 |
| 77734 | 0, // x8sub_2 |
| 77735 | 0, // x8sub_3 |
| 77736 | 0, // x8sub_4 |
| 77737 | 0, // x8sub_5 |
| 77738 | 0, // x8sub_6 |
| 77739 | 0, // x8sub_7 |
| 77740 | 0, // zasubb |
| 77741 | 0, // zasubd0 |
| 77742 | 0, // zasubd1 |
| 77743 | 0, // zasubh0 |
| 77744 | 0, // zasubh1 |
| 77745 | 0, // zasubq0 |
| 77746 | 0, // zasubq1 |
| 77747 | 0, // zasubs0 |
| 77748 | 0, // zasubs1 |
| 77749 | 319, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77750 | 319, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77751 | 319, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77752 | 319, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77753 | 319, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77754 | 319, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77755 | 0, // zasubd1_then_zasubq0 |
| 77756 | 0, // zasubd1_then_zasubq1 |
| 77757 | 0, // zasubs1_then_zasubd0 |
| 77758 | 0, // zasubs1_then_zasubd1 |
| 77759 | 0, // zasubs1_then_zasubq0 |
| 77760 | 0, // zasubs1_then_zasubq1 |
| 77761 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77762 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77763 | 0, // zasubh1_then_zasubd0 |
| 77764 | 0, // zasubh1_then_zasubd1 |
| 77765 | 0, // zasubh1_then_zasubq0 |
| 77766 | 0, // zasubh1_then_zasubq1 |
| 77767 | 0, // zasubh1_then_zasubs0 |
| 77768 | 0, // zasubh1_then_zasubs1 |
| 77769 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77770 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77771 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77772 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77773 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77774 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77775 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77776 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77777 | 319, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77778 | 319, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77779 | 319, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77780 | 319, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77781 | 319, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77782 | 319, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77783 | 319, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77784 | 319, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77785 | 319, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77786 | 319, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77787 | 319, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77788 | 319, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77789 | 319, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77790 | 319, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77791 | 319, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77792 | 319, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77793 | 319, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77794 | 319, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77795 | 0, // psub1_then_psub |
| 77796 | 319, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77797 | 319, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77798 | 319, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77799 | 0, // x8sub_7_then_sub_32 |
| 77800 | 0, // x8sub_7_then_sub_32_hi |
| 77801 | 0, // x8sub_6_then_sub_32 |
| 77802 | 0, // x8sub_6_then_sub_32_hi |
| 77803 | 0, // x8sub_5_then_sub_32 |
| 77804 | 0, // x8sub_5_then_sub_32_hi |
| 77805 | 0, // x8sub_4_then_sub_32 |
| 77806 | 0, // x8sub_4_then_sub_32_hi |
| 77807 | 0, // x8sub_3_then_sub_32 |
| 77808 | 0, // x8sub_3_then_sub_32_hi |
| 77809 | 0, // x8sub_2_then_sub_32 |
| 77810 | 0, // x8sub_2_then_sub_32_hi |
| 77811 | 0, // x8sub_1_then_sub_32 |
| 77812 | 0, // x8sub_1_then_sub_32_hi |
| 77813 | 0, // subo64_then_sub_32 |
| 77814 | 0, // subo64_then_sub_32_hi |
| 77815 | 319, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77816 | 319, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77817 | 319, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77818 | 0, // dsub0_dsub1 |
| 77819 | 0, // dsub0_dsub1_dsub2 |
| 77820 | 319, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77821 | 319, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77822 | 319, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77823 | 319, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77824 | 319, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77825 | 319, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77826 | 0, // qsub0_qsub1 |
| 77827 | 0, // qsub0_qsub1_qsub2 |
| 77828 | 319, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77829 | 319, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77830 | 319, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77831 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77832 | 0, // x8sub_0_x8sub_1 |
| 77833 | 0, // x8sub_2_x8sub_3 |
| 77834 | 0, // x8sub_4_x8sub_5 |
| 77835 | 0, // x8sub_6_x8sub_7 |
| 77836 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77837 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77838 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77839 | 0, // sub_32_subo64_then_sub_32 |
| 77840 | 319, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77841 | 319, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77842 | 319, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77843 | 319, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77844 | 319, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77845 | 319, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77846 | 319, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77847 | 319, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 77848 | 0, // zsub0_zsub2 |
| 77849 | 0, // zsub1_zsub3 |
| 77850 | }, |
| 77851 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77852 | 320, // bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77853 | 320, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77854 | 320, // dsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77855 | 0, // dsub0 |
| 77856 | 320, // dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77857 | 320, // dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77858 | 320, // dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77859 | 320, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77860 | 320, // hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77861 | 320, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77862 | 0, // psub |
| 77863 | 0, // psub0 |
| 77864 | 0, // psub1 |
| 77865 | 320, // qsub0 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77866 | 320, // qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77867 | 320, // qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77868 | 320, // qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77869 | 320, // ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77870 | 320, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77871 | 0, // sub_32 |
| 77872 | 0, // sub_32_hi |
| 77873 | 0, // sube32 |
| 77874 | 0, // sube64 |
| 77875 | 0, // subo32 |
| 77876 | 0, // subo64 |
| 77877 | 0, // x8sub_0 |
| 77878 | 0, // x8sub_1 |
| 77879 | 0, // x8sub_2 |
| 77880 | 0, // x8sub_3 |
| 77881 | 0, // x8sub_4 |
| 77882 | 0, // x8sub_5 |
| 77883 | 0, // x8sub_6 |
| 77884 | 0, // x8sub_7 |
| 77885 | 0, // zasubb |
| 77886 | 0, // zasubd0 |
| 77887 | 0, // zasubd1 |
| 77888 | 0, // zasubh0 |
| 77889 | 0, // zasubh1 |
| 77890 | 0, // zasubq0 |
| 77891 | 0, // zasubq1 |
| 77892 | 0, // zasubs0 |
| 77893 | 0, // zasubs1 |
| 77894 | 0, // zsub |
| 77895 | 0, // zsub0 |
| 77896 | 0, // zsub1 |
| 77897 | 0, // zsub2 |
| 77898 | 0, // zsub3 |
| 77899 | 0, // zsub_hi |
| 77900 | 0, // zasubd1_then_zasubq0 |
| 77901 | 0, // zasubd1_then_zasubq1 |
| 77902 | 0, // zasubs1_then_zasubd0 |
| 77903 | 0, // zasubs1_then_zasubd1 |
| 77904 | 0, // zasubs1_then_zasubq0 |
| 77905 | 0, // zasubs1_then_zasubq1 |
| 77906 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 77907 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 77908 | 0, // zasubh1_then_zasubd0 |
| 77909 | 0, // zasubh1_then_zasubd1 |
| 77910 | 0, // zasubh1_then_zasubq0 |
| 77911 | 0, // zasubh1_then_zasubq1 |
| 77912 | 0, // zasubh1_then_zasubs0 |
| 77913 | 0, // zasubh1_then_zasubs1 |
| 77914 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 77915 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 77916 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 77917 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 77918 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 77919 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 77920 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 77921 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 77922 | 320, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77923 | 320, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77924 | 320, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77925 | 320, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77926 | 320, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77927 | 320, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77928 | 320, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77929 | 320, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77930 | 320, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77931 | 320, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77932 | 320, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77933 | 320, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77934 | 320, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77935 | 320, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77936 | 320, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77937 | 320, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77938 | 320, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77939 | 320, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77940 | 0, // psub1_then_psub |
| 77941 | 320, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77942 | 320, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77943 | 320, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77944 | 0, // x8sub_7_then_sub_32 |
| 77945 | 0, // x8sub_7_then_sub_32_hi |
| 77946 | 0, // x8sub_6_then_sub_32 |
| 77947 | 0, // x8sub_6_then_sub_32_hi |
| 77948 | 0, // x8sub_5_then_sub_32 |
| 77949 | 0, // x8sub_5_then_sub_32_hi |
| 77950 | 0, // x8sub_4_then_sub_32 |
| 77951 | 0, // x8sub_4_then_sub_32_hi |
| 77952 | 0, // x8sub_3_then_sub_32 |
| 77953 | 0, // x8sub_3_then_sub_32_hi |
| 77954 | 0, // x8sub_2_then_sub_32 |
| 77955 | 0, // x8sub_2_then_sub_32_hi |
| 77956 | 0, // x8sub_1_then_sub_32 |
| 77957 | 0, // x8sub_1_then_sub_32_hi |
| 77958 | 0, // subo64_then_sub_32 |
| 77959 | 0, // subo64_then_sub_32_hi |
| 77960 | 0, // zsub1_then_zsub_hi |
| 77961 | 0, // zsub3_then_zsub_hi |
| 77962 | 0, // zsub2_then_zsub_hi |
| 77963 | 0, // dsub0_dsub1 |
| 77964 | 0, // dsub0_dsub1_dsub2 |
| 77965 | 320, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77966 | 320, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77967 | 320, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77968 | 320, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77969 | 320, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77970 | 320, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77971 | 320, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77972 | 320, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77973 | 320, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77974 | 320, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77975 | 320, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 77976 | 0, // sub_32_x8sub_1_then_sub_32 |
| 77977 | 0, // x8sub_0_x8sub_1 |
| 77978 | 0, // x8sub_2_x8sub_3 |
| 77979 | 0, // x8sub_4_x8sub_5 |
| 77980 | 0, // x8sub_6_x8sub_7 |
| 77981 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 77982 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 77983 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 77984 | 0, // sub_32_subo64_then_sub_32 |
| 77985 | 0, // zsub_qsub1 |
| 77986 | 0, // zsub_qsub1_qsub2_qsub3 |
| 77987 | 0, // zsub_qsub1_qsub2 |
| 77988 | 0, // zsub0_zsub1 |
| 77989 | 0, // zsub0_zsub1_zsub2 |
| 77990 | 0, // zsub1_zsub2 |
| 77991 | 0, // zsub1_zsub2_zsub3 |
| 77992 | 0, // zsub2_zsub3 |
| 77993 | 0, // zsub0_zsub2 |
| 77994 | 0, // zsub1_zsub3 |
| 77995 | }, |
| 77996 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77997 | 321, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77998 | 321, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 77999 | 321, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78000 | 0, // dsub0 |
| 78001 | 321, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78002 | 321, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78003 | 321, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78004 | 321, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78005 | 321, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78006 | 321, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78007 | 0, // psub |
| 78008 | 0, // psub0 |
| 78009 | 0, // psub1 |
| 78010 | 0, // qsub0 |
| 78011 | 321, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78012 | 321, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78013 | 321, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78014 | 321, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78015 | 321, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78016 | 0, // sub_32 |
| 78017 | 0, // sub_32_hi |
| 78018 | 0, // sube32 |
| 78019 | 0, // sube64 |
| 78020 | 0, // subo32 |
| 78021 | 0, // subo64 |
| 78022 | 0, // x8sub_0 |
| 78023 | 0, // x8sub_1 |
| 78024 | 0, // x8sub_2 |
| 78025 | 0, // x8sub_3 |
| 78026 | 0, // x8sub_4 |
| 78027 | 0, // x8sub_5 |
| 78028 | 0, // x8sub_6 |
| 78029 | 0, // x8sub_7 |
| 78030 | 0, // zasubb |
| 78031 | 0, // zasubd0 |
| 78032 | 0, // zasubd1 |
| 78033 | 0, // zasubh0 |
| 78034 | 0, // zasubh1 |
| 78035 | 0, // zasubq0 |
| 78036 | 0, // zasubq1 |
| 78037 | 0, // zasubs0 |
| 78038 | 0, // zasubs1 |
| 78039 | 321, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78040 | 321, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78041 | 321, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78042 | 321, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78043 | 321, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78044 | 321, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78045 | 0, // zasubd1_then_zasubq0 |
| 78046 | 0, // zasubd1_then_zasubq1 |
| 78047 | 0, // zasubs1_then_zasubd0 |
| 78048 | 0, // zasubs1_then_zasubd1 |
| 78049 | 0, // zasubs1_then_zasubq0 |
| 78050 | 0, // zasubs1_then_zasubq1 |
| 78051 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78052 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78053 | 0, // zasubh1_then_zasubd0 |
| 78054 | 0, // zasubh1_then_zasubd1 |
| 78055 | 0, // zasubh1_then_zasubq0 |
| 78056 | 0, // zasubh1_then_zasubq1 |
| 78057 | 0, // zasubh1_then_zasubs0 |
| 78058 | 0, // zasubh1_then_zasubs1 |
| 78059 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78060 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78061 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78062 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78063 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78064 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78065 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78066 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78067 | 321, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78068 | 321, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78069 | 321, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78070 | 321, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78071 | 321, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78072 | 321, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78073 | 321, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78074 | 321, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78075 | 321, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78076 | 321, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78077 | 321, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78078 | 321, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78079 | 321, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78080 | 321, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78081 | 321, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78082 | 321, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78083 | 321, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78084 | 321, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78085 | 0, // psub1_then_psub |
| 78086 | 321, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78087 | 321, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78088 | 321, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78089 | 0, // x8sub_7_then_sub_32 |
| 78090 | 0, // x8sub_7_then_sub_32_hi |
| 78091 | 0, // x8sub_6_then_sub_32 |
| 78092 | 0, // x8sub_6_then_sub_32_hi |
| 78093 | 0, // x8sub_5_then_sub_32 |
| 78094 | 0, // x8sub_5_then_sub_32_hi |
| 78095 | 0, // x8sub_4_then_sub_32 |
| 78096 | 0, // x8sub_4_then_sub_32_hi |
| 78097 | 0, // x8sub_3_then_sub_32 |
| 78098 | 0, // x8sub_3_then_sub_32_hi |
| 78099 | 0, // x8sub_2_then_sub_32 |
| 78100 | 0, // x8sub_2_then_sub_32_hi |
| 78101 | 0, // x8sub_1_then_sub_32 |
| 78102 | 0, // x8sub_1_then_sub_32_hi |
| 78103 | 0, // subo64_then_sub_32 |
| 78104 | 0, // subo64_then_sub_32_hi |
| 78105 | 321, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78106 | 321, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78107 | 321, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78108 | 0, // dsub0_dsub1 |
| 78109 | 0, // dsub0_dsub1_dsub2 |
| 78110 | 321, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78111 | 321, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78112 | 321, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78113 | 321, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78114 | 321, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78115 | 321, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78116 | 0, // qsub0_qsub1 |
| 78117 | 0, // qsub0_qsub1_qsub2 |
| 78118 | 321, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78119 | 321, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78120 | 321, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78121 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78122 | 0, // x8sub_0_x8sub_1 |
| 78123 | 0, // x8sub_2_x8sub_3 |
| 78124 | 0, // x8sub_4_x8sub_5 |
| 78125 | 0, // x8sub_6_x8sub_7 |
| 78126 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78127 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78128 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78129 | 0, // sub_32_subo64_then_sub_32 |
| 78130 | 321, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78131 | 321, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78132 | 321, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78133 | 321, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78134 | 321, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78135 | 321, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78136 | 321, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78137 | 321, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 78138 | 0, // zsub0_zsub2 |
| 78139 | 0, // zsub1_zsub3 |
| 78140 | }, |
| 78141 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78142 | 322, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78143 | 322, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78144 | 322, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78145 | 0, // dsub0 |
| 78146 | 322, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78147 | 322, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78148 | 322, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78149 | 322, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78150 | 322, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78151 | 322, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78152 | 0, // psub |
| 78153 | 0, // psub0 |
| 78154 | 0, // psub1 |
| 78155 | 0, // qsub0 |
| 78156 | 322, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78157 | 322, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78158 | 322, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78159 | 322, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78160 | 322, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78161 | 0, // sub_32 |
| 78162 | 0, // sub_32_hi |
| 78163 | 0, // sube32 |
| 78164 | 0, // sube64 |
| 78165 | 0, // subo32 |
| 78166 | 0, // subo64 |
| 78167 | 0, // x8sub_0 |
| 78168 | 0, // x8sub_1 |
| 78169 | 0, // x8sub_2 |
| 78170 | 0, // x8sub_3 |
| 78171 | 0, // x8sub_4 |
| 78172 | 0, // x8sub_5 |
| 78173 | 0, // x8sub_6 |
| 78174 | 0, // x8sub_7 |
| 78175 | 0, // zasubb |
| 78176 | 0, // zasubd0 |
| 78177 | 0, // zasubd1 |
| 78178 | 0, // zasubh0 |
| 78179 | 0, // zasubh1 |
| 78180 | 0, // zasubq0 |
| 78181 | 0, // zasubq1 |
| 78182 | 0, // zasubs0 |
| 78183 | 0, // zasubs1 |
| 78184 | 322, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78185 | 322, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78186 | 322, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78187 | 322, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78188 | 322, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78189 | 322, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78190 | 0, // zasubd1_then_zasubq0 |
| 78191 | 0, // zasubd1_then_zasubq1 |
| 78192 | 0, // zasubs1_then_zasubd0 |
| 78193 | 0, // zasubs1_then_zasubd1 |
| 78194 | 0, // zasubs1_then_zasubq0 |
| 78195 | 0, // zasubs1_then_zasubq1 |
| 78196 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78197 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78198 | 0, // zasubh1_then_zasubd0 |
| 78199 | 0, // zasubh1_then_zasubd1 |
| 78200 | 0, // zasubh1_then_zasubq0 |
| 78201 | 0, // zasubh1_then_zasubq1 |
| 78202 | 0, // zasubh1_then_zasubs0 |
| 78203 | 0, // zasubh1_then_zasubs1 |
| 78204 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78205 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78206 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78207 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78208 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78209 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78210 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78211 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78212 | 322, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78213 | 322, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78214 | 322, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78215 | 322, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78216 | 322, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78217 | 322, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78218 | 322, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78219 | 322, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78220 | 322, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78221 | 322, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78222 | 322, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78223 | 322, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78224 | 322, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78225 | 322, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78226 | 322, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78227 | 322, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78228 | 322, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78229 | 322, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78230 | 0, // psub1_then_psub |
| 78231 | 322, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78232 | 322, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78233 | 322, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78234 | 0, // x8sub_7_then_sub_32 |
| 78235 | 0, // x8sub_7_then_sub_32_hi |
| 78236 | 0, // x8sub_6_then_sub_32 |
| 78237 | 0, // x8sub_6_then_sub_32_hi |
| 78238 | 0, // x8sub_5_then_sub_32 |
| 78239 | 0, // x8sub_5_then_sub_32_hi |
| 78240 | 0, // x8sub_4_then_sub_32 |
| 78241 | 0, // x8sub_4_then_sub_32_hi |
| 78242 | 0, // x8sub_3_then_sub_32 |
| 78243 | 0, // x8sub_3_then_sub_32_hi |
| 78244 | 0, // x8sub_2_then_sub_32 |
| 78245 | 0, // x8sub_2_then_sub_32_hi |
| 78246 | 0, // x8sub_1_then_sub_32 |
| 78247 | 0, // x8sub_1_then_sub_32_hi |
| 78248 | 0, // subo64_then_sub_32 |
| 78249 | 0, // subo64_then_sub_32_hi |
| 78250 | 322, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78251 | 322, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78252 | 322, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 78253 | 0, // dsub0_dsub1 |
| 78254 | 0, // dsub0_dsub1_dsub2 |
| 78255 | 328, // dsub1_dsub2 -> ZPR4Mul4 |
| 78256 | 328, // dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 78257 | 328, // dsub2_dsub3 -> ZPR4Mul4 |
| 78258 | 328, // dsub_dsub1 -> ZPR4Mul4 |
| 78259 | 328, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 78260 | 328, // dsub_dsub1_dsub2 -> ZPR4Mul4 |
| 78261 | 0, // qsub0_qsub1 |
| 78262 | 0, // qsub0_qsub1_qsub2 |
| 78263 | 328, // qsub1_qsub2 -> ZPR4Mul4 |
| 78264 | 328, // qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 78265 | 328, // qsub2_qsub3 -> ZPR4Mul4 |
| 78266 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78267 | 0, // x8sub_0_x8sub_1 |
| 78268 | 0, // x8sub_2_x8sub_3 |
| 78269 | 0, // x8sub_4_x8sub_5 |
| 78270 | 0, // x8sub_6_x8sub_7 |
| 78271 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78272 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78273 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78274 | 0, // sub_32_subo64_then_sub_32 |
| 78275 | 328, // zsub_qsub1 -> ZPR4Mul4 |
| 78276 | 328, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 78277 | 328, // zsub_qsub1_qsub2 -> ZPR4Mul4 |
| 78278 | 328, // zsub0_zsub1 -> ZPR4Mul4 |
| 78279 | 328, // zsub0_zsub1_zsub2 -> ZPR4Mul4 |
| 78280 | 328, // zsub1_zsub2 -> ZPR4Mul4 |
| 78281 | 328, // zsub1_zsub2_zsub3 -> ZPR4Mul4 |
| 78282 | 328, // zsub2_zsub3 -> ZPR4Mul4 |
| 78283 | 381, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 78284 | 381, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 78285 | }, |
| 78286 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78287 | 323, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78288 | 323, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78289 | 323, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78290 | 0, // dsub0 |
| 78291 | 323, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78292 | 323, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78293 | 323, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78294 | 323, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78295 | 323, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78296 | 323, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78297 | 0, // psub |
| 78298 | 0, // psub0 |
| 78299 | 0, // psub1 |
| 78300 | 0, // qsub0 |
| 78301 | 323, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78302 | 323, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78303 | 323, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78304 | 323, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78305 | 323, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78306 | 0, // sub_32 |
| 78307 | 0, // sub_32_hi |
| 78308 | 0, // sube32 |
| 78309 | 0, // sube64 |
| 78310 | 0, // subo32 |
| 78311 | 0, // subo64 |
| 78312 | 0, // x8sub_0 |
| 78313 | 0, // x8sub_1 |
| 78314 | 0, // x8sub_2 |
| 78315 | 0, // x8sub_3 |
| 78316 | 0, // x8sub_4 |
| 78317 | 0, // x8sub_5 |
| 78318 | 0, // x8sub_6 |
| 78319 | 0, // x8sub_7 |
| 78320 | 0, // zasubb |
| 78321 | 0, // zasubd0 |
| 78322 | 0, // zasubd1 |
| 78323 | 0, // zasubh0 |
| 78324 | 0, // zasubh1 |
| 78325 | 0, // zasubq0 |
| 78326 | 0, // zasubq1 |
| 78327 | 0, // zasubs0 |
| 78328 | 0, // zasubs1 |
| 78329 | 323, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78330 | 323, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78331 | 323, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78332 | 323, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78333 | 323, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78334 | 323, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78335 | 0, // zasubd1_then_zasubq0 |
| 78336 | 0, // zasubd1_then_zasubq1 |
| 78337 | 0, // zasubs1_then_zasubd0 |
| 78338 | 0, // zasubs1_then_zasubd1 |
| 78339 | 0, // zasubs1_then_zasubq0 |
| 78340 | 0, // zasubs1_then_zasubq1 |
| 78341 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78342 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78343 | 0, // zasubh1_then_zasubd0 |
| 78344 | 0, // zasubh1_then_zasubd1 |
| 78345 | 0, // zasubh1_then_zasubq0 |
| 78346 | 0, // zasubh1_then_zasubq1 |
| 78347 | 0, // zasubh1_then_zasubs0 |
| 78348 | 0, // zasubh1_then_zasubs1 |
| 78349 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78350 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78351 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78352 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78353 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78354 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78355 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78356 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78357 | 323, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78358 | 323, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78359 | 323, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78360 | 323, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78361 | 323, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78362 | 323, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78363 | 323, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78364 | 323, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78365 | 323, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78366 | 323, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78367 | 323, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78368 | 323, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78369 | 323, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78370 | 323, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78371 | 323, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78372 | 323, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78373 | 323, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78374 | 323, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78375 | 0, // psub1_then_psub |
| 78376 | 323, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78377 | 323, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78378 | 323, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78379 | 0, // x8sub_7_then_sub_32 |
| 78380 | 0, // x8sub_7_then_sub_32_hi |
| 78381 | 0, // x8sub_6_then_sub_32 |
| 78382 | 0, // x8sub_6_then_sub_32_hi |
| 78383 | 0, // x8sub_5_then_sub_32 |
| 78384 | 0, // x8sub_5_then_sub_32_hi |
| 78385 | 0, // x8sub_4_then_sub_32 |
| 78386 | 0, // x8sub_4_then_sub_32_hi |
| 78387 | 0, // x8sub_3_then_sub_32 |
| 78388 | 0, // x8sub_3_then_sub_32_hi |
| 78389 | 0, // x8sub_2_then_sub_32 |
| 78390 | 0, // x8sub_2_then_sub_32_hi |
| 78391 | 0, // x8sub_1_then_sub_32 |
| 78392 | 0, // x8sub_1_then_sub_32_hi |
| 78393 | 0, // subo64_then_sub_32 |
| 78394 | 0, // subo64_then_sub_32_hi |
| 78395 | 323, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78396 | 323, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78397 | 323, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 78398 | 0, // dsub0_dsub1 |
| 78399 | 0, // dsub0_dsub1_dsub2 |
| 78400 | 328, // dsub1_dsub2 -> ZPR4Mul4 |
| 78401 | 328, // dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 78402 | 328, // dsub2_dsub3 -> ZPR4Mul4 |
| 78403 | 328, // dsub_dsub1 -> ZPR4Mul4 |
| 78404 | 328, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 78405 | 328, // dsub_dsub1_dsub2 -> ZPR4Mul4 |
| 78406 | 0, // qsub0_qsub1 |
| 78407 | 0, // qsub0_qsub1_qsub2 |
| 78408 | 328, // qsub1_qsub2 -> ZPR4Mul4 |
| 78409 | 328, // qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 78410 | 328, // qsub2_qsub3 -> ZPR4Mul4 |
| 78411 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78412 | 0, // x8sub_0_x8sub_1 |
| 78413 | 0, // x8sub_2_x8sub_3 |
| 78414 | 0, // x8sub_4_x8sub_5 |
| 78415 | 0, // x8sub_6_x8sub_7 |
| 78416 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78417 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78418 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78419 | 0, // sub_32_subo64_then_sub_32 |
| 78420 | 328, // zsub_qsub1 -> ZPR4Mul4 |
| 78421 | 328, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 78422 | 328, // zsub_qsub1_qsub2 -> ZPR4Mul4 |
| 78423 | 328, // zsub0_zsub1 -> ZPR4Mul4 |
| 78424 | 328, // zsub0_zsub1_zsub2 -> ZPR4Mul4 |
| 78425 | 328, // zsub1_zsub2 -> ZPR4Mul4 |
| 78426 | 328, // zsub1_zsub2_zsub3 -> ZPR4Mul4 |
| 78427 | 328, // zsub2_zsub3 -> ZPR4Mul4 |
| 78428 | 426, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 78429 | 426, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 78430 | }, |
| 78431 | { // QQQQ_with_qsub0_in_FPR128_0to7 |
| 78432 | 324, // bsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78433 | 324, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78434 | 324, // dsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78435 | 0, // dsub0 |
| 78436 | 324, // dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78437 | 324, // dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78438 | 324, // dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78439 | 324, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78440 | 324, // hsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78441 | 324, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78442 | 0, // psub |
| 78443 | 0, // psub0 |
| 78444 | 0, // psub1 |
| 78445 | 324, // qsub0 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78446 | 324, // qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78447 | 324, // qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78448 | 324, // qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78449 | 324, // ssub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78450 | 324, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78451 | 0, // sub_32 |
| 78452 | 0, // sub_32_hi |
| 78453 | 0, // sube32 |
| 78454 | 0, // sube64 |
| 78455 | 0, // subo32 |
| 78456 | 0, // subo64 |
| 78457 | 0, // x8sub_0 |
| 78458 | 0, // x8sub_1 |
| 78459 | 0, // x8sub_2 |
| 78460 | 0, // x8sub_3 |
| 78461 | 0, // x8sub_4 |
| 78462 | 0, // x8sub_5 |
| 78463 | 0, // x8sub_6 |
| 78464 | 0, // x8sub_7 |
| 78465 | 0, // zasubb |
| 78466 | 0, // zasubd0 |
| 78467 | 0, // zasubd1 |
| 78468 | 0, // zasubh0 |
| 78469 | 0, // zasubh1 |
| 78470 | 0, // zasubq0 |
| 78471 | 0, // zasubq1 |
| 78472 | 0, // zasubs0 |
| 78473 | 0, // zasubs1 |
| 78474 | 0, // zsub |
| 78475 | 0, // zsub0 |
| 78476 | 0, // zsub1 |
| 78477 | 0, // zsub2 |
| 78478 | 0, // zsub3 |
| 78479 | 0, // zsub_hi |
| 78480 | 0, // zasubd1_then_zasubq0 |
| 78481 | 0, // zasubd1_then_zasubq1 |
| 78482 | 0, // zasubs1_then_zasubd0 |
| 78483 | 0, // zasubs1_then_zasubd1 |
| 78484 | 0, // zasubs1_then_zasubq0 |
| 78485 | 0, // zasubs1_then_zasubq1 |
| 78486 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78487 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78488 | 0, // zasubh1_then_zasubd0 |
| 78489 | 0, // zasubh1_then_zasubd1 |
| 78490 | 0, // zasubh1_then_zasubq0 |
| 78491 | 0, // zasubh1_then_zasubq1 |
| 78492 | 0, // zasubh1_then_zasubs0 |
| 78493 | 0, // zasubh1_then_zasubs1 |
| 78494 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78495 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78496 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78497 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78498 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78499 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78500 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78501 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78502 | 324, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78503 | 324, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78504 | 324, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78505 | 324, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78506 | 324, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78507 | 324, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78508 | 324, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78509 | 324, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78510 | 324, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78511 | 324, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78512 | 324, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78513 | 324, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78514 | 324, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78515 | 324, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78516 | 324, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78517 | 324, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78518 | 324, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78519 | 324, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78520 | 0, // psub1_then_psub |
| 78521 | 324, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78522 | 324, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78523 | 324, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78524 | 0, // x8sub_7_then_sub_32 |
| 78525 | 0, // x8sub_7_then_sub_32_hi |
| 78526 | 0, // x8sub_6_then_sub_32 |
| 78527 | 0, // x8sub_6_then_sub_32_hi |
| 78528 | 0, // x8sub_5_then_sub_32 |
| 78529 | 0, // x8sub_5_then_sub_32_hi |
| 78530 | 0, // x8sub_4_then_sub_32 |
| 78531 | 0, // x8sub_4_then_sub_32_hi |
| 78532 | 0, // x8sub_3_then_sub_32 |
| 78533 | 0, // x8sub_3_then_sub_32_hi |
| 78534 | 0, // x8sub_2_then_sub_32 |
| 78535 | 0, // x8sub_2_then_sub_32_hi |
| 78536 | 0, // x8sub_1_then_sub_32 |
| 78537 | 0, // x8sub_1_then_sub_32_hi |
| 78538 | 0, // subo64_then_sub_32 |
| 78539 | 0, // subo64_then_sub_32_hi |
| 78540 | 0, // zsub1_then_zsub_hi |
| 78541 | 0, // zsub3_then_zsub_hi |
| 78542 | 0, // zsub2_then_zsub_hi |
| 78543 | 0, // dsub0_dsub1 |
| 78544 | 0, // dsub0_dsub1_dsub2 |
| 78545 | 324, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78546 | 324, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78547 | 324, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78548 | 324, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78549 | 324, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78550 | 324, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78551 | 324, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78552 | 324, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78553 | 324, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78554 | 324, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78555 | 324, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 78556 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78557 | 0, // x8sub_0_x8sub_1 |
| 78558 | 0, // x8sub_2_x8sub_3 |
| 78559 | 0, // x8sub_4_x8sub_5 |
| 78560 | 0, // x8sub_6_x8sub_7 |
| 78561 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78562 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78563 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78564 | 0, // sub_32_subo64_then_sub_32 |
| 78565 | 0, // zsub_qsub1 |
| 78566 | 0, // zsub_qsub1_qsub2_qsub3 |
| 78567 | 0, // zsub_qsub1_qsub2 |
| 78568 | 0, // zsub0_zsub1 |
| 78569 | 0, // zsub0_zsub1_zsub2 |
| 78570 | 0, // zsub1_zsub2 |
| 78571 | 0, // zsub1_zsub2_zsub3 |
| 78572 | 0, // zsub2_zsub3 |
| 78573 | 0, // zsub0_zsub2 |
| 78574 | 0, // zsub1_zsub3 |
| 78575 | }, |
| 78576 | { // QQQQ_with_qsub1_in_FPR128_0to7 |
| 78577 | 325, // bsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78578 | 325, // bsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78579 | 325, // dsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78580 | 0, // dsub0 |
| 78581 | 325, // dsub1 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78582 | 325, // dsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78583 | 325, // dsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78584 | 325, // dsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78585 | 325, // hsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78586 | 325, // hsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78587 | 0, // psub |
| 78588 | 0, // psub0 |
| 78589 | 0, // psub1 |
| 78590 | 325, // qsub0 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78591 | 325, // qsub1 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78592 | 325, // qsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78593 | 325, // qsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78594 | 325, // ssub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78595 | 325, // ssub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78596 | 0, // sub_32 |
| 78597 | 0, // sub_32_hi |
| 78598 | 0, // sube32 |
| 78599 | 0, // sube64 |
| 78600 | 0, // subo32 |
| 78601 | 0, // subo64 |
| 78602 | 0, // x8sub_0 |
| 78603 | 0, // x8sub_1 |
| 78604 | 0, // x8sub_2 |
| 78605 | 0, // x8sub_3 |
| 78606 | 0, // x8sub_4 |
| 78607 | 0, // x8sub_5 |
| 78608 | 0, // x8sub_6 |
| 78609 | 0, // x8sub_7 |
| 78610 | 0, // zasubb |
| 78611 | 0, // zasubd0 |
| 78612 | 0, // zasubd1 |
| 78613 | 0, // zasubh0 |
| 78614 | 0, // zasubh1 |
| 78615 | 0, // zasubq0 |
| 78616 | 0, // zasubq1 |
| 78617 | 0, // zasubs0 |
| 78618 | 0, // zasubs1 |
| 78619 | 0, // zsub |
| 78620 | 0, // zsub0 |
| 78621 | 0, // zsub1 |
| 78622 | 0, // zsub2 |
| 78623 | 0, // zsub3 |
| 78624 | 0, // zsub_hi |
| 78625 | 0, // zasubd1_then_zasubq0 |
| 78626 | 0, // zasubd1_then_zasubq1 |
| 78627 | 0, // zasubs1_then_zasubd0 |
| 78628 | 0, // zasubs1_then_zasubd1 |
| 78629 | 0, // zasubs1_then_zasubq0 |
| 78630 | 0, // zasubs1_then_zasubq1 |
| 78631 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78632 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78633 | 0, // zasubh1_then_zasubd0 |
| 78634 | 0, // zasubh1_then_zasubd1 |
| 78635 | 0, // zasubh1_then_zasubq0 |
| 78636 | 0, // zasubh1_then_zasubq1 |
| 78637 | 0, // zasubh1_then_zasubs0 |
| 78638 | 0, // zasubh1_then_zasubs1 |
| 78639 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78640 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78641 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78642 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78643 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78644 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78645 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78646 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78647 | 325, // dsub1_then_bsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78648 | 325, // dsub1_then_bsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78649 | 325, // dsub1_then_hsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78650 | 325, // dsub1_then_hsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78651 | 325, // dsub1_then_ssub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78652 | 325, // dsub1_then_ssub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78653 | 325, // dsub3_then_bsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78654 | 325, // dsub3_then_bsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78655 | 325, // dsub3_then_hsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78656 | 325, // dsub3_then_hsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78657 | 325, // dsub3_then_ssub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78658 | 325, // dsub3_then_ssub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78659 | 325, // dsub2_then_bsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78660 | 325, // dsub2_then_bsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78661 | 325, // dsub2_then_hsub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78662 | 325, // dsub2_then_hsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78663 | 325, // dsub2_then_ssub -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78664 | 325, // dsub2_then_ssub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78665 | 0, // psub1_then_psub |
| 78666 | 325, // qsub1_then_dsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78667 | 325, // qsub3_then_dsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78668 | 325, // qsub2_then_dsub_hi -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78669 | 0, // x8sub_7_then_sub_32 |
| 78670 | 0, // x8sub_7_then_sub_32_hi |
| 78671 | 0, // x8sub_6_then_sub_32 |
| 78672 | 0, // x8sub_6_then_sub_32_hi |
| 78673 | 0, // x8sub_5_then_sub_32 |
| 78674 | 0, // x8sub_5_then_sub_32_hi |
| 78675 | 0, // x8sub_4_then_sub_32 |
| 78676 | 0, // x8sub_4_then_sub_32_hi |
| 78677 | 0, // x8sub_3_then_sub_32 |
| 78678 | 0, // x8sub_3_then_sub_32_hi |
| 78679 | 0, // x8sub_2_then_sub_32 |
| 78680 | 0, // x8sub_2_then_sub_32_hi |
| 78681 | 0, // x8sub_1_then_sub_32 |
| 78682 | 0, // x8sub_1_then_sub_32_hi |
| 78683 | 0, // subo64_then_sub_32 |
| 78684 | 0, // subo64_then_sub_32_hi |
| 78685 | 0, // zsub1_then_zsub_hi |
| 78686 | 0, // zsub3_then_zsub_hi |
| 78687 | 0, // zsub2_then_zsub_hi |
| 78688 | 0, // dsub0_dsub1 |
| 78689 | 0, // dsub0_dsub1_dsub2 |
| 78690 | 325, // dsub1_dsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78691 | 325, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78692 | 325, // dsub2_dsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78693 | 325, // dsub_dsub1 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78694 | 325, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78695 | 325, // dsub_dsub1_dsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78696 | 325, // qsub0_qsub1 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78697 | 325, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78698 | 325, // qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78699 | 325, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78700 | 325, // qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 78701 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78702 | 0, // x8sub_0_x8sub_1 |
| 78703 | 0, // x8sub_2_x8sub_3 |
| 78704 | 0, // x8sub_4_x8sub_5 |
| 78705 | 0, // x8sub_6_x8sub_7 |
| 78706 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78707 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78708 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78709 | 0, // sub_32_subo64_then_sub_32 |
| 78710 | 0, // zsub_qsub1 |
| 78711 | 0, // zsub_qsub1_qsub2_qsub3 |
| 78712 | 0, // zsub_qsub1_qsub2 |
| 78713 | 0, // zsub0_zsub1 |
| 78714 | 0, // zsub0_zsub1_zsub2 |
| 78715 | 0, // zsub1_zsub2 |
| 78716 | 0, // zsub1_zsub2_zsub3 |
| 78717 | 0, // zsub2_zsub3 |
| 78718 | 0, // zsub0_zsub2 |
| 78719 | 0, // zsub1_zsub3 |
| 78720 | }, |
| 78721 | { // QQQQ_with_qsub2_in_FPR128_0to7 |
| 78722 | 326, // bsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78723 | 326, // bsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78724 | 326, // dsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78725 | 0, // dsub0 |
| 78726 | 326, // dsub1 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78727 | 326, // dsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78728 | 326, // dsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78729 | 326, // dsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78730 | 326, // hsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78731 | 326, // hsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78732 | 0, // psub |
| 78733 | 0, // psub0 |
| 78734 | 0, // psub1 |
| 78735 | 326, // qsub0 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78736 | 326, // qsub1 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78737 | 326, // qsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78738 | 326, // qsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78739 | 326, // ssub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78740 | 326, // ssub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78741 | 0, // sub_32 |
| 78742 | 0, // sub_32_hi |
| 78743 | 0, // sube32 |
| 78744 | 0, // sube64 |
| 78745 | 0, // subo32 |
| 78746 | 0, // subo64 |
| 78747 | 0, // x8sub_0 |
| 78748 | 0, // x8sub_1 |
| 78749 | 0, // x8sub_2 |
| 78750 | 0, // x8sub_3 |
| 78751 | 0, // x8sub_4 |
| 78752 | 0, // x8sub_5 |
| 78753 | 0, // x8sub_6 |
| 78754 | 0, // x8sub_7 |
| 78755 | 0, // zasubb |
| 78756 | 0, // zasubd0 |
| 78757 | 0, // zasubd1 |
| 78758 | 0, // zasubh0 |
| 78759 | 0, // zasubh1 |
| 78760 | 0, // zasubq0 |
| 78761 | 0, // zasubq1 |
| 78762 | 0, // zasubs0 |
| 78763 | 0, // zasubs1 |
| 78764 | 0, // zsub |
| 78765 | 0, // zsub0 |
| 78766 | 0, // zsub1 |
| 78767 | 0, // zsub2 |
| 78768 | 0, // zsub3 |
| 78769 | 0, // zsub_hi |
| 78770 | 0, // zasubd1_then_zasubq0 |
| 78771 | 0, // zasubd1_then_zasubq1 |
| 78772 | 0, // zasubs1_then_zasubd0 |
| 78773 | 0, // zasubs1_then_zasubd1 |
| 78774 | 0, // zasubs1_then_zasubq0 |
| 78775 | 0, // zasubs1_then_zasubq1 |
| 78776 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78777 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78778 | 0, // zasubh1_then_zasubd0 |
| 78779 | 0, // zasubh1_then_zasubd1 |
| 78780 | 0, // zasubh1_then_zasubq0 |
| 78781 | 0, // zasubh1_then_zasubq1 |
| 78782 | 0, // zasubh1_then_zasubs0 |
| 78783 | 0, // zasubh1_then_zasubs1 |
| 78784 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78785 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78786 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78787 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78788 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78789 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78790 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78791 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78792 | 326, // dsub1_then_bsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78793 | 326, // dsub1_then_bsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78794 | 326, // dsub1_then_hsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78795 | 326, // dsub1_then_hsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78796 | 326, // dsub1_then_ssub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78797 | 326, // dsub1_then_ssub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78798 | 326, // dsub3_then_bsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78799 | 326, // dsub3_then_bsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78800 | 326, // dsub3_then_hsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78801 | 326, // dsub3_then_hsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78802 | 326, // dsub3_then_ssub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78803 | 326, // dsub3_then_ssub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78804 | 326, // dsub2_then_bsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78805 | 326, // dsub2_then_bsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78806 | 326, // dsub2_then_hsub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78807 | 326, // dsub2_then_hsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78808 | 326, // dsub2_then_ssub -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78809 | 326, // dsub2_then_ssub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78810 | 0, // psub1_then_psub |
| 78811 | 326, // qsub1_then_dsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78812 | 326, // qsub3_then_dsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78813 | 326, // qsub2_then_dsub_hi -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78814 | 0, // x8sub_7_then_sub_32 |
| 78815 | 0, // x8sub_7_then_sub_32_hi |
| 78816 | 0, // x8sub_6_then_sub_32 |
| 78817 | 0, // x8sub_6_then_sub_32_hi |
| 78818 | 0, // x8sub_5_then_sub_32 |
| 78819 | 0, // x8sub_5_then_sub_32_hi |
| 78820 | 0, // x8sub_4_then_sub_32 |
| 78821 | 0, // x8sub_4_then_sub_32_hi |
| 78822 | 0, // x8sub_3_then_sub_32 |
| 78823 | 0, // x8sub_3_then_sub_32_hi |
| 78824 | 0, // x8sub_2_then_sub_32 |
| 78825 | 0, // x8sub_2_then_sub_32_hi |
| 78826 | 0, // x8sub_1_then_sub_32 |
| 78827 | 0, // x8sub_1_then_sub_32_hi |
| 78828 | 0, // subo64_then_sub_32 |
| 78829 | 0, // subo64_then_sub_32_hi |
| 78830 | 0, // zsub1_then_zsub_hi |
| 78831 | 0, // zsub3_then_zsub_hi |
| 78832 | 0, // zsub2_then_zsub_hi |
| 78833 | 0, // dsub0_dsub1 |
| 78834 | 0, // dsub0_dsub1_dsub2 |
| 78835 | 326, // dsub1_dsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78836 | 326, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78837 | 326, // dsub2_dsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78838 | 326, // dsub_dsub1 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78839 | 326, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78840 | 326, // dsub_dsub1_dsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78841 | 326, // qsub0_qsub1 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78842 | 326, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78843 | 326, // qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78844 | 326, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78845 | 326, // qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 78846 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78847 | 0, // x8sub_0_x8sub_1 |
| 78848 | 0, // x8sub_2_x8sub_3 |
| 78849 | 0, // x8sub_4_x8sub_5 |
| 78850 | 0, // x8sub_6_x8sub_7 |
| 78851 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78852 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78853 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78854 | 0, // sub_32_subo64_then_sub_32 |
| 78855 | 0, // zsub_qsub1 |
| 78856 | 0, // zsub_qsub1_qsub2_qsub3 |
| 78857 | 0, // zsub_qsub1_qsub2 |
| 78858 | 0, // zsub0_zsub1 |
| 78859 | 0, // zsub0_zsub1_zsub2 |
| 78860 | 0, // zsub1_zsub2 |
| 78861 | 0, // zsub1_zsub2_zsub3 |
| 78862 | 0, // zsub2_zsub3 |
| 78863 | 0, // zsub0_zsub2 |
| 78864 | 0, // zsub1_zsub3 |
| 78865 | }, |
| 78866 | { // QQQQ_with_qsub3_in_FPR128_0to7 |
| 78867 | 327, // bsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78868 | 327, // bsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78869 | 327, // dsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78870 | 0, // dsub0 |
| 78871 | 327, // dsub1 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78872 | 327, // dsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78873 | 327, // dsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78874 | 327, // dsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78875 | 327, // hsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78876 | 327, // hsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78877 | 0, // psub |
| 78878 | 0, // psub0 |
| 78879 | 0, // psub1 |
| 78880 | 327, // qsub0 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78881 | 327, // qsub1 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78882 | 327, // qsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78883 | 327, // qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78884 | 327, // ssub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78885 | 327, // ssub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78886 | 0, // sub_32 |
| 78887 | 0, // sub_32_hi |
| 78888 | 0, // sube32 |
| 78889 | 0, // sube64 |
| 78890 | 0, // subo32 |
| 78891 | 0, // subo64 |
| 78892 | 0, // x8sub_0 |
| 78893 | 0, // x8sub_1 |
| 78894 | 0, // x8sub_2 |
| 78895 | 0, // x8sub_3 |
| 78896 | 0, // x8sub_4 |
| 78897 | 0, // x8sub_5 |
| 78898 | 0, // x8sub_6 |
| 78899 | 0, // x8sub_7 |
| 78900 | 0, // zasubb |
| 78901 | 0, // zasubd0 |
| 78902 | 0, // zasubd1 |
| 78903 | 0, // zasubh0 |
| 78904 | 0, // zasubh1 |
| 78905 | 0, // zasubq0 |
| 78906 | 0, // zasubq1 |
| 78907 | 0, // zasubs0 |
| 78908 | 0, // zasubs1 |
| 78909 | 0, // zsub |
| 78910 | 0, // zsub0 |
| 78911 | 0, // zsub1 |
| 78912 | 0, // zsub2 |
| 78913 | 0, // zsub3 |
| 78914 | 0, // zsub_hi |
| 78915 | 0, // zasubd1_then_zasubq0 |
| 78916 | 0, // zasubd1_then_zasubq1 |
| 78917 | 0, // zasubs1_then_zasubd0 |
| 78918 | 0, // zasubs1_then_zasubd1 |
| 78919 | 0, // zasubs1_then_zasubq0 |
| 78920 | 0, // zasubs1_then_zasubq1 |
| 78921 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 78922 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 78923 | 0, // zasubh1_then_zasubd0 |
| 78924 | 0, // zasubh1_then_zasubd1 |
| 78925 | 0, // zasubh1_then_zasubq0 |
| 78926 | 0, // zasubh1_then_zasubq1 |
| 78927 | 0, // zasubh1_then_zasubs0 |
| 78928 | 0, // zasubh1_then_zasubs1 |
| 78929 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 78930 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 78931 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 78932 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 78933 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 78934 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 78935 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 78936 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 78937 | 327, // dsub1_then_bsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78938 | 327, // dsub1_then_bsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78939 | 327, // dsub1_then_hsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78940 | 327, // dsub1_then_hsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78941 | 327, // dsub1_then_ssub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78942 | 327, // dsub1_then_ssub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78943 | 327, // dsub3_then_bsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78944 | 327, // dsub3_then_bsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78945 | 327, // dsub3_then_hsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78946 | 327, // dsub3_then_hsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78947 | 327, // dsub3_then_ssub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78948 | 327, // dsub3_then_ssub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78949 | 327, // dsub2_then_bsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78950 | 327, // dsub2_then_bsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78951 | 327, // dsub2_then_hsub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78952 | 327, // dsub2_then_hsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78953 | 327, // dsub2_then_ssub -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78954 | 327, // dsub2_then_ssub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78955 | 0, // psub1_then_psub |
| 78956 | 327, // qsub1_then_dsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78957 | 327, // qsub3_then_dsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78958 | 327, // qsub2_then_dsub_hi -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78959 | 0, // x8sub_7_then_sub_32 |
| 78960 | 0, // x8sub_7_then_sub_32_hi |
| 78961 | 0, // x8sub_6_then_sub_32 |
| 78962 | 0, // x8sub_6_then_sub_32_hi |
| 78963 | 0, // x8sub_5_then_sub_32 |
| 78964 | 0, // x8sub_5_then_sub_32_hi |
| 78965 | 0, // x8sub_4_then_sub_32 |
| 78966 | 0, // x8sub_4_then_sub_32_hi |
| 78967 | 0, // x8sub_3_then_sub_32 |
| 78968 | 0, // x8sub_3_then_sub_32_hi |
| 78969 | 0, // x8sub_2_then_sub_32 |
| 78970 | 0, // x8sub_2_then_sub_32_hi |
| 78971 | 0, // x8sub_1_then_sub_32 |
| 78972 | 0, // x8sub_1_then_sub_32_hi |
| 78973 | 0, // subo64_then_sub_32 |
| 78974 | 0, // subo64_then_sub_32_hi |
| 78975 | 0, // zsub1_then_zsub_hi |
| 78976 | 0, // zsub3_then_zsub_hi |
| 78977 | 0, // zsub2_then_zsub_hi |
| 78978 | 0, // dsub0_dsub1 |
| 78979 | 0, // dsub0_dsub1_dsub2 |
| 78980 | 327, // dsub1_dsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78981 | 327, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78982 | 327, // dsub2_dsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78983 | 327, // dsub_dsub1 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78984 | 327, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78985 | 327, // dsub_dsub1_dsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78986 | 327, // qsub0_qsub1 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78987 | 327, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78988 | 327, // qsub1_qsub2 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78989 | 327, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78990 | 327, // qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 78991 | 0, // sub_32_x8sub_1_then_sub_32 |
| 78992 | 0, // x8sub_0_x8sub_1 |
| 78993 | 0, // x8sub_2_x8sub_3 |
| 78994 | 0, // x8sub_4_x8sub_5 |
| 78995 | 0, // x8sub_6_x8sub_7 |
| 78996 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 78997 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 78998 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 78999 | 0, // sub_32_subo64_then_sub_32 |
| 79000 | 0, // zsub_qsub1 |
| 79001 | 0, // zsub_qsub1_qsub2_qsub3 |
| 79002 | 0, // zsub_qsub1_qsub2 |
| 79003 | 0, // zsub0_zsub1 |
| 79004 | 0, // zsub0_zsub1_zsub2 |
| 79005 | 0, // zsub1_zsub2 |
| 79006 | 0, // zsub1_zsub2_zsub3 |
| 79007 | 0, // zsub2_zsub3 |
| 79008 | 0, // zsub0_zsub2 |
| 79009 | 0, // zsub1_zsub3 |
| 79010 | }, |
| 79011 | { // ZPR4Mul4 |
| 79012 | 328, // bsub -> ZPR4Mul4 |
| 79013 | 328, // bsub_hi -> ZPR4Mul4 |
| 79014 | 328, // dsub -> ZPR4Mul4 |
| 79015 | 0, // dsub0 |
| 79016 | 328, // dsub1 -> ZPR4Mul4 |
| 79017 | 328, // dsub2 -> ZPR4Mul4 |
| 79018 | 328, // dsub3 -> ZPR4Mul4 |
| 79019 | 328, // dsub_hi -> ZPR4Mul4 |
| 79020 | 328, // hsub -> ZPR4Mul4 |
| 79021 | 328, // hsub_hi -> ZPR4Mul4 |
| 79022 | 0, // psub |
| 79023 | 0, // psub0 |
| 79024 | 0, // psub1 |
| 79025 | 0, // qsub0 |
| 79026 | 328, // qsub1 -> ZPR4Mul4 |
| 79027 | 328, // qsub2 -> ZPR4Mul4 |
| 79028 | 328, // qsub3 -> ZPR4Mul4 |
| 79029 | 328, // ssub -> ZPR4Mul4 |
| 79030 | 328, // ssub_hi -> ZPR4Mul4 |
| 79031 | 0, // sub_32 |
| 79032 | 0, // sub_32_hi |
| 79033 | 0, // sube32 |
| 79034 | 0, // sube64 |
| 79035 | 0, // subo32 |
| 79036 | 0, // subo64 |
| 79037 | 0, // x8sub_0 |
| 79038 | 0, // x8sub_1 |
| 79039 | 0, // x8sub_2 |
| 79040 | 0, // x8sub_3 |
| 79041 | 0, // x8sub_4 |
| 79042 | 0, // x8sub_5 |
| 79043 | 0, // x8sub_6 |
| 79044 | 0, // x8sub_7 |
| 79045 | 0, // zasubb |
| 79046 | 0, // zasubd0 |
| 79047 | 0, // zasubd1 |
| 79048 | 0, // zasubh0 |
| 79049 | 0, // zasubh1 |
| 79050 | 0, // zasubq0 |
| 79051 | 0, // zasubq1 |
| 79052 | 0, // zasubs0 |
| 79053 | 0, // zasubs1 |
| 79054 | 328, // zsub -> ZPR4Mul4 |
| 79055 | 328, // zsub0 -> ZPR4Mul4 |
| 79056 | 328, // zsub1 -> ZPR4Mul4 |
| 79057 | 328, // zsub2 -> ZPR4Mul4 |
| 79058 | 328, // zsub3 -> ZPR4Mul4 |
| 79059 | 328, // zsub_hi -> ZPR4Mul4 |
| 79060 | 0, // zasubd1_then_zasubq0 |
| 79061 | 0, // zasubd1_then_zasubq1 |
| 79062 | 0, // zasubs1_then_zasubd0 |
| 79063 | 0, // zasubs1_then_zasubd1 |
| 79064 | 0, // zasubs1_then_zasubq0 |
| 79065 | 0, // zasubs1_then_zasubq1 |
| 79066 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79067 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79068 | 0, // zasubh1_then_zasubd0 |
| 79069 | 0, // zasubh1_then_zasubd1 |
| 79070 | 0, // zasubh1_then_zasubq0 |
| 79071 | 0, // zasubh1_then_zasubq1 |
| 79072 | 0, // zasubh1_then_zasubs0 |
| 79073 | 0, // zasubh1_then_zasubs1 |
| 79074 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79075 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79076 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79077 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79078 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79079 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79080 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79081 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79082 | 328, // dsub1_then_bsub -> ZPR4Mul4 |
| 79083 | 328, // dsub1_then_bsub_hi -> ZPR4Mul4 |
| 79084 | 328, // dsub1_then_hsub -> ZPR4Mul4 |
| 79085 | 328, // dsub1_then_hsub_hi -> ZPR4Mul4 |
| 79086 | 328, // dsub1_then_ssub -> ZPR4Mul4 |
| 79087 | 328, // dsub1_then_ssub_hi -> ZPR4Mul4 |
| 79088 | 328, // dsub3_then_bsub -> ZPR4Mul4 |
| 79089 | 328, // dsub3_then_bsub_hi -> ZPR4Mul4 |
| 79090 | 328, // dsub3_then_hsub -> ZPR4Mul4 |
| 79091 | 328, // dsub3_then_hsub_hi -> ZPR4Mul4 |
| 79092 | 328, // dsub3_then_ssub -> ZPR4Mul4 |
| 79093 | 328, // dsub3_then_ssub_hi -> ZPR4Mul4 |
| 79094 | 328, // dsub2_then_bsub -> ZPR4Mul4 |
| 79095 | 328, // dsub2_then_bsub_hi -> ZPR4Mul4 |
| 79096 | 328, // dsub2_then_hsub -> ZPR4Mul4 |
| 79097 | 328, // dsub2_then_hsub_hi -> ZPR4Mul4 |
| 79098 | 328, // dsub2_then_ssub -> ZPR4Mul4 |
| 79099 | 328, // dsub2_then_ssub_hi -> ZPR4Mul4 |
| 79100 | 0, // psub1_then_psub |
| 79101 | 328, // qsub1_then_dsub_hi -> ZPR4Mul4 |
| 79102 | 328, // qsub3_then_dsub_hi -> ZPR4Mul4 |
| 79103 | 328, // qsub2_then_dsub_hi -> ZPR4Mul4 |
| 79104 | 0, // x8sub_7_then_sub_32 |
| 79105 | 0, // x8sub_7_then_sub_32_hi |
| 79106 | 0, // x8sub_6_then_sub_32 |
| 79107 | 0, // x8sub_6_then_sub_32_hi |
| 79108 | 0, // x8sub_5_then_sub_32 |
| 79109 | 0, // x8sub_5_then_sub_32_hi |
| 79110 | 0, // x8sub_4_then_sub_32 |
| 79111 | 0, // x8sub_4_then_sub_32_hi |
| 79112 | 0, // x8sub_3_then_sub_32 |
| 79113 | 0, // x8sub_3_then_sub_32_hi |
| 79114 | 0, // x8sub_2_then_sub_32 |
| 79115 | 0, // x8sub_2_then_sub_32_hi |
| 79116 | 0, // x8sub_1_then_sub_32 |
| 79117 | 0, // x8sub_1_then_sub_32_hi |
| 79118 | 0, // subo64_then_sub_32 |
| 79119 | 0, // subo64_then_sub_32_hi |
| 79120 | 328, // zsub1_then_zsub_hi -> ZPR4Mul4 |
| 79121 | 328, // zsub3_then_zsub_hi -> ZPR4Mul4 |
| 79122 | 328, // zsub2_then_zsub_hi -> ZPR4Mul4 |
| 79123 | 0, // dsub0_dsub1 |
| 79124 | 0, // dsub0_dsub1_dsub2 |
| 79125 | 328, // dsub1_dsub2 -> ZPR4Mul4 |
| 79126 | 328, // dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 79127 | 328, // dsub2_dsub3 -> ZPR4Mul4 |
| 79128 | 328, // dsub_dsub1 -> ZPR4Mul4 |
| 79129 | 328, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4 |
| 79130 | 328, // dsub_dsub1_dsub2 -> ZPR4Mul4 |
| 79131 | 0, // qsub0_qsub1 |
| 79132 | 0, // qsub0_qsub1_qsub2 |
| 79133 | 328, // qsub1_qsub2 -> ZPR4Mul4 |
| 79134 | 328, // qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 79135 | 328, // qsub2_qsub3 -> ZPR4Mul4 |
| 79136 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79137 | 0, // x8sub_0_x8sub_1 |
| 79138 | 0, // x8sub_2_x8sub_3 |
| 79139 | 0, // x8sub_4_x8sub_5 |
| 79140 | 0, // x8sub_6_x8sub_7 |
| 79141 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79142 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79143 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79144 | 0, // sub_32_subo64_then_sub_32 |
| 79145 | 328, // zsub_qsub1 -> ZPR4Mul4 |
| 79146 | 328, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4 |
| 79147 | 328, // zsub_qsub1_qsub2 -> ZPR4Mul4 |
| 79148 | 328, // zsub0_zsub1 -> ZPR4Mul4 |
| 79149 | 328, // zsub0_zsub1_zsub2 -> ZPR4Mul4 |
| 79150 | 328, // zsub1_zsub2 -> ZPR4Mul4 |
| 79151 | 328, // zsub1_zsub2_zsub3 -> ZPR4Mul4 |
| 79152 | 328, // zsub2_zsub3 -> ZPR4Mul4 |
| 79153 | 0, // zsub0_zsub2 |
| 79154 | 0, // zsub1_zsub3 |
| 79155 | }, |
| 79156 | { // ZPR4Strided |
| 79157 | 329, // bsub -> ZPR4Strided |
| 79158 | 329, // bsub_hi -> ZPR4Strided |
| 79159 | 329, // dsub -> ZPR4Strided |
| 79160 | 0, // dsub0 |
| 79161 | 329, // dsub1 -> ZPR4Strided |
| 79162 | 329, // dsub2 -> ZPR4Strided |
| 79163 | 329, // dsub3 -> ZPR4Strided |
| 79164 | 329, // dsub_hi -> ZPR4Strided |
| 79165 | 329, // hsub -> ZPR4Strided |
| 79166 | 329, // hsub_hi -> ZPR4Strided |
| 79167 | 0, // psub |
| 79168 | 0, // psub0 |
| 79169 | 0, // psub1 |
| 79170 | 0, // qsub0 |
| 79171 | 329, // qsub1 -> ZPR4Strided |
| 79172 | 329, // qsub2 -> ZPR4Strided |
| 79173 | 329, // qsub3 -> ZPR4Strided |
| 79174 | 329, // ssub -> ZPR4Strided |
| 79175 | 329, // ssub_hi -> ZPR4Strided |
| 79176 | 0, // sub_32 |
| 79177 | 0, // sub_32_hi |
| 79178 | 0, // sube32 |
| 79179 | 0, // sube64 |
| 79180 | 0, // subo32 |
| 79181 | 0, // subo64 |
| 79182 | 0, // x8sub_0 |
| 79183 | 0, // x8sub_1 |
| 79184 | 0, // x8sub_2 |
| 79185 | 0, // x8sub_3 |
| 79186 | 0, // x8sub_4 |
| 79187 | 0, // x8sub_5 |
| 79188 | 0, // x8sub_6 |
| 79189 | 0, // x8sub_7 |
| 79190 | 0, // zasubb |
| 79191 | 0, // zasubd0 |
| 79192 | 0, // zasubd1 |
| 79193 | 0, // zasubh0 |
| 79194 | 0, // zasubh1 |
| 79195 | 0, // zasubq0 |
| 79196 | 0, // zasubq1 |
| 79197 | 0, // zasubs0 |
| 79198 | 0, // zasubs1 |
| 79199 | 329, // zsub -> ZPR4Strided |
| 79200 | 329, // zsub0 -> ZPR4Strided |
| 79201 | 329, // zsub1 -> ZPR4Strided |
| 79202 | 329, // zsub2 -> ZPR4Strided |
| 79203 | 329, // zsub3 -> ZPR4Strided |
| 79204 | 329, // zsub_hi -> ZPR4Strided |
| 79205 | 0, // zasubd1_then_zasubq0 |
| 79206 | 0, // zasubd1_then_zasubq1 |
| 79207 | 0, // zasubs1_then_zasubd0 |
| 79208 | 0, // zasubs1_then_zasubd1 |
| 79209 | 0, // zasubs1_then_zasubq0 |
| 79210 | 0, // zasubs1_then_zasubq1 |
| 79211 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79212 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79213 | 0, // zasubh1_then_zasubd0 |
| 79214 | 0, // zasubh1_then_zasubd1 |
| 79215 | 0, // zasubh1_then_zasubq0 |
| 79216 | 0, // zasubh1_then_zasubq1 |
| 79217 | 0, // zasubh1_then_zasubs0 |
| 79218 | 0, // zasubh1_then_zasubs1 |
| 79219 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79220 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79221 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79222 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79223 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79224 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79225 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79226 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79227 | 329, // dsub1_then_bsub -> ZPR4Strided |
| 79228 | 329, // dsub1_then_bsub_hi -> ZPR4Strided |
| 79229 | 329, // dsub1_then_hsub -> ZPR4Strided |
| 79230 | 329, // dsub1_then_hsub_hi -> ZPR4Strided |
| 79231 | 329, // dsub1_then_ssub -> ZPR4Strided |
| 79232 | 329, // dsub1_then_ssub_hi -> ZPR4Strided |
| 79233 | 329, // dsub3_then_bsub -> ZPR4Strided |
| 79234 | 329, // dsub3_then_bsub_hi -> ZPR4Strided |
| 79235 | 329, // dsub3_then_hsub -> ZPR4Strided |
| 79236 | 329, // dsub3_then_hsub_hi -> ZPR4Strided |
| 79237 | 329, // dsub3_then_ssub -> ZPR4Strided |
| 79238 | 329, // dsub3_then_ssub_hi -> ZPR4Strided |
| 79239 | 329, // dsub2_then_bsub -> ZPR4Strided |
| 79240 | 329, // dsub2_then_bsub_hi -> ZPR4Strided |
| 79241 | 329, // dsub2_then_hsub -> ZPR4Strided |
| 79242 | 329, // dsub2_then_hsub_hi -> ZPR4Strided |
| 79243 | 329, // dsub2_then_ssub -> ZPR4Strided |
| 79244 | 329, // dsub2_then_ssub_hi -> ZPR4Strided |
| 79245 | 0, // psub1_then_psub |
| 79246 | 329, // qsub1_then_dsub_hi -> ZPR4Strided |
| 79247 | 329, // qsub3_then_dsub_hi -> ZPR4Strided |
| 79248 | 329, // qsub2_then_dsub_hi -> ZPR4Strided |
| 79249 | 0, // x8sub_7_then_sub_32 |
| 79250 | 0, // x8sub_7_then_sub_32_hi |
| 79251 | 0, // x8sub_6_then_sub_32 |
| 79252 | 0, // x8sub_6_then_sub_32_hi |
| 79253 | 0, // x8sub_5_then_sub_32 |
| 79254 | 0, // x8sub_5_then_sub_32_hi |
| 79255 | 0, // x8sub_4_then_sub_32 |
| 79256 | 0, // x8sub_4_then_sub_32_hi |
| 79257 | 0, // x8sub_3_then_sub_32 |
| 79258 | 0, // x8sub_3_then_sub_32_hi |
| 79259 | 0, // x8sub_2_then_sub_32 |
| 79260 | 0, // x8sub_2_then_sub_32_hi |
| 79261 | 0, // x8sub_1_then_sub_32 |
| 79262 | 0, // x8sub_1_then_sub_32_hi |
| 79263 | 0, // subo64_then_sub_32 |
| 79264 | 0, // subo64_then_sub_32_hi |
| 79265 | 329, // zsub1_then_zsub_hi -> ZPR4Strided |
| 79266 | 329, // zsub3_then_zsub_hi -> ZPR4Strided |
| 79267 | 329, // zsub2_then_zsub_hi -> ZPR4Strided |
| 79268 | 0, // dsub0_dsub1 |
| 79269 | 0, // dsub0_dsub1_dsub2 |
| 79270 | 0, // dsub1_dsub2 |
| 79271 | 0, // dsub1_dsub2_dsub3 |
| 79272 | 0, // dsub2_dsub3 |
| 79273 | 0, // dsub_dsub1 |
| 79274 | 0, // dsub_dsub1_dsub2_dsub3 |
| 79275 | 0, // dsub_dsub1_dsub2 |
| 79276 | 0, // qsub0_qsub1 |
| 79277 | 0, // qsub0_qsub1_qsub2 |
| 79278 | 0, // qsub1_qsub2 |
| 79279 | 0, // qsub1_qsub2_qsub3 |
| 79280 | 0, // qsub2_qsub3 |
| 79281 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79282 | 0, // x8sub_0_x8sub_1 |
| 79283 | 0, // x8sub_2_x8sub_3 |
| 79284 | 0, // x8sub_4_x8sub_5 |
| 79285 | 0, // x8sub_6_x8sub_7 |
| 79286 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79287 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79288 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79289 | 0, // sub_32_subo64_then_sub_32 |
| 79290 | 0, // zsub_qsub1 |
| 79291 | 0, // zsub_qsub1_qsub2_qsub3 |
| 79292 | 0, // zsub_qsub1_qsub2 |
| 79293 | 0, // zsub0_zsub1 |
| 79294 | 0, // zsub0_zsub1_zsub2 |
| 79295 | 0, // zsub1_zsub2 |
| 79296 | 0, // zsub1_zsub2_zsub3 |
| 79297 | 0, // zsub2_zsub3 |
| 79298 | 329, // zsub0_zsub2 -> ZPR4Strided |
| 79299 | 329, // zsub1_zsub3 -> ZPR4Strided |
| 79300 | }, |
| 79301 | { // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79302 | 330, // bsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79303 | 330, // bsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79304 | 330, // dsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79305 | 0, // dsub0 |
| 79306 | 330, // dsub1 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79307 | 330, // dsub2 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79308 | 330, // dsub3 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79309 | 330, // dsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79310 | 330, // hsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79311 | 330, // hsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79312 | 0, // psub |
| 79313 | 0, // psub0 |
| 79314 | 0, // psub1 |
| 79315 | 0, // qsub0 |
| 79316 | 330, // qsub1 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79317 | 330, // qsub2 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79318 | 330, // qsub3 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79319 | 330, // ssub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79320 | 330, // ssub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79321 | 0, // sub_32 |
| 79322 | 0, // sub_32_hi |
| 79323 | 0, // sube32 |
| 79324 | 0, // sube64 |
| 79325 | 0, // subo32 |
| 79326 | 0, // subo64 |
| 79327 | 0, // x8sub_0 |
| 79328 | 0, // x8sub_1 |
| 79329 | 0, // x8sub_2 |
| 79330 | 0, // x8sub_3 |
| 79331 | 0, // x8sub_4 |
| 79332 | 0, // x8sub_5 |
| 79333 | 0, // x8sub_6 |
| 79334 | 0, // x8sub_7 |
| 79335 | 0, // zasubb |
| 79336 | 0, // zasubd0 |
| 79337 | 0, // zasubd1 |
| 79338 | 0, // zasubh0 |
| 79339 | 0, // zasubh1 |
| 79340 | 0, // zasubq0 |
| 79341 | 0, // zasubq1 |
| 79342 | 0, // zasubs0 |
| 79343 | 0, // zasubs1 |
| 79344 | 330, // zsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79345 | 330, // zsub0 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79346 | 330, // zsub1 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79347 | 330, // zsub2 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79348 | 330, // zsub3 -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79349 | 330, // zsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79350 | 0, // zasubd1_then_zasubq0 |
| 79351 | 0, // zasubd1_then_zasubq1 |
| 79352 | 0, // zasubs1_then_zasubd0 |
| 79353 | 0, // zasubs1_then_zasubd1 |
| 79354 | 0, // zasubs1_then_zasubq0 |
| 79355 | 0, // zasubs1_then_zasubq1 |
| 79356 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79357 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79358 | 0, // zasubh1_then_zasubd0 |
| 79359 | 0, // zasubh1_then_zasubd1 |
| 79360 | 0, // zasubh1_then_zasubq0 |
| 79361 | 0, // zasubh1_then_zasubq1 |
| 79362 | 0, // zasubh1_then_zasubs0 |
| 79363 | 0, // zasubh1_then_zasubs1 |
| 79364 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79365 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79366 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79367 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79368 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79369 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79370 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79371 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79372 | 330, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79373 | 330, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79374 | 330, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79375 | 330, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79376 | 330, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79377 | 330, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79378 | 330, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79379 | 330, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79380 | 330, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79381 | 330, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79382 | 330, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79383 | 330, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79384 | 330, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79385 | 330, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79386 | 330, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79387 | 330, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79388 | 330, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79389 | 330, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79390 | 0, // psub1_then_psub |
| 79391 | 330, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79392 | 330, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79393 | 330, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79394 | 0, // x8sub_7_then_sub_32 |
| 79395 | 0, // x8sub_7_then_sub_32_hi |
| 79396 | 0, // x8sub_6_then_sub_32 |
| 79397 | 0, // x8sub_6_then_sub_32_hi |
| 79398 | 0, // x8sub_5_then_sub_32 |
| 79399 | 0, // x8sub_5_then_sub_32_hi |
| 79400 | 0, // x8sub_4_then_sub_32 |
| 79401 | 0, // x8sub_4_then_sub_32_hi |
| 79402 | 0, // x8sub_3_then_sub_32 |
| 79403 | 0, // x8sub_3_then_sub_32_hi |
| 79404 | 0, // x8sub_2_then_sub_32 |
| 79405 | 0, // x8sub_2_then_sub_32_hi |
| 79406 | 0, // x8sub_1_then_sub_32 |
| 79407 | 0, // x8sub_1_then_sub_32_hi |
| 79408 | 0, // subo64_then_sub_32 |
| 79409 | 0, // subo64_then_sub_32_hi |
| 79410 | 330, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79411 | 330, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79412 | 330, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 79413 | 0, // dsub0_dsub1 |
| 79414 | 0, // dsub0_dsub1_dsub2 |
| 79415 | 386, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79416 | 386, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79417 | 386, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79418 | 386, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79419 | 386, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79420 | 386, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79421 | 0, // qsub0_qsub1 |
| 79422 | 0, // qsub0_qsub1_qsub2 |
| 79423 | 386, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79424 | 386, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79425 | 386, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79426 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79427 | 0, // x8sub_0_x8sub_1 |
| 79428 | 0, // x8sub_2_x8sub_3 |
| 79429 | 0, // x8sub_4_x8sub_5 |
| 79430 | 0, // x8sub_6_x8sub_7 |
| 79431 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79432 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79433 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79434 | 0, // sub_32_subo64_then_sub_32 |
| 79435 | 386, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79436 | 386, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79437 | 386, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79438 | 386, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79439 | 386, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79440 | 386, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79441 | 386, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79442 | 386, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 79443 | 380, // zsub0_zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 79444 | 380, // zsub1_zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 79445 | }, |
| 79446 | { // ZPR4_with_qsub1_in_FPR128_0to7 |
| 79447 | 331, // bsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79448 | 331, // bsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79449 | 331, // dsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79450 | 0, // dsub0 |
| 79451 | 331, // dsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79452 | 331, // dsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79453 | 331, // dsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79454 | 331, // dsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79455 | 331, // hsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79456 | 331, // hsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79457 | 0, // psub |
| 79458 | 0, // psub0 |
| 79459 | 0, // psub1 |
| 79460 | 0, // qsub0 |
| 79461 | 331, // qsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79462 | 331, // qsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79463 | 331, // qsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79464 | 331, // ssub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79465 | 331, // ssub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79466 | 0, // sub_32 |
| 79467 | 0, // sub_32_hi |
| 79468 | 0, // sube32 |
| 79469 | 0, // sube64 |
| 79470 | 0, // subo32 |
| 79471 | 0, // subo64 |
| 79472 | 0, // x8sub_0 |
| 79473 | 0, // x8sub_1 |
| 79474 | 0, // x8sub_2 |
| 79475 | 0, // x8sub_3 |
| 79476 | 0, // x8sub_4 |
| 79477 | 0, // x8sub_5 |
| 79478 | 0, // x8sub_6 |
| 79479 | 0, // x8sub_7 |
| 79480 | 0, // zasubb |
| 79481 | 0, // zasubd0 |
| 79482 | 0, // zasubd1 |
| 79483 | 0, // zasubh0 |
| 79484 | 0, // zasubh1 |
| 79485 | 0, // zasubq0 |
| 79486 | 0, // zasubq1 |
| 79487 | 0, // zasubs0 |
| 79488 | 0, // zasubs1 |
| 79489 | 331, // zsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79490 | 331, // zsub0 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79491 | 331, // zsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79492 | 331, // zsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79493 | 331, // zsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79494 | 331, // zsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79495 | 0, // zasubd1_then_zasubq0 |
| 79496 | 0, // zasubd1_then_zasubq1 |
| 79497 | 0, // zasubs1_then_zasubd0 |
| 79498 | 0, // zasubs1_then_zasubd1 |
| 79499 | 0, // zasubs1_then_zasubq0 |
| 79500 | 0, // zasubs1_then_zasubq1 |
| 79501 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79502 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79503 | 0, // zasubh1_then_zasubd0 |
| 79504 | 0, // zasubh1_then_zasubd1 |
| 79505 | 0, // zasubh1_then_zasubq0 |
| 79506 | 0, // zasubh1_then_zasubq1 |
| 79507 | 0, // zasubh1_then_zasubs0 |
| 79508 | 0, // zasubh1_then_zasubs1 |
| 79509 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79510 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79511 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79512 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79513 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79514 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79515 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79516 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79517 | 331, // dsub1_then_bsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79518 | 331, // dsub1_then_bsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79519 | 331, // dsub1_then_hsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79520 | 331, // dsub1_then_hsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79521 | 331, // dsub1_then_ssub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79522 | 331, // dsub1_then_ssub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79523 | 331, // dsub3_then_bsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79524 | 331, // dsub3_then_bsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79525 | 331, // dsub3_then_hsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79526 | 331, // dsub3_then_hsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79527 | 331, // dsub3_then_ssub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79528 | 331, // dsub3_then_ssub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79529 | 331, // dsub2_then_bsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79530 | 331, // dsub2_then_bsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79531 | 331, // dsub2_then_hsub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79532 | 331, // dsub2_then_hsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79533 | 331, // dsub2_then_ssub -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79534 | 331, // dsub2_then_ssub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79535 | 0, // psub1_then_psub |
| 79536 | 331, // qsub1_then_dsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79537 | 331, // qsub3_then_dsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79538 | 331, // qsub2_then_dsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79539 | 0, // x8sub_7_then_sub_32 |
| 79540 | 0, // x8sub_7_then_sub_32_hi |
| 79541 | 0, // x8sub_6_then_sub_32 |
| 79542 | 0, // x8sub_6_then_sub_32_hi |
| 79543 | 0, // x8sub_5_then_sub_32 |
| 79544 | 0, // x8sub_5_then_sub_32_hi |
| 79545 | 0, // x8sub_4_then_sub_32 |
| 79546 | 0, // x8sub_4_then_sub_32_hi |
| 79547 | 0, // x8sub_3_then_sub_32 |
| 79548 | 0, // x8sub_3_then_sub_32_hi |
| 79549 | 0, // x8sub_2_then_sub_32 |
| 79550 | 0, // x8sub_2_then_sub_32_hi |
| 79551 | 0, // x8sub_1_then_sub_32 |
| 79552 | 0, // x8sub_1_then_sub_32_hi |
| 79553 | 0, // subo64_then_sub_32 |
| 79554 | 0, // subo64_then_sub_32_hi |
| 79555 | 331, // zsub1_then_zsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79556 | 331, // zsub3_then_zsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79557 | 331, // zsub2_then_zsub_hi -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79558 | 0, // dsub0_dsub1 |
| 79559 | 0, // dsub0_dsub1_dsub2 |
| 79560 | 331, // dsub1_dsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79561 | 331, // dsub1_dsub2_dsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79562 | 331, // dsub2_dsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79563 | 331, // dsub_dsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79564 | 331, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79565 | 331, // dsub_dsub1_dsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79566 | 0, // qsub0_qsub1 |
| 79567 | 0, // qsub0_qsub1_qsub2 |
| 79568 | 331, // qsub1_qsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79569 | 331, // qsub1_qsub2_qsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79570 | 331, // qsub2_qsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79571 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79572 | 0, // x8sub_0_x8sub_1 |
| 79573 | 0, // x8sub_2_x8sub_3 |
| 79574 | 0, // x8sub_4_x8sub_5 |
| 79575 | 0, // x8sub_6_x8sub_7 |
| 79576 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79577 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79578 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79579 | 0, // sub_32_subo64_then_sub_32 |
| 79580 | 331, // zsub_qsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79581 | 331, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79582 | 331, // zsub_qsub1_qsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79583 | 331, // zsub0_zsub1 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79584 | 331, // zsub0_zsub1_zsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79585 | 331, // zsub1_zsub2 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79586 | 331, // zsub1_zsub2_zsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79587 | 331, // zsub2_zsub3 -> ZPR4_with_qsub1_in_FPR128_0to7 |
| 79588 | 0, // zsub0_zsub2 |
| 79589 | 0, // zsub1_zsub3 |
| 79590 | }, |
| 79591 | { // ZPR4_with_qsub2_in_FPR128_0to7 |
| 79592 | 332, // bsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79593 | 332, // bsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79594 | 332, // dsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79595 | 0, // dsub0 |
| 79596 | 332, // dsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79597 | 332, // dsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79598 | 332, // dsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79599 | 332, // dsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79600 | 332, // hsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79601 | 332, // hsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79602 | 0, // psub |
| 79603 | 0, // psub0 |
| 79604 | 0, // psub1 |
| 79605 | 0, // qsub0 |
| 79606 | 332, // qsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79607 | 332, // qsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79608 | 332, // qsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79609 | 332, // ssub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79610 | 332, // ssub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79611 | 0, // sub_32 |
| 79612 | 0, // sub_32_hi |
| 79613 | 0, // sube32 |
| 79614 | 0, // sube64 |
| 79615 | 0, // subo32 |
| 79616 | 0, // subo64 |
| 79617 | 0, // x8sub_0 |
| 79618 | 0, // x8sub_1 |
| 79619 | 0, // x8sub_2 |
| 79620 | 0, // x8sub_3 |
| 79621 | 0, // x8sub_4 |
| 79622 | 0, // x8sub_5 |
| 79623 | 0, // x8sub_6 |
| 79624 | 0, // x8sub_7 |
| 79625 | 0, // zasubb |
| 79626 | 0, // zasubd0 |
| 79627 | 0, // zasubd1 |
| 79628 | 0, // zasubh0 |
| 79629 | 0, // zasubh1 |
| 79630 | 0, // zasubq0 |
| 79631 | 0, // zasubq1 |
| 79632 | 0, // zasubs0 |
| 79633 | 0, // zasubs1 |
| 79634 | 332, // zsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79635 | 332, // zsub0 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79636 | 332, // zsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79637 | 332, // zsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79638 | 332, // zsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79639 | 332, // zsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79640 | 0, // zasubd1_then_zasubq0 |
| 79641 | 0, // zasubd1_then_zasubq1 |
| 79642 | 0, // zasubs1_then_zasubd0 |
| 79643 | 0, // zasubs1_then_zasubd1 |
| 79644 | 0, // zasubs1_then_zasubq0 |
| 79645 | 0, // zasubs1_then_zasubq1 |
| 79646 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79647 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79648 | 0, // zasubh1_then_zasubd0 |
| 79649 | 0, // zasubh1_then_zasubd1 |
| 79650 | 0, // zasubh1_then_zasubq0 |
| 79651 | 0, // zasubh1_then_zasubq1 |
| 79652 | 0, // zasubh1_then_zasubs0 |
| 79653 | 0, // zasubh1_then_zasubs1 |
| 79654 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79655 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79656 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79657 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79658 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79659 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79660 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79661 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79662 | 332, // dsub1_then_bsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79663 | 332, // dsub1_then_bsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79664 | 332, // dsub1_then_hsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79665 | 332, // dsub1_then_hsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79666 | 332, // dsub1_then_ssub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79667 | 332, // dsub1_then_ssub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79668 | 332, // dsub3_then_bsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79669 | 332, // dsub3_then_bsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79670 | 332, // dsub3_then_hsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79671 | 332, // dsub3_then_hsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79672 | 332, // dsub3_then_ssub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79673 | 332, // dsub3_then_ssub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79674 | 332, // dsub2_then_bsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79675 | 332, // dsub2_then_bsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79676 | 332, // dsub2_then_hsub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79677 | 332, // dsub2_then_hsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79678 | 332, // dsub2_then_ssub -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79679 | 332, // dsub2_then_ssub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79680 | 0, // psub1_then_psub |
| 79681 | 332, // qsub1_then_dsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79682 | 332, // qsub3_then_dsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79683 | 332, // qsub2_then_dsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79684 | 0, // x8sub_7_then_sub_32 |
| 79685 | 0, // x8sub_7_then_sub_32_hi |
| 79686 | 0, // x8sub_6_then_sub_32 |
| 79687 | 0, // x8sub_6_then_sub_32_hi |
| 79688 | 0, // x8sub_5_then_sub_32 |
| 79689 | 0, // x8sub_5_then_sub_32_hi |
| 79690 | 0, // x8sub_4_then_sub_32 |
| 79691 | 0, // x8sub_4_then_sub_32_hi |
| 79692 | 0, // x8sub_3_then_sub_32 |
| 79693 | 0, // x8sub_3_then_sub_32_hi |
| 79694 | 0, // x8sub_2_then_sub_32 |
| 79695 | 0, // x8sub_2_then_sub_32_hi |
| 79696 | 0, // x8sub_1_then_sub_32 |
| 79697 | 0, // x8sub_1_then_sub_32_hi |
| 79698 | 0, // subo64_then_sub_32 |
| 79699 | 0, // subo64_then_sub_32_hi |
| 79700 | 332, // zsub1_then_zsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79701 | 332, // zsub3_then_zsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79702 | 332, // zsub2_then_zsub_hi -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79703 | 0, // dsub0_dsub1 |
| 79704 | 0, // dsub0_dsub1_dsub2 |
| 79705 | 332, // dsub1_dsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79706 | 332, // dsub1_dsub2_dsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79707 | 332, // dsub2_dsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79708 | 332, // dsub_dsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79709 | 332, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79710 | 332, // dsub_dsub1_dsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79711 | 0, // qsub0_qsub1 |
| 79712 | 0, // qsub0_qsub1_qsub2 |
| 79713 | 332, // qsub1_qsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79714 | 332, // qsub1_qsub2_qsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79715 | 332, // qsub2_qsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79716 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79717 | 0, // x8sub_0_x8sub_1 |
| 79718 | 0, // x8sub_2_x8sub_3 |
| 79719 | 0, // x8sub_4_x8sub_5 |
| 79720 | 0, // x8sub_6_x8sub_7 |
| 79721 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79722 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79723 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79724 | 0, // sub_32_subo64_then_sub_32 |
| 79725 | 332, // zsub_qsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79726 | 332, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79727 | 332, // zsub_qsub1_qsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79728 | 332, // zsub0_zsub1 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79729 | 332, // zsub0_zsub1_zsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79730 | 332, // zsub1_zsub2 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79731 | 332, // zsub1_zsub2_zsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79732 | 332, // zsub2_zsub3 -> ZPR4_with_qsub2_in_FPR128_0to7 |
| 79733 | 0, // zsub0_zsub2 |
| 79734 | 0, // zsub1_zsub3 |
| 79735 | }, |
| 79736 | { // ZPR4_with_qsub3_in_FPR128_0to7 |
| 79737 | 333, // bsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79738 | 333, // bsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79739 | 333, // dsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79740 | 0, // dsub0 |
| 79741 | 333, // dsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79742 | 333, // dsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79743 | 333, // dsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79744 | 333, // dsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79745 | 333, // hsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79746 | 333, // hsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79747 | 0, // psub |
| 79748 | 0, // psub0 |
| 79749 | 0, // psub1 |
| 79750 | 0, // qsub0 |
| 79751 | 333, // qsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79752 | 333, // qsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79753 | 333, // qsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79754 | 333, // ssub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79755 | 333, // ssub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79756 | 0, // sub_32 |
| 79757 | 0, // sub_32_hi |
| 79758 | 0, // sube32 |
| 79759 | 0, // sube64 |
| 79760 | 0, // subo32 |
| 79761 | 0, // subo64 |
| 79762 | 0, // x8sub_0 |
| 79763 | 0, // x8sub_1 |
| 79764 | 0, // x8sub_2 |
| 79765 | 0, // x8sub_3 |
| 79766 | 0, // x8sub_4 |
| 79767 | 0, // x8sub_5 |
| 79768 | 0, // x8sub_6 |
| 79769 | 0, // x8sub_7 |
| 79770 | 0, // zasubb |
| 79771 | 0, // zasubd0 |
| 79772 | 0, // zasubd1 |
| 79773 | 0, // zasubh0 |
| 79774 | 0, // zasubh1 |
| 79775 | 0, // zasubq0 |
| 79776 | 0, // zasubq1 |
| 79777 | 0, // zasubs0 |
| 79778 | 0, // zasubs1 |
| 79779 | 333, // zsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79780 | 333, // zsub0 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79781 | 333, // zsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79782 | 333, // zsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79783 | 333, // zsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79784 | 333, // zsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79785 | 0, // zasubd1_then_zasubq0 |
| 79786 | 0, // zasubd1_then_zasubq1 |
| 79787 | 0, // zasubs1_then_zasubd0 |
| 79788 | 0, // zasubs1_then_zasubd1 |
| 79789 | 0, // zasubs1_then_zasubq0 |
| 79790 | 0, // zasubs1_then_zasubq1 |
| 79791 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79792 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79793 | 0, // zasubh1_then_zasubd0 |
| 79794 | 0, // zasubh1_then_zasubd1 |
| 79795 | 0, // zasubh1_then_zasubq0 |
| 79796 | 0, // zasubh1_then_zasubq1 |
| 79797 | 0, // zasubh1_then_zasubs0 |
| 79798 | 0, // zasubh1_then_zasubs1 |
| 79799 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79800 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79801 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79802 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79803 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79804 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79805 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79806 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79807 | 333, // dsub1_then_bsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79808 | 333, // dsub1_then_bsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79809 | 333, // dsub1_then_hsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79810 | 333, // dsub1_then_hsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79811 | 333, // dsub1_then_ssub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79812 | 333, // dsub1_then_ssub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79813 | 333, // dsub3_then_bsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79814 | 333, // dsub3_then_bsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79815 | 333, // dsub3_then_hsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79816 | 333, // dsub3_then_hsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79817 | 333, // dsub3_then_ssub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79818 | 333, // dsub3_then_ssub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79819 | 333, // dsub2_then_bsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79820 | 333, // dsub2_then_bsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79821 | 333, // dsub2_then_hsub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79822 | 333, // dsub2_then_hsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79823 | 333, // dsub2_then_ssub -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79824 | 333, // dsub2_then_ssub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79825 | 0, // psub1_then_psub |
| 79826 | 333, // qsub1_then_dsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79827 | 333, // qsub3_then_dsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79828 | 333, // qsub2_then_dsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79829 | 0, // x8sub_7_then_sub_32 |
| 79830 | 0, // x8sub_7_then_sub_32_hi |
| 79831 | 0, // x8sub_6_then_sub_32 |
| 79832 | 0, // x8sub_6_then_sub_32_hi |
| 79833 | 0, // x8sub_5_then_sub_32 |
| 79834 | 0, // x8sub_5_then_sub_32_hi |
| 79835 | 0, // x8sub_4_then_sub_32 |
| 79836 | 0, // x8sub_4_then_sub_32_hi |
| 79837 | 0, // x8sub_3_then_sub_32 |
| 79838 | 0, // x8sub_3_then_sub_32_hi |
| 79839 | 0, // x8sub_2_then_sub_32 |
| 79840 | 0, // x8sub_2_then_sub_32_hi |
| 79841 | 0, // x8sub_1_then_sub_32 |
| 79842 | 0, // x8sub_1_then_sub_32_hi |
| 79843 | 0, // subo64_then_sub_32 |
| 79844 | 0, // subo64_then_sub_32_hi |
| 79845 | 333, // zsub1_then_zsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79846 | 333, // zsub3_then_zsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79847 | 333, // zsub2_then_zsub_hi -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79848 | 0, // dsub0_dsub1 |
| 79849 | 0, // dsub0_dsub1_dsub2 |
| 79850 | 333, // dsub1_dsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79851 | 333, // dsub1_dsub2_dsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79852 | 333, // dsub2_dsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79853 | 333, // dsub_dsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79854 | 333, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79855 | 333, // dsub_dsub1_dsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79856 | 0, // qsub0_qsub1 |
| 79857 | 0, // qsub0_qsub1_qsub2 |
| 79858 | 333, // qsub1_qsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79859 | 333, // qsub1_qsub2_qsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79860 | 333, // qsub2_qsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79861 | 0, // sub_32_x8sub_1_then_sub_32 |
| 79862 | 0, // x8sub_0_x8sub_1 |
| 79863 | 0, // x8sub_2_x8sub_3 |
| 79864 | 0, // x8sub_4_x8sub_5 |
| 79865 | 0, // x8sub_6_x8sub_7 |
| 79866 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 79867 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 79868 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 79869 | 0, // sub_32_subo64_then_sub_32 |
| 79870 | 333, // zsub_qsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79871 | 333, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79872 | 333, // zsub_qsub1_qsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79873 | 333, // zsub0_zsub1 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79874 | 333, // zsub0_zsub1_zsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79875 | 333, // zsub1_zsub2 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79876 | 333, // zsub1_zsub2_zsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79877 | 333, // zsub2_zsub3 -> ZPR4_with_qsub3_in_FPR128_0to7 |
| 79878 | 0, // zsub0_zsub2 |
| 79879 | 0, // zsub1_zsub3 |
| 79880 | }, |
| 79881 | { // ZPR4_with_zsub0_in_ZPR_K |
| 79882 | 334, // bsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79883 | 334, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79884 | 334, // dsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79885 | 0, // dsub0 |
| 79886 | 334, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 79887 | 334, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 79888 | 334, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 79889 | 334, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79890 | 334, // hsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79891 | 334, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79892 | 0, // psub |
| 79893 | 0, // psub0 |
| 79894 | 0, // psub1 |
| 79895 | 0, // qsub0 |
| 79896 | 334, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 79897 | 334, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 79898 | 334, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 79899 | 334, // ssub -> ZPR4_with_zsub0_in_ZPR_K |
| 79900 | 334, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79901 | 0, // sub_32 |
| 79902 | 0, // sub_32_hi |
| 79903 | 0, // sube32 |
| 79904 | 0, // sube64 |
| 79905 | 0, // subo32 |
| 79906 | 0, // subo64 |
| 79907 | 0, // x8sub_0 |
| 79908 | 0, // x8sub_1 |
| 79909 | 0, // x8sub_2 |
| 79910 | 0, // x8sub_3 |
| 79911 | 0, // x8sub_4 |
| 79912 | 0, // x8sub_5 |
| 79913 | 0, // x8sub_6 |
| 79914 | 0, // x8sub_7 |
| 79915 | 0, // zasubb |
| 79916 | 0, // zasubd0 |
| 79917 | 0, // zasubd1 |
| 79918 | 0, // zasubh0 |
| 79919 | 0, // zasubh1 |
| 79920 | 0, // zasubq0 |
| 79921 | 0, // zasubq1 |
| 79922 | 0, // zasubs0 |
| 79923 | 0, // zasubs1 |
| 79924 | 334, // zsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79925 | 334, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K |
| 79926 | 334, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 79927 | 334, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 79928 | 334, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 79929 | 334, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79930 | 0, // zasubd1_then_zasubq0 |
| 79931 | 0, // zasubd1_then_zasubq1 |
| 79932 | 0, // zasubs1_then_zasubd0 |
| 79933 | 0, // zasubs1_then_zasubd1 |
| 79934 | 0, // zasubs1_then_zasubq0 |
| 79935 | 0, // zasubs1_then_zasubq1 |
| 79936 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 79937 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 79938 | 0, // zasubh1_then_zasubd0 |
| 79939 | 0, // zasubh1_then_zasubd1 |
| 79940 | 0, // zasubh1_then_zasubq0 |
| 79941 | 0, // zasubh1_then_zasubq1 |
| 79942 | 0, // zasubh1_then_zasubs0 |
| 79943 | 0, // zasubh1_then_zasubs1 |
| 79944 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 79945 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 79946 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 79947 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 79948 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 79949 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 79950 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 79951 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 79952 | 334, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79953 | 334, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79954 | 334, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79955 | 334, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79956 | 334, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K |
| 79957 | 334, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79958 | 334, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79959 | 334, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79960 | 334, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79961 | 334, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79962 | 334, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K |
| 79963 | 334, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79964 | 334, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79965 | 334, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79966 | 334, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K |
| 79967 | 334, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79968 | 334, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K |
| 79969 | 334, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79970 | 0, // psub1_then_psub |
| 79971 | 334, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79972 | 334, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79973 | 334, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79974 | 0, // x8sub_7_then_sub_32 |
| 79975 | 0, // x8sub_7_then_sub_32_hi |
| 79976 | 0, // x8sub_6_then_sub_32 |
| 79977 | 0, // x8sub_6_then_sub_32_hi |
| 79978 | 0, // x8sub_5_then_sub_32 |
| 79979 | 0, // x8sub_5_then_sub_32_hi |
| 79980 | 0, // x8sub_4_then_sub_32 |
| 79981 | 0, // x8sub_4_then_sub_32_hi |
| 79982 | 0, // x8sub_3_then_sub_32 |
| 79983 | 0, // x8sub_3_then_sub_32_hi |
| 79984 | 0, // x8sub_2_then_sub_32 |
| 79985 | 0, // x8sub_2_then_sub_32_hi |
| 79986 | 0, // x8sub_1_then_sub_32 |
| 79987 | 0, // x8sub_1_then_sub_32_hi |
| 79988 | 0, // subo64_then_sub_32 |
| 79989 | 0, // subo64_then_sub_32_hi |
| 79990 | 334, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79991 | 334, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79992 | 334, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K |
| 79993 | 0, // dsub0_dsub1 |
| 79994 | 0, // dsub0_dsub1_dsub2 |
| 79995 | 334, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 79996 | 334, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 79997 | 334, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 79998 | 334, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 79999 | 334, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80000 | 334, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 80001 | 0, // qsub0_qsub1 |
| 80002 | 0, // qsub0_qsub1_qsub2 |
| 80003 | 334, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 80004 | 334, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80005 | 334, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80006 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80007 | 0, // x8sub_0_x8sub_1 |
| 80008 | 0, // x8sub_2_x8sub_3 |
| 80009 | 0, // x8sub_4_x8sub_5 |
| 80010 | 0, // x8sub_6_x8sub_7 |
| 80011 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80012 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80013 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80014 | 0, // sub_32_subo64_then_sub_32 |
| 80015 | 334, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 80016 | 334, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80017 | 334, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 80018 | 334, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K |
| 80019 | 334, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 80020 | 334, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K |
| 80021 | 334, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80022 | 334, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K |
| 80023 | 0, // zsub0_zsub2 |
| 80024 | 0, // zsub1_zsub3 |
| 80025 | }, |
| 80026 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80027 | 335, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80028 | 335, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80029 | 335, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80030 | 0, // dsub0 |
| 80031 | 335, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80032 | 335, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80033 | 335, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80034 | 335, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80035 | 335, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80036 | 335, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80037 | 0, // psub |
| 80038 | 0, // psub0 |
| 80039 | 0, // psub1 |
| 80040 | 0, // qsub0 |
| 80041 | 335, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80042 | 335, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80043 | 335, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80044 | 335, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80045 | 335, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80046 | 0, // sub_32 |
| 80047 | 0, // sub_32_hi |
| 80048 | 0, // sube32 |
| 80049 | 0, // sube64 |
| 80050 | 0, // subo32 |
| 80051 | 0, // subo64 |
| 80052 | 0, // x8sub_0 |
| 80053 | 0, // x8sub_1 |
| 80054 | 0, // x8sub_2 |
| 80055 | 0, // x8sub_3 |
| 80056 | 0, // x8sub_4 |
| 80057 | 0, // x8sub_5 |
| 80058 | 0, // x8sub_6 |
| 80059 | 0, // x8sub_7 |
| 80060 | 0, // zasubb |
| 80061 | 0, // zasubd0 |
| 80062 | 0, // zasubd1 |
| 80063 | 0, // zasubh0 |
| 80064 | 0, // zasubh1 |
| 80065 | 0, // zasubq0 |
| 80066 | 0, // zasubq1 |
| 80067 | 0, // zasubs0 |
| 80068 | 0, // zasubs1 |
| 80069 | 335, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80070 | 335, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80071 | 335, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80072 | 335, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80073 | 335, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80074 | 335, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80075 | 0, // zasubd1_then_zasubq0 |
| 80076 | 0, // zasubd1_then_zasubq1 |
| 80077 | 0, // zasubs1_then_zasubd0 |
| 80078 | 0, // zasubs1_then_zasubd1 |
| 80079 | 0, // zasubs1_then_zasubq0 |
| 80080 | 0, // zasubs1_then_zasubq1 |
| 80081 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80082 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80083 | 0, // zasubh1_then_zasubd0 |
| 80084 | 0, // zasubh1_then_zasubd1 |
| 80085 | 0, // zasubh1_then_zasubq0 |
| 80086 | 0, // zasubh1_then_zasubq1 |
| 80087 | 0, // zasubh1_then_zasubs0 |
| 80088 | 0, // zasubh1_then_zasubs1 |
| 80089 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80090 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80091 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80092 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80093 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80094 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80095 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80096 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80097 | 335, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80098 | 335, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80099 | 335, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80100 | 335, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80101 | 335, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80102 | 335, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80103 | 335, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80104 | 335, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80105 | 335, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80106 | 335, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80107 | 335, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80108 | 335, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80109 | 335, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80110 | 335, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80111 | 335, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80112 | 335, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80113 | 335, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80114 | 335, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80115 | 0, // psub1_then_psub |
| 80116 | 335, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80117 | 335, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80118 | 335, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80119 | 0, // x8sub_7_then_sub_32 |
| 80120 | 0, // x8sub_7_then_sub_32_hi |
| 80121 | 0, // x8sub_6_then_sub_32 |
| 80122 | 0, // x8sub_6_then_sub_32_hi |
| 80123 | 0, // x8sub_5_then_sub_32 |
| 80124 | 0, // x8sub_5_then_sub_32_hi |
| 80125 | 0, // x8sub_4_then_sub_32 |
| 80126 | 0, // x8sub_4_then_sub_32_hi |
| 80127 | 0, // x8sub_3_then_sub_32 |
| 80128 | 0, // x8sub_3_then_sub_32_hi |
| 80129 | 0, // x8sub_2_then_sub_32 |
| 80130 | 0, // x8sub_2_then_sub_32_hi |
| 80131 | 0, // x8sub_1_then_sub_32 |
| 80132 | 0, // x8sub_1_then_sub_32_hi |
| 80133 | 0, // subo64_then_sub_32 |
| 80134 | 0, // subo64_then_sub_32_hi |
| 80135 | 335, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80136 | 335, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80137 | 335, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80138 | 0, // dsub0_dsub1 |
| 80139 | 0, // dsub0_dsub1_dsub2 |
| 80140 | 335, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80141 | 335, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80142 | 335, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80143 | 335, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80144 | 335, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80145 | 335, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80146 | 0, // qsub0_qsub1 |
| 80147 | 0, // qsub0_qsub1_qsub2 |
| 80148 | 335, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80149 | 335, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80150 | 335, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80151 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80152 | 0, // x8sub_0_x8sub_1 |
| 80153 | 0, // x8sub_2_x8sub_3 |
| 80154 | 0, // x8sub_4_x8sub_5 |
| 80155 | 0, // x8sub_6_x8sub_7 |
| 80156 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80157 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80158 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80159 | 0, // sub_32_subo64_then_sub_32 |
| 80160 | 335, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80161 | 335, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80162 | 335, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80163 | 335, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80164 | 335, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80165 | 335, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80166 | 335, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80167 | 335, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 80168 | 0, // zsub0_zsub2 |
| 80169 | 0, // zsub1_zsub3 |
| 80170 | }, |
| 80171 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80172 | 336, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80173 | 336, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80174 | 336, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80175 | 0, // dsub0 |
| 80176 | 336, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80177 | 336, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80178 | 336, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80179 | 336, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80180 | 336, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80181 | 336, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80182 | 0, // psub |
| 80183 | 0, // psub0 |
| 80184 | 0, // psub1 |
| 80185 | 0, // qsub0 |
| 80186 | 336, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80187 | 336, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80188 | 336, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80189 | 336, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80190 | 336, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80191 | 0, // sub_32 |
| 80192 | 0, // sub_32_hi |
| 80193 | 0, // sube32 |
| 80194 | 0, // sube64 |
| 80195 | 0, // subo32 |
| 80196 | 0, // subo64 |
| 80197 | 0, // x8sub_0 |
| 80198 | 0, // x8sub_1 |
| 80199 | 0, // x8sub_2 |
| 80200 | 0, // x8sub_3 |
| 80201 | 0, // x8sub_4 |
| 80202 | 0, // x8sub_5 |
| 80203 | 0, // x8sub_6 |
| 80204 | 0, // x8sub_7 |
| 80205 | 0, // zasubb |
| 80206 | 0, // zasubd0 |
| 80207 | 0, // zasubd1 |
| 80208 | 0, // zasubh0 |
| 80209 | 0, // zasubh1 |
| 80210 | 0, // zasubq0 |
| 80211 | 0, // zasubq1 |
| 80212 | 0, // zasubs0 |
| 80213 | 0, // zasubs1 |
| 80214 | 336, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80215 | 336, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80216 | 336, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80217 | 336, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80218 | 336, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80219 | 336, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80220 | 0, // zasubd1_then_zasubq0 |
| 80221 | 0, // zasubd1_then_zasubq1 |
| 80222 | 0, // zasubs1_then_zasubd0 |
| 80223 | 0, // zasubs1_then_zasubd1 |
| 80224 | 0, // zasubs1_then_zasubq0 |
| 80225 | 0, // zasubs1_then_zasubq1 |
| 80226 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80227 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80228 | 0, // zasubh1_then_zasubd0 |
| 80229 | 0, // zasubh1_then_zasubd1 |
| 80230 | 0, // zasubh1_then_zasubq0 |
| 80231 | 0, // zasubh1_then_zasubq1 |
| 80232 | 0, // zasubh1_then_zasubs0 |
| 80233 | 0, // zasubh1_then_zasubs1 |
| 80234 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80235 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80236 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80237 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80238 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80239 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80240 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80241 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80242 | 336, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80243 | 336, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80244 | 336, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80245 | 336, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80246 | 336, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80247 | 336, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80248 | 336, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80249 | 336, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80250 | 336, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80251 | 336, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80252 | 336, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80253 | 336, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80254 | 336, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80255 | 336, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80256 | 336, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80257 | 336, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80258 | 336, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80259 | 336, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80260 | 0, // psub1_then_psub |
| 80261 | 336, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80262 | 336, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80263 | 336, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80264 | 0, // x8sub_7_then_sub_32 |
| 80265 | 0, // x8sub_7_then_sub_32_hi |
| 80266 | 0, // x8sub_6_then_sub_32 |
| 80267 | 0, // x8sub_6_then_sub_32_hi |
| 80268 | 0, // x8sub_5_then_sub_32 |
| 80269 | 0, // x8sub_5_then_sub_32_hi |
| 80270 | 0, // x8sub_4_then_sub_32 |
| 80271 | 0, // x8sub_4_then_sub_32_hi |
| 80272 | 0, // x8sub_3_then_sub_32 |
| 80273 | 0, // x8sub_3_then_sub_32_hi |
| 80274 | 0, // x8sub_2_then_sub_32 |
| 80275 | 0, // x8sub_2_then_sub_32_hi |
| 80276 | 0, // x8sub_1_then_sub_32 |
| 80277 | 0, // x8sub_1_then_sub_32_hi |
| 80278 | 0, // subo64_then_sub_32 |
| 80279 | 0, // subo64_then_sub_32_hi |
| 80280 | 336, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80281 | 336, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80282 | 336, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80283 | 0, // dsub0_dsub1 |
| 80284 | 0, // dsub0_dsub1_dsub2 |
| 80285 | 336, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80286 | 336, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80287 | 336, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80288 | 336, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80289 | 336, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80290 | 336, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80291 | 0, // qsub0_qsub1 |
| 80292 | 0, // qsub0_qsub1_qsub2 |
| 80293 | 336, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80294 | 336, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80295 | 336, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80296 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80297 | 0, // x8sub_0_x8sub_1 |
| 80298 | 0, // x8sub_2_x8sub_3 |
| 80299 | 0, // x8sub_4_x8sub_5 |
| 80300 | 0, // x8sub_6_x8sub_7 |
| 80301 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80302 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80303 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80304 | 0, // sub_32_subo64_then_sub_32 |
| 80305 | 336, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80306 | 336, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80307 | 336, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80308 | 336, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80309 | 336, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80310 | 336, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80311 | 336, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80312 | 336, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 80313 | 0, // zsub0_zsub2 |
| 80314 | 0, // zsub1_zsub3 |
| 80315 | }, |
| 80316 | { // ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80317 | 337, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80318 | 337, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80319 | 337, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80320 | 0, // dsub0 |
| 80321 | 337, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80322 | 337, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80323 | 337, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80324 | 337, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80325 | 337, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80326 | 337, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80327 | 0, // psub |
| 80328 | 0, // psub0 |
| 80329 | 0, // psub1 |
| 80330 | 0, // qsub0 |
| 80331 | 337, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80332 | 337, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80333 | 337, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80334 | 337, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80335 | 337, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80336 | 0, // sub_32 |
| 80337 | 0, // sub_32_hi |
| 80338 | 0, // sube32 |
| 80339 | 0, // sube64 |
| 80340 | 0, // subo32 |
| 80341 | 0, // subo64 |
| 80342 | 0, // x8sub_0 |
| 80343 | 0, // x8sub_1 |
| 80344 | 0, // x8sub_2 |
| 80345 | 0, // x8sub_3 |
| 80346 | 0, // x8sub_4 |
| 80347 | 0, // x8sub_5 |
| 80348 | 0, // x8sub_6 |
| 80349 | 0, // x8sub_7 |
| 80350 | 0, // zasubb |
| 80351 | 0, // zasubd0 |
| 80352 | 0, // zasubd1 |
| 80353 | 0, // zasubh0 |
| 80354 | 0, // zasubh1 |
| 80355 | 0, // zasubq0 |
| 80356 | 0, // zasubq1 |
| 80357 | 0, // zasubs0 |
| 80358 | 0, // zasubs1 |
| 80359 | 337, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80360 | 337, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80361 | 337, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80362 | 337, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80363 | 337, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80364 | 337, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80365 | 0, // zasubd1_then_zasubq0 |
| 80366 | 0, // zasubd1_then_zasubq1 |
| 80367 | 0, // zasubs1_then_zasubd0 |
| 80368 | 0, // zasubs1_then_zasubd1 |
| 80369 | 0, // zasubs1_then_zasubq0 |
| 80370 | 0, // zasubs1_then_zasubq1 |
| 80371 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80372 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80373 | 0, // zasubh1_then_zasubd0 |
| 80374 | 0, // zasubh1_then_zasubd1 |
| 80375 | 0, // zasubh1_then_zasubq0 |
| 80376 | 0, // zasubh1_then_zasubq1 |
| 80377 | 0, // zasubh1_then_zasubs0 |
| 80378 | 0, // zasubh1_then_zasubs1 |
| 80379 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80380 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80381 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80382 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80383 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80384 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80385 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80386 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80387 | 337, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80388 | 337, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80389 | 337, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80390 | 337, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80391 | 337, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80392 | 337, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80393 | 337, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80394 | 337, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80395 | 337, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80396 | 337, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80397 | 337, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80398 | 337, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80399 | 337, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80400 | 337, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80401 | 337, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80402 | 337, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80403 | 337, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80404 | 337, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80405 | 0, // psub1_then_psub |
| 80406 | 337, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80407 | 337, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80408 | 337, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80409 | 0, // x8sub_7_then_sub_32 |
| 80410 | 0, // x8sub_7_then_sub_32_hi |
| 80411 | 0, // x8sub_6_then_sub_32 |
| 80412 | 0, // x8sub_6_then_sub_32_hi |
| 80413 | 0, // x8sub_5_then_sub_32 |
| 80414 | 0, // x8sub_5_then_sub_32_hi |
| 80415 | 0, // x8sub_4_then_sub_32 |
| 80416 | 0, // x8sub_4_then_sub_32_hi |
| 80417 | 0, // x8sub_3_then_sub_32 |
| 80418 | 0, // x8sub_3_then_sub_32_hi |
| 80419 | 0, // x8sub_2_then_sub_32 |
| 80420 | 0, // x8sub_2_then_sub_32_hi |
| 80421 | 0, // x8sub_1_then_sub_32 |
| 80422 | 0, // x8sub_1_then_sub_32_hi |
| 80423 | 0, // subo64_then_sub_32 |
| 80424 | 0, // subo64_then_sub_32_hi |
| 80425 | 337, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80426 | 337, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80427 | 337, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80428 | 0, // dsub0_dsub1 |
| 80429 | 0, // dsub0_dsub1_dsub2 |
| 80430 | 337, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80431 | 337, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80432 | 337, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80433 | 337, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80434 | 337, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80435 | 337, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80436 | 0, // qsub0_qsub1 |
| 80437 | 0, // qsub0_qsub1_qsub2 |
| 80438 | 337, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80439 | 337, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80440 | 337, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80441 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80442 | 0, // x8sub_0_x8sub_1 |
| 80443 | 0, // x8sub_2_x8sub_3 |
| 80444 | 0, // x8sub_4_x8sub_5 |
| 80445 | 0, // x8sub_6_x8sub_7 |
| 80446 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80447 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80448 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80449 | 0, // sub_32_subo64_then_sub_32 |
| 80450 | 337, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80451 | 337, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80452 | 337, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80453 | 337, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80454 | 337, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80455 | 337, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80456 | 337, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80457 | 337, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 80458 | 0, // zsub0_zsub2 |
| 80459 | 0, // zsub1_zsub3 |
| 80460 | }, |
| 80461 | { // ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80462 | 338, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80463 | 338, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80464 | 338, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80465 | 0, // dsub0 |
| 80466 | 338, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80467 | 338, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80468 | 338, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80469 | 338, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80470 | 338, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80471 | 338, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80472 | 0, // psub |
| 80473 | 0, // psub0 |
| 80474 | 0, // psub1 |
| 80475 | 0, // qsub0 |
| 80476 | 338, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80477 | 338, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80478 | 338, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80479 | 338, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80480 | 338, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80481 | 0, // sub_32 |
| 80482 | 0, // sub_32_hi |
| 80483 | 0, // sube32 |
| 80484 | 0, // sube64 |
| 80485 | 0, // subo32 |
| 80486 | 0, // subo64 |
| 80487 | 0, // x8sub_0 |
| 80488 | 0, // x8sub_1 |
| 80489 | 0, // x8sub_2 |
| 80490 | 0, // x8sub_3 |
| 80491 | 0, // x8sub_4 |
| 80492 | 0, // x8sub_5 |
| 80493 | 0, // x8sub_6 |
| 80494 | 0, // x8sub_7 |
| 80495 | 0, // zasubb |
| 80496 | 0, // zasubd0 |
| 80497 | 0, // zasubd1 |
| 80498 | 0, // zasubh0 |
| 80499 | 0, // zasubh1 |
| 80500 | 0, // zasubq0 |
| 80501 | 0, // zasubq1 |
| 80502 | 0, // zasubs0 |
| 80503 | 0, // zasubs1 |
| 80504 | 338, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80505 | 338, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80506 | 338, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80507 | 338, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80508 | 338, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80509 | 338, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80510 | 0, // zasubd1_then_zasubq0 |
| 80511 | 0, // zasubd1_then_zasubq1 |
| 80512 | 0, // zasubs1_then_zasubd0 |
| 80513 | 0, // zasubs1_then_zasubd1 |
| 80514 | 0, // zasubs1_then_zasubq0 |
| 80515 | 0, // zasubs1_then_zasubq1 |
| 80516 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80517 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80518 | 0, // zasubh1_then_zasubd0 |
| 80519 | 0, // zasubh1_then_zasubd1 |
| 80520 | 0, // zasubh1_then_zasubq0 |
| 80521 | 0, // zasubh1_then_zasubq1 |
| 80522 | 0, // zasubh1_then_zasubs0 |
| 80523 | 0, // zasubh1_then_zasubs1 |
| 80524 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80525 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80526 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80527 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80528 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80529 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80530 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80531 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80532 | 338, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80533 | 338, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80534 | 338, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80535 | 338, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80536 | 338, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80537 | 338, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80538 | 338, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80539 | 338, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80540 | 338, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80541 | 338, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80542 | 338, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80543 | 338, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80544 | 338, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80545 | 338, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80546 | 338, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80547 | 338, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80548 | 338, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80549 | 338, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80550 | 0, // psub1_then_psub |
| 80551 | 338, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80552 | 338, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80553 | 338, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80554 | 0, // x8sub_7_then_sub_32 |
| 80555 | 0, // x8sub_7_then_sub_32_hi |
| 80556 | 0, // x8sub_6_then_sub_32 |
| 80557 | 0, // x8sub_6_then_sub_32_hi |
| 80558 | 0, // x8sub_5_then_sub_32 |
| 80559 | 0, // x8sub_5_then_sub_32_hi |
| 80560 | 0, // x8sub_4_then_sub_32 |
| 80561 | 0, // x8sub_4_then_sub_32_hi |
| 80562 | 0, // x8sub_3_then_sub_32 |
| 80563 | 0, // x8sub_3_then_sub_32_hi |
| 80564 | 0, // x8sub_2_then_sub_32 |
| 80565 | 0, // x8sub_2_then_sub_32_hi |
| 80566 | 0, // x8sub_1_then_sub_32 |
| 80567 | 0, // x8sub_1_then_sub_32_hi |
| 80568 | 0, // subo64_then_sub_32 |
| 80569 | 0, // subo64_then_sub_32_hi |
| 80570 | 338, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80571 | 338, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80572 | 338, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80573 | 0, // dsub0_dsub1 |
| 80574 | 0, // dsub0_dsub1_dsub2 |
| 80575 | 338, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80576 | 338, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80577 | 338, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80578 | 338, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80579 | 338, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80580 | 338, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80581 | 0, // qsub0_qsub1 |
| 80582 | 0, // qsub0_qsub1_qsub2 |
| 80583 | 338, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80584 | 338, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80585 | 338, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80586 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80587 | 0, // x8sub_0_x8sub_1 |
| 80588 | 0, // x8sub_2_x8sub_3 |
| 80589 | 0, // x8sub_4_x8sub_5 |
| 80590 | 0, // x8sub_6_x8sub_7 |
| 80591 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80592 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80593 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80594 | 0, // sub_32_subo64_then_sub_32 |
| 80595 | 338, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80596 | 338, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80597 | 338, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80598 | 338, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80599 | 338, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80600 | 338, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80601 | 338, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80602 | 338, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 80603 | 0, // zsub0_zsub2 |
| 80604 | 0, // zsub1_zsub3 |
| 80605 | }, |
| 80606 | { // ZPR4_with_zsub1_in_ZPRMul4 |
| 80607 | 339, // bsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80608 | 339, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80609 | 339, // dsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80610 | 0, // dsub0 |
| 80611 | 339, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80612 | 339, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80613 | 339, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80614 | 339, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80615 | 339, // hsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80616 | 339, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80617 | 0, // psub |
| 80618 | 0, // psub0 |
| 80619 | 0, // psub1 |
| 80620 | 0, // qsub0 |
| 80621 | 339, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80622 | 339, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80623 | 339, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80624 | 339, // ssub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80625 | 339, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80626 | 0, // sub_32 |
| 80627 | 0, // sub_32_hi |
| 80628 | 0, // sube32 |
| 80629 | 0, // sube64 |
| 80630 | 0, // subo32 |
| 80631 | 0, // subo64 |
| 80632 | 0, // x8sub_0 |
| 80633 | 0, // x8sub_1 |
| 80634 | 0, // x8sub_2 |
| 80635 | 0, // x8sub_3 |
| 80636 | 0, // x8sub_4 |
| 80637 | 0, // x8sub_5 |
| 80638 | 0, // x8sub_6 |
| 80639 | 0, // x8sub_7 |
| 80640 | 0, // zasubb |
| 80641 | 0, // zasubd0 |
| 80642 | 0, // zasubd1 |
| 80643 | 0, // zasubh0 |
| 80644 | 0, // zasubh1 |
| 80645 | 0, // zasubq0 |
| 80646 | 0, // zasubq1 |
| 80647 | 0, // zasubs0 |
| 80648 | 0, // zasubs1 |
| 80649 | 339, // zsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80650 | 339, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80651 | 339, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80652 | 339, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80653 | 339, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80654 | 339, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80655 | 0, // zasubd1_then_zasubq0 |
| 80656 | 0, // zasubd1_then_zasubq1 |
| 80657 | 0, // zasubs1_then_zasubd0 |
| 80658 | 0, // zasubs1_then_zasubd1 |
| 80659 | 0, // zasubs1_then_zasubq0 |
| 80660 | 0, // zasubs1_then_zasubq1 |
| 80661 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80662 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80663 | 0, // zasubh1_then_zasubd0 |
| 80664 | 0, // zasubh1_then_zasubd1 |
| 80665 | 0, // zasubh1_then_zasubq0 |
| 80666 | 0, // zasubh1_then_zasubq1 |
| 80667 | 0, // zasubh1_then_zasubs0 |
| 80668 | 0, // zasubh1_then_zasubs1 |
| 80669 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80670 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80671 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80672 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80673 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80674 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80675 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80676 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80677 | 339, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80678 | 339, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80679 | 339, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80680 | 339, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80681 | 339, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80682 | 339, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80683 | 339, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80684 | 339, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80685 | 339, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80686 | 339, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80687 | 339, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80688 | 339, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80689 | 339, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80690 | 339, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80691 | 339, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80692 | 339, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80693 | 339, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80694 | 339, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80695 | 0, // psub1_then_psub |
| 80696 | 339, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80697 | 339, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80698 | 339, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80699 | 0, // x8sub_7_then_sub_32 |
| 80700 | 0, // x8sub_7_then_sub_32_hi |
| 80701 | 0, // x8sub_6_then_sub_32 |
| 80702 | 0, // x8sub_6_then_sub_32_hi |
| 80703 | 0, // x8sub_5_then_sub_32 |
| 80704 | 0, // x8sub_5_then_sub_32_hi |
| 80705 | 0, // x8sub_4_then_sub_32 |
| 80706 | 0, // x8sub_4_then_sub_32_hi |
| 80707 | 0, // x8sub_3_then_sub_32 |
| 80708 | 0, // x8sub_3_then_sub_32_hi |
| 80709 | 0, // x8sub_2_then_sub_32 |
| 80710 | 0, // x8sub_2_then_sub_32_hi |
| 80711 | 0, // x8sub_1_then_sub_32 |
| 80712 | 0, // x8sub_1_then_sub_32_hi |
| 80713 | 0, // subo64_then_sub_32 |
| 80714 | 0, // subo64_then_sub_32_hi |
| 80715 | 339, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80716 | 339, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80717 | 339, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80718 | 0, // dsub0_dsub1 |
| 80719 | 0, // dsub0_dsub1_dsub2 |
| 80720 | 339, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80721 | 339, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80722 | 339, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80723 | 339, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80724 | 339, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80725 | 339, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80726 | 0, // qsub0_qsub1 |
| 80727 | 0, // qsub0_qsub1_qsub2 |
| 80728 | 339, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80729 | 339, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80730 | 339, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80731 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80732 | 0, // x8sub_0_x8sub_1 |
| 80733 | 0, // x8sub_2_x8sub_3 |
| 80734 | 0, // x8sub_4_x8sub_5 |
| 80735 | 0, // x8sub_6_x8sub_7 |
| 80736 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80737 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80738 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80739 | 0, // sub_32_subo64_then_sub_32 |
| 80740 | 339, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80741 | 339, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80742 | 339, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80743 | 339, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80744 | 339, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80745 | 339, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80746 | 339, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80747 | 339, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4 |
| 80748 | 0, // zsub0_zsub2 |
| 80749 | 0, // zsub1_zsub3 |
| 80750 | }, |
| 80751 | { // ZPR4_with_zsub1_in_ZPR_K |
| 80752 | 340, // bsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80753 | 340, // bsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80754 | 340, // dsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80755 | 0, // dsub0 |
| 80756 | 340, // dsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80757 | 340, // dsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80758 | 340, // dsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80759 | 340, // dsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80760 | 340, // hsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80761 | 340, // hsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80762 | 0, // psub |
| 80763 | 0, // psub0 |
| 80764 | 0, // psub1 |
| 80765 | 0, // qsub0 |
| 80766 | 340, // qsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80767 | 340, // qsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80768 | 340, // qsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80769 | 340, // ssub -> ZPR4_with_zsub1_in_ZPR_K |
| 80770 | 340, // ssub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80771 | 0, // sub_32 |
| 80772 | 0, // sub_32_hi |
| 80773 | 0, // sube32 |
| 80774 | 0, // sube64 |
| 80775 | 0, // subo32 |
| 80776 | 0, // subo64 |
| 80777 | 0, // x8sub_0 |
| 80778 | 0, // x8sub_1 |
| 80779 | 0, // x8sub_2 |
| 80780 | 0, // x8sub_3 |
| 80781 | 0, // x8sub_4 |
| 80782 | 0, // x8sub_5 |
| 80783 | 0, // x8sub_6 |
| 80784 | 0, // x8sub_7 |
| 80785 | 0, // zasubb |
| 80786 | 0, // zasubd0 |
| 80787 | 0, // zasubd1 |
| 80788 | 0, // zasubh0 |
| 80789 | 0, // zasubh1 |
| 80790 | 0, // zasubq0 |
| 80791 | 0, // zasubq1 |
| 80792 | 0, // zasubs0 |
| 80793 | 0, // zasubs1 |
| 80794 | 340, // zsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80795 | 340, // zsub0 -> ZPR4_with_zsub1_in_ZPR_K |
| 80796 | 340, // zsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80797 | 340, // zsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80798 | 340, // zsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80799 | 340, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80800 | 0, // zasubd1_then_zasubq0 |
| 80801 | 0, // zasubd1_then_zasubq1 |
| 80802 | 0, // zasubs1_then_zasubd0 |
| 80803 | 0, // zasubs1_then_zasubd1 |
| 80804 | 0, // zasubs1_then_zasubq0 |
| 80805 | 0, // zasubs1_then_zasubq1 |
| 80806 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80807 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80808 | 0, // zasubh1_then_zasubd0 |
| 80809 | 0, // zasubh1_then_zasubd1 |
| 80810 | 0, // zasubh1_then_zasubq0 |
| 80811 | 0, // zasubh1_then_zasubq1 |
| 80812 | 0, // zasubh1_then_zasubs0 |
| 80813 | 0, // zasubh1_then_zasubs1 |
| 80814 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80815 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80816 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80817 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80818 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80819 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80820 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80821 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80822 | 340, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80823 | 340, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80824 | 340, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80825 | 340, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80826 | 340, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_K |
| 80827 | 340, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80828 | 340, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80829 | 340, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80830 | 340, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80831 | 340, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80832 | 340, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_K |
| 80833 | 340, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80834 | 340, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80835 | 340, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80836 | 340, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_K |
| 80837 | 340, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80838 | 340, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_K |
| 80839 | 340, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80840 | 0, // psub1_then_psub |
| 80841 | 340, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80842 | 340, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80843 | 340, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80844 | 0, // x8sub_7_then_sub_32 |
| 80845 | 0, // x8sub_7_then_sub_32_hi |
| 80846 | 0, // x8sub_6_then_sub_32 |
| 80847 | 0, // x8sub_6_then_sub_32_hi |
| 80848 | 0, // x8sub_5_then_sub_32 |
| 80849 | 0, // x8sub_5_then_sub_32_hi |
| 80850 | 0, // x8sub_4_then_sub_32 |
| 80851 | 0, // x8sub_4_then_sub_32_hi |
| 80852 | 0, // x8sub_3_then_sub_32 |
| 80853 | 0, // x8sub_3_then_sub_32_hi |
| 80854 | 0, // x8sub_2_then_sub_32 |
| 80855 | 0, // x8sub_2_then_sub_32_hi |
| 80856 | 0, // x8sub_1_then_sub_32 |
| 80857 | 0, // x8sub_1_then_sub_32_hi |
| 80858 | 0, // subo64_then_sub_32 |
| 80859 | 0, // subo64_then_sub_32_hi |
| 80860 | 340, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80861 | 340, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80862 | 340, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K |
| 80863 | 0, // dsub0_dsub1 |
| 80864 | 0, // dsub0_dsub1_dsub2 |
| 80865 | 340, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80866 | 340, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80867 | 340, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80868 | 340, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80869 | 340, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80870 | 340, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80871 | 0, // qsub0_qsub1 |
| 80872 | 0, // qsub0_qsub1_qsub2 |
| 80873 | 340, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80874 | 340, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80875 | 340, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80876 | 0, // sub_32_x8sub_1_then_sub_32 |
| 80877 | 0, // x8sub_0_x8sub_1 |
| 80878 | 0, // x8sub_2_x8sub_3 |
| 80879 | 0, // x8sub_4_x8sub_5 |
| 80880 | 0, // x8sub_6_x8sub_7 |
| 80881 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 80882 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 80883 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 80884 | 0, // sub_32_subo64_then_sub_32 |
| 80885 | 340, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80886 | 340, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80887 | 340, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80888 | 340, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_K |
| 80889 | 340, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80890 | 340, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K |
| 80891 | 340, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80892 | 340, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K |
| 80893 | 0, // zsub0_zsub2 |
| 80894 | 0, // zsub1_zsub3 |
| 80895 | }, |
| 80896 | { // ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80897 | 341, // bsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80898 | 341, // bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80899 | 341, // dsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80900 | 0, // dsub0 |
| 80901 | 341, // dsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80902 | 341, // dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80903 | 341, // dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80904 | 341, // dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80905 | 341, // hsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80906 | 341, // hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80907 | 0, // psub |
| 80908 | 0, // psub0 |
| 80909 | 0, // psub1 |
| 80910 | 0, // qsub0 |
| 80911 | 341, // qsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80912 | 341, // qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80913 | 341, // qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80914 | 341, // ssub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80915 | 341, // ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80916 | 0, // sub_32 |
| 80917 | 0, // sub_32_hi |
| 80918 | 0, // sube32 |
| 80919 | 0, // sube64 |
| 80920 | 0, // subo32 |
| 80921 | 0, // subo64 |
| 80922 | 0, // x8sub_0 |
| 80923 | 0, // x8sub_1 |
| 80924 | 0, // x8sub_2 |
| 80925 | 0, // x8sub_3 |
| 80926 | 0, // x8sub_4 |
| 80927 | 0, // x8sub_5 |
| 80928 | 0, // x8sub_6 |
| 80929 | 0, // x8sub_7 |
| 80930 | 0, // zasubb |
| 80931 | 0, // zasubd0 |
| 80932 | 0, // zasubd1 |
| 80933 | 0, // zasubh0 |
| 80934 | 0, // zasubh1 |
| 80935 | 0, // zasubq0 |
| 80936 | 0, // zasubq1 |
| 80937 | 0, // zasubs0 |
| 80938 | 0, // zasubs1 |
| 80939 | 341, // zsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80940 | 341, // zsub0 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80941 | 341, // zsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80942 | 341, // zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80943 | 341, // zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80944 | 341, // zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80945 | 0, // zasubd1_then_zasubq0 |
| 80946 | 0, // zasubd1_then_zasubq1 |
| 80947 | 0, // zasubs1_then_zasubd0 |
| 80948 | 0, // zasubs1_then_zasubd1 |
| 80949 | 0, // zasubs1_then_zasubq0 |
| 80950 | 0, // zasubs1_then_zasubq1 |
| 80951 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 80952 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 80953 | 0, // zasubh1_then_zasubd0 |
| 80954 | 0, // zasubh1_then_zasubd1 |
| 80955 | 0, // zasubh1_then_zasubq0 |
| 80956 | 0, // zasubh1_then_zasubq1 |
| 80957 | 0, // zasubh1_then_zasubs0 |
| 80958 | 0, // zasubh1_then_zasubs1 |
| 80959 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 80960 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 80961 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 80962 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 80963 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 80964 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 80965 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 80966 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 80967 | 341, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80968 | 341, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80969 | 341, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80970 | 341, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80971 | 341, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80972 | 341, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80973 | 341, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80974 | 341, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80975 | 341, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80976 | 341, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80977 | 341, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80978 | 341, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80979 | 341, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80980 | 341, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80981 | 341, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80982 | 341, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80983 | 341, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80984 | 341, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80985 | 0, // psub1_then_psub |
| 80986 | 341, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80987 | 341, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80988 | 341, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 80989 | 0, // x8sub_7_then_sub_32 |
| 80990 | 0, // x8sub_7_then_sub_32_hi |
| 80991 | 0, // x8sub_6_then_sub_32 |
| 80992 | 0, // x8sub_6_then_sub_32_hi |
| 80993 | 0, // x8sub_5_then_sub_32 |
| 80994 | 0, // x8sub_5_then_sub_32_hi |
| 80995 | 0, // x8sub_4_then_sub_32 |
| 80996 | 0, // x8sub_4_then_sub_32_hi |
| 80997 | 0, // x8sub_3_then_sub_32 |
| 80998 | 0, // x8sub_3_then_sub_32_hi |
| 80999 | 0, // x8sub_2_then_sub_32 |
| 81000 | 0, // x8sub_2_then_sub_32_hi |
| 81001 | 0, // x8sub_1_then_sub_32 |
| 81002 | 0, // x8sub_1_then_sub_32_hi |
| 81003 | 0, // subo64_then_sub_32 |
| 81004 | 0, // subo64_then_sub_32_hi |
| 81005 | 341, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81006 | 341, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81007 | 341, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81008 | 0, // dsub0_dsub1 |
| 81009 | 0, // dsub0_dsub1_dsub2 |
| 81010 | 341, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81011 | 341, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81012 | 341, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81013 | 341, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81014 | 341, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81015 | 341, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81016 | 0, // qsub0_qsub1 |
| 81017 | 0, // qsub0_qsub1_qsub2 |
| 81018 | 341, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81019 | 341, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81020 | 341, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81021 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81022 | 0, // x8sub_0_x8sub_1 |
| 81023 | 0, // x8sub_2_x8sub_3 |
| 81024 | 0, // x8sub_4_x8sub_5 |
| 81025 | 0, // x8sub_6_x8sub_7 |
| 81026 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81027 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81028 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81029 | 0, // sub_32_subo64_then_sub_32 |
| 81030 | 341, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81031 | 341, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81032 | 341, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81033 | 341, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81034 | 341, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81035 | 341, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81036 | 341, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81037 | 341, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 81038 | 0, // zsub0_zsub2 |
| 81039 | 0, // zsub1_zsub3 |
| 81040 | }, |
| 81041 | { // ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81042 | 342, // bsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81043 | 342, // bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81044 | 342, // dsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81045 | 0, // dsub0 |
| 81046 | 342, // dsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81047 | 342, // dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81048 | 342, // dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81049 | 342, // dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81050 | 342, // hsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81051 | 342, // hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81052 | 0, // psub |
| 81053 | 0, // psub0 |
| 81054 | 0, // psub1 |
| 81055 | 0, // qsub0 |
| 81056 | 342, // qsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81057 | 342, // qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81058 | 342, // qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81059 | 342, // ssub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81060 | 342, // ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81061 | 0, // sub_32 |
| 81062 | 0, // sub_32_hi |
| 81063 | 0, // sube32 |
| 81064 | 0, // sube64 |
| 81065 | 0, // subo32 |
| 81066 | 0, // subo64 |
| 81067 | 0, // x8sub_0 |
| 81068 | 0, // x8sub_1 |
| 81069 | 0, // x8sub_2 |
| 81070 | 0, // x8sub_3 |
| 81071 | 0, // x8sub_4 |
| 81072 | 0, // x8sub_5 |
| 81073 | 0, // x8sub_6 |
| 81074 | 0, // x8sub_7 |
| 81075 | 0, // zasubb |
| 81076 | 0, // zasubd0 |
| 81077 | 0, // zasubd1 |
| 81078 | 0, // zasubh0 |
| 81079 | 0, // zasubh1 |
| 81080 | 0, // zasubq0 |
| 81081 | 0, // zasubq1 |
| 81082 | 0, // zasubs0 |
| 81083 | 0, // zasubs1 |
| 81084 | 342, // zsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81085 | 342, // zsub0 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81086 | 342, // zsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81087 | 342, // zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81088 | 342, // zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81089 | 342, // zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81090 | 0, // zasubd1_then_zasubq0 |
| 81091 | 0, // zasubd1_then_zasubq1 |
| 81092 | 0, // zasubs1_then_zasubd0 |
| 81093 | 0, // zasubs1_then_zasubd1 |
| 81094 | 0, // zasubs1_then_zasubq0 |
| 81095 | 0, // zasubs1_then_zasubq1 |
| 81096 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81097 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81098 | 0, // zasubh1_then_zasubd0 |
| 81099 | 0, // zasubh1_then_zasubd1 |
| 81100 | 0, // zasubh1_then_zasubq0 |
| 81101 | 0, // zasubh1_then_zasubq1 |
| 81102 | 0, // zasubh1_then_zasubs0 |
| 81103 | 0, // zasubh1_then_zasubs1 |
| 81104 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81105 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81106 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81107 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81108 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81109 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81110 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81111 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81112 | 342, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81113 | 342, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81114 | 342, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81115 | 342, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81116 | 342, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81117 | 342, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81118 | 342, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81119 | 342, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81120 | 342, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81121 | 342, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81122 | 342, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81123 | 342, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81124 | 342, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81125 | 342, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81126 | 342, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81127 | 342, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81128 | 342, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81129 | 342, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81130 | 0, // psub1_then_psub |
| 81131 | 342, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81132 | 342, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81133 | 342, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81134 | 0, // x8sub_7_then_sub_32 |
| 81135 | 0, // x8sub_7_then_sub_32_hi |
| 81136 | 0, // x8sub_6_then_sub_32 |
| 81137 | 0, // x8sub_6_then_sub_32_hi |
| 81138 | 0, // x8sub_5_then_sub_32 |
| 81139 | 0, // x8sub_5_then_sub_32_hi |
| 81140 | 0, // x8sub_4_then_sub_32 |
| 81141 | 0, // x8sub_4_then_sub_32_hi |
| 81142 | 0, // x8sub_3_then_sub_32 |
| 81143 | 0, // x8sub_3_then_sub_32_hi |
| 81144 | 0, // x8sub_2_then_sub_32 |
| 81145 | 0, // x8sub_2_then_sub_32_hi |
| 81146 | 0, // x8sub_1_then_sub_32 |
| 81147 | 0, // x8sub_1_then_sub_32_hi |
| 81148 | 0, // subo64_then_sub_32 |
| 81149 | 0, // subo64_then_sub_32_hi |
| 81150 | 342, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81151 | 342, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81152 | 342, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81153 | 0, // dsub0_dsub1 |
| 81154 | 0, // dsub0_dsub1_dsub2 |
| 81155 | 342, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81156 | 342, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81157 | 342, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81158 | 342, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81159 | 342, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81160 | 342, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81161 | 0, // qsub0_qsub1 |
| 81162 | 0, // qsub0_qsub1_qsub2 |
| 81163 | 342, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81164 | 342, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81165 | 342, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81166 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81167 | 0, // x8sub_0_x8sub_1 |
| 81168 | 0, // x8sub_2_x8sub_3 |
| 81169 | 0, // x8sub_4_x8sub_5 |
| 81170 | 0, // x8sub_6_x8sub_7 |
| 81171 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81172 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81173 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81174 | 0, // sub_32_subo64_then_sub_32 |
| 81175 | 342, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81176 | 342, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81177 | 342, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81178 | 342, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81179 | 342, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81180 | 342, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81181 | 342, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81182 | 342, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 81183 | 0, // zsub0_zsub2 |
| 81184 | 0, // zsub1_zsub3 |
| 81185 | }, |
| 81186 | { // ZPR4_with_zsub2_in_ZPRMul4 |
| 81187 | 343, // bsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81188 | 343, // bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81189 | 343, // dsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81190 | 0, // dsub0 |
| 81191 | 343, // dsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81192 | 343, // dsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81193 | 343, // dsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81194 | 343, // dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81195 | 343, // hsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81196 | 343, // hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81197 | 0, // psub |
| 81198 | 0, // psub0 |
| 81199 | 0, // psub1 |
| 81200 | 0, // qsub0 |
| 81201 | 343, // qsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81202 | 343, // qsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81203 | 343, // qsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81204 | 343, // ssub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81205 | 343, // ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81206 | 0, // sub_32 |
| 81207 | 0, // sub_32_hi |
| 81208 | 0, // sube32 |
| 81209 | 0, // sube64 |
| 81210 | 0, // subo32 |
| 81211 | 0, // subo64 |
| 81212 | 0, // x8sub_0 |
| 81213 | 0, // x8sub_1 |
| 81214 | 0, // x8sub_2 |
| 81215 | 0, // x8sub_3 |
| 81216 | 0, // x8sub_4 |
| 81217 | 0, // x8sub_5 |
| 81218 | 0, // x8sub_6 |
| 81219 | 0, // x8sub_7 |
| 81220 | 0, // zasubb |
| 81221 | 0, // zasubd0 |
| 81222 | 0, // zasubd1 |
| 81223 | 0, // zasubh0 |
| 81224 | 0, // zasubh1 |
| 81225 | 0, // zasubq0 |
| 81226 | 0, // zasubq1 |
| 81227 | 0, // zasubs0 |
| 81228 | 0, // zasubs1 |
| 81229 | 343, // zsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81230 | 343, // zsub0 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81231 | 343, // zsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81232 | 343, // zsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81233 | 343, // zsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81234 | 343, // zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81235 | 0, // zasubd1_then_zasubq0 |
| 81236 | 0, // zasubd1_then_zasubq1 |
| 81237 | 0, // zasubs1_then_zasubd0 |
| 81238 | 0, // zasubs1_then_zasubd1 |
| 81239 | 0, // zasubs1_then_zasubq0 |
| 81240 | 0, // zasubs1_then_zasubq1 |
| 81241 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81242 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81243 | 0, // zasubh1_then_zasubd0 |
| 81244 | 0, // zasubh1_then_zasubd1 |
| 81245 | 0, // zasubh1_then_zasubq0 |
| 81246 | 0, // zasubh1_then_zasubq1 |
| 81247 | 0, // zasubh1_then_zasubs0 |
| 81248 | 0, // zasubh1_then_zasubs1 |
| 81249 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81250 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81251 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81252 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81253 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81254 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81255 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81256 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81257 | 343, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81258 | 343, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81259 | 343, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81260 | 343, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81261 | 343, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81262 | 343, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81263 | 343, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81264 | 343, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81265 | 343, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81266 | 343, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81267 | 343, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81268 | 343, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81269 | 343, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81270 | 343, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81271 | 343, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81272 | 343, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81273 | 343, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81274 | 343, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81275 | 0, // psub1_then_psub |
| 81276 | 343, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81277 | 343, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81278 | 343, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81279 | 0, // x8sub_7_then_sub_32 |
| 81280 | 0, // x8sub_7_then_sub_32_hi |
| 81281 | 0, // x8sub_6_then_sub_32 |
| 81282 | 0, // x8sub_6_then_sub_32_hi |
| 81283 | 0, // x8sub_5_then_sub_32 |
| 81284 | 0, // x8sub_5_then_sub_32_hi |
| 81285 | 0, // x8sub_4_then_sub_32 |
| 81286 | 0, // x8sub_4_then_sub_32_hi |
| 81287 | 0, // x8sub_3_then_sub_32 |
| 81288 | 0, // x8sub_3_then_sub_32_hi |
| 81289 | 0, // x8sub_2_then_sub_32 |
| 81290 | 0, // x8sub_2_then_sub_32_hi |
| 81291 | 0, // x8sub_1_then_sub_32 |
| 81292 | 0, // x8sub_1_then_sub_32_hi |
| 81293 | 0, // subo64_then_sub_32 |
| 81294 | 0, // subo64_then_sub_32_hi |
| 81295 | 343, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81296 | 343, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81297 | 343, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81298 | 0, // dsub0_dsub1 |
| 81299 | 0, // dsub0_dsub1_dsub2 |
| 81300 | 343, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81301 | 343, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81302 | 343, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81303 | 343, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81304 | 343, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81305 | 343, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81306 | 0, // qsub0_qsub1 |
| 81307 | 0, // qsub0_qsub1_qsub2 |
| 81308 | 343, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81309 | 343, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81310 | 343, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81311 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81312 | 0, // x8sub_0_x8sub_1 |
| 81313 | 0, // x8sub_2_x8sub_3 |
| 81314 | 0, // x8sub_4_x8sub_5 |
| 81315 | 0, // x8sub_6_x8sub_7 |
| 81316 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81317 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81318 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81319 | 0, // sub_32_subo64_then_sub_32 |
| 81320 | 343, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81321 | 343, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81322 | 343, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81323 | 343, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81324 | 343, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81325 | 343, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81326 | 343, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81327 | 343, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4 |
| 81328 | 0, // zsub0_zsub2 |
| 81329 | 0, // zsub1_zsub3 |
| 81330 | }, |
| 81331 | { // ZPR4_with_zsub2_in_ZPR_K |
| 81332 | 344, // bsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81333 | 344, // bsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81334 | 344, // dsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81335 | 0, // dsub0 |
| 81336 | 344, // dsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81337 | 344, // dsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81338 | 344, // dsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81339 | 344, // dsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81340 | 344, // hsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81341 | 344, // hsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81342 | 0, // psub |
| 81343 | 0, // psub0 |
| 81344 | 0, // psub1 |
| 81345 | 0, // qsub0 |
| 81346 | 344, // qsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81347 | 344, // qsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81348 | 344, // qsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81349 | 344, // ssub -> ZPR4_with_zsub2_in_ZPR_K |
| 81350 | 344, // ssub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81351 | 0, // sub_32 |
| 81352 | 0, // sub_32_hi |
| 81353 | 0, // sube32 |
| 81354 | 0, // sube64 |
| 81355 | 0, // subo32 |
| 81356 | 0, // subo64 |
| 81357 | 0, // x8sub_0 |
| 81358 | 0, // x8sub_1 |
| 81359 | 0, // x8sub_2 |
| 81360 | 0, // x8sub_3 |
| 81361 | 0, // x8sub_4 |
| 81362 | 0, // x8sub_5 |
| 81363 | 0, // x8sub_6 |
| 81364 | 0, // x8sub_7 |
| 81365 | 0, // zasubb |
| 81366 | 0, // zasubd0 |
| 81367 | 0, // zasubd1 |
| 81368 | 0, // zasubh0 |
| 81369 | 0, // zasubh1 |
| 81370 | 0, // zasubq0 |
| 81371 | 0, // zasubq1 |
| 81372 | 0, // zasubs0 |
| 81373 | 0, // zasubs1 |
| 81374 | 344, // zsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81375 | 344, // zsub0 -> ZPR4_with_zsub2_in_ZPR_K |
| 81376 | 344, // zsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81377 | 344, // zsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81378 | 344, // zsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81379 | 344, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81380 | 0, // zasubd1_then_zasubq0 |
| 81381 | 0, // zasubd1_then_zasubq1 |
| 81382 | 0, // zasubs1_then_zasubd0 |
| 81383 | 0, // zasubs1_then_zasubd1 |
| 81384 | 0, // zasubs1_then_zasubq0 |
| 81385 | 0, // zasubs1_then_zasubq1 |
| 81386 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81387 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81388 | 0, // zasubh1_then_zasubd0 |
| 81389 | 0, // zasubh1_then_zasubd1 |
| 81390 | 0, // zasubh1_then_zasubq0 |
| 81391 | 0, // zasubh1_then_zasubq1 |
| 81392 | 0, // zasubh1_then_zasubs0 |
| 81393 | 0, // zasubh1_then_zasubs1 |
| 81394 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81395 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81396 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81397 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81398 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81399 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81400 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81401 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81402 | 344, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81403 | 344, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81404 | 344, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81405 | 344, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81406 | 344, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_K |
| 81407 | 344, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81408 | 344, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81409 | 344, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81410 | 344, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81411 | 344, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81412 | 344, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_K |
| 81413 | 344, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81414 | 344, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81415 | 344, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81416 | 344, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_K |
| 81417 | 344, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81418 | 344, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_K |
| 81419 | 344, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81420 | 0, // psub1_then_psub |
| 81421 | 344, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81422 | 344, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81423 | 344, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81424 | 0, // x8sub_7_then_sub_32 |
| 81425 | 0, // x8sub_7_then_sub_32_hi |
| 81426 | 0, // x8sub_6_then_sub_32 |
| 81427 | 0, // x8sub_6_then_sub_32_hi |
| 81428 | 0, // x8sub_5_then_sub_32 |
| 81429 | 0, // x8sub_5_then_sub_32_hi |
| 81430 | 0, // x8sub_4_then_sub_32 |
| 81431 | 0, // x8sub_4_then_sub_32_hi |
| 81432 | 0, // x8sub_3_then_sub_32 |
| 81433 | 0, // x8sub_3_then_sub_32_hi |
| 81434 | 0, // x8sub_2_then_sub_32 |
| 81435 | 0, // x8sub_2_then_sub_32_hi |
| 81436 | 0, // x8sub_1_then_sub_32 |
| 81437 | 0, // x8sub_1_then_sub_32_hi |
| 81438 | 0, // subo64_then_sub_32 |
| 81439 | 0, // subo64_then_sub_32_hi |
| 81440 | 344, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81441 | 344, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81442 | 344, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K |
| 81443 | 0, // dsub0_dsub1 |
| 81444 | 0, // dsub0_dsub1_dsub2 |
| 81445 | 344, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81446 | 344, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81447 | 344, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81448 | 344, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81449 | 344, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81450 | 344, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81451 | 0, // qsub0_qsub1 |
| 81452 | 0, // qsub0_qsub1_qsub2 |
| 81453 | 344, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81454 | 344, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81455 | 344, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81456 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81457 | 0, // x8sub_0_x8sub_1 |
| 81458 | 0, // x8sub_2_x8sub_3 |
| 81459 | 0, // x8sub_4_x8sub_5 |
| 81460 | 0, // x8sub_6_x8sub_7 |
| 81461 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81462 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81463 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81464 | 0, // sub_32_subo64_then_sub_32 |
| 81465 | 344, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81466 | 344, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81467 | 344, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81468 | 344, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_K |
| 81469 | 344, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81470 | 344, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_K |
| 81471 | 344, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81472 | 344, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_K |
| 81473 | 0, // zsub0_zsub2 |
| 81474 | 0, // zsub1_zsub3 |
| 81475 | }, |
| 81476 | { // ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81477 | 345, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81478 | 345, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81479 | 345, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81480 | 0, // dsub0 |
| 81481 | 345, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81482 | 345, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81483 | 345, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81484 | 345, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81485 | 345, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81486 | 345, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81487 | 0, // psub |
| 81488 | 0, // psub0 |
| 81489 | 0, // psub1 |
| 81490 | 0, // qsub0 |
| 81491 | 345, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81492 | 345, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81493 | 345, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81494 | 345, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81495 | 345, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81496 | 0, // sub_32 |
| 81497 | 0, // sub_32_hi |
| 81498 | 0, // sube32 |
| 81499 | 0, // sube64 |
| 81500 | 0, // subo32 |
| 81501 | 0, // subo64 |
| 81502 | 0, // x8sub_0 |
| 81503 | 0, // x8sub_1 |
| 81504 | 0, // x8sub_2 |
| 81505 | 0, // x8sub_3 |
| 81506 | 0, // x8sub_4 |
| 81507 | 0, // x8sub_5 |
| 81508 | 0, // x8sub_6 |
| 81509 | 0, // x8sub_7 |
| 81510 | 0, // zasubb |
| 81511 | 0, // zasubd0 |
| 81512 | 0, // zasubd1 |
| 81513 | 0, // zasubh0 |
| 81514 | 0, // zasubh1 |
| 81515 | 0, // zasubq0 |
| 81516 | 0, // zasubq1 |
| 81517 | 0, // zasubs0 |
| 81518 | 0, // zasubs1 |
| 81519 | 345, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81520 | 345, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81521 | 345, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81522 | 345, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81523 | 345, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81524 | 345, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81525 | 0, // zasubd1_then_zasubq0 |
| 81526 | 0, // zasubd1_then_zasubq1 |
| 81527 | 0, // zasubs1_then_zasubd0 |
| 81528 | 0, // zasubs1_then_zasubd1 |
| 81529 | 0, // zasubs1_then_zasubq0 |
| 81530 | 0, // zasubs1_then_zasubq1 |
| 81531 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81532 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81533 | 0, // zasubh1_then_zasubd0 |
| 81534 | 0, // zasubh1_then_zasubd1 |
| 81535 | 0, // zasubh1_then_zasubq0 |
| 81536 | 0, // zasubh1_then_zasubq1 |
| 81537 | 0, // zasubh1_then_zasubs0 |
| 81538 | 0, // zasubh1_then_zasubs1 |
| 81539 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81540 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81541 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81542 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81543 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81544 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81545 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81546 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81547 | 345, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81548 | 345, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81549 | 345, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81550 | 345, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81551 | 345, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81552 | 345, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81553 | 345, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81554 | 345, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81555 | 345, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81556 | 345, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81557 | 345, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81558 | 345, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81559 | 345, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81560 | 345, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81561 | 345, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81562 | 345, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81563 | 345, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81564 | 345, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81565 | 0, // psub1_then_psub |
| 81566 | 345, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81567 | 345, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81568 | 345, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81569 | 0, // x8sub_7_then_sub_32 |
| 81570 | 0, // x8sub_7_then_sub_32_hi |
| 81571 | 0, // x8sub_6_then_sub_32 |
| 81572 | 0, // x8sub_6_then_sub_32_hi |
| 81573 | 0, // x8sub_5_then_sub_32 |
| 81574 | 0, // x8sub_5_then_sub_32_hi |
| 81575 | 0, // x8sub_4_then_sub_32 |
| 81576 | 0, // x8sub_4_then_sub_32_hi |
| 81577 | 0, // x8sub_3_then_sub_32 |
| 81578 | 0, // x8sub_3_then_sub_32_hi |
| 81579 | 0, // x8sub_2_then_sub_32 |
| 81580 | 0, // x8sub_2_then_sub_32_hi |
| 81581 | 0, // x8sub_1_then_sub_32 |
| 81582 | 0, // x8sub_1_then_sub_32_hi |
| 81583 | 0, // subo64_then_sub_32 |
| 81584 | 0, // subo64_then_sub_32_hi |
| 81585 | 345, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81586 | 345, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81587 | 345, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81588 | 0, // dsub0_dsub1 |
| 81589 | 0, // dsub0_dsub1_dsub2 |
| 81590 | 345, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81591 | 345, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81592 | 345, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81593 | 345, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81594 | 345, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81595 | 345, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81596 | 0, // qsub0_qsub1 |
| 81597 | 0, // qsub0_qsub1_qsub2 |
| 81598 | 345, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81599 | 345, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81600 | 345, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81601 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81602 | 0, // x8sub_0_x8sub_1 |
| 81603 | 0, // x8sub_2_x8sub_3 |
| 81604 | 0, // x8sub_4_x8sub_5 |
| 81605 | 0, // x8sub_6_x8sub_7 |
| 81606 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81607 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81608 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81609 | 0, // sub_32_subo64_then_sub_32 |
| 81610 | 345, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81611 | 345, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81612 | 345, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81613 | 345, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81614 | 345, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81615 | 345, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81616 | 345, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81617 | 345, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 81618 | 0, // zsub0_zsub2 |
| 81619 | 0, // zsub1_zsub3 |
| 81620 | }, |
| 81621 | { // ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81622 | 346, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81623 | 346, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81624 | 346, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81625 | 0, // dsub0 |
| 81626 | 346, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81627 | 346, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81628 | 346, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81629 | 346, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81630 | 346, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81631 | 346, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81632 | 0, // psub |
| 81633 | 0, // psub0 |
| 81634 | 0, // psub1 |
| 81635 | 0, // qsub0 |
| 81636 | 346, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81637 | 346, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81638 | 346, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81639 | 346, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81640 | 346, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81641 | 0, // sub_32 |
| 81642 | 0, // sub_32_hi |
| 81643 | 0, // sube32 |
| 81644 | 0, // sube64 |
| 81645 | 0, // subo32 |
| 81646 | 0, // subo64 |
| 81647 | 0, // x8sub_0 |
| 81648 | 0, // x8sub_1 |
| 81649 | 0, // x8sub_2 |
| 81650 | 0, // x8sub_3 |
| 81651 | 0, // x8sub_4 |
| 81652 | 0, // x8sub_5 |
| 81653 | 0, // x8sub_6 |
| 81654 | 0, // x8sub_7 |
| 81655 | 0, // zasubb |
| 81656 | 0, // zasubd0 |
| 81657 | 0, // zasubd1 |
| 81658 | 0, // zasubh0 |
| 81659 | 0, // zasubh1 |
| 81660 | 0, // zasubq0 |
| 81661 | 0, // zasubq1 |
| 81662 | 0, // zasubs0 |
| 81663 | 0, // zasubs1 |
| 81664 | 346, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81665 | 346, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81666 | 346, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81667 | 346, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81668 | 346, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81669 | 346, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81670 | 0, // zasubd1_then_zasubq0 |
| 81671 | 0, // zasubd1_then_zasubq1 |
| 81672 | 0, // zasubs1_then_zasubd0 |
| 81673 | 0, // zasubs1_then_zasubd1 |
| 81674 | 0, // zasubs1_then_zasubq0 |
| 81675 | 0, // zasubs1_then_zasubq1 |
| 81676 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81677 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81678 | 0, // zasubh1_then_zasubd0 |
| 81679 | 0, // zasubh1_then_zasubd1 |
| 81680 | 0, // zasubh1_then_zasubq0 |
| 81681 | 0, // zasubh1_then_zasubq1 |
| 81682 | 0, // zasubh1_then_zasubs0 |
| 81683 | 0, // zasubh1_then_zasubs1 |
| 81684 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81685 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81686 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81687 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81688 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81689 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81690 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81691 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81692 | 346, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81693 | 346, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81694 | 346, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81695 | 346, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81696 | 346, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81697 | 346, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81698 | 346, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81699 | 346, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81700 | 346, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81701 | 346, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81702 | 346, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81703 | 346, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81704 | 346, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81705 | 346, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81706 | 346, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81707 | 346, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81708 | 346, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81709 | 346, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81710 | 0, // psub1_then_psub |
| 81711 | 346, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81712 | 346, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81713 | 346, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81714 | 0, // x8sub_7_then_sub_32 |
| 81715 | 0, // x8sub_7_then_sub_32_hi |
| 81716 | 0, // x8sub_6_then_sub_32 |
| 81717 | 0, // x8sub_6_then_sub_32_hi |
| 81718 | 0, // x8sub_5_then_sub_32 |
| 81719 | 0, // x8sub_5_then_sub_32_hi |
| 81720 | 0, // x8sub_4_then_sub_32 |
| 81721 | 0, // x8sub_4_then_sub_32_hi |
| 81722 | 0, // x8sub_3_then_sub_32 |
| 81723 | 0, // x8sub_3_then_sub_32_hi |
| 81724 | 0, // x8sub_2_then_sub_32 |
| 81725 | 0, // x8sub_2_then_sub_32_hi |
| 81726 | 0, // x8sub_1_then_sub_32 |
| 81727 | 0, // x8sub_1_then_sub_32_hi |
| 81728 | 0, // subo64_then_sub_32 |
| 81729 | 0, // subo64_then_sub_32_hi |
| 81730 | 346, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81731 | 346, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81732 | 346, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81733 | 0, // dsub0_dsub1 |
| 81734 | 0, // dsub0_dsub1_dsub2 |
| 81735 | 346, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81736 | 346, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81737 | 346, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81738 | 346, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81739 | 346, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81740 | 346, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81741 | 0, // qsub0_qsub1 |
| 81742 | 0, // qsub0_qsub1_qsub2 |
| 81743 | 346, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81744 | 346, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81745 | 346, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81746 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81747 | 0, // x8sub_0_x8sub_1 |
| 81748 | 0, // x8sub_2_x8sub_3 |
| 81749 | 0, // x8sub_4_x8sub_5 |
| 81750 | 0, // x8sub_6_x8sub_7 |
| 81751 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81752 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81753 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81754 | 0, // sub_32_subo64_then_sub_32 |
| 81755 | 346, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81756 | 346, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81757 | 346, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81758 | 346, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81759 | 346, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81760 | 346, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81761 | 346, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81762 | 346, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 81763 | 0, // zsub0_zsub2 |
| 81764 | 0, // zsub1_zsub3 |
| 81765 | }, |
| 81766 | { // ZPR4_with_zsub3_in_ZPRMul4 |
| 81767 | 347, // bsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81768 | 347, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81769 | 347, // dsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81770 | 0, // dsub0 |
| 81771 | 347, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81772 | 347, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81773 | 347, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81774 | 347, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81775 | 347, // hsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81776 | 347, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81777 | 0, // psub |
| 81778 | 0, // psub0 |
| 81779 | 0, // psub1 |
| 81780 | 0, // qsub0 |
| 81781 | 347, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81782 | 347, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81783 | 347, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81784 | 347, // ssub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81785 | 347, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81786 | 0, // sub_32 |
| 81787 | 0, // sub_32_hi |
| 81788 | 0, // sube32 |
| 81789 | 0, // sube64 |
| 81790 | 0, // subo32 |
| 81791 | 0, // subo64 |
| 81792 | 0, // x8sub_0 |
| 81793 | 0, // x8sub_1 |
| 81794 | 0, // x8sub_2 |
| 81795 | 0, // x8sub_3 |
| 81796 | 0, // x8sub_4 |
| 81797 | 0, // x8sub_5 |
| 81798 | 0, // x8sub_6 |
| 81799 | 0, // x8sub_7 |
| 81800 | 0, // zasubb |
| 81801 | 0, // zasubd0 |
| 81802 | 0, // zasubd1 |
| 81803 | 0, // zasubh0 |
| 81804 | 0, // zasubh1 |
| 81805 | 0, // zasubq0 |
| 81806 | 0, // zasubq1 |
| 81807 | 0, // zasubs0 |
| 81808 | 0, // zasubs1 |
| 81809 | 347, // zsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81810 | 347, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81811 | 347, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81812 | 347, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81813 | 347, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81814 | 347, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81815 | 0, // zasubd1_then_zasubq0 |
| 81816 | 0, // zasubd1_then_zasubq1 |
| 81817 | 0, // zasubs1_then_zasubd0 |
| 81818 | 0, // zasubs1_then_zasubd1 |
| 81819 | 0, // zasubs1_then_zasubq0 |
| 81820 | 0, // zasubs1_then_zasubq1 |
| 81821 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81822 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81823 | 0, // zasubh1_then_zasubd0 |
| 81824 | 0, // zasubh1_then_zasubd1 |
| 81825 | 0, // zasubh1_then_zasubq0 |
| 81826 | 0, // zasubh1_then_zasubq1 |
| 81827 | 0, // zasubh1_then_zasubs0 |
| 81828 | 0, // zasubh1_then_zasubs1 |
| 81829 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81830 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81831 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81832 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81833 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81834 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81835 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81836 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81837 | 347, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81838 | 347, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81839 | 347, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81840 | 347, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81841 | 347, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81842 | 347, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81843 | 347, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81844 | 347, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81845 | 347, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81846 | 347, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81847 | 347, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81848 | 347, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81849 | 347, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81850 | 347, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81851 | 347, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81852 | 347, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81853 | 347, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81854 | 347, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81855 | 0, // psub1_then_psub |
| 81856 | 347, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81857 | 347, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81858 | 347, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81859 | 0, // x8sub_7_then_sub_32 |
| 81860 | 0, // x8sub_7_then_sub_32_hi |
| 81861 | 0, // x8sub_6_then_sub_32 |
| 81862 | 0, // x8sub_6_then_sub_32_hi |
| 81863 | 0, // x8sub_5_then_sub_32 |
| 81864 | 0, // x8sub_5_then_sub_32_hi |
| 81865 | 0, // x8sub_4_then_sub_32 |
| 81866 | 0, // x8sub_4_then_sub_32_hi |
| 81867 | 0, // x8sub_3_then_sub_32 |
| 81868 | 0, // x8sub_3_then_sub_32_hi |
| 81869 | 0, // x8sub_2_then_sub_32 |
| 81870 | 0, // x8sub_2_then_sub_32_hi |
| 81871 | 0, // x8sub_1_then_sub_32 |
| 81872 | 0, // x8sub_1_then_sub_32_hi |
| 81873 | 0, // subo64_then_sub_32 |
| 81874 | 0, // subo64_then_sub_32_hi |
| 81875 | 347, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81876 | 347, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81877 | 347, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81878 | 0, // dsub0_dsub1 |
| 81879 | 0, // dsub0_dsub1_dsub2 |
| 81880 | 347, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81881 | 347, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81882 | 347, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81883 | 347, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81884 | 347, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81885 | 347, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81886 | 0, // qsub0_qsub1 |
| 81887 | 0, // qsub0_qsub1_qsub2 |
| 81888 | 347, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81889 | 347, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81890 | 347, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81891 | 0, // sub_32_x8sub_1_then_sub_32 |
| 81892 | 0, // x8sub_0_x8sub_1 |
| 81893 | 0, // x8sub_2_x8sub_3 |
| 81894 | 0, // x8sub_4_x8sub_5 |
| 81895 | 0, // x8sub_6_x8sub_7 |
| 81896 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 81897 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 81898 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 81899 | 0, // sub_32_subo64_then_sub_32 |
| 81900 | 347, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81901 | 347, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81902 | 347, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81903 | 347, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81904 | 347, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81905 | 347, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81906 | 347, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81907 | 347, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4 |
| 81908 | 0, // zsub0_zsub2 |
| 81909 | 0, // zsub1_zsub3 |
| 81910 | }, |
| 81911 | { // ZPR4_with_zsub3_in_ZPR_K |
| 81912 | 348, // bsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81913 | 348, // bsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81914 | 348, // dsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81915 | 0, // dsub0 |
| 81916 | 348, // dsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 81917 | 348, // dsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 81918 | 348, // dsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 81919 | 348, // dsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81920 | 348, // hsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81921 | 348, // hsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81922 | 0, // psub |
| 81923 | 0, // psub0 |
| 81924 | 0, // psub1 |
| 81925 | 0, // qsub0 |
| 81926 | 348, // qsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 81927 | 348, // qsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 81928 | 348, // qsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 81929 | 348, // ssub -> ZPR4_with_zsub3_in_ZPR_K |
| 81930 | 348, // ssub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81931 | 0, // sub_32 |
| 81932 | 0, // sub_32_hi |
| 81933 | 0, // sube32 |
| 81934 | 0, // sube64 |
| 81935 | 0, // subo32 |
| 81936 | 0, // subo64 |
| 81937 | 0, // x8sub_0 |
| 81938 | 0, // x8sub_1 |
| 81939 | 0, // x8sub_2 |
| 81940 | 0, // x8sub_3 |
| 81941 | 0, // x8sub_4 |
| 81942 | 0, // x8sub_5 |
| 81943 | 0, // x8sub_6 |
| 81944 | 0, // x8sub_7 |
| 81945 | 0, // zasubb |
| 81946 | 0, // zasubd0 |
| 81947 | 0, // zasubd1 |
| 81948 | 0, // zasubh0 |
| 81949 | 0, // zasubh1 |
| 81950 | 0, // zasubq0 |
| 81951 | 0, // zasubq1 |
| 81952 | 0, // zasubs0 |
| 81953 | 0, // zasubs1 |
| 81954 | 348, // zsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81955 | 348, // zsub0 -> ZPR4_with_zsub3_in_ZPR_K |
| 81956 | 348, // zsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 81957 | 348, // zsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 81958 | 348, // zsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 81959 | 348, // zsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81960 | 0, // zasubd1_then_zasubq0 |
| 81961 | 0, // zasubd1_then_zasubq1 |
| 81962 | 0, // zasubs1_then_zasubd0 |
| 81963 | 0, // zasubs1_then_zasubd1 |
| 81964 | 0, // zasubs1_then_zasubq0 |
| 81965 | 0, // zasubs1_then_zasubq1 |
| 81966 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 81967 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 81968 | 0, // zasubh1_then_zasubd0 |
| 81969 | 0, // zasubh1_then_zasubd1 |
| 81970 | 0, // zasubh1_then_zasubq0 |
| 81971 | 0, // zasubh1_then_zasubq1 |
| 81972 | 0, // zasubh1_then_zasubs0 |
| 81973 | 0, // zasubh1_then_zasubs1 |
| 81974 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 81975 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 81976 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 81977 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 81978 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 81979 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 81980 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 81981 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 81982 | 348, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81983 | 348, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81984 | 348, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81985 | 348, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81986 | 348, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPR_K |
| 81987 | 348, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81988 | 348, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81989 | 348, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81990 | 348, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81991 | 348, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81992 | 348, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPR_K |
| 81993 | 348, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81994 | 348, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81995 | 348, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81996 | 348, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPR_K |
| 81997 | 348, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 81998 | 348, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPR_K |
| 81999 | 348, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82000 | 0, // psub1_then_psub |
| 82001 | 348, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82002 | 348, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82003 | 348, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82004 | 0, // x8sub_7_then_sub_32 |
| 82005 | 0, // x8sub_7_then_sub_32_hi |
| 82006 | 0, // x8sub_6_then_sub_32 |
| 82007 | 0, // x8sub_6_then_sub_32_hi |
| 82008 | 0, // x8sub_5_then_sub_32 |
| 82009 | 0, // x8sub_5_then_sub_32_hi |
| 82010 | 0, // x8sub_4_then_sub_32 |
| 82011 | 0, // x8sub_4_then_sub_32_hi |
| 82012 | 0, // x8sub_3_then_sub_32 |
| 82013 | 0, // x8sub_3_then_sub_32_hi |
| 82014 | 0, // x8sub_2_then_sub_32 |
| 82015 | 0, // x8sub_2_then_sub_32_hi |
| 82016 | 0, // x8sub_1_then_sub_32 |
| 82017 | 0, // x8sub_1_then_sub_32_hi |
| 82018 | 0, // subo64_then_sub_32 |
| 82019 | 0, // subo64_then_sub_32_hi |
| 82020 | 348, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82021 | 348, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82022 | 348, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_K |
| 82023 | 0, // dsub0_dsub1 |
| 82024 | 0, // dsub0_dsub1_dsub2 |
| 82025 | 348, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82026 | 348, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82027 | 348, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82028 | 348, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 82029 | 348, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82030 | 348, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82031 | 0, // qsub0_qsub1 |
| 82032 | 0, // qsub0_qsub1_qsub2 |
| 82033 | 348, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82034 | 348, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82035 | 348, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82036 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82037 | 0, // x8sub_0_x8sub_1 |
| 82038 | 0, // x8sub_2_x8sub_3 |
| 82039 | 0, // x8sub_4_x8sub_5 |
| 82040 | 0, // x8sub_6_x8sub_7 |
| 82041 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82042 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82043 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82044 | 0, // sub_32_subo64_then_sub_32 |
| 82045 | 348, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 82046 | 348, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82047 | 348, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82048 | 348, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPR_K |
| 82049 | 348, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82050 | 348, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_K |
| 82051 | 348, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82052 | 348, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_K |
| 82053 | 0, // zsub0_zsub2 |
| 82054 | 0, // zsub1_zsub3 |
| 82055 | }, |
| 82056 | { // ZPR4_with_zsub_in_FPR128_0to7 |
| 82057 | 349, // bsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82058 | 349, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82059 | 349, // dsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82060 | 0, // dsub0 |
| 82061 | 349, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82062 | 349, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82063 | 349, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82064 | 349, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82065 | 349, // hsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82066 | 349, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82067 | 0, // psub |
| 82068 | 0, // psub0 |
| 82069 | 0, // psub1 |
| 82070 | 0, // qsub0 |
| 82071 | 349, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82072 | 349, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82073 | 349, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82074 | 349, // ssub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82075 | 349, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82076 | 0, // sub_32 |
| 82077 | 0, // sub_32_hi |
| 82078 | 0, // sube32 |
| 82079 | 0, // sube64 |
| 82080 | 0, // subo32 |
| 82081 | 0, // subo64 |
| 82082 | 0, // x8sub_0 |
| 82083 | 0, // x8sub_1 |
| 82084 | 0, // x8sub_2 |
| 82085 | 0, // x8sub_3 |
| 82086 | 0, // x8sub_4 |
| 82087 | 0, // x8sub_5 |
| 82088 | 0, // x8sub_6 |
| 82089 | 0, // x8sub_7 |
| 82090 | 0, // zasubb |
| 82091 | 0, // zasubd0 |
| 82092 | 0, // zasubd1 |
| 82093 | 0, // zasubh0 |
| 82094 | 0, // zasubh1 |
| 82095 | 0, // zasubq0 |
| 82096 | 0, // zasubq1 |
| 82097 | 0, // zasubs0 |
| 82098 | 0, // zasubs1 |
| 82099 | 349, // zsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82100 | 349, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82101 | 349, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82102 | 349, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82103 | 349, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82104 | 349, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82105 | 0, // zasubd1_then_zasubq0 |
| 82106 | 0, // zasubd1_then_zasubq1 |
| 82107 | 0, // zasubs1_then_zasubd0 |
| 82108 | 0, // zasubs1_then_zasubd1 |
| 82109 | 0, // zasubs1_then_zasubq0 |
| 82110 | 0, // zasubs1_then_zasubq1 |
| 82111 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82112 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82113 | 0, // zasubh1_then_zasubd0 |
| 82114 | 0, // zasubh1_then_zasubd1 |
| 82115 | 0, // zasubh1_then_zasubq0 |
| 82116 | 0, // zasubh1_then_zasubq1 |
| 82117 | 0, // zasubh1_then_zasubs0 |
| 82118 | 0, // zasubh1_then_zasubs1 |
| 82119 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82120 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82121 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82122 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82123 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82124 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82125 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82126 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82127 | 349, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82128 | 349, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82129 | 349, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82130 | 349, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82131 | 349, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82132 | 349, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82133 | 349, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82134 | 349, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82135 | 349, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82136 | 349, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82137 | 349, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82138 | 349, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82139 | 349, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82140 | 349, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82141 | 349, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82142 | 349, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82143 | 349, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82144 | 349, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82145 | 0, // psub1_then_psub |
| 82146 | 349, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82147 | 349, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82148 | 349, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82149 | 0, // x8sub_7_then_sub_32 |
| 82150 | 0, // x8sub_7_then_sub_32_hi |
| 82151 | 0, // x8sub_6_then_sub_32 |
| 82152 | 0, // x8sub_6_then_sub_32_hi |
| 82153 | 0, // x8sub_5_then_sub_32 |
| 82154 | 0, // x8sub_5_then_sub_32_hi |
| 82155 | 0, // x8sub_4_then_sub_32 |
| 82156 | 0, // x8sub_4_then_sub_32_hi |
| 82157 | 0, // x8sub_3_then_sub_32 |
| 82158 | 0, // x8sub_3_then_sub_32_hi |
| 82159 | 0, // x8sub_2_then_sub_32 |
| 82160 | 0, // x8sub_2_then_sub_32_hi |
| 82161 | 0, // x8sub_1_then_sub_32 |
| 82162 | 0, // x8sub_1_then_sub_32_hi |
| 82163 | 0, // subo64_then_sub_32 |
| 82164 | 0, // subo64_then_sub_32_hi |
| 82165 | 349, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82166 | 349, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82167 | 349, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82168 | 0, // dsub0_dsub1 |
| 82169 | 0, // dsub0_dsub1_dsub2 |
| 82170 | 349, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82171 | 349, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82172 | 349, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82173 | 349, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82174 | 349, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82175 | 349, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82176 | 0, // qsub0_qsub1 |
| 82177 | 0, // qsub0_qsub1_qsub2 |
| 82178 | 349, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82179 | 349, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82180 | 349, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82181 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82182 | 0, // x8sub_0_x8sub_1 |
| 82183 | 0, // x8sub_2_x8sub_3 |
| 82184 | 0, // x8sub_4_x8sub_5 |
| 82185 | 0, // x8sub_6_x8sub_7 |
| 82186 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82187 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82188 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82189 | 0, // sub_32_subo64_then_sub_32 |
| 82190 | 349, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82191 | 349, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82192 | 349, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82193 | 349, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82194 | 349, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82195 | 349, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82196 | 349, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82197 | 349, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7 |
| 82198 | 0, // zsub0_zsub2 |
| 82199 | 0, // zsub1_zsub3 |
| 82200 | }, |
| 82201 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82202 | 350, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82203 | 350, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82204 | 350, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82205 | 0, // dsub0 |
| 82206 | 350, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82207 | 350, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82208 | 350, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82209 | 350, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82210 | 350, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82211 | 350, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82212 | 0, // psub |
| 82213 | 0, // psub0 |
| 82214 | 0, // psub1 |
| 82215 | 0, // qsub0 |
| 82216 | 350, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82217 | 350, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82218 | 350, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82219 | 350, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82220 | 350, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82221 | 0, // sub_32 |
| 82222 | 0, // sub_32_hi |
| 82223 | 0, // sube32 |
| 82224 | 0, // sube64 |
| 82225 | 0, // subo32 |
| 82226 | 0, // subo64 |
| 82227 | 0, // x8sub_0 |
| 82228 | 0, // x8sub_1 |
| 82229 | 0, // x8sub_2 |
| 82230 | 0, // x8sub_3 |
| 82231 | 0, // x8sub_4 |
| 82232 | 0, // x8sub_5 |
| 82233 | 0, // x8sub_6 |
| 82234 | 0, // x8sub_7 |
| 82235 | 0, // zasubb |
| 82236 | 0, // zasubd0 |
| 82237 | 0, // zasubd1 |
| 82238 | 0, // zasubh0 |
| 82239 | 0, // zasubh1 |
| 82240 | 0, // zasubq0 |
| 82241 | 0, // zasubq1 |
| 82242 | 0, // zasubs0 |
| 82243 | 0, // zasubs1 |
| 82244 | 350, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82245 | 350, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82246 | 350, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82247 | 350, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82248 | 350, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82249 | 350, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82250 | 0, // zasubd1_then_zasubq0 |
| 82251 | 0, // zasubd1_then_zasubq1 |
| 82252 | 0, // zasubs1_then_zasubd0 |
| 82253 | 0, // zasubs1_then_zasubd1 |
| 82254 | 0, // zasubs1_then_zasubq0 |
| 82255 | 0, // zasubs1_then_zasubq1 |
| 82256 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82257 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82258 | 0, // zasubh1_then_zasubd0 |
| 82259 | 0, // zasubh1_then_zasubd1 |
| 82260 | 0, // zasubh1_then_zasubq0 |
| 82261 | 0, // zasubh1_then_zasubq1 |
| 82262 | 0, // zasubh1_then_zasubs0 |
| 82263 | 0, // zasubh1_then_zasubs1 |
| 82264 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82265 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82266 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82267 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82268 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82269 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82270 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82271 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82272 | 350, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82273 | 350, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82274 | 350, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82275 | 350, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82276 | 350, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82277 | 350, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82278 | 350, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82279 | 350, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82280 | 350, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82281 | 350, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82282 | 350, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82283 | 350, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82284 | 350, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82285 | 350, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82286 | 350, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82287 | 350, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82288 | 350, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82289 | 350, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82290 | 0, // psub1_then_psub |
| 82291 | 350, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82292 | 350, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82293 | 350, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82294 | 0, // x8sub_7_then_sub_32 |
| 82295 | 0, // x8sub_7_then_sub_32_hi |
| 82296 | 0, // x8sub_6_then_sub_32 |
| 82297 | 0, // x8sub_6_then_sub_32_hi |
| 82298 | 0, // x8sub_5_then_sub_32 |
| 82299 | 0, // x8sub_5_then_sub_32_hi |
| 82300 | 0, // x8sub_4_then_sub_32 |
| 82301 | 0, // x8sub_4_then_sub_32_hi |
| 82302 | 0, // x8sub_3_then_sub_32 |
| 82303 | 0, // x8sub_3_then_sub_32_hi |
| 82304 | 0, // x8sub_2_then_sub_32 |
| 82305 | 0, // x8sub_2_then_sub_32_hi |
| 82306 | 0, // x8sub_1_then_sub_32 |
| 82307 | 0, // x8sub_1_then_sub_32_hi |
| 82308 | 0, // subo64_then_sub_32 |
| 82309 | 0, // subo64_then_sub_32_hi |
| 82310 | 350, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82311 | 350, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82312 | 350, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82313 | 0, // dsub0_dsub1 |
| 82314 | 0, // dsub0_dsub1_dsub2 |
| 82315 | 350, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82316 | 350, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82317 | 350, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82318 | 350, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82319 | 350, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82320 | 350, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82321 | 0, // qsub0_qsub1 |
| 82322 | 0, // qsub0_qsub1_qsub2 |
| 82323 | 350, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82324 | 350, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82325 | 350, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82326 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82327 | 0, // x8sub_0_x8sub_1 |
| 82328 | 0, // x8sub_2_x8sub_3 |
| 82329 | 0, // x8sub_4_x8sub_5 |
| 82330 | 0, // x8sub_6_x8sub_7 |
| 82331 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82332 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82333 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82334 | 0, // sub_32_subo64_then_sub_32 |
| 82335 | 350, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82336 | 350, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82337 | 350, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82338 | 350, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82339 | 350, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82340 | 350, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82341 | 350, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82342 | 350, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 82343 | 0, // zsub0_zsub2 |
| 82344 | 0, // zsub1_zsub3 |
| 82345 | }, |
| 82346 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82347 | 351, // bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82348 | 351, // bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82349 | 351, // dsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82350 | 0, // dsub0 |
| 82351 | 351, // dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82352 | 351, // dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82353 | 351, // dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82354 | 351, // dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82355 | 351, // hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82356 | 351, // hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82357 | 0, // psub |
| 82358 | 0, // psub0 |
| 82359 | 0, // psub1 |
| 82360 | 351, // qsub0 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82361 | 351, // qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82362 | 351, // qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82363 | 351, // qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82364 | 351, // ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82365 | 351, // ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82366 | 0, // sub_32 |
| 82367 | 0, // sub_32_hi |
| 82368 | 0, // sube32 |
| 82369 | 0, // sube64 |
| 82370 | 0, // subo32 |
| 82371 | 0, // subo64 |
| 82372 | 0, // x8sub_0 |
| 82373 | 0, // x8sub_1 |
| 82374 | 0, // x8sub_2 |
| 82375 | 0, // x8sub_3 |
| 82376 | 0, // x8sub_4 |
| 82377 | 0, // x8sub_5 |
| 82378 | 0, // x8sub_6 |
| 82379 | 0, // x8sub_7 |
| 82380 | 0, // zasubb |
| 82381 | 0, // zasubd0 |
| 82382 | 0, // zasubd1 |
| 82383 | 0, // zasubh0 |
| 82384 | 0, // zasubh1 |
| 82385 | 0, // zasubq0 |
| 82386 | 0, // zasubq1 |
| 82387 | 0, // zasubs0 |
| 82388 | 0, // zasubs1 |
| 82389 | 0, // zsub |
| 82390 | 0, // zsub0 |
| 82391 | 0, // zsub1 |
| 82392 | 0, // zsub2 |
| 82393 | 0, // zsub3 |
| 82394 | 0, // zsub_hi |
| 82395 | 0, // zasubd1_then_zasubq0 |
| 82396 | 0, // zasubd1_then_zasubq1 |
| 82397 | 0, // zasubs1_then_zasubd0 |
| 82398 | 0, // zasubs1_then_zasubd1 |
| 82399 | 0, // zasubs1_then_zasubq0 |
| 82400 | 0, // zasubs1_then_zasubq1 |
| 82401 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82402 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82403 | 0, // zasubh1_then_zasubd0 |
| 82404 | 0, // zasubh1_then_zasubd1 |
| 82405 | 0, // zasubh1_then_zasubq0 |
| 82406 | 0, // zasubh1_then_zasubq1 |
| 82407 | 0, // zasubh1_then_zasubs0 |
| 82408 | 0, // zasubh1_then_zasubs1 |
| 82409 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82410 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82411 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82412 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82413 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82414 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82415 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82416 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82417 | 351, // dsub1_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82418 | 351, // dsub1_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82419 | 351, // dsub1_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82420 | 351, // dsub1_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82421 | 351, // dsub1_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82422 | 351, // dsub1_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82423 | 351, // dsub3_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82424 | 351, // dsub3_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82425 | 351, // dsub3_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82426 | 351, // dsub3_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82427 | 351, // dsub3_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82428 | 351, // dsub3_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82429 | 351, // dsub2_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82430 | 351, // dsub2_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82431 | 351, // dsub2_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82432 | 351, // dsub2_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82433 | 351, // dsub2_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82434 | 351, // dsub2_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82435 | 0, // psub1_then_psub |
| 82436 | 351, // qsub1_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82437 | 351, // qsub3_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82438 | 351, // qsub2_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82439 | 0, // x8sub_7_then_sub_32 |
| 82440 | 0, // x8sub_7_then_sub_32_hi |
| 82441 | 0, // x8sub_6_then_sub_32 |
| 82442 | 0, // x8sub_6_then_sub_32_hi |
| 82443 | 0, // x8sub_5_then_sub_32 |
| 82444 | 0, // x8sub_5_then_sub_32_hi |
| 82445 | 0, // x8sub_4_then_sub_32 |
| 82446 | 0, // x8sub_4_then_sub_32_hi |
| 82447 | 0, // x8sub_3_then_sub_32 |
| 82448 | 0, // x8sub_3_then_sub_32_hi |
| 82449 | 0, // x8sub_2_then_sub_32 |
| 82450 | 0, // x8sub_2_then_sub_32_hi |
| 82451 | 0, // x8sub_1_then_sub_32 |
| 82452 | 0, // x8sub_1_then_sub_32_hi |
| 82453 | 0, // subo64_then_sub_32 |
| 82454 | 0, // subo64_then_sub_32_hi |
| 82455 | 0, // zsub1_then_zsub_hi |
| 82456 | 0, // zsub3_then_zsub_hi |
| 82457 | 0, // zsub2_then_zsub_hi |
| 82458 | 0, // dsub0_dsub1 |
| 82459 | 0, // dsub0_dsub1_dsub2 |
| 82460 | 351, // dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82461 | 351, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82462 | 351, // dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82463 | 351, // dsub_dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82464 | 351, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82465 | 351, // dsub_dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82466 | 351, // qsub0_qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82467 | 351, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82468 | 351, // qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82469 | 351, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82470 | 351, // qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 82471 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82472 | 0, // x8sub_0_x8sub_1 |
| 82473 | 0, // x8sub_2_x8sub_3 |
| 82474 | 0, // x8sub_4_x8sub_5 |
| 82475 | 0, // x8sub_6_x8sub_7 |
| 82476 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82477 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82478 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82479 | 0, // sub_32_subo64_then_sub_32 |
| 82480 | 0, // zsub_qsub1 |
| 82481 | 0, // zsub_qsub1_qsub2_qsub3 |
| 82482 | 0, // zsub_qsub1_qsub2 |
| 82483 | 0, // zsub0_zsub1 |
| 82484 | 0, // zsub0_zsub1_zsub2 |
| 82485 | 0, // zsub1_zsub2 |
| 82486 | 0, // zsub1_zsub2_zsub3 |
| 82487 | 0, // zsub2_zsub3 |
| 82488 | 0, // zsub0_zsub2 |
| 82489 | 0, // zsub1_zsub3 |
| 82490 | }, |
| 82491 | { // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82492 | 352, // bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82493 | 352, // bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82494 | 352, // dsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82495 | 0, // dsub0 |
| 82496 | 352, // dsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82497 | 352, // dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82498 | 352, // dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82499 | 352, // dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82500 | 352, // hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82501 | 352, // hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82502 | 0, // psub |
| 82503 | 0, // psub0 |
| 82504 | 0, // psub1 |
| 82505 | 352, // qsub0 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82506 | 352, // qsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82507 | 352, // qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82508 | 352, // qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82509 | 352, // ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82510 | 352, // ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82511 | 0, // sub_32 |
| 82512 | 0, // sub_32_hi |
| 82513 | 0, // sube32 |
| 82514 | 0, // sube64 |
| 82515 | 0, // subo32 |
| 82516 | 0, // subo64 |
| 82517 | 0, // x8sub_0 |
| 82518 | 0, // x8sub_1 |
| 82519 | 0, // x8sub_2 |
| 82520 | 0, // x8sub_3 |
| 82521 | 0, // x8sub_4 |
| 82522 | 0, // x8sub_5 |
| 82523 | 0, // x8sub_6 |
| 82524 | 0, // x8sub_7 |
| 82525 | 0, // zasubb |
| 82526 | 0, // zasubd0 |
| 82527 | 0, // zasubd1 |
| 82528 | 0, // zasubh0 |
| 82529 | 0, // zasubh1 |
| 82530 | 0, // zasubq0 |
| 82531 | 0, // zasubq1 |
| 82532 | 0, // zasubs0 |
| 82533 | 0, // zasubs1 |
| 82534 | 0, // zsub |
| 82535 | 0, // zsub0 |
| 82536 | 0, // zsub1 |
| 82537 | 0, // zsub2 |
| 82538 | 0, // zsub3 |
| 82539 | 0, // zsub_hi |
| 82540 | 0, // zasubd1_then_zasubq0 |
| 82541 | 0, // zasubd1_then_zasubq1 |
| 82542 | 0, // zasubs1_then_zasubd0 |
| 82543 | 0, // zasubs1_then_zasubd1 |
| 82544 | 0, // zasubs1_then_zasubq0 |
| 82545 | 0, // zasubs1_then_zasubq1 |
| 82546 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82547 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82548 | 0, // zasubh1_then_zasubd0 |
| 82549 | 0, // zasubh1_then_zasubd1 |
| 82550 | 0, // zasubh1_then_zasubq0 |
| 82551 | 0, // zasubh1_then_zasubq1 |
| 82552 | 0, // zasubh1_then_zasubs0 |
| 82553 | 0, // zasubh1_then_zasubs1 |
| 82554 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82555 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82556 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82557 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82558 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82559 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82560 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82561 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82562 | 352, // dsub1_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82563 | 352, // dsub1_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82564 | 352, // dsub1_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82565 | 352, // dsub1_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82566 | 352, // dsub1_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82567 | 352, // dsub1_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82568 | 352, // dsub3_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82569 | 352, // dsub3_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82570 | 352, // dsub3_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82571 | 352, // dsub3_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82572 | 352, // dsub3_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82573 | 352, // dsub3_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82574 | 352, // dsub2_then_bsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82575 | 352, // dsub2_then_bsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82576 | 352, // dsub2_then_hsub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82577 | 352, // dsub2_then_hsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82578 | 352, // dsub2_then_ssub -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82579 | 352, // dsub2_then_ssub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82580 | 0, // psub1_then_psub |
| 82581 | 352, // qsub1_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82582 | 352, // qsub3_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82583 | 352, // qsub2_then_dsub_hi -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82584 | 0, // x8sub_7_then_sub_32 |
| 82585 | 0, // x8sub_7_then_sub_32_hi |
| 82586 | 0, // x8sub_6_then_sub_32 |
| 82587 | 0, // x8sub_6_then_sub_32_hi |
| 82588 | 0, // x8sub_5_then_sub_32 |
| 82589 | 0, // x8sub_5_then_sub_32_hi |
| 82590 | 0, // x8sub_4_then_sub_32 |
| 82591 | 0, // x8sub_4_then_sub_32_hi |
| 82592 | 0, // x8sub_3_then_sub_32 |
| 82593 | 0, // x8sub_3_then_sub_32_hi |
| 82594 | 0, // x8sub_2_then_sub_32 |
| 82595 | 0, // x8sub_2_then_sub_32_hi |
| 82596 | 0, // x8sub_1_then_sub_32 |
| 82597 | 0, // x8sub_1_then_sub_32_hi |
| 82598 | 0, // subo64_then_sub_32 |
| 82599 | 0, // subo64_then_sub_32_hi |
| 82600 | 0, // zsub1_then_zsub_hi |
| 82601 | 0, // zsub3_then_zsub_hi |
| 82602 | 0, // zsub2_then_zsub_hi |
| 82603 | 0, // dsub0_dsub1 |
| 82604 | 0, // dsub0_dsub1_dsub2 |
| 82605 | 352, // dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82606 | 352, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82607 | 352, // dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82608 | 352, // dsub_dsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82609 | 352, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82610 | 352, // dsub_dsub1_dsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82611 | 352, // qsub0_qsub1 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82612 | 352, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82613 | 352, // qsub1_qsub2 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82614 | 352, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82615 | 352, // qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 82616 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82617 | 0, // x8sub_0_x8sub_1 |
| 82618 | 0, // x8sub_2_x8sub_3 |
| 82619 | 0, // x8sub_4_x8sub_5 |
| 82620 | 0, // x8sub_6_x8sub_7 |
| 82621 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82622 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82623 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82624 | 0, // sub_32_subo64_then_sub_32 |
| 82625 | 0, // zsub_qsub1 |
| 82626 | 0, // zsub_qsub1_qsub2_qsub3 |
| 82627 | 0, // zsub_qsub1_qsub2 |
| 82628 | 0, // zsub0_zsub1 |
| 82629 | 0, // zsub0_zsub1_zsub2 |
| 82630 | 0, // zsub1_zsub2 |
| 82631 | 0, // zsub1_zsub2_zsub3 |
| 82632 | 0, // zsub2_zsub3 |
| 82633 | 0, // zsub0_zsub2 |
| 82634 | 0, // zsub1_zsub3 |
| 82635 | }, |
| 82636 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82637 | 353, // bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82638 | 353, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82639 | 353, // dsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82640 | 0, // dsub0 |
| 82641 | 353, // dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82642 | 353, // dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82643 | 353, // dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82644 | 353, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82645 | 353, // hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82646 | 353, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82647 | 0, // psub |
| 82648 | 0, // psub0 |
| 82649 | 0, // psub1 |
| 82650 | 353, // qsub0 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82651 | 353, // qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82652 | 353, // qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82653 | 353, // qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82654 | 353, // ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82655 | 353, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82656 | 0, // sub_32 |
| 82657 | 0, // sub_32_hi |
| 82658 | 0, // sube32 |
| 82659 | 0, // sube64 |
| 82660 | 0, // subo32 |
| 82661 | 0, // subo64 |
| 82662 | 0, // x8sub_0 |
| 82663 | 0, // x8sub_1 |
| 82664 | 0, // x8sub_2 |
| 82665 | 0, // x8sub_3 |
| 82666 | 0, // x8sub_4 |
| 82667 | 0, // x8sub_5 |
| 82668 | 0, // x8sub_6 |
| 82669 | 0, // x8sub_7 |
| 82670 | 0, // zasubb |
| 82671 | 0, // zasubd0 |
| 82672 | 0, // zasubd1 |
| 82673 | 0, // zasubh0 |
| 82674 | 0, // zasubh1 |
| 82675 | 0, // zasubq0 |
| 82676 | 0, // zasubq1 |
| 82677 | 0, // zasubs0 |
| 82678 | 0, // zasubs1 |
| 82679 | 0, // zsub |
| 82680 | 0, // zsub0 |
| 82681 | 0, // zsub1 |
| 82682 | 0, // zsub2 |
| 82683 | 0, // zsub3 |
| 82684 | 0, // zsub_hi |
| 82685 | 0, // zasubd1_then_zasubq0 |
| 82686 | 0, // zasubd1_then_zasubq1 |
| 82687 | 0, // zasubs1_then_zasubd0 |
| 82688 | 0, // zasubs1_then_zasubd1 |
| 82689 | 0, // zasubs1_then_zasubq0 |
| 82690 | 0, // zasubs1_then_zasubq1 |
| 82691 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82692 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82693 | 0, // zasubh1_then_zasubd0 |
| 82694 | 0, // zasubh1_then_zasubd1 |
| 82695 | 0, // zasubh1_then_zasubq0 |
| 82696 | 0, // zasubh1_then_zasubq1 |
| 82697 | 0, // zasubh1_then_zasubs0 |
| 82698 | 0, // zasubh1_then_zasubs1 |
| 82699 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82700 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82701 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82702 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82703 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82704 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82705 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82706 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82707 | 353, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82708 | 353, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82709 | 353, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82710 | 353, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82711 | 353, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82712 | 353, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82713 | 353, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82714 | 353, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82715 | 353, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82716 | 353, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82717 | 353, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82718 | 353, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82719 | 353, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82720 | 353, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82721 | 353, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82722 | 353, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82723 | 353, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82724 | 353, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82725 | 0, // psub1_then_psub |
| 82726 | 353, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82727 | 353, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82728 | 353, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82729 | 0, // x8sub_7_then_sub_32 |
| 82730 | 0, // x8sub_7_then_sub_32_hi |
| 82731 | 0, // x8sub_6_then_sub_32 |
| 82732 | 0, // x8sub_6_then_sub_32_hi |
| 82733 | 0, // x8sub_5_then_sub_32 |
| 82734 | 0, // x8sub_5_then_sub_32_hi |
| 82735 | 0, // x8sub_4_then_sub_32 |
| 82736 | 0, // x8sub_4_then_sub_32_hi |
| 82737 | 0, // x8sub_3_then_sub_32 |
| 82738 | 0, // x8sub_3_then_sub_32_hi |
| 82739 | 0, // x8sub_2_then_sub_32 |
| 82740 | 0, // x8sub_2_then_sub_32_hi |
| 82741 | 0, // x8sub_1_then_sub_32 |
| 82742 | 0, // x8sub_1_then_sub_32_hi |
| 82743 | 0, // subo64_then_sub_32 |
| 82744 | 0, // subo64_then_sub_32_hi |
| 82745 | 0, // zsub1_then_zsub_hi |
| 82746 | 0, // zsub3_then_zsub_hi |
| 82747 | 0, // zsub2_then_zsub_hi |
| 82748 | 0, // dsub0_dsub1 |
| 82749 | 0, // dsub0_dsub1_dsub2 |
| 82750 | 353, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82751 | 353, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82752 | 353, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82753 | 353, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82754 | 353, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82755 | 353, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82756 | 353, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82757 | 353, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82758 | 353, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82759 | 353, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82760 | 353, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 82761 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82762 | 0, // x8sub_0_x8sub_1 |
| 82763 | 0, // x8sub_2_x8sub_3 |
| 82764 | 0, // x8sub_4_x8sub_5 |
| 82765 | 0, // x8sub_6_x8sub_7 |
| 82766 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82767 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82768 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82769 | 0, // sub_32_subo64_then_sub_32 |
| 82770 | 0, // zsub_qsub1 |
| 82771 | 0, // zsub_qsub1_qsub2_qsub3 |
| 82772 | 0, // zsub_qsub1_qsub2 |
| 82773 | 0, // zsub0_zsub1 |
| 82774 | 0, // zsub0_zsub1_zsub2 |
| 82775 | 0, // zsub1_zsub2 |
| 82776 | 0, // zsub1_zsub2_zsub3 |
| 82777 | 0, // zsub2_zsub3 |
| 82778 | 0, // zsub0_zsub2 |
| 82779 | 0, // zsub1_zsub3 |
| 82780 | }, |
| 82781 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82782 | 354, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82783 | 354, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82784 | 354, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82785 | 0, // dsub0 |
| 82786 | 354, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82787 | 354, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82788 | 354, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82789 | 354, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82790 | 354, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82791 | 354, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82792 | 0, // psub |
| 82793 | 0, // psub0 |
| 82794 | 0, // psub1 |
| 82795 | 0, // qsub0 |
| 82796 | 354, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82797 | 354, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82798 | 354, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82799 | 354, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82800 | 354, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82801 | 0, // sub_32 |
| 82802 | 0, // sub_32_hi |
| 82803 | 0, // sube32 |
| 82804 | 0, // sube64 |
| 82805 | 0, // subo32 |
| 82806 | 0, // subo64 |
| 82807 | 0, // x8sub_0 |
| 82808 | 0, // x8sub_1 |
| 82809 | 0, // x8sub_2 |
| 82810 | 0, // x8sub_3 |
| 82811 | 0, // x8sub_4 |
| 82812 | 0, // x8sub_5 |
| 82813 | 0, // x8sub_6 |
| 82814 | 0, // x8sub_7 |
| 82815 | 0, // zasubb |
| 82816 | 0, // zasubd0 |
| 82817 | 0, // zasubd1 |
| 82818 | 0, // zasubh0 |
| 82819 | 0, // zasubh1 |
| 82820 | 0, // zasubq0 |
| 82821 | 0, // zasubq1 |
| 82822 | 0, // zasubs0 |
| 82823 | 0, // zasubs1 |
| 82824 | 354, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82825 | 354, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82826 | 354, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82827 | 354, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82828 | 354, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82829 | 354, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82830 | 0, // zasubd1_then_zasubq0 |
| 82831 | 0, // zasubd1_then_zasubq1 |
| 82832 | 0, // zasubs1_then_zasubd0 |
| 82833 | 0, // zasubs1_then_zasubd1 |
| 82834 | 0, // zasubs1_then_zasubq0 |
| 82835 | 0, // zasubs1_then_zasubq1 |
| 82836 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82837 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82838 | 0, // zasubh1_then_zasubd0 |
| 82839 | 0, // zasubh1_then_zasubd1 |
| 82840 | 0, // zasubh1_then_zasubq0 |
| 82841 | 0, // zasubh1_then_zasubq1 |
| 82842 | 0, // zasubh1_then_zasubs0 |
| 82843 | 0, // zasubh1_then_zasubs1 |
| 82844 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82845 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82846 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82847 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82848 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82849 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82850 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82851 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82852 | 354, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82853 | 354, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82854 | 354, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82855 | 354, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82856 | 354, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82857 | 354, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82858 | 354, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82859 | 354, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82860 | 354, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82861 | 354, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82862 | 354, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82863 | 354, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82864 | 354, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82865 | 354, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82866 | 354, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82867 | 354, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82868 | 354, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82869 | 354, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82870 | 0, // psub1_then_psub |
| 82871 | 354, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82872 | 354, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82873 | 354, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82874 | 0, // x8sub_7_then_sub_32 |
| 82875 | 0, // x8sub_7_then_sub_32_hi |
| 82876 | 0, // x8sub_6_then_sub_32 |
| 82877 | 0, // x8sub_6_then_sub_32_hi |
| 82878 | 0, // x8sub_5_then_sub_32 |
| 82879 | 0, // x8sub_5_then_sub_32_hi |
| 82880 | 0, // x8sub_4_then_sub_32 |
| 82881 | 0, // x8sub_4_then_sub_32_hi |
| 82882 | 0, // x8sub_3_then_sub_32 |
| 82883 | 0, // x8sub_3_then_sub_32_hi |
| 82884 | 0, // x8sub_2_then_sub_32 |
| 82885 | 0, // x8sub_2_then_sub_32_hi |
| 82886 | 0, // x8sub_1_then_sub_32 |
| 82887 | 0, // x8sub_1_then_sub_32_hi |
| 82888 | 0, // subo64_then_sub_32 |
| 82889 | 0, // subo64_then_sub_32_hi |
| 82890 | 354, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82891 | 354, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82892 | 354, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82893 | 0, // dsub0_dsub1 |
| 82894 | 0, // dsub0_dsub1_dsub2 |
| 82895 | 354, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82896 | 354, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82897 | 354, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82898 | 354, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82899 | 354, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82900 | 354, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82901 | 0, // qsub0_qsub1 |
| 82902 | 0, // qsub0_qsub1_qsub2 |
| 82903 | 354, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82904 | 354, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82905 | 354, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82906 | 0, // sub_32_x8sub_1_then_sub_32 |
| 82907 | 0, // x8sub_0_x8sub_1 |
| 82908 | 0, // x8sub_2_x8sub_3 |
| 82909 | 0, // x8sub_4_x8sub_5 |
| 82910 | 0, // x8sub_6_x8sub_7 |
| 82911 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 82912 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 82913 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 82914 | 0, // sub_32_subo64_then_sub_32 |
| 82915 | 354, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82916 | 354, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82917 | 354, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82918 | 354, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82919 | 354, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82920 | 354, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82921 | 354, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82922 | 354, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 82923 | 0, // zsub0_zsub2 |
| 82924 | 0, // zsub1_zsub3 |
| 82925 | }, |
| 82926 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82927 | 355, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82928 | 355, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82929 | 355, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82930 | 0, // dsub0 |
| 82931 | 355, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82932 | 355, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82933 | 355, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82934 | 355, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82935 | 355, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82936 | 355, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82937 | 0, // psub |
| 82938 | 0, // psub0 |
| 82939 | 0, // psub1 |
| 82940 | 0, // qsub0 |
| 82941 | 355, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82942 | 355, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82943 | 355, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82944 | 355, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82945 | 355, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82946 | 0, // sub_32 |
| 82947 | 0, // sub_32_hi |
| 82948 | 0, // sube32 |
| 82949 | 0, // sube64 |
| 82950 | 0, // subo32 |
| 82951 | 0, // subo64 |
| 82952 | 0, // x8sub_0 |
| 82953 | 0, // x8sub_1 |
| 82954 | 0, // x8sub_2 |
| 82955 | 0, // x8sub_3 |
| 82956 | 0, // x8sub_4 |
| 82957 | 0, // x8sub_5 |
| 82958 | 0, // x8sub_6 |
| 82959 | 0, // x8sub_7 |
| 82960 | 0, // zasubb |
| 82961 | 0, // zasubd0 |
| 82962 | 0, // zasubd1 |
| 82963 | 0, // zasubh0 |
| 82964 | 0, // zasubh1 |
| 82965 | 0, // zasubq0 |
| 82966 | 0, // zasubq1 |
| 82967 | 0, // zasubs0 |
| 82968 | 0, // zasubs1 |
| 82969 | 355, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82970 | 355, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82971 | 355, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82972 | 355, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82973 | 355, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82974 | 355, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82975 | 0, // zasubd1_then_zasubq0 |
| 82976 | 0, // zasubd1_then_zasubq1 |
| 82977 | 0, // zasubs1_then_zasubd0 |
| 82978 | 0, // zasubs1_then_zasubd1 |
| 82979 | 0, // zasubs1_then_zasubq0 |
| 82980 | 0, // zasubs1_then_zasubq1 |
| 82981 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 82982 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 82983 | 0, // zasubh1_then_zasubd0 |
| 82984 | 0, // zasubh1_then_zasubd1 |
| 82985 | 0, // zasubh1_then_zasubq0 |
| 82986 | 0, // zasubh1_then_zasubq1 |
| 82987 | 0, // zasubh1_then_zasubs0 |
| 82988 | 0, // zasubh1_then_zasubs1 |
| 82989 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 82990 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 82991 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 82992 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 82993 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 82994 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 82995 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 82996 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 82997 | 355, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82998 | 355, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 82999 | 355, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83000 | 355, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83001 | 355, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83002 | 355, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83003 | 355, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83004 | 355, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83005 | 355, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83006 | 355, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83007 | 355, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83008 | 355, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83009 | 355, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83010 | 355, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83011 | 355, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83012 | 355, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83013 | 355, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83014 | 355, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83015 | 0, // psub1_then_psub |
| 83016 | 355, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83017 | 355, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83018 | 355, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83019 | 0, // x8sub_7_then_sub_32 |
| 83020 | 0, // x8sub_7_then_sub_32_hi |
| 83021 | 0, // x8sub_6_then_sub_32 |
| 83022 | 0, // x8sub_6_then_sub_32_hi |
| 83023 | 0, // x8sub_5_then_sub_32 |
| 83024 | 0, // x8sub_5_then_sub_32_hi |
| 83025 | 0, // x8sub_4_then_sub_32 |
| 83026 | 0, // x8sub_4_then_sub_32_hi |
| 83027 | 0, // x8sub_3_then_sub_32 |
| 83028 | 0, // x8sub_3_then_sub_32_hi |
| 83029 | 0, // x8sub_2_then_sub_32 |
| 83030 | 0, // x8sub_2_then_sub_32_hi |
| 83031 | 0, // x8sub_1_then_sub_32 |
| 83032 | 0, // x8sub_1_then_sub_32_hi |
| 83033 | 0, // subo64_then_sub_32 |
| 83034 | 0, // subo64_then_sub_32_hi |
| 83035 | 355, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83036 | 355, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83037 | 355, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83038 | 0, // dsub0_dsub1 |
| 83039 | 0, // dsub0_dsub1_dsub2 |
| 83040 | 355, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83041 | 355, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83042 | 355, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83043 | 355, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83044 | 355, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83045 | 355, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83046 | 0, // qsub0_qsub1 |
| 83047 | 0, // qsub0_qsub1_qsub2 |
| 83048 | 355, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83049 | 355, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83050 | 355, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83051 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83052 | 0, // x8sub_0_x8sub_1 |
| 83053 | 0, // x8sub_2_x8sub_3 |
| 83054 | 0, // x8sub_4_x8sub_5 |
| 83055 | 0, // x8sub_6_x8sub_7 |
| 83056 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83057 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83058 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83059 | 0, // sub_32_subo64_then_sub_32 |
| 83060 | 355, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83061 | 355, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83062 | 355, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83063 | 355, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83064 | 355, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83065 | 355, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83066 | 355, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83067 | 355, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 83068 | 0, // zsub0_zsub2 |
| 83069 | 0, // zsub1_zsub3 |
| 83070 | }, |
| 83071 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83072 | 356, // bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83073 | 356, // bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83074 | 356, // dsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83075 | 0, // dsub0 |
| 83076 | 356, // dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83077 | 356, // dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83078 | 356, // dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83079 | 356, // dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83080 | 356, // hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83081 | 356, // hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83082 | 0, // psub |
| 83083 | 0, // psub0 |
| 83084 | 0, // psub1 |
| 83085 | 0, // qsub0 |
| 83086 | 356, // qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83087 | 356, // qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83088 | 356, // qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83089 | 356, // ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83090 | 356, // ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83091 | 0, // sub_32 |
| 83092 | 0, // sub_32_hi |
| 83093 | 0, // sube32 |
| 83094 | 0, // sube64 |
| 83095 | 0, // subo32 |
| 83096 | 0, // subo64 |
| 83097 | 0, // x8sub_0 |
| 83098 | 0, // x8sub_1 |
| 83099 | 0, // x8sub_2 |
| 83100 | 0, // x8sub_3 |
| 83101 | 0, // x8sub_4 |
| 83102 | 0, // x8sub_5 |
| 83103 | 0, // x8sub_6 |
| 83104 | 0, // x8sub_7 |
| 83105 | 0, // zasubb |
| 83106 | 0, // zasubd0 |
| 83107 | 0, // zasubd1 |
| 83108 | 0, // zasubh0 |
| 83109 | 0, // zasubh1 |
| 83110 | 0, // zasubq0 |
| 83111 | 0, // zasubq1 |
| 83112 | 0, // zasubs0 |
| 83113 | 0, // zasubs1 |
| 83114 | 356, // zsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83115 | 356, // zsub0 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83116 | 356, // zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83117 | 356, // zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83118 | 356, // zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83119 | 356, // zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83120 | 0, // zasubd1_then_zasubq0 |
| 83121 | 0, // zasubd1_then_zasubq1 |
| 83122 | 0, // zasubs1_then_zasubd0 |
| 83123 | 0, // zasubs1_then_zasubd1 |
| 83124 | 0, // zasubs1_then_zasubq0 |
| 83125 | 0, // zasubs1_then_zasubq1 |
| 83126 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83127 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83128 | 0, // zasubh1_then_zasubd0 |
| 83129 | 0, // zasubh1_then_zasubd1 |
| 83130 | 0, // zasubh1_then_zasubq0 |
| 83131 | 0, // zasubh1_then_zasubq1 |
| 83132 | 0, // zasubh1_then_zasubs0 |
| 83133 | 0, // zasubh1_then_zasubs1 |
| 83134 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83135 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83136 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83137 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83138 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83139 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83140 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83141 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83142 | 356, // dsub1_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83143 | 356, // dsub1_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83144 | 356, // dsub1_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83145 | 356, // dsub1_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83146 | 356, // dsub1_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83147 | 356, // dsub1_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83148 | 356, // dsub3_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83149 | 356, // dsub3_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83150 | 356, // dsub3_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83151 | 356, // dsub3_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83152 | 356, // dsub3_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83153 | 356, // dsub3_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83154 | 356, // dsub2_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83155 | 356, // dsub2_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83156 | 356, // dsub2_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83157 | 356, // dsub2_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83158 | 356, // dsub2_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83159 | 356, // dsub2_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83160 | 0, // psub1_then_psub |
| 83161 | 356, // qsub1_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83162 | 356, // qsub3_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83163 | 356, // qsub2_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83164 | 0, // x8sub_7_then_sub_32 |
| 83165 | 0, // x8sub_7_then_sub_32_hi |
| 83166 | 0, // x8sub_6_then_sub_32 |
| 83167 | 0, // x8sub_6_then_sub_32_hi |
| 83168 | 0, // x8sub_5_then_sub_32 |
| 83169 | 0, // x8sub_5_then_sub_32_hi |
| 83170 | 0, // x8sub_4_then_sub_32 |
| 83171 | 0, // x8sub_4_then_sub_32_hi |
| 83172 | 0, // x8sub_3_then_sub_32 |
| 83173 | 0, // x8sub_3_then_sub_32_hi |
| 83174 | 0, // x8sub_2_then_sub_32 |
| 83175 | 0, // x8sub_2_then_sub_32_hi |
| 83176 | 0, // x8sub_1_then_sub_32 |
| 83177 | 0, // x8sub_1_then_sub_32_hi |
| 83178 | 0, // subo64_then_sub_32 |
| 83179 | 0, // subo64_then_sub_32_hi |
| 83180 | 356, // zsub1_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83181 | 356, // zsub3_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83182 | 356, // zsub2_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83183 | 0, // dsub0_dsub1 |
| 83184 | 0, // dsub0_dsub1_dsub2 |
| 83185 | 356, // dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83186 | 356, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83187 | 356, // dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83188 | 356, // dsub_dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83189 | 356, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83190 | 356, // dsub_dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83191 | 0, // qsub0_qsub1 |
| 83192 | 0, // qsub0_qsub1_qsub2 |
| 83193 | 356, // qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83194 | 356, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83195 | 356, // qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83196 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83197 | 0, // x8sub_0_x8sub_1 |
| 83198 | 0, // x8sub_2_x8sub_3 |
| 83199 | 0, // x8sub_4_x8sub_5 |
| 83200 | 0, // x8sub_6_x8sub_7 |
| 83201 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83202 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83203 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83204 | 0, // sub_32_subo64_then_sub_32 |
| 83205 | 356, // zsub_qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83206 | 356, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83207 | 356, // zsub_qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83208 | 356, // zsub0_zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83209 | 356, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83210 | 356, // zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83211 | 356, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83212 | 356, // zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 83213 | 0, // zsub0_zsub2 |
| 83214 | 0, // zsub1_zsub3 |
| 83215 | }, |
| 83216 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83217 | 357, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83218 | 357, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83219 | 357, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83220 | 0, // dsub0 |
| 83221 | 357, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83222 | 357, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83223 | 357, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83224 | 357, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83225 | 357, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83226 | 357, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83227 | 0, // psub |
| 83228 | 0, // psub0 |
| 83229 | 0, // psub1 |
| 83230 | 0, // qsub0 |
| 83231 | 357, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83232 | 357, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83233 | 357, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83234 | 357, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83235 | 357, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83236 | 0, // sub_32 |
| 83237 | 0, // sub_32_hi |
| 83238 | 0, // sube32 |
| 83239 | 0, // sube64 |
| 83240 | 0, // subo32 |
| 83241 | 0, // subo64 |
| 83242 | 0, // x8sub_0 |
| 83243 | 0, // x8sub_1 |
| 83244 | 0, // x8sub_2 |
| 83245 | 0, // x8sub_3 |
| 83246 | 0, // x8sub_4 |
| 83247 | 0, // x8sub_5 |
| 83248 | 0, // x8sub_6 |
| 83249 | 0, // x8sub_7 |
| 83250 | 0, // zasubb |
| 83251 | 0, // zasubd0 |
| 83252 | 0, // zasubd1 |
| 83253 | 0, // zasubh0 |
| 83254 | 0, // zasubh1 |
| 83255 | 0, // zasubq0 |
| 83256 | 0, // zasubq1 |
| 83257 | 0, // zasubs0 |
| 83258 | 0, // zasubs1 |
| 83259 | 357, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83260 | 357, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83261 | 357, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83262 | 357, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83263 | 357, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83264 | 357, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83265 | 0, // zasubd1_then_zasubq0 |
| 83266 | 0, // zasubd1_then_zasubq1 |
| 83267 | 0, // zasubs1_then_zasubd0 |
| 83268 | 0, // zasubs1_then_zasubd1 |
| 83269 | 0, // zasubs1_then_zasubq0 |
| 83270 | 0, // zasubs1_then_zasubq1 |
| 83271 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83272 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83273 | 0, // zasubh1_then_zasubd0 |
| 83274 | 0, // zasubh1_then_zasubd1 |
| 83275 | 0, // zasubh1_then_zasubq0 |
| 83276 | 0, // zasubh1_then_zasubq1 |
| 83277 | 0, // zasubh1_then_zasubs0 |
| 83278 | 0, // zasubh1_then_zasubs1 |
| 83279 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83280 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83281 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83282 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83283 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83284 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83285 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83286 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83287 | 357, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83288 | 357, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83289 | 357, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83290 | 357, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83291 | 357, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83292 | 357, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83293 | 357, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83294 | 357, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83295 | 357, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83296 | 357, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83297 | 357, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83298 | 357, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83299 | 357, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83300 | 357, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83301 | 357, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83302 | 357, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83303 | 357, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83304 | 357, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83305 | 0, // psub1_then_psub |
| 83306 | 357, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83307 | 357, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83308 | 357, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83309 | 0, // x8sub_7_then_sub_32 |
| 83310 | 0, // x8sub_7_then_sub_32_hi |
| 83311 | 0, // x8sub_6_then_sub_32 |
| 83312 | 0, // x8sub_6_then_sub_32_hi |
| 83313 | 0, // x8sub_5_then_sub_32 |
| 83314 | 0, // x8sub_5_then_sub_32_hi |
| 83315 | 0, // x8sub_4_then_sub_32 |
| 83316 | 0, // x8sub_4_then_sub_32_hi |
| 83317 | 0, // x8sub_3_then_sub_32 |
| 83318 | 0, // x8sub_3_then_sub_32_hi |
| 83319 | 0, // x8sub_2_then_sub_32 |
| 83320 | 0, // x8sub_2_then_sub_32_hi |
| 83321 | 0, // x8sub_1_then_sub_32 |
| 83322 | 0, // x8sub_1_then_sub_32_hi |
| 83323 | 0, // subo64_then_sub_32 |
| 83324 | 0, // subo64_then_sub_32_hi |
| 83325 | 357, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83326 | 357, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83327 | 357, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83328 | 0, // dsub0_dsub1 |
| 83329 | 0, // dsub0_dsub1_dsub2 |
| 83330 | 357, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83331 | 357, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83332 | 357, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83333 | 357, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83334 | 357, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83335 | 357, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83336 | 0, // qsub0_qsub1 |
| 83337 | 0, // qsub0_qsub1_qsub2 |
| 83338 | 357, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83339 | 357, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83340 | 357, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83341 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83342 | 0, // x8sub_0_x8sub_1 |
| 83343 | 0, // x8sub_2_x8sub_3 |
| 83344 | 0, // x8sub_4_x8sub_5 |
| 83345 | 0, // x8sub_6_x8sub_7 |
| 83346 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83347 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83348 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83349 | 0, // sub_32_subo64_then_sub_32 |
| 83350 | 357, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83351 | 357, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83352 | 357, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83353 | 357, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83354 | 357, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83355 | 357, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83356 | 357, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83357 | 357, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83358 | 0, // zsub0_zsub2 |
| 83359 | 0, // zsub1_zsub3 |
| 83360 | }, |
| 83361 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83362 | 358, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83363 | 358, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83364 | 358, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83365 | 0, // dsub0 |
| 83366 | 358, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83367 | 358, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83368 | 358, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83369 | 358, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83370 | 358, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83371 | 358, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83372 | 0, // psub |
| 83373 | 0, // psub0 |
| 83374 | 0, // psub1 |
| 83375 | 0, // qsub0 |
| 83376 | 358, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83377 | 358, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83378 | 358, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83379 | 358, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83380 | 358, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83381 | 0, // sub_32 |
| 83382 | 0, // sub_32_hi |
| 83383 | 0, // sube32 |
| 83384 | 0, // sube64 |
| 83385 | 0, // subo32 |
| 83386 | 0, // subo64 |
| 83387 | 0, // x8sub_0 |
| 83388 | 0, // x8sub_1 |
| 83389 | 0, // x8sub_2 |
| 83390 | 0, // x8sub_3 |
| 83391 | 0, // x8sub_4 |
| 83392 | 0, // x8sub_5 |
| 83393 | 0, // x8sub_6 |
| 83394 | 0, // x8sub_7 |
| 83395 | 0, // zasubb |
| 83396 | 0, // zasubd0 |
| 83397 | 0, // zasubd1 |
| 83398 | 0, // zasubh0 |
| 83399 | 0, // zasubh1 |
| 83400 | 0, // zasubq0 |
| 83401 | 0, // zasubq1 |
| 83402 | 0, // zasubs0 |
| 83403 | 0, // zasubs1 |
| 83404 | 358, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83405 | 358, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83406 | 358, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83407 | 358, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83408 | 358, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83409 | 358, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83410 | 0, // zasubd1_then_zasubq0 |
| 83411 | 0, // zasubd1_then_zasubq1 |
| 83412 | 0, // zasubs1_then_zasubd0 |
| 83413 | 0, // zasubs1_then_zasubd1 |
| 83414 | 0, // zasubs1_then_zasubq0 |
| 83415 | 0, // zasubs1_then_zasubq1 |
| 83416 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83417 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83418 | 0, // zasubh1_then_zasubd0 |
| 83419 | 0, // zasubh1_then_zasubd1 |
| 83420 | 0, // zasubh1_then_zasubq0 |
| 83421 | 0, // zasubh1_then_zasubq1 |
| 83422 | 0, // zasubh1_then_zasubs0 |
| 83423 | 0, // zasubh1_then_zasubs1 |
| 83424 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83425 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83426 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83427 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83428 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83429 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83430 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83431 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83432 | 358, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83433 | 358, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83434 | 358, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83435 | 358, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83436 | 358, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83437 | 358, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83438 | 358, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83439 | 358, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83440 | 358, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83441 | 358, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83442 | 358, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83443 | 358, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83444 | 358, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83445 | 358, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83446 | 358, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83447 | 358, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83448 | 358, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83449 | 358, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83450 | 0, // psub1_then_psub |
| 83451 | 358, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83452 | 358, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83453 | 358, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83454 | 0, // x8sub_7_then_sub_32 |
| 83455 | 0, // x8sub_7_then_sub_32_hi |
| 83456 | 0, // x8sub_6_then_sub_32 |
| 83457 | 0, // x8sub_6_then_sub_32_hi |
| 83458 | 0, // x8sub_5_then_sub_32 |
| 83459 | 0, // x8sub_5_then_sub_32_hi |
| 83460 | 0, // x8sub_4_then_sub_32 |
| 83461 | 0, // x8sub_4_then_sub_32_hi |
| 83462 | 0, // x8sub_3_then_sub_32 |
| 83463 | 0, // x8sub_3_then_sub_32_hi |
| 83464 | 0, // x8sub_2_then_sub_32 |
| 83465 | 0, // x8sub_2_then_sub_32_hi |
| 83466 | 0, // x8sub_1_then_sub_32 |
| 83467 | 0, // x8sub_1_then_sub_32_hi |
| 83468 | 0, // subo64_then_sub_32 |
| 83469 | 0, // subo64_then_sub_32_hi |
| 83470 | 358, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83471 | 358, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83472 | 358, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83473 | 0, // dsub0_dsub1 |
| 83474 | 0, // dsub0_dsub1_dsub2 |
| 83475 | 358, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83476 | 358, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83477 | 358, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83478 | 358, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83479 | 358, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83480 | 358, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83481 | 0, // qsub0_qsub1 |
| 83482 | 0, // qsub0_qsub1_qsub2 |
| 83483 | 358, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83484 | 358, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83485 | 358, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83486 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83487 | 0, // x8sub_0_x8sub_1 |
| 83488 | 0, // x8sub_2_x8sub_3 |
| 83489 | 0, // x8sub_4_x8sub_5 |
| 83490 | 0, // x8sub_6_x8sub_7 |
| 83491 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83492 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83493 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83494 | 0, // sub_32_subo64_then_sub_32 |
| 83495 | 358, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83496 | 358, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83497 | 358, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83498 | 358, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83499 | 358, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83500 | 358, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83501 | 358, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83502 | 358, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 83503 | 0, // zsub0_zsub2 |
| 83504 | 0, // zsub1_zsub3 |
| 83505 | }, |
| 83506 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83507 | 359, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83508 | 359, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83509 | 359, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83510 | 0, // dsub0 |
| 83511 | 359, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83512 | 359, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83513 | 359, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83514 | 359, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83515 | 359, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83516 | 359, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83517 | 0, // psub |
| 83518 | 0, // psub0 |
| 83519 | 0, // psub1 |
| 83520 | 0, // qsub0 |
| 83521 | 359, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83522 | 359, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83523 | 359, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83524 | 359, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83525 | 359, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83526 | 0, // sub_32 |
| 83527 | 0, // sub_32_hi |
| 83528 | 0, // sube32 |
| 83529 | 0, // sube64 |
| 83530 | 0, // subo32 |
| 83531 | 0, // subo64 |
| 83532 | 0, // x8sub_0 |
| 83533 | 0, // x8sub_1 |
| 83534 | 0, // x8sub_2 |
| 83535 | 0, // x8sub_3 |
| 83536 | 0, // x8sub_4 |
| 83537 | 0, // x8sub_5 |
| 83538 | 0, // x8sub_6 |
| 83539 | 0, // x8sub_7 |
| 83540 | 0, // zasubb |
| 83541 | 0, // zasubd0 |
| 83542 | 0, // zasubd1 |
| 83543 | 0, // zasubh0 |
| 83544 | 0, // zasubh1 |
| 83545 | 0, // zasubq0 |
| 83546 | 0, // zasubq1 |
| 83547 | 0, // zasubs0 |
| 83548 | 0, // zasubs1 |
| 83549 | 359, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83550 | 359, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83551 | 359, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83552 | 359, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83553 | 359, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83554 | 359, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83555 | 0, // zasubd1_then_zasubq0 |
| 83556 | 0, // zasubd1_then_zasubq1 |
| 83557 | 0, // zasubs1_then_zasubd0 |
| 83558 | 0, // zasubs1_then_zasubd1 |
| 83559 | 0, // zasubs1_then_zasubq0 |
| 83560 | 0, // zasubs1_then_zasubq1 |
| 83561 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83562 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83563 | 0, // zasubh1_then_zasubd0 |
| 83564 | 0, // zasubh1_then_zasubd1 |
| 83565 | 0, // zasubh1_then_zasubq0 |
| 83566 | 0, // zasubh1_then_zasubq1 |
| 83567 | 0, // zasubh1_then_zasubs0 |
| 83568 | 0, // zasubh1_then_zasubs1 |
| 83569 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83570 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83571 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83572 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83573 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83574 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83575 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83576 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83577 | 359, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83578 | 359, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83579 | 359, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83580 | 359, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83581 | 359, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83582 | 359, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83583 | 359, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83584 | 359, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83585 | 359, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83586 | 359, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83587 | 359, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83588 | 359, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83589 | 359, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83590 | 359, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83591 | 359, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83592 | 359, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83593 | 359, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83594 | 359, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83595 | 0, // psub1_then_psub |
| 83596 | 359, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83597 | 359, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83598 | 359, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83599 | 0, // x8sub_7_then_sub_32 |
| 83600 | 0, // x8sub_7_then_sub_32_hi |
| 83601 | 0, // x8sub_6_then_sub_32 |
| 83602 | 0, // x8sub_6_then_sub_32_hi |
| 83603 | 0, // x8sub_5_then_sub_32 |
| 83604 | 0, // x8sub_5_then_sub_32_hi |
| 83605 | 0, // x8sub_4_then_sub_32 |
| 83606 | 0, // x8sub_4_then_sub_32_hi |
| 83607 | 0, // x8sub_3_then_sub_32 |
| 83608 | 0, // x8sub_3_then_sub_32_hi |
| 83609 | 0, // x8sub_2_then_sub_32 |
| 83610 | 0, // x8sub_2_then_sub_32_hi |
| 83611 | 0, // x8sub_1_then_sub_32 |
| 83612 | 0, // x8sub_1_then_sub_32_hi |
| 83613 | 0, // subo64_then_sub_32 |
| 83614 | 0, // subo64_then_sub_32_hi |
| 83615 | 359, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83616 | 359, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83617 | 359, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83618 | 0, // dsub0_dsub1 |
| 83619 | 0, // dsub0_dsub1_dsub2 |
| 83620 | 359, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83621 | 359, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83622 | 359, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83623 | 359, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83624 | 359, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83625 | 359, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83626 | 0, // qsub0_qsub1 |
| 83627 | 0, // qsub0_qsub1_qsub2 |
| 83628 | 359, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83629 | 359, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83630 | 359, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83631 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83632 | 0, // x8sub_0_x8sub_1 |
| 83633 | 0, // x8sub_2_x8sub_3 |
| 83634 | 0, // x8sub_4_x8sub_5 |
| 83635 | 0, // x8sub_6_x8sub_7 |
| 83636 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83637 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83638 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83639 | 0, // sub_32_subo64_then_sub_32 |
| 83640 | 359, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83641 | 359, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83642 | 359, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83643 | 359, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83644 | 359, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83645 | 359, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83646 | 359, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83647 | 359, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 83648 | 0, // zsub0_zsub2 |
| 83649 | 0, // zsub1_zsub3 |
| 83650 | }, |
| 83651 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83652 | 360, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83653 | 360, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83654 | 360, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83655 | 0, // dsub0 |
| 83656 | 360, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83657 | 360, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83658 | 360, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83659 | 360, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83660 | 360, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83661 | 360, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83662 | 0, // psub |
| 83663 | 0, // psub0 |
| 83664 | 0, // psub1 |
| 83665 | 0, // qsub0 |
| 83666 | 360, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83667 | 360, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83668 | 360, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83669 | 360, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83670 | 360, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83671 | 0, // sub_32 |
| 83672 | 0, // sub_32_hi |
| 83673 | 0, // sube32 |
| 83674 | 0, // sube64 |
| 83675 | 0, // subo32 |
| 83676 | 0, // subo64 |
| 83677 | 0, // x8sub_0 |
| 83678 | 0, // x8sub_1 |
| 83679 | 0, // x8sub_2 |
| 83680 | 0, // x8sub_3 |
| 83681 | 0, // x8sub_4 |
| 83682 | 0, // x8sub_5 |
| 83683 | 0, // x8sub_6 |
| 83684 | 0, // x8sub_7 |
| 83685 | 0, // zasubb |
| 83686 | 0, // zasubd0 |
| 83687 | 0, // zasubd1 |
| 83688 | 0, // zasubh0 |
| 83689 | 0, // zasubh1 |
| 83690 | 0, // zasubq0 |
| 83691 | 0, // zasubq1 |
| 83692 | 0, // zasubs0 |
| 83693 | 0, // zasubs1 |
| 83694 | 360, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83695 | 360, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83696 | 360, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83697 | 360, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83698 | 360, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83699 | 360, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83700 | 0, // zasubd1_then_zasubq0 |
| 83701 | 0, // zasubd1_then_zasubq1 |
| 83702 | 0, // zasubs1_then_zasubd0 |
| 83703 | 0, // zasubs1_then_zasubd1 |
| 83704 | 0, // zasubs1_then_zasubq0 |
| 83705 | 0, // zasubs1_then_zasubq1 |
| 83706 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83707 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83708 | 0, // zasubh1_then_zasubd0 |
| 83709 | 0, // zasubh1_then_zasubd1 |
| 83710 | 0, // zasubh1_then_zasubq0 |
| 83711 | 0, // zasubh1_then_zasubq1 |
| 83712 | 0, // zasubh1_then_zasubs0 |
| 83713 | 0, // zasubh1_then_zasubs1 |
| 83714 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83715 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83716 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83717 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83718 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83719 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83720 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83721 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83722 | 360, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83723 | 360, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83724 | 360, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83725 | 360, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83726 | 360, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83727 | 360, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83728 | 360, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83729 | 360, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83730 | 360, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83731 | 360, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83732 | 360, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83733 | 360, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83734 | 360, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83735 | 360, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83736 | 360, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83737 | 360, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83738 | 360, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83739 | 360, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83740 | 0, // psub1_then_psub |
| 83741 | 360, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83742 | 360, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83743 | 360, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83744 | 0, // x8sub_7_then_sub_32 |
| 83745 | 0, // x8sub_7_then_sub_32_hi |
| 83746 | 0, // x8sub_6_then_sub_32 |
| 83747 | 0, // x8sub_6_then_sub_32_hi |
| 83748 | 0, // x8sub_5_then_sub_32 |
| 83749 | 0, // x8sub_5_then_sub_32_hi |
| 83750 | 0, // x8sub_4_then_sub_32 |
| 83751 | 0, // x8sub_4_then_sub_32_hi |
| 83752 | 0, // x8sub_3_then_sub_32 |
| 83753 | 0, // x8sub_3_then_sub_32_hi |
| 83754 | 0, // x8sub_2_then_sub_32 |
| 83755 | 0, // x8sub_2_then_sub_32_hi |
| 83756 | 0, // x8sub_1_then_sub_32 |
| 83757 | 0, // x8sub_1_then_sub_32_hi |
| 83758 | 0, // subo64_then_sub_32 |
| 83759 | 0, // subo64_then_sub_32_hi |
| 83760 | 360, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83761 | 360, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83762 | 360, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83763 | 0, // dsub0_dsub1 |
| 83764 | 0, // dsub0_dsub1_dsub2 |
| 83765 | 360, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83766 | 360, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83767 | 360, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83768 | 360, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83769 | 360, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83770 | 360, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83771 | 0, // qsub0_qsub1 |
| 83772 | 0, // qsub0_qsub1_qsub2 |
| 83773 | 360, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83774 | 360, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83775 | 360, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83776 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83777 | 0, // x8sub_0_x8sub_1 |
| 83778 | 0, // x8sub_2_x8sub_3 |
| 83779 | 0, // x8sub_4_x8sub_5 |
| 83780 | 0, // x8sub_6_x8sub_7 |
| 83781 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83782 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83783 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83784 | 0, // sub_32_subo64_then_sub_32 |
| 83785 | 360, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83786 | 360, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83787 | 360, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83788 | 360, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83789 | 360, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83790 | 360, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83791 | 360, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83792 | 360, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 83793 | 0, // zsub0_zsub2 |
| 83794 | 0, // zsub1_zsub3 |
| 83795 | }, |
| 83796 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83797 | 361, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83798 | 361, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83799 | 361, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83800 | 0, // dsub0 |
| 83801 | 361, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83802 | 361, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83803 | 361, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83804 | 361, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83805 | 361, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83806 | 361, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83807 | 0, // psub |
| 83808 | 0, // psub0 |
| 83809 | 0, // psub1 |
| 83810 | 0, // qsub0 |
| 83811 | 361, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83812 | 361, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83813 | 361, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83814 | 361, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83815 | 361, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83816 | 0, // sub_32 |
| 83817 | 0, // sub_32_hi |
| 83818 | 0, // sube32 |
| 83819 | 0, // sube64 |
| 83820 | 0, // subo32 |
| 83821 | 0, // subo64 |
| 83822 | 0, // x8sub_0 |
| 83823 | 0, // x8sub_1 |
| 83824 | 0, // x8sub_2 |
| 83825 | 0, // x8sub_3 |
| 83826 | 0, // x8sub_4 |
| 83827 | 0, // x8sub_5 |
| 83828 | 0, // x8sub_6 |
| 83829 | 0, // x8sub_7 |
| 83830 | 0, // zasubb |
| 83831 | 0, // zasubd0 |
| 83832 | 0, // zasubd1 |
| 83833 | 0, // zasubh0 |
| 83834 | 0, // zasubh1 |
| 83835 | 0, // zasubq0 |
| 83836 | 0, // zasubq1 |
| 83837 | 0, // zasubs0 |
| 83838 | 0, // zasubs1 |
| 83839 | 361, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83840 | 361, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83841 | 361, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83842 | 361, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83843 | 361, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83844 | 361, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83845 | 0, // zasubd1_then_zasubq0 |
| 83846 | 0, // zasubd1_then_zasubq1 |
| 83847 | 0, // zasubs1_then_zasubd0 |
| 83848 | 0, // zasubs1_then_zasubd1 |
| 83849 | 0, // zasubs1_then_zasubq0 |
| 83850 | 0, // zasubs1_then_zasubq1 |
| 83851 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83852 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83853 | 0, // zasubh1_then_zasubd0 |
| 83854 | 0, // zasubh1_then_zasubd1 |
| 83855 | 0, // zasubh1_then_zasubq0 |
| 83856 | 0, // zasubh1_then_zasubq1 |
| 83857 | 0, // zasubh1_then_zasubs0 |
| 83858 | 0, // zasubh1_then_zasubs1 |
| 83859 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 83860 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 83861 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 83862 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 83863 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 83864 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 83865 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 83866 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 83867 | 361, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83868 | 361, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83869 | 361, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83870 | 361, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83871 | 361, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83872 | 361, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83873 | 361, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83874 | 361, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83875 | 361, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83876 | 361, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83877 | 361, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83878 | 361, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83879 | 361, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83880 | 361, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83881 | 361, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83882 | 361, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83883 | 361, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83884 | 361, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83885 | 0, // psub1_then_psub |
| 83886 | 361, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83887 | 361, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83888 | 361, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83889 | 0, // x8sub_7_then_sub_32 |
| 83890 | 0, // x8sub_7_then_sub_32_hi |
| 83891 | 0, // x8sub_6_then_sub_32 |
| 83892 | 0, // x8sub_6_then_sub_32_hi |
| 83893 | 0, // x8sub_5_then_sub_32 |
| 83894 | 0, // x8sub_5_then_sub_32_hi |
| 83895 | 0, // x8sub_4_then_sub_32 |
| 83896 | 0, // x8sub_4_then_sub_32_hi |
| 83897 | 0, // x8sub_3_then_sub_32 |
| 83898 | 0, // x8sub_3_then_sub_32_hi |
| 83899 | 0, // x8sub_2_then_sub_32 |
| 83900 | 0, // x8sub_2_then_sub_32_hi |
| 83901 | 0, // x8sub_1_then_sub_32 |
| 83902 | 0, // x8sub_1_then_sub_32_hi |
| 83903 | 0, // subo64_then_sub_32 |
| 83904 | 0, // subo64_then_sub_32_hi |
| 83905 | 361, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83906 | 361, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83907 | 361, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83908 | 0, // dsub0_dsub1 |
| 83909 | 0, // dsub0_dsub1_dsub2 |
| 83910 | 361, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83911 | 361, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83912 | 361, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83913 | 361, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83914 | 361, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83915 | 361, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83916 | 0, // qsub0_qsub1 |
| 83917 | 0, // qsub0_qsub1_qsub2 |
| 83918 | 361, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83919 | 361, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83920 | 361, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83921 | 0, // sub_32_x8sub_1_then_sub_32 |
| 83922 | 0, // x8sub_0_x8sub_1 |
| 83923 | 0, // x8sub_2_x8sub_3 |
| 83924 | 0, // x8sub_4_x8sub_5 |
| 83925 | 0, // x8sub_6_x8sub_7 |
| 83926 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 83927 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 83928 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 83929 | 0, // sub_32_subo64_then_sub_32 |
| 83930 | 361, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83931 | 361, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83932 | 361, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83933 | 361, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83934 | 361, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83935 | 361, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83936 | 361, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83937 | 361, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 83938 | 0, // zsub0_zsub2 |
| 83939 | 0, // zsub1_zsub3 |
| 83940 | }, |
| 83941 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83942 | 362, // bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83943 | 362, // bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83944 | 362, // dsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83945 | 0, // dsub0 |
| 83946 | 362, // dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83947 | 362, // dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83948 | 362, // dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83949 | 362, // dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83950 | 362, // hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83951 | 362, // hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83952 | 0, // psub |
| 83953 | 0, // psub0 |
| 83954 | 0, // psub1 |
| 83955 | 362, // qsub0 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83956 | 362, // qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83957 | 362, // qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83958 | 362, // qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83959 | 362, // ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83960 | 362, // ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 83961 | 0, // sub_32 |
| 83962 | 0, // sub_32_hi |
| 83963 | 0, // sube32 |
| 83964 | 0, // sube64 |
| 83965 | 0, // subo32 |
| 83966 | 0, // subo64 |
| 83967 | 0, // x8sub_0 |
| 83968 | 0, // x8sub_1 |
| 83969 | 0, // x8sub_2 |
| 83970 | 0, // x8sub_3 |
| 83971 | 0, // x8sub_4 |
| 83972 | 0, // x8sub_5 |
| 83973 | 0, // x8sub_6 |
| 83974 | 0, // x8sub_7 |
| 83975 | 0, // zasubb |
| 83976 | 0, // zasubd0 |
| 83977 | 0, // zasubd1 |
| 83978 | 0, // zasubh0 |
| 83979 | 0, // zasubh1 |
| 83980 | 0, // zasubq0 |
| 83981 | 0, // zasubq1 |
| 83982 | 0, // zasubs0 |
| 83983 | 0, // zasubs1 |
| 83984 | 0, // zsub |
| 83985 | 0, // zsub0 |
| 83986 | 0, // zsub1 |
| 83987 | 0, // zsub2 |
| 83988 | 0, // zsub3 |
| 83989 | 0, // zsub_hi |
| 83990 | 0, // zasubd1_then_zasubq0 |
| 83991 | 0, // zasubd1_then_zasubq1 |
| 83992 | 0, // zasubs1_then_zasubd0 |
| 83993 | 0, // zasubs1_then_zasubd1 |
| 83994 | 0, // zasubs1_then_zasubq0 |
| 83995 | 0, // zasubs1_then_zasubq1 |
| 83996 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 83997 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 83998 | 0, // zasubh1_then_zasubd0 |
| 83999 | 0, // zasubh1_then_zasubd1 |
| 84000 | 0, // zasubh1_then_zasubq0 |
| 84001 | 0, // zasubh1_then_zasubq1 |
| 84002 | 0, // zasubh1_then_zasubs0 |
| 84003 | 0, // zasubh1_then_zasubs1 |
| 84004 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84005 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84006 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84007 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84008 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84009 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84010 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84011 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84012 | 362, // dsub1_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84013 | 362, // dsub1_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84014 | 362, // dsub1_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84015 | 362, // dsub1_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84016 | 362, // dsub1_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84017 | 362, // dsub1_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84018 | 362, // dsub3_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84019 | 362, // dsub3_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84020 | 362, // dsub3_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84021 | 362, // dsub3_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84022 | 362, // dsub3_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84023 | 362, // dsub3_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84024 | 362, // dsub2_then_bsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84025 | 362, // dsub2_then_bsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84026 | 362, // dsub2_then_hsub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84027 | 362, // dsub2_then_hsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84028 | 362, // dsub2_then_ssub -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84029 | 362, // dsub2_then_ssub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84030 | 0, // psub1_then_psub |
| 84031 | 362, // qsub1_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84032 | 362, // qsub3_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84033 | 362, // qsub2_then_dsub_hi -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84034 | 0, // x8sub_7_then_sub_32 |
| 84035 | 0, // x8sub_7_then_sub_32_hi |
| 84036 | 0, // x8sub_6_then_sub_32 |
| 84037 | 0, // x8sub_6_then_sub_32_hi |
| 84038 | 0, // x8sub_5_then_sub_32 |
| 84039 | 0, // x8sub_5_then_sub_32_hi |
| 84040 | 0, // x8sub_4_then_sub_32 |
| 84041 | 0, // x8sub_4_then_sub_32_hi |
| 84042 | 0, // x8sub_3_then_sub_32 |
| 84043 | 0, // x8sub_3_then_sub_32_hi |
| 84044 | 0, // x8sub_2_then_sub_32 |
| 84045 | 0, // x8sub_2_then_sub_32_hi |
| 84046 | 0, // x8sub_1_then_sub_32 |
| 84047 | 0, // x8sub_1_then_sub_32_hi |
| 84048 | 0, // subo64_then_sub_32 |
| 84049 | 0, // subo64_then_sub_32_hi |
| 84050 | 0, // zsub1_then_zsub_hi |
| 84051 | 0, // zsub3_then_zsub_hi |
| 84052 | 0, // zsub2_then_zsub_hi |
| 84053 | 0, // dsub0_dsub1 |
| 84054 | 0, // dsub0_dsub1_dsub2 |
| 84055 | 362, // dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84056 | 362, // dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84057 | 362, // dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84058 | 362, // dsub_dsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84059 | 362, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84060 | 362, // dsub_dsub1_dsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84061 | 362, // qsub0_qsub1 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84062 | 362, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84063 | 362, // qsub1_qsub2 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84064 | 362, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84065 | 362, // qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 84066 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84067 | 0, // x8sub_0_x8sub_1 |
| 84068 | 0, // x8sub_2_x8sub_3 |
| 84069 | 0, // x8sub_4_x8sub_5 |
| 84070 | 0, // x8sub_6_x8sub_7 |
| 84071 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84072 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84073 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84074 | 0, // sub_32_subo64_then_sub_32 |
| 84075 | 0, // zsub_qsub1 |
| 84076 | 0, // zsub_qsub1_qsub2_qsub3 |
| 84077 | 0, // zsub_qsub1_qsub2 |
| 84078 | 0, // zsub0_zsub1 |
| 84079 | 0, // zsub0_zsub1_zsub2 |
| 84080 | 0, // zsub1_zsub2 |
| 84081 | 0, // zsub1_zsub2_zsub3 |
| 84082 | 0, // zsub2_zsub3 |
| 84083 | 0, // zsub0_zsub2 |
| 84084 | 0, // zsub1_zsub3 |
| 84085 | }, |
| 84086 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84087 | 363, // bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84088 | 363, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84089 | 363, // dsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84090 | 0, // dsub0 |
| 84091 | 363, // dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84092 | 363, // dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84093 | 363, // dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84094 | 363, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84095 | 363, // hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84096 | 363, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84097 | 0, // psub |
| 84098 | 0, // psub0 |
| 84099 | 0, // psub1 |
| 84100 | 363, // qsub0 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84101 | 363, // qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84102 | 363, // qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84103 | 363, // qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84104 | 363, // ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84105 | 363, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84106 | 0, // sub_32 |
| 84107 | 0, // sub_32_hi |
| 84108 | 0, // sube32 |
| 84109 | 0, // sube64 |
| 84110 | 0, // subo32 |
| 84111 | 0, // subo64 |
| 84112 | 0, // x8sub_0 |
| 84113 | 0, // x8sub_1 |
| 84114 | 0, // x8sub_2 |
| 84115 | 0, // x8sub_3 |
| 84116 | 0, // x8sub_4 |
| 84117 | 0, // x8sub_5 |
| 84118 | 0, // x8sub_6 |
| 84119 | 0, // x8sub_7 |
| 84120 | 0, // zasubb |
| 84121 | 0, // zasubd0 |
| 84122 | 0, // zasubd1 |
| 84123 | 0, // zasubh0 |
| 84124 | 0, // zasubh1 |
| 84125 | 0, // zasubq0 |
| 84126 | 0, // zasubq1 |
| 84127 | 0, // zasubs0 |
| 84128 | 0, // zasubs1 |
| 84129 | 0, // zsub |
| 84130 | 0, // zsub0 |
| 84131 | 0, // zsub1 |
| 84132 | 0, // zsub2 |
| 84133 | 0, // zsub3 |
| 84134 | 0, // zsub_hi |
| 84135 | 0, // zasubd1_then_zasubq0 |
| 84136 | 0, // zasubd1_then_zasubq1 |
| 84137 | 0, // zasubs1_then_zasubd0 |
| 84138 | 0, // zasubs1_then_zasubd1 |
| 84139 | 0, // zasubs1_then_zasubq0 |
| 84140 | 0, // zasubs1_then_zasubq1 |
| 84141 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84142 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84143 | 0, // zasubh1_then_zasubd0 |
| 84144 | 0, // zasubh1_then_zasubd1 |
| 84145 | 0, // zasubh1_then_zasubq0 |
| 84146 | 0, // zasubh1_then_zasubq1 |
| 84147 | 0, // zasubh1_then_zasubs0 |
| 84148 | 0, // zasubh1_then_zasubs1 |
| 84149 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84150 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84151 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84152 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84153 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84154 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84155 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84156 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84157 | 363, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84158 | 363, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84159 | 363, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84160 | 363, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84161 | 363, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84162 | 363, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84163 | 363, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84164 | 363, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84165 | 363, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84166 | 363, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84167 | 363, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84168 | 363, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84169 | 363, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84170 | 363, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84171 | 363, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84172 | 363, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84173 | 363, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84174 | 363, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84175 | 0, // psub1_then_psub |
| 84176 | 363, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84177 | 363, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84178 | 363, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84179 | 0, // x8sub_7_then_sub_32 |
| 84180 | 0, // x8sub_7_then_sub_32_hi |
| 84181 | 0, // x8sub_6_then_sub_32 |
| 84182 | 0, // x8sub_6_then_sub_32_hi |
| 84183 | 0, // x8sub_5_then_sub_32 |
| 84184 | 0, // x8sub_5_then_sub_32_hi |
| 84185 | 0, // x8sub_4_then_sub_32 |
| 84186 | 0, // x8sub_4_then_sub_32_hi |
| 84187 | 0, // x8sub_3_then_sub_32 |
| 84188 | 0, // x8sub_3_then_sub_32_hi |
| 84189 | 0, // x8sub_2_then_sub_32 |
| 84190 | 0, // x8sub_2_then_sub_32_hi |
| 84191 | 0, // x8sub_1_then_sub_32 |
| 84192 | 0, // x8sub_1_then_sub_32_hi |
| 84193 | 0, // subo64_then_sub_32 |
| 84194 | 0, // subo64_then_sub_32_hi |
| 84195 | 0, // zsub1_then_zsub_hi |
| 84196 | 0, // zsub3_then_zsub_hi |
| 84197 | 0, // zsub2_then_zsub_hi |
| 84198 | 0, // dsub0_dsub1 |
| 84199 | 0, // dsub0_dsub1_dsub2 |
| 84200 | 363, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84201 | 363, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84202 | 363, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84203 | 363, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84204 | 363, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84205 | 363, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84206 | 363, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84207 | 363, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84208 | 363, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84209 | 363, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84210 | 363, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 84211 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84212 | 0, // x8sub_0_x8sub_1 |
| 84213 | 0, // x8sub_2_x8sub_3 |
| 84214 | 0, // x8sub_4_x8sub_5 |
| 84215 | 0, // x8sub_6_x8sub_7 |
| 84216 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84217 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84218 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84219 | 0, // sub_32_subo64_then_sub_32 |
| 84220 | 0, // zsub_qsub1 |
| 84221 | 0, // zsub_qsub1_qsub2_qsub3 |
| 84222 | 0, // zsub_qsub1_qsub2 |
| 84223 | 0, // zsub0_zsub1 |
| 84224 | 0, // zsub0_zsub1_zsub2 |
| 84225 | 0, // zsub1_zsub2 |
| 84226 | 0, // zsub1_zsub2_zsub3 |
| 84227 | 0, // zsub2_zsub3 |
| 84228 | 0, // zsub0_zsub2 |
| 84229 | 0, // zsub1_zsub3 |
| 84230 | }, |
| 84231 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84232 | 364, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84233 | 364, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84234 | 364, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84235 | 0, // dsub0 |
| 84236 | 364, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84237 | 364, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84238 | 364, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84239 | 364, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84240 | 364, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84241 | 364, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84242 | 0, // psub |
| 84243 | 0, // psub0 |
| 84244 | 0, // psub1 |
| 84245 | 0, // qsub0 |
| 84246 | 364, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84247 | 364, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84248 | 364, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84249 | 364, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84250 | 364, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84251 | 0, // sub_32 |
| 84252 | 0, // sub_32_hi |
| 84253 | 0, // sube32 |
| 84254 | 0, // sube64 |
| 84255 | 0, // subo32 |
| 84256 | 0, // subo64 |
| 84257 | 0, // x8sub_0 |
| 84258 | 0, // x8sub_1 |
| 84259 | 0, // x8sub_2 |
| 84260 | 0, // x8sub_3 |
| 84261 | 0, // x8sub_4 |
| 84262 | 0, // x8sub_5 |
| 84263 | 0, // x8sub_6 |
| 84264 | 0, // x8sub_7 |
| 84265 | 0, // zasubb |
| 84266 | 0, // zasubd0 |
| 84267 | 0, // zasubd1 |
| 84268 | 0, // zasubh0 |
| 84269 | 0, // zasubh1 |
| 84270 | 0, // zasubq0 |
| 84271 | 0, // zasubq1 |
| 84272 | 0, // zasubs0 |
| 84273 | 0, // zasubs1 |
| 84274 | 364, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84275 | 364, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84276 | 364, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84277 | 364, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84278 | 364, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84279 | 364, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84280 | 0, // zasubd1_then_zasubq0 |
| 84281 | 0, // zasubd1_then_zasubq1 |
| 84282 | 0, // zasubs1_then_zasubd0 |
| 84283 | 0, // zasubs1_then_zasubd1 |
| 84284 | 0, // zasubs1_then_zasubq0 |
| 84285 | 0, // zasubs1_then_zasubq1 |
| 84286 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84287 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84288 | 0, // zasubh1_then_zasubd0 |
| 84289 | 0, // zasubh1_then_zasubd1 |
| 84290 | 0, // zasubh1_then_zasubq0 |
| 84291 | 0, // zasubh1_then_zasubq1 |
| 84292 | 0, // zasubh1_then_zasubs0 |
| 84293 | 0, // zasubh1_then_zasubs1 |
| 84294 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84295 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84296 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84297 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84298 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84299 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84300 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84301 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84302 | 364, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84303 | 364, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84304 | 364, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84305 | 364, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84306 | 364, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84307 | 364, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84308 | 364, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84309 | 364, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84310 | 364, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84311 | 364, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84312 | 364, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84313 | 364, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84314 | 364, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84315 | 364, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84316 | 364, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84317 | 364, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84318 | 364, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84319 | 364, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84320 | 0, // psub1_then_psub |
| 84321 | 364, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84322 | 364, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84323 | 364, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84324 | 0, // x8sub_7_then_sub_32 |
| 84325 | 0, // x8sub_7_then_sub_32_hi |
| 84326 | 0, // x8sub_6_then_sub_32 |
| 84327 | 0, // x8sub_6_then_sub_32_hi |
| 84328 | 0, // x8sub_5_then_sub_32 |
| 84329 | 0, // x8sub_5_then_sub_32_hi |
| 84330 | 0, // x8sub_4_then_sub_32 |
| 84331 | 0, // x8sub_4_then_sub_32_hi |
| 84332 | 0, // x8sub_3_then_sub_32 |
| 84333 | 0, // x8sub_3_then_sub_32_hi |
| 84334 | 0, // x8sub_2_then_sub_32 |
| 84335 | 0, // x8sub_2_then_sub_32_hi |
| 84336 | 0, // x8sub_1_then_sub_32 |
| 84337 | 0, // x8sub_1_then_sub_32_hi |
| 84338 | 0, // subo64_then_sub_32 |
| 84339 | 0, // subo64_then_sub_32_hi |
| 84340 | 364, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84341 | 364, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84342 | 364, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 84343 | 0, // dsub0_dsub1 |
| 84344 | 0, // dsub0_dsub1_dsub2 |
| 84345 | 385, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84346 | 385, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84347 | 385, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84348 | 385, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84349 | 385, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84350 | 385, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84351 | 0, // qsub0_qsub1 |
| 84352 | 0, // qsub0_qsub1_qsub2 |
| 84353 | 385, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84354 | 385, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84355 | 385, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84356 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84357 | 0, // x8sub_0_x8sub_1 |
| 84358 | 0, // x8sub_2_x8sub_3 |
| 84359 | 0, // x8sub_4_x8sub_5 |
| 84360 | 0, // x8sub_6_x8sub_7 |
| 84361 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84362 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84363 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84364 | 0, // sub_32_subo64_then_sub_32 |
| 84365 | 385, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84366 | 385, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84367 | 385, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84368 | 385, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84369 | 385, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84370 | 385, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84371 | 385, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84372 | 385, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84373 | 424, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 84374 | 424, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 84375 | }, |
| 84376 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84377 | 365, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84378 | 365, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84379 | 365, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84380 | 0, // dsub0 |
| 84381 | 365, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84382 | 365, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84383 | 365, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84384 | 365, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84385 | 365, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84386 | 365, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84387 | 0, // psub |
| 84388 | 0, // psub0 |
| 84389 | 0, // psub1 |
| 84390 | 0, // qsub0 |
| 84391 | 365, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84392 | 365, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84393 | 365, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84394 | 365, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84395 | 365, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84396 | 0, // sub_32 |
| 84397 | 0, // sub_32_hi |
| 84398 | 0, // sube32 |
| 84399 | 0, // sube64 |
| 84400 | 0, // subo32 |
| 84401 | 0, // subo64 |
| 84402 | 0, // x8sub_0 |
| 84403 | 0, // x8sub_1 |
| 84404 | 0, // x8sub_2 |
| 84405 | 0, // x8sub_3 |
| 84406 | 0, // x8sub_4 |
| 84407 | 0, // x8sub_5 |
| 84408 | 0, // x8sub_6 |
| 84409 | 0, // x8sub_7 |
| 84410 | 0, // zasubb |
| 84411 | 0, // zasubd0 |
| 84412 | 0, // zasubd1 |
| 84413 | 0, // zasubh0 |
| 84414 | 0, // zasubh1 |
| 84415 | 0, // zasubq0 |
| 84416 | 0, // zasubq1 |
| 84417 | 0, // zasubs0 |
| 84418 | 0, // zasubs1 |
| 84419 | 365, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84420 | 365, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84421 | 365, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84422 | 365, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84423 | 365, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84424 | 365, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84425 | 0, // zasubd1_then_zasubq0 |
| 84426 | 0, // zasubd1_then_zasubq1 |
| 84427 | 0, // zasubs1_then_zasubd0 |
| 84428 | 0, // zasubs1_then_zasubd1 |
| 84429 | 0, // zasubs1_then_zasubq0 |
| 84430 | 0, // zasubs1_then_zasubq1 |
| 84431 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84432 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84433 | 0, // zasubh1_then_zasubd0 |
| 84434 | 0, // zasubh1_then_zasubd1 |
| 84435 | 0, // zasubh1_then_zasubq0 |
| 84436 | 0, // zasubh1_then_zasubq1 |
| 84437 | 0, // zasubh1_then_zasubs0 |
| 84438 | 0, // zasubh1_then_zasubs1 |
| 84439 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84440 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84441 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84442 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84443 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84444 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84445 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84446 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84447 | 365, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84448 | 365, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84449 | 365, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84450 | 365, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84451 | 365, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84452 | 365, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84453 | 365, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84454 | 365, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84455 | 365, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84456 | 365, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84457 | 365, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84458 | 365, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84459 | 365, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84460 | 365, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84461 | 365, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84462 | 365, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84463 | 365, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84464 | 365, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84465 | 0, // psub1_then_psub |
| 84466 | 365, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84467 | 365, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84468 | 365, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84469 | 0, // x8sub_7_then_sub_32 |
| 84470 | 0, // x8sub_7_then_sub_32_hi |
| 84471 | 0, // x8sub_6_then_sub_32 |
| 84472 | 0, // x8sub_6_then_sub_32_hi |
| 84473 | 0, // x8sub_5_then_sub_32 |
| 84474 | 0, // x8sub_5_then_sub_32_hi |
| 84475 | 0, // x8sub_4_then_sub_32 |
| 84476 | 0, // x8sub_4_then_sub_32_hi |
| 84477 | 0, // x8sub_3_then_sub_32 |
| 84478 | 0, // x8sub_3_then_sub_32_hi |
| 84479 | 0, // x8sub_2_then_sub_32 |
| 84480 | 0, // x8sub_2_then_sub_32_hi |
| 84481 | 0, // x8sub_1_then_sub_32 |
| 84482 | 0, // x8sub_1_then_sub_32_hi |
| 84483 | 0, // subo64_then_sub_32 |
| 84484 | 0, // subo64_then_sub_32_hi |
| 84485 | 365, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84486 | 365, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84487 | 365, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 84488 | 0, // dsub0_dsub1 |
| 84489 | 0, // dsub0_dsub1_dsub2 |
| 84490 | 386, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84491 | 386, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84492 | 386, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84493 | 386, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84494 | 386, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84495 | 386, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84496 | 0, // qsub0_qsub1 |
| 84497 | 0, // qsub0_qsub1_qsub2 |
| 84498 | 386, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84499 | 386, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84500 | 386, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84501 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84502 | 0, // x8sub_0_x8sub_1 |
| 84503 | 0, // x8sub_2_x8sub_3 |
| 84504 | 0, // x8sub_4_x8sub_5 |
| 84505 | 0, // x8sub_6_x8sub_7 |
| 84506 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84507 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84508 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84509 | 0, // sub_32_subo64_then_sub_32 |
| 84510 | 386, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84511 | 386, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84512 | 386, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84513 | 386, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84514 | 386, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84515 | 386, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84516 | 386, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84517 | 386, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 84518 | 425, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 84519 | 425, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 84520 | }, |
| 84521 | { // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84522 | 366, // bsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84523 | 366, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84524 | 366, // dsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84525 | 0, // dsub0 |
| 84526 | 366, // dsub1 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84527 | 366, // dsub2 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84528 | 366, // dsub3 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84529 | 366, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84530 | 366, // hsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84531 | 366, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84532 | 0, // psub |
| 84533 | 0, // psub0 |
| 84534 | 0, // psub1 |
| 84535 | 0, // qsub0 |
| 84536 | 366, // qsub1 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84537 | 366, // qsub2 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84538 | 366, // qsub3 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84539 | 366, // ssub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84540 | 366, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84541 | 0, // sub_32 |
| 84542 | 0, // sub_32_hi |
| 84543 | 0, // sube32 |
| 84544 | 0, // sube64 |
| 84545 | 0, // subo32 |
| 84546 | 0, // subo64 |
| 84547 | 0, // x8sub_0 |
| 84548 | 0, // x8sub_1 |
| 84549 | 0, // x8sub_2 |
| 84550 | 0, // x8sub_3 |
| 84551 | 0, // x8sub_4 |
| 84552 | 0, // x8sub_5 |
| 84553 | 0, // x8sub_6 |
| 84554 | 0, // x8sub_7 |
| 84555 | 0, // zasubb |
| 84556 | 0, // zasubd0 |
| 84557 | 0, // zasubd1 |
| 84558 | 0, // zasubh0 |
| 84559 | 0, // zasubh1 |
| 84560 | 0, // zasubq0 |
| 84561 | 0, // zasubq1 |
| 84562 | 0, // zasubs0 |
| 84563 | 0, // zasubs1 |
| 84564 | 366, // zsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84565 | 366, // zsub0 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84566 | 366, // zsub1 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84567 | 366, // zsub2 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84568 | 366, // zsub3 -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84569 | 366, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84570 | 0, // zasubd1_then_zasubq0 |
| 84571 | 0, // zasubd1_then_zasubq1 |
| 84572 | 0, // zasubs1_then_zasubd0 |
| 84573 | 0, // zasubs1_then_zasubd1 |
| 84574 | 0, // zasubs1_then_zasubq0 |
| 84575 | 0, // zasubs1_then_zasubq1 |
| 84576 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84577 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84578 | 0, // zasubh1_then_zasubd0 |
| 84579 | 0, // zasubh1_then_zasubd1 |
| 84580 | 0, // zasubh1_then_zasubq0 |
| 84581 | 0, // zasubh1_then_zasubq1 |
| 84582 | 0, // zasubh1_then_zasubs0 |
| 84583 | 0, // zasubh1_then_zasubs1 |
| 84584 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84585 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84586 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84587 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84588 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84589 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84590 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84591 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84592 | 366, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84593 | 366, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84594 | 366, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84595 | 366, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84596 | 366, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84597 | 366, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84598 | 366, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84599 | 366, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84600 | 366, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84601 | 366, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84602 | 366, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84603 | 366, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84604 | 366, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84605 | 366, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84606 | 366, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84607 | 366, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84608 | 366, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84609 | 366, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84610 | 0, // psub1_then_psub |
| 84611 | 366, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84612 | 366, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84613 | 366, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84614 | 0, // x8sub_7_then_sub_32 |
| 84615 | 0, // x8sub_7_then_sub_32_hi |
| 84616 | 0, // x8sub_6_then_sub_32 |
| 84617 | 0, // x8sub_6_then_sub_32_hi |
| 84618 | 0, // x8sub_5_then_sub_32 |
| 84619 | 0, // x8sub_5_then_sub_32_hi |
| 84620 | 0, // x8sub_4_then_sub_32 |
| 84621 | 0, // x8sub_4_then_sub_32_hi |
| 84622 | 0, // x8sub_3_then_sub_32 |
| 84623 | 0, // x8sub_3_then_sub_32_hi |
| 84624 | 0, // x8sub_2_then_sub_32 |
| 84625 | 0, // x8sub_2_then_sub_32_hi |
| 84626 | 0, // x8sub_1_then_sub_32 |
| 84627 | 0, // x8sub_1_then_sub_32_hi |
| 84628 | 0, // subo64_then_sub_32 |
| 84629 | 0, // subo64_then_sub_32_hi |
| 84630 | 366, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84631 | 366, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84632 | 366, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 84633 | 0, // dsub0_dsub1 |
| 84634 | 0, // dsub0_dsub1_dsub2 |
| 84635 | 422, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84636 | 422, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84637 | 422, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84638 | 422, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84639 | 422, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84640 | 422, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84641 | 0, // qsub0_qsub1 |
| 84642 | 0, // qsub0_qsub1_qsub2 |
| 84643 | 422, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84644 | 422, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84645 | 422, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84646 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84647 | 0, // x8sub_0_x8sub_1 |
| 84648 | 0, // x8sub_2_x8sub_3 |
| 84649 | 0, // x8sub_4_x8sub_5 |
| 84650 | 0, // x8sub_6_x8sub_7 |
| 84651 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84652 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84653 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84654 | 0, // sub_32_subo64_then_sub_32 |
| 84655 | 422, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84656 | 422, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84657 | 422, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84658 | 422, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84659 | 422, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84660 | 422, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84661 | 422, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84662 | 422, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 84663 | 382, // zsub0_zsub2 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 84664 | 382, // zsub1_zsub3 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 84665 | }, |
| 84666 | { // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84667 | 367, // bsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84668 | 367, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84669 | 367, // dsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84670 | 0, // dsub0 |
| 84671 | 367, // dsub1 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84672 | 367, // dsub2 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84673 | 367, // dsub3 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84674 | 367, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84675 | 367, // hsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84676 | 367, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84677 | 0, // psub |
| 84678 | 0, // psub0 |
| 84679 | 0, // psub1 |
| 84680 | 0, // qsub0 |
| 84681 | 367, // qsub1 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84682 | 367, // qsub2 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84683 | 367, // qsub3 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84684 | 367, // ssub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84685 | 367, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84686 | 0, // sub_32 |
| 84687 | 0, // sub_32_hi |
| 84688 | 0, // sube32 |
| 84689 | 0, // sube64 |
| 84690 | 0, // subo32 |
| 84691 | 0, // subo64 |
| 84692 | 0, // x8sub_0 |
| 84693 | 0, // x8sub_1 |
| 84694 | 0, // x8sub_2 |
| 84695 | 0, // x8sub_3 |
| 84696 | 0, // x8sub_4 |
| 84697 | 0, // x8sub_5 |
| 84698 | 0, // x8sub_6 |
| 84699 | 0, // x8sub_7 |
| 84700 | 0, // zasubb |
| 84701 | 0, // zasubd0 |
| 84702 | 0, // zasubd1 |
| 84703 | 0, // zasubh0 |
| 84704 | 0, // zasubh1 |
| 84705 | 0, // zasubq0 |
| 84706 | 0, // zasubq1 |
| 84707 | 0, // zasubs0 |
| 84708 | 0, // zasubs1 |
| 84709 | 367, // zsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84710 | 367, // zsub0 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84711 | 367, // zsub1 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84712 | 367, // zsub2 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84713 | 367, // zsub3 -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84714 | 367, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84715 | 0, // zasubd1_then_zasubq0 |
| 84716 | 0, // zasubd1_then_zasubq1 |
| 84717 | 0, // zasubs1_then_zasubd0 |
| 84718 | 0, // zasubs1_then_zasubd1 |
| 84719 | 0, // zasubs1_then_zasubq0 |
| 84720 | 0, // zasubs1_then_zasubq1 |
| 84721 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84722 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84723 | 0, // zasubh1_then_zasubd0 |
| 84724 | 0, // zasubh1_then_zasubd1 |
| 84725 | 0, // zasubh1_then_zasubq0 |
| 84726 | 0, // zasubh1_then_zasubq1 |
| 84727 | 0, // zasubh1_then_zasubs0 |
| 84728 | 0, // zasubh1_then_zasubs1 |
| 84729 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84730 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84731 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84732 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84733 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84734 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84735 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84736 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84737 | 367, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84738 | 367, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84739 | 367, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84740 | 367, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84741 | 367, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84742 | 367, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84743 | 367, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84744 | 367, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84745 | 367, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84746 | 367, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84747 | 367, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84748 | 367, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84749 | 367, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84750 | 367, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84751 | 367, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84752 | 367, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84753 | 367, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84754 | 367, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84755 | 0, // psub1_then_psub |
| 84756 | 367, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84757 | 367, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84758 | 367, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84759 | 0, // x8sub_7_then_sub_32 |
| 84760 | 0, // x8sub_7_then_sub_32_hi |
| 84761 | 0, // x8sub_6_then_sub_32 |
| 84762 | 0, // x8sub_6_then_sub_32_hi |
| 84763 | 0, // x8sub_5_then_sub_32 |
| 84764 | 0, // x8sub_5_then_sub_32_hi |
| 84765 | 0, // x8sub_4_then_sub_32 |
| 84766 | 0, // x8sub_4_then_sub_32_hi |
| 84767 | 0, // x8sub_3_then_sub_32 |
| 84768 | 0, // x8sub_3_then_sub_32_hi |
| 84769 | 0, // x8sub_2_then_sub_32 |
| 84770 | 0, // x8sub_2_then_sub_32_hi |
| 84771 | 0, // x8sub_1_then_sub_32 |
| 84772 | 0, // x8sub_1_then_sub_32_hi |
| 84773 | 0, // subo64_then_sub_32 |
| 84774 | 0, // subo64_then_sub_32_hi |
| 84775 | 367, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84776 | 367, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84777 | 367, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 84778 | 0, // dsub0_dsub1 |
| 84779 | 0, // dsub0_dsub1_dsub2 |
| 84780 | 423, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84781 | 423, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84782 | 423, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84783 | 423, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84784 | 423, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84785 | 423, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84786 | 0, // qsub0_qsub1 |
| 84787 | 0, // qsub0_qsub1_qsub2 |
| 84788 | 423, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84789 | 423, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84790 | 423, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84791 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84792 | 0, // x8sub_0_x8sub_1 |
| 84793 | 0, // x8sub_2_x8sub_3 |
| 84794 | 0, // x8sub_4_x8sub_5 |
| 84795 | 0, // x8sub_6_x8sub_7 |
| 84796 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84797 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84798 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84799 | 0, // sub_32_subo64_then_sub_32 |
| 84800 | 423, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84801 | 423, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84802 | 423, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84803 | 423, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84804 | 423, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84805 | 423, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84806 | 423, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84807 | 423, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 84808 | 380, // zsub0_zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 84809 | 380, // zsub1_zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 84810 | }, |
| 84811 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84812 | 368, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84813 | 368, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84814 | 368, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84815 | 0, // dsub0 |
| 84816 | 368, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84817 | 368, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84818 | 368, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84819 | 368, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84820 | 368, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84821 | 368, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84822 | 0, // psub |
| 84823 | 0, // psub0 |
| 84824 | 0, // psub1 |
| 84825 | 0, // qsub0 |
| 84826 | 368, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84827 | 368, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84828 | 368, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84829 | 368, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84830 | 368, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84831 | 0, // sub_32 |
| 84832 | 0, // sub_32_hi |
| 84833 | 0, // sube32 |
| 84834 | 0, // sube64 |
| 84835 | 0, // subo32 |
| 84836 | 0, // subo64 |
| 84837 | 0, // x8sub_0 |
| 84838 | 0, // x8sub_1 |
| 84839 | 0, // x8sub_2 |
| 84840 | 0, // x8sub_3 |
| 84841 | 0, // x8sub_4 |
| 84842 | 0, // x8sub_5 |
| 84843 | 0, // x8sub_6 |
| 84844 | 0, // x8sub_7 |
| 84845 | 0, // zasubb |
| 84846 | 0, // zasubd0 |
| 84847 | 0, // zasubd1 |
| 84848 | 0, // zasubh0 |
| 84849 | 0, // zasubh1 |
| 84850 | 0, // zasubq0 |
| 84851 | 0, // zasubq1 |
| 84852 | 0, // zasubs0 |
| 84853 | 0, // zasubs1 |
| 84854 | 368, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84855 | 368, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84856 | 368, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84857 | 368, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84858 | 368, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84859 | 368, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84860 | 0, // zasubd1_then_zasubq0 |
| 84861 | 0, // zasubd1_then_zasubq1 |
| 84862 | 0, // zasubs1_then_zasubd0 |
| 84863 | 0, // zasubs1_then_zasubd1 |
| 84864 | 0, // zasubs1_then_zasubq0 |
| 84865 | 0, // zasubs1_then_zasubq1 |
| 84866 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 84867 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 84868 | 0, // zasubh1_then_zasubd0 |
| 84869 | 0, // zasubh1_then_zasubd1 |
| 84870 | 0, // zasubh1_then_zasubq0 |
| 84871 | 0, // zasubh1_then_zasubq1 |
| 84872 | 0, // zasubh1_then_zasubs0 |
| 84873 | 0, // zasubh1_then_zasubs1 |
| 84874 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 84875 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 84876 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 84877 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 84878 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 84879 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 84880 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 84881 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 84882 | 368, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84883 | 368, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84884 | 368, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84885 | 368, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84886 | 368, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84887 | 368, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84888 | 368, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84889 | 368, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84890 | 368, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84891 | 368, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84892 | 368, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84893 | 368, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84894 | 368, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84895 | 368, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84896 | 368, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84897 | 368, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84898 | 368, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84899 | 368, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84900 | 0, // psub1_then_psub |
| 84901 | 368, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84902 | 368, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84903 | 368, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84904 | 0, // x8sub_7_then_sub_32 |
| 84905 | 0, // x8sub_7_then_sub_32_hi |
| 84906 | 0, // x8sub_6_then_sub_32 |
| 84907 | 0, // x8sub_6_then_sub_32_hi |
| 84908 | 0, // x8sub_5_then_sub_32 |
| 84909 | 0, // x8sub_5_then_sub_32_hi |
| 84910 | 0, // x8sub_4_then_sub_32 |
| 84911 | 0, // x8sub_4_then_sub_32_hi |
| 84912 | 0, // x8sub_3_then_sub_32 |
| 84913 | 0, // x8sub_3_then_sub_32_hi |
| 84914 | 0, // x8sub_2_then_sub_32 |
| 84915 | 0, // x8sub_2_then_sub_32_hi |
| 84916 | 0, // x8sub_1_then_sub_32 |
| 84917 | 0, // x8sub_1_then_sub_32_hi |
| 84918 | 0, // subo64_then_sub_32 |
| 84919 | 0, // subo64_then_sub_32_hi |
| 84920 | 368, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84921 | 368, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84922 | 368, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84923 | 0, // dsub0_dsub1 |
| 84924 | 0, // dsub0_dsub1_dsub2 |
| 84925 | 368, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84926 | 368, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84927 | 368, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84928 | 368, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84929 | 368, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84930 | 368, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84931 | 0, // qsub0_qsub1 |
| 84932 | 0, // qsub0_qsub1_qsub2 |
| 84933 | 368, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84934 | 368, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84935 | 368, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84936 | 0, // sub_32_x8sub_1_then_sub_32 |
| 84937 | 0, // x8sub_0_x8sub_1 |
| 84938 | 0, // x8sub_2_x8sub_3 |
| 84939 | 0, // x8sub_4_x8sub_5 |
| 84940 | 0, // x8sub_6_x8sub_7 |
| 84941 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 84942 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 84943 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 84944 | 0, // sub_32_subo64_then_sub_32 |
| 84945 | 368, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84946 | 368, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84947 | 368, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84948 | 368, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84949 | 368, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84950 | 368, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84951 | 368, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84952 | 368, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 84953 | 0, // zsub0_zsub2 |
| 84954 | 0, // zsub1_zsub3 |
| 84955 | }, |
| 84956 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84957 | 369, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84958 | 369, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84959 | 369, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84960 | 0, // dsub0 |
| 84961 | 369, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84962 | 369, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84963 | 369, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84964 | 369, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84965 | 369, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84966 | 369, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84967 | 0, // psub |
| 84968 | 0, // psub0 |
| 84969 | 0, // psub1 |
| 84970 | 0, // qsub0 |
| 84971 | 369, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84972 | 369, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84973 | 369, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84974 | 369, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84975 | 369, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 84976 | 0, // sub_32 |
| 84977 | 0, // sub_32_hi |
| 84978 | 0, // sube32 |
| 84979 | 0, // sube64 |
| 84980 | 0, // subo32 |
| 84981 | 0, // subo64 |
| 84982 | 0, // x8sub_0 |
| 84983 | 0, // x8sub_1 |
| 84984 | 0, // x8sub_2 |
| 84985 | 0, // x8sub_3 |
| 84986 | 0, // x8sub_4 |
| 84987 | 0, // x8sub_5 |
| 84988 | 0, // x8sub_6 |
| 84989 | 0, // x8sub_7 |
| 84990 | 0, // zasubb |
| 84991 | 0, // zasubd0 |
| 84992 | 0, // zasubd1 |
| 84993 | 0, // zasubh0 |
| 84994 | 0, // zasubh1 |
| 84995 | 0, // zasubq0 |
| 84996 | 0, // zasubq1 |
| 84997 | 0, // zasubs0 |
| 84998 | 0, // zasubs1 |
| 84999 | 369, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85000 | 369, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85001 | 369, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85002 | 369, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85003 | 369, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85004 | 369, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85005 | 0, // zasubd1_then_zasubq0 |
| 85006 | 0, // zasubd1_then_zasubq1 |
| 85007 | 0, // zasubs1_then_zasubd0 |
| 85008 | 0, // zasubs1_then_zasubd1 |
| 85009 | 0, // zasubs1_then_zasubq0 |
| 85010 | 0, // zasubs1_then_zasubq1 |
| 85011 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85012 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85013 | 0, // zasubh1_then_zasubd0 |
| 85014 | 0, // zasubh1_then_zasubd1 |
| 85015 | 0, // zasubh1_then_zasubq0 |
| 85016 | 0, // zasubh1_then_zasubq1 |
| 85017 | 0, // zasubh1_then_zasubs0 |
| 85018 | 0, // zasubh1_then_zasubs1 |
| 85019 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85020 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85021 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85022 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85023 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85024 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85025 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85026 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85027 | 369, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85028 | 369, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85029 | 369, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85030 | 369, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85031 | 369, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85032 | 369, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85033 | 369, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85034 | 369, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85035 | 369, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85036 | 369, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85037 | 369, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85038 | 369, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85039 | 369, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85040 | 369, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85041 | 369, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85042 | 369, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85043 | 369, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85044 | 369, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85045 | 0, // psub1_then_psub |
| 85046 | 369, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85047 | 369, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85048 | 369, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85049 | 0, // x8sub_7_then_sub_32 |
| 85050 | 0, // x8sub_7_then_sub_32_hi |
| 85051 | 0, // x8sub_6_then_sub_32 |
| 85052 | 0, // x8sub_6_then_sub_32_hi |
| 85053 | 0, // x8sub_5_then_sub_32 |
| 85054 | 0, // x8sub_5_then_sub_32_hi |
| 85055 | 0, // x8sub_4_then_sub_32 |
| 85056 | 0, // x8sub_4_then_sub_32_hi |
| 85057 | 0, // x8sub_3_then_sub_32 |
| 85058 | 0, // x8sub_3_then_sub_32_hi |
| 85059 | 0, // x8sub_2_then_sub_32 |
| 85060 | 0, // x8sub_2_then_sub_32_hi |
| 85061 | 0, // x8sub_1_then_sub_32 |
| 85062 | 0, // x8sub_1_then_sub_32_hi |
| 85063 | 0, // subo64_then_sub_32 |
| 85064 | 0, // subo64_then_sub_32_hi |
| 85065 | 369, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85066 | 369, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85067 | 369, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85068 | 0, // dsub0_dsub1 |
| 85069 | 0, // dsub0_dsub1_dsub2 |
| 85070 | 369, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85071 | 369, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85072 | 369, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85073 | 369, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85074 | 369, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85075 | 369, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85076 | 0, // qsub0_qsub1 |
| 85077 | 0, // qsub0_qsub1_qsub2 |
| 85078 | 369, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85079 | 369, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85080 | 369, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85081 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85082 | 0, // x8sub_0_x8sub_1 |
| 85083 | 0, // x8sub_2_x8sub_3 |
| 85084 | 0, // x8sub_4_x8sub_5 |
| 85085 | 0, // x8sub_6_x8sub_7 |
| 85086 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85087 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85088 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85089 | 0, // sub_32_subo64_then_sub_32 |
| 85090 | 369, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85091 | 369, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85092 | 369, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85093 | 369, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85094 | 369, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85095 | 369, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85096 | 369, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85097 | 369, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 85098 | 0, // zsub0_zsub2 |
| 85099 | 0, // zsub1_zsub3 |
| 85100 | }, |
| 85101 | { // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85102 | 370, // bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85103 | 370, // bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85104 | 370, // dsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85105 | 0, // dsub0 |
| 85106 | 370, // dsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85107 | 370, // dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85108 | 370, // dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85109 | 370, // dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85110 | 370, // hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85111 | 370, // hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85112 | 0, // psub |
| 85113 | 0, // psub0 |
| 85114 | 0, // psub1 |
| 85115 | 0, // qsub0 |
| 85116 | 370, // qsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85117 | 370, // qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85118 | 370, // qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85119 | 370, // ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85120 | 370, // ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85121 | 0, // sub_32 |
| 85122 | 0, // sub_32_hi |
| 85123 | 0, // sube32 |
| 85124 | 0, // sube64 |
| 85125 | 0, // subo32 |
| 85126 | 0, // subo64 |
| 85127 | 0, // x8sub_0 |
| 85128 | 0, // x8sub_1 |
| 85129 | 0, // x8sub_2 |
| 85130 | 0, // x8sub_3 |
| 85131 | 0, // x8sub_4 |
| 85132 | 0, // x8sub_5 |
| 85133 | 0, // x8sub_6 |
| 85134 | 0, // x8sub_7 |
| 85135 | 0, // zasubb |
| 85136 | 0, // zasubd0 |
| 85137 | 0, // zasubd1 |
| 85138 | 0, // zasubh0 |
| 85139 | 0, // zasubh1 |
| 85140 | 0, // zasubq0 |
| 85141 | 0, // zasubq1 |
| 85142 | 0, // zasubs0 |
| 85143 | 0, // zasubs1 |
| 85144 | 370, // zsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85145 | 370, // zsub0 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85146 | 370, // zsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85147 | 370, // zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85148 | 370, // zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85149 | 370, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85150 | 0, // zasubd1_then_zasubq0 |
| 85151 | 0, // zasubd1_then_zasubq1 |
| 85152 | 0, // zasubs1_then_zasubd0 |
| 85153 | 0, // zasubs1_then_zasubd1 |
| 85154 | 0, // zasubs1_then_zasubq0 |
| 85155 | 0, // zasubs1_then_zasubq1 |
| 85156 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85157 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85158 | 0, // zasubh1_then_zasubd0 |
| 85159 | 0, // zasubh1_then_zasubd1 |
| 85160 | 0, // zasubh1_then_zasubq0 |
| 85161 | 0, // zasubh1_then_zasubq1 |
| 85162 | 0, // zasubh1_then_zasubs0 |
| 85163 | 0, // zasubh1_then_zasubs1 |
| 85164 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85165 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85166 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85167 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85168 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85169 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85170 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85171 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85172 | 370, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85173 | 370, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85174 | 370, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85175 | 370, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85176 | 370, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85177 | 370, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85178 | 370, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85179 | 370, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85180 | 370, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85181 | 370, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85182 | 370, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85183 | 370, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85184 | 370, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85185 | 370, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85186 | 370, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85187 | 370, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85188 | 370, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85189 | 370, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85190 | 0, // psub1_then_psub |
| 85191 | 370, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85192 | 370, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85193 | 370, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85194 | 0, // x8sub_7_then_sub_32 |
| 85195 | 0, // x8sub_7_then_sub_32_hi |
| 85196 | 0, // x8sub_6_then_sub_32 |
| 85197 | 0, // x8sub_6_then_sub_32_hi |
| 85198 | 0, // x8sub_5_then_sub_32 |
| 85199 | 0, // x8sub_5_then_sub_32_hi |
| 85200 | 0, // x8sub_4_then_sub_32 |
| 85201 | 0, // x8sub_4_then_sub_32_hi |
| 85202 | 0, // x8sub_3_then_sub_32 |
| 85203 | 0, // x8sub_3_then_sub_32_hi |
| 85204 | 0, // x8sub_2_then_sub_32 |
| 85205 | 0, // x8sub_2_then_sub_32_hi |
| 85206 | 0, // x8sub_1_then_sub_32 |
| 85207 | 0, // x8sub_1_then_sub_32_hi |
| 85208 | 0, // subo64_then_sub_32 |
| 85209 | 0, // subo64_then_sub_32_hi |
| 85210 | 370, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85211 | 370, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85212 | 370, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85213 | 0, // dsub0_dsub1 |
| 85214 | 0, // dsub0_dsub1_dsub2 |
| 85215 | 370, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85216 | 370, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85217 | 370, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85218 | 370, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85219 | 370, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85220 | 370, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85221 | 0, // qsub0_qsub1 |
| 85222 | 0, // qsub0_qsub1_qsub2 |
| 85223 | 370, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85224 | 370, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85225 | 370, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85226 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85227 | 0, // x8sub_0_x8sub_1 |
| 85228 | 0, // x8sub_2_x8sub_3 |
| 85229 | 0, // x8sub_4_x8sub_5 |
| 85230 | 0, // x8sub_6_x8sub_7 |
| 85231 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85232 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85233 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85234 | 0, // sub_32_subo64_then_sub_32 |
| 85235 | 370, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85236 | 370, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85237 | 370, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85238 | 370, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85239 | 370, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85240 | 370, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85241 | 370, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85242 | 370, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 85243 | 0, // zsub0_zsub2 |
| 85244 | 0, // zsub1_zsub3 |
| 85245 | }, |
| 85246 | { // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85247 | 371, // bsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85248 | 371, // bsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85249 | 371, // dsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85250 | 0, // dsub0 |
| 85251 | 371, // dsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85252 | 371, // dsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85253 | 371, // dsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85254 | 371, // dsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85255 | 371, // hsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85256 | 371, // hsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85257 | 0, // psub |
| 85258 | 0, // psub0 |
| 85259 | 0, // psub1 |
| 85260 | 0, // qsub0 |
| 85261 | 371, // qsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85262 | 371, // qsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85263 | 371, // qsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85264 | 371, // ssub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85265 | 371, // ssub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85266 | 0, // sub_32 |
| 85267 | 0, // sub_32_hi |
| 85268 | 0, // sube32 |
| 85269 | 0, // sube64 |
| 85270 | 0, // subo32 |
| 85271 | 0, // subo64 |
| 85272 | 0, // x8sub_0 |
| 85273 | 0, // x8sub_1 |
| 85274 | 0, // x8sub_2 |
| 85275 | 0, // x8sub_3 |
| 85276 | 0, // x8sub_4 |
| 85277 | 0, // x8sub_5 |
| 85278 | 0, // x8sub_6 |
| 85279 | 0, // x8sub_7 |
| 85280 | 0, // zasubb |
| 85281 | 0, // zasubd0 |
| 85282 | 0, // zasubd1 |
| 85283 | 0, // zasubh0 |
| 85284 | 0, // zasubh1 |
| 85285 | 0, // zasubq0 |
| 85286 | 0, // zasubq1 |
| 85287 | 0, // zasubs0 |
| 85288 | 0, // zasubs1 |
| 85289 | 371, // zsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85290 | 371, // zsub0 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85291 | 371, // zsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85292 | 371, // zsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85293 | 371, // zsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85294 | 371, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85295 | 0, // zasubd1_then_zasubq0 |
| 85296 | 0, // zasubd1_then_zasubq1 |
| 85297 | 0, // zasubs1_then_zasubd0 |
| 85298 | 0, // zasubs1_then_zasubd1 |
| 85299 | 0, // zasubs1_then_zasubq0 |
| 85300 | 0, // zasubs1_then_zasubq1 |
| 85301 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85302 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85303 | 0, // zasubh1_then_zasubd0 |
| 85304 | 0, // zasubh1_then_zasubd1 |
| 85305 | 0, // zasubh1_then_zasubq0 |
| 85306 | 0, // zasubh1_then_zasubq1 |
| 85307 | 0, // zasubh1_then_zasubs0 |
| 85308 | 0, // zasubh1_then_zasubs1 |
| 85309 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85310 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85311 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85312 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85313 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85314 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85315 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85316 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85317 | 371, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85318 | 371, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85319 | 371, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85320 | 371, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85321 | 371, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85322 | 371, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85323 | 371, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85324 | 371, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85325 | 371, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85326 | 371, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85327 | 371, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85328 | 371, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85329 | 371, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85330 | 371, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85331 | 371, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85332 | 371, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85333 | 371, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85334 | 371, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85335 | 0, // psub1_then_psub |
| 85336 | 371, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85337 | 371, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85338 | 371, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85339 | 0, // x8sub_7_then_sub_32 |
| 85340 | 0, // x8sub_7_then_sub_32_hi |
| 85341 | 0, // x8sub_6_then_sub_32 |
| 85342 | 0, // x8sub_6_then_sub_32_hi |
| 85343 | 0, // x8sub_5_then_sub_32 |
| 85344 | 0, // x8sub_5_then_sub_32_hi |
| 85345 | 0, // x8sub_4_then_sub_32 |
| 85346 | 0, // x8sub_4_then_sub_32_hi |
| 85347 | 0, // x8sub_3_then_sub_32 |
| 85348 | 0, // x8sub_3_then_sub_32_hi |
| 85349 | 0, // x8sub_2_then_sub_32 |
| 85350 | 0, // x8sub_2_then_sub_32_hi |
| 85351 | 0, // x8sub_1_then_sub_32 |
| 85352 | 0, // x8sub_1_then_sub_32_hi |
| 85353 | 0, // subo64_then_sub_32 |
| 85354 | 0, // subo64_then_sub_32_hi |
| 85355 | 371, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85356 | 371, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85357 | 371, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85358 | 0, // dsub0_dsub1 |
| 85359 | 0, // dsub0_dsub1_dsub2 |
| 85360 | 371, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85361 | 371, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85362 | 371, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85363 | 371, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85364 | 371, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85365 | 371, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85366 | 0, // qsub0_qsub1 |
| 85367 | 0, // qsub0_qsub1_qsub2 |
| 85368 | 371, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85369 | 371, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85370 | 371, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85371 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85372 | 0, // x8sub_0_x8sub_1 |
| 85373 | 0, // x8sub_2_x8sub_3 |
| 85374 | 0, // x8sub_4_x8sub_5 |
| 85375 | 0, // x8sub_6_x8sub_7 |
| 85376 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85377 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85378 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85379 | 0, // sub_32_subo64_then_sub_32 |
| 85380 | 371, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85381 | 371, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85382 | 371, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85383 | 371, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85384 | 371, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85385 | 371, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85386 | 371, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85387 | 371, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 85388 | 0, // zsub0_zsub2 |
| 85389 | 0, // zsub1_zsub3 |
| 85390 | }, |
| 85391 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85392 | 372, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85393 | 372, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85394 | 372, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85395 | 0, // dsub0 |
| 85396 | 372, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85397 | 372, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85398 | 372, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85399 | 372, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85400 | 372, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85401 | 372, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85402 | 0, // psub |
| 85403 | 0, // psub0 |
| 85404 | 0, // psub1 |
| 85405 | 0, // qsub0 |
| 85406 | 372, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85407 | 372, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85408 | 372, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85409 | 372, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85410 | 372, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85411 | 0, // sub_32 |
| 85412 | 0, // sub_32_hi |
| 85413 | 0, // sube32 |
| 85414 | 0, // sube64 |
| 85415 | 0, // subo32 |
| 85416 | 0, // subo64 |
| 85417 | 0, // x8sub_0 |
| 85418 | 0, // x8sub_1 |
| 85419 | 0, // x8sub_2 |
| 85420 | 0, // x8sub_3 |
| 85421 | 0, // x8sub_4 |
| 85422 | 0, // x8sub_5 |
| 85423 | 0, // x8sub_6 |
| 85424 | 0, // x8sub_7 |
| 85425 | 0, // zasubb |
| 85426 | 0, // zasubd0 |
| 85427 | 0, // zasubd1 |
| 85428 | 0, // zasubh0 |
| 85429 | 0, // zasubh1 |
| 85430 | 0, // zasubq0 |
| 85431 | 0, // zasubq1 |
| 85432 | 0, // zasubs0 |
| 85433 | 0, // zasubs1 |
| 85434 | 372, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85435 | 372, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85436 | 372, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85437 | 372, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85438 | 372, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85439 | 372, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85440 | 0, // zasubd1_then_zasubq0 |
| 85441 | 0, // zasubd1_then_zasubq1 |
| 85442 | 0, // zasubs1_then_zasubd0 |
| 85443 | 0, // zasubs1_then_zasubd1 |
| 85444 | 0, // zasubs1_then_zasubq0 |
| 85445 | 0, // zasubs1_then_zasubq1 |
| 85446 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85447 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85448 | 0, // zasubh1_then_zasubd0 |
| 85449 | 0, // zasubh1_then_zasubd1 |
| 85450 | 0, // zasubh1_then_zasubq0 |
| 85451 | 0, // zasubh1_then_zasubq1 |
| 85452 | 0, // zasubh1_then_zasubs0 |
| 85453 | 0, // zasubh1_then_zasubs1 |
| 85454 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85455 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85456 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85457 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85458 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85459 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85460 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85461 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85462 | 372, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85463 | 372, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85464 | 372, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85465 | 372, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85466 | 372, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85467 | 372, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85468 | 372, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85469 | 372, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85470 | 372, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85471 | 372, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85472 | 372, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85473 | 372, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85474 | 372, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85475 | 372, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85476 | 372, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85477 | 372, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85478 | 372, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85479 | 372, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85480 | 0, // psub1_then_psub |
| 85481 | 372, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85482 | 372, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85483 | 372, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85484 | 0, // x8sub_7_then_sub_32 |
| 85485 | 0, // x8sub_7_then_sub_32_hi |
| 85486 | 0, // x8sub_6_then_sub_32 |
| 85487 | 0, // x8sub_6_then_sub_32_hi |
| 85488 | 0, // x8sub_5_then_sub_32 |
| 85489 | 0, // x8sub_5_then_sub_32_hi |
| 85490 | 0, // x8sub_4_then_sub_32 |
| 85491 | 0, // x8sub_4_then_sub_32_hi |
| 85492 | 0, // x8sub_3_then_sub_32 |
| 85493 | 0, // x8sub_3_then_sub_32_hi |
| 85494 | 0, // x8sub_2_then_sub_32 |
| 85495 | 0, // x8sub_2_then_sub_32_hi |
| 85496 | 0, // x8sub_1_then_sub_32 |
| 85497 | 0, // x8sub_1_then_sub_32_hi |
| 85498 | 0, // subo64_then_sub_32 |
| 85499 | 0, // subo64_then_sub_32_hi |
| 85500 | 372, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85501 | 372, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85502 | 372, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85503 | 0, // dsub0_dsub1 |
| 85504 | 0, // dsub0_dsub1_dsub2 |
| 85505 | 372, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85506 | 372, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85507 | 372, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85508 | 372, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85509 | 372, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85510 | 372, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85511 | 0, // qsub0_qsub1 |
| 85512 | 0, // qsub0_qsub1_qsub2 |
| 85513 | 372, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85514 | 372, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85515 | 372, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85516 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85517 | 0, // x8sub_0_x8sub_1 |
| 85518 | 0, // x8sub_2_x8sub_3 |
| 85519 | 0, // x8sub_4_x8sub_5 |
| 85520 | 0, // x8sub_6_x8sub_7 |
| 85521 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85522 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85523 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85524 | 0, // sub_32_subo64_then_sub_32 |
| 85525 | 372, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85526 | 372, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85527 | 372, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85528 | 372, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85529 | 372, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85530 | 372, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85531 | 372, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85532 | 372, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 85533 | 0, // zsub0_zsub2 |
| 85534 | 0, // zsub1_zsub3 |
| 85535 | }, |
| 85536 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85537 | 373, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85538 | 373, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85539 | 373, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85540 | 0, // dsub0 |
| 85541 | 373, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85542 | 373, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85543 | 373, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85544 | 373, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85545 | 373, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85546 | 373, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85547 | 0, // psub |
| 85548 | 0, // psub0 |
| 85549 | 0, // psub1 |
| 85550 | 0, // qsub0 |
| 85551 | 373, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85552 | 373, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85553 | 373, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85554 | 373, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85555 | 373, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85556 | 0, // sub_32 |
| 85557 | 0, // sub_32_hi |
| 85558 | 0, // sube32 |
| 85559 | 0, // sube64 |
| 85560 | 0, // subo32 |
| 85561 | 0, // subo64 |
| 85562 | 0, // x8sub_0 |
| 85563 | 0, // x8sub_1 |
| 85564 | 0, // x8sub_2 |
| 85565 | 0, // x8sub_3 |
| 85566 | 0, // x8sub_4 |
| 85567 | 0, // x8sub_5 |
| 85568 | 0, // x8sub_6 |
| 85569 | 0, // x8sub_7 |
| 85570 | 0, // zasubb |
| 85571 | 0, // zasubd0 |
| 85572 | 0, // zasubd1 |
| 85573 | 0, // zasubh0 |
| 85574 | 0, // zasubh1 |
| 85575 | 0, // zasubq0 |
| 85576 | 0, // zasubq1 |
| 85577 | 0, // zasubs0 |
| 85578 | 0, // zasubs1 |
| 85579 | 373, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85580 | 373, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85581 | 373, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85582 | 373, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85583 | 373, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85584 | 373, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85585 | 0, // zasubd1_then_zasubq0 |
| 85586 | 0, // zasubd1_then_zasubq1 |
| 85587 | 0, // zasubs1_then_zasubd0 |
| 85588 | 0, // zasubs1_then_zasubd1 |
| 85589 | 0, // zasubs1_then_zasubq0 |
| 85590 | 0, // zasubs1_then_zasubq1 |
| 85591 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85592 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85593 | 0, // zasubh1_then_zasubd0 |
| 85594 | 0, // zasubh1_then_zasubd1 |
| 85595 | 0, // zasubh1_then_zasubq0 |
| 85596 | 0, // zasubh1_then_zasubq1 |
| 85597 | 0, // zasubh1_then_zasubs0 |
| 85598 | 0, // zasubh1_then_zasubs1 |
| 85599 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85600 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85601 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85602 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85603 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85604 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85605 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85606 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85607 | 373, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85608 | 373, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85609 | 373, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85610 | 373, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85611 | 373, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85612 | 373, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85613 | 373, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85614 | 373, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85615 | 373, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85616 | 373, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85617 | 373, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85618 | 373, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85619 | 373, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85620 | 373, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85621 | 373, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85622 | 373, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85623 | 373, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85624 | 373, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85625 | 0, // psub1_then_psub |
| 85626 | 373, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85627 | 373, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85628 | 373, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85629 | 0, // x8sub_7_then_sub_32 |
| 85630 | 0, // x8sub_7_then_sub_32_hi |
| 85631 | 0, // x8sub_6_then_sub_32 |
| 85632 | 0, // x8sub_6_then_sub_32_hi |
| 85633 | 0, // x8sub_5_then_sub_32 |
| 85634 | 0, // x8sub_5_then_sub_32_hi |
| 85635 | 0, // x8sub_4_then_sub_32 |
| 85636 | 0, // x8sub_4_then_sub_32_hi |
| 85637 | 0, // x8sub_3_then_sub_32 |
| 85638 | 0, // x8sub_3_then_sub_32_hi |
| 85639 | 0, // x8sub_2_then_sub_32 |
| 85640 | 0, // x8sub_2_then_sub_32_hi |
| 85641 | 0, // x8sub_1_then_sub_32 |
| 85642 | 0, // x8sub_1_then_sub_32_hi |
| 85643 | 0, // subo64_then_sub_32 |
| 85644 | 0, // subo64_then_sub_32_hi |
| 85645 | 373, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85646 | 373, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85647 | 373, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85648 | 0, // dsub0_dsub1 |
| 85649 | 0, // dsub0_dsub1_dsub2 |
| 85650 | 373, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85651 | 373, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85652 | 373, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85653 | 373, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85654 | 373, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85655 | 373, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85656 | 0, // qsub0_qsub1 |
| 85657 | 0, // qsub0_qsub1_qsub2 |
| 85658 | 373, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85659 | 373, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85660 | 373, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85661 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85662 | 0, // x8sub_0_x8sub_1 |
| 85663 | 0, // x8sub_2_x8sub_3 |
| 85664 | 0, // x8sub_4_x8sub_5 |
| 85665 | 0, // x8sub_6_x8sub_7 |
| 85666 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85667 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85668 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85669 | 0, // sub_32_subo64_then_sub_32 |
| 85670 | 373, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85671 | 373, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85672 | 373, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85673 | 373, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85674 | 373, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85675 | 373, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85676 | 373, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85677 | 373, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 85678 | 0, // zsub0_zsub2 |
| 85679 | 0, // zsub1_zsub3 |
| 85680 | }, |
| 85681 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85682 | 374, // bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85683 | 374, // bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85684 | 374, // dsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85685 | 0, // dsub0 |
| 85686 | 374, // dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85687 | 374, // dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85688 | 374, // dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85689 | 374, // dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85690 | 374, // hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85691 | 374, // hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85692 | 0, // psub |
| 85693 | 0, // psub0 |
| 85694 | 0, // psub1 |
| 85695 | 374, // qsub0 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85696 | 374, // qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85697 | 374, // qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85698 | 374, // qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85699 | 374, // ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85700 | 374, // ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85701 | 0, // sub_32 |
| 85702 | 0, // sub_32_hi |
| 85703 | 0, // sube32 |
| 85704 | 0, // sube64 |
| 85705 | 0, // subo32 |
| 85706 | 0, // subo64 |
| 85707 | 0, // x8sub_0 |
| 85708 | 0, // x8sub_1 |
| 85709 | 0, // x8sub_2 |
| 85710 | 0, // x8sub_3 |
| 85711 | 0, // x8sub_4 |
| 85712 | 0, // x8sub_5 |
| 85713 | 0, // x8sub_6 |
| 85714 | 0, // x8sub_7 |
| 85715 | 0, // zasubb |
| 85716 | 0, // zasubd0 |
| 85717 | 0, // zasubd1 |
| 85718 | 0, // zasubh0 |
| 85719 | 0, // zasubh1 |
| 85720 | 0, // zasubq0 |
| 85721 | 0, // zasubq1 |
| 85722 | 0, // zasubs0 |
| 85723 | 0, // zasubs1 |
| 85724 | 0, // zsub |
| 85725 | 0, // zsub0 |
| 85726 | 0, // zsub1 |
| 85727 | 0, // zsub2 |
| 85728 | 0, // zsub3 |
| 85729 | 0, // zsub_hi |
| 85730 | 0, // zasubd1_then_zasubq0 |
| 85731 | 0, // zasubd1_then_zasubq1 |
| 85732 | 0, // zasubs1_then_zasubd0 |
| 85733 | 0, // zasubs1_then_zasubd1 |
| 85734 | 0, // zasubs1_then_zasubq0 |
| 85735 | 0, // zasubs1_then_zasubq1 |
| 85736 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85737 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85738 | 0, // zasubh1_then_zasubd0 |
| 85739 | 0, // zasubh1_then_zasubd1 |
| 85740 | 0, // zasubh1_then_zasubq0 |
| 85741 | 0, // zasubh1_then_zasubq1 |
| 85742 | 0, // zasubh1_then_zasubs0 |
| 85743 | 0, // zasubh1_then_zasubs1 |
| 85744 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85745 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85746 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85747 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85748 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85749 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85750 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85751 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85752 | 374, // dsub1_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85753 | 374, // dsub1_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85754 | 374, // dsub1_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85755 | 374, // dsub1_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85756 | 374, // dsub1_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85757 | 374, // dsub1_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85758 | 374, // dsub3_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85759 | 374, // dsub3_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85760 | 374, // dsub3_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85761 | 374, // dsub3_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85762 | 374, // dsub3_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85763 | 374, // dsub3_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85764 | 374, // dsub2_then_bsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85765 | 374, // dsub2_then_bsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85766 | 374, // dsub2_then_hsub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85767 | 374, // dsub2_then_hsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85768 | 374, // dsub2_then_ssub -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85769 | 374, // dsub2_then_ssub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85770 | 0, // psub1_then_psub |
| 85771 | 374, // qsub1_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85772 | 374, // qsub3_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85773 | 374, // qsub2_then_dsub_hi -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85774 | 0, // x8sub_7_then_sub_32 |
| 85775 | 0, // x8sub_7_then_sub_32_hi |
| 85776 | 0, // x8sub_6_then_sub_32 |
| 85777 | 0, // x8sub_6_then_sub_32_hi |
| 85778 | 0, // x8sub_5_then_sub_32 |
| 85779 | 0, // x8sub_5_then_sub_32_hi |
| 85780 | 0, // x8sub_4_then_sub_32 |
| 85781 | 0, // x8sub_4_then_sub_32_hi |
| 85782 | 0, // x8sub_3_then_sub_32 |
| 85783 | 0, // x8sub_3_then_sub_32_hi |
| 85784 | 0, // x8sub_2_then_sub_32 |
| 85785 | 0, // x8sub_2_then_sub_32_hi |
| 85786 | 0, // x8sub_1_then_sub_32 |
| 85787 | 0, // x8sub_1_then_sub_32_hi |
| 85788 | 0, // subo64_then_sub_32 |
| 85789 | 0, // subo64_then_sub_32_hi |
| 85790 | 0, // zsub1_then_zsub_hi |
| 85791 | 0, // zsub3_then_zsub_hi |
| 85792 | 0, // zsub2_then_zsub_hi |
| 85793 | 0, // dsub0_dsub1 |
| 85794 | 0, // dsub0_dsub1_dsub2 |
| 85795 | 374, // dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85796 | 374, // dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85797 | 374, // dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85798 | 374, // dsub_dsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85799 | 374, // dsub_dsub1_dsub2_dsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85800 | 374, // dsub_dsub1_dsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85801 | 374, // qsub0_qsub1 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85802 | 374, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85803 | 374, // qsub1_qsub2 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85804 | 374, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85805 | 374, // qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 85806 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85807 | 0, // x8sub_0_x8sub_1 |
| 85808 | 0, // x8sub_2_x8sub_3 |
| 85809 | 0, // x8sub_4_x8sub_5 |
| 85810 | 0, // x8sub_6_x8sub_7 |
| 85811 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85812 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85813 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85814 | 0, // sub_32_subo64_then_sub_32 |
| 85815 | 0, // zsub_qsub1 |
| 85816 | 0, // zsub_qsub1_qsub2_qsub3 |
| 85817 | 0, // zsub_qsub1_qsub2 |
| 85818 | 0, // zsub0_zsub1 |
| 85819 | 0, // zsub0_zsub1_zsub2 |
| 85820 | 0, // zsub1_zsub2 |
| 85821 | 0, // zsub1_zsub2_zsub3 |
| 85822 | 0, // zsub2_zsub3 |
| 85823 | 0, // zsub0_zsub2 |
| 85824 | 0, // zsub1_zsub3 |
| 85825 | }, |
| 85826 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85827 | 375, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85828 | 375, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85829 | 375, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85830 | 0, // dsub0 |
| 85831 | 375, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85832 | 375, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85833 | 375, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85834 | 375, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85835 | 375, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85836 | 375, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85837 | 0, // psub |
| 85838 | 0, // psub0 |
| 85839 | 0, // psub1 |
| 85840 | 0, // qsub0 |
| 85841 | 375, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85842 | 375, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85843 | 375, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85844 | 375, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85845 | 375, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85846 | 0, // sub_32 |
| 85847 | 0, // sub_32_hi |
| 85848 | 0, // sube32 |
| 85849 | 0, // sube64 |
| 85850 | 0, // subo32 |
| 85851 | 0, // subo64 |
| 85852 | 0, // x8sub_0 |
| 85853 | 0, // x8sub_1 |
| 85854 | 0, // x8sub_2 |
| 85855 | 0, // x8sub_3 |
| 85856 | 0, // x8sub_4 |
| 85857 | 0, // x8sub_5 |
| 85858 | 0, // x8sub_6 |
| 85859 | 0, // x8sub_7 |
| 85860 | 0, // zasubb |
| 85861 | 0, // zasubd0 |
| 85862 | 0, // zasubd1 |
| 85863 | 0, // zasubh0 |
| 85864 | 0, // zasubh1 |
| 85865 | 0, // zasubq0 |
| 85866 | 0, // zasubq1 |
| 85867 | 0, // zasubs0 |
| 85868 | 0, // zasubs1 |
| 85869 | 375, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85870 | 375, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85871 | 375, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85872 | 375, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85873 | 375, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85874 | 375, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85875 | 0, // zasubd1_then_zasubq0 |
| 85876 | 0, // zasubd1_then_zasubq1 |
| 85877 | 0, // zasubs1_then_zasubd0 |
| 85878 | 0, // zasubs1_then_zasubd1 |
| 85879 | 0, // zasubs1_then_zasubq0 |
| 85880 | 0, // zasubs1_then_zasubq1 |
| 85881 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 85882 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 85883 | 0, // zasubh1_then_zasubd0 |
| 85884 | 0, // zasubh1_then_zasubd1 |
| 85885 | 0, // zasubh1_then_zasubq0 |
| 85886 | 0, // zasubh1_then_zasubq1 |
| 85887 | 0, // zasubh1_then_zasubs0 |
| 85888 | 0, // zasubh1_then_zasubs1 |
| 85889 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 85890 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 85891 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 85892 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 85893 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 85894 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 85895 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 85896 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 85897 | 375, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85898 | 375, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85899 | 375, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85900 | 375, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85901 | 375, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85902 | 375, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85903 | 375, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85904 | 375, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85905 | 375, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85906 | 375, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85907 | 375, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85908 | 375, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85909 | 375, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85910 | 375, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85911 | 375, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85912 | 375, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85913 | 375, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85914 | 375, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85915 | 0, // psub1_then_psub |
| 85916 | 375, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85917 | 375, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85918 | 375, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85919 | 0, // x8sub_7_then_sub_32 |
| 85920 | 0, // x8sub_7_then_sub_32_hi |
| 85921 | 0, // x8sub_6_then_sub_32 |
| 85922 | 0, // x8sub_6_then_sub_32_hi |
| 85923 | 0, // x8sub_5_then_sub_32 |
| 85924 | 0, // x8sub_5_then_sub_32_hi |
| 85925 | 0, // x8sub_4_then_sub_32 |
| 85926 | 0, // x8sub_4_then_sub_32_hi |
| 85927 | 0, // x8sub_3_then_sub_32 |
| 85928 | 0, // x8sub_3_then_sub_32_hi |
| 85929 | 0, // x8sub_2_then_sub_32 |
| 85930 | 0, // x8sub_2_then_sub_32_hi |
| 85931 | 0, // x8sub_1_then_sub_32 |
| 85932 | 0, // x8sub_1_then_sub_32_hi |
| 85933 | 0, // subo64_then_sub_32 |
| 85934 | 0, // subo64_then_sub_32_hi |
| 85935 | 375, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85936 | 375, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85937 | 375, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85938 | 0, // dsub0_dsub1 |
| 85939 | 0, // dsub0_dsub1_dsub2 |
| 85940 | 385, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85941 | 385, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85942 | 385, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85943 | 385, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85944 | 385, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85945 | 385, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85946 | 0, // qsub0_qsub1 |
| 85947 | 0, // qsub0_qsub1_qsub2 |
| 85948 | 385, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85949 | 385, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85950 | 385, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85951 | 0, // sub_32_x8sub_1_then_sub_32 |
| 85952 | 0, // x8sub_0_x8sub_1 |
| 85953 | 0, // x8sub_2_x8sub_3 |
| 85954 | 0, // x8sub_4_x8sub_5 |
| 85955 | 0, // x8sub_6_x8sub_7 |
| 85956 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 85957 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 85958 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 85959 | 0, // sub_32_subo64_then_sub_32 |
| 85960 | 385, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85961 | 385, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85962 | 385, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85963 | 385, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85964 | 385, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85965 | 385, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85966 | 385, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85967 | 385, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 85968 | 445, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85969 | 445, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 85970 | }, |
| 85971 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85972 | 376, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85973 | 376, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85974 | 376, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85975 | 0, // dsub0 |
| 85976 | 376, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85977 | 376, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85978 | 376, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85979 | 376, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85980 | 376, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85981 | 376, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85982 | 0, // psub |
| 85983 | 0, // psub0 |
| 85984 | 0, // psub1 |
| 85985 | 0, // qsub0 |
| 85986 | 376, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85987 | 376, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85988 | 376, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85989 | 376, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85990 | 376, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 85991 | 0, // sub_32 |
| 85992 | 0, // sub_32_hi |
| 85993 | 0, // sube32 |
| 85994 | 0, // sube64 |
| 85995 | 0, // subo32 |
| 85996 | 0, // subo64 |
| 85997 | 0, // x8sub_0 |
| 85998 | 0, // x8sub_1 |
| 85999 | 0, // x8sub_2 |
| 86000 | 0, // x8sub_3 |
| 86001 | 0, // x8sub_4 |
| 86002 | 0, // x8sub_5 |
| 86003 | 0, // x8sub_6 |
| 86004 | 0, // x8sub_7 |
| 86005 | 0, // zasubb |
| 86006 | 0, // zasubd0 |
| 86007 | 0, // zasubd1 |
| 86008 | 0, // zasubh0 |
| 86009 | 0, // zasubh1 |
| 86010 | 0, // zasubq0 |
| 86011 | 0, // zasubq1 |
| 86012 | 0, // zasubs0 |
| 86013 | 0, // zasubs1 |
| 86014 | 376, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86015 | 376, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86016 | 376, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86017 | 376, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86018 | 376, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86019 | 376, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86020 | 0, // zasubd1_then_zasubq0 |
| 86021 | 0, // zasubd1_then_zasubq1 |
| 86022 | 0, // zasubs1_then_zasubd0 |
| 86023 | 0, // zasubs1_then_zasubd1 |
| 86024 | 0, // zasubs1_then_zasubq0 |
| 86025 | 0, // zasubs1_then_zasubq1 |
| 86026 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86027 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86028 | 0, // zasubh1_then_zasubd0 |
| 86029 | 0, // zasubh1_then_zasubd1 |
| 86030 | 0, // zasubh1_then_zasubq0 |
| 86031 | 0, // zasubh1_then_zasubq1 |
| 86032 | 0, // zasubh1_then_zasubs0 |
| 86033 | 0, // zasubh1_then_zasubs1 |
| 86034 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86035 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86036 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86037 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86038 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86039 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86040 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86041 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86042 | 376, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86043 | 376, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86044 | 376, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86045 | 376, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86046 | 376, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86047 | 376, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86048 | 376, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86049 | 376, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86050 | 376, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86051 | 376, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86052 | 376, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86053 | 376, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86054 | 376, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86055 | 376, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86056 | 376, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86057 | 376, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86058 | 376, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86059 | 376, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86060 | 0, // psub1_then_psub |
| 86061 | 376, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86062 | 376, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86063 | 376, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86064 | 0, // x8sub_7_then_sub_32 |
| 86065 | 0, // x8sub_7_then_sub_32_hi |
| 86066 | 0, // x8sub_6_then_sub_32 |
| 86067 | 0, // x8sub_6_then_sub_32_hi |
| 86068 | 0, // x8sub_5_then_sub_32 |
| 86069 | 0, // x8sub_5_then_sub_32_hi |
| 86070 | 0, // x8sub_4_then_sub_32 |
| 86071 | 0, // x8sub_4_then_sub_32_hi |
| 86072 | 0, // x8sub_3_then_sub_32 |
| 86073 | 0, // x8sub_3_then_sub_32_hi |
| 86074 | 0, // x8sub_2_then_sub_32 |
| 86075 | 0, // x8sub_2_then_sub_32_hi |
| 86076 | 0, // x8sub_1_then_sub_32 |
| 86077 | 0, // x8sub_1_then_sub_32_hi |
| 86078 | 0, // subo64_then_sub_32 |
| 86079 | 0, // subo64_then_sub_32_hi |
| 86080 | 376, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86081 | 376, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86082 | 376, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86083 | 0, // dsub0_dsub1 |
| 86084 | 0, // dsub0_dsub1_dsub2 |
| 86085 | 386, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86086 | 386, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86087 | 386, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86088 | 386, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86089 | 386, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86090 | 386, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86091 | 0, // qsub0_qsub1 |
| 86092 | 0, // qsub0_qsub1_qsub2 |
| 86093 | 386, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86094 | 386, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86095 | 386, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86096 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86097 | 0, // x8sub_0_x8sub_1 |
| 86098 | 0, // x8sub_2_x8sub_3 |
| 86099 | 0, // x8sub_4_x8sub_5 |
| 86100 | 0, // x8sub_6_x8sub_7 |
| 86101 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86102 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86103 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86104 | 0, // sub_32_subo64_then_sub_32 |
| 86105 | 386, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86106 | 386, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86107 | 386, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86108 | 386, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86109 | 386, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86110 | 386, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86111 | 386, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86112 | 386, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 86113 | 446, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86114 | 446, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 86115 | }, |
| 86116 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86117 | 377, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86118 | 377, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86119 | 377, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86120 | 0, // dsub0 |
| 86121 | 377, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86122 | 377, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86123 | 377, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86124 | 377, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86125 | 377, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86126 | 377, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86127 | 0, // psub |
| 86128 | 0, // psub0 |
| 86129 | 0, // psub1 |
| 86130 | 0, // qsub0 |
| 86131 | 377, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86132 | 377, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86133 | 377, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86134 | 377, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86135 | 377, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86136 | 0, // sub_32 |
| 86137 | 0, // sub_32_hi |
| 86138 | 0, // sube32 |
| 86139 | 0, // sube64 |
| 86140 | 0, // subo32 |
| 86141 | 0, // subo64 |
| 86142 | 0, // x8sub_0 |
| 86143 | 0, // x8sub_1 |
| 86144 | 0, // x8sub_2 |
| 86145 | 0, // x8sub_3 |
| 86146 | 0, // x8sub_4 |
| 86147 | 0, // x8sub_5 |
| 86148 | 0, // x8sub_6 |
| 86149 | 0, // x8sub_7 |
| 86150 | 0, // zasubb |
| 86151 | 0, // zasubd0 |
| 86152 | 0, // zasubd1 |
| 86153 | 0, // zasubh0 |
| 86154 | 0, // zasubh1 |
| 86155 | 0, // zasubq0 |
| 86156 | 0, // zasubq1 |
| 86157 | 0, // zasubs0 |
| 86158 | 0, // zasubs1 |
| 86159 | 377, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86160 | 377, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86161 | 377, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86162 | 377, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86163 | 377, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86164 | 377, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86165 | 0, // zasubd1_then_zasubq0 |
| 86166 | 0, // zasubd1_then_zasubq1 |
| 86167 | 0, // zasubs1_then_zasubd0 |
| 86168 | 0, // zasubs1_then_zasubd1 |
| 86169 | 0, // zasubs1_then_zasubq0 |
| 86170 | 0, // zasubs1_then_zasubq1 |
| 86171 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86172 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86173 | 0, // zasubh1_then_zasubd0 |
| 86174 | 0, // zasubh1_then_zasubd1 |
| 86175 | 0, // zasubh1_then_zasubq0 |
| 86176 | 0, // zasubh1_then_zasubq1 |
| 86177 | 0, // zasubh1_then_zasubs0 |
| 86178 | 0, // zasubh1_then_zasubs1 |
| 86179 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86180 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86181 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86182 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86183 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86184 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86185 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86186 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86187 | 377, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86188 | 377, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86189 | 377, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86190 | 377, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86191 | 377, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86192 | 377, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86193 | 377, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86194 | 377, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86195 | 377, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86196 | 377, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86197 | 377, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86198 | 377, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86199 | 377, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86200 | 377, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86201 | 377, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86202 | 377, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86203 | 377, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86204 | 377, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86205 | 0, // psub1_then_psub |
| 86206 | 377, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86207 | 377, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86208 | 377, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86209 | 0, // x8sub_7_then_sub_32 |
| 86210 | 0, // x8sub_7_then_sub_32_hi |
| 86211 | 0, // x8sub_6_then_sub_32 |
| 86212 | 0, // x8sub_6_then_sub_32_hi |
| 86213 | 0, // x8sub_5_then_sub_32 |
| 86214 | 0, // x8sub_5_then_sub_32_hi |
| 86215 | 0, // x8sub_4_then_sub_32 |
| 86216 | 0, // x8sub_4_then_sub_32_hi |
| 86217 | 0, // x8sub_3_then_sub_32 |
| 86218 | 0, // x8sub_3_then_sub_32_hi |
| 86219 | 0, // x8sub_2_then_sub_32 |
| 86220 | 0, // x8sub_2_then_sub_32_hi |
| 86221 | 0, // x8sub_1_then_sub_32 |
| 86222 | 0, // x8sub_1_then_sub_32_hi |
| 86223 | 0, // subo64_then_sub_32 |
| 86224 | 0, // subo64_then_sub_32_hi |
| 86225 | 377, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86226 | 377, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86227 | 377, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86228 | 0, // dsub0_dsub1 |
| 86229 | 0, // dsub0_dsub1_dsub2 |
| 86230 | 377, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86231 | 377, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86232 | 377, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86233 | 377, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86234 | 377, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86235 | 377, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86236 | 0, // qsub0_qsub1 |
| 86237 | 0, // qsub0_qsub1_qsub2 |
| 86238 | 377, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86239 | 377, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86240 | 377, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86241 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86242 | 0, // x8sub_0_x8sub_1 |
| 86243 | 0, // x8sub_2_x8sub_3 |
| 86244 | 0, // x8sub_4_x8sub_5 |
| 86245 | 0, // x8sub_6_x8sub_7 |
| 86246 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86247 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86248 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86249 | 0, // sub_32_subo64_then_sub_32 |
| 86250 | 377, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86251 | 377, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86252 | 377, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86253 | 377, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86254 | 377, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86255 | 377, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86256 | 377, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86257 | 377, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 86258 | 0, // zsub0_zsub2 |
| 86259 | 0, // zsub1_zsub3 |
| 86260 | }, |
| 86261 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86262 | 378, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86263 | 378, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86264 | 378, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86265 | 0, // dsub0 |
| 86266 | 378, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86267 | 378, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86268 | 378, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86269 | 378, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86270 | 378, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86271 | 378, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86272 | 0, // psub |
| 86273 | 0, // psub0 |
| 86274 | 0, // psub1 |
| 86275 | 0, // qsub0 |
| 86276 | 378, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86277 | 378, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86278 | 378, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86279 | 378, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86280 | 378, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86281 | 0, // sub_32 |
| 86282 | 0, // sub_32_hi |
| 86283 | 0, // sube32 |
| 86284 | 0, // sube64 |
| 86285 | 0, // subo32 |
| 86286 | 0, // subo64 |
| 86287 | 0, // x8sub_0 |
| 86288 | 0, // x8sub_1 |
| 86289 | 0, // x8sub_2 |
| 86290 | 0, // x8sub_3 |
| 86291 | 0, // x8sub_4 |
| 86292 | 0, // x8sub_5 |
| 86293 | 0, // x8sub_6 |
| 86294 | 0, // x8sub_7 |
| 86295 | 0, // zasubb |
| 86296 | 0, // zasubd0 |
| 86297 | 0, // zasubd1 |
| 86298 | 0, // zasubh0 |
| 86299 | 0, // zasubh1 |
| 86300 | 0, // zasubq0 |
| 86301 | 0, // zasubq1 |
| 86302 | 0, // zasubs0 |
| 86303 | 0, // zasubs1 |
| 86304 | 378, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86305 | 378, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86306 | 378, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86307 | 378, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86308 | 378, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86309 | 378, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86310 | 0, // zasubd1_then_zasubq0 |
| 86311 | 0, // zasubd1_then_zasubq1 |
| 86312 | 0, // zasubs1_then_zasubd0 |
| 86313 | 0, // zasubs1_then_zasubd1 |
| 86314 | 0, // zasubs1_then_zasubq0 |
| 86315 | 0, // zasubs1_then_zasubq1 |
| 86316 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86317 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86318 | 0, // zasubh1_then_zasubd0 |
| 86319 | 0, // zasubh1_then_zasubd1 |
| 86320 | 0, // zasubh1_then_zasubq0 |
| 86321 | 0, // zasubh1_then_zasubq1 |
| 86322 | 0, // zasubh1_then_zasubs0 |
| 86323 | 0, // zasubh1_then_zasubs1 |
| 86324 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86325 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86326 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86327 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86328 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86329 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86330 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86331 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86332 | 378, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86333 | 378, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86334 | 378, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86335 | 378, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86336 | 378, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86337 | 378, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86338 | 378, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86339 | 378, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86340 | 378, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86341 | 378, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86342 | 378, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86343 | 378, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86344 | 378, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86345 | 378, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86346 | 378, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86347 | 378, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86348 | 378, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86349 | 378, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86350 | 0, // psub1_then_psub |
| 86351 | 378, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86352 | 378, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86353 | 378, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86354 | 0, // x8sub_7_then_sub_32 |
| 86355 | 0, // x8sub_7_then_sub_32_hi |
| 86356 | 0, // x8sub_6_then_sub_32 |
| 86357 | 0, // x8sub_6_then_sub_32_hi |
| 86358 | 0, // x8sub_5_then_sub_32 |
| 86359 | 0, // x8sub_5_then_sub_32_hi |
| 86360 | 0, // x8sub_4_then_sub_32 |
| 86361 | 0, // x8sub_4_then_sub_32_hi |
| 86362 | 0, // x8sub_3_then_sub_32 |
| 86363 | 0, // x8sub_3_then_sub_32_hi |
| 86364 | 0, // x8sub_2_then_sub_32 |
| 86365 | 0, // x8sub_2_then_sub_32_hi |
| 86366 | 0, // x8sub_1_then_sub_32 |
| 86367 | 0, // x8sub_1_then_sub_32_hi |
| 86368 | 0, // subo64_then_sub_32 |
| 86369 | 0, // subo64_then_sub_32_hi |
| 86370 | 378, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86371 | 378, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86372 | 378, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 86373 | 0, // dsub0_dsub1 |
| 86374 | 0, // dsub0_dsub1_dsub2 |
| 86375 | 422, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86376 | 422, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86377 | 422, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86378 | 422, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86379 | 422, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86380 | 422, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86381 | 0, // qsub0_qsub1 |
| 86382 | 0, // qsub0_qsub1_qsub2 |
| 86383 | 422, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86384 | 422, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86385 | 422, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86386 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86387 | 0, // x8sub_0_x8sub_1 |
| 86388 | 0, // x8sub_2_x8sub_3 |
| 86389 | 0, // x8sub_4_x8sub_5 |
| 86390 | 0, // x8sub_6_x8sub_7 |
| 86391 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86392 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86393 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86394 | 0, // sub_32_subo64_then_sub_32 |
| 86395 | 422, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86396 | 422, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86397 | 422, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86398 | 422, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86399 | 422, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86400 | 422, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86401 | 422, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86402 | 422, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 86403 | 424, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 86404 | 424, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 86405 | }, |
| 86406 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86407 | 379, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86408 | 379, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86409 | 379, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86410 | 0, // dsub0 |
| 86411 | 379, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86412 | 379, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86413 | 379, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86414 | 379, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86415 | 379, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86416 | 379, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86417 | 0, // psub |
| 86418 | 0, // psub0 |
| 86419 | 0, // psub1 |
| 86420 | 0, // qsub0 |
| 86421 | 379, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86422 | 379, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86423 | 379, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86424 | 379, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86425 | 379, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86426 | 0, // sub_32 |
| 86427 | 0, // sub_32_hi |
| 86428 | 0, // sube32 |
| 86429 | 0, // sube64 |
| 86430 | 0, // subo32 |
| 86431 | 0, // subo64 |
| 86432 | 0, // x8sub_0 |
| 86433 | 0, // x8sub_1 |
| 86434 | 0, // x8sub_2 |
| 86435 | 0, // x8sub_3 |
| 86436 | 0, // x8sub_4 |
| 86437 | 0, // x8sub_5 |
| 86438 | 0, // x8sub_6 |
| 86439 | 0, // x8sub_7 |
| 86440 | 0, // zasubb |
| 86441 | 0, // zasubd0 |
| 86442 | 0, // zasubd1 |
| 86443 | 0, // zasubh0 |
| 86444 | 0, // zasubh1 |
| 86445 | 0, // zasubq0 |
| 86446 | 0, // zasubq1 |
| 86447 | 0, // zasubs0 |
| 86448 | 0, // zasubs1 |
| 86449 | 379, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86450 | 379, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86451 | 379, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86452 | 379, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86453 | 379, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86454 | 379, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86455 | 0, // zasubd1_then_zasubq0 |
| 86456 | 0, // zasubd1_then_zasubq1 |
| 86457 | 0, // zasubs1_then_zasubd0 |
| 86458 | 0, // zasubs1_then_zasubd1 |
| 86459 | 0, // zasubs1_then_zasubq0 |
| 86460 | 0, // zasubs1_then_zasubq1 |
| 86461 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86462 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86463 | 0, // zasubh1_then_zasubd0 |
| 86464 | 0, // zasubh1_then_zasubd1 |
| 86465 | 0, // zasubh1_then_zasubq0 |
| 86466 | 0, // zasubh1_then_zasubq1 |
| 86467 | 0, // zasubh1_then_zasubs0 |
| 86468 | 0, // zasubh1_then_zasubs1 |
| 86469 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86470 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86471 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86472 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86473 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86474 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86475 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86476 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86477 | 379, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86478 | 379, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86479 | 379, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86480 | 379, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86481 | 379, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86482 | 379, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86483 | 379, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86484 | 379, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86485 | 379, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86486 | 379, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86487 | 379, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86488 | 379, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86489 | 379, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86490 | 379, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86491 | 379, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86492 | 379, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86493 | 379, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86494 | 379, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86495 | 0, // psub1_then_psub |
| 86496 | 379, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86497 | 379, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86498 | 379, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86499 | 0, // x8sub_7_then_sub_32 |
| 86500 | 0, // x8sub_7_then_sub_32_hi |
| 86501 | 0, // x8sub_6_then_sub_32 |
| 86502 | 0, // x8sub_6_then_sub_32_hi |
| 86503 | 0, // x8sub_5_then_sub_32 |
| 86504 | 0, // x8sub_5_then_sub_32_hi |
| 86505 | 0, // x8sub_4_then_sub_32 |
| 86506 | 0, // x8sub_4_then_sub_32_hi |
| 86507 | 0, // x8sub_3_then_sub_32 |
| 86508 | 0, // x8sub_3_then_sub_32_hi |
| 86509 | 0, // x8sub_2_then_sub_32 |
| 86510 | 0, // x8sub_2_then_sub_32_hi |
| 86511 | 0, // x8sub_1_then_sub_32 |
| 86512 | 0, // x8sub_1_then_sub_32_hi |
| 86513 | 0, // subo64_then_sub_32 |
| 86514 | 0, // subo64_then_sub_32_hi |
| 86515 | 379, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86516 | 379, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86517 | 379, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 86518 | 0, // dsub0_dsub1 |
| 86519 | 0, // dsub0_dsub1_dsub2 |
| 86520 | 423, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86521 | 423, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86522 | 423, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86523 | 423, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86524 | 423, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86525 | 423, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86526 | 0, // qsub0_qsub1 |
| 86527 | 0, // qsub0_qsub1_qsub2 |
| 86528 | 423, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86529 | 423, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86530 | 423, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86531 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86532 | 0, // x8sub_0_x8sub_1 |
| 86533 | 0, // x8sub_2_x8sub_3 |
| 86534 | 0, // x8sub_4_x8sub_5 |
| 86535 | 0, // x8sub_6_x8sub_7 |
| 86536 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86537 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86538 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86539 | 0, // sub_32_subo64_then_sub_32 |
| 86540 | 423, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86541 | 423, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86542 | 423, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86543 | 423, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86544 | 423, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86545 | 423, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86546 | 423, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86547 | 423, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 86548 | 425, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 86549 | 425, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 86550 | }, |
| 86551 | { // ZPR4Strided_with_dsub_in_FPR64_lo |
| 86552 | 380, // bsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86553 | 380, // bsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86554 | 380, // dsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86555 | 0, // dsub0 |
| 86556 | 380, // dsub1 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86557 | 380, // dsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86558 | 380, // dsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86559 | 380, // dsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86560 | 380, // hsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86561 | 380, // hsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86562 | 0, // psub |
| 86563 | 0, // psub0 |
| 86564 | 0, // psub1 |
| 86565 | 0, // qsub0 |
| 86566 | 380, // qsub1 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86567 | 380, // qsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86568 | 380, // qsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86569 | 380, // ssub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86570 | 380, // ssub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86571 | 0, // sub_32 |
| 86572 | 0, // sub_32_hi |
| 86573 | 0, // sube32 |
| 86574 | 0, // sube64 |
| 86575 | 0, // subo32 |
| 86576 | 0, // subo64 |
| 86577 | 0, // x8sub_0 |
| 86578 | 0, // x8sub_1 |
| 86579 | 0, // x8sub_2 |
| 86580 | 0, // x8sub_3 |
| 86581 | 0, // x8sub_4 |
| 86582 | 0, // x8sub_5 |
| 86583 | 0, // x8sub_6 |
| 86584 | 0, // x8sub_7 |
| 86585 | 0, // zasubb |
| 86586 | 0, // zasubd0 |
| 86587 | 0, // zasubd1 |
| 86588 | 0, // zasubh0 |
| 86589 | 0, // zasubh1 |
| 86590 | 0, // zasubq0 |
| 86591 | 0, // zasubq1 |
| 86592 | 0, // zasubs0 |
| 86593 | 0, // zasubs1 |
| 86594 | 380, // zsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86595 | 380, // zsub0 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86596 | 380, // zsub1 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86597 | 380, // zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86598 | 380, // zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86599 | 380, // zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86600 | 0, // zasubd1_then_zasubq0 |
| 86601 | 0, // zasubd1_then_zasubq1 |
| 86602 | 0, // zasubs1_then_zasubd0 |
| 86603 | 0, // zasubs1_then_zasubd1 |
| 86604 | 0, // zasubs1_then_zasubq0 |
| 86605 | 0, // zasubs1_then_zasubq1 |
| 86606 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86607 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86608 | 0, // zasubh1_then_zasubd0 |
| 86609 | 0, // zasubh1_then_zasubd1 |
| 86610 | 0, // zasubh1_then_zasubq0 |
| 86611 | 0, // zasubh1_then_zasubq1 |
| 86612 | 0, // zasubh1_then_zasubs0 |
| 86613 | 0, // zasubh1_then_zasubs1 |
| 86614 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86615 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86616 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86617 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86618 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86619 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86620 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86621 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86622 | 380, // dsub1_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86623 | 380, // dsub1_then_bsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86624 | 380, // dsub1_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86625 | 380, // dsub1_then_hsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86626 | 380, // dsub1_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86627 | 380, // dsub1_then_ssub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86628 | 380, // dsub3_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86629 | 380, // dsub3_then_bsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86630 | 380, // dsub3_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86631 | 380, // dsub3_then_hsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86632 | 380, // dsub3_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86633 | 380, // dsub3_then_ssub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86634 | 380, // dsub2_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86635 | 380, // dsub2_then_bsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86636 | 380, // dsub2_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86637 | 380, // dsub2_then_hsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86638 | 380, // dsub2_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86639 | 380, // dsub2_then_ssub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86640 | 0, // psub1_then_psub |
| 86641 | 380, // qsub1_then_dsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86642 | 380, // qsub3_then_dsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86643 | 380, // qsub2_then_dsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86644 | 0, // x8sub_7_then_sub_32 |
| 86645 | 0, // x8sub_7_then_sub_32_hi |
| 86646 | 0, // x8sub_6_then_sub_32 |
| 86647 | 0, // x8sub_6_then_sub_32_hi |
| 86648 | 0, // x8sub_5_then_sub_32 |
| 86649 | 0, // x8sub_5_then_sub_32_hi |
| 86650 | 0, // x8sub_4_then_sub_32 |
| 86651 | 0, // x8sub_4_then_sub_32_hi |
| 86652 | 0, // x8sub_3_then_sub_32 |
| 86653 | 0, // x8sub_3_then_sub_32_hi |
| 86654 | 0, // x8sub_2_then_sub_32 |
| 86655 | 0, // x8sub_2_then_sub_32_hi |
| 86656 | 0, // x8sub_1_then_sub_32 |
| 86657 | 0, // x8sub_1_then_sub_32_hi |
| 86658 | 0, // subo64_then_sub_32 |
| 86659 | 0, // subo64_then_sub_32_hi |
| 86660 | 380, // zsub1_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86661 | 380, // zsub3_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86662 | 380, // zsub2_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86663 | 0, // dsub0_dsub1 |
| 86664 | 0, // dsub0_dsub1_dsub2 |
| 86665 | 0, // dsub1_dsub2 |
| 86666 | 0, // dsub1_dsub2_dsub3 |
| 86667 | 0, // dsub2_dsub3 |
| 86668 | 0, // dsub_dsub1 |
| 86669 | 0, // dsub_dsub1_dsub2_dsub3 |
| 86670 | 0, // dsub_dsub1_dsub2 |
| 86671 | 0, // qsub0_qsub1 |
| 86672 | 0, // qsub0_qsub1_qsub2 |
| 86673 | 0, // qsub1_qsub2 |
| 86674 | 0, // qsub1_qsub2_qsub3 |
| 86675 | 0, // qsub2_qsub3 |
| 86676 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86677 | 0, // x8sub_0_x8sub_1 |
| 86678 | 0, // x8sub_2_x8sub_3 |
| 86679 | 0, // x8sub_4_x8sub_5 |
| 86680 | 0, // x8sub_6_x8sub_7 |
| 86681 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86682 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86683 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86684 | 0, // sub_32_subo64_then_sub_32 |
| 86685 | 0, // zsub_qsub1 |
| 86686 | 0, // zsub_qsub1_qsub2_qsub3 |
| 86687 | 0, // zsub_qsub1_qsub2 |
| 86688 | 0, // zsub0_zsub1 |
| 86689 | 0, // zsub0_zsub1_zsub2 |
| 86690 | 0, // zsub1_zsub2 |
| 86691 | 0, // zsub1_zsub2_zsub3 |
| 86692 | 0, // zsub2_zsub3 |
| 86693 | 380, // zsub0_zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86694 | 380, // zsub1_zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo |
| 86695 | }, |
| 86696 | { // ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86697 | 381, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86698 | 381, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86699 | 381, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86700 | 0, // dsub0 |
| 86701 | 381, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86702 | 381, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86703 | 381, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86704 | 381, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86705 | 381, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86706 | 381, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86707 | 0, // psub |
| 86708 | 0, // psub0 |
| 86709 | 0, // psub1 |
| 86710 | 0, // qsub0 |
| 86711 | 381, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86712 | 381, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86713 | 381, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86714 | 381, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86715 | 381, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86716 | 0, // sub_32 |
| 86717 | 0, // sub_32_hi |
| 86718 | 0, // sube32 |
| 86719 | 0, // sube64 |
| 86720 | 0, // subo32 |
| 86721 | 0, // subo64 |
| 86722 | 0, // x8sub_0 |
| 86723 | 0, // x8sub_1 |
| 86724 | 0, // x8sub_2 |
| 86725 | 0, // x8sub_3 |
| 86726 | 0, // x8sub_4 |
| 86727 | 0, // x8sub_5 |
| 86728 | 0, // x8sub_6 |
| 86729 | 0, // x8sub_7 |
| 86730 | 0, // zasubb |
| 86731 | 0, // zasubd0 |
| 86732 | 0, // zasubd1 |
| 86733 | 0, // zasubh0 |
| 86734 | 0, // zasubh1 |
| 86735 | 0, // zasubq0 |
| 86736 | 0, // zasubq1 |
| 86737 | 0, // zasubs0 |
| 86738 | 0, // zasubs1 |
| 86739 | 381, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86740 | 381, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86741 | 381, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86742 | 381, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86743 | 381, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86744 | 381, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86745 | 0, // zasubd1_then_zasubq0 |
| 86746 | 0, // zasubd1_then_zasubq1 |
| 86747 | 0, // zasubs1_then_zasubd0 |
| 86748 | 0, // zasubs1_then_zasubd1 |
| 86749 | 0, // zasubs1_then_zasubq0 |
| 86750 | 0, // zasubs1_then_zasubq1 |
| 86751 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86752 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86753 | 0, // zasubh1_then_zasubd0 |
| 86754 | 0, // zasubh1_then_zasubd1 |
| 86755 | 0, // zasubh1_then_zasubq0 |
| 86756 | 0, // zasubh1_then_zasubq1 |
| 86757 | 0, // zasubh1_then_zasubs0 |
| 86758 | 0, // zasubh1_then_zasubs1 |
| 86759 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86760 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86761 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86762 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86763 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86764 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86765 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86766 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86767 | 381, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86768 | 381, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86769 | 381, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86770 | 381, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86771 | 381, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86772 | 381, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86773 | 381, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86774 | 381, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86775 | 381, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86776 | 381, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86777 | 381, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86778 | 381, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86779 | 381, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86780 | 381, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86781 | 381, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86782 | 381, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86783 | 381, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86784 | 381, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86785 | 0, // psub1_then_psub |
| 86786 | 381, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86787 | 381, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86788 | 381, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86789 | 0, // x8sub_7_then_sub_32 |
| 86790 | 0, // x8sub_7_then_sub_32_hi |
| 86791 | 0, // x8sub_6_then_sub_32 |
| 86792 | 0, // x8sub_6_then_sub_32_hi |
| 86793 | 0, // x8sub_5_then_sub_32 |
| 86794 | 0, // x8sub_5_then_sub_32_hi |
| 86795 | 0, // x8sub_4_then_sub_32 |
| 86796 | 0, // x8sub_4_then_sub_32_hi |
| 86797 | 0, // x8sub_3_then_sub_32 |
| 86798 | 0, // x8sub_3_then_sub_32_hi |
| 86799 | 0, // x8sub_2_then_sub_32 |
| 86800 | 0, // x8sub_2_then_sub_32_hi |
| 86801 | 0, // x8sub_1_then_sub_32 |
| 86802 | 0, // x8sub_1_then_sub_32_hi |
| 86803 | 0, // subo64_then_sub_32 |
| 86804 | 0, // subo64_then_sub_32_hi |
| 86805 | 381, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86806 | 381, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86807 | 381, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86808 | 0, // dsub0_dsub1 |
| 86809 | 0, // dsub0_dsub1_dsub2 |
| 86810 | 0, // dsub1_dsub2 |
| 86811 | 0, // dsub1_dsub2_dsub3 |
| 86812 | 0, // dsub2_dsub3 |
| 86813 | 0, // dsub_dsub1 |
| 86814 | 0, // dsub_dsub1_dsub2_dsub3 |
| 86815 | 0, // dsub_dsub1_dsub2 |
| 86816 | 0, // qsub0_qsub1 |
| 86817 | 0, // qsub0_qsub1_qsub2 |
| 86818 | 0, // qsub1_qsub2 |
| 86819 | 0, // qsub1_qsub2_qsub3 |
| 86820 | 0, // qsub2_qsub3 |
| 86821 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86822 | 0, // x8sub_0_x8sub_1 |
| 86823 | 0, // x8sub_2_x8sub_3 |
| 86824 | 0, // x8sub_4_x8sub_5 |
| 86825 | 0, // x8sub_6_x8sub_7 |
| 86826 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86827 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86828 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86829 | 0, // sub_32_subo64_then_sub_32 |
| 86830 | 0, // zsub_qsub1 |
| 86831 | 0, // zsub_qsub1_qsub2_qsub3 |
| 86832 | 0, // zsub_qsub1_qsub2 |
| 86833 | 0, // zsub0_zsub1 |
| 86834 | 0, // zsub0_zsub1_zsub2 |
| 86835 | 0, // zsub1_zsub2 |
| 86836 | 0, // zsub1_zsub2_zsub3 |
| 86837 | 0, // zsub2_zsub3 |
| 86838 | 381, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86839 | 381, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 86840 | }, |
| 86841 | { // ZPR4Strided_with_zsub1_in_ZPR_K |
| 86842 | 382, // bsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86843 | 382, // bsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86844 | 382, // dsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86845 | 0, // dsub0 |
| 86846 | 382, // dsub1 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86847 | 382, // dsub2 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86848 | 382, // dsub3 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86849 | 382, // dsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86850 | 382, // hsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86851 | 382, // hsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86852 | 0, // psub |
| 86853 | 0, // psub0 |
| 86854 | 0, // psub1 |
| 86855 | 0, // qsub0 |
| 86856 | 382, // qsub1 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86857 | 382, // qsub2 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86858 | 382, // qsub3 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86859 | 382, // ssub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86860 | 382, // ssub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86861 | 0, // sub_32 |
| 86862 | 0, // sub_32_hi |
| 86863 | 0, // sube32 |
| 86864 | 0, // sube64 |
| 86865 | 0, // subo32 |
| 86866 | 0, // subo64 |
| 86867 | 0, // x8sub_0 |
| 86868 | 0, // x8sub_1 |
| 86869 | 0, // x8sub_2 |
| 86870 | 0, // x8sub_3 |
| 86871 | 0, // x8sub_4 |
| 86872 | 0, // x8sub_5 |
| 86873 | 0, // x8sub_6 |
| 86874 | 0, // x8sub_7 |
| 86875 | 0, // zasubb |
| 86876 | 0, // zasubd0 |
| 86877 | 0, // zasubd1 |
| 86878 | 0, // zasubh0 |
| 86879 | 0, // zasubh1 |
| 86880 | 0, // zasubq0 |
| 86881 | 0, // zasubq1 |
| 86882 | 0, // zasubs0 |
| 86883 | 0, // zasubs1 |
| 86884 | 382, // zsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86885 | 382, // zsub0 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86886 | 382, // zsub1 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86887 | 382, // zsub2 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86888 | 382, // zsub3 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86889 | 382, // zsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86890 | 0, // zasubd1_then_zasubq0 |
| 86891 | 0, // zasubd1_then_zasubq1 |
| 86892 | 0, // zasubs1_then_zasubd0 |
| 86893 | 0, // zasubs1_then_zasubd1 |
| 86894 | 0, // zasubs1_then_zasubq0 |
| 86895 | 0, // zasubs1_then_zasubq1 |
| 86896 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 86897 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 86898 | 0, // zasubh1_then_zasubd0 |
| 86899 | 0, // zasubh1_then_zasubd1 |
| 86900 | 0, // zasubh1_then_zasubq0 |
| 86901 | 0, // zasubh1_then_zasubq1 |
| 86902 | 0, // zasubh1_then_zasubs0 |
| 86903 | 0, // zasubh1_then_zasubs1 |
| 86904 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 86905 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 86906 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 86907 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 86908 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 86909 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 86910 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 86911 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 86912 | 382, // dsub1_then_bsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86913 | 382, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86914 | 382, // dsub1_then_hsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86915 | 382, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86916 | 382, // dsub1_then_ssub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86917 | 382, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86918 | 382, // dsub3_then_bsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86919 | 382, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86920 | 382, // dsub3_then_hsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86921 | 382, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86922 | 382, // dsub3_then_ssub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86923 | 382, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86924 | 382, // dsub2_then_bsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86925 | 382, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86926 | 382, // dsub2_then_hsub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86927 | 382, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86928 | 382, // dsub2_then_ssub -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86929 | 382, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86930 | 0, // psub1_then_psub |
| 86931 | 382, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86932 | 382, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86933 | 382, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86934 | 0, // x8sub_7_then_sub_32 |
| 86935 | 0, // x8sub_7_then_sub_32_hi |
| 86936 | 0, // x8sub_6_then_sub_32 |
| 86937 | 0, // x8sub_6_then_sub_32_hi |
| 86938 | 0, // x8sub_5_then_sub_32 |
| 86939 | 0, // x8sub_5_then_sub_32_hi |
| 86940 | 0, // x8sub_4_then_sub_32 |
| 86941 | 0, // x8sub_4_then_sub_32_hi |
| 86942 | 0, // x8sub_3_then_sub_32 |
| 86943 | 0, // x8sub_3_then_sub_32_hi |
| 86944 | 0, // x8sub_2_then_sub_32 |
| 86945 | 0, // x8sub_2_then_sub_32_hi |
| 86946 | 0, // x8sub_1_then_sub_32 |
| 86947 | 0, // x8sub_1_then_sub_32_hi |
| 86948 | 0, // subo64_then_sub_32 |
| 86949 | 0, // subo64_then_sub_32_hi |
| 86950 | 382, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86951 | 382, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86952 | 382, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86953 | 0, // dsub0_dsub1 |
| 86954 | 0, // dsub0_dsub1_dsub2 |
| 86955 | 0, // dsub1_dsub2 |
| 86956 | 0, // dsub1_dsub2_dsub3 |
| 86957 | 0, // dsub2_dsub3 |
| 86958 | 0, // dsub_dsub1 |
| 86959 | 0, // dsub_dsub1_dsub2_dsub3 |
| 86960 | 0, // dsub_dsub1_dsub2 |
| 86961 | 0, // qsub0_qsub1 |
| 86962 | 0, // qsub0_qsub1_qsub2 |
| 86963 | 0, // qsub1_qsub2 |
| 86964 | 0, // qsub1_qsub2_qsub3 |
| 86965 | 0, // qsub2_qsub3 |
| 86966 | 0, // sub_32_x8sub_1_then_sub_32 |
| 86967 | 0, // x8sub_0_x8sub_1 |
| 86968 | 0, // x8sub_2_x8sub_3 |
| 86969 | 0, // x8sub_4_x8sub_5 |
| 86970 | 0, // x8sub_6_x8sub_7 |
| 86971 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 86972 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 86973 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 86974 | 0, // sub_32_subo64_then_sub_32 |
| 86975 | 0, // zsub_qsub1 |
| 86976 | 0, // zsub_qsub1_qsub2_qsub3 |
| 86977 | 0, // zsub_qsub1_qsub2 |
| 86978 | 0, // zsub0_zsub1 |
| 86979 | 0, // zsub0_zsub1_zsub2 |
| 86980 | 0, // zsub1_zsub2 |
| 86981 | 0, // zsub1_zsub2_zsub3 |
| 86982 | 0, // zsub2_zsub3 |
| 86983 | 382, // zsub0_zsub2 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86984 | 382, // zsub1_zsub3 -> ZPR4Strided_with_zsub1_in_ZPR_K |
| 86985 | }, |
| 86986 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86987 | 383, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86988 | 383, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86989 | 383, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86990 | 0, // dsub0 |
| 86991 | 383, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86992 | 383, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86993 | 383, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86994 | 383, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86995 | 383, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86996 | 383, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 86997 | 0, // psub |
| 86998 | 0, // psub0 |
| 86999 | 0, // psub1 |
| 87000 | 0, // qsub0 |
| 87001 | 383, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87002 | 383, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87003 | 383, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87004 | 383, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87005 | 383, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87006 | 0, // sub_32 |
| 87007 | 0, // sub_32_hi |
| 87008 | 0, // sube32 |
| 87009 | 0, // sube64 |
| 87010 | 0, // subo32 |
| 87011 | 0, // subo64 |
| 87012 | 0, // x8sub_0 |
| 87013 | 0, // x8sub_1 |
| 87014 | 0, // x8sub_2 |
| 87015 | 0, // x8sub_3 |
| 87016 | 0, // x8sub_4 |
| 87017 | 0, // x8sub_5 |
| 87018 | 0, // x8sub_6 |
| 87019 | 0, // x8sub_7 |
| 87020 | 0, // zasubb |
| 87021 | 0, // zasubd0 |
| 87022 | 0, // zasubd1 |
| 87023 | 0, // zasubh0 |
| 87024 | 0, // zasubh1 |
| 87025 | 0, // zasubq0 |
| 87026 | 0, // zasubq1 |
| 87027 | 0, // zasubs0 |
| 87028 | 0, // zasubs1 |
| 87029 | 383, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87030 | 383, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87031 | 383, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87032 | 383, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87033 | 383, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87034 | 383, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87035 | 0, // zasubd1_then_zasubq0 |
| 87036 | 0, // zasubd1_then_zasubq1 |
| 87037 | 0, // zasubs1_then_zasubd0 |
| 87038 | 0, // zasubs1_then_zasubd1 |
| 87039 | 0, // zasubs1_then_zasubq0 |
| 87040 | 0, // zasubs1_then_zasubq1 |
| 87041 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87042 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87043 | 0, // zasubh1_then_zasubd0 |
| 87044 | 0, // zasubh1_then_zasubd1 |
| 87045 | 0, // zasubh1_then_zasubq0 |
| 87046 | 0, // zasubh1_then_zasubq1 |
| 87047 | 0, // zasubh1_then_zasubs0 |
| 87048 | 0, // zasubh1_then_zasubs1 |
| 87049 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87050 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87051 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87052 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87053 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87054 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87055 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87056 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87057 | 383, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87058 | 383, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87059 | 383, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87060 | 383, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87061 | 383, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87062 | 383, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87063 | 383, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87064 | 383, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87065 | 383, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87066 | 383, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87067 | 383, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87068 | 383, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87069 | 383, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87070 | 383, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87071 | 383, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87072 | 383, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87073 | 383, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87074 | 383, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87075 | 0, // psub1_then_psub |
| 87076 | 383, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87077 | 383, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87078 | 383, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87079 | 0, // x8sub_7_then_sub_32 |
| 87080 | 0, // x8sub_7_then_sub_32_hi |
| 87081 | 0, // x8sub_6_then_sub_32 |
| 87082 | 0, // x8sub_6_then_sub_32_hi |
| 87083 | 0, // x8sub_5_then_sub_32 |
| 87084 | 0, // x8sub_5_then_sub_32_hi |
| 87085 | 0, // x8sub_4_then_sub_32 |
| 87086 | 0, // x8sub_4_then_sub_32_hi |
| 87087 | 0, // x8sub_3_then_sub_32 |
| 87088 | 0, // x8sub_3_then_sub_32_hi |
| 87089 | 0, // x8sub_2_then_sub_32 |
| 87090 | 0, // x8sub_2_then_sub_32_hi |
| 87091 | 0, // x8sub_1_then_sub_32 |
| 87092 | 0, // x8sub_1_then_sub_32_hi |
| 87093 | 0, // subo64_then_sub_32 |
| 87094 | 0, // subo64_then_sub_32_hi |
| 87095 | 383, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87096 | 383, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87097 | 383, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87098 | 0, // dsub0_dsub1 |
| 87099 | 0, // dsub0_dsub1_dsub2 |
| 87100 | 383, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87101 | 383, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87102 | 383, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87103 | 383, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87104 | 383, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87105 | 383, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87106 | 0, // qsub0_qsub1 |
| 87107 | 0, // qsub0_qsub1_qsub2 |
| 87108 | 383, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87109 | 383, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87110 | 383, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87111 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87112 | 0, // x8sub_0_x8sub_1 |
| 87113 | 0, // x8sub_2_x8sub_3 |
| 87114 | 0, // x8sub_4_x8sub_5 |
| 87115 | 0, // x8sub_6_x8sub_7 |
| 87116 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87117 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87118 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87119 | 0, // sub_32_subo64_then_sub_32 |
| 87120 | 383, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87121 | 383, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87122 | 383, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87123 | 383, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87124 | 383, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87125 | 383, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87126 | 383, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87127 | 383, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 87128 | 0, // zsub0_zsub2 |
| 87129 | 0, // zsub1_zsub3 |
| 87130 | }, |
| 87131 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87132 | 384, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87133 | 384, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87134 | 384, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87135 | 0, // dsub0 |
| 87136 | 384, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87137 | 384, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87138 | 384, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87139 | 384, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87140 | 384, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87141 | 384, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87142 | 0, // psub |
| 87143 | 0, // psub0 |
| 87144 | 0, // psub1 |
| 87145 | 0, // qsub0 |
| 87146 | 384, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87147 | 384, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87148 | 384, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87149 | 384, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87150 | 384, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87151 | 0, // sub_32 |
| 87152 | 0, // sub_32_hi |
| 87153 | 0, // sube32 |
| 87154 | 0, // sube64 |
| 87155 | 0, // subo32 |
| 87156 | 0, // subo64 |
| 87157 | 0, // x8sub_0 |
| 87158 | 0, // x8sub_1 |
| 87159 | 0, // x8sub_2 |
| 87160 | 0, // x8sub_3 |
| 87161 | 0, // x8sub_4 |
| 87162 | 0, // x8sub_5 |
| 87163 | 0, // x8sub_6 |
| 87164 | 0, // x8sub_7 |
| 87165 | 0, // zasubb |
| 87166 | 0, // zasubd0 |
| 87167 | 0, // zasubd1 |
| 87168 | 0, // zasubh0 |
| 87169 | 0, // zasubh1 |
| 87170 | 0, // zasubq0 |
| 87171 | 0, // zasubq1 |
| 87172 | 0, // zasubs0 |
| 87173 | 0, // zasubs1 |
| 87174 | 384, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87175 | 384, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87176 | 384, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87177 | 384, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87178 | 384, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87179 | 384, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87180 | 0, // zasubd1_then_zasubq0 |
| 87181 | 0, // zasubd1_then_zasubq1 |
| 87182 | 0, // zasubs1_then_zasubd0 |
| 87183 | 0, // zasubs1_then_zasubd1 |
| 87184 | 0, // zasubs1_then_zasubq0 |
| 87185 | 0, // zasubs1_then_zasubq1 |
| 87186 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87187 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87188 | 0, // zasubh1_then_zasubd0 |
| 87189 | 0, // zasubh1_then_zasubd1 |
| 87190 | 0, // zasubh1_then_zasubq0 |
| 87191 | 0, // zasubh1_then_zasubq1 |
| 87192 | 0, // zasubh1_then_zasubs0 |
| 87193 | 0, // zasubh1_then_zasubs1 |
| 87194 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87195 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87196 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87197 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87198 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87199 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87200 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87201 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87202 | 384, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87203 | 384, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87204 | 384, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87205 | 384, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87206 | 384, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87207 | 384, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87208 | 384, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87209 | 384, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87210 | 384, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87211 | 384, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87212 | 384, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87213 | 384, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87214 | 384, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87215 | 384, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87216 | 384, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87217 | 384, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87218 | 384, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87219 | 384, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87220 | 0, // psub1_then_psub |
| 87221 | 384, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87222 | 384, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87223 | 384, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87224 | 0, // x8sub_7_then_sub_32 |
| 87225 | 0, // x8sub_7_then_sub_32_hi |
| 87226 | 0, // x8sub_6_then_sub_32 |
| 87227 | 0, // x8sub_6_then_sub_32_hi |
| 87228 | 0, // x8sub_5_then_sub_32 |
| 87229 | 0, // x8sub_5_then_sub_32_hi |
| 87230 | 0, // x8sub_4_then_sub_32 |
| 87231 | 0, // x8sub_4_then_sub_32_hi |
| 87232 | 0, // x8sub_3_then_sub_32 |
| 87233 | 0, // x8sub_3_then_sub_32_hi |
| 87234 | 0, // x8sub_2_then_sub_32 |
| 87235 | 0, // x8sub_2_then_sub_32_hi |
| 87236 | 0, // x8sub_1_then_sub_32 |
| 87237 | 0, // x8sub_1_then_sub_32_hi |
| 87238 | 0, // subo64_then_sub_32 |
| 87239 | 0, // subo64_then_sub_32_hi |
| 87240 | 384, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87241 | 384, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87242 | 384, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87243 | 0, // dsub0_dsub1 |
| 87244 | 0, // dsub0_dsub1_dsub2 |
| 87245 | 384, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87246 | 384, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87247 | 384, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87248 | 384, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87249 | 384, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87250 | 384, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87251 | 0, // qsub0_qsub1 |
| 87252 | 0, // qsub0_qsub1_qsub2 |
| 87253 | 384, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87254 | 384, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87255 | 384, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87256 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87257 | 0, // x8sub_0_x8sub_1 |
| 87258 | 0, // x8sub_2_x8sub_3 |
| 87259 | 0, // x8sub_4_x8sub_5 |
| 87260 | 0, // x8sub_6_x8sub_7 |
| 87261 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87262 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87263 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87264 | 0, // sub_32_subo64_then_sub_32 |
| 87265 | 384, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87266 | 384, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87267 | 384, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87268 | 384, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87269 | 384, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87270 | 384, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87271 | 384, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87272 | 384, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 87273 | 0, // zsub0_zsub2 |
| 87274 | 0, // zsub1_zsub3 |
| 87275 | }, |
| 87276 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87277 | 385, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87278 | 385, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87279 | 385, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87280 | 0, // dsub0 |
| 87281 | 385, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87282 | 385, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87283 | 385, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87284 | 385, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87285 | 385, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87286 | 385, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87287 | 0, // psub |
| 87288 | 0, // psub0 |
| 87289 | 0, // psub1 |
| 87290 | 0, // qsub0 |
| 87291 | 385, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87292 | 385, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87293 | 385, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87294 | 385, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87295 | 385, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87296 | 0, // sub_32 |
| 87297 | 0, // sub_32_hi |
| 87298 | 0, // sube32 |
| 87299 | 0, // sube64 |
| 87300 | 0, // subo32 |
| 87301 | 0, // subo64 |
| 87302 | 0, // x8sub_0 |
| 87303 | 0, // x8sub_1 |
| 87304 | 0, // x8sub_2 |
| 87305 | 0, // x8sub_3 |
| 87306 | 0, // x8sub_4 |
| 87307 | 0, // x8sub_5 |
| 87308 | 0, // x8sub_6 |
| 87309 | 0, // x8sub_7 |
| 87310 | 0, // zasubb |
| 87311 | 0, // zasubd0 |
| 87312 | 0, // zasubd1 |
| 87313 | 0, // zasubh0 |
| 87314 | 0, // zasubh1 |
| 87315 | 0, // zasubq0 |
| 87316 | 0, // zasubq1 |
| 87317 | 0, // zasubs0 |
| 87318 | 0, // zasubs1 |
| 87319 | 385, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87320 | 385, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87321 | 385, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87322 | 385, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87323 | 385, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87324 | 385, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87325 | 0, // zasubd1_then_zasubq0 |
| 87326 | 0, // zasubd1_then_zasubq1 |
| 87327 | 0, // zasubs1_then_zasubd0 |
| 87328 | 0, // zasubs1_then_zasubd1 |
| 87329 | 0, // zasubs1_then_zasubq0 |
| 87330 | 0, // zasubs1_then_zasubq1 |
| 87331 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87332 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87333 | 0, // zasubh1_then_zasubd0 |
| 87334 | 0, // zasubh1_then_zasubd1 |
| 87335 | 0, // zasubh1_then_zasubq0 |
| 87336 | 0, // zasubh1_then_zasubq1 |
| 87337 | 0, // zasubh1_then_zasubs0 |
| 87338 | 0, // zasubh1_then_zasubs1 |
| 87339 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87340 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87341 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87342 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87343 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87344 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87345 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87346 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87347 | 385, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87348 | 385, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87349 | 385, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87350 | 385, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87351 | 385, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87352 | 385, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87353 | 385, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87354 | 385, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87355 | 385, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87356 | 385, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87357 | 385, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87358 | 385, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87359 | 385, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87360 | 385, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87361 | 385, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87362 | 385, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87363 | 385, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87364 | 385, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87365 | 0, // psub1_then_psub |
| 87366 | 385, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87367 | 385, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87368 | 385, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87369 | 0, // x8sub_7_then_sub_32 |
| 87370 | 0, // x8sub_7_then_sub_32_hi |
| 87371 | 0, // x8sub_6_then_sub_32 |
| 87372 | 0, // x8sub_6_then_sub_32_hi |
| 87373 | 0, // x8sub_5_then_sub_32 |
| 87374 | 0, // x8sub_5_then_sub_32_hi |
| 87375 | 0, // x8sub_4_then_sub_32 |
| 87376 | 0, // x8sub_4_then_sub_32_hi |
| 87377 | 0, // x8sub_3_then_sub_32 |
| 87378 | 0, // x8sub_3_then_sub_32_hi |
| 87379 | 0, // x8sub_2_then_sub_32 |
| 87380 | 0, // x8sub_2_then_sub_32_hi |
| 87381 | 0, // x8sub_1_then_sub_32 |
| 87382 | 0, // x8sub_1_then_sub_32_hi |
| 87383 | 0, // subo64_then_sub_32 |
| 87384 | 0, // subo64_then_sub_32_hi |
| 87385 | 385, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87386 | 385, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87387 | 385, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87388 | 0, // dsub0_dsub1 |
| 87389 | 0, // dsub0_dsub1_dsub2 |
| 87390 | 385, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87391 | 385, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87392 | 385, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87393 | 385, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87394 | 385, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87395 | 385, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87396 | 0, // qsub0_qsub1 |
| 87397 | 0, // qsub0_qsub1_qsub2 |
| 87398 | 385, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87399 | 385, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87400 | 385, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87401 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87402 | 0, // x8sub_0_x8sub_1 |
| 87403 | 0, // x8sub_2_x8sub_3 |
| 87404 | 0, // x8sub_4_x8sub_5 |
| 87405 | 0, // x8sub_6_x8sub_7 |
| 87406 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87407 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87408 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87409 | 0, // sub_32_subo64_then_sub_32 |
| 87410 | 385, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87411 | 385, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87412 | 385, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87413 | 385, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87414 | 385, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87415 | 385, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87416 | 385, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87417 | 385, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87418 | 0, // zsub0_zsub2 |
| 87419 | 0, // zsub1_zsub3 |
| 87420 | }, |
| 87421 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87422 | 386, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87423 | 386, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87424 | 386, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87425 | 0, // dsub0 |
| 87426 | 386, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87427 | 386, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87428 | 386, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87429 | 386, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87430 | 386, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87431 | 386, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87432 | 0, // psub |
| 87433 | 0, // psub0 |
| 87434 | 0, // psub1 |
| 87435 | 0, // qsub0 |
| 87436 | 386, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87437 | 386, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87438 | 386, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87439 | 386, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87440 | 386, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87441 | 0, // sub_32 |
| 87442 | 0, // sub_32_hi |
| 87443 | 0, // sube32 |
| 87444 | 0, // sube64 |
| 87445 | 0, // subo32 |
| 87446 | 0, // subo64 |
| 87447 | 0, // x8sub_0 |
| 87448 | 0, // x8sub_1 |
| 87449 | 0, // x8sub_2 |
| 87450 | 0, // x8sub_3 |
| 87451 | 0, // x8sub_4 |
| 87452 | 0, // x8sub_5 |
| 87453 | 0, // x8sub_6 |
| 87454 | 0, // x8sub_7 |
| 87455 | 0, // zasubb |
| 87456 | 0, // zasubd0 |
| 87457 | 0, // zasubd1 |
| 87458 | 0, // zasubh0 |
| 87459 | 0, // zasubh1 |
| 87460 | 0, // zasubq0 |
| 87461 | 0, // zasubq1 |
| 87462 | 0, // zasubs0 |
| 87463 | 0, // zasubs1 |
| 87464 | 386, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87465 | 386, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87466 | 386, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87467 | 386, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87468 | 386, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87469 | 386, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87470 | 0, // zasubd1_then_zasubq0 |
| 87471 | 0, // zasubd1_then_zasubq1 |
| 87472 | 0, // zasubs1_then_zasubd0 |
| 87473 | 0, // zasubs1_then_zasubd1 |
| 87474 | 0, // zasubs1_then_zasubq0 |
| 87475 | 0, // zasubs1_then_zasubq1 |
| 87476 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87477 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87478 | 0, // zasubh1_then_zasubd0 |
| 87479 | 0, // zasubh1_then_zasubd1 |
| 87480 | 0, // zasubh1_then_zasubq0 |
| 87481 | 0, // zasubh1_then_zasubq1 |
| 87482 | 0, // zasubh1_then_zasubs0 |
| 87483 | 0, // zasubh1_then_zasubs1 |
| 87484 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87485 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87486 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87487 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87488 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87489 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87490 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87491 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87492 | 386, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87493 | 386, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87494 | 386, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87495 | 386, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87496 | 386, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87497 | 386, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87498 | 386, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87499 | 386, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87500 | 386, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87501 | 386, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87502 | 386, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87503 | 386, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87504 | 386, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87505 | 386, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87506 | 386, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87507 | 386, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87508 | 386, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87509 | 386, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87510 | 0, // psub1_then_psub |
| 87511 | 386, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87512 | 386, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87513 | 386, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87514 | 0, // x8sub_7_then_sub_32 |
| 87515 | 0, // x8sub_7_then_sub_32_hi |
| 87516 | 0, // x8sub_6_then_sub_32 |
| 87517 | 0, // x8sub_6_then_sub_32_hi |
| 87518 | 0, // x8sub_5_then_sub_32 |
| 87519 | 0, // x8sub_5_then_sub_32_hi |
| 87520 | 0, // x8sub_4_then_sub_32 |
| 87521 | 0, // x8sub_4_then_sub_32_hi |
| 87522 | 0, // x8sub_3_then_sub_32 |
| 87523 | 0, // x8sub_3_then_sub_32_hi |
| 87524 | 0, // x8sub_2_then_sub_32 |
| 87525 | 0, // x8sub_2_then_sub_32_hi |
| 87526 | 0, // x8sub_1_then_sub_32 |
| 87527 | 0, // x8sub_1_then_sub_32_hi |
| 87528 | 0, // subo64_then_sub_32 |
| 87529 | 0, // subo64_then_sub_32_hi |
| 87530 | 386, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87531 | 386, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87532 | 386, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87533 | 0, // dsub0_dsub1 |
| 87534 | 0, // dsub0_dsub1_dsub2 |
| 87535 | 386, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87536 | 386, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87537 | 386, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87538 | 386, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87539 | 386, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87540 | 386, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87541 | 0, // qsub0_qsub1 |
| 87542 | 0, // qsub0_qsub1_qsub2 |
| 87543 | 386, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87544 | 386, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87545 | 386, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87546 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87547 | 0, // x8sub_0_x8sub_1 |
| 87548 | 0, // x8sub_2_x8sub_3 |
| 87549 | 0, // x8sub_4_x8sub_5 |
| 87550 | 0, // x8sub_6_x8sub_7 |
| 87551 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87552 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87553 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87554 | 0, // sub_32_subo64_then_sub_32 |
| 87555 | 386, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87556 | 386, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87557 | 386, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87558 | 386, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87559 | 386, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87560 | 386, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87561 | 386, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87562 | 386, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 87563 | 0, // zsub0_zsub2 |
| 87564 | 0, // zsub1_zsub3 |
| 87565 | }, |
| 87566 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87567 | 387, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87568 | 387, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87569 | 387, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87570 | 0, // dsub0 |
| 87571 | 387, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87572 | 387, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87573 | 387, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87574 | 387, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87575 | 387, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87576 | 387, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87577 | 0, // psub |
| 87578 | 0, // psub0 |
| 87579 | 0, // psub1 |
| 87580 | 0, // qsub0 |
| 87581 | 387, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87582 | 387, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87583 | 387, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87584 | 387, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87585 | 387, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87586 | 0, // sub_32 |
| 87587 | 0, // sub_32_hi |
| 87588 | 0, // sube32 |
| 87589 | 0, // sube64 |
| 87590 | 0, // subo32 |
| 87591 | 0, // subo64 |
| 87592 | 0, // x8sub_0 |
| 87593 | 0, // x8sub_1 |
| 87594 | 0, // x8sub_2 |
| 87595 | 0, // x8sub_3 |
| 87596 | 0, // x8sub_4 |
| 87597 | 0, // x8sub_5 |
| 87598 | 0, // x8sub_6 |
| 87599 | 0, // x8sub_7 |
| 87600 | 0, // zasubb |
| 87601 | 0, // zasubd0 |
| 87602 | 0, // zasubd1 |
| 87603 | 0, // zasubh0 |
| 87604 | 0, // zasubh1 |
| 87605 | 0, // zasubq0 |
| 87606 | 0, // zasubq1 |
| 87607 | 0, // zasubs0 |
| 87608 | 0, // zasubs1 |
| 87609 | 387, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87610 | 387, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87611 | 387, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87612 | 387, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87613 | 387, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87614 | 387, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87615 | 0, // zasubd1_then_zasubq0 |
| 87616 | 0, // zasubd1_then_zasubq1 |
| 87617 | 0, // zasubs1_then_zasubd0 |
| 87618 | 0, // zasubs1_then_zasubd1 |
| 87619 | 0, // zasubs1_then_zasubq0 |
| 87620 | 0, // zasubs1_then_zasubq1 |
| 87621 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87622 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87623 | 0, // zasubh1_then_zasubd0 |
| 87624 | 0, // zasubh1_then_zasubd1 |
| 87625 | 0, // zasubh1_then_zasubq0 |
| 87626 | 0, // zasubh1_then_zasubq1 |
| 87627 | 0, // zasubh1_then_zasubs0 |
| 87628 | 0, // zasubh1_then_zasubs1 |
| 87629 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87630 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87631 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87632 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87633 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87634 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87635 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87636 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87637 | 387, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87638 | 387, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87639 | 387, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87640 | 387, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87641 | 387, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87642 | 387, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87643 | 387, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87644 | 387, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87645 | 387, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87646 | 387, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87647 | 387, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87648 | 387, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87649 | 387, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87650 | 387, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87651 | 387, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87652 | 387, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87653 | 387, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87654 | 387, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87655 | 0, // psub1_then_psub |
| 87656 | 387, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87657 | 387, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87658 | 387, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87659 | 0, // x8sub_7_then_sub_32 |
| 87660 | 0, // x8sub_7_then_sub_32_hi |
| 87661 | 0, // x8sub_6_then_sub_32 |
| 87662 | 0, // x8sub_6_then_sub_32_hi |
| 87663 | 0, // x8sub_5_then_sub_32 |
| 87664 | 0, // x8sub_5_then_sub_32_hi |
| 87665 | 0, // x8sub_4_then_sub_32 |
| 87666 | 0, // x8sub_4_then_sub_32_hi |
| 87667 | 0, // x8sub_3_then_sub_32 |
| 87668 | 0, // x8sub_3_then_sub_32_hi |
| 87669 | 0, // x8sub_2_then_sub_32 |
| 87670 | 0, // x8sub_2_then_sub_32_hi |
| 87671 | 0, // x8sub_1_then_sub_32 |
| 87672 | 0, // x8sub_1_then_sub_32_hi |
| 87673 | 0, // subo64_then_sub_32 |
| 87674 | 0, // subo64_then_sub_32_hi |
| 87675 | 387, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87676 | 387, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87677 | 387, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87678 | 0, // dsub0_dsub1 |
| 87679 | 0, // dsub0_dsub1_dsub2 |
| 87680 | 387, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87681 | 387, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87682 | 387, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87683 | 387, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87684 | 387, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87685 | 387, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87686 | 0, // qsub0_qsub1 |
| 87687 | 0, // qsub0_qsub1_qsub2 |
| 87688 | 387, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87689 | 387, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87690 | 387, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87691 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87692 | 0, // x8sub_0_x8sub_1 |
| 87693 | 0, // x8sub_2_x8sub_3 |
| 87694 | 0, // x8sub_4_x8sub_5 |
| 87695 | 0, // x8sub_6_x8sub_7 |
| 87696 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87697 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87698 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87699 | 0, // sub_32_subo64_then_sub_32 |
| 87700 | 387, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87701 | 387, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87702 | 387, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87703 | 387, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87704 | 387, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87705 | 387, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87706 | 387, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87707 | 387, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 87708 | 0, // zsub0_zsub2 |
| 87709 | 0, // zsub1_zsub3 |
| 87710 | }, |
| 87711 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87712 | 388, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87713 | 388, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87714 | 388, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87715 | 0, // dsub0 |
| 87716 | 388, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87717 | 388, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87718 | 388, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87719 | 388, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87720 | 388, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87721 | 388, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87722 | 0, // psub |
| 87723 | 0, // psub0 |
| 87724 | 0, // psub1 |
| 87725 | 0, // qsub0 |
| 87726 | 388, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87727 | 388, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87728 | 388, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87729 | 388, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87730 | 388, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87731 | 0, // sub_32 |
| 87732 | 0, // sub_32_hi |
| 87733 | 0, // sube32 |
| 87734 | 0, // sube64 |
| 87735 | 0, // subo32 |
| 87736 | 0, // subo64 |
| 87737 | 0, // x8sub_0 |
| 87738 | 0, // x8sub_1 |
| 87739 | 0, // x8sub_2 |
| 87740 | 0, // x8sub_3 |
| 87741 | 0, // x8sub_4 |
| 87742 | 0, // x8sub_5 |
| 87743 | 0, // x8sub_6 |
| 87744 | 0, // x8sub_7 |
| 87745 | 0, // zasubb |
| 87746 | 0, // zasubd0 |
| 87747 | 0, // zasubd1 |
| 87748 | 0, // zasubh0 |
| 87749 | 0, // zasubh1 |
| 87750 | 0, // zasubq0 |
| 87751 | 0, // zasubq1 |
| 87752 | 0, // zasubs0 |
| 87753 | 0, // zasubs1 |
| 87754 | 388, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87755 | 388, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87756 | 388, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87757 | 388, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87758 | 388, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87759 | 388, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87760 | 0, // zasubd1_then_zasubq0 |
| 87761 | 0, // zasubd1_then_zasubq1 |
| 87762 | 0, // zasubs1_then_zasubd0 |
| 87763 | 0, // zasubs1_then_zasubd1 |
| 87764 | 0, // zasubs1_then_zasubq0 |
| 87765 | 0, // zasubs1_then_zasubq1 |
| 87766 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87767 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87768 | 0, // zasubh1_then_zasubd0 |
| 87769 | 0, // zasubh1_then_zasubd1 |
| 87770 | 0, // zasubh1_then_zasubq0 |
| 87771 | 0, // zasubh1_then_zasubq1 |
| 87772 | 0, // zasubh1_then_zasubs0 |
| 87773 | 0, // zasubh1_then_zasubs1 |
| 87774 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87775 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87776 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87777 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87778 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87779 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87780 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87781 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87782 | 388, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87783 | 388, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87784 | 388, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87785 | 388, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87786 | 388, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87787 | 388, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87788 | 388, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87789 | 388, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87790 | 388, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87791 | 388, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87792 | 388, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87793 | 388, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87794 | 388, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87795 | 388, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87796 | 388, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87797 | 388, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87798 | 388, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87799 | 388, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87800 | 0, // psub1_then_psub |
| 87801 | 388, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87802 | 388, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87803 | 388, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87804 | 0, // x8sub_7_then_sub_32 |
| 87805 | 0, // x8sub_7_then_sub_32_hi |
| 87806 | 0, // x8sub_6_then_sub_32 |
| 87807 | 0, // x8sub_6_then_sub_32_hi |
| 87808 | 0, // x8sub_5_then_sub_32 |
| 87809 | 0, // x8sub_5_then_sub_32_hi |
| 87810 | 0, // x8sub_4_then_sub_32 |
| 87811 | 0, // x8sub_4_then_sub_32_hi |
| 87812 | 0, // x8sub_3_then_sub_32 |
| 87813 | 0, // x8sub_3_then_sub_32_hi |
| 87814 | 0, // x8sub_2_then_sub_32 |
| 87815 | 0, // x8sub_2_then_sub_32_hi |
| 87816 | 0, // x8sub_1_then_sub_32 |
| 87817 | 0, // x8sub_1_then_sub_32_hi |
| 87818 | 0, // subo64_then_sub_32 |
| 87819 | 0, // subo64_then_sub_32_hi |
| 87820 | 388, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87821 | 388, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87822 | 388, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87823 | 0, // dsub0_dsub1 |
| 87824 | 0, // dsub0_dsub1_dsub2 |
| 87825 | 388, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87826 | 388, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87827 | 388, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87828 | 388, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87829 | 388, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87830 | 388, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87831 | 0, // qsub0_qsub1 |
| 87832 | 0, // qsub0_qsub1_qsub2 |
| 87833 | 388, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87834 | 388, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87835 | 388, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87836 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87837 | 0, // x8sub_0_x8sub_1 |
| 87838 | 0, // x8sub_2_x8sub_3 |
| 87839 | 0, // x8sub_4_x8sub_5 |
| 87840 | 0, // x8sub_6_x8sub_7 |
| 87841 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87842 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87843 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87844 | 0, // sub_32_subo64_then_sub_32 |
| 87845 | 388, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87846 | 388, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87847 | 388, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87848 | 388, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87849 | 388, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87850 | 388, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87851 | 388, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87852 | 388, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 87853 | 0, // zsub0_zsub2 |
| 87854 | 0, // zsub1_zsub3 |
| 87855 | }, |
| 87856 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87857 | 389, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87858 | 389, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87859 | 389, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87860 | 0, // dsub0 |
| 87861 | 389, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87862 | 389, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87863 | 389, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87864 | 389, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87865 | 389, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87866 | 389, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87867 | 0, // psub |
| 87868 | 0, // psub0 |
| 87869 | 0, // psub1 |
| 87870 | 0, // qsub0 |
| 87871 | 389, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87872 | 389, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87873 | 389, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87874 | 389, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87875 | 389, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87876 | 0, // sub_32 |
| 87877 | 0, // sub_32_hi |
| 87878 | 0, // sube32 |
| 87879 | 0, // sube64 |
| 87880 | 0, // subo32 |
| 87881 | 0, // subo64 |
| 87882 | 0, // x8sub_0 |
| 87883 | 0, // x8sub_1 |
| 87884 | 0, // x8sub_2 |
| 87885 | 0, // x8sub_3 |
| 87886 | 0, // x8sub_4 |
| 87887 | 0, // x8sub_5 |
| 87888 | 0, // x8sub_6 |
| 87889 | 0, // x8sub_7 |
| 87890 | 0, // zasubb |
| 87891 | 0, // zasubd0 |
| 87892 | 0, // zasubd1 |
| 87893 | 0, // zasubh0 |
| 87894 | 0, // zasubh1 |
| 87895 | 0, // zasubq0 |
| 87896 | 0, // zasubq1 |
| 87897 | 0, // zasubs0 |
| 87898 | 0, // zasubs1 |
| 87899 | 389, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87900 | 389, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87901 | 389, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87902 | 389, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87903 | 389, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87904 | 389, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87905 | 0, // zasubd1_then_zasubq0 |
| 87906 | 0, // zasubd1_then_zasubq1 |
| 87907 | 0, // zasubs1_then_zasubd0 |
| 87908 | 0, // zasubs1_then_zasubd1 |
| 87909 | 0, // zasubs1_then_zasubq0 |
| 87910 | 0, // zasubs1_then_zasubq1 |
| 87911 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 87912 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 87913 | 0, // zasubh1_then_zasubd0 |
| 87914 | 0, // zasubh1_then_zasubd1 |
| 87915 | 0, // zasubh1_then_zasubq0 |
| 87916 | 0, // zasubh1_then_zasubq1 |
| 87917 | 0, // zasubh1_then_zasubs0 |
| 87918 | 0, // zasubh1_then_zasubs1 |
| 87919 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 87920 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 87921 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 87922 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 87923 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 87924 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 87925 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 87926 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 87927 | 389, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87928 | 389, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87929 | 389, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87930 | 389, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87931 | 389, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87932 | 389, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87933 | 389, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87934 | 389, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87935 | 389, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87936 | 389, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87937 | 389, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87938 | 389, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87939 | 389, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87940 | 389, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87941 | 389, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87942 | 389, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87943 | 389, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87944 | 389, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87945 | 0, // psub1_then_psub |
| 87946 | 389, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87947 | 389, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87948 | 389, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87949 | 0, // x8sub_7_then_sub_32 |
| 87950 | 0, // x8sub_7_then_sub_32_hi |
| 87951 | 0, // x8sub_6_then_sub_32 |
| 87952 | 0, // x8sub_6_then_sub_32_hi |
| 87953 | 0, // x8sub_5_then_sub_32 |
| 87954 | 0, // x8sub_5_then_sub_32_hi |
| 87955 | 0, // x8sub_4_then_sub_32 |
| 87956 | 0, // x8sub_4_then_sub_32_hi |
| 87957 | 0, // x8sub_3_then_sub_32 |
| 87958 | 0, // x8sub_3_then_sub_32_hi |
| 87959 | 0, // x8sub_2_then_sub_32 |
| 87960 | 0, // x8sub_2_then_sub_32_hi |
| 87961 | 0, // x8sub_1_then_sub_32 |
| 87962 | 0, // x8sub_1_then_sub_32_hi |
| 87963 | 0, // subo64_then_sub_32 |
| 87964 | 0, // subo64_then_sub_32_hi |
| 87965 | 389, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87966 | 389, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87967 | 389, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87968 | 0, // dsub0_dsub1 |
| 87969 | 0, // dsub0_dsub1_dsub2 |
| 87970 | 389, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87971 | 389, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87972 | 389, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87973 | 389, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87974 | 389, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87975 | 389, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87976 | 0, // qsub0_qsub1 |
| 87977 | 0, // qsub0_qsub1_qsub2 |
| 87978 | 389, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87979 | 389, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87980 | 389, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87981 | 0, // sub_32_x8sub_1_then_sub_32 |
| 87982 | 0, // x8sub_0_x8sub_1 |
| 87983 | 0, // x8sub_2_x8sub_3 |
| 87984 | 0, // x8sub_4_x8sub_5 |
| 87985 | 0, // x8sub_6_x8sub_7 |
| 87986 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 87987 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 87988 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 87989 | 0, // sub_32_subo64_then_sub_32 |
| 87990 | 389, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87991 | 389, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87992 | 389, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87993 | 389, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87994 | 389, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87995 | 389, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87996 | 389, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87997 | 389, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 87998 | 0, // zsub0_zsub2 |
| 87999 | 0, // zsub1_zsub3 |
| 88000 | }, |
| 88001 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88002 | 390, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88003 | 390, // bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88004 | 390, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88005 | 0, // dsub0 |
| 88006 | 390, // dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88007 | 390, // dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88008 | 390, // dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88009 | 390, // dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88010 | 390, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88011 | 390, // hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88012 | 0, // psub |
| 88013 | 0, // psub0 |
| 88014 | 0, // psub1 |
| 88015 | 0, // qsub0 |
| 88016 | 390, // qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88017 | 390, // qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88018 | 390, // qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88019 | 390, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88020 | 390, // ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88021 | 0, // sub_32 |
| 88022 | 0, // sub_32_hi |
| 88023 | 0, // sube32 |
| 88024 | 0, // sube64 |
| 88025 | 0, // subo32 |
| 88026 | 0, // subo64 |
| 88027 | 0, // x8sub_0 |
| 88028 | 0, // x8sub_1 |
| 88029 | 0, // x8sub_2 |
| 88030 | 0, // x8sub_3 |
| 88031 | 0, // x8sub_4 |
| 88032 | 0, // x8sub_5 |
| 88033 | 0, // x8sub_6 |
| 88034 | 0, // x8sub_7 |
| 88035 | 0, // zasubb |
| 88036 | 0, // zasubd0 |
| 88037 | 0, // zasubd1 |
| 88038 | 0, // zasubh0 |
| 88039 | 0, // zasubh1 |
| 88040 | 0, // zasubq0 |
| 88041 | 0, // zasubq1 |
| 88042 | 0, // zasubs0 |
| 88043 | 0, // zasubs1 |
| 88044 | 390, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88045 | 390, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88046 | 390, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88047 | 390, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88048 | 390, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88049 | 390, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88050 | 0, // zasubd1_then_zasubq0 |
| 88051 | 0, // zasubd1_then_zasubq1 |
| 88052 | 0, // zasubs1_then_zasubd0 |
| 88053 | 0, // zasubs1_then_zasubd1 |
| 88054 | 0, // zasubs1_then_zasubq0 |
| 88055 | 0, // zasubs1_then_zasubq1 |
| 88056 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88057 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88058 | 0, // zasubh1_then_zasubd0 |
| 88059 | 0, // zasubh1_then_zasubd1 |
| 88060 | 0, // zasubh1_then_zasubq0 |
| 88061 | 0, // zasubh1_then_zasubq1 |
| 88062 | 0, // zasubh1_then_zasubs0 |
| 88063 | 0, // zasubh1_then_zasubs1 |
| 88064 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88065 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88066 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88067 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88068 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88069 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88070 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88071 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88072 | 390, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88073 | 390, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88074 | 390, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88075 | 390, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88076 | 390, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88077 | 390, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88078 | 390, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88079 | 390, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88080 | 390, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88081 | 390, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88082 | 390, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88083 | 390, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88084 | 390, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88085 | 390, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88086 | 390, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88087 | 390, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88088 | 390, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88089 | 390, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88090 | 0, // psub1_then_psub |
| 88091 | 390, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88092 | 390, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88093 | 390, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88094 | 0, // x8sub_7_then_sub_32 |
| 88095 | 0, // x8sub_7_then_sub_32_hi |
| 88096 | 0, // x8sub_6_then_sub_32 |
| 88097 | 0, // x8sub_6_then_sub_32_hi |
| 88098 | 0, // x8sub_5_then_sub_32 |
| 88099 | 0, // x8sub_5_then_sub_32_hi |
| 88100 | 0, // x8sub_4_then_sub_32 |
| 88101 | 0, // x8sub_4_then_sub_32_hi |
| 88102 | 0, // x8sub_3_then_sub_32 |
| 88103 | 0, // x8sub_3_then_sub_32_hi |
| 88104 | 0, // x8sub_2_then_sub_32 |
| 88105 | 0, // x8sub_2_then_sub_32_hi |
| 88106 | 0, // x8sub_1_then_sub_32 |
| 88107 | 0, // x8sub_1_then_sub_32_hi |
| 88108 | 0, // subo64_then_sub_32 |
| 88109 | 0, // subo64_then_sub_32_hi |
| 88110 | 390, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88111 | 390, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88112 | 390, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88113 | 0, // dsub0_dsub1 |
| 88114 | 0, // dsub0_dsub1_dsub2 |
| 88115 | 390, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88116 | 390, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88117 | 390, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88118 | 390, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88119 | 390, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88120 | 390, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88121 | 0, // qsub0_qsub1 |
| 88122 | 0, // qsub0_qsub1_qsub2 |
| 88123 | 390, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88124 | 390, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88125 | 390, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88126 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88127 | 0, // x8sub_0_x8sub_1 |
| 88128 | 0, // x8sub_2_x8sub_3 |
| 88129 | 0, // x8sub_4_x8sub_5 |
| 88130 | 0, // x8sub_6_x8sub_7 |
| 88131 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88132 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88133 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88134 | 0, // sub_32_subo64_then_sub_32 |
| 88135 | 390, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88136 | 390, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88137 | 390, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88138 | 390, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88139 | 390, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88140 | 390, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88141 | 390, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88142 | 390, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88143 | 0, // zsub0_zsub2 |
| 88144 | 0, // zsub1_zsub3 |
| 88145 | }, |
| 88146 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88147 | 391, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88148 | 391, // bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88149 | 391, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88150 | 0, // dsub0 |
| 88151 | 391, // dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88152 | 391, // dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88153 | 391, // dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88154 | 391, // dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88155 | 391, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88156 | 391, // hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88157 | 0, // psub |
| 88158 | 0, // psub0 |
| 88159 | 0, // psub1 |
| 88160 | 0, // qsub0 |
| 88161 | 391, // qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88162 | 391, // qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88163 | 391, // qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88164 | 391, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88165 | 391, // ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88166 | 0, // sub_32 |
| 88167 | 0, // sub_32_hi |
| 88168 | 0, // sube32 |
| 88169 | 0, // sube64 |
| 88170 | 0, // subo32 |
| 88171 | 0, // subo64 |
| 88172 | 0, // x8sub_0 |
| 88173 | 0, // x8sub_1 |
| 88174 | 0, // x8sub_2 |
| 88175 | 0, // x8sub_3 |
| 88176 | 0, // x8sub_4 |
| 88177 | 0, // x8sub_5 |
| 88178 | 0, // x8sub_6 |
| 88179 | 0, // x8sub_7 |
| 88180 | 0, // zasubb |
| 88181 | 0, // zasubd0 |
| 88182 | 0, // zasubd1 |
| 88183 | 0, // zasubh0 |
| 88184 | 0, // zasubh1 |
| 88185 | 0, // zasubq0 |
| 88186 | 0, // zasubq1 |
| 88187 | 0, // zasubs0 |
| 88188 | 0, // zasubs1 |
| 88189 | 391, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88190 | 391, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88191 | 391, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88192 | 391, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88193 | 391, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88194 | 391, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88195 | 0, // zasubd1_then_zasubq0 |
| 88196 | 0, // zasubd1_then_zasubq1 |
| 88197 | 0, // zasubs1_then_zasubd0 |
| 88198 | 0, // zasubs1_then_zasubd1 |
| 88199 | 0, // zasubs1_then_zasubq0 |
| 88200 | 0, // zasubs1_then_zasubq1 |
| 88201 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88202 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88203 | 0, // zasubh1_then_zasubd0 |
| 88204 | 0, // zasubh1_then_zasubd1 |
| 88205 | 0, // zasubh1_then_zasubq0 |
| 88206 | 0, // zasubh1_then_zasubq1 |
| 88207 | 0, // zasubh1_then_zasubs0 |
| 88208 | 0, // zasubh1_then_zasubs1 |
| 88209 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88210 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88211 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88212 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88213 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88214 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88215 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88216 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88217 | 391, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88218 | 391, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88219 | 391, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88220 | 391, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88221 | 391, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88222 | 391, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88223 | 391, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88224 | 391, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88225 | 391, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88226 | 391, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88227 | 391, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88228 | 391, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88229 | 391, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88230 | 391, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88231 | 391, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88232 | 391, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88233 | 391, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88234 | 391, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88235 | 0, // psub1_then_psub |
| 88236 | 391, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88237 | 391, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88238 | 391, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88239 | 0, // x8sub_7_then_sub_32 |
| 88240 | 0, // x8sub_7_then_sub_32_hi |
| 88241 | 0, // x8sub_6_then_sub_32 |
| 88242 | 0, // x8sub_6_then_sub_32_hi |
| 88243 | 0, // x8sub_5_then_sub_32 |
| 88244 | 0, // x8sub_5_then_sub_32_hi |
| 88245 | 0, // x8sub_4_then_sub_32 |
| 88246 | 0, // x8sub_4_then_sub_32_hi |
| 88247 | 0, // x8sub_3_then_sub_32 |
| 88248 | 0, // x8sub_3_then_sub_32_hi |
| 88249 | 0, // x8sub_2_then_sub_32 |
| 88250 | 0, // x8sub_2_then_sub_32_hi |
| 88251 | 0, // x8sub_1_then_sub_32 |
| 88252 | 0, // x8sub_1_then_sub_32_hi |
| 88253 | 0, // subo64_then_sub_32 |
| 88254 | 0, // subo64_then_sub_32_hi |
| 88255 | 391, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88256 | 391, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88257 | 391, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88258 | 0, // dsub0_dsub1 |
| 88259 | 0, // dsub0_dsub1_dsub2 |
| 88260 | 391, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88261 | 391, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88262 | 391, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88263 | 391, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88264 | 391, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88265 | 391, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88266 | 0, // qsub0_qsub1 |
| 88267 | 0, // qsub0_qsub1_qsub2 |
| 88268 | 391, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88269 | 391, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88270 | 391, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88271 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88272 | 0, // x8sub_0_x8sub_1 |
| 88273 | 0, // x8sub_2_x8sub_3 |
| 88274 | 0, // x8sub_4_x8sub_5 |
| 88275 | 0, // x8sub_6_x8sub_7 |
| 88276 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88277 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88278 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88279 | 0, // sub_32_subo64_then_sub_32 |
| 88280 | 391, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88281 | 391, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88282 | 391, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88283 | 391, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88284 | 391, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88285 | 391, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88286 | 391, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88287 | 391, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88288 | 0, // zsub0_zsub2 |
| 88289 | 0, // zsub1_zsub3 |
| 88290 | }, |
| 88291 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88292 | 392, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88293 | 392, // bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88294 | 392, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88295 | 0, // dsub0 |
| 88296 | 392, // dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88297 | 392, // dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88298 | 392, // dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88299 | 392, // dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88300 | 392, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88301 | 392, // hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88302 | 0, // psub |
| 88303 | 0, // psub0 |
| 88304 | 0, // psub1 |
| 88305 | 0, // qsub0 |
| 88306 | 392, // qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88307 | 392, // qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88308 | 392, // qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88309 | 392, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88310 | 392, // ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88311 | 0, // sub_32 |
| 88312 | 0, // sub_32_hi |
| 88313 | 0, // sube32 |
| 88314 | 0, // sube64 |
| 88315 | 0, // subo32 |
| 88316 | 0, // subo64 |
| 88317 | 0, // x8sub_0 |
| 88318 | 0, // x8sub_1 |
| 88319 | 0, // x8sub_2 |
| 88320 | 0, // x8sub_3 |
| 88321 | 0, // x8sub_4 |
| 88322 | 0, // x8sub_5 |
| 88323 | 0, // x8sub_6 |
| 88324 | 0, // x8sub_7 |
| 88325 | 0, // zasubb |
| 88326 | 0, // zasubd0 |
| 88327 | 0, // zasubd1 |
| 88328 | 0, // zasubh0 |
| 88329 | 0, // zasubh1 |
| 88330 | 0, // zasubq0 |
| 88331 | 0, // zasubq1 |
| 88332 | 0, // zasubs0 |
| 88333 | 0, // zasubs1 |
| 88334 | 392, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88335 | 392, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88336 | 392, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88337 | 392, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88338 | 392, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88339 | 392, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88340 | 0, // zasubd1_then_zasubq0 |
| 88341 | 0, // zasubd1_then_zasubq1 |
| 88342 | 0, // zasubs1_then_zasubd0 |
| 88343 | 0, // zasubs1_then_zasubd1 |
| 88344 | 0, // zasubs1_then_zasubq0 |
| 88345 | 0, // zasubs1_then_zasubq1 |
| 88346 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88347 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88348 | 0, // zasubh1_then_zasubd0 |
| 88349 | 0, // zasubh1_then_zasubd1 |
| 88350 | 0, // zasubh1_then_zasubq0 |
| 88351 | 0, // zasubh1_then_zasubq1 |
| 88352 | 0, // zasubh1_then_zasubs0 |
| 88353 | 0, // zasubh1_then_zasubs1 |
| 88354 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88355 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88356 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88357 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88358 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88359 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88360 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88361 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88362 | 392, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88363 | 392, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88364 | 392, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88365 | 392, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88366 | 392, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88367 | 392, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88368 | 392, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88369 | 392, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88370 | 392, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88371 | 392, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88372 | 392, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88373 | 392, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88374 | 392, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88375 | 392, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88376 | 392, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88377 | 392, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88378 | 392, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88379 | 392, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88380 | 0, // psub1_then_psub |
| 88381 | 392, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88382 | 392, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88383 | 392, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88384 | 0, // x8sub_7_then_sub_32 |
| 88385 | 0, // x8sub_7_then_sub_32_hi |
| 88386 | 0, // x8sub_6_then_sub_32 |
| 88387 | 0, // x8sub_6_then_sub_32_hi |
| 88388 | 0, // x8sub_5_then_sub_32 |
| 88389 | 0, // x8sub_5_then_sub_32_hi |
| 88390 | 0, // x8sub_4_then_sub_32 |
| 88391 | 0, // x8sub_4_then_sub_32_hi |
| 88392 | 0, // x8sub_3_then_sub_32 |
| 88393 | 0, // x8sub_3_then_sub_32_hi |
| 88394 | 0, // x8sub_2_then_sub_32 |
| 88395 | 0, // x8sub_2_then_sub_32_hi |
| 88396 | 0, // x8sub_1_then_sub_32 |
| 88397 | 0, // x8sub_1_then_sub_32_hi |
| 88398 | 0, // subo64_then_sub_32 |
| 88399 | 0, // subo64_then_sub_32_hi |
| 88400 | 392, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88401 | 392, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88402 | 392, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88403 | 0, // dsub0_dsub1 |
| 88404 | 0, // dsub0_dsub1_dsub2 |
| 88405 | 392, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88406 | 392, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88407 | 392, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88408 | 392, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88409 | 392, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88410 | 392, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88411 | 0, // qsub0_qsub1 |
| 88412 | 0, // qsub0_qsub1_qsub2 |
| 88413 | 392, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88414 | 392, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88415 | 392, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88416 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88417 | 0, // x8sub_0_x8sub_1 |
| 88418 | 0, // x8sub_2_x8sub_3 |
| 88419 | 0, // x8sub_4_x8sub_5 |
| 88420 | 0, // x8sub_6_x8sub_7 |
| 88421 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88422 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88423 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88424 | 0, // sub_32_subo64_then_sub_32 |
| 88425 | 392, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88426 | 392, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88427 | 392, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88428 | 392, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88429 | 392, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88430 | 392, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88431 | 392, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88432 | 392, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 88433 | 0, // zsub0_zsub2 |
| 88434 | 0, // zsub1_zsub3 |
| 88435 | }, |
| 88436 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88437 | 393, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88438 | 393, // bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88439 | 393, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88440 | 0, // dsub0 |
| 88441 | 393, // dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88442 | 393, // dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88443 | 393, // dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88444 | 393, // dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88445 | 393, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88446 | 393, // hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88447 | 0, // psub |
| 88448 | 0, // psub0 |
| 88449 | 0, // psub1 |
| 88450 | 0, // qsub0 |
| 88451 | 393, // qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88452 | 393, // qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88453 | 393, // qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88454 | 393, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88455 | 393, // ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88456 | 0, // sub_32 |
| 88457 | 0, // sub_32_hi |
| 88458 | 0, // sube32 |
| 88459 | 0, // sube64 |
| 88460 | 0, // subo32 |
| 88461 | 0, // subo64 |
| 88462 | 0, // x8sub_0 |
| 88463 | 0, // x8sub_1 |
| 88464 | 0, // x8sub_2 |
| 88465 | 0, // x8sub_3 |
| 88466 | 0, // x8sub_4 |
| 88467 | 0, // x8sub_5 |
| 88468 | 0, // x8sub_6 |
| 88469 | 0, // x8sub_7 |
| 88470 | 0, // zasubb |
| 88471 | 0, // zasubd0 |
| 88472 | 0, // zasubd1 |
| 88473 | 0, // zasubh0 |
| 88474 | 0, // zasubh1 |
| 88475 | 0, // zasubq0 |
| 88476 | 0, // zasubq1 |
| 88477 | 0, // zasubs0 |
| 88478 | 0, // zasubs1 |
| 88479 | 393, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88480 | 393, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88481 | 393, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88482 | 393, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88483 | 393, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88484 | 393, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88485 | 0, // zasubd1_then_zasubq0 |
| 88486 | 0, // zasubd1_then_zasubq1 |
| 88487 | 0, // zasubs1_then_zasubd0 |
| 88488 | 0, // zasubs1_then_zasubd1 |
| 88489 | 0, // zasubs1_then_zasubq0 |
| 88490 | 0, // zasubs1_then_zasubq1 |
| 88491 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88492 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88493 | 0, // zasubh1_then_zasubd0 |
| 88494 | 0, // zasubh1_then_zasubd1 |
| 88495 | 0, // zasubh1_then_zasubq0 |
| 88496 | 0, // zasubh1_then_zasubq1 |
| 88497 | 0, // zasubh1_then_zasubs0 |
| 88498 | 0, // zasubh1_then_zasubs1 |
| 88499 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88500 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88501 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88502 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88503 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88504 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88505 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88506 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88507 | 393, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88508 | 393, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88509 | 393, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88510 | 393, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88511 | 393, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88512 | 393, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88513 | 393, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88514 | 393, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88515 | 393, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88516 | 393, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88517 | 393, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88518 | 393, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88519 | 393, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88520 | 393, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88521 | 393, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88522 | 393, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88523 | 393, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88524 | 393, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88525 | 0, // psub1_then_psub |
| 88526 | 393, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88527 | 393, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88528 | 393, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88529 | 0, // x8sub_7_then_sub_32 |
| 88530 | 0, // x8sub_7_then_sub_32_hi |
| 88531 | 0, // x8sub_6_then_sub_32 |
| 88532 | 0, // x8sub_6_then_sub_32_hi |
| 88533 | 0, // x8sub_5_then_sub_32 |
| 88534 | 0, // x8sub_5_then_sub_32_hi |
| 88535 | 0, // x8sub_4_then_sub_32 |
| 88536 | 0, // x8sub_4_then_sub_32_hi |
| 88537 | 0, // x8sub_3_then_sub_32 |
| 88538 | 0, // x8sub_3_then_sub_32_hi |
| 88539 | 0, // x8sub_2_then_sub_32 |
| 88540 | 0, // x8sub_2_then_sub_32_hi |
| 88541 | 0, // x8sub_1_then_sub_32 |
| 88542 | 0, // x8sub_1_then_sub_32_hi |
| 88543 | 0, // subo64_then_sub_32 |
| 88544 | 0, // subo64_then_sub_32_hi |
| 88545 | 393, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88546 | 393, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88547 | 393, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88548 | 0, // dsub0_dsub1 |
| 88549 | 0, // dsub0_dsub1_dsub2 |
| 88550 | 393, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88551 | 393, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88552 | 393, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88553 | 393, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88554 | 393, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88555 | 393, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88556 | 0, // qsub0_qsub1 |
| 88557 | 0, // qsub0_qsub1_qsub2 |
| 88558 | 393, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88559 | 393, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88560 | 393, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88561 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88562 | 0, // x8sub_0_x8sub_1 |
| 88563 | 0, // x8sub_2_x8sub_3 |
| 88564 | 0, // x8sub_4_x8sub_5 |
| 88565 | 0, // x8sub_6_x8sub_7 |
| 88566 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88567 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88568 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88569 | 0, // sub_32_subo64_then_sub_32 |
| 88570 | 393, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88571 | 393, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88572 | 393, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88573 | 393, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88574 | 393, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88575 | 393, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88576 | 393, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88577 | 393, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 88578 | 0, // zsub0_zsub2 |
| 88579 | 0, // zsub1_zsub3 |
| 88580 | }, |
| 88581 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88582 | 394, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88583 | 394, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88584 | 394, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88585 | 0, // dsub0 |
| 88586 | 394, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88587 | 394, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88588 | 394, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88589 | 394, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88590 | 394, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88591 | 394, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88592 | 0, // psub |
| 88593 | 0, // psub0 |
| 88594 | 0, // psub1 |
| 88595 | 0, // qsub0 |
| 88596 | 394, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88597 | 394, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88598 | 394, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88599 | 394, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88600 | 394, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88601 | 0, // sub_32 |
| 88602 | 0, // sub_32_hi |
| 88603 | 0, // sube32 |
| 88604 | 0, // sube64 |
| 88605 | 0, // subo32 |
| 88606 | 0, // subo64 |
| 88607 | 0, // x8sub_0 |
| 88608 | 0, // x8sub_1 |
| 88609 | 0, // x8sub_2 |
| 88610 | 0, // x8sub_3 |
| 88611 | 0, // x8sub_4 |
| 88612 | 0, // x8sub_5 |
| 88613 | 0, // x8sub_6 |
| 88614 | 0, // x8sub_7 |
| 88615 | 0, // zasubb |
| 88616 | 0, // zasubd0 |
| 88617 | 0, // zasubd1 |
| 88618 | 0, // zasubh0 |
| 88619 | 0, // zasubh1 |
| 88620 | 0, // zasubq0 |
| 88621 | 0, // zasubq1 |
| 88622 | 0, // zasubs0 |
| 88623 | 0, // zasubs1 |
| 88624 | 394, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88625 | 394, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88626 | 394, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88627 | 394, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88628 | 394, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88629 | 394, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88630 | 0, // zasubd1_then_zasubq0 |
| 88631 | 0, // zasubd1_then_zasubq1 |
| 88632 | 0, // zasubs1_then_zasubd0 |
| 88633 | 0, // zasubs1_then_zasubd1 |
| 88634 | 0, // zasubs1_then_zasubq0 |
| 88635 | 0, // zasubs1_then_zasubq1 |
| 88636 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88637 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88638 | 0, // zasubh1_then_zasubd0 |
| 88639 | 0, // zasubh1_then_zasubd1 |
| 88640 | 0, // zasubh1_then_zasubq0 |
| 88641 | 0, // zasubh1_then_zasubq1 |
| 88642 | 0, // zasubh1_then_zasubs0 |
| 88643 | 0, // zasubh1_then_zasubs1 |
| 88644 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88645 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88646 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88647 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88648 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88649 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88650 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88651 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88652 | 394, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88653 | 394, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88654 | 394, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88655 | 394, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88656 | 394, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88657 | 394, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88658 | 394, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88659 | 394, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88660 | 394, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88661 | 394, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88662 | 394, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88663 | 394, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88664 | 394, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88665 | 394, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88666 | 394, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88667 | 394, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88668 | 394, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88669 | 394, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88670 | 0, // psub1_then_psub |
| 88671 | 394, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88672 | 394, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88673 | 394, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88674 | 0, // x8sub_7_then_sub_32 |
| 88675 | 0, // x8sub_7_then_sub_32_hi |
| 88676 | 0, // x8sub_6_then_sub_32 |
| 88677 | 0, // x8sub_6_then_sub_32_hi |
| 88678 | 0, // x8sub_5_then_sub_32 |
| 88679 | 0, // x8sub_5_then_sub_32_hi |
| 88680 | 0, // x8sub_4_then_sub_32 |
| 88681 | 0, // x8sub_4_then_sub_32_hi |
| 88682 | 0, // x8sub_3_then_sub_32 |
| 88683 | 0, // x8sub_3_then_sub_32_hi |
| 88684 | 0, // x8sub_2_then_sub_32 |
| 88685 | 0, // x8sub_2_then_sub_32_hi |
| 88686 | 0, // x8sub_1_then_sub_32 |
| 88687 | 0, // x8sub_1_then_sub_32_hi |
| 88688 | 0, // subo64_then_sub_32 |
| 88689 | 0, // subo64_then_sub_32_hi |
| 88690 | 394, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88691 | 394, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88692 | 394, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88693 | 0, // dsub0_dsub1 |
| 88694 | 0, // dsub0_dsub1_dsub2 |
| 88695 | 394, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88696 | 394, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88697 | 394, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88698 | 394, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88699 | 394, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88700 | 394, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88701 | 0, // qsub0_qsub1 |
| 88702 | 0, // qsub0_qsub1_qsub2 |
| 88703 | 394, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88704 | 394, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88705 | 394, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88706 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88707 | 0, // x8sub_0_x8sub_1 |
| 88708 | 0, // x8sub_2_x8sub_3 |
| 88709 | 0, // x8sub_4_x8sub_5 |
| 88710 | 0, // x8sub_6_x8sub_7 |
| 88711 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88712 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88713 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88714 | 0, // sub_32_subo64_then_sub_32 |
| 88715 | 394, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88716 | 394, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88717 | 394, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88718 | 394, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88719 | 394, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88720 | 394, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88721 | 394, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88722 | 394, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 88723 | 0, // zsub0_zsub2 |
| 88724 | 0, // zsub1_zsub3 |
| 88725 | }, |
| 88726 | { // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88727 | 395, // bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88728 | 395, // bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88729 | 395, // dsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88730 | 0, // dsub0 |
| 88731 | 395, // dsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88732 | 395, // dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88733 | 395, // dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88734 | 395, // dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88735 | 395, // hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88736 | 395, // hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88737 | 0, // psub |
| 88738 | 0, // psub0 |
| 88739 | 0, // psub1 |
| 88740 | 0, // qsub0 |
| 88741 | 395, // qsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88742 | 395, // qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88743 | 395, // qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88744 | 395, // ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88745 | 395, // ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88746 | 0, // sub_32 |
| 88747 | 0, // sub_32_hi |
| 88748 | 0, // sube32 |
| 88749 | 0, // sube64 |
| 88750 | 0, // subo32 |
| 88751 | 0, // subo64 |
| 88752 | 0, // x8sub_0 |
| 88753 | 0, // x8sub_1 |
| 88754 | 0, // x8sub_2 |
| 88755 | 0, // x8sub_3 |
| 88756 | 0, // x8sub_4 |
| 88757 | 0, // x8sub_5 |
| 88758 | 0, // x8sub_6 |
| 88759 | 0, // x8sub_7 |
| 88760 | 0, // zasubb |
| 88761 | 0, // zasubd0 |
| 88762 | 0, // zasubd1 |
| 88763 | 0, // zasubh0 |
| 88764 | 0, // zasubh1 |
| 88765 | 0, // zasubq0 |
| 88766 | 0, // zasubq1 |
| 88767 | 0, // zasubs0 |
| 88768 | 0, // zasubs1 |
| 88769 | 395, // zsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88770 | 395, // zsub0 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88771 | 395, // zsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88772 | 395, // zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88773 | 395, // zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88774 | 395, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88775 | 0, // zasubd1_then_zasubq0 |
| 88776 | 0, // zasubd1_then_zasubq1 |
| 88777 | 0, // zasubs1_then_zasubd0 |
| 88778 | 0, // zasubs1_then_zasubd1 |
| 88779 | 0, // zasubs1_then_zasubq0 |
| 88780 | 0, // zasubs1_then_zasubq1 |
| 88781 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88782 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88783 | 0, // zasubh1_then_zasubd0 |
| 88784 | 0, // zasubh1_then_zasubd1 |
| 88785 | 0, // zasubh1_then_zasubq0 |
| 88786 | 0, // zasubh1_then_zasubq1 |
| 88787 | 0, // zasubh1_then_zasubs0 |
| 88788 | 0, // zasubh1_then_zasubs1 |
| 88789 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88790 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88791 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88792 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88793 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88794 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88795 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88796 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88797 | 395, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88798 | 395, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88799 | 395, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88800 | 395, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88801 | 395, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88802 | 395, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88803 | 395, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88804 | 395, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88805 | 395, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88806 | 395, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88807 | 395, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88808 | 395, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88809 | 395, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88810 | 395, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88811 | 395, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88812 | 395, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88813 | 395, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88814 | 395, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88815 | 0, // psub1_then_psub |
| 88816 | 395, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88817 | 395, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88818 | 395, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88819 | 0, // x8sub_7_then_sub_32 |
| 88820 | 0, // x8sub_7_then_sub_32_hi |
| 88821 | 0, // x8sub_6_then_sub_32 |
| 88822 | 0, // x8sub_6_then_sub_32_hi |
| 88823 | 0, // x8sub_5_then_sub_32 |
| 88824 | 0, // x8sub_5_then_sub_32_hi |
| 88825 | 0, // x8sub_4_then_sub_32 |
| 88826 | 0, // x8sub_4_then_sub_32_hi |
| 88827 | 0, // x8sub_3_then_sub_32 |
| 88828 | 0, // x8sub_3_then_sub_32_hi |
| 88829 | 0, // x8sub_2_then_sub_32 |
| 88830 | 0, // x8sub_2_then_sub_32_hi |
| 88831 | 0, // x8sub_1_then_sub_32 |
| 88832 | 0, // x8sub_1_then_sub_32_hi |
| 88833 | 0, // subo64_then_sub_32 |
| 88834 | 0, // subo64_then_sub_32_hi |
| 88835 | 395, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88836 | 395, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88837 | 395, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88838 | 0, // dsub0_dsub1 |
| 88839 | 0, // dsub0_dsub1_dsub2 |
| 88840 | 395, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88841 | 395, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88842 | 395, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88843 | 395, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88844 | 395, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88845 | 395, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88846 | 0, // qsub0_qsub1 |
| 88847 | 0, // qsub0_qsub1_qsub2 |
| 88848 | 395, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88849 | 395, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88850 | 395, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88851 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88852 | 0, // x8sub_0_x8sub_1 |
| 88853 | 0, // x8sub_2_x8sub_3 |
| 88854 | 0, // x8sub_4_x8sub_5 |
| 88855 | 0, // x8sub_6_x8sub_7 |
| 88856 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 88857 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 88858 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 88859 | 0, // sub_32_subo64_then_sub_32 |
| 88860 | 395, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88861 | 395, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88862 | 395, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88863 | 395, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88864 | 395, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88865 | 395, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88866 | 395, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88867 | 395, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 88868 | 0, // zsub0_zsub2 |
| 88869 | 0, // zsub1_zsub3 |
| 88870 | }, |
| 88871 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88872 | 396, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88873 | 396, // bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88874 | 396, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88875 | 0, // dsub0 |
| 88876 | 396, // dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88877 | 396, // dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88878 | 396, // dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88879 | 396, // dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88880 | 396, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88881 | 396, // hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88882 | 0, // psub |
| 88883 | 0, // psub0 |
| 88884 | 0, // psub1 |
| 88885 | 0, // qsub0 |
| 88886 | 396, // qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88887 | 396, // qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88888 | 396, // qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88889 | 396, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88890 | 396, // ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88891 | 0, // sub_32 |
| 88892 | 0, // sub_32_hi |
| 88893 | 0, // sube32 |
| 88894 | 0, // sube64 |
| 88895 | 0, // subo32 |
| 88896 | 0, // subo64 |
| 88897 | 0, // x8sub_0 |
| 88898 | 0, // x8sub_1 |
| 88899 | 0, // x8sub_2 |
| 88900 | 0, // x8sub_3 |
| 88901 | 0, // x8sub_4 |
| 88902 | 0, // x8sub_5 |
| 88903 | 0, // x8sub_6 |
| 88904 | 0, // x8sub_7 |
| 88905 | 0, // zasubb |
| 88906 | 0, // zasubd0 |
| 88907 | 0, // zasubd1 |
| 88908 | 0, // zasubh0 |
| 88909 | 0, // zasubh1 |
| 88910 | 0, // zasubq0 |
| 88911 | 0, // zasubq1 |
| 88912 | 0, // zasubs0 |
| 88913 | 0, // zasubs1 |
| 88914 | 396, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88915 | 396, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88916 | 396, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88917 | 396, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88918 | 396, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88919 | 396, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88920 | 0, // zasubd1_then_zasubq0 |
| 88921 | 0, // zasubd1_then_zasubq1 |
| 88922 | 0, // zasubs1_then_zasubd0 |
| 88923 | 0, // zasubs1_then_zasubd1 |
| 88924 | 0, // zasubs1_then_zasubq0 |
| 88925 | 0, // zasubs1_then_zasubq1 |
| 88926 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 88927 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 88928 | 0, // zasubh1_then_zasubd0 |
| 88929 | 0, // zasubh1_then_zasubd1 |
| 88930 | 0, // zasubh1_then_zasubq0 |
| 88931 | 0, // zasubh1_then_zasubq1 |
| 88932 | 0, // zasubh1_then_zasubs0 |
| 88933 | 0, // zasubh1_then_zasubs1 |
| 88934 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 88935 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 88936 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 88937 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 88938 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 88939 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 88940 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 88941 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 88942 | 396, // dsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88943 | 396, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88944 | 396, // dsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88945 | 396, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88946 | 396, // dsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88947 | 396, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88948 | 396, // dsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88949 | 396, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88950 | 396, // dsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88951 | 396, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88952 | 396, // dsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88953 | 396, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88954 | 396, // dsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88955 | 396, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88956 | 396, // dsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88957 | 396, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88958 | 396, // dsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88959 | 396, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88960 | 0, // psub1_then_psub |
| 88961 | 396, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88962 | 396, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88963 | 396, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88964 | 0, // x8sub_7_then_sub_32 |
| 88965 | 0, // x8sub_7_then_sub_32_hi |
| 88966 | 0, // x8sub_6_then_sub_32 |
| 88967 | 0, // x8sub_6_then_sub_32_hi |
| 88968 | 0, // x8sub_5_then_sub_32 |
| 88969 | 0, // x8sub_5_then_sub_32_hi |
| 88970 | 0, // x8sub_4_then_sub_32 |
| 88971 | 0, // x8sub_4_then_sub_32_hi |
| 88972 | 0, // x8sub_3_then_sub_32 |
| 88973 | 0, // x8sub_3_then_sub_32_hi |
| 88974 | 0, // x8sub_2_then_sub_32 |
| 88975 | 0, // x8sub_2_then_sub_32_hi |
| 88976 | 0, // x8sub_1_then_sub_32 |
| 88977 | 0, // x8sub_1_then_sub_32_hi |
| 88978 | 0, // subo64_then_sub_32 |
| 88979 | 0, // subo64_then_sub_32_hi |
| 88980 | 396, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88981 | 396, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88982 | 396, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88983 | 0, // dsub0_dsub1 |
| 88984 | 0, // dsub0_dsub1_dsub2 |
| 88985 | 396, // dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88986 | 396, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88987 | 396, // dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88988 | 396, // dsub_dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88989 | 396, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88990 | 396, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88991 | 0, // qsub0_qsub1 |
| 88992 | 0, // qsub0_qsub1_qsub2 |
| 88993 | 396, // qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88994 | 396, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88995 | 396, // qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 88996 | 0, // sub_32_x8sub_1_then_sub_32 |
| 88997 | 0, // x8sub_0_x8sub_1 |
| 88998 | 0, // x8sub_2_x8sub_3 |
| 88999 | 0, // x8sub_4_x8sub_5 |
| 89000 | 0, // x8sub_6_x8sub_7 |
| 89001 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89002 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89003 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89004 | 0, // sub_32_subo64_then_sub_32 |
| 89005 | 396, // zsub_qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89006 | 396, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89007 | 396, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89008 | 396, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89009 | 396, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89010 | 396, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89011 | 396, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89012 | 396, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89013 | 0, // zsub0_zsub2 |
| 89014 | 0, // zsub1_zsub3 |
| 89015 | }, |
| 89016 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89017 | 397, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89018 | 397, // bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89019 | 397, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89020 | 0, // dsub0 |
| 89021 | 397, // dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89022 | 397, // dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89023 | 397, // dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89024 | 397, // dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89025 | 397, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89026 | 397, // hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89027 | 0, // psub |
| 89028 | 0, // psub0 |
| 89029 | 0, // psub1 |
| 89030 | 0, // qsub0 |
| 89031 | 397, // qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89032 | 397, // qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89033 | 397, // qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89034 | 397, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89035 | 397, // ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89036 | 0, // sub_32 |
| 89037 | 0, // sub_32_hi |
| 89038 | 0, // sube32 |
| 89039 | 0, // sube64 |
| 89040 | 0, // subo32 |
| 89041 | 0, // subo64 |
| 89042 | 0, // x8sub_0 |
| 89043 | 0, // x8sub_1 |
| 89044 | 0, // x8sub_2 |
| 89045 | 0, // x8sub_3 |
| 89046 | 0, // x8sub_4 |
| 89047 | 0, // x8sub_5 |
| 89048 | 0, // x8sub_6 |
| 89049 | 0, // x8sub_7 |
| 89050 | 0, // zasubb |
| 89051 | 0, // zasubd0 |
| 89052 | 0, // zasubd1 |
| 89053 | 0, // zasubh0 |
| 89054 | 0, // zasubh1 |
| 89055 | 0, // zasubq0 |
| 89056 | 0, // zasubq1 |
| 89057 | 0, // zasubs0 |
| 89058 | 0, // zasubs1 |
| 89059 | 397, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89060 | 397, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89061 | 397, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89062 | 397, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89063 | 397, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89064 | 397, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89065 | 0, // zasubd1_then_zasubq0 |
| 89066 | 0, // zasubd1_then_zasubq1 |
| 89067 | 0, // zasubs1_then_zasubd0 |
| 89068 | 0, // zasubs1_then_zasubd1 |
| 89069 | 0, // zasubs1_then_zasubq0 |
| 89070 | 0, // zasubs1_then_zasubq1 |
| 89071 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89072 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89073 | 0, // zasubh1_then_zasubd0 |
| 89074 | 0, // zasubh1_then_zasubd1 |
| 89075 | 0, // zasubh1_then_zasubq0 |
| 89076 | 0, // zasubh1_then_zasubq1 |
| 89077 | 0, // zasubh1_then_zasubs0 |
| 89078 | 0, // zasubh1_then_zasubs1 |
| 89079 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89080 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89081 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89082 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89083 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89084 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89085 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89086 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89087 | 397, // dsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89088 | 397, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89089 | 397, // dsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89090 | 397, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89091 | 397, // dsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89092 | 397, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89093 | 397, // dsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89094 | 397, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89095 | 397, // dsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89096 | 397, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89097 | 397, // dsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89098 | 397, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89099 | 397, // dsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89100 | 397, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89101 | 397, // dsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89102 | 397, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89103 | 397, // dsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89104 | 397, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89105 | 0, // psub1_then_psub |
| 89106 | 397, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89107 | 397, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89108 | 397, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89109 | 0, // x8sub_7_then_sub_32 |
| 89110 | 0, // x8sub_7_then_sub_32_hi |
| 89111 | 0, // x8sub_6_then_sub_32 |
| 89112 | 0, // x8sub_6_then_sub_32_hi |
| 89113 | 0, // x8sub_5_then_sub_32 |
| 89114 | 0, // x8sub_5_then_sub_32_hi |
| 89115 | 0, // x8sub_4_then_sub_32 |
| 89116 | 0, // x8sub_4_then_sub_32_hi |
| 89117 | 0, // x8sub_3_then_sub_32 |
| 89118 | 0, // x8sub_3_then_sub_32_hi |
| 89119 | 0, // x8sub_2_then_sub_32 |
| 89120 | 0, // x8sub_2_then_sub_32_hi |
| 89121 | 0, // x8sub_1_then_sub_32 |
| 89122 | 0, // x8sub_1_then_sub_32_hi |
| 89123 | 0, // subo64_then_sub_32 |
| 89124 | 0, // subo64_then_sub_32_hi |
| 89125 | 397, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89126 | 397, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89127 | 397, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89128 | 0, // dsub0_dsub1 |
| 89129 | 0, // dsub0_dsub1_dsub2 |
| 89130 | 397, // dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89131 | 397, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89132 | 397, // dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89133 | 397, // dsub_dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89134 | 397, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89135 | 397, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89136 | 0, // qsub0_qsub1 |
| 89137 | 0, // qsub0_qsub1_qsub2 |
| 89138 | 397, // qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89139 | 397, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89140 | 397, // qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89141 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89142 | 0, // x8sub_0_x8sub_1 |
| 89143 | 0, // x8sub_2_x8sub_3 |
| 89144 | 0, // x8sub_4_x8sub_5 |
| 89145 | 0, // x8sub_6_x8sub_7 |
| 89146 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89147 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89148 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89149 | 0, // sub_32_subo64_then_sub_32 |
| 89150 | 397, // zsub_qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89151 | 397, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89152 | 397, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89153 | 397, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89154 | 397, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89155 | 397, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89156 | 397, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89157 | 397, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 89158 | 0, // zsub0_zsub2 |
| 89159 | 0, // zsub1_zsub3 |
| 89160 | }, |
| 89161 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89162 | 398, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89163 | 398, // bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89164 | 398, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89165 | 0, // dsub0 |
| 89166 | 398, // dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89167 | 398, // dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89168 | 398, // dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89169 | 398, // dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89170 | 398, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89171 | 398, // hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89172 | 0, // psub |
| 89173 | 0, // psub0 |
| 89174 | 0, // psub1 |
| 89175 | 0, // qsub0 |
| 89176 | 398, // qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89177 | 398, // qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89178 | 398, // qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89179 | 398, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89180 | 398, // ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89181 | 0, // sub_32 |
| 89182 | 0, // sub_32_hi |
| 89183 | 0, // sube32 |
| 89184 | 0, // sube64 |
| 89185 | 0, // subo32 |
| 89186 | 0, // subo64 |
| 89187 | 0, // x8sub_0 |
| 89188 | 0, // x8sub_1 |
| 89189 | 0, // x8sub_2 |
| 89190 | 0, // x8sub_3 |
| 89191 | 0, // x8sub_4 |
| 89192 | 0, // x8sub_5 |
| 89193 | 0, // x8sub_6 |
| 89194 | 0, // x8sub_7 |
| 89195 | 0, // zasubb |
| 89196 | 0, // zasubd0 |
| 89197 | 0, // zasubd1 |
| 89198 | 0, // zasubh0 |
| 89199 | 0, // zasubh1 |
| 89200 | 0, // zasubq0 |
| 89201 | 0, // zasubq1 |
| 89202 | 0, // zasubs0 |
| 89203 | 0, // zasubs1 |
| 89204 | 398, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89205 | 398, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89206 | 398, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89207 | 398, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89208 | 398, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89209 | 398, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89210 | 0, // zasubd1_then_zasubq0 |
| 89211 | 0, // zasubd1_then_zasubq1 |
| 89212 | 0, // zasubs1_then_zasubd0 |
| 89213 | 0, // zasubs1_then_zasubd1 |
| 89214 | 0, // zasubs1_then_zasubq0 |
| 89215 | 0, // zasubs1_then_zasubq1 |
| 89216 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89217 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89218 | 0, // zasubh1_then_zasubd0 |
| 89219 | 0, // zasubh1_then_zasubd1 |
| 89220 | 0, // zasubh1_then_zasubq0 |
| 89221 | 0, // zasubh1_then_zasubq1 |
| 89222 | 0, // zasubh1_then_zasubs0 |
| 89223 | 0, // zasubh1_then_zasubs1 |
| 89224 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89225 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89226 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89227 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89228 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89229 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89230 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89231 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89232 | 398, // dsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89233 | 398, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89234 | 398, // dsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89235 | 398, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89236 | 398, // dsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89237 | 398, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89238 | 398, // dsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89239 | 398, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89240 | 398, // dsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89241 | 398, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89242 | 398, // dsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89243 | 398, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89244 | 398, // dsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89245 | 398, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89246 | 398, // dsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89247 | 398, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89248 | 398, // dsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89249 | 398, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89250 | 0, // psub1_then_psub |
| 89251 | 398, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89252 | 398, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89253 | 398, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89254 | 0, // x8sub_7_then_sub_32 |
| 89255 | 0, // x8sub_7_then_sub_32_hi |
| 89256 | 0, // x8sub_6_then_sub_32 |
| 89257 | 0, // x8sub_6_then_sub_32_hi |
| 89258 | 0, // x8sub_5_then_sub_32 |
| 89259 | 0, // x8sub_5_then_sub_32_hi |
| 89260 | 0, // x8sub_4_then_sub_32 |
| 89261 | 0, // x8sub_4_then_sub_32_hi |
| 89262 | 0, // x8sub_3_then_sub_32 |
| 89263 | 0, // x8sub_3_then_sub_32_hi |
| 89264 | 0, // x8sub_2_then_sub_32 |
| 89265 | 0, // x8sub_2_then_sub_32_hi |
| 89266 | 0, // x8sub_1_then_sub_32 |
| 89267 | 0, // x8sub_1_then_sub_32_hi |
| 89268 | 0, // subo64_then_sub_32 |
| 89269 | 0, // subo64_then_sub_32_hi |
| 89270 | 398, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89271 | 398, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89272 | 398, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89273 | 0, // dsub0_dsub1 |
| 89274 | 0, // dsub0_dsub1_dsub2 |
| 89275 | 398, // dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89276 | 398, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89277 | 398, // dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89278 | 398, // dsub_dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89279 | 398, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89280 | 398, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89281 | 0, // qsub0_qsub1 |
| 89282 | 0, // qsub0_qsub1_qsub2 |
| 89283 | 398, // qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89284 | 398, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89285 | 398, // qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89286 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89287 | 0, // x8sub_0_x8sub_1 |
| 89288 | 0, // x8sub_2_x8sub_3 |
| 89289 | 0, // x8sub_4_x8sub_5 |
| 89290 | 0, // x8sub_6_x8sub_7 |
| 89291 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89292 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89293 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89294 | 0, // sub_32_subo64_then_sub_32 |
| 89295 | 398, // zsub_qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89296 | 398, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89297 | 398, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89298 | 398, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89299 | 398, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89300 | 398, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89301 | 398, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89302 | 398, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 89303 | 0, // zsub0_zsub2 |
| 89304 | 0, // zsub1_zsub3 |
| 89305 | }, |
| 89306 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89307 | 399, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89308 | 399, // bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89309 | 399, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89310 | 0, // dsub0 |
| 89311 | 399, // dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89312 | 399, // dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89313 | 399, // dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89314 | 399, // dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89315 | 399, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89316 | 399, // hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89317 | 0, // psub |
| 89318 | 0, // psub0 |
| 89319 | 0, // psub1 |
| 89320 | 0, // qsub0 |
| 89321 | 399, // qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89322 | 399, // qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89323 | 399, // qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89324 | 399, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89325 | 399, // ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89326 | 0, // sub_32 |
| 89327 | 0, // sub_32_hi |
| 89328 | 0, // sube32 |
| 89329 | 0, // sube64 |
| 89330 | 0, // subo32 |
| 89331 | 0, // subo64 |
| 89332 | 0, // x8sub_0 |
| 89333 | 0, // x8sub_1 |
| 89334 | 0, // x8sub_2 |
| 89335 | 0, // x8sub_3 |
| 89336 | 0, // x8sub_4 |
| 89337 | 0, // x8sub_5 |
| 89338 | 0, // x8sub_6 |
| 89339 | 0, // x8sub_7 |
| 89340 | 0, // zasubb |
| 89341 | 0, // zasubd0 |
| 89342 | 0, // zasubd1 |
| 89343 | 0, // zasubh0 |
| 89344 | 0, // zasubh1 |
| 89345 | 0, // zasubq0 |
| 89346 | 0, // zasubq1 |
| 89347 | 0, // zasubs0 |
| 89348 | 0, // zasubs1 |
| 89349 | 399, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89350 | 399, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89351 | 399, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89352 | 399, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89353 | 399, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89354 | 399, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89355 | 0, // zasubd1_then_zasubq0 |
| 89356 | 0, // zasubd1_then_zasubq1 |
| 89357 | 0, // zasubs1_then_zasubd0 |
| 89358 | 0, // zasubs1_then_zasubd1 |
| 89359 | 0, // zasubs1_then_zasubq0 |
| 89360 | 0, // zasubs1_then_zasubq1 |
| 89361 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89362 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89363 | 0, // zasubh1_then_zasubd0 |
| 89364 | 0, // zasubh1_then_zasubd1 |
| 89365 | 0, // zasubh1_then_zasubq0 |
| 89366 | 0, // zasubh1_then_zasubq1 |
| 89367 | 0, // zasubh1_then_zasubs0 |
| 89368 | 0, // zasubh1_then_zasubs1 |
| 89369 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89370 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89371 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89372 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89373 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89374 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89375 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89376 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89377 | 399, // dsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89378 | 399, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89379 | 399, // dsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89380 | 399, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89381 | 399, // dsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89382 | 399, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89383 | 399, // dsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89384 | 399, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89385 | 399, // dsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89386 | 399, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89387 | 399, // dsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89388 | 399, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89389 | 399, // dsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89390 | 399, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89391 | 399, // dsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89392 | 399, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89393 | 399, // dsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89394 | 399, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89395 | 0, // psub1_then_psub |
| 89396 | 399, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89397 | 399, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89398 | 399, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89399 | 0, // x8sub_7_then_sub_32 |
| 89400 | 0, // x8sub_7_then_sub_32_hi |
| 89401 | 0, // x8sub_6_then_sub_32 |
| 89402 | 0, // x8sub_6_then_sub_32_hi |
| 89403 | 0, // x8sub_5_then_sub_32 |
| 89404 | 0, // x8sub_5_then_sub_32_hi |
| 89405 | 0, // x8sub_4_then_sub_32 |
| 89406 | 0, // x8sub_4_then_sub_32_hi |
| 89407 | 0, // x8sub_3_then_sub_32 |
| 89408 | 0, // x8sub_3_then_sub_32_hi |
| 89409 | 0, // x8sub_2_then_sub_32 |
| 89410 | 0, // x8sub_2_then_sub_32_hi |
| 89411 | 0, // x8sub_1_then_sub_32 |
| 89412 | 0, // x8sub_1_then_sub_32_hi |
| 89413 | 0, // subo64_then_sub_32 |
| 89414 | 0, // subo64_then_sub_32_hi |
| 89415 | 399, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89416 | 399, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89417 | 399, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89418 | 0, // dsub0_dsub1 |
| 89419 | 0, // dsub0_dsub1_dsub2 |
| 89420 | 399, // dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89421 | 399, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89422 | 399, // dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89423 | 399, // dsub_dsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89424 | 399, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89425 | 399, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89426 | 0, // qsub0_qsub1 |
| 89427 | 0, // qsub0_qsub1_qsub2 |
| 89428 | 399, // qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89429 | 399, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89430 | 399, // qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89431 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89432 | 0, // x8sub_0_x8sub_1 |
| 89433 | 0, // x8sub_2_x8sub_3 |
| 89434 | 0, // x8sub_4_x8sub_5 |
| 89435 | 0, // x8sub_6_x8sub_7 |
| 89436 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89437 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89438 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89439 | 0, // sub_32_subo64_then_sub_32 |
| 89440 | 399, // zsub_qsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89441 | 399, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89442 | 399, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89443 | 399, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89444 | 399, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89445 | 399, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89446 | 399, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89447 | 399, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 89448 | 0, // zsub0_zsub2 |
| 89449 | 0, // zsub1_zsub3 |
| 89450 | }, |
| 89451 | { // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89452 | 400, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89453 | 400, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89454 | 400, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89455 | 0, // dsub0 |
| 89456 | 400, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89457 | 400, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89458 | 400, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89459 | 400, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89460 | 400, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89461 | 400, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89462 | 0, // psub |
| 89463 | 0, // psub0 |
| 89464 | 0, // psub1 |
| 89465 | 0, // qsub0 |
| 89466 | 400, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89467 | 400, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89468 | 400, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89469 | 400, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89470 | 400, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89471 | 0, // sub_32 |
| 89472 | 0, // sub_32_hi |
| 89473 | 0, // sube32 |
| 89474 | 0, // sube64 |
| 89475 | 0, // subo32 |
| 89476 | 0, // subo64 |
| 89477 | 0, // x8sub_0 |
| 89478 | 0, // x8sub_1 |
| 89479 | 0, // x8sub_2 |
| 89480 | 0, // x8sub_3 |
| 89481 | 0, // x8sub_4 |
| 89482 | 0, // x8sub_5 |
| 89483 | 0, // x8sub_6 |
| 89484 | 0, // x8sub_7 |
| 89485 | 0, // zasubb |
| 89486 | 0, // zasubd0 |
| 89487 | 0, // zasubd1 |
| 89488 | 0, // zasubh0 |
| 89489 | 0, // zasubh1 |
| 89490 | 0, // zasubq0 |
| 89491 | 0, // zasubq1 |
| 89492 | 0, // zasubs0 |
| 89493 | 0, // zasubs1 |
| 89494 | 400, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89495 | 400, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89496 | 400, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89497 | 400, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89498 | 400, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89499 | 400, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89500 | 0, // zasubd1_then_zasubq0 |
| 89501 | 0, // zasubd1_then_zasubq1 |
| 89502 | 0, // zasubs1_then_zasubd0 |
| 89503 | 0, // zasubs1_then_zasubd1 |
| 89504 | 0, // zasubs1_then_zasubq0 |
| 89505 | 0, // zasubs1_then_zasubq1 |
| 89506 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89507 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89508 | 0, // zasubh1_then_zasubd0 |
| 89509 | 0, // zasubh1_then_zasubd1 |
| 89510 | 0, // zasubh1_then_zasubq0 |
| 89511 | 0, // zasubh1_then_zasubq1 |
| 89512 | 0, // zasubh1_then_zasubs0 |
| 89513 | 0, // zasubh1_then_zasubs1 |
| 89514 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89515 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89516 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89517 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89518 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89519 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89520 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89521 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89522 | 400, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89523 | 400, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89524 | 400, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89525 | 400, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89526 | 400, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89527 | 400, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89528 | 400, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89529 | 400, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89530 | 400, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89531 | 400, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89532 | 400, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89533 | 400, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89534 | 400, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89535 | 400, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89536 | 400, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89537 | 400, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89538 | 400, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89539 | 400, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89540 | 0, // psub1_then_psub |
| 89541 | 400, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89542 | 400, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89543 | 400, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89544 | 0, // x8sub_7_then_sub_32 |
| 89545 | 0, // x8sub_7_then_sub_32_hi |
| 89546 | 0, // x8sub_6_then_sub_32 |
| 89547 | 0, // x8sub_6_then_sub_32_hi |
| 89548 | 0, // x8sub_5_then_sub_32 |
| 89549 | 0, // x8sub_5_then_sub_32_hi |
| 89550 | 0, // x8sub_4_then_sub_32 |
| 89551 | 0, // x8sub_4_then_sub_32_hi |
| 89552 | 0, // x8sub_3_then_sub_32 |
| 89553 | 0, // x8sub_3_then_sub_32_hi |
| 89554 | 0, // x8sub_2_then_sub_32 |
| 89555 | 0, // x8sub_2_then_sub_32_hi |
| 89556 | 0, // x8sub_1_then_sub_32 |
| 89557 | 0, // x8sub_1_then_sub_32_hi |
| 89558 | 0, // subo64_then_sub_32 |
| 89559 | 0, // subo64_then_sub_32_hi |
| 89560 | 400, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89561 | 400, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89562 | 400, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89563 | 0, // dsub0_dsub1 |
| 89564 | 0, // dsub0_dsub1_dsub2 |
| 89565 | 400, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89566 | 400, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89567 | 400, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89568 | 400, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89569 | 400, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89570 | 400, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89571 | 0, // qsub0_qsub1 |
| 89572 | 0, // qsub0_qsub1_qsub2 |
| 89573 | 400, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89574 | 400, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89575 | 400, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89576 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89577 | 0, // x8sub_0_x8sub_1 |
| 89578 | 0, // x8sub_2_x8sub_3 |
| 89579 | 0, // x8sub_4_x8sub_5 |
| 89580 | 0, // x8sub_6_x8sub_7 |
| 89581 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89582 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89583 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89584 | 0, // sub_32_subo64_then_sub_32 |
| 89585 | 400, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89586 | 400, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89587 | 400, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89588 | 400, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89589 | 400, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89590 | 400, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89591 | 400, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89592 | 400, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 89593 | 0, // zsub0_zsub2 |
| 89594 | 0, // zsub1_zsub3 |
| 89595 | }, |
| 89596 | { // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89597 | 401, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89598 | 401, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89599 | 401, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89600 | 0, // dsub0 |
| 89601 | 401, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89602 | 401, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89603 | 401, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89604 | 401, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89605 | 401, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89606 | 401, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89607 | 0, // psub |
| 89608 | 0, // psub0 |
| 89609 | 0, // psub1 |
| 89610 | 0, // qsub0 |
| 89611 | 401, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89612 | 401, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89613 | 401, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89614 | 401, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89615 | 401, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89616 | 0, // sub_32 |
| 89617 | 0, // sub_32_hi |
| 89618 | 0, // sube32 |
| 89619 | 0, // sube64 |
| 89620 | 0, // subo32 |
| 89621 | 0, // subo64 |
| 89622 | 0, // x8sub_0 |
| 89623 | 0, // x8sub_1 |
| 89624 | 0, // x8sub_2 |
| 89625 | 0, // x8sub_3 |
| 89626 | 0, // x8sub_4 |
| 89627 | 0, // x8sub_5 |
| 89628 | 0, // x8sub_6 |
| 89629 | 0, // x8sub_7 |
| 89630 | 0, // zasubb |
| 89631 | 0, // zasubd0 |
| 89632 | 0, // zasubd1 |
| 89633 | 0, // zasubh0 |
| 89634 | 0, // zasubh1 |
| 89635 | 0, // zasubq0 |
| 89636 | 0, // zasubq1 |
| 89637 | 0, // zasubs0 |
| 89638 | 0, // zasubs1 |
| 89639 | 401, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89640 | 401, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89641 | 401, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89642 | 401, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89643 | 401, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89644 | 401, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89645 | 0, // zasubd1_then_zasubq0 |
| 89646 | 0, // zasubd1_then_zasubq1 |
| 89647 | 0, // zasubs1_then_zasubd0 |
| 89648 | 0, // zasubs1_then_zasubd1 |
| 89649 | 0, // zasubs1_then_zasubq0 |
| 89650 | 0, // zasubs1_then_zasubq1 |
| 89651 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89652 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89653 | 0, // zasubh1_then_zasubd0 |
| 89654 | 0, // zasubh1_then_zasubd1 |
| 89655 | 0, // zasubh1_then_zasubq0 |
| 89656 | 0, // zasubh1_then_zasubq1 |
| 89657 | 0, // zasubh1_then_zasubs0 |
| 89658 | 0, // zasubh1_then_zasubs1 |
| 89659 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89660 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89661 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89662 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89663 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89664 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89665 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89666 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89667 | 401, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89668 | 401, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89669 | 401, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89670 | 401, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89671 | 401, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89672 | 401, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89673 | 401, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89674 | 401, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89675 | 401, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89676 | 401, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89677 | 401, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89678 | 401, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89679 | 401, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89680 | 401, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89681 | 401, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89682 | 401, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89683 | 401, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89684 | 401, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89685 | 0, // psub1_then_psub |
| 89686 | 401, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89687 | 401, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89688 | 401, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89689 | 0, // x8sub_7_then_sub_32 |
| 89690 | 0, // x8sub_7_then_sub_32_hi |
| 89691 | 0, // x8sub_6_then_sub_32 |
| 89692 | 0, // x8sub_6_then_sub_32_hi |
| 89693 | 0, // x8sub_5_then_sub_32 |
| 89694 | 0, // x8sub_5_then_sub_32_hi |
| 89695 | 0, // x8sub_4_then_sub_32 |
| 89696 | 0, // x8sub_4_then_sub_32_hi |
| 89697 | 0, // x8sub_3_then_sub_32 |
| 89698 | 0, // x8sub_3_then_sub_32_hi |
| 89699 | 0, // x8sub_2_then_sub_32 |
| 89700 | 0, // x8sub_2_then_sub_32_hi |
| 89701 | 0, // x8sub_1_then_sub_32 |
| 89702 | 0, // x8sub_1_then_sub_32_hi |
| 89703 | 0, // subo64_then_sub_32 |
| 89704 | 0, // subo64_then_sub_32_hi |
| 89705 | 401, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89706 | 401, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89707 | 401, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89708 | 0, // dsub0_dsub1 |
| 89709 | 0, // dsub0_dsub1_dsub2 |
| 89710 | 401, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89711 | 401, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89712 | 401, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89713 | 401, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89714 | 401, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89715 | 401, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89716 | 0, // qsub0_qsub1 |
| 89717 | 0, // qsub0_qsub1_qsub2 |
| 89718 | 401, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89719 | 401, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89720 | 401, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89721 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89722 | 0, // x8sub_0_x8sub_1 |
| 89723 | 0, // x8sub_2_x8sub_3 |
| 89724 | 0, // x8sub_4_x8sub_5 |
| 89725 | 0, // x8sub_6_x8sub_7 |
| 89726 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89727 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89728 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89729 | 0, // sub_32_subo64_then_sub_32 |
| 89730 | 401, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89731 | 401, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89732 | 401, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89733 | 401, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89734 | 401, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89735 | 401, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89736 | 401, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89737 | 401, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 89738 | 0, // zsub0_zsub2 |
| 89739 | 0, // zsub1_zsub3 |
| 89740 | }, |
| 89741 | { // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89742 | 402, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89743 | 402, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89744 | 402, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89745 | 0, // dsub0 |
| 89746 | 402, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89747 | 402, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89748 | 402, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89749 | 402, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89750 | 402, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89751 | 402, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89752 | 0, // psub |
| 89753 | 0, // psub0 |
| 89754 | 0, // psub1 |
| 89755 | 0, // qsub0 |
| 89756 | 402, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89757 | 402, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89758 | 402, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89759 | 402, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89760 | 402, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89761 | 0, // sub_32 |
| 89762 | 0, // sub_32_hi |
| 89763 | 0, // sube32 |
| 89764 | 0, // sube64 |
| 89765 | 0, // subo32 |
| 89766 | 0, // subo64 |
| 89767 | 0, // x8sub_0 |
| 89768 | 0, // x8sub_1 |
| 89769 | 0, // x8sub_2 |
| 89770 | 0, // x8sub_3 |
| 89771 | 0, // x8sub_4 |
| 89772 | 0, // x8sub_5 |
| 89773 | 0, // x8sub_6 |
| 89774 | 0, // x8sub_7 |
| 89775 | 0, // zasubb |
| 89776 | 0, // zasubd0 |
| 89777 | 0, // zasubd1 |
| 89778 | 0, // zasubh0 |
| 89779 | 0, // zasubh1 |
| 89780 | 0, // zasubq0 |
| 89781 | 0, // zasubq1 |
| 89782 | 0, // zasubs0 |
| 89783 | 0, // zasubs1 |
| 89784 | 402, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89785 | 402, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89786 | 402, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89787 | 402, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89788 | 402, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89789 | 402, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89790 | 0, // zasubd1_then_zasubq0 |
| 89791 | 0, // zasubd1_then_zasubq1 |
| 89792 | 0, // zasubs1_then_zasubd0 |
| 89793 | 0, // zasubs1_then_zasubd1 |
| 89794 | 0, // zasubs1_then_zasubq0 |
| 89795 | 0, // zasubs1_then_zasubq1 |
| 89796 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89797 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89798 | 0, // zasubh1_then_zasubd0 |
| 89799 | 0, // zasubh1_then_zasubd1 |
| 89800 | 0, // zasubh1_then_zasubq0 |
| 89801 | 0, // zasubh1_then_zasubq1 |
| 89802 | 0, // zasubh1_then_zasubs0 |
| 89803 | 0, // zasubh1_then_zasubs1 |
| 89804 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89805 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89806 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89807 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89808 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89809 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89810 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89811 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89812 | 402, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89813 | 402, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89814 | 402, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89815 | 402, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89816 | 402, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89817 | 402, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89818 | 402, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89819 | 402, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89820 | 402, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89821 | 402, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89822 | 402, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89823 | 402, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89824 | 402, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89825 | 402, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89826 | 402, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89827 | 402, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89828 | 402, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89829 | 402, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89830 | 0, // psub1_then_psub |
| 89831 | 402, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89832 | 402, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89833 | 402, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89834 | 0, // x8sub_7_then_sub_32 |
| 89835 | 0, // x8sub_7_then_sub_32_hi |
| 89836 | 0, // x8sub_6_then_sub_32 |
| 89837 | 0, // x8sub_6_then_sub_32_hi |
| 89838 | 0, // x8sub_5_then_sub_32 |
| 89839 | 0, // x8sub_5_then_sub_32_hi |
| 89840 | 0, // x8sub_4_then_sub_32 |
| 89841 | 0, // x8sub_4_then_sub_32_hi |
| 89842 | 0, // x8sub_3_then_sub_32 |
| 89843 | 0, // x8sub_3_then_sub_32_hi |
| 89844 | 0, // x8sub_2_then_sub_32 |
| 89845 | 0, // x8sub_2_then_sub_32_hi |
| 89846 | 0, // x8sub_1_then_sub_32 |
| 89847 | 0, // x8sub_1_then_sub_32_hi |
| 89848 | 0, // subo64_then_sub_32 |
| 89849 | 0, // subo64_then_sub_32_hi |
| 89850 | 402, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89851 | 402, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89852 | 402, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89853 | 0, // dsub0_dsub1 |
| 89854 | 0, // dsub0_dsub1_dsub2 |
| 89855 | 402, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89856 | 402, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89857 | 402, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89858 | 402, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89859 | 402, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89860 | 402, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89861 | 0, // qsub0_qsub1 |
| 89862 | 0, // qsub0_qsub1_qsub2 |
| 89863 | 402, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89864 | 402, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89865 | 402, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89866 | 0, // sub_32_x8sub_1_then_sub_32 |
| 89867 | 0, // x8sub_0_x8sub_1 |
| 89868 | 0, // x8sub_2_x8sub_3 |
| 89869 | 0, // x8sub_4_x8sub_5 |
| 89870 | 0, // x8sub_6_x8sub_7 |
| 89871 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 89872 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 89873 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 89874 | 0, // sub_32_subo64_then_sub_32 |
| 89875 | 402, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89876 | 402, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89877 | 402, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89878 | 402, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89879 | 402, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89880 | 402, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89881 | 402, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89882 | 402, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 89883 | 0, // zsub0_zsub2 |
| 89884 | 0, // zsub1_zsub3 |
| 89885 | }, |
| 89886 | { // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89887 | 403, // bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89888 | 403, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89889 | 403, // dsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89890 | 0, // dsub0 |
| 89891 | 403, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89892 | 403, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89893 | 403, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89894 | 403, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89895 | 403, // hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89896 | 403, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89897 | 0, // psub |
| 89898 | 0, // psub0 |
| 89899 | 0, // psub1 |
| 89900 | 0, // qsub0 |
| 89901 | 403, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89902 | 403, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89903 | 403, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89904 | 403, // ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89905 | 403, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89906 | 0, // sub_32 |
| 89907 | 0, // sub_32_hi |
| 89908 | 0, // sube32 |
| 89909 | 0, // sube64 |
| 89910 | 0, // subo32 |
| 89911 | 0, // subo64 |
| 89912 | 0, // x8sub_0 |
| 89913 | 0, // x8sub_1 |
| 89914 | 0, // x8sub_2 |
| 89915 | 0, // x8sub_3 |
| 89916 | 0, // x8sub_4 |
| 89917 | 0, // x8sub_5 |
| 89918 | 0, // x8sub_6 |
| 89919 | 0, // x8sub_7 |
| 89920 | 0, // zasubb |
| 89921 | 0, // zasubd0 |
| 89922 | 0, // zasubd1 |
| 89923 | 0, // zasubh0 |
| 89924 | 0, // zasubh1 |
| 89925 | 0, // zasubq0 |
| 89926 | 0, // zasubq1 |
| 89927 | 0, // zasubs0 |
| 89928 | 0, // zasubs1 |
| 89929 | 403, // zsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89930 | 403, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89931 | 403, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89932 | 403, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89933 | 403, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89934 | 403, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89935 | 0, // zasubd1_then_zasubq0 |
| 89936 | 0, // zasubd1_then_zasubq1 |
| 89937 | 0, // zasubs1_then_zasubd0 |
| 89938 | 0, // zasubs1_then_zasubd1 |
| 89939 | 0, // zasubs1_then_zasubq0 |
| 89940 | 0, // zasubs1_then_zasubq1 |
| 89941 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 89942 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 89943 | 0, // zasubh1_then_zasubd0 |
| 89944 | 0, // zasubh1_then_zasubd1 |
| 89945 | 0, // zasubh1_then_zasubq0 |
| 89946 | 0, // zasubh1_then_zasubq1 |
| 89947 | 0, // zasubh1_then_zasubs0 |
| 89948 | 0, // zasubh1_then_zasubs1 |
| 89949 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 89950 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 89951 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 89952 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 89953 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 89954 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 89955 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 89956 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 89957 | 403, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89958 | 403, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89959 | 403, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89960 | 403, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89961 | 403, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89962 | 403, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89963 | 403, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89964 | 403, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89965 | 403, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89966 | 403, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89967 | 403, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89968 | 403, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89969 | 403, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89970 | 403, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89971 | 403, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89972 | 403, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89973 | 403, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89974 | 403, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89975 | 0, // psub1_then_psub |
| 89976 | 403, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89977 | 403, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89978 | 403, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89979 | 0, // x8sub_7_then_sub_32 |
| 89980 | 0, // x8sub_7_then_sub_32_hi |
| 89981 | 0, // x8sub_6_then_sub_32 |
| 89982 | 0, // x8sub_6_then_sub_32_hi |
| 89983 | 0, // x8sub_5_then_sub_32 |
| 89984 | 0, // x8sub_5_then_sub_32_hi |
| 89985 | 0, // x8sub_4_then_sub_32 |
| 89986 | 0, // x8sub_4_then_sub_32_hi |
| 89987 | 0, // x8sub_3_then_sub_32 |
| 89988 | 0, // x8sub_3_then_sub_32_hi |
| 89989 | 0, // x8sub_2_then_sub_32 |
| 89990 | 0, // x8sub_2_then_sub_32_hi |
| 89991 | 0, // x8sub_1_then_sub_32 |
| 89992 | 0, // x8sub_1_then_sub_32_hi |
| 89993 | 0, // subo64_then_sub_32 |
| 89994 | 0, // subo64_then_sub_32_hi |
| 89995 | 403, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89996 | 403, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89997 | 403, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 89998 | 0, // dsub0_dsub1 |
| 89999 | 0, // dsub0_dsub1_dsub2 |
| 90000 | 403, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90001 | 403, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90002 | 403, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90003 | 403, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90004 | 403, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90005 | 403, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90006 | 0, // qsub0_qsub1 |
| 90007 | 0, // qsub0_qsub1_qsub2 |
| 90008 | 403, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90009 | 403, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90010 | 403, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90011 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90012 | 0, // x8sub_0_x8sub_1 |
| 90013 | 0, // x8sub_2_x8sub_3 |
| 90014 | 0, // x8sub_4_x8sub_5 |
| 90015 | 0, // x8sub_6_x8sub_7 |
| 90016 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90017 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90018 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90019 | 0, // sub_32_subo64_then_sub_32 |
| 90020 | 403, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90021 | 403, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90022 | 403, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90023 | 403, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90024 | 403, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90025 | 403, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90026 | 403, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90027 | 403, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 90028 | 0, // zsub0_zsub2 |
| 90029 | 0, // zsub1_zsub3 |
| 90030 | }, |
| 90031 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90032 | 404, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90033 | 404, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90034 | 404, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90035 | 0, // dsub0 |
| 90036 | 404, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90037 | 404, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90038 | 404, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90039 | 404, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90040 | 404, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90041 | 404, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90042 | 0, // psub |
| 90043 | 0, // psub0 |
| 90044 | 0, // psub1 |
| 90045 | 0, // qsub0 |
| 90046 | 404, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90047 | 404, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90048 | 404, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90049 | 404, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90050 | 404, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90051 | 0, // sub_32 |
| 90052 | 0, // sub_32_hi |
| 90053 | 0, // sube32 |
| 90054 | 0, // sube64 |
| 90055 | 0, // subo32 |
| 90056 | 0, // subo64 |
| 90057 | 0, // x8sub_0 |
| 90058 | 0, // x8sub_1 |
| 90059 | 0, // x8sub_2 |
| 90060 | 0, // x8sub_3 |
| 90061 | 0, // x8sub_4 |
| 90062 | 0, // x8sub_5 |
| 90063 | 0, // x8sub_6 |
| 90064 | 0, // x8sub_7 |
| 90065 | 0, // zasubb |
| 90066 | 0, // zasubd0 |
| 90067 | 0, // zasubd1 |
| 90068 | 0, // zasubh0 |
| 90069 | 0, // zasubh1 |
| 90070 | 0, // zasubq0 |
| 90071 | 0, // zasubq1 |
| 90072 | 0, // zasubs0 |
| 90073 | 0, // zasubs1 |
| 90074 | 404, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90075 | 404, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90076 | 404, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90077 | 404, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90078 | 404, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90079 | 404, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90080 | 0, // zasubd1_then_zasubq0 |
| 90081 | 0, // zasubd1_then_zasubq1 |
| 90082 | 0, // zasubs1_then_zasubd0 |
| 90083 | 0, // zasubs1_then_zasubd1 |
| 90084 | 0, // zasubs1_then_zasubq0 |
| 90085 | 0, // zasubs1_then_zasubq1 |
| 90086 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90087 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90088 | 0, // zasubh1_then_zasubd0 |
| 90089 | 0, // zasubh1_then_zasubd1 |
| 90090 | 0, // zasubh1_then_zasubq0 |
| 90091 | 0, // zasubh1_then_zasubq1 |
| 90092 | 0, // zasubh1_then_zasubs0 |
| 90093 | 0, // zasubh1_then_zasubs1 |
| 90094 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90095 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90096 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90097 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90098 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90099 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90100 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90101 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90102 | 404, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90103 | 404, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90104 | 404, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90105 | 404, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90106 | 404, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90107 | 404, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90108 | 404, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90109 | 404, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90110 | 404, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90111 | 404, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90112 | 404, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90113 | 404, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90114 | 404, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90115 | 404, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90116 | 404, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90117 | 404, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90118 | 404, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90119 | 404, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90120 | 0, // psub1_then_psub |
| 90121 | 404, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90122 | 404, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90123 | 404, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90124 | 0, // x8sub_7_then_sub_32 |
| 90125 | 0, // x8sub_7_then_sub_32_hi |
| 90126 | 0, // x8sub_6_then_sub_32 |
| 90127 | 0, // x8sub_6_then_sub_32_hi |
| 90128 | 0, // x8sub_5_then_sub_32 |
| 90129 | 0, // x8sub_5_then_sub_32_hi |
| 90130 | 0, // x8sub_4_then_sub_32 |
| 90131 | 0, // x8sub_4_then_sub_32_hi |
| 90132 | 0, // x8sub_3_then_sub_32 |
| 90133 | 0, // x8sub_3_then_sub_32_hi |
| 90134 | 0, // x8sub_2_then_sub_32 |
| 90135 | 0, // x8sub_2_then_sub_32_hi |
| 90136 | 0, // x8sub_1_then_sub_32 |
| 90137 | 0, // x8sub_1_then_sub_32_hi |
| 90138 | 0, // subo64_then_sub_32 |
| 90139 | 0, // subo64_then_sub_32_hi |
| 90140 | 404, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90141 | 404, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90142 | 404, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90143 | 0, // dsub0_dsub1 |
| 90144 | 0, // dsub0_dsub1_dsub2 |
| 90145 | 404, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90146 | 404, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90147 | 404, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90148 | 404, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90149 | 404, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90150 | 404, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90151 | 0, // qsub0_qsub1 |
| 90152 | 0, // qsub0_qsub1_qsub2 |
| 90153 | 404, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90154 | 404, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90155 | 404, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90156 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90157 | 0, // x8sub_0_x8sub_1 |
| 90158 | 0, // x8sub_2_x8sub_3 |
| 90159 | 0, // x8sub_4_x8sub_5 |
| 90160 | 0, // x8sub_6_x8sub_7 |
| 90161 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90162 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90163 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90164 | 0, // sub_32_subo64_then_sub_32 |
| 90165 | 404, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90166 | 404, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90167 | 404, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90168 | 404, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90169 | 404, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90170 | 404, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90171 | 404, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90172 | 404, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 90173 | 0, // zsub0_zsub2 |
| 90174 | 0, // zsub1_zsub3 |
| 90175 | }, |
| 90176 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90177 | 405, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90178 | 405, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90179 | 405, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90180 | 0, // dsub0 |
| 90181 | 405, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90182 | 405, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90183 | 405, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90184 | 405, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90185 | 405, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90186 | 405, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90187 | 0, // psub |
| 90188 | 0, // psub0 |
| 90189 | 0, // psub1 |
| 90190 | 0, // qsub0 |
| 90191 | 405, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90192 | 405, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90193 | 405, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90194 | 405, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90195 | 405, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90196 | 0, // sub_32 |
| 90197 | 0, // sub_32_hi |
| 90198 | 0, // sube32 |
| 90199 | 0, // sube64 |
| 90200 | 0, // subo32 |
| 90201 | 0, // subo64 |
| 90202 | 0, // x8sub_0 |
| 90203 | 0, // x8sub_1 |
| 90204 | 0, // x8sub_2 |
| 90205 | 0, // x8sub_3 |
| 90206 | 0, // x8sub_4 |
| 90207 | 0, // x8sub_5 |
| 90208 | 0, // x8sub_6 |
| 90209 | 0, // x8sub_7 |
| 90210 | 0, // zasubb |
| 90211 | 0, // zasubd0 |
| 90212 | 0, // zasubd1 |
| 90213 | 0, // zasubh0 |
| 90214 | 0, // zasubh1 |
| 90215 | 0, // zasubq0 |
| 90216 | 0, // zasubq1 |
| 90217 | 0, // zasubs0 |
| 90218 | 0, // zasubs1 |
| 90219 | 405, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90220 | 405, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90221 | 405, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90222 | 405, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90223 | 405, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90224 | 405, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90225 | 0, // zasubd1_then_zasubq0 |
| 90226 | 0, // zasubd1_then_zasubq1 |
| 90227 | 0, // zasubs1_then_zasubd0 |
| 90228 | 0, // zasubs1_then_zasubd1 |
| 90229 | 0, // zasubs1_then_zasubq0 |
| 90230 | 0, // zasubs1_then_zasubq1 |
| 90231 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90232 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90233 | 0, // zasubh1_then_zasubd0 |
| 90234 | 0, // zasubh1_then_zasubd1 |
| 90235 | 0, // zasubh1_then_zasubq0 |
| 90236 | 0, // zasubh1_then_zasubq1 |
| 90237 | 0, // zasubh1_then_zasubs0 |
| 90238 | 0, // zasubh1_then_zasubs1 |
| 90239 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90240 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90241 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90242 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90243 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90244 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90245 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90246 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90247 | 405, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90248 | 405, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90249 | 405, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90250 | 405, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90251 | 405, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90252 | 405, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90253 | 405, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90254 | 405, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90255 | 405, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90256 | 405, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90257 | 405, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90258 | 405, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90259 | 405, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90260 | 405, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90261 | 405, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90262 | 405, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90263 | 405, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90264 | 405, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90265 | 0, // psub1_then_psub |
| 90266 | 405, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90267 | 405, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90268 | 405, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90269 | 0, // x8sub_7_then_sub_32 |
| 90270 | 0, // x8sub_7_then_sub_32_hi |
| 90271 | 0, // x8sub_6_then_sub_32 |
| 90272 | 0, // x8sub_6_then_sub_32_hi |
| 90273 | 0, // x8sub_5_then_sub_32 |
| 90274 | 0, // x8sub_5_then_sub_32_hi |
| 90275 | 0, // x8sub_4_then_sub_32 |
| 90276 | 0, // x8sub_4_then_sub_32_hi |
| 90277 | 0, // x8sub_3_then_sub_32 |
| 90278 | 0, // x8sub_3_then_sub_32_hi |
| 90279 | 0, // x8sub_2_then_sub_32 |
| 90280 | 0, // x8sub_2_then_sub_32_hi |
| 90281 | 0, // x8sub_1_then_sub_32 |
| 90282 | 0, // x8sub_1_then_sub_32_hi |
| 90283 | 0, // subo64_then_sub_32 |
| 90284 | 0, // subo64_then_sub_32_hi |
| 90285 | 405, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90286 | 405, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90287 | 405, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90288 | 0, // dsub0_dsub1 |
| 90289 | 0, // dsub0_dsub1_dsub2 |
| 90290 | 405, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90291 | 405, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90292 | 405, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90293 | 405, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90294 | 405, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90295 | 405, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90296 | 0, // qsub0_qsub1 |
| 90297 | 0, // qsub0_qsub1_qsub2 |
| 90298 | 405, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90299 | 405, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90300 | 405, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90301 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90302 | 0, // x8sub_0_x8sub_1 |
| 90303 | 0, // x8sub_2_x8sub_3 |
| 90304 | 0, // x8sub_4_x8sub_5 |
| 90305 | 0, // x8sub_6_x8sub_7 |
| 90306 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90307 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90308 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90309 | 0, // sub_32_subo64_then_sub_32 |
| 90310 | 405, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90311 | 405, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90312 | 405, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90313 | 405, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90314 | 405, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90315 | 405, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90316 | 405, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90317 | 405, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 90318 | 0, // zsub0_zsub2 |
| 90319 | 0, // zsub1_zsub3 |
| 90320 | }, |
| 90321 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90322 | 406, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90323 | 406, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90324 | 406, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90325 | 0, // dsub0 |
| 90326 | 406, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90327 | 406, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90328 | 406, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90329 | 406, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90330 | 406, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90331 | 406, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90332 | 0, // psub |
| 90333 | 0, // psub0 |
| 90334 | 0, // psub1 |
| 90335 | 0, // qsub0 |
| 90336 | 406, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90337 | 406, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90338 | 406, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90339 | 406, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90340 | 406, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90341 | 0, // sub_32 |
| 90342 | 0, // sub_32_hi |
| 90343 | 0, // sube32 |
| 90344 | 0, // sube64 |
| 90345 | 0, // subo32 |
| 90346 | 0, // subo64 |
| 90347 | 0, // x8sub_0 |
| 90348 | 0, // x8sub_1 |
| 90349 | 0, // x8sub_2 |
| 90350 | 0, // x8sub_3 |
| 90351 | 0, // x8sub_4 |
| 90352 | 0, // x8sub_5 |
| 90353 | 0, // x8sub_6 |
| 90354 | 0, // x8sub_7 |
| 90355 | 0, // zasubb |
| 90356 | 0, // zasubd0 |
| 90357 | 0, // zasubd1 |
| 90358 | 0, // zasubh0 |
| 90359 | 0, // zasubh1 |
| 90360 | 0, // zasubq0 |
| 90361 | 0, // zasubq1 |
| 90362 | 0, // zasubs0 |
| 90363 | 0, // zasubs1 |
| 90364 | 406, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90365 | 406, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90366 | 406, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90367 | 406, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90368 | 406, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90369 | 406, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90370 | 0, // zasubd1_then_zasubq0 |
| 90371 | 0, // zasubd1_then_zasubq1 |
| 90372 | 0, // zasubs1_then_zasubd0 |
| 90373 | 0, // zasubs1_then_zasubd1 |
| 90374 | 0, // zasubs1_then_zasubq0 |
| 90375 | 0, // zasubs1_then_zasubq1 |
| 90376 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90377 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90378 | 0, // zasubh1_then_zasubd0 |
| 90379 | 0, // zasubh1_then_zasubd1 |
| 90380 | 0, // zasubh1_then_zasubq0 |
| 90381 | 0, // zasubh1_then_zasubq1 |
| 90382 | 0, // zasubh1_then_zasubs0 |
| 90383 | 0, // zasubh1_then_zasubs1 |
| 90384 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90385 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90386 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90387 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90388 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90389 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90390 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90391 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90392 | 406, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90393 | 406, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90394 | 406, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90395 | 406, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90396 | 406, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90397 | 406, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90398 | 406, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90399 | 406, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90400 | 406, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90401 | 406, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90402 | 406, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90403 | 406, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90404 | 406, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90405 | 406, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90406 | 406, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90407 | 406, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90408 | 406, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90409 | 406, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90410 | 0, // psub1_then_psub |
| 90411 | 406, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90412 | 406, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90413 | 406, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90414 | 0, // x8sub_7_then_sub_32 |
| 90415 | 0, // x8sub_7_then_sub_32_hi |
| 90416 | 0, // x8sub_6_then_sub_32 |
| 90417 | 0, // x8sub_6_then_sub_32_hi |
| 90418 | 0, // x8sub_5_then_sub_32 |
| 90419 | 0, // x8sub_5_then_sub_32_hi |
| 90420 | 0, // x8sub_4_then_sub_32 |
| 90421 | 0, // x8sub_4_then_sub_32_hi |
| 90422 | 0, // x8sub_3_then_sub_32 |
| 90423 | 0, // x8sub_3_then_sub_32_hi |
| 90424 | 0, // x8sub_2_then_sub_32 |
| 90425 | 0, // x8sub_2_then_sub_32_hi |
| 90426 | 0, // x8sub_1_then_sub_32 |
| 90427 | 0, // x8sub_1_then_sub_32_hi |
| 90428 | 0, // subo64_then_sub_32 |
| 90429 | 0, // subo64_then_sub_32_hi |
| 90430 | 406, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90431 | 406, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90432 | 406, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90433 | 0, // dsub0_dsub1 |
| 90434 | 0, // dsub0_dsub1_dsub2 |
| 90435 | 406, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90436 | 406, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90437 | 406, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90438 | 406, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90439 | 406, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90440 | 406, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90441 | 0, // qsub0_qsub1 |
| 90442 | 0, // qsub0_qsub1_qsub2 |
| 90443 | 406, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90444 | 406, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90445 | 406, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90446 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90447 | 0, // x8sub_0_x8sub_1 |
| 90448 | 0, // x8sub_2_x8sub_3 |
| 90449 | 0, // x8sub_4_x8sub_5 |
| 90450 | 0, // x8sub_6_x8sub_7 |
| 90451 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90452 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90453 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90454 | 0, // sub_32_subo64_then_sub_32 |
| 90455 | 406, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90456 | 406, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90457 | 406, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90458 | 406, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90459 | 406, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90460 | 406, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90461 | 406, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90462 | 406, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 90463 | 0, // zsub0_zsub2 |
| 90464 | 0, // zsub1_zsub3 |
| 90465 | }, |
| 90466 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90467 | 407, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90468 | 407, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90469 | 407, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90470 | 0, // dsub0 |
| 90471 | 407, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90472 | 407, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90473 | 407, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90474 | 407, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90475 | 407, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90476 | 407, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90477 | 0, // psub |
| 90478 | 0, // psub0 |
| 90479 | 0, // psub1 |
| 90480 | 0, // qsub0 |
| 90481 | 407, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90482 | 407, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90483 | 407, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90484 | 407, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90485 | 407, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90486 | 0, // sub_32 |
| 90487 | 0, // sub_32_hi |
| 90488 | 0, // sube32 |
| 90489 | 0, // sube64 |
| 90490 | 0, // subo32 |
| 90491 | 0, // subo64 |
| 90492 | 0, // x8sub_0 |
| 90493 | 0, // x8sub_1 |
| 90494 | 0, // x8sub_2 |
| 90495 | 0, // x8sub_3 |
| 90496 | 0, // x8sub_4 |
| 90497 | 0, // x8sub_5 |
| 90498 | 0, // x8sub_6 |
| 90499 | 0, // x8sub_7 |
| 90500 | 0, // zasubb |
| 90501 | 0, // zasubd0 |
| 90502 | 0, // zasubd1 |
| 90503 | 0, // zasubh0 |
| 90504 | 0, // zasubh1 |
| 90505 | 0, // zasubq0 |
| 90506 | 0, // zasubq1 |
| 90507 | 0, // zasubs0 |
| 90508 | 0, // zasubs1 |
| 90509 | 407, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90510 | 407, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90511 | 407, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90512 | 407, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90513 | 407, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90514 | 407, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90515 | 0, // zasubd1_then_zasubq0 |
| 90516 | 0, // zasubd1_then_zasubq1 |
| 90517 | 0, // zasubs1_then_zasubd0 |
| 90518 | 0, // zasubs1_then_zasubd1 |
| 90519 | 0, // zasubs1_then_zasubq0 |
| 90520 | 0, // zasubs1_then_zasubq1 |
| 90521 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90522 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90523 | 0, // zasubh1_then_zasubd0 |
| 90524 | 0, // zasubh1_then_zasubd1 |
| 90525 | 0, // zasubh1_then_zasubq0 |
| 90526 | 0, // zasubh1_then_zasubq1 |
| 90527 | 0, // zasubh1_then_zasubs0 |
| 90528 | 0, // zasubh1_then_zasubs1 |
| 90529 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90530 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90531 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90532 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90533 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90534 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90535 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90536 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90537 | 407, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90538 | 407, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90539 | 407, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90540 | 407, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90541 | 407, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90542 | 407, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90543 | 407, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90544 | 407, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90545 | 407, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90546 | 407, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90547 | 407, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90548 | 407, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90549 | 407, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90550 | 407, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90551 | 407, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90552 | 407, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90553 | 407, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90554 | 407, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90555 | 0, // psub1_then_psub |
| 90556 | 407, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90557 | 407, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90558 | 407, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90559 | 0, // x8sub_7_then_sub_32 |
| 90560 | 0, // x8sub_7_then_sub_32_hi |
| 90561 | 0, // x8sub_6_then_sub_32 |
| 90562 | 0, // x8sub_6_then_sub_32_hi |
| 90563 | 0, // x8sub_5_then_sub_32 |
| 90564 | 0, // x8sub_5_then_sub_32_hi |
| 90565 | 0, // x8sub_4_then_sub_32 |
| 90566 | 0, // x8sub_4_then_sub_32_hi |
| 90567 | 0, // x8sub_3_then_sub_32 |
| 90568 | 0, // x8sub_3_then_sub_32_hi |
| 90569 | 0, // x8sub_2_then_sub_32 |
| 90570 | 0, // x8sub_2_then_sub_32_hi |
| 90571 | 0, // x8sub_1_then_sub_32 |
| 90572 | 0, // x8sub_1_then_sub_32_hi |
| 90573 | 0, // subo64_then_sub_32 |
| 90574 | 0, // subo64_then_sub_32_hi |
| 90575 | 407, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90576 | 407, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90577 | 407, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90578 | 0, // dsub0_dsub1 |
| 90579 | 0, // dsub0_dsub1_dsub2 |
| 90580 | 407, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90581 | 407, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90582 | 407, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90583 | 407, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90584 | 407, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90585 | 407, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90586 | 0, // qsub0_qsub1 |
| 90587 | 0, // qsub0_qsub1_qsub2 |
| 90588 | 407, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90589 | 407, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90590 | 407, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90591 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90592 | 0, // x8sub_0_x8sub_1 |
| 90593 | 0, // x8sub_2_x8sub_3 |
| 90594 | 0, // x8sub_4_x8sub_5 |
| 90595 | 0, // x8sub_6_x8sub_7 |
| 90596 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90597 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90598 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90599 | 0, // sub_32_subo64_then_sub_32 |
| 90600 | 407, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90601 | 407, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90602 | 407, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90603 | 407, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90604 | 407, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90605 | 407, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90606 | 407, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90607 | 407, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 90608 | 0, // zsub0_zsub2 |
| 90609 | 0, // zsub1_zsub3 |
| 90610 | }, |
| 90611 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90612 | 408, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90613 | 408, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90614 | 408, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90615 | 0, // dsub0 |
| 90616 | 408, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90617 | 408, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90618 | 408, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90619 | 408, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90620 | 408, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90621 | 408, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90622 | 0, // psub |
| 90623 | 0, // psub0 |
| 90624 | 0, // psub1 |
| 90625 | 0, // qsub0 |
| 90626 | 408, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90627 | 408, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90628 | 408, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90629 | 408, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90630 | 408, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90631 | 0, // sub_32 |
| 90632 | 0, // sub_32_hi |
| 90633 | 0, // sube32 |
| 90634 | 0, // sube64 |
| 90635 | 0, // subo32 |
| 90636 | 0, // subo64 |
| 90637 | 0, // x8sub_0 |
| 90638 | 0, // x8sub_1 |
| 90639 | 0, // x8sub_2 |
| 90640 | 0, // x8sub_3 |
| 90641 | 0, // x8sub_4 |
| 90642 | 0, // x8sub_5 |
| 90643 | 0, // x8sub_6 |
| 90644 | 0, // x8sub_7 |
| 90645 | 0, // zasubb |
| 90646 | 0, // zasubd0 |
| 90647 | 0, // zasubd1 |
| 90648 | 0, // zasubh0 |
| 90649 | 0, // zasubh1 |
| 90650 | 0, // zasubq0 |
| 90651 | 0, // zasubq1 |
| 90652 | 0, // zasubs0 |
| 90653 | 0, // zasubs1 |
| 90654 | 408, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90655 | 408, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90656 | 408, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90657 | 408, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90658 | 408, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90659 | 408, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90660 | 0, // zasubd1_then_zasubq0 |
| 90661 | 0, // zasubd1_then_zasubq1 |
| 90662 | 0, // zasubs1_then_zasubd0 |
| 90663 | 0, // zasubs1_then_zasubd1 |
| 90664 | 0, // zasubs1_then_zasubq0 |
| 90665 | 0, // zasubs1_then_zasubq1 |
| 90666 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90667 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90668 | 0, // zasubh1_then_zasubd0 |
| 90669 | 0, // zasubh1_then_zasubd1 |
| 90670 | 0, // zasubh1_then_zasubq0 |
| 90671 | 0, // zasubh1_then_zasubq1 |
| 90672 | 0, // zasubh1_then_zasubs0 |
| 90673 | 0, // zasubh1_then_zasubs1 |
| 90674 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90675 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90676 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90677 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90678 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90679 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90680 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90681 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90682 | 408, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90683 | 408, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90684 | 408, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90685 | 408, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90686 | 408, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90687 | 408, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90688 | 408, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90689 | 408, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90690 | 408, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90691 | 408, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90692 | 408, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90693 | 408, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90694 | 408, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90695 | 408, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90696 | 408, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90697 | 408, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90698 | 408, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90699 | 408, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90700 | 0, // psub1_then_psub |
| 90701 | 408, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90702 | 408, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90703 | 408, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90704 | 0, // x8sub_7_then_sub_32 |
| 90705 | 0, // x8sub_7_then_sub_32_hi |
| 90706 | 0, // x8sub_6_then_sub_32 |
| 90707 | 0, // x8sub_6_then_sub_32_hi |
| 90708 | 0, // x8sub_5_then_sub_32 |
| 90709 | 0, // x8sub_5_then_sub_32_hi |
| 90710 | 0, // x8sub_4_then_sub_32 |
| 90711 | 0, // x8sub_4_then_sub_32_hi |
| 90712 | 0, // x8sub_3_then_sub_32 |
| 90713 | 0, // x8sub_3_then_sub_32_hi |
| 90714 | 0, // x8sub_2_then_sub_32 |
| 90715 | 0, // x8sub_2_then_sub_32_hi |
| 90716 | 0, // x8sub_1_then_sub_32 |
| 90717 | 0, // x8sub_1_then_sub_32_hi |
| 90718 | 0, // subo64_then_sub_32 |
| 90719 | 0, // subo64_then_sub_32_hi |
| 90720 | 408, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90721 | 408, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90722 | 408, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 90723 | 0, // dsub0_dsub1 |
| 90724 | 0, // dsub0_dsub1_dsub2 |
| 90725 | 422, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90726 | 422, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90727 | 422, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90728 | 422, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90729 | 422, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90730 | 422, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90731 | 0, // qsub0_qsub1 |
| 90732 | 0, // qsub0_qsub1_qsub2 |
| 90733 | 422, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90734 | 422, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90735 | 422, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90736 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90737 | 0, // x8sub_0_x8sub_1 |
| 90738 | 0, // x8sub_2_x8sub_3 |
| 90739 | 0, // x8sub_4_x8sub_5 |
| 90740 | 0, // x8sub_6_x8sub_7 |
| 90741 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90742 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90743 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90744 | 0, // sub_32_subo64_then_sub_32 |
| 90745 | 422, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90746 | 422, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90747 | 422, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90748 | 422, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90749 | 422, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90750 | 422, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90751 | 422, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90752 | 422, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 90753 | 445, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 90754 | 445, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 90755 | }, |
| 90756 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90757 | 409, // bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90758 | 409, // bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90759 | 409, // dsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90760 | 0, // dsub0 |
| 90761 | 409, // dsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90762 | 409, // dsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90763 | 409, // dsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90764 | 409, // dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90765 | 409, // hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90766 | 409, // hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90767 | 0, // psub |
| 90768 | 0, // psub0 |
| 90769 | 0, // psub1 |
| 90770 | 0, // qsub0 |
| 90771 | 409, // qsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90772 | 409, // qsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90773 | 409, // qsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90774 | 409, // ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90775 | 409, // ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90776 | 0, // sub_32 |
| 90777 | 0, // sub_32_hi |
| 90778 | 0, // sube32 |
| 90779 | 0, // sube64 |
| 90780 | 0, // subo32 |
| 90781 | 0, // subo64 |
| 90782 | 0, // x8sub_0 |
| 90783 | 0, // x8sub_1 |
| 90784 | 0, // x8sub_2 |
| 90785 | 0, // x8sub_3 |
| 90786 | 0, // x8sub_4 |
| 90787 | 0, // x8sub_5 |
| 90788 | 0, // x8sub_6 |
| 90789 | 0, // x8sub_7 |
| 90790 | 0, // zasubb |
| 90791 | 0, // zasubd0 |
| 90792 | 0, // zasubd1 |
| 90793 | 0, // zasubh0 |
| 90794 | 0, // zasubh1 |
| 90795 | 0, // zasubq0 |
| 90796 | 0, // zasubq1 |
| 90797 | 0, // zasubs0 |
| 90798 | 0, // zasubs1 |
| 90799 | 409, // zsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90800 | 409, // zsub0 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90801 | 409, // zsub1 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90802 | 409, // zsub2 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90803 | 409, // zsub3 -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90804 | 409, // zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90805 | 0, // zasubd1_then_zasubq0 |
| 90806 | 0, // zasubd1_then_zasubq1 |
| 90807 | 0, // zasubs1_then_zasubd0 |
| 90808 | 0, // zasubs1_then_zasubd1 |
| 90809 | 0, // zasubs1_then_zasubq0 |
| 90810 | 0, // zasubs1_then_zasubq1 |
| 90811 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90812 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90813 | 0, // zasubh1_then_zasubd0 |
| 90814 | 0, // zasubh1_then_zasubd1 |
| 90815 | 0, // zasubh1_then_zasubq0 |
| 90816 | 0, // zasubh1_then_zasubq1 |
| 90817 | 0, // zasubh1_then_zasubs0 |
| 90818 | 0, // zasubh1_then_zasubs1 |
| 90819 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90820 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90821 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90822 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90823 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90824 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90825 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90826 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90827 | 409, // dsub1_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90828 | 409, // dsub1_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90829 | 409, // dsub1_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90830 | 409, // dsub1_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90831 | 409, // dsub1_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90832 | 409, // dsub1_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90833 | 409, // dsub3_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90834 | 409, // dsub3_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90835 | 409, // dsub3_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90836 | 409, // dsub3_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90837 | 409, // dsub3_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90838 | 409, // dsub3_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90839 | 409, // dsub2_then_bsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90840 | 409, // dsub2_then_bsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90841 | 409, // dsub2_then_hsub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90842 | 409, // dsub2_then_hsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90843 | 409, // dsub2_then_ssub -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90844 | 409, // dsub2_then_ssub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90845 | 0, // psub1_then_psub |
| 90846 | 409, // qsub1_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90847 | 409, // qsub3_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90848 | 409, // qsub2_then_dsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90849 | 0, // x8sub_7_then_sub_32 |
| 90850 | 0, // x8sub_7_then_sub_32_hi |
| 90851 | 0, // x8sub_6_then_sub_32 |
| 90852 | 0, // x8sub_6_then_sub_32_hi |
| 90853 | 0, // x8sub_5_then_sub_32 |
| 90854 | 0, // x8sub_5_then_sub_32_hi |
| 90855 | 0, // x8sub_4_then_sub_32 |
| 90856 | 0, // x8sub_4_then_sub_32_hi |
| 90857 | 0, // x8sub_3_then_sub_32 |
| 90858 | 0, // x8sub_3_then_sub_32_hi |
| 90859 | 0, // x8sub_2_then_sub_32 |
| 90860 | 0, // x8sub_2_then_sub_32_hi |
| 90861 | 0, // x8sub_1_then_sub_32 |
| 90862 | 0, // x8sub_1_then_sub_32_hi |
| 90863 | 0, // subo64_then_sub_32 |
| 90864 | 0, // subo64_then_sub_32_hi |
| 90865 | 409, // zsub1_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90866 | 409, // zsub3_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90867 | 409, // zsub2_then_zsub_hi -> ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 90868 | 0, // dsub0_dsub1 |
| 90869 | 0, // dsub0_dsub1_dsub2 |
| 90870 | 423, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90871 | 423, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90872 | 423, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90873 | 423, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90874 | 423, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90875 | 423, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90876 | 0, // qsub0_qsub1 |
| 90877 | 0, // qsub0_qsub1_qsub2 |
| 90878 | 423, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90879 | 423, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90880 | 423, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90881 | 0, // sub_32_x8sub_1_then_sub_32 |
| 90882 | 0, // x8sub_0_x8sub_1 |
| 90883 | 0, // x8sub_2_x8sub_3 |
| 90884 | 0, // x8sub_4_x8sub_5 |
| 90885 | 0, // x8sub_6_x8sub_7 |
| 90886 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 90887 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 90888 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 90889 | 0, // sub_32_subo64_then_sub_32 |
| 90890 | 423, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90891 | 423, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90892 | 423, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90893 | 423, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90894 | 423, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90895 | 423, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90896 | 423, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90897 | 423, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 90898 | 446, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 90899 | 446, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 90900 | }, |
| 90901 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90902 | 410, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90903 | 410, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90904 | 410, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90905 | 0, // dsub0 |
| 90906 | 410, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90907 | 410, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90908 | 410, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90909 | 410, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90910 | 410, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90911 | 410, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90912 | 0, // psub |
| 90913 | 0, // psub0 |
| 90914 | 0, // psub1 |
| 90915 | 0, // qsub0 |
| 90916 | 410, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90917 | 410, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90918 | 410, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90919 | 410, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90920 | 410, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90921 | 0, // sub_32 |
| 90922 | 0, // sub_32_hi |
| 90923 | 0, // sube32 |
| 90924 | 0, // sube64 |
| 90925 | 0, // subo32 |
| 90926 | 0, // subo64 |
| 90927 | 0, // x8sub_0 |
| 90928 | 0, // x8sub_1 |
| 90929 | 0, // x8sub_2 |
| 90930 | 0, // x8sub_3 |
| 90931 | 0, // x8sub_4 |
| 90932 | 0, // x8sub_5 |
| 90933 | 0, // x8sub_6 |
| 90934 | 0, // x8sub_7 |
| 90935 | 0, // zasubb |
| 90936 | 0, // zasubd0 |
| 90937 | 0, // zasubd1 |
| 90938 | 0, // zasubh0 |
| 90939 | 0, // zasubh1 |
| 90940 | 0, // zasubq0 |
| 90941 | 0, // zasubq1 |
| 90942 | 0, // zasubs0 |
| 90943 | 0, // zasubs1 |
| 90944 | 410, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90945 | 410, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90946 | 410, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90947 | 410, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90948 | 410, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90949 | 410, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90950 | 0, // zasubd1_then_zasubq0 |
| 90951 | 0, // zasubd1_then_zasubq1 |
| 90952 | 0, // zasubs1_then_zasubd0 |
| 90953 | 0, // zasubs1_then_zasubd1 |
| 90954 | 0, // zasubs1_then_zasubq0 |
| 90955 | 0, // zasubs1_then_zasubq1 |
| 90956 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 90957 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 90958 | 0, // zasubh1_then_zasubd0 |
| 90959 | 0, // zasubh1_then_zasubd1 |
| 90960 | 0, // zasubh1_then_zasubq0 |
| 90961 | 0, // zasubh1_then_zasubq1 |
| 90962 | 0, // zasubh1_then_zasubs0 |
| 90963 | 0, // zasubh1_then_zasubs1 |
| 90964 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 90965 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 90966 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 90967 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 90968 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 90969 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 90970 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 90971 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 90972 | 410, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90973 | 410, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90974 | 410, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90975 | 410, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90976 | 410, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90977 | 410, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90978 | 410, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90979 | 410, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90980 | 410, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90981 | 410, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90982 | 410, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90983 | 410, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90984 | 410, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90985 | 410, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90986 | 410, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90987 | 410, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90988 | 410, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90989 | 410, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90990 | 0, // psub1_then_psub |
| 90991 | 410, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90992 | 410, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90993 | 410, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 90994 | 0, // x8sub_7_then_sub_32 |
| 90995 | 0, // x8sub_7_then_sub_32_hi |
| 90996 | 0, // x8sub_6_then_sub_32 |
| 90997 | 0, // x8sub_6_then_sub_32_hi |
| 90998 | 0, // x8sub_5_then_sub_32 |
| 90999 | 0, // x8sub_5_then_sub_32_hi |
| 91000 | 0, // x8sub_4_then_sub_32 |
| 91001 | 0, // x8sub_4_then_sub_32_hi |
| 91002 | 0, // x8sub_3_then_sub_32 |
| 91003 | 0, // x8sub_3_then_sub_32_hi |
| 91004 | 0, // x8sub_2_then_sub_32 |
| 91005 | 0, // x8sub_2_then_sub_32_hi |
| 91006 | 0, // x8sub_1_then_sub_32 |
| 91007 | 0, // x8sub_1_then_sub_32_hi |
| 91008 | 0, // subo64_then_sub_32 |
| 91009 | 0, // subo64_then_sub_32_hi |
| 91010 | 410, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91011 | 410, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91012 | 410, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91013 | 0, // dsub0_dsub1 |
| 91014 | 0, // dsub0_dsub1_dsub2 |
| 91015 | 410, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91016 | 410, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91017 | 410, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91018 | 410, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91019 | 410, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91020 | 410, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91021 | 0, // qsub0_qsub1 |
| 91022 | 0, // qsub0_qsub1_qsub2 |
| 91023 | 410, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91024 | 410, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91025 | 410, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91026 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91027 | 0, // x8sub_0_x8sub_1 |
| 91028 | 0, // x8sub_2_x8sub_3 |
| 91029 | 0, // x8sub_4_x8sub_5 |
| 91030 | 0, // x8sub_6_x8sub_7 |
| 91031 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91032 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91033 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91034 | 0, // sub_32_subo64_then_sub_32 |
| 91035 | 410, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91036 | 410, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91037 | 410, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91038 | 410, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91039 | 410, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91040 | 410, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91041 | 410, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91042 | 410, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 91043 | 0, // zsub0_zsub2 |
| 91044 | 0, // zsub1_zsub3 |
| 91045 | }, |
| 91046 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91047 | 411, // bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91048 | 411, // bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91049 | 411, // dsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91050 | 0, // dsub0 |
| 91051 | 411, // dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91052 | 411, // dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91053 | 411, // dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91054 | 411, // dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91055 | 411, // hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91056 | 411, // hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91057 | 0, // psub |
| 91058 | 0, // psub0 |
| 91059 | 0, // psub1 |
| 91060 | 0, // qsub0 |
| 91061 | 411, // qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91062 | 411, // qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91063 | 411, // qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91064 | 411, // ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91065 | 411, // ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91066 | 0, // sub_32 |
| 91067 | 0, // sub_32_hi |
| 91068 | 0, // sube32 |
| 91069 | 0, // sube64 |
| 91070 | 0, // subo32 |
| 91071 | 0, // subo64 |
| 91072 | 0, // x8sub_0 |
| 91073 | 0, // x8sub_1 |
| 91074 | 0, // x8sub_2 |
| 91075 | 0, // x8sub_3 |
| 91076 | 0, // x8sub_4 |
| 91077 | 0, // x8sub_5 |
| 91078 | 0, // x8sub_6 |
| 91079 | 0, // x8sub_7 |
| 91080 | 0, // zasubb |
| 91081 | 0, // zasubd0 |
| 91082 | 0, // zasubd1 |
| 91083 | 0, // zasubh0 |
| 91084 | 0, // zasubh1 |
| 91085 | 0, // zasubq0 |
| 91086 | 0, // zasubq1 |
| 91087 | 0, // zasubs0 |
| 91088 | 0, // zasubs1 |
| 91089 | 411, // zsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91090 | 411, // zsub0 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91091 | 411, // zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91092 | 411, // zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91093 | 411, // zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91094 | 411, // zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91095 | 0, // zasubd1_then_zasubq0 |
| 91096 | 0, // zasubd1_then_zasubq1 |
| 91097 | 0, // zasubs1_then_zasubd0 |
| 91098 | 0, // zasubs1_then_zasubd1 |
| 91099 | 0, // zasubs1_then_zasubq0 |
| 91100 | 0, // zasubs1_then_zasubq1 |
| 91101 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91102 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91103 | 0, // zasubh1_then_zasubd0 |
| 91104 | 0, // zasubh1_then_zasubd1 |
| 91105 | 0, // zasubh1_then_zasubq0 |
| 91106 | 0, // zasubh1_then_zasubq1 |
| 91107 | 0, // zasubh1_then_zasubs0 |
| 91108 | 0, // zasubh1_then_zasubs1 |
| 91109 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91110 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91111 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91112 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91113 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91114 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91115 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91116 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91117 | 411, // dsub1_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91118 | 411, // dsub1_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91119 | 411, // dsub1_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91120 | 411, // dsub1_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91121 | 411, // dsub1_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91122 | 411, // dsub1_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91123 | 411, // dsub3_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91124 | 411, // dsub3_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91125 | 411, // dsub3_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91126 | 411, // dsub3_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91127 | 411, // dsub3_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91128 | 411, // dsub3_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91129 | 411, // dsub2_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91130 | 411, // dsub2_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91131 | 411, // dsub2_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91132 | 411, // dsub2_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91133 | 411, // dsub2_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91134 | 411, // dsub2_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91135 | 0, // psub1_then_psub |
| 91136 | 411, // qsub1_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91137 | 411, // qsub3_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91138 | 411, // qsub2_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91139 | 0, // x8sub_7_then_sub_32 |
| 91140 | 0, // x8sub_7_then_sub_32_hi |
| 91141 | 0, // x8sub_6_then_sub_32 |
| 91142 | 0, // x8sub_6_then_sub_32_hi |
| 91143 | 0, // x8sub_5_then_sub_32 |
| 91144 | 0, // x8sub_5_then_sub_32_hi |
| 91145 | 0, // x8sub_4_then_sub_32 |
| 91146 | 0, // x8sub_4_then_sub_32_hi |
| 91147 | 0, // x8sub_3_then_sub_32 |
| 91148 | 0, // x8sub_3_then_sub_32_hi |
| 91149 | 0, // x8sub_2_then_sub_32 |
| 91150 | 0, // x8sub_2_then_sub_32_hi |
| 91151 | 0, // x8sub_1_then_sub_32 |
| 91152 | 0, // x8sub_1_then_sub_32_hi |
| 91153 | 0, // subo64_then_sub_32 |
| 91154 | 0, // subo64_then_sub_32_hi |
| 91155 | 411, // zsub1_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91156 | 411, // zsub3_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91157 | 411, // zsub2_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91158 | 0, // dsub0_dsub1 |
| 91159 | 0, // dsub0_dsub1_dsub2 |
| 91160 | 411, // dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91161 | 411, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91162 | 411, // dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91163 | 411, // dsub_dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91164 | 411, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91165 | 411, // dsub_dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91166 | 0, // qsub0_qsub1 |
| 91167 | 0, // qsub0_qsub1_qsub2 |
| 91168 | 411, // qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91169 | 411, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91170 | 411, // qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91171 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91172 | 0, // x8sub_0_x8sub_1 |
| 91173 | 0, // x8sub_2_x8sub_3 |
| 91174 | 0, // x8sub_4_x8sub_5 |
| 91175 | 0, // x8sub_6_x8sub_7 |
| 91176 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91177 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91178 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91179 | 0, // sub_32_subo64_then_sub_32 |
| 91180 | 411, // zsub_qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91181 | 411, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91182 | 411, // zsub_qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91183 | 411, // zsub0_zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91184 | 411, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91185 | 411, // zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91186 | 411, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91187 | 411, // zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 91188 | 0, // zsub0_zsub2 |
| 91189 | 0, // zsub1_zsub3 |
| 91190 | }, |
| 91191 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91192 | 412, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91193 | 412, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91194 | 412, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91195 | 0, // dsub0 |
| 91196 | 412, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91197 | 412, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91198 | 412, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91199 | 412, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91200 | 412, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91201 | 412, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91202 | 0, // psub |
| 91203 | 0, // psub0 |
| 91204 | 0, // psub1 |
| 91205 | 0, // qsub0 |
| 91206 | 412, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91207 | 412, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91208 | 412, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91209 | 412, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91210 | 412, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91211 | 0, // sub_32 |
| 91212 | 0, // sub_32_hi |
| 91213 | 0, // sube32 |
| 91214 | 0, // sube64 |
| 91215 | 0, // subo32 |
| 91216 | 0, // subo64 |
| 91217 | 0, // x8sub_0 |
| 91218 | 0, // x8sub_1 |
| 91219 | 0, // x8sub_2 |
| 91220 | 0, // x8sub_3 |
| 91221 | 0, // x8sub_4 |
| 91222 | 0, // x8sub_5 |
| 91223 | 0, // x8sub_6 |
| 91224 | 0, // x8sub_7 |
| 91225 | 0, // zasubb |
| 91226 | 0, // zasubd0 |
| 91227 | 0, // zasubd1 |
| 91228 | 0, // zasubh0 |
| 91229 | 0, // zasubh1 |
| 91230 | 0, // zasubq0 |
| 91231 | 0, // zasubq1 |
| 91232 | 0, // zasubs0 |
| 91233 | 0, // zasubs1 |
| 91234 | 412, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91235 | 412, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91236 | 412, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91237 | 412, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91238 | 412, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91239 | 412, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91240 | 0, // zasubd1_then_zasubq0 |
| 91241 | 0, // zasubd1_then_zasubq1 |
| 91242 | 0, // zasubs1_then_zasubd0 |
| 91243 | 0, // zasubs1_then_zasubd1 |
| 91244 | 0, // zasubs1_then_zasubq0 |
| 91245 | 0, // zasubs1_then_zasubq1 |
| 91246 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91247 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91248 | 0, // zasubh1_then_zasubd0 |
| 91249 | 0, // zasubh1_then_zasubd1 |
| 91250 | 0, // zasubh1_then_zasubq0 |
| 91251 | 0, // zasubh1_then_zasubq1 |
| 91252 | 0, // zasubh1_then_zasubs0 |
| 91253 | 0, // zasubh1_then_zasubs1 |
| 91254 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91255 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91256 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91257 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91258 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91259 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91260 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91261 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91262 | 412, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91263 | 412, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91264 | 412, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91265 | 412, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91266 | 412, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91267 | 412, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91268 | 412, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91269 | 412, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91270 | 412, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91271 | 412, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91272 | 412, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91273 | 412, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91274 | 412, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91275 | 412, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91276 | 412, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91277 | 412, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91278 | 412, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91279 | 412, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91280 | 0, // psub1_then_psub |
| 91281 | 412, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91282 | 412, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91283 | 412, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91284 | 0, // x8sub_7_then_sub_32 |
| 91285 | 0, // x8sub_7_then_sub_32_hi |
| 91286 | 0, // x8sub_6_then_sub_32 |
| 91287 | 0, // x8sub_6_then_sub_32_hi |
| 91288 | 0, // x8sub_5_then_sub_32 |
| 91289 | 0, // x8sub_5_then_sub_32_hi |
| 91290 | 0, // x8sub_4_then_sub_32 |
| 91291 | 0, // x8sub_4_then_sub_32_hi |
| 91292 | 0, // x8sub_3_then_sub_32 |
| 91293 | 0, // x8sub_3_then_sub_32_hi |
| 91294 | 0, // x8sub_2_then_sub_32 |
| 91295 | 0, // x8sub_2_then_sub_32_hi |
| 91296 | 0, // x8sub_1_then_sub_32 |
| 91297 | 0, // x8sub_1_then_sub_32_hi |
| 91298 | 0, // subo64_then_sub_32 |
| 91299 | 0, // subo64_then_sub_32_hi |
| 91300 | 412, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91301 | 412, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91302 | 412, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91303 | 0, // dsub0_dsub1 |
| 91304 | 0, // dsub0_dsub1_dsub2 |
| 91305 | 412, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91306 | 412, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91307 | 412, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91308 | 412, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91309 | 412, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91310 | 412, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91311 | 0, // qsub0_qsub1 |
| 91312 | 0, // qsub0_qsub1_qsub2 |
| 91313 | 412, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91314 | 412, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91315 | 412, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91316 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91317 | 0, // x8sub_0_x8sub_1 |
| 91318 | 0, // x8sub_2_x8sub_3 |
| 91319 | 0, // x8sub_4_x8sub_5 |
| 91320 | 0, // x8sub_6_x8sub_7 |
| 91321 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91322 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91323 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91324 | 0, // sub_32_subo64_then_sub_32 |
| 91325 | 412, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91326 | 412, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91327 | 412, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91328 | 412, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91329 | 412, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91330 | 412, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91331 | 412, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91332 | 412, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 91333 | 0, // zsub0_zsub2 |
| 91334 | 0, // zsub1_zsub3 |
| 91335 | }, |
| 91336 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91337 | 413, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91338 | 413, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91339 | 413, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91340 | 0, // dsub0 |
| 91341 | 413, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91342 | 413, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91343 | 413, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91344 | 413, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91345 | 413, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91346 | 413, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91347 | 0, // psub |
| 91348 | 0, // psub0 |
| 91349 | 0, // psub1 |
| 91350 | 0, // qsub0 |
| 91351 | 413, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91352 | 413, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91353 | 413, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91354 | 413, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91355 | 413, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91356 | 0, // sub_32 |
| 91357 | 0, // sub_32_hi |
| 91358 | 0, // sube32 |
| 91359 | 0, // sube64 |
| 91360 | 0, // subo32 |
| 91361 | 0, // subo64 |
| 91362 | 0, // x8sub_0 |
| 91363 | 0, // x8sub_1 |
| 91364 | 0, // x8sub_2 |
| 91365 | 0, // x8sub_3 |
| 91366 | 0, // x8sub_4 |
| 91367 | 0, // x8sub_5 |
| 91368 | 0, // x8sub_6 |
| 91369 | 0, // x8sub_7 |
| 91370 | 0, // zasubb |
| 91371 | 0, // zasubd0 |
| 91372 | 0, // zasubd1 |
| 91373 | 0, // zasubh0 |
| 91374 | 0, // zasubh1 |
| 91375 | 0, // zasubq0 |
| 91376 | 0, // zasubq1 |
| 91377 | 0, // zasubs0 |
| 91378 | 0, // zasubs1 |
| 91379 | 413, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91380 | 413, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91381 | 413, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91382 | 413, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91383 | 413, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91384 | 413, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91385 | 0, // zasubd1_then_zasubq0 |
| 91386 | 0, // zasubd1_then_zasubq1 |
| 91387 | 0, // zasubs1_then_zasubd0 |
| 91388 | 0, // zasubs1_then_zasubd1 |
| 91389 | 0, // zasubs1_then_zasubq0 |
| 91390 | 0, // zasubs1_then_zasubq1 |
| 91391 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91392 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91393 | 0, // zasubh1_then_zasubd0 |
| 91394 | 0, // zasubh1_then_zasubd1 |
| 91395 | 0, // zasubh1_then_zasubq0 |
| 91396 | 0, // zasubh1_then_zasubq1 |
| 91397 | 0, // zasubh1_then_zasubs0 |
| 91398 | 0, // zasubh1_then_zasubs1 |
| 91399 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91400 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91401 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91402 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91403 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91404 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91405 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91406 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91407 | 413, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91408 | 413, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91409 | 413, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91410 | 413, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91411 | 413, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91412 | 413, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91413 | 413, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91414 | 413, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91415 | 413, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91416 | 413, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91417 | 413, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91418 | 413, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91419 | 413, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91420 | 413, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91421 | 413, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91422 | 413, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91423 | 413, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91424 | 413, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91425 | 0, // psub1_then_psub |
| 91426 | 413, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91427 | 413, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91428 | 413, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91429 | 0, // x8sub_7_then_sub_32 |
| 91430 | 0, // x8sub_7_then_sub_32_hi |
| 91431 | 0, // x8sub_6_then_sub_32 |
| 91432 | 0, // x8sub_6_then_sub_32_hi |
| 91433 | 0, // x8sub_5_then_sub_32 |
| 91434 | 0, // x8sub_5_then_sub_32_hi |
| 91435 | 0, // x8sub_4_then_sub_32 |
| 91436 | 0, // x8sub_4_then_sub_32_hi |
| 91437 | 0, // x8sub_3_then_sub_32 |
| 91438 | 0, // x8sub_3_then_sub_32_hi |
| 91439 | 0, // x8sub_2_then_sub_32 |
| 91440 | 0, // x8sub_2_then_sub_32_hi |
| 91441 | 0, // x8sub_1_then_sub_32 |
| 91442 | 0, // x8sub_1_then_sub_32_hi |
| 91443 | 0, // subo64_then_sub_32 |
| 91444 | 0, // subo64_then_sub_32_hi |
| 91445 | 413, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91446 | 413, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91447 | 413, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91448 | 0, // dsub0_dsub1 |
| 91449 | 0, // dsub0_dsub1_dsub2 |
| 91450 | 413, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91451 | 413, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91452 | 413, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91453 | 413, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91454 | 413, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91455 | 413, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91456 | 0, // qsub0_qsub1 |
| 91457 | 0, // qsub0_qsub1_qsub2 |
| 91458 | 413, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91459 | 413, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91460 | 413, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91461 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91462 | 0, // x8sub_0_x8sub_1 |
| 91463 | 0, // x8sub_2_x8sub_3 |
| 91464 | 0, // x8sub_4_x8sub_5 |
| 91465 | 0, // x8sub_6_x8sub_7 |
| 91466 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91467 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91468 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91469 | 0, // sub_32_subo64_then_sub_32 |
| 91470 | 413, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91471 | 413, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91472 | 413, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91473 | 413, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91474 | 413, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91475 | 413, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91476 | 413, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91477 | 413, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91478 | 0, // zsub0_zsub2 |
| 91479 | 0, // zsub1_zsub3 |
| 91480 | }, |
| 91481 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91482 | 414, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91483 | 414, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91484 | 414, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91485 | 0, // dsub0 |
| 91486 | 414, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91487 | 414, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91488 | 414, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91489 | 414, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91490 | 414, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91491 | 414, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91492 | 0, // psub |
| 91493 | 0, // psub0 |
| 91494 | 0, // psub1 |
| 91495 | 0, // qsub0 |
| 91496 | 414, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91497 | 414, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91498 | 414, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91499 | 414, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91500 | 414, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91501 | 0, // sub_32 |
| 91502 | 0, // sub_32_hi |
| 91503 | 0, // sube32 |
| 91504 | 0, // sube64 |
| 91505 | 0, // subo32 |
| 91506 | 0, // subo64 |
| 91507 | 0, // x8sub_0 |
| 91508 | 0, // x8sub_1 |
| 91509 | 0, // x8sub_2 |
| 91510 | 0, // x8sub_3 |
| 91511 | 0, // x8sub_4 |
| 91512 | 0, // x8sub_5 |
| 91513 | 0, // x8sub_6 |
| 91514 | 0, // x8sub_7 |
| 91515 | 0, // zasubb |
| 91516 | 0, // zasubd0 |
| 91517 | 0, // zasubd1 |
| 91518 | 0, // zasubh0 |
| 91519 | 0, // zasubh1 |
| 91520 | 0, // zasubq0 |
| 91521 | 0, // zasubq1 |
| 91522 | 0, // zasubs0 |
| 91523 | 0, // zasubs1 |
| 91524 | 414, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91525 | 414, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91526 | 414, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91527 | 414, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91528 | 414, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91529 | 414, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91530 | 0, // zasubd1_then_zasubq0 |
| 91531 | 0, // zasubd1_then_zasubq1 |
| 91532 | 0, // zasubs1_then_zasubd0 |
| 91533 | 0, // zasubs1_then_zasubd1 |
| 91534 | 0, // zasubs1_then_zasubq0 |
| 91535 | 0, // zasubs1_then_zasubq1 |
| 91536 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91537 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91538 | 0, // zasubh1_then_zasubd0 |
| 91539 | 0, // zasubh1_then_zasubd1 |
| 91540 | 0, // zasubh1_then_zasubq0 |
| 91541 | 0, // zasubh1_then_zasubq1 |
| 91542 | 0, // zasubh1_then_zasubs0 |
| 91543 | 0, // zasubh1_then_zasubs1 |
| 91544 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91545 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91546 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91547 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91548 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91549 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91550 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91551 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91552 | 414, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91553 | 414, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91554 | 414, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91555 | 414, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91556 | 414, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91557 | 414, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91558 | 414, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91559 | 414, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91560 | 414, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91561 | 414, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91562 | 414, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91563 | 414, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91564 | 414, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91565 | 414, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91566 | 414, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91567 | 414, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91568 | 414, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91569 | 414, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91570 | 0, // psub1_then_psub |
| 91571 | 414, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91572 | 414, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91573 | 414, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91574 | 0, // x8sub_7_then_sub_32 |
| 91575 | 0, // x8sub_7_then_sub_32_hi |
| 91576 | 0, // x8sub_6_then_sub_32 |
| 91577 | 0, // x8sub_6_then_sub_32_hi |
| 91578 | 0, // x8sub_5_then_sub_32 |
| 91579 | 0, // x8sub_5_then_sub_32_hi |
| 91580 | 0, // x8sub_4_then_sub_32 |
| 91581 | 0, // x8sub_4_then_sub_32_hi |
| 91582 | 0, // x8sub_3_then_sub_32 |
| 91583 | 0, // x8sub_3_then_sub_32_hi |
| 91584 | 0, // x8sub_2_then_sub_32 |
| 91585 | 0, // x8sub_2_then_sub_32_hi |
| 91586 | 0, // x8sub_1_then_sub_32 |
| 91587 | 0, // x8sub_1_then_sub_32_hi |
| 91588 | 0, // subo64_then_sub_32 |
| 91589 | 0, // subo64_then_sub_32_hi |
| 91590 | 414, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91591 | 414, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91592 | 414, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91593 | 0, // dsub0_dsub1 |
| 91594 | 0, // dsub0_dsub1_dsub2 |
| 91595 | 414, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91596 | 414, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91597 | 414, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91598 | 414, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91599 | 414, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91600 | 414, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91601 | 0, // qsub0_qsub1 |
| 91602 | 0, // qsub0_qsub1_qsub2 |
| 91603 | 414, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91604 | 414, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91605 | 414, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91606 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91607 | 0, // x8sub_0_x8sub_1 |
| 91608 | 0, // x8sub_2_x8sub_3 |
| 91609 | 0, // x8sub_4_x8sub_5 |
| 91610 | 0, // x8sub_6_x8sub_7 |
| 91611 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91612 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91613 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91614 | 0, // sub_32_subo64_then_sub_32 |
| 91615 | 414, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91616 | 414, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91617 | 414, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91618 | 414, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91619 | 414, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91620 | 414, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91621 | 414, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91622 | 414, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91623 | 0, // zsub0_zsub2 |
| 91624 | 0, // zsub1_zsub3 |
| 91625 | }, |
| 91626 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91627 | 415, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91628 | 415, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91629 | 415, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91630 | 0, // dsub0 |
| 91631 | 415, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91632 | 415, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91633 | 415, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91634 | 415, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91635 | 415, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91636 | 415, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91637 | 0, // psub |
| 91638 | 0, // psub0 |
| 91639 | 0, // psub1 |
| 91640 | 0, // qsub0 |
| 91641 | 415, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91642 | 415, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91643 | 415, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91644 | 415, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91645 | 415, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91646 | 0, // sub_32 |
| 91647 | 0, // sub_32_hi |
| 91648 | 0, // sube32 |
| 91649 | 0, // sube64 |
| 91650 | 0, // subo32 |
| 91651 | 0, // subo64 |
| 91652 | 0, // x8sub_0 |
| 91653 | 0, // x8sub_1 |
| 91654 | 0, // x8sub_2 |
| 91655 | 0, // x8sub_3 |
| 91656 | 0, // x8sub_4 |
| 91657 | 0, // x8sub_5 |
| 91658 | 0, // x8sub_6 |
| 91659 | 0, // x8sub_7 |
| 91660 | 0, // zasubb |
| 91661 | 0, // zasubd0 |
| 91662 | 0, // zasubd1 |
| 91663 | 0, // zasubh0 |
| 91664 | 0, // zasubh1 |
| 91665 | 0, // zasubq0 |
| 91666 | 0, // zasubq1 |
| 91667 | 0, // zasubs0 |
| 91668 | 0, // zasubs1 |
| 91669 | 415, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91670 | 415, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91671 | 415, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91672 | 415, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91673 | 415, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91674 | 415, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91675 | 0, // zasubd1_then_zasubq0 |
| 91676 | 0, // zasubd1_then_zasubq1 |
| 91677 | 0, // zasubs1_then_zasubd0 |
| 91678 | 0, // zasubs1_then_zasubd1 |
| 91679 | 0, // zasubs1_then_zasubq0 |
| 91680 | 0, // zasubs1_then_zasubq1 |
| 91681 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91682 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91683 | 0, // zasubh1_then_zasubd0 |
| 91684 | 0, // zasubh1_then_zasubd1 |
| 91685 | 0, // zasubh1_then_zasubq0 |
| 91686 | 0, // zasubh1_then_zasubq1 |
| 91687 | 0, // zasubh1_then_zasubs0 |
| 91688 | 0, // zasubh1_then_zasubs1 |
| 91689 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91690 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91691 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91692 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91693 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91694 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91695 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91696 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91697 | 415, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91698 | 415, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91699 | 415, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91700 | 415, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91701 | 415, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91702 | 415, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91703 | 415, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91704 | 415, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91705 | 415, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91706 | 415, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91707 | 415, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91708 | 415, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91709 | 415, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91710 | 415, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91711 | 415, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91712 | 415, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91713 | 415, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91714 | 415, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91715 | 0, // psub1_then_psub |
| 91716 | 415, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91717 | 415, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91718 | 415, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91719 | 0, // x8sub_7_then_sub_32 |
| 91720 | 0, // x8sub_7_then_sub_32_hi |
| 91721 | 0, // x8sub_6_then_sub_32 |
| 91722 | 0, // x8sub_6_then_sub_32_hi |
| 91723 | 0, // x8sub_5_then_sub_32 |
| 91724 | 0, // x8sub_5_then_sub_32_hi |
| 91725 | 0, // x8sub_4_then_sub_32 |
| 91726 | 0, // x8sub_4_then_sub_32_hi |
| 91727 | 0, // x8sub_3_then_sub_32 |
| 91728 | 0, // x8sub_3_then_sub_32_hi |
| 91729 | 0, // x8sub_2_then_sub_32 |
| 91730 | 0, // x8sub_2_then_sub_32_hi |
| 91731 | 0, // x8sub_1_then_sub_32 |
| 91732 | 0, // x8sub_1_then_sub_32_hi |
| 91733 | 0, // subo64_then_sub_32 |
| 91734 | 0, // subo64_then_sub_32_hi |
| 91735 | 415, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91736 | 415, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91737 | 415, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91738 | 0, // dsub0_dsub1 |
| 91739 | 0, // dsub0_dsub1_dsub2 |
| 91740 | 415, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91741 | 415, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91742 | 415, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91743 | 415, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91744 | 415, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91745 | 415, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91746 | 0, // qsub0_qsub1 |
| 91747 | 0, // qsub0_qsub1_qsub2 |
| 91748 | 415, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91749 | 415, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91750 | 415, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91751 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91752 | 0, // x8sub_0_x8sub_1 |
| 91753 | 0, // x8sub_2_x8sub_3 |
| 91754 | 0, // x8sub_4_x8sub_5 |
| 91755 | 0, // x8sub_6_x8sub_7 |
| 91756 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91757 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91758 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91759 | 0, // sub_32_subo64_then_sub_32 |
| 91760 | 415, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91761 | 415, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91762 | 415, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91763 | 415, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91764 | 415, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91765 | 415, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91766 | 415, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91767 | 415, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 91768 | 0, // zsub0_zsub2 |
| 91769 | 0, // zsub1_zsub3 |
| 91770 | }, |
| 91771 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91772 | 416, // bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91773 | 416, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91774 | 416, // dsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91775 | 0, // dsub0 |
| 91776 | 416, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91777 | 416, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91778 | 416, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91779 | 416, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91780 | 416, // hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91781 | 416, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91782 | 0, // psub |
| 91783 | 0, // psub0 |
| 91784 | 0, // psub1 |
| 91785 | 0, // qsub0 |
| 91786 | 416, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91787 | 416, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91788 | 416, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91789 | 416, // ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91790 | 416, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91791 | 0, // sub_32 |
| 91792 | 0, // sub_32_hi |
| 91793 | 0, // sube32 |
| 91794 | 0, // sube64 |
| 91795 | 0, // subo32 |
| 91796 | 0, // subo64 |
| 91797 | 0, // x8sub_0 |
| 91798 | 0, // x8sub_1 |
| 91799 | 0, // x8sub_2 |
| 91800 | 0, // x8sub_3 |
| 91801 | 0, // x8sub_4 |
| 91802 | 0, // x8sub_5 |
| 91803 | 0, // x8sub_6 |
| 91804 | 0, // x8sub_7 |
| 91805 | 0, // zasubb |
| 91806 | 0, // zasubd0 |
| 91807 | 0, // zasubd1 |
| 91808 | 0, // zasubh0 |
| 91809 | 0, // zasubh1 |
| 91810 | 0, // zasubq0 |
| 91811 | 0, // zasubq1 |
| 91812 | 0, // zasubs0 |
| 91813 | 0, // zasubs1 |
| 91814 | 416, // zsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91815 | 416, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91816 | 416, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91817 | 416, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91818 | 416, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91819 | 416, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91820 | 0, // zasubd1_then_zasubq0 |
| 91821 | 0, // zasubd1_then_zasubq1 |
| 91822 | 0, // zasubs1_then_zasubd0 |
| 91823 | 0, // zasubs1_then_zasubd1 |
| 91824 | 0, // zasubs1_then_zasubq0 |
| 91825 | 0, // zasubs1_then_zasubq1 |
| 91826 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91827 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91828 | 0, // zasubh1_then_zasubd0 |
| 91829 | 0, // zasubh1_then_zasubd1 |
| 91830 | 0, // zasubh1_then_zasubq0 |
| 91831 | 0, // zasubh1_then_zasubq1 |
| 91832 | 0, // zasubh1_then_zasubs0 |
| 91833 | 0, // zasubh1_then_zasubs1 |
| 91834 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91835 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91836 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91837 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91838 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91839 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91840 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91841 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91842 | 416, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91843 | 416, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91844 | 416, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91845 | 416, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91846 | 416, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91847 | 416, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91848 | 416, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91849 | 416, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91850 | 416, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91851 | 416, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91852 | 416, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91853 | 416, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91854 | 416, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91855 | 416, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91856 | 416, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91857 | 416, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91858 | 416, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91859 | 416, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91860 | 0, // psub1_then_psub |
| 91861 | 416, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91862 | 416, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91863 | 416, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91864 | 0, // x8sub_7_then_sub_32 |
| 91865 | 0, // x8sub_7_then_sub_32_hi |
| 91866 | 0, // x8sub_6_then_sub_32 |
| 91867 | 0, // x8sub_6_then_sub_32_hi |
| 91868 | 0, // x8sub_5_then_sub_32 |
| 91869 | 0, // x8sub_5_then_sub_32_hi |
| 91870 | 0, // x8sub_4_then_sub_32 |
| 91871 | 0, // x8sub_4_then_sub_32_hi |
| 91872 | 0, // x8sub_3_then_sub_32 |
| 91873 | 0, // x8sub_3_then_sub_32_hi |
| 91874 | 0, // x8sub_2_then_sub_32 |
| 91875 | 0, // x8sub_2_then_sub_32_hi |
| 91876 | 0, // x8sub_1_then_sub_32 |
| 91877 | 0, // x8sub_1_then_sub_32_hi |
| 91878 | 0, // subo64_then_sub_32 |
| 91879 | 0, // subo64_then_sub_32_hi |
| 91880 | 416, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91881 | 416, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91882 | 416, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91883 | 0, // dsub0_dsub1 |
| 91884 | 0, // dsub0_dsub1_dsub2 |
| 91885 | 416, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91886 | 416, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91887 | 416, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91888 | 416, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91889 | 416, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91890 | 416, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91891 | 0, // qsub0_qsub1 |
| 91892 | 0, // qsub0_qsub1_qsub2 |
| 91893 | 416, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91894 | 416, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91895 | 416, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91896 | 0, // sub_32_x8sub_1_then_sub_32 |
| 91897 | 0, // x8sub_0_x8sub_1 |
| 91898 | 0, // x8sub_2_x8sub_3 |
| 91899 | 0, // x8sub_4_x8sub_5 |
| 91900 | 0, // x8sub_6_x8sub_7 |
| 91901 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 91902 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 91903 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 91904 | 0, // sub_32_subo64_then_sub_32 |
| 91905 | 416, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91906 | 416, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91907 | 416, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91908 | 416, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91909 | 416, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91910 | 416, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91911 | 416, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91912 | 416, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 91913 | 0, // zsub0_zsub2 |
| 91914 | 0, // zsub1_zsub3 |
| 91915 | }, |
| 91916 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91917 | 417, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91918 | 417, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91919 | 417, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91920 | 0, // dsub0 |
| 91921 | 417, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91922 | 417, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91923 | 417, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91924 | 417, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91925 | 417, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91926 | 417, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91927 | 0, // psub |
| 91928 | 0, // psub0 |
| 91929 | 0, // psub1 |
| 91930 | 0, // qsub0 |
| 91931 | 417, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91932 | 417, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91933 | 417, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91934 | 417, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91935 | 417, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91936 | 0, // sub_32 |
| 91937 | 0, // sub_32_hi |
| 91938 | 0, // sube32 |
| 91939 | 0, // sube64 |
| 91940 | 0, // subo32 |
| 91941 | 0, // subo64 |
| 91942 | 0, // x8sub_0 |
| 91943 | 0, // x8sub_1 |
| 91944 | 0, // x8sub_2 |
| 91945 | 0, // x8sub_3 |
| 91946 | 0, // x8sub_4 |
| 91947 | 0, // x8sub_5 |
| 91948 | 0, // x8sub_6 |
| 91949 | 0, // x8sub_7 |
| 91950 | 0, // zasubb |
| 91951 | 0, // zasubd0 |
| 91952 | 0, // zasubd1 |
| 91953 | 0, // zasubh0 |
| 91954 | 0, // zasubh1 |
| 91955 | 0, // zasubq0 |
| 91956 | 0, // zasubq1 |
| 91957 | 0, // zasubs0 |
| 91958 | 0, // zasubs1 |
| 91959 | 417, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91960 | 417, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91961 | 417, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91962 | 417, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91963 | 417, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91964 | 417, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91965 | 0, // zasubd1_then_zasubq0 |
| 91966 | 0, // zasubd1_then_zasubq1 |
| 91967 | 0, // zasubs1_then_zasubd0 |
| 91968 | 0, // zasubs1_then_zasubd1 |
| 91969 | 0, // zasubs1_then_zasubq0 |
| 91970 | 0, // zasubs1_then_zasubq1 |
| 91971 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 91972 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 91973 | 0, // zasubh1_then_zasubd0 |
| 91974 | 0, // zasubh1_then_zasubd1 |
| 91975 | 0, // zasubh1_then_zasubq0 |
| 91976 | 0, // zasubh1_then_zasubq1 |
| 91977 | 0, // zasubh1_then_zasubs0 |
| 91978 | 0, // zasubh1_then_zasubs1 |
| 91979 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 91980 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 91981 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 91982 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 91983 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 91984 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 91985 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 91986 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 91987 | 417, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91988 | 417, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91989 | 417, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91990 | 417, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91991 | 417, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91992 | 417, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91993 | 417, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91994 | 417, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91995 | 417, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91996 | 417, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91997 | 417, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91998 | 417, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 91999 | 417, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92000 | 417, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92001 | 417, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92002 | 417, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92003 | 417, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92004 | 417, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92005 | 0, // psub1_then_psub |
| 92006 | 417, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92007 | 417, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92008 | 417, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92009 | 0, // x8sub_7_then_sub_32 |
| 92010 | 0, // x8sub_7_then_sub_32_hi |
| 92011 | 0, // x8sub_6_then_sub_32 |
| 92012 | 0, // x8sub_6_then_sub_32_hi |
| 92013 | 0, // x8sub_5_then_sub_32 |
| 92014 | 0, // x8sub_5_then_sub_32_hi |
| 92015 | 0, // x8sub_4_then_sub_32 |
| 92016 | 0, // x8sub_4_then_sub_32_hi |
| 92017 | 0, // x8sub_3_then_sub_32 |
| 92018 | 0, // x8sub_3_then_sub_32_hi |
| 92019 | 0, // x8sub_2_then_sub_32 |
| 92020 | 0, // x8sub_2_then_sub_32_hi |
| 92021 | 0, // x8sub_1_then_sub_32 |
| 92022 | 0, // x8sub_1_then_sub_32_hi |
| 92023 | 0, // subo64_then_sub_32 |
| 92024 | 0, // subo64_then_sub_32_hi |
| 92025 | 417, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92026 | 417, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92027 | 417, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92028 | 0, // dsub0_dsub1 |
| 92029 | 0, // dsub0_dsub1_dsub2 |
| 92030 | 417, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92031 | 417, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92032 | 417, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92033 | 417, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92034 | 417, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92035 | 417, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92036 | 0, // qsub0_qsub1 |
| 92037 | 0, // qsub0_qsub1_qsub2 |
| 92038 | 417, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92039 | 417, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92040 | 417, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92041 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92042 | 0, // x8sub_0_x8sub_1 |
| 92043 | 0, // x8sub_2_x8sub_3 |
| 92044 | 0, // x8sub_4_x8sub_5 |
| 92045 | 0, // x8sub_6_x8sub_7 |
| 92046 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92047 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92048 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92049 | 0, // sub_32_subo64_then_sub_32 |
| 92050 | 417, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92051 | 417, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92052 | 417, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92053 | 417, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92054 | 417, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92055 | 417, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92056 | 417, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92057 | 417, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92058 | 0, // zsub0_zsub2 |
| 92059 | 0, // zsub1_zsub3 |
| 92060 | }, |
| 92061 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92062 | 418, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92063 | 418, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92064 | 418, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92065 | 0, // dsub0 |
| 92066 | 418, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92067 | 418, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92068 | 418, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92069 | 418, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92070 | 418, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92071 | 418, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92072 | 0, // psub |
| 92073 | 0, // psub0 |
| 92074 | 0, // psub1 |
| 92075 | 0, // qsub0 |
| 92076 | 418, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92077 | 418, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92078 | 418, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92079 | 418, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92080 | 418, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92081 | 0, // sub_32 |
| 92082 | 0, // sub_32_hi |
| 92083 | 0, // sube32 |
| 92084 | 0, // sube64 |
| 92085 | 0, // subo32 |
| 92086 | 0, // subo64 |
| 92087 | 0, // x8sub_0 |
| 92088 | 0, // x8sub_1 |
| 92089 | 0, // x8sub_2 |
| 92090 | 0, // x8sub_3 |
| 92091 | 0, // x8sub_4 |
| 92092 | 0, // x8sub_5 |
| 92093 | 0, // x8sub_6 |
| 92094 | 0, // x8sub_7 |
| 92095 | 0, // zasubb |
| 92096 | 0, // zasubd0 |
| 92097 | 0, // zasubd1 |
| 92098 | 0, // zasubh0 |
| 92099 | 0, // zasubh1 |
| 92100 | 0, // zasubq0 |
| 92101 | 0, // zasubq1 |
| 92102 | 0, // zasubs0 |
| 92103 | 0, // zasubs1 |
| 92104 | 418, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92105 | 418, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92106 | 418, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92107 | 418, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92108 | 418, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92109 | 418, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92110 | 0, // zasubd1_then_zasubq0 |
| 92111 | 0, // zasubd1_then_zasubq1 |
| 92112 | 0, // zasubs1_then_zasubd0 |
| 92113 | 0, // zasubs1_then_zasubd1 |
| 92114 | 0, // zasubs1_then_zasubq0 |
| 92115 | 0, // zasubs1_then_zasubq1 |
| 92116 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92117 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92118 | 0, // zasubh1_then_zasubd0 |
| 92119 | 0, // zasubh1_then_zasubd1 |
| 92120 | 0, // zasubh1_then_zasubq0 |
| 92121 | 0, // zasubh1_then_zasubq1 |
| 92122 | 0, // zasubh1_then_zasubs0 |
| 92123 | 0, // zasubh1_then_zasubs1 |
| 92124 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92125 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92126 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92127 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92128 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92129 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92130 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92131 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92132 | 418, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92133 | 418, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92134 | 418, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92135 | 418, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92136 | 418, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92137 | 418, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92138 | 418, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92139 | 418, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92140 | 418, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92141 | 418, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92142 | 418, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92143 | 418, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92144 | 418, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92145 | 418, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92146 | 418, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92147 | 418, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92148 | 418, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92149 | 418, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92150 | 0, // psub1_then_psub |
| 92151 | 418, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92152 | 418, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92153 | 418, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92154 | 0, // x8sub_7_then_sub_32 |
| 92155 | 0, // x8sub_7_then_sub_32_hi |
| 92156 | 0, // x8sub_6_then_sub_32 |
| 92157 | 0, // x8sub_6_then_sub_32_hi |
| 92158 | 0, // x8sub_5_then_sub_32 |
| 92159 | 0, // x8sub_5_then_sub_32_hi |
| 92160 | 0, // x8sub_4_then_sub_32 |
| 92161 | 0, // x8sub_4_then_sub_32_hi |
| 92162 | 0, // x8sub_3_then_sub_32 |
| 92163 | 0, // x8sub_3_then_sub_32_hi |
| 92164 | 0, // x8sub_2_then_sub_32 |
| 92165 | 0, // x8sub_2_then_sub_32_hi |
| 92166 | 0, // x8sub_1_then_sub_32 |
| 92167 | 0, // x8sub_1_then_sub_32_hi |
| 92168 | 0, // subo64_then_sub_32 |
| 92169 | 0, // subo64_then_sub_32_hi |
| 92170 | 418, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92171 | 418, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92172 | 418, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92173 | 0, // dsub0_dsub1 |
| 92174 | 0, // dsub0_dsub1_dsub2 |
| 92175 | 418, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92176 | 418, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92177 | 418, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92178 | 418, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92179 | 418, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92180 | 418, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92181 | 0, // qsub0_qsub1 |
| 92182 | 0, // qsub0_qsub1_qsub2 |
| 92183 | 418, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92184 | 418, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92185 | 418, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92186 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92187 | 0, // x8sub_0_x8sub_1 |
| 92188 | 0, // x8sub_2_x8sub_3 |
| 92189 | 0, // x8sub_4_x8sub_5 |
| 92190 | 0, // x8sub_6_x8sub_7 |
| 92191 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92192 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92193 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92194 | 0, // sub_32_subo64_then_sub_32 |
| 92195 | 418, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92196 | 418, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92197 | 418, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92198 | 418, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92199 | 418, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92200 | 418, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92201 | 418, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92202 | 418, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 92203 | 0, // zsub0_zsub2 |
| 92204 | 0, // zsub1_zsub3 |
| 92205 | }, |
| 92206 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92207 | 419, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92208 | 419, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92209 | 419, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92210 | 0, // dsub0 |
| 92211 | 419, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92212 | 419, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92213 | 419, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92214 | 419, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92215 | 419, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92216 | 419, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92217 | 0, // psub |
| 92218 | 0, // psub0 |
| 92219 | 0, // psub1 |
| 92220 | 0, // qsub0 |
| 92221 | 419, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92222 | 419, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92223 | 419, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92224 | 419, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92225 | 419, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92226 | 0, // sub_32 |
| 92227 | 0, // sub_32_hi |
| 92228 | 0, // sube32 |
| 92229 | 0, // sube64 |
| 92230 | 0, // subo32 |
| 92231 | 0, // subo64 |
| 92232 | 0, // x8sub_0 |
| 92233 | 0, // x8sub_1 |
| 92234 | 0, // x8sub_2 |
| 92235 | 0, // x8sub_3 |
| 92236 | 0, // x8sub_4 |
| 92237 | 0, // x8sub_5 |
| 92238 | 0, // x8sub_6 |
| 92239 | 0, // x8sub_7 |
| 92240 | 0, // zasubb |
| 92241 | 0, // zasubd0 |
| 92242 | 0, // zasubd1 |
| 92243 | 0, // zasubh0 |
| 92244 | 0, // zasubh1 |
| 92245 | 0, // zasubq0 |
| 92246 | 0, // zasubq1 |
| 92247 | 0, // zasubs0 |
| 92248 | 0, // zasubs1 |
| 92249 | 419, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92250 | 419, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92251 | 419, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92252 | 419, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92253 | 419, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92254 | 419, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92255 | 0, // zasubd1_then_zasubq0 |
| 92256 | 0, // zasubd1_then_zasubq1 |
| 92257 | 0, // zasubs1_then_zasubd0 |
| 92258 | 0, // zasubs1_then_zasubd1 |
| 92259 | 0, // zasubs1_then_zasubq0 |
| 92260 | 0, // zasubs1_then_zasubq1 |
| 92261 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92262 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92263 | 0, // zasubh1_then_zasubd0 |
| 92264 | 0, // zasubh1_then_zasubd1 |
| 92265 | 0, // zasubh1_then_zasubq0 |
| 92266 | 0, // zasubh1_then_zasubq1 |
| 92267 | 0, // zasubh1_then_zasubs0 |
| 92268 | 0, // zasubh1_then_zasubs1 |
| 92269 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92270 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92271 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92272 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92273 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92274 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92275 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92276 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92277 | 419, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92278 | 419, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92279 | 419, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92280 | 419, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92281 | 419, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92282 | 419, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92283 | 419, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92284 | 419, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92285 | 419, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92286 | 419, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92287 | 419, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92288 | 419, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92289 | 419, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92290 | 419, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92291 | 419, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92292 | 419, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92293 | 419, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92294 | 419, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92295 | 0, // psub1_then_psub |
| 92296 | 419, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92297 | 419, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92298 | 419, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92299 | 0, // x8sub_7_then_sub_32 |
| 92300 | 0, // x8sub_7_then_sub_32_hi |
| 92301 | 0, // x8sub_6_then_sub_32 |
| 92302 | 0, // x8sub_6_then_sub_32_hi |
| 92303 | 0, // x8sub_5_then_sub_32 |
| 92304 | 0, // x8sub_5_then_sub_32_hi |
| 92305 | 0, // x8sub_4_then_sub_32 |
| 92306 | 0, // x8sub_4_then_sub_32_hi |
| 92307 | 0, // x8sub_3_then_sub_32 |
| 92308 | 0, // x8sub_3_then_sub_32_hi |
| 92309 | 0, // x8sub_2_then_sub_32 |
| 92310 | 0, // x8sub_2_then_sub_32_hi |
| 92311 | 0, // x8sub_1_then_sub_32 |
| 92312 | 0, // x8sub_1_then_sub_32_hi |
| 92313 | 0, // subo64_then_sub_32 |
| 92314 | 0, // subo64_then_sub_32_hi |
| 92315 | 419, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92316 | 419, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92317 | 419, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92318 | 0, // dsub0_dsub1 |
| 92319 | 0, // dsub0_dsub1_dsub2 |
| 92320 | 419, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92321 | 419, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92322 | 419, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92323 | 419, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92324 | 419, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92325 | 419, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92326 | 0, // qsub0_qsub1 |
| 92327 | 0, // qsub0_qsub1_qsub2 |
| 92328 | 419, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92329 | 419, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92330 | 419, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92331 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92332 | 0, // x8sub_0_x8sub_1 |
| 92333 | 0, // x8sub_2_x8sub_3 |
| 92334 | 0, // x8sub_4_x8sub_5 |
| 92335 | 0, // x8sub_6_x8sub_7 |
| 92336 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92337 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92338 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92339 | 0, // sub_32_subo64_then_sub_32 |
| 92340 | 419, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92341 | 419, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92342 | 419, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92343 | 419, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92344 | 419, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92345 | 419, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92346 | 419, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92347 | 419, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92348 | 0, // zsub0_zsub2 |
| 92349 | 0, // zsub1_zsub3 |
| 92350 | }, |
| 92351 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92352 | 420, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92353 | 420, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92354 | 420, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92355 | 0, // dsub0 |
| 92356 | 420, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92357 | 420, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92358 | 420, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92359 | 420, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92360 | 420, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92361 | 420, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92362 | 0, // psub |
| 92363 | 0, // psub0 |
| 92364 | 0, // psub1 |
| 92365 | 0, // qsub0 |
| 92366 | 420, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92367 | 420, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92368 | 420, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92369 | 420, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92370 | 420, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92371 | 0, // sub_32 |
| 92372 | 0, // sub_32_hi |
| 92373 | 0, // sube32 |
| 92374 | 0, // sube64 |
| 92375 | 0, // subo32 |
| 92376 | 0, // subo64 |
| 92377 | 0, // x8sub_0 |
| 92378 | 0, // x8sub_1 |
| 92379 | 0, // x8sub_2 |
| 92380 | 0, // x8sub_3 |
| 92381 | 0, // x8sub_4 |
| 92382 | 0, // x8sub_5 |
| 92383 | 0, // x8sub_6 |
| 92384 | 0, // x8sub_7 |
| 92385 | 0, // zasubb |
| 92386 | 0, // zasubd0 |
| 92387 | 0, // zasubd1 |
| 92388 | 0, // zasubh0 |
| 92389 | 0, // zasubh1 |
| 92390 | 0, // zasubq0 |
| 92391 | 0, // zasubq1 |
| 92392 | 0, // zasubs0 |
| 92393 | 0, // zasubs1 |
| 92394 | 420, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92395 | 420, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92396 | 420, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92397 | 420, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92398 | 420, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92399 | 420, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92400 | 0, // zasubd1_then_zasubq0 |
| 92401 | 0, // zasubd1_then_zasubq1 |
| 92402 | 0, // zasubs1_then_zasubd0 |
| 92403 | 0, // zasubs1_then_zasubd1 |
| 92404 | 0, // zasubs1_then_zasubq0 |
| 92405 | 0, // zasubs1_then_zasubq1 |
| 92406 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92407 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92408 | 0, // zasubh1_then_zasubd0 |
| 92409 | 0, // zasubh1_then_zasubd1 |
| 92410 | 0, // zasubh1_then_zasubq0 |
| 92411 | 0, // zasubh1_then_zasubq1 |
| 92412 | 0, // zasubh1_then_zasubs0 |
| 92413 | 0, // zasubh1_then_zasubs1 |
| 92414 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92415 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92416 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92417 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92418 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92419 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92420 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92421 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92422 | 420, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92423 | 420, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92424 | 420, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92425 | 420, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92426 | 420, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92427 | 420, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92428 | 420, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92429 | 420, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92430 | 420, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92431 | 420, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92432 | 420, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92433 | 420, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92434 | 420, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92435 | 420, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92436 | 420, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92437 | 420, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92438 | 420, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92439 | 420, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92440 | 0, // psub1_then_psub |
| 92441 | 420, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92442 | 420, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92443 | 420, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92444 | 0, // x8sub_7_then_sub_32 |
| 92445 | 0, // x8sub_7_then_sub_32_hi |
| 92446 | 0, // x8sub_6_then_sub_32 |
| 92447 | 0, // x8sub_6_then_sub_32_hi |
| 92448 | 0, // x8sub_5_then_sub_32 |
| 92449 | 0, // x8sub_5_then_sub_32_hi |
| 92450 | 0, // x8sub_4_then_sub_32 |
| 92451 | 0, // x8sub_4_then_sub_32_hi |
| 92452 | 0, // x8sub_3_then_sub_32 |
| 92453 | 0, // x8sub_3_then_sub_32_hi |
| 92454 | 0, // x8sub_2_then_sub_32 |
| 92455 | 0, // x8sub_2_then_sub_32_hi |
| 92456 | 0, // x8sub_1_then_sub_32 |
| 92457 | 0, // x8sub_1_then_sub_32_hi |
| 92458 | 0, // subo64_then_sub_32 |
| 92459 | 0, // subo64_then_sub_32_hi |
| 92460 | 420, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92461 | 420, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92462 | 420, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92463 | 0, // dsub0_dsub1 |
| 92464 | 0, // dsub0_dsub1_dsub2 |
| 92465 | 420, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92466 | 420, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92467 | 420, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92468 | 420, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92469 | 420, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92470 | 420, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92471 | 0, // qsub0_qsub1 |
| 92472 | 0, // qsub0_qsub1_qsub2 |
| 92473 | 420, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92474 | 420, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92475 | 420, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92476 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92477 | 0, // x8sub_0_x8sub_1 |
| 92478 | 0, // x8sub_2_x8sub_3 |
| 92479 | 0, // x8sub_4_x8sub_5 |
| 92480 | 0, // x8sub_6_x8sub_7 |
| 92481 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92482 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92483 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92484 | 0, // sub_32_subo64_then_sub_32 |
| 92485 | 420, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92486 | 420, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92487 | 420, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92488 | 420, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92489 | 420, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92490 | 420, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92491 | 420, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92492 | 420, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 92493 | 0, // zsub0_zsub2 |
| 92494 | 0, // zsub1_zsub3 |
| 92495 | }, |
| 92496 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92497 | 421, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92498 | 421, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92499 | 421, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92500 | 0, // dsub0 |
| 92501 | 421, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92502 | 421, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92503 | 421, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92504 | 421, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92505 | 421, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92506 | 421, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92507 | 0, // psub |
| 92508 | 0, // psub0 |
| 92509 | 0, // psub1 |
| 92510 | 0, // qsub0 |
| 92511 | 421, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92512 | 421, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92513 | 421, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92514 | 421, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92515 | 421, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92516 | 0, // sub_32 |
| 92517 | 0, // sub_32_hi |
| 92518 | 0, // sube32 |
| 92519 | 0, // sube64 |
| 92520 | 0, // subo32 |
| 92521 | 0, // subo64 |
| 92522 | 0, // x8sub_0 |
| 92523 | 0, // x8sub_1 |
| 92524 | 0, // x8sub_2 |
| 92525 | 0, // x8sub_3 |
| 92526 | 0, // x8sub_4 |
| 92527 | 0, // x8sub_5 |
| 92528 | 0, // x8sub_6 |
| 92529 | 0, // x8sub_7 |
| 92530 | 0, // zasubb |
| 92531 | 0, // zasubd0 |
| 92532 | 0, // zasubd1 |
| 92533 | 0, // zasubh0 |
| 92534 | 0, // zasubh1 |
| 92535 | 0, // zasubq0 |
| 92536 | 0, // zasubq1 |
| 92537 | 0, // zasubs0 |
| 92538 | 0, // zasubs1 |
| 92539 | 421, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92540 | 421, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92541 | 421, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92542 | 421, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92543 | 421, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92544 | 421, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92545 | 0, // zasubd1_then_zasubq0 |
| 92546 | 0, // zasubd1_then_zasubq1 |
| 92547 | 0, // zasubs1_then_zasubd0 |
| 92548 | 0, // zasubs1_then_zasubd1 |
| 92549 | 0, // zasubs1_then_zasubq0 |
| 92550 | 0, // zasubs1_then_zasubq1 |
| 92551 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92552 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92553 | 0, // zasubh1_then_zasubd0 |
| 92554 | 0, // zasubh1_then_zasubd1 |
| 92555 | 0, // zasubh1_then_zasubq0 |
| 92556 | 0, // zasubh1_then_zasubq1 |
| 92557 | 0, // zasubh1_then_zasubs0 |
| 92558 | 0, // zasubh1_then_zasubs1 |
| 92559 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92560 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92561 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92562 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92563 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92564 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92565 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92566 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92567 | 421, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92568 | 421, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92569 | 421, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92570 | 421, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92571 | 421, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92572 | 421, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92573 | 421, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92574 | 421, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92575 | 421, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92576 | 421, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92577 | 421, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92578 | 421, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92579 | 421, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92580 | 421, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92581 | 421, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92582 | 421, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92583 | 421, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92584 | 421, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92585 | 0, // psub1_then_psub |
| 92586 | 421, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92587 | 421, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92588 | 421, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92589 | 0, // x8sub_7_then_sub_32 |
| 92590 | 0, // x8sub_7_then_sub_32_hi |
| 92591 | 0, // x8sub_6_then_sub_32 |
| 92592 | 0, // x8sub_6_then_sub_32_hi |
| 92593 | 0, // x8sub_5_then_sub_32 |
| 92594 | 0, // x8sub_5_then_sub_32_hi |
| 92595 | 0, // x8sub_4_then_sub_32 |
| 92596 | 0, // x8sub_4_then_sub_32_hi |
| 92597 | 0, // x8sub_3_then_sub_32 |
| 92598 | 0, // x8sub_3_then_sub_32_hi |
| 92599 | 0, // x8sub_2_then_sub_32 |
| 92600 | 0, // x8sub_2_then_sub_32_hi |
| 92601 | 0, // x8sub_1_then_sub_32 |
| 92602 | 0, // x8sub_1_then_sub_32_hi |
| 92603 | 0, // subo64_then_sub_32 |
| 92604 | 0, // subo64_then_sub_32_hi |
| 92605 | 421, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92606 | 421, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92607 | 421, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92608 | 0, // dsub0_dsub1 |
| 92609 | 0, // dsub0_dsub1_dsub2 |
| 92610 | 421, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92611 | 421, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92612 | 421, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92613 | 421, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92614 | 421, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92615 | 421, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92616 | 0, // qsub0_qsub1 |
| 92617 | 0, // qsub0_qsub1_qsub2 |
| 92618 | 421, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92619 | 421, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92620 | 421, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92621 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92622 | 0, // x8sub_0_x8sub_1 |
| 92623 | 0, // x8sub_2_x8sub_3 |
| 92624 | 0, // x8sub_4_x8sub_5 |
| 92625 | 0, // x8sub_6_x8sub_7 |
| 92626 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92627 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92628 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92629 | 0, // sub_32_subo64_then_sub_32 |
| 92630 | 421, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92631 | 421, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92632 | 421, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92633 | 421, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92634 | 421, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92635 | 421, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92636 | 421, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92637 | 421, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 92638 | 0, // zsub0_zsub2 |
| 92639 | 0, // zsub1_zsub3 |
| 92640 | }, |
| 92641 | { // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92642 | 422, // bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92643 | 422, // bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92644 | 422, // dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92645 | 0, // dsub0 |
| 92646 | 422, // dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92647 | 422, // dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92648 | 422, // dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92649 | 422, // dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92650 | 422, // hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92651 | 422, // hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92652 | 0, // psub |
| 92653 | 0, // psub0 |
| 92654 | 0, // psub1 |
| 92655 | 0, // qsub0 |
| 92656 | 422, // qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92657 | 422, // qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92658 | 422, // qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92659 | 422, // ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92660 | 422, // ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92661 | 0, // sub_32 |
| 92662 | 0, // sub_32_hi |
| 92663 | 0, // sube32 |
| 92664 | 0, // sube64 |
| 92665 | 0, // subo32 |
| 92666 | 0, // subo64 |
| 92667 | 0, // x8sub_0 |
| 92668 | 0, // x8sub_1 |
| 92669 | 0, // x8sub_2 |
| 92670 | 0, // x8sub_3 |
| 92671 | 0, // x8sub_4 |
| 92672 | 0, // x8sub_5 |
| 92673 | 0, // x8sub_6 |
| 92674 | 0, // x8sub_7 |
| 92675 | 0, // zasubb |
| 92676 | 0, // zasubd0 |
| 92677 | 0, // zasubd1 |
| 92678 | 0, // zasubh0 |
| 92679 | 0, // zasubh1 |
| 92680 | 0, // zasubq0 |
| 92681 | 0, // zasubq1 |
| 92682 | 0, // zasubs0 |
| 92683 | 0, // zasubs1 |
| 92684 | 422, // zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92685 | 422, // zsub0 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92686 | 422, // zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92687 | 422, // zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92688 | 422, // zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92689 | 422, // zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92690 | 0, // zasubd1_then_zasubq0 |
| 92691 | 0, // zasubd1_then_zasubq1 |
| 92692 | 0, // zasubs1_then_zasubd0 |
| 92693 | 0, // zasubs1_then_zasubd1 |
| 92694 | 0, // zasubs1_then_zasubq0 |
| 92695 | 0, // zasubs1_then_zasubq1 |
| 92696 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92697 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92698 | 0, // zasubh1_then_zasubd0 |
| 92699 | 0, // zasubh1_then_zasubd1 |
| 92700 | 0, // zasubh1_then_zasubq0 |
| 92701 | 0, // zasubh1_then_zasubq1 |
| 92702 | 0, // zasubh1_then_zasubs0 |
| 92703 | 0, // zasubh1_then_zasubs1 |
| 92704 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92705 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92706 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92707 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92708 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92709 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92710 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92711 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92712 | 422, // dsub1_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92713 | 422, // dsub1_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92714 | 422, // dsub1_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92715 | 422, // dsub1_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92716 | 422, // dsub1_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92717 | 422, // dsub1_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92718 | 422, // dsub3_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92719 | 422, // dsub3_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92720 | 422, // dsub3_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92721 | 422, // dsub3_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92722 | 422, // dsub3_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92723 | 422, // dsub3_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92724 | 422, // dsub2_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92725 | 422, // dsub2_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92726 | 422, // dsub2_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92727 | 422, // dsub2_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92728 | 422, // dsub2_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92729 | 422, // dsub2_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92730 | 0, // psub1_then_psub |
| 92731 | 422, // qsub1_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92732 | 422, // qsub3_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92733 | 422, // qsub2_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92734 | 0, // x8sub_7_then_sub_32 |
| 92735 | 0, // x8sub_7_then_sub_32_hi |
| 92736 | 0, // x8sub_6_then_sub_32 |
| 92737 | 0, // x8sub_6_then_sub_32_hi |
| 92738 | 0, // x8sub_5_then_sub_32 |
| 92739 | 0, // x8sub_5_then_sub_32_hi |
| 92740 | 0, // x8sub_4_then_sub_32 |
| 92741 | 0, // x8sub_4_then_sub_32_hi |
| 92742 | 0, // x8sub_3_then_sub_32 |
| 92743 | 0, // x8sub_3_then_sub_32_hi |
| 92744 | 0, // x8sub_2_then_sub_32 |
| 92745 | 0, // x8sub_2_then_sub_32_hi |
| 92746 | 0, // x8sub_1_then_sub_32 |
| 92747 | 0, // x8sub_1_then_sub_32_hi |
| 92748 | 0, // subo64_then_sub_32 |
| 92749 | 0, // subo64_then_sub_32_hi |
| 92750 | 422, // zsub1_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92751 | 422, // zsub3_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92752 | 422, // zsub2_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92753 | 0, // dsub0_dsub1 |
| 92754 | 0, // dsub0_dsub1_dsub2 |
| 92755 | 422, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92756 | 422, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92757 | 422, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92758 | 422, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92759 | 422, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92760 | 422, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92761 | 0, // qsub0_qsub1 |
| 92762 | 0, // qsub0_qsub1_qsub2 |
| 92763 | 422, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92764 | 422, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92765 | 422, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92766 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92767 | 0, // x8sub_0_x8sub_1 |
| 92768 | 0, // x8sub_2_x8sub_3 |
| 92769 | 0, // x8sub_4_x8sub_5 |
| 92770 | 0, // x8sub_6_x8sub_7 |
| 92771 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92772 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92773 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92774 | 0, // sub_32_subo64_then_sub_32 |
| 92775 | 422, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92776 | 422, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92777 | 422, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92778 | 422, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92779 | 422, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92780 | 422, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92781 | 422, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92782 | 422, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 92783 | 0, // zsub0_zsub2 |
| 92784 | 0, // zsub1_zsub3 |
| 92785 | }, |
| 92786 | { // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92787 | 423, // bsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92788 | 423, // bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92789 | 423, // dsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92790 | 0, // dsub0 |
| 92791 | 423, // dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92792 | 423, // dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92793 | 423, // dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92794 | 423, // dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92795 | 423, // hsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92796 | 423, // hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92797 | 0, // psub |
| 92798 | 0, // psub0 |
| 92799 | 0, // psub1 |
| 92800 | 0, // qsub0 |
| 92801 | 423, // qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92802 | 423, // qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92803 | 423, // qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92804 | 423, // ssub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92805 | 423, // ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92806 | 0, // sub_32 |
| 92807 | 0, // sub_32_hi |
| 92808 | 0, // sube32 |
| 92809 | 0, // sube64 |
| 92810 | 0, // subo32 |
| 92811 | 0, // subo64 |
| 92812 | 0, // x8sub_0 |
| 92813 | 0, // x8sub_1 |
| 92814 | 0, // x8sub_2 |
| 92815 | 0, // x8sub_3 |
| 92816 | 0, // x8sub_4 |
| 92817 | 0, // x8sub_5 |
| 92818 | 0, // x8sub_6 |
| 92819 | 0, // x8sub_7 |
| 92820 | 0, // zasubb |
| 92821 | 0, // zasubd0 |
| 92822 | 0, // zasubd1 |
| 92823 | 0, // zasubh0 |
| 92824 | 0, // zasubh1 |
| 92825 | 0, // zasubq0 |
| 92826 | 0, // zasubq1 |
| 92827 | 0, // zasubs0 |
| 92828 | 0, // zasubs1 |
| 92829 | 423, // zsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92830 | 423, // zsub0 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92831 | 423, // zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92832 | 423, // zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92833 | 423, // zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92834 | 423, // zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92835 | 0, // zasubd1_then_zasubq0 |
| 92836 | 0, // zasubd1_then_zasubq1 |
| 92837 | 0, // zasubs1_then_zasubd0 |
| 92838 | 0, // zasubs1_then_zasubd1 |
| 92839 | 0, // zasubs1_then_zasubq0 |
| 92840 | 0, // zasubs1_then_zasubq1 |
| 92841 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92842 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92843 | 0, // zasubh1_then_zasubd0 |
| 92844 | 0, // zasubh1_then_zasubd1 |
| 92845 | 0, // zasubh1_then_zasubq0 |
| 92846 | 0, // zasubh1_then_zasubq1 |
| 92847 | 0, // zasubh1_then_zasubs0 |
| 92848 | 0, // zasubh1_then_zasubs1 |
| 92849 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92850 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92851 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92852 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92853 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92854 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 92855 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 92856 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 92857 | 423, // dsub1_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92858 | 423, // dsub1_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92859 | 423, // dsub1_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92860 | 423, // dsub1_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92861 | 423, // dsub1_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92862 | 423, // dsub1_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92863 | 423, // dsub3_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92864 | 423, // dsub3_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92865 | 423, // dsub3_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92866 | 423, // dsub3_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92867 | 423, // dsub3_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92868 | 423, // dsub3_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92869 | 423, // dsub2_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92870 | 423, // dsub2_then_bsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92871 | 423, // dsub2_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92872 | 423, // dsub2_then_hsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92873 | 423, // dsub2_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92874 | 423, // dsub2_then_ssub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92875 | 0, // psub1_then_psub |
| 92876 | 423, // qsub1_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92877 | 423, // qsub3_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92878 | 423, // qsub2_then_dsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92879 | 0, // x8sub_7_then_sub_32 |
| 92880 | 0, // x8sub_7_then_sub_32_hi |
| 92881 | 0, // x8sub_6_then_sub_32 |
| 92882 | 0, // x8sub_6_then_sub_32_hi |
| 92883 | 0, // x8sub_5_then_sub_32 |
| 92884 | 0, // x8sub_5_then_sub_32_hi |
| 92885 | 0, // x8sub_4_then_sub_32 |
| 92886 | 0, // x8sub_4_then_sub_32_hi |
| 92887 | 0, // x8sub_3_then_sub_32 |
| 92888 | 0, // x8sub_3_then_sub_32_hi |
| 92889 | 0, // x8sub_2_then_sub_32 |
| 92890 | 0, // x8sub_2_then_sub_32_hi |
| 92891 | 0, // x8sub_1_then_sub_32 |
| 92892 | 0, // x8sub_1_then_sub_32_hi |
| 92893 | 0, // subo64_then_sub_32 |
| 92894 | 0, // subo64_then_sub_32_hi |
| 92895 | 423, // zsub1_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92896 | 423, // zsub3_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92897 | 423, // zsub2_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92898 | 0, // dsub0_dsub1 |
| 92899 | 0, // dsub0_dsub1_dsub2 |
| 92900 | 423, // dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92901 | 423, // dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92902 | 423, // dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92903 | 423, // dsub_dsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92904 | 423, // dsub_dsub1_dsub2_dsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92905 | 423, // dsub_dsub1_dsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92906 | 0, // qsub0_qsub1 |
| 92907 | 0, // qsub0_qsub1_qsub2 |
| 92908 | 423, // qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92909 | 423, // qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92910 | 423, // qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92911 | 0, // sub_32_x8sub_1_then_sub_32 |
| 92912 | 0, // x8sub_0_x8sub_1 |
| 92913 | 0, // x8sub_2_x8sub_3 |
| 92914 | 0, // x8sub_4_x8sub_5 |
| 92915 | 0, // x8sub_6_x8sub_7 |
| 92916 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 92917 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 92918 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 92919 | 0, // sub_32_subo64_then_sub_32 |
| 92920 | 423, // zsub_qsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92921 | 423, // zsub_qsub1_qsub2_qsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92922 | 423, // zsub_qsub1_qsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92923 | 423, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92924 | 423, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92925 | 423, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92926 | 423, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92927 | 423, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 92928 | 0, // zsub0_zsub2 |
| 92929 | 0, // zsub1_zsub3 |
| 92930 | }, |
| 92931 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92932 | 424, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92933 | 424, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92934 | 424, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92935 | 0, // dsub0 |
| 92936 | 424, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92937 | 424, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92938 | 424, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92939 | 424, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92940 | 424, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92941 | 424, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92942 | 0, // psub |
| 92943 | 0, // psub0 |
| 92944 | 0, // psub1 |
| 92945 | 0, // qsub0 |
| 92946 | 424, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92947 | 424, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92948 | 424, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92949 | 424, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92950 | 424, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92951 | 0, // sub_32 |
| 92952 | 0, // sub_32_hi |
| 92953 | 0, // sube32 |
| 92954 | 0, // sube64 |
| 92955 | 0, // subo32 |
| 92956 | 0, // subo64 |
| 92957 | 0, // x8sub_0 |
| 92958 | 0, // x8sub_1 |
| 92959 | 0, // x8sub_2 |
| 92960 | 0, // x8sub_3 |
| 92961 | 0, // x8sub_4 |
| 92962 | 0, // x8sub_5 |
| 92963 | 0, // x8sub_6 |
| 92964 | 0, // x8sub_7 |
| 92965 | 0, // zasubb |
| 92966 | 0, // zasubd0 |
| 92967 | 0, // zasubd1 |
| 92968 | 0, // zasubh0 |
| 92969 | 0, // zasubh1 |
| 92970 | 0, // zasubq0 |
| 92971 | 0, // zasubq1 |
| 92972 | 0, // zasubs0 |
| 92973 | 0, // zasubs1 |
| 92974 | 424, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92975 | 424, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92976 | 424, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92977 | 424, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92978 | 424, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92979 | 424, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 92980 | 0, // zasubd1_then_zasubq0 |
| 92981 | 0, // zasubd1_then_zasubq1 |
| 92982 | 0, // zasubs1_then_zasubd0 |
| 92983 | 0, // zasubs1_then_zasubd1 |
| 92984 | 0, // zasubs1_then_zasubq0 |
| 92985 | 0, // zasubs1_then_zasubq1 |
| 92986 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 92987 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 92988 | 0, // zasubh1_then_zasubd0 |
| 92989 | 0, // zasubh1_then_zasubd1 |
| 92990 | 0, // zasubh1_then_zasubq0 |
| 92991 | 0, // zasubh1_then_zasubq1 |
| 92992 | 0, // zasubh1_then_zasubs0 |
| 92993 | 0, // zasubh1_then_zasubs1 |
| 92994 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 92995 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 92996 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 92997 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 92998 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 92999 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93000 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93001 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93002 | 424, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93003 | 424, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93004 | 424, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93005 | 424, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93006 | 424, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93007 | 424, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93008 | 424, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93009 | 424, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93010 | 424, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93011 | 424, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93012 | 424, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93013 | 424, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93014 | 424, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93015 | 424, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93016 | 424, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93017 | 424, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93018 | 424, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93019 | 424, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93020 | 0, // psub1_then_psub |
| 93021 | 424, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93022 | 424, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93023 | 424, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93024 | 0, // x8sub_7_then_sub_32 |
| 93025 | 0, // x8sub_7_then_sub_32_hi |
| 93026 | 0, // x8sub_6_then_sub_32 |
| 93027 | 0, // x8sub_6_then_sub_32_hi |
| 93028 | 0, // x8sub_5_then_sub_32 |
| 93029 | 0, // x8sub_5_then_sub_32_hi |
| 93030 | 0, // x8sub_4_then_sub_32 |
| 93031 | 0, // x8sub_4_then_sub_32_hi |
| 93032 | 0, // x8sub_3_then_sub_32 |
| 93033 | 0, // x8sub_3_then_sub_32_hi |
| 93034 | 0, // x8sub_2_then_sub_32 |
| 93035 | 0, // x8sub_2_then_sub_32_hi |
| 93036 | 0, // x8sub_1_then_sub_32 |
| 93037 | 0, // x8sub_1_then_sub_32_hi |
| 93038 | 0, // subo64_then_sub_32 |
| 93039 | 0, // subo64_then_sub_32_hi |
| 93040 | 424, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93041 | 424, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93042 | 424, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93043 | 0, // dsub0_dsub1 |
| 93044 | 0, // dsub0_dsub1_dsub2 |
| 93045 | 0, // dsub1_dsub2 |
| 93046 | 0, // dsub1_dsub2_dsub3 |
| 93047 | 0, // dsub2_dsub3 |
| 93048 | 0, // dsub_dsub1 |
| 93049 | 0, // dsub_dsub1_dsub2_dsub3 |
| 93050 | 0, // dsub_dsub1_dsub2 |
| 93051 | 0, // qsub0_qsub1 |
| 93052 | 0, // qsub0_qsub1_qsub2 |
| 93053 | 0, // qsub1_qsub2 |
| 93054 | 0, // qsub1_qsub2_qsub3 |
| 93055 | 0, // qsub2_qsub3 |
| 93056 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93057 | 0, // x8sub_0_x8sub_1 |
| 93058 | 0, // x8sub_2_x8sub_3 |
| 93059 | 0, // x8sub_4_x8sub_5 |
| 93060 | 0, // x8sub_6_x8sub_7 |
| 93061 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93062 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93063 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93064 | 0, // sub_32_subo64_then_sub_32 |
| 93065 | 0, // zsub_qsub1 |
| 93066 | 0, // zsub_qsub1_qsub2_qsub3 |
| 93067 | 0, // zsub_qsub1_qsub2 |
| 93068 | 0, // zsub0_zsub1 |
| 93069 | 0, // zsub0_zsub1_zsub2 |
| 93070 | 0, // zsub1_zsub2 |
| 93071 | 0, // zsub1_zsub2_zsub3 |
| 93072 | 0, // zsub2_zsub3 |
| 93073 | 424, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93074 | 424, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 93075 | }, |
| 93076 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93077 | 425, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93078 | 425, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93079 | 425, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93080 | 0, // dsub0 |
| 93081 | 425, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93082 | 425, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93083 | 425, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93084 | 425, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93085 | 425, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93086 | 425, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93087 | 0, // psub |
| 93088 | 0, // psub0 |
| 93089 | 0, // psub1 |
| 93090 | 0, // qsub0 |
| 93091 | 425, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93092 | 425, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93093 | 425, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93094 | 425, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93095 | 425, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93096 | 0, // sub_32 |
| 93097 | 0, // sub_32_hi |
| 93098 | 0, // sube32 |
| 93099 | 0, // sube64 |
| 93100 | 0, // subo32 |
| 93101 | 0, // subo64 |
| 93102 | 0, // x8sub_0 |
| 93103 | 0, // x8sub_1 |
| 93104 | 0, // x8sub_2 |
| 93105 | 0, // x8sub_3 |
| 93106 | 0, // x8sub_4 |
| 93107 | 0, // x8sub_5 |
| 93108 | 0, // x8sub_6 |
| 93109 | 0, // x8sub_7 |
| 93110 | 0, // zasubb |
| 93111 | 0, // zasubd0 |
| 93112 | 0, // zasubd1 |
| 93113 | 0, // zasubh0 |
| 93114 | 0, // zasubh1 |
| 93115 | 0, // zasubq0 |
| 93116 | 0, // zasubq1 |
| 93117 | 0, // zasubs0 |
| 93118 | 0, // zasubs1 |
| 93119 | 425, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93120 | 425, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93121 | 425, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93122 | 425, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93123 | 425, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93124 | 425, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93125 | 0, // zasubd1_then_zasubq0 |
| 93126 | 0, // zasubd1_then_zasubq1 |
| 93127 | 0, // zasubs1_then_zasubd0 |
| 93128 | 0, // zasubs1_then_zasubd1 |
| 93129 | 0, // zasubs1_then_zasubq0 |
| 93130 | 0, // zasubs1_then_zasubq1 |
| 93131 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93132 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93133 | 0, // zasubh1_then_zasubd0 |
| 93134 | 0, // zasubh1_then_zasubd1 |
| 93135 | 0, // zasubh1_then_zasubq0 |
| 93136 | 0, // zasubh1_then_zasubq1 |
| 93137 | 0, // zasubh1_then_zasubs0 |
| 93138 | 0, // zasubh1_then_zasubs1 |
| 93139 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93140 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93141 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93142 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93143 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93144 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93145 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93146 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93147 | 425, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93148 | 425, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93149 | 425, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93150 | 425, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93151 | 425, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93152 | 425, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93153 | 425, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93154 | 425, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93155 | 425, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93156 | 425, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93157 | 425, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93158 | 425, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93159 | 425, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93160 | 425, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93161 | 425, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93162 | 425, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93163 | 425, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93164 | 425, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93165 | 0, // psub1_then_psub |
| 93166 | 425, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93167 | 425, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93168 | 425, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93169 | 0, // x8sub_7_then_sub_32 |
| 93170 | 0, // x8sub_7_then_sub_32_hi |
| 93171 | 0, // x8sub_6_then_sub_32 |
| 93172 | 0, // x8sub_6_then_sub_32_hi |
| 93173 | 0, // x8sub_5_then_sub_32 |
| 93174 | 0, // x8sub_5_then_sub_32_hi |
| 93175 | 0, // x8sub_4_then_sub_32 |
| 93176 | 0, // x8sub_4_then_sub_32_hi |
| 93177 | 0, // x8sub_3_then_sub_32 |
| 93178 | 0, // x8sub_3_then_sub_32_hi |
| 93179 | 0, // x8sub_2_then_sub_32 |
| 93180 | 0, // x8sub_2_then_sub_32_hi |
| 93181 | 0, // x8sub_1_then_sub_32 |
| 93182 | 0, // x8sub_1_then_sub_32_hi |
| 93183 | 0, // subo64_then_sub_32 |
| 93184 | 0, // subo64_then_sub_32_hi |
| 93185 | 425, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93186 | 425, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93187 | 425, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93188 | 0, // dsub0_dsub1 |
| 93189 | 0, // dsub0_dsub1_dsub2 |
| 93190 | 0, // dsub1_dsub2 |
| 93191 | 0, // dsub1_dsub2_dsub3 |
| 93192 | 0, // dsub2_dsub3 |
| 93193 | 0, // dsub_dsub1 |
| 93194 | 0, // dsub_dsub1_dsub2_dsub3 |
| 93195 | 0, // dsub_dsub1_dsub2 |
| 93196 | 0, // qsub0_qsub1 |
| 93197 | 0, // qsub0_qsub1_qsub2 |
| 93198 | 0, // qsub1_qsub2 |
| 93199 | 0, // qsub1_qsub2_qsub3 |
| 93200 | 0, // qsub2_qsub3 |
| 93201 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93202 | 0, // x8sub_0_x8sub_1 |
| 93203 | 0, // x8sub_2_x8sub_3 |
| 93204 | 0, // x8sub_4_x8sub_5 |
| 93205 | 0, // x8sub_6_x8sub_7 |
| 93206 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93207 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93208 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93209 | 0, // sub_32_subo64_then_sub_32 |
| 93210 | 0, // zsub_qsub1 |
| 93211 | 0, // zsub_qsub1_qsub2_qsub3 |
| 93212 | 0, // zsub_qsub1_qsub2 |
| 93213 | 0, // zsub0_zsub1 |
| 93214 | 0, // zsub0_zsub1_zsub2 |
| 93215 | 0, // zsub1_zsub2 |
| 93216 | 0, // zsub1_zsub2_zsub3 |
| 93217 | 0, // zsub2_zsub3 |
| 93218 | 425, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93219 | 425, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 93220 | }, |
| 93221 | { // ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93222 | 426, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93223 | 426, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93224 | 426, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93225 | 0, // dsub0 |
| 93226 | 426, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93227 | 426, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93228 | 426, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93229 | 426, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93230 | 426, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93231 | 426, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93232 | 0, // psub |
| 93233 | 0, // psub0 |
| 93234 | 0, // psub1 |
| 93235 | 0, // qsub0 |
| 93236 | 426, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93237 | 426, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93238 | 426, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93239 | 426, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93240 | 426, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93241 | 0, // sub_32 |
| 93242 | 0, // sub_32_hi |
| 93243 | 0, // sube32 |
| 93244 | 0, // sube64 |
| 93245 | 0, // subo32 |
| 93246 | 0, // subo64 |
| 93247 | 0, // x8sub_0 |
| 93248 | 0, // x8sub_1 |
| 93249 | 0, // x8sub_2 |
| 93250 | 0, // x8sub_3 |
| 93251 | 0, // x8sub_4 |
| 93252 | 0, // x8sub_5 |
| 93253 | 0, // x8sub_6 |
| 93254 | 0, // x8sub_7 |
| 93255 | 0, // zasubb |
| 93256 | 0, // zasubd0 |
| 93257 | 0, // zasubd1 |
| 93258 | 0, // zasubh0 |
| 93259 | 0, // zasubh1 |
| 93260 | 0, // zasubq0 |
| 93261 | 0, // zasubq1 |
| 93262 | 0, // zasubs0 |
| 93263 | 0, // zasubs1 |
| 93264 | 426, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93265 | 426, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93266 | 426, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93267 | 426, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93268 | 426, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93269 | 426, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93270 | 0, // zasubd1_then_zasubq0 |
| 93271 | 0, // zasubd1_then_zasubq1 |
| 93272 | 0, // zasubs1_then_zasubd0 |
| 93273 | 0, // zasubs1_then_zasubd1 |
| 93274 | 0, // zasubs1_then_zasubq0 |
| 93275 | 0, // zasubs1_then_zasubq1 |
| 93276 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93277 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93278 | 0, // zasubh1_then_zasubd0 |
| 93279 | 0, // zasubh1_then_zasubd1 |
| 93280 | 0, // zasubh1_then_zasubq0 |
| 93281 | 0, // zasubh1_then_zasubq1 |
| 93282 | 0, // zasubh1_then_zasubs0 |
| 93283 | 0, // zasubh1_then_zasubs1 |
| 93284 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93285 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93286 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93287 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93288 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93289 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93290 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93291 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93292 | 426, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93293 | 426, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93294 | 426, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93295 | 426, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93296 | 426, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93297 | 426, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93298 | 426, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93299 | 426, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93300 | 426, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93301 | 426, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93302 | 426, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93303 | 426, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93304 | 426, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93305 | 426, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93306 | 426, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93307 | 426, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93308 | 426, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93309 | 426, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93310 | 0, // psub1_then_psub |
| 93311 | 426, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93312 | 426, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93313 | 426, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93314 | 0, // x8sub_7_then_sub_32 |
| 93315 | 0, // x8sub_7_then_sub_32_hi |
| 93316 | 0, // x8sub_6_then_sub_32 |
| 93317 | 0, // x8sub_6_then_sub_32_hi |
| 93318 | 0, // x8sub_5_then_sub_32 |
| 93319 | 0, // x8sub_5_then_sub_32_hi |
| 93320 | 0, // x8sub_4_then_sub_32 |
| 93321 | 0, // x8sub_4_then_sub_32_hi |
| 93322 | 0, // x8sub_3_then_sub_32 |
| 93323 | 0, // x8sub_3_then_sub_32_hi |
| 93324 | 0, // x8sub_2_then_sub_32 |
| 93325 | 0, // x8sub_2_then_sub_32_hi |
| 93326 | 0, // x8sub_1_then_sub_32 |
| 93327 | 0, // x8sub_1_then_sub_32_hi |
| 93328 | 0, // subo64_then_sub_32 |
| 93329 | 0, // subo64_then_sub_32_hi |
| 93330 | 426, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93331 | 426, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93332 | 426, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93333 | 0, // dsub0_dsub1 |
| 93334 | 0, // dsub0_dsub1_dsub2 |
| 93335 | 0, // dsub1_dsub2 |
| 93336 | 0, // dsub1_dsub2_dsub3 |
| 93337 | 0, // dsub2_dsub3 |
| 93338 | 0, // dsub_dsub1 |
| 93339 | 0, // dsub_dsub1_dsub2_dsub3 |
| 93340 | 0, // dsub_dsub1_dsub2 |
| 93341 | 0, // qsub0_qsub1 |
| 93342 | 0, // qsub0_qsub1_qsub2 |
| 93343 | 0, // qsub1_qsub2 |
| 93344 | 0, // qsub1_qsub2_qsub3 |
| 93345 | 0, // qsub2_qsub3 |
| 93346 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93347 | 0, // x8sub_0_x8sub_1 |
| 93348 | 0, // x8sub_2_x8sub_3 |
| 93349 | 0, // x8sub_4_x8sub_5 |
| 93350 | 0, // x8sub_6_x8sub_7 |
| 93351 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93352 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93353 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93354 | 0, // sub_32_subo64_then_sub_32 |
| 93355 | 0, // zsub_qsub1 |
| 93356 | 0, // zsub_qsub1_qsub2_qsub3 |
| 93357 | 0, // zsub_qsub1_qsub2 |
| 93358 | 0, // zsub0_zsub1 |
| 93359 | 0, // zsub0_zsub1_zsub2 |
| 93360 | 0, // zsub1_zsub2 |
| 93361 | 0, // zsub1_zsub2_zsub3 |
| 93362 | 0, // zsub2_zsub3 |
| 93363 | 426, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93364 | 426, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 93365 | }, |
| 93366 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93367 | 427, // bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93368 | 427, // bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93369 | 427, // dsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93370 | 0, // dsub0 |
| 93371 | 427, // dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93372 | 427, // dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93373 | 427, // dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93374 | 427, // dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93375 | 427, // hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93376 | 427, // hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93377 | 0, // psub |
| 93378 | 0, // psub0 |
| 93379 | 0, // psub1 |
| 93380 | 0, // qsub0 |
| 93381 | 427, // qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93382 | 427, // qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93383 | 427, // qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93384 | 427, // ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93385 | 427, // ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93386 | 0, // sub_32 |
| 93387 | 0, // sub_32_hi |
| 93388 | 0, // sube32 |
| 93389 | 0, // sube64 |
| 93390 | 0, // subo32 |
| 93391 | 0, // subo64 |
| 93392 | 0, // x8sub_0 |
| 93393 | 0, // x8sub_1 |
| 93394 | 0, // x8sub_2 |
| 93395 | 0, // x8sub_3 |
| 93396 | 0, // x8sub_4 |
| 93397 | 0, // x8sub_5 |
| 93398 | 0, // x8sub_6 |
| 93399 | 0, // x8sub_7 |
| 93400 | 0, // zasubb |
| 93401 | 0, // zasubd0 |
| 93402 | 0, // zasubd1 |
| 93403 | 0, // zasubh0 |
| 93404 | 0, // zasubh1 |
| 93405 | 0, // zasubq0 |
| 93406 | 0, // zasubq1 |
| 93407 | 0, // zasubs0 |
| 93408 | 0, // zasubs1 |
| 93409 | 427, // zsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93410 | 427, // zsub0 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93411 | 427, // zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93412 | 427, // zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93413 | 427, // zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93414 | 427, // zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93415 | 0, // zasubd1_then_zasubq0 |
| 93416 | 0, // zasubd1_then_zasubq1 |
| 93417 | 0, // zasubs1_then_zasubd0 |
| 93418 | 0, // zasubs1_then_zasubd1 |
| 93419 | 0, // zasubs1_then_zasubq0 |
| 93420 | 0, // zasubs1_then_zasubq1 |
| 93421 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93422 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93423 | 0, // zasubh1_then_zasubd0 |
| 93424 | 0, // zasubh1_then_zasubd1 |
| 93425 | 0, // zasubh1_then_zasubq0 |
| 93426 | 0, // zasubh1_then_zasubq1 |
| 93427 | 0, // zasubh1_then_zasubs0 |
| 93428 | 0, // zasubh1_then_zasubs1 |
| 93429 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93430 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93431 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93432 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93433 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93434 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93435 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93436 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93437 | 427, // dsub1_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93438 | 427, // dsub1_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93439 | 427, // dsub1_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93440 | 427, // dsub1_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93441 | 427, // dsub1_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93442 | 427, // dsub1_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93443 | 427, // dsub3_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93444 | 427, // dsub3_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93445 | 427, // dsub3_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93446 | 427, // dsub3_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93447 | 427, // dsub3_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93448 | 427, // dsub3_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93449 | 427, // dsub2_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93450 | 427, // dsub2_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93451 | 427, // dsub2_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93452 | 427, // dsub2_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93453 | 427, // dsub2_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93454 | 427, // dsub2_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93455 | 0, // psub1_then_psub |
| 93456 | 427, // qsub1_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93457 | 427, // qsub3_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93458 | 427, // qsub2_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93459 | 0, // x8sub_7_then_sub_32 |
| 93460 | 0, // x8sub_7_then_sub_32_hi |
| 93461 | 0, // x8sub_6_then_sub_32 |
| 93462 | 0, // x8sub_6_then_sub_32_hi |
| 93463 | 0, // x8sub_5_then_sub_32 |
| 93464 | 0, // x8sub_5_then_sub_32_hi |
| 93465 | 0, // x8sub_4_then_sub_32 |
| 93466 | 0, // x8sub_4_then_sub_32_hi |
| 93467 | 0, // x8sub_3_then_sub_32 |
| 93468 | 0, // x8sub_3_then_sub_32_hi |
| 93469 | 0, // x8sub_2_then_sub_32 |
| 93470 | 0, // x8sub_2_then_sub_32_hi |
| 93471 | 0, // x8sub_1_then_sub_32 |
| 93472 | 0, // x8sub_1_then_sub_32_hi |
| 93473 | 0, // subo64_then_sub_32 |
| 93474 | 0, // subo64_then_sub_32_hi |
| 93475 | 427, // zsub1_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93476 | 427, // zsub3_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93477 | 427, // zsub2_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93478 | 0, // dsub0_dsub1 |
| 93479 | 0, // dsub0_dsub1_dsub2 |
| 93480 | 427, // dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93481 | 427, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93482 | 427, // dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93483 | 427, // dsub_dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93484 | 427, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93485 | 427, // dsub_dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93486 | 0, // qsub0_qsub1 |
| 93487 | 0, // qsub0_qsub1_qsub2 |
| 93488 | 427, // qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93489 | 427, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93490 | 427, // qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93491 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93492 | 0, // x8sub_0_x8sub_1 |
| 93493 | 0, // x8sub_2_x8sub_3 |
| 93494 | 0, // x8sub_4_x8sub_5 |
| 93495 | 0, // x8sub_6_x8sub_7 |
| 93496 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93497 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93498 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93499 | 0, // sub_32_subo64_then_sub_32 |
| 93500 | 427, // zsub_qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93501 | 427, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93502 | 427, // zsub_qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93503 | 427, // zsub0_zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93504 | 427, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93505 | 427, // zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93506 | 427, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93507 | 427, // zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 93508 | 0, // zsub0_zsub2 |
| 93509 | 0, // zsub1_zsub3 |
| 93510 | }, |
| 93511 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93512 | 428, // bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93513 | 428, // bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93514 | 428, // dsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93515 | 0, // dsub0 |
| 93516 | 428, // dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93517 | 428, // dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93518 | 428, // dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93519 | 428, // dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93520 | 428, // hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93521 | 428, // hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93522 | 0, // psub |
| 93523 | 0, // psub0 |
| 93524 | 0, // psub1 |
| 93525 | 0, // qsub0 |
| 93526 | 428, // qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93527 | 428, // qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93528 | 428, // qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93529 | 428, // ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93530 | 428, // ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93531 | 0, // sub_32 |
| 93532 | 0, // sub_32_hi |
| 93533 | 0, // sube32 |
| 93534 | 0, // sube64 |
| 93535 | 0, // subo32 |
| 93536 | 0, // subo64 |
| 93537 | 0, // x8sub_0 |
| 93538 | 0, // x8sub_1 |
| 93539 | 0, // x8sub_2 |
| 93540 | 0, // x8sub_3 |
| 93541 | 0, // x8sub_4 |
| 93542 | 0, // x8sub_5 |
| 93543 | 0, // x8sub_6 |
| 93544 | 0, // x8sub_7 |
| 93545 | 0, // zasubb |
| 93546 | 0, // zasubd0 |
| 93547 | 0, // zasubd1 |
| 93548 | 0, // zasubh0 |
| 93549 | 0, // zasubh1 |
| 93550 | 0, // zasubq0 |
| 93551 | 0, // zasubq1 |
| 93552 | 0, // zasubs0 |
| 93553 | 0, // zasubs1 |
| 93554 | 428, // zsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93555 | 428, // zsub0 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93556 | 428, // zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93557 | 428, // zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93558 | 428, // zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93559 | 428, // zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93560 | 0, // zasubd1_then_zasubq0 |
| 93561 | 0, // zasubd1_then_zasubq1 |
| 93562 | 0, // zasubs1_then_zasubd0 |
| 93563 | 0, // zasubs1_then_zasubd1 |
| 93564 | 0, // zasubs1_then_zasubq0 |
| 93565 | 0, // zasubs1_then_zasubq1 |
| 93566 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93567 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93568 | 0, // zasubh1_then_zasubd0 |
| 93569 | 0, // zasubh1_then_zasubd1 |
| 93570 | 0, // zasubh1_then_zasubq0 |
| 93571 | 0, // zasubh1_then_zasubq1 |
| 93572 | 0, // zasubh1_then_zasubs0 |
| 93573 | 0, // zasubh1_then_zasubs1 |
| 93574 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93575 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93576 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93577 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93578 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93579 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93580 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93581 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93582 | 428, // dsub1_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93583 | 428, // dsub1_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93584 | 428, // dsub1_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93585 | 428, // dsub1_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93586 | 428, // dsub1_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93587 | 428, // dsub1_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93588 | 428, // dsub3_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93589 | 428, // dsub3_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93590 | 428, // dsub3_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93591 | 428, // dsub3_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93592 | 428, // dsub3_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93593 | 428, // dsub3_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93594 | 428, // dsub2_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93595 | 428, // dsub2_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93596 | 428, // dsub2_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93597 | 428, // dsub2_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93598 | 428, // dsub2_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93599 | 428, // dsub2_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93600 | 0, // psub1_then_psub |
| 93601 | 428, // qsub1_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93602 | 428, // qsub3_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93603 | 428, // qsub2_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93604 | 0, // x8sub_7_then_sub_32 |
| 93605 | 0, // x8sub_7_then_sub_32_hi |
| 93606 | 0, // x8sub_6_then_sub_32 |
| 93607 | 0, // x8sub_6_then_sub_32_hi |
| 93608 | 0, // x8sub_5_then_sub_32 |
| 93609 | 0, // x8sub_5_then_sub_32_hi |
| 93610 | 0, // x8sub_4_then_sub_32 |
| 93611 | 0, // x8sub_4_then_sub_32_hi |
| 93612 | 0, // x8sub_3_then_sub_32 |
| 93613 | 0, // x8sub_3_then_sub_32_hi |
| 93614 | 0, // x8sub_2_then_sub_32 |
| 93615 | 0, // x8sub_2_then_sub_32_hi |
| 93616 | 0, // x8sub_1_then_sub_32 |
| 93617 | 0, // x8sub_1_then_sub_32_hi |
| 93618 | 0, // subo64_then_sub_32 |
| 93619 | 0, // subo64_then_sub_32_hi |
| 93620 | 428, // zsub1_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93621 | 428, // zsub3_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93622 | 428, // zsub2_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93623 | 0, // dsub0_dsub1 |
| 93624 | 0, // dsub0_dsub1_dsub2 |
| 93625 | 428, // dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93626 | 428, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93627 | 428, // dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93628 | 428, // dsub_dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93629 | 428, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93630 | 428, // dsub_dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93631 | 0, // qsub0_qsub1 |
| 93632 | 0, // qsub0_qsub1_qsub2 |
| 93633 | 428, // qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93634 | 428, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93635 | 428, // qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93636 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93637 | 0, // x8sub_0_x8sub_1 |
| 93638 | 0, // x8sub_2_x8sub_3 |
| 93639 | 0, // x8sub_4_x8sub_5 |
| 93640 | 0, // x8sub_6_x8sub_7 |
| 93641 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93642 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93643 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93644 | 0, // sub_32_subo64_then_sub_32 |
| 93645 | 428, // zsub_qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93646 | 428, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93647 | 428, // zsub_qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93648 | 428, // zsub0_zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93649 | 428, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93650 | 428, // zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93651 | 428, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93652 | 428, // zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 93653 | 0, // zsub0_zsub2 |
| 93654 | 0, // zsub1_zsub3 |
| 93655 | }, |
| 93656 | { // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93657 | 429, // bsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93658 | 429, // bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93659 | 429, // dsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93660 | 0, // dsub0 |
| 93661 | 429, // dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93662 | 429, // dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93663 | 429, // dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93664 | 429, // dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93665 | 429, // hsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93666 | 429, // hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93667 | 0, // psub |
| 93668 | 0, // psub0 |
| 93669 | 0, // psub1 |
| 93670 | 0, // qsub0 |
| 93671 | 429, // qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93672 | 429, // qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93673 | 429, // qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93674 | 429, // ssub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93675 | 429, // ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93676 | 0, // sub_32 |
| 93677 | 0, // sub_32_hi |
| 93678 | 0, // sube32 |
| 93679 | 0, // sube64 |
| 93680 | 0, // subo32 |
| 93681 | 0, // subo64 |
| 93682 | 0, // x8sub_0 |
| 93683 | 0, // x8sub_1 |
| 93684 | 0, // x8sub_2 |
| 93685 | 0, // x8sub_3 |
| 93686 | 0, // x8sub_4 |
| 93687 | 0, // x8sub_5 |
| 93688 | 0, // x8sub_6 |
| 93689 | 0, // x8sub_7 |
| 93690 | 0, // zasubb |
| 93691 | 0, // zasubd0 |
| 93692 | 0, // zasubd1 |
| 93693 | 0, // zasubh0 |
| 93694 | 0, // zasubh1 |
| 93695 | 0, // zasubq0 |
| 93696 | 0, // zasubq1 |
| 93697 | 0, // zasubs0 |
| 93698 | 0, // zasubs1 |
| 93699 | 429, // zsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93700 | 429, // zsub0 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93701 | 429, // zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93702 | 429, // zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93703 | 429, // zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93704 | 429, // zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93705 | 0, // zasubd1_then_zasubq0 |
| 93706 | 0, // zasubd1_then_zasubq1 |
| 93707 | 0, // zasubs1_then_zasubd0 |
| 93708 | 0, // zasubs1_then_zasubd1 |
| 93709 | 0, // zasubs1_then_zasubq0 |
| 93710 | 0, // zasubs1_then_zasubq1 |
| 93711 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93712 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93713 | 0, // zasubh1_then_zasubd0 |
| 93714 | 0, // zasubh1_then_zasubd1 |
| 93715 | 0, // zasubh1_then_zasubq0 |
| 93716 | 0, // zasubh1_then_zasubq1 |
| 93717 | 0, // zasubh1_then_zasubs0 |
| 93718 | 0, // zasubh1_then_zasubs1 |
| 93719 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93720 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93721 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93722 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93723 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93724 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93725 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93726 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93727 | 429, // dsub1_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93728 | 429, // dsub1_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93729 | 429, // dsub1_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93730 | 429, // dsub1_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93731 | 429, // dsub1_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93732 | 429, // dsub1_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93733 | 429, // dsub3_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93734 | 429, // dsub3_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93735 | 429, // dsub3_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93736 | 429, // dsub3_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93737 | 429, // dsub3_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93738 | 429, // dsub3_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93739 | 429, // dsub2_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93740 | 429, // dsub2_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93741 | 429, // dsub2_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93742 | 429, // dsub2_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93743 | 429, // dsub2_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93744 | 429, // dsub2_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93745 | 0, // psub1_then_psub |
| 93746 | 429, // qsub1_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93747 | 429, // qsub3_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93748 | 429, // qsub2_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93749 | 0, // x8sub_7_then_sub_32 |
| 93750 | 0, // x8sub_7_then_sub_32_hi |
| 93751 | 0, // x8sub_6_then_sub_32 |
| 93752 | 0, // x8sub_6_then_sub_32_hi |
| 93753 | 0, // x8sub_5_then_sub_32 |
| 93754 | 0, // x8sub_5_then_sub_32_hi |
| 93755 | 0, // x8sub_4_then_sub_32 |
| 93756 | 0, // x8sub_4_then_sub_32_hi |
| 93757 | 0, // x8sub_3_then_sub_32 |
| 93758 | 0, // x8sub_3_then_sub_32_hi |
| 93759 | 0, // x8sub_2_then_sub_32 |
| 93760 | 0, // x8sub_2_then_sub_32_hi |
| 93761 | 0, // x8sub_1_then_sub_32 |
| 93762 | 0, // x8sub_1_then_sub_32_hi |
| 93763 | 0, // subo64_then_sub_32 |
| 93764 | 0, // subo64_then_sub_32_hi |
| 93765 | 429, // zsub1_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93766 | 429, // zsub3_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93767 | 429, // zsub2_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93768 | 0, // dsub0_dsub1 |
| 93769 | 0, // dsub0_dsub1_dsub2 |
| 93770 | 429, // dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93771 | 429, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93772 | 429, // dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93773 | 429, // dsub_dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93774 | 429, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93775 | 429, // dsub_dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93776 | 0, // qsub0_qsub1 |
| 93777 | 0, // qsub0_qsub1_qsub2 |
| 93778 | 429, // qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93779 | 429, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93780 | 429, // qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93781 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93782 | 0, // x8sub_0_x8sub_1 |
| 93783 | 0, // x8sub_2_x8sub_3 |
| 93784 | 0, // x8sub_4_x8sub_5 |
| 93785 | 0, // x8sub_6_x8sub_7 |
| 93786 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93787 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93788 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93789 | 0, // sub_32_subo64_then_sub_32 |
| 93790 | 429, // zsub_qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93791 | 429, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93792 | 429, // zsub_qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93793 | 429, // zsub0_zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93794 | 429, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93795 | 429, // zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93796 | 429, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93797 | 429, // zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 93798 | 0, // zsub0_zsub2 |
| 93799 | 0, // zsub1_zsub3 |
| 93800 | }, |
| 93801 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93802 | 430, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93803 | 430, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93804 | 430, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93805 | 0, // dsub0 |
| 93806 | 430, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93807 | 430, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93808 | 430, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93809 | 430, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93810 | 430, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93811 | 430, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93812 | 0, // psub |
| 93813 | 0, // psub0 |
| 93814 | 0, // psub1 |
| 93815 | 0, // qsub0 |
| 93816 | 430, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93817 | 430, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93818 | 430, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93819 | 430, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93820 | 430, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93821 | 0, // sub_32 |
| 93822 | 0, // sub_32_hi |
| 93823 | 0, // sube32 |
| 93824 | 0, // sube64 |
| 93825 | 0, // subo32 |
| 93826 | 0, // subo64 |
| 93827 | 0, // x8sub_0 |
| 93828 | 0, // x8sub_1 |
| 93829 | 0, // x8sub_2 |
| 93830 | 0, // x8sub_3 |
| 93831 | 0, // x8sub_4 |
| 93832 | 0, // x8sub_5 |
| 93833 | 0, // x8sub_6 |
| 93834 | 0, // x8sub_7 |
| 93835 | 0, // zasubb |
| 93836 | 0, // zasubd0 |
| 93837 | 0, // zasubd1 |
| 93838 | 0, // zasubh0 |
| 93839 | 0, // zasubh1 |
| 93840 | 0, // zasubq0 |
| 93841 | 0, // zasubq1 |
| 93842 | 0, // zasubs0 |
| 93843 | 0, // zasubs1 |
| 93844 | 430, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93845 | 430, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93846 | 430, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93847 | 430, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93848 | 430, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93849 | 430, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93850 | 0, // zasubd1_then_zasubq0 |
| 93851 | 0, // zasubd1_then_zasubq1 |
| 93852 | 0, // zasubs1_then_zasubd0 |
| 93853 | 0, // zasubs1_then_zasubd1 |
| 93854 | 0, // zasubs1_then_zasubq0 |
| 93855 | 0, // zasubs1_then_zasubq1 |
| 93856 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 93857 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 93858 | 0, // zasubh1_then_zasubd0 |
| 93859 | 0, // zasubh1_then_zasubd1 |
| 93860 | 0, // zasubh1_then_zasubq0 |
| 93861 | 0, // zasubh1_then_zasubq1 |
| 93862 | 0, // zasubh1_then_zasubs0 |
| 93863 | 0, // zasubh1_then_zasubs1 |
| 93864 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 93865 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 93866 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 93867 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 93868 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 93869 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 93870 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 93871 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 93872 | 430, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93873 | 430, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93874 | 430, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93875 | 430, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93876 | 430, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93877 | 430, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93878 | 430, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93879 | 430, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93880 | 430, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93881 | 430, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93882 | 430, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93883 | 430, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93884 | 430, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93885 | 430, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93886 | 430, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93887 | 430, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93888 | 430, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93889 | 430, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93890 | 0, // psub1_then_psub |
| 93891 | 430, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93892 | 430, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93893 | 430, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93894 | 0, // x8sub_7_then_sub_32 |
| 93895 | 0, // x8sub_7_then_sub_32_hi |
| 93896 | 0, // x8sub_6_then_sub_32 |
| 93897 | 0, // x8sub_6_then_sub_32_hi |
| 93898 | 0, // x8sub_5_then_sub_32 |
| 93899 | 0, // x8sub_5_then_sub_32_hi |
| 93900 | 0, // x8sub_4_then_sub_32 |
| 93901 | 0, // x8sub_4_then_sub_32_hi |
| 93902 | 0, // x8sub_3_then_sub_32 |
| 93903 | 0, // x8sub_3_then_sub_32_hi |
| 93904 | 0, // x8sub_2_then_sub_32 |
| 93905 | 0, // x8sub_2_then_sub_32_hi |
| 93906 | 0, // x8sub_1_then_sub_32 |
| 93907 | 0, // x8sub_1_then_sub_32_hi |
| 93908 | 0, // subo64_then_sub_32 |
| 93909 | 0, // subo64_then_sub_32_hi |
| 93910 | 430, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93911 | 430, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93912 | 430, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93913 | 0, // dsub0_dsub1 |
| 93914 | 0, // dsub0_dsub1_dsub2 |
| 93915 | 430, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93916 | 430, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93917 | 430, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93918 | 430, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93919 | 430, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93920 | 430, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93921 | 0, // qsub0_qsub1 |
| 93922 | 0, // qsub0_qsub1_qsub2 |
| 93923 | 430, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93924 | 430, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93925 | 430, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93926 | 0, // sub_32_x8sub_1_then_sub_32 |
| 93927 | 0, // x8sub_0_x8sub_1 |
| 93928 | 0, // x8sub_2_x8sub_3 |
| 93929 | 0, // x8sub_4_x8sub_5 |
| 93930 | 0, // x8sub_6_x8sub_7 |
| 93931 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 93932 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 93933 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 93934 | 0, // sub_32_subo64_then_sub_32 |
| 93935 | 430, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93936 | 430, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93937 | 430, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93938 | 430, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93939 | 430, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93940 | 430, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93941 | 430, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93942 | 430, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 93943 | 0, // zsub0_zsub2 |
| 93944 | 0, // zsub1_zsub3 |
| 93945 | }, |
| 93946 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93947 | 431, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93948 | 431, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93949 | 431, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93950 | 0, // dsub0 |
| 93951 | 431, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93952 | 431, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93953 | 431, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93954 | 431, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93955 | 431, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93956 | 431, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93957 | 0, // psub |
| 93958 | 0, // psub0 |
| 93959 | 0, // psub1 |
| 93960 | 0, // qsub0 |
| 93961 | 431, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93962 | 431, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93963 | 431, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93964 | 431, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93965 | 431, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93966 | 0, // sub_32 |
| 93967 | 0, // sub_32_hi |
| 93968 | 0, // sube32 |
| 93969 | 0, // sube64 |
| 93970 | 0, // subo32 |
| 93971 | 0, // subo64 |
| 93972 | 0, // x8sub_0 |
| 93973 | 0, // x8sub_1 |
| 93974 | 0, // x8sub_2 |
| 93975 | 0, // x8sub_3 |
| 93976 | 0, // x8sub_4 |
| 93977 | 0, // x8sub_5 |
| 93978 | 0, // x8sub_6 |
| 93979 | 0, // x8sub_7 |
| 93980 | 0, // zasubb |
| 93981 | 0, // zasubd0 |
| 93982 | 0, // zasubd1 |
| 93983 | 0, // zasubh0 |
| 93984 | 0, // zasubh1 |
| 93985 | 0, // zasubq0 |
| 93986 | 0, // zasubq1 |
| 93987 | 0, // zasubs0 |
| 93988 | 0, // zasubs1 |
| 93989 | 431, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93990 | 431, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93991 | 431, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93992 | 431, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93993 | 431, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93994 | 431, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 93995 | 0, // zasubd1_then_zasubq0 |
| 93996 | 0, // zasubd1_then_zasubq1 |
| 93997 | 0, // zasubs1_then_zasubd0 |
| 93998 | 0, // zasubs1_then_zasubd1 |
| 93999 | 0, // zasubs1_then_zasubq0 |
| 94000 | 0, // zasubs1_then_zasubq1 |
| 94001 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94002 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94003 | 0, // zasubh1_then_zasubd0 |
| 94004 | 0, // zasubh1_then_zasubd1 |
| 94005 | 0, // zasubh1_then_zasubq0 |
| 94006 | 0, // zasubh1_then_zasubq1 |
| 94007 | 0, // zasubh1_then_zasubs0 |
| 94008 | 0, // zasubh1_then_zasubs1 |
| 94009 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94010 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94011 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94012 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94013 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94014 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94015 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94016 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94017 | 431, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94018 | 431, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94019 | 431, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94020 | 431, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94021 | 431, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94022 | 431, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94023 | 431, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94024 | 431, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94025 | 431, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94026 | 431, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94027 | 431, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94028 | 431, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94029 | 431, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94030 | 431, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94031 | 431, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94032 | 431, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94033 | 431, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94034 | 431, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94035 | 0, // psub1_then_psub |
| 94036 | 431, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94037 | 431, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94038 | 431, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94039 | 0, // x8sub_7_then_sub_32 |
| 94040 | 0, // x8sub_7_then_sub_32_hi |
| 94041 | 0, // x8sub_6_then_sub_32 |
| 94042 | 0, // x8sub_6_then_sub_32_hi |
| 94043 | 0, // x8sub_5_then_sub_32 |
| 94044 | 0, // x8sub_5_then_sub_32_hi |
| 94045 | 0, // x8sub_4_then_sub_32 |
| 94046 | 0, // x8sub_4_then_sub_32_hi |
| 94047 | 0, // x8sub_3_then_sub_32 |
| 94048 | 0, // x8sub_3_then_sub_32_hi |
| 94049 | 0, // x8sub_2_then_sub_32 |
| 94050 | 0, // x8sub_2_then_sub_32_hi |
| 94051 | 0, // x8sub_1_then_sub_32 |
| 94052 | 0, // x8sub_1_then_sub_32_hi |
| 94053 | 0, // subo64_then_sub_32 |
| 94054 | 0, // subo64_then_sub_32_hi |
| 94055 | 431, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94056 | 431, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94057 | 431, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94058 | 0, // dsub0_dsub1 |
| 94059 | 0, // dsub0_dsub1_dsub2 |
| 94060 | 431, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94061 | 431, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94062 | 431, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94063 | 431, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94064 | 431, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94065 | 431, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94066 | 0, // qsub0_qsub1 |
| 94067 | 0, // qsub0_qsub1_qsub2 |
| 94068 | 431, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94069 | 431, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94070 | 431, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94071 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94072 | 0, // x8sub_0_x8sub_1 |
| 94073 | 0, // x8sub_2_x8sub_3 |
| 94074 | 0, // x8sub_4_x8sub_5 |
| 94075 | 0, // x8sub_6_x8sub_7 |
| 94076 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94077 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94078 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94079 | 0, // sub_32_subo64_then_sub_32 |
| 94080 | 431, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94081 | 431, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94082 | 431, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94083 | 431, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94084 | 431, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94085 | 431, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94086 | 431, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94087 | 431, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 94088 | 0, // zsub0_zsub2 |
| 94089 | 0, // zsub1_zsub3 |
| 94090 | }, |
| 94091 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94092 | 432, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94093 | 432, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94094 | 432, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94095 | 0, // dsub0 |
| 94096 | 432, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94097 | 432, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94098 | 432, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94099 | 432, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94100 | 432, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94101 | 432, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94102 | 0, // psub |
| 94103 | 0, // psub0 |
| 94104 | 0, // psub1 |
| 94105 | 0, // qsub0 |
| 94106 | 432, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94107 | 432, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94108 | 432, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94109 | 432, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94110 | 432, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94111 | 0, // sub_32 |
| 94112 | 0, // sub_32_hi |
| 94113 | 0, // sube32 |
| 94114 | 0, // sube64 |
| 94115 | 0, // subo32 |
| 94116 | 0, // subo64 |
| 94117 | 0, // x8sub_0 |
| 94118 | 0, // x8sub_1 |
| 94119 | 0, // x8sub_2 |
| 94120 | 0, // x8sub_3 |
| 94121 | 0, // x8sub_4 |
| 94122 | 0, // x8sub_5 |
| 94123 | 0, // x8sub_6 |
| 94124 | 0, // x8sub_7 |
| 94125 | 0, // zasubb |
| 94126 | 0, // zasubd0 |
| 94127 | 0, // zasubd1 |
| 94128 | 0, // zasubh0 |
| 94129 | 0, // zasubh1 |
| 94130 | 0, // zasubq0 |
| 94131 | 0, // zasubq1 |
| 94132 | 0, // zasubs0 |
| 94133 | 0, // zasubs1 |
| 94134 | 432, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94135 | 432, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94136 | 432, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94137 | 432, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94138 | 432, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94139 | 432, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94140 | 0, // zasubd1_then_zasubq0 |
| 94141 | 0, // zasubd1_then_zasubq1 |
| 94142 | 0, // zasubs1_then_zasubd0 |
| 94143 | 0, // zasubs1_then_zasubd1 |
| 94144 | 0, // zasubs1_then_zasubq0 |
| 94145 | 0, // zasubs1_then_zasubq1 |
| 94146 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94147 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94148 | 0, // zasubh1_then_zasubd0 |
| 94149 | 0, // zasubh1_then_zasubd1 |
| 94150 | 0, // zasubh1_then_zasubq0 |
| 94151 | 0, // zasubh1_then_zasubq1 |
| 94152 | 0, // zasubh1_then_zasubs0 |
| 94153 | 0, // zasubh1_then_zasubs1 |
| 94154 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94155 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94156 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94157 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94158 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94159 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94160 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94161 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94162 | 432, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94163 | 432, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94164 | 432, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94165 | 432, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94166 | 432, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94167 | 432, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94168 | 432, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94169 | 432, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94170 | 432, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94171 | 432, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94172 | 432, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94173 | 432, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94174 | 432, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94175 | 432, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94176 | 432, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94177 | 432, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94178 | 432, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94179 | 432, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94180 | 0, // psub1_then_psub |
| 94181 | 432, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94182 | 432, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94183 | 432, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94184 | 0, // x8sub_7_then_sub_32 |
| 94185 | 0, // x8sub_7_then_sub_32_hi |
| 94186 | 0, // x8sub_6_then_sub_32 |
| 94187 | 0, // x8sub_6_then_sub_32_hi |
| 94188 | 0, // x8sub_5_then_sub_32 |
| 94189 | 0, // x8sub_5_then_sub_32_hi |
| 94190 | 0, // x8sub_4_then_sub_32 |
| 94191 | 0, // x8sub_4_then_sub_32_hi |
| 94192 | 0, // x8sub_3_then_sub_32 |
| 94193 | 0, // x8sub_3_then_sub_32_hi |
| 94194 | 0, // x8sub_2_then_sub_32 |
| 94195 | 0, // x8sub_2_then_sub_32_hi |
| 94196 | 0, // x8sub_1_then_sub_32 |
| 94197 | 0, // x8sub_1_then_sub_32_hi |
| 94198 | 0, // subo64_then_sub_32 |
| 94199 | 0, // subo64_then_sub_32_hi |
| 94200 | 432, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94201 | 432, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94202 | 432, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94203 | 0, // dsub0_dsub1 |
| 94204 | 0, // dsub0_dsub1_dsub2 |
| 94205 | 432, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94206 | 432, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94207 | 432, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94208 | 432, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94209 | 432, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94210 | 432, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94211 | 0, // qsub0_qsub1 |
| 94212 | 0, // qsub0_qsub1_qsub2 |
| 94213 | 432, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94214 | 432, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94215 | 432, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94216 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94217 | 0, // x8sub_0_x8sub_1 |
| 94218 | 0, // x8sub_2_x8sub_3 |
| 94219 | 0, // x8sub_4_x8sub_5 |
| 94220 | 0, // x8sub_6_x8sub_7 |
| 94221 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94222 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94223 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94224 | 0, // sub_32_subo64_then_sub_32 |
| 94225 | 432, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94226 | 432, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94227 | 432, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94228 | 432, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94229 | 432, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94230 | 432, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94231 | 432, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94232 | 432, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 94233 | 0, // zsub0_zsub2 |
| 94234 | 0, // zsub1_zsub3 |
| 94235 | }, |
| 94236 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94237 | 433, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94238 | 433, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94239 | 433, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94240 | 0, // dsub0 |
| 94241 | 433, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94242 | 433, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94243 | 433, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94244 | 433, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94245 | 433, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94246 | 433, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94247 | 0, // psub |
| 94248 | 0, // psub0 |
| 94249 | 0, // psub1 |
| 94250 | 0, // qsub0 |
| 94251 | 433, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94252 | 433, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94253 | 433, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94254 | 433, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94255 | 433, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94256 | 0, // sub_32 |
| 94257 | 0, // sub_32_hi |
| 94258 | 0, // sube32 |
| 94259 | 0, // sube64 |
| 94260 | 0, // subo32 |
| 94261 | 0, // subo64 |
| 94262 | 0, // x8sub_0 |
| 94263 | 0, // x8sub_1 |
| 94264 | 0, // x8sub_2 |
| 94265 | 0, // x8sub_3 |
| 94266 | 0, // x8sub_4 |
| 94267 | 0, // x8sub_5 |
| 94268 | 0, // x8sub_6 |
| 94269 | 0, // x8sub_7 |
| 94270 | 0, // zasubb |
| 94271 | 0, // zasubd0 |
| 94272 | 0, // zasubd1 |
| 94273 | 0, // zasubh0 |
| 94274 | 0, // zasubh1 |
| 94275 | 0, // zasubq0 |
| 94276 | 0, // zasubq1 |
| 94277 | 0, // zasubs0 |
| 94278 | 0, // zasubs1 |
| 94279 | 433, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94280 | 433, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94281 | 433, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94282 | 433, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94283 | 433, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94284 | 433, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94285 | 0, // zasubd1_then_zasubq0 |
| 94286 | 0, // zasubd1_then_zasubq1 |
| 94287 | 0, // zasubs1_then_zasubd0 |
| 94288 | 0, // zasubs1_then_zasubd1 |
| 94289 | 0, // zasubs1_then_zasubq0 |
| 94290 | 0, // zasubs1_then_zasubq1 |
| 94291 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94292 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94293 | 0, // zasubh1_then_zasubd0 |
| 94294 | 0, // zasubh1_then_zasubd1 |
| 94295 | 0, // zasubh1_then_zasubq0 |
| 94296 | 0, // zasubh1_then_zasubq1 |
| 94297 | 0, // zasubh1_then_zasubs0 |
| 94298 | 0, // zasubh1_then_zasubs1 |
| 94299 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94300 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94301 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94302 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94303 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94304 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94305 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94306 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94307 | 433, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94308 | 433, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94309 | 433, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94310 | 433, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94311 | 433, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94312 | 433, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94313 | 433, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94314 | 433, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94315 | 433, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94316 | 433, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94317 | 433, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94318 | 433, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94319 | 433, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94320 | 433, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94321 | 433, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94322 | 433, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94323 | 433, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94324 | 433, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94325 | 0, // psub1_then_psub |
| 94326 | 433, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94327 | 433, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94328 | 433, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94329 | 0, // x8sub_7_then_sub_32 |
| 94330 | 0, // x8sub_7_then_sub_32_hi |
| 94331 | 0, // x8sub_6_then_sub_32 |
| 94332 | 0, // x8sub_6_then_sub_32_hi |
| 94333 | 0, // x8sub_5_then_sub_32 |
| 94334 | 0, // x8sub_5_then_sub_32_hi |
| 94335 | 0, // x8sub_4_then_sub_32 |
| 94336 | 0, // x8sub_4_then_sub_32_hi |
| 94337 | 0, // x8sub_3_then_sub_32 |
| 94338 | 0, // x8sub_3_then_sub_32_hi |
| 94339 | 0, // x8sub_2_then_sub_32 |
| 94340 | 0, // x8sub_2_then_sub_32_hi |
| 94341 | 0, // x8sub_1_then_sub_32 |
| 94342 | 0, // x8sub_1_then_sub_32_hi |
| 94343 | 0, // subo64_then_sub_32 |
| 94344 | 0, // subo64_then_sub_32_hi |
| 94345 | 433, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94346 | 433, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94347 | 433, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94348 | 0, // dsub0_dsub1 |
| 94349 | 0, // dsub0_dsub1_dsub2 |
| 94350 | 433, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94351 | 433, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94352 | 433, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94353 | 433, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94354 | 433, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94355 | 433, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94356 | 0, // qsub0_qsub1 |
| 94357 | 0, // qsub0_qsub1_qsub2 |
| 94358 | 433, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94359 | 433, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94360 | 433, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94361 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94362 | 0, // x8sub_0_x8sub_1 |
| 94363 | 0, // x8sub_2_x8sub_3 |
| 94364 | 0, // x8sub_4_x8sub_5 |
| 94365 | 0, // x8sub_6_x8sub_7 |
| 94366 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94367 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94368 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94369 | 0, // sub_32_subo64_then_sub_32 |
| 94370 | 433, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94371 | 433, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94372 | 433, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94373 | 433, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94374 | 433, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94375 | 433, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94376 | 433, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94377 | 433, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 94378 | 0, // zsub0_zsub2 |
| 94379 | 0, // zsub1_zsub3 |
| 94380 | }, |
| 94381 | { // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94382 | 434, // bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94383 | 434, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94384 | 434, // dsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94385 | 0, // dsub0 |
| 94386 | 434, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94387 | 434, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94388 | 434, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94389 | 434, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94390 | 434, // hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94391 | 434, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94392 | 0, // psub |
| 94393 | 0, // psub0 |
| 94394 | 0, // psub1 |
| 94395 | 0, // qsub0 |
| 94396 | 434, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94397 | 434, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94398 | 434, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94399 | 434, // ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94400 | 434, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94401 | 0, // sub_32 |
| 94402 | 0, // sub_32_hi |
| 94403 | 0, // sube32 |
| 94404 | 0, // sube64 |
| 94405 | 0, // subo32 |
| 94406 | 0, // subo64 |
| 94407 | 0, // x8sub_0 |
| 94408 | 0, // x8sub_1 |
| 94409 | 0, // x8sub_2 |
| 94410 | 0, // x8sub_3 |
| 94411 | 0, // x8sub_4 |
| 94412 | 0, // x8sub_5 |
| 94413 | 0, // x8sub_6 |
| 94414 | 0, // x8sub_7 |
| 94415 | 0, // zasubb |
| 94416 | 0, // zasubd0 |
| 94417 | 0, // zasubd1 |
| 94418 | 0, // zasubh0 |
| 94419 | 0, // zasubh1 |
| 94420 | 0, // zasubq0 |
| 94421 | 0, // zasubq1 |
| 94422 | 0, // zasubs0 |
| 94423 | 0, // zasubs1 |
| 94424 | 434, // zsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94425 | 434, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94426 | 434, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94427 | 434, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94428 | 434, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94429 | 434, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94430 | 0, // zasubd1_then_zasubq0 |
| 94431 | 0, // zasubd1_then_zasubq1 |
| 94432 | 0, // zasubs1_then_zasubd0 |
| 94433 | 0, // zasubs1_then_zasubd1 |
| 94434 | 0, // zasubs1_then_zasubq0 |
| 94435 | 0, // zasubs1_then_zasubq1 |
| 94436 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94437 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94438 | 0, // zasubh1_then_zasubd0 |
| 94439 | 0, // zasubh1_then_zasubd1 |
| 94440 | 0, // zasubh1_then_zasubq0 |
| 94441 | 0, // zasubh1_then_zasubq1 |
| 94442 | 0, // zasubh1_then_zasubs0 |
| 94443 | 0, // zasubh1_then_zasubs1 |
| 94444 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94445 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94446 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94447 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94448 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94449 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94450 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94451 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94452 | 434, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94453 | 434, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94454 | 434, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94455 | 434, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94456 | 434, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94457 | 434, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94458 | 434, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94459 | 434, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94460 | 434, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94461 | 434, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94462 | 434, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94463 | 434, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94464 | 434, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94465 | 434, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94466 | 434, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94467 | 434, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94468 | 434, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94469 | 434, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94470 | 0, // psub1_then_psub |
| 94471 | 434, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94472 | 434, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94473 | 434, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94474 | 0, // x8sub_7_then_sub_32 |
| 94475 | 0, // x8sub_7_then_sub_32_hi |
| 94476 | 0, // x8sub_6_then_sub_32 |
| 94477 | 0, // x8sub_6_then_sub_32_hi |
| 94478 | 0, // x8sub_5_then_sub_32 |
| 94479 | 0, // x8sub_5_then_sub_32_hi |
| 94480 | 0, // x8sub_4_then_sub_32 |
| 94481 | 0, // x8sub_4_then_sub_32_hi |
| 94482 | 0, // x8sub_3_then_sub_32 |
| 94483 | 0, // x8sub_3_then_sub_32_hi |
| 94484 | 0, // x8sub_2_then_sub_32 |
| 94485 | 0, // x8sub_2_then_sub_32_hi |
| 94486 | 0, // x8sub_1_then_sub_32 |
| 94487 | 0, // x8sub_1_then_sub_32_hi |
| 94488 | 0, // subo64_then_sub_32 |
| 94489 | 0, // subo64_then_sub_32_hi |
| 94490 | 434, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94491 | 434, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94492 | 434, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94493 | 0, // dsub0_dsub1 |
| 94494 | 0, // dsub0_dsub1_dsub2 |
| 94495 | 434, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94496 | 434, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94497 | 434, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94498 | 434, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94499 | 434, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94500 | 434, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94501 | 0, // qsub0_qsub1 |
| 94502 | 0, // qsub0_qsub1_qsub2 |
| 94503 | 434, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94504 | 434, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94505 | 434, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94506 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94507 | 0, // x8sub_0_x8sub_1 |
| 94508 | 0, // x8sub_2_x8sub_3 |
| 94509 | 0, // x8sub_4_x8sub_5 |
| 94510 | 0, // x8sub_6_x8sub_7 |
| 94511 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94512 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94513 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94514 | 0, // sub_32_subo64_then_sub_32 |
| 94515 | 434, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94516 | 434, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94517 | 434, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94518 | 434, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94519 | 434, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94520 | 434, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94521 | 434, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94522 | 434, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 94523 | 0, // zsub0_zsub2 |
| 94524 | 0, // zsub1_zsub3 |
| 94525 | }, |
| 94526 | { // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94527 | 435, // bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94528 | 435, // bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94529 | 435, // dsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94530 | 0, // dsub0 |
| 94531 | 435, // dsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94532 | 435, // dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94533 | 435, // dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94534 | 435, // dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94535 | 435, // hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94536 | 435, // hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94537 | 0, // psub |
| 94538 | 0, // psub0 |
| 94539 | 0, // psub1 |
| 94540 | 0, // qsub0 |
| 94541 | 435, // qsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94542 | 435, // qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94543 | 435, // qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94544 | 435, // ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94545 | 435, // ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94546 | 0, // sub_32 |
| 94547 | 0, // sub_32_hi |
| 94548 | 0, // sube32 |
| 94549 | 0, // sube64 |
| 94550 | 0, // subo32 |
| 94551 | 0, // subo64 |
| 94552 | 0, // x8sub_0 |
| 94553 | 0, // x8sub_1 |
| 94554 | 0, // x8sub_2 |
| 94555 | 0, // x8sub_3 |
| 94556 | 0, // x8sub_4 |
| 94557 | 0, // x8sub_5 |
| 94558 | 0, // x8sub_6 |
| 94559 | 0, // x8sub_7 |
| 94560 | 0, // zasubb |
| 94561 | 0, // zasubd0 |
| 94562 | 0, // zasubd1 |
| 94563 | 0, // zasubh0 |
| 94564 | 0, // zasubh1 |
| 94565 | 0, // zasubq0 |
| 94566 | 0, // zasubq1 |
| 94567 | 0, // zasubs0 |
| 94568 | 0, // zasubs1 |
| 94569 | 435, // zsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94570 | 435, // zsub0 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94571 | 435, // zsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94572 | 435, // zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94573 | 435, // zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94574 | 435, // zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94575 | 0, // zasubd1_then_zasubq0 |
| 94576 | 0, // zasubd1_then_zasubq1 |
| 94577 | 0, // zasubs1_then_zasubd0 |
| 94578 | 0, // zasubs1_then_zasubd1 |
| 94579 | 0, // zasubs1_then_zasubq0 |
| 94580 | 0, // zasubs1_then_zasubq1 |
| 94581 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94582 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94583 | 0, // zasubh1_then_zasubd0 |
| 94584 | 0, // zasubh1_then_zasubd1 |
| 94585 | 0, // zasubh1_then_zasubq0 |
| 94586 | 0, // zasubh1_then_zasubq1 |
| 94587 | 0, // zasubh1_then_zasubs0 |
| 94588 | 0, // zasubh1_then_zasubs1 |
| 94589 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94590 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94591 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94592 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94593 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94594 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94595 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94596 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94597 | 435, // dsub1_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94598 | 435, // dsub1_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94599 | 435, // dsub1_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94600 | 435, // dsub1_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94601 | 435, // dsub1_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94602 | 435, // dsub1_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94603 | 435, // dsub3_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94604 | 435, // dsub3_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94605 | 435, // dsub3_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94606 | 435, // dsub3_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94607 | 435, // dsub3_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94608 | 435, // dsub3_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94609 | 435, // dsub2_then_bsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94610 | 435, // dsub2_then_bsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94611 | 435, // dsub2_then_hsub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94612 | 435, // dsub2_then_hsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94613 | 435, // dsub2_then_ssub -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94614 | 435, // dsub2_then_ssub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94615 | 0, // psub1_then_psub |
| 94616 | 435, // qsub1_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94617 | 435, // qsub3_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94618 | 435, // qsub2_then_dsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94619 | 0, // x8sub_7_then_sub_32 |
| 94620 | 0, // x8sub_7_then_sub_32_hi |
| 94621 | 0, // x8sub_6_then_sub_32 |
| 94622 | 0, // x8sub_6_then_sub_32_hi |
| 94623 | 0, // x8sub_5_then_sub_32 |
| 94624 | 0, // x8sub_5_then_sub_32_hi |
| 94625 | 0, // x8sub_4_then_sub_32 |
| 94626 | 0, // x8sub_4_then_sub_32_hi |
| 94627 | 0, // x8sub_3_then_sub_32 |
| 94628 | 0, // x8sub_3_then_sub_32_hi |
| 94629 | 0, // x8sub_2_then_sub_32 |
| 94630 | 0, // x8sub_2_then_sub_32_hi |
| 94631 | 0, // x8sub_1_then_sub_32 |
| 94632 | 0, // x8sub_1_then_sub_32_hi |
| 94633 | 0, // subo64_then_sub_32 |
| 94634 | 0, // subo64_then_sub_32_hi |
| 94635 | 435, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94636 | 435, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94637 | 435, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94638 | 0, // dsub0_dsub1 |
| 94639 | 0, // dsub0_dsub1_dsub2 |
| 94640 | 435, // dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94641 | 435, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94642 | 435, // dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94643 | 435, // dsub_dsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94644 | 435, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94645 | 435, // dsub_dsub1_dsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94646 | 0, // qsub0_qsub1 |
| 94647 | 0, // qsub0_qsub1_qsub2 |
| 94648 | 435, // qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94649 | 435, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94650 | 435, // qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94651 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94652 | 0, // x8sub_0_x8sub_1 |
| 94653 | 0, // x8sub_2_x8sub_3 |
| 94654 | 0, // x8sub_4_x8sub_5 |
| 94655 | 0, // x8sub_6_x8sub_7 |
| 94656 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94657 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94658 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94659 | 0, // sub_32_subo64_then_sub_32 |
| 94660 | 435, // zsub_qsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94661 | 435, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94662 | 435, // zsub_qsub1_qsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94663 | 435, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94664 | 435, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94665 | 435, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94666 | 435, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94667 | 435, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 94668 | 0, // zsub0_zsub2 |
| 94669 | 0, // zsub1_zsub3 |
| 94670 | }, |
| 94671 | { // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94672 | 436, // bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94673 | 436, // bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94674 | 436, // dsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94675 | 0, // dsub0 |
| 94676 | 436, // dsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94677 | 436, // dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94678 | 436, // dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94679 | 436, // dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94680 | 436, // hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94681 | 436, // hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94682 | 0, // psub |
| 94683 | 0, // psub0 |
| 94684 | 0, // psub1 |
| 94685 | 0, // qsub0 |
| 94686 | 436, // qsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94687 | 436, // qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94688 | 436, // qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94689 | 436, // ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94690 | 436, // ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94691 | 0, // sub_32 |
| 94692 | 0, // sub_32_hi |
| 94693 | 0, // sube32 |
| 94694 | 0, // sube64 |
| 94695 | 0, // subo32 |
| 94696 | 0, // subo64 |
| 94697 | 0, // x8sub_0 |
| 94698 | 0, // x8sub_1 |
| 94699 | 0, // x8sub_2 |
| 94700 | 0, // x8sub_3 |
| 94701 | 0, // x8sub_4 |
| 94702 | 0, // x8sub_5 |
| 94703 | 0, // x8sub_6 |
| 94704 | 0, // x8sub_7 |
| 94705 | 0, // zasubb |
| 94706 | 0, // zasubd0 |
| 94707 | 0, // zasubd1 |
| 94708 | 0, // zasubh0 |
| 94709 | 0, // zasubh1 |
| 94710 | 0, // zasubq0 |
| 94711 | 0, // zasubq1 |
| 94712 | 0, // zasubs0 |
| 94713 | 0, // zasubs1 |
| 94714 | 436, // zsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94715 | 436, // zsub0 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94716 | 436, // zsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94717 | 436, // zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94718 | 436, // zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94719 | 436, // zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94720 | 0, // zasubd1_then_zasubq0 |
| 94721 | 0, // zasubd1_then_zasubq1 |
| 94722 | 0, // zasubs1_then_zasubd0 |
| 94723 | 0, // zasubs1_then_zasubd1 |
| 94724 | 0, // zasubs1_then_zasubq0 |
| 94725 | 0, // zasubs1_then_zasubq1 |
| 94726 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94727 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94728 | 0, // zasubh1_then_zasubd0 |
| 94729 | 0, // zasubh1_then_zasubd1 |
| 94730 | 0, // zasubh1_then_zasubq0 |
| 94731 | 0, // zasubh1_then_zasubq1 |
| 94732 | 0, // zasubh1_then_zasubs0 |
| 94733 | 0, // zasubh1_then_zasubs1 |
| 94734 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94735 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94736 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94737 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94738 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94739 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94740 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94741 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94742 | 436, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94743 | 436, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94744 | 436, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94745 | 436, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94746 | 436, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94747 | 436, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94748 | 436, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94749 | 436, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94750 | 436, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94751 | 436, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94752 | 436, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94753 | 436, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94754 | 436, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94755 | 436, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94756 | 436, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94757 | 436, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94758 | 436, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94759 | 436, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94760 | 0, // psub1_then_psub |
| 94761 | 436, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94762 | 436, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94763 | 436, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94764 | 0, // x8sub_7_then_sub_32 |
| 94765 | 0, // x8sub_7_then_sub_32_hi |
| 94766 | 0, // x8sub_6_then_sub_32 |
| 94767 | 0, // x8sub_6_then_sub_32_hi |
| 94768 | 0, // x8sub_5_then_sub_32 |
| 94769 | 0, // x8sub_5_then_sub_32_hi |
| 94770 | 0, // x8sub_4_then_sub_32 |
| 94771 | 0, // x8sub_4_then_sub_32_hi |
| 94772 | 0, // x8sub_3_then_sub_32 |
| 94773 | 0, // x8sub_3_then_sub_32_hi |
| 94774 | 0, // x8sub_2_then_sub_32 |
| 94775 | 0, // x8sub_2_then_sub_32_hi |
| 94776 | 0, // x8sub_1_then_sub_32 |
| 94777 | 0, // x8sub_1_then_sub_32_hi |
| 94778 | 0, // subo64_then_sub_32 |
| 94779 | 0, // subo64_then_sub_32_hi |
| 94780 | 436, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94781 | 436, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94782 | 436, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94783 | 0, // dsub0_dsub1 |
| 94784 | 0, // dsub0_dsub1_dsub2 |
| 94785 | 436, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94786 | 436, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94787 | 436, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94788 | 436, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94789 | 436, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94790 | 436, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94791 | 0, // qsub0_qsub1 |
| 94792 | 0, // qsub0_qsub1_qsub2 |
| 94793 | 436, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94794 | 436, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94795 | 436, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94796 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94797 | 0, // x8sub_0_x8sub_1 |
| 94798 | 0, // x8sub_2_x8sub_3 |
| 94799 | 0, // x8sub_4_x8sub_5 |
| 94800 | 0, // x8sub_6_x8sub_7 |
| 94801 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94802 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94803 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94804 | 0, // sub_32_subo64_then_sub_32 |
| 94805 | 436, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94806 | 436, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94807 | 436, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94808 | 436, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94809 | 436, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94810 | 436, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94811 | 436, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94812 | 436, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 94813 | 0, // zsub0_zsub2 |
| 94814 | 0, // zsub1_zsub3 |
| 94815 | }, |
| 94816 | { // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94817 | 437, // bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94818 | 437, // bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94819 | 437, // dsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94820 | 0, // dsub0 |
| 94821 | 437, // dsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94822 | 437, // dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94823 | 437, // dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94824 | 437, // dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94825 | 437, // hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94826 | 437, // hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94827 | 0, // psub |
| 94828 | 0, // psub0 |
| 94829 | 0, // psub1 |
| 94830 | 0, // qsub0 |
| 94831 | 437, // qsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94832 | 437, // qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94833 | 437, // qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94834 | 437, // ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94835 | 437, // ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94836 | 0, // sub_32 |
| 94837 | 0, // sub_32_hi |
| 94838 | 0, // sube32 |
| 94839 | 0, // sube64 |
| 94840 | 0, // subo32 |
| 94841 | 0, // subo64 |
| 94842 | 0, // x8sub_0 |
| 94843 | 0, // x8sub_1 |
| 94844 | 0, // x8sub_2 |
| 94845 | 0, // x8sub_3 |
| 94846 | 0, // x8sub_4 |
| 94847 | 0, // x8sub_5 |
| 94848 | 0, // x8sub_6 |
| 94849 | 0, // x8sub_7 |
| 94850 | 0, // zasubb |
| 94851 | 0, // zasubd0 |
| 94852 | 0, // zasubd1 |
| 94853 | 0, // zasubh0 |
| 94854 | 0, // zasubh1 |
| 94855 | 0, // zasubq0 |
| 94856 | 0, // zasubq1 |
| 94857 | 0, // zasubs0 |
| 94858 | 0, // zasubs1 |
| 94859 | 437, // zsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94860 | 437, // zsub0 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94861 | 437, // zsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94862 | 437, // zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94863 | 437, // zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94864 | 437, // zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94865 | 0, // zasubd1_then_zasubq0 |
| 94866 | 0, // zasubd1_then_zasubq1 |
| 94867 | 0, // zasubs1_then_zasubd0 |
| 94868 | 0, // zasubs1_then_zasubd1 |
| 94869 | 0, // zasubs1_then_zasubq0 |
| 94870 | 0, // zasubs1_then_zasubq1 |
| 94871 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 94872 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 94873 | 0, // zasubh1_then_zasubd0 |
| 94874 | 0, // zasubh1_then_zasubd1 |
| 94875 | 0, // zasubh1_then_zasubq0 |
| 94876 | 0, // zasubh1_then_zasubq1 |
| 94877 | 0, // zasubh1_then_zasubs0 |
| 94878 | 0, // zasubh1_then_zasubs1 |
| 94879 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 94880 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 94881 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 94882 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 94883 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 94884 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 94885 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 94886 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 94887 | 437, // dsub1_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94888 | 437, // dsub1_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94889 | 437, // dsub1_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94890 | 437, // dsub1_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94891 | 437, // dsub1_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94892 | 437, // dsub1_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94893 | 437, // dsub3_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94894 | 437, // dsub3_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94895 | 437, // dsub3_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94896 | 437, // dsub3_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94897 | 437, // dsub3_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94898 | 437, // dsub3_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94899 | 437, // dsub2_then_bsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94900 | 437, // dsub2_then_bsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94901 | 437, // dsub2_then_hsub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94902 | 437, // dsub2_then_hsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94903 | 437, // dsub2_then_ssub -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94904 | 437, // dsub2_then_ssub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94905 | 0, // psub1_then_psub |
| 94906 | 437, // qsub1_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94907 | 437, // qsub3_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94908 | 437, // qsub2_then_dsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94909 | 0, // x8sub_7_then_sub_32 |
| 94910 | 0, // x8sub_7_then_sub_32_hi |
| 94911 | 0, // x8sub_6_then_sub_32 |
| 94912 | 0, // x8sub_6_then_sub_32_hi |
| 94913 | 0, // x8sub_5_then_sub_32 |
| 94914 | 0, // x8sub_5_then_sub_32_hi |
| 94915 | 0, // x8sub_4_then_sub_32 |
| 94916 | 0, // x8sub_4_then_sub_32_hi |
| 94917 | 0, // x8sub_3_then_sub_32 |
| 94918 | 0, // x8sub_3_then_sub_32_hi |
| 94919 | 0, // x8sub_2_then_sub_32 |
| 94920 | 0, // x8sub_2_then_sub_32_hi |
| 94921 | 0, // x8sub_1_then_sub_32 |
| 94922 | 0, // x8sub_1_then_sub_32_hi |
| 94923 | 0, // subo64_then_sub_32 |
| 94924 | 0, // subo64_then_sub_32_hi |
| 94925 | 437, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94926 | 437, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94927 | 437, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94928 | 0, // dsub0_dsub1 |
| 94929 | 0, // dsub0_dsub1_dsub2 |
| 94930 | 437, // dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94931 | 437, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94932 | 437, // dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94933 | 437, // dsub_dsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94934 | 437, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94935 | 437, // dsub_dsub1_dsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94936 | 0, // qsub0_qsub1 |
| 94937 | 0, // qsub0_qsub1_qsub2 |
| 94938 | 437, // qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94939 | 437, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94940 | 437, // qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94941 | 0, // sub_32_x8sub_1_then_sub_32 |
| 94942 | 0, // x8sub_0_x8sub_1 |
| 94943 | 0, // x8sub_2_x8sub_3 |
| 94944 | 0, // x8sub_4_x8sub_5 |
| 94945 | 0, // x8sub_6_x8sub_7 |
| 94946 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 94947 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 94948 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 94949 | 0, // sub_32_subo64_then_sub_32 |
| 94950 | 437, // zsub_qsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94951 | 437, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94952 | 437, // zsub_qsub1_qsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94953 | 437, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94954 | 437, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94955 | 437, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94956 | 437, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94957 | 437, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 94958 | 0, // zsub0_zsub2 |
| 94959 | 0, // zsub1_zsub3 |
| 94960 | }, |
| 94961 | { // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94962 | 438, // bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94963 | 438, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94964 | 438, // dsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94965 | 0, // dsub0 |
| 94966 | 438, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94967 | 438, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94968 | 438, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94969 | 438, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94970 | 438, // hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94971 | 438, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94972 | 0, // psub |
| 94973 | 0, // psub0 |
| 94974 | 0, // psub1 |
| 94975 | 0, // qsub0 |
| 94976 | 438, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94977 | 438, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94978 | 438, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94979 | 438, // ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94980 | 438, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 94981 | 0, // sub_32 |
| 94982 | 0, // sub_32_hi |
| 94983 | 0, // sube32 |
| 94984 | 0, // sube64 |
| 94985 | 0, // subo32 |
| 94986 | 0, // subo64 |
| 94987 | 0, // x8sub_0 |
| 94988 | 0, // x8sub_1 |
| 94989 | 0, // x8sub_2 |
| 94990 | 0, // x8sub_3 |
| 94991 | 0, // x8sub_4 |
| 94992 | 0, // x8sub_5 |
| 94993 | 0, // x8sub_6 |
| 94994 | 0, // x8sub_7 |
| 94995 | 0, // zasubb |
| 94996 | 0, // zasubd0 |
| 94997 | 0, // zasubd1 |
| 94998 | 0, // zasubh0 |
| 94999 | 0, // zasubh1 |
| 95000 | 0, // zasubq0 |
| 95001 | 0, // zasubq1 |
| 95002 | 0, // zasubs0 |
| 95003 | 0, // zasubs1 |
| 95004 | 438, // zsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95005 | 438, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95006 | 438, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95007 | 438, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95008 | 438, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95009 | 438, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95010 | 0, // zasubd1_then_zasubq0 |
| 95011 | 0, // zasubd1_then_zasubq1 |
| 95012 | 0, // zasubs1_then_zasubd0 |
| 95013 | 0, // zasubs1_then_zasubd1 |
| 95014 | 0, // zasubs1_then_zasubq0 |
| 95015 | 0, // zasubs1_then_zasubq1 |
| 95016 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95017 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95018 | 0, // zasubh1_then_zasubd0 |
| 95019 | 0, // zasubh1_then_zasubd1 |
| 95020 | 0, // zasubh1_then_zasubq0 |
| 95021 | 0, // zasubh1_then_zasubq1 |
| 95022 | 0, // zasubh1_then_zasubs0 |
| 95023 | 0, // zasubh1_then_zasubs1 |
| 95024 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95025 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95026 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95027 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95028 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95029 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95030 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95031 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95032 | 438, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95033 | 438, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95034 | 438, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95035 | 438, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95036 | 438, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95037 | 438, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95038 | 438, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95039 | 438, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95040 | 438, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95041 | 438, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95042 | 438, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95043 | 438, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95044 | 438, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95045 | 438, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95046 | 438, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95047 | 438, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95048 | 438, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95049 | 438, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95050 | 0, // psub1_then_psub |
| 95051 | 438, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95052 | 438, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95053 | 438, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95054 | 0, // x8sub_7_then_sub_32 |
| 95055 | 0, // x8sub_7_then_sub_32_hi |
| 95056 | 0, // x8sub_6_then_sub_32 |
| 95057 | 0, // x8sub_6_then_sub_32_hi |
| 95058 | 0, // x8sub_5_then_sub_32 |
| 95059 | 0, // x8sub_5_then_sub_32_hi |
| 95060 | 0, // x8sub_4_then_sub_32 |
| 95061 | 0, // x8sub_4_then_sub_32_hi |
| 95062 | 0, // x8sub_3_then_sub_32 |
| 95063 | 0, // x8sub_3_then_sub_32_hi |
| 95064 | 0, // x8sub_2_then_sub_32 |
| 95065 | 0, // x8sub_2_then_sub_32_hi |
| 95066 | 0, // x8sub_1_then_sub_32 |
| 95067 | 0, // x8sub_1_then_sub_32_hi |
| 95068 | 0, // subo64_then_sub_32 |
| 95069 | 0, // subo64_then_sub_32_hi |
| 95070 | 438, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95071 | 438, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95072 | 438, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95073 | 0, // dsub0_dsub1 |
| 95074 | 0, // dsub0_dsub1_dsub2 |
| 95075 | 438, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95076 | 438, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95077 | 438, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95078 | 438, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95079 | 438, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95080 | 438, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95081 | 0, // qsub0_qsub1 |
| 95082 | 0, // qsub0_qsub1_qsub2 |
| 95083 | 438, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95084 | 438, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95085 | 438, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95086 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95087 | 0, // x8sub_0_x8sub_1 |
| 95088 | 0, // x8sub_2_x8sub_3 |
| 95089 | 0, // x8sub_4_x8sub_5 |
| 95090 | 0, // x8sub_6_x8sub_7 |
| 95091 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95092 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95093 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95094 | 0, // sub_32_subo64_then_sub_32 |
| 95095 | 438, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95096 | 438, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95097 | 438, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95098 | 438, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95099 | 438, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95100 | 438, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95101 | 438, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95102 | 438, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 95103 | 0, // zsub0_zsub2 |
| 95104 | 0, // zsub1_zsub3 |
| 95105 | }, |
| 95106 | { // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95107 | 439, // bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95108 | 439, // bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95109 | 439, // dsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95110 | 0, // dsub0 |
| 95111 | 439, // dsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95112 | 439, // dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95113 | 439, // dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95114 | 439, // dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95115 | 439, // hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95116 | 439, // hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95117 | 0, // psub |
| 95118 | 0, // psub0 |
| 95119 | 0, // psub1 |
| 95120 | 0, // qsub0 |
| 95121 | 439, // qsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95122 | 439, // qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95123 | 439, // qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95124 | 439, // ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95125 | 439, // ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95126 | 0, // sub_32 |
| 95127 | 0, // sub_32_hi |
| 95128 | 0, // sube32 |
| 95129 | 0, // sube64 |
| 95130 | 0, // subo32 |
| 95131 | 0, // subo64 |
| 95132 | 0, // x8sub_0 |
| 95133 | 0, // x8sub_1 |
| 95134 | 0, // x8sub_2 |
| 95135 | 0, // x8sub_3 |
| 95136 | 0, // x8sub_4 |
| 95137 | 0, // x8sub_5 |
| 95138 | 0, // x8sub_6 |
| 95139 | 0, // x8sub_7 |
| 95140 | 0, // zasubb |
| 95141 | 0, // zasubd0 |
| 95142 | 0, // zasubd1 |
| 95143 | 0, // zasubh0 |
| 95144 | 0, // zasubh1 |
| 95145 | 0, // zasubq0 |
| 95146 | 0, // zasubq1 |
| 95147 | 0, // zasubs0 |
| 95148 | 0, // zasubs1 |
| 95149 | 439, // zsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95150 | 439, // zsub0 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95151 | 439, // zsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95152 | 439, // zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95153 | 439, // zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95154 | 439, // zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95155 | 0, // zasubd1_then_zasubq0 |
| 95156 | 0, // zasubd1_then_zasubq1 |
| 95157 | 0, // zasubs1_then_zasubd0 |
| 95158 | 0, // zasubs1_then_zasubd1 |
| 95159 | 0, // zasubs1_then_zasubq0 |
| 95160 | 0, // zasubs1_then_zasubq1 |
| 95161 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95162 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95163 | 0, // zasubh1_then_zasubd0 |
| 95164 | 0, // zasubh1_then_zasubd1 |
| 95165 | 0, // zasubh1_then_zasubq0 |
| 95166 | 0, // zasubh1_then_zasubq1 |
| 95167 | 0, // zasubh1_then_zasubs0 |
| 95168 | 0, // zasubh1_then_zasubs1 |
| 95169 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95170 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95171 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95172 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95173 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95174 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95175 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95176 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95177 | 439, // dsub1_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95178 | 439, // dsub1_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95179 | 439, // dsub1_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95180 | 439, // dsub1_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95181 | 439, // dsub1_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95182 | 439, // dsub1_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95183 | 439, // dsub3_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95184 | 439, // dsub3_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95185 | 439, // dsub3_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95186 | 439, // dsub3_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95187 | 439, // dsub3_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95188 | 439, // dsub3_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95189 | 439, // dsub2_then_bsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95190 | 439, // dsub2_then_bsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95191 | 439, // dsub2_then_hsub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95192 | 439, // dsub2_then_hsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95193 | 439, // dsub2_then_ssub -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95194 | 439, // dsub2_then_ssub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95195 | 0, // psub1_then_psub |
| 95196 | 439, // qsub1_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95197 | 439, // qsub3_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95198 | 439, // qsub2_then_dsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95199 | 0, // x8sub_7_then_sub_32 |
| 95200 | 0, // x8sub_7_then_sub_32_hi |
| 95201 | 0, // x8sub_6_then_sub_32 |
| 95202 | 0, // x8sub_6_then_sub_32_hi |
| 95203 | 0, // x8sub_5_then_sub_32 |
| 95204 | 0, // x8sub_5_then_sub_32_hi |
| 95205 | 0, // x8sub_4_then_sub_32 |
| 95206 | 0, // x8sub_4_then_sub_32_hi |
| 95207 | 0, // x8sub_3_then_sub_32 |
| 95208 | 0, // x8sub_3_then_sub_32_hi |
| 95209 | 0, // x8sub_2_then_sub_32 |
| 95210 | 0, // x8sub_2_then_sub_32_hi |
| 95211 | 0, // x8sub_1_then_sub_32 |
| 95212 | 0, // x8sub_1_then_sub_32_hi |
| 95213 | 0, // subo64_then_sub_32 |
| 95214 | 0, // subo64_then_sub_32_hi |
| 95215 | 439, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95216 | 439, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95217 | 439, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95218 | 0, // dsub0_dsub1 |
| 95219 | 0, // dsub0_dsub1_dsub2 |
| 95220 | 439, // dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95221 | 439, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95222 | 439, // dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95223 | 439, // dsub_dsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95224 | 439, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95225 | 439, // dsub_dsub1_dsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95226 | 0, // qsub0_qsub1 |
| 95227 | 0, // qsub0_qsub1_qsub2 |
| 95228 | 439, // qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95229 | 439, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95230 | 439, // qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95231 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95232 | 0, // x8sub_0_x8sub_1 |
| 95233 | 0, // x8sub_2_x8sub_3 |
| 95234 | 0, // x8sub_4_x8sub_5 |
| 95235 | 0, // x8sub_6_x8sub_7 |
| 95236 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95237 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95238 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95239 | 0, // sub_32_subo64_then_sub_32 |
| 95240 | 439, // zsub_qsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95241 | 439, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95242 | 439, // zsub_qsub1_qsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95243 | 439, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95244 | 439, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95245 | 439, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95246 | 439, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95247 | 439, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 95248 | 0, // zsub0_zsub2 |
| 95249 | 0, // zsub1_zsub3 |
| 95250 | }, |
| 95251 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95252 | 440, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95253 | 440, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95254 | 440, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95255 | 0, // dsub0 |
| 95256 | 440, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95257 | 440, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95258 | 440, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95259 | 440, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95260 | 440, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95261 | 440, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95262 | 0, // psub |
| 95263 | 0, // psub0 |
| 95264 | 0, // psub1 |
| 95265 | 0, // qsub0 |
| 95266 | 440, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95267 | 440, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95268 | 440, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95269 | 440, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95270 | 440, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95271 | 0, // sub_32 |
| 95272 | 0, // sub_32_hi |
| 95273 | 0, // sube32 |
| 95274 | 0, // sube64 |
| 95275 | 0, // subo32 |
| 95276 | 0, // subo64 |
| 95277 | 0, // x8sub_0 |
| 95278 | 0, // x8sub_1 |
| 95279 | 0, // x8sub_2 |
| 95280 | 0, // x8sub_3 |
| 95281 | 0, // x8sub_4 |
| 95282 | 0, // x8sub_5 |
| 95283 | 0, // x8sub_6 |
| 95284 | 0, // x8sub_7 |
| 95285 | 0, // zasubb |
| 95286 | 0, // zasubd0 |
| 95287 | 0, // zasubd1 |
| 95288 | 0, // zasubh0 |
| 95289 | 0, // zasubh1 |
| 95290 | 0, // zasubq0 |
| 95291 | 0, // zasubq1 |
| 95292 | 0, // zasubs0 |
| 95293 | 0, // zasubs1 |
| 95294 | 440, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95295 | 440, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95296 | 440, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95297 | 440, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95298 | 440, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95299 | 440, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95300 | 0, // zasubd1_then_zasubq0 |
| 95301 | 0, // zasubd1_then_zasubq1 |
| 95302 | 0, // zasubs1_then_zasubd0 |
| 95303 | 0, // zasubs1_then_zasubd1 |
| 95304 | 0, // zasubs1_then_zasubq0 |
| 95305 | 0, // zasubs1_then_zasubq1 |
| 95306 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95307 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95308 | 0, // zasubh1_then_zasubd0 |
| 95309 | 0, // zasubh1_then_zasubd1 |
| 95310 | 0, // zasubh1_then_zasubq0 |
| 95311 | 0, // zasubh1_then_zasubq1 |
| 95312 | 0, // zasubh1_then_zasubs0 |
| 95313 | 0, // zasubh1_then_zasubs1 |
| 95314 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95315 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95316 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95317 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95318 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95319 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95320 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95321 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95322 | 440, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95323 | 440, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95324 | 440, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95325 | 440, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95326 | 440, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95327 | 440, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95328 | 440, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95329 | 440, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95330 | 440, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95331 | 440, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95332 | 440, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95333 | 440, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95334 | 440, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95335 | 440, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95336 | 440, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95337 | 440, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95338 | 440, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95339 | 440, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95340 | 0, // psub1_then_psub |
| 95341 | 440, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95342 | 440, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95343 | 440, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95344 | 0, // x8sub_7_then_sub_32 |
| 95345 | 0, // x8sub_7_then_sub_32_hi |
| 95346 | 0, // x8sub_6_then_sub_32 |
| 95347 | 0, // x8sub_6_then_sub_32_hi |
| 95348 | 0, // x8sub_5_then_sub_32 |
| 95349 | 0, // x8sub_5_then_sub_32_hi |
| 95350 | 0, // x8sub_4_then_sub_32 |
| 95351 | 0, // x8sub_4_then_sub_32_hi |
| 95352 | 0, // x8sub_3_then_sub_32 |
| 95353 | 0, // x8sub_3_then_sub_32_hi |
| 95354 | 0, // x8sub_2_then_sub_32 |
| 95355 | 0, // x8sub_2_then_sub_32_hi |
| 95356 | 0, // x8sub_1_then_sub_32 |
| 95357 | 0, // x8sub_1_then_sub_32_hi |
| 95358 | 0, // subo64_then_sub_32 |
| 95359 | 0, // subo64_then_sub_32_hi |
| 95360 | 440, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95361 | 440, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95362 | 440, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95363 | 0, // dsub0_dsub1 |
| 95364 | 0, // dsub0_dsub1_dsub2 |
| 95365 | 440, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95366 | 440, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95367 | 440, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95368 | 440, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95369 | 440, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95370 | 440, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95371 | 0, // qsub0_qsub1 |
| 95372 | 0, // qsub0_qsub1_qsub2 |
| 95373 | 440, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95374 | 440, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95375 | 440, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95376 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95377 | 0, // x8sub_0_x8sub_1 |
| 95378 | 0, // x8sub_2_x8sub_3 |
| 95379 | 0, // x8sub_4_x8sub_5 |
| 95380 | 0, // x8sub_6_x8sub_7 |
| 95381 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95382 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95383 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95384 | 0, // sub_32_subo64_then_sub_32 |
| 95385 | 440, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95386 | 440, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95387 | 440, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95388 | 440, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95389 | 440, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95390 | 440, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95391 | 440, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95392 | 440, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 95393 | 0, // zsub0_zsub2 |
| 95394 | 0, // zsub1_zsub3 |
| 95395 | }, |
| 95396 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95397 | 441, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95398 | 441, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95399 | 441, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95400 | 0, // dsub0 |
| 95401 | 441, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95402 | 441, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95403 | 441, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95404 | 441, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95405 | 441, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95406 | 441, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95407 | 0, // psub |
| 95408 | 0, // psub0 |
| 95409 | 0, // psub1 |
| 95410 | 0, // qsub0 |
| 95411 | 441, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95412 | 441, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95413 | 441, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95414 | 441, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95415 | 441, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95416 | 0, // sub_32 |
| 95417 | 0, // sub_32_hi |
| 95418 | 0, // sube32 |
| 95419 | 0, // sube64 |
| 95420 | 0, // subo32 |
| 95421 | 0, // subo64 |
| 95422 | 0, // x8sub_0 |
| 95423 | 0, // x8sub_1 |
| 95424 | 0, // x8sub_2 |
| 95425 | 0, // x8sub_3 |
| 95426 | 0, // x8sub_4 |
| 95427 | 0, // x8sub_5 |
| 95428 | 0, // x8sub_6 |
| 95429 | 0, // x8sub_7 |
| 95430 | 0, // zasubb |
| 95431 | 0, // zasubd0 |
| 95432 | 0, // zasubd1 |
| 95433 | 0, // zasubh0 |
| 95434 | 0, // zasubh1 |
| 95435 | 0, // zasubq0 |
| 95436 | 0, // zasubq1 |
| 95437 | 0, // zasubs0 |
| 95438 | 0, // zasubs1 |
| 95439 | 441, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95440 | 441, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95441 | 441, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95442 | 441, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95443 | 441, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95444 | 441, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95445 | 0, // zasubd1_then_zasubq0 |
| 95446 | 0, // zasubd1_then_zasubq1 |
| 95447 | 0, // zasubs1_then_zasubd0 |
| 95448 | 0, // zasubs1_then_zasubd1 |
| 95449 | 0, // zasubs1_then_zasubq0 |
| 95450 | 0, // zasubs1_then_zasubq1 |
| 95451 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95452 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95453 | 0, // zasubh1_then_zasubd0 |
| 95454 | 0, // zasubh1_then_zasubd1 |
| 95455 | 0, // zasubh1_then_zasubq0 |
| 95456 | 0, // zasubh1_then_zasubq1 |
| 95457 | 0, // zasubh1_then_zasubs0 |
| 95458 | 0, // zasubh1_then_zasubs1 |
| 95459 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95460 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95461 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95462 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95463 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95464 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95465 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95466 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95467 | 441, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95468 | 441, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95469 | 441, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95470 | 441, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95471 | 441, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95472 | 441, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95473 | 441, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95474 | 441, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95475 | 441, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95476 | 441, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95477 | 441, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95478 | 441, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95479 | 441, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95480 | 441, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95481 | 441, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95482 | 441, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95483 | 441, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95484 | 441, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95485 | 0, // psub1_then_psub |
| 95486 | 441, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95487 | 441, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95488 | 441, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95489 | 0, // x8sub_7_then_sub_32 |
| 95490 | 0, // x8sub_7_then_sub_32_hi |
| 95491 | 0, // x8sub_6_then_sub_32 |
| 95492 | 0, // x8sub_6_then_sub_32_hi |
| 95493 | 0, // x8sub_5_then_sub_32 |
| 95494 | 0, // x8sub_5_then_sub_32_hi |
| 95495 | 0, // x8sub_4_then_sub_32 |
| 95496 | 0, // x8sub_4_then_sub_32_hi |
| 95497 | 0, // x8sub_3_then_sub_32 |
| 95498 | 0, // x8sub_3_then_sub_32_hi |
| 95499 | 0, // x8sub_2_then_sub_32 |
| 95500 | 0, // x8sub_2_then_sub_32_hi |
| 95501 | 0, // x8sub_1_then_sub_32 |
| 95502 | 0, // x8sub_1_then_sub_32_hi |
| 95503 | 0, // subo64_then_sub_32 |
| 95504 | 0, // subo64_then_sub_32_hi |
| 95505 | 441, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95506 | 441, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95507 | 441, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95508 | 0, // dsub0_dsub1 |
| 95509 | 0, // dsub0_dsub1_dsub2 |
| 95510 | 441, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95511 | 441, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95512 | 441, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95513 | 441, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95514 | 441, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95515 | 441, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95516 | 0, // qsub0_qsub1 |
| 95517 | 0, // qsub0_qsub1_qsub2 |
| 95518 | 441, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95519 | 441, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95520 | 441, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95521 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95522 | 0, // x8sub_0_x8sub_1 |
| 95523 | 0, // x8sub_2_x8sub_3 |
| 95524 | 0, // x8sub_4_x8sub_5 |
| 95525 | 0, // x8sub_6_x8sub_7 |
| 95526 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95527 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95528 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95529 | 0, // sub_32_subo64_then_sub_32 |
| 95530 | 441, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95531 | 441, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95532 | 441, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95533 | 441, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95534 | 441, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95535 | 441, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95536 | 441, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95537 | 441, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 95538 | 0, // zsub0_zsub2 |
| 95539 | 0, // zsub1_zsub3 |
| 95540 | }, |
| 95541 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95542 | 442, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95543 | 442, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95544 | 442, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95545 | 0, // dsub0 |
| 95546 | 442, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95547 | 442, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95548 | 442, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95549 | 442, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95550 | 442, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95551 | 442, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95552 | 0, // psub |
| 95553 | 0, // psub0 |
| 95554 | 0, // psub1 |
| 95555 | 0, // qsub0 |
| 95556 | 442, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95557 | 442, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95558 | 442, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95559 | 442, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95560 | 442, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95561 | 0, // sub_32 |
| 95562 | 0, // sub_32_hi |
| 95563 | 0, // sube32 |
| 95564 | 0, // sube64 |
| 95565 | 0, // subo32 |
| 95566 | 0, // subo64 |
| 95567 | 0, // x8sub_0 |
| 95568 | 0, // x8sub_1 |
| 95569 | 0, // x8sub_2 |
| 95570 | 0, // x8sub_3 |
| 95571 | 0, // x8sub_4 |
| 95572 | 0, // x8sub_5 |
| 95573 | 0, // x8sub_6 |
| 95574 | 0, // x8sub_7 |
| 95575 | 0, // zasubb |
| 95576 | 0, // zasubd0 |
| 95577 | 0, // zasubd1 |
| 95578 | 0, // zasubh0 |
| 95579 | 0, // zasubh1 |
| 95580 | 0, // zasubq0 |
| 95581 | 0, // zasubq1 |
| 95582 | 0, // zasubs0 |
| 95583 | 0, // zasubs1 |
| 95584 | 442, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95585 | 442, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95586 | 442, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95587 | 442, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95588 | 442, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95589 | 442, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95590 | 0, // zasubd1_then_zasubq0 |
| 95591 | 0, // zasubd1_then_zasubq1 |
| 95592 | 0, // zasubs1_then_zasubd0 |
| 95593 | 0, // zasubs1_then_zasubd1 |
| 95594 | 0, // zasubs1_then_zasubq0 |
| 95595 | 0, // zasubs1_then_zasubq1 |
| 95596 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95597 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95598 | 0, // zasubh1_then_zasubd0 |
| 95599 | 0, // zasubh1_then_zasubd1 |
| 95600 | 0, // zasubh1_then_zasubq0 |
| 95601 | 0, // zasubh1_then_zasubq1 |
| 95602 | 0, // zasubh1_then_zasubs0 |
| 95603 | 0, // zasubh1_then_zasubs1 |
| 95604 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95605 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95606 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95607 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95608 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95609 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95610 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95611 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95612 | 442, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95613 | 442, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95614 | 442, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95615 | 442, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95616 | 442, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95617 | 442, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95618 | 442, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95619 | 442, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95620 | 442, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95621 | 442, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95622 | 442, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95623 | 442, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95624 | 442, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95625 | 442, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95626 | 442, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95627 | 442, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95628 | 442, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95629 | 442, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95630 | 0, // psub1_then_psub |
| 95631 | 442, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95632 | 442, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95633 | 442, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95634 | 0, // x8sub_7_then_sub_32 |
| 95635 | 0, // x8sub_7_then_sub_32_hi |
| 95636 | 0, // x8sub_6_then_sub_32 |
| 95637 | 0, // x8sub_6_then_sub_32_hi |
| 95638 | 0, // x8sub_5_then_sub_32 |
| 95639 | 0, // x8sub_5_then_sub_32_hi |
| 95640 | 0, // x8sub_4_then_sub_32 |
| 95641 | 0, // x8sub_4_then_sub_32_hi |
| 95642 | 0, // x8sub_3_then_sub_32 |
| 95643 | 0, // x8sub_3_then_sub_32_hi |
| 95644 | 0, // x8sub_2_then_sub_32 |
| 95645 | 0, // x8sub_2_then_sub_32_hi |
| 95646 | 0, // x8sub_1_then_sub_32 |
| 95647 | 0, // x8sub_1_then_sub_32_hi |
| 95648 | 0, // subo64_then_sub_32 |
| 95649 | 0, // subo64_then_sub_32_hi |
| 95650 | 442, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95651 | 442, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95652 | 442, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95653 | 0, // dsub0_dsub1 |
| 95654 | 0, // dsub0_dsub1_dsub2 |
| 95655 | 442, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95656 | 442, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95657 | 442, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95658 | 442, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95659 | 442, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95660 | 442, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95661 | 0, // qsub0_qsub1 |
| 95662 | 0, // qsub0_qsub1_qsub2 |
| 95663 | 442, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95664 | 442, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95665 | 442, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95666 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95667 | 0, // x8sub_0_x8sub_1 |
| 95668 | 0, // x8sub_2_x8sub_3 |
| 95669 | 0, // x8sub_4_x8sub_5 |
| 95670 | 0, // x8sub_6_x8sub_7 |
| 95671 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95672 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95673 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95674 | 0, // sub_32_subo64_then_sub_32 |
| 95675 | 442, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95676 | 442, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95677 | 442, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95678 | 442, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95679 | 442, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95680 | 442, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95681 | 442, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95682 | 442, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 95683 | 0, // zsub0_zsub2 |
| 95684 | 0, // zsub1_zsub3 |
| 95685 | }, |
| 95686 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95687 | 443, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95688 | 443, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95689 | 443, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95690 | 0, // dsub0 |
| 95691 | 443, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95692 | 443, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95693 | 443, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95694 | 443, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95695 | 443, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95696 | 443, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95697 | 0, // psub |
| 95698 | 0, // psub0 |
| 95699 | 0, // psub1 |
| 95700 | 0, // qsub0 |
| 95701 | 443, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95702 | 443, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95703 | 443, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95704 | 443, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95705 | 443, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95706 | 0, // sub_32 |
| 95707 | 0, // sub_32_hi |
| 95708 | 0, // sube32 |
| 95709 | 0, // sube64 |
| 95710 | 0, // subo32 |
| 95711 | 0, // subo64 |
| 95712 | 0, // x8sub_0 |
| 95713 | 0, // x8sub_1 |
| 95714 | 0, // x8sub_2 |
| 95715 | 0, // x8sub_3 |
| 95716 | 0, // x8sub_4 |
| 95717 | 0, // x8sub_5 |
| 95718 | 0, // x8sub_6 |
| 95719 | 0, // x8sub_7 |
| 95720 | 0, // zasubb |
| 95721 | 0, // zasubd0 |
| 95722 | 0, // zasubd1 |
| 95723 | 0, // zasubh0 |
| 95724 | 0, // zasubh1 |
| 95725 | 0, // zasubq0 |
| 95726 | 0, // zasubq1 |
| 95727 | 0, // zasubs0 |
| 95728 | 0, // zasubs1 |
| 95729 | 443, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95730 | 443, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95731 | 443, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95732 | 443, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95733 | 443, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95734 | 443, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95735 | 0, // zasubd1_then_zasubq0 |
| 95736 | 0, // zasubd1_then_zasubq1 |
| 95737 | 0, // zasubs1_then_zasubd0 |
| 95738 | 0, // zasubs1_then_zasubd1 |
| 95739 | 0, // zasubs1_then_zasubq0 |
| 95740 | 0, // zasubs1_then_zasubq1 |
| 95741 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95742 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95743 | 0, // zasubh1_then_zasubd0 |
| 95744 | 0, // zasubh1_then_zasubd1 |
| 95745 | 0, // zasubh1_then_zasubq0 |
| 95746 | 0, // zasubh1_then_zasubq1 |
| 95747 | 0, // zasubh1_then_zasubs0 |
| 95748 | 0, // zasubh1_then_zasubs1 |
| 95749 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95750 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95751 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95752 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95753 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95754 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95755 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95756 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95757 | 443, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95758 | 443, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95759 | 443, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95760 | 443, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95761 | 443, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95762 | 443, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95763 | 443, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95764 | 443, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95765 | 443, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95766 | 443, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95767 | 443, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95768 | 443, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95769 | 443, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95770 | 443, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95771 | 443, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95772 | 443, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95773 | 443, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95774 | 443, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95775 | 0, // psub1_then_psub |
| 95776 | 443, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95777 | 443, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95778 | 443, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95779 | 0, // x8sub_7_then_sub_32 |
| 95780 | 0, // x8sub_7_then_sub_32_hi |
| 95781 | 0, // x8sub_6_then_sub_32 |
| 95782 | 0, // x8sub_6_then_sub_32_hi |
| 95783 | 0, // x8sub_5_then_sub_32 |
| 95784 | 0, // x8sub_5_then_sub_32_hi |
| 95785 | 0, // x8sub_4_then_sub_32 |
| 95786 | 0, // x8sub_4_then_sub_32_hi |
| 95787 | 0, // x8sub_3_then_sub_32 |
| 95788 | 0, // x8sub_3_then_sub_32_hi |
| 95789 | 0, // x8sub_2_then_sub_32 |
| 95790 | 0, // x8sub_2_then_sub_32_hi |
| 95791 | 0, // x8sub_1_then_sub_32 |
| 95792 | 0, // x8sub_1_then_sub_32_hi |
| 95793 | 0, // subo64_then_sub_32 |
| 95794 | 0, // subo64_then_sub_32_hi |
| 95795 | 443, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95796 | 443, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95797 | 443, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95798 | 0, // dsub0_dsub1 |
| 95799 | 0, // dsub0_dsub1_dsub2 |
| 95800 | 443, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95801 | 443, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95802 | 443, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95803 | 443, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95804 | 443, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95805 | 443, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95806 | 0, // qsub0_qsub1 |
| 95807 | 0, // qsub0_qsub1_qsub2 |
| 95808 | 443, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95809 | 443, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95810 | 443, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95811 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95812 | 0, // x8sub_0_x8sub_1 |
| 95813 | 0, // x8sub_2_x8sub_3 |
| 95814 | 0, // x8sub_4_x8sub_5 |
| 95815 | 0, // x8sub_6_x8sub_7 |
| 95816 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95817 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95818 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95819 | 0, // sub_32_subo64_then_sub_32 |
| 95820 | 443, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95821 | 443, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95822 | 443, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95823 | 443, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95824 | 443, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95825 | 443, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95826 | 443, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95827 | 443, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 95828 | 0, // zsub0_zsub2 |
| 95829 | 0, // zsub1_zsub3 |
| 95830 | }, |
| 95831 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95832 | 444, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95833 | 444, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95834 | 444, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95835 | 0, // dsub0 |
| 95836 | 444, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95837 | 444, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95838 | 444, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95839 | 444, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95840 | 444, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95841 | 444, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95842 | 0, // psub |
| 95843 | 0, // psub0 |
| 95844 | 0, // psub1 |
| 95845 | 0, // qsub0 |
| 95846 | 444, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95847 | 444, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95848 | 444, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95849 | 444, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95850 | 444, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95851 | 0, // sub_32 |
| 95852 | 0, // sub_32_hi |
| 95853 | 0, // sube32 |
| 95854 | 0, // sube64 |
| 95855 | 0, // subo32 |
| 95856 | 0, // subo64 |
| 95857 | 0, // x8sub_0 |
| 95858 | 0, // x8sub_1 |
| 95859 | 0, // x8sub_2 |
| 95860 | 0, // x8sub_3 |
| 95861 | 0, // x8sub_4 |
| 95862 | 0, // x8sub_5 |
| 95863 | 0, // x8sub_6 |
| 95864 | 0, // x8sub_7 |
| 95865 | 0, // zasubb |
| 95866 | 0, // zasubd0 |
| 95867 | 0, // zasubd1 |
| 95868 | 0, // zasubh0 |
| 95869 | 0, // zasubh1 |
| 95870 | 0, // zasubq0 |
| 95871 | 0, // zasubq1 |
| 95872 | 0, // zasubs0 |
| 95873 | 0, // zasubs1 |
| 95874 | 444, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95875 | 444, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95876 | 444, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95877 | 444, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95878 | 444, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95879 | 444, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95880 | 0, // zasubd1_then_zasubq0 |
| 95881 | 0, // zasubd1_then_zasubq1 |
| 95882 | 0, // zasubs1_then_zasubd0 |
| 95883 | 0, // zasubs1_then_zasubd1 |
| 95884 | 0, // zasubs1_then_zasubq0 |
| 95885 | 0, // zasubs1_then_zasubq1 |
| 95886 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 95887 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 95888 | 0, // zasubh1_then_zasubd0 |
| 95889 | 0, // zasubh1_then_zasubd1 |
| 95890 | 0, // zasubh1_then_zasubq0 |
| 95891 | 0, // zasubh1_then_zasubq1 |
| 95892 | 0, // zasubh1_then_zasubs0 |
| 95893 | 0, // zasubh1_then_zasubs1 |
| 95894 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 95895 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 95896 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 95897 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 95898 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 95899 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 95900 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 95901 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 95902 | 444, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95903 | 444, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95904 | 444, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95905 | 444, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95906 | 444, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95907 | 444, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95908 | 444, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95909 | 444, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95910 | 444, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95911 | 444, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95912 | 444, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95913 | 444, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95914 | 444, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95915 | 444, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95916 | 444, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95917 | 444, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95918 | 444, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95919 | 444, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95920 | 0, // psub1_then_psub |
| 95921 | 444, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95922 | 444, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95923 | 444, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95924 | 0, // x8sub_7_then_sub_32 |
| 95925 | 0, // x8sub_7_then_sub_32_hi |
| 95926 | 0, // x8sub_6_then_sub_32 |
| 95927 | 0, // x8sub_6_then_sub_32_hi |
| 95928 | 0, // x8sub_5_then_sub_32 |
| 95929 | 0, // x8sub_5_then_sub_32_hi |
| 95930 | 0, // x8sub_4_then_sub_32 |
| 95931 | 0, // x8sub_4_then_sub_32_hi |
| 95932 | 0, // x8sub_3_then_sub_32 |
| 95933 | 0, // x8sub_3_then_sub_32_hi |
| 95934 | 0, // x8sub_2_then_sub_32 |
| 95935 | 0, // x8sub_2_then_sub_32_hi |
| 95936 | 0, // x8sub_1_then_sub_32 |
| 95937 | 0, // x8sub_1_then_sub_32_hi |
| 95938 | 0, // subo64_then_sub_32 |
| 95939 | 0, // subo64_then_sub_32_hi |
| 95940 | 444, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95941 | 444, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95942 | 444, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95943 | 0, // dsub0_dsub1 |
| 95944 | 0, // dsub0_dsub1_dsub2 |
| 95945 | 444, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95946 | 444, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95947 | 444, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95948 | 444, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95949 | 444, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95950 | 444, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95951 | 0, // qsub0_qsub1 |
| 95952 | 0, // qsub0_qsub1_qsub2 |
| 95953 | 444, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95954 | 444, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95955 | 444, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95956 | 0, // sub_32_x8sub_1_then_sub_32 |
| 95957 | 0, // x8sub_0_x8sub_1 |
| 95958 | 0, // x8sub_2_x8sub_3 |
| 95959 | 0, // x8sub_4_x8sub_5 |
| 95960 | 0, // x8sub_6_x8sub_7 |
| 95961 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 95962 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 95963 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 95964 | 0, // sub_32_subo64_then_sub_32 |
| 95965 | 444, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95966 | 444, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95967 | 444, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95968 | 444, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95969 | 444, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95970 | 444, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95971 | 444, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95972 | 444, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 95973 | 0, // zsub0_zsub2 |
| 95974 | 0, // zsub1_zsub3 |
| 95975 | }, |
| 95976 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95977 | 445, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95978 | 445, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95979 | 445, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95980 | 0, // dsub0 |
| 95981 | 445, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95982 | 445, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95983 | 445, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95984 | 445, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95985 | 445, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95986 | 445, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95987 | 0, // psub |
| 95988 | 0, // psub0 |
| 95989 | 0, // psub1 |
| 95990 | 0, // qsub0 |
| 95991 | 445, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95992 | 445, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95993 | 445, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95994 | 445, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95995 | 445, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 95996 | 0, // sub_32 |
| 95997 | 0, // sub_32_hi |
| 95998 | 0, // sube32 |
| 95999 | 0, // sube64 |
| 96000 | 0, // subo32 |
| 96001 | 0, // subo64 |
| 96002 | 0, // x8sub_0 |
| 96003 | 0, // x8sub_1 |
| 96004 | 0, // x8sub_2 |
| 96005 | 0, // x8sub_3 |
| 96006 | 0, // x8sub_4 |
| 96007 | 0, // x8sub_5 |
| 96008 | 0, // x8sub_6 |
| 96009 | 0, // x8sub_7 |
| 96010 | 0, // zasubb |
| 96011 | 0, // zasubd0 |
| 96012 | 0, // zasubd1 |
| 96013 | 0, // zasubh0 |
| 96014 | 0, // zasubh1 |
| 96015 | 0, // zasubq0 |
| 96016 | 0, // zasubq1 |
| 96017 | 0, // zasubs0 |
| 96018 | 0, // zasubs1 |
| 96019 | 445, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96020 | 445, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96021 | 445, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96022 | 445, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96023 | 445, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96024 | 445, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96025 | 0, // zasubd1_then_zasubq0 |
| 96026 | 0, // zasubd1_then_zasubq1 |
| 96027 | 0, // zasubs1_then_zasubd0 |
| 96028 | 0, // zasubs1_then_zasubd1 |
| 96029 | 0, // zasubs1_then_zasubq0 |
| 96030 | 0, // zasubs1_then_zasubq1 |
| 96031 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96032 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96033 | 0, // zasubh1_then_zasubd0 |
| 96034 | 0, // zasubh1_then_zasubd1 |
| 96035 | 0, // zasubh1_then_zasubq0 |
| 96036 | 0, // zasubh1_then_zasubq1 |
| 96037 | 0, // zasubh1_then_zasubs0 |
| 96038 | 0, // zasubh1_then_zasubs1 |
| 96039 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96040 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96041 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96042 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96043 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96044 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96045 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96046 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96047 | 445, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96048 | 445, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96049 | 445, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96050 | 445, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96051 | 445, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96052 | 445, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96053 | 445, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96054 | 445, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96055 | 445, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96056 | 445, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96057 | 445, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96058 | 445, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96059 | 445, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96060 | 445, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96061 | 445, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96062 | 445, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96063 | 445, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96064 | 445, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96065 | 0, // psub1_then_psub |
| 96066 | 445, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96067 | 445, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96068 | 445, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96069 | 0, // x8sub_7_then_sub_32 |
| 96070 | 0, // x8sub_7_then_sub_32_hi |
| 96071 | 0, // x8sub_6_then_sub_32 |
| 96072 | 0, // x8sub_6_then_sub_32_hi |
| 96073 | 0, // x8sub_5_then_sub_32 |
| 96074 | 0, // x8sub_5_then_sub_32_hi |
| 96075 | 0, // x8sub_4_then_sub_32 |
| 96076 | 0, // x8sub_4_then_sub_32_hi |
| 96077 | 0, // x8sub_3_then_sub_32 |
| 96078 | 0, // x8sub_3_then_sub_32_hi |
| 96079 | 0, // x8sub_2_then_sub_32 |
| 96080 | 0, // x8sub_2_then_sub_32_hi |
| 96081 | 0, // x8sub_1_then_sub_32 |
| 96082 | 0, // x8sub_1_then_sub_32_hi |
| 96083 | 0, // subo64_then_sub_32 |
| 96084 | 0, // subo64_then_sub_32_hi |
| 96085 | 445, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96086 | 445, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96087 | 445, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96088 | 0, // dsub0_dsub1 |
| 96089 | 0, // dsub0_dsub1_dsub2 |
| 96090 | 0, // dsub1_dsub2 |
| 96091 | 0, // dsub1_dsub2_dsub3 |
| 96092 | 0, // dsub2_dsub3 |
| 96093 | 0, // dsub_dsub1 |
| 96094 | 0, // dsub_dsub1_dsub2_dsub3 |
| 96095 | 0, // dsub_dsub1_dsub2 |
| 96096 | 0, // qsub0_qsub1 |
| 96097 | 0, // qsub0_qsub1_qsub2 |
| 96098 | 0, // qsub1_qsub2 |
| 96099 | 0, // qsub1_qsub2_qsub3 |
| 96100 | 0, // qsub2_qsub3 |
| 96101 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96102 | 0, // x8sub_0_x8sub_1 |
| 96103 | 0, // x8sub_2_x8sub_3 |
| 96104 | 0, // x8sub_4_x8sub_5 |
| 96105 | 0, // x8sub_6_x8sub_7 |
| 96106 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96107 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96108 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96109 | 0, // sub_32_subo64_then_sub_32 |
| 96110 | 0, // zsub_qsub1 |
| 96111 | 0, // zsub_qsub1_qsub2_qsub3 |
| 96112 | 0, // zsub_qsub1_qsub2 |
| 96113 | 0, // zsub0_zsub1 |
| 96114 | 0, // zsub0_zsub1_zsub2 |
| 96115 | 0, // zsub1_zsub2 |
| 96116 | 0, // zsub1_zsub2_zsub3 |
| 96117 | 0, // zsub2_zsub3 |
| 96118 | 445, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96119 | 445, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96120 | }, |
| 96121 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96122 | 446, // bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96123 | 446, // bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96124 | 446, // dsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96125 | 0, // dsub0 |
| 96126 | 446, // dsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96127 | 446, // dsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96128 | 446, // dsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96129 | 446, // dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96130 | 446, // hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96131 | 446, // hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96132 | 0, // psub |
| 96133 | 0, // psub0 |
| 96134 | 0, // psub1 |
| 96135 | 0, // qsub0 |
| 96136 | 446, // qsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96137 | 446, // qsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96138 | 446, // qsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96139 | 446, // ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96140 | 446, // ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96141 | 0, // sub_32 |
| 96142 | 0, // sub_32_hi |
| 96143 | 0, // sube32 |
| 96144 | 0, // sube64 |
| 96145 | 0, // subo32 |
| 96146 | 0, // subo64 |
| 96147 | 0, // x8sub_0 |
| 96148 | 0, // x8sub_1 |
| 96149 | 0, // x8sub_2 |
| 96150 | 0, // x8sub_3 |
| 96151 | 0, // x8sub_4 |
| 96152 | 0, // x8sub_5 |
| 96153 | 0, // x8sub_6 |
| 96154 | 0, // x8sub_7 |
| 96155 | 0, // zasubb |
| 96156 | 0, // zasubd0 |
| 96157 | 0, // zasubd1 |
| 96158 | 0, // zasubh0 |
| 96159 | 0, // zasubh1 |
| 96160 | 0, // zasubq0 |
| 96161 | 0, // zasubq1 |
| 96162 | 0, // zasubs0 |
| 96163 | 0, // zasubs1 |
| 96164 | 446, // zsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96165 | 446, // zsub0 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96166 | 446, // zsub1 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96167 | 446, // zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96168 | 446, // zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96169 | 446, // zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96170 | 0, // zasubd1_then_zasubq0 |
| 96171 | 0, // zasubd1_then_zasubq1 |
| 96172 | 0, // zasubs1_then_zasubd0 |
| 96173 | 0, // zasubs1_then_zasubd1 |
| 96174 | 0, // zasubs1_then_zasubq0 |
| 96175 | 0, // zasubs1_then_zasubq1 |
| 96176 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96177 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96178 | 0, // zasubh1_then_zasubd0 |
| 96179 | 0, // zasubh1_then_zasubd1 |
| 96180 | 0, // zasubh1_then_zasubq0 |
| 96181 | 0, // zasubh1_then_zasubq1 |
| 96182 | 0, // zasubh1_then_zasubs0 |
| 96183 | 0, // zasubh1_then_zasubs1 |
| 96184 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96185 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96186 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96187 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96188 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96189 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96190 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96191 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96192 | 446, // dsub1_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96193 | 446, // dsub1_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96194 | 446, // dsub1_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96195 | 446, // dsub1_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96196 | 446, // dsub1_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96197 | 446, // dsub1_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96198 | 446, // dsub3_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96199 | 446, // dsub3_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96200 | 446, // dsub3_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96201 | 446, // dsub3_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96202 | 446, // dsub3_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96203 | 446, // dsub3_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96204 | 446, // dsub2_then_bsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96205 | 446, // dsub2_then_bsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96206 | 446, // dsub2_then_hsub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96207 | 446, // dsub2_then_hsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96208 | 446, // dsub2_then_ssub -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96209 | 446, // dsub2_then_ssub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96210 | 0, // psub1_then_psub |
| 96211 | 446, // qsub1_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96212 | 446, // qsub3_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96213 | 446, // qsub2_then_dsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96214 | 0, // x8sub_7_then_sub_32 |
| 96215 | 0, // x8sub_7_then_sub_32_hi |
| 96216 | 0, // x8sub_6_then_sub_32 |
| 96217 | 0, // x8sub_6_then_sub_32_hi |
| 96218 | 0, // x8sub_5_then_sub_32 |
| 96219 | 0, // x8sub_5_then_sub_32_hi |
| 96220 | 0, // x8sub_4_then_sub_32 |
| 96221 | 0, // x8sub_4_then_sub_32_hi |
| 96222 | 0, // x8sub_3_then_sub_32 |
| 96223 | 0, // x8sub_3_then_sub_32_hi |
| 96224 | 0, // x8sub_2_then_sub_32 |
| 96225 | 0, // x8sub_2_then_sub_32_hi |
| 96226 | 0, // x8sub_1_then_sub_32 |
| 96227 | 0, // x8sub_1_then_sub_32_hi |
| 96228 | 0, // subo64_then_sub_32 |
| 96229 | 0, // subo64_then_sub_32_hi |
| 96230 | 446, // zsub1_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96231 | 446, // zsub3_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96232 | 446, // zsub2_then_zsub_hi -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96233 | 0, // dsub0_dsub1 |
| 96234 | 0, // dsub0_dsub1_dsub2 |
| 96235 | 0, // dsub1_dsub2 |
| 96236 | 0, // dsub1_dsub2_dsub3 |
| 96237 | 0, // dsub2_dsub3 |
| 96238 | 0, // dsub_dsub1 |
| 96239 | 0, // dsub_dsub1_dsub2_dsub3 |
| 96240 | 0, // dsub_dsub1_dsub2 |
| 96241 | 0, // qsub0_qsub1 |
| 96242 | 0, // qsub0_qsub1_qsub2 |
| 96243 | 0, // qsub1_qsub2 |
| 96244 | 0, // qsub1_qsub2_qsub3 |
| 96245 | 0, // qsub2_qsub3 |
| 96246 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96247 | 0, // x8sub_0_x8sub_1 |
| 96248 | 0, // x8sub_2_x8sub_3 |
| 96249 | 0, // x8sub_4_x8sub_5 |
| 96250 | 0, // x8sub_6_x8sub_7 |
| 96251 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96252 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96253 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96254 | 0, // sub_32_subo64_then_sub_32 |
| 96255 | 0, // zsub_qsub1 |
| 96256 | 0, // zsub_qsub1_qsub2_qsub3 |
| 96257 | 0, // zsub_qsub1_qsub2 |
| 96258 | 0, // zsub0_zsub1 |
| 96259 | 0, // zsub0_zsub1_zsub2 |
| 96260 | 0, // zsub1_zsub2 |
| 96261 | 0, // zsub1_zsub2_zsub3 |
| 96262 | 0, // zsub2_zsub3 |
| 96263 | 446, // zsub0_zsub2 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96264 | 446, // zsub1_zsub3 -> ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 96265 | }, |
| 96266 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96267 | 447, // bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96268 | 447, // bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96269 | 447, // dsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96270 | 0, // dsub0 |
| 96271 | 447, // dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96272 | 447, // dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96273 | 447, // dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96274 | 447, // dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96275 | 447, // hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96276 | 447, // hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96277 | 0, // psub |
| 96278 | 0, // psub0 |
| 96279 | 0, // psub1 |
| 96280 | 0, // qsub0 |
| 96281 | 447, // qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96282 | 447, // qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96283 | 447, // qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96284 | 447, // ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96285 | 447, // ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96286 | 0, // sub_32 |
| 96287 | 0, // sub_32_hi |
| 96288 | 0, // sube32 |
| 96289 | 0, // sube64 |
| 96290 | 0, // subo32 |
| 96291 | 0, // subo64 |
| 96292 | 0, // x8sub_0 |
| 96293 | 0, // x8sub_1 |
| 96294 | 0, // x8sub_2 |
| 96295 | 0, // x8sub_3 |
| 96296 | 0, // x8sub_4 |
| 96297 | 0, // x8sub_5 |
| 96298 | 0, // x8sub_6 |
| 96299 | 0, // x8sub_7 |
| 96300 | 0, // zasubb |
| 96301 | 0, // zasubd0 |
| 96302 | 0, // zasubd1 |
| 96303 | 0, // zasubh0 |
| 96304 | 0, // zasubh1 |
| 96305 | 0, // zasubq0 |
| 96306 | 0, // zasubq1 |
| 96307 | 0, // zasubs0 |
| 96308 | 0, // zasubs1 |
| 96309 | 447, // zsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96310 | 447, // zsub0 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96311 | 447, // zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96312 | 447, // zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96313 | 447, // zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96314 | 447, // zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96315 | 0, // zasubd1_then_zasubq0 |
| 96316 | 0, // zasubd1_then_zasubq1 |
| 96317 | 0, // zasubs1_then_zasubd0 |
| 96318 | 0, // zasubs1_then_zasubd1 |
| 96319 | 0, // zasubs1_then_zasubq0 |
| 96320 | 0, // zasubs1_then_zasubq1 |
| 96321 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96322 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96323 | 0, // zasubh1_then_zasubd0 |
| 96324 | 0, // zasubh1_then_zasubd1 |
| 96325 | 0, // zasubh1_then_zasubq0 |
| 96326 | 0, // zasubh1_then_zasubq1 |
| 96327 | 0, // zasubh1_then_zasubs0 |
| 96328 | 0, // zasubh1_then_zasubs1 |
| 96329 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96330 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96331 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96332 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96333 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96334 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96335 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96336 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96337 | 447, // dsub1_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96338 | 447, // dsub1_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96339 | 447, // dsub1_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96340 | 447, // dsub1_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96341 | 447, // dsub1_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96342 | 447, // dsub1_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96343 | 447, // dsub3_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96344 | 447, // dsub3_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96345 | 447, // dsub3_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96346 | 447, // dsub3_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96347 | 447, // dsub3_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96348 | 447, // dsub3_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96349 | 447, // dsub2_then_bsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96350 | 447, // dsub2_then_bsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96351 | 447, // dsub2_then_hsub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96352 | 447, // dsub2_then_hsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96353 | 447, // dsub2_then_ssub -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96354 | 447, // dsub2_then_ssub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96355 | 0, // psub1_then_psub |
| 96356 | 447, // qsub1_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96357 | 447, // qsub3_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96358 | 447, // qsub2_then_dsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96359 | 0, // x8sub_7_then_sub_32 |
| 96360 | 0, // x8sub_7_then_sub_32_hi |
| 96361 | 0, // x8sub_6_then_sub_32 |
| 96362 | 0, // x8sub_6_then_sub_32_hi |
| 96363 | 0, // x8sub_5_then_sub_32 |
| 96364 | 0, // x8sub_5_then_sub_32_hi |
| 96365 | 0, // x8sub_4_then_sub_32 |
| 96366 | 0, // x8sub_4_then_sub_32_hi |
| 96367 | 0, // x8sub_3_then_sub_32 |
| 96368 | 0, // x8sub_3_then_sub_32_hi |
| 96369 | 0, // x8sub_2_then_sub_32 |
| 96370 | 0, // x8sub_2_then_sub_32_hi |
| 96371 | 0, // x8sub_1_then_sub_32 |
| 96372 | 0, // x8sub_1_then_sub_32_hi |
| 96373 | 0, // subo64_then_sub_32 |
| 96374 | 0, // subo64_then_sub_32_hi |
| 96375 | 447, // zsub1_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96376 | 447, // zsub3_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96377 | 447, // zsub2_then_zsub_hi -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96378 | 0, // dsub0_dsub1 |
| 96379 | 0, // dsub0_dsub1_dsub2 |
| 96380 | 447, // dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96381 | 447, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96382 | 447, // dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96383 | 447, // dsub_dsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96384 | 447, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96385 | 447, // dsub_dsub1_dsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96386 | 0, // qsub0_qsub1 |
| 96387 | 0, // qsub0_qsub1_qsub2 |
| 96388 | 447, // qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96389 | 447, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96390 | 447, // qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96391 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96392 | 0, // x8sub_0_x8sub_1 |
| 96393 | 0, // x8sub_2_x8sub_3 |
| 96394 | 0, // x8sub_4_x8sub_5 |
| 96395 | 0, // x8sub_6_x8sub_7 |
| 96396 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96397 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96398 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96399 | 0, // sub_32_subo64_then_sub_32 |
| 96400 | 447, // zsub_qsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96401 | 447, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96402 | 447, // zsub_qsub1_qsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96403 | 447, // zsub0_zsub1 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96404 | 447, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96405 | 447, // zsub1_zsub2 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96406 | 447, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96407 | 447, // zsub2_zsub3 -> ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 96408 | 0, // zsub0_zsub2 |
| 96409 | 0, // zsub1_zsub3 |
| 96410 | }, |
| 96411 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96412 | 448, // bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96413 | 448, // bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96414 | 448, // dsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96415 | 0, // dsub0 |
| 96416 | 448, // dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96417 | 448, // dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96418 | 448, // dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96419 | 448, // dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96420 | 448, // hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96421 | 448, // hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96422 | 0, // psub |
| 96423 | 0, // psub0 |
| 96424 | 0, // psub1 |
| 96425 | 0, // qsub0 |
| 96426 | 448, // qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96427 | 448, // qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96428 | 448, // qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96429 | 448, // ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96430 | 448, // ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96431 | 0, // sub_32 |
| 96432 | 0, // sub_32_hi |
| 96433 | 0, // sube32 |
| 96434 | 0, // sube64 |
| 96435 | 0, // subo32 |
| 96436 | 0, // subo64 |
| 96437 | 0, // x8sub_0 |
| 96438 | 0, // x8sub_1 |
| 96439 | 0, // x8sub_2 |
| 96440 | 0, // x8sub_3 |
| 96441 | 0, // x8sub_4 |
| 96442 | 0, // x8sub_5 |
| 96443 | 0, // x8sub_6 |
| 96444 | 0, // x8sub_7 |
| 96445 | 0, // zasubb |
| 96446 | 0, // zasubd0 |
| 96447 | 0, // zasubd1 |
| 96448 | 0, // zasubh0 |
| 96449 | 0, // zasubh1 |
| 96450 | 0, // zasubq0 |
| 96451 | 0, // zasubq1 |
| 96452 | 0, // zasubs0 |
| 96453 | 0, // zasubs1 |
| 96454 | 448, // zsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96455 | 448, // zsub0 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96456 | 448, // zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96457 | 448, // zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96458 | 448, // zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96459 | 448, // zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96460 | 0, // zasubd1_then_zasubq0 |
| 96461 | 0, // zasubd1_then_zasubq1 |
| 96462 | 0, // zasubs1_then_zasubd0 |
| 96463 | 0, // zasubs1_then_zasubd1 |
| 96464 | 0, // zasubs1_then_zasubq0 |
| 96465 | 0, // zasubs1_then_zasubq1 |
| 96466 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96467 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96468 | 0, // zasubh1_then_zasubd0 |
| 96469 | 0, // zasubh1_then_zasubd1 |
| 96470 | 0, // zasubh1_then_zasubq0 |
| 96471 | 0, // zasubh1_then_zasubq1 |
| 96472 | 0, // zasubh1_then_zasubs0 |
| 96473 | 0, // zasubh1_then_zasubs1 |
| 96474 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96475 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96476 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96477 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96478 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96479 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96480 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96481 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96482 | 448, // dsub1_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96483 | 448, // dsub1_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96484 | 448, // dsub1_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96485 | 448, // dsub1_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96486 | 448, // dsub1_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96487 | 448, // dsub1_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96488 | 448, // dsub3_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96489 | 448, // dsub3_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96490 | 448, // dsub3_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96491 | 448, // dsub3_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96492 | 448, // dsub3_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96493 | 448, // dsub3_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96494 | 448, // dsub2_then_bsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96495 | 448, // dsub2_then_bsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96496 | 448, // dsub2_then_hsub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96497 | 448, // dsub2_then_hsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96498 | 448, // dsub2_then_ssub -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96499 | 448, // dsub2_then_ssub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96500 | 0, // psub1_then_psub |
| 96501 | 448, // qsub1_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96502 | 448, // qsub3_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96503 | 448, // qsub2_then_dsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96504 | 0, // x8sub_7_then_sub_32 |
| 96505 | 0, // x8sub_7_then_sub_32_hi |
| 96506 | 0, // x8sub_6_then_sub_32 |
| 96507 | 0, // x8sub_6_then_sub_32_hi |
| 96508 | 0, // x8sub_5_then_sub_32 |
| 96509 | 0, // x8sub_5_then_sub_32_hi |
| 96510 | 0, // x8sub_4_then_sub_32 |
| 96511 | 0, // x8sub_4_then_sub_32_hi |
| 96512 | 0, // x8sub_3_then_sub_32 |
| 96513 | 0, // x8sub_3_then_sub_32_hi |
| 96514 | 0, // x8sub_2_then_sub_32 |
| 96515 | 0, // x8sub_2_then_sub_32_hi |
| 96516 | 0, // x8sub_1_then_sub_32 |
| 96517 | 0, // x8sub_1_then_sub_32_hi |
| 96518 | 0, // subo64_then_sub_32 |
| 96519 | 0, // subo64_then_sub_32_hi |
| 96520 | 448, // zsub1_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96521 | 448, // zsub3_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96522 | 448, // zsub2_then_zsub_hi -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96523 | 0, // dsub0_dsub1 |
| 96524 | 0, // dsub0_dsub1_dsub2 |
| 96525 | 448, // dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96526 | 448, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96527 | 448, // dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96528 | 448, // dsub_dsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96529 | 448, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96530 | 448, // dsub_dsub1_dsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96531 | 0, // qsub0_qsub1 |
| 96532 | 0, // qsub0_qsub1_qsub2 |
| 96533 | 448, // qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96534 | 448, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96535 | 448, // qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96536 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96537 | 0, // x8sub_0_x8sub_1 |
| 96538 | 0, // x8sub_2_x8sub_3 |
| 96539 | 0, // x8sub_4_x8sub_5 |
| 96540 | 0, // x8sub_6_x8sub_7 |
| 96541 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96542 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96543 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96544 | 0, // sub_32_subo64_then_sub_32 |
| 96545 | 448, // zsub_qsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96546 | 448, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96547 | 448, // zsub_qsub1_qsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96548 | 448, // zsub0_zsub1 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96549 | 448, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96550 | 448, // zsub1_zsub2 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96551 | 448, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96552 | 448, // zsub2_zsub3 -> ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 96553 | 0, // zsub0_zsub2 |
| 96554 | 0, // zsub1_zsub3 |
| 96555 | }, |
| 96556 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96557 | 449, // bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96558 | 449, // bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96559 | 449, // dsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96560 | 0, // dsub0 |
| 96561 | 449, // dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96562 | 449, // dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96563 | 449, // dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96564 | 449, // dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96565 | 449, // hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96566 | 449, // hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96567 | 0, // psub |
| 96568 | 0, // psub0 |
| 96569 | 0, // psub1 |
| 96570 | 0, // qsub0 |
| 96571 | 449, // qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96572 | 449, // qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96573 | 449, // qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96574 | 449, // ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96575 | 449, // ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96576 | 0, // sub_32 |
| 96577 | 0, // sub_32_hi |
| 96578 | 0, // sube32 |
| 96579 | 0, // sube64 |
| 96580 | 0, // subo32 |
| 96581 | 0, // subo64 |
| 96582 | 0, // x8sub_0 |
| 96583 | 0, // x8sub_1 |
| 96584 | 0, // x8sub_2 |
| 96585 | 0, // x8sub_3 |
| 96586 | 0, // x8sub_4 |
| 96587 | 0, // x8sub_5 |
| 96588 | 0, // x8sub_6 |
| 96589 | 0, // x8sub_7 |
| 96590 | 0, // zasubb |
| 96591 | 0, // zasubd0 |
| 96592 | 0, // zasubd1 |
| 96593 | 0, // zasubh0 |
| 96594 | 0, // zasubh1 |
| 96595 | 0, // zasubq0 |
| 96596 | 0, // zasubq1 |
| 96597 | 0, // zasubs0 |
| 96598 | 0, // zasubs1 |
| 96599 | 449, // zsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96600 | 449, // zsub0 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96601 | 449, // zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96602 | 449, // zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96603 | 449, // zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96604 | 449, // zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96605 | 0, // zasubd1_then_zasubq0 |
| 96606 | 0, // zasubd1_then_zasubq1 |
| 96607 | 0, // zasubs1_then_zasubd0 |
| 96608 | 0, // zasubs1_then_zasubd1 |
| 96609 | 0, // zasubs1_then_zasubq0 |
| 96610 | 0, // zasubs1_then_zasubq1 |
| 96611 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96612 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96613 | 0, // zasubh1_then_zasubd0 |
| 96614 | 0, // zasubh1_then_zasubd1 |
| 96615 | 0, // zasubh1_then_zasubq0 |
| 96616 | 0, // zasubh1_then_zasubq1 |
| 96617 | 0, // zasubh1_then_zasubs0 |
| 96618 | 0, // zasubh1_then_zasubs1 |
| 96619 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96620 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96621 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96622 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96623 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96624 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96625 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96626 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96627 | 449, // dsub1_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96628 | 449, // dsub1_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96629 | 449, // dsub1_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96630 | 449, // dsub1_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96631 | 449, // dsub1_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96632 | 449, // dsub1_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96633 | 449, // dsub3_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96634 | 449, // dsub3_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96635 | 449, // dsub3_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96636 | 449, // dsub3_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96637 | 449, // dsub3_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96638 | 449, // dsub3_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96639 | 449, // dsub2_then_bsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96640 | 449, // dsub2_then_bsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96641 | 449, // dsub2_then_hsub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96642 | 449, // dsub2_then_hsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96643 | 449, // dsub2_then_ssub -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96644 | 449, // dsub2_then_ssub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96645 | 0, // psub1_then_psub |
| 96646 | 449, // qsub1_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96647 | 449, // qsub3_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96648 | 449, // qsub2_then_dsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96649 | 0, // x8sub_7_then_sub_32 |
| 96650 | 0, // x8sub_7_then_sub_32_hi |
| 96651 | 0, // x8sub_6_then_sub_32 |
| 96652 | 0, // x8sub_6_then_sub_32_hi |
| 96653 | 0, // x8sub_5_then_sub_32 |
| 96654 | 0, // x8sub_5_then_sub_32_hi |
| 96655 | 0, // x8sub_4_then_sub_32 |
| 96656 | 0, // x8sub_4_then_sub_32_hi |
| 96657 | 0, // x8sub_3_then_sub_32 |
| 96658 | 0, // x8sub_3_then_sub_32_hi |
| 96659 | 0, // x8sub_2_then_sub_32 |
| 96660 | 0, // x8sub_2_then_sub_32_hi |
| 96661 | 0, // x8sub_1_then_sub_32 |
| 96662 | 0, // x8sub_1_then_sub_32_hi |
| 96663 | 0, // subo64_then_sub_32 |
| 96664 | 0, // subo64_then_sub_32_hi |
| 96665 | 449, // zsub1_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96666 | 449, // zsub3_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96667 | 449, // zsub2_then_zsub_hi -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96668 | 0, // dsub0_dsub1 |
| 96669 | 0, // dsub0_dsub1_dsub2 |
| 96670 | 449, // dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96671 | 449, // dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96672 | 449, // dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96673 | 449, // dsub_dsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96674 | 449, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96675 | 449, // dsub_dsub1_dsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96676 | 0, // qsub0_qsub1 |
| 96677 | 0, // qsub0_qsub1_qsub2 |
| 96678 | 449, // qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96679 | 449, // qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96680 | 449, // qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96681 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96682 | 0, // x8sub_0_x8sub_1 |
| 96683 | 0, // x8sub_2_x8sub_3 |
| 96684 | 0, // x8sub_4_x8sub_5 |
| 96685 | 0, // x8sub_6_x8sub_7 |
| 96686 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96687 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96688 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96689 | 0, // sub_32_subo64_then_sub_32 |
| 96690 | 449, // zsub_qsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96691 | 449, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96692 | 449, // zsub_qsub1_qsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96693 | 449, // zsub0_zsub1 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96694 | 449, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96695 | 449, // zsub1_zsub2 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96696 | 449, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96697 | 449, // zsub2_zsub3 -> ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 96698 | 0, // zsub0_zsub2 |
| 96699 | 0, // zsub1_zsub3 |
| 96700 | }, |
| 96701 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96702 | 450, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96703 | 450, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96704 | 450, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96705 | 0, // dsub0 |
| 96706 | 450, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96707 | 450, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96708 | 450, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96709 | 450, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96710 | 450, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96711 | 450, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96712 | 0, // psub |
| 96713 | 0, // psub0 |
| 96714 | 0, // psub1 |
| 96715 | 0, // qsub0 |
| 96716 | 450, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96717 | 450, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96718 | 450, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96719 | 450, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96720 | 450, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96721 | 0, // sub_32 |
| 96722 | 0, // sub_32_hi |
| 96723 | 0, // sube32 |
| 96724 | 0, // sube64 |
| 96725 | 0, // subo32 |
| 96726 | 0, // subo64 |
| 96727 | 0, // x8sub_0 |
| 96728 | 0, // x8sub_1 |
| 96729 | 0, // x8sub_2 |
| 96730 | 0, // x8sub_3 |
| 96731 | 0, // x8sub_4 |
| 96732 | 0, // x8sub_5 |
| 96733 | 0, // x8sub_6 |
| 96734 | 0, // x8sub_7 |
| 96735 | 0, // zasubb |
| 96736 | 0, // zasubd0 |
| 96737 | 0, // zasubd1 |
| 96738 | 0, // zasubh0 |
| 96739 | 0, // zasubh1 |
| 96740 | 0, // zasubq0 |
| 96741 | 0, // zasubq1 |
| 96742 | 0, // zasubs0 |
| 96743 | 0, // zasubs1 |
| 96744 | 450, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96745 | 450, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96746 | 450, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96747 | 450, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96748 | 450, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96749 | 450, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96750 | 0, // zasubd1_then_zasubq0 |
| 96751 | 0, // zasubd1_then_zasubq1 |
| 96752 | 0, // zasubs1_then_zasubd0 |
| 96753 | 0, // zasubs1_then_zasubd1 |
| 96754 | 0, // zasubs1_then_zasubq0 |
| 96755 | 0, // zasubs1_then_zasubq1 |
| 96756 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96757 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96758 | 0, // zasubh1_then_zasubd0 |
| 96759 | 0, // zasubh1_then_zasubd1 |
| 96760 | 0, // zasubh1_then_zasubq0 |
| 96761 | 0, // zasubh1_then_zasubq1 |
| 96762 | 0, // zasubh1_then_zasubs0 |
| 96763 | 0, // zasubh1_then_zasubs1 |
| 96764 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96765 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96766 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96767 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96768 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96769 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96770 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96771 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96772 | 450, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96773 | 450, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96774 | 450, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96775 | 450, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96776 | 450, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96777 | 450, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96778 | 450, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96779 | 450, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96780 | 450, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96781 | 450, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96782 | 450, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96783 | 450, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96784 | 450, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96785 | 450, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96786 | 450, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96787 | 450, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96788 | 450, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96789 | 450, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96790 | 0, // psub1_then_psub |
| 96791 | 450, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96792 | 450, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96793 | 450, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96794 | 0, // x8sub_7_then_sub_32 |
| 96795 | 0, // x8sub_7_then_sub_32_hi |
| 96796 | 0, // x8sub_6_then_sub_32 |
| 96797 | 0, // x8sub_6_then_sub_32_hi |
| 96798 | 0, // x8sub_5_then_sub_32 |
| 96799 | 0, // x8sub_5_then_sub_32_hi |
| 96800 | 0, // x8sub_4_then_sub_32 |
| 96801 | 0, // x8sub_4_then_sub_32_hi |
| 96802 | 0, // x8sub_3_then_sub_32 |
| 96803 | 0, // x8sub_3_then_sub_32_hi |
| 96804 | 0, // x8sub_2_then_sub_32 |
| 96805 | 0, // x8sub_2_then_sub_32_hi |
| 96806 | 0, // x8sub_1_then_sub_32 |
| 96807 | 0, // x8sub_1_then_sub_32_hi |
| 96808 | 0, // subo64_then_sub_32 |
| 96809 | 0, // subo64_then_sub_32_hi |
| 96810 | 450, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96811 | 450, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96812 | 450, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96813 | 0, // dsub0_dsub1 |
| 96814 | 0, // dsub0_dsub1_dsub2 |
| 96815 | 450, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96816 | 450, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96817 | 450, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96818 | 450, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96819 | 450, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96820 | 450, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96821 | 0, // qsub0_qsub1 |
| 96822 | 0, // qsub0_qsub1_qsub2 |
| 96823 | 450, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96824 | 450, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96825 | 450, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96826 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96827 | 0, // x8sub_0_x8sub_1 |
| 96828 | 0, // x8sub_2_x8sub_3 |
| 96829 | 0, // x8sub_4_x8sub_5 |
| 96830 | 0, // x8sub_6_x8sub_7 |
| 96831 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96832 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96833 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96834 | 0, // sub_32_subo64_then_sub_32 |
| 96835 | 450, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96836 | 450, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96837 | 450, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96838 | 450, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96839 | 450, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96840 | 450, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96841 | 450, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96842 | 450, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 96843 | 0, // zsub0_zsub2 |
| 96844 | 0, // zsub1_zsub3 |
| 96845 | }, |
| 96846 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96847 | 451, // bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96848 | 451, // bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96849 | 451, // dsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96850 | 0, // dsub0 |
| 96851 | 451, // dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96852 | 451, // dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96853 | 451, // dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96854 | 451, // dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96855 | 451, // hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96856 | 451, // hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96857 | 0, // psub |
| 96858 | 0, // psub0 |
| 96859 | 0, // psub1 |
| 96860 | 0, // qsub0 |
| 96861 | 451, // qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96862 | 451, // qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96863 | 451, // qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96864 | 451, // ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96865 | 451, // ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96866 | 0, // sub_32 |
| 96867 | 0, // sub_32_hi |
| 96868 | 0, // sube32 |
| 96869 | 0, // sube64 |
| 96870 | 0, // subo32 |
| 96871 | 0, // subo64 |
| 96872 | 0, // x8sub_0 |
| 96873 | 0, // x8sub_1 |
| 96874 | 0, // x8sub_2 |
| 96875 | 0, // x8sub_3 |
| 96876 | 0, // x8sub_4 |
| 96877 | 0, // x8sub_5 |
| 96878 | 0, // x8sub_6 |
| 96879 | 0, // x8sub_7 |
| 96880 | 0, // zasubb |
| 96881 | 0, // zasubd0 |
| 96882 | 0, // zasubd1 |
| 96883 | 0, // zasubh0 |
| 96884 | 0, // zasubh1 |
| 96885 | 0, // zasubq0 |
| 96886 | 0, // zasubq1 |
| 96887 | 0, // zasubs0 |
| 96888 | 0, // zasubs1 |
| 96889 | 451, // zsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96890 | 451, // zsub0 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96891 | 451, // zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96892 | 451, // zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96893 | 451, // zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96894 | 451, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96895 | 0, // zasubd1_then_zasubq0 |
| 96896 | 0, // zasubd1_then_zasubq1 |
| 96897 | 0, // zasubs1_then_zasubd0 |
| 96898 | 0, // zasubs1_then_zasubd1 |
| 96899 | 0, // zasubs1_then_zasubq0 |
| 96900 | 0, // zasubs1_then_zasubq1 |
| 96901 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 96902 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 96903 | 0, // zasubh1_then_zasubd0 |
| 96904 | 0, // zasubh1_then_zasubd1 |
| 96905 | 0, // zasubh1_then_zasubq0 |
| 96906 | 0, // zasubh1_then_zasubq1 |
| 96907 | 0, // zasubh1_then_zasubs0 |
| 96908 | 0, // zasubh1_then_zasubs1 |
| 96909 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 96910 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 96911 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 96912 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 96913 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 96914 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 96915 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 96916 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 96917 | 451, // dsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96918 | 451, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96919 | 451, // dsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96920 | 451, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96921 | 451, // dsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96922 | 451, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96923 | 451, // dsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96924 | 451, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96925 | 451, // dsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96926 | 451, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96927 | 451, // dsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96928 | 451, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96929 | 451, // dsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96930 | 451, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96931 | 451, // dsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96932 | 451, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96933 | 451, // dsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96934 | 451, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96935 | 0, // psub1_then_psub |
| 96936 | 451, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96937 | 451, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96938 | 451, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96939 | 0, // x8sub_7_then_sub_32 |
| 96940 | 0, // x8sub_7_then_sub_32_hi |
| 96941 | 0, // x8sub_6_then_sub_32 |
| 96942 | 0, // x8sub_6_then_sub_32_hi |
| 96943 | 0, // x8sub_5_then_sub_32 |
| 96944 | 0, // x8sub_5_then_sub_32_hi |
| 96945 | 0, // x8sub_4_then_sub_32 |
| 96946 | 0, // x8sub_4_then_sub_32_hi |
| 96947 | 0, // x8sub_3_then_sub_32 |
| 96948 | 0, // x8sub_3_then_sub_32_hi |
| 96949 | 0, // x8sub_2_then_sub_32 |
| 96950 | 0, // x8sub_2_then_sub_32_hi |
| 96951 | 0, // x8sub_1_then_sub_32 |
| 96952 | 0, // x8sub_1_then_sub_32_hi |
| 96953 | 0, // subo64_then_sub_32 |
| 96954 | 0, // subo64_then_sub_32_hi |
| 96955 | 451, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96956 | 451, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96957 | 451, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96958 | 0, // dsub0_dsub1 |
| 96959 | 0, // dsub0_dsub1_dsub2 |
| 96960 | 451, // dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96961 | 451, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96962 | 451, // dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96963 | 451, // dsub_dsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96964 | 451, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96965 | 451, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96966 | 0, // qsub0_qsub1 |
| 96967 | 0, // qsub0_qsub1_qsub2 |
| 96968 | 451, // qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96969 | 451, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96970 | 451, // qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96971 | 0, // sub_32_x8sub_1_then_sub_32 |
| 96972 | 0, // x8sub_0_x8sub_1 |
| 96973 | 0, // x8sub_2_x8sub_3 |
| 96974 | 0, // x8sub_4_x8sub_5 |
| 96975 | 0, // x8sub_6_x8sub_7 |
| 96976 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 96977 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 96978 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 96979 | 0, // sub_32_subo64_then_sub_32 |
| 96980 | 451, // zsub_qsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96981 | 451, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96982 | 451, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96983 | 451, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96984 | 451, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96985 | 451, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96986 | 451, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96987 | 451, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96988 | 0, // zsub0_zsub2 |
| 96989 | 0, // zsub1_zsub3 |
| 96990 | }, |
| 96991 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96992 | 452, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96993 | 452, // bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96994 | 452, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96995 | 0, // dsub0 |
| 96996 | 452, // dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96997 | 452, // dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96998 | 452, // dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 96999 | 452, // dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97000 | 452, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97001 | 452, // hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97002 | 0, // psub |
| 97003 | 0, // psub0 |
| 97004 | 0, // psub1 |
| 97005 | 0, // qsub0 |
| 97006 | 452, // qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97007 | 452, // qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97008 | 452, // qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97009 | 452, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97010 | 452, // ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97011 | 0, // sub_32 |
| 97012 | 0, // sub_32_hi |
| 97013 | 0, // sube32 |
| 97014 | 0, // sube64 |
| 97015 | 0, // subo32 |
| 97016 | 0, // subo64 |
| 97017 | 0, // x8sub_0 |
| 97018 | 0, // x8sub_1 |
| 97019 | 0, // x8sub_2 |
| 97020 | 0, // x8sub_3 |
| 97021 | 0, // x8sub_4 |
| 97022 | 0, // x8sub_5 |
| 97023 | 0, // x8sub_6 |
| 97024 | 0, // x8sub_7 |
| 97025 | 0, // zasubb |
| 97026 | 0, // zasubd0 |
| 97027 | 0, // zasubd1 |
| 97028 | 0, // zasubh0 |
| 97029 | 0, // zasubh1 |
| 97030 | 0, // zasubq0 |
| 97031 | 0, // zasubq1 |
| 97032 | 0, // zasubs0 |
| 97033 | 0, // zasubs1 |
| 97034 | 452, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97035 | 452, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97036 | 452, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97037 | 452, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97038 | 452, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97039 | 452, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97040 | 0, // zasubd1_then_zasubq0 |
| 97041 | 0, // zasubd1_then_zasubq1 |
| 97042 | 0, // zasubs1_then_zasubd0 |
| 97043 | 0, // zasubs1_then_zasubd1 |
| 97044 | 0, // zasubs1_then_zasubq0 |
| 97045 | 0, // zasubs1_then_zasubq1 |
| 97046 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97047 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97048 | 0, // zasubh1_then_zasubd0 |
| 97049 | 0, // zasubh1_then_zasubd1 |
| 97050 | 0, // zasubh1_then_zasubq0 |
| 97051 | 0, // zasubh1_then_zasubq1 |
| 97052 | 0, // zasubh1_then_zasubs0 |
| 97053 | 0, // zasubh1_then_zasubs1 |
| 97054 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97055 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97056 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97057 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97058 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97059 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97060 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97061 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97062 | 452, // dsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97063 | 452, // dsub1_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97064 | 452, // dsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97065 | 452, // dsub1_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97066 | 452, // dsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97067 | 452, // dsub1_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97068 | 452, // dsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97069 | 452, // dsub3_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97070 | 452, // dsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97071 | 452, // dsub3_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97072 | 452, // dsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97073 | 452, // dsub3_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97074 | 452, // dsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97075 | 452, // dsub2_then_bsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97076 | 452, // dsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97077 | 452, // dsub2_then_hsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97078 | 452, // dsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97079 | 452, // dsub2_then_ssub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97080 | 0, // psub1_then_psub |
| 97081 | 452, // qsub1_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97082 | 452, // qsub3_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97083 | 452, // qsub2_then_dsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97084 | 0, // x8sub_7_then_sub_32 |
| 97085 | 0, // x8sub_7_then_sub_32_hi |
| 97086 | 0, // x8sub_6_then_sub_32 |
| 97087 | 0, // x8sub_6_then_sub_32_hi |
| 97088 | 0, // x8sub_5_then_sub_32 |
| 97089 | 0, // x8sub_5_then_sub_32_hi |
| 97090 | 0, // x8sub_4_then_sub_32 |
| 97091 | 0, // x8sub_4_then_sub_32_hi |
| 97092 | 0, // x8sub_3_then_sub_32 |
| 97093 | 0, // x8sub_3_then_sub_32_hi |
| 97094 | 0, // x8sub_2_then_sub_32 |
| 97095 | 0, // x8sub_2_then_sub_32_hi |
| 97096 | 0, // x8sub_1_then_sub_32 |
| 97097 | 0, // x8sub_1_then_sub_32_hi |
| 97098 | 0, // subo64_then_sub_32 |
| 97099 | 0, // subo64_then_sub_32_hi |
| 97100 | 452, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97101 | 452, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97102 | 452, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97103 | 0, // dsub0_dsub1 |
| 97104 | 0, // dsub0_dsub1_dsub2 |
| 97105 | 452, // dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97106 | 452, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97107 | 452, // dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97108 | 452, // dsub_dsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97109 | 452, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97110 | 452, // dsub_dsub1_dsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97111 | 0, // qsub0_qsub1 |
| 97112 | 0, // qsub0_qsub1_qsub2 |
| 97113 | 452, // qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97114 | 452, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97115 | 452, // qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97116 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97117 | 0, // x8sub_0_x8sub_1 |
| 97118 | 0, // x8sub_2_x8sub_3 |
| 97119 | 0, // x8sub_4_x8sub_5 |
| 97120 | 0, // x8sub_6_x8sub_7 |
| 97121 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97122 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97123 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97124 | 0, // sub_32_subo64_then_sub_32 |
| 97125 | 452, // zsub_qsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97126 | 452, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97127 | 452, // zsub_qsub1_qsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97128 | 452, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97129 | 452, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97130 | 452, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97131 | 452, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97132 | 452, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97133 | 0, // zsub0_zsub2 |
| 97134 | 0, // zsub1_zsub3 |
| 97135 | }, |
| 97136 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97137 | 453, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97138 | 453, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97139 | 453, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97140 | 0, // dsub0 |
| 97141 | 453, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97142 | 453, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97143 | 453, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97144 | 453, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97145 | 453, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97146 | 453, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97147 | 0, // psub |
| 97148 | 0, // psub0 |
| 97149 | 0, // psub1 |
| 97150 | 0, // qsub0 |
| 97151 | 453, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97152 | 453, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97153 | 453, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97154 | 453, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97155 | 453, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97156 | 0, // sub_32 |
| 97157 | 0, // sub_32_hi |
| 97158 | 0, // sube32 |
| 97159 | 0, // sube64 |
| 97160 | 0, // subo32 |
| 97161 | 0, // subo64 |
| 97162 | 0, // x8sub_0 |
| 97163 | 0, // x8sub_1 |
| 97164 | 0, // x8sub_2 |
| 97165 | 0, // x8sub_3 |
| 97166 | 0, // x8sub_4 |
| 97167 | 0, // x8sub_5 |
| 97168 | 0, // x8sub_6 |
| 97169 | 0, // x8sub_7 |
| 97170 | 0, // zasubb |
| 97171 | 0, // zasubd0 |
| 97172 | 0, // zasubd1 |
| 97173 | 0, // zasubh0 |
| 97174 | 0, // zasubh1 |
| 97175 | 0, // zasubq0 |
| 97176 | 0, // zasubq1 |
| 97177 | 0, // zasubs0 |
| 97178 | 0, // zasubs1 |
| 97179 | 453, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97180 | 453, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97181 | 453, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97182 | 453, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97183 | 453, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97184 | 453, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97185 | 0, // zasubd1_then_zasubq0 |
| 97186 | 0, // zasubd1_then_zasubq1 |
| 97187 | 0, // zasubs1_then_zasubd0 |
| 97188 | 0, // zasubs1_then_zasubd1 |
| 97189 | 0, // zasubs1_then_zasubq0 |
| 97190 | 0, // zasubs1_then_zasubq1 |
| 97191 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97192 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97193 | 0, // zasubh1_then_zasubd0 |
| 97194 | 0, // zasubh1_then_zasubd1 |
| 97195 | 0, // zasubh1_then_zasubq0 |
| 97196 | 0, // zasubh1_then_zasubq1 |
| 97197 | 0, // zasubh1_then_zasubs0 |
| 97198 | 0, // zasubh1_then_zasubs1 |
| 97199 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97200 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97201 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97202 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97203 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97204 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97205 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97206 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97207 | 453, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97208 | 453, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97209 | 453, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97210 | 453, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97211 | 453, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97212 | 453, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97213 | 453, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97214 | 453, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97215 | 453, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97216 | 453, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97217 | 453, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97218 | 453, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97219 | 453, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97220 | 453, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97221 | 453, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97222 | 453, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97223 | 453, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97224 | 453, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97225 | 0, // psub1_then_psub |
| 97226 | 453, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97227 | 453, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97228 | 453, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97229 | 0, // x8sub_7_then_sub_32 |
| 97230 | 0, // x8sub_7_then_sub_32_hi |
| 97231 | 0, // x8sub_6_then_sub_32 |
| 97232 | 0, // x8sub_6_then_sub_32_hi |
| 97233 | 0, // x8sub_5_then_sub_32 |
| 97234 | 0, // x8sub_5_then_sub_32_hi |
| 97235 | 0, // x8sub_4_then_sub_32 |
| 97236 | 0, // x8sub_4_then_sub_32_hi |
| 97237 | 0, // x8sub_3_then_sub_32 |
| 97238 | 0, // x8sub_3_then_sub_32_hi |
| 97239 | 0, // x8sub_2_then_sub_32 |
| 97240 | 0, // x8sub_2_then_sub_32_hi |
| 97241 | 0, // x8sub_1_then_sub_32 |
| 97242 | 0, // x8sub_1_then_sub_32_hi |
| 97243 | 0, // subo64_then_sub_32 |
| 97244 | 0, // subo64_then_sub_32_hi |
| 97245 | 453, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97246 | 453, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97247 | 453, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97248 | 0, // dsub0_dsub1 |
| 97249 | 0, // dsub0_dsub1_dsub2 |
| 97250 | 453, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97251 | 453, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97252 | 453, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97253 | 453, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97254 | 453, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97255 | 453, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97256 | 0, // qsub0_qsub1 |
| 97257 | 0, // qsub0_qsub1_qsub2 |
| 97258 | 453, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97259 | 453, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97260 | 453, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97261 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97262 | 0, // x8sub_0_x8sub_1 |
| 97263 | 0, // x8sub_2_x8sub_3 |
| 97264 | 0, // x8sub_4_x8sub_5 |
| 97265 | 0, // x8sub_6_x8sub_7 |
| 97266 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97267 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97268 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97269 | 0, // sub_32_subo64_then_sub_32 |
| 97270 | 453, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97271 | 453, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97272 | 453, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97273 | 453, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97274 | 453, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97275 | 453, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97276 | 453, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97277 | 453, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 97278 | 0, // zsub0_zsub2 |
| 97279 | 0, // zsub1_zsub3 |
| 97280 | }, |
| 97281 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97282 | 454, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97283 | 454, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97284 | 454, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97285 | 0, // dsub0 |
| 97286 | 454, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97287 | 454, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97288 | 454, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97289 | 454, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97290 | 454, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97291 | 454, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97292 | 0, // psub |
| 97293 | 0, // psub0 |
| 97294 | 0, // psub1 |
| 97295 | 0, // qsub0 |
| 97296 | 454, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97297 | 454, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97298 | 454, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97299 | 454, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97300 | 454, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97301 | 0, // sub_32 |
| 97302 | 0, // sub_32_hi |
| 97303 | 0, // sube32 |
| 97304 | 0, // sube64 |
| 97305 | 0, // subo32 |
| 97306 | 0, // subo64 |
| 97307 | 0, // x8sub_0 |
| 97308 | 0, // x8sub_1 |
| 97309 | 0, // x8sub_2 |
| 97310 | 0, // x8sub_3 |
| 97311 | 0, // x8sub_4 |
| 97312 | 0, // x8sub_5 |
| 97313 | 0, // x8sub_6 |
| 97314 | 0, // x8sub_7 |
| 97315 | 0, // zasubb |
| 97316 | 0, // zasubd0 |
| 97317 | 0, // zasubd1 |
| 97318 | 0, // zasubh0 |
| 97319 | 0, // zasubh1 |
| 97320 | 0, // zasubq0 |
| 97321 | 0, // zasubq1 |
| 97322 | 0, // zasubs0 |
| 97323 | 0, // zasubs1 |
| 97324 | 454, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97325 | 454, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97326 | 454, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97327 | 454, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97328 | 454, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97329 | 454, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97330 | 0, // zasubd1_then_zasubq0 |
| 97331 | 0, // zasubd1_then_zasubq1 |
| 97332 | 0, // zasubs1_then_zasubd0 |
| 97333 | 0, // zasubs1_then_zasubd1 |
| 97334 | 0, // zasubs1_then_zasubq0 |
| 97335 | 0, // zasubs1_then_zasubq1 |
| 97336 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97337 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97338 | 0, // zasubh1_then_zasubd0 |
| 97339 | 0, // zasubh1_then_zasubd1 |
| 97340 | 0, // zasubh1_then_zasubq0 |
| 97341 | 0, // zasubh1_then_zasubq1 |
| 97342 | 0, // zasubh1_then_zasubs0 |
| 97343 | 0, // zasubh1_then_zasubs1 |
| 97344 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97345 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97346 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97347 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97348 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97349 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97350 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97351 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97352 | 454, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97353 | 454, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97354 | 454, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97355 | 454, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97356 | 454, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97357 | 454, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97358 | 454, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97359 | 454, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97360 | 454, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97361 | 454, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97362 | 454, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97363 | 454, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97364 | 454, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97365 | 454, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97366 | 454, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97367 | 454, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97368 | 454, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97369 | 454, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97370 | 0, // psub1_then_psub |
| 97371 | 454, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97372 | 454, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97373 | 454, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97374 | 0, // x8sub_7_then_sub_32 |
| 97375 | 0, // x8sub_7_then_sub_32_hi |
| 97376 | 0, // x8sub_6_then_sub_32 |
| 97377 | 0, // x8sub_6_then_sub_32_hi |
| 97378 | 0, // x8sub_5_then_sub_32 |
| 97379 | 0, // x8sub_5_then_sub_32_hi |
| 97380 | 0, // x8sub_4_then_sub_32 |
| 97381 | 0, // x8sub_4_then_sub_32_hi |
| 97382 | 0, // x8sub_3_then_sub_32 |
| 97383 | 0, // x8sub_3_then_sub_32_hi |
| 97384 | 0, // x8sub_2_then_sub_32 |
| 97385 | 0, // x8sub_2_then_sub_32_hi |
| 97386 | 0, // x8sub_1_then_sub_32 |
| 97387 | 0, // x8sub_1_then_sub_32_hi |
| 97388 | 0, // subo64_then_sub_32 |
| 97389 | 0, // subo64_then_sub_32_hi |
| 97390 | 454, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97391 | 454, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97392 | 454, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97393 | 0, // dsub0_dsub1 |
| 97394 | 0, // dsub0_dsub1_dsub2 |
| 97395 | 454, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97396 | 454, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97397 | 454, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97398 | 454, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97399 | 454, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97400 | 454, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97401 | 0, // qsub0_qsub1 |
| 97402 | 0, // qsub0_qsub1_qsub2 |
| 97403 | 454, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97404 | 454, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97405 | 454, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97406 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97407 | 0, // x8sub_0_x8sub_1 |
| 97408 | 0, // x8sub_2_x8sub_3 |
| 97409 | 0, // x8sub_4_x8sub_5 |
| 97410 | 0, // x8sub_6_x8sub_7 |
| 97411 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97412 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97413 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97414 | 0, // sub_32_subo64_then_sub_32 |
| 97415 | 454, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97416 | 454, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97417 | 454, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97418 | 454, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97419 | 454, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97420 | 454, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97421 | 454, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97422 | 454, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 97423 | 0, // zsub0_zsub2 |
| 97424 | 0, // zsub1_zsub3 |
| 97425 | }, |
| 97426 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97427 | 455, // bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97428 | 455, // bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97429 | 455, // dsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97430 | 0, // dsub0 |
| 97431 | 455, // dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97432 | 455, // dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97433 | 455, // dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97434 | 455, // dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97435 | 455, // hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97436 | 455, // hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97437 | 0, // psub |
| 97438 | 0, // psub0 |
| 97439 | 0, // psub1 |
| 97440 | 0, // qsub0 |
| 97441 | 455, // qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97442 | 455, // qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97443 | 455, // qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97444 | 455, // ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97445 | 455, // ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97446 | 0, // sub_32 |
| 97447 | 0, // sub_32_hi |
| 97448 | 0, // sube32 |
| 97449 | 0, // sube64 |
| 97450 | 0, // subo32 |
| 97451 | 0, // subo64 |
| 97452 | 0, // x8sub_0 |
| 97453 | 0, // x8sub_1 |
| 97454 | 0, // x8sub_2 |
| 97455 | 0, // x8sub_3 |
| 97456 | 0, // x8sub_4 |
| 97457 | 0, // x8sub_5 |
| 97458 | 0, // x8sub_6 |
| 97459 | 0, // x8sub_7 |
| 97460 | 0, // zasubb |
| 97461 | 0, // zasubd0 |
| 97462 | 0, // zasubd1 |
| 97463 | 0, // zasubh0 |
| 97464 | 0, // zasubh1 |
| 97465 | 0, // zasubq0 |
| 97466 | 0, // zasubq1 |
| 97467 | 0, // zasubs0 |
| 97468 | 0, // zasubs1 |
| 97469 | 455, // zsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97470 | 455, // zsub0 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97471 | 455, // zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97472 | 455, // zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97473 | 455, // zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97474 | 455, // zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97475 | 0, // zasubd1_then_zasubq0 |
| 97476 | 0, // zasubd1_then_zasubq1 |
| 97477 | 0, // zasubs1_then_zasubd0 |
| 97478 | 0, // zasubs1_then_zasubd1 |
| 97479 | 0, // zasubs1_then_zasubq0 |
| 97480 | 0, // zasubs1_then_zasubq1 |
| 97481 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97482 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97483 | 0, // zasubh1_then_zasubd0 |
| 97484 | 0, // zasubh1_then_zasubd1 |
| 97485 | 0, // zasubh1_then_zasubq0 |
| 97486 | 0, // zasubh1_then_zasubq1 |
| 97487 | 0, // zasubh1_then_zasubs0 |
| 97488 | 0, // zasubh1_then_zasubs1 |
| 97489 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97490 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97491 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97492 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97493 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97494 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97495 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97496 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97497 | 455, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97498 | 455, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97499 | 455, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97500 | 455, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97501 | 455, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97502 | 455, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97503 | 455, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97504 | 455, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97505 | 455, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97506 | 455, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97507 | 455, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97508 | 455, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97509 | 455, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97510 | 455, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97511 | 455, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97512 | 455, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97513 | 455, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97514 | 455, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97515 | 0, // psub1_then_psub |
| 97516 | 455, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97517 | 455, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97518 | 455, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97519 | 0, // x8sub_7_then_sub_32 |
| 97520 | 0, // x8sub_7_then_sub_32_hi |
| 97521 | 0, // x8sub_6_then_sub_32 |
| 97522 | 0, // x8sub_6_then_sub_32_hi |
| 97523 | 0, // x8sub_5_then_sub_32 |
| 97524 | 0, // x8sub_5_then_sub_32_hi |
| 97525 | 0, // x8sub_4_then_sub_32 |
| 97526 | 0, // x8sub_4_then_sub_32_hi |
| 97527 | 0, // x8sub_3_then_sub_32 |
| 97528 | 0, // x8sub_3_then_sub_32_hi |
| 97529 | 0, // x8sub_2_then_sub_32 |
| 97530 | 0, // x8sub_2_then_sub_32_hi |
| 97531 | 0, // x8sub_1_then_sub_32 |
| 97532 | 0, // x8sub_1_then_sub_32_hi |
| 97533 | 0, // subo64_then_sub_32 |
| 97534 | 0, // subo64_then_sub_32_hi |
| 97535 | 455, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97536 | 455, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97537 | 455, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97538 | 0, // dsub0_dsub1 |
| 97539 | 0, // dsub0_dsub1_dsub2 |
| 97540 | 455, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97541 | 455, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97542 | 455, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97543 | 455, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97544 | 455, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97545 | 455, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97546 | 0, // qsub0_qsub1 |
| 97547 | 0, // qsub0_qsub1_qsub2 |
| 97548 | 455, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97549 | 455, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97550 | 455, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97551 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97552 | 0, // x8sub_0_x8sub_1 |
| 97553 | 0, // x8sub_2_x8sub_3 |
| 97554 | 0, // x8sub_4_x8sub_5 |
| 97555 | 0, // x8sub_6_x8sub_7 |
| 97556 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97557 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97558 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97559 | 0, // sub_32_subo64_then_sub_32 |
| 97560 | 455, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97561 | 455, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97562 | 455, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97563 | 455, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97564 | 455, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97565 | 455, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97566 | 455, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97567 | 455, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 97568 | 0, // zsub0_zsub2 |
| 97569 | 0, // zsub1_zsub3 |
| 97570 | }, |
| 97571 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97572 | 456, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97573 | 456, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97574 | 456, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97575 | 0, // dsub0 |
| 97576 | 456, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97577 | 456, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97578 | 456, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97579 | 456, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97580 | 456, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97581 | 456, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97582 | 0, // psub |
| 97583 | 0, // psub0 |
| 97584 | 0, // psub1 |
| 97585 | 0, // qsub0 |
| 97586 | 456, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97587 | 456, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97588 | 456, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97589 | 456, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97590 | 456, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97591 | 0, // sub_32 |
| 97592 | 0, // sub_32_hi |
| 97593 | 0, // sube32 |
| 97594 | 0, // sube64 |
| 97595 | 0, // subo32 |
| 97596 | 0, // subo64 |
| 97597 | 0, // x8sub_0 |
| 97598 | 0, // x8sub_1 |
| 97599 | 0, // x8sub_2 |
| 97600 | 0, // x8sub_3 |
| 97601 | 0, // x8sub_4 |
| 97602 | 0, // x8sub_5 |
| 97603 | 0, // x8sub_6 |
| 97604 | 0, // x8sub_7 |
| 97605 | 0, // zasubb |
| 97606 | 0, // zasubd0 |
| 97607 | 0, // zasubd1 |
| 97608 | 0, // zasubh0 |
| 97609 | 0, // zasubh1 |
| 97610 | 0, // zasubq0 |
| 97611 | 0, // zasubq1 |
| 97612 | 0, // zasubs0 |
| 97613 | 0, // zasubs1 |
| 97614 | 456, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97615 | 456, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97616 | 456, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97617 | 456, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97618 | 456, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97619 | 456, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97620 | 0, // zasubd1_then_zasubq0 |
| 97621 | 0, // zasubd1_then_zasubq1 |
| 97622 | 0, // zasubs1_then_zasubd0 |
| 97623 | 0, // zasubs1_then_zasubd1 |
| 97624 | 0, // zasubs1_then_zasubq0 |
| 97625 | 0, // zasubs1_then_zasubq1 |
| 97626 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97627 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97628 | 0, // zasubh1_then_zasubd0 |
| 97629 | 0, // zasubh1_then_zasubd1 |
| 97630 | 0, // zasubh1_then_zasubq0 |
| 97631 | 0, // zasubh1_then_zasubq1 |
| 97632 | 0, // zasubh1_then_zasubs0 |
| 97633 | 0, // zasubh1_then_zasubs1 |
| 97634 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97635 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97636 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97637 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97638 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97639 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97640 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97641 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97642 | 456, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97643 | 456, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97644 | 456, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97645 | 456, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97646 | 456, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97647 | 456, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97648 | 456, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97649 | 456, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97650 | 456, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97651 | 456, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97652 | 456, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97653 | 456, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97654 | 456, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97655 | 456, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97656 | 456, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97657 | 456, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97658 | 456, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97659 | 456, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97660 | 0, // psub1_then_psub |
| 97661 | 456, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97662 | 456, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97663 | 456, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97664 | 0, // x8sub_7_then_sub_32 |
| 97665 | 0, // x8sub_7_then_sub_32_hi |
| 97666 | 0, // x8sub_6_then_sub_32 |
| 97667 | 0, // x8sub_6_then_sub_32_hi |
| 97668 | 0, // x8sub_5_then_sub_32 |
| 97669 | 0, // x8sub_5_then_sub_32_hi |
| 97670 | 0, // x8sub_4_then_sub_32 |
| 97671 | 0, // x8sub_4_then_sub_32_hi |
| 97672 | 0, // x8sub_3_then_sub_32 |
| 97673 | 0, // x8sub_3_then_sub_32_hi |
| 97674 | 0, // x8sub_2_then_sub_32 |
| 97675 | 0, // x8sub_2_then_sub_32_hi |
| 97676 | 0, // x8sub_1_then_sub_32 |
| 97677 | 0, // x8sub_1_then_sub_32_hi |
| 97678 | 0, // subo64_then_sub_32 |
| 97679 | 0, // subo64_then_sub_32_hi |
| 97680 | 456, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97681 | 456, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97682 | 456, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97683 | 0, // dsub0_dsub1 |
| 97684 | 0, // dsub0_dsub1_dsub2 |
| 97685 | 456, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97686 | 456, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97687 | 456, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97688 | 456, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97689 | 456, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97690 | 456, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97691 | 0, // qsub0_qsub1 |
| 97692 | 0, // qsub0_qsub1_qsub2 |
| 97693 | 456, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97694 | 456, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97695 | 456, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97696 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97697 | 0, // x8sub_0_x8sub_1 |
| 97698 | 0, // x8sub_2_x8sub_3 |
| 97699 | 0, // x8sub_4_x8sub_5 |
| 97700 | 0, // x8sub_6_x8sub_7 |
| 97701 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97702 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97703 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97704 | 0, // sub_32_subo64_then_sub_32 |
| 97705 | 456, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97706 | 456, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97707 | 456, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97708 | 456, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97709 | 456, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97710 | 456, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97711 | 456, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97712 | 456, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 97713 | 0, // zsub0_zsub2 |
| 97714 | 0, // zsub1_zsub3 |
| 97715 | }, |
| 97716 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97717 | 457, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97718 | 457, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97719 | 457, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97720 | 0, // dsub0 |
| 97721 | 457, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97722 | 457, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97723 | 457, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97724 | 457, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97725 | 457, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97726 | 457, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97727 | 0, // psub |
| 97728 | 0, // psub0 |
| 97729 | 0, // psub1 |
| 97730 | 0, // qsub0 |
| 97731 | 457, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97732 | 457, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97733 | 457, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97734 | 457, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97735 | 457, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97736 | 0, // sub_32 |
| 97737 | 0, // sub_32_hi |
| 97738 | 0, // sube32 |
| 97739 | 0, // sube64 |
| 97740 | 0, // subo32 |
| 97741 | 0, // subo64 |
| 97742 | 0, // x8sub_0 |
| 97743 | 0, // x8sub_1 |
| 97744 | 0, // x8sub_2 |
| 97745 | 0, // x8sub_3 |
| 97746 | 0, // x8sub_4 |
| 97747 | 0, // x8sub_5 |
| 97748 | 0, // x8sub_6 |
| 97749 | 0, // x8sub_7 |
| 97750 | 0, // zasubb |
| 97751 | 0, // zasubd0 |
| 97752 | 0, // zasubd1 |
| 97753 | 0, // zasubh0 |
| 97754 | 0, // zasubh1 |
| 97755 | 0, // zasubq0 |
| 97756 | 0, // zasubq1 |
| 97757 | 0, // zasubs0 |
| 97758 | 0, // zasubs1 |
| 97759 | 457, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97760 | 457, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97761 | 457, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97762 | 457, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97763 | 457, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97764 | 457, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97765 | 0, // zasubd1_then_zasubq0 |
| 97766 | 0, // zasubd1_then_zasubq1 |
| 97767 | 0, // zasubs1_then_zasubd0 |
| 97768 | 0, // zasubs1_then_zasubd1 |
| 97769 | 0, // zasubs1_then_zasubq0 |
| 97770 | 0, // zasubs1_then_zasubq1 |
| 97771 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97772 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97773 | 0, // zasubh1_then_zasubd0 |
| 97774 | 0, // zasubh1_then_zasubd1 |
| 97775 | 0, // zasubh1_then_zasubq0 |
| 97776 | 0, // zasubh1_then_zasubq1 |
| 97777 | 0, // zasubh1_then_zasubs0 |
| 97778 | 0, // zasubh1_then_zasubs1 |
| 97779 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97780 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97781 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97782 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97783 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97784 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97785 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97786 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97787 | 457, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97788 | 457, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97789 | 457, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97790 | 457, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97791 | 457, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97792 | 457, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97793 | 457, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97794 | 457, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97795 | 457, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97796 | 457, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97797 | 457, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97798 | 457, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97799 | 457, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97800 | 457, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97801 | 457, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97802 | 457, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97803 | 457, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97804 | 457, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97805 | 0, // psub1_then_psub |
| 97806 | 457, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97807 | 457, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97808 | 457, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97809 | 0, // x8sub_7_then_sub_32 |
| 97810 | 0, // x8sub_7_then_sub_32_hi |
| 97811 | 0, // x8sub_6_then_sub_32 |
| 97812 | 0, // x8sub_6_then_sub_32_hi |
| 97813 | 0, // x8sub_5_then_sub_32 |
| 97814 | 0, // x8sub_5_then_sub_32_hi |
| 97815 | 0, // x8sub_4_then_sub_32 |
| 97816 | 0, // x8sub_4_then_sub_32_hi |
| 97817 | 0, // x8sub_3_then_sub_32 |
| 97818 | 0, // x8sub_3_then_sub_32_hi |
| 97819 | 0, // x8sub_2_then_sub_32 |
| 97820 | 0, // x8sub_2_then_sub_32_hi |
| 97821 | 0, // x8sub_1_then_sub_32 |
| 97822 | 0, // x8sub_1_then_sub_32_hi |
| 97823 | 0, // subo64_then_sub_32 |
| 97824 | 0, // subo64_then_sub_32_hi |
| 97825 | 457, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97826 | 457, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97827 | 457, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97828 | 0, // dsub0_dsub1 |
| 97829 | 0, // dsub0_dsub1_dsub2 |
| 97830 | 457, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97831 | 457, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97832 | 457, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97833 | 457, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97834 | 457, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97835 | 457, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97836 | 0, // qsub0_qsub1 |
| 97837 | 0, // qsub0_qsub1_qsub2 |
| 97838 | 457, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97839 | 457, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97840 | 457, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97841 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97842 | 0, // x8sub_0_x8sub_1 |
| 97843 | 0, // x8sub_2_x8sub_3 |
| 97844 | 0, // x8sub_4_x8sub_5 |
| 97845 | 0, // x8sub_6_x8sub_7 |
| 97846 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97847 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97848 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97849 | 0, // sub_32_subo64_then_sub_32 |
| 97850 | 457, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97851 | 457, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97852 | 457, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97853 | 457, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97854 | 457, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97855 | 457, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97856 | 457, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97857 | 457, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 97858 | 0, // zsub0_zsub2 |
| 97859 | 0, // zsub1_zsub3 |
| 97860 | }, |
| 97861 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97862 | 458, // bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97863 | 458, // bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97864 | 458, // dsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97865 | 0, // dsub0 |
| 97866 | 458, // dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97867 | 458, // dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97868 | 458, // dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97869 | 458, // dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97870 | 458, // hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97871 | 458, // hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97872 | 0, // psub |
| 97873 | 0, // psub0 |
| 97874 | 0, // psub1 |
| 97875 | 0, // qsub0 |
| 97876 | 458, // qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97877 | 458, // qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97878 | 458, // qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97879 | 458, // ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97880 | 458, // ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97881 | 0, // sub_32 |
| 97882 | 0, // sub_32_hi |
| 97883 | 0, // sube32 |
| 97884 | 0, // sube64 |
| 97885 | 0, // subo32 |
| 97886 | 0, // subo64 |
| 97887 | 0, // x8sub_0 |
| 97888 | 0, // x8sub_1 |
| 97889 | 0, // x8sub_2 |
| 97890 | 0, // x8sub_3 |
| 97891 | 0, // x8sub_4 |
| 97892 | 0, // x8sub_5 |
| 97893 | 0, // x8sub_6 |
| 97894 | 0, // x8sub_7 |
| 97895 | 0, // zasubb |
| 97896 | 0, // zasubd0 |
| 97897 | 0, // zasubd1 |
| 97898 | 0, // zasubh0 |
| 97899 | 0, // zasubh1 |
| 97900 | 0, // zasubq0 |
| 97901 | 0, // zasubq1 |
| 97902 | 0, // zasubs0 |
| 97903 | 0, // zasubs1 |
| 97904 | 458, // zsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97905 | 458, // zsub0 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97906 | 458, // zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97907 | 458, // zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97908 | 458, // zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97909 | 458, // zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97910 | 0, // zasubd1_then_zasubq0 |
| 97911 | 0, // zasubd1_then_zasubq1 |
| 97912 | 0, // zasubs1_then_zasubd0 |
| 97913 | 0, // zasubs1_then_zasubd1 |
| 97914 | 0, // zasubs1_then_zasubq0 |
| 97915 | 0, // zasubs1_then_zasubq1 |
| 97916 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 97917 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 97918 | 0, // zasubh1_then_zasubd0 |
| 97919 | 0, // zasubh1_then_zasubd1 |
| 97920 | 0, // zasubh1_then_zasubq0 |
| 97921 | 0, // zasubh1_then_zasubq1 |
| 97922 | 0, // zasubh1_then_zasubs0 |
| 97923 | 0, // zasubh1_then_zasubs1 |
| 97924 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 97925 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 97926 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 97927 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 97928 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 97929 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 97930 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 97931 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 97932 | 458, // dsub1_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97933 | 458, // dsub1_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97934 | 458, // dsub1_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97935 | 458, // dsub1_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97936 | 458, // dsub1_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97937 | 458, // dsub1_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97938 | 458, // dsub3_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97939 | 458, // dsub3_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97940 | 458, // dsub3_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97941 | 458, // dsub3_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97942 | 458, // dsub3_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97943 | 458, // dsub3_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97944 | 458, // dsub2_then_bsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97945 | 458, // dsub2_then_bsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97946 | 458, // dsub2_then_hsub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97947 | 458, // dsub2_then_hsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97948 | 458, // dsub2_then_ssub -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97949 | 458, // dsub2_then_ssub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97950 | 0, // psub1_then_psub |
| 97951 | 458, // qsub1_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97952 | 458, // qsub3_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97953 | 458, // qsub2_then_dsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97954 | 0, // x8sub_7_then_sub_32 |
| 97955 | 0, // x8sub_7_then_sub_32_hi |
| 97956 | 0, // x8sub_6_then_sub_32 |
| 97957 | 0, // x8sub_6_then_sub_32_hi |
| 97958 | 0, // x8sub_5_then_sub_32 |
| 97959 | 0, // x8sub_5_then_sub_32_hi |
| 97960 | 0, // x8sub_4_then_sub_32 |
| 97961 | 0, // x8sub_4_then_sub_32_hi |
| 97962 | 0, // x8sub_3_then_sub_32 |
| 97963 | 0, // x8sub_3_then_sub_32_hi |
| 97964 | 0, // x8sub_2_then_sub_32 |
| 97965 | 0, // x8sub_2_then_sub_32_hi |
| 97966 | 0, // x8sub_1_then_sub_32 |
| 97967 | 0, // x8sub_1_then_sub_32_hi |
| 97968 | 0, // subo64_then_sub_32 |
| 97969 | 0, // subo64_then_sub_32_hi |
| 97970 | 458, // zsub1_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97971 | 458, // zsub3_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97972 | 458, // zsub2_then_zsub_hi -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97973 | 0, // dsub0_dsub1 |
| 97974 | 0, // dsub0_dsub1_dsub2 |
| 97975 | 458, // dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97976 | 458, // dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97977 | 458, // dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97978 | 458, // dsub_dsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97979 | 458, // dsub_dsub1_dsub2_dsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97980 | 458, // dsub_dsub1_dsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97981 | 0, // qsub0_qsub1 |
| 97982 | 0, // qsub0_qsub1_qsub2 |
| 97983 | 458, // qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97984 | 458, // qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97985 | 458, // qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97986 | 0, // sub_32_x8sub_1_then_sub_32 |
| 97987 | 0, // x8sub_0_x8sub_1 |
| 97988 | 0, // x8sub_2_x8sub_3 |
| 97989 | 0, // x8sub_4_x8sub_5 |
| 97990 | 0, // x8sub_6_x8sub_7 |
| 97991 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 97992 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 97993 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 97994 | 0, // sub_32_subo64_then_sub_32 |
| 97995 | 458, // zsub_qsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97996 | 458, // zsub_qsub1_qsub2_qsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97997 | 458, // zsub_qsub1_qsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97998 | 458, // zsub0_zsub1 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 97999 | 458, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 98000 | 458, // zsub1_zsub2 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 98001 | 458, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 98002 | 458, // zsub2_zsub3 -> ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 98003 | 0, // zsub0_zsub2 |
| 98004 | 0, // zsub1_zsub3 |
| 98005 | }, |
| 98006 | { // GPR64x8Class |
| 98007 | 0, // bsub |
| 98008 | 0, // bsub_hi |
| 98009 | 0, // dsub |
| 98010 | 0, // dsub0 |
| 98011 | 0, // dsub1 |
| 98012 | 0, // dsub2 |
| 98013 | 0, // dsub3 |
| 98014 | 0, // dsub_hi |
| 98015 | 0, // hsub |
| 98016 | 0, // hsub_hi |
| 98017 | 0, // psub |
| 98018 | 0, // psub0 |
| 98019 | 0, // psub1 |
| 98020 | 0, // qsub0 |
| 98021 | 0, // qsub1 |
| 98022 | 0, // qsub2 |
| 98023 | 0, // qsub3 |
| 98024 | 0, // ssub |
| 98025 | 0, // ssub_hi |
| 98026 | 459, // sub_32 -> GPR64x8Class |
| 98027 | 459, // sub_32_hi -> GPR64x8Class |
| 98028 | 0, // sube32 |
| 98029 | 0, // sube64 |
| 98030 | 0, // subo32 |
| 98031 | 0, // subo64 |
| 98032 | 459, // x8sub_0 -> GPR64x8Class |
| 98033 | 459, // x8sub_1 -> GPR64x8Class |
| 98034 | 459, // x8sub_2 -> GPR64x8Class |
| 98035 | 459, // x8sub_3 -> GPR64x8Class |
| 98036 | 459, // x8sub_4 -> GPR64x8Class |
| 98037 | 459, // x8sub_5 -> GPR64x8Class |
| 98038 | 459, // x8sub_6 -> GPR64x8Class |
| 98039 | 459, // x8sub_7 -> GPR64x8Class |
| 98040 | 0, // zasubb |
| 98041 | 0, // zasubd0 |
| 98042 | 0, // zasubd1 |
| 98043 | 0, // zasubh0 |
| 98044 | 0, // zasubh1 |
| 98045 | 0, // zasubq0 |
| 98046 | 0, // zasubq1 |
| 98047 | 0, // zasubs0 |
| 98048 | 0, // zasubs1 |
| 98049 | 0, // zsub |
| 98050 | 0, // zsub0 |
| 98051 | 0, // zsub1 |
| 98052 | 0, // zsub2 |
| 98053 | 0, // zsub3 |
| 98054 | 0, // zsub_hi |
| 98055 | 0, // zasubd1_then_zasubq0 |
| 98056 | 0, // zasubd1_then_zasubq1 |
| 98057 | 0, // zasubs1_then_zasubd0 |
| 98058 | 0, // zasubs1_then_zasubd1 |
| 98059 | 0, // zasubs1_then_zasubq0 |
| 98060 | 0, // zasubs1_then_zasubq1 |
| 98061 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98062 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98063 | 0, // zasubh1_then_zasubd0 |
| 98064 | 0, // zasubh1_then_zasubd1 |
| 98065 | 0, // zasubh1_then_zasubq0 |
| 98066 | 0, // zasubh1_then_zasubq1 |
| 98067 | 0, // zasubh1_then_zasubs0 |
| 98068 | 0, // zasubh1_then_zasubs1 |
| 98069 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98070 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98071 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98072 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98073 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98074 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98075 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98076 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98077 | 0, // dsub1_then_bsub |
| 98078 | 0, // dsub1_then_bsub_hi |
| 98079 | 0, // dsub1_then_hsub |
| 98080 | 0, // dsub1_then_hsub_hi |
| 98081 | 0, // dsub1_then_ssub |
| 98082 | 0, // dsub1_then_ssub_hi |
| 98083 | 0, // dsub3_then_bsub |
| 98084 | 0, // dsub3_then_bsub_hi |
| 98085 | 0, // dsub3_then_hsub |
| 98086 | 0, // dsub3_then_hsub_hi |
| 98087 | 0, // dsub3_then_ssub |
| 98088 | 0, // dsub3_then_ssub_hi |
| 98089 | 0, // dsub2_then_bsub |
| 98090 | 0, // dsub2_then_bsub_hi |
| 98091 | 0, // dsub2_then_hsub |
| 98092 | 0, // dsub2_then_hsub_hi |
| 98093 | 0, // dsub2_then_ssub |
| 98094 | 0, // dsub2_then_ssub_hi |
| 98095 | 0, // psub1_then_psub |
| 98096 | 0, // qsub1_then_dsub_hi |
| 98097 | 0, // qsub3_then_dsub_hi |
| 98098 | 0, // qsub2_then_dsub_hi |
| 98099 | 459, // x8sub_7_then_sub_32 -> GPR64x8Class |
| 98100 | 459, // x8sub_7_then_sub_32_hi -> GPR64x8Class |
| 98101 | 459, // x8sub_6_then_sub_32 -> GPR64x8Class |
| 98102 | 459, // x8sub_6_then_sub_32_hi -> GPR64x8Class |
| 98103 | 459, // x8sub_5_then_sub_32 -> GPR64x8Class |
| 98104 | 459, // x8sub_5_then_sub_32_hi -> GPR64x8Class |
| 98105 | 459, // x8sub_4_then_sub_32 -> GPR64x8Class |
| 98106 | 459, // x8sub_4_then_sub_32_hi -> GPR64x8Class |
| 98107 | 459, // x8sub_3_then_sub_32 -> GPR64x8Class |
| 98108 | 459, // x8sub_3_then_sub_32_hi -> GPR64x8Class |
| 98109 | 459, // x8sub_2_then_sub_32 -> GPR64x8Class |
| 98110 | 459, // x8sub_2_then_sub_32_hi -> GPR64x8Class |
| 98111 | 459, // x8sub_1_then_sub_32 -> GPR64x8Class |
| 98112 | 459, // x8sub_1_then_sub_32_hi -> GPR64x8Class |
| 98113 | 0, // subo64_then_sub_32 |
| 98114 | 0, // subo64_then_sub_32_hi |
| 98115 | 0, // zsub1_then_zsub_hi |
| 98116 | 0, // zsub3_then_zsub_hi |
| 98117 | 0, // zsub2_then_zsub_hi |
| 98118 | 0, // dsub0_dsub1 |
| 98119 | 0, // dsub0_dsub1_dsub2 |
| 98120 | 0, // dsub1_dsub2 |
| 98121 | 0, // dsub1_dsub2_dsub3 |
| 98122 | 0, // dsub2_dsub3 |
| 98123 | 0, // dsub_dsub1 |
| 98124 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98125 | 0, // dsub_dsub1_dsub2 |
| 98126 | 0, // qsub0_qsub1 |
| 98127 | 0, // qsub0_qsub1_qsub2 |
| 98128 | 0, // qsub1_qsub2 |
| 98129 | 0, // qsub1_qsub2_qsub3 |
| 98130 | 0, // qsub2_qsub3 |
| 98131 | 459, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class |
| 98132 | 459, // x8sub_0_x8sub_1 -> GPR64x8Class |
| 98133 | 459, // x8sub_2_x8sub_3 -> GPR64x8Class |
| 98134 | 459, // x8sub_4_x8sub_5 -> GPR64x8Class |
| 98135 | 459, // x8sub_6_x8sub_7 -> GPR64x8Class |
| 98136 | 459, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class |
| 98137 | 459, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class |
| 98138 | 459, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class |
| 98139 | 0, // sub_32_subo64_then_sub_32 |
| 98140 | 0, // zsub_qsub1 |
| 98141 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98142 | 0, // zsub_qsub1_qsub2 |
| 98143 | 0, // zsub0_zsub1 |
| 98144 | 0, // zsub0_zsub1_zsub2 |
| 98145 | 0, // zsub1_zsub2 |
| 98146 | 0, // zsub1_zsub2_zsub3 |
| 98147 | 0, // zsub2_zsub3 |
| 98148 | 0, // zsub0_zsub2 |
| 98149 | 0, // zsub1_zsub3 |
| 98150 | }, |
| 98151 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98152 | 0, // bsub |
| 98153 | 0, // bsub_hi |
| 98154 | 0, // dsub |
| 98155 | 0, // dsub0 |
| 98156 | 0, // dsub1 |
| 98157 | 0, // dsub2 |
| 98158 | 0, // dsub3 |
| 98159 | 0, // dsub_hi |
| 98160 | 0, // hsub |
| 98161 | 0, // hsub_hi |
| 98162 | 0, // psub |
| 98163 | 0, // psub0 |
| 98164 | 0, // psub1 |
| 98165 | 0, // qsub0 |
| 98166 | 0, // qsub1 |
| 98167 | 0, // qsub2 |
| 98168 | 0, // qsub3 |
| 98169 | 0, // ssub |
| 98170 | 0, // ssub_hi |
| 98171 | 460, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98172 | 460, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98173 | 0, // sube32 |
| 98174 | 0, // sube64 |
| 98175 | 0, // subo32 |
| 98176 | 0, // subo64 |
| 98177 | 460, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98178 | 460, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98179 | 460, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98180 | 460, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98181 | 460, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98182 | 460, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98183 | 460, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98184 | 460, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98185 | 0, // zasubb |
| 98186 | 0, // zasubd0 |
| 98187 | 0, // zasubd1 |
| 98188 | 0, // zasubh0 |
| 98189 | 0, // zasubh1 |
| 98190 | 0, // zasubq0 |
| 98191 | 0, // zasubq1 |
| 98192 | 0, // zasubs0 |
| 98193 | 0, // zasubs1 |
| 98194 | 0, // zsub |
| 98195 | 0, // zsub0 |
| 98196 | 0, // zsub1 |
| 98197 | 0, // zsub2 |
| 98198 | 0, // zsub3 |
| 98199 | 0, // zsub_hi |
| 98200 | 0, // zasubd1_then_zasubq0 |
| 98201 | 0, // zasubd1_then_zasubq1 |
| 98202 | 0, // zasubs1_then_zasubd0 |
| 98203 | 0, // zasubs1_then_zasubd1 |
| 98204 | 0, // zasubs1_then_zasubq0 |
| 98205 | 0, // zasubs1_then_zasubq1 |
| 98206 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98207 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98208 | 0, // zasubh1_then_zasubd0 |
| 98209 | 0, // zasubh1_then_zasubd1 |
| 98210 | 0, // zasubh1_then_zasubq0 |
| 98211 | 0, // zasubh1_then_zasubq1 |
| 98212 | 0, // zasubh1_then_zasubs0 |
| 98213 | 0, // zasubh1_then_zasubs1 |
| 98214 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98215 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98216 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98217 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98218 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98219 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98220 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98221 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98222 | 0, // dsub1_then_bsub |
| 98223 | 0, // dsub1_then_bsub_hi |
| 98224 | 0, // dsub1_then_hsub |
| 98225 | 0, // dsub1_then_hsub_hi |
| 98226 | 0, // dsub1_then_ssub |
| 98227 | 0, // dsub1_then_ssub_hi |
| 98228 | 0, // dsub3_then_bsub |
| 98229 | 0, // dsub3_then_bsub_hi |
| 98230 | 0, // dsub3_then_hsub |
| 98231 | 0, // dsub3_then_hsub_hi |
| 98232 | 0, // dsub3_then_ssub |
| 98233 | 0, // dsub3_then_ssub_hi |
| 98234 | 0, // dsub2_then_bsub |
| 98235 | 0, // dsub2_then_bsub_hi |
| 98236 | 0, // dsub2_then_hsub |
| 98237 | 0, // dsub2_then_hsub_hi |
| 98238 | 0, // dsub2_then_ssub |
| 98239 | 0, // dsub2_then_ssub_hi |
| 98240 | 0, // psub1_then_psub |
| 98241 | 0, // qsub1_then_dsub_hi |
| 98242 | 0, // qsub3_then_dsub_hi |
| 98243 | 0, // qsub2_then_dsub_hi |
| 98244 | 460, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98245 | 460, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98246 | 460, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98247 | 460, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98248 | 460, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98249 | 460, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98250 | 460, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98251 | 460, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98252 | 460, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98253 | 460, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98254 | 460, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98255 | 460, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98256 | 460, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98257 | 460, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98258 | 0, // subo64_then_sub_32 |
| 98259 | 0, // subo64_then_sub_32_hi |
| 98260 | 0, // zsub1_then_zsub_hi |
| 98261 | 0, // zsub3_then_zsub_hi |
| 98262 | 0, // zsub2_then_zsub_hi |
| 98263 | 0, // dsub0_dsub1 |
| 98264 | 0, // dsub0_dsub1_dsub2 |
| 98265 | 0, // dsub1_dsub2 |
| 98266 | 0, // dsub1_dsub2_dsub3 |
| 98267 | 0, // dsub2_dsub3 |
| 98268 | 0, // dsub_dsub1 |
| 98269 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98270 | 0, // dsub_dsub1_dsub2 |
| 98271 | 0, // qsub0_qsub1 |
| 98272 | 0, // qsub0_qsub1_qsub2 |
| 98273 | 0, // qsub1_qsub2 |
| 98274 | 0, // qsub1_qsub2_qsub3 |
| 98275 | 0, // qsub2_qsub3 |
| 98276 | 460, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98277 | 460, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98278 | 460, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98279 | 460, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98280 | 460, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98281 | 460, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98282 | 460, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98283 | 460, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 98284 | 0, // sub_32_subo64_then_sub_32 |
| 98285 | 0, // zsub_qsub1 |
| 98286 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98287 | 0, // zsub_qsub1_qsub2 |
| 98288 | 0, // zsub0_zsub1 |
| 98289 | 0, // zsub0_zsub1_zsub2 |
| 98290 | 0, // zsub1_zsub2 |
| 98291 | 0, // zsub1_zsub2_zsub3 |
| 98292 | 0, // zsub2_zsub3 |
| 98293 | 0, // zsub0_zsub2 |
| 98294 | 0, // zsub1_zsub3 |
| 98295 | }, |
| 98296 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98297 | 0, // bsub |
| 98298 | 0, // bsub_hi |
| 98299 | 0, // dsub |
| 98300 | 0, // dsub0 |
| 98301 | 0, // dsub1 |
| 98302 | 0, // dsub2 |
| 98303 | 0, // dsub3 |
| 98304 | 0, // dsub_hi |
| 98305 | 0, // hsub |
| 98306 | 0, // hsub_hi |
| 98307 | 0, // psub |
| 98308 | 0, // psub0 |
| 98309 | 0, // psub1 |
| 98310 | 0, // qsub0 |
| 98311 | 0, // qsub1 |
| 98312 | 0, // qsub2 |
| 98313 | 0, // qsub3 |
| 98314 | 0, // ssub |
| 98315 | 0, // ssub_hi |
| 98316 | 461, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98317 | 461, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98318 | 0, // sube32 |
| 98319 | 0, // sube64 |
| 98320 | 0, // subo32 |
| 98321 | 0, // subo64 |
| 98322 | 461, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98323 | 461, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98324 | 461, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98325 | 461, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98326 | 461, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98327 | 461, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98328 | 461, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98329 | 461, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98330 | 0, // zasubb |
| 98331 | 0, // zasubd0 |
| 98332 | 0, // zasubd1 |
| 98333 | 0, // zasubh0 |
| 98334 | 0, // zasubh1 |
| 98335 | 0, // zasubq0 |
| 98336 | 0, // zasubq1 |
| 98337 | 0, // zasubs0 |
| 98338 | 0, // zasubs1 |
| 98339 | 0, // zsub |
| 98340 | 0, // zsub0 |
| 98341 | 0, // zsub1 |
| 98342 | 0, // zsub2 |
| 98343 | 0, // zsub3 |
| 98344 | 0, // zsub_hi |
| 98345 | 0, // zasubd1_then_zasubq0 |
| 98346 | 0, // zasubd1_then_zasubq1 |
| 98347 | 0, // zasubs1_then_zasubd0 |
| 98348 | 0, // zasubs1_then_zasubd1 |
| 98349 | 0, // zasubs1_then_zasubq0 |
| 98350 | 0, // zasubs1_then_zasubq1 |
| 98351 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98352 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98353 | 0, // zasubh1_then_zasubd0 |
| 98354 | 0, // zasubh1_then_zasubd1 |
| 98355 | 0, // zasubh1_then_zasubq0 |
| 98356 | 0, // zasubh1_then_zasubq1 |
| 98357 | 0, // zasubh1_then_zasubs0 |
| 98358 | 0, // zasubh1_then_zasubs1 |
| 98359 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98360 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98361 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98362 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98363 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98364 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98365 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98366 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98367 | 0, // dsub1_then_bsub |
| 98368 | 0, // dsub1_then_bsub_hi |
| 98369 | 0, // dsub1_then_hsub |
| 98370 | 0, // dsub1_then_hsub_hi |
| 98371 | 0, // dsub1_then_ssub |
| 98372 | 0, // dsub1_then_ssub_hi |
| 98373 | 0, // dsub3_then_bsub |
| 98374 | 0, // dsub3_then_bsub_hi |
| 98375 | 0, // dsub3_then_hsub |
| 98376 | 0, // dsub3_then_hsub_hi |
| 98377 | 0, // dsub3_then_ssub |
| 98378 | 0, // dsub3_then_ssub_hi |
| 98379 | 0, // dsub2_then_bsub |
| 98380 | 0, // dsub2_then_bsub_hi |
| 98381 | 0, // dsub2_then_hsub |
| 98382 | 0, // dsub2_then_hsub_hi |
| 98383 | 0, // dsub2_then_ssub |
| 98384 | 0, // dsub2_then_ssub_hi |
| 98385 | 0, // psub1_then_psub |
| 98386 | 0, // qsub1_then_dsub_hi |
| 98387 | 0, // qsub3_then_dsub_hi |
| 98388 | 0, // qsub2_then_dsub_hi |
| 98389 | 461, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98390 | 461, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98391 | 461, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98392 | 461, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98393 | 461, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98394 | 461, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98395 | 461, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98396 | 461, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98397 | 461, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98398 | 461, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98399 | 461, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98400 | 461, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98401 | 461, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98402 | 461, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98403 | 0, // subo64_then_sub_32 |
| 98404 | 0, // subo64_then_sub_32_hi |
| 98405 | 0, // zsub1_then_zsub_hi |
| 98406 | 0, // zsub3_then_zsub_hi |
| 98407 | 0, // zsub2_then_zsub_hi |
| 98408 | 0, // dsub0_dsub1 |
| 98409 | 0, // dsub0_dsub1_dsub2 |
| 98410 | 0, // dsub1_dsub2 |
| 98411 | 0, // dsub1_dsub2_dsub3 |
| 98412 | 0, // dsub2_dsub3 |
| 98413 | 0, // dsub_dsub1 |
| 98414 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98415 | 0, // dsub_dsub1_dsub2 |
| 98416 | 0, // qsub0_qsub1 |
| 98417 | 0, // qsub0_qsub1_qsub2 |
| 98418 | 0, // qsub1_qsub2 |
| 98419 | 0, // qsub1_qsub2_qsub3 |
| 98420 | 0, // qsub2_qsub3 |
| 98421 | 461, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98422 | 461, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98423 | 461, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98424 | 461, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98425 | 461, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98426 | 461, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98427 | 461, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98428 | 461, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98429 | 0, // sub_32_subo64_then_sub_32 |
| 98430 | 0, // zsub_qsub1 |
| 98431 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98432 | 0, // zsub_qsub1_qsub2 |
| 98433 | 0, // zsub0_zsub1 |
| 98434 | 0, // zsub0_zsub1_zsub2 |
| 98435 | 0, // zsub1_zsub2 |
| 98436 | 0, // zsub1_zsub2_zsub3 |
| 98437 | 0, // zsub2_zsub3 |
| 98438 | 0, // zsub0_zsub2 |
| 98439 | 0, // zsub1_zsub3 |
| 98440 | }, |
| 98441 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98442 | 0, // bsub |
| 98443 | 0, // bsub_hi |
| 98444 | 0, // dsub |
| 98445 | 0, // dsub0 |
| 98446 | 0, // dsub1 |
| 98447 | 0, // dsub2 |
| 98448 | 0, // dsub3 |
| 98449 | 0, // dsub_hi |
| 98450 | 0, // hsub |
| 98451 | 0, // hsub_hi |
| 98452 | 0, // psub |
| 98453 | 0, // psub0 |
| 98454 | 0, // psub1 |
| 98455 | 0, // qsub0 |
| 98456 | 0, // qsub1 |
| 98457 | 0, // qsub2 |
| 98458 | 0, // qsub3 |
| 98459 | 0, // ssub |
| 98460 | 0, // ssub_hi |
| 98461 | 462, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98462 | 462, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98463 | 0, // sube32 |
| 98464 | 0, // sube64 |
| 98465 | 0, // subo32 |
| 98466 | 0, // subo64 |
| 98467 | 462, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98468 | 462, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98469 | 462, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98470 | 462, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98471 | 462, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98472 | 462, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98473 | 462, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98474 | 462, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98475 | 0, // zasubb |
| 98476 | 0, // zasubd0 |
| 98477 | 0, // zasubd1 |
| 98478 | 0, // zasubh0 |
| 98479 | 0, // zasubh1 |
| 98480 | 0, // zasubq0 |
| 98481 | 0, // zasubq1 |
| 98482 | 0, // zasubs0 |
| 98483 | 0, // zasubs1 |
| 98484 | 0, // zsub |
| 98485 | 0, // zsub0 |
| 98486 | 0, // zsub1 |
| 98487 | 0, // zsub2 |
| 98488 | 0, // zsub3 |
| 98489 | 0, // zsub_hi |
| 98490 | 0, // zasubd1_then_zasubq0 |
| 98491 | 0, // zasubd1_then_zasubq1 |
| 98492 | 0, // zasubs1_then_zasubd0 |
| 98493 | 0, // zasubs1_then_zasubd1 |
| 98494 | 0, // zasubs1_then_zasubq0 |
| 98495 | 0, // zasubs1_then_zasubq1 |
| 98496 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98497 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98498 | 0, // zasubh1_then_zasubd0 |
| 98499 | 0, // zasubh1_then_zasubd1 |
| 98500 | 0, // zasubh1_then_zasubq0 |
| 98501 | 0, // zasubh1_then_zasubq1 |
| 98502 | 0, // zasubh1_then_zasubs0 |
| 98503 | 0, // zasubh1_then_zasubs1 |
| 98504 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98505 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98506 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98507 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98508 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98509 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98510 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98511 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98512 | 0, // dsub1_then_bsub |
| 98513 | 0, // dsub1_then_bsub_hi |
| 98514 | 0, // dsub1_then_hsub |
| 98515 | 0, // dsub1_then_hsub_hi |
| 98516 | 0, // dsub1_then_ssub |
| 98517 | 0, // dsub1_then_ssub_hi |
| 98518 | 0, // dsub3_then_bsub |
| 98519 | 0, // dsub3_then_bsub_hi |
| 98520 | 0, // dsub3_then_hsub |
| 98521 | 0, // dsub3_then_hsub_hi |
| 98522 | 0, // dsub3_then_ssub |
| 98523 | 0, // dsub3_then_ssub_hi |
| 98524 | 0, // dsub2_then_bsub |
| 98525 | 0, // dsub2_then_bsub_hi |
| 98526 | 0, // dsub2_then_hsub |
| 98527 | 0, // dsub2_then_hsub_hi |
| 98528 | 0, // dsub2_then_ssub |
| 98529 | 0, // dsub2_then_ssub_hi |
| 98530 | 0, // psub1_then_psub |
| 98531 | 0, // qsub1_then_dsub_hi |
| 98532 | 0, // qsub3_then_dsub_hi |
| 98533 | 0, // qsub2_then_dsub_hi |
| 98534 | 462, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98535 | 462, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98536 | 462, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98537 | 462, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98538 | 462, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98539 | 462, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98540 | 462, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98541 | 462, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98542 | 462, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98543 | 462, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98544 | 462, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98545 | 462, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98546 | 462, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98547 | 462, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98548 | 0, // subo64_then_sub_32 |
| 98549 | 0, // subo64_then_sub_32_hi |
| 98550 | 0, // zsub1_then_zsub_hi |
| 98551 | 0, // zsub3_then_zsub_hi |
| 98552 | 0, // zsub2_then_zsub_hi |
| 98553 | 0, // dsub0_dsub1 |
| 98554 | 0, // dsub0_dsub1_dsub2 |
| 98555 | 0, // dsub1_dsub2 |
| 98556 | 0, // dsub1_dsub2_dsub3 |
| 98557 | 0, // dsub2_dsub3 |
| 98558 | 0, // dsub_dsub1 |
| 98559 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98560 | 0, // dsub_dsub1_dsub2 |
| 98561 | 0, // qsub0_qsub1 |
| 98562 | 0, // qsub0_qsub1_qsub2 |
| 98563 | 0, // qsub1_qsub2 |
| 98564 | 0, // qsub1_qsub2_qsub3 |
| 98565 | 0, // qsub2_qsub3 |
| 98566 | 462, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98567 | 462, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98568 | 462, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98569 | 462, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98570 | 462, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98571 | 462, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98572 | 462, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98573 | 462, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98574 | 0, // sub_32_subo64_then_sub_32 |
| 98575 | 0, // zsub_qsub1 |
| 98576 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98577 | 0, // zsub_qsub1_qsub2 |
| 98578 | 0, // zsub0_zsub1 |
| 98579 | 0, // zsub0_zsub1_zsub2 |
| 98580 | 0, // zsub1_zsub2 |
| 98581 | 0, // zsub1_zsub2_zsub3 |
| 98582 | 0, // zsub2_zsub3 |
| 98583 | 0, // zsub0_zsub2 |
| 98584 | 0, // zsub1_zsub3 |
| 98585 | }, |
| 98586 | { // GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98587 | 0, // bsub |
| 98588 | 0, // bsub_hi |
| 98589 | 0, // dsub |
| 98590 | 0, // dsub0 |
| 98591 | 0, // dsub1 |
| 98592 | 0, // dsub2 |
| 98593 | 0, // dsub3 |
| 98594 | 0, // dsub_hi |
| 98595 | 0, // hsub |
| 98596 | 0, // hsub_hi |
| 98597 | 0, // psub |
| 98598 | 0, // psub0 |
| 98599 | 0, // psub1 |
| 98600 | 0, // qsub0 |
| 98601 | 0, // qsub1 |
| 98602 | 0, // qsub2 |
| 98603 | 0, // qsub3 |
| 98604 | 0, // ssub |
| 98605 | 0, // ssub_hi |
| 98606 | 463, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98607 | 463, // sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98608 | 0, // sube32 |
| 98609 | 0, // sube64 |
| 98610 | 0, // subo32 |
| 98611 | 0, // subo64 |
| 98612 | 463, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98613 | 463, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98614 | 463, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98615 | 463, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98616 | 463, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98617 | 463, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98618 | 463, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98619 | 463, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98620 | 0, // zasubb |
| 98621 | 0, // zasubd0 |
| 98622 | 0, // zasubd1 |
| 98623 | 0, // zasubh0 |
| 98624 | 0, // zasubh1 |
| 98625 | 0, // zasubq0 |
| 98626 | 0, // zasubq1 |
| 98627 | 0, // zasubs0 |
| 98628 | 0, // zasubs1 |
| 98629 | 0, // zsub |
| 98630 | 0, // zsub0 |
| 98631 | 0, // zsub1 |
| 98632 | 0, // zsub2 |
| 98633 | 0, // zsub3 |
| 98634 | 0, // zsub_hi |
| 98635 | 0, // zasubd1_then_zasubq0 |
| 98636 | 0, // zasubd1_then_zasubq1 |
| 98637 | 0, // zasubs1_then_zasubd0 |
| 98638 | 0, // zasubs1_then_zasubd1 |
| 98639 | 0, // zasubs1_then_zasubq0 |
| 98640 | 0, // zasubs1_then_zasubq1 |
| 98641 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98642 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98643 | 0, // zasubh1_then_zasubd0 |
| 98644 | 0, // zasubh1_then_zasubd1 |
| 98645 | 0, // zasubh1_then_zasubq0 |
| 98646 | 0, // zasubh1_then_zasubq1 |
| 98647 | 0, // zasubh1_then_zasubs0 |
| 98648 | 0, // zasubh1_then_zasubs1 |
| 98649 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98650 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98651 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98652 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98653 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98654 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98655 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98656 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98657 | 0, // dsub1_then_bsub |
| 98658 | 0, // dsub1_then_bsub_hi |
| 98659 | 0, // dsub1_then_hsub |
| 98660 | 0, // dsub1_then_hsub_hi |
| 98661 | 0, // dsub1_then_ssub |
| 98662 | 0, // dsub1_then_ssub_hi |
| 98663 | 0, // dsub3_then_bsub |
| 98664 | 0, // dsub3_then_bsub_hi |
| 98665 | 0, // dsub3_then_hsub |
| 98666 | 0, // dsub3_then_hsub_hi |
| 98667 | 0, // dsub3_then_ssub |
| 98668 | 0, // dsub3_then_ssub_hi |
| 98669 | 0, // dsub2_then_bsub |
| 98670 | 0, // dsub2_then_bsub_hi |
| 98671 | 0, // dsub2_then_hsub |
| 98672 | 0, // dsub2_then_hsub_hi |
| 98673 | 0, // dsub2_then_ssub |
| 98674 | 0, // dsub2_then_ssub_hi |
| 98675 | 0, // psub1_then_psub |
| 98676 | 0, // qsub1_then_dsub_hi |
| 98677 | 0, // qsub3_then_dsub_hi |
| 98678 | 0, // qsub2_then_dsub_hi |
| 98679 | 463, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98680 | 463, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98681 | 463, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98682 | 463, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98683 | 463, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98684 | 463, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98685 | 463, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98686 | 463, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98687 | 463, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98688 | 463, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98689 | 463, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98690 | 463, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98691 | 463, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98692 | 463, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98693 | 0, // subo64_then_sub_32 |
| 98694 | 0, // subo64_then_sub_32_hi |
| 98695 | 0, // zsub1_then_zsub_hi |
| 98696 | 0, // zsub3_then_zsub_hi |
| 98697 | 0, // zsub2_then_zsub_hi |
| 98698 | 0, // dsub0_dsub1 |
| 98699 | 0, // dsub0_dsub1_dsub2 |
| 98700 | 0, // dsub1_dsub2 |
| 98701 | 0, // dsub1_dsub2_dsub3 |
| 98702 | 0, // dsub2_dsub3 |
| 98703 | 0, // dsub_dsub1 |
| 98704 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98705 | 0, // dsub_dsub1_dsub2 |
| 98706 | 0, // qsub0_qsub1 |
| 98707 | 0, // qsub0_qsub1_qsub2 |
| 98708 | 0, // qsub1_qsub2 |
| 98709 | 0, // qsub1_qsub2_qsub3 |
| 98710 | 0, // qsub2_qsub3 |
| 98711 | 463, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98712 | 463, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98713 | 463, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98714 | 463, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98715 | 463, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98716 | 463, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98717 | 463, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98718 | 463, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 98719 | 0, // sub_32_subo64_then_sub_32 |
| 98720 | 0, // zsub_qsub1 |
| 98721 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98722 | 0, // zsub_qsub1_qsub2 |
| 98723 | 0, // zsub0_zsub1 |
| 98724 | 0, // zsub0_zsub1_zsub2 |
| 98725 | 0, // zsub1_zsub2 |
| 98726 | 0, // zsub1_zsub2_zsub3 |
| 98727 | 0, // zsub2_zsub3 |
| 98728 | 0, // zsub0_zsub2 |
| 98729 | 0, // zsub1_zsub3 |
| 98730 | }, |
| 98731 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98732 | 0, // bsub |
| 98733 | 0, // bsub_hi |
| 98734 | 0, // dsub |
| 98735 | 0, // dsub0 |
| 98736 | 0, // dsub1 |
| 98737 | 0, // dsub2 |
| 98738 | 0, // dsub3 |
| 98739 | 0, // dsub_hi |
| 98740 | 0, // hsub |
| 98741 | 0, // hsub_hi |
| 98742 | 0, // psub |
| 98743 | 0, // psub0 |
| 98744 | 0, // psub1 |
| 98745 | 0, // qsub0 |
| 98746 | 0, // qsub1 |
| 98747 | 0, // qsub2 |
| 98748 | 0, // qsub3 |
| 98749 | 0, // ssub |
| 98750 | 0, // ssub_hi |
| 98751 | 464, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98752 | 464, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98753 | 0, // sube32 |
| 98754 | 0, // sube64 |
| 98755 | 0, // subo32 |
| 98756 | 0, // subo64 |
| 98757 | 464, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98758 | 464, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98759 | 464, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98760 | 464, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98761 | 464, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98762 | 464, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98763 | 464, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98764 | 464, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98765 | 0, // zasubb |
| 98766 | 0, // zasubd0 |
| 98767 | 0, // zasubd1 |
| 98768 | 0, // zasubh0 |
| 98769 | 0, // zasubh1 |
| 98770 | 0, // zasubq0 |
| 98771 | 0, // zasubq1 |
| 98772 | 0, // zasubs0 |
| 98773 | 0, // zasubs1 |
| 98774 | 0, // zsub |
| 98775 | 0, // zsub0 |
| 98776 | 0, // zsub1 |
| 98777 | 0, // zsub2 |
| 98778 | 0, // zsub3 |
| 98779 | 0, // zsub_hi |
| 98780 | 0, // zasubd1_then_zasubq0 |
| 98781 | 0, // zasubd1_then_zasubq1 |
| 98782 | 0, // zasubs1_then_zasubd0 |
| 98783 | 0, // zasubs1_then_zasubd1 |
| 98784 | 0, // zasubs1_then_zasubq0 |
| 98785 | 0, // zasubs1_then_zasubq1 |
| 98786 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98787 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98788 | 0, // zasubh1_then_zasubd0 |
| 98789 | 0, // zasubh1_then_zasubd1 |
| 98790 | 0, // zasubh1_then_zasubq0 |
| 98791 | 0, // zasubh1_then_zasubq1 |
| 98792 | 0, // zasubh1_then_zasubs0 |
| 98793 | 0, // zasubh1_then_zasubs1 |
| 98794 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98795 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98796 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98797 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98798 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98799 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98800 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98801 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98802 | 0, // dsub1_then_bsub |
| 98803 | 0, // dsub1_then_bsub_hi |
| 98804 | 0, // dsub1_then_hsub |
| 98805 | 0, // dsub1_then_hsub_hi |
| 98806 | 0, // dsub1_then_ssub |
| 98807 | 0, // dsub1_then_ssub_hi |
| 98808 | 0, // dsub3_then_bsub |
| 98809 | 0, // dsub3_then_bsub_hi |
| 98810 | 0, // dsub3_then_hsub |
| 98811 | 0, // dsub3_then_hsub_hi |
| 98812 | 0, // dsub3_then_ssub |
| 98813 | 0, // dsub3_then_ssub_hi |
| 98814 | 0, // dsub2_then_bsub |
| 98815 | 0, // dsub2_then_bsub_hi |
| 98816 | 0, // dsub2_then_hsub |
| 98817 | 0, // dsub2_then_hsub_hi |
| 98818 | 0, // dsub2_then_ssub |
| 98819 | 0, // dsub2_then_ssub_hi |
| 98820 | 0, // psub1_then_psub |
| 98821 | 0, // qsub1_then_dsub_hi |
| 98822 | 0, // qsub3_then_dsub_hi |
| 98823 | 0, // qsub2_then_dsub_hi |
| 98824 | 464, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98825 | 464, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98826 | 464, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98827 | 464, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98828 | 464, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98829 | 464, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98830 | 464, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98831 | 464, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98832 | 464, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98833 | 464, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98834 | 464, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98835 | 464, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98836 | 464, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98837 | 464, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98838 | 0, // subo64_then_sub_32 |
| 98839 | 0, // subo64_then_sub_32_hi |
| 98840 | 0, // zsub1_then_zsub_hi |
| 98841 | 0, // zsub3_then_zsub_hi |
| 98842 | 0, // zsub2_then_zsub_hi |
| 98843 | 0, // dsub0_dsub1 |
| 98844 | 0, // dsub0_dsub1_dsub2 |
| 98845 | 0, // dsub1_dsub2 |
| 98846 | 0, // dsub1_dsub2_dsub3 |
| 98847 | 0, // dsub2_dsub3 |
| 98848 | 0, // dsub_dsub1 |
| 98849 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98850 | 0, // dsub_dsub1_dsub2 |
| 98851 | 0, // qsub0_qsub1 |
| 98852 | 0, // qsub0_qsub1_qsub2 |
| 98853 | 0, // qsub1_qsub2 |
| 98854 | 0, // qsub1_qsub2_qsub3 |
| 98855 | 0, // qsub2_qsub3 |
| 98856 | 464, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98857 | 464, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98858 | 464, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98859 | 464, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98860 | 464, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98861 | 464, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98862 | 464, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98863 | 464, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 98864 | 0, // sub_32_subo64_then_sub_32 |
| 98865 | 0, // zsub_qsub1 |
| 98866 | 0, // zsub_qsub1_qsub2_qsub3 |
| 98867 | 0, // zsub_qsub1_qsub2 |
| 98868 | 0, // zsub0_zsub1 |
| 98869 | 0, // zsub0_zsub1_zsub2 |
| 98870 | 0, // zsub1_zsub2 |
| 98871 | 0, // zsub1_zsub2_zsub3 |
| 98872 | 0, // zsub2_zsub3 |
| 98873 | 0, // zsub0_zsub2 |
| 98874 | 0, // zsub1_zsub3 |
| 98875 | }, |
| 98876 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98877 | 0, // bsub |
| 98878 | 0, // bsub_hi |
| 98879 | 0, // dsub |
| 98880 | 0, // dsub0 |
| 98881 | 0, // dsub1 |
| 98882 | 0, // dsub2 |
| 98883 | 0, // dsub3 |
| 98884 | 0, // dsub_hi |
| 98885 | 0, // hsub |
| 98886 | 0, // hsub_hi |
| 98887 | 0, // psub |
| 98888 | 0, // psub0 |
| 98889 | 0, // psub1 |
| 98890 | 0, // qsub0 |
| 98891 | 0, // qsub1 |
| 98892 | 0, // qsub2 |
| 98893 | 0, // qsub3 |
| 98894 | 0, // ssub |
| 98895 | 0, // ssub_hi |
| 98896 | 465, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98897 | 465, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98898 | 0, // sube32 |
| 98899 | 0, // sube64 |
| 98900 | 0, // subo32 |
| 98901 | 0, // subo64 |
| 98902 | 465, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98903 | 465, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98904 | 465, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98905 | 465, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98906 | 465, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98907 | 465, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98908 | 465, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98909 | 465, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98910 | 0, // zasubb |
| 98911 | 0, // zasubd0 |
| 98912 | 0, // zasubd1 |
| 98913 | 0, // zasubh0 |
| 98914 | 0, // zasubh1 |
| 98915 | 0, // zasubq0 |
| 98916 | 0, // zasubq1 |
| 98917 | 0, // zasubs0 |
| 98918 | 0, // zasubs1 |
| 98919 | 0, // zsub |
| 98920 | 0, // zsub0 |
| 98921 | 0, // zsub1 |
| 98922 | 0, // zsub2 |
| 98923 | 0, // zsub3 |
| 98924 | 0, // zsub_hi |
| 98925 | 0, // zasubd1_then_zasubq0 |
| 98926 | 0, // zasubd1_then_zasubq1 |
| 98927 | 0, // zasubs1_then_zasubd0 |
| 98928 | 0, // zasubs1_then_zasubd1 |
| 98929 | 0, // zasubs1_then_zasubq0 |
| 98930 | 0, // zasubs1_then_zasubq1 |
| 98931 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 98932 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 98933 | 0, // zasubh1_then_zasubd0 |
| 98934 | 0, // zasubh1_then_zasubd1 |
| 98935 | 0, // zasubh1_then_zasubq0 |
| 98936 | 0, // zasubh1_then_zasubq1 |
| 98937 | 0, // zasubh1_then_zasubs0 |
| 98938 | 0, // zasubh1_then_zasubs1 |
| 98939 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 98940 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 98941 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 98942 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 98943 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 98944 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 98945 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 98946 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 98947 | 0, // dsub1_then_bsub |
| 98948 | 0, // dsub1_then_bsub_hi |
| 98949 | 0, // dsub1_then_hsub |
| 98950 | 0, // dsub1_then_hsub_hi |
| 98951 | 0, // dsub1_then_ssub |
| 98952 | 0, // dsub1_then_ssub_hi |
| 98953 | 0, // dsub3_then_bsub |
| 98954 | 0, // dsub3_then_bsub_hi |
| 98955 | 0, // dsub3_then_hsub |
| 98956 | 0, // dsub3_then_hsub_hi |
| 98957 | 0, // dsub3_then_ssub |
| 98958 | 0, // dsub3_then_ssub_hi |
| 98959 | 0, // dsub2_then_bsub |
| 98960 | 0, // dsub2_then_bsub_hi |
| 98961 | 0, // dsub2_then_hsub |
| 98962 | 0, // dsub2_then_hsub_hi |
| 98963 | 0, // dsub2_then_ssub |
| 98964 | 0, // dsub2_then_ssub_hi |
| 98965 | 0, // psub1_then_psub |
| 98966 | 0, // qsub1_then_dsub_hi |
| 98967 | 0, // qsub3_then_dsub_hi |
| 98968 | 0, // qsub2_then_dsub_hi |
| 98969 | 465, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98970 | 465, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98971 | 465, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98972 | 465, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98973 | 465, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98974 | 465, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98975 | 465, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98976 | 465, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98977 | 465, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98978 | 465, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98979 | 465, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98980 | 465, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98981 | 465, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98982 | 465, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 98983 | 0, // subo64_then_sub_32 |
| 98984 | 0, // subo64_then_sub_32_hi |
| 98985 | 0, // zsub1_then_zsub_hi |
| 98986 | 0, // zsub3_then_zsub_hi |
| 98987 | 0, // zsub2_then_zsub_hi |
| 98988 | 0, // dsub0_dsub1 |
| 98989 | 0, // dsub0_dsub1_dsub2 |
| 98990 | 0, // dsub1_dsub2 |
| 98991 | 0, // dsub1_dsub2_dsub3 |
| 98992 | 0, // dsub2_dsub3 |
| 98993 | 0, // dsub_dsub1 |
| 98994 | 0, // dsub_dsub1_dsub2_dsub3 |
| 98995 | 0, // dsub_dsub1_dsub2 |
| 98996 | 0, // qsub0_qsub1 |
| 98997 | 0, // qsub0_qsub1_qsub2 |
| 98998 | 0, // qsub1_qsub2 |
| 98999 | 0, // qsub1_qsub2_qsub3 |
| 99000 | 0, // qsub2_qsub3 |
| 99001 | 465, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99002 | 465, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99003 | 465, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99004 | 465, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99005 | 465, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99006 | 465, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99007 | 465, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99008 | 465, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99009 | 0, // sub_32_subo64_then_sub_32 |
| 99010 | 0, // zsub_qsub1 |
| 99011 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99012 | 0, // zsub_qsub1_qsub2 |
| 99013 | 0, // zsub0_zsub1 |
| 99014 | 0, // zsub0_zsub1_zsub2 |
| 99015 | 0, // zsub1_zsub2 |
| 99016 | 0, // zsub1_zsub2_zsub3 |
| 99017 | 0, // zsub2_zsub3 |
| 99018 | 0, // zsub0_zsub2 |
| 99019 | 0, // zsub1_zsub3 |
| 99020 | }, |
| 99021 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99022 | 0, // bsub |
| 99023 | 0, // bsub_hi |
| 99024 | 0, // dsub |
| 99025 | 0, // dsub0 |
| 99026 | 0, // dsub1 |
| 99027 | 0, // dsub2 |
| 99028 | 0, // dsub3 |
| 99029 | 0, // dsub_hi |
| 99030 | 0, // hsub |
| 99031 | 0, // hsub_hi |
| 99032 | 0, // psub |
| 99033 | 0, // psub0 |
| 99034 | 0, // psub1 |
| 99035 | 0, // qsub0 |
| 99036 | 0, // qsub1 |
| 99037 | 0, // qsub2 |
| 99038 | 0, // qsub3 |
| 99039 | 0, // ssub |
| 99040 | 0, // ssub_hi |
| 99041 | 466, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99042 | 466, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99043 | 0, // sube32 |
| 99044 | 0, // sube64 |
| 99045 | 0, // subo32 |
| 99046 | 0, // subo64 |
| 99047 | 466, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99048 | 466, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99049 | 466, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99050 | 466, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99051 | 466, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99052 | 466, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99053 | 466, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99054 | 466, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99055 | 0, // zasubb |
| 99056 | 0, // zasubd0 |
| 99057 | 0, // zasubd1 |
| 99058 | 0, // zasubh0 |
| 99059 | 0, // zasubh1 |
| 99060 | 0, // zasubq0 |
| 99061 | 0, // zasubq1 |
| 99062 | 0, // zasubs0 |
| 99063 | 0, // zasubs1 |
| 99064 | 0, // zsub |
| 99065 | 0, // zsub0 |
| 99066 | 0, // zsub1 |
| 99067 | 0, // zsub2 |
| 99068 | 0, // zsub3 |
| 99069 | 0, // zsub_hi |
| 99070 | 0, // zasubd1_then_zasubq0 |
| 99071 | 0, // zasubd1_then_zasubq1 |
| 99072 | 0, // zasubs1_then_zasubd0 |
| 99073 | 0, // zasubs1_then_zasubd1 |
| 99074 | 0, // zasubs1_then_zasubq0 |
| 99075 | 0, // zasubs1_then_zasubq1 |
| 99076 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99077 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99078 | 0, // zasubh1_then_zasubd0 |
| 99079 | 0, // zasubh1_then_zasubd1 |
| 99080 | 0, // zasubh1_then_zasubq0 |
| 99081 | 0, // zasubh1_then_zasubq1 |
| 99082 | 0, // zasubh1_then_zasubs0 |
| 99083 | 0, // zasubh1_then_zasubs1 |
| 99084 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99085 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99086 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99087 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99088 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99089 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99090 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99091 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99092 | 0, // dsub1_then_bsub |
| 99093 | 0, // dsub1_then_bsub_hi |
| 99094 | 0, // dsub1_then_hsub |
| 99095 | 0, // dsub1_then_hsub_hi |
| 99096 | 0, // dsub1_then_ssub |
| 99097 | 0, // dsub1_then_ssub_hi |
| 99098 | 0, // dsub3_then_bsub |
| 99099 | 0, // dsub3_then_bsub_hi |
| 99100 | 0, // dsub3_then_hsub |
| 99101 | 0, // dsub3_then_hsub_hi |
| 99102 | 0, // dsub3_then_ssub |
| 99103 | 0, // dsub3_then_ssub_hi |
| 99104 | 0, // dsub2_then_bsub |
| 99105 | 0, // dsub2_then_bsub_hi |
| 99106 | 0, // dsub2_then_hsub |
| 99107 | 0, // dsub2_then_hsub_hi |
| 99108 | 0, // dsub2_then_ssub |
| 99109 | 0, // dsub2_then_ssub_hi |
| 99110 | 0, // psub1_then_psub |
| 99111 | 0, // qsub1_then_dsub_hi |
| 99112 | 0, // qsub3_then_dsub_hi |
| 99113 | 0, // qsub2_then_dsub_hi |
| 99114 | 466, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99115 | 466, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99116 | 466, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99117 | 466, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99118 | 466, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99119 | 466, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99120 | 466, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99121 | 466, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99122 | 466, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99123 | 466, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99124 | 466, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99125 | 466, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99126 | 466, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99127 | 466, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99128 | 0, // subo64_then_sub_32 |
| 99129 | 0, // subo64_then_sub_32_hi |
| 99130 | 0, // zsub1_then_zsub_hi |
| 99131 | 0, // zsub3_then_zsub_hi |
| 99132 | 0, // zsub2_then_zsub_hi |
| 99133 | 0, // dsub0_dsub1 |
| 99134 | 0, // dsub0_dsub1_dsub2 |
| 99135 | 0, // dsub1_dsub2 |
| 99136 | 0, // dsub1_dsub2_dsub3 |
| 99137 | 0, // dsub2_dsub3 |
| 99138 | 0, // dsub_dsub1 |
| 99139 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99140 | 0, // dsub_dsub1_dsub2 |
| 99141 | 0, // qsub0_qsub1 |
| 99142 | 0, // qsub0_qsub1_qsub2 |
| 99143 | 0, // qsub1_qsub2 |
| 99144 | 0, // qsub1_qsub2_qsub3 |
| 99145 | 0, // qsub2_qsub3 |
| 99146 | 466, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99147 | 466, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99148 | 466, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99149 | 466, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99150 | 466, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99151 | 466, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99152 | 466, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99153 | 466, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99154 | 0, // sub_32_subo64_then_sub_32 |
| 99155 | 0, // zsub_qsub1 |
| 99156 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99157 | 0, // zsub_qsub1_qsub2 |
| 99158 | 0, // zsub0_zsub1 |
| 99159 | 0, // zsub0_zsub1_zsub2 |
| 99160 | 0, // zsub1_zsub2 |
| 99161 | 0, // zsub1_zsub2_zsub3 |
| 99162 | 0, // zsub2_zsub3 |
| 99163 | 0, // zsub0_zsub2 |
| 99164 | 0, // zsub1_zsub3 |
| 99165 | }, |
| 99166 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99167 | 0, // bsub |
| 99168 | 0, // bsub_hi |
| 99169 | 0, // dsub |
| 99170 | 0, // dsub0 |
| 99171 | 0, // dsub1 |
| 99172 | 0, // dsub2 |
| 99173 | 0, // dsub3 |
| 99174 | 0, // dsub_hi |
| 99175 | 0, // hsub |
| 99176 | 0, // hsub_hi |
| 99177 | 0, // psub |
| 99178 | 0, // psub0 |
| 99179 | 0, // psub1 |
| 99180 | 0, // qsub0 |
| 99181 | 0, // qsub1 |
| 99182 | 0, // qsub2 |
| 99183 | 0, // qsub3 |
| 99184 | 0, // ssub |
| 99185 | 0, // ssub_hi |
| 99186 | 467, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99187 | 467, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99188 | 0, // sube32 |
| 99189 | 0, // sube64 |
| 99190 | 0, // subo32 |
| 99191 | 0, // subo64 |
| 99192 | 467, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99193 | 467, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99194 | 467, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99195 | 467, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99196 | 467, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99197 | 467, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99198 | 467, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99199 | 467, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99200 | 0, // zasubb |
| 99201 | 0, // zasubd0 |
| 99202 | 0, // zasubd1 |
| 99203 | 0, // zasubh0 |
| 99204 | 0, // zasubh1 |
| 99205 | 0, // zasubq0 |
| 99206 | 0, // zasubq1 |
| 99207 | 0, // zasubs0 |
| 99208 | 0, // zasubs1 |
| 99209 | 0, // zsub |
| 99210 | 0, // zsub0 |
| 99211 | 0, // zsub1 |
| 99212 | 0, // zsub2 |
| 99213 | 0, // zsub3 |
| 99214 | 0, // zsub_hi |
| 99215 | 0, // zasubd1_then_zasubq0 |
| 99216 | 0, // zasubd1_then_zasubq1 |
| 99217 | 0, // zasubs1_then_zasubd0 |
| 99218 | 0, // zasubs1_then_zasubd1 |
| 99219 | 0, // zasubs1_then_zasubq0 |
| 99220 | 0, // zasubs1_then_zasubq1 |
| 99221 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99222 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99223 | 0, // zasubh1_then_zasubd0 |
| 99224 | 0, // zasubh1_then_zasubd1 |
| 99225 | 0, // zasubh1_then_zasubq0 |
| 99226 | 0, // zasubh1_then_zasubq1 |
| 99227 | 0, // zasubh1_then_zasubs0 |
| 99228 | 0, // zasubh1_then_zasubs1 |
| 99229 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99230 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99231 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99232 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99233 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99234 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99235 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99236 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99237 | 0, // dsub1_then_bsub |
| 99238 | 0, // dsub1_then_bsub_hi |
| 99239 | 0, // dsub1_then_hsub |
| 99240 | 0, // dsub1_then_hsub_hi |
| 99241 | 0, // dsub1_then_ssub |
| 99242 | 0, // dsub1_then_ssub_hi |
| 99243 | 0, // dsub3_then_bsub |
| 99244 | 0, // dsub3_then_bsub_hi |
| 99245 | 0, // dsub3_then_hsub |
| 99246 | 0, // dsub3_then_hsub_hi |
| 99247 | 0, // dsub3_then_ssub |
| 99248 | 0, // dsub3_then_ssub_hi |
| 99249 | 0, // dsub2_then_bsub |
| 99250 | 0, // dsub2_then_bsub_hi |
| 99251 | 0, // dsub2_then_hsub |
| 99252 | 0, // dsub2_then_hsub_hi |
| 99253 | 0, // dsub2_then_ssub |
| 99254 | 0, // dsub2_then_ssub_hi |
| 99255 | 0, // psub1_then_psub |
| 99256 | 0, // qsub1_then_dsub_hi |
| 99257 | 0, // qsub3_then_dsub_hi |
| 99258 | 0, // qsub2_then_dsub_hi |
| 99259 | 467, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99260 | 467, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99261 | 467, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99262 | 467, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99263 | 467, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99264 | 467, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99265 | 467, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99266 | 467, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99267 | 467, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99268 | 467, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99269 | 467, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99270 | 467, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99271 | 467, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99272 | 467, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99273 | 0, // subo64_then_sub_32 |
| 99274 | 0, // subo64_then_sub_32_hi |
| 99275 | 0, // zsub1_then_zsub_hi |
| 99276 | 0, // zsub3_then_zsub_hi |
| 99277 | 0, // zsub2_then_zsub_hi |
| 99278 | 0, // dsub0_dsub1 |
| 99279 | 0, // dsub0_dsub1_dsub2 |
| 99280 | 0, // dsub1_dsub2 |
| 99281 | 0, // dsub1_dsub2_dsub3 |
| 99282 | 0, // dsub2_dsub3 |
| 99283 | 0, // dsub_dsub1 |
| 99284 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99285 | 0, // dsub_dsub1_dsub2 |
| 99286 | 0, // qsub0_qsub1 |
| 99287 | 0, // qsub0_qsub1_qsub2 |
| 99288 | 0, // qsub1_qsub2 |
| 99289 | 0, // qsub1_qsub2_qsub3 |
| 99290 | 0, // qsub2_qsub3 |
| 99291 | 467, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99292 | 467, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99293 | 467, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99294 | 467, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99295 | 467, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99296 | 467, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99297 | 467, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99298 | 467, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 99299 | 0, // sub_32_subo64_then_sub_32 |
| 99300 | 0, // zsub_qsub1 |
| 99301 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99302 | 0, // zsub_qsub1_qsub2 |
| 99303 | 0, // zsub0_zsub1 |
| 99304 | 0, // zsub0_zsub1_zsub2 |
| 99305 | 0, // zsub1_zsub2 |
| 99306 | 0, // zsub1_zsub2_zsub3 |
| 99307 | 0, // zsub2_zsub3 |
| 99308 | 0, // zsub0_zsub2 |
| 99309 | 0, // zsub1_zsub3 |
| 99310 | }, |
| 99311 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99312 | 0, // bsub |
| 99313 | 0, // bsub_hi |
| 99314 | 0, // dsub |
| 99315 | 0, // dsub0 |
| 99316 | 0, // dsub1 |
| 99317 | 0, // dsub2 |
| 99318 | 0, // dsub3 |
| 99319 | 0, // dsub_hi |
| 99320 | 0, // hsub |
| 99321 | 0, // hsub_hi |
| 99322 | 0, // psub |
| 99323 | 0, // psub0 |
| 99324 | 0, // psub1 |
| 99325 | 0, // qsub0 |
| 99326 | 0, // qsub1 |
| 99327 | 0, // qsub2 |
| 99328 | 0, // qsub3 |
| 99329 | 0, // ssub |
| 99330 | 0, // ssub_hi |
| 99331 | 468, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99332 | 468, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99333 | 0, // sube32 |
| 99334 | 0, // sube64 |
| 99335 | 0, // subo32 |
| 99336 | 0, // subo64 |
| 99337 | 468, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99338 | 468, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99339 | 468, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99340 | 468, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99341 | 468, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99342 | 468, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99343 | 468, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99344 | 468, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99345 | 0, // zasubb |
| 99346 | 0, // zasubd0 |
| 99347 | 0, // zasubd1 |
| 99348 | 0, // zasubh0 |
| 99349 | 0, // zasubh1 |
| 99350 | 0, // zasubq0 |
| 99351 | 0, // zasubq1 |
| 99352 | 0, // zasubs0 |
| 99353 | 0, // zasubs1 |
| 99354 | 0, // zsub |
| 99355 | 0, // zsub0 |
| 99356 | 0, // zsub1 |
| 99357 | 0, // zsub2 |
| 99358 | 0, // zsub3 |
| 99359 | 0, // zsub_hi |
| 99360 | 0, // zasubd1_then_zasubq0 |
| 99361 | 0, // zasubd1_then_zasubq1 |
| 99362 | 0, // zasubs1_then_zasubd0 |
| 99363 | 0, // zasubs1_then_zasubd1 |
| 99364 | 0, // zasubs1_then_zasubq0 |
| 99365 | 0, // zasubs1_then_zasubq1 |
| 99366 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99367 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99368 | 0, // zasubh1_then_zasubd0 |
| 99369 | 0, // zasubh1_then_zasubd1 |
| 99370 | 0, // zasubh1_then_zasubq0 |
| 99371 | 0, // zasubh1_then_zasubq1 |
| 99372 | 0, // zasubh1_then_zasubs0 |
| 99373 | 0, // zasubh1_then_zasubs1 |
| 99374 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99375 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99376 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99377 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99378 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99379 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99380 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99381 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99382 | 0, // dsub1_then_bsub |
| 99383 | 0, // dsub1_then_bsub_hi |
| 99384 | 0, // dsub1_then_hsub |
| 99385 | 0, // dsub1_then_hsub_hi |
| 99386 | 0, // dsub1_then_ssub |
| 99387 | 0, // dsub1_then_ssub_hi |
| 99388 | 0, // dsub3_then_bsub |
| 99389 | 0, // dsub3_then_bsub_hi |
| 99390 | 0, // dsub3_then_hsub |
| 99391 | 0, // dsub3_then_hsub_hi |
| 99392 | 0, // dsub3_then_ssub |
| 99393 | 0, // dsub3_then_ssub_hi |
| 99394 | 0, // dsub2_then_bsub |
| 99395 | 0, // dsub2_then_bsub_hi |
| 99396 | 0, // dsub2_then_hsub |
| 99397 | 0, // dsub2_then_hsub_hi |
| 99398 | 0, // dsub2_then_ssub |
| 99399 | 0, // dsub2_then_ssub_hi |
| 99400 | 0, // psub1_then_psub |
| 99401 | 0, // qsub1_then_dsub_hi |
| 99402 | 0, // qsub3_then_dsub_hi |
| 99403 | 0, // qsub2_then_dsub_hi |
| 99404 | 468, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99405 | 468, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99406 | 468, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99407 | 468, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99408 | 468, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99409 | 468, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99410 | 468, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99411 | 468, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99412 | 468, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99413 | 468, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99414 | 468, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99415 | 468, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99416 | 468, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99417 | 468, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99418 | 0, // subo64_then_sub_32 |
| 99419 | 0, // subo64_then_sub_32_hi |
| 99420 | 0, // zsub1_then_zsub_hi |
| 99421 | 0, // zsub3_then_zsub_hi |
| 99422 | 0, // zsub2_then_zsub_hi |
| 99423 | 0, // dsub0_dsub1 |
| 99424 | 0, // dsub0_dsub1_dsub2 |
| 99425 | 0, // dsub1_dsub2 |
| 99426 | 0, // dsub1_dsub2_dsub3 |
| 99427 | 0, // dsub2_dsub3 |
| 99428 | 0, // dsub_dsub1 |
| 99429 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99430 | 0, // dsub_dsub1_dsub2 |
| 99431 | 0, // qsub0_qsub1 |
| 99432 | 0, // qsub0_qsub1_qsub2 |
| 99433 | 0, // qsub1_qsub2 |
| 99434 | 0, // qsub1_qsub2_qsub3 |
| 99435 | 0, // qsub2_qsub3 |
| 99436 | 468, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99437 | 468, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99438 | 468, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99439 | 468, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99440 | 468, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99441 | 468, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99442 | 468, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99443 | 468, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99444 | 0, // sub_32_subo64_then_sub_32 |
| 99445 | 0, // zsub_qsub1 |
| 99446 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99447 | 0, // zsub_qsub1_qsub2 |
| 99448 | 0, // zsub0_zsub1 |
| 99449 | 0, // zsub0_zsub1_zsub2 |
| 99450 | 0, // zsub1_zsub2 |
| 99451 | 0, // zsub1_zsub2_zsub3 |
| 99452 | 0, // zsub2_zsub3 |
| 99453 | 0, // zsub0_zsub2 |
| 99454 | 0, // zsub1_zsub3 |
| 99455 | }, |
| 99456 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99457 | 0, // bsub |
| 99458 | 0, // bsub_hi |
| 99459 | 0, // dsub |
| 99460 | 0, // dsub0 |
| 99461 | 0, // dsub1 |
| 99462 | 0, // dsub2 |
| 99463 | 0, // dsub3 |
| 99464 | 0, // dsub_hi |
| 99465 | 0, // hsub |
| 99466 | 0, // hsub_hi |
| 99467 | 0, // psub |
| 99468 | 0, // psub0 |
| 99469 | 0, // psub1 |
| 99470 | 0, // qsub0 |
| 99471 | 0, // qsub1 |
| 99472 | 0, // qsub2 |
| 99473 | 0, // qsub3 |
| 99474 | 0, // ssub |
| 99475 | 0, // ssub_hi |
| 99476 | 469, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99477 | 469, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99478 | 0, // sube32 |
| 99479 | 0, // sube64 |
| 99480 | 0, // subo32 |
| 99481 | 0, // subo64 |
| 99482 | 469, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99483 | 469, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99484 | 469, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99485 | 469, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99486 | 469, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99487 | 469, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99488 | 469, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99489 | 469, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99490 | 0, // zasubb |
| 99491 | 0, // zasubd0 |
| 99492 | 0, // zasubd1 |
| 99493 | 0, // zasubh0 |
| 99494 | 0, // zasubh1 |
| 99495 | 0, // zasubq0 |
| 99496 | 0, // zasubq1 |
| 99497 | 0, // zasubs0 |
| 99498 | 0, // zasubs1 |
| 99499 | 0, // zsub |
| 99500 | 0, // zsub0 |
| 99501 | 0, // zsub1 |
| 99502 | 0, // zsub2 |
| 99503 | 0, // zsub3 |
| 99504 | 0, // zsub_hi |
| 99505 | 0, // zasubd1_then_zasubq0 |
| 99506 | 0, // zasubd1_then_zasubq1 |
| 99507 | 0, // zasubs1_then_zasubd0 |
| 99508 | 0, // zasubs1_then_zasubd1 |
| 99509 | 0, // zasubs1_then_zasubq0 |
| 99510 | 0, // zasubs1_then_zasubq1 |
| 99511 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99512 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99513 | 0, // zasubh1_then_zasubd0 |
| 99514 | 0, // zasubh1_then_zasubd1 |
| 99515 | 0, // zasubh1_then_zasubq0 |
| 99516 | 0, // zasubh1_then_zasubq1 |
| 99517 | 0, // zasubh1_then_zasubs0 |
| 99518 | 0, // zasubh1_then_zasubs1 |
| 99519 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99520 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99521 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99522 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99523 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99524 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99525 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99526 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99527 | 0, // dsub1_then_bsub |
| 99528 | 0, // dsub1_then_bsub_hi |
| 99529 | 0, // dsub1_then_hsub |
| 99530 | 0, // dsub1_then_hsub_hi |
| 99531 | 0, // dsub1_then_ssub |
| 99532 | 0, // dsub1_then_ssub_hi |
| 99533 | 0, // dsub3_then_bsub |
| 99534 | 0, // dsub3_then_bsub_hi |
| 99535 | 0, // dsub3_then_hsub |
| 99536 | 0, // dsub3_then_hsub_hi |
| 99537 | 0, // dsub3_then_ssub |
| 99538 | 0, // dsub3_then_ssub_hi |
| 99539 | 0, // dsub2_then_bsub |
| 99540 | 0, // dsub2_then_bsub_hi |
| 99541 | 0, // dsub2_then_hsub |
| 99542 | 0, // dsub2_then_hsub_hi |
| 99543 | 0, // dsub2_then_ssub |
| 99544 | 0, // dsub2_then_ssub_hi |
| 99545 | 0, // psub1_then_psub |
| 99546 | 0, // qsub1_then_dsub_hi |
| 99547 | 0, // qsub3_then_dsub_hi |
| 99548 | 0, // qsub2_then_dsub_hi |
| 99549 | 469, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99550 | 469, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99551 | 469, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99552 | 469, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99553 | 469, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99554 | 469, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99555 | 469, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99556 | 469, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99557 | 469, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99558 | 469, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99559 | 469, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99560 | 469, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99561 | 469, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99562 | 469, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99563 | 0, // subo64_then_sub_32 |
| 99564 | 0, // subo64_then_sub_32_hi |
| 99565 | 0, // zsub1_then_zsub_hi |
| 99566 | 0, // zsub3_then_zsub_hi |
| 99567 | 0, // zsub2_then_zsub_hi |
| 99568 | 0, // dsub0_dsub1 |
| 99569 | 0, // dsub0_dsub1_dsub2 |
| 99570 | 0, // dsub1_dsub2 |
| 99571 | 0, // dsub1_dsub2_dsub3 |
| 99572 | 0, // dsub2_dsub3 |
| 99573 | 0, // dsub_dsub1 |
| 99574 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99575 | 0, // dsub_dsub1_dsub2 |
| 99576 | 0, // qsub0_qsub1 |
| 99577 | 0, // qsub0_qsub1_qsub2 |
| 99578 | 0, // qsub1_qsub2 |
| 99579 | 0, // qsub1_qsub2_qsub3 |
| 99580 | 0, // qsub2_qsub3 |
| 99581 | 469, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99582 | 469, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99583 | 469, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99584 | 469, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99585 | 469, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99586 | 469, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99587 | 469, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99588 | 469, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99589 | 0, // sub_32_subo64_then_sub_32 |
| 99590 | 0, // zsub_qsub1 |
| 99591 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99592 | 0, // zsub_qsub1_qsub2 |
| 99593 | 0, // zsub0_zsub1 |
| 99594 | 0, // zsub0_zsub1_zsub2 |
| 99595 | 0, // zsub1_zsub2 |
| 99596 | 0, // zsub1_zsub2_zsub3 |
| 99597 | 0, // zsub2_zsub3 |
| 99598 | 0, // zsub0_zsub2 |
| 99599 | 0, // zsub1_zsub3 |
| 99600 | }, |
| 99601 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99602 | 0, // bsub |
| 99603 | 0, // bsub_hi |
| 99604 | 0, // dsub |
| 99605 | 0, // dsub0 |
| 99606 | 0, // dsub1 |
| 99607 | 0, // dsub2 |
| 99608 | 0, // dsub3 |
| 99609 | 0, // dsub_hi |
| 99610 | 0, // hsub |
| 99611 | 0, // hsub_hi |
| 99612 | 0, // psub |
| 99613 | 0, // psub0 |
| 99614 | 0, // psub1 |
| 99615 | 0, // qsub0 |
| 99616 | 0, // qsub1 |
| 99617 | 0, // qsub2 |
| 99618 | 0, // qsub3 |
| 99619 | 0, // ssub |
| 99620 | 0, // ssub_hi |
| 99621 | 470, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99622 | 470, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99623 | 0, // sube32 |
| 99624 | 0, // sube64 |
| 99625 | 0, // subo32 |
| 99626 | 0, // subo64 |
| 99627 | 470, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99628 | 470, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99629 | 470, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99630 | 470, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99631 | 470, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99632 | 470, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99633 | 470, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99634 | 470, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99635 | 0, // zasubb |
| 99636 | 0, // zasubd0 |
| 99637 | 0, // zasubd1 |
| 99638 | 0, // zasubh0 |
| 99639 | 0, // zasubh1 |
| 99640 | 0, // zasubq0 |
| 99641 | 0, // zasubq1 |
| 99642 | 0, // zasubs0 |
| 99643 | 0, // zasubs1 |
| 99644 | 0, // zsub |
| 99645 | 0, // zsub0 |
| 99646 | 0, // zsub1 |
| 99647 | 0, // zsub2 |
| 99648 | 0, // zsub3 |
| 99649 | 0, // zsub_hi |
| 99650 | 0, // zasubd1_then_zasubq0 |
| 99651 | 0, // zasubd1_then_zasubq1 |
| 99652 | 0, // zasubs1_then_zasubd0 |
| 99653 | 0, // zasubs1_then_zasubd1 |
| 99654 | 0, // zasubs1_then_zasubq0 |
| 99655 | 0, // zasubs1_then_zasubq1 |
| 99656 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99657 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99658 | 0, // zasubh1_then_zasubd0 |
| 99659 | 0, // zasubh1_then_zasubd1 |
| 99660 | 0, // zasubh1_then_zasubq0 |
| 99661 | 0, // zasubh1_then_zasubq1 |
| 99662 | 0, // zasubh1_then_zasubs0 |
| 99663 | 0, // zasubh1_then_zasubs1 |
| 99664 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99665 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99666 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99667 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99668 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99669 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99670 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99671 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99672 | 0, // dsub1_then_bsub |
| 99673 | 0, // dsub1_then_bsub_hi |
| 99674 | 0, // dsub1_then_hsub |
| 99675 | 0, // dsub1_then_hsub_hi |
| 99676 | 0, // dsub1_then_ssub |
| 99677 | 0, // dsub1_then_ssub_hi |
| 99678 | 0, // dsub3_then_bsub |
| 99679 | 0, // dsub3_then_bsub_hi |
| 99680 | 0, // dsub3_then_hsub |
| 99681 | 0, // dsub3_then_hsub_hi |
| 99682 | 0, // dsub3_then_ssub |
| 99683 | 0, // dsub3_then_ssub_hi |
| 99684 | 0, // dsub2_then_bsub |
| 99685 | 0, // dsub2_then_bsub_hi |
| 99686 | 0, // dsub2_then_hsub |
| 99687 | 0, // dsub2_then_hsub_hi |
| 99688 | 0, // dsub2_then_ssub |
| 99689 | 0, // dsub2_then_ssub_hi |
| 99690 | 0, // psub1_then_psub |
| 99691 | 0, // qsub1_then_dsub_hi |
| 99692 | 0, // qsub3_then_dsub_hi |
| 99693 | 0, // qsub2_then_dsub_hi |
| 99694 | 470, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99695 | 470, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99696 | 470, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99697 | 470, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99698 | 470, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99699 | 470, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99700 | 470, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99701 | 470, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99702 | 470, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99703 | 470, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99704 | 470, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99705 | 470, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99706 | 470, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99707 | 470, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99708 | 0, // subo64_then_sub_32 |
| 99709 | 0, // subo64_then_sub_32_hi |
| 99710 | 0, // zsub1_then_zsub_hi |
| 99711 | 0, // zsub3_then_zsub_hi |
| 99712 | 0, // zsub2_then_zsub_hi |
| 99713 | 0, // dsub0_dsub1 |
| 99714 | 0, // dsub0_dsub1_dsub2 |
| 99715 | 0, // dsub1_dsub2 |
| 99716 | 0, // dsub1_dsub2_dsub3 |
| 99717 | 0, // dsub2_dsub3 |
| 99718 | 0, // dsub_dsub1 |
| 99719 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99720 | 0, // dsub_dsub1_dsub2 |
| 99721 | 0, // qsub0_qsub1 |
| 99722 | 0, // qsub0_qsub1_qsub2 |
| 99723 | 0, // qsub1_qsub2 |
| 99724 | 0, // qsub1_qsub2_qsub3 |
| 99725 | 0, // qsub2_qsub3 |
| 99726 | 470, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99727 | 470, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99728 | 470, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99729 | 470, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99730 | 470, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99731 | 470, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99732 | 470, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99733 | 470, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 99734 | 0, // sub_32_subo64_then_sub_32 |
| 99735 | 0, // zsub_qsub1 |
| 99736 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99737 | 0, // zsub_qsub1_qsub2 |
| 99738 | 0, // zsub0_zsub1 |
| 99739 | 0, // zsub0_zsub1_zsub2 |
| 99740 | 0, // zsub1_zsub2 |
| 99741 | 0, // zsub1_zsub2_zsub3 |
| 99742 | 0, // zsub2_zsub3 |
| 99743 | 0, // zsub0_zsub2 |
| 99744 | 0, // zsub1_zsub3 |
| 99745 | }, |
| 99746 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99747 | 0, // bsub |
| 99748 | 0, // bsub_hi |
| 99749 | 0, // dsub |
| 99750 | 0, // dsub0 |
| 99751 | 0, // dsub1 |
| 99752 | 0, // dsub2 |
| 99753 | 0, // dsub3 |
| 99754 | 0, // dsub_hi |
| 99755 | 0, // hsub |
| 99756 | 0, // hsub_hi |
| 99757 | 0, // psub |
| 99758 | 0, // psub0 |
| 99759 | 0, // psub1 |
| 99760 | 0, // qsub0 |
| 99761 | 0, // qsub1 |
| 99762 | 0, // qsub2 |
| 99763 | 0, // qsub3 |
| 99764 | 0, // ssub |
| 99765 | 0, // ssub_hi |
| 99766 | 471, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99767 | 471, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99768 | 0, // sube32 |
| 99769 | 0, // sube64 |
| 99770 | 0, // subo32 |
| 99771 | 0, // subo64 |
| 99772 | 471, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99773 | 471, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99774 | 471, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99775 | 471, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99776 | 471, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99777 | 471, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99778 | 471, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99779 | 471, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99780 | 0, // zasubb |
| 99781 | 0, // zasubd0 |
| 99782 | 0, // zasubd1 |
| 99783 | 0, // zasubh0 |
| 99784 | 0, // zasubh1 |
| 99785 | 0, // zasubq0 |
| 99786 | 0, // zasubq1 |
| 99787 | 0, // zasubs0 |
| 99788 | 0, // zasubs1 |
| 99789 | 0, // zsub |
| 99790 | 0, // zsub0 |
| 99791 | 0, // zsub1 |
| 99792 | 0, // zsub2 |
| 99793 | 0, // zsub3 |
| 99794 | 0, // zsub_hi |
| 99795 | 0, // zasubd1_then_zasubq0 |
| 99796 | 0, // zasubd1_then_zasubq1 |
| 99797 | 0, // zasubs1_then_zasubd0 |
| 99798 | 0, // zasubs1_then_zasubd1 |
| 99799 | 0, // zasubs1_then_zasubq0 |
| 99800 | 0, // zasubs1_then_zasubq1 |
| 99801 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99802 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99803 | 0, // zasubh1_then_zasubd0 |
| 99804 | 0, // zasubh1_then_zasubd1 |
| 99805 | 0, // zasubh1_then_zasubq0 |
| 99806 | 0, // zasubh1_then_zasubq1 |
| 99807 | 0, // zasubh1_then_zasubs0 |
| 99808 | 0, // zasubh1_then_zasubs1 |
| 99809 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99810 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99811 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99812 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99813 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99814 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99815 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99816 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99817 | 0, // dsub1_then_bsub |
| 99818 | 0, // dsub1_then_bsub_hi |
| 99819 | 0, // dsub1_then_hsub |
| 99820 | 0, // dsub1_then_hsub_hi |
| 99821 | 0, // dsub1_then_ssub |
| 99822 | 0, // dsub1_then_ssub_hi |
| 99823 | 0, // dsub3_then_bsub |
| 99824 | 0, // dsub3_then_bsub_hi |
| 99825 | 0, // dsub3_then_hsub |
| 99826 | 0, // dsub3_then_hsub_hi |
| 99827 | 0, // dsub3_then_ssub |
| 99828 | 0, // dsub3_then_ssub_hi |
| 99829 | 0, // dsub2_then_bsub |
| 99830 | 0, // dsub2_then_bsub_hi |
| 99831 | 0, // dsub2_then_hsub |
| 99832 | 0, // dsub2_then_hsub_hi |
| 99833 | 0, // dsub2_then_ssub |
| 99834 | 0, // dsub2_then_ssub_hi |
| 99835 | 0, // psub1_then_psub |
| 99836 | 0, // qsub1_then_dsub_hi |
| 99837 | 0, // qsub3_then_dsub_hi |
| 99838 | 0, // qsub2_then_dsub_hi |
| 99839 | 471, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99840 | 471, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99841 | 471, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99842 | 471, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99843 | 471, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99844 | 471, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99845 | 471, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99846 | 471, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99847 | 471, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99848 | 471, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99849 | 471, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99850 | 471, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99851 | 471, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99852 | 471, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99853 | 0, // subo64_then_sub_32 |
| 99854 | 0, // subo64_then_sub_32_hi |
| 99855 | 0, // zsub1_then_zsub_hi |
| 99856 | 0, // zsub3_then_zsub_hi |
| 99857 | 0, // zsub2_then_zsub_hi |
| 99858 | 0, // dsub0_dsub1 |
| 99859 | 0, // dsub0_dsub1_dsub2 |
| 99860 | 0, // dsub1_dsub2 |
| 99861 | 0, // dsub1_dsub2_dsub3 |
| 99862 | 0, // dsub2_dsub3 |
| 99863 | 0, // dsub_dsub1 |
| 99864 | 0, // dsub_dsub1_dsub2_dsub3 |
| 99865 | 0, // dsub_dsub1_dsub2 |
| 99866 | 0, // qsub0_qsub1 |
| 99867 | 0, // qsub0_qsub1_qsub2 |
| 99868 | 0, // qsub1_qsub2 |
| 99869 | 0, // qsub1_qsub2_qsub3 |
| 99870 | 0, // qsub2_qsub3 |
| 99871 | 471, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99872 | 471, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99873 | 471, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99874 | 471, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99875 | 471, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99876 | 471, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99877 | 471, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99878 | 471, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 99879 | 0, // sub_32_subo64_then_sub_32 |
| 99880 | 0, // zsub_qsub1 |
| 99881 | 0, // zsub_qsub1_qsub2_qsub3 |
| 99882 | 0, // zsub_qsub1_qsub2 |
| 99883 | 0, // zsub0_zsub1 |
| 99884 | 0, // zsub0_zsub1_zsub2 |
| 99885 | 0, // zsub1_zsub2 |
| 99886 | 0, // zsub1_zsub2_zsub3 |
| 99887 | 0, // zsub2_zsub3 |
| 99888 | 0, // zsub0_zsub2 |
| 99889 | 0, // zsub1_zsub3 |
| 99890 | }, |
| 99891 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99892 | 0, // bsub |
| 99893 | 0, // bsub_hi |
| 99894 | 0, // dsub |
| 99895 | 0, // dsub0 |
| 99896 | 0, // dsub1 |
| 99897 | 0, // dsub2 |
| 99898 | 0, // dsub3 |
| 99899 | 0, // dsub_hi |
| 99900 | 0, // hsub |
| 99901 | 0, // hsub_hi |
| 99902 | 0, // psub |
| 99903 | 0, // psub0 |
| 99904 | 0, // psub1 |
| 99905 | 0, // qsub0 |
| 99906 | 0, // qsub1 |
| 99907 | 0, // qsub2 |
| 99908 | 0, // qsub3 |
| 99909 | 0, // ssub |
| 99910 | 0, // ssub_hi |
| 99911 | 472, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99912 | 472, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99913 | 0, // sube32 |
| 99914 | 0, // sube64 |
| 99915 | 0, // subo32 |
| 99916 | 0, // subo64 |
| 99917 | 472, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99918 | 472, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99919 | 472, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99920 | 472, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99921 | 472, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99922 | 472, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99923 | 472, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99924 | 472, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99925 | 0, // zasubb |
| 99926 | 0, // zasubd0 |
| 99927 | 0, // zasubd1 |
| 99928 | 0, // zasubh0 |
| 99929 | 0, // zasubh1 |
| 99930 | 0, // zasubq0 |
| 99931 | 0, // zasubq1 |
| 99932 | 0, // zasubs0 |
| 99933 | 0, // zasubs1 |
| 99934 | 0, // zsub |
| 99935 | 0, // zsub0 |
| 99936 | 0, // zsub1 |
| 99937 | 0, // zsub2 |
| 99938 | 0, // zsub3 |
| 99939 | 0, // zsub_hi |
| 99940 | 0, // zasubd1_then_zasubq0 |
| 99941 | 0, // zasubd1_then_zasubq1 |
| 99942 | 0, // zasubs1_then_zasubd0 |
| 99943 | 0, // zasubs1_then_zasubd1 |
| 99944 | 0, // zasubs1_then_zasubq0 |
| 99945 | 0, // zasubs1_then_zasubq1 |
| 99946 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 99947 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 99948 | 0, // zasubh1_then_zasubd0 |
| 99949 | 0, // zasubh1_then_zasubd1 |
| 99950 | 0, // zasubh1_then_zasubq0 |
| 99951 | 0, // zasubh1_then_zasubq1 |
| 99952 | 0, // zasubh1_then_zasubs0 |
| 99953 | 0, // zasubh1_then_zasubs1 |
| 99954 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 99955 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 99956 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 99957 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 99958 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 99959 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 99960 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 99961 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 99962 | 0, // dsub1_then_bsub |
| 99963 | 0, // dsub1_then_bsub_hi |
| 99964 | 0, // dsub1_then_hsub |
| 99965 | 0, // dsub1_then_hsub_hi |
| 99966 | 0, // dsub1_then_ssub |
| 99967 | 0, // dsub1_then_ssub_hi |
| 99968 | 0, // dsub3_then_bsub |
| 99969 | 0, // dsub3_then_bsub_hi |
| 99970 | 0, // dsub3_then_hsub |
| 99971 | 0, // dsub3_then_hsub_hi |
| 99972 | 0, // dsub3_then_ssub |
| 99973 | 0, // dsub3_then_ssub_hi |
| 99974 | 0, // dsub2_then_bsub |
| 99975 | 0, // dsub2_then_bsub_hi |
| 99976 | 0, // dsub2_then_hsub |
| 99977 | 0, // dsub2_then_hsub_hi |
| 99978 | 0, // dsub2_then_ssub |
| 99979 | 0, // dsub2_then_ssub_hi |
| 99980 | 0, // psub1_then_psub |
| 99981 | 0, // qsub1_then_dsub_hi |
| 99982 | 0, // qsub3_then_dsub_hi |
| 99983 | 0, // qsub2_then_dsub_hi |
| 99984 | 472, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99985 | 472, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99986 | 472, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99987 | 472, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99988 | 472, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99989 | 472, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99990 | 472, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99991 | 472, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99992 | 472, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99993 | 472, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99994 | 472, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99995 | 472, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99996 | 472, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99997 | 472, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 99998 | 0, // subo64_then_sub_32 |
| 99999 | 0, // subo64_then_sub_32_hi |
| 100000 | 0, // zsub1_then_zsub_hi |
| 100001 | 0, // zsub3_then_zsub_hi |
| 100002 | 0, // zsub2_then_zsub_hi |
| 100003 | 0, // dsub0_dsub1 |
| 100004 | 0, // dsub0_dsub1_dsub2 |
| 100005 | 0, // dsub1_dsub2 |
| 100006 | 0, // dsub1_dsub2_dsub3 |
| 100007 | 0, // dsub2_dsub3 |
| 100008 | 0, // dsub_dsub1 |
| 100009 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100010 | 0, // dsub_dsub1_dsub2 |
| 100011 | 0, // qsub0_qsub1 |
| 100012 | 0, // qsub0_qsub1_qsub2 |
| 100013 | 0, // qsub1_qsub2 |
| 100014 | 0, // qsub1_qsub2_qsub3 |
| 100015 | 0, // qsub2_qsub3 |
| 100016 | 472, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100017 | 472, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100018 | 472, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100019 | 472, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100020 | 472, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100021 | 472, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100022 | 472, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100023 | 472, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100024 | 0, // sub_32_subo64_then_sub_32 |
| 100025 | 0, // zsub_qsub1 |
| 100026 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100027 | 0, // zsub_qsub1_qsub2 |
| 100028 | 0, // zsub0_zsub1 |
| 100029 | 0, // zsub0_zsub1_zsub2 |
| 100030 | 0, // zsub1_zsub2 |
| 100031 | 0, // zsub1_zsub2_zsub3 |
| 100032 | 0, // zsub2_zsub3 |
| 100033 | 0, // zsub0_zsub2 |
| 100034 | 0, // zsub1_zsub3 |
| 100035 | }, |
| 100036 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100037 | 0, // bsub |
| 100038 | 0, // bsub_hi |
| 100039 | 0, // dsub |
| 100040 | 0, // dsub0 |
| 100041 | 0, // dsub1 |
| 100042 | 0, // dsub2 |
| 100043 | 0, // dsub3 |
| 100044 | 0, // dsub_hi |
| 100045 | 0, // hsub |
| 100046 | 0, // hsub_hi |
| 100047 | 0, // psub |
| 100048 | 0, // psub0 |
| 100049 | 0, // psub1 |
| 100050 | 0, // qsub0 |
| 100051 | 0, // qsub1 |
| 100052 | 0, // qsub2 |
| 100053 | 0, // qsub3 |
| 100054 | 0, // ssub |
| 100055 | 0, // ssub_hi |
| 100056 | 473, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100057 | 473, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100058 | 0, // sube32 |
| 100059 | 0, // sube64 |
| 100060 | 0, // subo32 |
| 100061 | 0, // subo64 |
| 100062 | 473, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100063 | 473, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100064 | 473, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100065 | 473, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100066 | 473, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100067 | 473, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100068 | 473, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100069 | 473, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100070 | 0, // zasubb |
| 100071 | 0, // zasubd0 |
| 100072 | 0, // zasubd1 |
| 100073 | 0, // zasubh0 |
| 100074 | 0, // zasubh1 |
| 100075 | 0, // zasubq0 |
| 100076 | 0, // zasubq1 |
| 100077 | 0, // zasubs0 |
| 100078 | 0, // zasubs1 |
| 100079 | 0, // zsub |
| 100080 | 0, // zsub0 |
| 100081 | 0, // zsub1 |
| 100082 | 0, // zsub2 |
| 100083 | 0, // zsub3 |
| 100084 | 0, // zsub_hi |
| 100085 | 0, // zasubd1_then_zasubq0 |
| 100086 | 0, // zasubd1_then_zasubq1 |
| 100087 | 0, // zasubs1_then_zasubd0 |
| 100088 | 0, // zasubs1_then_zasubd1 |
| 100089 | 0, // zasubs1_then_zasubq0 |
| 100090 | 0, // zasubs1_then_zasubq1 |
| 100091 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100092 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100093 | 0, // zasubh1_then_zasubd0 |
| 100094 | 0, // zasubh1_then_zasubd1 |
| 100095 | 0, // zasubh1_then_zasubq0 |
| 100096 | 0, // zasubh1_then_zasubq1 |
| 100097 | 0, // zasubh1_then_zasubs0 |
| 100098 | 0, // zasubh1_then_zasubs1 |
| 100099 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100100 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100101 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100102 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100103 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100104 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100105 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100106 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100107 | 0, // dsub1_then_bsub |
| 100108 | 0, // dsub1_then_bsub_hi |
| 100109 | 0, // dsub1_then_hsub |
| 100110 | 0, // dsub1_then_hsub_hi |
| 100111 | 0, // dsub1_then_ssub |
| 100112 | 0, // dsub1_then_ssub_hi |
| 100113 | 0, // dsub3_then_bsub |
| 100114 | 0, // dsub3_then_bsub_hi |
| 100115 | 0, // dsub3_then_hsub |
| 100116 | 0, // dsub3_then_hsub_hi |
| 100117 | 0, // dsub3_then_ssub |
| 100118 | 0, // dsub3_then_ssub_hi |
| 100119 | 0, // dsub2_then_bsub |
| 100120 | 0, // dsub2_then_bsub_hi |
| 100121 | 0, // dsub2_then_hsub |
| 100122 | 0, // dsub2_then_hsub_hi |
| 100123 | 0, // dsub2_then_ssub |
| 100124 | 0, // dsub2_then_ssub_hi |
| 100125 | 0, // psub1_then_psub |
| 100126 | 0, // qsub1_then_dsub_hi |
| 100127 | 0, // qsub3_then_dsub_hi |
| 100128 | 0, // qsub2_then_dsub_hi |
| 100129 | 473, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100130 | 473, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100131 | 473, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100132 | 473, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100133 | 473, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100134 | 473, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100135 | 473, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100136 | 473, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100137 | 473, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100138 | 473, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100139 | 473, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100140 | 473, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100141 | 473, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100142 | 473, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100143 | 0, // subo64_then_sub_32 |
| 100144 | 0, // subo64_then_sub_32_hi |
| 100145 | 0, // zsub1_then_zsub_hi |
| 100146 | 0, // zsub3_then_zsub_hi |
| 100147 | 0, // zsub2_then_zsub_hi |
| 100148 | 0, // dsub0_dsub1 |
| 100149 | 0, // dsub0_dsub1_dsub2 |
| 100150 | 0, // dsub1_dsub2 |
| 100151 | 0, // dsub1_dsub2_dsub3 |
| 100152 | 0, // dsub2_dsub3 |
| 100153 | 0, // dsub_dsub1 |
| 100154 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100155 | 0, // dsub_dsub1_dsub2 |
| 100156 | 0, // qsub0_qsub1 |
| 100157 | 0, // qsub0_qsub1_qsub2 |
| 100158 | 0, // qsub1_qsub2 |
| 100159 | 0, // qsub1_qsub2_qsub3 |
| 100160 | 0, // qsub2_qsub3 |
| 100161 | 473, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100162 | 473, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100163 | 473, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100164 | 473, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100165 | 473, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100166 | 473, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100167 | 473, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100168 | 473, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100169 | 0, // sub_32_subo64_then_sub_32 |
| 100170 | 0, // zsub_qsub1 |
| 100171 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100172 | 0, // zsub_qsub1_qsub2 |
| 100173 | 0, // zsub0_zsub1 |
| 100174 | 0, // zsub0_zsub1_zsub2 |
| 100175 | 0, // zsub1_zsub2 |
| 100176 | 0, // zsub1_zsub2_zsub3 |
| 100177 | 0, // zsub2_zsub3 |
| 100178 | 0, // zsub0_zsub2 |
| 100179 | 0, // zsub1_zsub3 |
| 100180 | }, |
| 100181 | { // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100182 | 0, // bsub |
| 100183 | 0, // bsub_hi |
| 100184 | 0, // dsub |
| 100185 | 0, // dsub0 |
| 100186 | 0, // dsub1 |
| 100187 | 0, // dsub2 |
| 100188 | 0, // dsub3 |
| 100189 | 0, // dsub_hi |
| 100190 | 0, // hsub |
| 100191 | 0, // hsub_hi |
| 100192 | 0, // psub |
| 100193 | 0, // psub0 |
| 100194 | 0, // psub1 |
| 100195 | 0, // qsub0 |
| 100196 | 0, // qsub1 |
| 100197 | 0, // qsub2 |
| 100198 | 0, // qsub3 |
| 100199 | 0, // ssub |
| 100200 | 0, // ssub_hi |
| 100201 | 474, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100202 | 474, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100203 | 0, // sube32 |
| 100204 | 0, // sube64 |
| 100205 | 0, // subo32 |
| 100206 | 0, // subo64 |
| 100207 | 474, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100208 | 474, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100209 | 474, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100210 | 474, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100211 | 474, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100212 | 474, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100213 | 474, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100214 | 474, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100215 | 0, // zasubb |
| 100216 | 0, // zasubd0 |
| 100217 | 0, // zasubd1 |
| 100218 | 0, // zasubh0 |
| 100219 | 0, // zasubh1 |
| 100220 | 0, // zasubq0 |
| 100221 | 0, // zasubq1 |
| 100222 | 0, // zasubs0 |
| 100223 | 0, // zasubs1 |
| 100224 | 0, // zsub |
| 100225 | 0, // zsub0 |
| 100226 | 0, // zsub1 |
| 100227 | 0, // zsub2 |
| 100228 | 0, // zsub3 |
| 100229 | 0, // zsub_hi |
| 100230 | 0, // zasubd1_then_zasubq0 |
| 100231 | 0, // zasubd1_then_zasubq1 |
| 100232 | 0, // zasubs1_then_zasubd0 |
| 100233 | 0, // zasubs1_then_zasubd1 |
| 100234 | 0, // zasubs1_then_zasubq0 |
| 100235 | 0, // zasubs1_then_zasubq1 |
| 100236 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100237 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100238 | 0, // zasubh1_then_zasubd0 |
| 100239 | 0, // zasubh1_then_zasubd1 |
| 100240 | 0, // zasubh1_then_zasubq0 |
| 100241 | 0, // zasubh1_then_zasubq1 |
| 100242 | 0, // zasubh1_then_zasubs0 |
| 100243 | 0, // zasubh1_then_zasubs1 |
| 100244 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100245 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100246 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100247 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100248 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100249 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100250 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100251 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100252 | 0, // dsub1_then_bsub |
| 100253 | 0, // dsub1_then_bsub_hi |
| 100254 | 0, // dsub1_then_hsub |
| 100255 | 0, // dsub1_then_hsub_hi |
| 100256 | 0, // dsub1_then_ssub |
| 100257 | 0, // dsub1_then_ssub_hi |
| 100258 | 0, // dsub3_then_bsub |
| 100259 | 0, // dsub3_then_bsub_hi |
| 100260 | 0, // dsub3_then_hsub |
| 100261 | 0, // dsub3_then_hsub_hi |
| 100262 | 0, // dsub3_then_ssub |
| 100263 | 0, // dsub3_then_ssub_hi |
| 100264 | 0, // dsub2_then_bsub |
| 100265 | 0, // dsub2_then_bsub_hi |
| 100266 | 0, // dsub2_then_hsub |
| 100267 | 0, // dsub2_then_hsub_hi |
| 100268 | 0, // dsub2_then_ssub |
| 100269 | 0, // dsub2_then_ssub_hi |
| 100270 | 0, // psub1_then_psub |
| 100271 | 0, // qsub1_then_dsub_hi |
| 100272 | 0, // qsub3_then_dsub_hi |
| 100273 | 0, // qsub2_then_dsub_hi |
| 100274 | 474, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100275 | 474, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100276 | 474, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100277 | 474, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100278 | 474, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100279 | 474, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100280 | 474, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100281 | 474, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100282 | 474, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100283 | 474, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100284 | 474, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100285 | 474, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100286 | 474, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100287 | 474, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100288 | 0, // subo64_then_sub_32 |
| 100289 | 0, // subo64_then_sub_32_hi |
| 100290 | 0, // zsub1_then_zsub_hi |
| 100291 | 0, // zsub3_then_zsub_hi |
| 100292 | 0, // zsub2_then_zsub_hi |
| 100293 | 0, // dsub0_dsub1 |
| 100294 | 0, // dsub0_dsub1_dsub2 |
| 100295 | 0, // dsub1_dsub2 |
| 100296 | 0, // dsub1_dsub2_dsub3 |
| 100297 | 0, // dsub2_dsub3 |
| 100298 | 0, // dsub_dsub1 |
| 100299 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100300 | 0, // dsub_dsub1_dsub2 |
| 100301 | 0, // qsub0_qsub1 |
| 100302 | 0, // qsub0_qsub1_qsub2 |
| 100303 | 0, // qsub1_qsub2 |
| 100304 | 0, // qsub1_qsub2_qsub3 |
| 100305 | 0, // qsub2_qsub3 |
| 100306 | 474, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100307 | 474, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100308 | 474, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100309 | 474, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100310 | 474, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100311 | 474, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100312 | 474, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100313 | 474, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 100314 | 0, // sub_32_subo64_then_sub_32 |
| 100315 | 0, // zsub_qsub1 |
| 100316 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100317 | 0, // zsub_qsub1_qsub2 |
| 100318 | 0, // zsub0_zsub1 |
| 100319 | 0, // zsub0_zsub1_zsub2 |
| 100320 | 0, // zsub1_zsub2 |
| 100321 | 0, // zsub1_zsub2_zsub3 |
| 100322 | 0, // zsub2_zsub3 |
| 100323 | 0, // zsub0_zsub2 |
| 100324 | 0, // zsub1_zsub3 |
| 100325 | }, |
| 100326 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100327 | 0, // bsub |
| 100328 | 0, // bsub_hi |
| 100329 | 0, // dsub |
| 100330 | 0, // dsub0 |
| 100331 | 0, // dsub1 |
| 100332 | 0, // dsub2 |
| 100333 | 0, // dsub3 |
| 100334 | 0, // dsub_hi |
| 100335 | 0, // hsub |
| 100336 | 0, // hsub_hi |
| 100337 | 0, // psub |
| 100338 | 0, // psub0 |
| 100339 | 0, // psub1 |
| 100340 | 0, // qsub0 |
| 100341 | 0, // qsub1 |
| 100342 | 0, // qsub2 |
| 100343 | 0, // qsub3 |
| 100344 | 0, // ssub |
| 100345 | 0, // ssub_hi |
| 100346 | 475, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100347 | 475, // sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100348 | 0, // sube32 |
| 100349 | 0, // sube64 |
| 100350 | 0, // subo32 |
| 100351 | 0, // subo64 |
| 100352 | 475, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100353 | 475, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100354 | 475, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100355 | 475, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100356 | 475, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100357 | 475, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100358 | 475, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100359 | 475, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100360 | 0, // zasubb |
| 100361 | 0, // zasubd0 |
| 100362 | 0, // zasubd1 |
| 100363 | 0, // zasubh0 |
| 100364 | 0, // zasubh1 |
| 100365 | 0, // zasubq0 |
| 100366 | 0, // zasubq1 |
| 100367 | 0, // zasubs0 |
| 100368 | 0, // zasubs1 |
| 100369 | 0, // zsub |
| 100370 | 0, // zsub0 |
| 100371 | 0, // zsub1 |
| 100372 | 0, // zsub2 |
| 100373 | 0, // zsub3 |
| 100374 | 0, // zsub_hi |
| 100375 | 0, // zasubd1_then_zasubq0 |
| 100376 | 0, // zasubd1_then_zasubq1 |
| 100377 | 0, // zasubs1_then_zasubd0 |
| 100378 | 0, // zasubs1_then_zasubd1 |
| 100379 | 0, // zasubs1_then_zasubq0 |
| 100380 | 0, // zasubs1_then_zasubq1 |
| 100381 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100382 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100383 | 0, // zasubh1_then_zasubd0 |
| 100384 | 0, // zasubh1_then_zasubd1 |
| 100385 | 0, // zasubh1_then_zasubq0 |
| 100386 | 0, // zasubh1_then_zasubq1 |
| 100387 | 0, // zasubh1_then_zasubs0 |
| 100388 | 0, // zasubh1_then_zasubs1 |
| 100389 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100390 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100391 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100392 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100393 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100394 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100395 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100396 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100397 | 0, // dsub1_then_bsub |
| 100398 | 0, // dsub1_then_bsub_hi |
| 100399 | 0, // dsub1_then_hsub |
| 100400 | 0, // dsub1_then_hsub_hi |
| 100401 | 0, // dsub1_then_ssub |
| 100402 | 0, // dsub1_then_ssub_hi |
| 100403 | 0, // dsub3_then_bsub |
| 100404 | 0, // dsub3_then_bsub_hi |
| 100405 | 0, // dsub3_then_hsub |
| 100406 | 0, // dsub3_then_hsub_hi |
| 100407 | 0, // dsub3_then_ssub |
| 100408 | 0, // dsub3_then_ssub_hi |
| 100409 | 0, // dsub2_then_bsub |
| 100410 | 0, // dsub2_then_bsub_hi |
| 100411 | 0, // dsub2_then_hsub |
| 100412 | 0, // dsub2_then_hsub_hi |
| 100413 | 0, // dsub2_then_ssub |
| 100414 | 0, // dsub2_then_ssub_hi |
| 100415 | 0, // psub1_then_psub |
| 100416 | 0, // qsub1_then_dsub_hi |
| 100417 | 0, // qsub3_then_dsub_hi |
| 100418 | 0, // qsub2_then_dsub_hi |
| 100419 | 475, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100420 | 475, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100421 | 475, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100422 | 475, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100423 | 475, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100424 | 475, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100425 | 475, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100426 | 475, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100427 | 475, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100428 | 475, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100429 | 475, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100430 | 475, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100431 | 475, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100432 | 475, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100433 | 0, // subo64_then_sub_32 |
| 100434 | 0, // subo64_then_sub_32_hi |
| 100435 | 0, // zsub1_then_zsub_hi |
| 100436 | 0, // zsub3_then_zsub_hi |
| 100437 | 0, // zsub2_then_zsub_hi |
| 100438 | 0, // dsub0_dsub1 |
| 100439 | 0, // dsub0_dsub1_dsub2 |
| 100440 | 0, // dsub1_dsub2 |
| 100441 | 0, // dsub1_dsub2_dsub3 |
| 100442 | 0, // dsub2_dsub3 |
| 100443 | 0, // dsub_dsub1 |
| 100444 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100445 | 0, // dsub_dsub1_dsub2 |
| 100446 | 0, // qsub0_qsub1 |
| 100447 | 0, // qsub0_qsub1_qsub2 |
| 100448 | 0, // qsub1_qsub2 |
| 100449 | 0, // qsub1_qsub2_qsub3 |
| 100450 | 0, // qsub2_qsub3 |
| 100451 | 475, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100452 | 475, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100453 | 475, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100454 | 475, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100455 | 475, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100456 | 475, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100457 | 475, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100458 | 475, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 100459 | 0, // sub_32_subo64_then_sub_32 |
| 100460 | 0, // zsub_qsub1 |
| 100461 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100462 | 0, // zsub_qsub1_qsub2 |
| 100463 | 0, // zsub0_zsub1 |
| 100464 | 0, // zsub0_zsub1_zsub2 |
| 100465 | 0, // zsub1_zsub2 |
| 100466 | 0, // zsub1_zsub2_zsub3 |
| 100467 | 0, // zsub2_zsub3 |
| 100468 | 0, // zsub0_zsub2 |
| 100469 | 0, // zsub1_zsub3 |
| 100470 | }, |
| 100471 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100472 | 0, // bsub |
| 100473 | 0, // bsub_hi |
| 100474 | 0, // dsub |
| 100475 | 0, // dsub0 |
| 100476 | 0, // dsub1 |
| 100477 | 0, // dsub2 |
| 100478 | 0, // dsub3 |
| 100479 | 0, // dsub_hi |
| 100480 | 0, // hsub |
| 100481 | 0, // hsub_hi |
| 100482 | 0, // psub |
| 100483 | 0, // psub0 |
| 100484 | 0, // psub1 |
| 100485 | 0, // qsub0 |
| 100486 | 0, // qsub1 |
| 100487 | 0, // qsub2 |
| 100488 | 0, // qsub3 |
| 100489 | 0, // ssub |
| 100490 | 0, // ssub_hi |
| 100491 | 476, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100492 | 476, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100493 | 0, // sube32 |
| 100494 | 0, // sube64 |
| 100495 | 0, // subo32 |
| 100496 | 0, // subo64 |
| 100497 | 476, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100498 | 476, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100499 | 476, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100500 | 476, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100501 | 476, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100502 | 476, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100503 | 476, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100504 | 476, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100505 | 0, // zasubb |
| 100506 | 0, // zasubd0 |
| 100507 | 0, // zasubd1 |
| 100508 | 0, // zasubh0 |
| 100509 | 0, // zasubh1 |
| 100510 | 0, // zasubq0 |
| 100511 | 0, // zasubq1 |
| 100512 | 0, // zasubs0 |
| 100513 | 0, // zasubs1 |
| 100514 | 0, // zsub |
| 100515 | 0, // zsub0 |
| 100516 | 0, // zsub1 |
| 100517 | 0, // zsub2 |
| 100518 | 0, // zsub3 |
| 100519 | 0, // zsub_hi |
| 100520 | 0, // zasubd1_then_zasubq0 |
| 100521 | 0, // zasubd1_then_zasubq1 |
| 100522 | 0, // zasubs1_then_zasubd0 |
| 100523 | 0, // zasubs1_then_zasubd1 |
| 100524 | 0, // zasubs1_then_zasubq0 |
| 100525 | 0, // zasubs1_then_zasubq1 |
| 100526 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100527 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100528 | 0, // zasubh1_then_zasubd0 |
| 100529 | 0, // zasubh1_then_zasubd1 |
| 100530 | 0, // zasubh1_then_zasubq0 |
| 100531 | 0, // zasubh1_then_zasubq1 |
| 100532 | 0, // zasubh1_then_zasubs0 |
| 100533 | 0, // zasubh1_then_zasubs1 |
| 100534 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100535 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100536 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100537 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100538 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100539 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100540 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100541 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100542 | 0, // dsub1_then_bsub |
| 100543 | 0, // dsub1_then_bsub_hi |
| 100544 | 0, // dsub1_then_hsub |
| 100545 | 0, // dsub1_then_hsub_hi |
| 100546 | 0, // dsub1_then_ssub |
| 100547 | 0, // dsub1_then_ssub_hi |
| 100548 | 0, // dsub3_then_bsub |
| 100549 | 0, // dsub3_then_bsub_hi |
| 100550 | 0, // dsub3_then_hsub |
| 100551 | 0, // dsub3_then_hsub_hi |
| 100552 | 0, // dsub3_then_ssub |
| 100553 | 0, // dsub3_then_ssub_hi |
| 100554 | 0, // dsub2_then_bsub |
| 100555 | 0, // dsub2_then_bsub_hi |
| 100556 | 0, // dsub2_then_hsub |
| 100557 | 0, // dsub2_then_hsub_hi |
| 100558 | 0, // dsub2_then_ssub |
| 100559 | 0, // dsub2_then_ssub_hi |
| 100560 | 0, // psub1_then_psub |
| 100561 | 0, // qsub1_then_dsub_hi |
| 100562 | 0, // qsub3_then_dsub_hi |
| 100563 | 0, // qsub2_then_dsub_hi |
| 100564 | 476, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100565 | 476, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100566 | 476, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100567 | 476, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100568 | 476, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100569 | 476, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100570 | 476, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100571 | 476, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100572 | 476, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100573 | 476, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100574 | 476, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100575 | 476, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100576 | 476, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100577 | 476, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100578 | 0, // subo64_then_sub_32 |
| 100579 | 0, // subo64_then_sub_32_hi |
| 100580 | 0, // zsub1_then_zsub_hi |
| 100581 | 0, // zsub3_then_zsub_hi |
| 100582 | 0, // zsub2_then_zsub_hi |
| 100583 | 0, // dsub0_dsub1 |
| 100584 | 0, // dsub0_dsub1_dsub2 |
| 100585 | 0, // dsub1_dsub2 |
| 100586 | 0, // dsub1_dsub2_dsub3 |
| 100587 | 0, // dsub2_dsub3 |
| 100588 | 0, // dsub_dsub1 |
| 100589 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100590 | 0, // dsub_dsub1_dsub2 |
| 100591 | 0, // qsub0_qsub1 |
| 100592 | 0, // qsub0_qsub1_qsub2 |
| 100593 | 0, // qsub1_qsub2 |
| 100594 | 0, // qsub1_qsub2_qsub3 |
| 100595 | 0, // qsub2_qsub3 |
| 100596 | 476, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100597 | 476, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100598 | 476, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100599 | 476, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100600 | 476, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100601 | 476, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100602 | 476, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100603 | 476, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 100604 | 0, // sub_32_subo64_then_sub_32 |
| 100605 | 0, // zsub_qsub1 |
| 100606 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100607 | 0, // zsub_qsub1_qsub2 |
| 100608 | 0, // zsub0_zsub1 |
| 100609 | 0, // zsub0_zsub1_zsub2 |
| 100610 | 0, // zsub1_zsub2 |
| 100611 | 0, // zsub1_zsub2_zsub3 |
| 100612 | 0, // zsub2_zsub3 |
| 100613 | 0, // zsub0_zsub2 |
| 100614 | 0, // zsub1_zsub3 |
| 100615 | }, |
| 100616 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100617 | 0, // bsub |
| 100618 | 0, // bsub_hi |
| 100619 | 0, // dsub |
| 100620 | 0, // dsub0 |
| 100621 | 0, // dsub1 |
| 100622 | 0, // dsub2 |
| 100623 | 0, // dsub3 |
| 100624 | 0, // dsub_hi |
| 100625 | 0, // hsub |
| 100626 | 0, // hsub_hi |
| 100627 | 0, // psub |
| 100628 | 0, // psub0 |
| 100629 | 0, // psub1 |
| 100630 | 0, // qsub0 |
| 100631 | 0, // qsub1 |
| 100632 | 0, // qsub2 |
| 100633 | 0, // qsub3 |
| 100634 | 0, // ssub |
| 100635 | 0, // ssub_hi |
| 100636 | 477, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100637 | 477, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100638 | 0, // sube32 |
| 100639 | 0, // sube64 |
| 100640 | 0, // subo32 |
| 100641 | 0, // subo64 |
| 100642 | 477, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100643 | 477, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100644 | 477, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100645 | 477, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100646 | 477, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100647 | 477, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100648 | 477, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100649 | 477, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100650 | 0, // zasubb |
| 100651 | 0, // zasubd0 |
| 100652 | 0, // zasubd1 |
| 100653 | 0, // zasubh0 |
| 100654 | 0, // zasubh1 |
| 100655 | 0, // zasubq0 |
| 100656 | 0, // zasubq1 |
| 100657 | 0, // zasubs0 |
| 100658 | 0, // zasubs1 |
| 100659 | 0, // zsub |
| 100660 | 0, // zsub0 |
| 100661 | 0, // zsub1 |
| 100662 | 0, // zsub2 |
| 100663 | 0, // zsub3 |
| 100664 | 0, // zsub_hi |
| 100665 | 0, // zasubd1_then_zasubq0 |
| 100666 | 0, // zasubd1_then_zasubq1 |
| 100667 | 0, // zasubs1_then_zasubd0 |
| 100668 | 0, // zasubs1_then_zasubd1 |
| 100669 | 0, // zasubs1_then_zasubq0 |
| 100670 | 0, // zasubs1_then_zasubq1 |
| 100671 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100672 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100673 | 0, // zasubh1_then_zasubd0 |
| 100674 | 0, // zasubh1_then_zasubd1 |
| 100675 | 0, // zasubh1_then_zasubq0 |
| 100676 | 0, // zasubh1_then_zasubq1 |
| 100677 | 0, // zasubh1_then_zasubs0 |
| 100678 | 0, // zasubh1_then_zasubs1 |
| 100679 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100680 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100681 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100682 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100683 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100684 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100685 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100686 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100687 | 0, // dsub1_then_bsub |
| 100688 | 0, // dsub1_then_bsub_hi |
| 100689 | 0, // dsub1_then_hsub |
| 100690 | 0, // dsub1_then_hsub_hi |
| 100691 | 0, // dsub1_then_ssub |
| 100692 | 0, // dsub1_then_ssub_hi |
| 100693 | 0, // dsub3_then_bsub |
| 100694 | 0, // dsub3_then_bsub_hi |
| 100695 | 0, // dsub3_then_hsub |
| 100696 | 0, // dsub3_then_hsub_hi |
| 100697 | 0, // dsub3_then_ssub |
| 100698 | 0, // dsub3_then_ssub_hi |
| 100699 | 0, // dsub2_then_bsub |
| 100700 | 0, // dsub2_then_bsub_hi |
| 100701 | 0, // dsub2_then_hsub |
| 100702 | 0, // dsub2_then_hsub_hi |
| 100703 | 0, // dsub2_then_ssub |
| 100704 | 0, // dsub2_then_ssub_hi |
| 100705 | 0, // psub1_then_psub |
| 100706 | 0, // qsub1_then_dsub_hi |
| 100707 | 0, // qsub3_then_dsub_hi |
| 100708 | 0, // qsub2_then_dsub_hi |
| 100709 | 477, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100710 | 477, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100711 | 477, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100712 | 477, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100713 | 477, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100714 | 477, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100715 | 477, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100716 | 477, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100717 | 477, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100718 | 477, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100719 | 477, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100720 | 477, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100721 | 477, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100722 | 477, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100723 | 0, // subo64_then_sub_32 |
| 100724 | 0, // subo64_then_sub_32_hi |
| 100725 | 0, // zsub1_then_zsub_hi |
| 100726 | 0, // zsub3_then_zsub_hi |
| 100727 | 0, // zsub2_then_zsub_hi |
| 100728 | 0, // dsub0_dsub1 |
| 100729 | 0, // dsub0_dsub1_dsub2 |
| 100730 | 0, // dsub1_dsub2 |
| 100731 | 0, // dsub1_dsub2_dsub3 |
| 100732 | 0, // dsub2_dsub3 |
| 100733 | 0, // dsub_dsub1 |
| 100734 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100735 | 0, // dsub_dsub1_dsub2 |
| 100736 | 0, // qsub0_qsub1 |
| 100737 | 0, // qsub0_qsub1_qsub2 |
| 100738 | 0, // qsub1_qsub2 |
| 100739 | 0, // qsub1_qsub2_qsub3 |
| 100740 | 0, // qsub2_qsub3 |
| 100741 | 477, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100742 | 477, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100743 | 477, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100744 | 477, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100745 | 477, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100746 | 477, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100747 | 477, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100748 | 477, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100749 | 0, // sub_32_subo64_then_sub_32 |
| 100750 | 0, // zsub_qsub1 |
| 100751 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100752 | 0, // zsub_qsub1_qsub2 |
| 100753 | 0, // zsub0_zsub1 |
| 100754 | 0, // zsub0_zsub1_zsub2 |
| 100755 | 0, // zsub1_zsub2 |
| 100756 | 0, // zsub1_zsub2_zsub3 |
| 100757 | 0, // zsub2_zsub3 |
| 100758 | 0, // zsub0_zsub2 |
| 100759 | 0, // zsub1_zsub3 |
| 100760 | }, |
| 100761 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100762 | 0, // bsub |
| 100763 | 0, // bsub_hi |
| 100764 | 0, // dsub |
| 100765 | 0, // dsub0 |
| 100766 | 0, // dsub1 |
| 100767 | 0, // dsub2 |
| 100768 | 0, // dsub3 |
| 100769 | 0, // dsub_hi |
| 100770 | 0, // hsub |
| 100771 | 0, // hsub_hi |
| 100772 | 0, // psub |
| 100773 | 0, // psub0 |
| 100774 | 0, // psub1 |
| 100775 | 0, // qsub0 |
| 100776 | 0, // qsub1 |
| 100777 | 0, // qsub2 |
| 100778 | 0, // qsub3 |
| 100779 | 0, // ssub |
| 100780 | 0, // ssub_hi |
| 100781 | 478, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100782 | 478, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100783 | 0, // sube32 |
| 100784 | 0, // sube64 |
| 100785 | 0, // subo32 |
| 100786 | 0, // subo64 |
| 100787 | 478, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100788 | 478, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100789 | 478, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100790 | 478, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100791 | 478, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100792 | 478, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100793 | 478, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100794 | 478, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100795 | 0, // zasubb |
| 100796 | 0, // zasubd0 |
| 100797 | 0, // zasubd1 |
| 100798 | 0, // zasubh0 |
| 100799 | 0, // zasubh1 |
| 100800 | 0, // zasubq0 |
| 100801 | 0, // zasubq1 |
| 100802 | 0, // zasubs0 |
| 100803 | 0, // zasubs1 |
| 100804 | 0, // zsub |
| 100805 | 0, // zsub0 |
| 100806 | 0, // zsub1 |
| 100807 | 0, // zsub2 |
| 100808 | 0, // zsub3 |
| 100809 | 0, // zsub_hi |
| 100810 | 0, // zasubd1_then_zasubq0 |
| 100811 | 0, // zasubd1_then_zasubq1 |
| 100812 | 0, // zasubs1_then_zasubd0 |
| 100813 | 0, // zasubs1_then_zasubd1 |
| 100814 | 0, // zasubs1_then_zasubq0 |
| 100815 | 0, // zasubs1_then_zasubq1 |
| 100816 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100817 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100818 | 0, // zasubh1_then_zasubd0 |
| 100819 | 0, // zasubh1_then_zasubd1 |
| 100820 | 0, // zasubh1_then_zasubq0 |
| 100821 | 0, // zasubh1_then_zasubq1 |
| 100822 | 0, // zasubh1_then_zasubs0 |
| 100823 | 0, // zasubh1_then_zasubs1 |
| 100824 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100825 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100826 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100827 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100828 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100829 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100830 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100831 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100832 | 0, // dsub1_then_bsub |
| 100833 | 0, // dsub1_then_bsub_hi |
| 100834 | 0, // dsub1_then_hsub |
| 100835 | 0, // dsub1_then_hsub_hi |
| 100836 | 0, // dsub1_then_ssub |
| 100837 | 0, // dsub1_then_ssub_hi |
| 100838 | 0, // dsub3_then_bsub |
| 100839 | 0, // dsub3_then_bsub_hi |
| 100840 | 0, // dsub3_then_hsub |
| 100841 | 0, // dsub3_then_hsub_hi |
| 100842 | 0, // dsub3_then_ssub |
| 100843 | 0, // dsub3_then_ssub_hi |
| 100844 | 0, // dsub2_then_bsub |
| 100845 | 0, // dsub2_then_bsub_hi |
| 100846 | 0, // dsub2_then_hsub |
| 100847 | 0, // dsub2_then_hsub_hi |
| 100848 | 0, // dsub2_then_ssub |
| 100849 | 0, // dsub2_then_ssub_hi |
| 100850 | 0, // psub1_then_psub |
| 100851 | 0, // qsub1_then_dsub_hi |
| 100852 | 0, // qsub3_then_dsub_hi |
| 100853 | 0, // qsub2_then_dsub_hi |
| 100854 | 478, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100855 | 478, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100856 | 478, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100857 | 478, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100858 | 478, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100859 | 478, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100860 | 478, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100861 | 478, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100862 | 478, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100863 | 478, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100864 | 478, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100865 | 478, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100866 | 478, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100867 | 478, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100868 | 0, // subo64_then_sub_32 |
| 100869 | 0, // subo64_then_sub_32_hi |
| 100870 | 0, // zsub1_then_zsub_hi |
| 100871 | 0, // zsub3_then_zsub_hi |
| 100872 | 0, // zsub2_then_zsub_hi |
| 100873 | 0, // dsub0_dsub1 |
| 100874 | 0, // dsub0_dsub1_dsub2 |
| 100875 | 0, // dsub1_dsub2 |
| 100876 | 0, // dsub1_dsub2_dsub3 |
| 100877 | 0, // dsub2_dsub3 |
| 100878 | 0, // dsub_dsub1 |
| 100879 | 0, // dsub_dsub1_dsub2_dsub3 |
| 100880 | 0, // dsub_dsub1_dsub2 |
| 100881 | 0, // qsub0_qsub1 |
| 100882 | 0, // qsub0_qsub1_qsub2 |
| 100883 | 0, // qsub1_qsub2 |
| 100884 | 0, // qsub1_qsub2_qsub3 |
| 100885 | 0, // qsub2_qsub3 |
| 100886 | 478, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100887 | 478, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100888 | 478, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100889 | 478, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100890 | 478, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100891 | 478, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100892 | 478, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100893 | 478, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100894 | 0, // sub_32_subo64_then_sub_32 |
| 100895 | 0, // zsub_qsub1 |
| 100896 | 0, // zsub_qsub1_qsub2_qsub3 |
| 100897 | 0, // zsub_qsub1_qsub2 |
| 100898 | 0, // zsub0_zsub1 |
| 100899 | 0, // zsub0_zsub1_zsub2 |
| 100900 | 0, // zsub1_zsub2 |
| 100901 | 0, // zsub1_zsub2_zsub3 |
| 100902 | 0, // zsub2_zsub3 |
| 100903 | 0, // zsub0_zsub2 |
| 100904 | 0, // zsub1_zsub3 |
| 100905 | }, |
| 100906 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100907 | 0, // bsub |
| 100908 | 0, // bsub_hi |
| 100909 | 0, // dsub |
| 100910 | 0, // dsub0 |
| 100911 | 0, // dsub1 |
| 100912 | 0, // dsub2 |
| 100913 | 0, // dsub3 |
| 100914 | 0, // dsub_hi |
| 100915 | 0, // hsub |
| 100916 | 0, // hsub_hi |
| 100917 | 0, // psub |
| 100918 | 0, // psub0 |
| 100919 | 0, // psub1 |
| 100920 | 0, // qsub0 |
| 100921 | 0, // qsub1 |
| 100922 | 0, // qsub2 |
| 100923 | 0, // qsub3 |
| 100924 | 0, // ssub |
| 100925 | 0, // ssub_hi |
| 100926 | 479, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100927 | 479, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100928 | 0, // sube32 |
| 100929 | 0, // sube64 |
| 100930 | 0, // subo32 |
| 100931 | 0, // subo64 |
| 100932 | 479, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100933 | 479, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100934 | 479, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100935 | 479, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100936 | 479, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100937 | 479, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100938 | 479, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100939 | 479, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 100940 | 0, // zasubb |
| 100941 | 0, // zasubd0 |
| 100942 | 0, // zasubd1 |
| 100943 | 0, // zasubh0 |
| 100944 | 0, // zasubh1 |
| 100945 | 0, // zasubq0 |
| 100946 | 0, // zasubq1 |
| 100947 | 0, // zasubs0 |
| 100948 | 0, // zasubs1 |
| 100949 | 0, // zsub |
| 100950 | 0, // zsub0 |
| 100951 | 0, // zsub1 |
| 100952 | 0, // zsub2 |
| 100953 | 0, // zsub3 |
| 100954 | 0, // zsub_hi |
| 100955 | 0, // zasubd1_then_zasubq0 |
| 100956 | 0, // zasubd1_then_zasubq1 |
| 100957 | 0, // zasubs1_then_zasubd0 |
| 100958 | 0, // zasubs1_then_zasubd1 |
| 100959 | 0, // zasubs1_then_zasubq0 |
| 100960 | 0, // zasubs1_then_zasubq1 |
| 100961 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 100962 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 100963 | 0, // zasubh1_then_zasubd0 |
| 100964 | 0, // zasubh1_then_zasubd1 |
| 100965 | 0, // zasubh1_then_zasubq0 |
| 100966 | 0, // zasubh1_then_zasubq1 |
| 100967 | 0, // zasubh1_then_zasubs0 |
| 100968 | 0, // zasubh1_then_zasubs1 |
| 100969 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 100970 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 100971 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 100972 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 100973 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 100974 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 100975 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 100976 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 100977 | 0, // dsub1_then_bsub |
| 100978 | 0, // dsub1_then_bsub_hi |
| 100979 | 0, // dsub1_then_hsub |
| 100980 | 0, // dsub1_then_hsub_hi |
| 100981 | 0, // dsub1_then_ssub |
| 100982 | 0, // dsub1_then_ssub_hi |
| 100983 | 0, // dsub3_then_bsub |
| 100984 | 0, // dsub3_then_bsub_hi |
| 100985 | 0, // dsub3_then_hsub |
| 100986 | 0, // dsub3_then_hsub_hi |
| 100987 | 0, // dsub3_then_ssub |
| 100988 | 0, // dsub3_then_ssub_hi |
| 100989 | 0, // dsub2_then_bsub |
| 100990 | 0, // dsub2_then_bsub_hi |
| 100991 | 0, // dsub2_then_hsub |
| 100992 | 0, // dsub2_then_hsub_hi |
| 100993 | 0, // dsub2_then_ssub |
| 100994 | 0, // dsub2_then_ssub_hi |
| 100995 | 0, // psub1_then_psub |
| 100996 | 0, // qsub1_then_dsub_hi |
| 100997 | 0, // qsub3_then_dsub_hi |
| 100998 | 0, // qsub2_then_dsub_hi |
| 100999 | 479, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101000 | 479, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101001 | 479, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101002 | 479, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101003 | 479, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101004 | 479, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101005 | 479, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101006 | 479, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101007 | 479, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101008 | 479, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101009 | 479, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101010 | 479, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101011 | 479, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101012 | 479, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101013 | 0, // subo64_then_sub_32 |
| 101014 | 0, // subo64_then_sub_32_hi |
| 101015 | 0, // zsub1_then_zsub_hi |
| 101016 | 0, // zsub3_then_zsub_hi |
| 101017 | 0, // zsub2_then_zsub_hi |
| 101018 | 0, // dsub0_dsub1 |
| 101019 | 0, // dsub0_dsub1_dsub2 |
| 101020 | 0, // dsub1_dsub2 |
| 101021 | 0, // dsub1_dsub2_dsub3 |
| 101022 | 0, // dsub2_dsub3 |
| 101023 | 0, // dsub_dsub1 |
| 101024 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101025 | 0, // dsub_dsub1_dsub2 |
| 101026 | 0, // qsub0_qsub1 |
| 101027 | 0, // qsub0_qsub1_qsub2 |
| 101028 | 0, // qsub1_qsub2 |
| 101029 | 0, // qsub1_qsub2_qsub3 |
| 101030 | 0, // qsub2_qsub3 |
| 101031 | 479, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101032 | 479, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101033 | 479, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101034 | 479, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101035 | 479, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101036 | 479, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101037 | 479, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101038 | 479, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101039 | 0, // sub_32_subo64_then_sub_32 |
| 101040 | 0, // zsub_qsub1 |
| 101041 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101042 | 0, // zsub_qsub1_qsub2 |
| 101043 | 0, // zsub0_zsub1 |
| 101044 | 0, // zsub0_zsub1_zsub2 |
| 101045 | 0, // zsub1_zsub2 |
| 101046 | 0, // zsub1_zsub2_zsub3 |
| 101047 | 0, // zsub2_zsub3 |
| 101048 | 0, // zsub0_zsub2 |
| 101049 | 0, // zsub1_zsub3 |
| 101050 | }, |
| 101051 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101052 | 0, // bsub |
| 101053 | 0, // bsub_hi |
| 101054 | 0, // dsub |
| 101055 | 0, // dsub0 |
| 101056 | 0, // dsub1 |
| 101057 | 0, // dsub2 |
| 101058 | 0, // dsub3 |
| 101059 | 0, // dsub_hi |
| 101060 | 0, // hsub |
| 101061 | 0, // hsub_hi |
| 101062 | 0, // psub |
| 101063 | 0, // psub0 |
| 101064 | 0, // psub1 |
| 101065 | 0, // qsub0 |
| 101066 | 0, // qsub1 |
| 101067 | 0, // qsub2 |
| 101068 | 0, // qsub3 |
| 101069 | 0, // ssub |
| 101070 | 0, // ssub_hi |
| 101071 | 480, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101072 | 480, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101073 | 0, // sube32 |
| 101074 | 0, // sube64 |
| 101075 | 0, // subo32 |
| 101076 | 0, // subo64 |
| 101077 | 480, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101078 | 480, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101079 | 480, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101080 | 480, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101081 | 480, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101082 | 480, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101083 | 480, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101084 | 480, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101085 | 0, // zasubb |
| 101086 | 0, // zasubd0 |
| 101087 | 0, // zasubd1 |
| 101088 | 0, // zasubh0 |
| 101089 | 0, // zasubh1 |
| 101090 | 0, // zasubq0 |
| 101091 | 0, // zasubq1 |
| 101092 | 0, // zasubs0 |
| 101093 | 0, // zasubs1 |
| 101094 | 0, // zsub |
| 101095 | 0, // zsub0 |
| 101096 | 0, // zsub1 |
| 101097 | 0, // zsub2 |
| 101098 | 0, // zsub3 |
| 101099 | 0, // zsub_hi |
| 101100 | 0, // zasubd1_then_zasubq0 |
| 101101 | 0, // zasubd1_then_zasubq1 |
| 101102 | 0, // zasubs1_then_zasubd0 |
| 101103 | 0, // zasubs1_then_zasubd1 |
| 101104 | 0, // zasubs1_then_zasubq0 |
| 101105 | 0, // zasubs1_then_zasubq1 |
| 101106 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101107 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101108 | 0, // zasubh1_then_zasubd0 |
| 101109 | 0, // zasubh1_then_zasubd1 |
| 101110 | 0, // zasubh1_then_zasubq0 |
| 101111 | 0, // zasubh1_then_zasubq1 |
| 101112 | 0, // zasubh1_then_zasubs0 |
| 101113 | 0, // zasubh1_then_zasubs1 |
| 101114 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101115 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101116 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101117 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101118 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101119 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101120 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101121 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101122 | 0, // dsub1_then_bsub |
| 101123 | 0, // dsub1_then_bsub_hi |
| 101124 | 0, // dsub1_then_hsub |
| 101125 | 0, // dsub1_then_hsub_hi |
| 101126 | 0, // dsub1_then_ssub |
| 101127 | 0, // dsub1_then_ssub_hi |
| 101128 | 0, // dsub3_then_bsub |
| 101129 | 0, // dsub3_then_bsub_hi |
| 101130 | 0, // dsub3_then_hsub |
| 101131 | 0, // dsub3_then_hsub_hi |
| 101132 | 0, // dsub3_then_ssub |
| 101133 | 0, // dsub3_then_ssub_hi |
| 101134 | 0, // dsub2_then_bsub |
| 101135 | 0, // dsub2_then_bsub_hi |
| 101136 | 0, // dsub2_then_hsub |
| 101137 | 0, // dsub2_then_hsub_hi |
| 101138 | 0, // dsub2_then_ssub |
| 101139 | 0, // dsub2_then_ssub_hi |
| 101140 | 0, // psub1_then_psub |
| 101141 | 0, // qsub1_then_dsub_hi |
| 101142 | 0, // qsub3_then_dsub_hi |
| 101143 | 0, // qsub2_then_dsub_hi |
| 101144 | 480, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101145 | 480, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101146 | 480, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101147 | 480, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101148 | 480, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101149 | 480, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101150 | 480, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101151 | 480, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101152 | 480, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101153 | 480, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101154 | 480, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101155 | 480, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101156 | 480, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101157 | 480, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101158 | 0, // subo64_then_sub_32 |
| 101159 | 0, // subo64_then_sub_32_hi |
| 101160 | 0, // zsub1_then_zsub_hi |
| 101161 | 0, // zsub3_then_zsub_hi |
| 101162 | 0, // zsub2_then_zsub_hi |
| 101163 | 0, // dsub0_dsub1 |
| 101164 | 0, // dsub0_dsub1_dsub2 |
| 101165 | 0, // dsub1_dsub2 |
| 101166 | 0, // dsub1_dsub2_dsub3 |
| 101167 | 0, // dsub2_dsub3 |
| 101168 | 0, // dsub_dsub1 |
| 101169 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101170 | 0, // dsub_dsub1_dsub2 |
| 101171 | 0, // qsub0_qsub1 |
| 101172 | 0, // qsub0_qsub1_qsub2 |
| 101173 | 0, // qsub1_qsub2 |
| 101174 | 0, // qsub1_qsub2_qsub3 |
| 101175 | 0, // qsub2_qsub3 |
| 101176 | 480, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101177 | 480, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101178 | 480, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101179 | 480, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101180 | 480, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101181 | 480, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101182 | 480, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101183 | 480, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 101184 | 0, // sub_32_subo64_then_sub_32 |
| 101185 | 0, // zsub_qsub1 |
| 101186 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101187 | 0, // zsub_qsub1_qsub2 |
| 101188 | 0, // zsub0_zsub1 |
| 101189 | 0, // zsub0_zsub1_zsub2 |
| 101190 | 0, // zsub1_zsub2 |
| 101191 | 0, // zsub1_zsub2_zsub3 |
| 101192 | 0, // zsub2_zsub3 |
| 101193 | 0, // zsub0_zsub2 |
| 101194 | 0, // zsub1_zsub3 |
| 101195 | }, |
| 101196 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101197 | 0, // bsub |
| 101198 | 0, // bsub_hi |
| 101199 | 0, // dsub |
| 101200 | 0, // dsub0 |
| 101201 | 0, // dsub1 |
| 101202 | 0, // dsub2 |
| 101203 | 0, // dsub3 |
| 101204 | 0, // dsub_hi |
| 101205 | 0, // hsub |
| 101206 | 0, // hsub_hi |
| 101207 | 0, // psub |
| 101208 | 0, // psub0 |
| 101209 | 0, // psub1 |
| 101210 | 0, // qsub0 |
| 101211 | 0, // qsub1 |
| 101212 | 0, // qsub2 |
| 101213 | 0, // qsub3 |
| 101214 | 0, // ssub |
| 101215 | 0, // ssub_hi |
| 101216 | 481, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101217 | 481, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101218 | 0, // sube32 |
| 101219 | 0, // sube64 |
| 101220 | 0, // subo32 |
| 101221 | 0, // subo64 |
| 101222 | 481, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101223 | 481, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101224 | 481, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101225 | 481, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101226 | 481, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101227 | 481, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101228 | 481, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101229 | 481, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101230 | 0, // zasubb |
| 101231 | 0, // zasubd0 |
| 101232 | 0, // zasubd1 |
| 101233 | 0, // zasubh0 |
| 101234 | 0, // zasubh1 |
| 101235 | 0, // zasubq0 |
| 101236 | 0, // zasubq1 |
| 101237 | 0, // zasubs0 |
| 101238 | 0, // zasubs1 |
| 101239 | 0, // zsub |
| 101240 | 0, // zsub0 |
| 101241 | 0, // zsub1 |
| 101242 | 0, // zsub2 |
| 101243 | 0, // zsub3 |
| 101244 | 0, // zsub_hi |
| 101245 | 0, // zasubd1_then_zasubq0 |
| 101246 | 0, // zasubd1_then_zasubq1 |
| 101247 | 0, // zasubs1_then_zasubd0 |
| 101248 | 0, // zasubs1_then_zasubd1 |
| 101249 | 0, // zasubs1_then_zasubq0 |
| 101250 | 0, // zasubs1_then_zasubq1 |
| 101251 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101252 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101253 | 0, // zasubh1_then_zasubd0 |
| 101254 | 0, // zasubh1_then_zasubd1 |
| 101255 | 0, // zasubh1_then_zasubq0 |
| 101256 | 0, // zasubh1_then_zasubq1 |
| 101257 | 0, // zasubh1_then_zasubs0 |
| 101258 | 0, // zasubh1_then_zasubs1 |
| 101259 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101260 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101261 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101262 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101263 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101264 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101265 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101266 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101267 | 0, // dsub1_then_bsub |
| 101268 | 0, // dsub1_then_bsub_hi |
| 101269 | 0, // dsub1_then_hsub |
| 101270 | 0, // dsub1_then_hsub_hi |
| 101271 | 0, // dsub1_then_ssub |
| 101272 | 0, // dsub1_then_ssub_hi |
| 101273 | 0, // dsub3_then_bsub |
| 101274 | 0, // dsub3_then_bsub_hi |
| 101275 | 0, // dsub3_then_hsub |
| 101276 | 0, // dsub3_then_hsub_hi |
| 101277 | 0, // dsub3_then_ssub |
| 101278 | 0, // dsub3_then_ssub_hi |
| 101279 | 0, // dsub2_then_bsub |
| 101280 | 0, // dsub2_then_bsub_hi |
| 101281 | 0, // dsub2_then_hsub |
| 101282 | 0, // dsub2_then_hsub_hi |
| 101283 | 0, // dsub2_then_ssub |
| 101284 | 0, // dsub2_then_ssub_hi |
| 101285 | 0, // psub1_then_psub |
| 101286 | 0, // qsub1_then_dsub_hi |
| 101287 | 0, // qsub3_then_dsub_hi |
| 101288 | 0, // qsub2_then_dsub_hi |
| 101289 | 481, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101290 | 481, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101291 | 481, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101292 | 481, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101293 | 481, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101294 | 481, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101295 | 481, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101296 | 481, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101297 | 481, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101298 | 481, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101299 | 481, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101300 | 481, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101301 | 481, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101302 | 481, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101303 | 0, // subo64_then_sub_32 |
| 101304 | 0, // subo64_then_sub_32_hi |
| 101305 | 0, // zsub1_then_zsub_hi |
| 101306 | 0, // zsub3_then_zsub_hi |
| 101307 | 0, // zsub2_then_zsub_hi |
| 101308 | 0, // dsub0_dsub1 |
| 101309 | 0, // dsub0_dsub1_dsub2 |
| 101310 | 0, // dsub1_dsub2 |
| 101311 | 0, // dsub1_dsub2_dsub3 |
| 101312 | 0, // dsub2_dsub3 |
| 101313 | 0, // dsub_dsub1 |
| 101314 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101315 | 0, // dsub_dsub1_dsub2 |
| 101316 | 0, // qsub0_qsub1 |
| 101317 | 0, // qsub0_qsub1_qsub2 |
| 101318 | 0, // qsub1_qsub2 |
| 101319 | 0, // qsub1_qsub2_qsub3 |
| 101320 | 0, // qsub2_qsub3 |
| 101321 | 481, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101322 | 481, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101323 | 481, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101324 | 481, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101325 | 481, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101326 | 481, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101327 | 481, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101328 | 481, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101329 | 0, // sub_32_subo64_then_sub_32 |
| 101330 | 0, // zsub_qsub1 |
| 101331 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101332 | 0, // zsub_qsub1_qsub2 |
| 101333 | 0, // zsub0_zsub1 |
| 101334 | 0, // zsub0_zsub1_zsub2 |
| 101335 | 0, // zsub1_zsub2 |
| 101336 | 0, // zsub1_zsub2_zsub3 |
| 101337 | 0, // zsub2_zsub3 |
| 101338 | 0, // zsub0_zsub2 |
| 101339 | 0, // zsub1_zsub3 |
| 101340 | }, |
| 101341 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101342 | 0, // bsub |
| 101343 | 0, // bsub_hi |
| 101344 | 0, // dsub |
| 101345 | 0, // dsub0 |
| 101346 | 0, // dsub1 |
| 101347 | 0, // dsub2 |
| 101348 | 0, // dsub3 |
| 101349 | 0, // dsub_hi |
| 101350 | 0, // hsub |
| 101351 | 0, // hsub_hi |
| 101352 | 0, // psub |
| 101353 | 0, // psub0 |
| 101354 | 0, // psub1 |
| 101355 | 0, // qsub0 |
| 101356 | 0, // qsub1 |
| 101357 | 0, // qsub2 |
| 101358 | 0, // qsub3 |
| 101359 | 0, // ssub |
| 101360 | 0, // ssub_hi |
| 101361 | 482, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101362 | 482, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101363 | 0, // sube32 |
| 101364 | 0, // sube64 |
| 101365 | 0, // subo32 |
| 101366 | 0, // subo64 |
| 101367 | 482, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101368 | 482, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101369 | 482, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101370 | 482, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101371 | 482, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101372 | 482, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101373 | 482, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101374 | 482, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101375 | 0, // zasubb |
| 101376 | 0, // zasubd0 |
| 101377 | 0, // zasubd1 |
| 101378 | 0, // zasubh0 |
| 101379 | 0, // zasubh1 |
| 101380 | 0, // zasubq0 |
| 101381 | 0, // zasubq1 |
| 101382 | 0, // zasubs0 |
| 101383 | 0, // zasubs1 |
| 101384 | 0, // zsub |
| 101385 | 0, // zsub0 |
| 101386 | 0, // zsub1 |
| 101387 | 0, // zsub2 |
| 101388 | 0, // zsub3 |
| 101389 | 0, // zsub_hi |
| 101390 | 0, // zasubd1_then_zasubq0 |
| 101391 | 0, // zasubd1_then_zasubq1 |
| 101392 | 0, // zasubs1_then_zasubd0 |
| 101393 | 0, // zasubs1_then_zasubd1 |
| 101394 | 0, // zasubs1_then_zasubq0 |
| 101395 | 0, // zasubs1_then_zasubq1 |
| 101396 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101397 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101398 | 0, // zasubh1_then_zasubd0 |
| 101399 | 0, // zasubh1_then_zasubd1 |
| 101400 | 0, // zasubh1_then_zasubq0 |
| 101401 | 0, // zasubh1_then_zasubq1 |
| 101402 | 0, // zasubh1_then_zasubs0 |
| 101403 | 0, // zasubh1_then_zasubs1 |
| 101404 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101405 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101406 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101407 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101408 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101409 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101410 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101411 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101412 | 0, // dsub1_then_bsub |
| 101413 | 0, // dsub1_then_bsub_hi |
| 101414 | 0, // dsub1_then_hsub |
| 101415 | 0, // dsub1_then_hsub_hi |
| 101416 | 0, // dsub1_then_ssub |
| 101417 | 0, // dsub1_then_ssub_hi |
| 101418 | 0, // dsub3_then_bsub |
| 101419 | 0, // dsub3_then_bsub_hi |
| 101420 | 0, // dsub3_then_hsub |
| 101421 | 0, // dsub3_then_hsub_hi |
| 101422 | 0, // dsub3_then_ssub |
| 101423 | 0, // dsub3_then_ssub_hi |
| 101424 | 0, // dsub2_then_bsub |
| 101425 | 0, // dsub2_then_bsub_hi |
| 101426 | 0, // dsub2_then_hsub |
| 101427 | 0, // dsub2_then_hsub_hi |
| 101428 | 0, // dsub2_then_ssub |
| 101429 | 0, // dsub2_then_ssub_hi |
| 101430 | 0, // psub1_then_psub |
| 101431 | 0, // qsub1_then_dsub_hi |
| 101432 | 0, // qsub3_then_dsub_hi |
| 101433 | 0, // qsub2_then_dsub_hi |
| 101434 | 482, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101435 | 482, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101436 | 482, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101437 | 482, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101438 | 482, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101439 | 482, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101440 | 482, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101441 | 482, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101442 | 482, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101443 | 482, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101444 | 482, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101445 | 482, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101446 | 482, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101447 | 482, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101448 | 0, // subo64_then_sub_32 |
| 101449 | 0, // subo64_then_sub_32_hi |
| 101450 | 0, // zsub1_then_zsub_hi |
| 101451 | 0, // zsub3_then_zsub_hi |
| 101452 | 0, // zsub2_then_zsub_hi |
| 101453 | 0, // dsub0_dsub1 |
| 101454 | 0, // dsub0_dsub1_dsub2 |
| 101455 | 0, // dsub1_dsub2 |
| 101456 | 0, // dsub1_dsub2_dsub3 |
| 101457 | 0, // dsub2_dsub3 |
| 101458 | 0, // dsub_dsub1 |
| 101459 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101460 | 0, // dsub_dsub1_dsub2 |
| 101461 | 0, // qsub0_qsub1 |
| 101462 | 0, // qsub0_qsub1_qsub2 |
| 101463 | 0, // qsub1_qsub2 |
| 101464 | 0, // qsub1_qsub2_qsub3 |
| 101465 | 0, // qsub2_qsub3 |
| 101466 | 482, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101467 | 482, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101468 | 482, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101469 | 482, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101470 | 482, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101471 | 482, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101472 | 482, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101473 | 482, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101474 | 0, // sub_32_subo64_then_sub_32 |
| 101475 | 0, // zsub_qsub1 |
| 101476 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101477 | 0, // zsub_qsub1_qsub2 |
| 101478 | 0, // zsub0_zsub1 |
| 101479 | 0, // zsub0_zsub1_zsub2 |
| 101480 | 0, // zsub1_zsub2 |
| 101481 | 0, // zsub1_zsub2_zsub3 |
| 101482 | 0, // zsub2_zsub3 |
| 101483 | 0, // zsub0_zsub2 |
| 101484 | 0, // zsub1_zsub3 |
| 101485 | }, |
| 101486 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101487 | 0, // bsub |
| 101488 | 0, // bsub_hi |
| 101489 | 0, // dsub |
| 101490 | 0, // dsub0 |
| 101491 | 0, // dsub1 |
| 101492 | 0, // dsub2 |
| 101493 | 0, // dsub3 |
| 101494 | 0, // dsub_hi |
| 101495 | 0, // hsub |
| 101496 | 0, // hsub_hi |
| 101497 | 0, // psub |
| 101498 | 0, // psub0 |
| 101499 | 0, // psub1 |
| 101500 | 0, // qsub0 |
| 101501 | 0, // qsub1 |
| 101502 | 0, // qsub2 |
| 101503 | 0, // qsub3 |
| 101504 | 0, // ssub |
| 101505 | 0, // ssub_hi |
| 101506 | 483, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101507 | 483, // sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101508 | 0, // sube32 |
| 101509 | 0, // sube64 |
| 101510 | 0, // subo32 |
| 101511 | 0, // subo64 |
| 101512 | 483, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101513 | 483, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101514 | 483, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101515 | 483, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101516 | 483, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101517 | 483, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101518 | 483, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101519 | 483, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101520 | 0, // zasubb |
| 101521 | 0, // zasubd0 |
| 101522 | 0, // zasubd1 |
| 101523 | 0, // zasubh0 |
| 101524 | 0, // zasubh1 |
| 101525 | 0, // zasubq0 |
| 101526 | 0, // zasubq1 |
| 101527 | 0, // zasubs0 |
| 101528 | 0, // zasubs1 |
| 101529 | 0, // zsub |
| 101530 | 0, // zsub0 |
| 101531 | 0, // zsub1 |
| 101532 | 0, // zsub2 |
| 101533 | 0, // zsub3 |
| 101534 | 0, // zsub_hi |
| 101535 | 0, // zasubd1_then_zasubq0 |
| 101536 | 0, // zasubd1_then_zasubq1 |
| 101537 | 0, // zasubs1_then_zasubd0 |
| 101538 | 0, // zasubs1_then_zasubd1 |
| 101539 | 0, // zasubs1_then_zasubq0 |
| 101540 | 0, // zasubs1_then_zasubq1 |
| 101541 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101542 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101543 | 0, // zasubh1_then_zasubd0 |
| 101544 | 0, // zasubh1_then_zasubd1 |
| 101545 | 0, // zasubh1_then_zasubq0 |
| 101546 | 0, // zasubh1_then_zasubq1 |
| 101547 | 0, // zasubh1_then_zasubs0 |
| 101548 | 0, // zasubh1_then_zasubs1 |
| 101549 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101550 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101551 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101552 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101553 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101554 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101555 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101556 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101557 | 0, // dsub1_then_bsub |
| 101558 | 0, // dsub1_then_bsub_hi |
| 101559 | 0, // dsub1_then_hsub |
| 101560 | 0, // dsub1_then_hsub_hi |
| 101561 | 0, // dsub1_then_ssub |
| 101562 | 0, // dsub1_then_ssub_hi |
| 101563 | 0, // dsub3_then_bsub |
| 101564 | 0, // dsub3_then_bsub_hi |
| 101565 | 0, // dsub3_then_hsub |
| 101566 | 0, // dsub3_then_hsub_hi |
| 101567 | 0, // dsub3_then_ssub |
| 101568 | 0, // dsub3_then_ssub_hi |
| 101569 | 0, // dsub2_then_bsub |
| 101570 | 0, // dsub2_then_bsub_hi |
| 101571 | 0, // dsub2_then_hsub |
| 101572 | 0, // dsub2_then_hsub_hi |
| 101573 | 0, // dsub2_then_ssub |
| 101574 | 0, // dsub2_then_ssub_hi |
| 101575 | 0, // psub1_then_psub |
| 101576 | 0, // qsub1_then_dsub_hi |
| 101577 | 0, // qsub3_then_dsub_hi |
| 101578 | 0, // qsub2_then_dsub_hi |
| 101579 | 483, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101580 | 483, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101581 | 483, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101582 | 483, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101583 | 483, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101584 | 483, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101585 | 483, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101586 | 483, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101587 | 483, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101588 | 483, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101589 | 483, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101590 | 483, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101591 | 483, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101592 | 483, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101593 | 0, // subo64_then_sub_32 |
| 101594 | 0, // subo64_then_sub_32_hi |
| 101595 | 0, // zsub1_then_zsub_hi |
| 101596 | 0, // zsub3_then_zsub_hi |
| 101597 | 0, // zsub2_then_zsub_hi |
| 101598 | 0, // dsub0_dsub1 |
| 101599 | 0, // dsub0_dsub1_dsub2 |
| 101600 | 0, // dsub1_dsub2 |
| 101601 | 0, // dsub1_dsub2_dsub3 |
| 101602 | 0, // dsub2_dsub3 |
| 101603 | 0, // dsub_dsub1 |
| 101604 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101605 | 0, // dsub_dsub1_dsub2 |
| 101606 | 0, // qsub0_qsub1 |
| 101607 | 0, // qsub0_qsub1_qsub2 |
| 101608 | 0, // qsub1_qsub2 |
| 101609 | 0, // qsub1_qsub2_qsub3 |
| 101610 | 0, // qsub2_qsub3 |
| 101611 | 483, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101612 | 483, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101613 | 483, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101614 | 483, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101615 | 483, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101616 | 483, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101617 | 483, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101618 | 483, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101619 | 0, // sub_32_subo64_then_sub_32 |
| 101620 | 0, // zsub_qsub1 |
| 101621 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101622 | 0, // zsub_qsub1_qsub2 |
| 101623 | 0, // zsub0_zsub1 |
| 101624 | 0, // zsub0_zsub1_zsub2 |
| 101625 | 0, // zsub1_zsub2 |
| 101626 | 0, // zsub1_zsub2_zsub3 |
| 101627 | 0, // zsub2_zsub3 |
| 101628 | 0, // zsub0_zsub2 |
| 101629 | 0, // zsub1_zsub3 |
| 101630 | }, |
| 101631 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101632 | 0, // bsub |
| 101633 | 0, // bsub_hi |
| 101634 | 0, // dsub |
| 101635 | 0, // dsub0 |
| 101636 | 0, // dsub1 |
| 101637 | 0, // dsub2 |
| 101638 | 0, // dsub3 |
| 101639 | 0, // dsub_hi |
| 101640 | 0, // hsub |
| 101641 | 0, // hsub_hi |
| 101642 | 0, // psub |
| 101643 | 0, // psub0 |
| 101644 | 0, // psub1 |
| 101645 | 0, // qsub0 |
| 101646 | 0, // qsub1 |
| 101647 | 0, // qsub2 |
| 101648 | 0, // qsub3 |
| 101649 | 0, // ssub |
| 101650 | 0, // ssub_hi |
| 101651 | 484, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101652 | 484, // sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101653 | 0, // sube32 |
| 101654 | 0, // sube64 |
| 101655 | 0, // subo32 |
| 101656 | 0, // subo64 |
| 101657 | 484, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101658 | 484, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101659 | 484, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101660 | 484, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101661 | 484, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101662 | 484, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101663 | 484, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101664 | 484, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101665 | 0, // zasubb |
| 101666 | 0, // zasubd0 |
| 101667 | 0, // zasubd1 |
| 101668 | 0, // zasubh0 |
| 101669 | 0, // zasubh1 |
| 101670 | 0, // zasubq0 |
| 101671 | 0, // zasubq1 |
| 101672 | 0, // zasubs0 |
| 101673 | 0, // zasubs1 |
| 101674 | 0, // zsub |
| 101675 | 0, // zsub0 |
| 101676 | 0, // zsub1 |
| 101677 | 0, // zsub2 |
| 101678 | 0, // zsub3 |
| 101679 | 0, // zsub_hi |
| 101680 | 0, // zasubd1_then_zasubq0 |
| 101681 | 0, // zasubd1_then_zasubq1 |
| 101682 | 0, // zasubs1_then_zasubd0 |
| 101683 | 0, // zasubs1_then_zasubd1 |
| 101684 | 0, // zasubs1_then_zasubq0 |
| 101685 | 0, // zasubs1_then_zasubq1 |
| 101686 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101687 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101688 | 0, // zasubh1_then_zasubd0 |
| 101689 | 0, // zasubh1_then_zasubd1 |
| 101690 | 0, // zasubh1_then_zasubq0 |
| 101691 | 0, // zasubh1_then_zasubq1 |
| 101692 | 0, // zasubh1_then_zasubs0 |
| 101693 | 0, // zasubh1_then_zasubs1 |
| 101694 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101695 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101696 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101697 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101698 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101699 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101700 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101701 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101702 | 0, // dsub1_then_bsub |
| 101703 | 0, // dsub1_then_bsub_hi |
| 101704 | 0, // dsub1_then_hsub |
| 101705 | 0, // dsub1_then_hsub_hi |
| 101706 | 0, // dsub1_then_ssub |
| 101707 | 0, // dsub1_then_ssub_hi |
| 101708 | 0, // dsub3_then_bsub |
| 101709 | 0, // dsub3_then_bsub_hi |
| 101710 | 0, // dsub3_then_hsub |
| 101711 | 0, // dsub3_then_hsub_hi |
| 101712 | 0, // dsub3_then_ssub |
| 101713 | 0, // dsub3_then_ssub_hi |
| 101714 | 0, // dsub2_then_bsub |
| 101715 | 0, // dsub2_then_bsub_hi |
| 101716 | 0, // dsub2_then_hsub |
| 101717 | 0, // dsub2_then_hsub_hi |
| 101718 | 0, // dsub2_then_ssub |
| 101719 | 0, // dsub2_then_ssub_hi |
| 101720 | 0, // psub1_then_psub |
| 101721 | 0, // qsub1_then_dsub_hi |
| 101722 | 0, // qsub3_then_dsub_hi |
| 101723 | 0, // qsub2_then_dsub_hi |
| 101724 | 484, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101725 | 484, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101726 | 484, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101727 | 484, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101728 | 484, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101729 | 484, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101730 | 484, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101731 | 484, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101732 | 484, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101733 | 484, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101734 | 484, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101735 | 484, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101736 | 484, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101737 | 484, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101738 | 0, // subo64_then_sub_32 |
| 101739 | 0, // subo64_then_sub_32_hi |
| 101740 | 0, // zsub1_then_zsub_hi |
| 101741 | 0, // zsub3_then_zsub_hi |
| 101742 | 0, // zsub2_then_zsub_hi |
| 101743 | 0, // dsub0_dsub1 |
| 101744 | 0, // dsub0_dsub1_dsub2 |
| 101745 | 0, // dsub1_dsub2 |
| 101746 | 0, // dsub1_dsub2_dsub3 |
| 101747 | 0, // dsub2_dsub3 |
| 101748 | 0, // dsub_dsub1 |
| 101749 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101750 | 0, // dsub_dsub1_dsub2 |
| 101751 | 0, // qsub0_qsub1 |
| 101752 | 0, // qsub0_qsub1_qsub2 |
| 101753 | 0, // qsub1_qsub2 |
| 101754 | 0, // qsub1_qsub2_qsub3 |
| 101755 | 0, // qsub2_qsub3 |
| 101756 | 484, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101757 | 484, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101758 | 484, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101759 | 484, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101760 | 484, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101761 | 484, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101762 | 484, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101763 | 484, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 101764 | 0, // sub_32_subo64_then_sub_32 |
| 101765 | 0, // zsub_qsub1 |
| 101766 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101767 | 0, // zsub_qsub1_qsub2 |
| 101768 | 0, // zsub0_zsub1 |
| 101769 | 0, // zsub0_zsub1_zsub2 |
| 101770 | 0, // zsub1_zsub2 |
| 101771 | 0, // zsub1_zsub2_zsub3 |
| 101772 | 0, // zsub2_zsub3 |
| 101773 | 0, // zsub0_zsub2 |
| 101774 | 0, // zsub1_zsub3 |
| 101775 | }, |
| 101776 | { // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101777 | 0, // bsub |
| 101778 | 0, // bsub_hi |
| 101779 | 0, // dsub |
| 101780 | 0, // dsub0 |
| 101781 | 0, // dsub1 |
| 101782 | 0, // dsub2 |
| 101783 | 0, // dsub3 |
| 101784 | 0, // dsub_hi |
| 101785 | 0, // hsub |
| 101786 | 0, // hsub_hi |
| 101787 | 0, // psub |
| 101788 | 0, // psub0 |
| 101789 | 0, // psub1 |
| 101790 | 0, // qsub0 |
| 101791 | 0, // qsub1 |
| 101792 | 0, // qsub2 |
| 101793 | 0, // qsub3 |
| 101794 | 0, // ssub |
| 101795 | 0, // ssub_hi |
| 101796 | 485, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101797 | 485, // sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101798 | 0, // sube32 |
| 101799 | 0, // sube64 |
| 101800 | 0, // subo32 |
| 101801 | 0, // subo64 |
| 101802 | 485, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101803 | 485, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101804 | 485, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101805 | 485, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101806 | 485, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101807 | 485, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101808 | 485, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101809 | 485, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101810 | 0, // zasubb |
| 101811 | 0, // zasubd0 |
| 101812 | 0, // zasubd1 |
| 101813 | 0, // zasubh0 |
| 101814 | 0, // zasubh1 |
| 101815 | 0, // zasubq0 |
| 101816 | 0, // zasubq1 |
| 101817 | 0, // zasubs0 |
| 101818 | 0, // zasubs1 |
| 101819 | 0, // zsub |
| 101820 | 0, // zsub0 |
| 101821 | 0, // zsub1 |
| 101822 | 0, // zsub2 |
| 101823 | 0, // zsub3 |
| 101824 | 0, // zsub_hi |
| 101825 | 0, // zasubd1_then_zasubq0 |
| 101826 | 0, // zasubd1_then_zasubq1 |
| 101827 | 0, // zasubs1_then_zasubd0 |
| 101828 | 0, // zasubs1_then_zasubd1 |
| 101829 | 0, // zasubs1_then_zasubq0 |
| 101830 | 0, // zasubs1_then_zasubq1 |
| 101831 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101832 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101833 | 0, // zasubh1_then_zasubd0 |
| 101834 | 0, // zasubh1_then_zasubd1 |
| 101835 | 0, // zasubh1_then_zasubq0 |
| 101836 | 0, // zasubh1_then_zasubq1 |
| 101837 | 0, // zasubh1_then_zasubs0 |
| 101838 | 0, // zasubh1_then_zasubs1 |
| 101839 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101840 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101841 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101842 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101843 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101844 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101845 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101846 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101847 | 0, // dsub1_then_bsub |
| 101848 | 0, // dsub1_then_bsub_hi |
| 101849 | 0, // dsub1_then_hsub |
| 101850 | 0, // dsub1_then_hsub_hi |
| 101851 | 0, // dsub1_then_ssub |
| 101852 | 0, // dsub1_then_ssub_hi |
| 101853 | 0, // dsub3_then_bsub |
| 101854 | 0, // dsub3_then_bsub_hi |
| 101855 | 0, // dsub3_then_hsub |
| 101856 | 0, // dsub3_then_hsub_hi |
| 101857 | 0, // dsub3_then_ssub |
| 101858 | 0, // dsub3_then_ssub_hi |
| 101859 | 0, // dsub2_then_bsub |
| 101860 | 0, // dsub2_then_bsub_hi |
| 101861 | 0, // dsub2_then_hsub |
| 101862 | 0, // dsub2_then_hsub_hi |
| 101863 | 0, // dsub2_then_ssub |
| 101864 | 0, // dsub2_then_ssub_hi |
| 101865 | 0, // psub1_then_psub |
| 101866 | 0, // qsub1_then_dsub_hi |
| 101867 | 0, // qsub3_then_dsub_hi |
| 101868 | 0, // qsub2_then_dsub_hi |
| 101869 | 485, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101870 | 485, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101871 | 485, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101872 | 485, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101873 | 485, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101874 | 485, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101875 | 485, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101876 | 485, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101877 | 485, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101878 | 485, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101879 | 485, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101880 | 485, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101881 | 485, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101882 | 485, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101883 | 0, // subo64_then_sub_32 |
| 101884 | 0, // subo64_then_sub_32_hi |
| 101885 | 0, // zsub1_then_zsub_hi |
| 101886 | 0, // zsub3_then_zsub_hi |
| 101887 | 0, // zsub2_then_zsub_hi |
| 101888 | 0, // dsub0_dsub1 |
| 101889 | 0, // dsub0_dsub1_dsub2 |
| 101890 | 0, // dsub1_dsub2 |
| 101891 | 0, // dsub1_dsub2_dsub3 |
| 101892 | 0, // dsub2_dsub3 |
| 101893 | 0, // dsub_dsub1 |
| 101894 | 0, // dsub_dsub1_dsub2_dsub3 |
| 101895 | 0, // dsub_dsub1_dsub2 |
| 101896 | 0, // qsub0_qsub1 |
| 101897 | 0, // qsub0_qsub1_qsub2 |
| 101898 | 0, // qsub1_qsub2 |
| 101899 | 0, // qsub1_qsub2_qsub3 |
| 101900 | 0, // qsub2_qsub3 |
| 101901 | 485, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101902 | 485, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101903 | 485, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101904 | 485, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101905 | 485, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101906 | 485, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101907 | 485, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101908 | 485, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 101909 | 0, // sub_32_subo64_then_sub_32 |
| 101910 | 0, // zsub_qsub1 |
| 101911 | 0, // zsub_qsub1_qsub2_qsub3 |
| 101912 | 0, // zsub_qsub1_qsub2 |
| 101913 | 0, // zsub0_zsub1 |
| 101914 | 0, // zsub0_zsub1_zsub2 |
| 101915 | 0, // zsub1_zsub2 |
| 101916 | 0, // zsub1_zsub2_zsub3 |
| 101917 | 0, // zsub2_zsub3 |
| 101918 | 0, // zsub0_zsub2 |
| 101919 | 0, // zsub1_zsub3 |
| 101920 | }, |
| 101921 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101922 | 0, // bsub |
| 101923 | 0, // bsub_hi |
| 101924 | 0, // dsub |
| 101925 | 0, // dsub0 |
| 101926 | 0, // dsub1 |
| 101927 | 0, // dsub2 |
| 101928 | 0, // dsub3 |
| 101929 | 0, // dsub_hi |
| 101930 | 0, // hsub |
| 101931 | 0, // hsub_hi |
| 101932 | 0, // psub |
| 101933 | 0, // psub0 |
| 101934 | 0, // psub1 |
| 101935 | 0, // qsub0 |
| 101936 | 0, // qsub1 |
| 101937 | 0, // qsub2 |
| 101938 | 0, // qsub3 |
| 101939 | 0, // ssub |
| 101940 | 0, // ssub_hi |
| 101941 | 486, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101942 | 486, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101943 | 0, // sube32 |
| 101944 | 0, // sube64 |
| 101945 | 0, // subo32 |
| 101946 | 0, // subo64 |
| 101947 | 486, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101948 | 486, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101949 | 486, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101950 | 486, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101951 | 486, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101952 | 486, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101953 | 486, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101954 | 486, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 101955 | 0, // zasubb |
| 101956 | 0, // zasubd0 |
| 101957 | 0, // zasubd1 |
| 101958 | 0, // zasubh0 |
| 101959 | 0, // zasubh1 |
| 101960 | 0, // zasubq0 |
| 101961 | 0, // zasubq1 |
| 101962 | 0, // zasubs0 |
| 101963 | 0, // zasubs1 |
| 101964 | 0, // zsub |
| 101965 | 0, // zsub0 |
| 101966 | 0, // zsub1 |
| 101967 | 0, // zsub2 |
| 101968 | 0, // zsub3 |
| 101969 | 0, // zsub_hi |
| 101970 | 0, // zasubd1_then_zasubq0 |
| 101971 | 0, // zasubd1_then_zasubq1 |
| 101972 | 0, // zasubs1_then_zasubd0 |
| 101973 | 0, // zasubs1_then_zasubd1 |
| 101974 | 0, // zasubs1_then_zasubq0 |
| 101975 | 0, // zasubs1_then_zasubq1 |
| 101976 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 101977 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 101978 | 0, // zasubh1_then_zasubd0 |
| 101979 | 0, // zasubh1_then_zasubd1 |
| 101980 | 0, // zasubh1_then_zasubq0 |
| 101981 | 0, // zasubh1_then_zasubq1 |
| 101982 | 0, // zasubh1_then_zasubs0 |
| 101983 | 0, // zasubh1_then_zasubs1 |
| 101984 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 101985 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 101986 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 101987 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 101988 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 101989 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 101990 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 101991 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 101992 | 0, // dsub1_then_bsub |
| 101993 | 0, // dsub1_then_bsub_hi |
| 101994 | 0, // dsub1_then_hsub |
| 101995 | 0, // dsub1_then_hsub_hi |
| 101996 | 0, // dsub1_then_ssub |
| 101997 | 0, // dsub1_then_ssub_hi |
| 101998 | 0, // dsub3_then_bsub |
| 101999 | 0, // dsub3_then_bsub_hi |
| 102000 | 0, // dsub3_then_hsub |
| 102001 | 0, // dsub3_then_hsub_hi |
| 102002 | 0, // dsub3_then_ssub |
| 102003 | 0, // dsub3_then_ssub_hi |
| 102004 | 0, // dsub2_then_bsub |
| 102005 | 0, // dsub2_then_bsub_hi |
| 102006 | 0, // dsub2_then_hsub |
| 102007 | 0, // dsub2_then_hsub_hi |
| 102008 | 0, // dsub2_then_ssub |
| 102009 | 0, // dsub2_then_ssub_hi |
| 102010 | 0, // psub1_then_psub |
| 102011 | 0, // qsub1_then_dsub_hi |
| 102012 | 0, // qsub3_then_dsub_hi |
| 102013 | 0, // qsub2_then_dsub_hi |
| 102014 | 486, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102015 | 486, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102016 | 486, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102017 | 486, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102018 | 486, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102019 | 486, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102020 | 486, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102021 | 486, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102022 | 486, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102023 | 486, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102024 | 486, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102025 | 486, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102026 | 486, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102027 | 486, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102028 | 0, // subo64_then_sub_32 |
| 102029 | 0, // subo64_then_sub_32_hi |
| 102030 | 0, // zsub1_then_zsub_hi |
| 102031 | 0, // zsub3_then_zsub_hi |
| 102032 | 0, // zsub2_then_zsub_hi |
| 102033 | 0, // dsub0_dsub1 |
| 102034 | 0, // dsub0_dsub1_dsub2 |
| 102035 | 0, // dsub1_dsub2 |
| 102036 | 0, // dsub1_dsub2_dsub3 |
| 102037 | 0, // dsub2_dsub3 |
| 102038 | 0, // dsub_dsub1 |
| 102039 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102040 | 0, // dsub_dsub1_dsub2 |
| 102041 | 0, // qsub0_qsub1 |
| 102042 | 0, // qsub0_qsub1_qsub2 |
| 102043 | 0, // qsub1_qsub2 |
| 102044 | 0, // qsub1_qsub2_qsub3 |
| 102045 | 0, // qsub2_qsub3 |
| 102046 | 486, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102047 | 486, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102048 | 486, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102049 | 486, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102050 | 486, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102051 | 486, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102052 | 486, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102053 | 486, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102054 | 0, // sub_32_subo64_then_sub_32 |
| 102055 | 0, // zsub_qsub1 |
| 102056 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102057 | 0, // zsub_qsub1_qsub2 |
| 102058 | 0, // zsub0_zsub1 |
| 102059 | 0, // zsub0_zsub1_zsub2 |
| 102060 | 0, // zsub1_zsub2 |
| 102061 | 0, // zsub1_zsub2_zsub3 |
| 102062 | 0, // zsub2_zsub3 |
| 102063 | 0, // zsub0_zsub2 |
| 102064 | 0, // zsub1_zsub3 |
| 102065 | }, |
| 102066 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102067 | 0, // bsub |
| 102068 | 0, // bsub_hi |
| 102069 | 0, // dsub |
| 102070 | 0, // dsub0 |
| 102071 | 0, // dsub1 |
| 102072 | 0, // dsub2 |
| 102073 | 0, // dsub3 |
| 102074 | 0, // dsub_hi |
| 102075 | 0, // hsub |
| 102076 | 0, // hsub_hi |
| 102077 | 0, // psub |
| 102078 | 0, // psub0 |
| 102079 | 0, // psub1 |
| 102080 | 0, // qsub0 |
| 102081 | 0, // qsub1 |
| 102082 | 0, // qsub2 |
| 102083 | 0, // qsub3 |
| 102084 | 0, // ssub |
| 102085 | 0, // ssub_hi |
| 102086 | 487, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102087 | 487, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102088 | 0, // sube32 |
| 102089 | 0, // sube64 |
| 102090 | 0, // subo32 |
| 102091 | 0, // subo64 |
| 102092 | 487, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102093 | 487, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102094 | 487, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102095 | 487, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102096 | 487, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102097 | 487, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102098 | 487, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102099 | 487, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102100 | 0, // zasubb |
| 102101 | 0, // zasubd0 |
| 102102 | 0, // zasubd1 |
| 102103 | 0, // zasubh0 |
| 102104 | 0, // zasubh1 |
| 102105 | 0, // zasubq0 |
| 102106 | 0, // zasubq1 |
| 102107 | 0, // zasubs0 |
| 102108 | 0, // zasubs1 |
| 102109 | 0, // zsub |
| 102110 | 0, // zsub0 |
| 102111 | 0, // zsub1 |
| 102112 | 0, // zsub2 |
| 102113 | 0, // zsub3 |
| 102114 | 0, // zsub_hi |
| 102115 | 0, // zasubd1_then_zasubq0 |
| 102116 | 0, // zasubd1_then_zasubq1 |
| 102117 | 0, // zasubs1_then_zasubd0 |
| 102118 | 0, // zasubs1_then_zasubd1 |
| 102119 | 0, // zasubs1_then_zasubq0 |
| 102120 | 0, // zasubs1_then_zasubq1 |
| 102121 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102122 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102123 | 0, // zasubh1_then_zasubd0 |
| 102124 | 0, // zasubh1_then_zasubd1 |
| 102125 | 0, // zasubh1_then_zasubq0 |
| 102126 | 0, // zasubh1_then_zasubq1 |
| 102127 | 0, // zasubh1_then_zasubs0 |
| 102128 | 0, // zasubh1_then_zasubs1 |
| 102129 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102130 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102131 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102132 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102133 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102134 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102135 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102136 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102137 | 0, // dsub1_then_bsub |
| 102138 | 0, // dsub1_then_bsub_hi |
| 102139 | 0, // dsub1_then_hsub |
| 102140 | 0, // dsub1_then_hsub_hi |
| 102141 | 0, // dsub1_then_ssub |
| 102142 | 0, // dsub1_then_ssub_hi |
| 102143 | 0, // dsub3_then_bsub |
| 102144 | 0, // dsub3_then_bsub_hi |
| 102145 | 0, // dsub3_then_hsub |
| 102146 | 0, // dsub3_then_hsub_hi |
| 102147 | 0, // dsub3_then_ssub |
| 102148 | 0, // dsub3_then_ssub_hi |
| 102149 | 0, // dsub2_then_bsub |
| 102150 | 0, // dsub2_then_bsub_hi |
| 102151 | 0, // dsub2_then_hsub |
| 102152 | 0, // dsub2_then_hsub_hi |
| 102153 | 0, // dsub2_then_ssub |
| 102154 | 0, // dsub2_then_ssub_hi |
| 102155 | 0, // psub1_then_psub |
| 102156 | 0, // qsub1_then_dsub_hi |
| 102157 | 0, // qsub3_then_dsub_hi |
| 102158 | 0, // qsub2_then_dsub_hi |
| 102159 | 487, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102160 | 487, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102161 | 487, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102162 | 487, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102163 | 487, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102164 | 487, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102165 | 487, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102166 | 487, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102167 | 487, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102168 | 487, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102169 | 487, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102170 | 487, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102171 | 487, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102172 | 487, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102173 | 0, // subo64_then_sub_32 |
| 102174 | 0, // subo64_then_sub_32_hi |
| 102175 | 0, // zsub1_then_zsub_hi |
| 102176 | 0, // zsub3_then_zsub_hi |
| 102177 | 0, // zsub2_then_zsub_hi |
| 102178 | 0, // dsub0_dsub1 |
| 102179 | 0, // dsub0_dsub1_dsub2 |
| 102180 | 0, // dsub1_dsub2 |
| 102181 | 0, // dsub1_dsub2_dsub3 |
| 102182 | 0, // dsub2_dsub3 |
| 102183 | 0, // dsub_dsub1 |
| 102184 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102185 | 0, // dsub_dsub1_dsub2 |
| 102186 | 0, // qsub0_qsub1 |
| 102187 | 0, // qsub0_qsub1_qsub2 |
| 102188 | 0, // qsub1_qsub2 |
| 102189 | 0, // qsub1_qsub2_qsub3 |
| 102190 | 0, // qsub2_qsub3 |
| 102191 | 487, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102192 | 487, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102193 | 487, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102194 | 487, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102195 | 487, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102196 | 487, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102197 | 487, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102198 | 487, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102199 | 0, // sub_32_subo64_then_sub_32 |
| 102200 | 0, // zsub_qsub1 |
| 102201 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102202 | 0, // zsub_qsub1_qsub2 |
| 102203 | 0, // zsub0_zsub1 |
| 102204 | 0, // zsub0_zsub1_zsub2 |
| 102205 | 0, // zsub1_zsub2 |
| 102206 | 0, // zsub1_zsub2_zsub3 |
| 102207 | 0, // zsub2_zsub3 |
| 102208 | 0, // zsub0_zsub2 |
| 102209 | 0, // zsub1_zsub3 |
| 102210 | }, |
| 102211 | { // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102212 | 0, // bsub |
| 102213 | 0, // bsub_hi |
| 102214 | 0, // dsub |
| 102215 | 0, // dsub0 |
| 102216 | 0, // dsub1 |
| 102217 | 0, // dsub2 |
| 102218 | 0, // dsub3 |
| 102219 | 0, // dsub_hi |
| 102220 | 0, // hsub |
| 102221 | 0, // hsub_hi |
| 102222 | 0, // psub |
| 102223 | 0, // psub0 |
| 102224 | 0, // psub1 |
| 102225 | 0, // qsub0 |
| 102226 | 0, // qsub1 |
| 102227 | 0, // qsub2 |
| 102228 | 0, // qsub3 |
| 102229 | 0, // ssub |
| 102230 | 0, // ssub_hi |
| 102231 | 488, // sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102232 | 488, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102233 | 0, // sube32 |
| 102234 | 0, // sube64 |
| 102235 | 0, // subo32 |
| 102236 | 0, // subo64 |
| 102237 | 488, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102238 | 488, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102239 | 488, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102240 | 488, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102241 | 488, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102242 | 488, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102243 | 488, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102244 | 488, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102245 | 0, // zasubb |
| 102246 | 0, // zasubd0 |
| 102247 | 0, // zasubd1 |
| 102248 | 0, // zasubh0 |
| 102249 | 0, // zasubh1 |
| 102250 | 0, // zasubq0 |
| 102251 | 0, // zasubq1 |
| 102252 | 0, // zasubs0 |
| 102253 | 0, // zasubs1 |
| 102254 | 0, // zsub |
| 102255 | 0, // zsub0 |
| 102256 | 0, // zsub1 |
| 102257 | 0, // zsub2 |
| 102258 | 0, // zsub3 |
| 102259 | 0, // zsub_hi |
| 102260 | 0, // zasubd1_then_zasubq0 |
| 102261 | 0, // zasubd1_then_zasubq1 |
| 102262 | 0, // zasubs1_then_zasubd0 |
| 102263 | 0, // zasubs1_then_zasubd1 |
| 102264 | 0, // zasubs1_then_zasubq0 |
| 102265 | 0, // zasubs1_then_zasubq1 |
| 102266 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102267 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102268 | 0, // zasubh1_then_zasubd0 |
| 102269 | 0, // zasubh1_then_zasubd1 |
| 102270 | 0, // zasubh1_then_zasubq0 |
| 102271 | 0, // zasubh1_then_zasubq1 |
| 102272 | 0, // zasubh1_then_zasubs0 |
| 102273 | 0, // zasubh1_then_zasubs1 |
| 102274 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102275 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102276 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102277 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102278 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102279 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102280 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102281 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102282 | 0, // dsub1_then_bsub |
| 102283 | 0, // dsub1_then_bsub_hi |
| 102284 | 0, // dsub1_then_hsub |
| 102285 | 0, // dsub1_then_hsub_hi |
| 102286 | 0, // dsub1_then_ssub |
| 102287 | 0, // dsub1_then_ssub_hi |
| 102288 | 0, // dsub3_then_bsub |
| 102289 | 0, // dsub3_then_bsub_hi |
| 102290 | 0, // dsub3_then_hsub |
| 102291 | 0, // dsub3_then_hsub_hi |
| 102292 | 0, // dsub3_then_ssub |
| 102293 | 0, // dsub3_then_ssub_hi |
| 102294 | 0, // dsub2_then_bsub |
| 102295 | 0, // dsub2_then_bsub_hi |
| 102296 | 0, // dsub2_then_hsub |
| 102297 | 0, // dsub2_then_hsub_hi |
| 102298 | 0, // dsub2_then_ssub |
| 102299 | 0, // dsub2_then_ssub_hi |
| 102300 | 0, // psub1_then_psub |
| 102301 | 0, // qsub1_then_dsub_hi |
| 102302 | 0, // qsub3_then_dsub_hi |
| 102303 | 0, // qsub2_then_dsub_hi |
| 102304 | 488, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102305 | 488, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102306 | 488, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102307 | 488, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102308 | 488, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102309 | 488, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102310 | 488, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102311 | 488, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102312 | 488, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102313 | 488, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102314 | 488, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102315 | 488, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102316 | 488, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102317 | 488, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102318 | 0, // subo64_then_sub_32 |
| 102319 | 0, // subo64_then_sub_32_hi |
| 102320 | 0, // zsub1_then_zsub_hi |
| 102321 | 0, // zsub3_then_zsub_hi |
| 102322 | 0, // zsub2_then_zsub_hi |
| 102323 | 0, // dsub0_dsub1 |
| 102324 | 0, // dsub0_dsub1_dsub2 |
| 102325 | 0, // dsub1_dsub2 |
| 102326 | 0, // dsub1_dsub2_dsub3 |
| 102327 | 0, // dsub2_dsub3 |
| 102328 | 0, // dsub_dsub1 |
| 102329 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102330 | 0, // dsub_dsub1_dsub2 |
| 102331 | 0, // qsub0_qsub1 |
| 102332 | 0, // qsub0_qsub1_qsub2 |
| 102333 | 0, // qsub1_qsub2 |
| 102334 | 0, // qsub1_qsub2_qsub3 |
| 102335 | 0, // qsub2_qsub3 |
| 102336 | 488, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102337 | 488, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102338 | 488, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102339 | 488, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102340 | 488, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102341 | 488, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102342 | 488, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102343 | 488, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 102344 | 0, // sub_32_subo64_then_sub_32 |
| 102345 | 0, // zsub_qsub1 |
| 102346 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102347 | 0, // zsub_qsub1_qsub2 |
| 102348 | 0, // zsub0_zsub1 |
| 102349 | 0, // zsub0_zsub1_zsub2 |
| 102350 | 0, // zsub1_zsub2 |
| 102351 | 0, // zsub1_zsub2_zsub3 |
| 102352 | 0, // zsub2_zsub3 |
| 102353 | 0, // zsub0_zsub2 |
| 102354 | 0, // zsub1_zsub3 |
| 102355 | }, |
| 102356 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102357 | 0, // bsub |
| 102358 | 0, // bsub_hi |
| 102359 | 0, // dsub |
| 102360 | 0, // dsub0 |
| 102361 | 0, // dsub1 |
| 102362 | 0, // dsub2 |
| 102363 | 0, // dsub3 |
| 102364 | 0, // dsub_hi |
| 102365 | 0, // hsub |
| 102366 | 0, // hsub_hi |
| 102367 | 0, // psub |
| 102368 | 0, // psub0 |
| 102369 | 0, // psub1 |
| 102370 | 0, // qsub0 |
| 102371 | 0, // qsub1 |
| 102372 | 0, // qsub2 |
| 102373 | 0, // qsub3 |
| 102374 | 0, // ssub |
| 102375 | 0, // ssub_hi |
| 102376 | 489, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102377 | 489, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102378 | 0, // sube32 |
| 102379 | 0, // sube64 |
| 102380 | 0, // subo32 |
| 102381 | 0, // subo64 |
| 102382 | 489, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102383 | 489, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102384 | 489, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102385 | 489, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102386 | 489, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102387 | 489, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102388 | 489, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102389 | 489, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102390 | 0, // zasubb |
| 102391 | 0, // zasubd0 |
| 102392 | 0, // zasubd1 |
| 102393 | 0, // zasubh0 |
| 102394 | 0, // zasubh1 |
| 102395 | 0, // zasubq0 |
| 102396 | 0, // zasubq1 |
| 102397 | 0, // zasubs0 |
| 102398 | 0, // zasubs1 |
| 102399 | 0, // zsub |
| 102400 | 0, // zsub0 |
| 102401 | 0, // zsub1 |
| 102402 | 0, // zsub2 |
| 102403 | 0, // zsub3 |
| 102404 | 0, // zsub_hi |
| 102405 | 0, // zasubd1_then_zasubq0 |
| 102406 | 0, // zasubd1_then_zasubq1 |
| 102407 | 0, // zasubs1_then_zasubd0 |
| 102408 | 0, // zasubs1_then_zasubd1 |
| 102409 | 0, // zasubs1_then_zasubq0 |
| 102410 | 0, // zasubs1_then_zasubq1 |
| 102411 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102412 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102413 | 0, // zasubh1_then_zasubd0 |
| 102414 | 0, // zasubh1_then_zasubd1 |
| 102415 | 0, // zasubh1_then_zasubq0 |
| 102416 | 0, // zasubh1_then_zasubq1 |
| 102417 | 0, // zasubh1_then_zasubs0 |
| 102418 | 0, // zasubh1_then_zasubs1 |
| 102419 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102420 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102421 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102422 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102423 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102424 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102425 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102426 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102427 | 0, // dsub1_then_bsub |
| 102428 | 0, // dsub1_then_bsub_hi |
| 102429 | 0, // dsub1_then_hsub |
| 102430 | 0, // dsub1_then_hsub_hi |
| 102431 | 0, // dsub1_then_ssub |
| 102432 | 0, // dsub1_then_ssub_hi |
| 102433 | 0, // dsub3_then_bsub |
| 102434 | 0, // dsub3_then_bsub_hi |
| 102435 | 0, // dsub3_then_hsub |
| 102436 | 0, // dsub3_then_hsub_hi |
| 102437 | 0, // dsub3_then_ssub |
| 102438 | 0, // dsub3_then_ssub_hi |
| 102439 | 0, // dsub2_then_bsub |
| 102440 | 0, // dsub2_then_bsub_hi |
| 102441 | 0, // dsub2_then_hsub |
| 102442 | 0, // dsub2_then_hsub_hi |
| 102443 | 0, // dsub2_then_ssub |
| 102444 | 0, // dsub2_then_ssub_hi |
| 102445 | 0, // psub1_then_psub |
| 102446 | 0, // qsub1_then_dsub_hi |
| 102447 | 0, // qsub3_then_dsub_hi |
| 102448 | 0, // qsub2_then_dsub_hi |
| 102449 | 489, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102450 | 489, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102451 | 489, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102452 | 489, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102453 | 489, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102454 | 489, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102455 | 489, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102456 | 489, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102457 | 489, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102458 | 489, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102459 | 489, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102460 | 489, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102461 | 489, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102462 | 489, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102463 | 0, // subo64_then_sub_32 |
| 102464 | 0, // subo64_then_sub_32_hi |
| 102465 | 0, // zsub1_then_zsub_hi |
| 102466 | 0, // zsub3_then_zsub_hi |
| 102467 | 0, // zsub2_then_zsub_hi |
| 102468 | 0, // dsub0_dsub1 |
| 102469 | 0, // dsub0_dsub1_dsub2 |
| 102470 | 0, // dsub1_dsub2 |
| 102471 | 0, // dsub1_dsub2_dsub3 |
| 102472 | 0, // dsub2_dsub3 |
| 102473 | 0, // dsub_dsub1 |
| 102474 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102475 | 0, // dsub_dsub1_dsub2 |
| 102476 | 0, // qsub0_qsub1 |
| 102477 | 0, // qsub0_qsub1_qsub2 |
| 102478 | 0, // qsub1_qsub2 |
| 102479 | 0, // qsub1_qsub2_qsub3 |
| 102480 | 0, // qsub2_qsub3 |
| 102481 | 489, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102482 | 489, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102483 | 489, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102484 | 489, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102485 | 489, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102486 | 489, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102487 | 489, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102488 | 489, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102489 | 0, // sub_32_subo64_then_sub_32 |
| 102490 | 0, // zsub_qsub1 |
| 102491 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102492 | 0, // zsub_qsub1_qsub2 |
| 102493 | 0, // zsub0_zsub1 |
| 102494 | 0, // zsub0_zsub1_zsub2 |
| 102495 | 0, // zsub1_zsub2 |
| 102496 | 0, // zsub1_zsub2_zsub3 |
| 102497 | 0, // zsub2_zsub3 |
| 102498 | 0, // zsub0_zsub2 |
| 102499 | 0, // zsub1_zsub3 |
| 102500 | }, |
| 102501 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102502 | 0, // bsub |
| 102503 | 0, // bsub_hi |
| 102504 | 0, // dsub |
| 102505 | 0, // dsub0 |
| 102506 | 0, // dsub1 |
| 102507 | 0, // dsub2 |
| 102508 | 0, // dsub3 |
| 102509 | 0, // dsub_hi |
| 102510 | 0, // hsub |
| 102511 | 0, // hsub_hi |
| 102512 | 0, // psub |
| 102513 | 0, // psub0 |
| 102514 | 0, // psub1 |
| 102515 | 0, // qsub0 |
| 102516 | 0, // qsub1 |
| 102517 | 0, // qsub2 |
| 102518 | 0, // qsub3 |
| 102519 | 0, // ssub |
| 102520 | 0, // ssub_hi |
| 102521 | 490, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102522 | 490, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102523 | 0, // sube32 |
| 102524 | 0, // sube64 |
| 102525 | 0, // subo32 |
| 102526 | 0, // subo64 |
| 102527 | 490, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102528 | 490, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102529 | 490, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102530 | 490, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102531 | 490, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102532 | 490, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102533 | 490, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102534 | 490, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102535 | 0, // zasubb |
| 102536 | 0, // zasubd0 |
| 102537 | 0, // zasubd1 |
| 102538 | 0, // zasubh0 |
| 102539 | 0, // zasubh1 |
| 102540 | 0, // zasubq0 |
| 102541 | 0, // zasubq1 |
| 102542 | 0, // zasubs0 |
| 102543 | 0, // zasubs1 |
| 102544 | 0, // zsub |
| 102545 | 0, // zsub0 |
| 102546 | 0, // zsub1 |
| 102547 | 0, // zsub2 |
| 102548 | 0, // zsub3 |
| 102549 | 0, // zsub_hi |
| 102550 | 0, // zasubd1_then_zasubq0 |
| 102551 | 0, // zasubd1_then_zasubq1 |
| 102552 | 0, // zasubs1_then_zasubd0 |
| 102553 | 0, // zasubs1_then_zasubd1 |
| 102554 | 0, // zasubs1_then_zasubq0 |
| 102555 | 0, // zasubs1_then_zasubq1 |
| 102556 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102557 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102558 | 0, // zasubh1_then_zasubd0 |
| 102559 | 0, // zasubh1_then_zasubd1 |
| 102560 | 0, // zasubh1_then_zasubq0 |
| 102561 | 0, // zasubh1_then_zasubq1 |
| 102562 | 0, // zasubh1_then_zasubs0 |
| 102563 | 0, // zasubh1_then_zasubs1 |
| 102564 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102565 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102566 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102567 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102568 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102569 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102570 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102571 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102572 | 0, // dsub1_then_bsub |
| 102573 | 0, // dsub1_then_bsub_hi |
| 102574 | 0, // dsub1_then_hsub |
| 102575 | 0, // dsub1_then_hsub_hi |
| 102576 | 0, // dsub1_then_ssub |
| 102577 | 0, // dsub1_then_ssub_hi |
| 102578 | 0, // dsub3_then_bsub |
| 102579 | 0, // dsub3_then_bsub_hi |
| 102580 | 0, // dsub3_then_hsub |
| 102581 | 0, // dsub3_then_hsub_hi |
| 102582 | 0, // dsub3_then_ssub |
| 102583 | 0, // dsub3_then_ssub_hi |
| 102584 | 0, // dsub2_then_bsub |
| 102585 | 0, // dsub2_then_bsub_hi |
| 102586 | 0, // dsub2_then_hsub |
| 102587 | 0, // dsub2_then_hsub_hi |
| 102588 | 0, // dsub2_then_ssub |
| 102589 | 0, // dsub2_then_ssub_hi |
| 102590 | 0, // psub1_then_psub |
| 102591 | 0, // qsub1_then_dsub_hi |
| 102592 | 0, // qsub3_then_dsub_hi |
| 102593 | 0, // qsub2_then_dsub_hi |
| 102594 | 490, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102595 | 490, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102596 | 490, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102597 | 490, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102598 | 490, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102599 | 490, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102600 | 490, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102601 | 490, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102602 | 490, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102603 | 490, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102604 | 490, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102605 | 490, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102606 | 490, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102607 | 490, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102608 | 0, // subo64_then_sub_32 |
| 102609 | 0, // subo64_then_sub_32_hi |
| 102610 | 0, // zsub1_then_zsub_hi |
| 102611 | 0, // zsub3_then_zsub_hi |
| 102612 | 0, // zsub2_then_zsub_hi |
| 102613 | 0, // dsub0_dsub1 |
| 102614 | 0, // dsub0_dsub1_dsub2 |
| 102615 | 0, // dsub1_dsub2 |
| 102616 | 0, // dsub1_dsub2_dsub3 |
| 102617 | 0, // dsub2_dsub3 |
| 102618 | 0, // dsub_dsub1 |
| 102619 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102620 | 0, // dsub_dsub1_dsub2 |
| 102621 | 0, // qsub0_qsub1 |
| 102622 | 0, // qsub0_qsub1_qsub2 |
| 102623 | 0, // qsub1_qsub2 |
| 102624 | 0, // qsub1_qsub2_qsub3 |
| 102625 | 0, // qsub2_qsub3 |
| 102626 | 490, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102627 | 490, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102628 | 490, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102629 | 490, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102630 | 490, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102631 | 490, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102632 | 490, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102633 | 490, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102634 | 0, // sub_32_subo64_then_sub_32 |
| 102635 | 0, // zsub_qsub1 |
| 102636 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102637 | 0, // zsub_qsub1_qsub2 |
| 102638 | 0, // zsub0_zsub1 |
| 102639 | 0, // zsub0_zsub1_zsub2 |
| 102640 | 0, // zsub1_zsub2 |
| 102641 | 0, // zsub1_zsub2_zsub3 |
| 102642 | 0, // zsub2_zsub3 |
| 102643 | 0, // zsub0_zsub2 |
| 102644 | 0, // zsub1_zsub3 |
| 102645 | }, |
| 102646 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102647 | 0, // bsub |
| 102648 | 0, // bsub_hi |
| 102649 | 0, // dsub |
| 102650 | 0, // dsub0 |
| 102651 | 0, // dsub1 |
| 102652 | 0, // dsub2 |
| 102653 | 0, // dsub3 |
| 102654 | 0, // dsub_hi |
| 102655 | 0, // hsub |
| 102656 | 0, // hsub_hi |
| 102657 | 0, // psub |
| 102658 | 0, // psub0 |
| 102659 | 0, // psub1 |
| 102660 | 0, // qsub0 |
| 102661 | 0, // qsub1 |
| 102662 | 0, // qsub2 |
| 102663 | 0, // qsub3 |
| 102664 | 0, // ssub |
| 102665 | 0, // ssub_hi |
| 102666 | 491, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102667 | 491, // sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102668 | 0, // sube32 |
| 102669 | 0, // sube64 |
| 102670 | 0, // subo32 |
| 102671 | 0, // subo64 |
| 102672 | 491, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102673 | 491, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102674 | 491, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102675 | 491, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102676 | 491, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102677 | 491, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102678 | 491, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102679 | 491, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102680 | 0, // zasubb |
| 102681 | 0, // zasubd0 |
| 102682 | 0, // zasubd1 |
| 102683 | 0, // zasubh0 |
| 102684 | 0, // zasubh1 |
| 102685 | 0, // zasubq0 |
| 102686 | 0, // zasubq1 |
| 102687 | 0, // zasubs0 |
| 102688 | 0, // zasubs1 |
| 102689 | 0, // zsub |
| 102690 | 0, // zsub0 |
| 102691 | 0, // zsub1 |
| 102692 | 0, // zsub2 |
| 102693 | 0, // zsub3 |
| 102694 | 0, // zsub_hi |
| 102695 | 0, // zasubd1_then_zasubq0 |
| 102696 | 0, // zasubd1_then_zasubq1 |
| 102697 | 0, // zasubs1_then_zasubd0 |
| 102698 | 0, // zasubs1_then_zasubd1 |
| 102699 | 0, // zasubs1_then_zasubq0 |
| 102700 | 0, // zasubs1_then_zasubq1 |
| 102701 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102702 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102703 | 0, // zasubh1_then_zasubd0 |
| 102704 | 0, // zasubh1_then_zasubd1 |
| 102705 | 0, // zasubh1_then_zasubq0 |
| 102706 | 0, // zasubh1_then_zasubq1 |
| 102707 | 0, // zasubh1_then_zasubs0 |
| 102708 | 0, // zasubh1_then_zasubs1 |
| 102709 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102710 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102711 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102712 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102713 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102714 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102715 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102716 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102717 | 0, // dsub1_then_bsub |
| 102718 | 0, // dsub1_then_bsub_hi |
| 102719 | 0, // dsub1_then_hsub |
| 102720 | 0, // dsub1_then_hsub_hi |
| 102721 | 0, // dsub1_then_ssub |
| 102722 | 0, // dsub1_then_ssub_hi |
| 102723 | 0, // dsub3_then_bsub |
| 102724 | 0, // dsub3_then_bsub_hi |
| 102725 | 0, // dsub3_then_hsub |
| 102726 | 0, // dsub3_then_hsub_hi |
| 102727 | 0, // dsub3_then_ssub |
| 102728 | 0, // dsub3_then_ssub_hi |
| 102729 | 0, // dsub2_then_bsub |
| 102730 | 0, // dsub2_then_bsub_hi |
| 102731 | 0, // dsub2_then_hsub |
| 102732 | 0, // dsub2_then_hsub_hi |
| 102733 | 0, // dsub2_then_ssub |
| 102734 | 0, // dsub2_then_ssub_hi |
| 102735 | 0, // psub1_then_psub |
| 102736 | 0, // qsub1_then_dsub_hi |
| 102737 | 0, // qsub3_then_dsub_hi |
| 102738 | 0, // qsub2_then_dsub_hi |
| 102739 | 491, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102740 | 491, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102741 | 491, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102742 | 491, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102743 | 491, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102744 | 491, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102745 | 491, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102746 | 491, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102747 | 491, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102748 | 491, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102749 | 491, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102750 | 491, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102751 | 491, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102752 | 491, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102753 | 0, // subo64_then_sub_32 |
| 102754 | 0, // subo64_then_sub_32_hi |
| 102755 | 0, // zsub1_then_zsub_hi |
| 102756 | 0, // zsub3_then_zsub_hi |
| 102757 | 0, // zsub2_then_zsub_hi |
| 102758 | 0, // dsub0_dsub1 |
| 102759 | 0, // dsub0_dsub1_dsub2 |
| 102760 | 0, // dsub1_dsub2 |
| 102761 | 0, // dsub1_dsub2_dsub3 |
| 102762 | 0, // dsub2_dsub3 |
| 102763 | 0, // dsub_dsub1 |
| 102764 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102765 | 0, // dsub_dsub1_dsub2 |
| 102766 | 0, // qsub0_qsub1 |
| 102767 | 0, // qsub0_qsub1_qsub2 |
| 102768 | 0, // qsub1_qsub2 |
| 102769 | 0, // qsub1_qsub2_qsub3 |
| 102770 | 0, // qsub2_qsub3 |
| 102771 | 491, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102772 | 491, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102773 | 491, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102774 | 491, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102775 | 491, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102776 | 491, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102777 | 491, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102778 | 491, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102779 | 0, // sub_32_subo64_then_sub_32 |
| 102780 | 0, // zsub_qsub1 |
| 102781 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102782 | 0, // zsub_qsub1_qsub2 |
| 102783 | 0, // zsub0_zsub1 |
| 102784 | 0, // zsub0_zsub1_zsub2 |
| 102785 | 0, // zsub1_zsub2 |
| 102786 | 0, // zsub1_zsub2_zsub3 |
| 102787 | 0, // zsub2_zsub3 |
| 102788 | 0, // zsub0_zsub2 |
| 102789 | 0, // zsub1_zsub3 |
| 102790 | }, |
| 102791 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102792 | 0, // bsub |
| 102793 | 0, // bsub_hi |
| 102794 | 0, // dsub |
| 102795 | 0, // dsub0 |
| 102796 | 0, // dsub1 |
| 102797 | 0, // dsub2 |
| 102798 | 0, // dsub3 |
| 102799 | 0, // dsub_hi |
| 102800 | 0, // hsub |
| 102801 | 0, // hsub_hi |
| 102802 | 0, // psub |
| 102803 | 0, // psub0 |
| 102804 | 0, // psub1 |
| 102805 | 0, // qsub0 |
| 102806 | 0, // qsub1 |
| 102807 | 0, // qsub2 |
| 102808 | 0, // qsub3 |
| 102809 | 0, // ssub |
| 102810 | 0, // ssub_hi |
| 102811 | 492, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102812 | 492, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102813 | 0, // sube32 |
| 102814 | 0, // sube64 |
| 102815 | 0, // subo32 |
| 102816 | 0, // subo64 |
| 102817 | 492, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102818 | 492, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102819 | 492, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102820 | 492, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102821 | 492, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102822 | 492, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102823 | 492, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102824 | 492, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102825 | 0, // zasubb |
| 102826 | 0, // zasubd0 |
| 102827 | 0, // zasubd1 |
| 102828 | 0, // zasubh0 |
| 102829 | 0, // zasubh1 |
| 102830 | 0, // zasubq0 |
| 102831 | 0, // zasubq1 |
| 102832 | 0, // zasubs0 |
| 102833 | 0, // zasubs1 |
| 102834 | 0, // zsub |
| 102835 | 0, // zsub0 |
| 102836 | 0, // zsub1 |
| 102837 | 0, // zsub2 |
| 102838 | 0, // zsub3 |
| 102839 | 0, // zsub_hi |
| 102840 | 0, // zasubd1_then_zasubq0 |
| 102841 | 0, // zasubd1_then_zasubq1 |
| 102842 | 0, // zasubs1_then_zasubd0 |
| 102843 | 0, // zasubs1_then_zasubd1 |
| 102844 | 0, // zasubs1_then_zasubq0 |
| 102845 | 0, // zasubs1_then_zasubq1 |
| 102846 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102847 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102848 | 0, // zasubh1_then_zasubd0 |
| 102849 | 0, // zasubh1_then_zasubd1 |
| 102850 | 0, // zasubh1_then_zasubq0 |
| 102851 | 0, // zasubh1_then_zasubq1 |
| 102852 | 0, // zasubh1_then_zasubs0 |
| 102853 | 0, // zasubh1_then_zasubs1 |
| 102854 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 102855 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 102856 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 102857 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 102858 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 102859 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 102860 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 102861 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 102862 | 0, // dsub1_then_bsub |
| 102863 | 0, // dsub1_then_bsub_hi |
| 102864 | 0, // dsub1_then_hsub |
| 102865 | 0, // dsub1_then_hsub_hi |
| 102866 | 0, // dsub1_then_ssub |
| 102867 | 0, // dsub1_then_ssub_hi |
| 102868 | 0, // dsub3_then_bsub |
| 102869 | 0, // dsub3_then_bsub_hi |
| 102870 | 0, // dsub3_then_hsub |
| 102871 | 0, // dsub3_then_hsub_hi |
| 102872 | 0, // dsub3_then_ssub |
| 102873 | 0, // dsub3_then_ssub_hi |
| 102874 | 0, // dsub2_then_bsub |
| 102875 | 0, // dsub2_then_bsub_hi |
| 102876 | 0, // dsub2_then_hsub |
| 102877 | 0, // dsub2_then_hsub_hi |
| 102878 | 0, // dsub2_then_ssub |
| 102879 | 0, // dsub2_then_ssub_hi |
| 102880 | 0, // psub1_then_psub |
| 102881 | 0, // qsub1_then_dsub_hi |
| 102882 | 0, // qsub3_then_dsub_hi |
| 102883 | 0, // qsub2_then_dsub_hi |
| 102884 | 492, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102885 | 492, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102886 | 492, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102887 | 492, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102888 | 492, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102889 | 492, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102890 | 492, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102891 | 492, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102892 | 492, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102893 | 492, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102894 | 492, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102895 | 492, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102896 | 492, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102897 | 492, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102898 | 0, // subo64_then_sub_32 |
| 102899 | 0, // subo64_then_sub_32_hi |
| 102900 | 0, // zsub1_then_zsub_hi |
| 102901 | 0, // zsub3_then_zsub_hi |
| 102902 | 0, // zsub2_then_zsub_hi |
| 102903 | 0, // dsub0_dsub1 |
| 102904 | 0, // dsub0_dsub1_dsub2 |
| 102905 | 0, // dsub1_dsub2 |
| 102906 | 0, // dsub1_dsub2_dsub3 |
| 102907 | 0, // dsub2_dsub3 |
| 102908 | 0, // dsub_dsub1 |
| 102909 | 0, // dsub_dsub1_dsub2_dsub3 |
| 102910 | 0, // dsub_dsub1_dsub2 |
| 102911 | 0, // qsub0_qsub1 |
| 102912 | 0, // qsub0_qsub1_qsub2 |
| 102913 | 0, // qsub1_qsub2 |
| 102914 | 0, // qsub1_qsub2_qsub3 |
| 102915 | 0, // qsub2_qsub3 |
| 102916 | 492, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102917 | 492, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102918 | 492, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102919 | 492, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102920 | 492, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102921 | 492, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102922 | 492, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102923 | 492, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 102924 | 0, // sub_32_subo64_then_sub_32 |
| 102925 | 0, // zsub_qsub1 |
| 102926 | 0, // zsub_qsub1_qsub2_qsub3 |
| 102927 | 0, // zsub_qsub1_qsub2 |
| 102928 | 0, // zsub0_zsub1 |
| 102929 | 0, // zsub0_zsub1_zsub2 |
| 102930 | 0, // zsub1_zsub2 |
| 102931 | 0, // zsub1_zsub2_zsub3 |
| 102932 | 0, // zsub2_zsub3 |
| 102933 | 0, // zsub0_zsub2 |
| 102934 | 0, // zsub1_zsub3 |
| 102935 | }, |
| 102936 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102937 | 0, // bsub |
| 102938 | 0, // bsub_hi |
| 102939 | 0, // dsub |
| 102940 | 0, // dsub0 |
| 102941 | 0, // dsub1 |
| 102942 | 0, // dsub2 |
| 102943 | 0, // dsub3 |
| 102944 | 0, // dsub_hi |
| 102945 | 0, // hsub |
| 102946 | 0, // hsub_hi |
| 102947 | 0, // psub |
| 102948 | 0, // psub0 |
| 102949 | 0, // psub1 |
| 102950 | 0, // qsub0 |
| 102951 | 0, // qsub1 |
| 102952 | 0, // qsub2 |
| 102953 | 0, // qsub3 |
| 102954 | 0, // ssub |
| 102955 | 0, // ssub_hi |
| 102956 | 493, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102957 | 493, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102958 | 0, // sube32 |
| 102959 | 0, // sube64 |
| 102960 | 0, // subo32 |
| 102961 | 0, // subo64 |
| 102962 | 493, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102963 | 493, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102964 | 493, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102965 | 493, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102966 | 493, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102967 | 493, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102968 | 493, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102969 | 493, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 102970 | 0, // zasubb |
| 102971 | 0, // zasubd0 |
| 102972 | 0, // zasubd1 |
| 102973 | 0, // zasubh0 |
| 102974 | 0, // zasubh1 |
| 102975 | 0, // zasubq0 |
| 102976 | 0, // zasubq1 |
| 102977 | 0, // zasubs0 |
| 102978 | 0, // zasubs1 |
| 102979 | 0, // zsub |
| 102980 | 0, // zsub0 |
| 102981 | 0, // zsub1 |
| 102982 | 0, // zsub2 |
| 102983 | 0, // zsub3 |
| 102984 | 0, // zsub_hi |
| 102985 | 0, // zasubd1_then_zasubq0 |
| 102986 | 0, // zasubd1_then_zasubq1 |
| 102987 | 0, // zasubs1_then_zasubd0 |
| 102988 | 0, // zasubs1_then_zasubd1 |
| 102989 | 0, // zasubs1_then_zasubq0 |
| 102990 | 0, // zasubs1_then_zasubq1 |
| 102991 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 102992 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 102993 | 0, // zasubh1_then_zasubd0 |
| 102994 | 0, // zasubh1_then_zasubd1 |
| 102995 | 0, // zasubh1_then_zasubq0 |
| 102996 | 0, // zasubh1_then_zasubq1 |
| 102997 | 0, // zasubh1_then_zasubs0 |
| 102998 | 0, // zasubh1_then_zasubs1 |
| 102999 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103000 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103001 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103002 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103003 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103004 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103005 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103006 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103007 | 0, // dsub1_then_bsub |
| 103008 | 0, // dsub1_then_bsub_hi |
| 103009 | 0, // dsub1_then_hsub |
| 103010 | 0, // dsub1_then_hsub_hi |
| 103011 | 0, // dsub1_then_ssub |
| 103012 | 0, // dsub1_then_ssub_hi |
| 103013 | 0, // dsub3_then_bsub |
| 103014 | 0, // dsub3_then_bsub_hi |
| 103015 | 0, // dsub3_then_hsub |
| 103016 | 0, // dsub3_then_hsub_hi |
| 103017 | 0, // dsub3_then_ssub |
| 103018 | 0, // dsub3_then_ssub_hi |
| 103019 | 0, // dsub2_then_bsub |
| 103020 | 0, // dsub2_then_bsub_hi |
| 103021 | 0, // dsub2_then_hsub |
| 103022 | 0, // dsub2_then_hsub_hi |
| 103023 | 0, // dsub2_then_ssub |
| 103024 | 0, // dsub2_then_ssub_hi |
| 103025 | 0, // psub1_then_psub |
| 103026 | 0, // qsub1_then_dsub_hi |
| 103027 | 0, // qsub3_then_dsub_hi |
| 103028 | 0, // qsub2_then_dsub_hi |
| 103029 | 493, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103030 | 493, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103031 | 493, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103032 | 493, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103033 | 493, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103034 | 493, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103035 | 493, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103036 | 493, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103037 | 493, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103038 | 493, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103039 | 493, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103040 | 493, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103041 | 493, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103042 | 493, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103043 | 0, // subo64_then_sub_32 |
| 103044 | 0, // subo64_then_sub_32_hi |
| 103045 | 0, // zsub1_then_zsub_hi |
| 103046 | 0, // zsub3_then_zsub_hi |
| 103047 | 0, // zsub2_then_zsub_hi |
| 103048 | 0, // dsub0_dsub1 |
| 103049 | 0, // dsub0_dsub1_dsub2 |
| 103050 | 0, // dsub1_dsub2 |
| 103051 | 0, // dsub1_dsub2_dsub3 |
| 103052 | 0, // dsub2_dsub3 |
| 103053 | 0, // dsub_dsub1 |
| 103054 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103055 | 0, // dsub_dsub1_dsub2 |
| 103056 | 0, // qsub0_qsub1 |
| 103057 | 0, // qsub0_qsub1_qsub2 |
| 103058 | 0, // qsub1_qsub2 |
| 103059 | 0, // qsub1_qsub2_qsub3 |
| 103060 | 0, // qsub2_qsub3 |
| 103061 | 493, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103062 | 493, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103063 | 493, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103064 | 493, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103065 | 493, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103066 | 493, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103067 | 493, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103068 | 493, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103069 | 0, // sub_32_subo64_then_sub_32 |
| 103070 | 0, // zsub_qsub1 |
| 103071 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103072 | 0, // zsub_qsub1_qsub2 |
| 103073 | 0, // zsub0_zsub1 |
| 103074 | 0, // zsub0_zsub1_zsub2 |
| 103075 | 0, // zsub1_zsub2 |
| 103076 | 0, // zsub1_zsub2_zsub3 |
| 103077 | 0, // zsub2_zsub3 |
| 103078 | 0, // zsub0_zsub2 |
| 103079 | 0, // zsub1_zsub3 |
| 103080 | }, |
| 103081 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103082 | 0, // bsub |
| 103083 | 0, // bsub_hi |
| 103084 | 0, // dsub |
| 103085 | 0, // dsub0 |
| 103086 | 0, // dsub1 |
| 103087 | 0, // dsub2 |
| 103088 | 0, // dsub3 |
| 103089 | 0, // dsub_hi |
| 103090 | 0, // hsub |
| 103091 | 0, // hsub_hi |
| 103092 | 0, // psub |
| 103093 | 0, // psub0 |
| 103094 | 0, // psub1 |
| 103095 | 0, // qsub0 |
| 103096 | 0, // qsub1 |
| 103097 | 0, // qsub2 |
| 103098 | 0, // qsub3 |
| 103099 | 0, // ssub |
| 103100 | 0, // ssub_hi |
| 103101 | 494, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103102 | 494, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103103 | 0, // sube32 |
| 103104 | 0, // sube64 |
| 103105 | 0, // subo32 |
| 103106 | 0, // subo64 |
| 103107 | 494, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103108 | 494, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103109 | 494, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103110 | 494, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103111 | 494, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103112 | 494, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103113 | 494, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103114 | 494, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103115 | 0, // zasubb |
| 103116 | 0, // zasubd0 |
| 103117 | 0, // zasubd1 |
| 103118 | 0, // zasubh0 |
| 103119 | 0, // zasubh1 |
| 103120 | 0, // zasubq0 |
| 103121 | 0, // zasubq1 |
| 103122 | 0, // zasubs0 |
| 103123 | 0, // zasubs1 |
| 103124 | 0, // zsub |
| 103125 | 0, // zsub0 |
| 103126 | 0, // zsub1 |
| 103127 | 0, // zsub2 |
| 103128 | 0, // zsub3 |
| 103129 | 0, // zsub_hi |
| 103130 | 0, // zasubd1_then_zasubq0 |
| 103131 | 0, // zasubd1_then_zasubq1 |
| 103132 | 0, // zasubs1_then_zasubd0 |
| 103133 | 0, // zasubs1_then_zasubd1 |
| 103134 | 0, // zasubs1_then_zasubq0 |
| 103135 | 0, // zasubs1_then_zasubq1 |
| 103136 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103137 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103138 | 0, // zasubh1_then_zasubd0 |
| 103139 | 0, // zasubh1_then_zasubd1 |
| 103140 | 0, // zasubh1_then_zasubq0 |
| 103141 | 0, // zasubh1_then_zasubq1 |
| 103142 | 0, // zasubh1_then_zasubs0 |
| 103143 | 0, // zasubh1_then_zasubs1 |
| 103144 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103145 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103146 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103147 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103148 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103149 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103150 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103151 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103152 | 0, // dsub1_then_bsub |
| 103153 | 0, // dsub1_then_bsub_hi |
| 103154 | 0, // dsub1_then_hsub |
| 103155 | 0, // dsub1_then_hsub_hi |
| 103156 | 0, // dsub1_then_ssub |
| 103157 | 0, // dsub1_then_ssub_hi |
| 103158 | 0, // dsub3_then_bsub |
| 103159 | 0, // dsub3_then_bsub_hi |
| 103160 | 0, // dsub3_then_hsub |
| 103161 | 0, // dsub3_then_hsub_hi |
| 103162 | 0, // dsub3_then_ssub |
| 103163 | 0, // dsub3_then_ssub_hi |
| 103164 | 0, // dsub2_then_bsub |
| 103165 | 0, // dsub2_then_bsub_hi |
| 103166 | 0, // dsub2_then_hsub |
| 103167 | 0, // dsub2_then_hsub_hi |
| 103168 | 0, // dsub2_then_ssub |
| 103169 | 0, // dsub2_then_ssub_hi |
| 103170 | 0, // psub1_then_psub |
| 103171 | 0, // qsub1_then_dsub_hi |
| 103172 | 0, // qsub3_then_dsub_hi |
| 103173 | 0, // qsub2_then_dsub_hi |
| 103174 | 494, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103175 | 494, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103176 | 494, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103177 | 494, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103178 | 494, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103179 | 494, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103180 | 494, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103181 | 494, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103182 | 494, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103183 | 494, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103184 | 494, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103185 | 494, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103186 | 494, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103187 | 494, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103188 | 0, // subo64_then_sub_32 |
| 103189 | 0, // subo64_then_sub_32_hi |
| 103190 | 0, // zsub1_then_zsub_hi |
| 103191 | 0, // zsub3_then_zsub_hi |
| 103192 | 0, // zsub2_then_zsub_hi |
| 103193 | 0, // dsub0_dsub1 |
| 103194 | 0, // dsub0_dsub1_dsub2 |
| 103195 | 0, // dsub1_dsub2 |
| 103196 | 0, // dsub1_dsub2_dsub3 |
| 103197 | 0, // dsub2_dsub3 |
| 103198 | 0, // dsub_dsub1 |
| 103199 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103200 | 0, // dsub_dsub1_dsub2 |
| 103201 | 0, // qsub0_qsub1 |
| 103202 | 0, // qsub0_qsub1_qsub2 |
| 103203 | 0, // qsub1_qsub2 |
| 103204 | 0, // qsub1_qsub2_qsub3 |
| 103205 | 0, // qsub2_qsub3 |
| 103206 | 494, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103207 | 494, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103208 | 494, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103209 | 494, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103210 | 494, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103211 | 494, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103212 | 494, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103213 | 494, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 103214 | 0, // sub_32_subo64_then_sub_32 |
| 103215 | 0, // zsub_qsub1 |
| 103216 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103217 | 0, // zsub_qsub1_qsub2 |
| 103218 | 0, // zsub0_zsub1 |
| 103219 | 0, // zsub0_zsub1_zsub2 |
| 103220 | 0, // zsub1_zsub2 |
| 103221 | 0, // zsub1_zsub2_zsub3 |
| 103222 | 0, // zsub2_zsub3 |
| 103223 | 0, // zsub0_zsub2 |
| 103224 | 0, // zsub1_zsub3 |
| 103225 | }, |
| 103226 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103227 | 0, // bsub |
| 103228 | 0, // bsub_hi |
| 103229 | 0, // dsub |
| 103230 | 0, // dsub0 |
| 103231 | 0, // dsub1 |
| 103232 | 0, // dsub2 |
| 103233 | 0, // dsub3 |
| 103234 | 0, // dsub_hi |
| 103235 | 0, // hsub |
| 103236 | 0, // hsub_hi |
| 103237 | 0, // psub |
| 103238 | 0, // psub0 |
| 103239 | 0, // psub1 |
| 103240 | 0, // qsub0 |
| 103241 | 0, // qsub1 |
| 103242 | 0, // qsub2 |
| 103243 | 0, // qsub3 |
| 103244 | 0, // ssub |
| 103245 | 0, // ssub_hi |
| 103246 | 495, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103247 | 495, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103248 | 0, // sube32 |
| 103249 | 0, // sube64 |
| 103250 | 0, // subo32 |
| 103251 | 0, // subo64 |
| 103252 | 495, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103253 | 495, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103254 | 495, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103255 | 495, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103256 | 495, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103257 | 495, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103258 | 495, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103259 | 495, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103260 | 0, // zasubb |
| 103261 | 0, // zasubd0 |
| 103262 | 0, // zasubd1 |
| 103263 | 0, // zasubh0 |
| 103264 | 0, // zasubh1 |
| 103265 | 0, // zasubq0 |
| 103266 | 0, // zasubq1 |
| 103267 | 0, // zasubs0 |
| 103268 | 0, // zasubs1 |
| 103269 | 0, // zsub |
| 103270 | 0, // zsub0 |
| 103271 | 0, // zsub1 |
| 103272 | 0, // zsub2 |
| 103273 | 0, // zsub3 |
| 103274 | 0, // zsub_hi |
| 103275 | 0, // zasubd1_then_zasubq0 |
| 103276 | 0, // zasubd1_then_zasubq1 |
| 103277 | 0, // zasubs1_then_zasubd0 |
| 103278 | 0, // zasubs1_then_zasubd1 |
| 103279 | 0, // zasubs1_then_zasubq0 |
| 103280 | 0, // zasubs1_then_zasubq1 |
| 103281 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103282 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103283 | 0, // zasubh1_then_zasubd0 |
| 103284 | 0, // zasubh1_then_zasubd1 |
| 103285 | 0, // zasubh1_then_zasubq0 |
| 103286 | 0, // zasubh1_then_zasubq1 |
| 103287 | 0, // zasubh1_then_zasubs0 |
| 103288 | 0, // zasubh1_then_zasubs1 |
| 103289 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103290 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103291 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103292 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103293 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103294 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103295 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103296 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103297 | 0, // dsub1_then_bsub |
| 103298 | 0, // dsub1_then_bsub_hi |
| 103299 | 0, // dsub1_then_hsub |
| 103300 | 0, // dsub1_then_hsub_hi |
| 103301 | 0, // dsub1_then_ssub |
| 103302 | 0, // dsub1_then_ssub_hi |
| 103303 | 0, // dsub3_then_bsub |
| 103304 | 0, // dsub3_then_bsub_hi |
| 103305 | 0, // dsub3_then_hsub |
| 103306 | 0, // dsub3_then_hsub_hi |
| 103307 | 0, // dsub3_then_ssub |
| 103308 | 0, // dsub3_then_ssub_hi |
| 103309 | 0, // dsub2_then_bsub |
| 103310 | 0, // dsub2_then_bsub_hi |
| 103311 | 0, // dsub2_then_hsub |
| 103312 | 0, // dsub2_then_hsub_hi |
| 103313 | 0, // dsub2_then_ssub |
| 103314 | 0, // dsub2_then_ssub_hi |
| 103315 | 0, // psub1_then_psub |
| 103316 | 0, // qsub1_then_dsub_hi |
| 103317 | 0, // qsub3_then_dsub_hi |
| 103318 | 0, // qsub2_then_dsub_hi |
| 103319 | 495, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103320 | 495, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103321 | 495, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103322 | 495, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103323 | 495, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103324 | 495, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103325 | 495, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103326 | 495, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103327 | 495, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103328 | 495, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103329 | 495, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103330 | 495, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103331 | 495, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103332 | 495, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103333 | 0, // subo64_then_sub_32 |
| 103334 | 0, // subo64_then_sub_32_hi |
| 103335 | 0, // zsub1_then_zsub_hi |
| 103336 | 0, // zsub3_then_zsub_hi |
| 103337 | 0, // zsub2_then_zsub_hi |
| 103338 | 0, // dsub0_dsub1 |
| 103339 | 0, // dsub0_dsub1_dsub2 |
| 103340 | 0, // dsub1_dsub2 |
| 103341 | 0, // dsub1_dsub2_dsub3 |
| 103342 | 0, // dsub2_dsub3 |
| 103343 | 0, // dsub_dsub1 |
| 103344 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103345 | 0, // dsub_dsub1_dsub2 |
| 103346 | 0, // qsub0_qsub1 |
| 103347 | 0, // qsub0_qsub1_qsub2 |
| 103348 | 0, // qsub1_qsub2 |
| 103349 | 0, // qsub1_qsub2_qsub3 |
| 103350 | 0, // qsub2_qsub3 |
| 103351 | 495, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103352 | 495, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103353 | 495, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103354 | 495, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103355 | 495, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103356 | 495, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103357 | 495, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103358 | 495, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103359 | 0, // sub_32_subo64_then_sub_32 |
| 103360 | 0, // zsub_qsub1 |
| 103361 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103362 | 0, // zsub_qsub1_qsub2 |
| 103363 | 0, // zsub0_zsub1 |
| 103364 | 0, // zsub0_zsub1_zsub2 |
| 103365 | 0, // zsub1_zsub2 |
| 103366 | 0, // zsub1_zsub2_zsub3 |
| 103367 | 0, // zsub2_zsub3 |
| 103368 | 0, // zsub0_zsub2 |
| 103369 | 0, // zsub1_zsub3 |
| 103370 | }, |
| 103371 | { // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103372 | 0, // bsub |
| 103373 | 0, // bsub_hi |
| 103374 | 0, // dsub |
| 103375 | 0, // dsub0 |
| 103376 | 0, // dsub1 |
| 103377 | 0, // dsub2 |
| 103378 | 0, // dsub3 |
| 103379 | 0, // dsub_hi |
| 103380 | 0, // hsub |
| 103381 | 0, // hsub_hi |
| 103382 | 0, // psub |
| 103383 | 0, // psub0 |
| 103384 | 0, // psub1 |
| 103385 | 0, // qsub0 |
| 103386 | 0, // qsub1 |
| 103387 | 0, // qsub2 |
| 103388 | 0, // qsub3 |
| 103389 | 0, // ssub |
| 103390 | 0, // ssub_hi |
| 103391 | 496, // sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103392 | 496, // sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103393 | 0, // sube32 |
| 103394 | 0, // sube64 |
| 103395 | 0, // subo32 |
| 103396 | 0, // subo64 |
| 103397 | 496, // x8sub_0 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103398 | 496, // x8sub_1 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103399 | 496, // x8sub_2 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103400 | 496, // x8sub_3 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103401 | 496, // x8sub_4 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103402 | 496, // x8sub_5 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103403 | 496, // x8sub_6 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103404 | 496, // x8sub_7 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103405 | 0, // zasubb |
| 103406 | 0, // zasubd0 |
| 103407 | 0, // zasubd1 |
| 103408 | 0, // zasubh0 |
| 103409 | 0, // zasubh1 |
| 103410 | 0, // zasubq0 |
| 103411 | 0, // zasubq1 |
| 103412 | 0, // zasubs0 |
| 103413 | 0, // zasubs1 |
| 103414 | 0, // zsub |
| 103415 | 0, // zsub0 |
| 103416 | 0, // zsub1 |
| 103417 | 0, // zsub2 |
| 103418 | 0, // zsub3 |
| 103419 | 0, // zsub_hi |
| 103420 | 0, // zasubd1_then_zasubq0 |
| 103421 | 0, // zasubd1_then_zasubq1 |
| 103422 | 0, // zasubs1_then_zasubd0 |
| 103423 | 0, // zasubs1_then_zasubd1 |
| 103424 | 0, // zasubs1_then_zasubq0 |
| 103425 | 0, // zasubs1_then_zasubq1 |
| 103426 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103427 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103428 | 0, // zasubh1_then_zasubd0 |
| 103429 | 0, // zasubh1_then_zasubd1 |
| 103430 | 0, // zasubh1_then_zasubq0 |
| 103431 | 0, // zasubh1_then_zasubq1 |
| 103432 | 0, // zasubh1_then_zasubs0 |
| 103433 | 0, // zasubh1_then_zasubs1 |
| 103434 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103435 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103436 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103437 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103438 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103439 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103440 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103441 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103442 | 0, // dsub1_then_bsub |
| 103443 | 0, // dsub1_then_bsub_hi |
| 103444 | 0, // dsub1_then_hsub |
| 103445 | 0, // dsub1_then_hsub_hi |
| 103446 | 0, // dsub1_then_ssub |
| 103447 | 0, // dsub1_then_ssub_hi |
| 103448 | 0, // dsub3_then_bsub |
| 103449 | 0, // dsub3_then_bsub_hi |
| 103450 | 0, // dsub3_then_hsub |
| 103451 | 0, // dsub3_then_hsub_hi |
| 103452 | 0, // dsub3_then_ssub |
| 103453 | 0, // dsub3_then_ssub_hi |
| 103454 | 0, // dsub2_then_bsub |
| 103455 | 0, // dsub2_then_bsub_hi |
| 103456 | 0, // dsub2_then_hsub |
| 103457 | 0, // dsub2_then_hsub_hi |
| 103458 | 0, // dsub2_then_ssub |
| 103459 | 0, // dsub2_then_ssub_hi |
| 103460 | 0, // psub1_then_psub |
| 103461 | 0, // qsub1_then_dsub_hi |
| 103462 | 0, // qsub3_then_dsub_hi |
| 103463 | 0, // qsub2_then_dsub_hi |
| 103464 | 496, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103465 | 496, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103466 | 496, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103467 | 496, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103468 | 496, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103469 | 496, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103470 | 496, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103471 | 496, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103472 | 496, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103473 | 496, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103474 | 496, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103475 | 496, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103476 | 496, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103477 | 496, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103478 | 0, // subo64_then_sub_32 |
| 103479 | 0, // subo64_then_sub_32_hi |
| 103480 | 0, // zsub1_then_zsub_hi |
| 103481 | 0, // zsub3_then_zsub_hi |
| 103482 | 0, // zsub2_then_zsub_hi |
| 103483 | 0, // dsub0_dsub1 |
| 103484 | 0, // dsub0_dsub1_dsub2 |
| 103485 | 0, // dsub1_dsub2 |
| 103486 | 0, // dsub1_dsub2_dsub3 |
| 103487 | 0, // dsub2_dsub3 |
| 103488 | 0, // dsub_dsub1 |
| 103489 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103490 | 0, // dsub_dsub1_dsub2 |
| 103491 | 0, // qsub0_qsub1 |
| 103492 | 0, // qsub0_qsub1_qsub2 |
| 103493 | 0, // qsub1_qsub2 |
| 103494 | 0, // qsub1_qsub2_qsub3 |
| 103495 | 0, // qsub2_qsub3 |
| 103496 | 496, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103497 | 496, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103498 | 496, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103499 | 496, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103500 | 496, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103501 | 496, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103502 | 496, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103503 | 496, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 103504 | 0, // sub_32_subo64_then_sub_32 |
| 103505 | 0, // zsub_qsub1 |
| 103506 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103507 | 0, // zsub_qsub1_qsub2 |
| 103508 | 0, // zsub0_zsub1 |
| 103509 | 0, // zsub0_zsub1_zsub2 |
| 103510 | 0, // zsub1_zsub2 |
| 103511 | 0, // zsub1_zsub2_zsub3 |
| 103512 | 0, // zsub2_zsub3 |
| 103513 | 0, // zsub0_zsub2 |
| 103514 | 0, // zsub1_zsub3 |
| 103515 | }, |
| 103516 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103517 | 0, // bsub |
| 103518 | 0, // bsub_hi |
| 103519 | 0, // dsub |
| 103520 | 0, // dsub0 |
| 103521 | 0, // dsub1 |
| 103522 | 0, // dsub2 |
| 103523 | 0, // dsub3 |
| 103524 | 0, // dsub_hi |
| 103525 | 0, // hsub |
| 103526 | 0, // hsub_hi |
| 103527 | 0, // psub |
| 103528 | 0, // psub0 |
| 103529 | 0, // psub1 |
| 103530 | 0, // qsub0 |
| 103531 | 0, // qsub1 |
| 103532 | 0, // qsub2 |
| 103533 | 0, // qsub3 |
| 103534 | 0, // ssub |
| 103535 | 0, // ssub_hi |
| 103536 | 497, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103537 | 497, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103538 | 0, // sube32 |
| 103539 | 0, // sube64 |
| 103540 | 0, // subo32 |
| 103541 | 0, // subo64 |
| 103542 | 497, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103543 | 497, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103544 | 497, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103545 | 497, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103546 | 497, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103547 | 497, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103548 | 497, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103549 | 497, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103550 | 0, // zasubb |
| 103551 | 0, // zasubd0 |
| 103552 | 0, // zasubd1 |
| 103553 | 0, // zasubh0 |
| 103554 | 0, // zasubh1 |
| 103555 | 0, // zasubq0 |
| 103556 | 0, // zasubq1 |
| 103557 | 0, // zasubs0 |
| 103558 | 0, // zasubs1 |
| 103559 | 0, // zsub |
| 103560 | 0, // zsub0 |
| 103561 | 0, // zsub1 |
| 103562 | 0, // zsub2 |
| 103563 | 0, // zsub3 |
| 103564 | 0, // zsub_hi |
| 103565 | 0, // zasubd1_then_zasubq0 |
| 103566 | 0, // zasubd1_then_zasubq1 |
| 103567 | 0, // zasubs1_then_zasubd0 |
| 103568 | 0, // zasubs1_then_zasubd1 |
| 103569 | 0, // zasubs1_then_zasubq0 |
| 103570 | 0, // zasubs1_then_zasubq1 |
| 103571 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103572 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103573 | 0, // zasubh1_then_zasubd0 |
| 103574 | 0, // zasubh1_then_zasubd1 |
| 103575 | 0, // zasubh1_then_zasubq0 |
| 103576 | 0, // zasubh1_then_zasubq1 |
| 103577 | 0, // zasubh1_then_zasubs0 |
| 103578 | 0, // zasubh1_then_zasubs1 |
| 103579 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103580 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103581 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103582 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103583 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103584 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103585 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103586 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103587 | 0, // dsub1_then_bsub |
| 103588 | 0, // dsub1_then_bsub_hi |
| 103589 | 0, // dsub1_then_hsub |
| 103590 | 0, // dsub1_then_hsub_hi |
| 103591 | 0, // dsub1_then_ssub |
| 103592 | 0, // dsub1_then_ssub_hi |
| 103593 | 0, // dsub3_then_bsub |
| 103594 | 0, // dsub3_then_bsub_hi |
| 103595 | 0, // dsub3_then_hsub |
| 103596 | 0, // dsub3_then_hsub_hi |
| 103597 | 0, // dsub3_then_ssub |
| 103598 | 0, // dsub3_then_ssub_hi |
| 103599 | 0, // dsub2_then_bsub |
| 103600 | 0, // dsub2_then_bsub_hi |
| 103601 | 0, // dsub2_then_hsub |
| 103602 | 0, // dsub2_then_hsub_hi |
| 103603 | 0, // dsub2_then_ssub |
| 103604 | 0, // dsub2_then_ssub_hi |
| 103605 | 0, // psub1_then_psub |
| 103606 | 0, // qsub1_then_dsub_hi |
| 103607 | 0, // qsub3_then_dsub_hi |
| 103608 | 0, // qsub2_then_dsub_hi |
| 103609 | 497, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103610 | 497, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103611 | 497, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103612 | 497, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103613 | 497, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103614 | 497, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103615 | 497, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103616 | 497, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103617 | 497, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103618 | 497, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103619 | 497, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103620 | 497, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103621 | 497, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103622 | 497, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103623 | 0, // subo64_then_sub_32 |
| 103624 | 0, // subo64_then_sub_32_hi |
| 103625 | 0, // zsub1_then_zsub_hi |
| 103626 | 0, // zsub3_then_zsub_hi |
| 103627 | 0, // zsub2_then_zsub_hi |
| 103628 | 0, // dsub0_dsub1 |
| 103629 | 0, // dsub0_dsub1_dsub2 |
| 103630 | 0, // dsub1_dsub2 |
| 103631 | 0, // dsub1_dsub2_dsub3 |
| 103632 | 0, // dsub2_dsub3 |
| 103633 | 0, // dsub_dsub1 |
| 103634 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103635 | 0, // dsub_dsub1_dsub2 |
| 103636 | 0, // qsub0_qsub1 |
| 103637 | 0, // qsub0_qsub1_qsub2 |
| 103638 | 0, // qsub1_qsub2 |
| 103639 | 0, // qsub1_qsub2_qsub3 |
| 103640 | 0, // qsub2_qsub3 |
| 103641 | 497, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103642 | 497, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103643 | 497, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103644 | 497, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103645 | 497, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103646 | 497, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103647 | 497, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103648 | 497, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103649 | 0, // sub_32_subo64_then_sub_32 |
| 103650 | 0, // zsub_qsub1 |
| 103651 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103652 | 0, // zsub_qsub1_qsub2 |
| 103653 | 0, // zsub0_zsub1 |
| 103654 | 0, // zsub0_zsub1_zsub2 |
| 103655 | 0, // zsub1_zsub2 |
| 103656 | 0, // zsub1_zsub2_zsub3 |
| 103657 | 0, // zsub2_zsub3 |
| 103658 | 0, // zsub0_zsub2 |
| 103659 | 0, // zsub1_zsub3 |
| 103660 | }, |
| 103661 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103662 | 0, // bsub |
| 103663 | 0, // bsub_hi |
| 103664 | 0, // dsub |
| 103665 | 0, // dsub0 |
| 103666 | 0, // dsub1 |
| 103667 | 0, // dsub2 |
| 103668 | 0, // dsub3 |
| 103669 | 0, // dsub_hi |
| 103670 | 0, // hsub |
| 103671 | 0, // hsub_hi |
| 103672 | 0, // psub |
| 103673 | 0, // psub0 |
| 103674 | 0, // psub1 |
| 103675 | 0, // qsub0 |
| 103676 | 0, // qsub1 |
| 103677 | 0, // qsub2 |
| 103678 | 0, // qsub3 |
| 103679 | 0, // ssub |
| 103680 | 0, // ssub_hi |
| 103681 | 498, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103682 | 498, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103683 | 0, // sube32 |
| 103684 | 0, // sube64 |
| 103685 | 0, // subo32 |
| 103686 | 0, // subo64 |
| 103687 | 498, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103688 | 498, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103689 | 498, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103690 | 498, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103691 | 498, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103692 | 498, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103693 | 498, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103694 | 498, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103695 | 0, // zasubb |
| 103696 | 0, // zasubd0 |
| 103697 | 0, // zasubd1 |
| 103698 | 0, // zasubh0 |
| 103699 | 0, // zasubh1 |
| 103700 | 0, // zasubq0 |
| 103701 | 0, // zasubq1 |
| 103702 | 0, // zasubs0 |
| 103703 | 0, // zasubs1 |
| 103704 | 0, // zsub |
| 103705 | 0, // zsub0 |
| 103706 | 0, // zsub1 |
| 103707 | 0, // zsub2 |
| 103708 | 0, // zsub3 |
| 103709 | 0, // zsub_hi |
| 103710 | 0, // zasubd1_then_zasubq0 |
| 103711 | 0, // zasubd1_then_zasubq1 |
| 103712 | 0, // zasubs1_then_zasubd0 |
| 103713 | 0, // zasubs1_then_zasubd1 |
| 103714 | 0, // zasubs1_then_zasubq0 |
| 103715 | 0, // zasubs1_then_zasubq1 |
| 103716 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103717 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103718 | 0, // zasubh1_then_zasubd0 |
| 103719 | 0, // zasubh1_then_zasubd1 |
| 103720 | 0, // zasubh1_then_zasubq0 |
| 103721 | 0, // zasubh1_then_zasubq1 |
| 103722 | 0, // zasubh1_then_zasubs0 |
| 103723 | 0, // zasubh1_then_zasubs1 |
| 103724 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103725 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103726 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103727 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103728 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103729 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103730 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103731 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103732 | 0, // dsub1_then_bsub |
| 103733 | 0, // dsub1_then_bsub_hi |
| 103734 | 0, // dsub1_then_hsub |
| 103735 | 0, // dsub1_then_hsub_hi |
| 103736 | 0, // dsub1_then_ssub |
| 103737 | 0, // dsub1_then_ssub_hi |
| 103738 | 0, // dsub3_then_bsub |
| 103739 | 0, // dsub3_then_bsub_hi |
| 103740 | 0, // dsub3_then_hsub |
| 103741 | 0, // dsub3_then_hsub_hi |
| 103742 | 0, // dsub3_then_ssub |
| 103743 | 0, // dsub3_then_ssub_hi |
| 103744 | 0, // dsub2_then_bsub |
| 103745 | 0, // dsub2_then_bsub_hi |
| 103746 | 0, // dsub2_then_hsub |
| 103747 | 0, // dsub2_then_hsub_hi |
| 103748 | 0, // dsub2_then_ssub |
| 103749 | 0, // dsub2_then_ssub_hi |
| 103750 | 0, // psub1_then_psub |
| 103751 | 0, // qsub1_then_dsub_hi |
| 103752 | 0, // qsub3_then_dsub_hi |
| 103753 | 0, // qsub2_then_dsub_hi |
| 103754 | 498, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103755 | 498, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103756 | 498, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103757 | 498, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103758 | 498, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103759 | 498, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103760 | 498, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103761 | 498, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103762 | 498, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103763 | 498, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103764 | 498, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103765 | 498, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103766 | 498, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103767 | 498, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103768 | 0, // subo64_then_sub_32 |
| 103769 | 0, // subo64_then_sub_32_hi |
| 103770 | 0, // zsub1_then_zsub_hi |
| 103771 | 0, // zsub3_then_zsub_hi |
| 103772 | 0, // zsub2_then_zsub_hi |
| 103773 | 0, // dsub0_dsub1 |
| 103774 | 0, // dsub0_dsub1_dsub2 |
| 103775 | 0, // dsub1_dsub2 |
| 103776 | 0, // dsub1_dsub2_dsub3 |
| 103777 | 0, // dsub2_dsub3 |
| 103778 | 0, // dsub_dsub1 |
| 103779 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103780 | 0, // dsub_dsub1_dsub2 |
| 103781 | 0, // qsub0_qsub1 |
| 103782 | 0, // qsub0_qsub1_qsub2 |
| 103783 | 0, // qsub1_qsub2 |
| 103784 | 0, // qsub1_qsub2_qsub3 |
| 103785 | 0, // qsub2_qsub3 |
| 103786 | 498, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103787 | 498, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103788 | 498, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103789 | 498, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103790 | 498, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103791 | 498, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103792 | 498, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103793 | 498, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103794 | 0, // sub_32_subo64_then_sub_32 |
| 103795 | 0, // zsub_qsub1 |
| 103796 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103797 | 0, // zsub_qsub1_qsub2 |
| 103798 | 0, // zsub0_zsub1 |
| 103799 | 0, // zsub0_zsub1_zsub2 |
| 103800 | 0, // zsub1_zsub2 |
| 103801 | 0, // zsub1_zsub2_zsub3 |
| 103802 | 0, // zsub2_zsub3 |
| 103803 | 0, // zsub0_zsub2 |
| 103804 | 0, // zsub1_zsub3 |
| 103805 | }, |
| 103806 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103807 | 0, // bsub |
| 103808 | 0, // bsub_hi |
| 103809 | 0, // dsub |
| 103810 | 0, // dsub0 |
| 103811 | 0, // dsub1 |
| 103812 | 0, // dsub2 |
| 103813 | 0, // dsub3 |
| 103814 | 0, // dsub_hi |
| 103815 | 0, // hsub |
| 103816 | 0, // hsub_hi |
| 103817 | 0, // psub |
| 103818 | 0, // psub0 |
| 103819 | 0, // psub1 |
| 103820 | 0, // qsub0 |
| 103821 | 0, // qsub1 |
| 103822 | 0, // qsub2 |
| 103823 | 0, // qsub3 |
| 103824 | 0, // ssub |
| 103825 | 0, // ssub_hi |
| 103826 | 499, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103827 | 499, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103828 | 0, // sube32 |
| 103829 | 0, // sube64 |
| 103830 | 0, // subo32 |
| 103831 | 0, // subo64 |
| 103832 | 499, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103833 | 499, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103834 | 499, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103835 | 499, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103836 | 499, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103837 | 499, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103838 | 499, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103839 | 499, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103840 | 0, // zasubb |
| 103841 | 0, // zasubd0 |
| 103842 | 0, // zasubd1 |
| 103843 | 0, // zasubh0 |
| 103844 | 0, // zasubh1 |
| 103845 | 0, // zasubq0 |
| 103846 | 0, // zasubq1 |
| 103847 | 0, // zasubs0 |
| 103848 | 0, // zasubs1 |
| 103849 | 0, // zsub |
| 103850 | 0, // zsub0 |
| 103851 | 0, // zsub1 |
| 103852 | 0, // zsub2 |
| 103853 | 0, // zsub3 |
| 103854 | 0, // zsub_hi |
| 103855 | 0, // zasubd1_then_zasubq0 |
| 103856 | 0, // zasubd1_then_zasubq1 |
| 103857 | 0, // zasubs1_then_zasubd0 |
| 103858 | 0, // zasubs1_then_zasubd1 |
| 103859 | 0, // zasubs1_then_zasubq0 |
| 103860 | 0, // zasubs1_then_zasubq1 |
| 103861 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 103862 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 103863 | 0, // zasubh1_then_zasubd0 |
| 103864 | 0, // zasubh1_then_zasubd1 |
| 103865 | 0, // zasubh1_then_zasubq0 |
| 103866 | 0, // zasubh1_then_zasubq1 |
| 103867 | 0, // zasubh1_then_zasubs0 |
| 103868 | 0, // zasubh1_then_zasubs1 |
| 103869 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 103870 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 103871 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 103872 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 103873 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 103874 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 103875 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 103876 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 103877 | 0, // dsub1_then_bsub |
| 103878 | 0, // dsub1_then_bsub_hi |
| 103879 | 0, // dsub1_then_hsub |
| 103880 | 0, // dsub1_then_hsub_hi |
| 103881 | 0, // dsub1_then_ssub |
| 103882 | 0, // dsub1_then_ssub_hi |
| 103883 | 0, // dsub3_then_bsub |
| 103884 | 0, // dsub3_then_bsub_hi |
| 103885 | 0, // dsub3_then_hsub |
| 103886 | 0, // dsub3_then_hsub_hi |
| 103887 | 0, // dsub3_then_ssub |
| 103888 | 0, // dsub3_then_ssub_hi |
| 103889 | 0, // dsub2_then_bsub |
| 103890 | 0, // dsub2_then_bsub_hi |
| 103891 | 0, // dsub2_then_hsub |
| 103892 | 0, // dsub2_then_hsub_hi |
| 103893 | 0, // dsub2_then_ssub |
| 103894 | 0, // dsub2_then_ssub_hi |
| 103895 | 0, // psub1_then_psub |
| 103896 | 0, // qsub1_then_dsub_hi |
| 103897 | 0, // qsub3_then_dsub_hi |
| 103898 | 0, // qsub2_then_dsub_hi |
| 103899 | 499, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103900 | 499, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103901 | 499, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103902 | 499, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103903 | 499, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103904 | 499, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103905 | 499, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103906 | 499, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103907 | 499, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103908 | 499, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103909 | 499, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103910 | 499, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103911 | 499, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103912 | 499, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103913 | 0, // subo64_then_sub_32 |
| 103914 | 0, // subo64_then_sub_32_hi |
| 103915 | 0, // zsub1_then_zsub_hi |
| 103916 | 0, // zsub3_then_zsub_hi |
| 103917 | 0, // zsub2_then_zsub_hi |
| 103918 | 0, // dsub0_dsub1 |
| 103919 | 0, // dsub0_dsub1_dsub2 |
| 103920 | 0, // dsub1_dsub2 |
| 103921 | 0, // dsub1_dsub2_dsub3 |
| 103922 | 0, // dsub2_dsub3 |
| 103923 | 0, // dsub_dsub1 |
| 103924 | 0, // dsub_dsub1_dsub2_dsub3 |
| 103925 | 0, // dsub_dsub1_dsub2 |
| 103926 | 0, // qsub0_qsub1 |
| 103927 | 0, // qsub0_qsub1_qsub2 |
| 103928 | 0, // qsub1_qsub2 |
| 103929 | 0, // qsub1_qsub2_qsub3 |
| 103930 | 0, // qsub2_qsub3 |
| 103931 | 499, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103932 | 499, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103933 | 499, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103934 | 499, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103935 | 499, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103936 | 499, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103937 | 499, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103938 | 499, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 103939 | 0, // sub_32_subo64_then_sub_32 |
| 103940 | 0, // zsub_qsub1 |
| 103941 | 0, // zsub_qsub1_qsub2_qsub3 |
| 103942 | 0, // zsub_qsub1_qsub2 |
| 103943 | 0, // zsub0_zsub1 |
| 103944 | 0, // zsub0_zsub1_zsub2 |
| 103945 | 0, // zsub1_zsub2 |
| 103946 | 0, // zsub1_zsub2_zsub3 |
| 103947 | 0, // zsub2_zsub3 |
| 103948 | 0, // zsub0_zsub2 |
| 103949 | 0, // zsub1_zsub3 |
| 103950 | }, |
| 103951 | { // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103952 | 0, // bsub |
| 103953 | 0, // bsub_hi |
| 103954 | 0, // dsub |
| 103955 | 0, // dsub0 |
| 103956 | 0, // dsub1 |
| 103957 | 0, // dsub2 |
| 103958 | 0, // dsub3 |
| 103959 | 0, // dsub_hi |
| 103960 | 0, // hsub |
| 103961 | 0, // hsub_hi |
| 103962 | 0, // psub |
| 103963 | 0, // psub0 |
| 103964 | 0, // psub1 |
| 103965 | 0, // qsub0 |
| 103966 | 0, // qsub1 |
| 103967 | 0, // qsub2 |
| 103968 | 0, // qsub3 |
| 103969 | 0, // ssub |
| 103970 | 0, // ssub_hi |
| 103971 | 500, // sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103972 | 500, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103973 | 0, // sube32 |
| 103974 | 0, // sube64 |
| 103975 | 0, // subo32 |
| 103976 | 0, // subo64 |
| 103977 | 500, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103978 | 500, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103979 | 500, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103980 | 500, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103981 | 500, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103982 | 500, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103983 | 500, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103984 | 500, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 103985 | 0, // zasubb |
| 103986 | 0, // zasubd0 |
| 103987 | 0, // zasubd1 |
| 103988 | 0, // zasubh0 |
| 103989 | 0, // zasubh1 |
| 103990 | 0, // zasubq0 |
| 103991 | 0, // zasubq1 |
| 103992 | 0, // zasubs0 |
| 103993 | 0, // zasubs1 |
| 103994 | 0, // zsub |
| 103995 | 0, // zsub0 |
| 103996 | 0, // zsub1 |
| 103997 | 0, // zsub2 |
| 103998 | 0, // zsub3 |
| 103999 | 0, // zsub_hi |
| 104000 | 0, // zasubd1_then_zasubq0 |
| 104001 | 0, // zasubd1_then_zasubq1 |
| 104002 | 0, // zasubs1_then_zasubd0 |
| 104003 | 0, // zasubs1_then_zasubd1 |
| 104004 | 0, // zasubs1_then_zasubq0 |
| 104005 | 0, // zasubs1_then_zasubq1 |
| 104006 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104007 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104008 | 0, // zasubh1_then_zasubd0 |
| 104009 | 0, // zasubh1_then_zasubd1 |
| 104010 | 0, // zasubh1_then_zasubq0 |
| 104011 | 0, // zasubh1_then_zasubq1 |
| 104012 | 0, // zasubh1_then_zasubs0 |
| 104013 | 0, // zasubh1_then_zasubs1 |
| 104014 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104015 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104016 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104017 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104018 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104019 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104020 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104021 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104022 | 0, // dsub1_then_bsub |
| 104023 | 0, // dsub1_then_bsub_hi |
| 104024 | 0, // dsub1_then_hsub |
| 104025 | 0, // dsub1_then_hsub_hi |
| 104026 | 0, // dsub1_then_ssub |
| 104027 | 0, // dsub1_then_ssub_hi |
| 104028 | 0, // dsub3_then_bsub |
| 104029 | 0, // dsub3_then_bsub_hi |
| 104030 | 0, // dsub3_then_hsub |
| 104031 | 0, // dsub3_then_hsub_hi |
| 104032 | 0, // dsub3_then_ssub |
| 104033 | 0, // dsub3_then_ssub_hi |
| 104034 | 0, // dsub2_then_bsub |
| 104035 | 0, // dsub2_then_bsub_hi |
| 104036 | 0, // dsub2_then_hsub |
| 104037 | 0, // dsub2_then_hsub_hi |
| 104038 | 0, // dsub2_then_ssub |
| 104039 | 0, // dsub2_then_ssub_hi |
| 104040 | 0, // psub1_then_psub |
| 104041 | 0, // qsub1_then_dsub_hi |
| 104042 | 0, // qsub3_then_dsub_hi |
| 104043 | 0, // qsub2_then_dsub_hi |
| 104044 | 500, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104045 | 500, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104046 | 500, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104047 | 500, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104048 | 500, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104049 | 500, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104050 | 500, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104051 | 500, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104052 | 500, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104053 | 500, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104054 | 500, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104055 | 500, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104056 | 500, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104057 | 500, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104058 | 0, // subo64_then_sub_32 |
| 104059 | 0, // subo64_then_sub_32_hi |
| 104060 | 0, // zsub1_then_zsub_hi |
| 104061 | 0, // zsub3_then_zsub_hi |
| 104062 | 0, // zsub2_then_zsub_hi |
| 104063 | 0, // dsub0_dsub1 |
| 104064 | 0, // dsub0_dsub1_dsub2 |
| 104065 | 0, // dsub1_dsub2 |
| 104066 | 0, // dsub1_dsub2_dsub3 |
| 104067 | 0, // dsub2_dsub3 |
| 104068 | 0, // dsub_dsub1 |
| 104069 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104070 | 0, // dsub_dsub1_dsub2 |
| 104071 | 0, // qsub0_qsub1 |
| 104072 | 0, // qsub0_qsub1_qsub2 |
| 104073 | 0, // qsub1_qsub2 |
| 104074 | 0, // qsub1_qsub2_qsub3 |
| 104075 | 0, // qsub2_qsub3 |
| 104076 | 500, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104077 | 500, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104078 | 500, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104079 | 500, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104080 | 500, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104081 | 500, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104082 | 500, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104083 | 500, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 104084 | 0, // sub_32_subo64_then_sub_32 |
| 104085 | 0, // zsub_qsub1 |
| 104086 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104087 | 0, // zsub_qsub1_qsub2 |
| 104088 | 0, // zsub0_zsub1 |
| 104089 | 0, // zsub0_zsub1_zsub2 |
| 104090 | 0, // zsub1_zsub2 |
| 104091 | 0, // zsub1_zsub2_zsub3 |
| 104092 | 0, // zsub2_zsub3 |
| 104093 | 0, // zsub0_zsub2 |
| 104094 | 0, // zsub1_zsub3 |
| 104095 | }, |
| 104096 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104097 | 0, // bsub |
| 104098 | 0, // bsub_hi |
| 104099 | 0, // dsub |
| 104100 | 0, // dsub0 |
| 104101 | 0, // dsub1 |
| 104102 | 0, // dsub2 |
| 104103 | 0, // dsub3 |
| 104104 | 0, // dsub_hi |
| 104105 | 0, // hsub |
| 104106 | 0, // hsub_hi |
| 104107 | 0, // psub |
| 104108 | 0, // psub0 |
| 104109 | 0, // psub1 |
| 104110 | 0, // qsub0 |
| 104111 | 0, // qsub1 |
| 104112 | 0, // qsub2 |
| 104113 | 0, // qsub3 |
| 104114 | 0, // ssub |
| 104115 | 0, // ssub_hi |
| 104116 | 501, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104117 | 501, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104118 | 0, // sube32 |
| 104119 | 0, // sube64 |
| 104120 | 0, // subo32 |
| 104121 | 0, // subo64 |
| 104122 | 501, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104123 | 501, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104124 | 501, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104125 | 501, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104126 | 501, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104127 | 501, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104128 | 501, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104129 | 501, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104130 | 0, // zasubb |
| 104131 | 0, // zasubd0 |
| 104132 | 0, // zasubd1 |
| 104133 | 0, // zasubh0 |
| 104134 | 0, // zasubh1 |
| 104135 | 0, // zasubq0 |
| 104136 | 0, // zasubq1 |
| 104137 | 0, // zasubs0 |
| 104138 | 0, // zasubs1 |
| 104139 | 0, // zsub |
| 104140 | 0, // zsub0 |
| 104141 | 0, // zsub1 |
| 104142 | 0, // zsub2 |
| 104143 | 0, // zsub3 |
| 104144 | 0, // zsub_hi |
| 104145 | 0, // zasubd1_then_zasubq0 |
| 104146 | 0, // zasubd1_then_zasubq1 |
| 104147 | 0, // zasubs1_then_zasubd0 |
| 104148 | 0, // zasubs1_then_zasubd1 |
| 104149 | 0, // zasubs1_then_zasubq0 |
| 104150 | 0, // zasubs1_then_zasubq1 |
| 104151 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104152 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104153 | 0, // zasubh1_then_zasubd0 |
| 104154 | 0, // zasubh1_then_zasubd1 |
| 104155 | 0, // zasubh1_then_zasubq0 |
| 104156 | 0, // zasubh1_then_zasubq1 |
| 104157 | 0, // zasubh1_then_zasubs0 |
| 104158 | 0, // zasubh1_then_zasubs1 |
| 104159 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104160 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104161 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104162 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104163 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104164 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104165 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104166 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104167 | 0, // dsub1_then_bsub |
| 104168 | 0, // dsub1_then_bsub_hi |
| 104169 | 0, // dsub1_then_hsub |
| 104170 | 0, // dsub1_then_hsub_hi |
| 104171 | 0, // dsub1_then_ssub |
| 104172 | 0, // dsub1_then_ssub_hi |
| 104173 | 0, // dsub3_then_bsub |
| 104174 | 0, // dsub3_then_bsub_hi |
| 104175 | 0, // dsub3_then_hsub |
| 104176 | 0, // dsub3_then_hsub_hi |
| 104177 | 0, // dsub3_then_ssub |
| 104178 | 0, // dsub3_then_ssub_hi |
| 104179 | 0, // dsub2_then_bsub |
| 104180 | 0, // dsub2_then_bsub_hi |
| 104181 | 0, // dsub2_then_hsub |
| 104182 | 0, // dsub2_then_hsub_hi |
| 104183 | 0, // dsub2_then_ssub |
| 104184 | 0, // dsub2_then_ssub_hi |
| 104185 | 0, // psub1_then_psub |
| 104186 | 0, // qsub1_then_dsub_hi |
| 104187 | 0, // qsub3_then_dsub_hi |
| 104188 | 0, // qsub2_then_dsub_hi |
| 104189 | 501, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104190 | 501, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104191 | 501, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104192 | 501, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104193 | 501, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104194 | 501, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104195 | 501, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104196 | 501, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104197 | 501, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104198 | 501, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104199 | 501, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104200 | 501, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104201 | 501, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104202 | 501, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104203 | 0, // subo64_then_sub_32 |
| 104204 | 0, // subo64_then_sub_32_hi |
| 104205 | 0, // zsub1_then_zsub_hi |
| 104206 | 0, // zsub3_then_zsub_hi |
| 104207 | 0, // zsub2_then_zsub_hi |
| 104208 | 0, // dsub0_dsub1 |
| 104209 | 0, // dsub0_dsub1_dsub2 |
| 104210 | 0, // dsub1_dsub2 |
| 104211 | 0, // dsub1_dsub2_dsub3 |
| 104212 | 0, // dsub2_dsub3 |
| 104213 | 0, // dsub_dsub1 |
| 104214 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104215 | 0, // dsub_dsub1_dsub2 |
| 104216 | 0, // qsub0_qsub1 |
| 104217 | 0, // qsub0_qsub1_qsub2 |
| 104218 | 0, // qsub1_qsub2 |
| 104219 | 0, // qsub1_qsub2_qsub3 |
| 104220 | 0, // qsub2_qsub3 |
| 104221 | 501, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104222 | 501, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104223 | 501, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104224 | 501, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104225 | 501, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104226 | 501, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104227 | 501, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104228 | 501, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104229 | 0, // sub_32_subo64_then_sub_32 |
| 104230 | 0, // zsub_qsub1 |
| 104231 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104232 | 0, // zsub_qsub1_qsub2 |
| 104233 | 0, // zsub0_zsub1 |
| 104234 | 0, // zsub0_zsub1_zsub2 |
| 104235 | 0, // zsub1_zsub2 |
| 104236 | 0, // zsub1_zsub2_zsub3 |
| 104237 | 0, // zsub2_zsub3 |
| 104238 | 0, // zsub0_zsub2 |
| 104239 | 0, // zsub1_zsub3 |
| 104240 | }, |
| 104241 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104242 | 0, // bsub |
| 104243 | 0, // bsub_hi |
| 104244 | 0, // dsub |
| 104245 | 0, // dsub0 |
| 104246 | 0, // dsub1 |
| 104247 | 0, // dsub2 |
| 104248 | 0, // dsub3 |
| 104249 | 0, // dsub_hi |
| 104250 | 0, // hsub |
| 104251 | 0, // hsub_hi |
| 104252 | 0, // psub |
| 104253 | 0, // psub0 |
| 104254 | 0, // psub1 |
| 104255 | 0, // qsub0 |
| 104256 | 0, // qsub1 |
| 104257 | 0, // qsub2 |
| 104258 | 0, // qsub3 |
| 104259 | 0, // ssub |
| 104260 | 0, // ssub_hi |
| 104261 | 502, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104262 | 502, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104263 | 0, // sube32 |
| 104264 | 0, // sube64 |
| 104265 | 0, // subo32 |
| 104266 | 0, // subo64 |
| 104267 | 502, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104268 | 502, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104269 | 502, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104270 | 502, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104271 | 502, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104272 | 502, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104273 | 502, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104274 | 502, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104275 | 0, // zasubb |
| 104276 | 0, // zasubd0 |
| 104277 | 0, // zasubd1 |
| 104278 | 0, // zasubh0 |
| 104279 | 0, // zasubh1 |
| 104280 | 0, // zasubq0 |
| 104281 | 0, // zasubq1 |
| 104282 | 0, // zasubs0 |
| 104283 | 0, // zasubs1 |
| 104284 | 0, // zsub |
| 104285 | 0, // zsub0 |
| 104286 | 0, // zsub1 |
| 104287 | 0, // zsub2 |
| 104288 | 0, // zsub3 |
| 104289 | 0, // zsub_hi |
| 104290 | 0, // zasubd1_then_zasubq0 |
| 104291 | 0, // zasubd1_then_zasubq1 |
| 104292 | 0, // zasubs1_then_zasubd0 |
| 104293 | 0, // zasubs1_then_zasubd1 |
| 104294 | 0, // zasubs1_then_zasubq0 |
| 104295 | 0, // zasubs1_then_zasubq1 |
| 104296 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104297 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104298 | 0, // zasubh1_then_zasubd0 |
| 104299 | 0, // zasubh1_then_zasubd1 |
| 104300 | 0, // zasubh1_then_zasubq0 |
| 104301 | 0, // zasubh1_then_zasubq1 |
| 104302 | 0, // zasubh1_then_zasubs0 |
| 104303 | 0, // zasubh1_then_zasubs1 |
| 104304 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104305 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104306 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104307 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104308 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104309 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104310 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104311 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104312 | 0, // dsub1_then_bsub |
| 104313 | 0, // dsub1_then_bsub_hi |
| 104314 | 0, // dsub1_then_hsub |
| 104315 | 0, // dsub1_then_hsub_hi |
| 104316 | 0, // dsub1_then_ssub |
| 104317 | 0, // dsub1_then_ssub_hi |
| 104318 | 0, // dsub3_then_bsub |
| 104319 | 0, // dsub3_then_bsub_hi |
| 104320 | 0, // dsub3_then_hsub |
| 104321 | 0, // dsub3_then_hsub_hi |
| 104322 | 0, // dsub3_then_ssub |
| 104323 | 0, // dsub3_then_ssub_hi |
| 104324 | 0, // dsub2_then_bsub |
| 104325 | 0, // dsub2_then_bsub_hi |
| 104326 | 0, // dsub2_then_hsub |
| 104327 | 0, // dsub2_then_hsub_hi |
| 104328 | 0, // dsub2_then_ssub |
| 104329 | 0, // dsub2_then_ssub_hi |
| 104330 | 0, // psub1_then_psub |
| 104331 | 0, // qsub1_then_dsub_hi |
| 104332 | 0, // qsub3_then_dsub_hi |
| 104333 | 0, // qsub2_then_dsub_hi |
| 104334 | 502, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104335 | 502, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104336 | 502, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104337 | 502, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104338 | 502, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104339 | 502, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104340 | 502, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104341 | 502, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104342 | 502, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104343 | 502, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104344 | 502, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104345 | 502, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104346 | 502, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104347 | 502, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104348 | 0, // subo64_then_sub_32 |
| 104349 | 0, // subo64_then_sub_32_hi |
| 104350 | 0, // zsub1_then_zsub_hi |
| 104351 | 0, // zsub3_then_zsub_hi |
| 104352 | 0, // zsub2_then_zsub_hi |
| 104353 | 0, // dsub0_dsub1 |
| 104354 | 0, // dsub0_dsub1_dsub2 |
| 104355 | 0, // dsub1_dsub2 |
| 104356 | 0, // dsub1_dsub2_dsub3 |
| 104357 | 0, // dsub2_dsub3 |
| 104358 | 0, // dsub_dsub1 |
| 104359 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104360 | 0, // dsub_dsub1_dsub2 |
| 104361 | 0, // qsub0_qsub1 |
| 104362 | 0, // qsub0_qsub1_qsub2 |
| 104363 | 0, // qsub1_qsub2 |
| 104364 | 0, // qsub1_qsub2_qsub3 |
| 104365 | 0, // qsub2_qsub3 |
| 104366 | 502, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104367 | 502, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104368 | 502, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104369 | 502, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104370 | 502, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104371 | 502, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104372 | 502, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104373 | 502, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104374 | 0, // sub_32_subo64_then_sub_32 |
| 104375 | 0, // zsub_qsub1 |
| 104376 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104377 | 0, // zsub_qsub1_qsub2 |
| 104378 | 0, // zsub0_zsub1 |
| 104379 | 0, // zsub0_zsub1_zsub2 |
| 104380 | 0, // zsub1_zsub2 |
| 104381 | 0, // zsub1_zsub2_zsub3 |
| 104382 | 0, // zsub2_zsub3 |
| 104383 | 0, // zsub0_zsub2 |
| 104384 | 0, // zsub1_zsub3 |
| 104385 | }, |
| 104386 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104387 | 0, // bsub |
| 104388 | 0, // bsub_hi |
| 104389 | 0, // dsub |
| 104390 | 0, // dsub0 |
| 104391 | 0, // dsub1 |
| 104392 | 0, // dsub2 |
| 104393 | 0, // dsub3 |
| 104394 | 0, // dsub_hi |
| 104395 | 0, // hsub |
| 104396 | 0, // hsub_hi |
| 104397 | 0, // psub |
| 104398 | 0, // psub0 |
| 104399 | 0, // psub1 |
| 104400 | 0, // qsub0 |
| 104401 | 0, // qsub1 |
| 104402 | 0, // qsub2 |
| 104403 | 0, // qsub3 |
| 104404 | 0, // ssub |
| 104405 | 0, // ssub_hi |
| 104406 | 503, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104407 | 503, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104408 | 0, // sube32 |
| 104409 | 0, // sube64 |
| 104410 | 0, // subo32 |
| 104411 | 0, // subo64 |
| 104412 | 503, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104413 | 503, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104414 | 503, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104415 | 503, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104416 | 503, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104417 | 503, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104418 | 503, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104419 | 503, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104420 | 0, // zasubb |
| 104421 | 0, // zasubd0 |
| 104422 | 0, // zasubd1 |
| 104423 | 0, // zasubh0 |
| 104424 | 0, // zasubh1 |
| 104425 | 0, // zasubq0 |
| 104426 | 0, // zasubq1 |
| 104427 | 0, // zasubs0 |
| 104428 | 0, // zasubs1 |
| 104429 | 0, // zsub |
| 104430 | 0, // zsub0 |
| 104431 | 0, // zsub1 |
| 104432 | 0, // zsub2 |
| 104433 | 0, // zsub3 |
| 104434 | 0, // zsub_hi |
| 104435 | 0, // zasubd1_then_zasubq0 |
| 104436 | 0, // zasubd1_then_zasubq1 |
| 104437 | 0, // zasubs1_then_zasubd0 |
| 104438 | 0, // zasubs1_then_zasubd1 |
| 104439 | 0, // zasubs1_then_zasubq0 |
| 104440 | 0, // zasubs1_then_zasubq1 |
| 104441 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104442 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104443 | 0, // zasubh1_then_zasubd0 |
| 104444 | 0, // zasubh1_then_zasubd1 |
| 104445 | 0, // zasubh1_then_zasubq0 |
| 104446 | 0, // zasubh1_then_zasubq1 |
| 104447 | 0, // zasubh1_then_zasubs0 |
| 104448 | 0, // zasubh1_then_zasubs1 |
| 104449 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104450 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104451 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104452 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104453 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104454 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104455 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104456 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104457 | 0, // dsub1_then_bsub |
| 104458 | 0, // dsub1_then_bsub_hi |
| 104459 | 0, // dsub1_then_hsub |
| 104460 | 0, // dsub1_then_hsub_hi |
| 104461 | 0, // dsub1_then_ssub |
| 104462 | 0, // dsub1_then_ssub_hi |
| 104463 | 0, // dsub3_then_bsub |
| 104464 | 0, // dsub3_then_bsub_hi |
| 104465 | 0, // dsub3_then_hsub |
| 104466 | 0, // dsub3_then_hsub_hi |
| 104467 | 0, // dsub3_then_ssub |
| 104468 | 0, // dsub3_then_ssub_hi |
| 104469 | 0, // dsub2_then_bsub |
| 104470 | 0, // dsub2_then_bsub_hi |
| 104471 | 0, // dsub2_then_hsub |
| 104472 | 0, // dsub2_then_hsub_hi |
| 104473 | 0, // dsub2_then_ssub |
| 104474 | 0, // dsub2_then_ssub_hi |
| 104475 | 0, // psub1_then_psub |
| 104476 | 0, // qsub1_then_dsub_hi |
| 104477 | 0, // qsub3_then_dsub_hi |
| 104478 | 0, // qsub2_then_dsub_hi |
| 104479 | 503, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104480 | 503, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104481 | 503, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104482 | 503, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104483 | 503, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104484 | 503, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104485 | 503, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104486 | 503, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104487 | 503, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104488 | 503, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104489 | 503, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104490 | 503, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104491 | 503, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104492 | 503, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104493 | 0, // subo64_then_sub_32 |
| 104494 | 0, // subo64_then_sub_32_hi |
| 104495 | 0, // zsub1_then_zsub_hi |
| 104496 | 0, // zsub3_then_zsub_hi |
| 104497 | 0, // zsub2_then_zsub_hi |
| 104498 | 0, // dsub0_dsub1 |
| 104499 | 0, // dsub0_dsub1_dsub2 |
| 104500 | 0, // dsub1_dsub2 |
| 104501 | 0, // dsub1_dsub2_dsub3 |
| 104502 | 0, // dsub2_dsub3 |
| 104503 | 0, // dsub_dsub1 |
| 104504 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104505 | 0, // dsub_dsub1_dsub2 |
| 104506 | 0, // qsub0_qsub1 |
| 104507 | 0, // qsub0_qsub1_qsub2 |
| 104508 | 0, // qsub1_qsub2 |
| 104509 | 0, // qsub1_qsub2_qsub3 |
| 104510 | 0, // qsub2_qsub3 |
| 104511 | 503, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104512 | 503, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104513 | 503, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104514 | 503, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104515 | 503, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104516 | 503, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104517 | 503, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104518 | 503, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 104519 | 0, // sub_32_subo64_then_sub_32 |
| 104520 | 0, // zsub_qsub1 |
| 104521 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104522 | 0, // zsub_qsub1_qsub2 |
| 104523 | 0, // zsub0_zsub1 |
| 104524 | 0, // zsub0_zsub1_zsub2 |
| 104525 | 0, // zsub1_zsub2 |
| 104526 | 0, // zsub1_zsub2_zsub3 |
| 104527 | 0, // zsub2_zsub3 |
| 104528 | 0, // zsub0_zsub2 |
| 104529 | 0, // zsub1_zsub3 |
| 104530 | }, |
| 104531 | { // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104532 | 0, // bsub |
| 104533 | 0, // bsub_hi |
| 104534 | 0, // dsub |
| 104535 | 0, // dsub0 |
| 104536 | 0, // dsub1 |
| 104537 | 0, // dsub2 |
| 104538 | 0, // dsub3 |
| 104539 | 0, // dsub_hi |
| 104540 | 0, // hsub |
| 104541 | 0, // hsub_hi |
| 104542 | 0, // psub |
| 104543 | 0, // psub0 |
| 104544 | 0, // psub1 |
| 104545 | 0, // qsub0 |
| 104546 | 0, // qsub1 |
| 104547 | 0, // qsub2 |
| 104548 | 0, // qsub3 |
| 104549 | 0, // ssub |
| 104550 | 0, // ssub_hi |
| 104551 | 504, // sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104552 | 504, // sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104553 | 0, // sube32 |
| 104554 | 0, // sube64 |
| 104555 | 0, // subo32 |
| 104556 | 0, // subo64 |
| 104557 | 504, // x8sub_0 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104558 | 504, // x8sub_1 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104559 | 504, // x8sub_2 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104560 | 504, // x8sub_3 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104561 | 504, // x8sub_4 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104562 | 504, // x8sub_5 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104563 | 504, // x8sub_6 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104564 | 504, // x8sub_7 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104565 | 0, // zasubb |
| 104566 | 0, // zasubd0 |
| 104567 | 0, // zasubd1 |
| 104568 | 0, // zasubh0 |
| 104569 | 0, // zasubh1 |
| 104570 | 0, // zasubq0 |
| 104571 | 0, // zasubq1 |
| 104572 | 0, // zasubs0 |
| 104573 | 0, // zasubs1 |
| 104574 | 0, // zsub |
| 104575 | 0, // zsub0 |
| 104576 | 0, // zsub1 |
| 104577 | 0, // zsub2 |
| 104578 | 0, // zsub3 |
| 104579 | 0, // zsub_hi |
| 104580 | 0, // zasubd1_then_zasubq0 |
| 104581 | 0, // zasubd1_then_zasubq1 |
| 104582 | 0, // zasubs1_then_zasubd0 |
| 104583 | 0, // zasubs1_then_zasubd1 |
| 104584 | 0, // zasubs1_then_zasubq0 |
| 104585 | 0, // zasubs1_then_zasubq1 |
| 104586 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104587 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104588 | 0, // zasubh1_then_zasubd0 |
| 104589 | 0, // zasubh1_then_zasubd1 |
| 104590 | 0, // zasubh1_then_zasubq0 |
| 104591 | 0, // zasubh1_then_zasubq1 |
| 104592 | 0, // zasubh1_then_zasubs0 |
| 104593 | 0, // zasubh1_then_zasubs1 |
| 104594 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104595 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104596 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104597 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104598 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104599 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104600 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104601 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104602 | 0, // dsub1_then_bsub |
| 104603 | 0, // dsub1_then_bsub_hi |
| 104604 | 0, // dsub1_then_hsub |
| 104605 | 0, // dsub1_then_hsub_hi |
| 104606 | 0, // dsub1_then_ssub |
| 104607 | 0, // dsub1_then_ssub_hi |
| 104608 | 0, // dsub3_then_bsub |
| 104609 | 0, // dsub3_then_bsub_hi |
| 104610 | 0, // dsub3_then_hsub |
| 104611 | 0, // dsub3_then_hsub_hi |
| 104612 | 0, // dsub3_then_ssub |
| 104613 | 0, // dsub3_then_ssub_hi |
| 104614 | 0, // dsub2_then_bsub |
| 104615 | 0, // dsub2_then_bsub_hi |
| 104616 | 0, // dsub2_then_hsub |
| 104617 | 0, // dsub2_then_hsub_hi |
| 104618 | 0, // dsub2_then_ssub |
| 104619 | 0, // dsub2_then_ssub_hi |
| 104620 | 0, // psub1_then_psub |
| 104621 | 0, // qsub1_then_dsub_hi |
| 104622 | 0, // qsub3_then_dsub_hi |
| 104623 | 0, // qsub2_then_dsub_hi |
| 104624 | 504, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104625 | 504, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104626 | 504, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104627 | 504, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104628 | 504, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104629 | 504, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104630 | 504, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104631 | 504, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104632 | 504, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104633 | 504, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104634 | 504, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104635 | 504, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104636 | 504, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104637 | 504, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104638 | 0, // subo64_then_sub_32 |
| 104639 | 0, // subo64_then_sub_32_hi |
| 104640 | 0, // zsub1_then_zsub_hi |
| 104641 | 0, // zsub3_then_zsub_hi |
| 104642 | 0, // zsub2_then_zsub_hi |
| 104643 | 0, // dsub0_dsub1 |
| 104644 | 0, // dsub0_dsub1_dsub2 |
| 104645 | 0, // dsub1_dsub2 |
| 104646 | 0, // dsub1_dsub2_dsub3 |
| 104647 | 0, // dsub2_dsub3 |
| 104648 | 0, // dsub_dsub1 |
| 104649 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104650 | 0, // dsub_dsub1_dsub2 |
| 104651 | 0, // qsub0_qsub1 |
| 104652 | 0, // qsub0_qsub1_qsub2 |
| 104653 | 0, // qsub1_qsub2 |
| 104654 | 0, // qsub1_qsub2_qsub3 |
| 104655 | 0, // qsub2_qsub3 |
| 104656 | 504, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104657 | 504, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104658 | 504, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104659 | 504, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104660 | 504, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104661 | 504, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104662 | 504, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104663 | 504, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 104664 | 0, // sub_32_subo64_then_sub_32 |
| 104665 | 0, // zsub_qsub1 |
| 104666 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104667 | 0, // zsub_qsub1_qsub2 |
| 104668 | 0, // zsub0_zsub1 |
| 104669 | 0, // zsub0_zsub1_zsub2 |
| 104670 | 0, // zsub1_zsub2 |
| 104671 | 0, // zsub1_zsub2_zsub3 |
| 104672 | 0, // zsub2_zsub3 |
| 104673 | 0, // zsub0_zsub2 |
| 104674 | 0, // zsub1_zsub3 |
| 104675 | }, |
| 104676 | { // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104677 | 0, // bsub |
| 104678 | 0, // bsub_hi |
| 104679 | 0, // dsub |
| 104680 | 0, // dsub0 |
| 104681 | 0, // dsub1 |
| 104682 | 0, // dsub2 |
| 104683 | 0, // dsub3 |
| 104684 | 0, // dsub_hi |
| 104685 | 0, // hsub |
| 104686 | 0, // hsub_hi |
| 104687 | 0, // psub |
| 104688 | 0, // psub0 |
| 104689 | 0, // psub1 |
| 104690 | 0, // qsub0 |
| 104691 | 0, // qsub1 |
| 104692 | 0, // qsub2 |
| 104693 | 0, // qsub3 |
| 104694 | 0, // ssub |
| 104695 | 0, // ssub_hi |
| 104696 | 505, // sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104697 | 505, // sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104698 | 0, // sube32 |
| 104699 | 0, // sube64 |
| 104700 | 0, // subo32 |
| 104701 | 0, // subo64 |
| 104702 | 505, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104703 | 505, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104704 | 505, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104705 | 505, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104706 | 505, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104707 | 505, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104708 | 505, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104709 | 505, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104710 | 0, // zasubb |
| 104711 | 0, // zasubd0 |
| 104712 | 0, // zasubd1 |
| 104713 | 0, // zasubh0 |
| 104714 | 0, // zasubh1 |
| 104715 | 0, // zasubq0 |
| 104716 | 0, // zasubq1 |
| 104717 | 0, // zasubs0 |
| 104718 | 0, // zasubs1 |
| 104719 | 0, // zsub |
| 104720 | 0, // zsub0 |
| 104721 | 0, // zsub1 |
| 104722 | 0, // zsub2 |
| 104723 | 0, // zsub3 |
| 104724 | 0, // zsub_hi |
| 104725 | 0, // zasubd1_then_zasubq0 |
| 104726 | 0, // zasubd1_then_zasubq1 |
| 104727 | 0, // zasubs1_then_zasubd0 |
| 104728 | 0, // zasubs1_then_zasubd1 |
| 104729 | 0, // zasubs1_then_zasubq0 |
| 104730 | 0, // zasubs1_then_zasubq1 |
| 104731 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104732 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104733 | 0, // zasubh1_then_zasubd0 |
| 104734 | 0, // zasubh1_then_zasubd1 |
| 104735 | 0, // zasubh1_then_zasubq0 |
| 104736 | 0, // zasubh1_then_zasubq1 |
| 104737 | 0, // zasubh1_then_zasubs0 |
| 104738 | 0, // zasubh1_then_zasubs1 |
| 104739 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104740 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104741 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104742 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104743 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104744 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104745 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104746 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104747 | 0, // dsub1_then_bsub |
| 104748 | 0, // dsub1_then_bsub_hi |
| 104749 | 0, // dsub1_then_hsub |
| 104750 | 0, // dsub1_then_hsub_hi |
| 104751 | 0, // dsub1_then_ssub |
| 104752 | 0, // dsub1_then_ssub_hi |
| 104753 | 0, // dsub3_then_bsub |
| 104754 | 0, // dsub3_then_bsub_hi |
| 104755 | 0, // dsub3_then_hsub |
| 104756 | 0, // dsub3_then_hsub_hi |
| 104757 | 0, // dsub3_then_ssub |
| 104758 | 0, // dsub3_then_ssub_hi |
| 104759 | 0, // dsub2_then_bsub |
| 104760 | 0, // dsub2_then_bsub_hi |
| 104761 | 0, // dsub2_then_hsub |
| 104762 | 0, // dsub2_then_hsub_hi |
| 104763 | 0, // dsub2_then_ssub |
| 104764 | 0, // dsub2_then_ssub_hi |
| 104765 | 0, // psub1_then_psub |
| 104766 | 0, // qsub1_then_dsub_hi |
| 104767 | 0, // qsub3_then_dsub_hi |
| 104768 | 0, // qsub2_then_dsub_hi |
| 104769 | 505, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104770 | 505, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104771 | 505, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104772 | 505, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104773 | 505, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104774 | 505, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104775 | 505, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104776 | 505, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104777 | 505, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104778 | 505, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104779 | 505, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104780 | 505, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104781 | 505, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104782 | 505, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104783 | 0, // subo64_then_sub_32 |
| 104784 | 0, // subo64_then_sub_32_hi |
| 104785 | 0, // zsub1_then_zsub_hi |
| 104786 | 0, // zsub3_then_zsub_hi |
| 104787 | 0, // zsub2_then_zsub_hi |
| 104788 | 0, // dsub0_dsub1 |
| 104789 | 0, // dsub0_dsub1_dsub2 |
| 104790 | 0, // dsub1_dsub2 |
| 104791 | 0, // dsub1_dsub2_dsub3 |
| 104792 | 0, // dsub2_dsub3 |
| 104793 | 0, // dsub_dsub1 |
| 104794 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104795 | 0, // dsub_dsub1_dsub2 |
| 104796 | 0, // qsub0_qsub1 |
| 104797 | 0, // qsub0_qsub1_qsub2 |
| 104798 | 0, // qsub1_qsub2 |
| 104799 | 0, // qsub1_qsub2_qsub3 |
| 104800 | 0, // qsub2_qsub3 |
| 104801 | 505, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104802 | 505, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104803 | 505, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104804 | 505, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104805 | 505, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104806 | 505, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104807 | 505, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104808 | 505, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 104809 | 0, // sub_32_subo64_then_sub_32 |
| 104810 | 0, // zsub_qsub1 |
| 104811 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104812 | 0, // zsub_qsub1_qsub2 |
| 104813 | 0, // zsub0_zsub1 |
| 104814 | 0, // zsub0_zsub1_zsub2 |
| 104815 | 0, // zsub1_zsub2 |
| 104816 | 0, // zsub1_zsub2_zsub3 |
| 104817 | 0, // zsub2_zsub3 |
| 104818 | 0, // zsub0_zsub2 |
| 104819 | 0, // zsub1_zsub3 |
| 104820 | }, |
| 104821 | { // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104822 | 0, // bsub |
| 104823 | 0, // bsub_hi |
| 104824 | 0, // dsub |
| 104825 | 0, // dsub0 |
| 104826 | 0, // dsub1 |
| 104827 | 0, // dsub2 |
| 104828 | 0, // dsub3 |
| 104829 | 0, // dsub_hi |
| 104830 | 0, // hsub |
| 104831 | 0, // hsub_hi |
| 104832 | 0, // psub |
| 104833 | 0, // psub0 |
| 104834 | 0, // psub1 |
| 104835 | 0, // qsub0 |
| 104836 | 0, // qsub1 |
| 104837 | 0, // qsub2 |
| 104838 | 0, // qsub3 |
| 104839 | 0, // ssub |
| 104840 | 0, // ssub_hi |
| 104841 | 506, // sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104842 | 506, // sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104843 | 0, // sube32 |
| 104844 | 0, // sube64 |
| 104845 | 0, // subo32 |
| 104846 | 0, // subo64 |
| 104847 | 506, // x8sub_0 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104848 | 506, // x8sub_1 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104849 | 506, // x8sub_2 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104850 | 506, // x8sub_3 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104851 | 506, // x8sub_4 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104852 | 506, // x8sub_5 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104853 | 506, // x8sub_6 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104854 | 506, // x8sub_7 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104855 | 0, // zasubb |
| 104856 | 0, // zasubd0 |
| 104857 | 0, // zasubd1 |
| 104858 | 0, // zasubh0 |
| 104859 | 0, // zasubh1 |
| 104860 | 0, // zasubq0 |
| 104861 | 0, // zasubq1 |
| 104862 | 0, // zasubs0 |
| 104863 | 0, // zasubs1 |
| 104864 | 0, // zsub |
| 104865 | 0, // zsub0 |
| 104866 | 0, // zsub1 |
| 104867 | 0, // zsub2 |
| 104868 | 0, // zsub3 |
| 104869 | 0, // zsub_hi |
| 104870 | 0, // zasubd1_then_zasubq0 |
| 104871 | 0, // zasubd1_then_zasubq1 |
| 104872 | 0, // zasubs1_then_zasubd0 |
| 104873 | 0, // zasubs1_then_zasubd1 |
| 104874 | 0, // zasubs1_then_zasubq0 |
| 104875 | 0, // zasubs1_then_zasubq1 |
| 104876 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 104877 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 104878 | 0, // zasubh1_then_zasubd0 |
| 104879 | 0, // zasubh1_then_zasubd1 |
| 104880 | 0, // zasubh1_then_zasubq0 |
| 104881 | 0, // zasubh1_then_zasubq1 |
| 104882 | 0, // zasubh1_then_zasubs0 |
| 104883 | 0, // zasubh1_then_zasubs1 |
| 104884 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 104885 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 104886 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 104887 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 104888 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 104889 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 104890 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 104891 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 104892 | 0, // dsub1_then_bsub |
| 104893 | 0, // dsub1_then_bsub_hi |
| 104894 | 0, // dsub1_then_hsub |
| 104895 | 0, // dsub1_then_hsub_hi |
| 104896 | 0, // dsub1_then_ssub |
| 104897 | 0, // dsub1_then_ssub_hi |
| 104898 | 0, // dsub3_then_bsub |
| 104899 | 0, // dsub3_then_bsub_hi |
| 104900 | 0, // dsub3_then_hsub |
| 104901 | 0, // dsub3_then_hsub_hi |
| 104902 | 0, // dsub3_then_ssub |
| 104903 | 0, // dsub3_then_ssub_hi |
| 104904 | 0, // dsub2_then_bsub |
| 104905 | 0, // dsub2_then_bsub_hi |
| 104906 | 0, // dsub2_then_hsub |
| 104907 | 0, // dsub2_then_hsub_hi |
| 104908 | 0, // dsub2_then_ssub |
| 104909 | 0, // dsub2_then_ssub_hi |
| 104910 | 0, // psub1_then_psub |
| 104911 | 0, // qsub1_then_dsub_hi |
| 104912 | 0, // qsub3_then_dsub_hi |
| 104913 | 0, // qsub2_then_dsub_hi |
| 104914 | 506, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104915 | 506, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104916 | 506, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104917 | 506, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104918 | 506, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104919 | 506, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104920 | 506, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104921 | 506, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104922 | 506, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104923 | 506, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104924 | 506, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104925 | 506, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104926 | 506, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104927 | 506, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104928 | 0, // subo64_then_sub_32 |
| 104929 | 0, // subo64_then_sub_32_hi |
| 104930 | 0, // zsub1_then_zsub_hi |
| 104931 | 0, // zsub3_then_zsub_hi |
| 104932 | 0, // zsub2_then_zsub_hi |
| 104933 | 0, // dsub0_dsub1 |
| 104934 | 0, // dsub0_dsub1_dsub2 |
| 104935 | 0, // dsub1_dsub2 |
| 104936 | 0, // dsub1_dsub2_dsub3 |
| 104937 | 0, // dsub2_dsub3 |
| 104938 | 0, // dsub_dsub1 |
| 104939 | 0, // dsub_dsub1_dsub2_dsub3 |
| 104940 | 0, // dsub_dsub1_dsub2 |
| 104941 | 0, // qsub0_qsub1 |
| 104942 | 0, // qsub0_qsub1_qsub2 |
| 104943 | 0, // qsub1_qsub2 |
| 104944 | 0, // qsub1_qsub2_qsub3 |
| 104945 | 0, // qsub2_qsub3 |
| 104946 | 506, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104947 | 506, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104948 | 506, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104949 | 506, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104950 | 506, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104951 | 506, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104952 | 506, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104953 | 506, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 104954 | 0, // sub_32_subo64_then_sub_32 |
| 104955 | 0, // zsub_qsub1 |
| 104956 | 0, // zsub_qsub1_qsub2_qsub3 |
| 104957 | 0, // zsub_qsub1_qsub2 |
| 104958 | 0, // zsub0_zsub1 |
| 104959 | 0, // zsub0_zsub1_zsub2 |
| 104960 | 0, // zsub1_zsub2 |
| 104961 | 0, // zsub1_zsub2_zsub3 |
| 104962 | 0, // zsub2_zsub3 |
| 104963 | 0, // zsub0_zsub2 |
| 104964 | 0, // zsub1_zsub3 |
| 104965 | }, |
| 104966 | { // GPR64x8Class_with_sub_32_in_GPR32arg |
| 104967 | 0, // bsub |
| 104968 | 0, // bsub_hi |
| 104969 | 0, // dsub |
| 104970 | 0, // dsub0 |
| 104971 | 0, // dsub1 |
| 104972 | 0, // dsub2 |
| 104973 | 0, // dsub3 |
| 104974 | 0, // dsub_hi |
| 104975 | 0, // hsub |
| 104976 | 0, // hsub_hi |
| 104977 | 0, // psub |
| 104978 | 0, // psub0 |
| 104979 | 0, // psub1 |
| 104980 | 0, // qsub0 |
| 104981 | 0, // qsub1 |
| 104982 | 0, // qsub2 |
| 104983 | 0, // qsub3 |
| 104984 | 0, // ssub |
| 104985 | 0, // ssub_hi |
| 104986 | 507, // sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104987 | 507, // sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104988 | 0, // sube32 |
| 104989 | 0, // sube64 |
| 104990 | 0, // subo32 |
| 104991 | 0, // subo64 |
| 104992 | 507, // x8sub_0 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104993 | 507, // x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104994 | 507, // x8sub_2 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104995 | 507, // x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104996 | 507, // x8sub_4 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104997 | 507, // x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104998 | 507, // x8sub_6 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 104999 | 507, // x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105000 | 0, // zasubb |
| 105001 | 0, // zasubd0 |
| 105002 | 0, // zasubd1 |
| 105003 | 0, // zasubh0 |
| 105004 | 0, // zasubh1 |
| 105005 | 0, // zasubq0 |
| 105006 | 0, // zasubq1 |
| 105007 | 0, // zasubs0 |
| 105008 | 0, // zasubs1 |
| 105009 | 0, // zsub |
| 105010 | 0, // zsub0 |
| 105011 | 0, // zsub1 |
| 105012 | 0, // zsub2 |
| 105013 | 0, // zsub3 |
| 105014 | 0, // zsub_hi |
| 105015 | 0, // zasubd1_then_zasubq0 |
| 105016 | 0, // zasubd1_then_zasubq1 |
| 105017 | 0, // zasubs1_then_zasubd0 |
| 105018 | 0, // zasubs1_then_zasubd1 |
| 105019 | 0, // zasubs1_then_zasubq0 |
| 105020 | 0, // zasubs1_then_zasubq1 |
| 105021 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105022 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105023 | 0, // zasubh1_then_zasubd0 |
| 105024 | 0, // zasubh1_then_zasubd1 |
| 105025 | 0, // zasubh1_then_zasubq0 |
| 105026 | 0, // zasubh1_then_zasubq1 |
| 105027 | 0, // zasubh1_then_zasubs0 |
| 105028 | 0, // zasubh1_then_zasubs1 |
| 105029 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105030 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105031 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105032 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105033 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105034 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105035 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105036 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105037 | 0, // dsub1_then_bsub |
| 105038 | 0, // dsub1_then_bsub_hi |
| 105039 | 0, // dsub1_then_hsub |
| 105040 | 0, // dsub1_then_hsub_hi |
| 105041 | 0, // dsub1_then_ssub |
| 105042 | 0, // dsub1_then_ssub_hi |
| 105043 | 0, // dsub3_then_bsub |
| 105044 | 0, // dsub3_then_bsub_hi |
| 105045 | 0, // dsub3_then_hsub |
| 105046 | 0, // dsub3_then_hsub_hi |
| 105047 | 0, // dsub3_then_ssub |
| 105048 | 0, // dsub3_then_ssub_hi |
| 105049 | 0, // dsub2_then_bsub |
| 105050 | 0, // dsub2_then_bsub_hi |
| 105051 | 0, // dsub2_then_hsub |
| 105052 | 0, // dsub2_then_hsub_hi |
| 105053 | 0, // dsub2_then_ssub |
| 105054 | 0, // dsub2_then_ssub_hi |
| 105055 | 0, // psub1_then_psub |
| 105056 | 0, // qsub1_then_dsub_hi |
| 105057 | 0, // qsub3_then_dsub_hi |
| 105058 | 0, // qsub2_then_dsub_hi |
| 105059 | 507, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105060 | 507, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105061 | 507, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105062 | 507, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105063 | 507, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105064 | 507, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105065 | 507, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105066 | 507, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105067 | 507, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105068 | 507, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105069 | 507, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105070 | 507, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105071 | 507, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105072 | 507, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105073 | 0, // subo64_then_sub_32 |
| 105074 | 0, // subo64_then_sub_32_hi |
| 105075 | 0, // zsub1_then_zsub_hi |
| 105076 | 0, // zsub3_then_zsub_hi |
| 105077 | 0, // zsub2_then_zsub_hi |
| 105078 | 0, // dsub0_dsub1 |
| 105079 | 0, // dsub0_dsub1_dsub2 |
| 105080 | 0, // dsub1_dsub2 |
| 105081 | 0, // dsub1_dsub2_dsub3 |
| 105082 | 0, // dsub2_dsub3 |
| 105083 | 0, // dsub_dsub1 |
| 105084 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105085 | 0, // dsub_dsub1_dsub2 |
| 105086 | 0, // qsub0_qsub1 |
| 105087 | 0, // qsub0_qsub1_qsub2 |
| 105088 | 0, // qsub1_qsub2 |
| 105089 | 0, // qsub1_qsub2_qsub3 |
| 105090 | 0, // qsub2_qsub3 |
| 105091 | 507, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105092 | 507, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105093 | 507, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105094 | 507, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105095 | 507, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105096 | 507, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105097 | 507, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105098 | 507, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg |
| 105099 | 0, // sub_32_subo64_then_sub_32 |
| 105100 | 0, // zsub_qsub1 |
| 105101 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105102 | 0, // zsub_qsub1_qsub2 |
| 105103 | 0, // zsub0_zsub1 |
| 105104 | 0, // zsub0_zsub1_zsub2 |
| 105105 | 0, // zsub1_zsub2 |
| 105106 | 0, // zsub1_zsub2_zsub3 |
| 105107 | 0, // zsub2_zsub3 |
| 105108 | 0, // zsub0_zsub2 |
| 105109 | 0, // zsub1_zsub3 |
| 105110 | }, |
| 105111 | { // MPR32 |
| 105112 | 0, // bsub |
| 105113 | 0, // bsub_hi |
| 105114 | 0, // dsub |
| 105115 | 0, // dsub0 |
| 105116 | 0, // dsub1 |
| 105117 | 0, // dsub2 |
| 105118 | 0, // dsub3 |
| 105119 | 0, // dsub_hi |
| 105120 | 0, // hsub |
| 105121 | 0, // hsub_hi |
| 105122 | 0, // psub |
| 105123 | 0, // psub0 |
| 105124 | 0, // psub1 |
| 105125 | 0, // qsub0 |
| 105126 | 0, // qsub1 |
| 105127 | 0, // qsub2 |
| 105128 | 0, // qsub3 |
| 105129 | 0, // ssub |
| 105130 | 0, // ssub_hi |
| 105131 | 0, // sub_32 |
| 105132 | 0, // sub_32_hi |
| 105133 | 0, // sube32 |
| 105134 | 0, // sube64 |
| 105135 | 0, // subo32 |
| 105136 | 0, // subo64 |
| 105137 | 0, // x8sub_0 |
| 105138 | 0, // x8sub_1 |
| 105139 | 0, // x8sub_2 |
| 105140 | 0, // x8sub_3 |
| 105141 | 0, // x8sub_4 |
| 105142 | 0, // x8sub_5 |
| 105143 | 0, // x8sub_6 |
| 105144 | 0, // x8sub_7 |
| 105145 | 0, // zasubb |
| 105146 | 508, // zasubd0 -> MPR32 |
| 105147 | 508, // zasubd1 -> MPR32 |
| 105148 | 0, // zasubh0 |
| 105149 | 0, // zasubh1 |
| 105150 | 508, // zasubq0 -> MPR32 |
| 105151 | 508, // zasubq1 -> MPR32 |
| 105152 | 0, // zasubs0 |
| 105153 | 0, // zasubs1 |
| 105154 | 0, // zsub |
| 105155 | 0, // zsub0 |
| 105156 | 0, // zsub1 |
| 105157 | 0, // zsub2 |
| 105158 | 0, // zsub3 |
| 105159 | 0, // zsub_hi |
| 105160 | 508, // zasubd1_then_zasubq0 -> MPR32 |
| 105161 | 508, // zasubd1_then_zasubq1 -> MPR32 |
| 105162 | 0, // zasubs1_then_zasubd0 |
| 105163 | 0, // zasubs1_then_zasubd1 |
| 105164 | 0, // zasubs1_then_zasubq0 |
| 105165 | 0, // zasubs1_then_zasubq1 |
| 105166 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105167 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105168 | 0, // zasubh1_then_zasubd0 |
| 105169 | 0, // zasubh1_then_zasubd1 |
| 105170 | 0, // zasubh1_then_zasubq0 |
| 105171 | 0, // zasubh1_then_zasubq1 |
| 105172 | 0, // zasubh1_then_zasubs0 |
| 105173 | 0, // zasubh1_then_zasubs1 |
| 105174 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105175 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105176 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105177 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105178 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105179 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105180 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105181 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105182 | 0, // dsub1_then_bsub |
| 105183 | 0, // dsub1_then_bsub_hi |
| 105184 | 0, // dsub1_then_hsub |
| 105185 | 0, // dsub1_then_hsub_hi |
| 105186 | 0, // dsub1_then_ssub |
| 105187 | 0, // dsub1_then_ssub_hi |
| 105188 | 0, // dsub3_then_bsub |
| 105189 | 0, // dsub3_then_bsub_hi |
| 105190 | 0, // dsub3_then_hsub |
| 105191 | 0, // dsub3_then_hsub_hi |
| 105192 | 0, // dsub3_then_ssub |
| 105193 | 0, // dsub3_then_ssub_hi |
| 105194 | 0, // dsub2_then_bsub |
| 105195 | 0, // dsub2_then_bsub_hi |
| 105196 | 0, // dsub2_then_hsub |
| 105197 | 0, // dsub2_then_hsub_hi |
| 105198 | 0, // dsub2_then_ssub |
| 105199 | 0, // dsub2_then_ssub_hi |
| 105200 | 0, // psub1_then_psub |
| 105201 | 0, // qsub1_then_dsub_hi |
| 105202 | 0, // qsub3_then_dsub_hi |
| 105203 | 0, // qsub2_then_dsub_hi |
| 105204 | 0, // x8sub_7_then_sub_32 |
| 105205 | 0, // x8sub_7_then_sub_32_hi |
| 105206 | 0, // x8sub_6_then_sub_32 |
| 105207 | 0, // x8sub_6_then_sub_32_hi |
| 105208 | 0, // x8sub_5_then_sub_32 |
| 105209 | 0, // x8sub_5_then_sub_32_hi |
| 105210 | 0, // x8sub_4_then_sub_32 |
| 105211 | 0, // x8sub_4_then_sub_32_hi |
| 105212 | 0, // x8sub_3_then_sub_32 |
| 105213 | 0, // x8sub_3_then_sub_32_hi |
| 105214 | 0, // x8sub_2_then_sub_32 |
| 105215 | 0, // x8sub_2_then_sub_32_hi |
| 105216 | 0, // x8sub_1_then_sub_32 |
| 105217 | 0, // x8sub_1_then_sub_32_hi |
| 105218 | 0, // subo64_then_sub_32 |
| 105219 | 0, // subo64_then_sub_32_hi |
| 105220 | 0, // zsub1_then_zsub_hi |
| 105221 | 0, // zsub3_then_zsub_hi |
| 105222 | 0, // zsub2_then_zsub_hi |
| 105223 | 0, // dsub0_dsub1 |
| 105224 | 0, // dsub0_dsub1_dsub2 |
| 105225 | 0, // dsub1_dsub2 |
| 105226 | 0, // dsub1_dsub2_dsub3 |
| 105227 | 0, // dsub2_dsub3 |
| 105228 | 0, // dsub_dsub1 |
| 105229 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105230 | 0, // dsub_dsub1_dsub2 |
| 105231 | 0, // qsub0_qsub1 |
| 105232 | 0, // qsub0_qsub1_qsub2 |
| 105233 | 0, // qsub1_qsub2 |
| 105234 | 0, // qsub1_qsub2_qsub3 |
| 105235 | 0, // qsub2_qsub3 |
| 105236 | 0, // sub_32_x8sub_1_then_sub_32 |
| 105237 | 0, // x8sub_0_x8sub_1 |
| 105238 | 0, // x8sub_2_x8sub_3 |
| 105239 | 0, // x8sub_4_x8sub_5 |
| 105240 | 0, // x8sub_6_x8sub_7 |
| 105241 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 105242 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 105243 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 105244 | 0, // sub_32_subo64_then_sub_32 |
| 105245 | 0, // zsub_qsub1 |
| 105246 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105247 | 0, // zsub_qsub1_qsub2 |
| 105248 | 0, // zsub0_zsub1 |
| 105249 | 0, // zsub0_zsub1_zsub2 |
| 105250 | 0, // zsub1_zsub2 |
| 105251 | 0, // zsub1_zsub2_zsub3 |
| 105252 | 0, // zsub2_zsub3 |
| 105253 | 0, // zsub0_zsub2 |
| 105254 | 0, // zsub1_zsub3 |
| 105255 | }, |
| 105256 | { // GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105257 | 0, // bsub |
| 105258 | 0, // bsub_hi |
| 105259 | 0, // dsub |
| 105260 | 0, // dsub0 |
| 105261 | 0, // dsub1 |
| 105262 | 0, // dsub2 |
| 105263 | 0, // dsub3 |
| 105264 | 0, // dsub_hi |
| 105265 | 0, // hsub |
| 105266 | 0, // hsub_hi |
| 105267 | 0, // psub |
| 105268 | 0, // psub0 |
| 105269 | 0, // psub1 |
| 105270 | 0, // qsub0 |
| 105271 | 0, // qsub1 |
| 105272 | 0, // qsub2 |
| 105273 | 0, // qsub3 |
| 105274 | 0, // ssub |
| 105275 | 0, // ssub_hi |
| 105276 | 509, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105277 | 509, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105278 | 0, // sube32 |
| 105279 | 0, // sube64 |
| 105280 | 0, // subo32 |
| 105281 | 0, // subo64 |
| 105282 | 509, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105283 | 509, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105284 | 509, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105285 | 509, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105286 | 509, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105287 | 509, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105288 | 509, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105289 | 509, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105290 | 0, // zasubb |
| 105291 | 0, // zasubd0 |
| 105292 | 0, // zasubd1 |
| 105293 | 0, // zasubh0 |
| 105294 | 0, // zasubh1 |
| 105295 | 0, // zasubq0 |
| 105296 | 0, // zasubq1 |
| 105297 | 0, // zasubs0 |
| 105298 | 0, // zasubs1 |
| 105299 | 0, // zsub |
| 105300 | 0, // zsub0 |
| 105301 | 0, // zsub1 |
| 105302 | 0, // zsub2 |
| 105303 | 0, // zsub3 |
| 105304 | 0, // zsub_hi |
| 105305 | 0, // zasubd1_then_zasubq0 |
| 105306 | 0, // zasubd1_then_zasubq1 |
| 105307 | 0, // zasubs1_then_zasubd0 |
| 105308 | 0, // zasubs1_then_zasubd1 |
| 105309 | 0, // zasubs1_then_zasubq0 |
| 105310 | 0, // zasubs1_then_zasubq1 |
| 105311 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105312 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105313 | 0, // zasubh1_then_zasubd0 |
| 105314 | 0, // zasubh1_then_zasubd1 |
| 105315 | 0, // zasubh1_then_zasubq0 |
| 105316 | 0, // zasubh1_then_zasubq1 |
| 105317 | 0, // zasubh1_then_zasubs0 |
| 105318 | 0, // zasubh1_then_zasubs1 |
| 105319 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105320 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105321 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105322 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105323 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105324 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105325 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105326 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105327 | 0, // dsub1_then_bsub |
| 105328 | 0, // dsub1_then_bsub_hi |
| 105329 | 0, // dsub1_then_hsub |
| 105330 | 0, // dsub1_then_hsub_hi |
| 105331 | 0, // dsub1_then_ssub |
| 105332 | 0, // dsub1_then_ssub_hi |
| 105333 | 0, // dsub3_then_bsub |
| 105334 | 0, // dsub3_then_bsub_hi |
| 105335 | 0, // dsub3_then_hsub |
| 105336 | 0, // dsub3_then_hsub_hi |
| 105337 | 0, // dsub3_then_ssub |
| 105338 | 0, // dsub3_then_ssub_hi |
| 105339 | 0, // dsub2_then_bsub |
| 105340 | 0, // dsub2_then_bsub_hi |
| 105341 | 0, // dsub2_then_hsub |
| 105342 | 0, // dsub2_then_hsub_hi |
| 105343 | 0, // dsub2_then_ssub |
| 105344 | 0, // dsub2_then_ssub_hi |
| 105345 | 0, // psub1_then_psub |
| 105346 | 0, // qsub1_then_dsub_hi |
| 105347 | 0, // qsub3_then_dsub_hi |
| 105348 | 0, // qsub2_then_dsub_hi |
| 105349 | 509, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105350 | 509, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105351 | 509, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105352 | 509, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105353 | 509, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105354 | 509, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105355 | 509, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105356 | 509, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105357 | 509, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105358 | 509, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105359 | 509, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105360 | 509, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105361 | 509, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105362 | 509, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105363 | 0, // subo64_then_sub_32 |
| 105364 | 0, // subo64_then_sub_32_hi |
| 105365 | 0, // zsub1_then_zsub_hi |
| 105366 | 0, // zsub3_then_zsub_hi |
| 105367 | 0, // zsub2_then_zsub_hi |
| 105368 | 0, // dsub0_dsub1 |
| 105369 | 0, // dsub0_dsub1_dsub2 |
| 105370 | 0, // dsub1_dsub2 |
| 105371 | 0, // dsub1_dsub2_dsub3 |
| 105372 | 0, // dsub2_dsub3 |
| 105373 | 0, // dsub_dsub1 |
| 105374 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105375 | 0, // dsub_dsub1_dsub2 |
| 105376 | 0, // qsub0_qsub1 |
| 105377 | 0, // qsub0_qsub1_qsub2 |
| 105378 | 0, // qsub1_qsub2 |
| 105379 | 0, // qsub1_qsub2_qsub3 |
| 105380 | 0, // qsub2_qsub3 |
| 105381 | 509, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105382 | 509, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105383 | 509, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105384 | 509, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105385 | 509, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105386 | 509, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105387 | 509, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105388 | 509, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 105389 | 0, // sub_32_subo64_then_sub_32 |
| 105390 | 0, // zsub_qsub1 |
| 105391 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105392 | 0, // zsub_qsub1_qsub2 |
| 105393 | 0, // zsub0_zsub1 |
| 105394 | 0, // zsub0_zsub1_zsub2 |
| 105395 | 0, // zsub1_zsub2 |
| 105396 | 0, // zsub1_zsub2_zsub3 |
| 105397 | 0, // zsub2_zsub3 |
| 105398 | 0, // zsub0_zsub2 |
| 105399 | 0, // zsub1_zsub3 |
| 105400 | }, |
| 105401 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105402 | 0, // bsub |
| 105403 | 0, // bsub_hi |
| 105404 | 0, // dsub |
| 105405 | 0, // dsub0 |
| 105406 | 0, // dsub1 |
| 105407 | 0, // dsub2 |
| 105408 | 0, // dsub3 |
| 105409 | 0, // dsub_hi |
| 105410 | 0, // hsub |
| 105411 | 0, // hsub_hi |
| 105412 | 0, // psub |
| 105413 | 0, // psub0 |
| 105414 | 0, // psub1 |
| 105415 | 0, // qsub0 |
| 105416 | 0, // qsub1 |
| 105417 | 0, // qsub2 |
| 105418 | 0, // qsub3 |
| 105419 | 0, // ssub |
| 105420 | 0, // ssub_hi |
| 105421 | 510, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105422 | 510, // sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105423 | 0, // sube32 |
| 105424 | 0, // sube64 |
| 105425 | 0, // subo32 |
| 105426 | 0, // subo64 |
| 105427 | 510, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105428 | 510, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105429 | 510, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105430 | 510, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105431 | 510, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105432 | 510, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105433 | 510, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105434 | 510, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105435 | 0, // zasubb |
| 105436 | 0, // zasubd0 |
| 105437 | 0, // zasubd1 |
| 105438 | 0, // zasubh0 |
| 105439 | 0, // zasubh1 |
| 105440 | 0, // zasubq0 |
| 105441 | 0, // zasubq1 |
| 105442 | 0, // zasubs0 |
| 105443 | 0, // zasubs1 |
| 105444 | 0, // zsub |
| 105445 | 0, // zsub0 |
| 105446 | 0, // zsub1 |
| 105447 | 0, // zsub2 |
| 105448 | 0, // zsub3 |
| 105449 | 0, // zsub_hi |
| 105450 | 0, // zasubd1_then_zasubq0 |
| 105451 | 0, // zasubd1_then_zasubq1 |
| 105452 | 0, // zasubs1_then_zasubd0 |
| 105453 | 0, // zasubs1_then_zasubd1 |
| 105454 | 0, // zasubs1_then_zasubq0 |
| 105455 | 0, // zasubs1_then_zasubq1 |
| 105456 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105457 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105458 | 0, // zasubh1_then_zasubd0 |
| 105459 | 0, // zasubh1_then_zasubd1 |
| 105460 | 0, // zasubh1_then_zasubq0 |
| 105461 | 0, // zasubh1_then_zasubq1 |
| 105462 | 0, // zasubh1_then_zasubs0 |
| 105463 | 0, // zasubh1_then_zasubs1 |
| 105464 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105465 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105466 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105467 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105468 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105469 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105470 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105471 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105472 | 0, // dsub1_then_bsub |
| 105473 | 0, // dsub1_then_bsub_hi |
| 105474 | 0, // dsub1_then_hsub |
| 105475 | 0, // dsub1_then_hsub_hi |
| 105476 | 0, // dsub1_then_ssub |
| 105477 | 0, // dsub1_then_ssub_hi |
| 105478 | 0, // dsub3_then_bsub |
| 105479 | 0, // dsub3_then_bsub_hi |
| 105480 | 0, // dsub3_then_hsub |
| 105481 | 0, // dsub3_then_hsub_hi |
| 105482 | 0, // dsub3_then_ssub |
| 105483 | 0, // dsub3_then_ssub_hi |
| 105484 | 0, // dsub2_then_bsub |
| 105485 | 0, // dsub2_then_bsub_hi |
| 105486 | 0, // dsub2_then_hsub |
| 105487 | 0, // dsub2_then_hsub_hi |
| 105488 | 0, // dsub2_then_ssub |
| 105489 | 0, // dsub2_then_ssub_hi |
| 105490 | 0, // psub1_then_psub |
| 105491 | 0, // qsub1_then_dsub_hi |
| 105492 | 0, // qsub3_then_dsub_hi |
| 105493 | 0, // qsub2_then_dsub_hi |
| 105494 | 510, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105495 | 510, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105496 | 510, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105497 | 510, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105498 | 510, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105499 | 510, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105500 | 510, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105501 | 510, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105502 | 510, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105503 | 510, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105504 | 510, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105505 | 510, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105506 | 510, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105507 | 510, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105508 | 0, // subo64_then_sub_32 |
| 105509 | 0, // subo64_then_sub_32_hi |
| 105510 | 0, // zsub1_then_zsub_hi |
| 105511 | 0, // zsub3_then_zsub_hi |
| 105512 | 0, // zsub2_then_zsub_hi |
| 105513 | 0, // dsub0_dsub1 |
| 105514 | 0, // dsub0_dsub1_dsub2 |
| 105515 | 0, // dsub1_dsub2 |
| 105516 | 0, // dsub1_dsub2_dsub3 |
| 105517 | 0, // dsub2_dsub3 |
| 105518 | 0, // dsub_dsub1 |
| 105519 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105520 | 0, // dsub_dsub1_dsub2 |
| 105521 | 0, // qsub0_qsub1 |
| 105522 | 0, // qsub0_qsub1_qsub2 |
| 105523 | 0, // qsub1_qsub2 |
| 105524 | 0, // qsub1_qsub2_qsub3 |
| 105525 | 0, // qsub2_qsub3 |
| 105526 | 510, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105527 | 510, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105528 | 510, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105529 | 510, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105530 | 510, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105531 | 510, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105532 | 510, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105533 | 510, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105534 | 0, // sub_32_subo64_then_sub_32 |
| 105535 | 0, // zsub_qsub1 |
| 105536 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105537 | 0, // zsub_qsub1_qsub2 |
| 105538 | 0, // zsub0_zsub1 |
| 105539 | 0, // zsub0_zsub1_zsub2 |
| 105540 | 0, // zsub1_zsub2 |
| 105541 | 0, // zsub1_zsub2_zsub3 |
| 105542 | 0, // zsub2_zsub3 |
| 105543 | 0, // zsub0_zsub2 |
| 105544 | 0, // zsub1_zsub3 |
| 105545 | }, |
| 105546 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105547 | 0, // bsub |
| 105548 | 0, // bsub_hi |
| 105549 | 0, // dsub |
| 105550 | 0, // dsub0 |
| 105551 | 0, // dsub1 |
| 105552 | 0, // dsub2 |
| 105553 | 0, // dsub3 |
| 105554 | 0, // dsub_hi |
| 105555 | 0, // hsub |
| 105556 | 0, // hsub_hi |
| 105557 | 0, // psub |
| 105558 | 0, // psub0 |
| 105559 | 0, // psub1 |
| 105560 | 0, // qsub0 |
| 105561 | 0, // qsub1 |
| 105562 | 0, // qsub2 |
| 105563 | 0, // qsub3 |
| 105564 | 0, // ssub |
| 105565 | 0, // ssub_hi |
| 105566 | 511, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105567 | 511, // sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105568 | 0, // sube32 |
| 105569 | 0, // sube64 |
| 105570 | 0, // subo32 |
| 105571 | 0, // subo64 |
| 105572 | 511, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105573 | 511, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105574 | 511, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105575 | 511, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105576 | 511, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105577 | 511, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105578 | 511, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105579 | 511, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105580 | 0, // zasubb |
| 105581 | 0, // zasubd0 |
| 105582 | 0, // zasubd1 |
| 105583 | 0, // zasubh0 |
| 105584 | 0, // zasubh1 |
| 105585 | 0, // zasubq0 |
| 105586 | 0, // zasubq1 |
| 105587 | 0, // zasubs0 |
| 105588 | 0, // zasubs1 |
| 105589 | 0, // zsub |
| 105590 | 0, // zsub0 |
| 105591 | 0, // zsub1 |
| 105592 | 0, // zsub2 |
| 105593 | 0, // zsub3 |
| 105594 | 0, // zsub_hi |
| 105595 | 0, // zasubd1_then_zasubq0 |
| 105596 | 0, // zasubd1_then_zasubq1 |
| 105597 | 0, // zasubs1_then_zasubd0 |
| 105598 | 0, // zasubs1_then_zasubd1 |
| 105599 | 0, // zasubs1_then_zasubq0 |
| 105600 | 0, // zasubs1_then_zasubq1 |
| 105601 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105602 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105603 | 0, // zasubh1_then_zasubd0 |
| 105604 | 0, // zasubh1_then_zasubd1 |
| 105605 | 0, // zasubh1_then_zasubq0 |
| 105606 | 0, // zasubh1_then_zasubq1 |
| 105607 | 0, // zasubh1_then_zasubs0 |
| 105608 | 0, // zasubh1_then_zasubs1 |
| 105609 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105610 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105611 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105612 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105613 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105614 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105615 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105616 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105617 | 0, // dsub1_then_bsub |
| 105618 | 0, // dsub1_then_bsub_hi |
| 105619 | 0, // dsub1_then_hsub |
| 105620 | 0, // dsub1_then_hsub_hi |
| 105621 | 0, // dsub1_then_ssub |
| 105622 | 0, // dsub1_then_ssub_hi |
| 105623 | 0, // dsub3_then_bsub |
| 105624 | 0, // dsub3_then_bsub_hi |
| 105625 | 0, // dsub3_then_hsub |
| 105626 | 0, // dsub3_then_hsub_hi |
| 105627 | 0, // dsub3_then_ssub |
| 105628 | 0, // dsub3_then_ssub_hi |
| 105629 | 0, // dsub2_then_bsub |
| 105630 | 0, // dsub2_then_bsub_hi |
| 105631 | 0, // dsub2_then_hsub |
| 105632 | 0, // dsub2_then_hsub_hi |
| 105633 | 0, // dsub2_then_ssub |
| 105634 | 0, // dsub2_then_ssub_hi |
| 105635 | 0, // psub1_then_psub |
| 105636 | 0, // qsub1_then_dsub_hi |
| 105637 | 0, // qsub3_then_dsub_hi |
| 105638 | 0, // qsub2_then_dsub_hi |
| 105639 | 511, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105640 | 511, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105641 | 511, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105642 | 511, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105643 | 511, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105644 | 511, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105645 | 511, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105646 | 511, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105647 | 511, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105648 | 511, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105649 | 511, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105650 | 511, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105651 | 511, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105652 | 511, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105653 | 0, // subo64_then_sub_32 |
| 105654 | 0, // subo64_then_sub_32_hi |
| 105655 | 0, // zsub1_then_zsub_hi |
| 105656 | 0, // zsub3_then_zsub_hi |
| 105657 | 0, // zsub2_then_zsub_hi |
| 105658 | 0, // dsub0_dsub1 |
| 105659 | 0, // dsub0_dsub1_dsub2 |
| 105660 | 0, // dsub1_dsub2 |
| 105661 | 0, // dsub1_dsub2_dsub3 |
| 105662 | 0, // dsub2_dsub3 |
| 105663 | 0, // dsub_dsub1 |
| 105664 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105665 | 0, // dsub_dsub1_dsub2 |
| 105666 | 0, // qsub0_qsub1 |
| 105667 | 0, // qsub0_qsub1_qsub2 |
| 105668 | 0, // qsub1_qsub2 |
| 105669 | 0, // qsub1_qsub2_qsub3 |
| 105670 | 0, // qsub2_qsub3 |
| 105671 | 511, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105672 | 511, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105673 | 511, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105674 | 511, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105675 | 511, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105676 | 511, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105677 | 511, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105678 | 511, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105679 | 0, // sub_32_subo64_then_sub_32 |
| 105680 | 0, // zsub_qsub1 |
| 105681 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105682 | 0, // zsub_qsub1_qsub2 |
| 105683 | 0, // zsub0_zsub1 |
| 105684 | 0, // zsub0_zsub1_zsub2 |
| 105685 | 0, // zsub1_zsub2 |
| 105686 | 0, // zsub1_zsub2_zsub3 |
| 105687 | 0, // zsub2_zsub3 |
| 105688 | 0, // zsub0_zsub2 |
| 105689 | 0, // zsub1_zsub3 |
| 105690 | }, |
| 105691 | { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105692 | 0, // bsub |
| 105693 | 0, // bsub_hi |
| 105694 | 0, // dsub |
| 105695 | 0, // dsub0 |
| 105696 | 0, // dsub1 |
| 105697 | 0, // dsub2 |
| 105698 | 0, // dsub3 |
| 105699 | 0, // dsub_hi |
| 105700 | 0, // hsub |
| 105701 | 0, // hsub_hi |
| 105702 | 0, // psub |
| 105703 | 0, // psub0 |
| 105704 | 0, // psub1 |
| 105705 | 0, // qsub0 |
| 105706 | 0, // qsub1 |
| 105707 | 0, // qsub2 |
| 105708 | 0, // qsub3 |
| 105709 | 0, // ssub |
| 105710 | 0, // ssub_hi |
| 105711 | 512, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105712 | 512, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105713 | 0, // sube32 |
| 105714 | 0, // sube64 |
| 105715 | 0, // subo32 |
| 105716 | 0, // subo64 |
| 105717 | 512, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105718 | 512, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105719 | 512, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105720 | 512, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105721 | 512, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105722 | 512, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105723 | 512, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105724 | 512, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105725 | 0, // zasubb |
| 105726 | 0, // zasubd0 |
| 105727 | 0, // zasubd1 |
| 105728 | 0, // zasubh0 |
| 105729 | 0, // zasubh1 |
| 105730 | 0, // zasubq0 |
| 105731 | 0, // zasubq1 |
| 105732 | 0, // zasubs0 |
| 105733 | 0, // zasubs1 |
| 105734 | 0, // zsub |
| 105735 | 0, // zsub0 |
| 105736 | 0, // zsub1 |
| 105737 | 0, // zsub2 |
| 105738 | 0, // zsub3 |
| 105739 | 0, // zsub_hi |
| 105740 | 0, // zasubd1_then_zasubq0 |
| 105741 | 0, // zasubd1_then_zasubq1 |
| 105742 | 0, // zasubs1_then_zasubd0 |
| 105743 | 0, // zasubs1_then_zasubd1 |
| 105744 | 0, // zasubs1_then_zasubq0 |
| 105745 | 0, // zasubs1_then_zasubq1 |
| 105746 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105747 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105748 | 0, // zasubh1_then_zasubd0 |
| 105749 | 0, // zasubh1_then_zasubd1 |
| 105750 | 0, // zasubh1_then_zasubq0 |
| 105751 | 0, // zasubh1_then_zasubq1 |
| 105752 | 0, // zasubh1_then_zasubs0 |
| 105753 | 0, // zasubh1_then_zasubs1 |
| 105754 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105755 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105756 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105757 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105758 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105759 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105760 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105761 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105762 | 0, // dsub1_then_bsub |
| 105763 | 0, // dsub1_then_bsub_hi |
| 105764 | 0, // dsub1_then_hsub |
| 105765 | 0, // dsub1_then_hsub_hi |
| 105766 | 0, // dsub1_then_ssub |
| 105767 | 0, // dsub1_then_ssub_hi |
| 105768 | 0, // dsub3_then_bsub |
| 105769 | 0, // dsub3_then_bsub_hi |
| 105770 | 0, // dsub3_then_hsub |
| 105771 | 0, // dsub3_then_hsub_hi |
| 105772 | 0, // dsub3_then_ssub |
| 105773 | 0, // dsub3_then_ssub_hi |
| 105774 | 0, // dsub2_then_bsub |
| 105775 | 0, // dsub2_then_bsub_hi |
| 105776 | 0, // dsub2_then_hsub |
| 105777 | 0, // dsub2_then_hsub_hi |
| 105778 | 0, // dsub2_then_ssub |
| 105779 | 0, // dsub2_then_ssub_hi |
| 105780 | 0, // psub1_then_psub |
| 105781 | 0, // qsub1_then_dsub_hi |
| 105782 | 0, // qsub3_then_dsub_hi |
| 105783 | 0, // qsub2_then_dsub_hi |
| 105784 | 512, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105785 | 512, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105786 | 512, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105787 | 512, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105788 | 512, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105789 | 512, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105790 | 512, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105791 | 512, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105792 | 512, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105793 | 512, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105794 | 512, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105795 | 512, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105796 | 512, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105797 | 512, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105798 | 0, // subo64_then_sub_32 |
| 105799 | 0, // subo64_then_sub_32_hi |
| 105800 | 0, // zsub1_then_zsub_hi |
| 105801 | 0, // zsub3_then_zsub_hi |
| 105802 | 0, // zsub2_then_zsub_hi |
| 105803 | 0, // dsub0_dsub1 |
| 105804 | 0, // dsub0_dsub1_dsub2 |
| 105805 | 0, // dsub1_dsub2 |
| 105806 | 0, // dsub1_dsub2_dsub3 |
| 105807 | 0, // dsub2_dsub3 |
| 105808 | 0, // dsub_dsub1 |
| 105809 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105810 | 0, // dsub_dsub1_dsub2 |
| 105811 | 0, // qsub0_qsub1 |
| 105812 | 0, // qsub0_qsub1_qsub2 |
| 105813 | 0, // qsub1_qsub2 |
| 105814 | 0, // qsub1_qsub2_qsub3 |
| 105815 | 0, // qsub2_qsub3 |
| 105816 | 512, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105817 | 512, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105818 | 512, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105819 | 512, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105820 | 512, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105821 | 512, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105822 | 512, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105823 | 512, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 105824 | 0, // sub_32_subo64_then_sub_32 |
| 105825 | 0, // zsub_qsub1 |
| 105826 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105827 | 0, // zsub_qsub1_qsub2 |
| 105828 | 0, // zsub0_zsub1 |
| 105829 | 0, // zsub0_zsub1_zsub2 |
| 105830 | 0, // zsub1_zsub2 |
| 105831 | 0, // zsub1_zsub2_zsub3 |
| 105832 | 0, // zsub2_zsub3 |
| 105833 | 0, // zsub0_zsub2 |
| 105834 | 0, // zsub1_zsub3 |
| 105835 | }, |
| 105836 | { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105837 | 0, // bsub |
| 105838 | 0, // bsub_hi |
| 105839 | 0, // dsub |
| 105840 | 0, // dsub0 |
| 105841 | 0, // dsub1 |
| 105842 | 0, // dsub2 |
| 105843 | 0, // dsub3 |
| 105844 | 0, // dsub_hi |
| 105845 | 0, // hsub |
| 105846 | 0, // hsub_hi |
| 105847 | 0, // psub |
| 105848 | 0, // psub0 |
| 105849 | 0, // psub1 |
| 105850 | 0, // qsub0 |
| 105851 | 0, // qsub1 |
| 105852 | 0, // qsub2 |
| 105853 | 0, // qsub3 |
| 105854 | 0, // ssub |
| 105855 | 0, // ssub_hi |
| 105856 | 513, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105857 | 513, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105858 | 0, // sube32 |
| 105859 | 0, // sube64 |
| 105860 | 0, // subo32 |
| 105861 | 0, // subo64 |
| 105862 | 513, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105863 | 513, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105864 | 513, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105865 | 513, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105866 | 513, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105867 | 513, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105868 | 513, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105869 | 513, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105870 | 0, // zasubb |
| 105871 | 0, // zasubd0 |
| 105872 | 0, // zasubd1 |
| 105873 | 0, // zasubh0 |
| 105874 | 0, // zasubh1 |
| 105875 | 0, // zasubq0 |
| 105876 | 0, // zasubq1 |
| 105877 | 0, // zasubs0 |
| 105878 | 0, // zasubs1 |
| 105879 | 0, // zsub |
| 105880 | 0, // zsub0 |
| 105881 | 0, // zsub1 |
| 105882 | 0, // zsub2 |
| 105883 | 0, // zsub3 |
| 105884 | 0, // zsub_hi |
| 105885 | 0, // zasubd1_then_zasubq0 |
| 105886 | 0, // zasubd1_then_zasubq1 |
| 105887 | 0, // zasubs1_then_zasubd0 |
| 105888 | 0, // zasubs1_then_zasubd1 |
| 105889 | 0, // zasubs1_then_zasubq0 |
| 105890 | 0, // zasubs1_then_zasubq1 |
| 105891 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 105892 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 105893 | 0, // zasubh1_then_zasubd0 |
| 105894 | 0, // zasubh1_then_zasubd1 |
| 105895 | 0, // zasubh1_then_zasubq0 |
| 105896 | 0, // zasubh1_then_zasubq1 |
| 105897 | 0, // zasubh1_then_zasubs0 |
| 105898 | 0, // zasubh1_then_zasubs1 |
| 105899 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 105900 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 105901 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 105902 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 105903 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 105904 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 105905 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 105906 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 105907 | 0, // dsub1_then_bsub |
| 105908 | 0, // dsub1_then_bsub_hi |
| 105909 | 0, // dsub1_then_hsub |
| 105910 | 0, // dsub1_then_hsub_hi |
| 105911 | 0, // dsub1_then_ssub |
| 105912 | 0, // dsub1_then_ssub_hi |
| 105913 | 0, // dsub3_then_bsub |
| 105914 | 0, // dsub3_then_bsub_hi |
| 105915 | 0, // dsub3_then_hsub |
| 105916 | 0, // dsub3_then_hsub_hi |
| 105917 | 0, // dsub3_then_ssub |
| 105918 | 0, // dsub3_then_ssub_hi |
| 105919 | 0, // dsub2_then_bsub |
| 105920 | 0, // dsub2_then_bsub_hi |
| 105921 | 0, // dsub2_then_hsub |
| 105922 | 0, // dsub2_then_hsub_hi |
| 105923 | 0, // dsub2_then_ssub |
| 105924 | 0, // dsub2_then_ssub_hi |
| 105925 | 0, // psub1_then_psub |
| 105926 | 0, // qsub1_then_dsub_hi |
| 105927 | 0, // qsub3_then_dsub_hi |
| 105928 | 0, // qsub2_then_dsub_hi |
| 105929 | 513, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105930 | 513, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105931 | 513, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105932 | 513, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105933 | 513, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105934 | 513, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105935 | 513, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105936 | 513, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105937 | 513, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105938 | 513, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105939 | 513, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105940 | 513, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105941 | 513, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105942 | 513, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105943 | 0, // subo64_then_sub_32 |
| 105944 | 0, // subo64_then_sub_32_hi |
| 105945 | 0, // zsub1_then_zsub_hi |
| 105946 | 0, // zsub3_then_zsub_hi |
| 105947 | 0, // zsub2_then_zsub_hi |
| 105948 | 0, // dsub0_dsub1 |
| 105949 | 0, // dsub0_dsub1_dsub2 |
| 105950 | 0, // dsub1_dsub2 |
| 105951 | 0, // dsub1_dsub2_dsub3 |
| 105952 | 0, // dsub2_dsub3 |
| 105953 | 0, // dsub_dsub1 |
| 105954 | 0, // dsub_dsub1_dsub2_dsub3 |
| 105955 | 0, // dsub_dsub1_dsub2 |
| 105956 | 0, // qsub0_qsub1 |
| 105957 | 0, // qsub0_qsub1_qsub2 |
| 105958 | 0, // qsub1_qsub2 |
| 105959 | 0, // qsub1_qsub2_qsub3 |
| 105960 | 0, // qsub2_qsub3 |
| 105961 | 513, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105962 | 513, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105963 | 513, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105964 | 513, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105965 | 513, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105966 | 513, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105967 | 513, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105968 | 513, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105969 | 0, // sub_32_subo64_then_sub_32 |
| 105970 | 0, // zsub_qsub1 |
| 105971 | 0, // zsub_qsub1_qsub2_qsub3 |
| 105972 | 0, // zsub_qsub1_qsub2 |
| 105973 | 0, // zsub0_zsub1 |
| 105974 | 0, // zsub0_zsub1_zsub2 |
| 105975 | 0, // zsub1_zsub2 |
| 105976 | 0, // zsub1_zsub2_zsub3 |
| 105977 | 0, // zsub2_zsub3 |
| 105978 | 0, // zsub0_zsub2 |
| 105979 | 0, // zsub1_zsub3 |
| 105980 | }, |
| 105981 | { // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 105982 | 0, // bsub |
| 105983 | 0, // bsub_hi |
| 105984 | 0, // dsub |
| 105985 | 0, // dsub0 |
| 105986 | 0, // dsub1 |
| 105987 | 0, // dsub2 |
| 105988 | 0, // dsub3 |
| 105989 | 0, // dsub_hi |
| 105990 | 0, // hsub |
| 105991 | 0, // hsub_hi |
| 105992 | 0, // psub |
| 105993 | 0, // psub0 |
| 105994 | 0, // psub1 |
| 105995 | 0, // qsub0 |
| 105996 | 0, // qsub1 |
| 105997 | 0, // qsub2 |
| 105998 | 0, // qsub3 |
| 105999 | 0, // ssub |
| 106000 | 0, // ssub_hi |
| 106001 | 514, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106002 | 514, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106003 | 0, // sube32 |
| 106004 | 0, // sube64 |
| 106005 | 0, // subo32 |
| 106006 | 0, // subo64 |
| 106007 | 514, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106008 | 514, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106009 | 514, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106010 | 514, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106011 | 514, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106012 | 514, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106013 | 514, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106014 | 514, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106015 | 0, // zasubb |
| 106016 | 0, // zasubd0 |
| 106017 | 0, // zasubd1 |
| 106018 | 0, // zasubh0 |
| 106019 | 0, // zasubh1 |
| 106020 | 0, // zasubq0 |
| 106021 | 0, // zasubq1 |
| 106022 | 0, // zasubs0 |
| 106023 | 0, // zasubs1 |
| 106024 | 0, // zsub |
| 106025 | 0, // zsub0 |
| 106026 | 0, // zsub1 |
| 106027 | 0, // zsub2 |
| 106028 | 0, // zsub3 |
| 106029 | 0, // zsub_hi |
| 106030 | 0, // zasubd1_then_zasubq0 |
| 106031 | 0, // zasubd1_then_zasubq1 |
| 106032 | 0, // zasubs1_then_zasubd0 |
| 106033 | 0, // zasubs1_then_zasubd1 |
| 106034 | 0, // zasubs1_then_zasubq0 |
| 106035 | 0, // zasubs1_then_zasubq1 |
| 106036 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106037 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106038 | 0, // zasubh1_then_zasubd0 |
| 106039 | 0, // zasubh1_then_zasubd1 |
| 106040 | 0, // zasubh1_then_zasubq0 |
| 106041 | 0, // zasubh1_then_zasubq1 |
| 106042 | 0, // zasubh1_then_zasubs0 |
| 106043 | 0, // zasubh1_then_zasubs1 |
| 106044 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106045 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106046 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106047 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106048 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106049 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106050 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106051 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106052 | 0, // dsub1_then_bsub |
| 106053 | 0, // dsub1_then_bsub_hi |
| 106054 | 0, // dsub1_then_hsub |
| 106055 | 0, // dsub1_then_hsub_hi |
| 106056 | 0, // dsub1_then_ssub |
| 106057 | 0, // dsub1_then_ssub_hi |
| 106058 | 0, // dsub3_then_bsub |
| 106059 | 0, // dsub3_then_bsub_hi |
| 106060 | 0, // dsub3_then_hsub |
| 106061 | 0, // dsub3_then_hsub_hi |
| 106062 | 0, // dsub3_then_ssub |
| 106063 | 0, // dsub3_then_ssub_hi |
| 106064 | 0, // dsub2_then_bsub |
| 106065 | 0, // dsub2_then_bsub_hi |
| 106066 | 0, // dsub2_then_hsub |
| 106067 | 0, // dsub2_then_hsub_hi |
| 106068 | 0, // dsub2_then_ssub |
| 106069 | 0, // dsub2_then_ssub_hi |
| 106070 | 0, // psub1_then_psub |
| 106071 | 0, // qsub1_then_dsub_hi |
| 106072 | 0, // qsub3_then_dsub_hi |
| 106073 | 0, // qsub2_then_dsub_hi |
| 106074 | 514, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106075 | 514, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106076 | 514, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106077 | 514, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106078 | 514, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106079 | 514, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106080 | 514, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106081 | 514, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106082 | 514, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106083 | 514, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106084 | 514, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106085 | 514, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106086 | 514, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106087 | 514, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106088 | 0, // subo64_then_sub_32 |
| 106089 | 0, // subo64_then_sub_32_hi |
| 106090 | 0, // zsub1_then_zsub_hi |
| 106091 | 0, // zsub3_then_zsub_hi |
| 106092 | 0, // zsub2_then_zsub_hi |
| 106093 | 0, // dsub0_dsub1 |
| 106094 | 0, // dsub0_dsub1_dsub2 |
| 106095 | 0, // dsub1_dsub2 |
| 106096 | 0, // dsub1_dsub2_dsub3 |
| 106097 | 0, // dsub2_dsub3 |
| 106098 | 0, // dsub_dsub1 |
| 106099 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106100 | 0, // dsub_dsub1_dsub2 |
| 106101 | 0, // qsub0_qsub1 |
| 106102 | 0, // qsub0_qsub1_qsub2 |
| 106103 | 0, // qsub1_qsub2 |
| 106104 | 0, // qsub1_qsub2_qsub3 |
| 106105 | 0, // qsub2_qsub3 |
| 106106 | 514, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106107 | 514, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106108 | 514, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106109 | 514, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106110 | 514, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106111 | 514, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106112 | 514, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106113 | 514, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106114 | 0, // sub_32_subo64_then_sub_32 |
| 106115 | 0, // zsub_qsub1 |
| 106116 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106117 | 0, // zsub_qsub1_qsub2 |
| 106118 | 0, // zsub0_zsub1 |
| 106119 | 0, // zsub0_zsub1_zsub2 |
| 106120 | 0, // zsub1_zsub2 |
| 106121 | 0, // zsub1_zsub2_zsub3 |
| 106122 | 0, // zsub2_zsub3 |
| 106123 | 0, // zsub0_zsub2 |
| 106124 | 0, // zsub1_zsub3 |
| 106125 | }, |
| 106126 | { // GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106127 | 0, // bsub |
| 106128 | 0, // bsub_hi |
| 106129 | 0, // dsub |
| 106130 | 0, // dsub0 |
| 106131 | 0, // dsub1 |
| 106132 | 0, // dsub2 |
| 106133 | 0, // dsub3 |
| 106134 | 0, // dsub_hi |
| 106135 | 0, // hsub |
| 106136 | 0, // hsub_hi |
| 106137 | 0, // psub |
| 106138 | 0, // psub0 |
| 106139 | 0, // psub1 |
| 106140 | 0, // qsub0 |
| 106141 | 0, // qsub1 |
| 106142 | 0, // qsub2 |
| 106143 | 0, // qsub3 |
| 106144 | 0, // ssub |
| 106145 | 0, // ssub_hi |
| 106146 | 515, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106147 | 515, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106148 | 0, // sube32 |
| 106149 | 0, // sube64 |
| 106150 | 0, // subo32 |
| 106151 | 0, // subo64 |
| 106152 | 515, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106153 | 515, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106154 | 515, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106155 | 515, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106156 | 515, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106157 | 515, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106158 | 515, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106159 | 515, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106160 | 0, // zasubb |
| 106161 | 0, // zasubd0 |
| 106162 | 0, // zasubd1 |
| 106163 | 0, // zasubh0 |
| 106164 | 0, // zasubh1 |
| 106165 | 0, // zasubq0 |
| 106166 | 0, // zasubq1 |
| 106167 | 0, // zasubs0 |
| 106168 | 0, // zasubs1 |
| 106169 | 0, // zsub |
| 106170 | 0, // zsub0 |
| 106171 | 0, // zsub1 |
| 106172 | 0, // zsub2 |
| 106173 | 0, // zsub3 |
| 106174 | 0, // zsub_hi |
| 106175 | 0, // zasubd1_then_zasubq0 |
| 106176 | 0, // zasubd1_then_zasubq1 |
| 106177 | 0, // zasubs1_then_zasubd0 |
| 106178 | 0, // zasubs1_then_zasubd1 |
| 106179 | 0, // zasubs1_then_zasubq0 |
| 106180 | 0, // zasubs1_then_zasubq1 |
| 106181 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106182 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106183 | 0, // zasubh1_then_zasubd0 |
| 106184 | 0, // zasubh1_then_zasubd1 |
| 106185 | 0, // zasubh1_then_zasubq0 |
| 106186 | 0, // zasubh1_then_zasubq1 |
| 106187 | 0, // zasubh1_then_zasubs0 |
| 106188 | 0, // zasubh1_then_zasubs1 |
| 106189 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106190 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106191 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106192 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106193 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106194 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106195 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106196 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106197 | 0, // dsub1_then_bsub |
| 106198 | 0, // dsub1_then_bsub_hi |
| 106199 | 0, // dsub1_then_hsub |
| 106200 | 0, // dsub1_then_hsub_hi |
| 106201 | 0, // dsub1_then_ssub |
| 106202 | 0, // dsub1_then_ssub_hi |
| 106203 | 0, // dsub3_then_bsub |
| 106204 | 0, // dsub3_then_bsub_hi |
| 106205 | 0, // dsub3_then_hsub |
| 106206 | 0, // dsub3_then_hsub_hi |
| 106207 | 0, // dsub3_then_ssub |
| 106208 | 0, // dsub3_then_ssub_hi |
| 106209 | 0, // dsub2_then_bsub |
| 106210 | 0, // dsub2_then_bsub_hi |
| 106211 | 0, // dsub2_then_hsub |
| 106212 | 0, // dsub2_then_hsub_hi |
| 106213 | 0, // dsub2_then_ssub |
| 106214 | 0, // dsub2_then_ssub_hi |
| 106215 | 0, // psub1_then_psub |
| 106216 | 0, // qsub1_then_dsub_hi |
| 106217 | 0, // qsub3_then_dsub_hi |
| 106218 | 0, // qsub2_then_dsub_hi |
| 106219 | 515, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106220 | 515, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106221 | 515, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106222 | 515, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106223 | 515, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106224 | 515, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106225 | 515, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106226 | 515, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106227 | 515, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106228 | 515, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106229 | 515, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106230 | 515, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106231 | 515, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106232 | 515, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106233 | 0, // subo64_then_sub_32 |
| 106234 | 0, // subo64_then_sub_32_hi |
| 106235 | 0, // zsub1_then_zsub_hi |
| 106236 | 0, // zsub3_then_zsub_hi |
| 106237 | 0, // zsub2_then_zsub_hi |
| 106238 | 0, // dsub0_dsub1 |
| 106239 | 0, // dsub0_dsub1_dsub2 |
| 106240 | 0, // dsub1_dsub2 |
| 106241 | 0, // dsub1_dsub2_dsub3 |
| 106242 | 0, // dsub2_dsub3 |
| 106243 | 0, // dsub_dsub1 |
| 106244 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106245 | 0, // dsub_dsub1_dsub2 |
| 106246 | 0, // qsub0_qsub1 |
| 106247 | 0, // qsub0_qsub1_qsub2 |
| 106248 | 0, // qsub1_qsub2 |
| 106249 | 0, // qsub1_qsub2_qsub3 |
| 106250 | 0, // qsub2_qsub3 |
| 106251 | 515, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106252 | 515, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106253 | 515, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106254 | 515, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106255 | 515, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106256 | 515, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106257 | 515, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106258 | 515, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 106259 | 0, // sub_32_subo64_then_sub_32 |
| 106260 | 0, // zsub_qsub1 |
| 106261 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106262 | 0, // zsub_qsub1_qsub2 |
| 106263 | 0, // zsub0_zsub1 |
| 106264 | 0, // zsub0_zsub1_zsub2 |
| 106265 | 0, // zsub1_zsub2 |
| 106266 | 0, // zsub1_zsub2_zsub3 |
| 106267 | 0, // zsub2_zsub3 |
| 106268 | 0, // zsub0_zsub2 |
| 106269 | 0, // zsub1_zsub3 |
| 106270 | }, |
| 106271 | { // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106272 | 0, // bsub |
| 106273 | 0, // bsub_hi |
| 106274 | 0, // dsub |
| 106275 | 0, // dsub0 |
| 106276 | 0, // dsub1 |
| 106277 | 0, // dsub2 |
| 106278 | 0, // dsub3 |
| 106279 | 0, // dsub_hi |
| 106280 | 0, // hsub |
| 106281 | 0, // hsub_hi |
| 106282 | 0, // psub |
| 106283 | 0, // psub0 |
| 106284 | 0, // psub1 |
| 106285 | 0, // qsub0 |
| 106286 | 0, // qsub1 |
| 106287 | 0, // qsub2 |
| 106288 | 0, // qsub3 |
| 106289 | 0, // ssub |
| 106290 | 0, // ssub_hi |
| 106291 | 516, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106292 | 516, // sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106293 | 0, // sube32 |
| 106294 | 0, // sube64 |
| 106295 | 0, // subo32 |
| 106296 | 0, // subo64 |
| 106297 | 516, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106298 | 516, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106299 | 516, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106300 | 516, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106301 | 516, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106302 | 516, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106303 | 516, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106304 | 516, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106305 | 0, // zasubb |
| 106306 | 0, // zasubd0 |
| 106307 | 0, // zasubd1 |
| 106308 | 0, // zasubh0 |
| 106309 | 0, // zasubh1 |
| 106310 | 0, // zasubq0 |
| 106311 | 0, // zasubq1 |
| 106312 | 0, // zasubs0 |
| 106313 | 0, // zasubs1 |
| 106314 | 0, // zsub |
| 106315 | 0, // zsub0 |
| 106316 | 0, // zsub1 |
| 106317 | 0, // zsub2 |
| 106318 | 0, // zsub3 |
| 106319 | 0, // zsub_hi |
| 106320 | 0, // zasubd1_then_zasubq0 |
| 106321 | 0, // zasubd1_then_zasubq1 |
| 106322 | 0, // zasubs1_then_zasubd0 |
| 106323 | 0, // zasubs1_then_zasubd1 |
| 106324 | 0, // zasubs1_then_zasubq0 |
| 106325 | 0, // zasubs1_then_zasubq1 |
| 106326 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106327 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106328 | 0, // zasubh1_then_zasubd0 |
| 106329 | 0, // zasubh1_then_zasubd1 |
| 106330 | 0, // zasubh1_then_zasubq0 |
| 106331 | 0, // zasubh1_then_zasubq1 |
| 106332 | 0, // zasubh1_then_zasubs0 |
| 106333 | 0, // zasubh1_then_zasubs1 |
| 106334 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106335 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106336 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106337 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106338 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106339 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106340 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106341 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106342 | 0, // dsub1_then_bsub |
| 106343 | 0, // dsub1_then_bsub_hi |
| 106344 | 0, // dsub1_then_hsub |
| 106345 | 0, // dsub1_then_hsub_hi |
| 106346 | 0, // dsub1_then_ssub |
| 106347 | 0, // dsub1_then_ssub_hi |
| 106348 | 0, // dsub3_then_bsub |
| 106349 | 0, // dsub3_then_bsub_hi |
| 106350 | 0, // dsub3_then_hsub |
| 106351 | 0, // dsub3_then_hsub_hi |
| 106352 | 0, // dsub3_then_ssub |
| 106353 | 0, // dsub3_then_ssub_hi |
| 106354 | 0, // dsub2_then_bsub |
| 106355 | 0, // dsub2_then_bsub_hi |
| 106356 | 0, // dsub2_then_hsub |
| 106357 | 0, // dsub2_then_hsub_hi |
| 106358 | 0, // dsub2_then_ssub |
| 106359 | 0, // dsub2_then_ssub_hi |
| 106360 | 0, // psub1_then_psub |
| 106361 | 0, // qsub1_then_dsub_hi |
| 106362 | 0, // qsub3_then_dsub_hi |
| 106363 | 0, // qsub2_then_dsub_hi |
| 106364 | 516, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106365 | 516, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106366 | 516, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106367 | 516, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106368 | 516, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106369 | 516, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106370 | 516, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106371 | 516, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106372 | 516, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106373 | 516, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106374 | 516, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106375 | 516, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106376 | 516, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106377 | 516, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106378 | 0, // subo64_then_sub_32 |
| 106379 | 0, // subo64_then_sub_32_hi |
| 106380 | 0, // zsub1_then_zsub_hi |
| 106381 | 0, // zsub3_then_zsub_hi |
| 106382 | 0, // zsub2_then_zsub_hi |
| 106383 | 0, // dsub0_dsub1 |
| 106384 | 0, // dsub0_dsub1_dsub2 |
| 106385 | 0, // dsub1_dsub2 |
| 106386 | 0, // dsub1_dsub2_dsub3 |
| 106387 | 0, // dsub2_dsub3 |
| 106388 | 0, // dsub_dsub1 |
| 106389 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106390 | 0, // dsub_dsub1_dsub2 |
| 106391 | 0, // qsub0_qsub1 |
| 106392 | 0, // qsub0_qsub1_qsub2 |
| 106393 | 0, // qsub1_qsub2 |
| 106394 | 0, // qsub1_qsub2_qsub3 |
| 106395 | 0, // qsub2_qsub3 |
| 106396 | 516, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106397 | 516, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106398 | 516, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106399 | 516, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106400 | 516, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106401 | 516, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106402 | 516, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106403 | 516, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106404 | 0, // sub_32_subo64_then_sub_32 |
| 106405 | 0, // zsub_qsub1 |
| 106406 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106407 | 0, // zsub_qsub1_qsub2 |
| 106408 | 0, // zsub0_zsub1 |
| 106409 | 0, // zsub0_zsub1_zsub2 |
| 106410 | 0, // zsub1_zsub2 |
| 106411 | 0, // zsub1_zsub2_zsub3 |
| 106412 | 0, // zsub2_zsub3 |
| 106413 | 0, // zsub0_zsub2 |
| 106414 | 0, // zsub1_zsub3 |
| 106415 | }, |
| 106416 | { // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106417 | 0, // bsub |
| 106418 | 0, // bsub_hi |
| 106419 | 0, // dsub |
| 106420 | 0, // dsub0 |
| 106421 | 0, // dsub1 |
| 106422 | 0, // dsub2 |
| 106423 | 0, // dsub3 |
| 106424 | 0, // dsub_hi |
| 106425 | 0, // hsub |
| 106426 | 0, // hsub_hi |
| 106427 | 0, // psub |
| 106428 | 0, // psub0 |
| 106429 | 0, // psub1 |
| 106430 | 0, // qsub0 |
| 106431 | 0, // qsub1 |
| 106432 | 0, // qsub2 |
| 106433 | 0, // qsub3 |
| 106434 | 0, // ssub |
| 106435 | 0, // ssub_hi |
| 106436 | 517, // sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106437 | 517, // sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106438 | 0, // sube32 |
| 106439 | 0, // sube64 |
| 106440 | 0, // subo32 |
| 106441 | 0, // subo64 |
| 106442 | 517, // x8sub_0 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106443 | 517, // x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106444 | 517, // x8sub_2 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106445 | 517, // x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106446 | 517, // x8sub_4 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106447 | 517, // x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106448 | 517, // x8sub_6 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106449 | 517, // x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106450 | 0, // zasubb |
| 106451 | 0, // zasubd0 |
| 106452 | 0, // zasubd1 |
| 106453 | 0, // zasubh0 |
| 106454 | 0, // zasubh1 |
| 106455 | 0, // zasubq0 |
| 106456 | 0, // zasubq1 |
| 106457 | 0, // zasubs0 |
| 106458 | 0, // zasubs1 |
| 106459 | 0, // zsub |
| 106460 | 0, // zsub0 |
| 106461 | 0, // zsub1 |
| 106462 | 0, // zsub2 |
| 106463 | 0, // zsub3 |
| 106464 | 0, // zsub_hi |
| 106465 | 0, // zasubd1_then_zasubq0 |
| 106466 | 0, // zasubd1_then_zasubq1 |
| 106467 | 0, // zasubs1_then_zasubd0 |
| 106468 | 0, // zasubs1_then_zasubd1 |
| 106469 | 0, // zasubs1_then_zasubq0 |
| 106470 | 0, // zasubs1_then_zasubq1 |
| 106471 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106472 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106473 | 0, // zasubh1_then_zasubd0 |
| 106474 | 0, // zasubh1_then_zasubd1 |
| 106475 | 0, // zasubh1_then_zasubq0 |
| 106476 | 0, // zasubh1_then_zasubq1 |
| 106477 | 0, // zasubh1_then_zasubs0 |
| 106478 | 0, // zasubh1_then_zasubs1 |
| 106479 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106480 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106481 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106482 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106483 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106484 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106485 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106486 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106487 | 0, // dsub1_then_bsub |
| 106488 | 0, // dsub1_then_bsub_hi |
| 106489 | 0, // dsub1_then_hsub |
| 106490 | 0, // dsub1_then_hsub_hi |
| 106491 | 0, // dsub1_then_ssub |
| 106492 | 0, // dsub1_then_ssub_hi |
| 106493 | 0, // dsub3_then_bsub |
| 106494 | 0, // dsub3_then_bsub_hi |
| 106495 | 0, // dsub3_then_hsub |
| 106496 | 0, // dsub3_then_hsub_hi |
| 106497 | 0, // dsub3_then_ssub |
| 106498 | 0, // dsub3_then_ssub_hi |
| 106499 | 0, // dsub2_then_bsub |
| 106500 | 0, // dsub2_then_bsub_hi |
| 106501 | 0, // dsub2_then_hsub |
| 106502 | 0, // dsub2_then_hsub_hi |
| 106503 | 0, // dsub2_then_ssub |
| 106504 | 0, // dsub2_then_ssub_hi |
| 106505 | 0, // psub1_then_psub |
| 106506 | 0, // qsub1_then_dsub_hi |
| 106507 | 0, // qsub3_then_dsub_hi |
| 106508 | 0, // qsub2_then_dsub_hi |
| 106509 | 517, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106510 | 517, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106511 | 517, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106512 | 517, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106513 | 517, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106514 | 517, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106515 | 517, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106516 | 517, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106517 | 517, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106518 | 517, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106519 | 517, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106520 | 517, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106521 | 517, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106522 | 517, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106523 | 0, // subo64_then_sub_32 |
| 106524 | 0, // subo64_then_sub_32_hi |
| 106525 | 0, // zsub1_then_zsub_hi |
| 106526 | 0, // zsub3_then_zsub_hi |
| 106527 | 0, // zsub2_then_zsub_hi |
| 106528 | 0, // dsub0_dsub1 |
| 106529 | 0, // dsub0_dsub1_dsub2 |
| 106530 | 0, // dsub1_dsub2 |
| 106531 | 0, // dsub1_dsub2_dsub3 |
| 106532 | 0, // dsub2_dsub3 |
| 106533 | 0, // dsub_dsub1 |
| 106534 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106535 | 0, // dsub_dsub1_dsub2 |
| 106536 | 0, // qsub0_qsub1 |
| 106537 | 0, // qsub0_qsub1_qsub2 |
| 106538 | 0, // qsub1_qsub2 |
| 106539 | 0, // qsub1_qsub2_qsub3 |
| 106540 | 0, // qsub2_qsub3 |
| 106541 | 517, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106542 | 517, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106543 | 517, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106544 | 517, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106545 | 517, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106546 | 517, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106547 | 517, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106548 | 517, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106549 | 0, // sub_32_subo64_then_sub_32 |
| 106550 | 0, // zsub_qsub1 |
| 106551 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106552 | 0, // zsub_qsub1_qsub2 |
| 106553 | 0, // zsub0_zsub1 |
| 106554 | 0, // zsub0_zsub1_zsub2 |
| 106555 | 0, // zsub1_zsub2 |
| 106556 | 0, // zsub1_zsub2_zsub3 |
| 106557 | 0, // zsub2_zsub3 |
| 106558 | 0, // zsub0_zsub2 |
| 106559 | 0, // zsub1_zsub3 |
| 106560 | }, |
| 106561 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106562 | 0, // bsub |
| 106563 | 0, // bsub_hi |
| 106564 | 0, // dsub |
| 106565 | 0, // dsub0 |
| 106566 | 0, // dsub1 |
| 106567 | 0, // dsub2 |
| 106568 | 0, // dsub3 |
| 106569 | 0, // dsub_hi |
| 106570 | 0, // hsub |
| 106571 | 0, // hsub_hi |
| 106572 | 0, // psub |
| 106573 | 0, // psub0 |
| 106574 | 0, // psub1 |
| 106575 | 0, // qsub0 |
| 106576 | 0, // qsub1 |
| 106577 | 0, // qsub2 |
| 106578 | 0, // qsub3 |
| 106579 | 0, // ssub |
| 106580 | 0, // ssub_hi |
| 106581 | 518, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106582 | 518, // sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106583 | 0, // sube32 |
| 106584 | 0, // sube64 |
| 106585 | 0, // subo32 |
| 106586 | 0, // subo64 |
| 106587 | 518, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106588 | 518, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106589 | 518, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106590 | 518, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106591 | 518, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106592 | 518, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106593 | 518, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106594 | 518, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106595 | 0, // zasubb |
| 106596 | 0, // zasubd0 |
| 106597 | 0, // zasubd1 |
| 106598 | 0, // zasubh0 |
| 106599 | 0, // zasubh1 |
| 106600 | 0, // zasubq0 |
| 106601 | 0, // zasubq1 |
| 106602 | 0, // zasubs0 |
| 106603 | 0, // zasubs1 |
| 106604 | 0, // zsub |
| 106605 | 0, // zsub0 |
| 106606 | 0, // zsub1 |
| 106607 | 0, // zsub2 |
| 106608 | 0, // zsub3 |
| 106609 | 0, // zsub_hi |
| 106610 | 0, // zasubd1_then_zasubq0 |
| 106611 | 0, // zasubd1_then_zasubq1 |
| 106612 | 0, // zasubs1_then_zasubd0 |
| 106613 | 0, // zasubs1_then_zasubd1 |
| 106614 | 0, // zasubs1_then_zasubq0 |
| 106615 | 0, // zasubs1_then_zasubq1 |
| 106616 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106617 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106618 | 0, // zasubh1_then_zasubd0 |
| 106619 | 0, // zasubh1_then_zasubd1 |
| 106620 | 0, // zasubh1_then_zasubq0 |
| 106621 | 0, // zasubh1_then_zasubq1 |
| 106622 | 0, // zasubh1_then_zasubs0 |
| 106623 | 0, // zasubh1_then_zasubs1 |
| 106624 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106625 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106626 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106627 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106628 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106629 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106630 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106631 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106632 | 0, // dsub1_then_bsub |
| 106633 | 0, // dsub1_then_bsub_hi |
| 106634 | 0, // dsub1_then_hsub |
| 106635 | 0, // dsub1_then_hsub_hi |
| 106636 | 0, // dsub1_then_ssub |
| 106637 | 0, // dsub1_then_ssub_hi |
| 106638 | 0, // dsub3_then_bsub |
| 106639 | 0, // dsub3_then_bsub_hi |
| 106640 | 0, // dsub3_then_hsub |
| 106641 | 0, // dsub3_then_hsub_hi |
| 106642 | 0, // dsub3_then_ssub |
| 106643 | 0, // dsub3_then_ssub_hi |
| 106644 | 0, // dsub2_then_bsub |
| 106645 | 0, // dsub2_then_bsub_hi |
| 106646 | 0, // dsub2_then_hsub |
| 106647 | 0, // dsub2_then_hsub_hi |
| 106648 | 0, // dsub2_then_ssub |
| 106649 | 0, // dsub2_then_ssub_hi |
| 106650 | 0, // psub1_then_psub |
| 106651 | 0, // qsub1_then_dsub_hi |
| 106652 | 0, // qsub3_then_dsub_hi |
| 106653 | 0, // qsub2_then_dsub_hi |
| 106654 | 518, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106655 | 518, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106656 | 518, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106657 | 518, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106658 | 518, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106659 | 518, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106660 | 518, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106661 | 518, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106662 | 518, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106663 | 518, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106664 | 518, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106665 | 518, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106666 | 518, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106667 | 518, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106668 | 0, // subo64_then_sub_32 |
| 106669 | 0, // subo64_then_sub_32_hi |
| 106670 | 0, // zsub1_then_zsub_hi |
| 106671 | 0, // zsub3_then_zsub_hi |
| 106672 | 0, // zsub2_then_zsub_hi |
| 106673 | 0, // dsub0_dsub1 |
| 106674 | 0, // dsub0_dsub1_dsub2 |
| 106675 | 0, // dsub1_dsub2 |
| 106676 | 0, // dsub1_dsub2_dsub3 |
| 106677 | 0, // dsub2_dsub3 |
| 106678 | 0, // dsub_dsub1 |
| 106679 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106680 | 0, // dsub_dsub1_dsub2 |
| 106681 | 0, // qsub0_qsub1 |
| 106682 | 0, // qsub0_qsub1_qsub2 |
| 106683 | 0, // qsub1_qsub2 |
| 106684 | 0, // qsub1_qsub2_qsub3 |
| 106685 | 0, // qsub2_qsub3 |
| 106686 | 518, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106687 | 518, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106688 | 518, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106689 | 518, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106690 | 518, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106691 | 518, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106692 | 518, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106693 | 518, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106694 | 0, // sub_32_subo64_then_sub_32 |
| 106695 | 0, // zsub_qsub1 |
| 106696 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106697 | 0, // zsub_qsub1_qsub2 |
| 106698 | 0, // zsub0_zsub1 |
| 106699 | 0, // zsub0_zsub1_zsub2 |
| 106700 | 0, // zsub1_zsub2 |
| 106701 | 0, // zsub1_zsub2_zsub3 |
| 106702 | 0, // zsub2_zsub3 |
| 106703 | 0, // zsub0_zsub2 |
| 106704 | 0, // zsub1_zsub3 |
| 106705 | }, |
| 106706 | { // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106707 | 0, // bsub |
| 106708 | 0, // bsub_hi |
| 106709 | 0, // dsub |
| 106710 | 0, // dsub0 |
| 106711 | 0, // dsub1 |
| 106712 | 0, // dsub2 |
| 106713 | 0, // dsub3 |
| 106714 | 0, // dsub_hi |
| 106715 | 0, // hsub |
| 106716 | 0, // hsub_hi |
| 106717 | 0, // psub |
| 106718 | 0, // psub0 |
| 106719 | 0, // psub1 |
| 106720 | 0, // qsub0 |
| 106721 | 0, // qsub1 |
| 106722 | 0, // qsub2 |
| 106723 | 0, // qsub3 |
| 106724 | 0, // ssub |
| 106725 | 0, // ssub_hi |
| 106726 | 519, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106727 | 519, // sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106728 | 0, // sube32 |
| 106729 | 0, // sube64 |
| 106730 | 0, // subo32 |
| 106731 | 0, // subo64 |
| 106732 | 519, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106733 | 519, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106734 | 519, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106735 | 519, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106736 | 519, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106737 | 519, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106738 | 519, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106739 | 519, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106740 | 0, // zasubb |
| 106741 | 0, // zasubd0 |
| 106742 | 0, // zasubd1 |
| 106743 | 0, // zasubh0 |
| 106744 | 0, // zasubh1 |
| 106745 | 0, // zasubq0 |
| 106746 | 0, // zasubq1 |
| 106747 | 0, // zasubs0 |
| 106748 | 0, // zasubs1 |
| 106749 | 0, // zsub |
| 106750 | 0, // zsub0 |
| 106751 | 0, // zsub1 |
| 106752 | 0, // zsub2 |
| 106753 | 0, // zsub3 |
| 106754 | 0, // zsub_hi |
| 106755 | 0, // zasubd1_then_zasubq0 |
| 106756 | 0, // zasubd1_then_zasubq1 |
| 106757 | 0, // zasubs1_then_zasubd0 |
| 106758 | 0, // zasubs1_then_zasubd1 |
| 106759 | 0, // zasubs1_then_zasubq0 |
| 106760 | 0, // zasubs1_then_zasubq1 |
| 106761 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106762 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106763 | 0, // zasubh1_then_zasubd0 |
| 106764 | 0, // zasubh1_then_zasubd1 |
| 106765 | 0, // zasubh1_then_zasubq0 |
| 106766 | 0, // zasubh1_then_zasubq1 |
| 106767 | 0, // zasubh1_then_zasubs0 |
| 106768 | 0, // zasubh1_then_zasubs1 |
| 106769 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106770 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106771 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106772 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106773 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106774 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106775 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106776 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106777 | 0, // dsub1_then_bsub |
| 106778 | 0, // dsub1_then_bsub_hi |
| 106779 | 0, // dsub1_then_hsub |
| 106780 | 0, // dsub1_then_hsub_hi |
| 106781 | 0, // dsub1_then_ssub |
| 106782 | 0, // dsub1_then_ssub_hi |
| 106783 | 0, // dsub3_then_bsub |
| 106784 | 0, // dsub3_then_bsub_hi |
| 106785 | 0, // dsub3_then_hsub |
| 106786 | 0, // dsub3_then_hsub_hi |
| 106787 | 0, // dsub3_then_ssub |
| 106788 | 0, // dsub3_then_ssub_hi |
| 106789 | 0, // dsub2_then_bsub |
| 106790 | 0, // dsub2_then_bsub_hi |
| 106791 | 0, // dsub2_then_hsub |
| 106792 | 0, // dsub2_then_hsub_hi |
| 106793 | 0, // dsub2_then_ssub |
| 106794 | 0, // dsub2_then_ssub_hi |
| 106795 | 0, // psub1_then_psub |
| 106796 | 0, // qsub1_then_dsub_hi |
| 106797 | 0, // qsub3_then_dsub_hi |
| 106798 | 0, // qsub2_then_dsub_hi |
| 106799 | 519, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106800 | 519, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106801 | 519, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106802 | 519, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106803 | 519, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106804 | 519, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106805 | 519, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106806 | 519, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106807 | 519, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106808 | 519, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106809 | 519, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106810 | 519, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106811 | 519, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106812 | 519, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106813 | 0, // subo64_then_sub_32 |
| 106814 | 0, // subo64_then_sub_32_hi |
| 106815 | 0, // zsub1_then_zsub_hi |
| 106816 | 0, // zsub3_then_zsub_hi |
| 106817 | 0, // zsub2_then_zsub_hi |
| 106818 | 0, // dsub0_dsub1 |
| 106819 | 0, // dsub0_dsub1_dsub2 |
| 106820 | 0, // dsub1_dsub2 |
| 106821 | 0, // dsub1_dsub2_dsub3 |
| 106822 | 0, // dsub2_dsub3 |
| 106823 | 0, // dsub_dsub1 |
| 106824 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106825 | 0, // dsub_dsub1_dsub2 |
| 106826 | 0, // qsub0_qsub1 |
| 106827 | 0, // qsub0_qsub1_qsub2 |
| 106828 | 0, // qsub1_qsub2 |
| 106829 | 0, // qsub1_qsub2_qsub3 |
| 106830 | 0, // qsub2_qsub3 |
| 106831 | 519, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106832 | 519, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106833 | 519, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106834 | 519, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106835 | 519, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106836 | 519, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106837 | 519, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106838 | 519, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 106839 | 0, // sub_32_subo64_then_sub_32 |
| 106840 | 0, // zsub_qsub1 |
| 106841 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106842 | 0, // zsub_qsub1_qsub2 |
| 106843 | 0, // zsub0_zsub1 |
| 106844 | 0, // zsub0_zsub1_zsub2 |
| 106845 | 0, // zsub1_zsub2 |
| 106846 | 0, // zsub1_zsub2_zsub3 |
| 106847 | 0, // zsub2_zsub3 |
| 106848 | 0, // zsub0_zsub2 |
| 106849 | 0, // zsub1_zsub3 |
| 106850 | }, |
| 106851 | { // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106852 | 0, // bsub |
| 106853 | 0, // bsub_hi |
| 106854 | 0, // dsub |
| 106855 | 0, // dsub0 |
| 106856 | 0, // dsub1 |
| 106857 | 0, // dsub2 |
| 106858 | 0, // dsub3 |
| 106859 | 0, // dsub_hi |
| 106860 | 0, // hsub |
| 106861 | 0, // hsub_hi |
| 106862 | 0, // psub |
| 106863 | 0, // psub0 |
| 106864 | 0, // psub1 |
| 106865 | 0, // qsub0 |
| 106866 | 0, // qsub1 |
| 106867 | 0, // qsub2 |
| 106868 | 0, // qsub3 |
| 106869 | 0, // ssub |
| 106870 | 0, // ssub_hi |
| 106871 | 520, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106872 | 520, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106873 | 0, // sube32 |
| 106874 | 0, // sube64 |
| 106875 | 0, // subo32 |
| 106876 | 0, // subo64 |
| 106877 | 520, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106878 | 520, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106879 | 520, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106880 | 520, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106881 | 520, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106882 | 520, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106883 | 520, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106884 | 520, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106885 | 0, // zasubb |
| 106886 | 0, // zasubd0 |
| 106887 | 0, // zasubd1 |
| 106888 | 0, // zasubh0 |
| 106889 | 0, // zasubh1 |
| 106890 | 0, // zasubq0 |
| 106891 | 0, // zasubq1 |
| 106892 | 0, // zasubs0 |
| 106893 | 0, // zasubs1 |
| 106894 | 0, // zsub |
| 106895 | 0, // zsub0 |
| 106896 | 0, // zsub1 |
| 106897 | 0, // zsub2 |
| 106898 | 0, // zsub3 |
| 106899 | 0, // zsub_hi |
| 106900 | 0, // zasubd1_then_zasubq0 |
| 106901 | 0, // zasubd1_then_zasubq1 |
| 106902 | 0, // zasubs1_then_zasubd0 |
| 106903 | 0, // zasubs1_then_zasubd1 |
| 106904 | 0, // zasubs1_then_zasubq0 |
| 106905 | 0, // zasubs1_then_zasubq1 |
| 106906 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 106907 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 106908 | 0, // zasubh1_then_zasubd0 |
| 106909 | 0, // zasubh1_then_zasubd1 |
| 106910 | 0, // zasubh1_then_zasubq0 |
| 106911 | 0, // zasubh1_then_zasubq1 |
| 106912 | 0, // zasubh1_then_zasubs0 |
| 106913 | 0, // zasubh1_then_zasubs1 |
| 106914 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 106915 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 106916 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 106917 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 106918 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 106919 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 106920 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 106921 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 106922 | 0, // dsub1_then_bsub |
| 106923 | 0, // dsub1_then_bsub_hi |
| 106924 | 0, // dsub1_then_hsub |
| 106925 | 0, // dsub1_then_hsub_hi |
| 106926 | 0, // dsub1_then_ssub |
| 106927 | 0, // dsub1_then_ssub_hi |
| 106928 | 0, // dsub3_then_bsub |
| 106929 | 0, // dsub3_then_bsub_hi |
| 106930 | 0, // dsub3_then_hsub |
| 106931 | 0, // dsub3_then_hsub_hi |
| 106932 | 0, // dsub3_then_ssub |
| 106933 | 0, // dsub3_then_ssub_hi |
| 106934 | 0, // dsub2_then_bsub |
| 106935 | 0, // dsub2_then_bsub_hi |
| 106936 | 0, // dsub2_then_hsub |
| 106937 | 0, // dsub2_then_hsub_hi |
| 106938 | 0, // dsub2_then_ssub |
| 106939 | 0, // dsub2_then_ssub_hi |
| 106940 | 0, // psub1_then_psub |
| 106941 | 0, // qsub1_then_dsub_hi |
| 106942 | 0, // qsub3_then_dsub_hi |
| 106943 | 0, // qsub2_then_dsub_hi |
| 106944 | 520, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106945 | 520, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106946 | 520, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106947 | 520, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106948 | 520, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106949 | 520, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106950 | 520, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106951 | 520, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106952 | 520, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106953 | 520, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106954 | 520, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106955 | 520, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106956 | 520, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106957 | 520, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106958 | 0, // subo64_then_sub_32 |
| 106959 | 0, // subo64_then_sub_32_hi |
| 106960 | 0, // zsub1_then_zsub_hi |
| 106961 | 0, // zsub3_then_zsub_hi |
| 106962 | 0, // zsub2_then_zsub_hi |
| 106963 | 0, // dsub0_dsub1 |
| 106964 | 0, // dsub0_dsub1_dsub2 |
| 106965 | 0, // dsub1_dsub2 |
| 106966 | 0, // dsub1_dsub2_dsub3 |
| 106967 | 0, // dsub2_dsub3 |
| 106968 | 0, // dsub_dsub1 |
| 106969 | 0, // dsub_dsub1_dsub2_dsub3 |
| 106970 | 0, // dsub_dsub1_dsub2 |
| 106971 | 0, // qsub0_qsub1 |
| 106972 | 0, // qsub0_qsub1_qsub2 |
| 106973 | 0, // qsub1_qsub2 |
| 106974 | 0, // qsub1_qsub2_qsub3 |
| 106975 | 0, // qsub2_qsub3 |
| 106976 | 520, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106977 | 520, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106978 | 520, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106979 | 520, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106980 | 520, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106981 | 520, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106982 | 520, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106983 | 520, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 106984 | 0, // sub_32_subo64_then_sub_32 |
| 106985 | 0, // zsub_qsub1 |
| 106986 | 0, // zsub_qsub1_qsub2_qsub3 |
| 106987 | 0, // zsub_qsub1_qsub2 |
| 106988 | 0, // zsub0_zsub1 |
| 106989 | 0, // zsub0_zsub1_zsub2 |
| 106990 | 0, // zsub1_zsub2 |
| 106991 | 0, // zsub1_zsub2_zsub3 |
| 106992 | 0, // zsub2_zsub3 |
| 106993 | 0, // zsub0_zsub2 |
| 106994 | 0, // zsub1_zsub3 |
| 106995 | }, |
| 106996 | { // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 106997 | 0, // bsub |
| 106998 | 0, // bsub_hi |
| 106999 | 0, // dsub |
| 107000 | 0, // dsub0 |
| 107001 | 0, // dsub1 |
| 107002 | 0, // dsub2 |
| 107003 | 0, // dsub3 |
| 107004 | 0, // dsub_hi |
| 107005 | 0, // hsub |
| 107006 | 0, // hsub_hi |
| 107007 | 0, // psub |
| 107008 | 0, // psub0 |
| 107009 | 0, // psub1 |
| 107010 | 0, // qsub0 |
| 107011 | 0, // qsub1 |
| 107012 | 0, // qsub2 |
| 107013 | 0, // qsub3 |
| 107014 | 0, // ssub |
| 107015 | 0, // ssub_hi |
| 107016 | 521, // sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107017 | 521, // sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107018 | 0, // sube32 |
| 107019 | 0, // sube64 |
| 107020 | 0, // subo32 |
| 107021 | 0, // subo64 |
| 107022 | 521, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107023 | 521, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107024 | 521, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107025 | 521, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107026 | 521, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107027 | 521, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107028 | 521, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107029 | 521, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107030 | 0, // zasubb |
| 107031 | 0, // zasubd0 |
| 107032 | 0, // zasubd1 |
| 107033 | 0, // zasubh0 |
| 107034 | 0, // zasubh1 |
| 107035 | 0, // zasubq0 |
| 107036 | 0, // zasubq1 |
| 107037 | 0, // zasubs0 |
| 107038 | 0, // zasubs1 |
| 107039 | 0, // zsub |
| 107040 | 0, // zsub0 |
| 107041 | 0, // zsub1 |
| 107042 | 0, // zsub2 |
| 107043 | 0, // zsub3 |
| 107044 | 0, // zsub_hi |
| 107045 | 0, // zasubd1_then_zasubq0 |
| 107046 | 0, // zasubd1_then_zasubq1 |
| 107047 | 0, // zasubs1_then_zasubd0 |
| 107048 | 0, // zasubs1_then_zasubd1 |
| 107049 | 0, // zasubs1_then_zasubq0 |
| 107050 | 0, // zasubs1_then_zasubq1 |
| 107051 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107052 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107053 | 0, // zasubh1_then_zasubd0 |
| 107054 | 0, // zasubh1_then_zasubd1 |
| 107055 | 0, // zasubh1_then_zasubq0 |
| 107056 | 0, // zasubh1_then_zasubq1 |
| 107057 | 0, // zasubh1_then_zasubs0 |
| 107058 | 0, // zasubh1_then_zasubs1 |
| 107059 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107060 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107061 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107062 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107063 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107064 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107065 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107066 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107067 | 0, // dsub1_then_bsub |
| 107068 | 0, // dsub1_then_bsub_hi |
| 107069 | 0, // dsub1_then_hsub |
| 107070 | 0, // dsub1_then_hsub_hi |
| 107071 | 0, // dsub1_then_ssub |
| 107072 | 0, // dsub1_then_ssub_hi |
| 107073 | 0, // dsub3_then_bsub |
| 107074 | 0, // dsub3_then_bsub_hi |
| 107075 | 0, // dsub3_then_hsub |
| 107076 | 0, // dsub3_then_hsub_hi |
| 107077 | 0, // dsub3_then_ssub |
| 107078 | 0, // dsub3_then_ssub_hi |
| 107079 | 0, // dsub2_then_bsub |
| 107080 | 0, // dsub2_then_bsub_hi |
| 107081 | 0, // dsub2_then_hsub |
| 107082 | 0, // dsub2_then_hsub_hi |
| 107083 | 0, // dsub2_then_ssub |
| 107084 | 0, // dsub2_then_ssub_hi |
| 107085 | 0, // psub1_then_psub |
| 107086 | 0, // qsub1_then_dsub_hi |
| 107087 | 0, // qsub3_then_dsub_hi |
| 107088 | 0, // qsub2_then_dsub_hi |
| 107089 | 521, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107090 | 521, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107091 | 521, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107092 | 521, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107093 | 521, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107094 | 521, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107095 | 521, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107096 | 521, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107097 | 521, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107098 | 521, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107099 | 521, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107100 | 521, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107101 | 521, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107102 | 521, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107103 | 0, // subo64_then_sub_32 |
| 107104 | 0, // subo64_then_sub_32_hi |
| 107105 | 0, // zsub1_then_zsub_hi |
| 107106 | 0, // zsub3_then_zsub_hi |
| 107107 | 0, // zsub2_then_zsub_hi |
| 107108 | 0, // dsub0_dsub1 |
| 107109 | 0, // dsub0_dsub1_dsub2 |
| 107110 | 0, // dsub1_dsub2 |
| 107111 | 0, // dsub1_dsub2_dsub3 |
| 107112 | 0, // dsub2_dsub3 |
| 107113 | 0, // dsub_dsub1 |
| 107114 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107115 | 0, // dsub_dsub1_dsub2 |
| 107116 | 0, // qsub0_qsub1 |
| 107117 | 0, // qsub0_qsub1_qsub2 |
| 107118 | 0, // qsub1_qsub2 |
| 107119 | 0, // qsub1_qsub2_qsub3 |
| 107120 | 0, // qsub2_qsub3 |
| 107121 | 521, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107122 | 521, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107123 | 521, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107124 | 521, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107125 | 521, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107126 | 521, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107127 | 521, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107128 | 521, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 107129 | 0, // sub_32_subo64_then_sub_32 |
| 107130 | 0, // zsub_qsub1 |
| 107131 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107132 | 0, // zsub_qsub1_qsub2 |
| 107133 | 0, // zsub0_zsub1 |
| 107134 | 0, // zsub0_zsub1_zsub2 |
| 107135 | 0, // zsub1_zsub2 |
| 107136 | 0, // zsub1_zsub2_zsub3 |
| 107137 | 0, // zsub2_zsub3 |
| 107138 | 0, // zsub0_zsub2 |
| 107139 | 0, // zsub1_zsub3 |
| 107140 | }, |
| 107141 | { // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107142 | 0, // bsub |
| 107143 | 0, // bsub_hi |
| 107144 | 0, // dsub |
| 107145 | 0, // dsub0 |
| 107146 | 0, // dsub1 |
| 107147 | 0, // dsub2 |
| 107148 | 0, // dsub3 |
| 107149 | 0, // dsub_hi |
| 107150 | 0, // hsub |
| 107151 | 0, // hsub_hi |
| 107152 | 0, // psub |
| 107153 | 0, // psub0 |
| 107154 | 0, // psub1 |
| 107155 | 0, // qsub0 |
| 107156 | 0, // qsub1 |
| 107157 | 0, // qsub2 |
| 107158 | 0, // qsub3 |
| 107159 | 0, // ssub |
| 107160 | 0, // ssub_hi |
| 107161 | 522, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107162 | 522, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107163 | 0, // sube32 |
| 107164 | 0, // sube64 |
| 107165 | 0, // subo32 |
| 107166 | 0, // subo64 |
| 107167 | 522, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107168 | 522, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107169 | 522, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107170 | 522, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107171 | 522, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107172 | 522, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107173 | 522, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107174 | 522, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107175 | 0, // zasubb |
| 107176 | 0, // zasubd0 |
| 107177 | 0, // zasubd1 |
| 107178 | 0, // zasubh0 |
| 107179 | 0, // zasubh1 |
| 107180 | 0, // zasubq0 |
| 107181 | 0, // zasubq1 |
| 107182 | 0, // zasubs0 |
| 107183 | 0, // zasubs1 |
| 107184 | 0, // zsub |
| 107185 | 0, // zsub0 |
| 107186 | 0, // zsub1 |
| 107187 | 0, // zsub2 |
| 107188 | 0, // zsub3 |
| 107189 | 0, // zsub_hi |
| 107190 | 0, // zasubd1_then_zasubq0 |
| 107191 | 0, // zasubd1_then_zasubq1 |
| 107192 | 0, // zasubs1_then_zasubd0 |
| 107193 | 0, // zasubs1_then_zasubd1 |
| 107194 | 0, // zasubs1_then_zasubq0 |
| 107195 | 0, // zasubs1_then_zasubq1 |
| 107196 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107197 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107198 | 0, // zasubh1_then_zasubd0 |
| 107199 | 0, // zasubh1_then_zasubd1 |
| 107200 | 0, // zasubh1_then_zasubq0 |
| 107201 | 0, // zasubh1_then_zasubq1 |
| 107202 | 0, // zasubh1_then_zasubs0 |
| 107203 | 0, // zasubh1_then_zasubs1 |
| 107204 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107205 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107206 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107207 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107208 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107209 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107210 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107211 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107212 | 0, // dsub1_then_bsub |
| 107213 | 0, // dsub1_then_bsub_hi |
| 107214 | 0, // dsub1_then_hsub |
| 107215 | 0, // dsub1_then_hsub_hi |
| 107216 | 0, // dsub1_then_ssub |
| 107217 | 0, // dsub1_then_ssub_hi |
| 107218 | 0, // dsub3_then_bsub |
| 107219 | 0, // dsub3_then_bsub_hi |
| 107220 | 0, // dsub3_then_hsub |
| 107221 | 0, // dsub3_then_hsub_hi |
| 107222 | 0, // dsub3_then_ssub |
| 107223 | 0, // dsub3_then_ssub_hi |
| 107224 | 0, // dsub2_then_bsub |
| 107225 | 0, // dsub2_then_bsub_hi |
| 107226 | 0, // dsub2_then_hsub |
| 107227 | 0, // dsub2_then_hsub_hi |
| 107228 | 0, // dsub2_then_ssub |
| 107229 | 0, // dsub2_then_ssub_hi |
| 107230 | 0, // psub1_then_psub |
| 107231 | 0, // qsub1_then_dsub_hi |
| 107232 | 0, // qsub3_then_dsub_hi |
| 107233 | 0, // qsub2_then_dsub_hi |
| 107234 | 522, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107235 | 522, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107236 | 522, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107237 | 522, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107238 | 522, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107239 | 522, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107240 | 522, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107241 | 522, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107242 | 522, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107243 | 522, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107244 | 522, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107245 | 522, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107246 | 522, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107247 | 522, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107248 | 0, // subo64_then_sub_32 |
| 107249 | 0, // subo64_then_sub_32_hi |
| 107250 | 0, // zsub1_then_zsub_hi |
| 107251 | 0, // zsub3_then_zsub_hi |
| 107252 | 0, // zsub2_then_zsub_hi |
| 107253 | 0, // dsub0_dsub1 |
| 107254 | 0, // dsub0_dsub1_dsub2 |
| 107255 | 0, // dsub1_dsub2 |
| 107256 | 0, // dsub1_dsub2_dsub3 |
| 107257 | 0, // dsub2_dsub3 |
| 107258 | 0, // dsub_dsub1 |
| 107259 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107260 | 0, // dsub_dsub1_dsub2 |
| 107261 | 0, // qsub0_qsub1 |
| 107262 | 0, // qsub0_qsub1_qsub2 |
| 107263 | 0, // qsub1_qsub2 |
| 107264 | 0, // qsub1_qsub2_qsub3 |
| 107265 | 0, // qsub2_qsub3 |
| 107266 | 522, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107267 | 522, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107268 | 522, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107269 | 522, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107270 | 522, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107271 | 522, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107272 | 522, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107273 | 522, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 107274 | 0, // sub_32_subo64_then_sub_32 |
| 107275 | 0, // zsub_qsub1 |
| 107276 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107277 | 0, // zsub_qsub1_qsub2 |
| 107278 | 0, // zsub0_zsub1 |
| 107279 | 0, // zsub0_zsub1_zsub2 |
| 107280 | 0, // zsub1_zsub2 |
| 107281 | 0, // zsub1_zsub2_zsub3 |
| 107282 | 0, // zsub2_zsub3 |
| 107283 | 0, // zsub0_zsub2 |
| 107284 | 0, // zsub1_zsub3 |
| 107285 | }, |
| 107286 | { // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107287 | 0, // bsub |
| 107288 | 0, // bsub_hi |
| 107289 | 0, // dsub |
| 107290 | 0, // dsub0 |
| 107291 | 0, // dsub1 |
| 107292 | 0, // dsub2 |
| 107293 | 0, // dsub3 |
| 107294 | 0, // dsub_hi |
| 107295 | 0, // hsub |
| 107296 | 0, // hsub_hi |
| 107297 | 0, // psub |
| 107298 | 0, // psub0 |
| 107299 | 0, // psub1 |
| 107300 | 0, // qsub0 |
| 107301 | 0, // qsub1 |
| 107302 | 0, // qsub2 |
| 107303 | 0, // qsub3 |
| 107304 | 0, // ssub |
| 107305 | 0, // ssub_hi |
| 107306 | 523, // sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107307 | 523, // sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107308 | 0, // sube32 |
| 107309 | 0, // sube64 |
| 107310 | 0, // subo32 |
| 107311 | 0, // subo64 |
| 107312 | 523, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107313 | 523, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107314 | 523, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107315 | 523, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107316 | 523, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107317 | 523, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107318 | 523, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107319 | 523, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107320 | 0, // zasubb |
| 107321 | 0, // zasubd0 |
| 107322 | 0, // zasubd1 |
| 107323 | 0, // zasubh0 |
| 107324 | 0, // zasubh1 |
| 107325 | 0, // zasubq0 |
| 107326 | 0, // zasubq1 |
| 107327 | 0, // zasubs0 |
| 107328 | 0, // zasubs1 |
| 107329 | 0, // zsub |
| 107330 | 0, // zsub0 |
| 107331 | 0, // zsub1 |
| 107332 | 0, // zsub2 |
| 107333 | 0, // zsub3 |
| 107334 | 0, // zsub_hi |
| 107335 | 0, // zasubd1_then_zasubq0 |
| 107336 | 0, // zasubd1_then_zasubq1 |
| 107337 | 0, // zasubs1_then_zasubd0 |
| 107338 | 0, // zasubs1_then_zasubd1 |
| 107339 | 0, // zasubs1_then_zasubq0 |
| 107340 | 0, // zasubs1_then_zasubq1 |
| 107341 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107342 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107343 | 0, // zasubh1_then_zasubd0 |
| 107344 | 0, // zasubh1_then_zasubd1 |
| 107345 | 0, // zasubh1_then_zasubq0 |
| 107346 | 0, // zasubh1_then_zasubq1 |
| 107347 | 0, // zasubh1_then_zasubs0 |
| 107348 | 0, // zasubh1_then_zasubs1 |
| 107349 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107350 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107351 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107352 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107353 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107354 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107355 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107356 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107357 | 0, // dsub1_then_bsub |
| 107358 | 0, // dsub1_then_bsub_hi |
| 107359 | 0, // dsub1_then_hsub |
| 107360 | 0, // dsub1_then_hsub_hi |
| 107361 | 0, // dsub1_then_ssub |
| 107362 | 0, // dsub1_then_ssub_hi |
| 107363 | 0, // dsub3_then_bsub |
| 107364 | 0, // dsub3_then_bsub_hi |
| 107365 | 0, // dsub3_then_hsub |
| 107366 | 0, // dsub3_then_hsub_hi |
| 107367 | 0, // dsub3_then_ssub |
| 107368 | 0, // dsub3_then_ssub_hi |
| 107369 | 0, // dsub2_then_bsub |
| 107370 | 0, // dsub2_then_bsub_hi |
| 107371 | 0, // dsub2_then_hsub |
| 107372 | 0, // dsub2_then_hsub_hi |
| 107373 | 0, // dsub2_then_ssub |
| 107374 | 0, // dsub2_then_ssub_hi |
| 107375 | 0, // psub1_then_psub |
| 107376 | 0, // qsub1_then_dsub_hi |
| 107377 | 0, // qsub3_then_dsub_hi |
| 107378 | 0, // qsub2_then_dsub_hi |
| 107379 | 523, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107380 | 523, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107381 | 523, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107382 | 523, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107383 | 523, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107384 | 523, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107385 | 523, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107386 | 523, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107387 | 523, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107388 | 523, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107389 | 523, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107390 | 523, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107391 | 523, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107392 | 523, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107393 | 0, // subo64_then_sub_32 |
| 107394 | 0, // subo64_then_sub_32_hi |
| 107395 | 0, // zsub1_then_zsub_hi |
| 107396 | 0, // zsub3_then_zsub_hi |
| 107397 | 0, // zsub2_then_zsub_hi |
| 107398 | 0, // dsub0_dsub1 |
| 107399 | 0, // dsub0_dsub1_dsub2 |
| 107400 | 0, // dsub1_dsub2 |
| 107401 | 0, // dsub1_dsub2_dsub3 |
| 107402 | 0, // dsub2_dsub3 |
| 107403 | 0, // dsub_dsub1 |
| 107404 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107405 | 0, // dsub_dsub1_dsub2 |
| 107406 | 0, // qsub0_qsub1 |
| 107407 | 0, // qsub0_qsub1_qsub2 |
| 107408 | 0, // qsub1_qsub2 |
| 107409 | 0, // qsub1_qsub2_qsub3 |
| 107410 | 0, // qsub2_qsub3 |
| 107411 | 523, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107412 | 523, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107413 | 523, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107414 | 523, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107415 | 523, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107416 | 523, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107417 | 523, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107418 | 523, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 107419 | 0, // sub_32_subo64_then_sub_32 |
| 107420 | 0, // zsub_qsub1 |
| 107421 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107422 | 0, // zsub_qsub1_qsub2 |
| 107423 | 0, // zsub0_zsub1 |
| 107424 | 0, // zsub0_zsub1_zsub2 |
| 107425 | 0, // zsub1_zsub2 |
| 107426 | 0, // zsub1_zsub2_zsub3 |
| 107427 | 0, // zsub2_zsub3 |
| 107428 | 0, // zsub0_zsub2 |
| 107429 | 0, // zsub1_zsub3 |
| 107430 | }, |
| 107431 | { // GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107432 | 0, // bsub |
| 107433 | 0, // bsub_hi |
| 107434 | 0, // dsub |
| 107435 | 0, // dsub0 |
| 107436 | 0, // dsub1 |
| 107437 | 0, // dsub2 |
| 107438 | 0, // dsub3 |
| 107439 | 0, // dsub_hi |
| 107440 | 0, // hsub |
| 107441 | 0, // hsub_hi |
| 107442 | 0, // psub |
| 107443 | 0, // psub0 |
| 107444 | 0, // psub1 |
| 107445 | 0, // qsub0 |
| 107446 | 0, // qsub1 |
| 107447 | 0, // qsub2 |
| 107448 | 0, // qsub3 |
| 107449 | 0, // ssub |
| 107450 | 0, // ssub_hi |
| 107451 | 524, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107452 | 524, // sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107453 | 0, // sube32 |
| 107454 | 0, // sube64 |
| 107455 | 0, // subo32 |
| 107456 | 0, // subo64 |
| 107457 | 524, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107458 | 524, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107459 | 524, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107460 | 524, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107461 | 524, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107462 | 524, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107463 | 524, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107464 | 524, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107465 | 0, // zasubb |
| 107466 | 0, // zasubd0 |
| 107467 | 0, // zasubd1 |
| 107468 | 0, // zasubh0 |
| 107469 | 0, // zasubh1 |
| 107470 | 0, // zasubq0 |
| 107471 | 0, // zasubq1 |
| 107472 | 0, // zasubs0 |
| 107473 | 0, // zasubs1 |
| 107474 | 0, // zsub |
| 107475 | 0, // zsub0 |
| 107476 | 0, // zsub1 |
| 107477 | 0, // zsub2 |
| 107478 | 0, // zsub3 |
| 107479 | 0, // zsub_hi |
| 107480 | 0, // zasubd1_then_zasubq0 |
| 107481 | 0, // zasubd1_then_zasubq1 |
| 107482 | 0, // zasubs1_then_zasubd0 |
| 107483 | 0, // zasubs1_then_zasubd1 |
| 107484 | 0, // zasubs1_then_zasubq0 |
| 107485 | 0, // zasubs1_then_zasubq1 |
| 107486 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107487 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107488 | 0, // zasubh1_then_zasubd0 |
| 107489 | 0, // zasubh1_then_zasubd1 |
| 107490 | 0, // zasubh1_then_zasubq0 |
| 107491 | 0, // zasubh1_then_zasubq1 |
| 107492 | 0, // zasubh1_then_zasubs0 |
| 107493 | 0, // zasubh1_then_zasubs1 |
| 107494 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107495 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107496 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107497 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107498 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107499 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107500 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107501 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107502 | 0, // dsub1_then_bsub |
| 107503 | 0, // dsub1_then_bsub_hi |
| 107504 | 0, // dsub1_then_hsub |
| 107505 | 0, // dsub1_then_hsub_hi |
| 107506 | 0, // dsub1_then_ssub |
| 107507 | 0, // dsub1_then_ssub_hi |
| 107508 | 0, // dsub3_then_bsub |
| 107509 | 0, // dsub3_then_bsub_hi |
| 107510 | 0, // dsub3_then_hsub |
| 107511 | 0, // dsub3_then_hsub_hi |
| 107512 | 0, // dsub3_then_ssub |
| 107513 | 0, // dsub3_then_ssub_hi |
| 107514 | 0, // dsub2_then_bsub |
| 107515 | 0, // dsub2_then_bsub_hi |
| 107516 | 0, // dsub2_then_hsub |
| 107517 | 0, // dsub2_then_hsub_hi |
| 107518 | 0, // dsub2_then_ssub |
| 107519 | 0, // dsub2_then_ssub_hi |
| 107520 | 0, // psub1_then_psub |
| 107521 | 0, // qsub1_then_dsub_hi |
| 107522 | 0, // qsub3_then_dsub_hi |
| 107523 | 0, // qsub2_then_dsub_hi |
| 107524 | 524, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107525 | 524, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107526 | 524, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107527 | 524, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107528 | 524, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107529 | 524, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107530 | 524, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107531 | 524, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107532 | 524, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107533 | 524, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107534 | 524, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107535 | 524, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107536 | 524, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107537 | 524, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107538 | 0, // subo64_then_sub_32 |
| 107539 | 0, // subo64_then_sub_32_hi |
| 107540 | 0, // zsub1_then_zsub_hi |
| 107541 | 0, // zsub3_then_zsub_hi |
| 107542 | 0, // zsub2_then_zsub_hi |
| 107543 | 0, // dsub0_dsub1 |
| 107544 | 0, // dsub0_dsub1_dsub2 |
| 107545 | 0, // dsub1_dsub2 |
| 107546 | 0, // dsub1_dsub2_dsub3 |
| 107547 | 0, // dsub2_dsub3 |
| 107548 | 0, // dsub_dsub1 |
| 107549 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107550 | 0, // dsub_dsub1_dsub2 |
| 107551 | 0, // qsub0_qsub1 |
| 107552 | 0, // qsub0_qsub1_qsub2 |
| 107553 | 0, // qsub1_qsub2 |
| 107554 | 0, // qsub1_qsub2_qsub3 |
| 107555 | 0, // qsub2_qsub3 |
| 107556 | 524, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107557 | 524, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107558 | 524, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107559 | 524, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107560 | 524, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107561 | 524, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107562 | 524, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107563 | 524, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 107564 | 0, // sub_32_subo64_then_sub_32 |
| 107565 | 0, // zsub_qsub1 |
| 107566 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107567 | 0, // zsub_qsub1_qsub2 |
| 107568 | 0, // zsub0_zsub1 |
| 107569 | 0, // zsub0_zsub1_zsub2 |
| 107570 | 0, // zsub1_zsub2 |
| 107571 | 0, // zsub1_zsub2_zsub3 |
| 107572 | 0, // zsub2_zsub3 |
| 107573 | 0, // zsub0_zsub2 |
| 107574 | 0, // zsub1_zsub3 |
| 107575 | }, |
| 107576 | { // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107577 | 0, // bsub |
| 107578 | 0, // bsub_hi |
| 107579 | 0, // dsub |
| 107580 | 0, // dsub0 |
| 107581 | 0, // dsub1 |
| 107582 | 0, // dsub2 |
| 107583 | 0, // dsub3 |
| 107584 | 0, // dsub_hi |
| 107585 | 0, // hsub |
| 107586 | 0, // hsub_hi |
| 107587 | 0, // psub |
| 107588 | 0, // psub0 |
| 107589 | 0, // psub1 |
| 107590 | 0, // qsub0 |
| 107591 | 0, // qsub1 |
| 107592 | 0, // qsub2 |
| 107593 | 0, // qsub3 |
| 107594 | 0, // ssub |
| 107595 | 0, // ssub_hi |
| 107596 | 525, // sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107597 | 525, // sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107598 | 0, // sube32 |
| 107599 | 0, // sube64 |
| 107600 | 0, // subo32 |
| 107601 | 0, // subo64 |
| 107602 | 525, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107603 | 525, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107604 | 525, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107605 | 525, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107606 | 525, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107607 | 525, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107608 | 525, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107609 | 525, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107610 | 0, // zasubb |
| 107611 | 0, // zasubd0 |
| 107612 | 0, // zasubd1 |
| 107613 | 0, // zasubh0 |
| 107614 | 0, // zasubh1 |
| 107615 | 0, // zasubq0 |
| 107616 | 0, // zasubq1 |
| 107617 | 0, // zasubs0 |
| 107618 | 0, // zasubs1 |
| 107619 | 0, // zsub |
| 107620 | 0, // zsub0 |
| 107621 | 0, // zsub1 |
| 107622 | 0, // zsub2 |
| 107623 | 0, // zsub3 |
| 107624 | 0, // zsub_hi |
| 107625 | 0, // zasubd1_then_zasubq0 |
| 107626 | 0, // zasubd1_then_zasubq1 |
| 107627 | 0, // zasubs1_then_zasubd0 |
| 107628 | 0, // zasubs1_then_zasubd1 |
| 107629 | 0, // zasubs1_then_zasubq0 |
| 107630 | 0, // zasubs1_then_zasubq1 |
| 107631 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107632 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107633 | 0, // zasubh1_then_zasubd0 |
| 107634 | 0, // zasubh1_then_zasubd1 |
| 107635 | 0, // zasubh1_then_zasubq0 |
| 107636 | 0, // zasubh1_then_zasubq1 |
| 107637 | 0, // zasubh1_then_zasubs0 |
| 107638 | 0, // zasubh1_then_zasubs1 |
| 107639 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107640 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107641 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107642 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107643 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107644 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107645 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107646 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107647 | 0, // dsub1_then_bsub |
| 107648 | 0, // dsub1_then_bsub_hi |
| 107649 | 0, // dsub1_then_hsub |
| 107650 | 0, // dsub1_then_hsub_hi |
| 107651 | 0, // dsub1_then_ssub |
| 107652 | 0, // dsub1_then_ssub_hi |
| 107653 | 0, // dsub3_then_bsub |
| 107654 | 0, // dsub3_then_bsub_hi |
| 107655 | 0, // dsub3_then_hsub |
| 107656 | 0, // dsub3_then_hsub_hi |
| 107657 | 0, // dsub3_then_ssub |
| 107658 | 0, // dsub3_then_ssub_hi |
| 107659 | 0, // dsub2_then_bsub |
| 107660 | 0, // dsub2_then_bsub_hi |
| 107661 | 0, // dsub2_then_hsub |
| 107662 | 0, // dsub2_then_hsub_hi |
| 107663 | 0, // dsub2_then_ssub |
| 107664 | 0, // dsub2_then_ssub_hi |
| 107665 | 0, // psub1_then_psub |
| 107666 | 0, // qsub1_then_dsub_hi |
| 107667 | 0, // qsub3_then_dsub_hi |
| 107668 | 0, // qsub2_then_dsub_hi |
| 107669 | 525, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107670 | 525, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107671 | 525, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107672 | 525, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107673 | 525, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107674 | 525, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107675 | 525, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107676 | 525, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107677 | 525, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107678 | 525, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107679 | 525, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107680 | 525, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107681 | 525, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107682 | 525, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107683 | 0, // subo64_then_sub_32 |
| 107684 | 0, // subo64_then_sub_32_hi |
| 107685 | 0, // zsub1_then_zsub_hi |
| 107686 | 0, // zsub3_then_zsub_hi |
| 107687 | 0, // zsub2_then_zsub_hi |
| 107688 | 0, // dsub0_dsub1 |
| 107689 | 0, // dsub0_dsub1_dsub2 |
| 107690 | 0, // dsub1_dsub2 |
| 107691 | 0, // dsub1_dsub2_dsub3 |
| 107692 | 0, // dsub2_dsub3 |
| 107693 | 0, // dsub_dsub1 |
| 107694 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107695 | 0, // dsub_dsub1_dsub2 |
| 107696 | 0, // qsub0_qsub1 |
| 107697 | 0, // qsub0_qsub1_qsub2 |
| 107698 | 0, // qsub1_qsub2 |
| 107699 | 0, // qsub1_qsub2_qsub3 |
| 107700 | 0, // qsub2_qsub3 |
| 107701 | 525, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107702 | 525, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107703 | 525, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107704 | 525, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107705 | 525, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107706 | 525, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107707 | 525, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107708 | 525, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 107709 | 0, // sub_32_subo64_then_sub_32 |
| 107710 | 0, // zsub_qsub1 |
| 107711 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107712 | 0, // zsub_qsub1_qsub2 |
| 107713 | 0, // zsub0_zsub1 |
| 107714 | 0, // zsub0_zsub1_zsub2 |
| 107715 | 0, // zsub1_zsub2 |
| 107716 | 0, // zsub1_zsub2_zsub3 |
| 107717 | 0, // zsub2_zsub3 |
| 107718 | 0, // zsub0_zsub2 |
| 107719 | 0, // zsub1_zsub3 |
| 107720 | }, |
| 107721 | { // GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107722 | 0, // bsub |
| 107723 | 0, // bsub_hi |
| 107724 | 0, // dsub |
| 107725 | 0, // dsub0 |
| 107726 | 0, // dsub1 |
| 107727 | 0, // dsub2 |
| 107728 | 0, // dsub3 |
| 107729 | 0, // dsub_hi |
| 107730 | 0, // hsub |
| 107731 | 0, // hsub_hi |
| 107732 | 0, // psub |
| 107733 | 0, // psub0 |
| 107734 | 0, // psub1 |
| 107735 | 0, // qsub0 |
| 107736 | 0, // qsub1 |
| 107737 | 0, // qsub2 |
| 107738 | 0, // qsub3 |
| 107739 | 0, // ssub |
| 107740 | 0, // ssub_hi |
| 107741 | 526, // sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107742 | 526, // sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107743 | 0, // sube32 |
| 107744 | 0, // sube64 |
| 107745 | 0, // subo32 |
| 107746 | 0, // subo64 |
| 107747 | 526, // x8sub_0 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107748 | 526, // x8sub_1 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107749 | 526, // x8sub_2 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107750 | 526, // x8sub_3 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107751 | 526, // x8sub_4 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107752 | 526, // x8sub_5 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107753 | 526, // x8sub_6 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107754 | 526, // x8sub_7 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107755 | 0, // zasubb |
| 107756 | 0, // zasubd0 |
| 107757 | 0, // zasubd1 |
| 107758 | 0, // zasubh0 |
| 107759 | 0, // zasubh1 |
| 107760 | 0, // zasubq0 |
| 107761 | 0, // zasubq1 |
| 107762 | 0, // zasubs0 |
| 107763 | 0, // zasubs1 |
| 107764 | 0, // zsub |
| 107765 | 0, // zsub0 |
| 107766 | 0, // zsub1 |
| 107767 | 0, // zsub2 |
| 107768 | 0, // zsub3 |
| 107769 | 0, // zsub_hi |
| 107770 | 0, // zasubd1_then_zasubq0 |
| 107771 | 0, // zasubd1_then_zasubq1 |
| 107772 | 0, // zasubs1_then_zasubd0 |
| 107773 | 0, // zasubs1_then_zasubd1 |
| 107774 | 0, // zasubs1_then_zasubq0 |
| 107775 | 0, // zasubs1_then_zasubq1 |
| 107776 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107777 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107778 | 0, // zasubh1_then_zasubd0 |
| 107779 | 0, // zasubh1_then_zasubd1 |
| 107780 | 0, // zasubh1_then_zasubq0 |
| 107781 | 0, // zasubh1_then_zasubq1 |
| 107782 | 0, // zasubh1_then_zasubs0 |
| 107783 | 0, // zasubh1_then_zasubs1 |
| 107784 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107785 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107786 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107787 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107788 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107789 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107790 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107791 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107792 | 0, // dsub1_then_bsub |
| 107793 | 0, // dsub1_then_bsub_hi |
| 107794 | 0, // dsub1_then_hsub |
| 107795 | 0, // dsub1_then_hsub_hi |
| 107796 | 0, // dsub1_then_ssub |
| 107797 | 0, // dsub1_then_ssub_hi |
| 107798 | 0, // dsub3_then_bsub |
| 107799 | 0, // dsub3_then_bsub_hi |
| 107800 | 0, // dsub3_then_hsub |
| 107801 | 0, // dsub3_then_hsub_hi |
| 107802 | 0, // dsub3_then_ssub |
| 107803 | 0, // dsub3_then_ssub_hi |
| 107804 | 0, // dsub2_then_bsub |
| 107805 | 0, // dsub2_then_bsub_hi |
| 107806 | 0, // dsub2_then_hsub |
| 107807 | 0, // dsub2_then_hsub_hi |
| 107808 | 0, // dsub2_then_ssub |
| 107809 | 0, // dsub2_then_ssub_hi |
| 107810 | 0, // psub1_then_psub |
| 107811 | 0, // qsub1_then_dsub_hi |
| 107812 | 0, // qsub3_then_dsub_hi |
| 107813 | 0, // qsub2_then_dsub_hi |
| 107814 | 526, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107815 | 526, // x8sub_7_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107816 | 526, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107817 | 526, // x8sub_6_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107818 | 526, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107819 | 526, // x8sub_5_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107820 | 526, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107821 | 526, // x8sub_4_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107822 | 526, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107823 | 526, // x8sub_3_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107824 | 526, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107825 | 526, // x8sub_2_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107826 | 526, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107827 | 526, // x8sub_1_then_sub_32_hi -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107828 | 0, // subo64_then_sub_32 |
| 107829 | 0, // subo64_then_sub_32_hi |
| 107830 | 0, // zsub1_then_zsub_hi |
| 107831 | 0, // zsub3_then_zsub_hi |
| 107832 | 0, // zsub2_then_zsub_hi |
| 107833 | 0, // dsub0_dsub1 |
| 107834 | 0, // dsub0_dsub1_dsub2 |
| 107835 | 0, // dsub1_dsub2 |
| 107836 | 0, // dsub1_dsub2_dsub3 |
| 107837 | 0, // dsub2_dsub3 |
| 107838 | 0, // dsub_dsub1 |
| 107839 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107840 | 0, // dsub_dsub1_dsub2 |
| 107841 | 0, // qsub0_qsub1 |
| 107842 | 0, // qsub0_qsub1_qsub2 |
| 107843 | 0, // qsub1_qsub2 |
| 107844 | 0, // qsub1_qsub2_qsub3 |
| 107845 | 0, // qsub2_qsub3 |
| 107846 | 526, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107847 | 526, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107848 | 526, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107849 | 526, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107850 | 526, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107851 | 526, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107852 | 526, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107853 | 526, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 107854 | 0, // sub_32_subo64_then_sub_32 |
| 107855 | 0, // zsub_qsub1 |
| 107856 | 0, // zsub_qsub1_qsub2_qsub3 |
| 107857 | 0, // zsub_qsub1_qsub2 |
| 107858 | 0, // zsub0_zsub1 |
| 107859 | 0, // zsub0_zsub1_zsub2 |
| 107860 | 0, // zsub1_zsub2 |
| 107861 | 0, // zsub1_zsub2_zsub3 |
| 107862 | 0, // zsub2_zsub3 |
| 107863 | 0, // zsub0_zsub2 |
| 107864 | 0, // zsub1_zsub3 |
| 107865 | }, |
| 107866 | { // ZTR |
| 107867 | 0, // bsub |
| 107868 | 0, // bsub_hi |
| 107869 | 0, // dsub |
| 107870 | 0, // dsub0 |
| 107871 | 0, // dsub1 |
| 107872 | 0, // dsub2 |
| 107873 | 0, // dsub3 |
| 107874 | 0, // dsub_hi |
| 107875 | 0, // hsub |
| 107876 | 0, // hsub_hi |
| 107877 | 0, // psub |
| 107878 | 0, // psub0 |
| 107879 | 0, // psub1 |
| 107880 | 0, // qsub0 |
| 107881 | 0, // qsub1 |
| 107882 | 0, // qsub2 |
| 107883 | 0, // qsub3 |
| 107884 | 0, // ssub |
| 107885 | 0, // ssub_hi |
| 107886 | 0, // sub_32 |
| 107887 | 0, // sub_32_hi |
| 107888 | 0, // sube32 |
| 107889 | 0, // sube64 |
| 107890 | 0, // subo32 |
| 107891 | 0, // subo64 |
| 107892 | 0, // x8sub_0 |
| 107893 | 0, // x8sub_1 |
| 107894 | 0, // x8sub_2 |
| 107895 | 0, // x8sub_3 |
| 107896 | 0, // x8sub_4 |
| 107897 | 0, // x8sub_5 |
| 107898 | 0, // x8sub_6 |
| 107899 | 0, // x8sub_7 |
| 107900 | 0, // zasubb |
| 107901 | 0, // zasubd0 |
| 107902 | 0, // zasubd1 |
| 107903 | 0, // zasubh0 |
| 107904 | 0, // zasubh1 |
| 107905 | 0, // zasubq0 |
| 107906 | 0, // zasubq1 |
| 107907 | 0, // zasubs0 |
| 107908 | 0, // zasubs1 |
| 107909 | 0, // zsub |
| 107910 | 0, // zsub0 |
| 107911 | 0, // zsub1 |
| 107912 | 0, // zsub2 |
| 107913 | 0, // zsub3 |
| 107914 | 0, // zsub_hi |
| 107915 | 0, // zasubd1_then_zasubq0 |
| 107916 | 0, // zasubd1_then_zasubq1 |
| 107917 | 0, // zasubs1_then_zasubd0 |
| 107918 | 0, // zasubs1_then_zasubd1 |
| 107919 | 0, // zasubs1_then_zasubq0 |
| 107920 | 0, // zasubs1_then_zasubq1 |
| 107921 | 0, // zasubs1_then_zasubd1_then_zasubq0 |
| 107922 | 0, // zasubs1_then_zasubd1_then_zasubq1 |
| 107923 | 0, // zasubh1_then_zasubd0 |
| 107924 | 0, // zasubh1_then_zasubd1 |
| 107925 | 0, // zasubh1_then_zasubq0 |
| 107926 | 0, // zasubh1_then_zasubq1 |
| 107927 | 0, // zasubh1_then_zasubs0 |
| 107928 | 0, // zasubh1_then_zasubs1 |
| 107929 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 107930 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 107931 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 107932 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 107933 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 107934 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 107935 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 107936 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 107937 | 0, // dsub1_then_bsub |
| 107938 | 0, // dsub1_then_bsub_hi |
| 107939 | 0, // dsub1_then_hsub |
| 107940 | 0, // dsub1_then_hsub_hi |
| 107941 | 0, // dsub1_then_ssub |
| 107942 | 0, // dsub1_then_ssub_hi |
| 107943 | 0, // dsub3_then_bsub |
| 107944 | 0, // dsub3_then_bsub_hi |
| 107945 | 0, // dsub3_then_hsub |
| 107946 | 0, // dsub3_then_hsub_hi |
| 107947 | 0, // dsub3_then_ssub |
| 107948 | 0, // dsub3_then_ssub_hi |
| 107949 | 0, // dsub2_then_bsub |
| 107950 | 0, // dsub2_then_bsub_hi |
| 107951 | 0, // dsub2_then_hsub |
| 107952 | 0, // dsub2_then_hsub_hi |
| 107953 | 0, // dsub2_then_ssub |
| 107954 | 0, // dsub2_then_ssub_hi |
| 107955 | 0, // psub1_then_psub |
| 107956 | 0, // qsub1_then_dsub_hi |
| 107957 | 0, // qsub3_then_dsub_hi |
| 107958 | 0, // qsub2_then_dsub_hi |
| 107959 | 0, // x8sub_7_then_sub_32 |
| 107960 | 0, // x8sub_7_then_sub_32_hi |
| 107961 | 0, // x8sub_6_then_sub_32 |
| 107962 | 0, // x8sub_6_then_sub_32_hi |
| 107963 | 0, // x8sub_5_then_sub_32 |
| 107964 | 0, // x8sub_5_then_sub_32_hi |
| 107965 | 0, // x8sub_4_then_sub_32 |
| 107966 | 0, // x8sub_4_then_sub_32_hi |
| 107967 | 0, // x8sub_3_then_sub_32 |
| 107968 | 0, // x8sub_3_then_sub_32_hi |
| 107969 | 0, // x8sub_2_then_sub_32 |
| 107970 | 0, // x8sub_2_then_sub_32_hi |
| 107971 | 0, // x8sub_1_then_sub_32 |
| 107972 | 0, // x8sub_1_then_sub_32_hi |
| 107973 | 0, // subo64_then_sub_32 |
| 107974 | 0, // subo64_then_sub_32_hi |
| 107975 | 0, // zsub1_then_zsub_hi |
| 107976 | 0, // zsub3_then_zsub_hi |
| 107977 | 0, // zsub2_then_zsub_hi |
| 107978 | 0, // dsub0_dsub1 |
| 107979 | 0, // dsub0_dsub1_dsub2 |
| 107980 | 0, // dsub1_dsub2 |
| 107981 | 0, // dsub1_dsub2_dsub3 |
| 107982 | 0, // dsub2_dsub3 |
| 107983 | 0, // dsub_dsub1 |
| 107984 | 0, // dsub_dsub1_dsub2_dsub3 |
| 107985 | 0, // dsub_dsub1_dsub2 |
| 107986 | 0, // qsub0_qsub1 |
| 107987 | 0, // qsub0_qsub1_qsub2 |
| 107988 | 0, // qsub1_qsub2 |
| 107989 | 0, // qsub1_qsub2_qsub3 |
| 107990 | 0, // qsub2_qsub3 |
| 107991 | 0, // sub_32_x8sub_1_then_sub_32 |
| 107992 | 0, // x8sub_0_x8sub_1 |
| 107993 | 0, // x8sub_2_x8sub_3 |
| 107994 | 0, // x8sub_4_x8sub_5 |
| 107995 | 0, // x8sub_6_x8sub_7 |
| 107996 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 107997 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 107998 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 107999 | 0, // sub_32_subo64_then_sub_32 |
| 108000 | 0, // zsub_qsub1 |
| 108001 | 0, // zsub_qsub1_qsub2_qsub3 |
| 108002 | 0, // zsub_qsub1_qsub2 |
| 108003 | 0, // zsub0_zsub1 |
| 108004 | 0, // zsub0_zsub1_zsub2 |
| 108005 | 0, // zsub1_zsub2 |
| 108006 | 0, // zsub1_zsub2_zsub3 |
| 108007 | 0, // zsub2_zsub3 |
| 108008 | 0, // zsub0_zsub2 |
| 108009 | 0, // zsub1_zsub3 |
| 108010 | }, |
| 108011 | { // MPR16 |
| 108012 | 0, // bsub |
| 108013 | 0, // bsub_hi |
| 108014 | 0, // dsub |
| 108015 | 0, // dsub0 |
| 108016 | 0, // dsub1 |
| 108017 | 0, // dsub2 |
| 108018 | 0, // dsub3 |
| 108019 | 0, // dsub_hi |
| 108020 | 0, // hsub |
| 108021 | 0, // hsub_hi |
| 108022 | 0, // psub |
| 108023 | 0, // psub0 |
| 108024 | 0, // psub1 |
| 108025 | 0, // qsub0 |
| 108026 | 0, // qsub1 |
| 108027 | 0, // qsub2 |
| 108028 | 0, // qsub3 |
| 108029 | 0, // ssub |
| 108030 | 0, // ssub_hi |
| 108031 | 0, // sub_32 |
| 108032 | 0, // sub_32_hi |
| 108033 | 0, // sube32 |
| 108034 | 0, // sube64 |
| 108035 | 0, // subo32 |
| 108036 | 0, // subo64 |
| 108037 | 0, // x8sub_0 |
| 108038 | 0, // x8sub_1 |
| 108039 | 0, // x8sub_2 |
| 108040 | 0, // x8sub_3 |
| 108041 | 0, // x8sub_4 |
| 108042 | 0, // x8sub_5 |
| 108043 | 0, // x8sub_6 |
| 108044 | 0, // x8sub_7 |
| 108045 | 0, // zasubb |
| 108046 | 528, // zasubd0 -> MPR16 |
| 108047 | 528, // zasubd1 -> MPR16 |
| 108048 | 0, // zasubh0 |
| 108049 | 0, // zasubh1 |
| 108050 | 528, // zasubq0 -> MPR16 |
| 108051 | 528, // zasubq1 -> MPR16 |
| 108052 | 528, // zasubs0 -> MPR16 |
| 108053 | 528, // zasubs1 -> MPR16 |
| 108054 | 0, // zsub |
| 108055 | 0, // zsub0 |
| 108056 | 0, // zsub1 |
| 108057 | 0, // zsub2 |
| 108058 | 0, // zsub3 |
| 108059 | 0, // zsub_hi |
| 108060 | 528, // zasubd1_then_zasubq0 -> MPR16 |
| 108061 | 528, // zasubd1_then_zasubq1 -> MPR16 |
| 108062 | 528, // zasubs1_then_zasubd0 -> MPR16 |
| 108063 | 528, // zasubs1_then_zasubd1 -> MPR16 |
| 108064 | 528, // zasubs1_then_zasubq0 -> MPR16 |
| 108065 | 528, // zasubs1_then_zasubq1 -> MPR16 |
| 108066 | 528, // zasubs1_then_zasubd1_then_zasubq0 -> MPR16 |
| 108067 | 528, // zasubs1_then_zasubd1_then_zasubq1 -> MPR16 |
| 108068 | 0, // zasubh1_then_zasubd0 |
| 108069 | 0, // zasubh1_then_zasubd1 |
| 108070 | 0, // zasubh1_then_zasubq0 |
| 108071 | 0, // zasubh1_then_zasubq1 |
| 108072 | 0, // zasubh1_then_zasubs0 |
| 108073 | 0, // zasubh1_then_zasubs1 |
| 108074 | 0, // zasubh1_then_zasubd1_then_zasubq0 |
| 108075 | 0, // zasubh1_then_zasubd1_then_zasubq1 |
| 108076 | 0, // zasubh1_then_zasubs1_then_zasubd0 |
| 108077 | 0, // zasubh1_then_zasubs1_then_zasubd1 |
| 108078 | 0, // zasubh1_then_zasubs1_then_zasubq0 |
| 108079 | 0, // zasubh1_then_zasubs1_then_zasubq1 |
| 108080 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 108081 | 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 108082 | 0, // dsub1_then_bsub |
| 108083 | 0, // dsub1_then_bsub_hi |
| 108084 | 0, // dsub1_then_hsub |
| 108085 | 0, // dsub1_then_hsub_hi |
| 108086 | 0, // dsub1_then_ssub |
| 108087 | 0, // dsub1_then_ssub_hi |
| 108088 | 0, // dsub3_then_bsub |
| 108089 | 0, // dsub3_then_bsub_hi |
| 108090 | 0, // dsub3_then_hsub |
| 108091 | 0, // dsub3_then_hsub_hi |
| 108092 | 0, // dsub3_then_ssub |
| 108093 | 0, // dsub3_then_ssub_hi |
| 108094 | 0, // dsub2_then_bsub |
| 108095 | 0, // dsub2_then_bsub_hi |
| 108096 | 0, // dsub2_then_hsub |
| 108097 | 0, // dsub2_then_hsub_hi |
| 108098 | 0, // dsub2_then_ssub |
| 108099 | 0, // dsub2_then_ssub_hi |
| 108100 | 0, // psub1_then_psub |
| 108101 | 0, // qsub1_then_dsub_hi |
| 108102 | 0, // qsub3_then_dsub_hi |
| 108103 | 0, // qsub2_then_dsub_hi |
| 108104 | 0, // x8sub_7_then_sub_32 |
| 108105 | 0, // x8sub_7_then_sub_32_hi |
| 108106 | 0, // x8sub_6_then_sub_32 |
| 108107 | 0, // x8sub_6_then_sub_32_hi |
| 108108 | 0, // x8sub_5_then_sub_32 |
| 108109 | 0, // x8sub_5_then_sub_32_hi |
| 108110 | 0, // x8sub_4_then_sub_32 |
| 108111 | 0, // x8sub_4_then_sub_32_hi |
| 108112 | 0, // x8sub_3_then_sub_32 |
| 108113 | 0, // x8sub_3_then_sub_32_hi |
| 108114 | 0, // x8sub_2_then_sub_32 |
| 108115 | 0, // x8sub_2_then_sub_32_hi |
| 108116 | 0, // x8sub_1_then_sub_32 |
| 108117 | 0, // x8sub_1_then_sub_32_hi |
| 108118 | 0, // subo64_then_sub_32 |
| 108119 | 0, // subo64_then_sub_32_hi |
| 108120 | 0, // zsub1_then_zsub_hi |
| 108121 | 0, // zsub3_then_zsub_hi |
| 108122 | 0, // zsub2_then_zsub_hi |
| 108123 | 0, // dsub0_dsub1 |
| 108124 | 0, // dsub0_dsub1_dsub2 |
| 108125 | 0, // dsub1_dsub2 |
| 108126 | 0, // dsub1_dsub2_dsub3 |
| 108127 | 0, // dsub2_dsub3 |
| 108128 | 0, // dsub_dsub1 |
| 108129 | 0, // dsub_dsub1_dsub2_dsub3 |
| 108130 | 0, // dsub_dsub1_dsub2 |
| 108131 | 0, // qsub0_qsub1 |
| 108132 | 0, // qsub0_qsub1_qsub2 |
| 108133 | 0, // qsub1_qsub2 |
| 108134 | 0, // qsub1_qsub2_qsub3 |
| 108135 | 0, // qsub2_qsub3 |
| 108136 | 0, // sub_32_x8sub_1_then_sub_32 |
| 108137 | 0, // x8sub_0_x8sub_1 |
| 108138 | 0, // x8sub_2_x8sub_3 |
| 108139 | 0, // x8sub_4_x8sub_5 |
| 108140 | 0, // x8sub_6_x8sub_7 |
| 108141 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108142 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108143 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108144 | 0, // sub_32_subo64_then_sub_32 |
| 108145 | 0, // zsub_qsub1 |
| 108146 | 0, // zsub_qsub1_qsub2_qsub3 |
| 108147 | 0, // zsub_qsub1_qsub2 |
| 108148 | 0, // zsub0_zsub1 |
| 108149 | 0, // zsub0_zsub1_zsub2 |
| 108150 | 0, // zsub1_zsub2 |
| 108151 | 0, // zsub1_zsub2_zsub3 |
| 108152 | 0, // zsub2_zsub3 |
| 108153 | 0, // zsub0_zsub2 |
| 108154 | 0, // zsub1_zsub3 |
| 108155 | }, |
| 108156 | { // MPR |
| 108157 | 0, // bsub |
| 108158 | 0, // bsub_hi |
| 108159 | 0, // dsub |
| 108160 | 0, // dsub0 |
| 108161 | 0, // dsub1 |
| 108162 | 0, // dsub2 |
| 108163 | 0, // dsub3 |
| 108164 | 0, // dsub_hi |
| 108165 | 0, // hsub |
| 108166 | 0, // hsub_hi |
| 108167 | 0, // psub |
| 108168 | 0, // psub0 |
| 108169 | 0, // psub1 |
| 108170 | 0, // qsub0 |
| 108171 | 0, // qsub1 |
| 108172 | 0, // qsub2 |
| 108173 | 0, // qsub3 |
| 108174 | 0, // ssub |
| 108175 | 0, // ssub_hi |
| 108176 | 0, // sub_32 |
| 108177 | 0, // sub_32_hi |
| 108178 | 0, // sube32 |
| 108179 | 0, // sube64 |
| 108180 | 0, // subo32 |
| 108181 | 0, // subo64 |
| 108182 | 0, // x8sub_0 |
| 108183 | 0, // x8sub_1 |
| 108184 | 0, // x8sub_2 |
| 108185 | 0, // x8sub_3 |
| 108186 | 0, // x8sub_4 |
| 108187 | 0, // x8sub_5 |
| 108188 | 0, // x8sub_6 |
| 108189 | 0, // x8sub_7 |
| 108190 | 529, // zasubb -> MPR |
| 108191 | 529, // zasubd0 -> MPR |
| 108192 | 529, // zasubd1 -> MPR |
| 108193 | 529, // zasubh0 -> MPR |
| 108194 | 529, // zasubh1 -> MPR |
| 108195 | 529, // zasubq0 -> MPR |
| 108196 | 529, // zasubq1 -> MPR |
| 108197 | 529, // zasubs0 -> MPR |
| 108198 | 529, // zasubs1 -> MPR |
| 108199 | 0, // zsub |
| 108200 | 0, // zsub0 |
| 108201 | 0, // zsub1 |
| 108202 | 0, // zsub2 |
| 108203 | 0, // zsub3 |
| 108204 | 0, // zsub_hi |
| 108205 | 529, // zasubd1_then_zasubq0 -> MPR |
| 108206 | 529, // zasubd1_then_zasubq1 -> MPR |
| 108207 | 529, // zasubs1_then_zasubd0 -> MPR |
| 108208 | 529, // zasubs1_then_zasubd1 -> MPR |
| 108209 | 529, // zasubs1_then_zasubq0 -> MPR |
| 108210 | 529, // zasubs1_then_zasubq1 -> MPR |
| 108211 | 529, // zasubs1_then_zasubd1_then_zasubq0 -> MPR |
| 108212 | 529, // zasubs1_then_zasubd1_then_zasubq1 -> MPR |
| 108213 | 529, // zasubh1_then_zasubd0 -> MPR |
| 108214 | 529, // zasubh1_then_zasubd1 -> MPR |
| 108215 | 529, // zasubh1_then_zasubq0 -> MPR |
| 108216 | 529, // zasubh1_then_zasubq1 -> MPR |
| 108217 | 529, // zasubh1_then_zasubs0 -> MPR |
| 108218 | 529, // zasubh1_then_zasubs1 -> MPR |
| 108219 | 529, // zasubh1_then_zasubd1_then_zasubq0 -> MPR |
| 108220 | 529, // zasubh1_then_zasubd1_then_zasubq1 -> MPR |
| 108221 | 529, // zasubh1_then_zasubs1_then_zasubd0 -> MPR |
| 108222 | 529, // zasubh1_then_zasubs1_then_zasubd1 -> MPR |
| 108223 | 529, // zasubh1_then_zasubs1_then_zasubq0 -> MPR |
| 108224 | 529, // zasubh1_then_zasubs1_then_zasubq1 -> MPR |
| 108225 | 529, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR |
| 108226 | 529, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR |
| 108227 | 0, // dsub1_then_bsub |
| 108228 | 0, // dsub1_then_bsub_hi |
| 108229 | 0, // dsub1_then_hsub |
| 108230 | 0, // dsub1_then_hsub_hi |
| 108231 | 0, // dsub1_then_ssub |
| 108232 | 0, // dsub1_then_ssub_hi |
| 108233 | 0, // dsub3_then_bsub |
| 108234 | 0, // dsub3_then_bsub_hi |
| 108235 | 0, // dsub3_then_hsub |
| 108236 | 0, // dsub3_then_hsub_hi |
| 108237 | 0, // dsub3_then_ssub |
| 108238 | 0, // dsub3_then_ssub_hi |
| 108239 | 0, // dsub2_then_bsub |
| 108240 | 0, // dsub2_then_bsub_hi |
| 108241 | 0, // dsub2_then_hsub |
| 108242 | 0, // dsub2_then_hsub_hi |
| 108243 | 0, // dsub2_then_ssub |
| 108244 | 0, // dsub2_then_ssub_hi |
| 108245 | 0, // psub1_then_psub |
| 108246 | 0, // qsub1_then_dsub_hi |
| 108247 | 0, // qsub3_then_dsub_hi |
| 108248 | 0, // qsub2_then_dsub_hi |
| 108249 | 0, // x8sub_7_then_sub_32 |
| 108250 | 0, // x8sub_7_then_sub_32_hi |
| 108251 | 0, // x8sub_6_then_sub_32 |
| 108252 | 0, // x8sub_6_then_sub_32_hi |
| 108253 | 0, // x8sub_5_then_sub_32 |
| 108254 | 0, // x8sub_5_then_sub_32_hi |
| 108255 | 0, // x8sub_4_then_sub_32 |
| 108256 | 0, // x8sub_4_then_sub_32_hi |
| 108257 | 0, // x8sub_3_then_sub_32 |
| 108258 | 0, // x8sub_3_then_sub_32_hi |
| 108259 | 0, // x8sub_2_then_sub_32 |
| 108260 | 0, // x8sub_2_then_sub_32_hi |
| 108261 | 0, // x8sub_1_then_sub_32 |
| 108262 | 0, // x8sub_1_then_sub_32_hi |
| 108263 | 0, // subo64_then_sub_32 |
| 108264 | 0, // subo64_then_sub_32_hi |
| 108265 | 0, // zsub1_then_zsub_hi |
| 108266 | 0, // zsub3_then_zsub_hi |
| 108267 | 0, // zsub2_then_zsub_hi |
| 108268 | 0, // dsub0_dsub1 |
| 108269 | 0, // dsub0_dsub1_dsub2 |
| 108270 | 0, // dsub1_dsub2 |
| 108271 | 0, // dsub1_dsub2_dsub3 |
| 108272 | 0, // dsub2_dsub3 |
| 108273 | 0, // dsub_dsub1 |
| 108274 | 0, // dsub_dsub1_dsub2_dsub3 |
| 108275 | 0, // dsub_dsub1_dsub2 |
| 108276 | 0, // qsub0_qsub1 |
| 108277 | 0, // qsub0_qsub1_qsub2 |
| 108278 | 0, // qsub1_qsub2 |
| 108279 | 0, // qsub1_qsub2_qsub3 |
| 108280 | 0, // qsub2_qsub3 |
| 108281 | 0, // sub_32_x8sub_1_then_sub_32 |
| 108282 | 0, // x8sub_0_x8sub_1 |
| 108283 | 0, // x8sub_2_x8sub_3 |
| 108284 | 0, // x8sub_4_x8sub_5 |
| 108285 | 0, // x8sub_6_x8sub_7 |
| 108286 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108287 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108288 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108289 | 0, // sub_32_subo64_then_sub_32 |
| 108290 | 0, // zsub_qsub1 |
| 108291 | 0, // zsub_qsub1_qsub2_qsub3 |
| 108292 | 0, // zsub_qsub1_qsub2 |
| 108293 | 0, // zsub0_zsub1 |
| 108294 | 0, // zsub0_zsub1_zsub2 |
| 108295 | 0, // zsub1_zsub2 |
| 108296 | 0, // zsub1_zsub2_zsub3 |
| 108297 | 0, // zsub2_zsub3 |
| 108298 | 0, // zsub0_zsub2 |
| 108299 | 0, // zsub1_zsub3 |
| 108300 | }, |
| 108301 | { // MPR8 |
| 108302 | 0, // bsub |
| 108303 | 0, // bsub_hi |
| 108304 | 0, // dsub |
| 108305 | 0, // dsub0 |
| 108306 | 0, // dsub1 |
| 108307 | 0, // dsub2 |
| 108308 | 0, // dsub3 |
| 108309 | 0, // dsub_hi |
| 108310 | 0, // hsub |
| 108311 | 0, // hsub_hi |
| 108312 | 0, // psub |
| 108313 | 0, // psub0 |
| 108314 | 0, // psub1 |
| 108315 | 0, // qsub0 |
| 108316 | 0, // qsub1 |
| 108317 | 0, // qsub2 |
| 108318 | 0, // qsub3 |
| 108319 | 0, // ssub |
| 108320 | 0, // ssub_hi |
| 108321 | 0, // sub_32 |
| 108322 | 0, // sub_32_hi |
| 108323 | 0, // sube32 |
| 108324 | 0, // sube64 |
| 108325 | 0, // subo32 |
| 108326 | 0, // subo64 |
| 108327 | 0, // x8sub_0 |
| 108328 | 0, // x8sub_1 |
| 108329 | 0, // x8sub_2 |
| 108330 | 0, // x8sub_3 |
| 108331 | 0, // x8sub_4 |
| 108332 | 0, // x8sub_5 |
| 108333 | 0, // x8sub_6 |
| 108334 | 0, // x8sub_7 |
| 108335 | 0, // zasubb |
| 108336 | 530, // zasubd0 -> MPR8 |
| 108337 | 530, // zasubd1 -> MPR8 |
| 108338 | 530, // zasubh0 -> MPR8 |
| 108339 | 530, // zasubh1 -> MPR8 |
| 108340 | 530, // zasubq0 -> MPR8 |
| 108341 | 530, // zasubq1 -> MPR8 |
| 108342 | 530, // zasubs0 -> MPR8 |
| 108343 | 530, // zasubs1 -> MPR8 |
| 108344 | 0, // zsub |
| 108345 | 0, // zsub0 |
| 108346 | 0, // zsub1 |
| 108347 | 0, // zsub2 |
| 108348 | 0, // zsub3 |
| 108349 | 0, // zsub_hi |
| 108350 | 530, // zasubd1_then_zasubq0 -> MPR8 |
| 108351 | 530, // zasubd1_then_zasubq1 -> MPR8 |
| 108352 | 530, // zasubs1_then_zasubd0 -> MPR8 |
| 108353 | 530, // zasubs1_then_zasubd1 -> MPR8 |
| 108354 | 530, // zasubs1_then_zasubq0 -> MPR8 |
| 108355 | 530, // zasubs1_then_zasubq1 -> MPR8 |
| 108356 | 530, // zasubs1_then_zasubd1_then_zasubq0 -> MPR8 |
| 108357 | 530, // zasubs1_then_zasubd1_then_zasubq1 -> MPR8 |
| 108358 | 530, // zasubh1_then_zasubd0 -> MPR8 |
| 108359 | 530, // zasubh1_then_zasubd1 -> MPR8 |
| 108360 | 530, // zasubh1_then_zasubq0 -> MPR8 |
| 108361 | 530, // zasubh1_then_zasubq1 -> MPR8 |
| 108362 | 530, // zasubh1_then_zasubs0 -> MPR8 |
| 108363 | 530, // zasubh1_then_zasubs1 -> MPR8 |
| 108364 | 530, // zasubh1_then_zasubd1_then_zasubq0 -> MPR8 |
| 108365 | 530, // zasubh1_then_zasubd1_then_zasubq1 -> MPR8 |
| 108366 | 530, // zasubh1_then_zasubs1_then_zasubd0 -> MPR8 |
| 108367 | 530, // zasubh1_then_zasubs1_then_zasubd1 -> MPR8 |
| 108368 | 530, // zasubh1_then_zasubs1_then_zasubq0 -> MPR8 |
| 108369 | 530, // zasubh1_then_zasubs1_then_zasubq1 -> MPR8 |
| 108370 | 530, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR8 |
| 108371 | 530, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR8 |
| 108372 | 0, // dsub1_then_bsub |
| 108373 | 0, // dsub1_then_bsub_hi |
| 108374 | 0, // dsub1_then_hsub |
| 108375 | 0, // dsub1_then_hsub_hi |
| 108376 | 0, // dsub1_then_ssub |
| 108377 | 0, // dsub1_then_ssub_hi |
| 108378 | 0, // dsub3_then_bsub |
| 108379 | 0, // dsub3_then_bsub_hi |
| 108380 | 0, // dsub3_then_hsub |
| 108381 | 0, // dsub3_then_hsub_hi |
| 108382 | 0, // dsub3_then_ssub |
| 108383 | 0, // dsub3_then_ssub_hi |
| 108384 | 0, // dsub2_then_bsub |
| 108385 | 0, // dsub2_then_bsub_hi |
| 108386 | 0, // dsub2_then_hsub |
| 108387 | 0, // dsub2_then_hsub_hi |
| 108388 | 0, // dsub2_then_ssub |
| 108389 | 0, // dsub2_then_ssub_hi |
| 108390 | 0, // psub1_then_psub |
| 108391 | 0, // qsub1_then_dsub_hi |
| 108392 | 0, // qsub3_then_dsub_hi |
| 108393 | 0, // qsub2_then_dsub_hi |
| 108394 | 0, // x8sub_7_then_sub_32 |
| 108395 | 0, // x8sub_7_then_sub_32_hi |
| 108396 | 0, // x8sub_6_then_sub_32 |
| 108397 | 0, // x8sub_6_then_sub_32_hi |
| 108398 | 0, // x8sub_5_then_sub_32 |
| 108399 | 0, // x8sub_5_then_sub_32_hi |
| 108400 | 0, // x8sub_4_then_sub_32 |
| 108401 | 0, // x8sub_4_then_sub_32_hi |
| 108402 | 0, // x8sub_3_then_sub_32 |
| 108403 | 0, // x8sub_3_then_sub_32_hi |
| 108404 | 0, // x8sub_2_then_sub_32 |
| 108405 | 0, // x8sub_2_then_sub_32_hi |
| 108406 | 0, // x8sub_1_then_sub_32 |
| 108407 | 0, // x8sub_1_then_sub_32_hi |
| 108408 | 0, // subo64_then_sub_32 |
| 108409 | 0, // subo64_then_sub_32_hi |
| 108410 | 0, // zsub1_then_zsub_hi |
| 108411 | 0, // zsub3_then_zsub_hi |
| 108412 | 0, // zsub2_then_zsub_hi |
| 108413 | 0, // dsub0_dsub1 |
| 108414 | 0, // dsub0_dsub1_dsub2 |
| 108415 | 0, // dsub1_dsub2 |
| 108416 | 0, // dsub1_dsub2_dsub3 |
| 108417 | 0, // dsub2_dsub3 |
| 108418 | 0, // dsub_dsub1 |
| 108419 | 0, // dsub_dsub1_dsub2_dsub3 |
| 108420 | 0, // dsub_dsub1_dsub2 |
| 108421 | 0, // qsub0_qsub1 |
| 108422 | 0, // qsub0_qsub1_qsub2 |
| 108423 | 0, // qsub1_qsub2 |
| 108424 | 0, // qsub1_qsub2_qsub3 |
| 108425 | 0, // qsub2_qsub3 |
| 108426 | 0, // sub_32_x8sub_1_then_sub_32 |
| 108427 | 0, // x8sub_0_x8sub_1 |
| 108428 | 0, // x8sub_2_x8sub_3 |
| 108429 | 0, // x8sub_4_x8sub_5 |
| 108430 | 0, // x8sub_6_x8sub_7 |
| 108431 | 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108432 | 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108433 | 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108434 | 0, // sub_32_subo64_then_sub_32 |
| 108435 | 0, // zsub_qsub1 |
| 108436 | 0, // zsub_qsub1_qsub2_qsub3 |
| 108437 | 0, // zsub_qsub1_qsub2 |
| 108438 | 0, // zsub0_zsub1 |
| 108439 | 0, // zsub0_zsub1_zsub2 |
| 108440 | 0, // zsub1_zsub2 |
| 108441 | 0, // zsub1_zsub2_zsub3 |
| 108442 | 0, // zsub2_zsub3 |
| 108443 | 0, // zsub0_zsub2 |
| 108444 | 0, // zsub1_zsub3 |
| 108445 | }, |
| 108446 | }; |
| 108447 | assert(RC && "Missing regclass"); |
| 108448 | if (!Idx) return RC; |
| 108449 | --Idx; |
| 108450 | assert(Idx < 143 && "Bad subreg"); |
| 108451 | unsigned TV = Table[RC->getID()][Idx]; |
| 108452 | return TV ? getRegClass(TV - 1) : nullptr; |
| 108453 | } |
| 108454 | |
| 108455 | const TargetRegisterClass *AArch64GenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const { |
| 108456 | static const uint16_t Table[530][143] = { |
| 108457 | { // W_HI_DummyRC |
| 108458 | 0, // W_HI_DummyRC:bsub |
| 108459 | 0, // W_HI_DummyRC:bsub_hi |
| 108460 | 0, // W_HI_DummyRC:dsub |
| 108461 | 0, // W_HI_DummyRC:dsub0 |
| 108462 | 0, // W_HI_DummyRC:dsub1 |
| 108463 | 0, // W_HI_DummyRC:dsub2 |
| 108464 | 0, // W_HI_DummyRC:dsub3 |
| 108465 | 0, // W_HI_DummyRC:dsub_hi |
| 108466 | 0, // W_HI_DummyRC:hsub |
| 108467 | 0, // W_HI_DummyRC:hsub_hi |
| 108468 | 0, // W_HI_DummyRC:psub |
| 108469 | 0, // W_HI_DummyRC:psub0 |
| 108470 | 0, // W_HI_DummyRC:psub1 |
| 108471 | 0, // W_HI_DummyRC:qsub0 |
| 108472 | 0, // W_HI_DummyRC:qsub1 |
| 108473 | 0, // W_HI_DummyRC:qsub2 |
| 108474 | 0, // W_HI_DummyRC:qsub3 |
| 108475 | 0, // W_HI_DummyRC:ssub |
| 108476 | 0, // W_HI_DummyRC:ssub_hi |
| 108477 | 0, // W_HI_DummyRC:sub_32 |
| 108478 | 0, // W_HI_DummyRC:sub_32_hi |
| 108479 | 0, // W_HI_DummyRC:sube32 |
| 108480 | 0, // W_HI_DummyRC:sube64 |
| 108481 | 0, // W_HI_DummyRC:subo32 |
| 108482 | 0, // W_HI_DummyRC:subo64 |
| 108483 | 0, // W_HI_DummyRC:x8sub_0 |
| 108484 | 0, // W_HI_DummyRC:x8sub_1 |
| 108485 | 0, // W_HI_DummyRC:x8sub_2 |
| 108486 | 0, // W_HI_DummyRC:x8sub_3 |
| 108487 | 0, // W_HI_DummyRC:x8sub_4 |
| 108488 | 0, // W_HI_DummyRC:x8sub_5 |
| 108489 | 0, // W_HI_DummyRC:x8sub_6 |
| 108490 | 0, // W_HI_DummyRC:x8sub_7 |
| 108491 | 0, // W_HI_DummyRC:zasubb |
| 108492 | 0, // W_HI_DummyRC:zasubd0 |
| 108493 | 0, // W_HI_DummyRC:zasubd1 |
| 108494 | 0, // W_HI_DummyRC:zasubh0 |
| 108495 | 0, // W_HI_DummyRC:zasubh1 |
| 108496 | 0, // W_HI_DummyRC:zasubq0 |
| 108497 | 0, // W_HI_DummyRC:zasubq1 |
| 108498 | 0, // W_HI_DummyRC:zasubs0 |
| 108499 | 0, // W_HI_DummyRC:zasubs1 |
| 108500 | 0, // W_HI_DummyRC:zsub |
| 108501 | 0, // W_HI_DummyRC:zsub0 |
| 108502 | 0, // W_HI_DummyRC:zsub1 |
| 108503 | 0, // W_HI_DummyRC:zsub2 |
| 108504 | 0, // W_HI_DummyRC:zsub3 |
| 108505 | 0, // W_HI_DummyRC:zsub_hi |
| 108506 | 0, // W_HI_DummyRC:zasubd1_then_zasubq0 |
| 108507 | 0, // W_HI_DummyRC:zasubd1_then_zasubq1 |
| 108508 | 0, // W_HI_DummyRC:zasubs1_then_zasubd0 |
| 108509 | 0, // W_HI_DummyRC:zasubs1_then_zasubd1 |
| 108510 | 0, // W_HI_DummyRC:zasubs1_then_zasubq0 |
| 108511 | 0, // W_HI_DummyRC:zasubs1_then_zasubq1 |
| 108512 | 0, // W_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 108513 | 0, // W_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 108514 | 0, // W_HI_DummyRC:zasubh1_then_zasubd0 |
| 108515 | 0, // W_HI_DummyRC:zasubh1_then_zasubd1 |
| 108516 | 0, // W_HI_DummyRC:zasubh1_then_zasubq0 |
| 108517 | 0, // W_HI_DummyRC:zasubh1_then_zasubq1 |
| 108518 | 0, // W_HI_DummyRC:zasubh1_then_zasubs0 |
| 108519 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1 |
| 108520 | 0, // W_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 108521 | 0, // W_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 108522 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 108523 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 108524 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 108525 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 108526 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 108527 | 0, // W_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 108528 | 0, // W_HI_DummyRC:dsub1_then_bsub |
| 108529 | 0, // W_HI_DummyRC:dsub1_then_bsub_hi |
| 108530 | 0, // W_HI_DummyRC:dsub1_then_hsub |
| 108531 | 0, // W_HI_DummyRC:dsub1_then_hsub_hi |
| 108532 | 0, // W_HI_DummyRC:dsub1_then_ssub |
| 108533 | 0, // W_HI_DummyRC:dsub1_then_ssub_hi |
| 108534 | 0, // W_HI_DummyRC:dsub3_then_bsub |
| 108535 | 0, // W_HI_DummyRC:dsub3_then_bsub_hi |
| 108536 | 0, // W_HI_DummyRC:dsub3_then_hsub |
| 108537 | 0, // W_HI_DummyRC:dsub3_then_hsub_hi |
| 108538 | 0, // W_HI_DummyRC:dsub3_then_ssub |
| 108539 | 0, // W_HI_DummyRC:dsub3_then_ssub_hi |
| 108540 | 0, // W_HI_DummyRC:dsub2_then_bsub |
| 108541 | 0, // W_HI_DummyRC:dsub2_then_bsub_hi |
| 108542 | 0, // W_HI_DummyRC:dsub2_then_hsub |
| 108543 | 0, // W_HI_DummyRC:dsub2_then_hsub_hi |
| 108544 | 0, // W_HI_DummyRC:dsub2_then_ssub |
| 108545 | 0, // W_HI_DummyRC:dsub2_then_ssub_hi |
| 108546 | 0, // W_HI_DummyRC:psub1_then_psub |
| 108547 | 0, // W_HI_DummyRC:qsub1_then_dsub_hi |
| 108548 | 0, // W_HI_DummyRC:qsub3_then_dsub_hi |
| 108549 | 0, // W_HI_DummyRC:qsub2_then_dsub_hi |
| 108550 | 0, // W_HI_DummyRC:x8sub_7_then_sub_32 |
| 108551 | 0, // W_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 108552 | 0, // W_HI_DummyRC:x8sub_6_then_sub_32 |
| 108553 | 0, // W_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 108554 | 0, // W_HI_DummyRC:x8sub_5_then_sub_32 |
| 108555 | 0, // W_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 108556 | 0, // W_HI_DummyRC:x8sub_4_then_sub_32 |
| 108557 | 0, // W_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 108558 | 0, // W_HI_DummyRC:x8sub_3_then_sub_32 |
| 108559 | 0, // W_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 108560 | 0, // W_HI_DummyRC:x8sub_2_then_sub_32 |
| 108561 | 0, // W_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 108562 | 0, // W_HI_DummyRC:x8sub_1_then_sub_32 |
| 108563 | 0, // W_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 108564 | 0, // W_HI_DummyRC:subo64_then_sub_32 |
| 108565 | 0, // W_HI_DummyRC:subo64_then_sub_32_hi |
| 108566 | 0, // W_HI_DummyRC:zsub1_then_zsub_hi |
| 108567 | 0, // W_HI_DummyRC:zsub3_then_zsub_hi |
| 108568 | 0, // W_HI_DummyRC:zsub2_then_zsub_hi |
| 108569 | 0, // W_HI_DummyRC:dsub0_dsub1 |
| 108570 | 0, // W_HI_DummyRC:dsub0_dsub1_dsub2 |
| 108571 | 0, // W_HI_DummyRC:dsub1_dsub2 |
| 108572 | 0, // W_HI_DummyRC:dsub1_dsub2_dsub3 |
| 108573 | 0, // W_HI_DummyRC:dsub2_dsub3 |
| 108574 | 0, // W_HI_DummyRC:dsub_dsub1 |
| 108575 | 0, // W_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 108576 | 0, // W_HI_DummyRC:dsub_dsub1_dsub2 |
| 108577 | 0, // W_HI_DummyRC:qsub0_qsub1 |
| 108578 | 0, // W_HI_DummyRC:qsub0_qsub1_qsub2 |
| 108579 | 0, // W_HI_DummyRC:qsub1_qsub2 |
| 108580 | 0, // W_HI_DummyRC:qsub1_qsub2_qsub3 |
| 108581 | 0, // W_HI_DummyRC:qsub2_qsub3 |
| 108582 | 0, // W_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 108583 | 0, // W_HI_DummyRC:x8sub_0_x8sub_1 |
| 108584 | 0, // W_HI_DummyRC:x8sub_2_x8sub_3 |
| 108585 | 0, // W_HI_DummyRC:x8sub_4_x8sub_5 |
| 108586 | 0, // W_HI_DummyRC:x8sub_6_x8sub_7 |
| 108587 | 0, // W_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108588 | 0, // W_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108589 | 0, // W_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108590 | 0, // W_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 108591 | 0, // W_HI_DummyRC:zsub_qsub1 |
| 108592 | 0, // W_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 108593 | 0, // W_HI_DummyRC:zsub_qsub1_qsub2 |
| 108594 | 0, // W_HI_DummyRC:zsub0_zsub1 |
| 108595 | 0, // W_HI_DummyRC:zsub0_zsub1_zsub2 |
| 108596 | 0, // W_HI_DummyRC:zsub1_zsub2 |
| 108597 | 0, // W_HI_DummyRC:zsub1_zsub2_zsub3 |
| 108598 | 0, // W_HI_DummyRC:zsub2_zsub3 |
| 108599 | 0, // W_HI_DummyRC:zsub0_zsub2 |
| 108600 | 0, // W_HI_DummyRC:zsub1_zsub3 |
| 108601 | }, |
| 108602 | { // B_HI_DummyRC |
| 108603 | 0, // B_HI_DummyRC:bsub |
| 108604 | 0, // B_HI_DummyRC:bsub_hi |
| 108605 | 0, // B_HI_DummyRC:dsub |
| 108606 | 0, // B_HI_DummyRC:dsub0 |
| 108607 | 0, // B_HI_DummyRC:dsub1 |
| 108608 | 0, // B_HI_DummyRC:dsub2 |
| 108609 | 0, // B_HI_DummyRC:dsub3 |
| 108610 | 0, // B_HI_DummyRC:dsub_hi |
| 108611 | 0, // B_HI_DummyRC:hsub |
| 108612 | 0, // B_HI_DummyRC:hsub_hi |
| 108613 | 0, // B_HI_DummyRC:psub |
| 108614 | 0, // B_HI_DummyRC:psub0 |
| 108615 | 0, // B_HI_DummyRC:psub1 |
| 108616 | 0, // B_HI_DummyRC:qsub0 |
| 108617 | 0, // B_HI_DummyRC:qsub1 |
| 108618 | 0, // B_HI_DummyRC:qsub2 |
| 108619 | 0, // B_HI_DummyRC:qsub3 |
| 108620 | 0, // B_HI_DummyRC:ssub |
| 108621 | 0, // B_HI_DummyRC:ssub_hi |
| 108622 | 0, // B_HI_DummyRC:sub_32 |
| 108623 | 0, // B_HI_DummyRC:sub_32_hi |
| 108624 | 0, // B_HI_DummyRC:sube32 |
| 108625 | 0, // B_HI_DummyRC:sube64 |
| 108626 | 0, // B_HI_DummyRC:subo32 |
| 108627 | 0, // B_HI_DummyRC:subo64 |
| 108628 | 0, // B_HI_DummyRC:x8sub_0 |
| 108629 | 0, // B_HI_DummyRC:x8sub_1 |
| 108630 | 0, // B_HI_DummyRC:x8sub_2 |
| 108631 | 0, // B_HI_DummyRC:x8sub_3 |
| 108632 | 0, // B_HI_DummyRC:x8sub_4 |
| 108633 | 0, // B_HI_DummyRC:x8sub_5 |
| 108634 | 0, // B_HI_DummyRC:x8sub_6 |
| 108635 | 0, // B_HI_DummyRC:x8sub_7 |
| 108636 | 0, // B_HI_DummyRC:zasubb |
| 108637 | 0, // B_HI_DummyRC:zasubd0 |
| 108638 | 0, // B_HI_DummyRC:zasubd1 |
| 108639 | 0, // B_HI_DummyRC:zasubh0 |
| 108640 | 0, // B_HI_DummyRC:zasubh1 |
| 108641 | 0, // B_HI_DummyRC:zasubq0 |
| 108642 | 0, // B_HI_DummyRC:zasubq1 |
| 108643 | 0, // B_HI_DummyRC:zasubs0 |
| 108644 | 0, // B_HI_DummyRC:zasubs1 |
| 108645 | 0, // B_HI_DummyRC:zsub |
| 108646 | 0, // B_HI_DummyRC:zsub0 |
| 108647 | 0, // B_HI_DummyRC:zsub1 |
| 108648 | 0, // B_HI_DummyRC:zsub2 |
| 108649 | 0, // B_HI_DummyRC:zsub3 |
| 108650 | 0, // B_HI_DummyRC:zsub_hi |
| 108651 | 0, // B_HI_DummyRC:zasubd1_then_zasubq0 |
| 108652 | 0, // B_HI_DummyRC:zasubd1_then_zasubq1 |
| 108653 | 0, // B_HI_DummyRC:zasubs1_then_zasubd0 |
| 108654 | 0, // B_HI_DummyRC:zasubs1_then_zasubd1 |
| 108655 | 0, // B_HI_DummyRC:zasubs1_then_zasubq0 |
| 108656 | 0, // B_HI_DummyRC:zasubs1_then_zasubq1 |
| 108657 | 0, // B_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 108658 | 0, // B_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 108659 | 0, // B_HI_DummyRC:zasubh1_then_zasubd0 |
| 108660 | 0, // B_HI_DummyRC:zasubh1_then_zasubd1 |
| 108661 | 0, // B_HI_DummyRC:zasubh1_then_zasubq0 |
| 108662 | 0, // B_HI_DummyRC:zasubh1_then_zasubq1 |
| 108663 | 0, // B_HI_DummyRC:zasubh1_then_zasubs0 |
| 108664 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1 |
| 108665 | 0, // B_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 108666 | 0, // B_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 108667 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 108668 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 108669 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 108670 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 108671 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 108672 | 0, // B_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 108673 | 0, // B_HI_DummyRC:dsub1_then_bsub |
| 108674 | 0, // B_HI_DummyRC:dsub1_then_bsub_hi |
| 108675 | 0, // B_HI_DummyRC:dsub1_then_hsub |
| 108676 | 0, // B_HI_DummyRC:dsub1_then_hsub_hi |
| 108677 | 0, // B_HI_DummyRC:dsub1_then_ssub |
| 108678 | 0, // B_HI_DummyRC:dsub1_then_ssub_hi |
| 108679 | 0, // B_HI_DummyRC:dsub3_then_bsub |
| 108680 | 0, // B_HI_DummyRC:dsub3_then_bsub_hi |
| 108681 | 0, // B_HI_DummyRC:dsub3_then_hsub |
| 108682 | 0, // B_HI_DummyRC:dsub3_then_hsub_hi |
| 108683 | 0, // B_HI_DummyRC:dsub3_then_ssub |
| 108684 | 0, // B_HI_DummyRC:dsub3_then_ssub_hi |
| 108685 | 0, // B_HI_DummyRC:dsub2_then_bsub |
| 108686 | 0, // B_HI_DummyRC:dsub2_then_bsub_hi |
| 108687 | 0, // B_HI_DummyRC:dsub2_then_hsub |
| 108688 | 0, // B_HI_DummyRC:dsub2_then_hsub_hi |
| 108689 | 0, // B_HI_DummyRC:dsub2_then_ssub |
| 108690 | 0, // B_HI_DummyRC:dsub2_then_ssub_hi |
| 108691 | 0, // B_HI_DummyRC:psub1_then_psub |
| 108692 | 0, // B_HI_DummyRC:qsub1_then_dsub_hi |
| 108693 | 0, // B_HI_DummyRC:qsub3_then_dsub_hi |
| 108694 | 0, // B_HI_DummyRC:qsub2_then_dsub_hi |
| 108695 | 0, // B_HI_DummyRC:x8sub_7_then_sub_32 |
| 108696 | 0, // B_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 108697 | 0, // B_HI_DummyRC:x8sub_6_then_sub_32 |
| 108698 | 0, // B_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 108699 | 0, // B_HI_DummyRC:x8sub_5_then_sub_32 |
| 108700 | 0, // B_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 108701 | 0, // B_HI_DummyRC:x8sub_4_then_sub_32 |
| 108702 | 0, // B_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 108703 | 0, // B_HI_DummyRC:x8sub_3_then_sub_32 |
| 108704 | 0, // B_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 108705 | 0, // B_HI_DummyRC:x8sub_2_then_sub_32 |
| 108706 | 0, // B_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 108707 | 0, // B_HI_DummyRC:x8sub_1_then_sub_32 |
| 108708 | 0, // B_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 108709 | 0, // B_HI_DummyRC:subo64_then_sub_32 |
| 108710 | 0, // B_HI_DummyRC:subo64_then_sub_32_hi |
| 108711 | 0, // B_HI_DummyRC:zsub1_then_zsub_hi |
| 108712 | 0, // B_HI_DummyRC:zsub3_then_zsub_hi |
| 108713 | 0, // B_HI_DummyRC:zsub2_then_zsub_hi |
| 108714 | 0, // B_HI_DummyRC:dsub0_dsub1 |
| 108715 | 0, // B_HI_DummyRC:dsub0_dsub1_dsub2 |
| 108716 | 0, // B_HI_DummyRC:dsub1_dsub2 |
| 108717 | 0, // B_HI_DummyRC:dsub1_dsub2_dsub3 |
| 108718 | 0, // B_HI_DummyRC:dsub2_dsub3 |
| 108719 | 0, // B_HI_DummyRC:dsub_dsub1 |
| 108720 | 0, // B_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 108721 | 0, // B_HI_DummyRC:dsub_dsub1_dsub2 |
| 108722 | 0, // B_HI_DummyRC:qsub0_qsub1 |
| 108723 | 0, // B_HI_DummyRC:qsub0_qsub1_qsub2 |
| 108724 | 0, // B_HI_DummyRC:qsub1_qsub2 |
| 108725 | 0, // B_HI_DummyRC:qsub1_qsub2_qsub3 |
| 108726 | 0, // B_HI_DummyRC:qsub2_qsub3 |
| 108727 | 0, // B_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 108728 | 0, // B_HI_DummyRC:x8sub_0_x8sub_1 |
| 108729 | 0, // B_HI_DummyRC:x8sub_2_x8sub_3 |
| 108730 | 0, // B_HI_DummyRC:x8sub_4_x8sub_5 |
| 108731 | 0, // B_HI_DummyRC:x8sub_6_x8sub_7 |
| 108732 | 0, // B_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108733 | 0, // B_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108734 | 0, // B_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108735 | 0, // B_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 108736 | 0, // B_HI_DummyRC:zsub_qsub1 |
| 108737 | 0, // B_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 108738 | 0, // B_HI_DummyRC:zsub_qsub1_qsub2 |
| 108739 | 0, // B_HI_DummyRC:zsub0_zsub1 |
| 108740 | 0, // B_HI_DummyRC:zsub0_zsub1_zsub2 |
| 108741 | 0, // B_HI_DummyRC:zsub1_zsub2 |
| 108742 | 0, // B_HI_DummyRC:zsub1_zsub2_zsub3 |
| 108743 | 0, // B_HI_DummyRC:zsub2_zsub3 |
| 108744 | 0, // B_HI_DummyRC:zsub0_zsub2 |
| 108745 | 0, // B_HI_DummyRC:zsub1_zsub3 |
| 108746 | }, |
| 108747 | { // D_HI_DummyRC |
| 108748 | 0, // D_HI_DummyRC:bsub |
| 108749 | 0, // D_HI_DummyRC:bsub_hi |
| 108750 | 0, // D_HI_DummyRC:dsub |
| 108751 | 0, // D_HI_DummyRC:dsub0 |
| 108752 | 0, // D_HI_DummyRC:dsub1 |
| 108753 | 0, // D_HI_DummyRC:dsub2 |
| 108754 | 0, // D_HI_DummyRC:dsub3 |
| 108755 | 0, // D_HI_DummyRC:dsub_hi |
| 108756 | 0, // D_HI_DummyRC:hsub |
| 108757 | 0, // D_HI_DummyRC:hsub_hi |
| 108758 | 0, // D_HI_DummyRC:psub |
| 108759 | 0, // D_HI_DummyRC:psub0 |
| 108760 | 0, // D_HI_DummyRC:psub1 |
| 108761 | 0, // D_HI_DummyRC:qsub0 |
| 108762 | 0, // D_HI_DummyRC:qsub1 |
| 108763 | 0, // D_HI_DummyRC:qsub2 |
| 108764 | 0, // D_HI_DummyRC:qsub3 |
| 108765 | 0, // D_HI_DummyRC:ssub |
| 108766 | 0, // D_HI_DummyRC:ssub_hi |
| 108767 | 0, // D_HI_DummyRC:sub_32 |
| 108768 | 0, // D_HI_DummyRC:sub_32_hi |
| 108769 | 0, // D_HI_DummyRC:sube32 |
| 108770 | 0, // D_HI_DummyRC:sube64 |
| 108771 | 0, // D_HI_DummyRC:subo32 |
| 108772 | 0, // D_HI_DummyRC:subo64 |
| 108773 | 0, // D_HI_DummyRC:x8sub_0 |
| 108774 | 0, // D_HI_DummyRC:x8sub_1 |
| 108775 | 0, // D_HI_DummyRC:x8sub_2 |
| 108776 | 0, // D_HI_DummyRC:x8sub_3 |
| 108777 | 0, // D_HI_DummyRC:x8sub_4 |
| 108778 | 0, // D_HI_DummyRC:x8sub_5 |
| 108779 | 0, // D_HI_DummyRC:x8sub_6 |
| 108780 | 0, // D_HI_DummyRC:x8sub_7 |
| 108781 | 0, // D_HI_DummyRC:zasubb |
| 108782 | 0, // D_HI_DummyRC:zasubd0 |
| 108783 | 0, // D_HI_DummyRC:zasubd1 |
| 108784 | 0, // D_HI_DummyRC:zasubh0 |
| 108785 | 0, // D_HI_DummyRC:zasubh1 |
| 108786 | 0, // D_HI_DummyRC:zasubq0 |
| 108787 | 0, // D_HI_DummyRC:zasubq1 |
| 108788 | 0, // D_HI_DummyRC:zasubs0 |
| 108789 | 0, // D_HI_DummyRC:zasubs1 |
| 108790 | 0, // D_HI_DummyRC:zsub |
| 108791 | 0, // D_HI_DummyRC:zsub0 |
| 108792 | 0, // D_HI_DummyRC:zsub1 |
| 108793 | 0, // D_HI_DummyRC:zsub2 |
| 108794 | 0, // D_HI_DummyRC:zsub3 |
| 108795 | 0, // D_HI_DummyRC:zsub_hi |
| 108796 | 0, // D_HI_DummyRC:zasubd1_then_zasubq0 |
| 108797 | 0, // D_HI_DummyRC:zasubd1_then_zasubq1 |
| 108798 | 0, // D_HI_DummyRC:zasubs1_then_zasubd0 |
| 108799 | 0, // D_HI_DummyRC:zasubs1_then_zasubd1 |
| 108800 | 0, // D_HI_DummyRC:zasubs1_then_zasubq0 |
| 108801 | 0, // D_HI_DummyRC:zasubs1_then_zasubq1 |
| 108802 | 0, // D_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 108803 | 0, // D_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 108804 | 0, // D_HI_DummyRC:zasubh1_then_zasubd0 |
| 108805 | 0, // D_HI_DummyRC:zasubh1_then_zasubd1 |
| 108806 | 0, // D_HI_DummyRC:zasubh1_then_zasubq0 |
| 108807 | 0, // D_HI_DummyRC:zasubh1_then_zasubq1 |
| 108808 | 0, // D_HI_DummyRC:zasubh1_then_zasubs0 |
| 108809 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1 |
| 108810 | 0, // D_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 108811 | 0, // D_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 108812 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 108813 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 108814 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 108815 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 108816 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 108817 | 0, // D_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 108818 | 0, // D_HI_DummyRC:dsub1_then_bsub |
| 108819 | 0, // D_HI_DummyRC:dsub1_then_bsub_hi |
| 108820 | 0, // D_HI_DummyRC:dsub1_then_hsub |
| 108821 | 0, // D_HI_DummyRC:dsub1_then_hsub_hi |
| 108822 | 0, // D_HI_DummyRC:dsub1_then_ssub |
| 108823 | 0, // D_HI_DummyRC:dsub1_then_ssub_hi |
| 108824 | 0, // D_HI_DummyRC:dsub3_then_bsub |
| 108825 | 0, // D_HI_DummyRC:dsub3_then_bsub_hi |
| 108826 | 0, // D_HI_DummyRC:dsub3_then_hsub |
| 108827 | 0, // D_HI_DummyRC:dsub3_then_hsub_hi |
| 108828 | 0, // D_HI_DummyRC:dsub3_then_ssub |
| 108829 | 0, // D_HI_DummyRC:dsub3_then_ssub_hi |
| 108830 | 0, // D_HI_DummyRC:dsub2_then_bsub |
| 108831 | 0, // D_HI_DummyRC:dsub2_then_bsub_hi |
| 108832 | 0, // D_HI_DummyRC:dsub2_then_hsub |
| 108833 | 0, // D_HI_DummyRC:dsub2_then_hsub_hi |
| 108834 | 0, // D_HI_DummyRC:dsub2_then_ssub |
| 108835 | 0, // D_HI_DummyRC:dsub2_then_ssub_hi |
| 108836 | 0, // D_HI_DummyRC:psub1_then_psub |
| 108837 | 0, // D_HI_DummyRC:qsub1_then_dsub_hi |
| 108838 | 0, // D_HI_DummyRC:qsub3_then_dsub_hi |
| 108839 | 0, // D_HI_DummyRC:qsub2_then_dsub_hi |
| 108840 | 0, // D_HI_DummyRC:x8sub_7_then_sub_32 |
| 108841 | 0, // D_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 108842 | 0, // D_HI_DummyRC:x8sub_6_then_sub_32 |
| 108843 | 0, // D_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 108844 | 0, // D_HI_DummyRC:x8sub_5_then_sub_32 |
| 108845 | 0, // D_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 108846 | 0, // D_HI_DummyRC:x8sub_4_then_sub_32 |
| 108847 | 0, // D_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 108848 | 0, // D_HI_DummyRC:x8sub_3_then_sub_32 |
| 108849 | 0, // D_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 108850 | 0, // D_HI_DummyRC:x8sub_2_then_sub_32 |
| 108851 | 0, // D_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 108852 | 0, // D_HI_DummyRC:x8sub_1_then_sub_32 |
| 108853 | 0, // D_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 108854 | 0, // D_HI_DummyRC:subo64_then_sub_32 |
| 108855 | 0, // D_HI_DummyRC:subo64_then_sub_32_hi |
| 108856 | 0, // D_HI_DummyRC:zsub1_then_zsub_hi |
| 108857 | 0, // D_HI_DummyRC:zsub3_then_zsub_hi |
| 108858 | 0, // D_HI_DummyRC:zsub2_then_zsub_hi |
| 108859 | 0, // D_HI_DummyRC:dsub0_dsub1 |
| 108860 | 0, // D_HI_DummyRC:dsub0_dsub1_dsub2 |
| 108861 | 0, // D_HI_DummyRC:dsub1_dsub2 |
| 108862 | 0, // D_HI_DummyRC:dsub1_dsub2_dsub3 |
| 108863 | 0, // D_HI_DummyRC:dsub2_dsub3 |
| 108864 | 0, // D_HI_DummyRC:dsub_dsub1 |
| 108865 | 0, // D_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 108866 | 0, // D_HI_DummyRC:dsub_dsub1_dsub2 |
| 108867 | 0, // D_HI_DummyRC:qsub0_qsub1 |
| 108868 | 0, // D_HI_DummyRC:qsub0_qsub1_qsub2 |
| 108869 | 0, // D_HI_DummyRC:qsub1_qsub2 |
| 108870 | 0, // D_HI_DummyRC:qsub1_qsub2_qsub3 |
| 108871 | 0, // D_HI_DummyRC:qsub2_qsub3 |
| 108872 | 0, // D_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 108873 | 0, // D_HI_DummyRC:x8sub_0_x8sub_1 |
| 108874 | 0, // D_HI_DummyRC:x8sub_2_x8sub_3 |
| 108875 | 0, // D_HI_DummyRC:x8sub_4_x8sub_5 |
| 108876 | 0, // D_HI_DummyRC:x8sub_6_x8sub_7 |
| 108877 | 0, // D_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 108878 | 0, // D_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 108879 | 0, // D_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 108880 | 0, // D_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 108881 | 0, // D_HI_DummyRC:zsub_qsub1 |
| 108882 | 0, // D_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 108883 | 0, // D_HI_DummyRC:zsub_qsub1_qsub2 |
| 108884 | 0, // D_HI_DummyRC:zsub0_zsub1 |
| 108885 | 0, // D_HI_DummyRC:zsub0_zsub1_zsub2 |
| 108886 | 0, // D_HI_DummyRC:zsub1_zsub2 |
| 108887 | 0, // D_HI_DummyRC:zsub1_zsub2_zsub3 |
| 108888 | 0, // D_HI_DummyRC:zsub2_zsub3 |
| 108889 | 0, // D_HI_DummyRC:zsub0_zsub2 |
| 108890 | 0, // D_HI_DummyRC:zsub1_zsub3 |
| 108891 | }, |
| 108892 | { // H_HI_DummyRC |
| 108893 | 0, // H_HI_DummyRC:bsub |
| 108894 | 0, // H_HI_DummyRC:bsub_hi |
| 108895 | 0, // H_HI_DummyRC:dsub |
| 108896 | 0, // H_HI_DummyRC:dsub0 |
| 108897 | 0, // H_HI_DummyRC:dsub1 |
| 108898 | 0, // H_HI_DummyRC:dsub2 |
| 108899 | 0, // H_HI_DummyRC:dsub3 |
| 108900 | 0, // H_HI_DummyRC:dsub_hi |
| 108901 | 0, // H_HI_DummyRC:hsub |
| 108902 | 0, // H_HI_DummyRC:hsub_hi |
| 108903 | 0, // H_HI_DummyRC:psub |
| 108904 | 0, // H_HI_DummyRC:psub0 |
| 108905 | 0, // H_HI_DummyRC:psub1 |
| 108906 | 0, // H_HI_DummyRC:qsub0 |
| 108907 | 0, // H_HI_DummyRC:qsub1 |
| 108908 | 0, // H_HI_DummyRC:qsub2 |
| 108909 | 0, // H_HI_DummyRC:qsub3 |
| 108910 | 0, // H_HI_DummyRC:ssub |
| 108911 | 0, // H_HI_DummyRC:ssub_hi |
| 108912 | 0, // H_HI_DummyRC:sub_32 |
| 108913 | 0, // H_HI_DummyRC:sub_32_hi |
| 108914 | 0, // H_HI_DummyRC:sube32 |
| 108915 | 0, // H_HI_DummyRC:sube64 |
| 108916 | 0, // H_HI_DummyRC:subo32 |
| 108917 | 0, // H_HI_DummyRC:subo64 |
| 108918 | 0, // H_HI_DummyRC:x8sub_0 |
| 108919 | 0, // H_HI_DummyRC:x8sub_1 |
| 108920 | 0, // H_HI_DummyRC:x8sub_2 |
| 108921 | 0, // H_HI_DummyRC:x8sub_3 |
| 108922 | 0, // H_HI_DummyRC:x8sub_4 |
| 108923 | 0, // H_HI_DummyRC:x8sub_5 |
| 108924 | 0, // H_HI_DummyRC:x8sub_6 |
| 108925 | 0, // H_HI_DummyRC:x8sub_7 |
| 108926 | 0, // H_HI_DummyRC:zasubb |
| 108927 | 0, // H_HI_DummyRC:zasubd0 |
| 108928 | 0, // H_HI_DummyRC:zasubd1 |
| 108929 | 0, // H_HI_DummyRC:zasubh0 |
| 108930 | 0, // H_HI_DummyRC:zasubh1 |
| 108931 | 0, // H_HI_DummyRC:zasubq0 |
| 108932 | 0, // H_HI_DummyRC:zasubq1 |
| 108933 | 0, // H_HI_DummyRC:zasubs0 |
| 108934 | 0, // H_HI_DummyRC:zasubs1 |
| 108935 | 0, // H_HI_DummyRC:zsub |
| 108936 | 0, // H_HI_DummyRC:zsub0 |
| 108937 | 0, // H_HI_DummyRC:zsub1 |
| 108938 | 0, // H_HI_DummyRC:zsub2 |
| 108939 | 0, // H_HI_DummyRC:zsub3 |
| 108940 | 0, // H_HI_DummyRC:zsub_hi |
| 108941 | 0, // H_HI_DummyRC:zasubd1_then_zasubq0 |
| 108942 | 0, // H_HI_DummyRC:zasubd1_then_zasubq1 |
| 108943 | 0, // H_HI_DummyRC:zasubs1_then_zasubd0 |
| 108944 | 0, // H_HI_DummyRC:zasubs1_then_zasubd1 |
| 108945 | 0, // H_HI_DummyRC:zasubs1_then_zasubq0 |
| 108946 | 0, // H_HI_DummyRC:zasubs1_then_zasubq1 |
| 108947 | 0, // H_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 108948 | 0, // H_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 108949 | 0, // H_HI_DummyRC:zasubh1_then_zasubd0 |
| 108950 | 0, // H_HI_DummyRC:zasubh1_then_zasubd1 |
| 108951 | 0, // H_HI_DummyRC:zasubh1_then_zasubq0 |
| 108952 | 0, // H_HI_DummyRC:zasubh1_then_zasubq1 |
| 108953 | 0, // H_HI_DummyRC:zasubh1_then_zasubs0 |
| 108954 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1 |
| 108955 | 0, // H_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 108956 | 0, // H_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 108957 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 108958 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 108959 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 108960 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 108961 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 108962 | 0, // H_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 108963 | 0, // H_HI_DummyRC:dsub1_then_bsub |
| 108964 | 0, // H_HI_DummyRC:dsub1_then_bsub_hi |
| 108965 | 0, // H_HI_DummyRC:dsub1_then_hsub |
| 108966 | 0, // H_HI_DummyRC:dsub1_then_hsub_hi |
| 108967 | 0, // H_HI_DummyRC:dsub1_then_ssub |
| 108968 | 0, // H_HI_DummyRC:dsub1_then_ssub_hi |
| 108969 | 0, // H_HI_DummyRC:dsub3_then_bsub |
| 108970 | 0, // H_HI_DummyRC:dsub3_then_bsub_hi |
| 108971 | 0, // H_HI_DummyRC:dsub3_then_hsub |
| 108972 | 0, // H_HI_DummyRC:dsub3_then_hsub_hi |
| 108973 | 0, // H_HI_DummyRC:dsub3_then_ssub |
| 108974 | 0, // H_HI_DummyRC:dsub3_then_ssub_hi |
| 108975 | 0, // H_HI_DummyRC:dsub2_then_bsub |
| 108976 | 0, // H_HI_DummyRC:dsub2_then_bsub_hi |
| 108977 | 0, // H_HI_DummyRC:dsub2_then_hsub |
| 108978 | 0, // H_HI_DummyRC:dsub2_then_hsub_hi |
| 108979 | 0, // H_HI_DummyRC:dsub2_then_ssub |
| 108980 | 0, // H_HI_DummyRC:dsub2_then_ssub_hi |
| 108981 | 0, // H_HI_DummyRC:psub1_then_psub |
| 108982 | 0, // H_HI_DummyRC:qsub1_then_dsub_hi |
| 108983 | 0, // H_HI_DummyRC:qsub3_then_dsub_hi |
| 108984 | 0, // H_HI_DummyRC:qsub2_then_dsub_hi |
| 108985 | 0, // H_HI_DummyRC:x8sub_7_then_sub_32 |
| 108986 | 0, // H_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 108987 | 0, // H_HI_DummyRC:x8sub_6_then_sub_32 |
| 108988 | 0, // H_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 108989 | 0, // H_HI_DummyRC:x8sub_5_then_sub_32 |
| 108990 | 0, // H_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 108991 | 0, // H_HI_DummyRC:x8sub_4_then_sub_32 |
| 108992 | 0, // H_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 108993 | 0, // H_HI_DummyRC:x8sub_3_then_sub_32 |
| 108994 | 0, // H_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 108995 | 0, // H_HI_DummyRC:x8sub_2_then_sub_32 |
| 108996 | 0, // H_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 108997 | 0, // H_HI_DummyRC:x8sub_1_then_sub_32 |
| 108998 | 0, // H_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 108999 | 0, // H_HI_DummyRC:subo64_then_sub_32 |
| 109000 | 0, // H_HI_DummyRC:subo64_then_sub_32_hi |
| 109001 | 0, // H_HI_DummyRC:zsub1_then_zsub_hi |
| 109002 | 0, // H_HI_DummyRC:zsub3_then_zsub_hi |
| 109003 | 0, // H_HI_DummyRC:zsub2_then_zsub_hi |
| 109004 | 0, // H_HI_DummyRC:dsub0_dsub1 |
| 109005 | 0, // H_HI_DummyRC:dsub0_dsub1_dsub2 |
| 109006 | 0, // H_HI_DummyRC:dsub1_dsub2 |
| 109007 | 0, // H_HI_DummyRC:dsub1_dsub2_dsub3 |
| 109008 | 0, // H_HI_DummyRC:dsub2_dsub3 |
| 109009 | 0, // H_HI_DummyRC:dsub_dsub1 |
| 109010 | 0, // H_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 109011 | 0, // H_HI_DummyRC:dsub_dsub1_dsub2 |
| 109012 | 0, // H_HI_DummyRC:qsub0_qsub1 |
| 109013 | 0, // H_HI_DummyRC:qsub0_qsub1_qsub2 |
| 109014 | 0, // H_HI_DummyRC:qsub1_qsub2 |
| 109015 | 0, // H_HI_DummyRC:qsub1_qsub2_qsub3 |
| 109016 | 0, // H_HI_DummyRC:qsub2_qsub3 |
| 109017 | 0, // H_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 109018 | 0, // H_HI_DummyRC:x8sub_0_x8sub_1 |
| 109019 | 0, // H_HI_DummyRC:x8sub_2_x8sub_3 |
| 109020 | 0, // H_HI_DummyRC:x8sub_4_x8sub_5 |
| 109021 | 0, // H_HI_DummyRC:x8sub_6_x8sub_7 |
| 109022 | 0, // H_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109023 | 0, // H_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109024 | 0, // H_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109025 | 0, // H_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 109026 | 0, // H_HI_DummyRC:zsub_qsub1 |
| 109027 | 0, // H_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 109028 | 0, // H_HI_DummyRC:zsub_qsub1_qsub2 |
| 109029 | 0, // H_HI_DummyRC:zsub0_zsub1 |
| 109030 | 0, // H_HI_DummyRC:zsub0_zsub1_zsub2 |
| 109031 | 0, // H_HI_DummyRC:zsub1_zsub2 |
| 109032 | 0, // H_HI_DummyRC:zsub1_zsub2_zsub3 |
| 109033 | 0, // H_HI_DummyRC:zsub2_zsub3 |
| 109034 | 0, // H_HI_DummyRC:zsub0_zsub2 |
| 109035 | 0, // H_HI_DummyRC:zsub1_zsub3 |
| 109036 | }, |
| 109037 | { // Q_HI_DummyRC |
| 109038 | 0, // Q_HI_DummyRC:bsub |
| 109039 | 0, // Q_HI_DummyRC:bsub_hi |
| 109040 | 0, // Q_HI_DummyRC:dsub |
| 109041 | 0, // Q_HI_DummyRC:dsub0 |
| 109042 | 0, // Q_HI_DummyRC:dsub1 |
| 109043 | 0, // Q_HI_DummyRC:dsub2 |
| 109044 | 0, // Q_HI_DummyRC:dsub3 |
| 109045 | 0, // Q_HI_DummyRC:dsub_hi |
| 109046 | 0, // Q_HI_DummyRC:hsub |
| 109047 | 0, // Q_HI_DummyRC:hsub_hi |
| 109048 | 0, // Q_HI_DummyRC:psub |
| 109049 | 0, // Q_HI_DummyRC:psub0 |
| 109050 | 0, // Q_HI_DummyRC:psub1 |
| 109051 | 0, // Q_HI_DummyRC:qsub0 |
| 109052 | 0, // Q_HI_DummyRC:qsub1 |
| 109053 | 0, // Q_HI_DummyRC:qsub2 |
| 109054 | 0, // Q_HI_DummyRC:qsub3 |
| 109055 | 0, // Q_HI_DummyRC:ssub |
| 109056 | 0, // Q_HI_DummyRC:ssub_hi |
| 109057 | 0, // Q_HI_DummyRC:sub_32 |
| 109058 | 0, // Q_HI_DummyRC:sub_32_hi |
| 109059 | 0, // Q_HI_DummyRC:sube32 |
| 109060 | 0, // Q_HI_DummyRC:sube64 |
| 109061 | 0, // Q_HI_DummyRC:subo32 |
| 109062 | 0, // Q_HI_DummyRC:subo64 |
| 109063 | 0, // Q_HI_DummyRC:x8sub_0 |
| 109064 | 0, // Q_HI_DummyRC:x8sub_1 |
| 109065 | 0, // Q_HI_DummyRC:x8sub_2 |
| 109066 | 0, // Q_HI_DummyRC:x8sub_3 |
| 109067 | 0, // Q_HI_DummyRC:x8sub_4 |
| 109068 | 0, // Q_HI_DummyRC:x8sub_5 |
| 109069 | 0, // Q_HI_DummyRC:x8sub_6 |
| 109070 | 0, // Q_HI_DummyRC:x8sub_7 |
| 109071 | 0, // Q_HI_DummyRC:zasubb |
| 109072 | 0, // Q_HI_DummyRC:zasubd0 |
| 109073 | 0, // Q_HI_DummyRC:zasubd1 |
| 109074 | 0, // Q_HI_DummyRC:zasubh0 |
| 109075 | 0, // Q_HI_DummyRC:zasubh1 |
| 109076 | 0, // Q_HI_DummyRC:zasubq0 |
| 109077 | 0, // Q_HI_DummyRC:zasubq1 |
| 109078 | 0, // Q_HI_DummyRC:zasubs0 |
| 109079 | 0, // Q_HI_DummyRC:zasubs1 |
| 109080 | 0, // Q_HI_DummyRC:zsub |
| 109081 | 0, // Q_HI_DummyRC:zsub0 |
| 109082 | 0, // Q_HI_DummyRC:zsub1 |
| 109083 | 0, // Q_HI_DummyRC:zsub2 |
| 109084 | 0, // Q_HI_DummyRC:zsub3 |
| 109085 | 0, // Q_HI_DummyRC:zsub_hi |
| 109086 | 0, // Q_HI_DummyRC:zasubd1_then_zasubq0 |
| 109087 | 0, // Q_HI_DummyRC:zasubd1_then_zasubq1 |
| 109088 | 0, // Q_HI_DummyRC:zasubs1_then_zasubd0 |
| 109089 | 0, // Q_HI_DummyRC:zasubs1_then_zasubd1 |
| 109090 | 0, // Q_HI_DummyRC:zasubs1_then_zasubq0 |
| 109091 | 0, // Q_HI_DummyRC:zasubs1_then_zasubq1 |
| 109092 | 0, // Q_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 109093 | 0, // Q_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 109094 | 0, // Q_HI_DummyRC:zasubh1_then_zasubd0 |
| 109095 | 0, // Q_HI_DummyRC:zasubh1_then_zasubd1 |
| 109096 | 0, // Q_HI_DummyRC:zasubh1_then_zasubq0 |
| 109097 | 0, // Q_HI_DummyRC:zasubh1_then_zasubq1 |
| 109098 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs0 |
| 109099 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1 |
| 109100 | 0, // Q_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 109101 | 0, // Q_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 109102 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 109103 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 109104 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 109105 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 109106 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109107 | 0, // Q_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109108 | 0, // Q_HI_DummyRC:dsub1_then_bsub |
| 109109 | 0, // Q_HI_DummyRC:dsub1_then_bsub_hi |
| 109110 | 0, // Q_HI_DummyRC:dsub1_then_hsub |
| 109111 | 0, // Q_HI_DummyRC:dsub1_then_hsub_hi |
| 109112 | 0, // Q_HI_DummyRC:dsub1_then_ssub |
| 109113 | 0, // Q_HI_DummyRC:dsub1_then_ssub_hi |
| 109114 | 0, // Q_HI_DummyRC:dsub3_then_bsub |
| 109115 | 0, // Q_HI_DummyRC:dsub3_then_bsub_hi |
| 109116 | 0, // Q_HI_DummyRC:dsub3_then_hsub |
| 109117 | 0, // Q_HI_DummyRC:dsub3_then_hsub_hi |
| 109118 | 0, // Q_HI_DummyRC:dsub3_then_ssub |
| 109119 | 0, // Q_HI_DummyRC:dsub3_then_ssub_hi |
| 109120 | 0, // Q_HI_DummyRC:dsub2_then_bsub |
| 109121 | 0, // Q_HI_DummyRC:dsub2_then_bsub_hi |
| 109122 | 0, // Q_HI_DummyRC:dsub2_then_hsub |
| 109123 | 0, // Q_HI_DummyRC:dsub2_then_hsub_hi |
| 109124 | 0, // Q_HI_DummyRC:dsub2_then_ssub |
| 109125 | 0, // Q_HI_DummyRC:dsub2_then_ssub_hi |
| 109126 | 0, // Q_HI_DummyRC:psub1_then_psub |
| 109127 | 0, // Q_HI_DummyRC:qsub1_then_dsub_hi |
| 109128 | 0, // Q_HI_DummyRC:qsub3_then_dsub_hi |
| 109129 | 0, // Q_HI_DummyRC:qsub2_then_dsub_hi |
| 109130 | 0, // Q_HI_DummyRC:x8sub_7_then_sub_32 |
| 109131 | 0, // Q_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 109132 | 0, // Q_HI_DummyRC:x8sub_6_then_sub_32 |
| 109133 | 0, // Q_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 109134 | 0, // Q_HI_DummyRC:x8sub_5_then_sub_32 |
| 109135 | 0, // Q_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 109136 | 0, // Q_HI_DummyRC:x8sub_4_then_sub_32 |
| 109137 | 0, // Q_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 109138 | 0, // Q_HI_DummyRC:x8sub_3_then_sub_32 |
| 109139 | 0, // Q_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 109140 | 0, // Q_HI_DummyRC:x8sub_2_then_sub_32 |
| 109141 | 0, // Q_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 109142 | 0, // Q_HI_DummyRC:x8sub_1_then_sub_32 |
| 109143 | 0, // Q_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 109144 | 0, // Q_HI_DummyRC:subo64_then_sub_32 |
| 109145 | 0, // Q_HI_DummyRC:subo64_then_sub_32_hi |
| 109146 | 0, // Q_HI_DummyRC:zsub1_then_zsub_hi |
| 109147 | 0, // Q_HI_DummyRC:zsub3_then_zsub_hi |
| 109148 | 0, // Q_HI_DummyRC:zsub2_then_zsub_hi |
| 109149 | 0, // Q_HI_DummyRC:dsub0_dsub1 |
| 109150 | 0, // Q_HI_DummyRC:dsub0_dsub1_dsub2 |
| 109151 | 0, // Q_HI_DummyRC:dsub1_dsub2 |
| 109152 | 0, // Q_HI_DummyRC:dsub1_dsub2_dsub3 |
| 109153 | 0, // Q_HI_DummyRC:dsub2_dsub3 |
| 109154 | 0, // Q_HI_DummyRC:dsub_dsub1 |
| 109155 | 0, // Q_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 109156 | 0, // Q_HI_DummyRC:dsub_dsub1_dsub2 |
| 109157 | 0, // Q_HI_DummyRC:qsub0_qsub1 |
| 109158 | 0, // Q_HI_DummyRC:qsub0_qsub1_qsub2 |
| 109159 | 0, // Q_HI_DummyRC:qsub1_qsub2 |
| 109160 | 0, // Q_HI_DummyRC:qsub1_qsub2_qsub3 |
| 109161 | 0, // Q_HI_DummyRC:qsub2_qsub3 |
| 109162 | 0, // Q_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 109163 | 0, // Q_HI_DummyRC:x8sub_0_x8sub_1 |
| 109164 | 0, // Q_HI_DummyRC:x8sub_2_x8sub_3 |
| 109165 | 0, // Q_HI_DummyRC:x8sub_4_x8sub_5 |
| 109166 | 0, // Q_HI_DummyRC:x8sub_6_x8sub_7 |
| 109167 | 0, // Q_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109168 | 0, // Q_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109169 | 0, // Q_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109170 | 0, // Q_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 109171 | 0, // Q_HI_DummyRC:zsub_qsub1 |
| 109172 | 0, // Q_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 109173 | 0, // Q_HI_DummyRC:zsub_qsub1_qsub2 |
| 109174 | 0, // Q_HI_DummyRC:zsub0_zsub1 |
| 109175 | 0, // Q_HI_DummyRC:zsub0_zsub1_zsub2 |
| 109176 | 0, // Q_HI_DummyRC:zsub1_zsub2 |
| 109177 | 0, // Q_HI_DummyRC:zsub1_zsub2_zsub3 |
| 109178 | 0, // Q_HI_DummyRC:zsub2_zsub3 |
| 109179 | 0, // Q_HI_DummyRC:zsub0_zsub2 |
| 109180 | 0, // Q_HI_DummyRC:zsub1_zsub3 |
| 109181 | }, |
| 109182 | { // S_HI_DummyRC |
| 109183 | 0, // S_HI_DummyRC:bsub |
| 109184 | 0, // S_HI_DummyRC:bsub_hi |
| 109185 | 0, // S_HI_DummyRC:dsub |
| 109186 | 0, // S_HI_DummyRC:dsub0 |
| 109187 | 0, // S_HI_DummyRC:dsub1 |
| 109188 | 0, // S_HI_DummyRC:dsub2 |
| 109189 | 0, // S_HI_DummyRC:dsub3 |
| 109190 | 0, // S_HI_DummyRC:dsub_hi |
| 109191 | 0, // S_HI_DummyRC:hsub |
| 109192 | 0, // S_HI_DummyRC:hsub_hi |
| 109193 | 0, // S_HI_DummyRC:psub |
| 109194 | 0, // S_HI_DummyRC:psub0 |
| 109195 | 0, // S_HI_DummyRC:psub1 |
| 109196 | 0, // S_HI_DummyRC:qsub0 |
| 109197 | 0, // S_HI_DummyRC:qsub1 |
| 109198 | 0, // S_HI_DummyRC:qsub2 |
| 109199 | 0, // S_HI_DummyRC:qsub3 |
| 109200 | 0, // S_HI_DummyRC:ssub |
| 109201 | 0, // S_HI_DummyRC:ssub_hi |
| 109202 | 0, // S_HI_DummyRC:sub_32 |
| 109203 | 0, // S_HI_DummyRC:sub_32_hi |
| 109204 | 0, // S_HI_DummyRC:sube32 |
| 109205 | 0, // S_HI_DummyRC:sube64 |
| 109206 | 0, // S_HI_DummyRC:subo32 |
| 109207 | 0, // S_HI_DummyRC:subo64 |
| 109208 | 0, // S_HI_DummyRC:x8sub_0 |
| 109209 | 0, // S_HI_DummyRC:x8sub_1 |
| 109210 | 0, // S_HI_DummyRC:x8sub_2 |
| 109211 | 0, // S_HI_DummyRC:x8sub_3 |
| 109212 | 0, // S_HI_DummyRC:x8sub_4 |
| 109213 | 0, // S_HI_DummyRC:x8sub_5 |
| 109214 | 0, // S_HI_DummyRC:x8sub_6 |
| 109215 | 0, // S_HI_DummyRC:x8sub_7 |
| 109216 | 0, // S_HI_DummyRC:zasubb |
| 109217 | 0, // S_HI_DummyRC:zasubd0 |
| 109218 | 0, // S_HI_DummyRC:zasubd1 |
| 109219 | 0, // S_HI_DummyRC:zasubh0 |
| 109220 | 0, // S_HI_DummyRC:zasubh1 |
| 109221 | 0, // S_HI_DummyRC:zasubq0 |
| 109222 | 0, // S_HI_DummyRC:zasubq1 |
| 109223 | 0, // S_HI_DummyRC:zasubs0 |
| 109224 | 0, // S_HI_DummyRC:zasubs1 |
| 109225 | 0, // S_HI_DummyRC:zsub |
| 109226 | 0, // S_HI_DummyRC:zsub0 |
| 109227 | 0, // S_HI_DummyRC:zsub1 |
| 109228 | 0, // S_HI_DummyRC:zsub2 |
| 109229 | 0, // S_HI_DummyRC:zsub3 |
| 109230 | 0, // S_HI_DummyRC:zsub_hi |
| 109231 | 0, // S_HI_DummyRC:zasubd1_then_zasubq0 |
| 109232 | 0, // S_HI_DummyRC:zasubd1_then_zasubq1 |
| 109233 | 0, // S_HI_DummyRC:zasubs1_then_zasubd0 |
| 109234 | 0, // S_HI_DummyRC:zasubs1_then_zasubd1 |
| 109235 | 0, // S_HI_DummyRC:zasubs1_then_zasubq0 |
| 109236 | 0, // S_HI_DummyRC:zasubs1_then_zasubq1 |
| 109237 | 0, // S_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq0 |
| 109238 | 0, // S_HI_DummyRC:zasubs1_then_zasubd1_then_zasubq1 |
| 109239 | 0, // S_HI_DummyRC:zasubh1_then_zasubd0 |
| 109240 | 0, // S_HI_DummyRC:zasubh1_then_zasubd1 |
| 109241 | 0, // S_HI_DummyRC:zasubh1_then_zasubq0 |
| 109242 | 0, // S_HI_DummyRC:zasubh1_then_zasubq1 |
| 109243 | 0, // S_HI_DummyRC:zasubh1_then_zasubs0 |
| 109244 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1 |
| 109245 | 0, // S_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq0 |
| 109246 | 0, // S_HI_DummyRC:zasubh1_then_zasubd1_then_zasubq1 |
| 109247 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd0 |
| 109248 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1 |
| 109249 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq0 |
| 109250 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubq1 |
| 109251 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109252 | 0, // S_HI_DummyRC:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109253 | 0, // S_HI_DummyRC:dsub1_then_bsub |
| 109254 | 0, // S_HI_DummyRC:dsub1_then_bsub_hi |
| 109255 | 0, // S_HI_DummyRC:dsub1_then_hsub |
| 109256 | 0, // S_HI_DummyRC:dsub1_then_hsub_hi |
| 109257 | 0, // S_HI_DummyRC:dsub1_then_ssub |
| 109258 | 0, // S_HI_DummyRC:dsub1_then_ssub_hi |
| 109259 | 0, // S_HI_DummyRC:dsub3_then_bsub |
| 109260 | 0, // S_HI_DummyRC:dsub3_then_bsub_hi |
| 109261 | 0, // S_HI_DummyRC:dsub3_then_hsub |
| 109262 | 0, // S_HI_DummyRC:dsub3_then_hsub_hi |
| 109263 | 0, // S_HI_DummyRC:dsub3_then_ssub |
| 109264 | 0, // S_HI_DummyRC:dsub3_then_ssub_hi |
| 109265 | 0, // S_HI_DummyRC:dsub2_then_bsub |
| 109266 | 0, // S_HI_DummyRC:dsub2_then_bsub_hi |
| 109267 | 0, // S_HI_DummyRC:dsub2_then_hsub |
| 109268 | 0, // S_HI_DummyRC:dsub2_then_hsub_hi |
| 109269 | 0, // S_HI_DummyRC:dsub2_then_ssub |
| 109270 | 0, // S_HI_DummyRC:dsub2_then_ssub_hi |
| 109271 | 0, // S_HI_DummyRC:psub1_then_psub |
| 109272 | 0, // S_HI_DummyRC:qsub1_then_dsub_hi |
| 109273 | 0, // S_HI_DummyRC:qsub3_then_dsub_hi |
| 109274 | 0, // S_HI_DummyRC:qsub2_then_dsub_hi |
| 109275 | 0, // S_HI_DummyRC:x8sub_7_then_sub_32 |
| 109276 | 0, // S_HI_DummyRC:x8sub_7_then_sub_32_hi |
| 109277 | 0, // S_HI_DummyRC:x8sub_6_then_sub_32 |
| 109278 | 0, // S_HI_DummyRC:x8sub_6_then_sub_32_hi |
| 109279 | 0, // S_HI_DummyRC:x8sub_5_then_sub_32 |
| 109280 | 0, // S_HI_DummyRC:x8sub_5_then_sub_32_hi |
| 109281 | 0, // S_HI_DummyRC:x8sub_4_then_sub_32 |
| 109282 | 0, // S_HI_DummyRC:x8sub_4_then_sub_32_hi |
| 109283 | 0, // S_HI_DummyRC:x8sub_3_then_sub_32 |
| 109284 | 0, // S_HI_DummyRC:x8sub_3_then_sub_32_hi |
| 109285 | 0, // S_HI_DummyRC:x8sub_2_then_sub_32 |
| 109286 | 0, // S_HI_DummyRC:x8sub_2_then_sub_32_hi |
| 109287 | 0, // S_HI_DummyRC:x8sub_1_then_sub_32 |
| 109288 | 0, // S_HI_DummyRC:x8sub_1_then_sub_32_hi |
| 109289 | 0, // S_HI_DummyRC:subo64_then_sub_32 |
| 109290 | 0, // S_HI_DummyRC:subo64_then_sub_32_hi |
| 109291 | 0, // S_HI_DummyRC:zsub1_then_zsub_hi |
| 109292 | 0, // S_HI_DummyRC:zsub3_then_zsub_hi |
| 109293 | 0, // S_HI_DummyRC:zsub2_then_zsub_hi |
| 109294 | 0, // S_HI_DummyRC:dsub0_dsub1 |
| 109295 | 0, // S_HI_DummyRC:dsub0_dsub1_dsub2 |
| 109296 | 0, // S_HI_DummyRC:dsub1_dsub2 |
| 109297 | 0, // S_HI_DummyRC:dsub1_dsub2_dsub3 |
| 109298 | 0, // S_HI_DummyRC:dsub2_dsub3 |
| 109299 | 0, // S_HI_DummyRC:dsub_dsub1 |
| 109300 | 0, // S_HI_DummyRC:dsub_dsub1_dsub2_dsub3 |
| 109301 | 0, // S_HI_DummyRC:dsub_dsub1_dsub2 |
| 109302 | 0, // S_HI_DummyRC:qsub0_qsub1 |
| 109303 | 0, // S_HI_DummyRC:qsub0_qsub1_qsub2 |
| 109304 | 0, // S_HI_DummyRC:qsub1_qsub2 |
| 109305 | 0, // S_HI_DummyRC:qsub1_qsub2_qsub3 |
| 109306 | 0, // S_HI_DummyRC:qsub2_qsub3 |
| 109307 | 0, // S_HI_DummyRC:sub_32_x8sub_1_then_sub_32 |
| 109308 | 0, // S_HI_DummyRC:x8sub_0_x8sub_1 |
| 109309 | 0, // S_HI_DummyRC:x8sub_2_x8sub_3 |
| 109310 | 0, // S_HI_DummyRC:x8sub_4_x8sub_5 |
| 109311 | 0, // S_HI_DummyRC:x8sub_6_x8sub_7 |
| 109312 | 0, // S_HI_DummyRC:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109313 | 0, // S_HI_DummyRC:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109314 | 0, // S_HI_DummyRC:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109315 | 0, // S_HI_DummyRC:sub_32_subo64_then_sub_32 |
| 109316 | 0, // S_HI_DummyRC:zsub_qsub1 |
| 109317 | 0, // S_HI_DummyRC:zsub_qsub1_qsub2_qsub3 |
| 109318 | 0, // S_HI_DummyRC:zsub_qsub1_qsub2 |
| 109319 | 0, // S_HI_DummyRC:zsub0_zsub1 |
| 109320 | 0, // S_HI_DummyRC:zsub0_zsub1_zsub2 |
| 109321 | 0, // S_HI_DummyRC:zsub1_zsub2 |
| 109322 | 0, // S_HI_DummyRC:zsub1_zsub2_zsub3 |
| 109323 | 0, // S_HI_DummyRC:zsub2_zsub3 |
| 109324 | 0, // S_HI_DummyRC:zsub0_zsub2 |
| 109325 | 0, // S_HI_DummyRC:zsub1_zsub3 |
| 109326 | }, |
| 109327 | { // FPR8 |
| 109328 | 0, // FPR8:bsub |
| 109329 | 0, // FPR8:bsub_hi |
| 109330 | 0, // FPR8:dsub |
| 109331 | 0, // FPR8:dsub0 |
| 109332 | 0, // FPR8:dsub1 |
| 109333 | 0, // FPR8:dsub2 |
| 109334 | 0, // FPR8:dsub3 |
| 109335 | 0, // FPR8:dsub_hi |
| 109336 | 0, // FPR8:hsub |
| 109337 | 0, // FPR8:hsub_hi |
| 109338 | 0, // FPR8:psub |
| 109339 | 0, // FPR8:psub0 |
| 109340 | 0, // FPR8:psub1 |
| 109341 | 0, // FPR8:qsub0 |
| 109342 | 0, // FPR8:qsub1 |
| 109343 | 0, // FPR8:qsub2 |
| 109344 | 0, // FPR8:qsub3 |
| 109345 | 0, // FPR8:ssub |
| 109346 | 0, // FPR8:ssub_hi |
| 109347 | 0, // FPR8:sub_32 |
| 109348 | 0, // FPR8:sub_32_hi |
| 109349 | 0, // FPR8:sube32 |
| 109350 | 0, // FPR8:sube64 |
| 109351 | 0, // FPR8:subo32 |
| 109352 | 0, // FPR8:subo64 |
| 109353 | 0, // FPR8:x8sub_0 |
| 109354 | 0, // FPR8:x8sub_1 |
| 109355 | 0, // FPR8:x8sub_2 |
| 109356 | 0, // FPR8:x8sub_3 |
| 109357 | 0, // FPR8:x8sub_4 |
| 109358 | 0, // FPR8:x8sub_5 |
| 109359 | 0, // FPR8:x8sub_6 |
| 109360 | 0, // FPR8:x8sub_7 |
| 109361 | 0, // FPR8:zasubb |
| 109362 | 0, // FPR8:zasubd0 |
| 109363 | 0, // FPR8:zasubd1 |
| 109364 | 0, // FPR8:zasubh0 |
| 109365 | 0, // FPR8:zasubh1 |
| 109366 | 0, // FPR8:zasubq0 |
| 109367 | 0, // FPR8:zasubq1 |
| 109368 | 0, // FPR8:zasubs0 |
| 109369 | 0, // FPR8:zasubs1 |
| 109370 | 0, // FPR8:zsub |
| 109371 | 0, // FPR8:zsub0 |
| 109372 | 0, // FPR8:zsub1 |
| 109373 | 0, // FPR8:zsub2 |
| 109374 | 0, // FPR8:zsub3 |
| 109375 | 0, // FPR8:zsub_hi |
| 109376 | 0, // FPR8:zasubd1_then_zasubq0 |
| 109377 | 0, // FPR8:zasubd1_then_zasubq1 |
| 109378 | 0, // FPR8:zasubs1_then_zasubd0 |
| 109379 | 0, // FPR8:zasubs1_then_zasubd1 |
| 109380 | 0, // FPR8:zasubs1_then_zasubq0 |
| 109381 | 0, // FPR8:zasubs1_then_zasubq1 |
| 109382 | 0, // FPR8:zasubs1_then_zasubd1_then_zasubq0 |
| 109383 | 0, // FPR8:zasubs1_then_zasubd1_then_zasubq1 |
| 109384 | 0, // FPR8:zasubh1_then_zasubd0 |
| 109385 | 0, // FPR8:zasubh1_then_zasubd1 |
| 109386 | 0, // FPR8:zasubh1_then_zasubq0 |
| 109387 | 0, // FPR8:zasubh1_then_zasubq1 |
| 109388 | 0, // FPR8:zasubh1_then_zasubs0 |
| 109389 | 0, // FPR8:zasubh1_then_zasubs1 |
| 109390 | 0, // FPR8:zasubh1_then_zasubd1_then_zasubq0 |
| 109391 | 0, // FPR8:zasubh1_then_zasubd1_then_zasubq1 |
| 109392 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubd0 |
| 109393 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1 |
| 109394 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubq0 |
| 109395 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubq1 |
| 109396 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109397 | 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109398 | 0, // FPR8:dsub1_then_bsub |
| 109399 | 0, // FPR8:dsub1_then_bsub_hi |
| 109400 | 0, // FPR8:dsub1_then_hsub |
| 109401 | 0, // FPR8:dsub1_then_hsub_hi |
| 109402 | 0, // FPR8:dsub1_then_ssub |
| 109403 | 0, // FPR8:dsub1_then_ssub_hi |
| 109404 | 0, // FPR8:dsub3_then_bsub |
| 109405 | 0, // FPR8:dsub3_then_bsub_hi |
| 109406 | 0, // FPR8:dsub3_then_hsub |
| 109407 | 0, // FPR8:dsub3_then_hsub_hi |
| 109408 | 0, // FPR8:dsub3_then_ssub |
| 109409 | 0, // FPR8:dsub3_then_ssub_hi |
| 109410 | 0, // FPR8:dsub2_then_bsub |
| 109411 | 0, // FPR8:dsub2_then_bsub_hi |
| 109412 | 0, // FPR8:dsub2_then_hsub |
| 109413 | 0, // FPR8:dsub2_then_hsub_hi |
| 109414 | 0, // FPR8:dsub2_then_ssub |
| 109415 | 0, // FPR8:dsub2_then_ssub_hi |
| 109416 | 0, // FPR8:psub1_then_psub |
| 109417 | 0, // FPR8:qsub1_then_dsub_hi |
| 109418 | 0, // FPR8:qsub3_then_dsub_hi |
| 109419 | 0, // FPR8:qsub2_then_dsub_hi |
| 109420 | 0, // FPR8:x8sub_7_then_sub_32 |
| 109421 | 0, // FPR8:x8sub_7_then_sub_32_hi |
| 109422 | 0, // FPR8:x8sub_6_then_sub_32 |
| 109423 | 0, // FPR8:x8sub_6_then_sub_32_hi |
| 109424 | 0, // FPR8:x8sub_5_then_sub_32 |
| 109425 | 0, // FPR8:x8sub_5_then_sub_32_hi |
| 109426 | 0, // FPR8:x8sub_4_then_sub_32 |
| 109427 | 0, // FPR8:x8sub_4_then_sub_32_hi |
| 109428 | 0, // FPR8:x8sub_3_then_sub_32 |
| 109429 | 0, // FPR8:x8sub_3_then_sub_32_hi |
| 109430 | 0, // FPR8:x8sub_2_then_sub_32 |
| 109431 | 0, // FPR8:x8sub_2_then_sub_32_hi |
| 109432 | 0, // FPR8:x8sub_1_then_sub_32 |
| 109433 | 0, // FPR8:x8sub_1_then_sub_32_hi |
| 109434 | 0, // FPR8:subo64_then_sub_32 |
| 109435 | 0, // FPR8:subo64_then_sub_32_hi |
| 109436 | 0, // FPR8:zsub1_then_zsub_hi |
| 109437 | 0, // FPR8:zsub3_then_zsub_hi |
| 109438 | 0, // FPR8:zsub2_then_zsub_hi |
| 109439 | 0, // FPR8:dsub0_dsub1 |
| 109440 | 0, // FPR8:dsub0_dsub1_dsub2 |
| 109441 | 0, // FPR8:dsub1_dsub2 |
| 109442 | 0, // FPR8:dsub1_dsub2_dsub3 |
| 109443 | 0, // FPR8:dsub2_dsub3 |
| 109444 | 0, // FPR8:dsub_dsub1 |
| 109445 | 0, // FPR8:dsub_dsub1_dsub2_dsub3 |
| 109446 | 0, // FPR8:dsub_dsub1_dsub2 |
| 109447 | 0, // FPR8:qsub0_qsub1 |
| 109448 | 0, // FPR8:qsub0_qsub1_qsub2 |
| 109449 | 0, // FPR8:qsub1_qsub2 |
| 109450 | 0, // FPR8:qsub1_qsub2_qsub3 |
| 109451 | 0, // FPR8:qsub2_qsub3 |
| 109452 | 0, // FPR8:sub_32_x8sub_1_then_sub_32 |
| 109453 | 0, // FPR8:x8sub_0_x8sub_1 |
| 109454 | 0, // FPR8:x8sub_2_x8sub_3 |
| 109455 | 0, // FPR8:x8sub_4_x8sub_5 |
| 109456 | 0, // FPR8:x8sub_6_x8sub_7 |
| 109457 | 0, // FPR8:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109458 | 0, // FPR8:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109459 | 0, // FPR8:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109460 | 0, // FPR8:sub_32_subo64_then_sub_32 |
| 109461 | 0, // FPR8:zsub_qsub1 |
| 109462 | 0, // FPR8:zsub_qsub1_qsub2_qsub3 |
| 109463 | 0, // FPR8:zsub_qsub1_qsub2 |
| 109464 | 0, // FPR8:zsub0_zsub1 |
| 109465 | 0, // FPR8:zsub0_zsub1_zsub2 |
| 109466 | 0, // FPR8:zsub1_zsub2 |
| 109467 | 0, // FPR8:zsub1_zsub2_zsub3 |
| 109468 | 0, // FPR8:zsub2_zsub3 |
| 109469 | 0, // FPR8:zsub0_zsub2 |
| 109470 | 0, // FPR8:zsub1_zsub3 |
| 109471 | }, |
| 109472 | { // FPR16 |
| 109473 | 7, // FPR16:bsub -> FPR8 |
| 109474 | 0, // FPR16:bsub_hi |
| 109475 | 0, // FPR16:dsub |
| 109476 | 0, // FPR16:dsub0 |
| 109477 | 0, // FPR16:dsub1 |
| 109478 | 0, // FPR16:dsub2 |
| 109479 | 0, // FPR16:dsub3 |
| 109480 | 0, // FPR16:dsub_hi |
| 109481 | 0, // FPR16:hsub |
| 109482 | 0, // FPR16:hsub_hi |
| 109483 | 0, // FPR16:psub |
| 109484 | 0, // FPR16:psub0 |
| 109485 | 0, // FPR16:psub1 |
| 109486 | 0, // FPR16:qsub0 |
| 109487 | 0, // FPR16:qsub1 |
| 109488 | 0, // FPR16:qsub2 |
| 109489 | 0, // FPR16:qsub3 |
| 109490 | 0, // FPR16:ssub |
| 109491 | 0, // FPR16:ssub_hi |
| 109492 | 0, // FPR16:sub_32 |
| 109493 | 0, // FPR16:sub_32_hi |
| 109494 | 0, // FPR16:sube32 |
| 109495 | 0, // FPR16:sube64 |
| 109496 | 0, // FPR16:subo32 |
| 109497 | 0, // FPR16:subo64 |
| 109498 | 0, // FPR16:x8sub_0 |
| 109499 | 0, // FPR16:x8sub_1 |
| 109500 | 0, // FPR16:x8sub_2 |
| 109501 | 0, // FPR16:x8sub_3 |
| 109502 | 0, // FPR16:x8sub_4 |
| 109503 | 0, // FPR16:x8sub_5 |
| 109504 | 0, // FPR16:x8sub_6 |
| 109505 | 0, // FPR16:x8sub_7 |
| 109506 | 0, // FPR16:zasubb |
| 109507 | 0, // FPR16:zasubd0 |
| 109508 | 0, // FPR16:zasubd1 |
| 109509 | 0, // FPR16:zasubh0 |
| 109510 | 0, // FPR16:zasubh1 |
| 109511 | 0, // FPR16:zasubq0 |
| 109512 | 0, // FPR16:zasubq1 |
| 109513 | 0, // FPR16:zasubs0 |
| 109514 | 0, // FPR16:zasubs1 |
| 109515 | 0, // FPR16:zsub |
| 109516 | 0, // FPR16:zsub0 |
| 109517 | 0, // FPR16:zsub1 |
| 109518 | 0, // FPR16:zsub2 |
| 109519 | 0, // FPR16:zsub3 |
| 109520 | 0, // FPR16:zsub_hi |
| 109521 | 0, // FPR16:zasubd1_then_zasubq0 |
| 109522 | 0, // FPR16:zasubd1_then_zasubq1 |
| 109523 | 0, // FPR16:zasubs1_then_zasubd0 |
| 109524 | 0, // FPR16:zasubs1_then_zasubd1 |
| 109525 | 0, // FPR16:zasubs1_then_zasubq0 |
| 109526 | 0, // FPR16:zasubs1_then_zasubq1 |
| 109527 | 0, // FPR16:zasubs1_then_zasubd1_then_zasubq0 |
| 109528 | 0, // FPR16:zasubs1_then_zasubd1_then_zasubq1 |
| 109529 | 0, // FPR16:zasubh1_then_zasubd0 |
| 109530 | 0, // FPR16:zasubh1_then_zasubd1 |
| 109531 | 0, // FPR16:zasubh1_then_zasubq0 |
| 109532 | 0, // FPR16:zasubh1_then_zasubq1 |
| 109533 | 0, // FPR16:zasubh1_then_zasubs0 |
| 109534 | 0, // FPR16:zasubh1_then_zasubs1 |
| 109535 | 0, // FPR16:zasubh1_then_zasubd1_then_zasubq0 |
| 109536 | 0, // FPR16:zasubh1_then_zasubd1_then_zasubq1 |
| 109537 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubd0 |
| 109538 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1 |
| 109539 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubq0 |
| 109540 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubq1 |
| 109541 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109542 | 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109543 | 0, // FPR16:dsub1_then_bsub |
| 109544 | 0, // FPR16:dsub1_then_bsub_hi |
| 109545 | 0, // FPR16:dsub1_then_hsub |
| 109546 | 0, // FPR16:dsub1_then_hsub_hi |
| 109547 | 0, // FPR16:dsub1_then_ssub |
| 109548 | 0, // FPR16:dsub1_then_ssub_hi |
| 109549 | 0, // FPR16:dsub3_then_bsub |
| 109550 | 0, // FPR16:dsub3_then_bsub_hi |
| 109551 | 0, // FPR16:dsub3_then_hsub |
| 109552 | 0, // FPR16:dsub3_then_hsub_hi |
| 109553 | 0, // FPR16:dsub3_then_ssub |
| 109554 | 0, // FPR16:dsub3_then_ssub_hi |
| 109555 | 0, // FPR16:dsub2_then_bsub |
| 109556 | 0, // FPR16:dsub2_then_bsub_hi |
| 109557 | 0, // FPR16:dsub2_then_hsub |
| 109558 | 0, // FPR16:dsub2_then_hsub_hi |
| 109559 | 0, // FPR16:dsub2_then_ssub |
| 109560 | 0, // FPR16:dsub2_then_ssub_hi |
| 109561 | 0, // FPR16:psub1_then_psub |
| 109562 | 0, // FPR16:qsub1_then_dsub_hi |
| 109563 | 0, // FPR16:qsub3_then_dsub_hi |
| 109564 | 0, // FPR16:qsub2_then_dsub_hi |
| 109565 | 0, // FPR16:x8sub_7_then_sub_32 |
| 109566 | 0, // FPR16:x8sub_7_then_sub_32_hi |
| 109567 | 0, // FPR16:x8sub_6_then_sub_32 |
| 109568 | 0, // FPR16:x8sub_6_then_sub_32_hi |
| 109569 | 0, // FPR16:x8sub_5_then_sub_32 |
| 109570 | 0, // FPR16:x8sub_5_then_sub_32_hi |
| 109571 | 0, // FPR16:x8sub_4_then_sub_32 |
| 109572 | 0, // FPR16:x8sub_4_then_sub_32_hi |
| 109573 | 0, // FPR16:x8sub_3_then_sub_32 |
| 109574 | 0, // FPR16:x8sub_3_then_sub_32_hi |
| 109575 | 0, // FPR16:x8sub_2_then_sub_32 |
| 109576 | 0, // FPR16:x8sub_2_then_sub_32_hi |
| 109577 | 0, // FPR16:x8sub_1_then_sub_32 |
| 109578 | 0, // FPR16:x8sub_1_then_sub_32_hi |
| 109579 | 0, // FPR16:subo64_then_sub_32 |
| 109580 | 0, // FPR16:subo64_then_sub_32_hi |
| 109581 | 0, // FPR16:zsub1_then_zsub_hi |
| 109582 | 0, // FPR16:zsub3_then_zsub_hi |
| 109583 | 0, // FPR16:zsub2_then_zsub_hi |
| 109584 | 0, // FPR16:dsub0_dsub1 |
| 109585 | 0, // FPR16:dsub0_dsub1_dsub2 |
| 109586 | 0, // FPR16:dsub1_dsub2 |
| 109587 | 0, // FPR16:dsub1_dsub2_dsub3 |
| 109588 | 0, // FPR16:dsub2_dsub3 |
| 109589 | 0, // FPR16:dsub_dsub1 |
| 109590 | 0, // FPR16:dsub_dsub1_dsub2_dsub3 |
| 109591 | 0, // FPR16:dsub_dsub1_dsub2 |
| 109592 | 0, // FPR16:qsub0_qsub1 |
| 109593 | 0, // FPR16:qsub0_qsub1_qsub2 |
| 109594 | 0, // FPR16:qsub1_qsub2 |
| 109595 | 0, // FPR16:qsub1_qsub2_qsub3 |
| 109596 | 0, // FPR16:qsub2_qsub3 |
| 109597 | 0, // FPR16:sub_32_x8sub_1_then_sub_32 |
| 109598 | 0, // FPR16:x8sub_0_x8sub_1 |
| 109599 | 0, // FPR16:x8sub_2_x8sub_3 |
| 109600 | 0, // FPR16:x8sub_4_x8sub_5 |
| 109601 | 0, // FPR16:x8sub_6_x8sub_7 |
| 109602 | 0, // FPR16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109603 | 0, // FPR16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109604 | 0, // FPR16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109605 | 0, // FPR16:sub_32_subo64_then_sub_32 |
| 109606 | 0, // FPR16:zsub_qsub1 |
| 109607 | 0, // FPR16:zsub_qsub1_qsub2_qsub3 |
| 109608 | 0, // FPR16:zsub_qsub1_qsub2 |
| 109609 | 0, // FPR16:zsub0_zsub1 |
| 109610 | 0, // FPR16:zsub0_zsub1_zsub2 |
| 109611 | 0, // FPR16:zsub1_zsub2 |
| 109612 | 0, // FPR16:zsub1_zsub2_zsub3 |
| 109613 | 0, // FPR16:zsub2_zsub3 |
| 109614 | 0, // FPR16:zsub0_zsub2 |
| 109615 | 0, // FPR16:zsub1_zsub3 |
| 109616 | }, |
| 109617 | { // PPRorPNR |
| 109618 | 0, // PPRorPNR:bsub |
| 109619 | 0, // PPRorPNR:bsub_hi |
| 109620 | 0, // PPRorPNR:dsub |
| 109621 | 0, // PPRorPNR:dsub0 |
| 109622 | 0, // PPRorPNR:dsub1 |
| 109623 | 0, // PPRorPNR:dsub2 |
| 109624 | 0, // PPRorPNR:dsub3 |
| 109625 | 0, // PPRorPNR:dsub_hi |
| 109626 | 0, // PPRorPNR:hsub |
| 109627 | 0, // PPRorPNR:hsub_hi |
| 109628 | 11, // PPRorPNR:psub -> PNR |
| 109629 | 0, // PPRorPNR:psub0 |
| 109630 | 0, // PPRorPNR:psub1 |
| 109631 | 0, // PPRorPNR:qsub0 |
| 109632 | 0, // PPRorPNR:qsub1 |
| 109633 | 0, // PPRorPNR:qsub2 |
| 109634 | 0, // PPRorPNR:qsub3 |
| 109635 | 0, // PPRorPNR:ssub |
| 109636 | 0, // PPRorPNR:ssub_hi |
| 109637 | 0, // PPRorPNR:sub_32 |
| 109638 | 0, // PPRorPNR:sub_32_hi |
| 109639 | 0, // PPRorPNR:sube32 |
| 109640 | 0, // PPRorPNR:sube64 |
| 109641 | 0, // PPRorPNR:subo32 |
| 109642 | 0, // PPRorPNR:subo64 |
| 109643 | 0, // PPRorPNR:x8sub_0 |
| 109644 | 0, // PPRorPNR:x8sub_1 |
| 109645 | 0, // PPRorPNR:x8sub_2 |
| 109646 | 0, // PPRorPNR:x8sub_3 |
| 109647 | 0, // PPRorPNR:x8sub_4 |
| 109648 | 0, // PPRorPNR:x8sub_5 |
| 109649 | 0, // PPRorPNR:x8sub_6 |
| 109650 | 0, // PPRorPNR:x8sub_7 |
| 109651 | 0, // PPRorPNR:zasubb |
| 109652 | 0, // PPRorPNR:zasubd0 |
| 109653 | 0, // PPRorPNR:zasubd1 |
| 109654 | 0, // PPRorPNR:zasubh0 |
| 109655 | 0, // PPRorPNR:zasubh1 |
| 109656 | 0, // PPRorPNR:zasubq0 |
| 109657 | 0, // PPRorPNR:zasubq1 |
| 109658 | 0, // PPRorPNR:zasubs0 |
| 109659 | 0, // PPRorPNR:zasubs1 |
| 109660 | 0, // PPRorPNR:zsub |
| 109661 | 0, // PPRorPNR:zsub0 |
| 109662 | 0, // PPRorPNR:zsub1 |
| 109663 | 0, // PPRorPNR:zsub2 |
| 109664 | 0, // PPRorPNR:zsub3 |
| 109665 | 0, // PPRorPNR:zsub_hi |
| 109666 | 0, // PPRorPNR:zasubd1_then_zasubq0 |
| 109667 | 0, // PPRorPNR:zasubd1_then_zasubq1 |
| 109668 | 0, // PPRorPNR:zasubs1_then_zasubd0 |
| 109669 | 0, // PPRorPNR:zasubs1_then_zasubd1 |
| 109670 | 0, // PPRorPNR:zasubs1_then_zasubq0 |
| 109671 | 0, // PPRorPNR:zasubs1_then_zasubq1 |
| 109672 | 0, // PPRorPNR:zasubs1_then_zasubd1_then_zasubq0 |
| 109673 | 0, // PPRorPNR:zasubs1_then_zasubd1_then_zasubq1 |
| 109674 | 0, // PPRorPNR:zasubh1_then_zasubd0 |
| 109675 | 0, // PPRorPNR:zasubh1_then_zasubd1 |
| 109676 | 0, // PPRorPNR:zasubh1_then_zasubq0 |
| 109677 | 0, // PPRorPNR:zasubh1_then_zasubq1 |
| 109678 | 0, // PPRorPNR:zasubh1_then_zasubs0 |
| 109679 | 0, // PPRorPNR:zasubh1_then_zasubs1 |
| 109680 | 0, // PPRorPNR:zasubh1_then_zasubd1_then_zasubq0 |
| 109681 | 0, // PPRorPNR:zasubh1_then_zasubd1_then_zasubq1 |
| 109682 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubd0 |
| 109683 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubd1 |
| 109684 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubq0 |
| 109685 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubq1 |
| 109686 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109687 | 0, // PPRorPNR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109688 | 0, // PPRorPNR:dsub1_then_bsub |
| 109689 | 0, // PPRorPNR:dsub1_then_bsub_hi |
| 109690 | 0, // PPRorPNR:dsub1_then_hsub |
| 109691 | 0, // PPRorPNR:dsub1_then_hsub_hi |
| 109692 | 0, // PPRorPNR:dsub1_then_ssub |
| 109693 | 0, // PPRorPNR:dsub1_then_ssub_hi |
| 109694 | 0, // PPRorPNR:dsub3_then_bsub |
| 109695 | 0, // PPRorPNR:dsub3_then_bsub_hi |
| 109696 | 0, // PPRorPNR:dsub3_then_hsub |
| 109697 | 0, // PPRorPNR:dsub3_then_hsub_hi |
| 109698 | 0, // PPRorPNR:dsub3_then_ssub |
| 109699 | 0, // PPRorPNR:dsub3_then_ssub_hi |
| 109700 | 0, // PPRorPNR:dsub2_then_bsub |
| 109701 | 0, // PPRorPNR:dsub2_then_bsub_hi |
| 109702 | 0, // PPRorPNR:dsub2_then_hsub |
| 109703 | 0, // PPRorPNR:dsub2_then_hsub_hi |
| 109704 | 0, // PPRorPNR:dsub2_then_ssub |
| 109705 | 0, // PPRorPNR:dsub2_then_ssub_hi |
| 109706 | 0, // PPRorPNR:psub1_then_psub |
| 109707 | 0, // PPRorPNR:qsub1_then_dsub_hi |
| 109708 | 0, // PPRorPNR:qsub3_then_dsub_hi |
| 109709 | 0, // PPRorPNR:qsub2_then_dsub_hi |
| 109710 | 0, // PPRorPNR:x8sub_7_then_sub_32 |
| 109711 | 0, // PPRorPNR:x8sub_7_then_sub_32_hi |
| 109712 | 0, // PPRorPNR:x8sub_6_then_sub_32 |
| 109713 | 0, // PPRorPNR:x8sub_6_then_sub_32_hi |
| 109714 | 0, // PPRorPNR:x8sub_5_then_sub_32 |
| 109715 | 0, // PPRorPNR:x8sub_5_then_sub_32_hi |
| 109716 | 0, // PPRorPNR:x8sub_4_then_sub_32 |
| 109717 | 0, // PPRorPNR:x8sub_4_then_sub_32_hi |
| 109718 | 0, // PPRorPNR:x8sub_3_then_sub_32 |
| 109719 | 0, // PPRorPNR:x8sub_3_then_sub_32_hi |
| 109720 | 0, // PPRorPNR:x8sub_2_then_sub_32 |
| 109721 | 0, // PPRorPNR:x8sub_2_then_sub_32_hi |
| 109722 | 0, // PPRorPNR:x8sub_1_then_sub_32 |
| 109723 | 0, // PPRorPNR:x8sub_1_then_sub_32_hi |
| 109724 | 0, // PPRorPNR:subo64_then_sub_32 |
| 109725 | 0, // PPRorPNR:subo64_then_sub_32_hi |
| 109726 | 0, // PPRorPNR:zsub1_then_zsub_hi |
| 109727 | 0, // PPRorPNR:zsub3_then_zsub_hi |
| 109728 | 0, // PPRorPNR:zsub2_then_zsub_hi |
| 109729 | 0, // PPRorPNR:dsub0_dsub1 |
| 109730 | 0, // PPRorPNR:dsub0_dsub1_dsub2 |
| 109731 | 0, // PPRorPNR:dsub1_dsub2 |
| 109732 | 0, // PPRorPNR:dsub1_dsub2_dsub3 |
| 109733 | 0, // PPRorPNR:dsub2_dsub3 |
| 109734 | 0, // PPRorPNR:dsub_dsub1 |
| 109735 | 0, // PPRorPNR:dsub_dsub1_dsub2_dsub3 |
| 109736 | 0, // PPRorPNR:dsub_dsub1_dsub2 |
| 109737 | 0, // PPRorPNR:qsub0_qsub1 |
| 109738 | 0, // PPRorPNR:qsub0_qsub1_qsub2 |
| 109739 | 0, // PPRorPNR:qsub1_qsub2 |
| 109740 | 0, // PPRorPNR:qsub1_qsub2_qsub3 |
| 109741 | 0, // PPRorPNR:qsub2_qsub3 |
| 109742 | 0, // PPRorPNR:sub_32_x8sub_1_then_sub_32 |
| 109743 | 0, // PPRorPNR:x8sub_0_x8sub_1 |
| 109744 | 0, // PPRorPNR:x8sub_2_x8sub_3 |
| 109745 | 0, // PPRorPNR:x8sub_4_x8sub_5 |
| 109746 | 0, // PPRorPNR:x8sub_6_x8sub_7 |
| 109747 | 0, // PPRorPNR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109748 | 0, // PPRorPNR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109749 | 0, // PPRorPNR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109750 | 0, // PPRorPNR:sub_32_subo64_then_sub_32 |
| 109751 | 0, // PPRorPNR:zsub_qsub1 |
| 109752 | 0, // PPRorPNR:zsub_qsub1_qsub2_qsub3 |
| 109753 | 0, // PPRorPNR:zsub_qsub1_qsub2 |
| 109754 | 0, // PPRorPNR:zsub0_zsub1 |
| 109755 | 0, // PPRorPNR:zsub0_zsub1_zsub2 |
| 109756 | 0, // PPRorPNR:zsub1_zsub2 |
| 109757 | 0, // PPRorPNR:zsub1_zsub2_zsub3 |
| 109758 | 0, // PPRorPNR:zsub2_zsub3 |
| 109759 | 0, // PPRorPNR:zsub0_zsub2 |
| 109760 | 0, // PPRorPNR:zsub1_zsub3 |
| 109761 | }, |
| 109762 | { // FPR16_lo |
| 109763 | 7, // FPR16_lo:bsub -> FPR8 |
| 109764 | 0, // FPR16_lo:bsub_hi |
| 109765 | 0, // FPR16_lo:dsub |
| 109766 | 0, // FPR16_lo:dsub0 |
| 109767 | 0, // FPR16_lo:dsub1 |
| 109768 | 0, // FPR16_lo:dsub2 |
| 109769 | 0, // FPR16_lo:dsub3 |
| 109770 | 0, // FPR16_lo:dsub_hi |
| 109771 | 0, // FPR16_lo:hsub |
| 109772 | 0, // FPR16_lo:hsub_hi |
| 109773 | 0, // FPR16_lo:psub |
| 109774 | 0, // FPR16_lo:psub0 |
| 109775 | 0, // FPR16_lo:psub1 |
| 109776 | 0, // FPR16_lo:qsub0 |
| 109777 | 0, // FPR16_lo:qsub1 |
| 109778 | 0, // FPR16_lo:qsub2 |
| 109779 | 0, // FPR16_lo:qsub3 |
| 109780 | 0, // FPR16_lo:ssub |
| 109781 | 0, // FPR16_lo:ssub_hi |
| 109782 | 0, // FPR16_lo:sub_32 |
| 109783 | 0, // FPR16_lo:sub_32_hi |
| 109784 | 0, // FPR16_lo:sube32 |
| 109785 | 0, // FPR16_lo:sube64 |
| 109786 | 0, // FPR16_lo:subo32 |
| 109787 | 0, // FPR16_lo:subo64 |
| 109788 | 0, // FPR16_lo:x8sub_0 |
| 109789 | 0, // FPR16_lo:x8sub_1 |
| 109790 | 0, // FPR16_lo:x8sub_2 |
| 109791 | 0, // FPR16_lo:x8sub_3 |
| 109792 | 0, // FPR16_lo:x8sub_4 |
| 109793 | 0, // FPR16_lo:x8sub_5 |
| 109794 | 0, // FPR16_lo:x8sub_6 |
| 109795 | 0, // FPR16_lo:x8sub_7 |
| 109796 | 0, // FPR16_lo:zasubb |
| 109797 | 0, // FPR16_lo:zasubd0 |
| 109798 | 0, // FPR16_lo:zasubd1 |
| 109799 | 0, // FPR16_lo:zasubh0 |
| 109800 | 0, // FPR16_lo:zasubh1 |
| 109801 | 0, // FPR16_lo:zasubq0 |
| 109802 | 0, // FPR16_lo:zasubq1 |
| 109803 | 0, // FPR16_lo:zasubs0 |
| 109804 | 0, // FPR16_lo:zasubs1 |
| 109805 | 0, // FPR16_lo:zsub |
| 109806 | 0, // FPR16_lo:zsub0 |
| 109807 | 0, // FPR16_lo:zsub1 |
| 109808 | 0, // FPR16_lo:zsub2 |
| 109809 | 0, // FPR16_lo:zsub3 |
| 109810 | 0, // FPR16_lo:zsub_hi |
| 109811 | 0, // FPR16_lo:zasubd1_then_zasubq0 |
| 109812 | 0, // FPR16_lo:zasubd1_then_zasubq1 |
| 109813 | 0, // FPR16_lo:zasubs1_then_zasubd0 |
| 109814 | 0, // FPR16_lo:zasubs1_then_zasubd1 |
| 109815 | 0, // FPR16_lo:zasubs1_then_zasubq0 |
| 109816 | 0, // FPR16_lo:zasubs1_then_zasubq1 |
| 109817 | 0, // FPR16_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 109818 | 0, // FPR16_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 109819 | 0, // FPR16_lo:zasubh1_then_zasubd0 |
| 109820 | 0, // FPR16_lo:zasubh1_then_zasubd1 |
| 109821 | 0, // FPR16_lo:zasubh1_then_zasubq0 |
| 109822 | 0, // FPR16_lo:zasubh1_then_zasubq1 |
| 109823 | 0, // FPR16_lo:zasubh1_then_zasubs0 |
| 109824 | 0, // FPR16_lo:zasubh1_then_zasubs1 |
| 109825 | 0, // FPR16_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 109826 | 0, // FPR16_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 109827 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 109828 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 109829 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 109830 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 109831 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109832 | 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109833 | 0, // FPR16_lo:dsub1_then_bsub |
| 109834 | 0, // FPR16_lo:dsub1_then_bsub_hi |
| 109835 | 0, // FPR16_lo:dsub1_then_hsub |
| 109836 | 0, // FPR16_lo:dsub1_then_hsub_hi |
| 109837 | 0, // FPR16_lo:dsub1_then_ssub |
| 109838 | 0, // FPR16_lo:dsub1_then_ssub_hi |
| 109839 | 0, // FPR16_lo:dsub3_then_bsub |
| 109840 | 0, // FPR16_lo:dsub3_then_bsub_hi |
| 109841 | 0, // FPR16_lo:dsub3_then_hsub |
| 109842 | 0, // FPR16_lo:dsub3_then_hsub_hi |
| 109843 | 0, // FPR16_lo:dsub3_then_ssub |
| 109844 | 0, // FPR16_lo:dsub3_then_ssub_hi |
| 109845 | 0, // FPR16_lo:dsub2_then_bsub |
| 109846 | 0, // FPR16_lo:dsub2_then_bsub_hi |
| 109847 | 0, // FPR16_lo:dsub2_then_hsub |
| 109848 | 0, // FPR16_lo:dsub2_then_hsub_hi |
| 109849 | 0, // FPR16_lo:dsub2_then_ssub |
| 109850 | 0, // FPR16_lo:dsub2_then_ssub_hi |
| 109851 | 0, // FPR16_lo:psub1_then_psub |
| 109852 | 0, // FPR16_lo:qsub1_then_dsub_hi |
| 109853 | 0, // FPR16_lo:qsub3_then_dsub_hi |
| 109854 | 0, // FPR16_lo:qsub2_then_dsub_hi |
| 109855 | 0, // FPR16_lo:x8sub_7_then_sub_32 |
| 109856 | 0, // FPR16_lo:x8sub_7_then_sub_32_hi |
| 109857 | 0, // FPR16_lo:x8sub_6_then_sub_32 |
| 109858 | 0, // FPR16_lo:x8sub_6_then_sub_32_hi |
| 109859 | 0, // FPR16_lo:x8sub_5_then_sub_32 |
| 109860 | 0, // FPR16_lo:x8sub_5_then_sub_32_hi |
| 109861 | 0, // FPR16_lo:x8sub_4_then_sub_32 |
| 109862 | 0, // FPR16_lo:x8sub_4_then_sub_32_hi |
| 109863 | 0, // FPR16_lo:x8sub_3_then_sub_32 |
| 109864 | 0, // FPR16_lo:x8sub_3_then_sub_32_hi |
| 109865 | 0, // FPR16_lo:x8sub_2_then_sub_32 |
| 109866 | 0, // FPR16_lo:x8sub_2_then_sub_32_hi |
| 109867 | 0, // FPR16_lo:x8sub_1_then_sub_32 |
| 109868 | 0, // FPR16_lo:x8sub_1_then_sub_32_hi |
| 109869 | 0, // FPR16_lo:subo64_then_sub_32 |
| 109870 | 0, // FPR16_lo:subo64_then_sub_32_hi |
| 109871 | 0, // FPR16_lo:zsub1_then_zsub_hi |
| 109872 | 0, // FPR16_lo:zsub3_then_zsub_hi |
| 109873 | 0, // FPR16_lo:zsub2_then_zsub_hi |
| 109874 | 0, // FPR16_lo:dsub0_dsub1 |
| 109875 | 0, // FPR16_lo:dsub0_dsub1_dsub2 |
| 109876 | 0, // FPR16_lo:dsub1_dsub2 |
| 109877 | 0, // FPR16_lo:dsub1_dsub2_dsub3 |
| 109878 | 0, // FPR16_lo:dsub2_dsub3 |
| 109879 | 0, // FPR16_lo:dsub_dsub1 |
| 109880 | 0, // FPR16_lo:dsub_dsub1_dsub2_dsub3 |
| 109881 | 0, // FPR16_lo:dsub_dsub1_dsub2 |
| 109882 | 0, // FPR16_lo:qsub0_qsub1 |
| 109883 | 0, // FPR16_lo:qsub0_qsub1_qsub2 |
| 109884 | 0, // FPR16_lo:qsub1_qsub2 |
| 109885 | 0, // FPR16_lo:qsub1_qsub2_qsub3 |
| 109886 | 0, // FPR16_lo:qsub2_qsub3 |
| 109887 | 0, // FPR16_lo:sub_32_x8sub_1_then_sub_32 |
| 109888 | 0, // FPR16_lo:x8sub_0_x8sub_1 |
| 109889 | 0, // FPR16_lo:x8sub_2_x8sub_3 |
| 109890 | 0, // FPR16_lo:x8sub_4_x8sub_5 |
| 109891 | 0, // FPR16_lo:x8sub_6_x8sub_7 |
| 109892 | 0, // FPR16_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 109893 | 0, // FPR16_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 109894 | 0, // FPR16_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 109895 | 0, // FPR16_lo:sub_32_subo64_then_sub_32 |
| 109896 | 0, // FPR16_lo:zsub_qsub1 |
| 109897 | 0, // FPR16_lo:zsub_qsub1_qsub2_qsub3 |
| 109898 | 0, // FPR16_lo:zsub_qsub1_qsub2 |
| 109899 | 0, // FPR16_lo:zsub0_zsub1 |
| 109900 | 0, // FPR16_lo:zsub0_zsub1_zsub2 |
| 109901 | 0, // FPR16_lo:zsub1_zsub2 |
| 109902 | 0, // FPR16_lo:zsub1_zsub2_zsub3 |
| 109903 | 0, // FPR16_lo:zsub2_zsub3 |
| 109904 | 0, // FPR16_lo:zsub0_zsub2 |
| 109905 | 0, // FPR16_lo:zsub1_zsub3 |
| 109906 | }, |
| 109907 | { // PNR |
| 109908 | 0, // PNR:bsub |
| 109909 | 0, // PNR:bsub_hi |
| 109910 | 0, // PNR:dsub |
| 109911 | 0, // PNR:dsub0 |
| 109912 | 0, // PNR:dsub1 |
| 109913 | 0, // PNR:dsub2 |
| 109914 | 0, // PNR:dsub3 |
| 109915 | 0, // PNR:dsub_hi |
| 109916 | 0, // PNR:hsub |
| 109917 | 0, // PNR:hsub_hi |
| 109918 | 0, // PNR:psub |
| 109919 | 0, // PNR:psub0 |
| 109920 | 0, // PNR:psub1 |
| 109921 | 0, // PNR:qsub0 |
| 109922 | 0, // PNR:qsub1 |
| 109923 | 0, // PNR:qsub2 |
| 109924 | 0, // PNR:qsub3 |
| 109925 | 0, // PNR:ssub |
| 109926 | 0, // PNR:ssub_hi |
| 109927 | 0, // PNR:sub_32 |
| 109928 | 0, // PNR:sub_32_hi |
| 109929 | 0, // PNR:sube32 |
| 109930 | 0, // PNR:sube64 |
| 109931 | 0, // PNR:subo32 |
| 109932 | 0, // PNR:subo64 |
| 109933 | 0, // PNR:x8sub_0 |
| 109934 | 0, // PNR:x8sub_1 |
| 109935 | 0, // PNR:x8sub_2 |
| 109936 | 0, // PNR:x8sub_3 |
| 109937 | 0, // PNR:x8sub_4 |
| 109938 | 0, // PNR:x8sub_5 |
| 109939 | 0, // PNR:x8sub_6 |
| 109940 | 0, // PNR:x8sub_7 |
| 109941 | 0, // PNR:zasubb |
| 109942 | 0, // PNR:zasubd0 |
| 109943 | 0, // PNR:zasubd1 |
| 109944 | 0, // PNR:zasubh0 |
| 109945 | 0, // PNR:zasubh1 |
| 109946 | 0, // PNR:zasubq0 |
| 109947 | 0, // PNR:zasubq1 |
| 109948 | 0, // PNR:zasubs0 |
| 109949 | 0, // PNR:zasubs1 |
| 109950 | 0, // PNR:zsub |
| 109951 | 0, // PNR:zsub0 |
| 109952 | 0, // PNR:zsub1 |
| 109953 | 0, // PNR:zsub2 |
| 109954 | 0, // PNR:zsub3 |
| 109955 | 0, // PNR:zsub_hi |
| 109956 | 0, // PNR:zasubd1_then_zasubq0 |
| 109957 | 0, // PNR:zasubd1_then_zasubq1 |
| 109958 | 0, // PNR:zasubs1_then_zasubd0 |
| 109959 | 0, // PNR:zasubs1_then_zasubd1 |
| 109960 | 0, // PNR:zasubs1_then_zasubq0 |
| 109961 | 0, // PNR:zasubs1_then_zasubq1 |
| 109962 | 0, // PNR:zasubs1_then_zasubd1_then_zasubq0 |
| 109963 | 0, // PNR:zasubs1_then_zasubd1_then_zasubq1 |
| 109964 | 0, // PNR:zasubh1_then_zasubd0 |
| 109965 | 0, // PNR:zasubh1_then_zasubd1 |
| 109966 | 0, // PNR:zasubh1_then_zasubq0 |
| 109967 | 0, // PNR:zasubh1_then_zasubq1 |
| 109968 | 0, // PNR:zasubh1_then_zasubs0 |
| 109969 | 0, // PNR:zasubh1_then_zasubs1 |
| 109970 | 0, // PNR:zasubh1_then_zasubd1_then_zasubq0 |
| 109971 | 0, // PNR:zasubh1_then_zasubd1_then_zasubq1 |
| 109972 | 0, // PNR:zasubh1_then_zasubs1_then_zasubd0 |
| 109973 | 0, // PNR:zasubh1_then_zasubs1_then_zasubd1 |
| 109974 | 0, // PNR:zasubh1_then_zasubs1_then_zasubq0 |
| 109975 | 0, // PNR:zasubh1_then_zasubs1_then_zasubq1 |
| 109976 | 0, // PNR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 109977 | 0, // PNR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 109978 | 0, // PNR:dsub1_then_bsub |
| 109979 | 0, // PNR:dsub1_then_bsub_hi |
| 109980 | 0, // PNR:dsub1_then_hsub |
| 109981 | 0, // PNR:dsub1_then_hsub_hi |
| 109982 | 0, // PNR:dsub1_then_ssub |
| 109983 | 0, // PNR:dsub1_then_ssub_hi |
| 109984 | 0, // PNR:dsub3_then_bsub |
| 109985 | 0, // PNR:dsub3_then_bsub_hi |
| 109986 | 0, // PNR:dsub3_then_hsub |
| 109987 | 0, // PNR:dsub3_then_hsub_hi |
| 109988 | 0, // PNR:dsub3_then_ssub |
| 109989 | 0, // PNR:dsub3_then_ssub_hi |
| 109990 | 0, // PNR:dsub2_then_bsub |
| 109991 | 0, // PNR:dsub2_then_bsub_hi |
| 109992 | 0, // PNR:dsub2_then_hsub |
| 109993 | 0, // PNR:dsub2_then_hsub_hi |
| 109994 | 0, // PNR:dsub2_then_ssub |
| 109995 | 0, // PNR:dsub2_then_ssub_hi |
| 109996 | 0, // PNR:psub1_then_psub |
| 109997 | 0, // PNR:qsub1_then_dsub_hi |
| 109998 | 0, // PNR:qsub3_then_dsub_hi |
| 109999 | 0, // PNR:qsub2_then_dsub_hi |
| 110000 | 0, // PNR:x8sub_7_then_sub_32 |
| 110001 | 0, // PNR:x8sub_7_then_sub_32_hi |
| 110002 | 0, // PNR:x8sub_6_then_sub_32 |
| 110003 | 0, // PNR:x8sub_6_then_sub_32_hi |
| 110004 | 0, // PNR:x8sub_5_then_sub_32 |
| 110005 | 0, // PNR:x8sub_5_then_sub_32_hi |
| 110006 | 0, // PNR:x8sub_4_then_sub_32 |
| 110007 | 0, // PNR:x8sub_4_then_sub_32_hi |
| 110008 | 0, // PNR:x8sub_3_then_sub_32 |
| 110009 | 0, // PNR:x8sub_3_then_sub_32_hi |
| 110010 | 0, // PNR:x8sub_2_then_sub_32 |
| 110011 | 0, // PNR:x8sub_2_then_sub_32_hi |
| 110012 | 0, // PNR:x8sub_1_then_sub_32 |
| 110013 | 0, // PNR:x8sub_1_then_sub_32_hi |
| 110014 | 0, // PNR:subo64_then_sub_32 |
| 110015 | 0, // PNR:subo64_then_sub_32_hi |
| 110016 | 0, // PNR:zsub1_then_zsub_hi |
| 110017 | 0, // PNR:zsub3_then_zsub_hi |
| 110018 | 0, // PNR:zsub2_then_zsub_hi |
| 110019 | 0, // PNR:dsub0_dsub1 |
| 110020 | 0, // PNR:dsub0_dsub1_dsub2 |
| 110021 | 0, // PNR:dsub1_dsub2 |
| 110022 | 0, // PNR:dsub1_dsub2_dsub3 |
| 110023 | 0, // PNR:dsub2_dsub3 |
| 110024 | 0, // PNR:dsub_dsub1 |
| 110025 | 0, // PNR:dsub_dsub1_dsub2_dsub3 |
| 110026 | 0, // PNR:dsub_dsub1_dsub2 |
| 110027 | 0, // PNR:qsub0_qsub1 |
| 110028 | 0, // PNR:qsub0_qsub1_qsub2 |
| 110029 | 0, // PNR:qsub1_qsub2 |
| 110030 | 0, // PNR:qsub1_qsub2_qsub3 |
| 110031 | 0, // PNR:qsub2_qsub3 |
| 110032 | 0, // PNR:sub_32_x8sub_1_then_sub_32 |
| 110033 | 0, // PNR:x8sub_0_x8sub_1 |
| 110034 | 0, // PNR:x8sub_2_x8sub_3 |
| 110035 | 0, // PNR:x8sub_4_x8sub_5 |
| 110036 | 0, // PNR:x8sub_6_x8sub_7 |
| 110037 | 0, // PNR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110038 | 0, // PNR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110039 | 0, // PNR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110040 | 0, // PNR:sub_32_subo64_then_sub_32 |
| 110041 | 0, // PNR:zsub_qsub1 |
| 110042 | 0, // PNR:zsub_qsub1_qsub2_qsub3 |
| 110043 | 0, // PNR:zsub_qsub1_qsub2 |
| 110044 | 0, // PNR:zsub0_zsub1 |
| 110045 | 0, // PNR:zsub0_zsub1_zsub2 |
| 110046 | 0, // PNR:zsub1_zsub2 |
| 110047 | 0, // PNR:zsub1_zsub2_zsub3 |
| 110048 | 0, // PNR:zsub2_zsub3 |
| 110049 | 0, // PNR:zsub0_zsub2 |
| 110050 | 0, // PNR:zsub1_zsub3 |
| 110051 | }, |
| 110052 | { // PPR |
| 110053 | 0, // PPR:bsub |
| 110054 | 0, // PPR:bsub_hi |
| 110055 | 0, // PPR:dsub |
| 110056 | 0, // PPR:dsub0 |
| 110057 | 0, // PPR:dsub1 |
| 110058 | 0, // PPR:dsub2 |
| 110059 | 0, // PPR:dsub3 |
| 110060 | 0, // PPR:dsub_hi |
| 110061 | 0, // PPR:hsub |
| 110062 | 0, // PPR:hsub_hi |
| 110063 | 11, // PPR:psub -> PNR |
| 110064 | 0, // PPR:psub0 |
| 110065 | 0, // PPR:psub1 |
| 110066 | 0, // PPR:qsub0 |
| 110067 | 0, // PPR:qsub1 |
| 110068 | 0, // PPR:qsub2 |
| 110069 | 0, // PPR:qsub3 |
| 110070 | 0, // PPR:ssub |
| 110071 | 0, // PPR:ssub_hi |
| 110072 | 0, // PPR:sub_32 |
| 110073 | 0, // PPR:sub_32_hi |
| 110074 | 0, // PPR:sube32 |
| 110075 | 0, // PPR:sube64 |
| 110076 | 0, // PPR:subo32 |
| 110077 | 0, // PPR:subo64 |
| 110078 | 0, // PPR:x8sub_0 |
| 110079 | 0, // PPR:x8sub_1 |
| 110080 | 0, // PPR:x8sub_2 |
| 110081 | 0, // PPR:x8sub_3 |
| 110082 | 0, // PPR:x8sub_4 |
| 110083 | 0, // PPR:x8sub_5 |
| 110084 | 0, // PPR:x8sub_6 |
| 110085 | 0, // PPR:x8sub_7 |
| 110086 | 0, // PPR:zasubb |
| 110087 | 0, // PPR:zasubd0 |
| 110088 | 0, // PPR:zasubd1 |
| 110089 | 0, // PPR:zasubh0 |
| 110090 | 0, // PPR:zasubh1 |
| 110091 | 0, // PPR:zasubq0 |
| 110092 | 0, // PPR:zasubq1 |
| 110093 | 0, // PPR:zasubs0 |
| 110094 | 0, // PPR:zasubs1 |
| 110095 | 0, // PPR:zsub |
| 110096 | 0, // PPR:zsub0 |
| 110097 | 0, // PPR:zsub1 |
| 110098 | 0, // PPR:zsub2 |
| 110099 | 0, // PPR:zsub3 |
| 110100 | 0, // PPR:zsub_hi |
| 110101 | 0, // PPR:zasubd1_then_zasubq0 |
| 110102 | 0, // PPR:zasubd1_then_zasubq1 |
| 110103 | 0, // PPR:zasubs1_then_zasubd0 |
| 110104 | 0, // PPR:zasubs1_then_zasubd1 |
| 110105 | 0, // PPR:zasubs1_then_zasubq0 |
| 110106 | 0, // PPR:zasubs1_then_zasubq1 |
| 110107 | 0, // PPR:zasubs1_then_zasubd1_then_zasubq0 |
| 110108 | 0, // PPR:zasubs1_then_zasubd1_then_zasubq1 |
| 110109 | 0, // PPR:zasubh1_then_zasubd0 |
| 110110 | 0, // PPR:zasubh1_then_zasubd1 |
| 110111 | 0, // PPR:zasubh1_then_zasubq0 |
| 110112 | 0, // PPR:zasubh1_then_zasubq1 |
| 110113 | 0, // PPR:zasubh1_then_zasubs0 |
| 110114 | 0, // PPR:zasubh1_then_zasubs1 |
| 110115 | 0, // PPR:zasubh1_then_zasubd1_then_zasubq0 |
| 110116 | 0, // PPR:zasubh1_then_zasubd1_then_zasubq1 |
| 110117 | 0, // PPR:zasubh1_then_zasubs1_then_zasubd0 |
| 110118 | 0, // PPR:zasubh1_then_zasubs1_then_zasubd1 |
| 110119 | 0, // PPR:zasubh1_then_zasubs1_then_zasubq0 |
| 110120 | 0, // PPR:zasubh1_then_zasubs1_then_zasubq1 |
| 110121 | 0, // PPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110122 | 0, // PPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110123 | 0, // PPR:dsub1_then_bsub |
| 110124 | 0, // PPR:dsub1_then_bsub_hi |
| 110125 | 0, // PPR:dsub1_then_hsub |
| 110126 | 0, // PPR:dsub1_then_hsub_hi |
| 110127 | 0, // PPR:dsub1_then_ssub |
| 110128 | 0, // PPR:dsub1_then_ssub_hi |
| 110129 | 0, // PPR:dsub3_then_bsub |
| 110130 | 0, // PPR:dsub3_then_bsub_hi |
| 110131 | 0, // PPR:dsub3_then_hsub |
| 110132 | 0, // PPR:dsub3_then_hsub_hi |
| 110133 | 0, // PPR:dsub3_then_ssub |
| 110134 | 0, // PPR:dsub3_then_ssub_hi |
| 110135 | 0, // PPR:dsub2_then_bsub |
| 110136 | 0, // PPR:dsub2_then_bsub_hi |
| 110137 | 0, // PPR:dsub2_then_hsub |
| 110138 | 0, // PPR:dsub2_then_hsub_hi |
| 110139 | 0, // PPR:dsub2_then_ssub |
| 110140 | 0, // PPR:dsub2_then_ssub_hi |
| 110141 | 0, // PPR:psub1_then_psub |
| 110142 | 0, // PPR:qsub1_then_dsub_hi |
| 110143 | 0, // PPR:qsub3_then_dsub_hi |
| 110144 | 0, // PPR:qsub2_then_dsub_hi |
| 110145 | 0, // PPR:x8sub_7_then_sub_32 |
| 110146 | 0, // PPR:x8sub_7_then_sub_32_hi |
| 110147 | 0, // PPR:x8sub_6_then_sub_32 |
| 110148 | 0, // PPR:x8sub_6_then_sub_32_hi |
| 110149 | 0, // PPR:x8sub_5_then_sub_32 |
| 110150 | 0, // PPR:x8sub_5_then_sub_32_hi |
| 110151 | 0, // PPR:x8sub_4_then_sub_32 |
| 110152 | 0, // PPR:x8sub_4_then_sub_32_hi |
| 110153 | 0, // PPR:x8sub_3_then_sub_32 |
| 110154 | 0, // PPR:x8sub_3_then_sub_32_hi |
| 110155 | 0, // PPR:x8sub_2_then_sub_32 |
| 110156 | 0, // PPR:x8sub_2_then_sub_32_hi |
| 110157 | 0, // PPR:x8sub_1_then_sub_32 |
| 110158 | 0, // PPR:x8sub_1_then_sub_32_hi |
| 110159 | 0, // PPR:subo64_then_sub_32 |
| 110160 | 0, // PPR:subo64_then_sub_32_hi |
| 110161 | 0, // PPR:zsub1_then_zsub_hi |
| 110162 | 0, // PPR:zsub3_then_zsub_hi |
| 110163 | 0, // PPR:zsub2_then_zsub_hi |
| 110164 | 0, // PPR:dsub0_dsub1 |
| 110165 | 0, // PPR:dsub0_dsub1_dsub2 |
| 110166 | 0, // PPR:dsub1_dsub2 |
| 110167 | 0, // PPR:dsub1_dsub2_dsub3 |
| 110168 | 0, // PPR:dsub2_dsub3 |
| 110169 | 0, // PPR:dsub_dsub1 |
| 110170 | 0, // PPR:dsub_dsub1_dsub2_dsub3 |
| 110171 | 0, // PPR:dsub_dsub1_dsub2 |
| 110172 | 0, // PPR:qsub0_qsub1 |
| 110173 | 0, // PPR:qsub0_qsub1_qsub2 |
| 110174 | 0, // PPR:qsub1_qsub2 |
| 110175 | 0, // PPR:qsub1_qsub2_qsub3 |
| 110176 | 0, // PPR:qsub2_qsub3 |
| 110177 | 0, // PPR:sub_32_x8sub_1_then_sub_32 |
| 110178 | 0, // PPR:x8sub_0_x8sub_1 |
| 110179 | 0, // PPR:x8sub_2_x8sub_3 |
| 110180 | 0, // PPR:x8sub_4_x8sub_5 |
| 110181 | 0, // PPR:x8sub_6_x8sub_7 |
| 110182 | 0, // PPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110183 | 0, // PPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110184 | 0, // PPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110185 | 0, // PPR:sub_32_subo64_then_sub_32 |
| 110186 | 0, // PPR:zsub_qsub1 |
| 110187 | 0, // PPR:zsub_qsub1_qsub2_qsub3 |
| 110188 | 0, // PPR:zsub_qsub1_qsub2 |
| 110189 | 0, // PPR:zsub0_zsub1 |
| 110190 | 0, // PPR:zsub0_zsub1_zsub2 |
| 110191 | 0, // PPR:zsub1_zsub2 |
| 110192 | 0, // PPR:zsub1_zsub2_zsub3 |
| 110193 | 0, // PPR:zsub2_zsub3 |
| 110194 | 0, // PPR:zsub0_zsub2 |
| 110195 | 0, // PPR:zsub1_zsub3 |
| 110196 | }, |
| 110197 | { // PNR_3b |
| 110198 | 0, // PNR_3b:bsub |
| 110199 | 0, // PNR_3b:bsub_hi |
| 110200 | 0, // PNR_3b:dsub |
| 110201 | 0, // PNR_3b:dsub0 |
| 110202 | 0, // PNR_3b:dsub1 |
| 110203 | 0, // PNR_3b:dsub2 |
| 110204 | 0, // PNR_3b:dsub3 |
| 110205 | 0, // PNR_3b:dsub_hi |
| 110206 | 0, // PNR_3b:hsub |
| 110207 | 0, // PNR_3b:hsub_hi |
| 110208 | 0, // PNR_3b:psub |
| 110209 | 0, // PNR_3b:psub0 |
| 110210 | 0, // PNR_3b:psub1 |
| 110211 | 0, // PNR_3b:qsub0 |
| 110212 | 0, // PNR_3b:qsub1 |
| 110213 | 0, // PNR_3b:qsub2 |
| 110214 | 0, // PNR_3b:qsub3 |
| 110215 | 0, // PNR_3b:ssub |
| 110216 | 0, // PNR_3b:ssub_hi |
| 110217 | 0, // PNR_3b:sub_32 |
| 110218 | 0, // PNR_3b:sub_32_hi |
| 110219 | 0, // PNR_3b:sube32 |
| 110220 | 0, // PNR_3b:sube64 |
| 110221 | 0, // PNR_3b:subo32 |
| 110222 | 0, // PNR_3b:subo64 |
| 110223 | 0, // PNR_3b:x8sub_0 |
| 110224 | 0, // PNR_3b:x8sub_1 |
| 110225 | 0, // PNR_3b:x8sub_2 |
| 110226 | 0, // PNR_3b:x8sub_3 |
| 110227 | 0, // PNR_3b:x8sub_4 |
| 110228 | 0, // PNR_3b:x8sub_5 |
| 110229 | 0, // PNR_3b:x8sub_6 |
| 110230 | 0, // PNR_3b:x8sub_7 |
| 110231 | 0, // PNR_3b:zasubb |
| 110232 | 0, // PNR_3b:zasubd0 |
| 110233 | 0, // PNR_3b:zasubd1 |
| 110234 | 0, // PNR_3b:zasubh0 |
| 110235 | 0, // PNR_3b:zasubh1 |
| 110236 | 0, // PNR_3b:zasubq0 |
| 110237 | 0, // PNR_3b:zasubq1 |
| 110238 | 0, // PNR_3b:zasubs0 |
| 110239 | 0, // PNR_3b:zasubs1 |
| 110240 | 0, // PNR_3b:zsub |
| 110241 | 0, // PNR_3b:zsub0 |
| 110242 | 0, // PNR_3b:zsub1 |
| 110243 | 0, // PNR_3b:zsub2 |
| 110244 | 0, // PNR_3b:zsub3 |
| 110245 | 0, // PNR_3b:zsub_hi |
| 110246 | 0, // PNR_3b:zasubd1_then_zasubq0 |
| 110247 | 0, // PNR_3b:zasubd1_then_zasubq1 |
| 110248 | 0, // PNR_3b:zasubs1_then_zasubd0 |
| 110249 | 0, // PNR_3b:zasubs1_then_zasubd1 |
| 110250 | 0, // PNR_3b:zasubs1_then_zasubq0 |
| 110251 | 0, // PNR_3b:zasubs1_then_zasubq1 |
| 110252 | 0, // PNR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 110253 | 0, // PNR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 110254 | 0, // PNR_3b:zasubh1_then_zasubd0 |
| 110255 | 0, // PNR_3b:zasubh1_then_zasubd1 |
| 110256 | 0, // PNR_3b:zasubh1_then_zasubq0 |
| 110257 | 0, // PNR_3b:zasubh1_then_zasubq1 |
| 110258 | 0, // PNR_3b:zasubh1_then_zasubs0 |
| 110259 | 0, // PNR_3b:zasubh1_then_zasubs1 |
| 110260 | 0, // PNR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 110261 | 0, // PNR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 110262 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 110263 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 110264 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 110265 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 110266 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110267 | 0, // PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110268 | 0, // PNR_3b:dsub1_then_bsub |
| 110269 | 0, // PNR_3b:dsub1_then_bsub_hi |
| 110270 | 0, // PNR_3b:dsub1_then_hsub |
| 110271 | 0, // PNR_3b:dsub1_then_hsub_hi |
| 110272 | 0, // PNR_3b:dsub1_then_ssub |
| 110273 | 0, // PNR_3b:dsub1_then_ssub_hi |
| 110274 | 0, // PNR_3b:dsub3_then_bsub |
| 110275 | 0, // PNR_3b:dsub3_then_bsub_hi |
| 110276 | 0, // PNR_3b:dsub3_then_hsub |
| 110277 | 0, // PNR_3b:dsub3_then_hsub_hi |
| 110278 | 0, // PNR_3b:dsub3_then_ssub |
| 110279 | 0, // PNR_3b:dsub3_then_ssub_hi |
| 110280 | 0, // PNR_3b:dsub2_then_bsub |
| 110281 | 0, // PNR_3b:dsub2_then_bsub_hi |
| 110282 | 0, // PNR_3b:dsub2_then_hsub |
| 110283 | 0, // PNR_3b:dsub2_then_hsub_hi |
| 110284 | 0, // PNR_3b:dsub2_then_ssub |
| 110285 | 0, // PNR_3b:dsub2_then_ssub_hi |
| 110286 | 0, // PNR_3b:psub1_then_psub |
| 110287 | 0, // PNR_3b:qsub1_then_dsub_hi |
| 110288 | 0, // PNR_3b:qsub3_then_dsub_hi |
| 110289 | 0, // PNR_3b:qsub2_then_dsub_hi |
| 110290 | 0, // PNR_3b:x8sub_7_then_sub_32 |
| 110291 | 0, // PNR_3b:x8sub_7_then_sub_32_hi |
| 110292 | 0, // PNR_3b:x8sub_6_then_sub_32 |
| 110293 | 0, // PNR_3b:x8sub_6_then_sub_32_hi |
| 110294 | 0, // PNR_3b:x8sub_5_then_sub_32 |
| 110295 | 0, // PNR_3b:x8sub_5_then_sub_32_hi |
| 110296 | 0, // PNR_3b:x8sub_4_then_sub_32 |
| 110297 | 0, // PNR_3b:x8sub_4_then_sub_32_hi |
| 110298 | 0, // PNR_3b:x8sub_3_then_sub_32 |
| 110299 | 0, // PNR_3b:x8sub_3_then_sub_32_hi |
| 110300 | 0, // PNR_3b:x8sub_2_then_sub_32 |
| 110301 | 0, // PNR_3b:x8sub_2_then_sub_32_hi |
| 110302 | 0, // PNR_3b:x8sub_1_then_sub_32 |
| 110303 | 0, // PNR_3b:x8sub_1_then_sub_32_hi |
| 110304 | 0, // PNR_3b:subo64_then_sub_32 |
| 110305 | 0, // PNR_3b:subo64_then_sub_32_hi |
| 110306 | 0, // PNR_3b:zsub1_then_zsub_hi |
| 110307 | 0, // PNR_3b:zsub3_then_zsub_hi |
| 110308 | 0, // PNR_3b:zsub2_then_zsub_hi |
| 110309 | 0, // PNR_3b:dsub0_dsub1 |
| 110310 | 0, // PNR_3b:dsub0_dsub1_dsub2 |
| 110311 | 0, // PNR_3b:dsub1_dsub2 |
| 110312 | 0, // PNR_3b:dsub1_dsub2_dsub3 |
| 110313 | 0, // PNR_3b:dsub2_dsub3 |
| 110314 | 0, // PNR_3b:dsub_dsub1 |
| 110315 | 0, // PNR_3b:dsub_dsub1_dsub2_dsub3 |
| 110316 | 0, // PNR_3b:dsub_dsub1_dsub2 |
| 110317 | 0, // PNR_3b:qsub0_qsub1 |
| 110318 | 0, // PNR_3b:qsub0_qsub1_qsub2 |
| 110319 | 0, // PNR_3b:qsub1_qsub2 |
| 110320 | 0, // PNR_3b:qsub1_qsub2_qsub3 |
| 110321 | 0, // PNR_3b:qsub2_qsub3 |
| 110322 | 0, // PNR_3b:sub_32_x8sub_1_then_sub_32 |
| 110323 | 0, // PNR_3b:x8sub_0_x8sub_1 |
| 110324 | 0, // PNR_3b:x8sub_2_x8sub_3 |
| 110325 | 0, // PNR_3b:x8sub_4_x8sub_5 |
| 110326 | 0, // PNR_3b:x8sub_6_x8sub_7 |
| 110327 | 0, // PNR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110328 | 0, // PNR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110329 | 0, // PNR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110330 | 0, // PNR_3b:sub_32_subo64_then_sub_32 |
| 110331 | 0, // PNR_3b:zsub_qsub1 |
| 110332 | 0, // PNR_3b:zsub_qsub1_qsub2_qsub3 |
| 110333 | 0, // PNR_3b:zsub_qsub1_qsub2 |
| 110334 | 0, // PNR_3b:zsub0_zsub1 |
| 110335 | 0, // PNR_3b:zsub0_zsub1_zsub2 |
| 110336 | 0, // PNR_3b:zsub1_zsub2 |
| 110337 | 0, // PNR_3b:zsub1_zsub2_zsub3 |
| 110338 | 0, // PNR_3b:zsub2_zsub3 |
| 110339 | 0, // PNR_3b:zsub0_zsub2 |
| 110340 | 0, // PNR_3b:zsub1_zsub3 |
| 110341 | }, |
| 110342 | { // PNR_p8to15 |
| 110343 | 0, // PNR_p8to15:bsub |
| 110344 | 0, // PNR_p8to15:bsub_hi |
| 110345 | 0, // PNR_p8to15:dsub |
| 110346 | 0, // PNR_p8to15:dsub0 |
| 110347 | 0, // PNR_p8to15:dsub1 |
| 110348 | 0, // PNR_p8to15:dsub2 |
| 110349 | 0, // PNR_p8to15:dsub3 |
| 110350 | 0, // PNR_p8to15:dsub_hi |
| 110351 | 0, // PNR_p8to15:hsub |
| 110352 | 0, // PNR_p8to15:hsub_hi |
| 110353 | 0, // PNR_p8to15:psub |
| 110354 | 0, // PNR_p8to15:psub0 |
| 110355 | 0, // PNR_p8to15:psub1 |
| 110356 | 0, // PNR_p8to15:qsub0 |
| 110357 | 0, // PNR_p8to15:qsub1 |
| 110358 | 0, // PNR_p8to15:qsub2 |
| 110359 | 0, // PNR_p8to15:qsub3 |
| 110360 | 0, // PNR_p8to15:ssub |
| 110361 | 0, // PNR_p8to15:ssub_hi |
| 110362 | 0, // PNR_p8to15:sub_32 |
| 110363 | 0, // PNR_p8to15:sub_32_hi |
| 110364 | 0, // PNR_p8to15:sube32 |
| 110365 | 0, // PNR_p8to15:sube64 |
| 110366 | 0, // PNR_p8to15:subo32 |
| 110367 | 0, // PNR_p8to15:subo64 |
| 110368 | 0, // PNR_p8to15:x8sub_0 |
| 110369 | 0, // PNR_p8to15:x8sub_1 |
| 110370 | 0, // PNR_p8to15:x8sub_2 |
| 110371 | 0, // PNR_p8to15:x8sub_3 |
| 110372 | 0, // PNR_p8to15:x8sub_4 |
| 110373 | 0, // PNR_p8to15:x8sub_5 |
| 110374 | 0, // PNR_p8to15:x8sub_6 |
| 110375 | 0, // PNR_p8to15:x8sub_7 |
| 110376 | 0, // PNR_p8to15:zasubb |
| 110377 | 0, // PNR_p8to15:zasubd0 |
| 110378 | 0, // PNR_p8to15:zasubd1 |
| 110379 | 0, // PNR_p8to15:zasubh0 |
| 110380 | 0, // PNR_p8to15:zasubh1 |
| 110381 | 0, // PNR_p8to15:zasubq0 |
| 110382 | 0, // PNR_p8to15:zasubq1 |
| 110383 | 0, // PNR_p8to15:zasubs0 |
| 110384 | 0, // PNR_p8to15:zasubs1 |
| 110385 | 0, // PNR_p8to15:zsub |
| 110386 | 0, // PNR_p8to15:zsub0 |
| 110387 | 0, // PNR_p8to15:zsub1 |
| 110388 | 0, // PNR_p8to15:zsub2 |
| 110389 | 0, // PNR_p8to15:zsub3 |
| 110390 | 0, // PNR_p8to15:zsub_hi |
| 110391 | 0, // PNR_p8to15:zasubd1_then_zasubq0 |
| 110392 | 0, // PNR_p8to15:zasubd1_then_zasubq1 |
| 110393 | 0, // PNR_p8to15:zasubs1_then_zasubd0 |
| 110394 | 0, // PNR_p8to15:zasubs1_then_zasubd1 |
| 110395 | 0, // PNR_p8to15:zasubs1_then_zasubq0 |
| 110396 | 0, // PNR_p8to15:zasubs1_then_zasubq1 |
| 110397 | 0, // PNR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 110398 | 0, // PNR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 110399 | 0, // PNR_p8to15:zasubh1_then_zasubd0 |
| 110400 | 0, // PNR_p8to15:zasubh1_then_zasubd1 |
| 110401 | 0, // PNR_p8to15:zasubh1_then_zasubq0 |
| 110402 | 0, // PNR_p8to15:zasubh1_then_zasubq1 |
| 110403 | 0, // PNR_p8to15:zasubh1_then_zasubs0 |
| 110404 | 0, // PNR_p8to15:zasubh1_then_zasubs1 |
| 110405 | 0, // PNR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 110406 | 0, // PNR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 110407 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 110408 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 110409 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 110410 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 110411 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110412 | 0, // PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110413 | 0, // PNR_p8to15:dsub1_then_bsub |
| 110414 | 0, // PNR_p8to15:dsub1_then_bsub_hi |
| 110415 | 0, // PNR_p8to15:dsub1_then_hsub |
| 110416 | 0, // PNR_p8to15:dsub1_then_hsub_hi |
| 110417 | 0, // PNR_p8to15:dsub1_then_ssub |
| 110418 | 0, // PNR_p8to15:dsub1_then_ssub_hi |
| 110419 | 0, // PNR_p8to15:dsub3_then_bsub |
| 110420 | 0, // PNR_p8to15:dsub3_then_bsub_hi |
| 110421 | 0, // PNR_p8to15:dsub3_then_hsub |
| 110422 | 0, // PNR_p8to15:dsub3_then_hsub_hi |
| 110423 | 0, // PNR_p8to15:dsub3_then_ssub |
| 110424 | 0, // PNR_p8to15:dsub3_then_ssub_hi |
| 110425 | 0, // PNR_p8to15:dsub2_then_bsub |
| 110426 | 0, // PNR_p8to15:dsub2_then_bsub_hi |
| 110427 | 0, // PNR_p8to15:dsub2_then_hsub |
| 110428 | 0, // PNR_p8to15:dsub2_then_hsub_hi |
| 110429 | 0, // PNR_p8to15:dsub2_then_ssub |
| 110430 | 0, // PNR_p8to15:dsub2_then_ssub_hi |
| 110431 | 0, // PNR_p8to15:psub1_then_psub |
| 110432 | 0, // PNR_p8to15:qsub1_then_dsub_hi |
| 110433 | 0, // PNR_p8to15:qsub3_then_dsub_hi |
| 110434 | 0, // PNR_p8to15:qsub2_then_dsub_hi |
| 110435 | 0, // PNR_p8to15:x8sub_7_then_sub_32 |
| 110436 | 0, // PNR_p8to15:x8sub_7_then_sub_32_hi |
| 110437 | 0, // PNR_p8to15:x8sub_6_then_sub_32 |
| 110438 | 0, // PNR_p8to15:x8sub_6_then_sub_32_hi |
| 110439 | 0, // PNR_p8to15:x8sub_5_then_sub_32 |
| 110440 | 0, // PNR_p8to15:x8sub_5_then_sub_32_hi |
| 110441 | 0, // PNR_p8to15:x8sub_4_then_sub_32 |
| 110442 | 0, // PNR_p8to15:x8sub_4_then_sub_32_hi |
| 110443 | 0, // PNR_p8to15:x8sub_3_then_sub_32 |
| 110444 | 0, // PNR_p8to15:x8sub_3_then_sub_32_hi |
| 110445 | 0, // PNR_p8to15:x8sub_2_then_sub_32 |
| 110446 | 0, // PNR_p8to15:x8sub_2_then_sub_32_hi |
| 110447 | 0, // PNR_p8to15:x8sub_1_then_sub_32 |
| 110448 | 0, // PNR_p8to15:x8sub_1_then_sub_32_hi |
| 110449 | 0, // PNR_p8to15:subo64_then_sub_32 |
| 110450 | 0, // PNR_p8to15:subo64_then_sub_32_hi |
| 110451 | 0, // PNR_p8to15:zsub1_then_zsub_hi |
| 110452 | 0, // PNR_p8to15:zsub3_then_zsub_hi |
| 110453 | 0, // PNR_p8to15:zsub2_then_zsub_hi |
| 110454 | 0, // PNR_p8to15:dsub0_dsub1 |
| 110455 | 0, // PNR_p8to15:dsub0_dsub1_dsub2 |
| 110456 | 0, // PNR_p8to15:dsub1_dsub2 |
| 110457 | 0, // PNR_p8to15:dsub1_dsub2_dsub3 |
| 110458 | 0, // PNR_p8to15:dsub2_dsub3 |
| 110459 | 0, // PNR_p8to15:dsub_dsub1 |
| 110460 | 0, // PNR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 110461 | 0, // PNR_p8to15:dsub_dsub1_dsub2 |
| 110462 | 0, // PNR_p8to15:qsub0_qsub1 |
| 110463 | 0, // PNR_p8to15:qsub0_qsub1_qsub2 |
| 110464 | 0, // PNR_p8to15:qsub1_qsub2 |
| 110465 | 0, // PNR_p8to15:qsub1_qsub2_qsub3 |
| 110466 | 0, // PNR_p8to15:qsub2_qsub3 |
| 110467 | 0, // PNR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 110468 | 0, // PNR_p8to15:x8sub_0_x8sub_1 |
| 110469 | 0, // PNR_p8to15:x8sub_2_x8sub_3 |
| 110470 | 0, // PNR_p8to15:x8sub_4_x8sub_5 |
| 110471 | 0, // PNR_p8to15:x8sub_6_x8sub_7 |
| 110472 | 0, // PNR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110473 | 0, // PNR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110474 | 0, // PNR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110475 | 0, // PNR_p8to15:sub_32_subo64_then_sub_32 |
| 110476 | 0, // PNR_p8to15:zsub_qsub1 |
| 110477 | 0, // PNR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 110478 | 0, // PNR_p8to15:zsub_qsub1_qsub2 |
| 110479 | 0, // PNR_p8to15:zsub0_zsub1 |
| 110480 | 0, // PNR_p8to15:zsub0_zsub1_zsub2 |
| 110481 | 0, // PNR_p8to15:zsub1_zsub2 |
| 110482 | 0, // PNR_p8to15:zsub1_zsub2_zsub3 |
| 110483 | 0, // PNR_p8to15:zsub2_zsub3 |
| 110484 | 0, // PNR_p8to15:zsub0_zsub2 |
| 110485 | 0, // PNR_p8to15:zsub1_zsub3 |
| 110486 | }, |
| 110487 | { // PPRMul2 |
| 110488 | 0, // PPRMul2:bsub |
| 110489 | 0, // PPRMul2:bsub_hi |
| 110490 | 0, // PPRMul2:dsub |
| 110491 | 0, // PPRMul2:dsub0 |
| 110492 | 0, // PPRMul2:dsub1 |
| 110493 | 0, // PPRMul2:dsub2 |
| 110494 | 0, // PPRMul2:dsub3 |
| 110495 | 0, // PPRMul2:dsub_hi |
| 110496 | 0, // PPRMul2:hsub |
| 110497 | 0, // PPRMul2:hsub_hi |
| 110498 | 11, // PPRMul2:psub -> PNR |
| 110499 | 0, // PPRMul2:psub0 |
| 110500 | 0, // PPRMul2:psub1 |
| 110501 | 0, // PPRMul2:qsub0 |
| 110502 | 0, // PPRMul2:qsub1 |
| 110503 | 0, // PPRMul2:qsub2 |
| 110504 | 0, // PPRMul2:qsub3 |
| 110505 | 0, // PPRMul2:ssub |
| 110506 | 0, // PPRMul2:ssub_hi |
| 110507 | 0, // PPRMul2:sub_32 |
| 110508 | 0, // PPRMul2:sub_32_hi |
| 110509 | 0, // PPRMul2:sube32 |
| 110510 | 0, // PPRMul2:sube64 |
| 110511 | 0, // PPRMul2:subo32 |
| 110512 | 0, // PPRMul2:subo64 |
| 110513 | 0, // PPRMul2:x8sub_0 |
| 110514 | 0, // PPRMul2:x8sub_1 |
| 110515 | 0, // PPRMul2:x8sub_2 |
| 110516 | 0, // PPRMul2:x8sub_3 |
| 110517 | 0, // PPRMul2:x8sub_4 |
| 110518 | 0, // PPRMul2:x8sub_5 |
| 110519 | 0, // PPRMul2:x8sub_6 |
| 110520 | 0, // PPRMul2:x8sub_7 |
| 110521 | 0, // PPRMul2:zasubb |
| 110522 | 0, // PPRMul2:zasubd0 |
| 110523 | 0, // PPRMul2:zasubd1 |
| 110524 | 0, // PPRMul2:zasubh0 |
| 110525 | 0, // PPRMul2:zasubh1 |
| 110526 | 0, // PPRMul2:zasubq0 |
| 110527 | 0, // PPRMul2:zasubq1 |
| 110528 | 0, // PPRMul2:zasubs0 |
| 110529 | 0, // PPRMul2:zasubs1 |
| 110530 | 0, // PPRMul2:zsub |
| 110531 | 0, // PPRMul2:zsub0 |
| 110532 | 0, // PPRMul2:zsub1 |
| 110533 | 0, // PPRMul2:zsub2 |
| 110534 | 0, // PPRMul2:zsub3 |
| 110535 | 0, // PPRMul2:zsub_hi |
| 110536 | 0, // PPRMul2:zasubd1_then_zasubq0 |
| 110537 | 0, // PPRMul2:zasubd1_then_zasubq1 |
| 110538 | 0, // PPRMul2:zasubs1_then_zasubd0 |
| 110539 | 0, // PPRMul2:zasubs1_then_zasubd1 |
| 110540 | 0, // PPRMul2:zasubs1_then_zasubq0 |
| 110541 | 0, // PPRMul2:zasubs1_then_zasubq1 |
| 110542 | 0, // PPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 110543 | 0, // PPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 110544 | 0, // PPRMul2:zasubh1_then_zasubd0 |
| 110545 | 0, // PPRMul2:zasubh1_then_zasubd1 |
| 110546 | 0, // PPRMul2:zasubh1_then_zasubq0 |
| 110547 | 0, // PPRMul2:zasubh1_then_zasubq1 |
| 110548 | 0, // PPRMul2:zasubh1_then_zasubs0 |
| 110549 | 0, // PPRMul2:zasubh1_then_zasubs1 |
| 110550 | 0, // PPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 110551 | 0, // PPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 110552 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 110553 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 110554 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 110555 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 110556 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110557 | 0, // PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110558 | 0, // PPRMul2:dsub1_then_bsub |
| 110559 | 0, // PPRMul2:dsub1_then_bsub_hi |
| 110560 | 0, // PPRMul2:dsub1_then_hsub |
| 110561 | 0, // PPRMul2:dsub1_then_hsub_hi |
| 110562 | 0, // PPRMul2:dsub1_then_ssub |
| 110563 | 0, // PPRMul2:dsub1_then_ssub_hi |
| 110564 | 0, // PPRMul2:dsub3_then_bsub |
| 110565 | 0, // PPRMul2:dsub3_then_bsub_hi |
| 110566 | 0, // PPRMul2:dsub3_then_hsub |
| 110567 | 0, // PPRMul2:dsub3_then_hsub_hi |
| 110568 | 0, // PPRMul2:dsub3_then_ssub |
| 110569 | 0, // PPRMul2:dsub3_then_ssub_hi |
| 110570 | 0, // PPRMul2:dsub2_then_bsub |
| 110571 | 0, // PPRMul2:dsub2_then_bsub_hi |
| 110572 | 0, // PPRMul2:dsub2_then_hsub |
| 110573 | 0, // PPRMul2:dsub2_then_hsub_hi |
| 110574 | 0, // PPRMul2:dsub2_then_ssub |
| 110575 | 0, // PPRMul2:dsub2_then_ssub_hi |
| 110576 | 0, // PPRMul2:psub1_then_psub |
| 110577 | 0, // PPRMul2:qsub1_then_dsub_hi |
| 110578 | 0, // PPRMul2:qsub3_then_dsub_hi |
| 110579 | 0, // PPRMul2:qsub2_then_dsub_hi |
| 110580 | 0, // PPRMul2:x8sub_7_then_sub_32 |
| 110581 | 0, // PPRMul2:x8sub_7_then_sub_32_hi |
| 110582 | 0, // PPRMul2:x8sub_6_then_sub_32 |
| 110583 | 0, // PPRMul2:x8sub_6_then_sub_32_hi |
| 110584 | 0, // PPRMul2:x8sub_5_then_sub_32 |
| 110585 | 0, // PPRMul2:x8sub_5_then_sub_32_hi |
| 110586 | 0, // PPRMul2:x8sub_4_then_sub_32 |
| 110587 | 0, // PPRMul2:x8sub_4_then_sub_32_hi |
| 110588 | 0, // PPRMul2:x8sub_3_then_sub_32 |
| 110589 | 0, // PPRMul2:x8sub_3_then_sub_32_hi |
| 110590 | 0, // PPRMul2:x8sub_2_then_sub_32 |
| 110591 | 0, // PPRMul2:x8sub_2_then_sub_32_hi |
| 110592 | 0, // PPRMul2:x8sub_1_then_sub_32 |
| 110593 | 0, // PPRMul2:x8sub_1_then_sub_32_hi |
| 110594 | 0, // PPRMul2:subo64_then_sub_32 |
| 110595 | 0, // PPRMul2:subo64_then_sub_32_hi |
| 110596 | 0, // PPRMul2:zsub1_then_zsub_hi |
| 110597 | 0, // PPRMul2:zsub3_then_zsub_hi |
| 110598 | 0, // PPRMul2:zsub2_then_zsub_hi |
| 110599 | 0, // PPRMul2:dsub0_dsub1 |
| 110600 | 0, // PPRMul2:dsub0_dsub1_dsub2 |
| 110601 | 0, // PPRMul2:dsub1_dsub2 |
| 110602 | 0, // PPRMul2:dsub1_dsub2_dsub3 |
| 110603 | 0, // PPRMul2:dsub2_dsub3 |
| 110604 | 0, // PPRMul2:dsub_dsub1 |
| 110605 | 0, // PPRMul2:dsub_dsub1_dsub2_dsub3 |
| 110606 | 0, // PPRMul2:dsub_dsub1_dsub2 |
| 110607 | 0, // PPRMul2:qsub0_qsub1 |
| 110608 | 0, // PPRMul2:qsub0_qsub1_qsub2 |
| 110609 | 0, // PPRMul2:qsub1_qsub2 |
| 110610 | 0, // PPRMul2:qsub1_qsub2_qsub3 |
| 110611 | 0, // PPRMul2:qsub2_qsub3 |
| 110612 | 0, // PPRMul2:sub_32_x8sub_1_then_sub_32 |
| 110613 | 0, // PPRMul2:x8sub_0_x8sub_1 |
| 110614 | 0, // PPRMul2:x8sub_2_x8sub_3 |
| 110615 | 0, // PPRMul2:x8sub_4_x8sub_5 |
| 110616 | 0, // PPRMul2:x8sub_6_x8sub_7 |
| 110617 | 0, // PPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110618 | 0, // PPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110619 | 0, // PPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110620 | 0, // PPRMul2:sub_32_subo64_then_sub_32 |
| 110621 | 0, // PPRMul2:zsub_qsub1 |
| 110622 | 0, // PPRMul2:zsub_qsub1_qsub2_qsub3 |
| 110623 | 0, // PPRMul2:zsub_qsub1_qsub2 |
| 110624 | 0, // PPRMul2:zsub0_zsub1 |
| 110625 | 0, // PPRMul2:zsub0_zsub1_zsub2 |
| 110626 | 0, // PPRMul2:zsub1_zsub2 |
| 110627 | 0, // PPRMul2:zsub1_zsub2_zsub3 |
| 110628 | 0, // PPRMul2:zsub2_zsub3 |
| 110629 | 0, // PPRMul2:zsub0_zsub2 |
| 110630 | 0, // PPRMul2:zsub1_zsub3 |
| 110631 | }, |
| 110632 | { // PPR_3b |
| 110633 | 0, // PPR_3b:bsub |
| 110634 | 0, // PPR_3b:bsub_hi |
| 110635 | 0, // PPR_3b:dsub |
| 110636 | 0, // PPR_3b:dsub0 |
| 110637 | 0, // PPR_3b:dsub1 |
| 110638 | 0, // PPR_3b:dsub2 |
| 110639 | 0, // PPR_3b:dsub3 |
| 110640 | 0, // PPR_3b:dsub_hi |
| 110641 | 0, // PPR_3b:hsub |
| 110642 | 0, // PPR_3b:hsub_hi |
| 110643 | 13, // PPR_3b:psub -> PNR_3b |
| 110644 | 0, // PPR_3b:psub0 |
| 110645 | 0, // PPR_3b:psub1 |
| 110646 | 0, // PPR_3b:qsub0 |
| 110647 | 0, // PPR_3b:qsub1 |
| 110648 | 0, // PPR_3b:qsub2 |
| 110649 | 0, // PPR_3b:qsub3 |
| 110650 | 0, // PPR_3b:ssub |
| 110651 | 0, // PPR_3b:ssub_hi |
| 110652 | 0, // PPR_3b:sub_32 |
| 110653 | 0, // PPR_3b:sub_32_hi |
| 110654 | 0, // PPR_3b:sube32 |
| 110655 | 0, // PPR_3b:sube64 |
| 110656 | 0, // PPR_3b:subo32 |
| 110657 | 0, // PPR_3b:subo64 |
| 110658 | 0, // PPR_3b:x8sub_0 |
| 110659 | 0, // PPR_3b:x8sub_1 |
| 110660 | 0, // PPR_3b:x8sub_2 |
| 110661 | 0, // PPR_3b:x8sub_3 |
| 110662 | 0, // PPR_3b:x8sub_4 |
| 110663 | 0, // PPR_3b:x8sub_5 |
| 110664 | 0, // PPR_3b:x8sub_6 |
| 110665 | 0, // PPR_3b:x8sub_7 |
| 110666 | 0, // PPR_3b:zasubb |
| 110667 | 0, // PPR_3b:zasubd0 |
| 110668 | 0, // PPR_3b:zasubd1 |
| 110669 | 0, // PPR_3b:zasubh0 |
| 110670 | 0, // PPR_3b:zasubh1 |
| 110671 | 0, // PPR_3b:zasubq0 |
| 110672 | 0, // PPR_3b:zasubq1 |
| 110673 | 0, // PPR_3b:zasubs0 |
| 110674 | 0, // PPR_3b:zasubs1 |
| 110675 | 0, // PPR_3b:zsub |
| 110676 | 0, // PPR_3b:zsub0 |
| 110677 | 0, // PPR_3b:zsub1 |
| 110678 | 0, // PPR_3b:zsub2 |
| 110679 | 0, // PPR_3b:zsub3 |
| 110680 | 0, // PPR_3b:zsub_hi |
| 110681 | 0, // PPR_3b:zasubd1_then_zasubq0 |
| 110682 | 0, // PPR_3b:zasubd1_then_zasubq1 |
| 110683 | 0, // PPR_3b:zasubs1_then_zasubd0 |
| 110684 | 0, // PPR_3b:zasubs1_then_zasubd1 |
| 110685 | 0, // PPR_3b:zasubs1_then_zasubq0 |
| 110686 | 0, // PPR_3b:zasubs1_then_zasubq1 |
| 110687 | 0, // PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 110688 | 0, // PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 110689 | 0, // PPR_3b:zasubh1_then_zasubd0 |
| 110690 | 0, // PPR_3b:zasubh1_then_zasubd1 |
| 110691 | 0, // PPR_3b:zasubh1_then_zasubq0 |
| 110692 | 0, // PPR_3b:zasubh1_then_zasubq1 |
| 110693 | 0, // PPR_3b:zasubh1_then_zasubs0 |
| 110694 | 0, // PPR_3b:zasubh1_then_zasubs1 |
| 110695 | 0, // PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 110696 | 0, // PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 110697 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 110698 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 110699 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 110700 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 110701 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110702 | 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110703 | 0, // PPR_3b:dsub1_then_bsub |
| 110704 | 0, // PPR_3b:dsub1_then_bsub_hi |
| 110705 | 0, // PPR_3b:dsub1_then_hsub |
| 110706 | 0, // PPR_3b:dsub1_then_hsub_hi |
| 110707 | 0, // PPR_3b:dsub1_then_ssub |
| 110708 | 0, // PPR_3b:dsub1_then_ssub_hi |
| 110709 | 0, // PPR_3b:dsub3_then_bsub |
| 110710 | 0, // PPR_3b:dsub3_then_bsub_hi |
| 110711 | 0, // PPR_3b:dsub3_then_hsub |
| 110712 | 0, // PPR_3b:dsub3_then_hsub_hi |
| 110713 | 0, // PPR_3b:dsub3_then_ssub |
| 110714 | 0, // PPR_3b:dsub3_then_ssub_hi |
| 110715 | 0, // PPR_3b:dsub2_then_bsub |
| 110716 | 0, // PPR_3b:dsub2_then_bsub_hi |
| 110717 | 0, // PPR_3b:dsub2_then_hsub |
| 110718 | 0, // PPR_3b:dsub2_then_hsub_hi |
| 110719 | 0, // PPR_3b:dsub2_then_ssub |
| 110720 | 0, // PPR_3b:dsub2_then_ssub_hi |
| 110721 | 0, // PPR_3b:psub1_then_psub |
| 110722 | 0, // PPR_3b:qsub1_then_dsub_hi |
| 110723 | 0, // PPR_3b:qsub3_then_dsub_hi |
| 110724 | 0, // PPR_3b:qsub2_then_dsub_hi |
| 110725 | 0, // PPR_3b:x8sub_7_then_sub_32 |
| 110726 | 0, // PPR_3b:x8sub_7_then_sub_32_hi |
| 110727 | 0, // PPR_3b:x8sub_6_then_sub_32 |
| 110728 | 0, // PPR_3b:x8sub_6_then_sub_32_hi |
| 110729 | 0, // PPR_3b:x8sub_5_then_sub_32 |
| 110730 | 0, // PPR_3b:x8sub_5_then_sub_32_hi |
| 110731 | 0, // PPR_3b:x8sub_4_then_sub_32 |
| 110732 | 0, // PPR_3b:x8sub_4_then_sub_32_hi |
| 110733 | 0, // PPR_3b:x8sub_3_then_sub_32 |
| 110734 | 0, // PPR_3b:x8sub_3_then_sub_32_hi |
| 110735 | 0, // PPR_3b:x8sub_2_then_sub_32 |
| 110736 | 0, // PPR_3b:x8sub_2_then_sub_32_hi |
| 110737 | 0, // PPR_3b:x8sub_1_then_sub_32 |
| 110738 | 0, // PPR_3b:x8sub_1_then_sub_32_hi |
| 110739 | 0, // PPR_3b:subo64_then_sub_32 |
| 110740 | 0, // PPR_3b:subo64_then_sub_32_hi |
| 110741 | 0, // PPR_3b:zsub1_then_zsub_hi |
| 110742 | 0, // PPR_3b:zsub3_then_zsub_hi |
| 110743 | 0, // PPR_3b:zsub2_then_zsub_hi |
| 110744 | 0, // PPR_3b:dsub0_dsub1 |
| 110745 | 0, // PPR_3b:dsub0_dsub1_dsub2 |
| 110746 | 0, // PPR_3b:dsub1_dsub2 |
| 110747 | 0, // PPR_3b:dsub1_dsub2_dsub3 |
| 110748 | 0, // PPR_3b:dsub2_dsub3 |
| 110749 | 0, // PPR_3b:dsub_dsub1 |
| 110750 | 0, // PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 110751 | 0, // PPR_3b:dsub_dsub1_dsub2 |
| 110752 | 0, // PPR_3b:qsub0_qsub1 |
| 110753 | 0, // PPR_3b:qsub0_qsub1_qsub2 |
| 110754 | 0, // PPR_3b:qsub1_qsub2 |
| 110755 | 0, // PPR_3b:qsub1_qsub2_qsub3 |
| 110756 | 0, // PPR_3b:qsub2_qsub3 |
| 110757 | 0, // PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 110758 | 0, // PPR_3b:x8sub_0_x8sub_1 |
| 110759 | 0, // PPR_3b:x8sub_2_x8sub_3 |
| 110760 | 0, // PPR_3b:x8sub_4_x8sub_5 |
| 110761 | 0, // PPR_3b:x8sub_6_x8sub_7 |
| 110762 | 0, // PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110763 | 0, // PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110764 | 0, // PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110765 | 0, // PPR_3b:sub_32_subo64_then_sub_32 |
| 110766 | 0, // PPR_3b:zsub_qsub1 |
| 110767 | 0, // PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 110768 | 0, // PPR_3b:zsub_qsub1_qsub2 |
| 110769 | 0, // PPR_3b:zsub0_zsub1 |
| 110770 | 0, // PPR_3b:zsub0_zsub1_zsub2 |
| 110771 | 0, // PPR_3b:zsub1_zsub2 |
| 110772 | 0, // PPR_3b:zsub1_zsub2_zsub3 |
| 110773 | 0, // PPR_3b:zsub2_zsub3 |
| 110774 | 0, // PPR_3b:zsub0_zsub2 |
| 110775 | 0, // PPR_3b:zsub1_zsub3 |
| 110776 | }, |
| 110777 | { // PPR_p8to15 |
| 110778 | 0, // PPR_p8to15:bsub |
| 110779 | 0, // PPR_p8to15:bsub_hi |
| 110780 | 0, // PPR_p8to15:dsub |
| 110781 | 0, // PPR_p8to15:dsub0 |
| 110782 | 0, // PPR_p8to15:dsub1 |
| 110783 | 0, // PPR_p8to15:dsub2 |
| 110784 | 0, // PPR_p8to15:dsub3 |
| 110785 | 0, // PPR_p8to15:dsub_hi |
| 110786 | 0, // PPR_p8to15:hsub |
| 110787 | 0, // PPR_p8to15:hsub_hi |
| 110788 | 14, // PPR_p8to15:psub -> PNR_p8to15 |
| 110789 | 0, // PPR_p8to15:psub0 |
| 110790 | 0, // PPR_p8to15:psub1 |
| 110791 | 0, // PPR_p8to15:qsub0 |
| 110792 | 0, // PPR_p8to15:qsub1 |
| 110793 | 0, // PPR_p8to15:qsub2 |
| 110794 | 0, // PPR_p8to15:qsub3 |
| 110795 | 0, // PPR_p8to15:ssub |
| 110796 | 0, // PPR_p8to15:ssub_hi |
| 110797 | 0, // PPR_p8to15:sub_32 |
| 110798 | 0, // PPR_p8to15:sub_32_hi |
| 110799 | 0, // PPR_p8to15:sube32 |
| 110800 | 0, // PPR_p8to15:sube64 |
| 110801 | 0, // PPR_p8to15:subo32 |
| 110802 | 0, // PPR_p8to15:subo64 |
| 110803 | 0, // PPR_p8to15:x8sub_0 |
| 110804 | 0, // PPR_p8to15:x8sub_1 |
| 110805 | 0, // PPR_p8to15:x8sub_2 |
| 110806 | 0, // PPR_p8to15:x8sub_3 |
| 110807 | 0, // PPR_p8to15:x8sub_4 |
| 110808 | 0, // PPR_p8to15:x8sub_5 |
| 110809 | 0, // PPR_p8to15:x8sub_6 |
| 110810 | 0, // PPR_p8to15:x8sub_7 |
| 110811 | 0, // PPR_p8to15:zasubb |
| 110812 | 0, // PPR_p8to15:zasubd0 |
| 110813 | 0, // PPR_p8to15:zasubd1 |
| 110814 | 0, // PPR_p8to15:zasubh0 |
| 110815 | 0, // PPR_p8to15:zasubh1 |
| 110816 | 0, // PPR_p8to15:zasubq0 |
| 110817 | 0, // PPR_p8to15:zasubq1 |
| 110818 | 0, // PPR_p8to15:zasubs0 |
| 110819 | 0, // PPR_p8to15:zasubs1 |
| 110820 | 0, // PPR_p8to15:zsub |
| 110821 | 0, // PPR_p8to15:zsub0 |
| 110822 | 0, // PPR_p8to15:zsub1 |
| 110823 | 0, // PPR_p8to15:zsub2 |
| 110824 | 0, // PPR_p8to15:zsub3 |
| 110825 | 0, // PPR_p8to15:zsub_hi |
| 110826 | 0, // PPR_p8to15:zasubd1_then_zasubq0 |
| 110827 | 0, // PPR_p8to15:zasubd1_then_zasubq1 |
| 110828 | 0, // PPR_p8to15:zasubs1_then_zasubd0 |
| 110829 | 0, // PPR_p8to15:zasubs1_then_zasubd1 |
| 110830 | 0, // PPR_p8to15:zasubs1_then_zasubq0 |
| 110831 | 0, // PPR_p8to15:zasubs1_then_zasubq1 |
| 110832 | 0, // PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 110833 | 0, // PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 110834 | 0, // PPR_p8to15:zasubh1_then_zasubd0 |
| 110835 | 0, // PPR_p8to15:zasubh1_then_zasubd1 |
| 110836 | 0, // PPR_p8to15:zasubh1_then_zasubq0 |
| 110837 | 0, // PPR_p8to15:zasubh1_then_zasubq1 |
| 110838 | 0, // PPR_p8to15:zasubh1_then_zasubs0 |
| 110839 | 0, // PPR_p8to15:zasubh1_then_zasubs1 |
| 110840 | 0, // PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 110841 | 0, // PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 110842 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 110843 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 110844 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 110845 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 110846 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110847 | 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110848 | 0, // PPR_p8to15:dsub1_then_bsub |
| 110849 | 0, // PPR_p8to15:dsub1_then_bsub_hi |
| 110850 | 0, // PPR_p8to15:dsub1_then_hsub |
| 110851 | 0, // PPR_p8to15:dsub1_then_hsub_hi |
| 110852 | 0, // PPR_p8to15:dsub1_then_ssub |
| 110853 | 0, // PPR_p8to15:dsub1_then_ssub_hi |
| 110854 | 0, // PPR_p8to15:dsub3_then_bsub |
| 110855 | 0, // PPR_p8to15:dsub3_then_bsub_hi |
| 110856 | 0, // PPR_p8to15:dsub3_then_hsub |
| 110857 | 0, // PPR_p8to15:dsub3_then_hsub_hi |
| 110858 | 0, // PPR_p8to15:dsub3_then_ssub |
| 110859 | 0, // PPR_p8to15:dsub3_then_ssub_hi |
| 110860 | 0, // PPR_p8to15:dsub2_then_bsub |
| 110861 | 0, // PPR_p8to15:dsub2_then_bsub_hi |
| 110862 | 0, // PPR_p8to15:dsub2_then_hsub |
| 110863 | 0, // PPR_p8to15:dsub2_then_hsub_hi |
| 110864 | 0, // PPR_p8to15:dsub2_then_ssub |
| 110865 | 0, // PPR_p8to15:dsub2_then_ssub_hi |
| 110866 | 0, // PPR_p8to15:psub1_then_psub |
| 110867 | 0, // PPR_p8to15:qsub1_then_dsub_hi |
| 110868 | 0, // PPR_p8to15:qsub3_then_dsub_hi |
| 110869 | 0, // PPR_p8to15:qsub2_then_dsub_hi |
| 110870 | 0, // PPR_p8to15:x8sub_7_then_sub_32 |
| 110871 | 0, // PPR_p8to15:x8sub_7_then_sub_32_hi |
| 110872 | 0, // PPR_p8to15:x8sub_6_then_sub_32 |
| 110873 | 0, // PPR_p8to15:x8sub_6_then_sub_32_hi |
| 110874 | 0, // PPR_p8to15:x8sub_5_then_sub_32 |
| 110875 | 0, // PPR_p8to15:x8sub_5_then_sub_32_hi |
| 110876 | 0, // PPR_p8to15:x8sub_4_then_sub_32 |
| 110877 | 0, // PPR_p8to15:x8sub_4_then_sub_32_hi |
| 110878 | 0, // PPR_p8to15:x8sub_3_then_sub_32 |
| 110879 | 0, // PPR_p8to15:x8sub_3_then_sub_32_hi |
| 110880 | 0, // PPR_p8to15:x8sub_2_then_sub_32 |
| 110881 | 0, // PPR_p8to15:x8sub_2_then_sub_32_hi |
| 110882 | 0, // PPR_p8to15:x8sub_1_then_sub_32 |
| 110883 | 0, // PPR_p8to15:x8sub_1_then_sub_32_hi |
| 110884 | 0, // PPR_p8to15:subo64_then_sub_32 |
| 110885 | 0, // PPR_p8to15:subo64_then_sub_32_hi |
| 110886 | 0, // PPR_p8to15:zsub1_then_zsub_hi |
| 110887 | 0, // PPR_p8to15:zsub3_then_zsub_hi |
| 110888 | 0, // PPR_p8to15:zsub2_then_zsub_hi |
| 110889 | 0, // PPR_p8to15:dsub0_dsub1 |
| 110890 | 0, // PPR_p8to15:dsub0_dsub1_dsub2 |
| 110891 | 0, // PPR_p8to15:dsub1_dsub2 |
| 110892 | 0, // PPR_p8to15:dsub1_dsub2_dsub3 |
| 110893 | 0, // PPR_p8to15:dsub2_dsub3 |
| 110894 | 0, // PPR_p8to15:dsub_dsub1 |
| 110895 | 0, // PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 110896 | 0, // PPR_p8to15:dsub_dsub1_dsub2 |
| 110897 | 0, // PPR_p8to15:qsub0_qsub1 |
| 110898 | 0, // PPR_p8to15:qsub0_qsub1_qsub2 |
| 110899 | 0, // PPR_p8to15:qsub1_qsub2 |
| 110900 | 0, // PPR_p8to15:qsub1_qsub2_qsub3 |
| 110901 | 0, // PPR_p8to15:qsub2_qsub3 |
| 110902 | 0, // PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 110903 | 0, // PPR_p8to15:x8sub_0_x8sub_1 |
| 110904 | 0, // PPR_p8to15:x8sub_2_x8sub_3 |
| 110905 | 0, // PPR_p8to15:x8sub_4_x8sub_5 |
| 110906 | 0, // PPR_p8to15:x8sub_6_x8sub_7 |
| 110907 | 0, // PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 110908 | 0, // PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 110909 | 0, // PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 110910 | 0, // PPR_p8to15:sub_32_subo64_then_sub_32 |
| 110911 | 0, // PPR_p8to15:zsub_qsub1 |
| 110912 | 0, // PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 110913 | 0, // PPR_p8to15:zsub_qsub1_qsub2 |
| 110914 | 0, // PPR_p8to15:zsub0_zsub1 |
| 110915 | 0, // PPR_p8to15:zsub0_zsub1_zsub2 |
| 110916 | 0, // PPR_p8to15:zsub1_zsub2 |
| 110917 | 0, // PPR_p8to15:zsub1_zsub2_zsub3 |
| 110918 | 0, // PPR_p8to15:zsub2_zsub3 |
| 110919 | 0, // PPR_p8to15:zsub0_zsub2 |
| 110920 | 0, // PPR_p8to15:zsub1_zsub3 |
| 110921 | }, |
| 110922 | { // PPRMul2_and_PPR_3b |
| 110923 | 0, // PPRMul2_and_PPR_3b:bsub |
| 110924 | 0, // PPRMul2_and_PPR_3b:bsub_hi |
| 110925 | 0, // PPRMul2_and_PPR_3b:dsub |
| 110926 | 0, // PPRMul2_and_PPR_3b:dsub0 |
| 110927 | 0, // PPRMul2_and_PPR_3b:dsub1 |
| 110928 | 0, // PPRMul2_and_PPR_3b:dsub2 |
| 110929 | 0, // PPRMul2_and_PPR_3b:dsub3 |
| 110930 | 0, // PPRMul2_and_PPR_3b:dsub_hi |
| 110931 | 0, // PPRMul2_and_PPR_3b:hsub |
| 110932 | 0, // PPRMul2_and_PPR_3b:hsub_hi |
| 110933 | 13, // PPRMul2_and_PPR_3b:psub -> PNR_3b |
| 110934 | 0, // PPRMul2_and_PPR_3b:psub0 |
| 110935 | 0, // PPRMul2_and_PPR_3b:psub1 |
| 110936 | 0, // PPRMul2_and_PPR_3b:qsub0 |
| 110937 | 0, // PPRMul2_and_PPR_3b:qsub1 |
| 110938 | 0, // PPRMul2_and_PPR_3b:qsub2 |
| 110939 | 0, // PPRMul2_and_PPR_3b:qsub3 |
| 110940 | 0, // PPRMul2_and_PPR_3b:ssub |
| 110941 | 0, // PPRMul2_and_PPR_3b:ssub_hi |
| 110942 | 0, // PPRMul2_and_PPR_3b:sub_32 |
| 110943 | 0, // PPRMul2_and_PPR_3b:sub_32_hi |
| 110944 | 0, // PPRMul2_and_PPR_3b:sube32 |
| 110945 | 0, // PPRMul2_and_PPR_3b:sube64 |
| 110946 | 0, // PPRMul2_and_PPR_3b:subo32 |
| 110947 | 0, // PPRMul2_and_PPR_3b:subo64 |
| 110948 | 0, // PPRMul2_and_PPR_3b:x8sub_0 |
| 110949 | 0, // PPRMul2_and_PPR_3b:x8sub_1 |
| 110950 | 0, // PPRMul2_and_PPR_3b:x8sub_2 |
| 110951 | 0, // PPRMul2_and_PPR_3b:x8sub_3 |
| 110952 | 0, // PPRMul2_and_PPR_3b:x8sub_4 |
| 110953 | 0, // PPRMul2_and_PPR_3b:x8sub_5 |
| 110954 | 0, // PPRMul2_and_PPR_3b:x8sub_6 |
| 110955 | 0, // PPRMul2_and_PPR_3b:x8sub_7 |
| 110956 | 0, // PPRMul2_and_PPR_3b:zasubb |
| 110957 | 0, // PPRMul2_and_PPR_3b:zasubd0 |
| 110958 | 0, // PPRMul2_and_PPR_3b:zasubd1 |
| 110959 | 0, // PPRMul2_and_PPR_3b:zasubh0 |
| 110960 | 0, // PPRMul2_and_PPR_3b:zasubh1 |
| 110961 | 0, // PPRMul2_and_PPR_3b:zasubq0 |
| 110962 | 0, // PPRMul2_and_PPR_3b:zasubq1 |
| 110963 | 0, // PPRMul2_and_PPR_3b:zasubs0 |
| 110964 | 0, // PPRMul2_and_PPR_3b:zasubs1 |
| 110965 | 0, // PPRMul2_and_PPR_3b:zsub |
| 110966 | 0, // PPRMul2_and_PPR_3b:zsub0 |
| 110967 | 0, // PPRMul2_and_PPR_3b:zsub1 |
| 110968 | 0, // PPRMul2_and_PPR_3b:zsub2 |
| 110969 | 0, // PPRMul2_and_PPR_3b:zsub3 |
| 110970 | 0, // PPRMul2_and_PPR_3b:zsub_hi |
| 110971 | 0, // PPRMul2_and_PPR_3b:zasubd1_then_zasubq0 |
| 110972 | 0, // PPRMul2_and_PPR_3b:zasubd1_then_zasubq1 |
| 110973 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubd0 |
| 110974 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubd1 |
| 110975 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubq0 |
| 110976 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubq1 |
| 110977 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 110978 | 0, // PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 110979 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubd0 |
| 110980 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubd1 |
| 110981 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubq0 |
| 110982 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubq1 |
| 110983 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs0 |
| 110984 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1 |
| 110985 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 110986 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 110987 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 110988 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 110989 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 110990 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 110991 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 110992 | 0, // PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 110993 | 0, // PPRMul2_and_PPR_3b:dsub1_then_bsub |
| 110994 | 0, // PPRMul2_and_PPR_3b:dsub1_then_bsub_hi |
| 110995 | 0, // PPRMul2_and_PPR_3b:dsub1_then_hsub |
| 110996 | 0, // PPRMul2_and_PPR_3b:dsub1_then_hsub_hi |
| 110997 | 0, // PPRMul2_and_PPR_3b:dsub1_then_ssub |
| 110998 | 0, // PPRMul2_and_PPR_3b:dsub1_then_ssub_hi |
| 110999 | 0, // PPRMul2_and_PPR_3b:dsub3_then_bsub |
| 111000 | 0, // PPRMul2_and_PPR_3b:dsub3_then_bsub_hi |
| 111001 | 0, // PPRMul2_and_PPR_3b:dsub3_then_hsub |
| 111002 | 0, // PPRMul2_and_PPR_3b:dsub3_then_hsub_hi |
| 111003 | 0, // PPRMul2_and_PPR_3b:dsub3_then_ssub |
| 111004 | 0, // PPRMul2_and_PPR_3b:dsub3_then_ssub_hi |
| 111005 | 0, // PPRMul2_and_PPR_3b:dsub2_then_bsub |
| 111006 | 0, // PPRMul2_and_PPR_3b:dsub2_then_bsub_hi |
| 111007 | 0, // PPRMul2_and_PPR_3b:dsub2_then_hsub |
| 111008 | 0, // PPRMul2_and_PPR_3b:dsub2_then_hsub_hi |
| 111009 | 0, // PPRMul2_and_PPR_3b:dsub2_then_ssub |
| 111010 | 0, // PPRMul2_and_PPR_3b:dsub2_then_ssub_hi |
| 111011 | 0, // PPRMul2_and_PPR_3b:psub1_then_psub |
| 111012 | 0, // PPRMul2_and_PPR_3b:qsub1_then_dsub_hi |
| 111013 | 0, // PPRMul2_and_PPR_3b:qsub3_then_dsub_hi |
| 111014 | 0, // PPRMul2_and_PPR_3b:qsub2_then_dsub_hi |
| 111015 | 0, // PPRMul2_and_PPR_3b:x8sub_7_then_sub_32 |
| 111016 | 0, // PPRMul2_and_PPR_3b:x8sub_7_then_sub_32_hi |
| 111017 | 0, // PPRMul2_and_PPR_3b:x8sub_6_then_sub_32 |
| 111018 | 0, // PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_hi |
| 111019 | 0, // PPRMul2_and_PPR_3b:x8sub_5_then_sub_32 |
| 111020 | 0, // PPRMul2_and_PPR_3b:x8sub_5_then_sub_32_hi |
| 111021 | 0, // PPRMul2_and_PPR_3b:x8sub_4_then_sub_32 |
| 111022 | 0, // PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_hi |
| 111023 | 0, // PPRMul2_and_PPR_3b:x8sub_3_then_sub_32 |
| 111024 | 0, // PPRMul2_and_PPR_3b:x8sub_3_then_sub_32_hi |
| 111025 | 0, // PPRMul2_and_PPR_3b:x8sub_2_then_sub_32 |
| 111026 | 0, // PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_hi |
| 111027 | 0, // PPRMul2_and_PPR_3b:x8sub_1_then_sub_32 |
| 111028 | 0, // PPRMul2_and_PPR_3b:x8sub_1_then_sub_32_hi |
| 111029 | 0, // PPRMul2_and_PPR_3b:subo64_then_sub_32 |
| 111030 | 0, // PPRMul2_and_PPR_3b:subo64_then_sub_32_hi |
| 111031 | 0, // PPRMul2_and_PPR_3b:zsub1_then_zsub_hi |
| 111032 | 0, // PPRMul2_and_PPR_3b:zsub3_then_zsub_hi |
| 111033 | 0, // PPRMul2_and_PPR_3b:zsub2_then_zsub_hi |
| 111034 | 0, // PPRMul2_and_PPR_3b:dsub0_dsub1 |
| 111035 | 0, // PPRMul2_and_PPR_3b:dsub0_dsub1_dsub2 |
| 111036 | 0, // PPRMul2_and_PPR_3b:dsub1_dsub2 |
| 111037 | 0, // PPRMul2_and_PPR_3b:dsub1_dsub2_dsub3 |
| 111038 | 0, // PPRMul2_and_PPR_3b:dsub2_dsub3 |
| 111039 | 0, // PPRMul2_and_PPR_3b:dsub_dsub1 |
| 111040 | 0, // PPRMul2_and_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 111041 | 0, // PPRMul2_and_PPR_3b:dsub_dsub1_dsub2 |
| 111042 | 0, // PPRMul2_and_PPR_3b:qsub0_qsub1 |
| 111043 | 0, // PPRMul2_and_PPR_3b:qsub0_qsub1_qsub2 |
| 111044 | 0, // PPRMul2_and_PPR_3b:qsub1_qsub2 |
| 111045 | 0, // PPRMul2_and_PPR_3b:qsub1_qsub2_qsub3 |
| 111046 | 0, // PPRMul2_and_PPR_3b:qsub2_qsub3 |
| 111047 | 0, // PPRMul2_and_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 111048 | 0, // PPRMul2_and_PPR_3b:x8sub_0_x8sub_1 |
| 111049 | 0, // PPRMul2_and_PPR_3b:x8sub_2_x8sub_3 |
| 111050 | 0, // PPRMul2_and_PPR_3b:x8sub_4_x8sub_5 |
| 111051 | 0, // PPRMul2_and_PPR_3b:x8sub_6_x8sub_7 |
| 111052 | 0, // PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111053 | 0, // PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111054 | 0, // PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111055 | 0, // PPRMul2_and_PPR_3b:sub_32_subo64_then_sub_32 |
| 111056 | 0, // PPRMul2_and_PPR_3b:zsub_qsub1 |
| 111057 | 0, // PPRMul2_and_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 111058 | 0, // PPRMul2_and_PPR_3b:zsub_qsub1_qsub2 |
| 111059 | 0, // PPRMul2_and_PPR_3b:zsub0_zsub1 |
| 111060 | 0, // PPRMul2_and_PPR_3b:zsub0_zsub1_zsub2 |
| 111061 | 0, // PPRMul2_and_PPR_3b:zsub1_zsub2 |
| 111062 | 0, // PPRMul2_and_PPR_3b:zsub1_zsub2_zsub3 |
| 111063 | 0, // PPRMul2_and_PPR_3b:zsub2_zsub3 |
| 111064 | 0, // PPRMul2_and_PPR_3b:zsub0_zsub2 |
| 111065 | 0, // PPRMul2_and_PPR_3b:zsub1_zsub3 |
| 111066 | }, |
| 111067 | { // PPRMul2_and_PPR_p8to15 |
| 111068 | 0, // PPRMul2_and_PPR_p8to15:bsub |
| 111069 | 0, // PPRMul2_and_PPR_p8to15:bsub_hi |
| 111070 | 0, // PPRMul2_and_PPR_p8to15:dsub |
| 111071 | 0, // PPRMul2_and_PPR_p8to15:dsub0 |
| 111072 | 0, // PPRMul2_and_PPR_p8to15:dsub1 |
| 111073 | 0, // PPRMul2_and_PPR_p8to15:dsub2 |
| 111074 | 0, // PPRMul2_and_PPR_p8to15:dsub3 |
| 111075 | 0, // PPRMul2_and_PPR_p8to15:dsub_hi |
| 111076 | 0, // PPRMul2_and_PPR_p8to15:hsub |
| 111077 | 0, // PPRMul2_and_PPR_p8to15:hsub_hi |
| 111078 | 14, // PPRMul2_and_PPR_p8to15:psub -> PNR_p8to15 |
| 111079 | 0, // PPRMul2_and_PPR_p8to15:psub0 |
| 111080 | 0, // PPRMul2_and_PPR_p8to15:psub1 |
| 111081 | 0, // PPRMul2_and_PPR_p8to15:qsub0 |
| 111082 | 0, // PPRMul2_and_PPR_p8to15:qsub1 |
| 111083 | 0, // PPRMul2_and_PPR_p8to15:qsub2 |
| 111084 | 0, // PPRMul2_and_PPR_p8to15:qsub3 |
| 111085 | 0, // PPRMul2_and_PPR_p8to15:ssub |
| 111086 | 0, // PPRMul2_and_PPR_p8to15:ssub_hi |
| 111087 | 0, // PPRMul2_and_PPR_p8to15:sub_32 |
| 111088 | 0, // PPRMul2_and_PPR_p8to15:sub_32_hi |
| 111089 | 0, // PPRMul2_and_PPR_p8to15:sube32 |
| 111090 | 0, // PPRMul2_and_PPR_p8to15:sube64 |
| 111091 | 0, // PPRMul2_and_PPR_p8to15:subo32 |
| 111092 | 0, // PPRMul2_and_PPR_p8to15:subo64 |
| 111093 | 0, // PPRMul2_and_PPR_p8to15:x8sub_0 |
| 111094 | 0, // PPRMul2_and_PPR_p8to15:x8sub_1 |
| 111095 | 0, // PPRMul2_and_PPR_p8to15:x8sub_2 |
| 111096 | 0, // PPRMul2_and_PPR_p8to15:x8sub_3 |
| 111097 | 0, // PPRMul2_and_PPR_p8to15:x8sub_4 |
| 111098 | 0, // PPRMul2_and_PPR_p8to15:x8sub_5 |
| 111099 | 0, // PPRMul2_and_PPR_p8to15:x8sub_6 |
| 111100 | 0, // PPRMul2_and_PPR_p8to15:x8sub_7 |
| 111101 | 0, // PPRMul2_and_PPR_p8to15:zasubb |
| 111102 | 0, // PPRMul2_and_PPR_p8to15:zasubd0 |
| 111103 | 0, // PPRMul2_and_PPR_p8to15:zasubd1 |
| 111104 | 0, // PPRMul2_and_PPR_p8to15:zasubh0 |
| 111105 | 0, // PPRMul2_and_PPR_p8to15:zasubh1 |
| 111106 | 0, // PPRMul2_and_PPR_p8to15:zasubq0 |
| 111107 | 0, // PPRMul2_and_PPR_p8to15:zasubq1 |
| 111108 | 0, // PPRMul2_and_PPR_p8to15:zasubs0 |
| 111109 | 0, // PPRMul2_and_PPR_p8to15:zasubs1 |
| 111110 | 0, // PPRMul2_and_PPR_p8to15:zsub |
| 111111 | 0, // PPRMul2_and_PPR_p8to15:zsub0 |
| 111112 | 0, // PPRMul2_and_PPR_p8to15:zsub1 |
| 111113 | 0, // PPRMul2_and_PPR_p8to15:zsub2 |
| 111114 | 0, // PPRMul2_and_PPR_p8to15:zsub3 |
| 111115 | 0, // PPRMul2_and_PPR_p8to15:zsub_hi |
| 111116 | 0, // PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq0 |
| 111117 | 0, // PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq1 |
| 111118 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd0 |
| 111119 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1 |
| 111120 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq0 |
| 111121 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq1 |
| 111122 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 111123 | 0, // PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 111124 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd0 |
| 111125 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1 |
| 111126 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq0 |
| 111127 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq1 |
| 111128 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs0 |
| 111129 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1 |
| 111130 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 111131 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 111132 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 111133 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 111134 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 111135 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 111136 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111137 | 0, // PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111138 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_bsub |
| 111139 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_bsub_hi |
| 111140 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_hsub |
| 111141 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_hsub_hi |
| 111142 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_ssub |
| 111143 | 0, // PPRMul2_and_PPR_p8to15:dsub1_then_ssub_hi |
| 111144 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_bsub |
| 111145 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_bsub_hi |
| 111146 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_hsub |
| 111147 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_hsub_hi |
| 111148 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_ssub |
| 111149 | 0, // PPRMul2_and_PPR_p8to15:dsub3_then_ssub_hi |
| 111150 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_bsub |
| 111151 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_bsub_hi |
| 111152 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_hsub |
| 111153 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_hsub_hi |
| 111154 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_ssub |
| 111155 | 0, // PPRMul2_and_PPR_p8to15:dsub2_then_ssub_hi |
| 111156 | 0, // PPRMul2_and_PPR_p8to15:psub1_then_psub |
| 111157 | 0, // PPRMul2_and_PPR_p8to15:qsub1_then_dsub_hi |
| 111158 | 0, // PPRMul2_and_PPR_p8to15:qsub3_then_dsub_hi |
| 111159 | 0, // PPRMul2_and_PPR_p8to15:qsub2_then_dsub_hi |
| 111160 | 0, // PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32 |
| 111161 | 0, // PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 111162 | 0, // PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32 |
| 111163 | 0, // PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 111164 | 0, // PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32 |
| 111165 | 0, // PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 111166 | 0, // PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32 |
| 111167 | 0, // PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 111168 | 0, // PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32 |
| 111169 | 0, // PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 111170 | 0, // PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32 |
| 111171 | 0, // PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 111172 | 0, // PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32 |
| 111173 | 0, // PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 111174 | 0, // PPRMul2_and_PPR_p8to15:subo64_then_sub_32 |
| 111175 | 0, // PPRMul2_and_PPR_p8to15:subo64_then_sub_32_hi |
| 111176 | 0, // PPRMul2_and_PPR_p8to15:zsub1_then_zsub_hi |
| 111177 | 0, // PPRMul2_and_PPR_p8to15:zsub3_then_zsub_hi |
| 111178 | 0, // PPRMul2_and_PPR_p8to15:zsub2_then_zsub_hi |
| 111179 | 0, // PPRMul2_and_PPR_p8to15:dsub0_dsub1 |
| 111180 | 0, // PPRMul2_and_PPR_p8to15:dsub0_dsub1_dsub2 |
| 111181 | 0, // PPRMul2_and_PPR_p8to15:dsub1_dsub2 |
| 111182 | 0, // PPRMul2_and_PPR_p8to15:dsub1_dsub2_dsub3 |
| 111183 | 0, // PPRMul2_and_PPR_p8to15:dsub2_dsub3 |
| 111184 | 0, // PPRMul2_and_PPR_p8to15:dsub_dsub1 |
| 111185 | 0, // PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 111186 | 0, // PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2 |
| 111187 | 0, // PPRMul2_and_PPR_p8to15:qsub0_qsub1 |
| 111188 | 0, // PPRMul2_and_PPR_p8to15:qsub0_qsub1_qsub2 |
| 111189 | 0, // PPRMul2_and_PPR_p8to15:qsub1_qsub2 |
| 111190 | 0, // PPRMul2_and_PPR_p8to15:qsub1_qsub2_qsub3 |
| 111191 | 0, // PPRMul2_and_PPR_p8to15:qsub2_qsub3 |
| 111192 | 0, // PPRMul2_and_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 111193 | 0, // PPRMul2_and_PPR_p8to15:x8sub_0_x8sub_1 |
| 111194 | 0, // PPRMul2_and_PPR_p8to15:x8sub_2_x8sub_3 |
| 111195 | 0, // PPRMul2_and_PPR_p8to15:x8sub_4_x8sub_5 |
| 111196 | 0, // PPRMul2_and_PPR_p8to15:x8sub_6_x8sub_7 |
| 111197 | 0, // PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111198 | 0, // PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111199 | 0, // PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111200 | 0, // PPRMul2_and_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 111201 | 0, // PPRMul2_and_PPR_p8to15:zsub_qsub1 |
| 111202 | 0, // PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 111203 | 0, // PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2 |
| 111204 | 0, // PPRMul2_and_PPR_p8to15:zsub0_zsub1 |
| 111205 | 0, // PPRMul2_and_PPR_p8to15:zsub0_zsub1_zsub2 |
| 111206 | 0, // PPRMul2_and_PPR_p8to15:zsub1_zsub2 |
| 111207 | 0, // PPRMul2_and_PPR_p8to15:zsub1_zsub2_zsub3 |
| 111208 | 0, // PPRMul2_and_PPR_p8to15:zsub2_zsub3 |
| 111209 | 0, // PPRMul2_and_PPR_p8to15:zsub0_zsub2 |
| 111210 | 0, // PPRMul2_and_PPR_p8to15:zsub1_zsub3 |
| 111211 | }, |
| 111212 | { // PPR2 |
| 111213 | 0, // PPR2:bsub |
| 111214 | 0, // PPR2:bsub_hi |
| 111215 | 0, // PPR2:dsub |
| 111216 | 0, // PPR2:dsub0 |
| 111217 | 0, // PPR2:dsub1 |
| 111218 | 0, // PPR2:dsub2 |
| 111219 | 0, // PPR2:dsub3 |
| 111220 | 0, // PPR2:dsub_hi |
| 111221 | 0, // PPR2:hsub |
| 111222 | 0, // PPR2:hsub_hi |
| 111223 | 11, // PPR2:psub -> PNR |
| 111224 | 12, // PPR2:psub0 -> PPR |
| 111225 | 12, // PPR2:psub1 -> PPR |
| 111226 | 0, // PPR2:qsub0 |
| 111227 | 0, // PPR2:qsub1 |
| 111228 | 0, // PPR2:qsub2 |
| 111229 | 0, // PPR2:qsub3 |
| 111230 | 0, // PPR2:ssub |
| 111231 | 0, // PPR2:ssub_hi |
| 111232 | 0, // PPR2:sub_32 |
| 111233 | 0, // PPR2:sub_32_hi |
| 111234 | 0, // PPR2:sube32 |
| 111235 | 0, // PPR2:sube64 |
| 111236 | 0, // PPR2:subo32 |
| 111237 | 0, // PPR2:subo64 |
| 111238 | 0, // PPR2:x8sub_0 |
| 111239 | 0, // PPR2:x8sub_1 |
| 111240 | 0, // PPR2:x8sub_2 |
| 111241 | 0, // PPR2:x8sub_3 |
| 111242 | 0, // PPR2:x8sub_4 |
| 111243 | 0, // PPR2:x8sub_5 |
| 111244 | 0, // PPR2:x8sub_6 |
| 111245 | 0, // PPR2:x8sub_7 |
| 111246 | 0, // PPR2:zasubb |
| 111247 | 0, // PPR2:zasubd0 |
| 111248 | 0, // PPR2:zasubd1 |
| 111249 | 0, // PPR2:zasubh0 |
| 111250 | 0, // PPR2:zasubh1 |
| 111251 | 0, // PPR2:zasubq0 |
| 111252 | 0, // PPR2:zasubq1 |
| 111253 | 0, // PPR2:zasubs0 |
| 111254 | 0, // PPR2:zasubs1 |
| 111255 | 0, // PPR2:zsub |
| 111256 | 0, // PPR2:zsub0 |
| 111257 | 0, // PPR2:zsub1 |
| 111258 | 0, // PPR2:zsub2 |
| 111259 | 0, // PPR2:zsub3 |
| 111260 | 0, // PPR2:zsub_hi |
| 111261 | 0, // PPR2:zasubd1_then_zasubq0 |
| 111262 | 0, // PPR2:zasubd1_then_zasubq1 |
| 111263 | 0, // PPR2:zasubs1_then_zasubd0 |
| 111264 | 0, // PPR2:zasubs1_then_zasubd1 |
| 111265 | 0, // PPR2:zasubs1_then_zasubq0 |
| 111266 | 0, // PPR2:zasubs1_then_zasubq1 |
| 111267 | 0, // PPR2:zasubs1_then_zasubd1_then_zasubq0 |
| 111268 | 0, // PPR2:zasubs1_then_zasubd1_then_zasubq1 |
| 111269 | 0, // PPR2:zasubh1_then_zasubd0 |
| 111270 | 0, // PPR2:zasubh1_then_zasubd1 |
| 111271 | 0, // PPR2:zasubh1_then_zasubq0 |
| 111272 | 0, // PPR2:zasubh1_then_zasubq1 |
| 111273 | 0, // PPR2:zasubh1_then_zasubs0 |
| 111274 | 0, // PPR2:zasubh1_then_zasubs1 |
| 111275 | 0, // PPR2:zasubh1_then_zasubd1_then_zasubq0 |
| 111276 | 0, // PPR2:zasubh1_then_zasubd1_then_zasubq1 |
| 111277 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubd0 |
| 111278 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1 |
| 111279 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubq0 |
| 111280 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubq1 |
| 111281 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111282 | 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111283 | 0, // PPR2:dsub1_then_bsub |
| 111284 | 0, // PPR2:dsub1_then_bsub_hi |
| 111285 | 0, // PPR2:dsub1_then_hsub |
| 111286 | 0, // PPR2:dsub1_then_hsub_hi |
| 111287 | 0, // PPR2:dsub1_then_ssub |
| 111288 | 0, // PPR2:dsub1_then_ssub_hi |
| 111289 | 0, // PPR2:dsub3_then_bsub |
| 111290 | 0, // PPR2:dsub3_then_bsub_hi |
| 111291 | 0, // PPR2:dsub3_then_hsub |
| 111292 | 0, // PPR2:dsub3_then_hsub_hi |
| 111293 | 0, // PPR2:dsub3_then_ssub |
| 111294 | 0, // PPR2:dsub3_then_ssub_hi |
| 111295 | 0, // PPR2:dsub2_then_bsub |
| 111296 | 0, // PPR2:dsub2_then_bsub_hi |
| 111297 | 0, // PPR2:dsub2_then_hsub |
| 111298 | 0, // PPR2:dsub2_then_hsub_hi |
| 111299 | 0, // PPR2:dsub2_then_ssub |
| 111300 | 0, // PPR2:dsub2_then_ssub_hi |
| 111301 | 11, // PPR2:psub1_then_psub -> PNR |
| 111302 | 0, // PPR2:qsub1_then_dsub_hi |
| 111303 | 0, // PPR2:qsub3_then_dsub_hi |
| 111304 | 0, // PPR2:qsub2_then_dsub_hi |
| 111305 | 0, // PPR2:x8sub_7_then_sub_32 |
| 111306 | 0, // PPR2:x8sub_7_then_sub_32_hi |
| 111307 | 0, // PPR2:x8sub_6_then_sub_32 |
| 111308 | 0, // PPR2:x8sub_6_then_sub_32_hi |
| 111309 | 0, // PPR2:x8sub_5_then_sub_32 |
| 111310 | 0, // PPR2:x8sub_5_then_sub_32_hi |
| 111311 | 0, // PPR2:x8sub_4_then_sub_32 |
| 111312 | 0, // PPR2:x8sub_4_then_sub_32_hi |
| 111313 | 0, // PPR2:x8sub_3_then_sub_32 |
| 111314 | 0, // PPR2:x8sub_3_then_sub_32_hi |
| 111315 | 0, // PPR2:x8sub_2_then_sub_32 |
| 111316 | 0, // PPR2:x8sub_2_then_sub_32_hi |
| 111317 | 0, // PPR2:x8sub_1_then_sub_32 |
| 111318 | 0, // PPR2:x8sub_1_then_sub_32_hi |
| 111319 | 0, // PPR2:subo64_then_sub_32 |
| 111320 | 0, // PPR2:subo64_then_sub_32_hi |
| 111321 | 0, // PPR2:zsub1_then_zsub_hi |
| 111322 | 0, // PPR2:zsub3_then_zsub_hi |
| 111323 | 0, // PPR2:zsub2_then_zsub_hi |
| 111324 | 0, // PPR2:dsub0_dsub1 |
| 111325 | 0, // PPR2:dsub0_dsub1_dsub2 |
| 111326 | 0, // PPR2:dsub1_dsub2 |
| 111327 | 0, // PPR2:dsub1_dsub2_dsub3 |
| 111328 | 0, // PPR2:dsub2_dsub3 |
| 111329 | 0, // PPR2:dsub_dsub1 |
| 111330 | 0, // PPR2:dsub_dsub1_dsub2_dsub3 |
| 111331 | 0, // PPR2:dsub_dsub1_dsub2 |
| 111332 | 0, // PPR2:qsub0_qsub1 |
| 111333 | 0, // PPR2:qsub0_qsub1_qsub2 |
| 111334 | 0, // PPR2:qsub1_qsub2 |
| 111335 | 0, // PPR2:qsub1_qsub2_qsub3 |
| 111336 | 0, // PPR2:qsub2_qsub3 |
| 111337 | 0, // PPR2:sub_32_x8sub_1_then_sub_32 |
| 111338 | 0, // PPR2:x8sub_0_x8sub_1 |
| 111339 | 0, // PPR2:x8sub_2_x8sub_3 |
| 111340 | 0, // PPR2:x8sub_4_x8sub_5 |
| 111341 | 0, // PPR2:x8sub_6_x8sub_7 |
| 111342 | 0, // PPR2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111343 | 0, // PPR2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111344 | 0, // PPR2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111345 | 0, // PPR2:sub_32_subo64_then_sub_32 |
| 111346 | 0, // PPR2:zsub_qsub1 |
| 111347 | 0, // PPR2:zsub_qsub1_qsub2_qsub3 |
| 111348 | 0, // PPR2:zsub_qsub1_qsub2 |
| 111349 | 0, // PPR2:zsub0_zsub1 |
| 111350 | 0, // PPR2:zsub0_zsub1_zsub2 |
| 111351 | 0, // PPR2:zsub1_zsub2 |
| 111352 | 0, // PPR2:zsub1_zsub2_zsub3 |
| 111353 | 0, // PPR2:zsub2_zsub3 |
| 111354 | 0, // PPR2:zsub0_zsub2 |
| 111355 | 0, // PPR2:zsub1_zsub3 |
| 111356 | }, |
| 111357 | { // PPR2Mul2 |
| 111358 | 0, // PPR2Mul2:bsub |
| 111359 | 0, // PPR2Mul2:bsub_hi |
| 111360 | 0, // PPR2Mul2:dsub |
| 111361 | 0, // PPR2Mul2:dsub0 |
| 111362 | 0, // PPR2Mul2:dsub1 |
| 111363 | 0, // PPR2Mul2:dsub2 |
| 111364 | 0, // PPR2Mul2:dsub3 |
| 111365 | 0, // PPR2Mul2:dsub_hi |
| 111366 | 0, // PPR2Mul2:hsub |
| 111367 | 0, // PPR2Mul2:hsub_hi |
| 111368 | 11, // PPR2Mul2:psub -> PNR |
| 111369 | 15, // PPR2Mul2:psub0 -> PPRMul2 |
| 111370 | 12, // PPR2Mul2:psub1 -> PPR |
| 111371 | 0, // PPR2Mul2:qsub0 |
| 111372 | 0, // PPR2Mul2:qsub1 |
| 111373 | 0, // PPR2Mul2:qsub2 |
| 111374 | 0, // PPR2Mul2:qsub3 |
| 111375 | 0, // PPR2Mul2:ssub |
| 111376 | 0, // PPR2Mul2:ssub_hi |
| 111377 | 0, // PPR2Mul2:sub_32 |
| 111378 | 0, // PPR2Mul2:sub_32_hi |
| 111379 | 0, // PPR2Mul2:sube32 |
| 111380 | 0, // PPR2Mul2:sube64 |
| 111381 | 0, // PPR2Mul2:subo32 |
| 111382 | 0, // PPR2Mul2:subo64 |
| 111383 | 0, // PPR2Mul2:x8sub_0 |
| 111384 | 0, // PPR2Mul2:x8sub_1 |
| 111385 | 0, // PPR2Mul2:x8sub_2 |
| 111386 | 0, // PPR2Mul2:x8sub_3 |
| 111387 | 0, // PPR2Mul2:x8sub_4 |
| 111388 | 0, // PPR2Mul2:x8sub_5 |
| 111389 | 0, // PPR2Mul2:x8sub_6 |
| 111390 | 0, // PPR2Mul2:x8sub_7 |
| 111391 | 0, // PPR2Mul2:zasubb |
| 111392 | 0, // PPR2Mul2:zasubd0 |
| 111393 | 0, // PPR2Mul2:zasubd1 |
| 111394 | 0, // PPR2Mul2:zasubh0 |
| 111395 | 0, // PPR2Mul2:zasubh1 |
| 111396 | 0, // PPR2Mul2:zasubq0 |
| 111397 | 0, // PPR2Mul2:zasubq1 |
| 111398 | 0, // PPR2Mul2:zasubs0 |
| 111399 | 0, // PPR2Mul2:zasubs1 |
| 111400 | 0, // PPR2Mul2:zsub |
| 111401 | 0, // PPR2Mul2:zsub0 |
| 111402 | 0, // PPR2Mul2:zsub1 |
| 111403 | 0, // PPR2Mul2:zsub2 |
| 111404 | 0, // PPR2Mul2:zsub3 |
| 111405 | 0, // PPR2Mul2:zsub_hi |
| 111406 | 0, // PPR2Mul2:zasubd1_then_zasubq0 |
| 111407 | 0, // PPR2Mul2:zasubd1_then_zasubq1 |
| 111408 | 0, // PPR2Mul2:zasubs1_then_zasubd0 |
| 111409 | 0, // PPR2Mul2:zasubs1_then_zasubd1 |
| 111410 | 0, // PPR2Mul2:zasubs1_then_zasubq0 |
| 111411 | 0, // PPR2Mul2:zasubs1_then_zasubq1 |
| 111412 | 0, // PPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 |
| 111413 | 0, // PPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 |
| 111414 | 0, // PPR2Mul2:zasubh1_then_zasubd0 |
| 111415 | 0, // PPR2Mul2:zasubh1_then_zasubd1 |
| 111416 | 0, // PPR2Mul2:zasubh1_then_zasubq0 |
| 111417 | 0, // PPR2Mul2:zasubh1_then_zasubq1 |
| 111418 | 0, // PPR2Mul2:zasubh1_then_zasubs0 |
| 111419 | 0, // PPR2Mul2:zasubh1_then_zasubs1 |
| 111420 | 0, // PPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 |
| 111421 | 0, // PPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 |
| 111422 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 |
| 111423 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 |
| 111424 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 |
| 111425 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 |
| 111426 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111427 | 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111428 | 0, // PPR2Mul2:dsub1_then_bsub |
| 111429 | 0, // PPR2Mul2:dsub1_then_bsub_hi |
| 111430 | 0, // PPR2Mul2:dsub1_then_hsub |
| 111431 | 0, // PPR2Mul2:dsub1_then_hsub_hi |
| 111432 | 0, // PPR2Mul2:dsub1_then_ssub |
| 111433 | 0, // PPR2Mul2:dsub1_then_ssub_hi |
| 111434 | 0, // PPR2Mul2:dsub3_then_bsub |
| 111435 | 0, // PPR2Mul2:dsub3_then_bsub_hi |
| 111436 | 0, // PPR2Mul2:dsub3_then_hsub |
| 111437 | 0, // PPR2Mul2:dsub3_then_hsub_hi |
| 111438 | 0, // PPR2Mul2:dsub3_then_ssub |
| 111439 | 0, // PPR2Mul2:dsub3_then_ssub_hi |
| 111440 | 0, // PPR2Mul2:dsub2_then_bsub |
| 111441 | 0, // PPR2Mul2:dsub2_then_bsub_hi |
| 111442 | 0, // PPR2Mul2:dsub2_then_hsub |
| 111443 | 0, // PPR2Mul2:dsub2_then_hsub_hi |
| 111444 | 0, // PPR2Mul2:dsub2_then_ssub |
| 111445 | 0, // PPR2Mul2:dsub2_then_ssub_hi |
| 111446 | 11, // PPR2Mul2:psub1_then_psub -> PNR |
| 111447 | 0, // PPR2Mul2:qsub1_then_dsub_hi |
| 111448 | 0, // PPR2Mul2:qsub3_then_dsub_hi |
| 111449 | 0, // PPR2Mul2:qsub2_then_dsub_hi |
| 111450 | 0, // PPR2Mul2:x8sub_7_then_sub_32 |
| 111451 | 0, // PPR2Mul2:x8sub_7_then_sub_32_hi |
| 111452 | 0, // PPR2Mul2:x8sub_6_then_sub_32 |
| 111453 | 0, // PPR2Mul2:x8sub_6_then_sub_32_hi |
| 111454 | 0, // PPR2Mul2:x8sub_5_then_sub_32 |
| 111455 | 0, // PPR2Mul2:x8sub_5_then_sub_32_hi |
| 111456 | 0, // PPR2Mul2:x8sub_4_then_sub_32 |
| 111457 | 0, // PPR2Mul2:x8sub_4_then_sub_32_hi |
| 111458 | 0, // PPR2Mul2:x8sub_3_then_sub_32 |
| 111459 | 0, // PPR2Mul2:x8sub_3_then_sub_32_hi |
| 111460 | 0, // PPR2Mul2:x8sub_2_then_sub_32 |
| 111461 | 0, // PPR2Mul2:x8sub_2_then_sub_32_hi |
| 111462 | 0, // PPR2Mul2:x8sub_1_then_sub_32 |
| 111463 | 0, // PPR2Mul2:x8sub_1_then_sub_32_hi |
| 111464 | 0, // PPR2Mul2:subo64_then_sub_32 |
| 111465 | 0, // PPR2Mul2:subo64_then_sub_32_hi |
| 111466 | 0, // PPR2Mul2:zsub1_then_zsub_hi |
| 111467 | 0, // PPR2Mul2:zsub3_then_zsub_hi |
| 111468 | 0, // PPR2Mul2:zsub2_then_zsub_hi |
| 111469 | 0, // PPR2Mul2:dsub0_dsub1 |
| 111470 | 0, // PPR2Mul2:dsub0_dsub1_dsub2 |
| 111471 | 0, // PPR2Mul2:dsub1_dsub2 |
| 111472 | 0, // PPR2Mul2:dsub1_dsub2_dsub3 |
| 111473 | 0, // PPR2Mul2:dsub2_dsub3 |
| 111474 | 0, // PPR2Mul2:dsub_dsub1 |
| 111475 | 0, // PPR2Mul2:dsub_dsub1_dsub2_dsub3 |
| 111476 | 0, // PPR2Mul2:dsub_dsub1_dsub2 |
| 111477 | 0, // PPR2Mul2:qsub0_qsub1 |
| 111478 | 0, // PPR2Mul2:qsub0_qsub1_qsub2 |
| 111479 | 0, // PPR2Mul2:qsub1_qsub2 |
| 111480 | 0, // PPR2Mul2:qsub1_qsub2_qsub3 |
| 111481 | 0, // PPR2Mul2:qsub2_qsub3 |
| 111482 | 0, // PPR2Mul2:sub_32_x8sub_1_then_sub_32 |
| 111483 | 0, // PPR2Mul2:x8sub_0_x8sub_1 |
| 111484 | 0, // PPR2Mul2:x8sub_2_x8sub_3 |
| 111485 | 0, // PPR2Mul2:x8sub_4_x8sub_5 |
| 111486 | 0, // PPR2Mul2:x8sub_6_x8sub_7 |
| 111487 | 0, // PPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111488 | 0, // PPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111489 | 0, // PPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111490 | 0, // PPR2Mul2:sub_32_subo64_then_sub_32 |
| 111491 | 0, // PPR2Mul2:zsub_qsub1 |
| 111492 | 0, // PPR2Mul2:zsub_qsub1_qsub2_qsub3 |
| 111493 | 0, // PPR2Mul2:zsub_qsub1_qsub2 |
| 111494 | 0, // PPR2Mul2:zsub0_zsub1 |
| 111495 | 0, // PPR2Mul2:zsub0_zsub1_zsub2 |
| 111496 | 0, // PPR2Mul2:zsub1_zsub2 |
| 111497 | 0, // PPR2Mul2:zsub1_zsub2_zsub3 |
| 111498 | 0, // PPR2Mul2:zsub2_zsub3 |
| 111499 | 0, // PPR2Mul2:zsub0_zsub2 |
| 111500 | 0, // PPR2Mul2:zsub1_zsub3 |
| 111501 | }, |
| 111502 | { // PPR2_with_psub1_in_PPRMul2 |
| 111503 | 0, // PPR2_with_psub1_in_PPRMul2:bsub |
| 111504 | 0, // PPR2_with_psub1_in_PPRMul2:bsub_hi |
| 111505 | 0, // PPR2_with_psub1_in_PPRMul2:dsub |
| 111506 | 0, // PPR2_with_psub1_in_PPRMul2:dsub0 |
| 111507 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1 |
| 111508 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2 |
| 111509 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3 |
| 111510 | 0, // PPR2_with_psub1_in_PPRMul2:dsub_hi |
| 111511 | 0, // PPR2_with_psub1_in_PPRMul2:hsub |
| 111512 | 0, // PPR2_with_psub1_in_PPRMul2:hsub_hi |
| 111513 | 11, // PPR2_with_psub1_in_PPRMul2:psub -> PNR |
| 111514 | 12, // PPR2_with_psub1_in_PPRMul2:psub0 -> PPR |
| 111515 | 15, // PPR2_with_psub1_in_PPRMul2:psub1 -> PPRMul2 |
| 111516 | 0, // PPR2_with_psub1_in_PPRMul2:qsub0 |
| 111517 | 0, // PPR2_with_psub1_in_PPRMul2:qsub1 |
| 111518 | 0, // PPR2_with_psub1_in_PPRMul2:qsub2 |
| 111519 | 0, // PPR2_with_psub1_in_PPRMul2:qsub3 |
| 111520 | 0, // PPR2_with_psub1_in_PPRMul2:ssub |
| 111521 | 0, // PPR2_with_psub1_in_PPRMul2:ssub_hi |
| 111522 | 0, // PPR2_with_psub1_in_PPRMul2:sub_32 |
| 111523 | 0, // PPR2_with_psub1_in_PPRMul2:sub_32_hi |
| 111524 | 0, // PPR2_with_psub1_in_PPRMul2:sube32 |
| 111525 | 0, // PPR2_with_psub1_in_PPRMul2:sube64 |
| 111526 | 0, // PPR2_with_psub1_in_PPRMul2:subo32 |
| 111527 | 0, // PPR2_with_psub1_in_PPRMul2:subo64 |
| 111528 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_0 |
| 111529 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_1 |
| 111530 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_2 |
| 111531 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_3 |
| 111532 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_4 |
| 111533 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_5 |
| 111534 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_6 |
| 111535 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_7 |
| 111536 | 0, // PPR2_with_psub1_in_PPRMul2:zasubb |
| 111537 | 0, // PPR2_with_psub1_in_PPRMul2:zasubd0 |
| 111538 | 0, // PPR2_with_psub1_in_PPRMul2:zasubd1 |
| 111539 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh0 |
| 111540 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1 |
| 111541 | 0, // PPR2_with_psub1_in_PPRMul2:zasubq0 |
| 111542 | 0, // PPR2_with_psub1_in_PPRMul2:zasubq1 |
| 111543 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs0 |
| 111544 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1 |
| 111545 | 0, // PPR2_with_psub1_in_PPRMul2:zsub |
| 111546 | 0, // PPR2_with_psub1_in_PPRMul2:zsub0 |
| 111547 | 0, // PPR2_with_psub1_in_PPRMul2:zsub1 |
| 111548 | 0, // PPR2_with_psub1_in_PPRMul2:zsub2 |
| 111549 | 0, // PPR2_with_psub1_in_PPRMul2:zsub3 |
| 111550 | 0, // PPR2_with_psub1_in_PPRMul2:zsub_hi |
| 111551 | 0, // PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq0 |
| 111552 | 0, // PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq1 |
| 111553 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd0 |
| 111554 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1 |
| 111555 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq0 |
| 111556 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq1 |
| 111557 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 111558 | 0, // PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 111559 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd0 |
| 111560 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1 |
| 111561 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq0 |
| 111562 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq1 |
| 111563 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs0 |
| 111564 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1 |
| 111565 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 111566 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 111567 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 111568 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 111569 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 111570 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 111571 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111572 | 0, // PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111573 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub |
| 111574 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub_hi |
| 111575 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub |
| 111576 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub_hi |
| 111577 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub |
| 111578 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub_hi |
| 111579 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub |
| 111580 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub_hi |
| 111581 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub |
| 111582 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub_hi |
| 111583 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub |
| 111584 | 0, // PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub_hi |
| 111585 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub |
| 111586 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub_hi |
| 111587 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub |
| 111588 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub_hi |
| 111589 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub |
| 111590 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub_hi |
| 111591 | 11, // PPR2_with_psub1_in_PPRMul2:psub1_then_psub -> PNR |
| 111592 | 0, // PPR2_with_psub1_in_PPRMul2:qsub1_then_dsub_hi |
| 111593 | 0, // PPR2_with_psub1_in_PPRMul2:qsub3_then_dsub_hi |
| 111594 | 0, // PPR2_with_psub1_in_PPRMul2:qsub2_then_dsub_hi |
| 111595 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32 |
| 111596 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32_hi |
| 111597 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32 |
| 111598 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_hi |
| 111599 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32 |
| 111600 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32_hi |
| 111601 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32 |
| 111602 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_hi |
| 111603 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32 |
| 111604 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32_hi |
| 111605 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32 |
| 111606 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_hi |
| 111607 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32 |
| 111608 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32_hi |
| 111609 | 0, // PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32 |
| 111610 | 0, // PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32_hi |
| 111611 | 0, // PPR2_with_psub1_in_PPRMul2:zsub1_then_zsub_hi |
| 111612 | 0, // PPR2_with_psub1_in_PPRMul2:zsub3_then_zsub_hi |
| 111613 | 0, // PPR2_with_psub1_in_PPRMul2:zsub2_then_zsub_hi |
| 111614 | 0, // PPR2_with_psub1_in_PPRMul2:dsub0_dsub1 |
| 111615 | 0, // PPR2_with_psub1_in_PPRMul2:dsub0_dsub1_dsub2 |
| 111616 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_dsub2 |
| 111617 | 0, // PPR2_with_psub1_in_PPRMul2:dsub1_dsub2_dsub3 |
| 111618 | 0, // PPR2_with_psub1_in_PPRMul2:dsub2_dsub3 |
| 111619 | 0, // PPR2_with_psub1_in_PPRMul2:dsub_dsub1 |
| 111620 | 0, // PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2_dsub3 |
| 111621 | 0, // PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2 |
| 111622 | 0, // PPR2_with_psub1_in_PPRMul2:qsub0_qsub1 |
| 111623 | 0, // PPR2_with_psub1_in_PPRMul2:qsub0_qsub1_qsub2 |
| 111624 | 0, // PPR2_with_psub1_in_PPRMul2:qsub1_qsub2 |
| 111625 | 0, // PPR2_with_psub1_in_PPRMul2:qsub1_qsub2_qsub3 |
| 111626 | 0, // PPR2_with_psub1_in_PPRMul2:qsub2_qsub3 |
| 111627 | 0, // PPR2_with_psub1_in_PPRMul2:sub_32_x8sub_1_then_sub_32 |
| 111628 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_0_x8sub_1 |
| 111629 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_2_x8sub_3 |
| 111630 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_4_x8sub_5 |
| 111631 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_6_x8sub_7 |
| 111632 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111633 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111634 | 0, // PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111635 | 0, // PPR2_with_psub1_in_PPRMul2:sub_32_subo64_then_sub_32 |
| 111636 | 0, // PPR2_with_psub1_in_PPRMul2:zsub_qsub1 |
| 111637 | 0, // PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2_qsub3 |
| 111638 | 0, // PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2 |
| 111639 | 0, // PPR2_with_psub1_in_PPRMul2:zsub0_zsub1 |
| 111640 | 0, // PPR2_with_psub1_in_PPRMul2:zsub0_zsub1_zsub2 |
| 111641 | 0, // PPR2_with_psub1_in_PPRMul2:zsub1_zsub2 |
| 111642 | 0, // PPR2_with_psub1_in_PPRMul2:zsub1_zsub2_zsub3 |
| 111643 | 0, // PPR2_with_psub1_in_PPRMul2:zsub2_zsub3 |
| 111644 | 0, // PPR2_with_psub1_in_PPRMul2:zsub0_zsub2 |
| 111645 | 0, // PPR2_with_psub1_in_PPRMul2:zsub1_zsub3 |
| 111646 | }, |
| 111647 | { // PPR2_with_psub1_in_PPR_3b |
| 111648 | 0, // PPR2_with_psub1_in_PPR_3b:bsub |
| 111649 | 0, // PPR2_with_psub1_in_PPR_3b:bsub_hi |
| 111650 | 0, // PPR2_with_psub1_in_PPR_3b:dsub |
| 111651 | 0, // PPR2_with_psub1_in_PPR_3b:dsub0 |
| 111652 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1 |
| 111653 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2 |
| 111654 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3 |
| 111655 | 0, // PPR2_with_psub1_in_PPR_3b:dsub_hi |
| 111656 | 0, // PPR2_with_psub1_in_PPR_3b:hsub |
| 111657 | 0, // PPR2_with_psub1_in_PPR_3b:hsub_hi |
| 111658 | 11, // PPR2_with_psub1_in_PPR_3b:psub -> PNR |
| 111659 | 12, // PPR2_with_psub1_in_PPR_3b:psub0 -> PPR |
| 111660 | 16, // PPR2_with_psub1_in_PPR_3b:psub1 -> PPR_3b |
| 111661 | 0, // PPR2_with_psub1_in_PPR_3b:qsub0 |
| 111662 | 0, // PPR2_with_psub1_in_PPR_3b:qsub1 |
| 111663 | 0, // PPR2_with_psub1_in_PPR_3b:qsub2 |
| 111664 | 0, // PPR2_with_psub1_in_PPR_3b:qsub3 |
| 111665 | 0, // PPR2_with_psub1_in_PPR_3b:ssub |
| 111666 | 0, // PPR2_with_psub1_in_PPR_3b:ssub_hi |
| 111667 | 0, // PPR2_with_psub1_in_PPR_3b:sub_32 |
| 111668 | 0, // PPR2_with_psub1_in_PPR_3b:sub_32_hi |
| 111669 | 0, // PPR2_with_psub1_in_PPR_3b:sube32 |
| 111670 | 0, // PPR2_with_psub1_in_PPR_3b:sube64 |
| 111671 | 0, // PPR2_with_psub1_in_PPR_3b:subo32 |
| 111672 | 0, // PPR2_with_psub1_in_PPR_3b:subo64 |
| 111673 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_0 |
| 111674 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_1 |
| 111675 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2 |
| 111676 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_3 |
| 111677 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4 |
| 111678 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_5 |
| 111679 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6 |
| 111680 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_7 |
| 111681 | 0, // PPR2_with_psub1_in_PPR_3b:zasubb |
| 111682 | 0, // PPR2_with_psub1_in_PPR_3b:zasubd0 |
| 111683 | 0, // PPR2_with_psub1_in_PPR_3b:zasubd1 |
| 111684 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh0 |
| 111685 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1 |
| 111686 | 0, // PPR2_with_psub1_in_PPR_3b:zasubq0 |
| 111687 | 0, // PPR2_with_psub1_in_PPR_3b:zasubq1 |
| 111688 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs0 |
| 111689 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1 |
| 111690 | 0, // PPR2_with_psub1_in_PPR_3b:zsub |
| 111691 | 0, // PPR2_with_psub1_in_PPR_3b:zsub0 |
| 111692 | 0, // PPR2_with_psub1_in_PPR_3b:zsub1 |
| 111693 | 0, // PPR2_with_psub1_in_PPR_3b:zsub2 |
| 111694 | 0, // PPR2_with_psub1_in_PPR_3b:zsub3 |
| 111695 | 0, // PPR2_with_psub1_in_PPR_3b:zsub_hi |
| 111696 | 0, // PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 |
| 111697 | 0, // PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 |
| 111698 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 |
| 111699 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 |
| 111700 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 |
| 111701 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 |
| 111702 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 111703 | 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 111704 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 |
| 111705 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 |
| 111706 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 |
| 111707 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 |
| 111708 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 |
| 111709 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 |
| 111710 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 111711 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 111712 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 111713 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 111714 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 111715 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 111716 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111717 | 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111718 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub |
| 111719 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub_hi |
| 111720 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub |
| 111721 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub_hi |
| 111722 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub |
| 111723 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub_hi |
| 111724 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub |
| 111725 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub_hi |
| 111726 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub |
| 111727 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub_hi |
| 111728 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub |
| 111729 | 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub_hi |
| 111730 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub |
| 111731 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub_hi |
| 111732 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub |
| 111733 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub_hi |
| 111734 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub |
| 111735 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub_hi |
| 111736 | 13, // PPR2_with_psub1_in_PPR_3b:psub1_then_psub -> PNR_3b |
| 111737 | 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_hi |
| 111738 | 0, // PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub_hi |
| 111739 | 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_hi |
| 111740 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 |
| 111741 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32_hi |
| 111742 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 |
| 111743 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_hi |
| 111744 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 |
| 111745 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32_hi |
| 111746 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 |
| 111747 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_hi |
| 111748 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 |
| 111749 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32_hi |
| 111750 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 |
| 111751 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_hi |
| 111752 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 |
| 111753 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32_hi |
| 111754 | 0, // PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 |
| 111755 | 0, // PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32_hi |
| 111756 | 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi |
| 111757 | 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi |
| 111758 | 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi |
| 111759 | 0, // PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 |
| 111760 | 0, // PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 |
| 111761 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 |
| 111762 | 0, // PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 |
| 111763 | 0, // PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 |
| 111764 | 0, // PPR2_with_psub1_in_PPR_3b:dsub_dsub1 |
| 111765 | 0, // PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 111766 | 0, // PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2 |
| 111767 | 0, // PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 |
| 111768 | 0, // PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 |
| 111769 | 0, // PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 |
| 111770 | 0, // PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 |
| 111771 | 0, // PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 |
| 111772 | 0, // PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 111773 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 |
| 111774 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 |
| 111775 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 |
| 111776 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 |
| 111777 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111778 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111779 | 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111780 | 0, // PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 |
| 111781 | 0, // PPR2_with_psub1_in_PPR_3b:zsub_qsub1 |
| 111782 | 0, // PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 111783 | 0, // PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2 |
| 111784 | 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 |
| 111785 | 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 |
| 111786 | 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 |
| 111787 | 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 |
| 111788 | 0, // PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 |
| 111789 | 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 |
| 111790 | 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 |
| 111791 | }, |
| 111792 | { // PPR2_with_psub1_in_PPR_p8to15 |
| 111793 | 0, // PPR2_with_psub1_in_PPR_p8to15:bsub |
| 111794 | 0, // PPR2_with_psub1_in_PPR_p8to15:bsub_hi |
| 111795 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub |
| 111796 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0 |
| 111797 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1 |
| 111798 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2 |
| 111799 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3 |
| 111800 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_hi |
| 111801 | 0, // PPR2_with_psub1_in_PPR_p8to15:hsub |
| 111802 | 0, // PPR2_with_psub1_in_PPR_p8to15:hsub_hi |
| 111803 | 11, // PPR2_with_psub1_in_PPR_p8to15:psub -> PNR |
| 111804 | 12, // PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR |
| 111805 | 17, // PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPR_p8to15 |
| 111806 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0 |
| 111807 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1 |
| 111808 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2 |
| 111809 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3 |
| 111810 | 0, // PPR2_with_psub1_in_PPR_p8to15:ssub |
| 111811 | 0, // PPR2_with_psub1_in_PPR_p8to15:ssub_hi |
| 111812 | 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32 |
| 111813 | 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32_hi |
| 111814 | 0, // PPR2_with_psub1_in_PPR_p8to15:sube32 |
| 111815 | 0, // PPR2_with_psub1_in_PPR_p8to15:sube64 |
| 111816 | 0, // PPR2_with_psub1_in_PPR_p8to15:subo32 |
| 111817 | 0, // PPR2_with_psub1_in_PPR_p8to15:subo64 |
| 111818 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_0 |
| 111819 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_1 |
| 111820 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2 |
| 111821 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_3 |
| 111822 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4 |
| 111823 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_5 |
| 111824 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6 |
| 111825 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_7 |
| 111826 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubb |
| 111827 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd0 |
| 111828 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1 |
| 111829 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh0 |
| 111830 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1 |
| 111831 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubq0 |
| 111832 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubq1 |
| 111833 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs0 |
| 111834 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1 |
| 111835 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub |
| 111836 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0 |
| 111837 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1 |
| 111838 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2 |
| 111839 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3 |
| 111840 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_hi |
| 111841 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 |
| 111842 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 |
| 111843 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 |
| 111844 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 |
| 111845 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 |
| 111846 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 |
| 111847 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 111848 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 111849 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 |
| 111850 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 |
| 111851 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 |
| 111852 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 |
| 111853 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 |
| 111854 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 |
| 111855 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 111856 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 111857 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 111858 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 111859 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 111860 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 111861 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 111862 | 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 111863 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub |
| 111864 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub_hi |
| 111865 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub |
| 111866 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub_hi |
| 111867 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub |
| 111868 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub_hi |
| 111869 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub |
| 111870 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub_hi |
| 111871 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub |
| 111872 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub_hi |
| 111873 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub |
| 111874 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub_hi |
| 111875 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub |
| 111876 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub_hi |
| 111877 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub |
| 111878 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub_hi |
| 111879 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub |
| 111880 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub_hi |
| 111881 | 14, // PPR2_with_psub1_in_PPR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 111882 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_hi |
| 111883 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub_hi |
| 111884 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_hi |
| 111885 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 |
| 111886 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 111887 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 |
| 111888 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 111889 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 |
| 111890 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 111891 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 |
| 111892 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 111893 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 |
| 111894 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 111895 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 |
| 111896 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 111897 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 |
| 111898 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 111899 | 0, // PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 |
| 111900 | 0, // PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32_hi |
| 111901 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi |
| 111902 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi |
| 111903 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi |
| 111904 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 |
| 111905 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 |
| 111906 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 |
| 111907 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 |
| 111908 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 |
| 111909 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1 |
| 111910 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 111911 | 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2 |
| 111912 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 |
| 111913 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 |
| 111914 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 |
| 111915 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 |
| 111916 | 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 |
| 111917 | 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 111918 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 |
| 111919 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 |
| 111920 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 |
| 111921 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 |
| 111922 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 111923 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 111924 | 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 111925 | 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 111926 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1 |
| 111927 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 111928 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2 |
| 111929 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 |
| 111930 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 |
| 111931 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 |
| 111932 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 |
| 111933 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 |
| 111934 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 |
| 111935 | 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 |
| 111936 | }, |
| 111937 | { // PPR2_with_psub_in_PNR_3b |
| 111938 | 0, // PPR2_with_psub_in_PNR_3b:bsub |
| 111939 | 0, // PPR2_with_psub_in_PNR_3b:bsub_hi |
| 111940 | 0, // PPR2_with_psub_in_PNR_3b:dsub |
| 111941 | 0, // PPR2_with_psub_in_PNR_3b:dsub0 |
| 111942 | 0, // PPR2_with_psub_in_PNR_3b:dsub1 |
| 111943 | 0, // PPR2_with_psub_in_PNR_3b:dsub2 |
| 111944 | 0, // PPR2_with_psub_in_PNR_3b:dsub3 |
| 111945 | 0, // PPR2_with_psub_in_PNR_3b:dsub_hi |
| 111946 | 0, // PPR2_with_psub_in_PNR_3b:hsub |
| 111947 | 0, // PPR2_with_psub_in_PNR_3b:hsub_hi |
| 111948 | 13, // PPR2_with_psub_in_PNR_3b:psub -> PNR_3b |
| 111949 | 16, // PPR2_with_psub_in_PNR_3b:psub0 -> PPR_3b |
| 111950 | 12, // PPR2_with_psub_in_PNR_3b:psub1 -> PPR |
| 111951 | 0, // PPR2_with_psub_in_PNR_3b:qsub0 |
| 111952 | 0, // PPR2_with_psub_in_PNR_3b:qsub1 |
| 111953 | 0, // PPR2_with_psub_in_PNR_3b:qsub2 |
| 111954 | 0, // PPR2_with_psub_in_PNR_3b:qsub3 |
| 111955 | 0, // PPR2_with_psub_in_PNR_3b:ssub |
| 111956 | 0, // PPR2_with_psub_in_PNR_3b:ssub_hi |
| 111957 | 0, // PPR2_with_psub_in_PNR_3b:sub_32 |
| 111958 | 0, // PPR2_with_psub_in_PNR_3b:sub_32_hi |
| 111959 | 0, // PPR2_with_psub_in_PNR_3b:sube32 |
| 111960 | 0, // PPR2_with_psub_in_PNR_3b:sube64 |
| 111961 | 0, // PPR2_with_psub_in_PNR_3b:subo32 |
| 111962 | 0, // PPR2_with_psub_in_PNR_3b:subo64 |
| 111963 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_0 |
| 111964 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_1 |
| 111965 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_2 |
| 111966 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_3 |
| 111967 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_4 |
| 111968 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_5 |
| 111969 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_6 |
| 111970 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_7 |
| 111971 | 0, // PPR2_with_psub_in_PNR_3b:zasubb |
| 111972 | 0, // PPR2_with_psub_in_PNR_3b:zasubd0 |
| 111973 | 0, // PPR2_with_psub_in_PNR_3b:zasubd1 |
| 111974 | 0, // PPR2_with_psub_in_PNR_3b:zasubh0 |
| 111975 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1 |
| 111976 | 0, // PPR2_with_psub_in_PNR_3b:zasubq0 |
| 111977 | 0, // PPR2_with_psub_in_PNR_3b:zasubq1 |
| 111978 | 0, // PPR2_with_psub_in_PNR_3b:zasubs0 |
| 111979 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1 |
| 111980 | 0, // PPR2_with_psub_in_PNR_3b:zsub |
| 111981 | 0, // PPR2_with_psub_in_PNR_3b:zsub0 |
| 111982 | 0, // PPR2_with_psub_in_PNR_3b:zsub1 |
| 111983 | 0, // PPR2_with_psub_in_PNR_3b:zsub2 |
| 111984 | 0, // PPR2_with_psub_in_PNR_3b:zsub3 |
| 111985 | 0, // PPR2_with_psub_in_PNR_3b:zsub_hi |
| 111986 | 0, // PPR2_with_psub_in_PNR_3b:zasubd1_then_zasubq0 |
| 111987 | 0, // PPR2_with_psub_in_PNR_3b:zasubd1_then_zasubq1 |
| 111988 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd0 |
| 111989 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1 |
| 111990 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubq0 |
| 111991 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubq1 |
| 111992 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 111993 | 0, // PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 111994 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd0 |
| 111995 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1 |
| 111996 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubq0 |
| 111997 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubq1 |
| 111998 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs0 |
| 111999 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1 |
| 112000 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 112001 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 112002 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 112003 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 112004 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 112005 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 112006 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112007 | 0, // PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112008 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_bsub |
| 112009 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_bsub_hi |
| 112010 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_hsub |
| 112011 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_hsub_hi |
| 112012 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_ssub |
| 112013 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_then_ssub_hi |
| 112014 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_bsub |
| 112015 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_bsub_hi |
| 112016 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_hsub |
| 112017 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_hsub_hi |
| 112018 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_ssub |
| 112019 | 0, // PPR2_with_psub_in_PNR_3b:dsub3_then_ssub_hi |
| 112020 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_bsub |
| 112021 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_bsub_hi |
| 112022 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_hsub |
| 112023 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_hsub_hi |
| 112024 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_ssub |
| 112025 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_then_ssub_hi |
| 112026 | 11, // PPR2_with_psub_in_PNR_3b:psub1_then_psub -> PNR |
| 112027 | 0, // PPR2_with_psub_in_PNR_3b:qsub1_then_dsub_hi |
| 112028 | 0, // PPR2_with_psub_in_PNR_3b:qsub3_then_dsub_hi |
| 112029 | 0, // PPR2_with_psub_in_PNR_3b:qsub2_then_dsub_hi |
| 112030 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_7_then_sub_32 |
| 112031 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_7_then_sub_32_hi |
| 112032 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32 |
| 112033 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32_hi |
| 112034 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_5_then_sub_32 |
| 112035 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_5_then_sub_32_hi |
| 112036 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32 |
| 112037 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32_hi |
| 112038 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_3_then_sub_32 |
| 112039 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_3_then_sub_32_hi |
| 112040 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32 |
| 112041 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32_hi |
| 112042 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_1_then_sub_32 |
| 112043 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_1_then_sub_32_hi |
| 112044 | 0, // PPR2_with_psub_in_PNR_3b:subo64_then_sub_32 |
| 112045 | 0, // PPR2_with_psub_in_PNR_3b:subo64_then_sub_32_hi |
| 112046 | 0, // PPR2_with_psub_in_PNR_3b:zsub1_then_zsub_hi |
| 112047 | 0, // PPR2_with_psub_in_PNR_3b:zsub3_then_zsub_hi |
| 112048 | 0, // PPR2_with_psub_in_PNR_3b:zsub2_then_zsub_hi |
| 112049 | 0, // PPR2_with_psub_in_PNR_3b:dsub0_dsub1 |
| 112050 | 0, // PPR2_with_psub_in_PNR_3b:dsub0_dsub1_dsub2 |
| 112051 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_dsub2 |
| 112052 | 0, // PPR2_with_psub_in_PNR_3b:dsub1_dsub2_dsub3 |
| 112053 | 0, // PPR2_with_psub_in_PNR_3b:dsub2_dsub3 |
| 112054 | 0, // PPR2_with_psub_in_PNR_3b:dsub_dsub1 |
| 112055 | 0, // PPR2_with_psub_in_PNR_3b:dsub_dsub1_dsub2_dsub3 |
| 112056 | 0, // PPR2_with_psub_in_PNR_3b:dsub_dsub1_dsub2 |
| 112057 | 0, // PPR2_with_psub_in_PNR_3b:qsub0_qsub1 |
| 112058 | 0, // PPR2_with_psub_in_PNR_3b:qsub0_qsub1_qsub2 |
| 112059 | 0, // PPR2_with_psub_in_PNR_3b:qsub1_qsub2 |
| 112060 | 0, // PPR2_with_psub_in_PNR_3b:qsub1_qsub2_qsub3 |
| 112061 | 0, // PPR2_with_psub_in_PNR_3b:qsub2_qsub3 |
| 112062 | 0, // PPR2_with_psub_in_PNR_3b:sub_32_x8sub_1_then_sub_32 |
| 112063 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_0_x8sub_1 |
| 112064 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_2_x8sub_3 |
| 112065 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_4_x8sub_5 |
| 112066 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_6_x8sub_7 |
| 112067 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112068 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112069 | 0, // PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112070 | 0, // PPR2_with_psub_in_PNR_3b:sub_32_subo64_then_sub_32 |
| 112071 | 0, // PPR2_with_psub_in_PNR_3b:zsub_qsub1 |
| 112072 | 0, // PPR2_with_psub_in_PNR_3b:zsub_qsub1_qsub2_qsub3 |
| 112073 | 0, // PPR2_with_psub_in_PNR_3b:zsub_qsub1_qsub2 |
| 112074 | 0, // PPR2_with_psub_in_PNR_3b:zsub0_zsub1 |
| 112075 | 0, // PPR2_with_psub_in_PNR_3b:zsub0_zsub1_zsub2 |
| 112076 | 0, // PPR2_with_psub_in_PNR_3b:zsub1_zsub2 |
| 112077 | 0, // PPR2_with_psub_in_PNR_3b:zsub1_zsub2_zsub3 |
| 112078 | 0, // PPR2_with_psub_in_PNR_3b:zsub2_zsub3 |
| 112079 | 0, // PPR2_with_psub_in_PNR_3b:zsub0_zsub2 |
| 112080 | 0, // PPR2_with_psub_in_PNR_3b:zsub1_zsub3 |
| 112081 | }, |
| 112082 | { // PPR2_with_psub_in_PNR_p8to15 |
| 112083 | 0, // PPR2_with_psub_in_PNR_p8to15:bsub |
| 112084 | 0, // PPR2_with_psub_in_PNR_p8to15:bsub_hi |
| 112085 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub |
| 112086 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub0 |
| 112087 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1 |
| 112088 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2 |
| 112089 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3 |
| 112090 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub_hi |
| 112091 | 0, // PPR2_with_psub_in_PNR_p8to15:hsub |
| 112092 | 0, // PPR2_with_psub_in_PNR_p8to15:hsub_hi |
| 112093 | 14, // PPR2_with_psub_in_PNR_p8to15:psub -> PNR_p8to15 |
| 112094 | 17, // PPR2_with_psub_in_PNR_p8to15:psub0 -> PPR_p8to15 |
| 112095 | 12, // PPR2_with_psub_in_PNR_p8to15:psub1 -> PPR |
| 112096 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub0 |
| 112097 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub1 |
| 112098 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub2 |
| 112099 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub3 |
| 112100 | 0, // PPR2_with_psub_in_PNR_p8to15:ssub |
| 112101 | 0, // PPR2_with_psub_in_PNR_p8to15:ssub_hi |
| 112102 | 0, // PPR2_with_psub_in_PNR_p8to15:sub_32 |
| 112103 | 0, // PPR2_with_psub_in_PNR_p8to15:sub_32_hi |
| 112104 | 0, // PPR2_with_psub_in_PNR_p8to15:sube32 |
| 112105 | 0, // PPR2_with_psub_in_PNR_p8to15:sube64 |
| 112106 | 0, // PPR2_with_psub_in_PNR_p8to15:subo32 |
| 112107 | 0, // PPR2_with_psub_in_PNR_p8to15:subo64 |
| 112108 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_0 |
| 112109 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_1 |
| 112110 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_2 |
| 112111 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_3 |
| 112112 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_4 |
| 112113 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_5 |
| 112114 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_6 |
| 112115 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_7 |
| 112116 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubb |
| 112117 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubd0 |
| 112118 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubd1 |
| 112119 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh0 |
| 112120 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1 |
| 112121 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubq0 |
| 112122 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubq1 |
| 112123 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs0 |
| 112124 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1 |
| 112125 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub |
| 112126 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub0 |
| 112127 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub1 |
| 112128 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub2 |
| 112129 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub3 |
| 112130 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub_hi |
| 112131 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubd1_then_zasubq0 |
| 112132 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubd1_then_zasubq1 |
| 112133 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd0 |
| 112134 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1 |
| 112135 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubq0 |
| 112136 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubq1 |
| 112137 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 112138 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 112139 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd0 |
| 112140 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1 |
| 112141 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubq0 |
| 112142 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubq1 |
| 112143 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs0 |
| 112144 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1 |
| 112145 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 112146 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 112147 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 112148 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 112149 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 112150 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 112151 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112152 | 0, // PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112153 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_bsub |
| 112154 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_bsub_hi |
| 112155 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_hsub |
| 112156 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_hsub_hi |
| 112157 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_ssub |
| 112158 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_then_ssub_hi |
| 112159 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_bsub |
| 112160 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_bsub_hi |
| 112161 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_hsub |
| 112162 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_hsub_hi |
| 112163 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_ssub |
| 112164 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub3_then_ssub_hi |
| 112165 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_bsub |
| 112166 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_bsub_hi |
| 112167 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_hsub |
| 112168 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_hsub_hi |
| 112169 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_ssub |
| 112170 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_then_ssub_hi |
| 112171 | 11, // PPR2_with_psub_in_PNR_p8to15:psub1_then_psub -> PNR |
| 112172 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub1_then_dsub_hi |
| 112173 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub3_then_dsub_hi |
| 112174 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub2_then_dsub_hi |
| 112175 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_7_then_sub_32 |
| 112176 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_7_then_sub_32_hi |
| 112177 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32 |
| 112178 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32_hi |
| 112179 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_5_then_sub_32 |
| 112180 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_5_then_sub_32_hi |
| 112181 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32 |
| 112182 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32_hi |
| 112183 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_3_then_sub_32 |
| 112184 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_3_then_sub_32_hi |
| 112185 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32 |
| 112186 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32_hi |
| 112187 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_1_then_sub_32 |
| 112188 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_1_then_sub_32_hi |
| 112189 | 0, // PPR2_with_psub_in_PNR_p8to15:subo64_then_sub_32 |
| 112190 | 0, // PPR2_with_psub_in_PNR_p8to15:subo64_then_sub_32_hi |
| 112191 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub1_then_zsub_hi |
| 112192 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub3_then_zsub_hi |
| 112193 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub2_then_zsub_hi |
| 112194 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub0_dsub1 |
| 112195 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub0_dsub1_dsub2 |
| 112196 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_dsub2 |
| 112197 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub1_dsub2_dsub3 |
| 112198 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub2_dsub3 |
| 112199 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub_dsub1 |
| 112200 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 112201 | 0, // PPR2_with_psub_in_PNR_p8to15:dsub_dsub1_dsub2 |
| 112202 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub0_qsub1 |
| 112203 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub0_qsub1_qsub2 |
| 112204 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub1_qsub2 |
| 112205 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub1_qsub2_qsub3 |
| 112206 | 0, // PPR2_with_psub_in_PNR_p8to15:qsub2_qsub3 |
| 112207 | 0, // PPR2_with_psub_in_PNR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 112208 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_0_x8sub_1 |
| 112209 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_2_x8sub_3 |
| 112210 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_4_x8sub_5 |
| 112211 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_6_x8sub_7 |
| 112212 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112213 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112214 | 0, // PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112215 | 0, // PPR2_with_psub_in_PNR_p8to15:sub_32_subo64_then_sub_32 |
| 112216 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub_qsub1 |
| 112217 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 112218 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub_qsub1_qsub2 |
| 112219 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub0_zsub1 |
| 112220 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub0_zsub1_zsub2 |
| 112221 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub1_zsub2 |
| 112222 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub1_zsub2_zsub3 |
| 112223 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub2_zsub3 |
| 112224 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub0_zsub2 |
| 112225 | 0, // PPR2_with_psub_in_PNR_p8to15:zsub1_zsub3 |
| 112226 | }, |
| 112227 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 112228 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:bsub |
| 112229 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:bsub_hi |
| 112230 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub |
| 112231 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0 |
| 112232 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1 |
| 112233 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2 |
| 112234 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3 |
| 112235 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_hi |
| 112236 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:hsub |
| 112237 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:hsub_hi |
| 112238 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:psub -> PNR_3b |
| 112239 | 16, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:psub0 -> PPR_3b |
| 112240 | 16, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:psub1 -> PPR_3b |
| 112241 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0 |
| 112242 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1 |
| 112243 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2 |
| 112244 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3 |
| 112245 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:ssub |
| 112246 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:ssub_hi |
| 112247 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32 |
| 112248 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32_hi |
| 112249 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sube32 |
| 112250 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sube64 |
| 112251 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:subo32 |
| 112252 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:subo64 |
| 112253 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_0 |
| 112254 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_1 |
| 112255 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2 |
| 112256 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_3 |
| 112257 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4 |
| 112258 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_5 |
| 112259 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6 |
| 112260 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_7 |
| 112261 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubb |
| 112262 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd0 |
| 112263 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1 |
| 112264 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh0 |
| 112265 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1 |
| 112266 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubq0 |
| 112267 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubq1 |
| 112268 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs0 |
| 112269 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1 |
| 112270 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub |
| 112271 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0 |
| 112272 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1 |
| 112273 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2 |
| 112274 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3 |
| 112275 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_hi |
| 112276 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 |
| 112277 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 |
| 112278 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 |
| 112279 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 |
| 112280 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 |
| 112281 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 |
| 112282 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 112283 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 112284 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 |
| 112285 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 |
| 112286 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 |
| 112287 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 |
| 112288 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 |
| 112289 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 |
| 112290 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 112291 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 112292 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 112293 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 112294 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 112295 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 112296 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112297 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112298 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub |
| 112299 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub_hi |
| 112300 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub |
| 112301 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub_hi |
| 112302 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub |
| 112303 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub_hi |
| 112304 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub |
| 112305 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub_hi |
| 112306 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub |
| 112307 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub_hi |
| 112308 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub |
| 112309 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub_hi |
| 112310 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub |
| 112311 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub_hi |
| 112312 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub |
| 112313 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub_hi |
| 112314 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub |
| 112315 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub_hi |
| 112316 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:psub1_then_psub -> PNR_3b |
| 112317 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_hi |
| 112318 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub_hi |
| 112319 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_hi |
| 112320 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 |
| 112321 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32_hi |
| 112322 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 |
| 112323 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_hi |
| 112324 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 |
| 112325 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32_hi |
| 112326 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 |
| 112327 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_hi |
| 112328 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 |
| 112329 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32_hi |
| 112330 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 |
| 112331 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_hi |
| 112332 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 |
| 112333 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32_hi |
| 112334 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 |
| 112335 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32_hi |
| 112336 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi |
| 112337 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi |
| 112338 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi |
| 112339 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 |
| 112340 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 |
| 112341 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 |
| 112342 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 |
| 112343 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 |
| 112344 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1 |
| 112345 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 112346 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2 |
| 112347 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 |
| 112348 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 |
| 112349 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 |
| 112350 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 |
| 112351 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 |
| 112352 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 112353 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 |
| 112354 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 |
| 112355 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 |
| 112356 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 |
| 112357 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112358 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112359 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112360 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 |
| 112361 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1 |
| 112362 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 112363 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2 |
| 112364 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 |
| 112365 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 |
| 112366 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 |
| 112367 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 |
| 112368 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 |
| 112369 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 |
| 112370 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 |
| 112371 | }, |
| 112372 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 112373 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:bsub |
| 112374 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:bsub_hi |
| 112375 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub |
| 112376 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0 |
| 112377 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1 |
| 112378 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2 |
| 112379 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3 |
| 112380 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_hi |
| 112381 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:hsub |
| 112382 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:hsub_hi |
| 112383 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub -> PNR_p8to15 |
| 112384 | 17, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR_p8to15 |
| 112385 | 17, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPR_p8to15 |
| 112386 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0 |
| 112387 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1 |
| 112388 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2 |
| 112389 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3 |
| 112390 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:ssub |
| 112391 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:ssub_hi |
| 112392 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32 |
| 112393 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_hi |
| 112394 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sube32 |
| 112395 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sube64 |
| 112396 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo32 |
| 112397 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo64 |
| 112398 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0 |
| 112399 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1 |
| 112400 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2 |
| 112401 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3 |
| 112402 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4 |
| 112403 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5 |
| 112404 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6 |
| 112405 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7 |
| 112406 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubb |
| 112407 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd0 |
| 112408 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1 |
| 112409 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh0 |
| 112410 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1 |
| 112411 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubq0 |
| 112412 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubq1 |
| 112413 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs0 |
| 112414 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1 |
| 112415 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub |
| 112416 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0 |
| 112417 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1 |
| 112418 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2 |
| 112419 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3 |
| 112420 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_hi |
| 112421 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 |
| 112422 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 |
| 112423 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 |
| 112424 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 |
| 112425 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 |
| 112426 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 |
| 112427 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 112428 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 112429 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 |
| 112430 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 |
| 112431 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 |
| 112432 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 |
| 112433 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 |
| 112434 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 |
| 112435 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 112436 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 112437 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 112438 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 112439 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 112440 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 112441 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112442 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112443 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub |
| 112444 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub_hi |
| 112445 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub |
| 112446 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub_hi |
| 112447 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub |
| 112448 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub_hi |
| 112449 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub |
| 112450 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub_hi |
| 112451 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub |
| 112452 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub_hi |
| 112453 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub |
| 112454 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub_hi |
| 112455 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub |
| 112456 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub_hi |
| 112457 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub |
| 112458 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub_hi |
| 112459 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub |
| 112460 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub_hi |
| 112461 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 112462 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_hi |
| 112463 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub_hi |
| 112464 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_hi |
| 112465 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 |
| 112466 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 112467 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 |
| 112468 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 112469 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 |
| 112470 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 112471 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 |
| 112472 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 112473 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 |
| 112474 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 112475 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 |
| 112476 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 112477 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 |
| 112478 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 112479 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 |
| 112480 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32_hi |
| 112481 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi |
| 112482 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi |
| 112483 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi |
| 112484 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 |
| 112485 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 |
| 112486 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 |
| 112487 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 |
| 112488 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 |
| 112489 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1 |
| 112490 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 112491 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2 |
| 112492 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 |
| 112493 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 |
| 112494 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 |
| 112495 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 |
| 112496 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 |
| 112497 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 112498 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 |
| 112499 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 |
| 112500 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 |
| 112501 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 |
| 112502 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112503 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112504 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112505 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 112506 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1 |
| 112507 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 112508 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2 |
| 112509 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 |
| 112510 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 |
| 112511 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 |
| 112512 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 |
| 112513 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 |
| 112514 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 |
| 112515 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 |
| 112516 | }, |
| 112517 | { // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 112518 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:bsub |
| 112519 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:bsub_hi |
| 112520 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub |
| 112521 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub0 |
| 112522 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1 |
| 112523 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2 |
| 112524 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3 |
| 112525 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub_hi |
| 112526 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:hsub |
| 112527 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:hsub_hi |
| 112528 | 13, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:psub -> PNR_3b |
| 112529 | 18, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:psub0 -> PPRMul2_and_PPR_3b |
| 112530 | 16, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:psub1 -> PPR_3b |
| 112531 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub0 |
| 112532 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub1 |
| 112533 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub2 |
| 112534 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub3 |
| 112535 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:ssub |
| 112536 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:ssub_hi |
| 112537 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sub_32 |
| 112538 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sub_32_hi |
| 112539 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sube32 |
| 112540 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sube64 |
| 112541 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:subo32 |
| 112542 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:subo64 |
| 112543 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_0 |
| 112544 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_1 |
| 112545 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_2 |
| 112546 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_3 |
| 112547 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_4 |
| 112548 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_5 |
| 112549 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_6 |
| 112550 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_7 |
| 112551 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubb |
| 112552 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubd0 |
| 112553 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubd1 |
| 112554 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh0 |
| 112555 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1 |
| 112556 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubq0 |
| 112557 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubq1 |
| 112558 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs0 |
| 112559 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1 |
| 112560 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub |
| 112561 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub0 |
| 112562 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub1 |
| 112563 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub2 |
| 112564 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub3 |
| 112565 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub_hi |
| 112566 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubd1_then_zasubq0 |
| 112567 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubd1_then_zasubq1 |
| 112568 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd0 |
| 112569 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1 |
| 112570 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubq0 |
| 112571 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubq1 |
| 112572 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 112573 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 112574 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd0 |
| 112575 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1 |
| 112576 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubq0 |
| 112577 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubq1 |
| 112578 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs0 |
| 112579 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1 |
| 112580 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 112581 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 112582 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 112583 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 112584 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 112585 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 112586 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112587 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112588 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_bsub |
| 112589 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_bsub_hi |
| 112590 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_hsub |
| 112591 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_hsub_hi |
| 112592 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_ssub |
| 112593 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_then_ssub_hi |
| 112594 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_bsub |
| 112595 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_bsub_hi |
| 112596 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_hsub |
| 112597 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_hsub_hi |
| 112598 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_ssub |
| 112599 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub3_then_ssub_hi |
| 112600 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_bsub |
| 112601 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_bsub_hi |
| 112602 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_hsub |
| 112603 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_hsub_hi |
| 112604 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_ssub |
| 112605 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_then_ssub_hi |
| 112606 | 13, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:psub1_then_psub -> PNR_3b |
| 112607 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub1_then_dsub_hi |
| 112608 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub3_then_dsub_hi |
| 112609 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub2_then_dsub_hi |
| 112610 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_7_then_sub_32 |
| 112611 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_7_then_sub_32_hi |
| 112612 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32 |
| 112613 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32_hi |
| 112614 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_5_then_sub_32 |
| 112615 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_5_then_sub_32_hi |
| 112616 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32 |
| 112617 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32_hi |
| 112618 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_3_then_sub_32 |
| 112619 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_3_then_sub_32_hi |
| 112620 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32 |
| 112621 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32_hi |
| 112622 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_1_then_sub_32 |
| 112623 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_1_then_sub_32_hi |
| 112624 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:subo64_then_sub_32 |
| 112625 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:subo64_then_sub_32_hi |
| 112626 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub1_then_zsub_hi |
| 112627 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub3_then_zsub_hi |
| 112628 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub2_then_zsub_hi |
| 112629 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub0_dsub1 |
| 112630 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub0_dsub1_dsub2 |
| 112631 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_dsub2 |
| 112632 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub1_dsub2_dsub3 |
| 112633 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub2_dsub3 |
| 112634 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub_dsub1 |
| 112635 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub_dsub1_dsub2_dsub3 |
| 112636 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:dsub_dsub1_dsub2 |
| 112637 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub0_qsub1 |
| 112638 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub0_qsub1_qsub2 |
| 112639 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub1_qsub2 |
| 112640 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub1_qsub2_qsub3 |
| 112641 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:qsub2_qsub3 |
| 112642 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sub_32_x8sub_1_then_sub_32 |
| 112643 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_0_x8sub_1 |
| 112644 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_2_x8sub_3 |
| 112645 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_4_x8sub_5 |
| 112646 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_6_x8sub_7 |
| 112647 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112648 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112649 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112650 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:sub_32_subo64_then_sub_32 |
| 112651 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub_qsub1 |
| 112652 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub_qsub1_qsub2_qsub3 |
| 112653 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub_qsub1_qsub2 |
| 112654 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub0_zsub1 |
| 112655 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub0_zsub1_zsub2 |
| 112656 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub1_zsub2 |
| 112657 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub1_zsub2_zsub3 |
| 112658 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub2_zsub3 |
| 112659 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub0_zsub2 |
| 112660 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b:zsub1_zsub3 |
| 112661 | }, |
| 112662 | { // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 112663 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:bsub |
| 112664 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:bsub_hi |
| 112665 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub |
| 112666 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub0 |
| 112667 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1 |
| 112668 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2 |
| 112669 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3 |
| 112670 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub_hi |
| 112671 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:hsub |
| 112672 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:hsub_hi |
| 112673 | 14, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:psub -> PNR_p8to15 |
| 112674 | 19, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:psub0 -> PPRMul2_and_PPR_p8to15 |
| 112675 | 17, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:psub1 -> PPR_p8to15 |
| 112676 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub0 |
| 112677 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub1 |
| 112678 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub2 |
| 112679 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub3 |
| 112680 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:ssub |
| 112681 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:ssub_hi |
| 112682 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sub_32 |
| 112683 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sub_32_hi |
| 112684 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sube32 |
| 112685 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sube64 |
| 112686 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:subo32 |
| 112687 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:subo64 |
| 112688 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_0 |
| 112689 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_1 |
| 112690 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_2 |
| 112691 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_3 |
| 112692 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_4 |
| 112693 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_5 |
| 112694 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_6 |
| 112695 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_7 |
| 112696 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubb |
| 112697 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubd0 |
| 112698 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubd1 |
| 112699 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh0 |
| 112700 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1 |
| 112701 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubq0 |
| 112702 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubq1 |
| 112703 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs0 |
| 112704 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1 |
| 112705 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub |
| 112706 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub0 |
| 112707 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub1 |
| 112708 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub2 |
| 112709 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub3 |
| 112710 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub_hi |
| 112711 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubd1_then_zasubq0 |
| 112712 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubd1_then_zasubq1 |
| 112713 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd0 |
| 112714 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1 |
| 112715 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubq0 |
| 112716 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubq1 |
| 112717 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 112718 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 112719 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd0 |
| 112720 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1 |
| 112721 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubq0 |
| 112722 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubq1 |
| 112723 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs0 |
| 112724 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1 |
| 112725 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 112726 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 112727 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 112728 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 112729 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 112730 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 112731 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112732 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112733 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_bsub |
| 112734 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_bsub_hi |
| 112735 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_hsub |
| 112736 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_hsub_hi |
| 112737 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_ssub |
| 112738 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_then_ssub_hi |
| 112739 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_bsub |
| 112740 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_bsub_hi |
| 112741 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_hsub |
| 112742 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_hsub_hi |
| 112743 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_ssub |
| 112744 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub3_then_ssub_hi |
| 112745 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_bsub |
| 112746 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_bsub_hi |
| 112747 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_hsub |
| 112748 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_hsub_hi |
| 112749 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_ssub |
| 112750 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_then_ssub_hi |
| 112751 | 14, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 112752 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub1_then_dsub_hi |
| 112753 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub3_then_dsub_hi |
| 112754 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub2_then_dsub_hi |
| 112755 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_7_then_sub_32 |
| 112756 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_7_then_sub_32_hi |
| 112757 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32 |
| 112758 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32_hi |
| 112759 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_5_then_sub_32 |
| 112760 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_5_then_sub_32_hi |
| 112761 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32 |
| 112762 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32_hi |
| 112763 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_3_then_sub_32 |
| 112764 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_3_then_sub_32_hi |
| 112765 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32 |
| 112766 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32_hi |
| 112767 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_1_then_sub_32 |
| 112768 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_1_then_sub_32_hi |
| 112769 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:subo64_then_sub_32 |
| 112770 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:subo64_then_sub_32_hi |
| 112771 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub1_then_zsub_hi |
| 112772 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub3_then_zsub_hi |
| 112773 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub2_then_zsub_hi |
| 112774 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub0_dsub1 |
| 112775 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub0_dsub1_dsub2 |
| 112776 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_dsub2 |
| 112777 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub1_dsub2_dsub3 |
| 112778 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub2_dsub3 |
| 112779 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub_dsub1 |
| 112780 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 112781 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:dsub_dsub1_dsub2 |
| 112782 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub0_qsub1 |
| 112783 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub0_qsub1_qsub2 |
| 112784 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub1_qsub2 |
| 112785 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub1_qsub2_qsub3 |
| 112786 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:qsub2_qsub3 |
| 112787 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 112788 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_0_x8sub_1 |
| 112789 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_2_x8sub_3 |
| 112790 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_4_x8sub_5 |
| 112791 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_6_x8sub_7 |
| 112792 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112793 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112794 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112795 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:sub_32_subo64_then_sub_32 |
| 112796 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub_qsub1 |
| 112797 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 112798 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub_qsub1_qsub2 |
| 112799 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub0_zsub1 |
| 112800 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub0_zsub1_zsub2 |
| 112801 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub1_zsub2 |
| 112802 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub1_zsub2_zsub3 |
| 112803 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub2_zsub3 |
| 112804 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub0_zsub2 |
| 112805 | 0, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15:zsub1_zsub3 |
| 112806 | }, |
| 112807 | { // PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 112808 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:bsub |
| 112809 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:bsub_hi |
| 112810 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub |
| 112811 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0 |
| 112812 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1 |
| 112813 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2 |
| 112814 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3 |
| 112815 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_hi |
| 112816 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:hsub |
| 112817 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:hsub_hi |
| 112818 | 11, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub -> PNR |
| 112819 | 12, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub0 -> PPR |
| 112820 | 18, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub1 -> PPRMul2_and_PPR_3b |
| 112821 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0 |
| 112822 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1 |
| 112823 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2 |
| 112824 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub3 |
| 112825 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:ssub |
| 112826 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:ssub_hi |
| 112827 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32 |
| 112828 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_hi |
| 112829 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sube32 |
| 112830 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sube64 |
| 112831 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo32 |
| 112832 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64 |
| 112833 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_0 |
| 112834 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1 |
| 112835 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2 |
| 112836 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3 |
| 112837 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4 |
| 112838 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5 |
| 112839 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6 |
| 112840 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7 |
| 112841 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubb |
| 112842 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd0 |
| 112843 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1 |
| 112844 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh0 |
| 112845 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1 |
| 112846 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubq0 |
| 112847 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubq1 |
| 112848 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs0 |
| 112849 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1 |
| 112850 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub |
| 112851 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0 |
| 112852 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1 |
| 112853 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2 |
| 112854 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub3 |
| 112855 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_hi |
| 112856 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1_then_zasubq0 |
| 112857 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1_then_zasubq1 |
| 112858 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd0 |
| 112859 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1 |
| 112860 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubq0 |
| 112861 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubq1 |
| 112862 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 112863 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 112864 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd0 |
| 112865 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1 |
| 112866 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubq0 |
| 112867 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubq1 |
| 112868 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs0 |
| 112869 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1 |
| 112870 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 112871 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 112872 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 112873 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 112874 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 112875 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 112876 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 112877 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 112878 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_bsub |
| 112879 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_bsub_hi |
| 112880 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_hsub |
| 112881 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_hsub_hi |
| 112882 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_ssub |
| 112883 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_ssub_hi |
| 112884 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_bsub |
| 112885 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_bsub_hi |
| 112886 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_hsub |
| 112887 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_hsub_hi |
| 112888 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_ssub |
| 112889 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_ssub_hi |
| 112890 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_bsub |
| 112891 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_bsub_hi |
| 112892 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_hsub |
| 112893 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_hsub_hi |
| 112894 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_ssub |
| 112895 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_ssub_hi |
| 112896 | 13, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub1_then_psub -> PNR_3b |
| 112897 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_then_dsub_hi |
| 112898 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub3_then_dsub_hi |
| 112899 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2_then_dsub_hi |
| 112900 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7_then_sub_32 |
| 112901 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7_then_sub_32_hi |
| 112902 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32 |
| 112903 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_hi |
| 112904 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5_then_sub_32 |
| 112905 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5_then_sub_32_hi |
| 112906 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32 |
| 112907 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_hi |
| 112908 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3_then_sub_32 |
| 112909 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3_then_sub_32_hi |
| 112910 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32 |
| 112911 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_hi |
| 112912 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1_then_sub_32 |
| 112913 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1_then_sub_32_hi |
| 112914 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64_then_sub_32 |
| 112915 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64_then_sub_32_hi |
| 112916 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_then_zsub_hi |
| 112917 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub3_then_zsub_hi |
| 112918 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2_then_zsub_hi |
| 112919 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0_dsub1 |
| 112920 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0_dsub1_dsub2 |
| 112921 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_dsub2 |
| 112922 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_dsub2_dsub3 |
| 112923 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_dsub3 |
| 112924 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1 |
| 112925 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 112926 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1_dsub2 |
| 112927 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0_qsub1 |
| 112928 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0_qsub1_qsub2 |
| 112929 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_qsub2 |
| 112930 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_qsub2_qsub3 |
| 112931 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2_qsub3 |
| 112932 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 112933 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_0_x8sub_1 |
| 112934 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_x8sub_3 |
| 112935 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_x8sub_5 |
| 112936 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_x8sub_7 |
| 112937 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 112938 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 112939 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 112940 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_subo64_then_sub_32 |
| 112941 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1 |
| 112942 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 112943 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1_qsub2 |
| 112944 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub1 |
| 112945 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub1_zsub2 |
| 112946 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub2 |
| 112947 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub2_zsub3 |
| 112948 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2_zsub3 |
| 112949 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub2 |
| 112950 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub3 |
| 112951 | }, |
| 112952 | { // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 112953 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:bsub |
| 112954 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:bsub_hi |
| 112955 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub |
| 112956 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0 |
| 112957 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1 |
| 112958 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2 |
| 112959 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3 |
| 112960 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_hi |
| 112961 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:hsub |
| 112962 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:hsub_hi |
| 112963 | 11, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub -> PNR |
| 112964 | 12, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub0 -> PPR |
| 112965 | 19, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub1 -> PPRMul2_and_PPR_p8to15 |
| 112966 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0 |
| 112967 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1 |
| 112968 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2 |
| 112969 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub3 |
| 112970 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:ssub |
| 112971 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:ssub_hi |
| 112972 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32 |
| 112973 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_hi |
| 112974 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sube32 |
| 112975 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sube64 |
| 112976 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo32 |
| 112977 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64 |
| 112978 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_0 |
| 112979 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1 |
| 112980 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2 |
| 112981 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3 |
| 112982 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4 |
| 112983 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5 |
| 112984 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6 |
| 112985 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7 |
| 112986 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubb |
| 112987 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd0 |
| 112988 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1 |
| 112989 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh0 |
| 112990 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1 |
| 112991 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubq0 |
| 112992 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubq1 |
| 112993 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs0 |
| 112994 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1 |
| 112995 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub |
| 112996 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0 |
| 112997 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1 |
| 112998 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2 |
| 112999 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub3 |
| 113000 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_hi |
| 113001 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq0 |
| 113002 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq1 |
| 113003 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd0 |
| 113004 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1 |
| 113005 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq0 |
| 113006 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq1 |
| 113007 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 113008 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 113009 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd0 |
| 113010 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1 |
| 113011 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq0 |
| 113012 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq1 |
| 113013 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs0 |
| 113014 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1 |
| 113015 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 113016 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 113017 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 113018 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 113019 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 113020 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 113021 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113022 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113023 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_bsub |
| 113024 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_bsub_hi |
| 113025 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_hsub |
| 113026 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_hsub_hi |
| 113027 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_ssub |
| 113028 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_ssub_hi |
| 113029 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_bsub |
| 113030 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_bsub_hi |
| 113031 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_hsub |
| 113032 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_hsub_hi |
| 113033 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_ssub |
| 113034 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_ssub_hi |
| 113035 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_bsub |
| 113036 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_bsub_hi |
| 113037 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_hsub |
| 113038 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_hsub_hi |
| 113039 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_ssub |
| 113040 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_ssub_hi |
| 113041 | 14, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 113042 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_then_dsub_hi |
| 113043 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub3_then_dsub_hi |
| 113044 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2_then_dsub_hi |
| 113045 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32 |
| 113046 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 113047 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32 |
| 113048 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 113049 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32 |
| 113050 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 113051 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32 |
| 113052 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 113053 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32 |
| 113054 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 113055 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32 |
| 113056 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 113057 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32 |
| 113058 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 113059 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64_then_sub_32 |
| 113060 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64_then_sub_32_hi |
| 113061 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_then_zsub_hi |
| 113062 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub3_then_zsub_hi |
| 113063 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2_then_zsub_hi |
| 113064 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0_dsub1 |
| 113065 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0_dsub1_dsub2 |
| 113066 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_dsub2 |
| 113067 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_dsub2_dsub3 |
| 113068 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_dsub3 |
| 113069 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1 |
| 113070 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 113071 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2 |
| 113072 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0_qsub1 |
| 113073 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0_qsub1_qsub2 |
| 113074 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_qsub2 |
| 113075 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_qsub2_qsub3 |
| 113076 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2_qsub3 |
| 113077 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 113078 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_0_x8sub_1 |
| 113079 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_x8sub_3 |
| 113080 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_x8sub_5 |
| 113081 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_x8sub_7 |
| 113082 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113083 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113084 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113085 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 113086 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1 |
| 113087 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 113088 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2 |
| 113089 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub1 |
| 113090 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub1_zsub2 |
| 113091 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub2 |
| 113092 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub2_zsub3 |
| 113093 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2_zsub3 |
| 113094 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub2 |
| 113095 | 0, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub3 |
| 113096 | }, |
| 113097 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 113098 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:bsub |
| 113099 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:bsub_hi |
| 113100 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub |
| 113101 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub0 |
| 113102 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1 |
| 113103 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2 |
| 113104 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3 |
| 113105 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub_hi |
| 113106 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:hsub |
| 113107 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:hsub_hi |
| 113108 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:psub -> PNR_3b |
| 113109 | 16, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:psub0 -> PPR_3b |
| 113110 | 15, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:psub1 -> PPRMul2 |
| 113111 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub0 |
| 113112 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub1 |
| 113113 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub2 |
| 113114 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub3 |
| 113115 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:ssub |
| 113116 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:ssub_hi |
| 113117 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sub_32 |
| 113118 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sub_32_hi |
| 113119 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sube32 |
| 113120 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sube64 |
| 113121 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:subo32 |
| 113122 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:subo64 |
| 113123 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_0 |
| 113124 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_1 |
| 113125 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_2 |
| 113126 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_3 |
| 113127 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_4 |
| 113128 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_5 |
| 113129 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_6 |
| 113130 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_7 |
| 113131 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubb |
| 113132 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubd0 |
| 113133 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubd1 |
| 113134 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh0 |
| 113135 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1 |
| 113136 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubq0 |
| 113137 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubq1 |
| 113138 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs0 |
| 113139 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1 |
| 113140 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub |
| 113141 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub0 |
| 113142 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub1 |
| 113143 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub2 |
| 113144 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub3 |
| 113145 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub_hi |
| 113146 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq0 |
| 113147 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq1 |
| 113148 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd0 |
| 113149 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1 |
| 113150 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq0 |
| 113151 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq1 |
| 113152 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 113153 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 113154 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd0 |
| 113155 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1 |
| 113156 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq0 |
| 113157 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq1 |
| 113158 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs0 |
| 113159 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1 |
| 113160 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 113161 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 113162 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 113163 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 113164 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 113165 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 113166 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113167 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113168 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub |
| 113169 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub_hi |
| 113170 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub |
| 113171 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub_hi |
| 113172 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub |
| 113173 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub_hi |
| 113174 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub |
| 113175 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub_hi |
| 113176 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub |
| 113177 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub_hi |
| 113178 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub |
| 113179 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub_hi |
| 113180 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub |
| 113181 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub_hi |
| 113182 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub |
| 113183 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub_hi |
| 113184 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub |
| 113185 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub_hi |
| 113186 | 11, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:psub1_then_psub -> PNR |
| 113187 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub1_then_dsub_hi |
| 113188 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub3_then_dsub_hi |
| 113189 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub2_then_dsub_hi |
| 113190 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32 |
| 113191 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32_hi |
| 113192 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32 |
| 113193 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_hi |
| 113194 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32 |
| 113195 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32_hi |
| 113196 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32 |
| 113197 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_hi |
| 113198 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32 |
| 113199 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32_hi |
| 113200 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32 |
| 113201 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_hi |
| 113202 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32 |
| 113203 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32_hi |
| 113204 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32 |
| 113205 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32_hi |
| 113206 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub1_then_zsub_hi |
| 113207 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub3_then_zsub_hi |
| 113208 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub2_then_zsub_hi |
| 113209 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub0_dsub1 |
| 113210 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub0_dsub1_dsub2 |
| 113211 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_dsub2 |
| 113212 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub1_dsub2_dsub3 |
| 113213 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub2_dsub3 |
| 113214 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1 |
| 113215 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2_dsub3 |
| 113216 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2 |
| 113217 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub0_qsub1 |
| 113218 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub0_qsub1_qsub2 |
| 113219 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub1_qsub2 |
| 113220 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub1_qsub2_qsub3 |
| 113221 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:qsub2_qsub3 |
| 113222 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sub_32_x8sub_1_then_sub_32 |
| 113223 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_0_x8sub_1 |
| 113224 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_x8sub_3 |
| 113225 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_x8sub_5 |
| 113226 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_x8sub_7 |
| 113227 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113228 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113229 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113230 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:sub_32_subo64_then_sub_32 |
| 113231 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1 |
| 113232 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2_qsub3 |
| 113233 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2 |
| 113234 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub1 |
| 113235 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub1_zsub2 |
| 113236 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub2 |
| 113237 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub2_zsub3 |
| 113238 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub2_zsub3 |
| 113239 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub2 |
| 113240 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub3 |
| 113241 | }, |
| 113242 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 113243 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:bsub |
| 113244 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:bsub_hi |
| 113245 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub |
| 113246 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub0 |
| 113247 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1 |
| 113248 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2 |
| 113249 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3 |
| 113250 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub_hi |
| 113251 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:hsub |
| 113252 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:hsub_hi |
| 113253 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:psub -> PNR_p8to15 |
| 113254 | 17, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:psub0 -> PPR_p8to15 |
| 113255 | 15, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:psub1 -> PPRMul2 |
| 113256 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub0 |
| 113257 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub1 |
| 113258 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub2 |
| 113259 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub3 |
| 113260 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:ssub |
| 113261 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:ssub_hi |
| 113262 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sub_32 |
| 113263 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sub_32_hi |
| 113264 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sube32 |
| 113265 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sube64 |
| 113266 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:subo32 |
| 113267 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:subo64 |
| 113268 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_0 |
| 113269 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_1 |
| 113270 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_2 |
| 113271 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_3 |
| 113272 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_4 |
| 113273 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_5 |
| 113274 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_6 |
| 113275 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_7 |
| 113276 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubb |
| 113277 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubd0 |
| 113278 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubd1 |
| 113279 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh0 |
| 113280 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1 |
| 113281 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubq0 |
| 113282 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubq1 |
| 113283 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs0 |
| 113284 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1 |
| 113285 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub |
| 113286 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub0 |
| 113287 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub1 |
| 113288 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub2 |
| 113289 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub3 |
| 113290 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub_hi |
| 113291 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq0 |
| 113292 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubd1_then_zasubq1 |
| 113293 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd0 |
| 113294 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1 |
| 113295 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq0 |
| 113296 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubq1 |
| 113297 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 113298 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 113299 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd0 |
| 113300 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1 |
| 113301 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq0 |
| 113302 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubq1 |
| 113303 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs0 |
| 113304 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1 |
| 113305 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 113306 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 113307 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 113308 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 113309 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 113310 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 113311 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113312 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113313 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub |
| 113314 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_bsub_hi |
| 113315 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub |
| 113316 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_hsub_hi |
| 113317 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub |
| 113318 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_then_ssub_hi |
| 113319 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub |
| 113320 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_bsub_hi |
| 113321 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub |
| 113322 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_hsub_hi |
| 113323 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub |
| 113324 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub3_then_ssub_hi |
| 113325 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub |
| 113326 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_bsub_hi |
| 113327 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub |
| 113328 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_hsub_hi |
| 113329 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub |
| 113330 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_then_ssub_hi |
| 113331 | 11, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:psub1_then_psub -> PNR |
| 113332 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub1_then_dsub_hi |
| 113333 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub3_then_dsub_hi |
| 113334 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub2_then_dsub_hi |
| 113335 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32 |
| 113336 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_7_then_sub_32_hi |
| 113337 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32 |
| 113338 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_hi |
| 113339 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32 |
| 113340 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_5_then_sub_32_hi |
| 113341 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32 |
| 113342 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_hi |
| 113343 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32 |
| 113344 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_3_then_sub_32_hi |
| 113345 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32 |
| 113346 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_hi |
| 113347 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32 |
| 113348 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_1_then_sub_32_hi |
| 113349 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32 |
| 113350 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:subo64_then_sub_32_hi |
| 113351 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub1_then_zsub_hi |
| 113352 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub3_then_zsub_hi |
| 113353 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub2_then_zsub_hi |
| 113354 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub0_dsub1 |
| 113355 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub0_dsub1_dsub2 |
| 113356 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_dsub2 |
| 113357 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub1_dsub2_dsub3 |
| 113358 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub2_dsub3 |
| 113359 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1 |
| 113360 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2_dsub3 |
| 113361 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:dsub_dsub1_dsub2 |
| 113362 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub0_qsub1 |
| 113363 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub0_qsub1_qsub2 |
| 113364 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub1_qsub2 |
| 113365 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub1_qsub2_qsub3 |
| 113366 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:qsub2_qsub3 |
| 113367 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sub_32_x8sub_1_then_sub_32 |
| 113368 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_0_x8sub_1 |
| 113369 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_x8sub_3 |
| 113370 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_x8sub_5 |
| 113371 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_x8sub_7 |
| 113372 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113373 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113374 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113375 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:sub_32_subo64_then_sub_32 |
| 113376 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1 |
| 113377 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2_qsub3 |
| 113378 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub_qsub1_qsub2 |
| 113379 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub1 |
| 113380 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub1_zsub2 |
| 113381 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub2 |
| 113382 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub2_zsub3 |
| 113383 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub2_zsub3 |
| 113384 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub0_zsub2 |
| 113385 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2:zsub1_zsub3 |
| 113386 | }, |
| 113387 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 113388 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:bsub |
| 113389 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:bsub_hi |
| 113390 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub |
| 113391 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0 |
| 113392 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1 |
| 113393 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2 |
| 113394 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3 |
| 113395 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_hi |
| 113396 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:hsub |
| 113397 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:hsub_hi |
| 113398 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub -> PNR_3b |
| 113399 | 16, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub0 -> PPR_3b |
| 113400 | 18, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub1 -> PPRMul2_and_PPR_3b |
| 113401 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0 |
| 113402 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1 |
| 113403 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2 |
| 113404 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub3 |
| 113405 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:ssub |
| 113406 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:ssub_hi |
| 113407 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32 |
| 113408 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_hi |
| 113409 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sube32 |
| 113410 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sube64 |
| 113411 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo32 |
| 113412 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64 |
| 113413 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_0 |
| 113414 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1 |
| 113415 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2 |
| 113416 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3 |
| 113417 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4 |
| 113418 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5 |
| 113419 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6 |
| 113420 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7 |
| 113421 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubb |
| 113422 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd0 |
| 113423 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1 |
| 113424 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh0 |
| 113425 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1 |
| 113426 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubq0 |
| 113427 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubq1 |
| 113428 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs0 |
| 113429 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1 |
| 113430 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub |
| 113431 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0 |
| 113432 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1 |
| 113433 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2 |
| 113434 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub3 |
| 113435 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_hi |
| 113436 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1_then_zasubq0 |
| 113437 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubd1_then_zasubq1 |
| 113438 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd0 |
| 113439 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1 |
| 113440 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubq0 |
| 113441 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubq1 |
| 113442 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 113443 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 113444 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd0 |
| 113445 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1 |
| 113446 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubq0 |
| 113447 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubq1 |
| 113448 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs0 |
| 113449 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1 |
| 113450 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 113451 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 113452 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 113453 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 113454 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 113455 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 113456 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113457 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113458 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_bsub |
| 113459 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_bsub_hi |
| 113460 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_hsub |
| 113461 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_hsub_hi |
| 113462 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_ssub |
| 113463 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_then_ssub_hi |
| 113464 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_bsub |
| 113465 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_bsub_hi |
| 113466 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_hsub |
| 113467 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_hsub_hi |
| 113468 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_ssub |
| 113469 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub3_then_ssub_hi |
| 113470 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_bsub |
| 113471 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_bsub_hi |
| 113472 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_hsub |
| 113473 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_hsub_hi |
| 113474 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_ssub |
| 113475 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_then_ssub_hi |
| 113476 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:psub1_then_psub -> PNR_3b |
| 113477 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_then_dsub_hi |
| 113478 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub3_then_dsub_hi |
| 113479 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2_then_dsub_hi |
| 113480 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7_then_sub_32 |
| 113481 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_7_then_sub_32_hi |
| 113482 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32 |
| 113483 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_hi |
| 113484 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5_then_sub_32 |
| 113485 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_5_then_sub_32_hi |
| 113486 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32 |
| 113487 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_hi |
| 113488 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3_then_sub_32 |
| 113489 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_3_then_sub_32_hi |
| 113490 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32 |
| 113491 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_hi |
| 113492 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1_then_sub_32 |
| 113493 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_1_then_sub_32_hi |
| 113494 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64_then_sub_32 |
| 113495 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:subo64_then_sub_32_hi |
| 113496 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_then_zsub_hi |
| 113497 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub3_then_zsub_hi |
| 113498 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2_then_zsub_hi |
| 113499 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0_dsub1 |
| 113500 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub0_dsub1_dsub2 |
| 113501 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_dsub2 |
| 113502 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub1_dsub2_dsub3 |
| 113503 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub2_dsub3 |
| 113504 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1 |
| 113505 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 113506 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:dsub_dsub1_dsub2 |
| 113507 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0_qsub1 |
| 113508 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub0_qsub1_qsub2 |
| 113509 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_qsub2 |
| 113510 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub1_qsub2_qsub3 |
| 113511 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:qsub2_qsub3 |
| 113512 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 113513 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_0_x8sub_1 |
| 113514 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_x8sub_3 |
| 113515 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_x8sub_5 |
| 113516 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_x8sub_7 |
| 113517 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113518 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113519 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113520 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:sub_32_subo64_then_sub_32 |
| 113521 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1 |
| 113522 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 113523 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub_qsub1_qsub2 |
| 113524 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub1 |
| 113525 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub1_zsub2 |
| 113526 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub2 |
| 113527 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub2_zsub3 |
| 113528 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub2_zsub3 |
| 113529 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub0_zsub2 |
| 113530 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b:zsub1_zsub3 |
| 113531 | }, |
| 113532 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 113533 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:bsub |
| 113534 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:bsub_hi |
| 113535 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub |
| 113536 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0 |
| 113537 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1 |
| 113538 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2 |
| 113539 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3 |
| 113540 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_hi |
| 113541 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:hsub |
| 113542 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:hsub_hi |
| 113543 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub -> PNR_p8to15 |
| 113544 | 17, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub0 -> PPR_p8to15 |
| 113545 | 19, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub1 -> PPRMul2_and_PPR_p8to15 |
| 113546 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0 |
| 113547 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1 |
| 113548 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2 |
| 113549 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub3 |
| 113550 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:ssub |
| 113551 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:ssub_hi |
| 113552 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32 |
| 113553 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_hi |
| 113554 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sube32 |
| 113555 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sube64 |
| 113556 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo32 |
| 113557 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64 |
| 113558 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_0 |
| 113559 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1 |
| 113560 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2 |
| 113561 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3 |
| 113562 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4 |
| 113563 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5 |
| 113564 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6 |
| 113565 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7 |
| 113566 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubb |
| 113567 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd0 |
| 113568 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1 |
| 113569 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh0 |
| 113570 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1 |
| 113571 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubq0 |
| 113572 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubq1 |
| 113573 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs0 |
| 113574 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1 |
| 113575 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub |
| 113576 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0 |
| 113577 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1 |
| 113578 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2 |
| 113579 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub3 |
| 113580 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_hi |
| 113581 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq0 |
| 113582 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubd1_then_zasubq1 |
| 113583 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd0 |
| 113584 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1 |
| 113585 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq0 |
| 113586 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubq1 |
| 113587 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 113588 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 113589 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd0 |
| 113590 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1 |
| 113591 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq0 |
| 113592 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubq1 |
| 113593 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs0 |
| 113594 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1 |
| 113595 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 113596 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 113597 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 113598 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 113599 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 113600 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 113601 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113602 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113603 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_bsub |
| 113604 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_bsub_hi |
| 113605 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_hsub |
| 113606 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_hsub_hi |
| 113607 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_ssub |
| 113608 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_then_ssub_hi |
| 113609 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_bsub |
| 113610 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_bsub_hi |
| 113611 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_hsub |
| 113612 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_hsub_hi |
| 113613 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_ssub |
| 113614 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub3_then_ssub_hi |
| 113615 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_bsub |
| 113616 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_bsub_hi |
| 113617 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_hsub |
| 113618 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_hsub_hi |
| 113619 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_ssub |
| 113620 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_then_ssub_hi |
| 113621 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 113622 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_then_dsub_hi |
| 113623 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub3_then_dsub_hi |
| 113624 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2_then_dsub_hi |
| 113625 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32 |
| 113626 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 113627 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32 |
| 113628 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 113629 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32 |
| 113630 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 113631 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32 |
| 113632 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 113633 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32 |
| 113634 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 113635 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32 |
| 113636 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 113637 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32 |
| 113638 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 113639 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64_then_sub_32 |
| 113640 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:subo64_then_sub_32_hi |
| 113641 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_then_zsub_hi |
| 113642 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub3_then_zsub_hi |
| 113643 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2_then_zsub_hi |
| 113644 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0_dsub1 |
| 113645 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub0_dsub1_dsub2 |
| 113646 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_dsub2 |
| 113647 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub1_dsub2_dsub3 |
| 113648 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub2_dsub3 |
| 113649 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1 |
| 113650 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 113651 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:dsub_dsub1_dsub2 |
| 113652 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0_qsub1 |
| 113653 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub0_qsub1_qsub2 |
| 113654 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_qsub2 |
| 113655 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub1_qsub2_qsub3 |
| 113656 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:qsub2_qsub3 |
| 113657 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 113658 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_0_x8sub_1 |
| 113659 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_x8sub_3 |
| 113660 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_x8sub_5 |
| 113661 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_x8sub_7 |
| 113662 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113663 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113664 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113665 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 113666 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1 |
| 113667 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 113668 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub_qsub1_qsub2 |
| 113669 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub1 |
| 113670 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub1_zsub2 |
| 113671 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub2 |
| 113672 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub2_zsub3 |
| 113673 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub2_zsub3 |
| 113674 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub0_zsub2 |
| 113675 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15:zsub1_zsub3 |
| 113676 | }, |
| 113677 | { // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 113678 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:bsub |
| 113679 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:bsub_hi |
| 113680 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub |
| 113681 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0 |
| 113682 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1 |
| 113683 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2 |
| 113684 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3 |
| 113685 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_hi |
| 113686 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:hsub |
| 113687 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:hsub_hi |
| 113688 | 13, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub -> PNR_3b |
| 113689 | 16, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR_3b |
| 113690 | 19, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPRMul2_and_PPR_p8to15 |
| 113691 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0 |
| 113692 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1 |
| 113693 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2 |
| 113694 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3 |
| 113695 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:ssub |
| 113696 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:ssub_hi |
| 113697 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32 |
| 113698 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_hi |
| 113699 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sube32 |
| 113700 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sube64 |
| 113701 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo32 |
| 113702 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo64 |
| 113703 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0 |
| 113704 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1 |
| 113705 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2 |
| 113706 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3 |
| 113707 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4 |
| 113708 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5 |
| 113709 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6 |
| 113710 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7 |
| 113711 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubb |
| 113712 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd0 |
| 113713 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1 |
| 113714 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh0 |
| 113715 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1 |
| 113716 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubq0 |
| 113717 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubq1 |
| 113718 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs0 |
| 113719 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1 |
| 113720 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub |
| 113721 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0 |
| 113722 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1 |
| 113723 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2 |
| 113724 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3 |
| 113725 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_hi |
| 113726 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 |
| 113727 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 |
| 113728 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 |
| 113729 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 |
| 113730 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 |
| 113731 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 |
| 113732 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 |
| 113733 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 |
| 113734 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 |
| 113735 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 |
| 113736 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 |
| 113737 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 |
| 113738 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 |
| 113739 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 |
| 113740 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 |
| 113741 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 |
| 113742 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 |
| 113743 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 |
| 113744 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 |
| 113745 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 |
| 113746 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113747 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113748 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub |
| 113749 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub_hi |
| 113750 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub |
| 113751 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub_hi |
| 113752 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub |
| 113753 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub_hi |
| 113754 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub |
| 113755 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub_hi |
| 113756 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub |
| 113757 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub_hi |
| 113758 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub |
| 113759 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub_hi |
| 113760 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub |
| 113761 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub_hi |
| 113762 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub |
| 113763 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub_hi |
| 113764 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub |
| 113765 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub_hi |
| 113766 | 14, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub1_then_psub -> PNR_p8to15 |
| 113767 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_hi |
| 113768 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub_hi |
| 113769 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_hi |
| 113770 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 |
| 113771 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32_hi |
| 113772 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 |
| 113773 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_hi |
| 113774 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 |
| 113775 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32_hi |
| 113776 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 |
| 113777 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_hi |
| 113778 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 |
| 113779 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32_hi |
| 113780 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 |
| 113781 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_hi |
| 113782 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 |
| 113783 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32_hi |
| 113784 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 |
| 113785 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32_hi |
| 113786 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi |
| 113787 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi |
| 113788 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi |
| 113789 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 |
| 113790 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 |
| 113791 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 |
| 113792 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 |
| 113793 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 |
| 113794 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1 |
| 113795 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2_dsub3 |
| 113796 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_dsub1_dsub2 |
| 113797 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 |
| 113798 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 |
| 113799 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 |
| 113800 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 |
| 113801 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 |
| 113802 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 |
| 113803 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 |
| 113804 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 |
| 113805 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 |
| 113806 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 |
| 113807 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113808 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113809 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113810 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 |
| 113811 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1 |
| 113812 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2_qsub3 |
| 113813 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_qsub1_qsub2 |
| 113814 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 |
| 113815 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 |
| 113816 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 |
| 113817 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 |
| 113818 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 |
| 113819 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 |
| 113820 | 0, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 |
| 113821 | }, |
| 113822 | { // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 113823 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:bsub |
| 113824 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:bsub_hi |
| 113825 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub |
| 113826 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0 |
| 113827 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1 |
| 113828 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2 |
| 113829 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3 |
| 113830 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_hi |
| 113831 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:hsub |
| 113832 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:hsub_hi |
| 113833 | 14, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub -> PNR_p8to15 |
| 113834 | 17, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub0 -> PPR_p8to15 |
| 113835 | 18, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub1 -> PPRMul2_and_PPR_3b |
| 113836 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0 |
| 113837 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1 |
| 113838 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2 |
| 113839 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3 |
| 113840 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:ssub |
| 113841 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:ssub_hi |
| 113842 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32 |
| 113843 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32_hi |
| 113844 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sube32 |
| 113845 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sube64 |
| 113846 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo32 |
| 113847 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo64 |
| 113848 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_0 |
| 113849 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_1 |
| 113850 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2 |
| 113851 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_3 |
| 113852 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4 |
| 113853 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_5 |
| 113854 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6 |
| 113855 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_7 |
| 113856 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubb |
| 113857 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd0 |
| 113858 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1 |
| 113859 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh0 |
| 113860 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1 |
| 113861 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubq0 |
| 113862 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubq1 |
| 113863 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs0 |
| 113864 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1 |
| 113865 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub |
| 113866 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0 |
| 113867 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1 |
| 113868 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2 |
| 113869 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3 |
| 113870 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_hi |
| 113871 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 |
| 113872 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 |
| 113873 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 |
| 113874 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 |
| 113875 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 |
| 113876 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 |
| 113877 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 113878 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 113879 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 |
| 113880 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 |
| 113881 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 |
| 113882 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 |
| 113883 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 |
| 113884 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 |
| 113885 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 113886 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 113887 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 113888 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 113889 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 113890 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 113891 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 113892 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 113893 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub |
| 113894 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub_hi |
| 113895 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub |
| 113896 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub_hi |
| 113897 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub |
| 113898 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub_hi |
| 113899 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub |
| 113900 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub_hi |
| 113901 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub |
| 113902 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub_hi |
| 113903 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub |
| 113904 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub_hi |
| 113905 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub |
| 113906 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub_hi |
| 113907 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub |
| 113908 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub_hi |
| 113909 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub |
| 113910 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub_hi |
| 113911 | 13, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub1_then_psub -> PNR_3b |
| 113912 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_hi |
| 113913 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub_hi |
| 113914 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_hi |
| 113915 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 |
| 113916 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32_hi |
| 113917 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 |
| 113918 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_hi |
| 113919 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 |
| 113920 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32_hi |
| 113921 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 |
| 113922 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_hi |
| 113923 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 |
| 113924 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32_hi |
| 113925 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 |
| 113926 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_hi |
| 113927 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 |
| 113928 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32_hi |
| 113929 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 |
| 113930 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32_hi |
| 113931 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi |
| 113932 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi |
| 113933 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi |
| 113934 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 |
| 113935 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 |
| 113936 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 |
| 113937 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 |
| 113938 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 |
| 113939 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1 |
| 113940 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2_dsub3 |
| 113941 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_dsub1_dsub2 |
| 113942 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 |
| 113943 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 |
| 113944 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 |
| 113945 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 |
| 113946 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 |
| 113947 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 |
| 113948 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 |
| 113949 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 |
| 113950 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 |
| 113951 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 |
| 113952 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 113953 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 113954 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 113955 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 |
| 113956 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1 |
| 113957 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2_qsub3 |
| 113958 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_qsub1_qsub2 |
| 113959 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 |
| 113960 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 |
| 113961 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 |
| 113962 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 |
| 113963 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 |
| 113964 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 |
| 113965 | 0, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 |
| 113966 | }, |
| 113967 | { // GPR32all |
| 113968 | 0, // GPR32all:bsub |
| 113969 | 0, // GPR32all:bsub_hi |
| 113970 | 0, // GPR32all:dsub |
| 113971 | 0, // GPR32all:dsub0 |
| 113972 | 0, // GPR32all:dsub1 |
| 113973 | 0, // GPR32all:dsub2 |
| 113974 | 0, // GPR32all:dsub3 |
| 113975 | 0, // GPR32all:dsub_hi |
| 113976 | 0, // GPR32all:hsub |
| 113977 | 0, // GPR32all:hsub_hi |
| 113978 | 0, // GPR32all:psub |
| 113979 | 0, // GPR32all:psub0 |
| 113980 | 0, // GPR32all:psub1 |
| 113981 | 0, // GPR32all:qsub0 |
| 113982 | 0, // GPR32all:qsub1 |
| 113983 | 0, // GPR32all:qsub2 |
| 113984 | 0, // GPR32all:qsub3 |
| 113985 | 0, // GPR32all:ssub |
| 113986 | 0, // GPR32all:ssub_hi |
| 113987 | 0, // GPR32all:sub_32 |
| 113988 | 0, // GPR32all:sub_32_hi |
| 113989 | 0, // GPR32all:sube32 |
| 113990 | 0, // GPR32all:sube64 |
| 113991 | 0, // GPR32all:subo32 |
| 113992 | 0, // GPR32all:subo64 |
| 113993 | 0, // GPR32all:x8sub_0 |
| 113994 | 0, // GPR32all:x8sub_1 |
| 113995 | 0, // GPR32all:x8sub_2 |
| 113996 | 0, // GPR32all:x8sub_3 |
| 113997 | 0, // GPR32all:x8sub_4 |
| 113998 | 0, // GPR32all:x8sub_5 |
| 113999 | 0, // GPR32all:x8sub_6 |
| 114000 | 0, // GPR32all:x8sub_7 |
| 114001 | 0, // GPR32all:zasubb |
| 114002 | 0, // GPR32all:zasubd0 |
| 114003 | 0, // GPR32all:zasubd1 |
| 114004 | 0, // GPR32all:zasubh0 |
| 114005 | 0, // GPR32all:zasubh1 |
| 114006 | 0, // GPR32all:zasubq0 |
| 114007 | 0, // GPR32all:zasubq1 |
| 114008 | 0, // GPR32all:zasubs0 |
| 114009 | 0, // GPR32all:zasubs1 |
| 114010 | 0, // GPR32all:zsub |
| 114011 | 0, // GPR32all:zsub0 |
| 114012 | 0, // GPR32all:zsub1 |
| 114013 | 0, // GPR32all:zsub2 |
| 114014 | 0, // GPR32all:zsub3 |
| 114015 | 0, // GPR32all:zsub_hi |
| 114016 | 0, // GPR32all:zasubd1_then_zasubq0 |
| 114017 | 0, // GPR32all:zasubd1_then_zasubq1 |
| 114018 | 0, // GPR32all:zasubs1_then_zasubd0 |
| 114019 | 0, // GPR32all:zasubs1_then_zasubd1 |
| 114020 | 0, // GPR32all:zasubs1_then_zasubq0 |
| 114021 | 0, // GPR32all:zasubs1_then_zasubq1 |
| 114022 | 0, // GPR32all:zasubs1_then_zasubd1_then_zasubq0 |
| 114023 | 0, // GPR32all:zasubs1_then_zasubd1_then_zasubq1 |
| 114024 | 0, // GPR32all:zasubh1_then_zasubd0 |
| 114025 | 0, // GPR32all:zasubh1_then_zasubd1 |
| 114026 | 0, // GPR32all:zasubh1_then_zasubq0 |
| 114027 | 0, // GPR32all:zasubh1_then_zasubq1 |
| 114028 | 0, // GPR32all:zasubh1_then_zasubs0 |
| 114029 | 0, // GPR32all:zasubh1_then_zasubs1 |
| 114030 | 0, // GPR32all:zasubh1_then_zasubd1_then_zasubq0 |
| 114031 | 0, // GPR32all:zasubh1_then_zasubd1_then_zasubq1 |
| 114032 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd0 |
| 114033 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1 |
| 114034 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubq0 |
| 114035 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubq1 |
| 114036 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114037 | 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114038 | 0, // GPR32all:dsub1_then_bsub |
| 114039 | 0, // GPR32all:dsub1_then_bsub_hi |
| 114040 | 0, // GPR32all:dsub1_then_hsub |
| 114041 | 0, // GPR32all:dsub1_then_hsub_hi |
| 114042 | 0, // GPR32all:dsub1_then_ssub |
| 114043 | 0, // GPR32all:dsub1_then_ssub_hi |
| 114044 | 0, // GPR32all:dsub3_then_bsub |
| 114045 | 0, // GPR32all:dsub3_then_bsub_hi |
| 114046 | 0, // GPR32all:dsub3_then_hsub |
| 114047 | 0, // GPR32all:dsub3_then_hsub_hi |
| 114048 | 0, // GPR32all:dsub3_then_ssub |
| 114049 | 0, // GPR32all:dsub3_then_ssub_hi |
| 114050 | 0, // GPR32all:dsub2_then_bsub |
| 114051 | 0, // GPR32all:dsub2_then_bsub_hi |
| 114052 | 0, // GPR32all:dsub2_then_hsub |
| 114053 | 0, // GPR32all:dsub2_then_hsub_hi |
| 114054 | 0, // GPR32all:dsub2_then_ssub |
| 114055 | 0, // GPR32all:dsub2_then_ssub_hi |
| 114056 | 0, // GPR32all:psub1_then_psub |
| 114057 | 0, // GPR32all:qsub1_then_dsub_hi |
| 114058 | 0, // GPR32all:qsub3_then_dsub_hi |
| 114059 | 0, // GPR32all:qsub2_then_dsub_hi |
| 114060 | 0, // GPR32all:x8sub_7_then_sub_32 |
| 114061 | 0, // GPR32all:x8sub_7_then_sub_32_hi |
| 114062 | 0, // GPR32all:x8sub_6_then_sub_32 |
| 114063 | 0, // GPR32all:x8sub_6_then_sub_32_hi |
| 114064 | 0, // GPR32all:x8sub_5_then_sub_32 |
| 114065 | 0, // GPR32all:x8sub_5_then_sub_32_hi |
| 114066 | 0, // GPR32all:x8sub_4_then_sub_32 |
| 114067 | 0, // GPR32all:x8sub_4_then_sub_32_hi |
| 114068 | 0, // GPR32all:x8sub_3_then_sub_32 |
| 114069 | 0, // GPR32all:x8sub_3_then_sub_32_hi |
| 114070 | 0, // GPR32all:x8sub_2_then_sub_32 |
| 114071 | 0, // GPR32all:x8sub_2_then_sub_32_hi |
| 114072 | 0, // GPR32all:x8sub_1_then_sub_32 |
| 114073 | 0, // GPR32all:x8sub_1_then_sub_32_hi |
| 114074 | 0, // GPR32all:subo64_then_sub_32 |
| 114075 | 0, // GPR32all:subo64_then_sub_32_hi |
| 114076 | 0, // GPR32all:zsub1_then_zsub_hi |
| 114077 | 0, // GPR32all:zsub3_then_zsub_hi |
| 114078 | 0, // GPR32all:zsub2_then_zsub_hi |
| 114079 | 0, // GPR32all:dsub0_dsub1 |
| 114080 | 0, // GPR32all:dsub0_dsub1_dsub2 |
| 114081 | 0, // GPR32all:dsub1_dsub2 |
| 114082 | 0, // GPR32all:dsub1_dsub2_dsub3 |
| 114083 | 0, // GPR32all:dsub2_dsub3 |
| 114084 | 0, // GPR32all:dsub_dsub1 |
| 114085 | 0, // GPR32all:dsub_dsub1_dsub2_dsub3 |
| 114086 | 0, // GPR32all:dsub_dsub1_dsub2 |
| 114087 | 0, // GPR32all:qsub0_qsub1 |
| 114088 | 0, // GPR32all:qsub0_qsub1_qsub2 |
| 114089 | 0, // GPR32all:qsub1_qsub2 |
| 114090 | 0, // GPR32all:qsub1_qsub2_qsub3 |
| 114091 | 0, // GPR32all:qsub2_qsub3 |
| 114092 | 0, // GPR32all:sub_32_x8sub_1_then_sub_32 |
| 114093 | 0, // GPR32all:x8sub_0_x8sub_1 |
| 114094 | 0, // GPR32all:x8sub_2_x8sub_3 |
| 114095 | 0, // GPR32all:x8sub_4_x8sub_5 |
| 114096 | 0, // GPR32all:x8sub_6_x8sub_7 |
| 114097 | 0, // GPR32all:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114098 | 0, // GPR32all:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114099 | 0, // GPR32all:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114100 | 0, // GPR32all:sub_32_subo64_then_sub_32 |
| 114101 | 0, // GPR32all:zsub_qsub1 |
| 114102 | 0, // GPR32all:zsub_qsub1_qsub2_qsub3 |
| 114103 | 0, // GPR32all:zsub_qsub1_qsub2 |
| 114104 | 0, // GPR32all:zsub0_zsub1 |
| 114105 | 0, // GPR32all:zsub0_zsub1_zsub2 |
| 114106 | 0, // GPR32all:zsub1_zsub2 |
| 114107 | 0, // GPR32all:zsub1_zsub2_zsub3 |
| 114108 | 0, // GPR32all:zsub2_zsub3 |
| 114109 | 0, // GPR32all:zsub0_zsub2 |
| 114110 | 0, // GPR32all:zsub1_zsub3 |
| 114111 | }, |
| 114112 | { // FPR32 |
| 114113 | 7, // FPR32:bsub -> FPR8 |
| 114114 | 0, // FPR32:bsub_hi |
| 114115 | 0, // FPR32:dsub |
| 114116 | 0, // FPR32:dsub0 |
| 114117 | 0, // FPR32:dsub1 |
| 114118 | 0, // FPR32:dsub2 |
| 114119 | 0, // FPR32:dsub3 |
| 114120 | 0, // FPR32:dsub_hi |
| 114121 | 8, // FPR32:hsub -> FPR16 |
| 114122 | 0, // FPR32:hsub_hi |
| 114123 | 0, // FPR32:psub |
| 114124 | 0, // FPR32:psub0 |
| 114125 | 0, // FPR32:psub1 |
| 114126 | 0, // FPR32:qsub0 |
| 114127 | 0, // FPR32:qsub1 |
| 114128 | 0, // FPR32:qsub2 |
| 114129 | 0, // FPR32:qsub3 |
| 114130 | 0, // FPR32:ssub |
| 114131 | 0, // FPR32:ssub_hi |
| 114132 | 0, // FPR32:sub_32 |
| 114133 | 0, // FPR32:sub_32_hi |
| 114134 | 0, // FPR32:sube32 |
| 114135 | 0, // FPR32:sube64 |
| 114136 | 0, // FPR32:subo32 |
| 114137 | 0, // FPR32:subo64 |
| 114138 | 0, // FPR32:x8sub_0 |
| 114139 | 0, // FPR32:x8sub_1 |
| 114140 | 0, // FPR32:x8sub_2 |
| 114141 | 0, // FPR32:x8sub_3 |
| 114142 | 0, // FPR32:x8sub_4 |
| 114143 | 0, // FPR32:x8sub_5 |
| 114144 | 0, // FPR32:x8sub_6 |
| 114145 | 0, // FPR32:x8sub_7 |
| 114146 | 0, // FPR32:zasubb |
| 114147 | 0, // FPR32:zasubd0 |
| 114148 | 0, // FPR32:zasubd1 |
| 114149 | 0, // FPR32:zasubh0 |
| 114150 | 0, // FPR32:zasubh1 |
| 114151 | 0, // FPR32:zasubq0 |
| 114152 | 0, // FPR32:zasubq1 |
| 114153 | 0, // FPR32:zasubs0 |
| 114154 | 0, // FPR32:zasubs1 |
| 114155 | 0, // FPR32:zsub |
| 114156 | 0, // FPR32:zsub0 |
| 114157 | 0, // FPR32:zsub1 |
| 114158 | 0, // FPR32:zsub2 |
| 114159 | 0, // FPR32:zsub3 |
| 114160 | 0, // FPR32:zsub_hi |
| 114161 | 0, // FPR32:zasubd1_then_zasubq0 |
| 114162 | 0, // FPR32:zasubd1_then_zasubq1 |
| 114163 | 0, // FPR32:zasubs1_then_zasubd0 |
| 114164 | 0, // FPR32:zasubs1_then_zasubd1 |
| 114165 | 0, // FPR32:zasubs1_then_zasubq0 |
| 114166 | 0, // FPR32:zasubs1_then_zasubq1 |
| 114167 | 0, // FPR32:zasubs1_then_zasubd1_then_zasubq0 |
| 114168 | 0, // FPR32:zasubs1_then_zasubd1_then_zasubq1 |
| 114169 | 0, // FPR32:zasubh1_then_zasubd0 |
| 114170 | 0, // FPR32:zasubh1_then_zasubd1 |
| 114171 | 0, // FPR32:zasubh1_then_zasubq0 |
| 114172 | 0, // FPR32:zasubh1_then_zasubq1 |
| 114173 | 0, // FPR32:zasubh1_then_zasubs0 |
| 114174 | 0, // FPR32:zasubh1_then_zasubs1 |
| 114175 | 0, // FPR32:zasubh1_then_zasubd1_then_zasubq0 |
| 114176 | 0, // FPR32:zasubh1_then_zasubd1_then_zasubq1 |
| 114177 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubd0 |
| 114178 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1 |
| 114179 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubq0 |
| 114180 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubq1 |
| 114181 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114182 | 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114183 | 0, // FPR32:dsub1_then_bsub |
| 114184 | 0, // FPR32:dsub1_then_bsub_hi |
| 114185 | 0, // FPR32:dsub1_then_hsub |
| 114186 | 0, // FPR32:dsub1_then_hsub_hi |
| 114187 | 0, // FPR32:dsub1_then_ssub |
| 114188 | 0, // FPR32:dsub1_then_ssub_hi |
| 114189 | 0, // FPR32:dsub3_then_bsub |
| 114190 | 0, // FPR32:dsub3_then_bsub_hi |
| 114191 | 0, // FPR32:dsub3_then_hsub |
| 114192 | 0, // FPR32:dsub3_then_hsub_hi |
| 114193 | 0, // FPR32:dsub3_then_ssub |
| 114194 | 0, // FPR32:dsub3_then_ssub_hi |
| 114195 | 0, // FPR32:dsub2_then_bsub |
| 114196 | 0, // FPR32:dsub2_then_bsub_hi |
| 114197 | 0, // FPR32:dsub2_then_hsub |
| 114198 | 0, // FPR32:dsub2_then_hsub_hi |
| 114199 | 0, // FPR32:dsub2_then_ssub |
| 114200 | 0, // FPR32:dsub2_then_ssub_hi |
| 114201 | 0, // FPR32:psub1_then_psub |
| 114202 | 0, // FPR32:qsub1_then_dsub_hi |
| 114203 | 0, // FPR32:qsub3_then_dsub_hi |
| 114204 | 0, // FPR32:qsub2_then_dsub_hi |
| 114205 | 0, // FPR32:x8sub_7_then_sub_32 |
| 114206 | 0, // FPR32:x8sub_7_then_sub_32_hi |
| 114207 | 0, // FPR32:x8sub_6_then_sub_32 |
| 114208 | 0, // FPR32:x8sub_6_then_sub_32_hi |
| 114209 | 0, // FPR32:x8sub_5_then_sub_32 |
| 114210 | 0, // FPR32:x8sub_5_then_sub_32_hi |
| 114211 | 0, // FPR32:x8sub_4_then_sub_32 |
| 114212 | 0, // FPR32:x8sub_4_then_sub_32_hi |
| 114213 | 0, // FPR32:x8sub_3_then_sub_32 |
| 114214 | 0, // FPR32:x8sub_3_then_sub_32_hi |
| 114215 | 0, // FPR32:x8sub_2_then_sub_32 |
| 114216 | 0, // FPR32:x8sub_2_then_sub_32_hi |
| 114217 | 0, // FPR32:x8sub_1_then_sub_32 |
| 114218 | 0, // FPR32:x8sub_1_then_sub_32_hi |
| 114219 | 0, // FPR32:subo64_then_sub_32 |
| 114220 | 0, // FPR32:subo64_then_sub_32_hi |
| 114221 | 0, // FPR32:zsub1_then_zsub_hi |
| 114222 | 0, // FPR32:zsub3_then_zsub_hi |
| 114223 | 0, // FPR32:zsub2_then_zsub_hi |
| 114224 | 0, // FPR32:dsub0_dsub1 |
| 114225 | 0, // FPR32:dsub0_dsub1_dsub2 |
| 114226 | 0, // FPR32:dsub1_dsub2 |
| 114227 | 0, // FPR32:dsub1_dsub2_dsub3 |
| 114228 | 0, // FPR32:dsub2_dsub3 |
| 114229 | 0, // FPR32:dsub_dsub1 |
| 114230 | 0, // FPR32:dsub_dsub1_dsub2_dsub3 |
| 114231 | 0, // FPR32:dsub_dsub1_dsub2 |
| 114232 | 0, // FPR32:qsub0_qsub1 |
| 114233 | 0, // FPR32:qsub0_qsub1_qsub2 |
| 114234 | 0, // FPR32:qsub1_qsub2 |
| 114235 | 0, // FPR32:qsub1_qsub2_qsub3 |
| 114236 | 0, // FPR32:qsub2_qsub3 |
| 114237 | 0, // FPR32:sub_32_x8sub_1_then_sub_32 |
| 114238 | 0, // FPR32:x8sub_0_x8sub_1 |
| 114239 | 0, // FPR32:x8sub_2_x8sub_3 |
| 114240 | 0, // FPR32:x8sub_4_x8sub_5 |
| 114241 | 0, // FPR32:x8sub_6_x8sub_7 |
| 114242 | 0, // FPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114243 | 0, // FPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114244 | 0, // FPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114245 | 0, // FPR32:sub_32_subo64_then_sub_32 |
| 114246 | 0, // FPR32:zsub_qsub1 |
| 114247 | 0, // FPR32:zsub_qsub1_qsub2_qsub3 |
| 114248 | 0, // FPR32:zsub_qsub1_qsub2 |
| 114249 | 0, // FPR32:zsub0_zsub1 |
| 114250 | 0, // FPR32:zsub0_zsub1_zsub2 |
| 114251 | 0, // FPR32:zsub1_zsub2 |
| 114252 | 0, // FPR32:zsub1_zsub2_zsub3 |
| 114253 | 0, // FPR32:zsub2_zsub3 |
| 114254 | 0, // FPR32:zsub0_zsub2 |
| 114255 | 0, // FPR32:zsub1_zsub3 |
| 114256 | }, |
| 114257 | { // GPR32 |
| 114258 | 0, // GPR32:bsub |
| 114259 | 0, // GPR32:bsub_hi |
| 114260 | 0, // GPR32:dsub |
| 114261 | 0, // GPR32:dsub0 |
| 114262 | 0, // GPR32:dsub1 |
| 114263 | 0, // GPR32:dsub2 |
| 114264 | 0, // GPR32:dsub3 |
| 114265 | 0, // GPR32:dsub_hi |
| 114266 | 0, // GPR32:hsub |
| 114267 | 0, // GPR32:hsub_hi |
| 114268 | 0, // GPR32:psub |
| 114269 | 0, // GPR32:psub0 |
| 114270 | 0, // GPR32:psub1 |
| 114271 | 0, // GPR32:qsub0 |
| 114272 | 0, // GPR32:qsub1 |
| 114273 | 0, // GPR32:qsub2 |
| 114274 | 0, // GPR32:qsub3 |
| 114275 | 0, // GPR32:ssub |
| 114276 | 0, // GPR32:ssub_hi |
| 114277 | 0, // GPR32:sub_32 |
| 114278 | 0, // GPR32:sub_32_hi |
| 114279 | 0, // GPR32:sube32 |
| 114280 | 0, // GPR32:sube64 |
| 114281 | 0, // GPR32:subo32 |
| 114282 | 0, // GPR32:subo64 |
| 114283 | 0, // GPR32:x8sub_0 |
| 114284 | 0, // GPR32:x8sub_1 |
| 114285 | 0, // GPR32:x8sub_2 |
| 114286 | 0, // GPR32:x8sub_3 |
| 114287 | 0, // GPR32:x8sub_4 |
| 114288 | 0, // GPR32:x8sub_5 |
| 114289 | 0, // GPR32:x8sub_6 |
| 114290 | 0, // GPR32:x8sub_7 |
| 114291 | 0, // GPR32:zasubb |
| 114292 | 0, // GPR32:zasubd0 |
| 114293 | 0, // GPR32:zasubd1 |
| 114294 | 0, // GPR32:zasubh0 |
| 114295 | 0, // GPR32:zasubh1 |
| 114296 | 0, // GPR32:zasubq0 |
| 114297 | 0, // GPR32:zasubq1 |
| 114298 | 0, // GPR32:zasubs0 |
| 114299 | 0, // GPR32:zasubs1 |
| 114300 | 0, // GPR32:zsub |
| 114301 | 0, // GPR32:zsub0 |
| 114302 | 0, // GPR32:zsub1 |
| 114303 | 0, // GPR32:zsub2 |
| 114304 | 0, // GPR32:zsub3 |
| 114305 | 0, // GPR32:zsub_hi |
| 114306 | 0, // GPR32:zasubd1_then_zasubq0 |
| 114307 | 0, // GPR32:zasubd1_then_zasubq1 |
| 114308 | 0, // GPR32:zasubs1_then_zasubd0 |
| 114309 | 0, // GPR32:zasubs1_then_zasubd1 |
| 114310 | 0, // GPR32:zasubs1_then_zasubq0 |
| 114311 | 0, // GPR32:zasubs1_then_zasubq1 |
| 114312 | 0, // GPR32:zasubs1_then_zasubd1_then_zasubq0 |
| 114313 | 0, // GPR32:zasubs1_then_zasubd1_then_zasubq1 |
| 114314 | 0, // GPR32:zasubh1_then_zasubd0 |
| 114315 | 0, // GPR32:zasubh1_then_zasubd1 |
| 114316 | 0, // GPR32:zasubh1_then_zasubq0 |
| 114317 | 0, // GPR32:zasubh1_then_zasubq1 |
| 114318 | 0, // GPR32:zasubh1_then_zasubs0 |
| 114319 | 0, // GPR32:zasubh1_then_zasubs1 |
| 114320 | 0, // GPR32:zasubh1_then_zasubd1_then_zasubq0 |
| 114321 | 0, // GPR32:zasubh1_then_zasubd1_then_zasubq1 |
| 114322 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubd0 |
| 114323 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1 |
| 114324 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubq0 |
| 114325 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubq1 |
| 114326 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114327 | 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114328 | 0, // GPR32:dsub1_then_bsub |
| 114329 | 0, // GPR32:dsub1_then_bsub_hi |
| 114330 | 0, // GPR32:dsub1_then_hsub |
| 114331 | 0, // GPR32:dsub1_then_hsub_hi |
| 114332 | 0, // GPR32:dsub1_then_ssub |
| 114333 | 0, // GPR32:dsub1_then_ssub_hi |
| 114334 | 0, // GPR32:dsub3_then_bsub |
| 114335 | 0, // GPR32:dsub3_then_bsub_hi |
| 114336 | 0, // GPR32:dsub3_then_hsub |
| 114337 | 0, // GPR32:dsub3_then_hsub_hi |
| 114338 | 0, // GPR32:dsub3_then_ssub |
| 114339 | 0, // GPR32:dsub3_then_ssub_hi |
| 114340 | 0, // GPR32:dsub2_then_bsub |
| 114341 | 0, // GPR32:dsub2_then_bsub_hi |
| 114342 | 0, // GPR32:dsub2_then_hsub |
| 114343 | 0, // GPR32:dsub2_then_hsub_hi |
| 114344 | 0, // GPR32:dsub2_then_ssub |
| 114345 | 0, // GPR32:dsub2_then_ssub_hi |
| 114346 | 0, // GPR32:psub1_then_psub |
| 114347 | 0, // GPR32:qsub1_then_dsub_hi |
| 114348 | 0, // GPR32:qsub3_then_dsub_hi |
| 114349 | 0, // GPR32:qsub2_then_dsub_hi |
| 114350 | 0, // GPR32:x8sub_7_then_sub_32 |
| 114351 | 0, // GPR32:x8sub_7_then_sub_32_hi |
| 114352 | 0, // GPR32:x8sub_6_then_sub_32 |
| 114353 | 0, // GPR32:x8sub_6_then_sub_32_hi |
| 114354 | 0, // GPR32:x8sub_5_then_sub_32 |
| 114355 | 0, // GPR32:x8sub_5_then_sub_32_hi |
| 114356 | 0, // GPR32:x8sub_4_then_sub_32 |
| 114357 | 0, // GPR32:x8sub_4_then_sub_32_hi |
| 114358 | 0, // GPR32:x8sub_3_then_sub_32 |
| 114359 | 0, // GPR32:x8sub_3_then_sub_32_hi |
| 114360 | 0, // GPR32:x8sub_2_then_sub_32 |
| 114361 | 0, // GPR32:x8sub_2_then_sub_32_hi |
| 114362 | 0, // GPR32:x8sub_1_then_sub_32 |
| 114363 | 0, // GPR32:x8sub_1_then_sub_32_hi |
| 114364 | 0, // GPR32:subo64_then_sub_32 |
| 114365 | 0, // GPR32:subo64_then_sub_32_hi |
| 114366 | 0, // GPR32:zsub1_then_zsub_hi |
| 114367 | 0, // GPR32:zsub3_then_zsub_hi |
| 114368 | 0, // GPR32:zsub2_then_zsub_hi |
| 114369 | 0, // GPR32:dsub0_dsub1 |
| 114370 | 0, // GPR32:dsub0_dsub1_dsub2 |
| 114371 | 0, // GPR32:dsub1_dsub2 |
| 114372 | 0, // GPR32:dsub1_dsub2_dsub3 |
| 114373 | 0, // GPR32:dsub2_dsub3 |
| 114374 | 0, // GPR32:dsub_dsub1 |
| 114375 | 0, // GPR32:dsub_dsub1_dsub2_dsub3 |
| 114376 | 0, // GPR32:dsub_dsub1_dsub2 |
| 114377 | 0, // GPR32:qsub0_qsub1 |
| 114378 | 0, // GPR32:qsub0_qsub1_qsub2 |
| 114379 | 0, // GPR32:qsub1_qsub2 |
| 114380 | 0, // GPR32:qsub1_qsub2_qsub3 |
| 114381 | 0, // GPR32:qsub2_qsub3 |
| 114382 | 0, // GPR32:sub_32_x8sub_1_then_sub_32 |
| 114383 | 0, // GPR32:x8sub_0_x8sub_1 |
| 114384 | 0, // GPR32:x8sub_2_x8sub_3 |
| 114385 | 0, // GPR32:x8sub_4_x8sub_5 |
| 114386 | 0, // GPR32:x8sub_6_x8sub_7 |
| 114387 | 0, // GPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114388 | 0, // GPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114389 | 0, // GPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114390 | 0, // GPR32:sub_32_subo64_then_sub_32 |
| 114391 | 0, // GPR32:zsub_qsub1 |
| 114392 | 0, // GPR32:zsub_qsub1_qsub2_qsub3 |
| 114393 | 0, // GPR32:zsub_qsub1_qsub2 |
| 114394 | 0, // GPR32:zsub0_zsub1 |
| 114395 | 0, // GPR32:zsub0_zsub1_zsub2 |
| 114396 | 0, // GPR32:zsub1_zsub2 |
| 114397 | 0, // GPR32:zsub1_zsub2_zsub3 |
| 114398 | 0, // GPR32:zsub2_zsub3 |
| 114399 | 0, // GPR32:zsub0_zsub2 |
| 114400 | 0, // GPR32:zsub1_zsub3 |
| 114401 | }, |
| 114402 | { // GPR32sp |
| 114403 | 0, // GPR32sp:bsub |
| 114404 | 0, // GPR32sp:bsub_hi |
| 114405 | 0, // GPR32sp:dsub |
| 114406 | 0, // GPR32sp:dsub0 |
| 114407 | 0, // GPR32sp:dsub1 |
| 114408 | 0, // GPR32sp:dsub2 |
| 114409 | 0, // GPR32sp:dsub3 |
| 114410 | 0, // GPR32sp:dsub_hi |
| 114411 | 0, // GPR32sp:hsub |
| 114412 | 0, // GPR32sp:hsub_hi |
| 114413 | 0, // GPR32sp:psub |
| 114414 | 0, // GPR32sp:psub0 |
| 114415 | 0, // GPR32sp:psub1 |
| 114416 | 0, // GPR32sp:qsub0 |
| 114417 | 0, // GPR32sp:qsub1 |
| 114418 | 0, // GPR32sp:qsub2 |
| 114419 | 0, // GPR32sp:qsub3 |
| 114420 | 0, // GPR32sp:ssub |
| 114421 | 0, // GPR32sp:ssub_hi |
| 114422 | 0, // GPR32sp:sub_32 |
| 114423 | 0, // GPR32sp:sub_32_hi |
| 114424 | 0, // GPR32sp:sube32 |
| 114425 | 0, // GPR32sp:sube64 |
| 114426 | 0, // GPR32sp:subo32 |
| 114427 | 0, // GPR32sp:subo64 |
| 114428 | 0, // GPR32sp:x8sub_0 |
| 114429 | 0, // GPR32sp:x8sub_1 |
| 114430 | 0, // GPR32sp:x8sub_2 |
| 114431 | 0, // GPR32sp:x8sub_3 |
| 114432 | 0, // GPR32sp:x8sub_4 |
| 114433 | 0, // GPR32sp:x8sub_5 |
| 114434 | 0, // GPR32sp:x8sub_6 |
| 114435 | 0, // GPR32sp:x8sub_7 |
| 114436 | 0, // GPR32sp:zasubb |
| 114437 | 0, // GPR32sp:zasubd0 |
| 114438 | 0, // GPR32sp:zasubd1 |
| 114439 | 0, // GPR32sp:zasubh0 |
| 114440 | 0, // GPR32sp:zasubh1 |
| 114441 | 0, // GPR32sp:zasubq0 |
| 114442 | 0, // GPR32sp:zasubq1 |
| 114443 | 0, // GPR32sp:zasubs0 |
| 114444 | 0, // GPR32sp:zasubs1 |
| 114445 | 0, // GPR32sp:zsub |
| 114446 | 0, // GPR32sp:zsub0 |
| 114447 | 0, // GPR32sp:zsub1 |
| 114448 | 0, // GPR32sp:zsub2 |
| 114449 | 0, // GPR32sp:zsub3 |
| 114450 | 0, // GPR32sp:zsub_hi |
| 114451 | 0, // GPR32sp:zasubd1_then_zasubq0 |
| 114452 | 0, // GPR32sp:zasubd1_then_zasubq1 |
| 114453 | 0, // GPR32sp:zasubs1_then_zasubd0 |
| 114454 | 0, // GPR32sp:zasubs1_then_zasubd1 |
| 114455 | 0, // GPR32sp:zasubs1_then_zasubq0 |
| 114456 | 0, // GPR32sp:zasubs1_then_zasubq1 |
| 114457 | 0, // GPR32sp:zasubs1_then_zasubd1_then_zasubq0 |
| 114458 | 0, // GPR32sp:zasubs1_then_zasubd1_then_zasubq1 |
| 114459 | 0, // GPR32sp:zasubh1_then_zasubd0 |
| 114460 | 0, // GPR32sp:zasubh1_then_zasubd1 |
| 114461 | 0, // GPR32sp:zasubh1_then_zasubq0 |
| 114462 | 0, // GPR32sp:zasubh1_then_zasubq1 |
| 114463 | 0, // GPR32sp:zasubh1_then_zasubs0 |
| 114464 | 0, // GPR32sp:zasubh1_then_zasubs1 |
| 114465 | 0, // GPR32sp:zasubh1_then_zasubd1_then_zasubq0 |
| 114466 | 0, // GPR32sp:zasubh1_then_zasubd1_then_zasubq1 |
| 114467 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd0 |
| 114468 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1 |
| 114469 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubq0 |
| 114470 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubq1 |
| 114471 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114472 | 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114473 | 0, // GPR32sp:dsub1_then_bsub |
| 114474 | 0, // GPR32sp:dsub1_then_bsub_hi |
| 114475 | 0, // GPR32sp:dsub1_then_hsub |
| 114476 | 0, // GPR32sp:dsub1_then_hsub_hi |
| 114477 | 0, // GPR32sp:dsub1_then_ssub |
| 114478 | 0, // GPR32sp:dsub1_then_ssub_hi |
| 114479 | 0, // GPR32sp:dsub3_then_bsub |
| 114480 | 0, // GPR32sp:dsub3_then_bsub_hi |
| 114481 | 0, // GPR32sp:dsub3_then_hsub |
| 114482 | 0, // GPR32sp:dsub3_then_hsub_hi |
| 114483 | 0, // GPR32sp:dsub3_then_ssub |
| 114484 | 0, // GPR32sp:dsub3_then_ssub_hi |
| 114485 | 0, // GPR32sp:dsub2_then_bsub |
| 114486 | 0, // GPR32sp:dsub2_then_bsub_hi |
| 114487 | 0, // GPR32sp:dsub2_then_hsub |
| 114488 | 0, // GPR32sp:dsub2_then_hsub_hi |
| 114489 | 0, // GPR32sp:dsub2_then_ssub |
| 114490 | 0, // GPR32sp:dsub2_then_ssub_hi |
| 114491 | 0, // GPR32sp:psub1_then_psub |
| 114492 | 0, // GPR32sp:qsub1_then_dsub_hi |
| 114493 | 0, // GPR32sp:qsub3_then_dsub_hi |
| 114494 | 0, // GPR32sp:qsub2_then_dsub_hi |
| 114495 | 0, // GPR32sp:x8sub_7_then_sub_32 |
| 114496 | 0, // GPR32sp:x8sub_7_then_sub_32_hi |
| 114497 | 0, // GPR32sp:x8sub_6_then_sub_32 |
| 114498 | 0, // GPR32sp:x8sub_6_then_sub_32_hi |
| 114499 | 0, // GPR32sp:x8sub_5_then_sub_32 |
| 114500 | 0, // GPR32sp:x8sub_5_then_sub_32_hi |
| 114501 | 0, // GPR32sp:x8sub_4_then_sub_32 |
| 114502 | 0, // GPR32sp:x8sub_4_then_sub_32_hi |
| 114503 | 0, // GPR32sp:x8sub_3_then_sub_32 |
| 114504 | 0, // GPR32sp:x8sub_3_then_sub_32_hi |
| 114505 | 0, // GPR32sp:x8sub_2_then_sub_32 |
| 114506 | 0, // GPR32sp:x8sub_2_then_sub_32_hi |
| 114507 | 0, // GPR32sp:x8sub_1_then_sub_32 |
| 114508 | 0, // GPR32sp:x8sub_1_then_sub_32_hi |
| 114509 | 0, // GPR32sp:subo64_then_sub_32 |
| 114510 | 0, // GPR32sp:subo64_then_sub_32_hi |
| 114511 | 0, // GPR32sp:zsub1_then_zsub_hi |
| 114512 | 0, // GPR32sp:zsub3_then_zsub_hi |
| 114513 | 0, // GPR32sp:zsub2_then_zsub_hi |
| 114514 | 0, // GPR32sp:dsub0_dsub1 |
| 114515 | 0, // GPR32sp:dsub0_dsub1_dsub2 |
| 114516 | 0, // GPR32sp:dsub1_dsub2 |
| 114517 | 0, // GPR32sp:dsub1_dsub2_dsub3 |
| 114518 | 0, // GPR32sp:dsub2_dsub3 |
| 114519 | 0, // GPR32sp:dsub_dsub1 |
| 114520 | 0, // GPR32sp:dsub_dsub1_dsub2_dsub3 |
| 114521 | 0, // GPR32sp:dsub_dsub1_dsub2 |
| 114522 | 0, // GPR32sp:qsub0_qsub1 |
| 114523 | 0, // GPR32sp:qsub0_qsub1_qsub2 |
| 114524 | 0, // GPR32sp:qsub1_qsub2 |
| 114525 | 0, // GPR32sp:qsub1_qsub2_qsub3 |
| 114526 | 0, // GPR32sp:qsub2_qsub3 |
| 114527 | 0, // GPR32sp:sub_32_x8sub_1_then_sub_32 |
| 114528 | 0, // GPR32sp:x8sub_0_x8sub_1 |
| 114529 | 0, // GPR32sp:x8sub_2_x8sub_3 |
| 114530 | 0, // GPR32sp:x8sub_4_x8sub_5 |
| 114531 | 0, // GPR32sp:x8sub_6_x8sub_7 |
| 114532 | 0, // GPR32sp:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114533 | 0, // GPR32sp:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114534 | 0, // GPR32sp:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114535 | 0, // GPR32sp:sub_32_subo64_then_sub_32 |
| 114536 | 0, // GPR32sp:zsub_qsub1 |
| 114537 | 0, // GPR32sp:zsub_qsub1_qsub2_qsub3 |
| 114538 | 0, // GPR32sp:zsub_qsub1_qsub2 |
| 114539 | 0, // GPR32sp:zsub0_zsub1 |
| 114540 | 0, // GPR32sp:zsub0_zsub1_zsub2 |
| 114541 | 0, // GPR32sp:zsub1_zsub2 |
| 114542 | 0, // GPR32sp:zsub1_zsub2_zsub3 |
| 114543 | 0, // GPR32sp:zsub2_zsub3 |
| 114544 | 0, // GPR32sp:zsub0_zsub2 |
| 114545 | 0, // GPR32sp:zsub1_zsub3 |
| 114546 | }, |
| 114547 | { // GPR32common |
| 114548 | 0, // GPR32common:bsub |
| 114549 | 0, // GPR32common:bsub_hi |
| 114550 | 0, // GPR32common:dsub |
| 114551 | 0, // GPR32common:dsub0 |
| 114552 | 0, // GPR32common:dsub1 |
| 114553 | 0, // GPR32common:dsub2 |
| 114554 | 0, // GPR32common:dsub3 |
| 114555 | 0, // GPR32common:dsub_hi |
| 114556 | 0, // GPR32common:hsub |
| 114557 | 0, // GPR32common:hsub_hi |
| 114558 | 0, // GPR32common:psub |
| 114559 | 0, // GPR32common:psub0 |
| 114560 | 0, // GPR32common:psub1 |
| 114561 | 0, // GPR32common:qsub0 |
| 114562 | 0, // GPR32common:qsub1 |
| 114563 | 0, // GPR32common:qsub2 |
| 114564 | 0, // GPR32common:qsub3 |
| 114565 | 0, // GPR32common:ssub |
| 114566 | 0, // GPR32common:ssub_hi |
| 114567 | 0, // GPR32common:sub_32 |
| 114568 | 0, // GPR32common:sub_32_hi |
| 114569 | 0, // GPR32common:sube32 |
| 114570 | 0, // GPR32common:sube64 |
| 114571 | 0, // GPR32common:subo32 |
| 114572 | 0, // GPR32common:subo64 |
| 114573 | 0, // GPR32common:x8sub_0 |
| 114574 | 0, // GPR32common:x8sub_1 |
| 114575 | 0, // GPR32common:x8sub_2 |
| 114576 | 0, // GPR32common:x8sub_3 |
| 114577 | 0, // GPR32common:x8sub_4 |
| 114578 | 0, // GPR32common:x8sub_5 |
| 114579 | 0, // GPR32common:x8sub_6 |
| 114580 | 0, // GPR32common:x8sub_7 |
| 114581 | 0, // GPR32common:zasubb |
| 114582 | 0, // GPR32common:zasubd0 |
| 114583 | 0, // GPR32common:zasubd1 |
| 114584 | 0, // GPR32common:zasubh0 |
| 114585 | 0, // GPR32common:zasubh1 |
| 114586 | 0, // GPR32common:zasubq0 |
| 114587 | 0, // GPR32common:zasubq1 |
| 114588 | 0, // GPR32common:zasubs0 |
| 114589 | 0, // GPR32common:zasubs1 |
| 114590 | 0, // GPR32common:zsub |
| 114591 | 0, // GPR32common:zsub0 |
| 114592 | 0, // GPR32common:zsub1 |
| 114593 | 0, // GPR32common:zsub2 |
| 114594 | 0, // GPR32common:zsub3 |
| 114595 | 0, // GPR32common:zsub_hi |
| 114596 | 0, // GPR32common:zasubd1_then_zasubq0 |
| 114597 | 0, // GPR32common:zasubd1_then_zasubq1 |
| 114598 | 0, // GPR32common:zasubs1_then_zasubd0 |
| 114599 | 0, // GPR32common:zasubs1_then_zasubd1 |
| 114600 | 0, // GPR32common:zasubs1_then_zasubq0 |
| 114601 | 0, // GPR32common:zasubs1_then_zasubq1 |
| 114602 | 0, // GPR32common:zasubs1_then_zasubd1_then_zasubq0 |
| 114603 | 0, // GPR32common:zasubs1_then_zasubd1_then_zasubq1 |
| 114604 | 0, // GPR32common:zasubh1_then_zasubd0 |
| 114605 | 0, // GPR32common:zasubh1_then_zasubd1 |
| 114606 | 0, // GPR32common:zasubh1_then_zasubq0 |
| 114607 | 0, // GPR32common:zasubh1_then_zasubq1 |
| 114608 | 0, // GPR32common:zasubh1_then_zasubs0 |
| 114609 | 0, // GPR32common:zasubh1_then_zasubs1 |
| 114610 | 0, // GPR32common:zasubh1_then_zasubd1_then_zasubq0 |
| 114611 | 0, // GPR32common:zasubh1_then_zasubd1_then_zasubq1 |
| 114612 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd0 |
| 114613 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1 |
| 114614 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubq0 |
| 114615 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubq1 |
| 114616 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114617 | 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114618 | 0, // GPR32common:dsub1_then_bsub |
| 114619 | 0, // GPR32common:dsub1_then_bsub_hi |
| 114620 | 0, // GPR32common:dsub1_then_hsub |
| 114621 | 0, // GPR32common:dsub1_then_hsub_hi |
| 114622 | 0, // GPR32common:dsub1_then_ssub |
| 114623 | 0, // GPR32common:dsub1_then_ssub_hi |
| 114624 | 0, // GPR32common:dsub3_then_bsub |
| 114625 | 0, // GPR32common:dsub3_then_bsub_hi |
| 114626 | 0, // GPR32common:dsub3_then_hsub |
| 114627 | 0, // GPR32common:dsub3_then_hsub_hi |
| 114628 | 0, // GPR32common:dsub3_then_ssub |
| 114629 | 0, // GPR32common:dsub3_then_ssub_hi |
| 114630 | 0, // GPR32common:dsub2_then_bsub |
| 114631 | 0, // GPR32common:dsub2_then_bsub_hi |
| 114632 | 0, // GPR32common:dsub2_then_hsub |
| 114633 | 0, // GPR32common:dsub2_then_hsub_hi |
| 114634 | 0, // GPR32common:dsub2_then_ssub |
| 114635 | 0, // GPR32common:dsub2_then_ssub_hi |
| 114636 | 0, // GPR32common:psub1_then_psub |
| 114637 | 0, // GPR32common:qsub1_then_dsub_hi |
| 114638 | 0, // GPR32common:qsub3_then_dsub_hi |
| 114639 | 0, // GPR32common:qsub2_then_dsub_hi |
| 114640 | 0, // GPR32common:x8sub_7_then_sub_32 |
| 114641 | 0, // GPR32common:x8sub_7_then_sub_32_hi |
| 114642 | 0, // GPR32common:x8sub_6_then_sub_32 |
| 114643 | 0, // GPR32common:x8sub_6_then_sub_32_hi |
| 114644 | 0, // GPR32common:x8sub_5_then_sub_32 |
| 114645 | 0, // GPR32common:x8sub_5_then_sub_32_hi |
| 114646 | 0, // GPR32common:x8sub_4_then_sub_32 |
| 114647 | 0, // GPR32common:x8sub_4_then_sub_32_hi |
| 114648 | 0, // GPR32common:x8sub_3_then_sub_32 |
| 114649 | 0, // GPR32common:x8sub_3_then_sub_32_hi |
| 114650 | 0, // GPR32common:x8sub_2_then_sub_32 |
| 114651 | 0, // GPR32common:x8sub_2_then_sub_32_hi |
| 114652 | 0, // GPR32common:x8sub_1_then_sub_32 |
| 114653 | 0, // GPR32common:x8sub_1_then_sub_32_hi |
| 114654 | 0, // GPR32common:subo64_then_sub_32 |
| 114655 | 0, // GPR32common:subo64_then_sub_32_hi |
| 114656 | 0, // GPR32common:zsub1_then_zsub_hi |
| 114657 | 0, // GPR32common:zsub3_then_zsub_hi |
| 114658 | 0, // GPR32common:zsub2_then_zsub_hi |
| 114659 | 0, // GPR32common:dsub0_dsub1 |
| 114660 | 0, // GPR32common:dsub0_dsub1_dsub2 |
| 114661 | 0, // GPR32common:dsub1_dsub2 |
| 114662 | 0, // GPR32common:dsub1_dsub2_dsub3 |
| 114663 | 0, // GPR32common:dsub2_dsub3 |
| 114664 | 0, // GPR32common:dsub_dsub1 |
| 114665 | 0, // GPR32common:dsub_dsub1_dsub2_dsub3 |
| 114666 | 0, // GPR32common:dsub_dsub1_dsub2 |
| 114667 | 0, // GPR32common:qsub0_qsub1 |
| 114668 | 0, // GPR32common:qsub0_qsub1_qsub2 |
| 114669 | 0, // GPR32common:qsub1_qsub2 |
| 114670 | 0, // GPR32common:qsub1_qsub2_qsub3 |
| 114671 | 0, // GPR32common:qsub2_qsub3 |
| 114672 | 0, // GPR32common:sub_32_x8sub_1_then_sub_32 |
| 114673 | 0, // GPR32common:x8sub_0_x8sub_1 |
| 114674 | 0, // GPR32common:x8sub_2_x8sub_3 |
| 114675 | 0, // GPR32common:x8sub_4_x8sub_5 |
| 114676 | 0, // GPR32common:x8sub_6_x8sub_7 |
| 114677 | 0, // GPR32common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114678 | 0, // GPR32common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114679 | 0, // GPR32common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114680 | 0, // GPR32common:sub_32_subo64_then_sub_32 |
| 114681 | 0, // GPR32common:zsub_qsub1 |
| 114682 | 0, // GPR32common:zsub_qsub1_qsub2_qsub3 |
| 114683 | 0, // GPR32common:zsub_qsub1_qsub2 |
| 114684 | 0, // GPR32common:zsub0_zsub1 |
| 114685 | 0, // GPR32common:zsub0_zsub1_zsub2 |
| 114686 | 0, // GPR32common:zsub1_zsub2 |
| 114687 | 0, // GPR32common:zsub1_zsub2_zsub3 |
| 114688 | 0, // GPR32common:zsub2_zsub3 |
| 114689 | 0, // GPR32common:zsub0_zsub2 |
| 114690 | 0, // GPR32common:zsub1_zsub3 |
| 114691 | }, |
| 114692 | { // FPR32_with_hsub_in_FPR16_lo |
| 114693 | 7, // FPR32_with_hsub_in_FPR16_lo:bsub -> FPR8 |
| 114694 | 0, // FPR32_with_hsub_in_FPR16_lo:bsub_hi |
| 114695 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub |
| 114696 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub0 |
| 114697 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1 |
| 114698 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2 |
| 114699 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3 |
| 114700 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub_hi |
| 114701 | 10, // FPR32_with_hsub_in_FPR16_lo:hsub -> FPR16_lo |
| 114702 | 0, // FPR32_with_hsub_in_FPR16_lo:hsub_hi |
| 114703 | 0, // FPR32_with_hsub_in_FPR16_lo:psub |
| 114704 | 0, // FPR32_with_hsub_in_FPR16_lo:psub0 |
| 114705 | 0, // FPR32_with_hsub_in_FPR16_lo:psub1 |
| 114706 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub0 |
| 114707 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub1 |
| 114708 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub2 |
| 114709 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub3 |
| 114710 | 0, // FPR32_with_hsub_in_FPR16_lo:ssub |
| 114711 | 0, // FPR32_with_hsub_in_FPR16_lo:ssub_hi |
| 114712 | 0, // FPR32_with_hsub_in_FPR16_lo:sub_32 |
| 114713 | 0, // FPR32_with_hsub_in_FPR16_lo:sub_32_hi |
| 114714 | 0, // FPR32_with_hsub_in_FPR16_lo:sube32 |
| 114715 | 0, // FPR32_with_hsub_in_FPR16_lo:sube64 |
| 114716 | 0, // FPR32_with_hsub_in_FPR16_lo:subo32 |
| 114717 | 0, // FPR32_with_hsub_in_FPR16_lo:subo64 |
| 114718 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_0 |
| 114719 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_1 |
| 114720 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2 |
| 114721 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_3 |
| 114722 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4 |
| 114723 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_5 |
| 114724 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6 |
| 114725 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_7 |
| 114726 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubb |
| 114727 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubd0 |
| 114728 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1 |
| 114729 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh0 |
| 114730 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1 |
| 114731 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubq0 |
| 114732 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubq1 |
| 114733 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs0 |
| 114734 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1 |
| 114735 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub |
| 114736 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub0 |
| 114737 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub1 |
| 114738 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub2 |
| 114739 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub3 |
| 114740 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub_hi |
| 114741 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1_then_zasubq0 |
| 114742 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1_then_zasubq1 |
| 114743 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd0 |
| 114744 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1 |
| 114745 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubq0 |
| 114746 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubq1 |
| 114747 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 114748 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 114749 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd0 |
| 114750 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1 |
| 114751 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubq0 |
| 114752 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubq1 |
| 114753 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs0 |
| 114754 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1 |
| 114755 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 114756 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 114757 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 114758 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 114759 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 114760 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 114761 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114762 | 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114763 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_bsub |
| 114764 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_bsub_hi |
| 114765 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_hsub |
| 114766 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_hsub_hi |
| 114767 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_ssub |
| 114768 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_ssub_hi |
| 114769 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_bsub |
| 114770 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_bsub_hi |
| 114771 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_hsub |
| 114772 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_hsub_hi |
| 114773 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_ssub |
| 114774 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_ssub_hi |
| 114775 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_bsub |
| 114776 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_bsub_hi |
| 114777 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_hsub |
| 114778 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_hsub_hi |
| 114779 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_ssub |
| 114780 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_ssub_hi |
| 114781 | 0, // FPR32_with_hsub_in_FPR16_lo:psub1_then_psub |
| 114782 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_dsub_hi |
| 114783 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub3_then_dsub_hi |
| 114784 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_dsub_hi |
| 114785 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_7_then_sub_32 |
| 114786 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_7_then_sub_32_hi |
| 114787 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_then_sub_32 |
| 114788 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_then_sub_32_hi |
| 114789 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_5_then_sub_32 |
| 114790 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_5_then_sub_32_hi |
| 114791 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_then_sub_32 |
| 114792 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_then_sub_32_hi |
| 114793 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_3_then_sub_32 |
| 114794 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_3_then_sub_32_hi |
| 114795 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_then_sub_32 |
| 114796 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_then_sub_32_hi |
| 114797 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_1_then_sub_32 |
| 114798 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_1_then_sub_32_hi |
| 114799 | 0, // FPR32_with_hsub_in_FPR16_lo:subo64_then_sub_32 |
| 114800 | 0, // FPR32_with_hsub_in_FPR16_lo:subo64_then_sub_32_hi |
| 114801 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_zsub_hi |
| 114802 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_zsub_hi |
| 114803 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_zsub_hi |
| 114804 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub0_dsub1 |
| 114805 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub0_dsub1_dsub2 |
| 114806 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_dsub2 |
| 114807 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_dsub2_dsub3 |
| 114808 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_dsub3 |
| 114809 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub_dsub1 |
| 114810 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub_dsub1_dsub2_dsub3 |
| 114811 | 0, // FPR32_with_hsub_in_FPR16_lo:dsub_dsub1_dsub2 |
| 114812 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub0_qsub1 |
| 114813 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub0_qsub1_qsub2 |
| 114814 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_qsub2 |
| 114815 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_qsub2_qsub3 |
| 114816 | 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_qsub3 |
| 114817 | 0, // FPR32_with_hsub_in_FPR16_lo:sub_32_x8sub_1_then_sub_32 |
| 114818 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_0_x8sub_1 |
| 114819 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_x8sub_3 |
| 114820 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_x8sub_5 |
| 114821 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_x8sub_7 |
| 114822 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114823 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114824 | 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114825 | 0, // FPR32_with_hsub_in_FPR16_lo:sub_32_subo64_then_sub_32 |
| 114826 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub_qsub1 |
| 114827 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub_qsub1_qsub2_qsub3 |
| 114828 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub_qsub1_qsub2 |
| 114829 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub1 |
| 114830 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub1_zsub2 |
| 114831 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub2 |
| 114832 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub2_zsub3 |
| 114833 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_zsub3 |
| 114834 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub2 |
| 114835 | 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub3 |
| 114836 | }, |
| 114837 | { // GPR32arg |
| 114838 | 0, // GPR32arg:bsub |
| 114839 | 0, // GPR32arg:bsub_hi |
| 114840 | 0, // GPR32arg:dsub |
| 114841 | 0, // GPR32arg:dsub0 |
| 114842 | 0, // GPR32arg:dsub1 |
| 114843 | 0, // GPR32arg:dsub2 |
| 114844 | 0, // GPR32arg:dsub3 |
| 114845 | 0, // GPR32arg:dsub_hi |
| 114846 | 0, // GPR32arg:hsub |
| 114847 | 0, // GPR32arg:hsub_hi |
| 114848 | 0, // GPR32arg:psub |
| 114849 | 0, // GPR32arg:psub0 |
| 114850 | 0, // GPR32arg:psub1 |
| 114851 | 0, // GPR32arg:qsub0 |
| 114852 | 0, // GPR32arg:qsub1 |
| 114853 | 0, // GPR32arg:qsub2 |
| 114854 | 0, // GPR32arg:qsub3 |
| 114855 | 0, // GPR32arg:ssub |
| 114856 | 0, // GPR32arg:ssub_hi |
| 114857 | 0, // GPR32arg:sub_32 |
| 114858 | 0, // GPR32arg:sub_32_hi |
| 114859 | 0, // GPR32arg:sube32 |
| 114860 | 0, // GPR32arg:sube64 |
| 114861 | 0, // GPR32arg:subo32 |
| 114862 | 0, // GPR32arg:subo64 |
| 114863 | 0, // GPR32arg:x8sub_0 |
| 114864 | 0, // GPR32arg:x8sub_1 |
| 114865 | 0, // GPR32arg:x8sub_2 |
| 114866 | 0, // GPR32arg:x8sub_3 |
| 114867 | 0, // GPR32arg:x8sub_4 |
| 114868 | 0, // GPR32arg:x8sub_5 |
| 114869 | 0, // GPR32arg:x8sub_6 |
| 114870 | 0, // GPR32arg:x8sub_7 |
| 114871 | 0, // GPR32arg:zasubb |
| 114872 | 0, // GPR32arg:zasubd0 |
| 114873 | 0, // GPR32arg:zasubd1 |
| 114874 | 0, // GPR32arg:zasubh0 |
| 114875 | 0, // GPR32arg:zasubh1 |
| 114876 | 0, // GPR32arg:zasubq0 |
| 114877 | 0, // GPR32arg:zasubq1 |
| 114878 | 0, // GPR32arg:zasubs0 |
| 114879 | 0, // GPR32arg:zasubs1 |
| 114880 | 0, // GPR32arg:zsub |
| 114881 | 0, // GPR32arg:zsub0 |
| 114882 | 0, // GPR32arg:zsub1 |
| 114883 | 0, // GPR32arg:zsub2 |
| 114884 | 0, // GPR32arg:zsub3 |
| 114885 | 0, // GPR32arg:zsub_hi |
| 114886 | 0, // GPR32arg:zasubd1_then_zasubq0 |
| 114887 | 0, // GPR32arg:zasubd1_then_zasubq1 |
| 114888 | 0, // GPR32arg:zasubs1_then_zasubd0 |
| 114889 | 0, // GPR32arg:zasubs1_then_zasubd1 |
| 114890 | 0, // GPR32arg:zasubs1_then_zasubq0 |
| 114891 | 0, // GPR32arg:zasubs1_then_zasubq1 |
| 114892 | 0, // GPR32arg:zasubs1_then_zasubd1_then_zasubq0 |
| 114893 | 0, // GPR32arg:zasubs1_then_zasubd1_then_zasubq1 |
| 114894 | 0, // GPR32arg:zasubh1_then_zasubd0 |
| 114895 | 0, // GPR32arg:zasubh1_then_zasubd1 |
| 114896 | 0, // GPR32arg:zasubh1_then_zasubq0 |
| 114897 | 0, // GPR32arg:zasubh1_then_zasubq1 |
| 114898 | 0, // GPR32arg:zasubh1_then_zasubs0 |
| 114899 | 0, // GPR32arg:zasubh1_then_zasubs1 |
| 114900 | 0, // GPR32arg:zasubh1_then_zasubd1_then_zasubq0 |
| 114901 | 0, // GPR32arg:zasubh1_then_zasubd1_then_zasubq1 |
| 114902 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd0 |
| 114903 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1 |
| 114904 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubq0 |
| 114905 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubq1 |
| 114906 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 114907 | 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 114908 | 0, // GPR32arg:dsub1_then_bsub |
| 114909 | 0, // GPR32arg:dsub1_then_bsub_hi |
| 114910 | 0, // GPR32arg:dsub1_then_hsub |
| 114911 | 0, // GPR32arg:dsub1_then_hsub_hi |
| 114912 | 0, // GPR32arg:dsub1_then_ssub |
| 114913 | 0, // GPR32arg:dsub1_then_ssub_hi |
| 114914 | 0, // GPR32arg:dsub3_then_bsub |
| 114915 | 0, // GPR32arg:dsub3_then_bsub_hi |
| 114916 | 0, // GPR32arg:dsub3_then_hsub |
| 114917 | 0, // GPR32arg:dsub3_then_hsub_hi |
| 114918 | 0, // GPR32arg:dsub3_then_ssub |
| 114919 | 0, // GPR32arg:dsub3_then_ssub_hi |
| 114920 | 0, // GPR32arg:dsub2_then_bsub |
| 114921 | 0, // GPR32arg:dsub2_then_bsub_hi |
| 114922 | 0, // GPR32arg:dsub2_then_hsub |
| 114923 | 0, // GPR32arg:dsub2_then_hsub_hi |
| 114924 | 0, // GPR32arg:dsub2_then_ssub |
| 114925 | 0, // GPR32arg:dsub2_then_ssub_hi |
| 114926 | 0, // GPR32arg:psub1_then_psub |
| 114927 | 0, // GPR32arg:qsub1_then_dsub_hi |
| 114928 | 0, // GPR32arg:qsub3_then_dsub_hi |
| 114929 | 0, // GPR32arg:qsub2_then_dsub_hi |
| 114930 | 0, // GPR32arg:x8sub_7_then_sub_32 |
| 114931 | 0, // GPR32arg:x8sub_7_then_sub_32_hi |
| 114932 | 0, // GPR32arg:x8sub_6_then_sub_32 |
| 114933 | 0, // GPR32arg:x8sub_6_then_sub_32_hi |
| 114934 | 0, // GPR32arg:x8sub_5_then_sub_32 |
| 114935 | 0, // GPR32arg:x8sub_5_then_sub_32_hi |
| 114936 | 0, // GPR32arg:x8sub_4_then_sub_32 |
| 114937 | 0, // GPR32arg:x8sub_4_then_sub_32_hi |
| 114938 | 0, // GPR32arg:x8sub_3_then_sub_32 |
| 114939 | 0, // GPR32arg:x8sub_3_then_sub_32_hi |
| 114940 | 0, // GPR32arg:x8sub_2_then_sub_32 |
| 114941 | 0, // GPR32arg:x8sub_2_then_sub_32_hi |
| 114942 | 0, // GPR32arg:x8sub_1_then_sub_32 |
| 114943 | 0, // GPR32arg:x8sub_1_then_sub_32_hi |
| 114944 | 0, // GPR32arg:subo64_then_sub_32 |
| 114945 | 0, // GPR32arg:subo64_then_sub_32_hi |
| 114946 | 0, // GPR32arg:zsub1_then_zsub_hi |
| 114947 | 0, // GPR32arg:zsub3_then_zsub_hi |
| 114948 | 0, // GPR32arg:zsub2_then_zsub_hi |
| 114949 | 0, // GPR32arg:dsub0_dsub1 |
| 114950 | 0, // GPR32arg:dsub0_dsub1_dsub2 |
| 114951 | 0, // GPR32arg:dsub1_dsub2 |
| 114952 | 0, // GPR32arg:dsub1_dsub2_dsub3 |
| 114953 | 0, // GPR32arg:dsub2_dsub3 |
| 114954 | 0, // GPR32arg:dsub_dsub1 |
| 114955 | 0, // GPR32arg:dsub_dsub1_dsub2_dsub3 |
| 114956 | 0, // GPR32arg:dsub_dsub1_dsub2 |
| 114957 | 0, // GPR32arg:qsub0_qsub1 |
| 114958 | 0, // GPR32arg:qsub0_qsub1_qsub2 |
| 114959 | 0, // GPR32arg:qsub1_qsub2 |
| 114960 | 0, // GPR32arg:qsub1_qsub2_qsub3 |
| 114961 | 0, // GPR32arg:qsub2_qsub3 |
| 114962 | 0, // GPR32arg:sub_32_x8sub_1_then_sub_32 |
| 114963 | 0, // GPR32arg:x8sub_0_x8sub_1 |
| 114964 | 0, // GPR32arg:x8sub_2_x8sub_3 |
| 114965 | 0, // GPR32arg:x8sub_4_x8sub_5 |
| 114966 | 0, // GPR32arg:x8sub_6_x8sub_7 |
| 114967 | 0, // GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 114968 | 0, // GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 114969 | 0, // GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 114970 | 0, // GPR32arg:sub_32_subo64_then_sub_32 |
| 114971 | 0, // GPR32arg:zsub_qsub1 |
| 114972 | 0, // GPR32arg:zsub_qsub1_qsub2_qsub3 |
| 114973 | 0, // GPR32arg:zsub_qsub1_qsub2 |
| 114974 | 0, // GPR32arg:zsub0_zsub1 |
| 114975 | 0, // GPR32arg:zsub0_zsub1_zsub2 |
| 114976 | 0, // GPR32arg:zsub1_zsub2 |
| 114977 | 0, // GPR32arg:zsub1_zsub2_zsub3 |
| 114978 | 0, // GPR32arg:zsub2_zsub3 |
| 114979 | 0, // GPR32arg:zsub0_zsub2 |
| 114980 | 0, // GPR32arg:zsub1_zsub3 |
| 114981 | }, |
| 114982 | { // MatrixIndexGPR32_12_15 |
| 114983 | 0, // MatrixIndexGPR32_12_15:bsub |
| 114984 | 0, // MatrixIndexGPR32_12_15:bsub_hi |
| 114985 | 0, // MatrixIndexGPR32_12_15:dsub |
| 114986 | 0, // MatrixIndexGPR32_12_15:dsub0 |
| 114987 | 0, // MatrixIndexGPR32_12_15:dsub1 |
| 114988 | 0, // MatrixIndexGPR32_12_15:dsub2 |
| 114989 | 0, // MatrixIndexGPR32_12_15:dsub3 |
| 114990 | 0, // MatrixIndexGPR32_12_15:dsub_hi |
| 114991 | 0, // MatrixIndexGPR32_12_15:hsub |
| 114992 | 0, // MatrixIndexGPR32_12_15:hsub_hi |
| 114993 | 0, // MatrixIndexGPR32_12_15:psub |
| 114994 | 0, // MatrixIndexGPR32_12_15:psub0 |
| 114995 | 0, // MatrixIndexGPR32_12_15:psub1 |
| 114996 | 0, // MatrixIndexGPR32_12_15:qsub0 |
| 114997 | 0, // MatrixIndexGPR32_12_15:qsub1 |
| 114998 | 0, // MatrixIndexGPR32_12_15:qsub2 |
| 114999 | 0, // MatrixIndexGPR32_12_15:qsub3 |
| 115000 | 0, // MatrixIndexGPR32_12_15:ssub |
| 115001 | 0, // MatrixIndexGPR32_12_15:ssub_hi |
| 115002 | 0, // MatrixIndexGPR32_12_15:sub_32 |
| 115003 | 0, // MatrixIndexGPR32_12_15:sub_32_hi |
| 115004 | 0, // MatrixIndexGPR32_12_15:sube32 |
| 115005 | 0, // MatrixIndexGPR32_12_15:sube64 |
| 115006 | 0, // MatrixIndexGPR32_12_15:subo32 |
| 115007 | 0, // MatrixIndexGPR32_12_15:subo64 |
| 115008 | 0, // MatrixIndexGPR32_12_15:x8sub_0 |
| 115009 | 0, // MatrixIndexGPR32_12_15:x8sub_1 |
| 115010 | 0, // MatrixIndexGPR32_12_15:x8sub_2 |
| 115011 | 0, // MatrixIndexGPR32_12_15:x8sub_3 |
| 115012 | 0, // MatrixIndexGPR32_12_15:x8sub_4 |
| 115013 | 0, // MatrixIndexGPR32_12_15:x8sub_5 |
| 115014 | 0, // MatrixIndexGPR32_12_15:x8sub_6 |
| 115015 | 0, // MatrixIndexGPR32_12_15:x8sub_7 |
| 115016 | 0, // MatrixIndexGPR32_12_15:zasubb |
| 115017 | 0, // MatrixIndexGPR32_12_15:zasubd0 |
| 115018 | 0, // MatrixIndexGPR32_12_15:zasubd1 |
| 115019 | 0, // MatrixIndexGPR32_12_15:zasubh0 |
| 115020 | 0, // MatrixIndexGPR32_12_15:zasubh1 |
| 115021 | 0, // MatrixIndexGPR32_12_15:zasubq0 |
| 115022 | 0, // MatrixIndexGPR32_12_15:zasubq1 |
| 115023 | 0, // MatrixIndexGPR32_12_15:zasubs0 |
| 115024 | 0, // MatrixIndexGPR32_12_15:zasubs1 |
| 115025 | 0, // MatrixIndexGPR32_12_15:zsub |
| 115026 | 0, // MatrixIndexGPR32_12_15:zsub0 |
| 115027 | 0, // MatrixIndexGPR32_12_15:zsub1 |
| 115028 | 0, // MatrixIndexGPR32_12_15:zsub2 |
| 115029 | 0, // MatrixIndexGPR32_12_15:zsub3 |
| 115030 | 0, // MatrixIndexGPR32_12_15:zsub_hi |
| 115031 | 0, // MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 115032 | 0, // MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 115033 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 115034 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 115035 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 115036 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 115037 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 115038 | 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 115039 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 115040 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 115041 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 115042 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 115043 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 115044 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 115045 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 115046 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 115047 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 115048 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 115049 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 115050 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 115051 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115052 | 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115053 | 0, // MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 115054 | 0, // MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 115055 | 0, // MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 115056 | 0, // MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 115057 | 0, // MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 115058 | 0, // MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 115059 | 0, // MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 115060 | 0, // MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 115061 | 0, // MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 115062 | 0, // MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 115063 | 0, // MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 115064 | 0, // MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 115065 | 0, // MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 115066 | 0, // MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 115067 | 0, // MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 115068 | 0, // MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 115069 | 0, // MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 115070 | 0, // MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 115071 | 0, // MatrixIndexGPR32_12_15:psub1_then_psub |
| 115072 | 0, // MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 115073 | 0, // MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 115074 | 0, // MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 115075 | 0, // MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 |
| 115076 | 0, // MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 115077 | 0, // MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 |
| 115078 | 0, // MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 115079 | 0, // MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 |
| 115080 | 0, // MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 115081 | 0, // MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 |
| 115082 | 0, // MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 115083 | 0, // MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 |
| 115084 | 0, // MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 115085 | 0, // MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 |
| 115086 | 0, // MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 115087 | 0, // MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 |
| 115088 | 0, // MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 115089 | 0, // MatrixIndexGPR32_12_15:subo64_then_sub_32 |
| 115090 | 0, // MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 115091 | 0, // MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 115092 | 0, // MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 115093 | 0, // MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 115094 | 0, // MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 115095 | 0, // MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 115096 | 0, // MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 115097 | 0, // MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 115098 | 0, // MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 115099 | 0, // MatrixIndexGPR32_12_15:dsub_dsub1 |
| 115100 | 0, // MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 115101 | 0, // MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 115102 | 0, // MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 115103 | 0, // MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 115104 | 0, // MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 115105 | 0, // MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 115106 | 0, // MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 115107 | 0, // MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 |
| 115108 | 0, // MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 |
| 115109 | 0, // MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 |
| 115110 | 0, // MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 |
| 115111 | 0, // MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 |
| 115112 | 0, // MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115113 | 0, // MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115114 | 0, // MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115115 | 0, // MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 |
| 115116 | 0, // MatrixIndexGPR32_12_15:zsub_qsub1 |
| 115117 | 0, // MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 115118 | 0, // MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 115119 | 0, // MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 115120 | 0, // MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 115121 | 0, // MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 115122 | 0, // MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 115123 | 0, // MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 115124 | 0, // MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 115125 | 0, // MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 115126 | }, |
| 115127 | { // MatrixIndexGPR32_8_11 |
| 115128 | 0, // MatrixIndexGPR32_8_11:bsub |
| 115129 | 0, // MatrixIndexGPR32_8_11:bsub_hi |
| 115130 | 0, // MatrixIndexGPR32_8_11:dsub |
| 115131 | 0, // MatrixIndexGPR32_8_11:dsub0 |
| 115132 | 0, // MatrixIndexGPR32_8_11:dsub1 |
| 115133 | 0, // MatrixIndexGPR32_8_11:dsub2 |
| 115134 | 0, // MatrixIndexGPR32_8_11:dsub3 |
| 115135 | 0, // MatrixIndexGPR32_8_11:dsub_hi |
| 115136 | 0, // MatrixIndexGPR32_8_11:hsub |
| 115137 | 0, // MatrixIndexGPR32_8_11:hsub_hi |
| 115138 | 0, // MatrixIndexGPR32_8_11:psub |
| 115139 | 0, // MatrixIndexGPR32_8_11:psub0 |
| 115140 | 0, // MatrixIndexGPR32_8_11:psub1 |
| 115141 | 0, // MatrixIndexGPR32_8_11:qsub0 |
| 115142 | 0, // MatrixIndexGPR32_8_11:qsub1 |
| 115143 | 0, // MatrixIndexGPR32_8_11:qsub2 |
| 115144 | 0, // MatrixIndexGPR32_8_11:qsub3 |
| 115145 | 0, // MatrixIndexGPR32_8_11:ssub |
| 115146 | 0, // MatrixIndexGPR32_8_11:ssub_hi |
| 115147 | 0, // MatrixIndexGPR32_8_11:sub_32 |
| 115148 | 0, // MatrixIndexGPR32_8_11:sub_32_hi |
| 115149 | 0, // MatrixIndexGPR32_8_11:sube32 |
| 115150 | 0, // MatrixIndexGPR32_8_11:sube64 |
| 115151 | 0, // MatrixIndexGPR32_8_11:subo32 |
| 115152 | 0, // MatrixIndexGPR32_8_11:subo64 |
| 115153 | 0, // MatrixIndexGPR32_8_11:x8sub_0 |
| 115154 | 0, // MatrixIndexGPR32_8_11:x8sub_1 |
| 115155 | 0, // MatrixIndexGPR32_8_11:x8sub_2 |
| 115156 | 0, // MatrixIndexGPR32_8_11:x8sub_3 |
| 115157 | 0, // MatrixIndexGPR32_8_11:x8sub_4 |
| 115158 | 0, // MatrixIndexGPR32_8_11:x8sub_5 |
| 115159 | 0, // MatrixIndexGPR32_8_11:x8sub_6 |
| 115160 | 0, // MatrixIndexGPR32_8_11:x8sub_7 |
| 115161 | 0, // MatrixIndexGPR32_8_11:zasubb |
| 115162 | 0, // MatrixIndexGPR32_8_11:zasubd0 |
| 115163 | 0, // MatrixIndexGPR32_8_11:zasubd1 |
| 115164 | 0, // MatrixIndexGPR32_8_11:zasubh0 |
| 115165 | 0, // MatrixIndexGPR32_8_11:zasubh1 |
| 115166 | 0, // MatrixIndexGPR32_8_11:zasubq0 |
| 115167 | 0, // MatrixIndexGPR32_8_11:zasubq1 |
| 115168 | 0, // MatrixIndexGPR32_8_11:zasubs0 |
| 115169 | 0, // MatrixIndexGPR32_8_11:zasubs1 |
| 115170 | 0, // MatrixIndexGPR32_8_11:zsub |
| 115171 | 0, // MatrixIndexGPR32_8_11:zsub0 |
| 115172 | 0, // MatrixIndexGPR32_8_11:zsub1 |
| 115173 | 0, // MatrixIndexGPR32_8_11:zsub2 |
| 115174 | 0, // MatrixIndexGPR32_8_11:zsub3 |
| 115175 | 0, // MatrixIndexGPR32_8_11:zsub_hi |
| 115176 | 0, // MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 115177 | 0, // MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 115178 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 115179 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 115180 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 115181 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 115182 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 115183 | 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 115184 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 115185 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 115186 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 115187 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 115188 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 115189 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 115190 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 115191 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 115192 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 115193 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 115194 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 115195 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 115196 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115197 | 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115198 | 0, // MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 115199 | 0, // MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 115200 | 0, // MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 115201 | 0, // MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 115202 | 0, // MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 115203 | 0, // MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 115204 | 0, // MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 115205 | 0, // MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 115206 | 0, // MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 115207 | 0, // MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 115208 | 0, // MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 115209 | 0, // MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 115210 | 0, // MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 115211 | 0, // MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 115212 | 0, // MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 115213 | 0, // MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 115214 | 0, // MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 115215 | 0, // MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 115216 | 0, // MatrixIndexGPR32_8_11:psub1_then_psub |
| 115217 | 0, // MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 115218 | 0, // MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 115219 | 0, // MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 115220 | 0, // MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 |
| 115221 | 0, // MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 115222 | 0, // MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 |
| 115223 | 0, // MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 115224 | 0, // MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 |
| 115225 | 0, // MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 115226 | 0, // MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 |
| 115227 | 0, // MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 115228 | 0, // MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 |
| 115229 | 0, // MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 115230 | 0, // MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 |
| 115231 | 0, // MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 115232 | 0, // MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 |
| 115233 | 0, // MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 115234 | 0, // MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 115235 | 0, // MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 115236 | 0, // MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 115237 | 0, // MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 115238 | 0, // MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 115239 | 0, // MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 115240 | 0, // MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 115241 | 0, // MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 115242 | 0, // MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 115243 | 0, // MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 115244 | 0, // MatrixIndexGPR32_8_11:dsub_dsub1 |
| 115245 | 0, // MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 115246 | 0, // MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 115247 | 0, // MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 115248 | 0, // MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 115249 | 0, // MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 115250 | 0, // MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 115251 | 0, // MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 115252 | 0, // MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 |
| 115253 | 0, // MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 |
| 115254 | 0, // MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 |
| 115255 | 0, // MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 |
| 115256 | 0, // MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 |
| 115257 | 0, // MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115258 | 0, // MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115259 | 0, // MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115260 | 0, // MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 115261 | 0, // MatrixIndexGPR32_8_11:zsub_qsub1 |
| 115262 | 0, // MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 115263 | 0, // MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 115264 | 0, // MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 115265 | 0, // MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 115266 | 0, // MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 115267 | 0, // MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 115268 | 0, // MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 115269 | 0, // MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 115270 | 0, // MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 115271 | }, |
| 115272 | { // CCR |
| 115273 | 0, // CCR:bsub |
| 115274 | 0, // CCR:bsub_hi |
| 115275 | 0, // CCR:dsub |
| 115276 | 0, // CCR:dsub0 |
| 115277 | 0, // CCR:dsub1 |
| 115278 | 0, // CCR:dsub2 |
| 115279 | 0, // CCR:dsub3 |
| 115280 | 0, // CCR:dsub_hi |
| 115281 | 0, // CCR:hsub |
| 115282 | 0, // CCR:hsub_hi |
| 115283 | 0, // CCR:psub |
| 115284 | 0, // CCR:psub0 |
| 115285 | 0, // CCR:psub1 |
| 115286 | 0, // CCR:qsub0 |
| 115287 | 0, // CCR:qsub1 |
| 115288 | 0, // CCR:qsub2 |
| 115289 | 0, // CCR:qsub3 |
| 115290 | 0, // CCR:ssub |
| 115291 | 0, // CCR:ssub_hi |
| 115292 | 0, // CCR:sub_32 |
| 115293 | 0, // CCR:sub_32_hi |
| 115294 | 0, // CCR:sube32 |
| 115295 | 0, // CCR:sube64 |
| 115296 | 0, // CCR:subo32 |
| 115297 | 0, // CCR:subo64 |
| 115298 | 0, // CCR:x8sub_0 |
| 115299 | 0, // CCR:x8sub_1 |
| 115300 | 0, // CCR:x8sub_2 |
| 115301 | 0, // CCR:x8sub_3 |
| 115302 | 0, // CCR:x8sub_4 |
| 115303 | 0, // CCR:x8sub_5 |
| 115304 | 0, // CCR:x8sub_6 |
| 115305 | 0, // CCR:x8sub_7 |
| 115306 | 0, // CCR:zasubb |
| 115307 | 0, // CCR:zasubd0 |
| 115308 | 0, // CCR:zasubd1 |
| 115309 | 0, // CCR:zasubh0 |
| 115310 | 0, // CCR:zasubh1 |
| 115311 | 0, // CCR:zasubq0 |
| 115312 | 0, // CCR:zasubq1 |
| 115313 | 0, // CCR:zasubs0 |
| 115314 | 0, // CCR:zasubs1 |
| 115315 | 0, // CCR:zsub |
| 115316 | 0, // CCR:zsub0 |
| 115317 | 0, // CCR:zsub1 |
| 115318 | 0, // CCR:zsub2 |
| 115319 | 0, // CCR:zsub3 |
| 115320 | 0, // CCR:zsub_hi |
| 115321 | 0, // CCR:zasubd1_then_zasubq0 |
| 115322 | 0, // CCR:zasubd1_then_zasubq1 |
| 115323 | 0, // CCR:zasubs1_then_zasubd0 |
| 115324 | 0, // CCR:zasubs1_then_zasubd1 |
| 115325 | 0, // CCR:zasubs1_then_zasubq0 |
| 115326 | 0, // CCR:zasubs1_then_zasubq1 |
| 115327 | 0, // CCR:zasubs1_then_zasubd1_then_zasubq0 |
| 115328 | 0, // CCR:zasubs1_then_zasubd1_then_zasubq1 |
| 115329 | 0, // CCR:zasubh1_then_zasubd0 |
| 115330 | 0, // CCR:zasubh1_then_zasubd1 |
| 115331 | 0, // CCR:zasubh1_then_zasubq0 |
| 115332 | 0, // CCR:zasubh1_then_zasubq1 |
| 115333 | 0, // CCR:zasubh1_then_zasubs0 |
| 115334 | 0, // CCR:zasubh1_then_zasubs1 |
| 115335 | 0, // CCR:zasubh1_then_zasubd1_then_zasubq0 |
| 115336 | 0, // CCR:zasubh1_then_zasubd1_then_zasubq1 |
| 115337 | 0, // CCR:zasubh1_then_zasubs1_then_zasubd0 |
| 115338 | 0, // CCR:zasubh1_then_zasubs1_then_zasubd1 |
| 115339 | 0, // CCR:zasubh1_then_zasubs1_then_zasubq0 |
| 115340 | 0, // CCR:zasubh1_then_zasubs1_then_zasubq1 |
| 115341 | 0, // CCR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115342 | 0, // CCR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115343 | 0, // CCR:dsub1_then_bsub |
| 115344 | 0, // CCR:dsub1_then_bsub_hi |
| 115345 | 0, // CCR:dsub1_then_hsub |
| 115346 | 0, // CCR:dsub1_then_hsub_hi |
| 115347 | 0, // CCR:dsub1_then_ssub |
| 115348 | 0, // CCR:dsub1_then_ssub_hi |
| 115349 | 0, // CCR:dsub3_then_bsub |
| 115350 | 0, // CCR:dsub3_then_bsub_hi |
| 115351 | 0, // CCR:dsub3_then_hsub |
| 115352 | 0, // CCR:dsub3_then_hsub_hi |
| 115353 | 0, // CCR:dsub3_then_ssub |
| 115354 | 0, // CCR:dsub3_then_ssub_hi |
| 115355 | 0, // CCR:dsub2_then_bsub |
| 115356 | 0, // CCR:dsub2_then_bsub_hi |
| 115357 | 0, // CCR:dsub2_then_hsub |
| 115358 | 0, // CCR:dsub2_then_hsub_hi |
| 115359 | 0, // CCR:dsub2_then_ssub |
| 115360 | 0, // CCR:dsub2_then_ssub_hi |
| 115361 | 0, // CCR:psub1_then_psub |
| 115362 | 0, // CCR:qsub1_then_dsub_hi |
| 115363 | 0, // CCR:qsub3_then_dsub_hi |
| 115364 | 0, // CCR:qsub2_then_dsub_hi |
| 115365 | 0, // CCR:x8sub_7_then_sub_32 |
| 115366 | 0, // CCR:x8sub_7_then_sub_32_hi |
| 115367 | 0, // CCR:x8sub_6_then_sub_32 |
| 115368 | 0, // CCR:x8sub_6_then_sub_32_hi |
| 115369 | 0, // CCR:x8sub_5_then_sub_32 |
| 115370 | 0, // CCR:x8sub_5_then_sub_32_hi |
| 115371 | 0, // CCR:x8sub_4_then_sub_32 |
| 115372 | 0, // CCR:x8sub_4_then_sub_32_hi |
| 115373 | 0, // CCR:x8sub_3_then_sub_32 |
| 115374 | 0, // CCR:x8sub_3_then_sub_32_hi |
| 115375 | 0, // CCR:x8sub_2_then_sub_32 |
| 115376 | 0, // CCR:x8sub_2_then_sub_32_hi |
| 115377 | 0, // CCR:x8sub_1_then_sub_32 |
| 115378 | 0, // CCR:x8sub_1_then_sub_32_hi |
| 115379 | 0, // CCR:subo64_then_sub_32 |
| 115380 | 0, // CCR:subo64_then_sub_32_hi |
| 115381 | 0, // CCR:zsub1_then_zsub_hi |
| 115382 | 0, // CCR:zsub3_then_zsub_hi |
| 115383 | 0, // CCR:zsub2_then_zsub_hi |
| 115384 | 0, // CCR:dsub0_dsub1 |
| 115385 | 0, // CCR:dsub0_dsub1_dsub2 |
| 115386 | 0, // CCR:dsub1_dsub2 |
| 115387 | 0, // CCR:dsub1_dsub2_dsub3 |
| 115388 | 0, // CCR:dsub2_dsub3 |
| 115389 | 0, // CCR:dsub_dsub1 |
| 115390 | 0, // CCR:dsub_dsub1_dsub2_dsub3 |
| 115391 | 0, // CCR:dsub_dsub1_dsub2 |
| 115392 | 0, // CCR:qsub0_qsub1 |
| 115393 | 0, // CCR:qsub0_qsub1_qsub2 |
| 115394 | 0, // CCR:qsub1_qsub2 |
| 115395 | 0, // CCR:qsub1_qsub2_qsub3 |
| 115396 | 0, // CCR:qsub2_qsub3 |
| 115397 | 0, // CCR:sub_32_x8sub_1_then_sub_32 |
| 115398 | 0, // CCR:x8sub_0_x8sub_1 |
| 115399 | 0, // CCR:x8sub_2_x8sub_3 |
| 115400 | 0, // CCR:x8sub_4_x8sub_5 |
| 115401 | 0, // CCR:x8sub_6_x8sub_7 |
| 115402 | 0, // CCR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115403 | 0, // CCR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115404 | 0, // CCR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115405 | 0, // CCR:sub_32_subo64_then_sub_32 |
| 115406 | 0, // CCR:zsub_qsub1 |
| 115407 | 0, // CCR:zsub_qsub1_qsub2_qsub3 |
| 115408 | 0, // CCR:zsub_qsub1_qsub2 |
| 115409 | 0, // CCR:zsub0_zsub1 |
| 115410 | 0, // CCR:zsub0_zsub1_zsub2 |
| 115411 | 0, // CCR:zsub1_zsub2 |
| 115412 | 0, // CCR:zsub1_zsub2_zsub3 |
| 115413 | 0, // CCR:zsub2_zsub3 |
| 115414 | 0, // CCR:zsub0_zsub2 |
| 115415 | 0, // CCR:zsub1_zsub3 |
| 115416 | }, |
| 115417 | { // GPR32sponly |
| 115418 | 0, // GPR32sponly:bsub |
| 115419 | 0, // GPR32sponly:bsub_hi |
| 115420 | 0, // GPR32sponly:dsub |
| 115421 | 0, // GPR32sponly:dsub0 |
| 115422 | 0, // GPR32sponly:dsub1 |
| 115423 | 0, // GPR32sponly:dsub2 |
| 115424 | 0, // GPR32sponly:dsub3 |
| 115425 | 0, // GPR32sponly:dsub_hi |
| 115426 | 0, // GPR32sponly:hsub |
| 115427 | 0, // GPR32sponly:hsub_hi |
| 115428 | 0, // GPR32sponly:psub |
| 115429 | 0, // GPR32sponly:psub0 |
| 115430 | 0, // GPR32sponly:psub1 |
| 115431 | 0, // GPR32sponly:qsub0 |
| 115432 | 0, // GPR32sponly:qsub1 |
| 115433 | 0, // GPR32sponly:qsub2 |
| 115434 | 0, // GPR32sponly:qsub3 |
| 115435 | 0, // GPR32sponly:ssub |
| 115436 | 0, // GPR32sponly:ssub_hi |
| 115437 | 0, // GPR32sponly:sub_32 |
| 115438 | 0, // GPR32sponly:sub_32_hi |
| 115439 | 0, // GPR32sponly:sube32 |
| 115440 | 0, // GPR32sponly:sube64 |
| 115441 | 0, // GPR32sponly:subo32 |
| 115442 | 0, // GPR32sponly:subo64 |
| 115443 | 0, // GPR32sponly:x8sub_0 |
| 115444 | 0, // GPR32sponly:x8sub_1 |
| 115445 | 0, // GPR32sponly:x8sub_2 |
| 115446 | 0, // GPR32sponly:x8sub_3 |
| 115447 | 0, // GPR32sponly:x8sub_4 |
| 115448 | 0, // GPR32sponly:x8sub_5 |
| 115449 | 0, // GPR32sponly:x8sub_6 |
| 115450 | 0, // GPR32sponly:x8sub_7 |
| 115451 | 0, // GPR32sponly:zasubb |
| 115452 | 0, // GPR32sponly:zasubd0 |
| 115453 | 0, // GPR32sponly:zasubd1 |
| 115454 | 0, // GPR32sponly:zasubh0 |
| 115455 | 0, // GPR32sponly:zasubh1 |
| 115456 | 0, // GPR32sponly:zasubq0 |
| 115457 | 0, // GPR32sponly:zasubq1 |
| 115458 | 0, // GPR32sponly:zasubs0 |
| 115459 | 0, // GPR32sponly:zasubs1 |
| 115460 | 0, // GPR32sponly:zsub |
| 115461 | 0, // GPR32sponly:zsub0 |
| 115462 | 0, // GPR32sponly:zsub1 |
| 115463 | 0, // GPR32sponly:zsub2 |
| 115464 | 0, // GPR32sponly:zsub3 |
| 115465 | 0, // GPR32sponly:zsub_hi |
| 115466 | 0, // GPR32sponly:zasubd1_then_zasubq0 |
| 115467 | 0, // GPR32sponly:zasubd1_then_zasubq1 |
| 115468 | 0, // GPR32sponly:zasubs1_then_zasubd0 |
| 115469 | 0, // GPR32sponly:zasubs1_then_zasubd1 |
| 115470 | 0, // GPR32sponly:zasubs1_then_zasubq0 |
| 115471 | 0, // GPR32sponly:zasubs1_then_zasubq1 |
| 115472 | 0, // GPR32sponly:zasubs1_then_zasubd1_then_zasubq0 |
| 115473 | 0, // GPR32sponly:zasubs1_then_zasubd1_then_zasubq1 |
| 115474 | 0, // GPR32sponly:zasubh1_then_zasubd0 |
| 115475 | 0, // GPR32sponly:zasubh1_then_zasubd1 |
| 115476 | 0, // GPR32sponly:zasubh1_then_zasubq0 |
| 115477 | 0, // GPR32sponly:zasubh1_then_zasubq1 |
| 115478 | 0, // GPR32sponly:zasubh1_then_zasubs0 |
| 115479 | 0, // GPR32sponly:zasubh1_then_zasubs1 |
| 115480 | 0, // GPR32sponly:zasubh1_then_zasubd1_then_zasubq0 |
| 115481 | 0, // GPR32sponly:zasubh1_then_zasubd1_then_zasubq1 |
| 115482 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd0 |
| 115483 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1 |
| 115484 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubq0 |
| 115485 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubq1 |
| 115486 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115487 | 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115488 | 0, // GPR32sponly:dsub1_then_bsub |
| 115489 | 0, // GPR32sponly:dsub1_then_bsub_hi |
| 115490 | 0, // GPR32sponly:dsub1_then_hsub |
| 115491 | 0, // GPR32sponly:dsub1_then_hsub_hi |
| 115492 | 0, // GPR32sponly:dsub1_then_ssub |
| 115493 | 0, // GPR32sponly:dsub1_then_ssub_hi |
| 115494 | 0, // GPR32sponly:dsub3_then_bsub |
| 115495 | 0, // GPR32sponly:dsub3_then_bsub_hi |
| 115496 | 0, // GPR32sponly:dsub3_then_hsub |
| 115497 | 0, // GPR32sponly:dsub3_then_hsub_hi |
| 115498 | 0, // GPR32sponly:dsub3_then_ssub |
| 115499 | 0, // GPR32sponly:dsub3_then_ssub_hi |
| 115500 | 0, // GPR32sponly:dsub2_then_bsub |
| 115501 | 0, // GPR32sponly:dsub2_then_bsub_hi |
| 115502 | 0, // GPR32sponly:dsub2_then_hsub |
| 115503 | 0, // GPR32sponly:dsub2_then_hsub_hi |
| 115504 | 0, // GPR32sponly:dsub2_then_ssub |
| 115505 | 0, // GPR32sponly:dsub2_then_ssub_hi |
| 115506 | 0, // GPR32sponly:psub1_then_psub |
| 115507 | 0, // GPR32sponly:qsub1_then_dsub_hi |
| 115508 | 0, // GPR32sponly:qsub3_then_dsub_hi |
| 115509 | 0, // GPR32sponly:qsub2_then_dsub_hi |
| 115510 | 0, // GPR32sponly:x8sub_7_then_sub_32 |
| 115511 | 0, // GPR32sponly:x8sub_7_then_sub_32_hi |
| 115512 | 0, // GPR32sponly:x8sub_6_then_sub_32 |
| 115513 | 0, // GPR32sponly:x8sub_6_then_sub_32_hi |
| 115514 | 0, // GPR32sponly:x8sub_5_then_sub_32 |
| 115515 | 0, // GPR32sponly:x8sub_5_then_sub_32_hi |
| 115516 | 0, // GPR32sponly:x8sub_4_then_sub_32 |
| 115517 | 0, // GPR32sponly:x8sub_4_then_sub_32_hi |
| 115518 | 0, // GPR32sponly:x8sub_3_then_sub_32 |
| 115519 | 0, // GPR32sponly:x8sub_3_then_sub_32_hi |
| 115520 | 0, // GPR32sponly:x8sub_2_then_sub_32 |
| 115521 | 0, // GPR32sponly:x8sub_2_then_sub_32_hi |
| 115522 | 0, // GPR32sponly:x8sub_1_then_sub_32 |
| 115523 | 0, // GPR32sponly:x8sub_1_then_sub_32_hi |
| 115524 | 0, // GPR32sponly:subo64_then_sub_32 |
| 115525 | 0, // GPR32sponly:subo64_then_sub_32_hi |
| 115526 | 0, // GPR32sponly:zsub1_then_zsub_hi |
| 115527 | 0, // GPR32sponly:zsub3_then_zsub_hi |
| 115528 | 0, // GPR32sponly:zsub2_then_zsub_hi |
| 115529 | 0, // GPR32sponly:dsub0_dsub1 |
| 115530 | 0, // GPR32sponly:dsub0_dsub1_dsub2 |
| 115531 | 0, // GPR32sponly:dsub1_dsub2 |
| 115532 | 0, // GPR32sponly:dsub1_dsub2_dsub3 |
| 115533 | 0, // GPR32sponly:dsub2_dsub3 |
| 115534 | 0, // GPR32sponly:dsub_dsub1 |
| 115535 | 0, // GPR32sponly:dsub_dsub1_dsub2_dsub3 |
| 115536 | 0, // GPR32sponly:dsub_dsub1_dsub2 |
| 115537 | 0, // GPR32sponly:qsub0_qsub1 |
| 115538 | 0, // GPR32sponly:qsub0_qsub1_qsub2 |
| 115539 | 0, // GPR32sponly:qsub1_qsub2 |
| 115540 | 0, // GPR32sponly:qsub1_qsub2_qsub3 |
| 115541 | 0, // GPR32sponly:qsub2_qsub3 |
| 115542 | 0, // GPR32sponly:sub_32_x8sub_1_then_sub_32 |
| 115543 | 0, // GPR32sponly:x8sub_0_x8sub_1 |
| 115544 | 0, // GPR32sponly:x8sub_2_x8sub_3 |
| 115545 | 0, // GPR32sponly:x8sub_4_x8sub_5 |
| 115546 | 0, // GPR32sponly:x8sub_6_x8sub_7 |
| 115547 | 0, // GPR32sponly:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115548 | 0, // GPR32sponly:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115549 | 0, // GPR32sponly:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115550 | 0, // GPR32sponly:sub_32_subo64_then_sub_32 |
| 115551 | 0, // GPR32sponly:zsub_qsub1 |
| 115552 | 0, // GPR32sponly:zsub_qsub1_qsub2_qsub3 |
| 115553 | 0, // GPR32sponly:zsub_qsub1_qsub2 |
| 115554 | 0, // GPR32sponly:zsub0_zsub1 |
| 115555 | 0, // GPR32sponly:zsub0_zsub1_zsub2 |
| 115556 | 0, // GPR32sponly:zsub1_zsub2 |
| 115557 | 0, // GPR32sponly:zsub1_zsub2_zsub3 |
| 115558 | 0, // GPR32sponly:zsub2_zsub3 |
| 115559 | 0, // GPR32sponly:zsub0_zsub2 |
| 115560 | 0, // GPR32sponly:zsub1_zsub3 |
| 115561 | }, |
| 115562 | { // WSeqPairsClass |
| 115563 | 0, // WSeqPairsClass:bsub |
| 115564 | 0, // WSeqPairsClass:bsub_hi |
| 115565 | 0, // WSeqPairsClass:dsub |
| 115566 | 0, // WSeqPairsClass:dsub0 |
| 115567 | 0, // WSeqPairsClass:dsub1 |
| 115568 | 0, // WSeqPairsClass:dsub2 |
| 115569 | 0, // WSeqPairsClass:dsub3 |
| 115570 | 0, // WSeqPairsClass:dsub_hi |
| 115571 | 0, // WSeqPairsClass:hsub |
| 115572 | 0, // WSeqPairsClass:hsub_hi |
| 115573 | 0, // WSeqPairsClass:psub |
| 115574 | 0, // WSeqPairsClass:psub0 |
| 115575 | 0, // WSeqPairsClass:psub1 |
| 115576 | 0, // WSeqPairsClass:qsub0 |
| 115577 | 0, // WSeqPairsClass:qsub1 |
| 115578 | 0, // WSeqPairsClass:qsub2 |
| 115579 | 0, // WSeqPairsClass:qsub3 |
| 115580 | 0, // WSeqPairsClass:ssub |
| 115581 | 0, // WSeqPairsClass:ssub_hi |
| 115582 | 0, // WSeqPairsClass:sub_32 |
| 115583 | 0, // WSeqPairsClass:sub_32_hi |
| 115584 | 43, // WSeqPairsClass:sube32 -> GPR32common |
| 115585 | 0, // WSeqPairsClass:sube64 |
| 115586 | 41, // WSeqPairsClass:subo32 -> GPR32 |
| 115587 | 0, // WSeqPairsClass:subo64 |
| 115588 | 0, // WSeqPairsClass:x8sub_0 |
| 115589 | 0, // WSeqPairsClass:x8sub_1 |
| 115590 | 0, // WSeqPairsClass:x8sub_2 |
| 115591 | 0, // WSeqPairsClass:x8sub_3 |
| 115592 | 0, // WSeqPairsClass:x8sub_4 |
| 115593 | 0, // WSeqPairsClass:x8sub_5 |
| 115594 | 0, // WSeqPairsClass:x8sub_6 |
| 115595 | 0, // WSeqPairsClass:x8sub_7 |
| 115596 | 0, // WSeqPairsClass:zasubb |
| 115597 | 0, // WSeqPairsClass:zasubd0 |
| 115598 | 0, // WSeqPairsClass:zasubd1 |
| 115599 | 0, // WSeqPairsClass:zasubh0 |
| 115600 | 0, // WSeqPairsClass:zasubh1 |
| 115601 | 0, // WSeqPairsClass:zasubq0 |
| 115602 | 0, // WSeqPairsClass:zasubq1 |
| 115603 | 0, // WSeqPairsClass:zasubs0 |
| 115604 | 0, // WSeqPairsClass:zasubs1 |
| 115605 | 0, // WSeqPairsClass:zsub |
| 115606 | 0, // WSeqPairsClass:zsub0 |
| 115607 | 0, // WSeqPairsClass:zsub1 |
| 115608 | 0, // WSeqPairsClass:zsub2 |
| 115609 | 0, // WSeqPairsClass:zsub3 |
| 115610 | 0, // WSeqPairsClass:zsub_hi |
| 115611 | 0, // WSeqPairsClass:zasubd1_then_zasubq0 |
| 115612 | 0, // WSeqPairsClass:zasubd1_then_zasubq1 |
| 115613 | 0, // WSeqPairsClass:zasubs1_then_zasubd0 |
| 115614 | 0, // WSeqPairsClass:zasubs1_then_zasubd1 |
| 115615 | 0, // WSeqPairsClass:zasubs1_then_zasubq0 |
| 115616 | 0, // WSeqPairsClass:zasubs1_then_zasubq1 |
| 115617 | 0, // WSeqPairsClass:zasubs1_then_zasubd1_then_zasubq0 |
| 115618 | 0, // WSeqPairsClass:zasubs1_then_zasubd1_then_zasubq1 |
| 115619 | 0, // WSeqPairsClass:zasubh1_then_zasubd0 |
| 115620 | 0, // WSeqPairsClass:zasubh1_then_zasubd1 |
| 115621 | 0, // WSeqPairsClass:zasubh1_then_zasubq0 |
| 115622 | 0, // WSeqPairsClass:zasubh1_then_zasubq1 |
| 115623 | 0, // WSeqPairsClass:zasubh1_then_zasubs0 |
| 115624 | 0, // WSeqPairsClass:zasubh1_then_zasubs1 |
| 115625 | 0, // WSeqPairsClass:zasubh1_then_zasubd1_then_zasubq0 |
| 115626 | 0, // WSeqPairsClass:zasubh1_then_zasubd1_then_zasubq1 |
| 115627 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd0 |
| 115628 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1 |
| 115629 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubq0 |
| 115630 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubq1 |
| 115631 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115632 | 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115633 | 0, // WSeqPairsClass:dsub1_then_bsub |
| 115634 | 0, // WSeqPairsClass:dsub1_then_bsub_hi |
| 115635 | 0, // WSeqPairsClass:dsub1_then_hsub |
| 115636 | 0, // WSeqPairsClass:dsub1_then_hsub_hi |
| 115637 | 0, // WSeqPairsClass:dsub1_then_ssub |
| 115638 | 0, // WSeqPairsClass:dsub1_then_ssub_hi |
| 115639 | 0, // WSeqPairsClass:dsub3_then_bsub |
| 115640 | 0, // WSeqPairsClass:dsub3_then_bsub_hi |
| 115641 | 0, // WSeqPairsClass:dsub3_then_hsub |
| 115642 | 0, // WSeqPairsClass:dsub3_then_hsub_hi |
| 115643 | 0, // WSeqPairsClass:dsub3_then_ssub |
| 115644 | 0, // WSeqPairsClass:dsub3_then_ssub_hi |
| 115645 | 0, // WSeqPairsClass:dsub2_then_bsub |
| 115646 | 0, // WSeqPairsClass:dsub2_then_bsub_hi |
| 115647 | 0, // WSeqPairsClass:dsub2_then_hsub |
| 115648 | 0, // WSeqPairsClass:dsub2_then_hsub_hi |
| 115649 | 0, // WSeqPairsClass:dsub2_then_ssub |
| 115650 | 0, // WSeqPairsClass:dsub2_then_ssub_hi |
| 115651 | 0, // WSeqPairsClass:psub1_then_psub |
| 115652 | 0, // WSeqPairsClass:qsub1_then_dsub_hi |
| 115653 | 0, // WSeqPairsClass:qsub3_then_dsub_hi |
| 115654 | 0, // WSeqPairsClass:qsub2_then_dsub_hi |
| 115655 | 0, // WSeqPairsClass:x8sub_7_then_sub_32 |
| 115656 | 0, // WSeqPairsClass:x8sub_7_then_sub_32_hi |
| 115657 | 0, // WSeqPairsClass:x8sub_6_then_sub_32 |
| 115658 | 0, // WSeqPairsClass:x8sub_6_then_sub_32_hi |
| 115659 | 0, // WSeqPairsClass:x8sub_5_then_sub_32 |
| 115660 | 0, // WSeqPairsClass:x8sub_5_then_sub_32_hi |
| 115661 | 0, // WSeqPairsClass:x8sub_4_then_sub_32 |
| 115662 | 0, // WSeqPairsClass:x8sub_4_then_sub_32_hi |
| 115663 | 0, // WSeqPairsClass:x8sub_3_then_sub_32 |
| 115664 | 0, // WSeqPairsClass:x8sub_3_then_sub_32_hi |
| 115665 | 0, // WSeqPairsClass:x8sub_2_then_sub_32 |
| 115666 | 0, // WSeqPairsClass:x8sub_2_then_sub_32_hi |
| 115667 | 0, // WSeqPairsClass:x8sub_1_then_sub_32 |
| 115668 | 0, // WSeqPairsClass:x8sub_1_then_sub_32_hi |
| 115669 | 0, // WSeqPairsClass:subo64_then_sub_32 |
| 115670 | 0, // WSeqPairsClass:subo64_then_sub_32_hi |
| 115671 | 0, // WSeqPairsClass:zsub1_then_zsub_hi |
| 115672 | 0, // WSeqPairsClass:zsub3_then_zsub_hi |
| 115673 | 0, // WSeqPairsClass:zsub2_then_zsub_hi |
| 115674 | 0, // WSeqPairsClass:dsub0_dsub1 |
| 115675 | 0, // WSeqPairsClass:dsub0_dsub1_dsub2 |
| 115676 | 0, // WSeqPairsClass:dsub1_dsub2 |
| 115677 | 0, // WSeqPairsClass:dsub1_dsub2_dsub3 |
| 115678 | 0, // WSeqPairsClass:dsub2_dsub3 |
| 115679 | 0, // WSeqPairsClass:dsub_dsub1 |
| 115680 | 0, // WSeqPairsClass:dsub_dsub1_dsub2_dsub3 |
| 115681 | 0, // WSeqPairsClass:dsub_dsub1_dsub2 |
| 115682 | 0, // WSeqPairsClass:qsub0_qsub1 |
| 115683 | 0, // WSeqPairsClass:qsub0_qsub1_qsub2 |
| 115684 | 0, // WSeqPairsClass:qsub1_qsub2 |
| 115685 | 0, // WSeqPairsClass:qsub1_qsub2_qsub3 |
| 115686 | 0, // WSeqPairsClass:qsub2_qsub3 |
| 115687 | 0, // WSeqPairsClass:sub_32_x8sub_1_then_sub_32 |
| 115688 | 0, // WSeqPairsClass:x8sub_0_x8sub_1 |
| 115689 | 0, // WSeqPairsClass:x8sub_2_x8sub_3 |
| 115690 | 0, // WSeqPairsClass:x8sub_4_x8sub_5 |
| 115691 | 0, // WSeqPairsClass:x8sub_6_x8sub_7 |
| 115692 | 0, // WSeqPairsClass:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115693 | 0, // WSeqPairsClass:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115694 | 0, // WSeqPairsClass:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115695 | 0, // WSeqPairsClass:sub_32_subo64_then_sub_32 |
| 115696 | 0, // WSeqPairsClass:zsub_qsub1 |
| 115697 | 0, // WSeqPairsClass:zsub_qsub1_qsub2_qsub3 |
| 115698 | 0, // WSeqPairsClass:zsub_qsub1_qsub2 |
| 115699 | 0, // WSeqPairsClass:zsub0_zsub1 |
| 115700 | 0, // WSeqPairsClass:zsub0_zsub1_zsub2 |
| 115701 | 0, // WSeqPairsClass:zsub1_zsub2 |
| 115702 | 0, // WSeqPairsClass:zsub1_zsub2_zsub3 |
| 115703 | 0, // WSeqPairsClass:zsub2_zsub3 |
| 115704 | 0, // WSeqPairsClass:zsub0_zsub2 |
| 115705 | 0, // WSeqPairsClass:zsub1_zsub3 |
| 115706 | }, |
| 115707 | { // WSeqPairsClass_with_subo32_in_GPR32common |
| 115708 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:bsub |
| 115709 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:bsub_hi |
| 115710 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub |
| 115711 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0 |
| 115712 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1 |
| 115713 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2 |
| 115714 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3 |
| 115715 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_hi |
| 115716 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:hsub |
| 115717 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:hsub_hi |
| 115718 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub |
| 115719 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub0 |
| 115720 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub1 |
| 115721 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0 |
| 115722 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1 |
| 115723 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2 |
| 115724 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3 |
| 115725 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:ssub |
| 115726 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:ssub_hi |
| 115727 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32 |
| 115728 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32_hi |
| 115729 | 43, // WSeqPairsClass_with_subo32_in_GPR32common:sube32 -> GPR32common |
| 115730 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:sube64 |
| 115731 | 43, // WSeqPairsClass_with_subo32_in_GPR32common:subo32 -> GPR32common |
| 115732 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:subo64 |
| 115733 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_0 |
| 115734 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_1 |
| 115735 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2 |
| 115736 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_3 |
| 115737 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4 |
| 115738 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_5 |
| 115739 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6 |
| 115740 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_7 |
| 115741 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubb |
| 115742 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd0 |
| 115743 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1 |
| 115744 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh0 |
| 115745 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1 |
| 115746 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubq0 |
| 115747 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubq1 |
| 115748 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs0 |
| 115749 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1 |
| 115750 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub |
| 115751 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0 |
| 115752 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1 |
| 115753 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2 |
| 115754 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3 |
| 115755 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_hi |
| 115756 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1_then_zasubq0 |
| 115757 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1_then_zasubq1 |
| 115758 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd0 |
| 115759 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1 |
| 115760 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubq0 |
| 115761 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubq1 |
| 115762 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1_then_zasubq0 |
| 115763 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1_then_zasubq1 |
| 115764 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd0 |
| 115765 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1 |
| 115766 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubq0 |
| 115767 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubq1 |
| 115768 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs0 |
| 115769 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1 |
| 115770 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1_then_zasubq0 |
| 115771 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1_then_zasubq1 |
| 115772 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd0 |
| 115773 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1 |
| 115774 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubq0 |
| 115775 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubq1 |
| 115776 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115777 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115778 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_bsub |
| 115779 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_bsub_hi |
| 115780 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_hsub |
| 115781 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_hsub_hi |
| 115782 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_ssub |
| 115783 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_ssub_hi |
| 115784 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_bsub |
| 115785 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_bsub_hi |
| 115786 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_hsub |
| 115787 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_hsub_hi |
| 115788 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_ssub |
| 115789 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_ssub_hi |
| 115790 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_bsub |
| 115791 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_bsub_hi |
| 115792 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_hsub |
| 115793 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_hsub_hi |
| 115794 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_ssub |
| 115795 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_ssub_hi |
| 115796 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub1_then_psub |
| 115797 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_dsub_hi |
| 115798 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3_then_dsub_hi |
| 115799 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_dsub_hi |
| 115800 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_7_then_sub_32 |
| 115801 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_7_then_sub_32_hi |
| 115802 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_then_sub_32 |
| 115803 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_then_sub_32_hi |
| 115804 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_5_then_sub_32 |
| 115805 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_5_then_sub_32_hi |
| 115806 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_then_sub_32 |
| 115807 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_then_sub_32_hi |
| 115808 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_3_then_sub_32 |
| 115809 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_3_then_sub_32_hi |
| 115810 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_then_sub_32 |
| 115811 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_then_sub_32_hi |
| 115812 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_1_then_sub_32 |
| 115813 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_1_then_sub_32_hi |
| 115814 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:subo64_then_sub_32 |
| 115815 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:subo64_then_sub_32_hi |
| 115816 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_zsub_hi |
| 115817 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_zsub_hi |
| 115818 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_zsub_hi |
| 115819 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0_dsub1 |
| 115820 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0_dsub1_dsub2 |
| 115821 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_dsub2 |
| 115822 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_dsub2_dsub3 |
| 115823 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_dsub3 |
| 115824 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_dsub1 |
| 115825 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_dsub1_dsub2_dsub3 |
| 115826 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_dsub1_dsub2 |
| 115827 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0_qsub1 |
| 115828 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0_qsub1_qsub2 |
| 115829 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_qsub2 |
| 115830 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_qsub2_qsub3 |
| 115831 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_qsub3 |
| 115832 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32_x8sub_1_then_sub_32 |
| 115833 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_0_x8sub_1 |
| 115834 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_x8sub_3 |
| 115835 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_x8sub_5 |
| 115836 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_x8sub_7 |
| 115837 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115838 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115839 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115840 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32_subo64_then_sub_32 |
| 115841 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_qsub1 |
| 115842 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_qsub1_qsub2_qsub3 |
| 115843 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_qsub1_qsub2 |
| 115844 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub1 |
| 115845 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub1_zsub2 |
| 115846 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub2 |
| 115847 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub2_zsub3 |
| 115848 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_zsub3 |
| 115849 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub2 |
| 115850 | 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub3 |
| 115851 | }, |
| 115852 | { // WSeqPairsClass_with_sube32_in_GPR32arg |
| 115853 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:bsub |
| 115854 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:bsub_hi |
| 115855 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub |
| 115856 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0 |
| 115857 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1 |
| 115858 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2 |
| 115859 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3 |
| 115860 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_hi |
| 115861 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:hsub |
| 115862 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:hsub_hi |
| 115863 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub |
| 115864 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub0 |
| 115865 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub1 |
| 115866 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0 |
| 115867 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1 |
| 115868 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2 |
| 115869 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3 |
| 115870 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:ssub |
| 115871 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:ssub_hi |
| 115872 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32 |
| 115873 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32_hi |
| 115874 | 45, // WSeqPairsClass_with_sube32_in_GPR32arg:sube32 -> GPR32arg |
| 115875 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sube64 |
| 115876 | 45, // WSeqPairsClass_with_sube32_in_GPR32arg:subo32 -> GPR32arg |
| 115877 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:subo64 |
| 115878 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_0 |
| 115879 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_1 |
| 115880 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2 |
| 115881 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_3 |
| 115882 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4 |
| 115883 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_5 |
| 115884 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6 |
| 115885 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_7 |
| 115886 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubb |
| 115887 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd0 |
| 115888 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1 |
| 115889 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh0 |
| 115890 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1 |
| 115891 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubq0 |
| 115892 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubq1 |
| 115893 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs0 |
| 115894 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1 |
| 115895 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub |
| 115896 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0 |
| 115897 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1 |
| 115898 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2 |
| 115899 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3 |
| 115900 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_hi |
| 115901 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1_then_zasubq0 |
| 115902 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1_then_zasubq1 |
| 115903 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd0 |
| 115904 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1 |
| 115905 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubq0 |
| 115906 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubq1 |
| 115907 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq0 |
| 115908 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq1 |
| 115909 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd0 |
| 115910 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1 |
| 115911 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubq0 |
| 115912 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubq1 |
| 115913 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs0 |
| 115914 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1 |
| 115915 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq0 |
| 115916 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq1 |
| 115917 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd0 |
| 115918 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1 |
| 115919 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq0 |
| 115920 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq1 |
| 115921 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 115922 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 115923 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_bsub |
| 115924 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_bsub_hi |
| 115925 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_hsub |
| 115926 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_hsub_hi |
| 115927 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_ssub |
| 115928 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_ssub_hi |
| 115929 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_bsub |
| 115930 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_bsub_hi |
| 115931 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_hsub |
| 115932 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_hsub_hi |
| 115933 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_ssub |
| 115934 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_ssub_hi |
| 115935 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_bsub |
| 115936 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_bsub_hi |
| 115937 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_hsub |
| 115938 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_hsub_hi |
| 115939 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_ssub |
| 115940 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_ssub_hi |
| 115941 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub1_then_psub |
| 115942 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_dsub_hi |
| 115943 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3_then_dsub_hi |
| 115944 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_dsub_hi |
| 115945 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_7_then_sub_32 |
| 115946 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_7_then_sub_32_hi |
| 115947 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_then_sub_32 |
| 115948 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_then_sub_32_hi |
| 115949 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_5_then_sub_32 |
| 115950 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_5_then_sub_32_hi |
| 115951 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_then_sub_32 |
| 115952 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_then_sub_32_hi |
| 115953 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_3_then_sub_32 |
| 115954 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_3_then_sub_32_hi |
| 115955 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_then_sub_32 |
| 115956 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_then_sub_32_hi |
| 115957 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_1_then_sub_32 |
| 115958 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_1_then_sub_32_hi |
| 115959 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:subo64_then_sub_32 |
| 115960 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:subo64_then_sub_32_hi |
| 115961 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_zsub_hi |
| 115962 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_zsub_hi |
| 115963 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_zsub_hi |
| 115964 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0_dsub1 |
| 115965 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0_dsub1_dsub2 |
| 115966 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_dsub2 |
| 115967 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_dsub2_dsub3 |
| 115968 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_dsub3 |
| 115969 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_dsub1 |
| 115970 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_dsub1_dsub2_dsub3 |
| 115971 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_dsub1_dsub2 |
| 115972 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0_qsub1 |
| 115973 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0_qsub1_qsub2 |
| 115974 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_qsub2 |
| 115975 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_qsub2_qsub3 |
| 115976 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_qsub3 |
| 115977 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32_x8sub_1_then_sub_32 |
| 115978 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_0_x8sub_1 |
| 115979 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_x8sub_3 |
| 115980 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_x8sub_5 |
| 115981 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_x8sub_7 |
| 115982 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 115983 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 115984 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 115985 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32_subo64_then_sub_32 |
| 115986 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_qsub1 |
| 115987 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_qsub1_qsub2_qsub3 |
| 115988 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_qsub1_qsub2 |
| 115989 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub1 |
| 115990 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub1_zsub2 |
| 115991 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub2 |
| 115992 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub2_zsub3 |
| 115993 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_zsub3 |
| 115994 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub2 |
| 115995 | 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub3 |
| 115996 | }, |
| 115997 | { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 115998 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:bsub |
| 115999 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:bsub_hi |
| 116000 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub |
| 116001 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0 |
| 116002 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1 |
| 116003 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2 |
| 116004 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3 |
| 116005 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_hi |
| 116006 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:hsub |
| 116007 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:hsub_hi |
| 116008 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub |
| 116009 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub0 |
| 116010 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub1 |
| 116011 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0 |
| 116012 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1 |
| 116013 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2 |
| 116014 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3 |
| 116015 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:ssub |
| 116016 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:ssub_hi |
| 116017 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32 |
| 116018 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32_hi |
| 116019 | 46, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sube32 -> MatrixIndexGPR32_12_15 |
| 116020 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sube64 |
| 116021 | 46, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo32 -> MatrixIndexGPR32_12_15 |
| 116022 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo64 |
| 116023 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_0 |
| 116024 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_1 |
| 116025 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2 |
| 116026 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_3 |
| 116027 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4 |
| 116028 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_5 |
| 116029 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6 |
| 116030 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_7 |
| 116031 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubb |
| 116032 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd0 |
| 116033 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1 |
| 116034 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh0 |
| 116035 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1 |
| 116036 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubq0 |
| 116037 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubq1 |
| 116038 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs0 |
| 116039 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1 |
| 116040 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub |
| 116041 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0 |
| 116042 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1 |
| 116043 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2 |
| 116044 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3 |
| 116045 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_hi |
| 116046 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 116047 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 116048 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 116049 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 116050 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 116051 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 116052 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 116053 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 116054 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 116055 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 116056 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 116057 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 116058 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 116059 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 116060 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 116061 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 116062 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 116063 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 116064 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 116065 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 116066 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116067 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116068 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 116069 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 116070 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 116071 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 116072 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 116073 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 116074 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 116075 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 116076 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 116077 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 116078 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 116079 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 116080 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 116081 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 116082 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 116083 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 116084 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 116085 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 116086 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub1_then_psub |
| 116087 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 116088 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 116089 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 116090 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 |
| 116091 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 116092 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 |
| 116093 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 116094 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 |
| 116095 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 116096 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 |
| 116097 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 116098 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 |
| 116099 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 116100 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 |
| 116101 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 116102 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 |
| 116103 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 116104 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 |
| 116105 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 116106 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 116107 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 116108 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 116109 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 116110 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 116111 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 116112 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 116113 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 116114 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_dsub1 |
| 116115 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 116116 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 116117 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 116118 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 116119 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 116120 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 116121 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 116122 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 |
| 116123 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 |
| 116124 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 |
| 116125 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 |
| 116126 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 |
| 116127 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116128 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116129 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116130 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 |
| 116131 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_qsub1 |
| 116132 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 116133 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 116134 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 116135 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 116136 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 116137 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 116138 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 116139 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 116140 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 116141 | }, |
| 116142 | { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 116143 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:bsub |
| 116144 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 116145 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub |
| 116146 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0 |
| 116147 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1 |
| 116148 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2 |
| 116149 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3 |
| 116150 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 116151 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:hsub |
| 116152 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 116153 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub |
| 116154 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub0 |
| 116155 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub1 |
| 116156 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0 |
| 116157 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1 |
| 116158 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2 |
| 116159 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3 |
| 116160 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:ssub |
| 116161 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 116162 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32 |
| 116163 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 116164 | 47, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sube32 -> MatrixIndexGPR32_8_11 |
| 116165 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sube64 |
| 116166 | 47, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo32 -> MatrixIndexGPR32_8_11 |
| 116167 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo64 |
| 116168 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_0 |
| 116169 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_1 |
| 116170 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2 |
| 116171 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_3 |
| 116172 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4 |
| 116173 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_5 |
| 116174 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6 |
| 116175 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_7 |
| 116176 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubb |
| 116177 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 116178 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 116179 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 116180 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 116181 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 116182 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 116183 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 116184 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 116185 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub |
| 116186 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0 |
| 116187 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1 |
| 116188 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2 |
| 116189 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3 |
| 116190 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 116191 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 116192 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 116193 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 116194 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 116195 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 116196 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 116197 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 116198 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 116199 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 116200 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 116201 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 116202 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 116203 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 116204 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 116205 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 116206 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 116207 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 116208 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 116209 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 116210 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 116211 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116212 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116213 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 116214 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 116215 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 116216 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 116217 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 116218 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 116219 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 116220 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 116221 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 116222 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 116223 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 116224 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 116225 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 116226 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 116227 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 116228 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 116229 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 116230 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 116231 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 116232 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 116233 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 116234 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 116235 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 |
| 116236 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 116237 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 |
| 116238 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 116239 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 |
| 116240 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 116241 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 |
| 116242 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 116243 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 |
| 116244 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 116245 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 |
| 116246 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 116247 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 |
| 116248 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 116249 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 116250 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 116251 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 116252 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 116253 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 116254 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 116255 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 116256 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 116257 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 116258 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 116259 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 116260 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 116261 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 116262 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 116263 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 116264 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 116265 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 116266 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 116267 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 |
| 116268 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 |
| 116269 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 |
| 116270 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 |
| 116271 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 |
| 116272 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116273 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116274 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116275 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 116276 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 116277 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 116278 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 116279 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 116280 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 116281 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 116282 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 116283 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 116284 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 116285 | 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 116286 | }, |
| 116287 | { // GPR64all |
| 116288 | 0, // GPR64all:bsub |
| 116289 | 0, // GPR64all:bsub_hi |
| 116290 | 0, // GPR64all:dsub |
| 116291 | 0, // GPR64all:dsub0 |
| 116292 | 0, // GPR64all:dsub1 |
| 116293 | 0, // GPR64all:dsub2 |
| 116294 | 0, // GPR64all:dsub3 |
| 116295 | 0, // GPR64all:dsub_hi |
| 116296 | 0, // GPR64all:hsub |
| 116297 | 0, // GPR64all:hsub_hi |
| 116298 | 0, // GPR64all:psub |
| 116299 | 0, // GPR64all:psub0 |
| 116300 | 0, // GPR64all:psub1 |
| 116301 | 0, // GPR64all:qsub0 |
| 116302 | 0, // GPR64all:qsub1 |
| 116303 | 0, // GPR64all:qsub2 |
| 116304 | 0, // GPR64all:qsub3 |
| 116305 | 0, // GPR64all:ssub |
| 116306 | 0, // GPR64all:ssub_hi |
| 116307 | 39, // GPR64all:sub_32 -> GPR32all |
| 116308 | 0, // GPR64all:sub_32_hi |
| 116309 | 0, // GPR64all:sube32 |
| 116310 | 0, // GPR64all:sube64 |
| 116311 | 0, // GPR64all:subo32 |
| 116312 | 0, // GPR64all:subo64 |
| 116313 | 0, // GPR64all:x8sub_0 |
| 116314 | 0, // GPR64all:x8sub_1 |
| 116315 | 0, // GPR64all:x8sub_2 |
| 116316 | 0, // GPR64all:x8sub_3 |
| 116317 | 0, // GPR64all:x8sub_4 |
| 116318 | 0, // GPR64all:x8sub_5 |
| 116319 | 0, // GPR64all:x8sub_6 |
| 116320 | 0, // GPR64all:x8sub_7 |
| 116321 | 0, // GPR64all:zasubb |
| 116322 | 0, // GPR64all:zasubd0 |
| 116323 | 0, // GPR64all:zasubd1 |
| 116324 | 0, // GPR64all:zasubh0 |
| 116325 | 0, // GPR64all:zasubh1 |
| 116326 | 0, // GPR64all:zasubq0 |
| 116327 | 0, // GPR64all:zasubq1 |
| 116328 | 0, // GPR64all:zasubs0 |
| 116329 | 0, // GPR64all:zasubs1 |
| 116330 | 0, // GPR64all:zsub |
| 116331 | 0, // GPR64all:zsub0 |
| 116332 | 0, // GPR64all:zsub1 |
| 116333 | 0, // GPR64all:zsub2 |
| 116334 | 0, // GPR64all:zsub3 |
| 116335 | 0, // GPR64all:zsub_hi |
| 116336 | 0, // GPR64all:zasubd1_then_zasubq0 |
| 116337 | 0, // GPR64all:zasubd1_then_zasubq1 |
| 116338 | 0, // GPR64all:zasubs1_then_zasubd0 |
| 116339 | 0, // GPR64all:zasubs1_then_zasubd1 |
| 116340 | 0, // GPR64all:zasubs1_then_zasubq0 |
| 116341 | 0, // GPR64all:zasubs1_then_zasubq1 |
| 116342 | 0, // GPR64all:zasubs1_then_zasubd1_then_zasubq0 |
| 116343 | 0, // GPR64all:zasubs1_then_zasubd1_then_zasubq1 |
| 116344 | 0, // GPR64all:zasubh1_then_zasubd0 |
| 116345 | 0, // GPR64all:zasubh1_then_zasubd1 |
| 116346 | 0, // GPR64all:zasubh1_then_zasubq0 |
| 116347 | 0, // GPR64all:zasubh1_then_zasubq1 |
| 116348 | 0, // GPR64all:zasubh1_then_zasubs0 |
| 116349 | 0, // GPR64all:zasubh1_then_zasubs1 |
| 116350 | 0, // GPR64all:zasubh1_then_zasubd1_then_zasubq0 |
| 116351 | 0, // GPR64all:zasubh1_then_zasubd1_then_zasubq1 |
| 116352 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd0 |
| 116353 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1 |
| 116354 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubq0 |
| 116355 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubq1 |
| 116356 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116357 | 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116358 | 0, // GPR64all:dsub1_then_bsub |
| 116359 | 0, // GPR64all:dsub1_then_bsub_hi |
| 116360 | 0, // GPR64all:dsub1_then_hsub |
| 116361 | 0, // GPR64all:dsub1_then_hsub_hi |
| 116362 | 0, // GPR64all:dsub1_then_ssub |
| 116363 | 0, // GPR64all:dsub1_then_ssub_hi |
| 116364 | 0, // GPR64all:dsub3_then_bsub |
| 116365 | 0, // GPR64all:dsub3_then_bsub_hi |
| 116366 | 0, // GPR64all:dsub3_then_hsub |
| 116367 | 0, // GPR64all:dsub3_then_hsub_hi |
| 116368 | 0, // GPR64all:dsub3_then_ssub |
| 116369 | 0, // GPR64all:dsub3_then_ssub_hi |
| 116370 | 0, // GPR64all:dsub2_then_bsub |
| 116371 | 0, // GPR64all:dsub2_then_bsub_hi |
| 116372 | 0, // GPR64all:dsub2_then_hsub |
| 116373 | 0, // GPR64all:dsub2_then_hsub_hi |
| 116374 | 0, // GPR64all:dsub2_then_ssub |
| 116375 | 0, // GPR64all:dsub2_then_ssub_hi |
| 116376 | 0, // GPR64all:psub1_then_psub |
| 116377 | 0, // GPR64all:qsub1_then_dsub_hi |
| 116378 | 0, // GPR64all:qsub3_then_dsub_hi |
| 116379 | 0, // GPR64all:qsub2_then_dsub_hi |
| 116380 | 0, // GPR64all:x8sub_7_then_sub_32 |
| 116381 | 0, // GPR64all:x8sub_7_then_sub_32_hi |
| 116382 | 0, // GPR64all:x8sub_6_then_sub_32 |
| 116383 | 0, // GPR64all:x8sub_6_then_sub_32_hi |
| 116384 | 0, // GPR64all:x8sub_5_then_sub_32 |
| 116385 | 0, // GPR64all:x8sub_5_then_sub_32_hi |
| 116386 | 0, // GPR64all:x8sub_4_then_sub_32 |
| 116387 | 0, // GPR64all:x8sub_4_then_sub_32_hi |
| 116388 | 0, // GPR64all:x8sub_3_then_sub_32 |
| 116389 | 0, // GPR64all:x8sub_3_then_sub_32_hi |
| 116390 | 0, // GPR64all:x8sub_2_then_sub_32 |
| 116391 | 0, // GPR64all:x8sub_2_then_sub_32_hi |
| 116392 | 0, // GPR64all:x8sub_1_then_sub_32 |
| 116393 | 0, // GPR64all:x8sub_1_then_sub_32_hi |
| 116394 | 0, // GPR64all:subo64_then_sub_32 |
| 116395 | 0, // GPR64all:subo64_then_sub_32_hi |
| 116396 | 0, // GPR64all:zsub1_then_zsub_hi |
| 116397 | 0, // GPR64all:zsub3_then_zsub_hi |
| 116398 | 0, // GPR64all:zsub2_then_zsub_hi |
| 116399 | 0, // GPR64all:dsub0_dsub1 |
| 116400 | 0, // GPR64all:dsub0_dsub1_dsub2 |
| 116401 | 0, // GPR64all:dsub1_dsub2 |
| 116402 | 0, // GPR64all:dsub1_dsub2_dsub3 |
| 116403 | 0, // GPR64all:dsub2_dsub3 |
| 116404 | 0, // GPR64all:dsub_dsub1 |
| 116405 | 0, // GPR64all:dsub_dsub1_dsub2_dsub3 |
| 116406 | 0, // GPR64all:dsub_dsub1_dsub2 |
| 116407 | 0, // GPR64all:qsub0_qsub1 |
| 116408 | 0, // GPR64all:qsub0_qsub1_qsub2 |
| 116409 | 0, // GPR64all:qsub1_qsub2 |
| 116410 | 0, // GPR64all:qsub1_qsub2_qsub3 |
| 116411 | 0, // GPR64all:qsub2_qsub3 |
| 116412 | 0, // GPR64all:sub_32_x8sub_1_then_sub_32 |
| 116413 | 0, // GPR64all:x8sub_0_x8sub_1 |
| 116414 | 0, // GPR64all:x8sub_2_x8sub_3 |
| 116415 | 0, // GPR64all:x8sub_4_x8sub_5 |
| 116416 | 0, // GPR64all:x8sub_6_x8sub_7 |
| 116417 | 0, // GPR64all:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116418 | 0, // GPR64all:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116419 | 0, // GPR64all:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116420 | 0, // GPR64all:sub_32_subo64_then_sub_32 |
| 116421 | 0, // GPR64all:zsub_qsub1 |
| 116422 | 0, // GPR64all:zsub_qsub1_qsub2_qsub3 |
| 116423 | 0, // GPR64all:zsub_qsub1_qsub2 |
| 116424 | 0, // GPR64all:zsub0_zsub1 |
| 116425 | 0, // GPR64all:zsub0_zsub1_zsub2 |
| 116426 | 0, // GPR64all:zsub1_zsub2 |
| 116427 | 0, // GPR64all:zsub1_zsub2_zsub3 |
| 116428 | 0, // GPR64all:zsub2_zsub3 |
| 116429 | 0, // GPR64all:zsub0_zsub2 |
| 116430 | 0, // GPR64all:zsub1_zsub3 |
| 116431 | }, |
| 116432 | { // FPR64 |
| 116433 | 7, // FPR64:bsub -> FPR8 |
| 116434 | 0, // FPR64:bsub_hi |
| 116435 | 0, // FPR64:dsub |
| 116436 | 0, // FPR64:dsub0 |
| 116437 | 0, // FPR64:dsub1 |
| 116438 | 0, // FPR64:dsub2 |
| 116439 | 0, // FPR64:dsub3 |
| 116440 | 0, // FPR64:dsub_hi |
| 116441 | 8, // FPR64:hsub -> FPR16 |
| 116442 | 0, // FPR64:hsub_hi |
| 116443 | 0, // FPR64:psub |
| 116444 | 0, // FPR64:psub0 |
| 116445 | 0, // FPR64:psub1 |
| 116446 | 0, // FPR64:qsub0 |
| 116447 | 0, // FPR64:qsub1 |
| 116448 | 0, // FPR64:qsub2 |
| 116449 | 0, // FPR64:qsub3 |
| 116450 | 40, // FPR64:ssub -> FPR32 |
| 116451 | 0, // FPR64:ssub_hi |
| 116452 | 0, // FPR64:sub_32 |
| 116453 | 0, // FPR64:sub_32_hi |
| 116454 | 0, // FPR64:sube32 |
| 116455 | 0, // FPR64:sube64 |
| 116456 | 0, // FPR64:subo32 |
| 116457 | 0, // FPR64:subo64 |
| 116458 | 0, // FPR64:x8sub_0 |
| 116459 | 0, // FPR64:x8sub_1 |
| 116460 | 0, // FPR64:x8sub_2 |
| 116461 | 0, // FPR64:x8sub_3 |
| 116462 | 0, // FPR64:x8sub_4 |
| 116463 | 0, // FPR64:x8sub_5 |
| 116464 | 0, // FPR64:x8sub_6 |
| 116465 | 0, // FPR64:x8sub_7 |
| 116466 | 0, // FPR64:zasubb |
| 116467 | 0, // FPR64:zasubd0 |
| 116468 | 0, // FPR64:zasubd1 |
| 116469 | 0, // FPR64:zasubh0 |
| 116470 | 0, // FPR64:zasubh1 |
| 116471 | 0, // FPR64:zasubq0 |
| 116472 | 0, // FPR64:zasubq1 |
| 116473 | 0, // FPR64:zasubs0 |
| 116474 | 0, // FPR64:zasubs1 |
| 116475 | 0, // FPR64:zsub |
| 116476 | 0, // FPR64:zsub0 |
| 116477 | 0, // FPR64:zsub1 |
| 116478 | 0, // FPR64:zsub2 |
| 116479 | 0, // FPR64:zsub3 |
| 116480 | 0, // FPR64:zsub_hi |
| 116481 | 0, // FPR64:zasubd1_then_zasubq0 |
| 116482 | 0, // FPR64:zasubd1_then_zasubq1 |
| 116483 | 0, // FPR64:zasubs1_then_zasubd0 |
| 116484 | 0, // FPR64:zasubs1_then_zasubd1 |
| 116485 | 0, // FPR64:zasubs1_then_zasubq0 |
| 116486 | 0, // FPR64:zasubs1_then_zasubq1 |
| 116487 | 0, // FPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 116488 | 0, // FPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 116489 | 0, // FPR64:zasubh1_then_zasubd0 |
| 116490 | 0, // FPR64:zasubh1_then_zasubd1 |
| 116491 | 0, // FPR64:zasubh1_then_zasubq0 |
| 116492 | 0, // FPR64:zasubh1_then_zasubq1 |
| 116493 | 0, // FPR64:zasubh1_then_zasubs0 |
| 116494 | 0, // FPR64:zasubh1_then_zasubs1 |
| 116495 | 0, // FPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 116496 | 0, // FPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 116497 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 116498 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 116499 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 116500 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 116501 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116502 | 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116503 | 0, // FPR64:dsub1_then_bsub |
| 116504 | 0, // FPR64:dsub1_then_bsub_hi |
| 116505 | 0, // FPR64:dsub1_then_hsub |
| 116506 | 0, // FPR64:dsub1_then_hsub_hi |
| 116507 | 0, // FPR64:dsub1_then_ssub |
| 116508 | 0, // FPR64:dsub1_then_ssub_hi |
| 116509 | 0, // FPR64:dsub3_then_bsub |
| 116510 | 0, // FPR64:dsub3_then_bsub_hi |
| 116511 | 0, // FPR64:dsub3_then_hsub |
| 116512 | 0, // FPR64:dsub3_then_hsub_hi |
| 116513 | 0, // FPR64:dsub3_then_ssub |
| 116514 | 0, // FPR64:dsub3_then_ssub_hi |
| 116515 | 0, // FPR64:dsub2_then_bsub |
| 116516 | 0, // FPR64:dsub2_then_bsub_hi |
| 116517 | 0, // FPR64:dsub2_then_hsub |
| 116518 | 0, // FPR64:dsub2_then_hsub_hi |
| 116519 | 0, // FPR64:dsub2_then_ssub |
| 116520 | 0, // FPR64:dsub2_then_ssub_hi |
| 116521 | 0, // FPR64:psub1_then_psub |
| 116522 | 0, // FPR64:qsub1_then_dsub_hi |
| 116523 | 0, // FPR64:qsub3_then_dsub_hi |
| 116524 | 0, // FPR64:qsub2_then_dsub_hi |
| 116525 | 0, // FPR64:x8sub_7_then_sub_32 |
| 116526 | 0, // FPR64:x8sub_7_then_sub_32_hi |
| 116527 | 0, // FPR64:x8sub_6_then_sub_32 |
| 116528 | 0, // FPR64:x8sub_6_then_sub_32_hi |
| 116529 | 0, // FPR64:x8sub_5_then_sub_32 |
| 116530 | 0, // FPR64:x8sub_5_then_sub_32_hi |
| 116531 | 0, // FPR64:x8sub_4_then_sub_32 |
| 116532 | 0, // FPR64:x8sub_4_then_sub_32_hi |
| 116533 | 0, // FPR64:x8sub_3_then_sub_32 |
| 116534 | 0, // FPR64:x8sub_3_then_sub_32_hi |
| 116535 | 0, // FPR64:x8sub_2_then_sub_32 |
| 116536 | 0, // FPR64:x8sub_2_then_sub_32_hi |
| 116537 | 0, // FPR64:x8sub_1_then_sub_32 |
| 116538 | 0, // FPR64:x8sub_1_then_sub_32_hi |
| 116539 | 0, // FPR64:subo64_then_sub_32 |
| 116540 | 0, // FPR64:subo64_then_sub_32_hi |
| 116541 | 0, // FPR64:zsub1_then_zsub_hi |
| 116542 | 0, // FPR64:zsub3_then_zsub_hi |
| 116543 | 0, // FPR64:zsub2_then_zsub_hi |
| 116544 | 0, // FPR64:dsub0_dsub1 |
| 116545 | 0, // FPR64:dsub0_dsub1_dsub2 |
| 116546 | 0, // FPR64:dsub1_dsub2 |
| 116547 | 0, // FPR64:dsub1_dsub2_dsub3 |
| 116548 | 0, // FPR64:dsub2_dsub3 |
| 116549 | 0, // FPR64:dsub_dsub1 |
| 116550 | 0, // FPR64:dsub_dsub1_dsub2_dsub3 |
| 116551 | 0, // FPR64:dsub_dsub1_dsub2 |
| 116552 | 0, // FPR64:qsub0_qsub1 |
| 116553 | 0, // FPR64:qsub0_qsub1_qsub2 |
| 116554 | 0, // FPR64:qsub1_qsub2 |
| 116555 | 0, // FPR64:qsub1_qsub2_qsub3 |
| 116556 | 0, // FPR64:qsub2_qsub3 |
| 116557 | 0, // FPR64:sub_32_x8sub_1_then_sub_32 |
| 116558 | 0, // FPR64:x8sub_0_x8sub_1 |
| 116559 | 0, // FPR64:x8sub_2_x8sub_3 |
| 116560 | 0, // FPR64:x8sub_4_x8sub_5 |
| 116561 | 0, // FPR64:x8sub_6_x8sub_7 |
| 116562 | 0, // FPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116563 | 0, // FPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116564 | 0, // FPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116565 | 0, // FPR64:sub_32_subo64_then_sub_32 |
| 116566 | 0, // FPR64:zsub_qsub1 |
| 116567 | 0, // FPR64:zsub_qsub1_qsub2_qsub3 |
| 116568 | 0, // FPR64:zsub_qsub1_qsub2 |
| 116569 | 0, // FPR64:zsub0_zsub1 |
| 116570 | 0, // FPR64:zsub0_zsub1_zsub2 |
| 116571 | 0, // FPR64:zsub1_zsub2 |
| 116572 | 0, // FPR64:zsub1_zsub2_zsub3 |
| 116573 | 0, // FPR64:zsub2_zsub3 |
| 116574 | 0, // FPR64:zsub0_zsub2 |
| 116575 | 0, // FPR64:zsub1_zsub3 |
| 116576 | }, |
| 116577 | { // GPR64 |
| 116578 | 0, // GPR64:bsub |
| 116579 | 0, // GPR64:bsub_hi |
| 116580 | 0, // GPR64:dsub |
| 116581 | 0, // GPR64:dsub0 |
| 116582 | 0, // GPR64:dsub1 |
| 116583 | 0, // GPR64:dsub2 |
| 116584 | 0, // GPR64:dsub3 |
| 116585 | 0, // GPR64:dsub_hi |
| 116586 | 0, // GPR64:hsub |
| 116587 | 0, // GPR64:hsub_hi |
| 116588 | 0, // GPR64:psub |
| 116589 | 0, // GPR64:psub0 |
| 116590 | 0, // GPR64:psub1 |
| 116591 | 0, // GPR64:qsub0 |
| 116592 | 0, // GPR64:qsub1 |
| 116593 | 0, // GPR64:qsub2 |
| 116594 | 0, // GPR64:qsub3 |
| 116595 | 0, // GPR64:ssub |
| 116596 | 0, // GPR64:ssub_hi |
| 116597 | 41, // GPR64:sub_32 -> GPR32 |
| 116598 | 0, // GPR64:sub_32_hi |
| 116599 | 0, // GPR64:sube32 |
| 116600 | 0, // GPR64:sube64 |
| 116601 | 0, // GPR64:subo32 |
| 116602 | 0, // GPR64:subo64 |
| 116603 | 0, // GPR64:x8sub_0 |
| 116604 | 0, // GPR64:x8sub_1 |
| 116605 | 0, // GPR64:x8sub_2 |
| 116606 | 0, // GPR64:x8sub_3 |
| 116607 | 0, // GPR64:x8sub_4 |
| 116608 | 0, // GPR64:x8sub_5 |
| 116609 | 0, // GPR64:x8sub_6 |
| 116610 | 0, // GPR64:x8sub_7 |
| 116611 | 0, // GPR64:zasubb |
| 116612 | 0, // GPR64:zasubd0 |
| 116613 | 0, // GPR64:zasubd1 |
| 116614 | 0, // GPR64:zasubh0 |
| 116615 | 0, // GPR64:zasubh1 |
| 116616 | 0, // GPR64:zasubq0 |
| 116617 | 0, // GPR64:zasubq1 |
| 116618 | 0, // GPR64:zasubs0 |
| 116619 | 0, // GPR64:zasubs1 |
| 116620 | 0, // GPR64:zsub |
| 116621 | 0, // GPR64:zsub0 |
| 116622 | 0, // GPR64:zsub1 |
| 116623 | 0, // GPR64:zsub2 |
| 116624 | 0, // GPR64:zsub3 |
| 116625 | 0, // GPR64:zsub_hi |
| 116626 | 0, // GPR64:zasubd1_then_zasubq0 |
| 116627 | 0, // GPR64:zasubd1_then_zasubq1 |
| 116628 | 0, // GPR64:zasubs1_then_zasubd0 |
| 116629 | 0, // GPR64:zasubs1_then_zasubd1 |
| 116630 | 0, // GPR64:zasubs1_then_zasubq0 |
| 116631 | 0, // GPR64:zasubs1_then_zasubq1 |
| 116632 | 0, // GPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 116633 | 0, // GPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 116634 | 0, // GPR64:zasubh1_then_zasubd0 |
| 116635 | 0, // GPR64:zasubh1_then_zasubd1 |
| 116636 | 0, // GPR64:zasubh1_then_zasubq0 |
| 116637 | 0, // GPR64:zasubh1_then_zasubq1 |
| 116638 | 0, // GPR64:zasubh1_then_zasubs0 |
| 116639 | 0, // GPR64:zasubh1_then_zasubs1 |
| 116640 | 0, // GPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 116641 | 0, // GPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 116642 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 116643 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 116644 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 116645 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 116646 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116647 | 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116648 | 0, // GPR64:dsub1_then_bsub |
| 116649 | 0, // GPR64:dsub1_then_bsub_hi |
| 116650 | 0, // GPR64:dsub1_then_hsub |
| 116651 | 0, // GPR64:dsub1_then_hsub_hi |
| 116652 | 0, // GPR64:dsub1_then_ssub |
| 116653 | 0, // GPR64:dsub1_then_ssub_hi |
| 116654 | 0, // GPR64:dsub3_then_bsub |
| 116655 | 0, // GPR64:dsub3_then_bsub_hi |
| 116656 | 0, // GPR64:dsub3_then_hsub |
| 116657 | 0, // GPR64:dsub3_then_hsub_hi |
| 116658 | 0, // GPR64:dsub3_then_ssub |
| 116659 | 0, // GPR64:dsub3_then_ssub_hi |
| 116660 | 0, // GPR64:dsub2_then_bsub |
| 116661 | 0, // GPR64:dsub2_then_bsub_hi |
| 116662 | 0, // GPR64:dsub2_then_hsub |
| 116663 | 0, // GPR64:dsub2_then_hsub_hi |
| 116664 | 0, // GPR64:dsub2_then_ssub |
| 116665 | 0, // GPR64:dsub2_then_ssub_hi |
| 116666 | 0, // GPR64:psub1_then_psub |
| 116667 | 0, // GPR64:qsub1_then_dsub_hi |
| 116668 | 0, // GPR64:qsub3_then_dsub_hi |
| 116669 | 0, // GPR64:qsub2_then_dsub_hi |
| 116670 | 0, // GPR64:x8sub_7_then_sub_32 |
| 116671 | 0, // GPR64:x8sub_7_then_sub_32_hi |
| 116672 | 0, // GPR64:x8sub_6_then_sub_32 |
| 116673 | 0, // GPR64:x8sub_6_then_sub_32_hi |
| 116674 | 0, // GPR64:x8sub_5_then_sub_32 |
| 116675 | 0, // GPR64:x8sub_5_then_sub_32_hi |
| 116676 | 0, // GPR64:x8sub_4_then_sub_32 |
| 116677 | 0, // GPR64:x8sub_4_then_sub_32_hi |
| 116678 | 0, // GPR64:x8sub_3_then_sub_32 |
| 116679 | 0, // GPR64:x8sub_3_then_sub_32_hi |
| 116680 | 0, // GPR64:x8sub_2_then_sub_32 |
| 116681 | 0, // GPR64:x8sub_2_then_sub_32_hi |
| 116682 | 0, // GPR64:x8sub_1_then_sub_32 |
| 116683 | 0, // GPR64:x8sub_1_then_sub_32_hi |
| 116684 | 0, // GPR64:subo64_then_sub_32 |
| 116685 | 0, // GPR64:subo64_then_sub_32_hi |
| 116686 | 0, // GPR64:zsub1_then_zsub_hi |
| 116687 | 0, // GPR64:zsub3_then_zsub_hi |
| 116688 | 0, // GPR64:zsub2_then_zsub_hi |
| 116689 | 0, // GPR64:dsub0_dsub1 |
| 116690 | 0, // GPR64:dsub0_dsub1_dsub2 |
| 116691 | 0, // GPR64:dsub1_dsub2 |
| 116692 | 0, // GPR64:dsub1_dsub2_dsub3 |
| 116693 | 0, // GPR64:dsub2_dsub3 |
| 116694 | 0, // GPR64:dsub_dsub1 |
| 116695 | 0, // GPR64:dsub_dsub1_dsub2_dsub3 |
| 116696 | 0, // GPR64:dsub_dsub1_dsub2 |
| 116697 | 0, // GPR64:qsub0_qsub1 |
| 116698 | 0, // GPR64:qsub0_qsub1_qsub2 |
| 116699 | 0, // GPR64:qsub1_qsub2 |
| 116700 | 0, // GPR64:qsub1_qsub2_qsub3 |
| 116701 | 0, // GPR64:qsub2_qsub3 |
| 116702 | 0, // GPR64:sub_32_x8sub_1_then_sub_32 |
| 116703 | 0, // GPR64:x8sub_0_x8sub_1 |
| 116704 | 0, // GPR64:x8sub_2_x8sub_3 |
| 116705 | 0, // GPR64:x8sub_4_x8sub_5 |
| 116706 | 0, // GPR64:x8sub_6_x8sub_7 |
| 116707 | 0, // GPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116708 | 0, // GPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116709 | 0, // GPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116710 | 0, // GPR64:sub_32_subo64_then_sub_32 |
| 116711 | 0, // GPR64:zsub_qsub1 |
| 116712 | 0, // GPR64:zsub_qsub1_qsub2_qsub3 |
| 116713 | 0, // GPR64:zsub_qsub1_qsub2 |
| 116714 | 0, // GPR64:zsub0_zsub1 |
| 116715 | 0, // GPR64:zsub0_zsub1_zsub2 |
| 116716 | 0, // GPR64:zsub1_zsub2 |
| 116717 | 0, // GPR64:zsub1_zsub2_zsub3 |
| 116718 | 0, // GPR64:zsub2_zsub3 |
| 116719 | 0, // GPR64:zsub0_zsub2 |
| 116720 | 0, // GPR64:zsub1_zsub3 |
| 116721 | }, |
| 116722 | { // GPR64sp |
| 116723 | 0, // GPR64sp:bsub |
| 116724 | 0, // GPR64sp:bsub_hi |
| 116725 | 0, // GPR64sp:dsub |
| 116726 | 0, // GPR64sp:dsub0 |
| 116727 | 0, // GPR64sp:dsub1 |
| 116728 | 0, // GPR64sp:dsub2 |
| 116729 | 0, // GPR64sp:dsub3 |
| 116730 | 0, // GPR64sp:dsub_hi |
| 116731 | 0, // GPR64sp:hsub |
| 116732 | 0, // GPR64sp:hsub_hi |
| 116733 | 0, // GPR64sp:psub |
| 116734 | 0, // GPR64sp:psub0 |
| 116735 | 0, // GPR64sp:psub1 |
| 116736 | 0, // GPR64sp:qsub0 |
| 116737 | 0, // GPR64sp:qsub1 |
| 116738 | 0, // GPR64sp:qsub2 |
| 116739 | 0, // GPR64sp:qsub3 |
| 116740 | 0, // GPR64sp:ssub |
| 116741 | 0, // GPR64sp:ssub_hi |
| 116742 | 42, // GPR64sp:sub_32 -> GPR32sp |
| 116743 | 0, // GPR64sp:sub_32_hi |
| 116744 | 0, // GPR64sp:sube32 |
| 116745 | 0, // GPR64sp:sube64 |
| 116746 | 0, // GPR64sp:subo32 |
| 116747 | 0, // GPR64sp:subo64 |
| 116748 | 0, // GPR64sp:x8sub_0 |
| 116749 | 0, // GPR64sp:x8sub_1 |
| 116750 | 0, // GPR64sp:x8sub_2 |
| 116751 | 0, // GPR64sp:x8sub_3 |
| 116752 | 0, // GPR64sp:x8sub_4 |
| 116753 | 0, // GPR64sp:x8sub_5 |
| 116754 | 0, // GPR64sp:x8sub_6 |
| 116755 | 0, // GPR64sp:x8sub_7 |
| 116756 | 0, // GPR64sp:zasubb |
| 116757 | 0, // GPR64sp:zasubd0 |
| 116758 | 0, // GPR64sp:zasubd1 |
| 116759 | 0, // GPR64sp:zasubh0 |
| 116760 | 0, // GPR64sp:zasubh1 |
| 116761 | 0, // GPR64sp:zasubq0 |
| 116762 | 0, // GPR64sp:zasubq1 |
| 116763 | 0, // GPR64sp:zasubs0 |
| 116764 | 0, // GPR64sp:zasubs1 |
| 116765 | 0, // GPR64sp:zsub |
| 116766 | 0, // GPR64sp:zsub0 |
| 116767 | 0, // GPR64sp:zsub1 |
| 116768 | 0, // GPR64sp:zsub2 |
| 116769 | 0, // GPR64sp:zsub3 |
| 116770 | 0, // GPR64sp:zsub_hi |
| 116771 | 0, // GPR64sp:zasubd1_then_zasubq0 |
| 116772 | 0, // GPR64sp:zasubd1_then_zasubq1 |
| 116773 | 0, // GPR64sp:zasubs1_then_zasubd0 |
| 116774 | 0, // GPR64sp:zasubs1_then_zasubd1 |
| 116775 | 0, // GPR64sp:zasubs1_then_zasubq0 |
| 116776 | 0, // GPR64sp:zasubs1_then_zasubq1 |
| 116777 | 0, // GPR64sp:zasubs1_then_zasubd1_then_zasubq0 |
| 116778 | 0, // GPR64sp:zasubs1_then_zasubd1_then_zasubq1 |
| 116779 | 0, // GPR64sp:zasubh1_then_zasubd0 |
| 116780 | 0, // GPR64sp:zasubh1_then_zasubd1 |
| 116781 | 0, // GPR64sp:zasubh1_then_zasubq0 |
| 116782 | 0, // GPR64sp:zasubh1_then_zasubq1 |
| 116783 | 0, // GPR64sp:zasubh1_then_zasubs0 |
| 116784 | 0, // GPR64sp:zasubh1_then_zasubs1 |
| 116785 | 0, // GPR64sp:zasubh1_then_zasubd1_then_zasubq0 |
| 116786 | 0, // GPR64sp:zasubh1_then_zasubd1_then_zasubq1 |
| 116787 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd0 |
| 116788 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1 |
| 116789 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubq0 |
| 116790 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubq1 |
| 116791 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116792 | 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116793 | 0, // GPR64sp:dsub1_then_bsub |
| 116794 | 0, // GPR64sp:dsub1_then_bsub_hi |
| 116795 | 0, // GPR64sp:dsub1_then_hsub |
| 116796 | 0, // GPR64sp:dsub1_then_hsub_hi |
| 116797 | 0, // GPR64sp:dsub1_then_ssub |
| 116798 | 0, // GPR64sp:dsub1_then_ssub_hi |
| 116799 | 0, // GPR64sp:dsub3_then_bsub |
| 116800 | 0, // GPR64sp:dsub3_then_bsub_hi |
| 116801 | 0, // GPR64sp:dsub3_then_hsub |
| 116802 | 0, // GPR64sp:dsub3_then_hsub_hi |
| 116803 | 0, // GPR64sp:dsub3_then_ssub |
| 116804 | 0, // GPR64sp:dsub3_then_ssub_hi |
| 116805 | 0, // GPR64sp:dsub2_then_bsub |
| 116806 | 0, // GPR64sp:dsub2_then_bsub_hi |
| 116807 | 0, // GPR64sp:dsub2_then_hsub |
| 116808 | 0, // GPR64sp:dsub2_then_hsub_hi |
| 116809 | 0, // GPR64sp:dsub2_then_ssub |
| 116810 | 0, // GPR64sp:dsub2_then_ssub_hi |
| 116811 | 0, // GPR64sp:psub1_then_psub |
| 116812 | 0, // GPR64sp:qsub1_then_dsub_hi |
| 116813 | 0, // GPR64sp:qsub3_then_dsub_hi |
| 116814 | 0, // GPR64sp:qsub2_then_dsub_hi |
| 116815 | 0, // GPR64sp:x8sub_7_then_sub_32 |
| 116816 | 0, // GPR64sp:x8sub_7_then_sub_32_hi |
| 116817 | 0, // GPR64sp:x8sub_6_then_sub_32 |
| 116818 | 0, // GPR64sp:x8sub_6_then_sub_32_hi |
| 116819 | 0, // GPR64sp:x8sub_5_then_sub_32 |
| 116820 | 0, // GPR64sp:x8sub_5_then_sub_32_hi |
| 116821 | 0, // GPR64sp:x8sub_4_then_sub_32 |
| 116822 | 0, // GPR64sp:x8sub_4_then_sub_32_hi |
| 116823 | 0, // GPR64sp:x8sub_3_then_sub_32 |
| 116824 | 0, // GPR64sp:x8sub_3_then_sub_32_hi |
| 116825 | 0, // GPR64sp:x8sub_2_then_sub_32 |
| 116826 | 0, // GPR64sp:x8sub_2_then_sub_32_hi |
| 116827 | 0, // GPR64sp:x8sub_1_then_sub_32 |
| 116828 | 0, // GPR64sp:x8sub_1_then_sub_32_hi |
| 116829 | 0, // GPR64sp:subo64_then_sub_32 |
| 116830 | 0, // GPR64sp:subo64_then_sub_32_hi |
| 116831 | 0, // GPR64sp:zsub1_then_zsub_hi |
| 116832 | 0, // GPR64sp:zsub3_then_zsub_hi |
| 116833 | 0, // GPR64sp:zsub2_then_zsub_hi |
| 116834 | 0, // GPR64sp:dsub0_dsub1 |
| 116835 | 0, // GPR64sp:dsub0_dsub1_dsub2 |
| 116836 | 0, // GPR64sp:dsub1_dsub2 |
| 116837 | 0, // GPR64sp:dsub1_dsub2_dsub3 |
| 116838 | 0, // GPR64sp:dsub2_dsub3 |
| 116839 | 0, // GPR64sp:dsub_dsub1 |
| 116840 | 0, // GPR64sp:dsub_dsub1_dsub2_dsub3 |
| 116841 | 0, // GPR64sp:dsub_dsub1_dsub2 |
| 116842 | 0, // GPR64sp:qsub0_qsub1 |
| 116843 | 0, // GPR64sp:qsub0_qsub1_qsub2 |
| 116844 | 0, // GPR64sp:qsub1_qsub2 |
| 116845 | 0, // GPR64sp:qsub1_qsub2_qsub3 |
| 116846 | 0, // GPR64sp:qsub2_qsub3 |
| 116847 | 0, // GPR64sp:sub_32_x8sub_1_then_sub_32 |
| 116848 | 0, // GPR64sp:x8sub_0_x8sub_1 |
| 116849 | 0, // GPR64sp:x8sub_2_x8sub_3 |
| 116850 | 0, // GPR64sp:x8sub_4_x8sub_5 |
| 116851 | 0, // GPR64sp:x8sub_6_x8sub_7 |
| 116852 | 0, // GPR64sp:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116853 | 0, // GPR64sp:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116854 | 0, // GPR64sp:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 116855 | 0, // GPR64sp:sub_32_subo64_then_sub_32 |
| 116856 | 0, // GPR64sp:zsub_qsub1 |
| 116857 | 0, // GPR64sp:zsub_qsub1_qsub2_qsub3 |
| 116858 | 0, // GPR64sp:zsub_qsub1_qsub2 |
| 116859 | 0, // GPR64sp:zsub0_zsub1 |
| 116860 | 0, // GPR64sp:zsub0_zsub1_zsub2 |
| 116861 | 0, // GPR64sp:zsub1_zsub2 |
| 116862 | 0, // GPR64sp:zsub1_zsub2_zsub3 |
| 116863 | 0, // GPR64sp:zsub2_zsub3 |
| 116864 | 0, // GPR64sp:zsub0_zsub2 |
| 116865 | 0, // GPR64sp:zsub1_zsub3 |
| 116866 | }, |
| 116867 | { // GPR64common |
| 116868 | 0, // GPR64common:bsub |
| 116869 | 0, // GPR64common:bsub_hi |
| 116870 | 0, // GPR64common:dsub |
| 116871 | 0, // GPR64common:dsub0 |
| 116872 | 0, // GPR64common:dsub1 |
| 116873 | 0, // GPR64common:dsub2 |
| 116874 | 0, // GPR64common:dsub3 |
| 116875 | 0, // GPR64common:dsub_hi |
| 116876 | 0, // GPR64common:hsub |
| 116877 | 0, // GPR64common:hsub_hi |
| 116878 | 0, // GPR64common:psub |
| 116879 | 0, // GPR64common:psub0 |
| 116880 | 0, // GPR64common:psub1 |
| 116881 | 0, // GPR64common:qsub0 |
| 116882 | 0, // GPR64common:qsub1 |
| 116883 | 0, // GPR64common:qsub2 |
| 116884 | 0, // GPR64common:qsub3 |
| 116885 | 0, // GPR64common:ssub |
| 116886 | 0, // GPR64common:ssub_hi |
| 116887 | 43, // GPR64common:sub_32 -> GPR32common |
| 116888 | 0, // GPR64common:sub_32_hi |
| 116889 | 0, // GPR64common:sube32 |
| 116890 | 0, // GPR64common:sube64 |
| 116891 | 0, // GPR64common:subo32 |
| 116892 | 0, // GPR64common:subo64 |
| 116893 | 0, // GPR64common:x8sub_0 |
| 116894 | 0, // GPR64common:x8sub_1 |
| 116895 | 0, // GPR64common:x8sub_2 |
| 116896 | 0, // GPR64common:x8sub_3 |
| 116897 | 0, // GPR64common:x8sub_4 |
| 116898 | 0, // GPR64common:x8sub_5 |
| 116899 | 0, // GPR64common:x8sub_6 |
| 116900 | 0, // GPR64common:x8sub_7 |
| 116901 | 0, // GPR64common:zasubb |
| 116902 | 0, // GPR64common:zasubd0 |
| 116903 | 0, // GPR64common:zasubd1 |
| 116904 | 0, // GPR64common:zasubh0 |
| 116905 | 0, // GPR64common:zasubh1 |
| 116906 | 0, // GPR64common:zasubq0 |
| 116907 | 0, // GPR64common:zasubq1 |
| 116908 | 0, // GPR64common:zasubs0 |
| 116909 | 0, // GPR64common:zasubs1 |
| 116910 | 0, // GPR64common:zsub |
| 116911 | 0, // GPR64common:zsub0 |
| 116912 | 0, // GPR64common:zsub1 |
| 116913 | 0, // GPR64common:zsub2 |
| 116914 | 0, // GPR64common:zsub3 |
| 116915 | 0, // GPR64common:zsub_hi |
| 116916 | 0, // GPR64common:zasubd1_then_zasubq0 |
| 116917 | 0, // GPR64common:zasubd1_then_zasubq1 |
| 116918 | 0, // GPR64common:zasubs1_then_zasubd0 |
| 116919 | 0, // GPR64common:zasubs1_then_zasubd1 |
| 116920 | 0, // GPR64common:zasubs1_then_zasubq0 |
| 116921 | 0, // GPR64common:zasubs1_then_zasubq1 |
| 116922 | 0, // GPR64common:zasubs1_then_zasubd1_then_zasubq0 |
| 116923 | 0, // GPR64common:zasubs1_then_zasubd1_then_zasubq1 |
| 116924 | 0, // GPR64common:zasubh1_then_zasubd0 |
| 116925 | 0, // GPR64common:zasubh1_then_zasubd1 |
| 116926 | 0, // GPR64common:zasubh1_then_zasubq0 |
| 116927 | 0, // GPR64common:zasubh1_then_zasubq1 |
| 116928 | 0, // GPR64common:zasubh1_then_zasubs0 |
| 116929 | 0, // GPR64common:zasubh1_then_zasubs1 |
| 116930 | 0, // GPR64common:zasubh1_then_zasubd1_then_zasubq0 |
| 116931 | 0, // GPR64common:zasubh1_then_zasubd1_then_zasubq1 |
| 116932 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd0 |
| 116933 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1 |
| 116934 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubq0 |
| 116935 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubq1 |
| 116936 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 116937 | 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 116938 | 0, // GPR64common:dsub1_then_bsub |
| 116939 | 0, // GPR64common:dsub1_then_bsub_hi |
| 116940 | 0, // GPR64common:dsub1_then_hsub |
| 116941 | 0, // GPR64common:dsub1_then_hsub_hi |
| 116942 | 0, // GPR64common:dsub1_then_ssub |
| 116943 | 0, // GPR64common:dsub1_then_ssub_hi |
| 116944 | 0, // GPR64common:dsub3_then_bsub |
| 116945 | 0, // GPR64common:dsub3_then_bsub_hi |
| 116946 | 0, // GPR64common:dsub3_then_hsub |
| 116947 | 0, // GPR64common:dsub3_then_hsub_hi |
| 116948 | 0, // GPR64common:dsub3_then_ssub |
| 116949 | 0, // GPR64common:dsub3_then_ssub_hi |
| 116950 | 0, // GPR64common:dsub2_then_bsub |
| 116951 | 0, // GPR64common:dsub2_then_bsub_hi |
| 116952 | 0, // GPR64common:dsub2_then_hsub |
| 116953 | 0, // GPR64common:dsub2_then_hsub_hi |
| 116954 | 0, // GPR64common:dsub2_then_ssub |
| 116955 | 0, // GPR64common:dsub2_then_ssub_hi |
| 116956 | 0, // GPR64common:psub1_then_psub |
| 116957 | 0, // GPR64common:qsub1_then_dsub_hi |
| 116958 | 0, // GPR64common:qsub3_then_dsub_hi |
| 116959 | 0, // GPR64common:qsub2_then_dsub_hi |
| 116960 | 0, // GPR64common:x8sub_7_then_sub_32 |
| 116961 | 0, // GPR64common:x8sub_7_then_sub_32_hi |
| 116962 | 0, // GPR64common:x8sub_6_then_sub_32 |
| 116963 | 0, // GPR64common:x8sub_6_then_sub_32_hi |
| 116964 | 0, // GPR64common:x8sub_5_then_sub_32 |
| 116965 | 0, // GPR64common:x8sub_5_then_sub_32_hi |
| 116966 | 0, // GPR64common:x8sub_4_then_sub_32 |
| 116967 | 0, // GPR64common:x8sub_4_then_sub_32_hi |
| 116968 | 0, // GPR64common:x8sub_3_then_sub_32 |
| 116969 | 0, // GPR64common:x8sub_3_then_sub_32_hi |
| 116970 | 0, // GPR64common:x8sub_2_then_sub_32 |
| 116971 | 0, // GPR64common:x8sub_2_then_sub_32_hi |
| 116972 | 0, // GPR64common:x8sub_1_then_sub_32 |
| 116973 | 0, // GPR64common:x8sub_1_then_sub_32_hi |
| 116974 | 0, // GPR64common:subo64_then_sub_32 |
| 116975 | 0, // GPR64common:subo64_then_sub_32_hi |
| 116976 | 0, // GPR64common:zsub1_then_zsub_hi |
| 116977 | 0, // GPR64common:zsub3_then_zsub_hi |
| 116978 | 0, // GPR64common:zsub2_then_zsub_hi |
| 116979 | 0, // GPR64common:dsub0_dsub1 |
| 116980 | 0, // GPR64common:dsub0_dsub1_dsub2 |
| 116981 | 0, // GPR64common:dsub1_dsub2 |
| 116982 | 0, // GPR64common:dsub1_dsub2_dsub3 |
| 116983 | 0, // GPR64common:dsub2_dsub3 |
| 116984 | 0, // GPR64common:dsub_dsub1 |
| 116985 | 0, // GPR64common:dsub_dsub1_dsub2_dsub3 |
| 116986 | 0, // GPR64common:dsub_dsub1_dsub2 |
| 116987 | 0, // GPR64common:qsub0_qsub1 |
| 116988 | 0, // GPR64common:qsub0_qsub1_qsub2 |
| 116989 | 0, // GPR64common:qsub1_qsub2 |
| 116990 | 0, // GPR64common:qsub1_qsub2_qsub3 |
| 116991 | 0, // GPR64common:qsub2_qsub3 |
| 116992 | 0, // GPR64common:sub_32_x8sub_1_then_sub_32 |
| 116993 | 0, // GPR64common:x8sub_0_x8sub_1 |
| 116994 | 0, // GPR64common:x8sub_2_x8sub_3 |
| 116995 | 0, // GPR64common:x8sub_4_x8sub_5 |
| 116996 | 0, // GPR64common:x8sub_6_x8sub_7 |
| 116997 | 0, // GPR64common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 116998 | 0, // GPR64common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 116999 | 0, // GPR64common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117000 | 0, // GPR64common:sub_32_subo64_then_sub_32 |
| 117001 | 0, // GPR64common:zsub_qsub1 |
| 117002 | 0, // GPR64common:zsub_qsub1_qsub2_qsub3 |
| 117003 | 0, // GPR64common:zsub_qsub1_qsub2 |
| 117004 | 0, // GPR64common:zsub0_zsub1 |
| 117005 | 0, // GPR64common:zsub0_zsub1_zsub2 |
| 117006 | 0, // GPR64common:zsub1_zsub2 |
| 117007 | 0, // GPR64common:zsub1_zsub2_zsub3 |
| 117008 | 0, // GPR64common:zsub2_zsub3 |
| 117009 | 0, // GPR64common:zsub0_zsub2 |
| 117010 | 0, // GPR64common:zsub1_zsub3 |
| 117011 | }, |
| 117012 | { // GPR64noip |
| 117013 | 0, // GPR64noip:bsub |
| 117014 | 0, // GPR64noip:bsub_hi |
| 117015 | 0, // GPR64noip:dsub |
| 117016 | 0, // GPR64noip:dsub0 |
| 117017 | 0, // GPR64noip:dsub1 |
| 117018 | 0, // GPR64noip:dsub2 |
| 117019 | 0, // GPR64noip:dsub3 |
| 117020 | 0, // GPR64noip:dsub_hi |
| 117021 | 0, // GPR64noip:hsub |
| 117022 | 0, // GPR64noip:hsub_hi |
| 117023 | 0, // GPR64noip:psub |
| 117024 | 0, // GPR64noip:psub0 |
| 117025 | 0, // GPR64noip:psub1 |
| 117026 | 0, // GPR64noip:qsub0 |
| 117027 | 0, // GPR64noip:qsub1 |
| 117028 | 0, // GPR64noip:qsub2 |
| 117029 | 0, // GPR64noip:qsub3 |
| 117030 | 0, // GPR64noip:ssub |
| 117031 | 0, // GPR64noip:ssub_hi |
| 117032 | 41, // GPR64noip:sub_32 -> GPR32 |
| 117033 | 0, // GPR64noip:sub_32_hi |
| 117034 | 0, // GPR64noip:sube32 |
| 117035 | 0, // GPR64noip:sube64 |
| 117036 | 0, // GPR64noip:subo32 |
| 117037 | 0, // GPR64noip:subo64 |
| 117038 | 0, // GPR64noip:x8sub_0 |
| 117039 | 0, // GPR64noip:x8sub_1 |
| 117040 | 0, // GPR64noip:x8sub_2 |
| 117041 | 0, // GPR64noip:x8sub_3 |
| 117042 | 0, // GPR64noip:x8sub_4 |
| 117043 | 0, // GPR64noip:x8sub_5 |
| 117044 | 0, // GPR64noip:x8sub_6 |
| 117045 | 0, // GPR64noip:x8sub_7 |
| 117046 | 0, // GPR64noip:zasubb |
| 117047 | 0, // GPR64noip:zasubd0 |
| 117048 | 0, // GPR64noip:zasubd1 |
| 117049 | 0, // GPR64noip:zasubh0 |
| 117050 | 0, // GPR64noip:zasubh1 |
| 117051 | 0, // GPR64noip:zasubq0 |
| 117052 | 0, // GPR64noip:zasubq1 |
| 117053 | 0, // GPR64noip:zasubs0 |
| 117054 | 0, // GPR64noip:zasubs1 |
| 117055 | 0, // GPR64noip:zsub |
| 117056 | 0, // GPR64noip:zsub0 |
| 117057 | 0, // GPR64noip:zsub1 |
| 117058 | 0, // GPR64noip:zsub2 |
| 117059 | 0, // GPR64noip:zsub3 |
| 117060 | 0, // GPR64noip:zsub_hi |
| 117061 | 0, // GPR64noip:zasubd1_then_zasubq0 |
| 117062 | 0, // GPR64noip:zasubd1_then_zasubq1 |
| 117063 | 0, // GPR64noip:zasubs1_then_zasubd0 |
| 117064 | 0, // GPR64noip:zasubs1_then_zasubd1 |
| 117065 | 0, // GPR64noip:zasubs1_then_zasubq0 |
| 117066 | 0, // GPR64noip:zasubs1_then_zasubq1 |
| 117067 | 0, // GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 117068 | 0, // GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 117069 | 0, // GPR64noip:zasubh1_then_zasubd0 |
| 117070 | 0, // GPR64noip:zasubh1_then_zasubd1 |
| 117071 | 0, // GPR64noip:zasubh1_then_zasubq0 |
| 117072 | 0, // GPR64noip:zasubh1_then_zasubq1 |
| 117073 | 0, // GPR64noip:zasubh1_then_zasubs0 |
| 117074 | 0, // GPR64noip:zasubh1_then_zasubs1 |
| 117075 | 0, // GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 117076 | 0, // GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 117077 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 117078 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 117079 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 117080 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 117081 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117082 | 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117083 | 0, // GPR64noip:dsub1_then_bsub |
| 117084 | 0, // GPR64noip:dsub1_then_bsub_hi |
| 117085 | 0, // GPR64noip:dsub1_then_hsub |
| 117086 | 0, // GPR64noip:dsub1_then_hsub_hi |
| 117087 | 0, // GPR64noip:dsub1_then_ssub |
| 117088 | 0, // GPR64noip:dsub1_then_ssub_hi |
| 117089 | 0, // GPR64noip:dsub3_then_bsub |
| 117090 | 0, // GPR64noip:dsub3_then_bsub_hi |
| 117091 | 0, // GPR64noip:dsub3_then_hsub |
| 117092 | 0, // GPR64noip:dsub3_then_hsub_hi |
| 117093 | 0, // GPR64noip:dsub3_then_ssub |
| 117094 | 0, // GPR64noip:dsub3_then_ssub_hi |
| 117095 | 0, // GPR64noip:dsub2_then_bsub |
| 117096 | 0, // GPR64noip:dsub2_then_bsub_hi |
| 117097 | 0, // GPR64noip:dsub2_then_hsub |
| 117098 | 0, // GPR64noip:dsub2_then_hsub_hi |
| 117099 | 0, // GPR64noip:dsub2_then_ssub |
| 117100 | 0, // GPR64noip:dsub2_then_ssub_hi |
| 117101 | 0, // GPR64noip:psub1_then_psub |
| 117102 | 0, // GPR64noip:qsub1_then_dsub_hi |
| 117103 | 0, // GPR64noip:qsub3_then_dsub_hi |
| 117104 | 0, // GPR64noip:qsub2_then_dsub_hi |
| 117105 | 0, // GPR64noip:x8sub_7_then_sub_32 |
| 117106 | 0, // GPR64noip:x8sub_7_then_sub_32_hi |
| 117107 | 0, // GPR64noip:x8sub_6_then_sub_32 |
| 117108 | 0, // GPR64noip:x8sub_6_then_sub_32_hi |
| 117109 | 0, // GPR64noip:x8sub_5_then_sub_32 |
| 117110 | 0, // GPR64noip:x8sub_5_then_sub_32_hi |
| 117111 | 0, // GPR64noip:x8sub_4_then_sub_32 |
| 117112 | 0, // GPR64noip:x8sub_4_then_sub_32_hi |
| 117113 | 0, // GPR64noip:x8sub_3_then_sub_32 |
| 117114 | 0, // GPR64noip:x8sub_3_then_sub_32_hi |
| 117115 | 0, // GPR64noip:x8sub_2_then_sub_32 |
| 117116 | 0, // GPR64noip:x8sub_2_then_sub_32_hi |
| 117117 | 0, // GPR64noip:x8sub_1_then_sub_32 |
| 117118 | 0, // GPR64noip:x8sub_1_then_sub_32_hi |
| 117119 | 0, // GPR64noip:subo64_then_sub_32 |
| 117120 | 0, // GPR64noip:subo64_then_sub_32_hi |
| 117121 | 0, // GPR64noip:zsub1_then_zsub_hi |
| 117122 | 0, // GPR64noip:zsub3_then_zsub_hi |
| 117123 | 0, // GPR64noip:zsub2_then_zsub_hi |
| 117124 | 0, // GPR64noip:dsub0_dsub1 |
| 117125 | 0, // GPR64noip:dsub0_dsub1_dsub2 |
| 117126 | 0, // GPR64noip:dsub1_dsub2 |
| 117127 | 0, // GPR64noip:dsub1_dsub2_dsub3 |
| 117128 | 0, // GPR64noip:dsub2_dsub3 |
| 117129 | 0, // GPR64noip:dsub_dsub1 |
| 117130 | 0, // GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 117131 | 0, // GPR64noip:dsub_dsub1_dsub2 |
| 117132 | 0, // GPR64noip:qsub0_qsub1 |
| 117133 | 0, // GPR64noip:qsub0_qsub1_qsub2 |
| 117134 | 0, // GPR64noip:qsub1_qsub2 |
| 117135 | 0, // GPR64noip:qsub1_qsub2_qsub3 |
| 117136 | 0, // GPR64noip:qsub2_qsub3 |
| 117137 | 0, // GPR64noip:sub_32_x8sub_1_then_sub_32 |
| 117138 | 0, // GPR64noip:x8sub_0_x8sub_1 |
| 117139 | 0, // GPR64noip:x8sub_2_x8sub_3 |
| 117140 | 0, // GPR64noip:x8sub_4_x8sub_5 |
| 117141 | 0, // GPR64noip:x8sub_6_x8sub_7 |
| 117142 | 0, // GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117143 | 0, // GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117144 | 0, // GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117145 | 0, // GPR64noip:sub_32_subo64_then_sub_32 |
| 117146 | 0, // GPR64noip:zsub_qsub1 |
| 117147 | 0, // GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 117148 | 0, // GPR64noip:zsub_qsub1_qsub2 |
| 117149 | 0, // GPR64noip:zsub0_zsub1 |
| 117150 | 0, // GPR64noip:zsub0_zsub1_zsub2 |
| 117151 | 0, // GPR64noip:zsub1_zsub2 |
| 117152 | 0, // GPR64noip:zsub1_zsub2_zsub3 |
| 117153 | 0, // GPR64noip:zsub2_zsub3 |
| 117154 | 0, // GPR64noip:zsub0_zsub2 |
| 117155 | 0, // GPR64noip:zsub1_zsub3 |
| 117156 | }, |
| 117157 | { // GPR64common_and_GPR64noip |
| 117158 | 0, // GPR64common_and_GPR64noip:bsub |
| 117159 | 0, // GPR64common_and_GPR64noip:bsub_hi |
| 117160 | 0, // GPR64common_and_GPR64noip:dsub |
| 117161 | 0, // GPR64common_and_GPR64noip:dsub0 |
| 117162 | 0, // GPR64common_and_GPR64noip:dsub1 |
| 117163 | 0, // GPR64common_and_GPR64noip:dsub2 |
| 117164 | 0, // GPR64common_and_GPR64noip:dsub3 |
| 117165 | 0, // GPR64common_and_GPR64noip:dsub_hi |
| 117166 | 0, // GPR64common_and_GPR64noip:hsub |
| 117167 | 0, // GPR64common_and_GPR64noip:hsub_hi |
| 117168 | 0, // GPR64common_and_GPR64noip:psub |
| 117169 | 0, // GPR64common_and_GPR64noip:psub0 |
| 117170 | 0, // GPR64common_and_GPR64noip:psub1 |
| 117171 | 0, // GPR64common_and_GPR64noip:qsub0 |
| 117172 | 0, // GPR64common_and_GPR64noip:qsub1 |
| 117173 | 0, // GPR64common_and_GPR64noip:qsub2 |
| 117174 | 0, // GPR64common_and_GPR64noip:qsub3 |
| 117175 | 0, // GPR64common_and_GPR64noip:ssub |
| 117176 | 0, // GPR64common_and_GPR64noip:ssub_hi |
| 117177 | 43, // GPR64common_and_GPR64noip:sub_32 -> GPR32common |
| 117178 | 0, // GPR64common_and_GPR64noip:sub_32_hi |
| 117179 | 0, // GPR64common_and_GPR64noip:sube32 |
| 117180 | 0, // GPR64common_and_GPR64noip:sube64 |
| 117181 | 0, // GPR64common_and_GPR64noip:subo32 |
| 117182 | 0, // GPR64common_and_GPR64noip:subo64 |
| 117183 | 0, // GPR64common_and_GPR64noip:x8sub_0 |
| 117184 | 0, // GPR64common_and_GPR64noip:x8sub_1 |
| 117185 | 0, // GPR64common_and_GPR64noip:x8sub_2 |
| 117186 | 0, // GPR64common_and_GPR64noip:x8sub_3 |
| 117187 | 0, // GPR64common_and_GPR64noip:x8sub_4 |
| 117188 | 0, // GPR64common_and_GPR64noip:x8sub_5 |
| 117189 | 0, // GPR64common_and_GPR64noip:x8sub_6 |
| 117190 | 0, // GPR64common_and_GPR64noip:x8sub_7 |
| 117191 | 0, // GPR64common_and_GPR64noip:zasubb |
| 117192 | 0, // GPR64common_and_GPR64noip:zasubd0 |
| 117193 | 0, // GPR64common_and_GPR64noip:zasubd1 |
| 117194 | 0, // GPR64common_and_GPR64noip:zasubh0 |
| 117195 | 0, // GPR64common_and_GPR64noip:zasubh1 |
| 117196 | 0, // GPR64common_and_GPR64noip:zasubq0 |
| 117197 | 0, // GPR64common_and_GPR64noip:zasubq1 |
| 117198 | 0, // GPR64common_and_GPR64noip:zasubs0 |
| 117199 | 0, // GPR64common_and_GPR64noip:zasubs1 |
| 117200 | 0, // GPR64common_and_GPR64noip:zsub |
| 117201 | 0, // GPR64common_and_GPR64noip:zsub0 |
| 117202 | 0, // GPR64common_and_GPR64noip:zsub1 |
| 117203 | 0, // GPR64common_and_GPR64noip:zsub2 |
| 117204 | 0, // GPR64common_and_GPR64noip:zsub3 |
| 117205 | 0, // GPR64common_and_GPR64noip:zsub_hi |
| 117206 | 0, // GPR64common_and_GPR64noip:zasubd1_then_zasubq0 |
| 117207 | 0, // GPR64common_and_GPR64noip:zasubd1_then_zasubq1 |
| 117208 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd0 |
| 117209 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1 |
| 117210 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubq0 |
| 117211 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubq1 |
| 117212 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 117213 | 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 117214 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd0 |
| 117215 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1 |
| 117216 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubq0 |
| 117217 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubq1 |
| 117218 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs0 |
| 117219 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1 |
| 117220 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 117221 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 117222 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 117223 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 117224 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 117225 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 117226 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117227 | 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117228 | 0, // GPR64common_and_GPR64noip:dsub1_then_bsub |
| 117229 | 0, // GPR64common_and_GPR64noip:dsub1_then_bsub_hi |
| 117230 | 0, // GPR64common_and_GPR64noip:dsub1_then_hsub |
| 117231 | 0, // GPR64common_and_GPR64noip:dsub1_then_hsub_hi |
| 117232 | 0, // GPR64common_and_GPR64noip:dsub1_then_ssub |
| 117233 | 0, // GPR64common_and_GPR64noip:dsub1_then_ssub_hi |
| 117234 | 0, // GPR64common_and_GPR64noip:dsub3_then_bsub |
| 117235 | 0, // GPR64common_and_GPR64noip:dsub3_then_bsub_hi |
| 117236 | 0, // GPR64common_and_GPR64noip:dsub3_then_hsub |
| 117237 | 0, // GPR64common_and_GPR64noip:dsub3_then_hsub_hi |
| 117238 | 0, // GPR64common_and_GPR64noip:dsub3_then_ssub |
| 117239 | 0, // GPR64common_and_GPR64noip:dsub3_then_ssub_hi |
| 117240 | 0, // GPR64common_and_GPR64noip:dsub2_then_bsub |
| 117241 | 0, // GPR64common_and_GPR64noip:dsub2_then_bsub_hi |
| 117242 | 0, // GPR64common_and_GPR64noip:dsub2_then_hsub |
| 117243 | 0, // GPR64common_and_GPR64noip:dsub2_then_hsub_hi |
| 117244 | 0, // GPR64common_and_GPR64noip:dsub2_then_ssub |
| 117245 | 0, // GPR64common_and_GPR64noip:dsub2_then_ssub_hi |
| 117246 | 0, // GPR64common_and_GPR64noip:psub1_then_psub |
| 117247 | 0, // GPR64common_and_GPR64noip:qsub1_then_dsub_hi |
| 117248 | 0, // GPR64common_and_GPR64noip:qsub3_then_dsub_hi |
| 117249 | 0, // GPR64common_and_GPR64noip:qsub2_then_dsub_hi |
| 117250 | 0, // GPR64common_and_GPR64noip:x8sub_7_then_sub_32 |
| 117251 | 0, // GPR64common_and_GPR64noip:x8sub_7_then_sub_32_hi |
| 117252 | 0, // GPR64common_and_GPR64noip:x8sub_6_then_sub_32 |
| 117253 | 0, // GPR64common_and_GPR64noip:x8sub_6_then_sub_32_hi |
| 117254 | 0, // GPR64common_and_GPR64noip:x8sub_5_then_sub_32 |
| 117255 | 0, // GPR64common_and_GPR64noip:x8sub_5_then_sub_32_hi |
| 117256 | 0, // GPR64common_and_GPR64noip:x8sub_4_then_sub_32 |
| 117257 | 0, // GPR64common_and_GPR64noip:x8sub_4_then_sub_32_hi |
| 117258 | 0, // GPR64common_and_GPR64noip:x8sub_3_then_sub_32 |
| 117259 | 0, // GPR64common_and_GPR64noip:x8sub_3_then_sub_32_hi |
| 117260 | 0, // GPR64common_and_GPR64noip:x8sub_2_then_sub_32 |
| 117261 | 0, // GPR64common_and_GPR64noip:x8sub_2_then_sub_32_hi |
| 117262 | 0, // GPR64common_and_GPR64noip:x8sub_1_then_sub_32 |
| 117263 | 0, // GPR64common_and_GPR64noip:x8sub_1_then_sub_32_hi |
| 117264 | 0, // GPR64common_and_GPR64noip:subo64_then_sub_32 |
| 117265 | 0, // GPR64common_and_GPR64noip:subo64_then_sub_32_hi |
| 117266 | 0, // GPR64common_and_GPR64noip:zsub1_then_zsub_hi |
| 117267 | 0, // GPR64common_and_GPR64noip:zsub3_then_zsub_hi |
| 117268 | 0, // GPR64common_and_GPR64noip:zsub2_then_zsub_hi |
| 117269 | 0, // GPR64common_and_GPR64noip:dsub0_dsub1 |
| 117270 | 0, // GPR64common_and_GPR64noip:dsub0_dsub1_dsub2 |
| 117271 | 0, // GPR64common_and_GPR64noip:dsub1_dsub2 |
| 117272 | 0, // GPR64common_and_GPR64noip:dsub1_dsub2_dsub3 |
| 117273 | 0, // GPR64common_and_GPR64noip:dsub2_dsub3 |
| 117274 | 0, // GPR64common_and_GPR64noip:dsub_dsub1 |
| 117275 | 0, // GPR64common_and_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 117276 | 0, // GPR64common_and_GPR64noip:dsub_dsub1_dsub2 |
| 117277 | 0, // GPR64common_and_GPR64noip:qsub0_qsub1 |
| 117278 | 0, // GPR64common_and_GPR64noip:qsub0_qsub1_qsub2 |
| 117279 | 0, // GPR64common_and_GPR64noip:qsub1_qsub2 |
| 117280 | 0, // GPR64common_and_GPR64noip:qsub1_qsub2_qsub3 |
| 117281 | 0, // GPR64common_and_GPR64noip:qsub2_qsub3 |
| 117282 | 0, // GPR64common_and_GPR64noip:sub_32_x8sub_1_then_sub_32 |
| 117283 | 0, // GPR64common_and_GPR64noip:x8sub_0_x8sub_1 |
| 117284 | 0, // GPR64common_and_GPR64noip:x8sub_2_x8sub_3 |
| 117285 | 0, // GPR64common_and_GPR64noip:x8sub_4_x8sub_5 |
| 117286 | 0, // GPR64common_and_GPR64noip:x8sub_6_x8sub_7 |
| 117287 | 0, // GPR64common_and_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117288 | 0, // GPR64common_and_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117289 | 0, // GPR64common_and_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117290 | 0, // GPR64common_and_GPR64noip:sub_32_subo64_then_sub_32 |
| 117291 | 0, // GPR64common_and_GPR64noip:zsub_qsub1 |
| 117292 | 0, // GPR64common_and_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 117293 | 0, // GPR64common_and_GPR64noip:zsub_qsub1_qsub2 |
| 117294 | 0, // GPR64common_and_GPR64noip:zsub0_zsub1 |
| 117295 | 0, // GPR64common_and_GPR64noip:zsub0_zsub1_zsub2 |
| 117296 | 0, // GPR64common_and_GPR64noip:zsub1_zsub2 |
| 117297 | 0, // GPR64common_and_GPR64noip:zsub1_zsub2_zsub3 |
| 117298 | 0, // GPR64common_and_GPR64noip:zsub2_zsub3 |
| 117299 | 0, // GPR64common_and_GPR64noip:zsub0_zsub2 |
| 117300 | 0, // GPR64common_and_GPR64noip:zsub1_zsub3 |
| 117301 | }, |
| 117302 | { // tcGPR64 |
| 117303 | 0, // tcGPR64:bsub |
| 117304 | 0, // tcGPR64:bsub_hi |
| 117305 | 0, // tcGPR64:dsub |
| 117306 | 0, // tcGPR64:dsub0 |
| 117307 | 0, // tcGPR64:dsub1 |
| 117308 | 0, // tcGPR64:dsub2 |
| 117309 | 0, // tcGPR64:dsub3 |
| 117310 | 0, // tcGPR64:dsub_hi |
| 117311 | 0, // tcGPR64:hsub |
| 117312 | 0, // tcGPR64:hsub_hi |
| 117313 | 0, // tcGPR64:psub |
| 117314 | 0, // tcGPR64:psub0 |
| 117315 | 0, // tcGPR64:psub1 |
| 117316 | 0, // tcGPR64:qsub0 |
| 117317 | 0, // tcGPR64:qsub1 |
| 117318 | 0, // tcGPR64:qsub2 |
| 117319 | 0, // tcGPR64:qsub3 |
| 117320 | 0, // tcGPR64:ssub |
| 117321 | 0, // tcGPR64:ssub_hi |
| 117322 | 43, // tcGPR64:sub_32 -> GPR32common |
| 117323 | 0, // tcGPR64:sub_32_hi |
| 117324 | 0, // tcGPR64:sube32 |
| 117325 | 0, // tcGPR64:sube64 |
| 117326 | 0, // tcGPR64:subo32 |
| 117327 | 0, // tcGPR64:subo64 |
| 117328 | 0, // tcGPR64:x8sub_0 |
| 117329 | 0, // tcGPR64:x8sub_1 |
| 117330 | 0, // tcGPR64:x8sub_2 |
| 117331 | 0, // tcGPR64:x8sub_3 |
| 117332 | 0, // tcGPR64:x8sub_4 |
| 117333 | 0, // tcGPR64:x8sub_5 |
| 117334 | 0, // tcGPR64:x8sub_6 |
| 117335 | 0, // tcGPR64:x8sub_7 |
| 117336 | 0, // tcGPR64:zasubb |
| 117337 | 0, // tcGPR64:zasubd0 |
| 117338 | 0, // tcGPR64:zasubd1 |
| 117339 | 0, // tcGPR64:zasubh0 |
| 117340 | 0, // tcGPR64:zasubh1 |
| 117341 | 0, // tcGPR64:zasubq0 |
| 117342 | 0, // tcGPR64:zasubq1 |
| 117343 | 0, // tcGPR64:zasubs0 |
| 117344 | 0, // tcGPR64:zasubs1 |
| 117345 | 0, // tcGPR64:zsub |
| 117346 | 0, // tcGPR64:zsub0 |
| 117347 | 0, // tcGPR64:zsub1 |
| 117348 | 0, // tcGPR64:zsub2 |
| 117349 | 0, // tcGPR64:zsub3 |
| 117350 | 0, // tcGPR64:zsub_hi |
| 117351 | 0, // tcGPR64:zasubd1_then_zasubq0 |
| 117352 | 0, // tcGPR64:zasubd1_then_zasubq1 |
| 117353 | 0, // tcGPR64:zasubs1_then_zasubd0 |
| 117354 | 0, // tcGPR64:zasubs1_then_zasubd1 |
| 117355 | 0, // tcGPR64:zasubs1_then_zasubq0 |
| 117356 | 0, // tcGPR64:zasubs1_then_zasubq1 |
| 117357 | 0, // tcGPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 117358 | 0, // tcGPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 117359 | 0, // tcGPR64:zasubh1_then_zasubd0 |
| 117360 | 0, // tcGPR64:zasubh1_then_zasubd1 |
| 117361 | 0, // tcGPR64:zasubh1_then_zasubq0 |
| 117362 | 0, // tcGPR64:zasubh1_then_zasubq1 |
| 117363 | 0, // tcGPR64:zasubh1_then_zasubs0 |
| 117364 | 0, // tcGPR64:zasubh1_then_zasubs1 |
| 117365 | 0, // tcGPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 117366 | 0, // tcGPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 117367 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 117368 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 117369 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 117370 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 117371 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117372 | 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117373 | 0, // tcGPR64:dsub1_then_bsub |
| 117374 | 0, // tcGPR64:dsub1_then_bsub_hi |
| 117375 | 0, // tcGPR64:dsub1_then_hsub |
| 117376 | 0, // tcGPR64:dsub1_then_hsub_hi |
| 117377 | 0, // tcGPR64:dsub1_then_ssub |
| 117378 | 0, // tcGPR64:dsub1_then_ssub_hi |
| 117379 | 0, // tcGPR64:dsub3_then_bsub |
| 117380 | 0, // tcGPR64:dsub3_then_bsub_hi |
| 117381 | 0, // tcGPR64:dsub3_then_hsub |
| 117382 | 0, // tcGPR64:dsub3_then_hsub_hi |
| 117383 | 0, // tcGPR64:dsub3_then_ssub |
| 117384 | 0, // tcGPR64:dsub3_then_ssub_hi |
| 117385 | 0, // tcGPR64:dsub2_then_bsub |
| 117386 | 0, // tcGPR64:dsub2_then_bsub_hi |
| 117387 | 0, // tcGPR64:dsub2_then_hsub |
| 117388 | 0, // tcGPR64:dsub2_then_hsub_hi |
| 117389 | 0, // tcGPR64:dsub2_then_ssub |
| 117390 | 0, // tcGPR64:dsub2_then_ssub_hi |
| 117391 | 0, // tcGPR64:psub1_then_psub |
| 117392 | 0, // tcGPR64:qsub1_then_dsub_hi |
| 117393 | 0, // tcGPR64:qsub3_then_dsub_hi |
| 117394 | 0, // tcGPR64:qsub2_then_dsub_hi |
| 117395 | 0, // tcGPR64:x8sub_7_then_sub_32 |
| 117396 | 0, // tcGPR64:x8sub_7_then_sub_32_hi |
| 117397 | 0, // tcGPR64:x8sub_6_then_sub_32 |
| 117398 | 0, // tcGPR64:x8sub_6_then_sub_32_hi |
| 117399 | 0, // tcGPR64:x8sub_5_then_sub_32 |
| 117400 | 0, // tcGPR64:x8sub_5_then_sub_32_hi |
| 117401 | 0, // tcGPR64:x8sub_4_then_sub_32 |
| 117402 | 0, // tcGPR64:x8sub_4_then_sub_32_hi |
| 117403 | 0, // tcGPR64:x8sub_3_then_sub_32 |
| 117404 | 0, // tcGPR64:x8sub_3_then_sub_32_hi |
| 117405 | 0, // tcGPR64:x8sub_2_then_sub_32 |
| 117406 | 0, // tcGPR64:x8sub_2_then_sub_32_hi |
| 117407 | 0, // tcGPR64:x8sub_1_then_sub_32 |
| 117408 | 0, // tcGPR64:x8sub_1_then_sub_32_hi |
| 117409 | 0, // tcGPR64:subo64_then_sub_32 |
| 117410 | 0, // tcGPR64:subo64_then_sub_32_hi |
| 117411 | 0, // tcGPR64:zsub1_then_zsub_hi |
| 117412 | 0, // tcGPR64:zsub3_then_zsub_hi |
| 117413 | 0, // tcGPR64:zsub2_then_zsub_hi |
| 117414 | 0, // tcGPR64:dsub0_dsub1 |
| 117415 | 0, // tcGPR64:dsub0_dsub1_dsub2 |
| 117416 | 0, // tcGPR64:dsub1_dsub2 |
| 117417 | 0, // tcGPR64:dsub1_dsub2_dsub3 |
| 117418 | 0, // tcGPR64:dsub2_dsub3 |
| 117419 | 0, // tcGPR64:dsub_dsub1 |
| 117420 | 0, // tcGPR64:dsub_dsub1_dsub2_dsub3 |
| 117421 | 0, // tcGPR64:dsub_dsub1_dsub2 |
| 117422 | 0, // tcGPR64:qsub0_qsub1 |
| 117423 | 0, // tcGPR64:qsub0_qsub1_qsub2 |
| 117424 | 0, // tcGPR64:qsub1_qsub2 |
| 117425 | 0, // tcGPR64:qsub1_qsub2_qsub3 |
| 117426 | 0, // tcGPR64:qsub2_qsub3 |
| 117427 | 0, // tcGPR64:sub_32_x8sub_1_then_sub_32 |
| 117428 | 0, // tcGPR64:x8sub_0_x8sub_1 |
| 117429 | 0, // tcGPR64:x8sub_2_x8sub_3 |
| 117430 | 0, // tcGPR64:x8sub_4_x8sub_5 |
| 117431 | 0, // tcGPR64:x8sub_6_x8sub_7 |
| 117432 | 0, // tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117433 | 0, // tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117434 | 0, // tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117435 | 0, // tcGPR64:sub_32_subo64_then_sub_32 |
| 117436 | 0, // tcGPR64:zsub_qsub1 |
| 117437 | 0, // tcGPR64:zsub_qsub1_qsub2_qsub3 |
| 117438 | 0, // tcGPR64:zsub_qsub1_qsub2 |
| 117439 | 0, // tcGPR64:zsub0_zsub1 |
| 117440 | 0, // tcGPR64:zsub0_zsub1_zsub2 |
| 117441 | 0, // tcGPR64:zsub1_zsub2 |
| 117442 | 0, // tcGPR64:zsub1_zsub2_zsub3 |
| 117443 | 0, // tcGPR64:zsub2_zsub3 |
| 117444 | 0, // tcGPR64:zsub0_zsub2 |
| 117445 | 0, // tcGPR64:zsub1_zsub3 |
| 117446 | }, |
| 117447 | { // tcGPRnotx16 |
| 117448 | 0, // tcGPRnotx16:bsub |
| 117449 | 0, // tcGPRnotx16:bsub_hi |
| 117450 | 0, // tcGPRnotx16:dsub |
| 117451 | 0, // tcGPRnotx16:dsub0 |
| 117452 | 0, // tcGPRnotx16:dsub1 |
| 117453 | 0, // tcGPRnotx16:dsub2 |
| 117454 | 0, // tcGPRnotx16:dsub3 |
| 117455 | 0, // tcGPRnotx16:dsub_hi |
| 117456 | 0, // tcGPRnotx16:hsub |
| 117457 | 0, // tcGPRnotx16:hsub_hi |
| 117458 | 0, // tcGPRnotx16:psub |
| 117459 | 0, // tcGPRnotx16:psub0 |
| 117460 | 0, // tcGPRnotx16:psub1 |
| 117461 | 0, // tcGPRnotx16:qsub0 |
| 117462 | 0, // tcGPRnotx16:qsub1 |
| 117463 | 0, // tcGPRnotx16:qsub2 |
| 117464 | 0, // tcGPRnotx16:qsub3 |
| 117465 | 0, // tcGPRnotx16:ssub |
| 117466 | 0, // tcGPRnotx16:ssub_hi |
| 117467 | 43, // tcGPRnotx16:sub_32 -> GPR32common |
| 117468 | 0, // tcGPRnotx16:sub_32_hi |
| 117469 | 0, // tcGPRnotx16:sube32 |
| 117470 | 0, // tcGPRnotx16:sube64 |
| 117471 | 0, // tcGPRnotx16:subo32 |
| 117472 | 0, // tcGPRnotx16:subo64 |
| 117473 | 0, // tcGPRnotx16:x8sub_0 |
| 117474 | 0, // tcGPRnotx16:x8sub_1 |
| 117475 | 0, // tcGPRnotx16:x8sub_2 |
| 117476 | 0, // tcGPRnotx16:x8sub_3 |
| 117477 | 0, // tcGPRnotx16:x8sub_4 |
| 117478 | 0, // tcGPRnotx16:x8sub_5 |
| 117479 | 0, // tcGPRnotx16:x8sub_6 |
| 117480 | 0, // tcGPRnotx16:x8sub_7 |
| 117481 | 0, // tcGPRnotx16:zasubb |
| 117482 | 0, // tcGPRnotx16:zasubd0 |
| 117483 | 0, // tcGPRnotx16:zasubd1 |
| 117484 | 0, // tcGPRnotx16:zasubh0 |
| 117485 | 0, // tcGPRnotx16:zasubh1 |
| 117486 | 0, // tcGPRnotx16:zasubq0 |
| 117487 | 0, // tcGPRnotx16:zasubq1 |
| 117488 | 0, // tcGPRnotx16:zasubs0 |
| 117489 | 0, // tcGPRnotx16:zasubs1 |
| 117490 | 0, // tcGPRnotx16:zsub |
| 117491 | 0, // tcGPRnotx16:zsub0 |
| 117492 | 0, // tcGPRnotx16:zsub1 |
| 117493 | 0, // tcGPRnotx16:zsub2 |
| 117494 | 0, // tcGPRnotx16:zsub3 |
| 117495 | 0, // tcGPRnotx16:zsub_hi |
| 117496 | 0, // tcGPRnotx16:zasubd1_then_zasubq0 |
| 117497 | 0, // tcGPRnotx16:zasubd1_then_zasubq1 |
| 117498 | 0, // tcGPRnotx16:zasubs1_then_zasubd0 |
| 117499 | 0, // tcGPRnotx16:zasubs1_then_zasubd1 |
| 117500 | 0, // tcGPRnotx16:zasubs1_then_zasubq0 |
| 117501 | 0, // tcGPRnotx16:zasubs1_then_zasubq1 |
| 117502 | 0, // tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 117503 | 0, // tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 117504 | 0, // tcGPRnotx16:zasubh1_then_zasubd0 |
| 117505 | 0, // tcGPRnotx16:zasubh1_then_zasubd1 |
| 117506 | 0, // tcGPRnotx16:zasubh1_then_zasubq0 |
| 117507 | 0, // tcGPRnotx16:zasubh1_then_zasubq1 |
| 117508 | 0, // tcGPRnotx16:zasubh1_then_zasubs0 |
| 117509 | 0, // tcGPRnotx16:zasubh1_then_zasubs1 |
| 117510 | 0, // tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 117511 | 0, // tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 117512 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 117513 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 117514 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 117515 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 117516 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117517 | 0, // tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117518 | 0, // tcGPRnotx16:dsub1_then_bsub |
| 117519 | 0, // tcGPRnotx16:dsub1_then_bsub_hi |
| 117520 | 0, // tcGPRnotx16:dsub1_then_hsub |
| 117521 | 0, // tcGPRnotx16:dsub1_then_hsub_hi |
| 117522 | 0, // tcGPRnotx16:dsub1_then_ssub |
| 117523 | 0, // tcGPRnotx16:dsub1_then_ssub_hi |
| 117524 | 0, // tcGPRnotx16:dsub3_then_bsub |
| 117525 | 0, // tcGPRnotx16:dsub3_then_bsub_hi |
| 117526 | 0, // tcGPRnotx16:dsub3_then_hsub |
| 117527 | 0, // tcGPRnotx16:dsub3_then_hsub_hi |
| 117528 | 0, // tcGPRnotx16:dsub3_then_ssub |
| 117529 | 0, // tcGPRnotx16:dsub3_then_ssub_hi |
| 117530 | 0, // tcGPRnotx16:dsub2_then_bsub |
| 117531 | 0, // tcGPRnotx16:dsub2_then_bsub_hi |
| 117532 | 0, // tcGPRnotx16:dsub2_then_hsub |
| 117533 | 0, // tcGPRnotx16:dsub2_then_hsub_hi |
| 117534 | 0, // tcGPRnotx16:dsub2_then_ssub |
| 117535 | 0, // tcGPRnotx16:dsub2_then_ssub_hi |
| 117536 | 0, // tcGPRnotx16:psub1_then_psub |
| 117537 | 0, // tcGPRnotx16:qsub1_then_dsub_hi |
| 117538 | 0, // tcGPRnotx16:qsub3_then_dsub_hi |
| 117539 | 0, // tcGPRnotx16:qsub2_then_dsub_hi |
| 117540 | 0, // tcGPRnotx16:x8sub_7_then_sub_32 |
| 117541 | 0, // tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 117542 | 0, // tcGPRnotx16:x8sub_6_then_sub_32 |
| 117543 | 0, // tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 117544 | 0, // tcGPRnotx16:x8sub_5_then_sub_32 |
| 117545 | 0, // tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 117546 | 0, // tcGPRnotx16:x8sub_4_then_sub_32 |
| 117547 | 0, // tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 117548 | 0, // tcGPRnotx16:x8sub_3_then_sub_32 |
| 117549 | 0, // tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 117550 | 0, // tcGPRnotx16:x8sub_2_then_sub_32 |
| 117551 | 0, // tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 117552 | 0, // tcGPRnotx16:x8sub_1_then_sub_32 |
| 117553 | 0, // tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 117554 | 0, // tcGPRnotx16:subo64_then_sub_32 |
| 117555 | 0, // tcGPRnotx16:subo64_then_sub_32_hi |
| 117556 | 0, // tcGPRnotx16:zsub1_then_zsub_hi |
| 117557 | 0, // tcGPRnotx16:zsub3_then_zsub_hi |
| 117558 | 0, // tcGPRnotx16:zsub2_then_zsub_hi |
| 117559 | 0, // tcGPRnotx16:dsub0_dsub1 |
| 117560 | 0, // tcGPRnotx16:dsub0_dsub1_dsub2 |
| 117561 | 0, // tcGPRnotx16:dsub1_dsub2 |
| 117562 | 0, // tcGPRnotx16:dsub1_dsub2_dsub3 |
| 117563 | 0, // tcGPRnotx16:dsub2_dsub3 |
| 117564 | 0, // tcGPRnotx16:dsub_dsub1 |
| 117565 | 0, // tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 117566 | 0, // tcGPRnotx16:dsub_dsub1_dsub2 |
| 117567 | 0, // tcGPRnotx16:qsub0_qsub1 |
| 117568 | 0, // tcGPRnotx16:qsub0_qsub1_qsub2 |
| 117569 | 0, // tcGPRnotx16:qsub1_qsub2 |
| 117570 | 0, // tcGPRnotx16:qsub1_qsub2_qsub3 |
| 117571 | 0, // tcGPRnotx16:qsub2_qsub3 |
| 117572 | 0, // tcGPRnotx16:sub_32_x8sub_1_then_sub_32 |
| 117573 | 0, // tcGPRnotx16:x8sub_0_x8sub_1 |
| 117574 | 0, // tcGPRnotx16:x8sub_2_x8sub_3 |
| 117575 | 0, // tcGPRnotx16:x8sub_4_x8sub_5 |
| 117576 | 0, // tcGPRnotx16:x8sub_6_x8sub_7 |
| 117577 | 0, // tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117578 | 0, // tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117579 | 0, // tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117580 | 0, // tcGPRnotx16:sub_32_subo64_then_sub_32 |
| 117581 | 0, // tcGPRnotx16:zsub_qsub1 |
| 117582 | 0, // tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 117583 | 0, // tcGPRnotx16:zsub_qsub1_qsub2 |
| 117584 | 0, // tcGPRnotx16:zsub0_zsub1 |
| 117585 | 0, // tcGPRnotx16:zsub0_zsub1_zsub2 |
| 117586 | 0, // tcGPRnotx16:zsub1_zsub2 |
| 117587 | 0, // tcGPRnotx16:zsub1_zsub2_zsub3 |
| 117588 | 0, // tcGPRnotx16:zsub2_zsub3 |
| 117589 | 0, // tcGPRnotx16:zsub0_zsub2 |
| 117590 | 0, // tcGPRnotx16:zsub1_zsub3 |
| 117591 | }, |
| 117592 | { // tcGPRnotx16x17 |
| 117593 | 0, // tcGPRnotx16x17:bsub |
| 117594 | 0, // tcGPRnotx16x17:bsub_hi |
| 117595 | 0, // tcGPRnotx16x17:dsub |
| 117596 | 0, // tcGPRnotx16x17:dsub0 |
| 117597 | 0, // tcGPRnotx16x17:dsub1 |
| 117598 | 0, // tcGPRnotx16x17:dsub2 |
| 117599 | 0, // tcGPRnotx16x17:dsub3 |
| 117600 | 0, // tcGPRnotx16x17:dsub_hi |
| 117601 | 0, // tcGPRnotx16x17:hsub |
| 117602 | 0, // tcGPRnotx16x17:hsub_hi |
| 117603 | 0, // tcGPRnotx16x17:psub |
| 117604 | 0, // tcGPRnotx16x17:psub0 |
| 117605 | 0, // tcGPRnotx16x17:psub1 |
| 117606 | 0, // tcGPRnotx16x17:qsub0 |
| 117607 | 0, // tcGPRnotx16x17:qsub1 |
| 117608 | 0, // tcGPRnotx16x17:qsub2 |
| 117609 | 0, // tcGPRnotx16x17:qsub3 |
| 117610 | 0, // tcGPRnotx16x17:ssub |
| 117611 | 0, // tcGPRnotx16x17:ssub_hi |
| 117612 | 43, // tcGPRnotx16x17:sub_32 -> GPR32common |
| 117613 | 0, // tcGPRnotx16x17:sub_32_hi |
| 117614 | 0, // tcGPRnotx16x17:sube32 |
| 117615 | 0, // tcGPRnotx16x17:sube64 |
| 117616 | 0, // tcGPRnotx16x17:subo32 |
| 117617 | 0, // tcGPRnotx16x17:subo64 |
| 117618 | 0, // tcGPRnotx16x17:x8sub_0 |
| 117619 | 0, // tcGPRnotx16x17:x8sub_1 |
| 117620 | 0, // tcGPRnotx16x17:x8sub_2 |
| 117621 | 0, // tcGPRnotx16x17:x8sub_3 |
| 117622 | 0, // tcGPRnotx16x17:x8sub_4 |
| 117623 | 0, // tcGPRnotx16x17:x8sub_5 |
| 117624 | 0, // tcGPRnotx16x17:x8sub_6 |
| 117625 | 0, // tcGPRnotx16x17:x8sub_7 |
| 117626 | 0, // tcGPRnotx16x17:zasubb |
| 117627 | 0, // tcGPRnotx16x17:zasubd0 |
| 117628 | 0, // tcGPRnotx16x17:zasubd1 |
| 117629 | 0, // tcGPRnotx16x17:zasubh0 |
| 117630 | 0, // tcGPRnotx16x17:zasubh1 |
| 117631 | 0, // tcGPRnotx16x17:zasubq0 |
| 117632 | 0, // tcGPRnotx16x17:zasubq1 |
| 117633 | 0, // tcGPRnotx16x17:zasubs0 |
| 117634 | 0, // tcGPRnotx16x17:zasubs1 |
| 117635 | 0, // tcGPRnotx16x17:zsub |
| 117636 | 0, // tcGPRnotx16x17:zsub0 |
| 117637 | 0, // tcGPRnotx16x17:zsub1 |
| 117638 | 0, // tcGPRnotx16x17:zsub2 |
| 117639 | 0, // tcGPRnotx16x17:zsub3 |
| 117640 | 0, // tcGPRnotx16x17:zsub_hi |
| 117641 | 0, // tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 117642 | 0, // tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 117643 | 0, // tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 117644 | 0, // tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 117645 | 0, // tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 117646 | 0, // tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 117647 | 0, // tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 117648 | 0, // tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 117649 | 0, // tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 117650 | 0, // tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 117651 | 0, // tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 117652 | 0, // tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 117653 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 117654 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 117655 | 0, // tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 117656 | 0, // tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 117657 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 117658 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 117659 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 117660 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 117661 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117662 | 0, // tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117663 | 0, // tcGPRnotx16x17:dsub1_then_bsub |
| 117664 | 0, // tcGPRnotx16x17:dsub1_then_bsub_hi |
| 117665 | 0, // tcGPRnotx16x17:dsub1_then_hsub |
| 117666 | 0, // tcGPRnotx16x17:dsub1_then_hsub_hi |
| 117667 | 0, // tcGPRnotx16x17:dsub1_then_ssub |
| 117668 | 0, // tcGPRnotx16x17:dsub1_then_ssub_hi |
| 117669 | 0, // tcGPRnotx16x17:dsub3_then_bsub |
| 117670 | 0, // tcGPRnotx16x17:dsub3_then_bsub_hi |
| 117671 | 0, // tcGPRnotx16x17:dsub3_then_hsub |
| 117672 | 0, // tcGPRnotx16x17:dsub3_then_hsub_hi |
| 117673 | 0, // tcGPRnotx16x17:dsub3_then_ssub |
| 117674 | 0, // tcGPRnotx16x17:dsub3_then_ssub_hi |
| 117675 | 0, // tcGPRnotx16x17:dsub2_then_bsub |
| 117676 | 0, // tcGPRnotx16x17:dsub2_then_bsub_hi |
| 117677 | 0, // tcGPRnotx16x17:dsub2_then_hsub |
| 117678 | 0, // tcGPRnotx16x17:dsub2_then_hsub_hi |
| 117679 | 0, // tcGPRnotx16x17:dsub2_then_ssub |
| 117680 | 0, // tcGPRnotx16x17:dsub2_then_ssub_hi |
| 117681 | 0, // tcGPRnotx16x17:psub1_then_psub |
| 117682 | 0, // tcGPRnotx16x17:qsub1_then_dsub_hi |
| 117683 | 0, // tcGPRnotx16x17:qsub3_then_dsub_hi |
| 117684 | 0, // tcGPRnotx16x17:qsub2_then_dsub_hi |
| 117685 | 0, // tcGPRnotx16x17:x8sub_7_then_sub_32 |
| 117686 | 0, // tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 117687 | 0, // tcGPRnotx16x17:x8sub_6_then_sub_32 |
| 117688 | 0, // tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 117689 | 0, // tcGPRnotx16x17:x8sub_5_then_sub_32 |
| 117690 | 0, // tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 117691 | 0, // tcGPRnotx16x17:x8sub_4_then_sub_32 |
| 117692 | 0, // tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 117693 | 0, // tcGPRnotx16x17:x8sub_3_then_sub_32 |
| 117694 | 0, // tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 117695 | 0, // tcGPRnotx16x17:x8sub_2_then_sub_32 |
| 117696 | 0, // tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 117697 | 0, // tcGPRnotx16x17:x8sub_1_then_sub_32 |
| 117698 | 0, // tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 117699 | 0, // tcGPRnotx16x17:subo64_then_sub_32 |
| 117700 | 0, // tcGPRnotx16x17:subo64_then_sub_32_hi |
| 117701 | 0, // tcGPRnotx16x17:zsub1_then_zsub_hi |
| 117702 | 0, // tcGPRnotx16x17:zsub3_then_zsub_hi |
| 117703 | 0, // tcGPRnotx16x17:zsub2_then_zsub_hi |
| 117704 | 0, // tcGPRnotx16x17:dsub0_dsub1 |
| 117705 | 0, // tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 117706 | 0, // tcGPRnotx16x17:dsub1_dsub2 |
| 117707 | 0, // tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 117708 | 0, // tcGPRnotx16x17:dsub2_dsub3 |
| 117709 | 0, // tcGPRnotx16x17:dsub_dsub1 |
| 117710 | 0, // tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 117711 | 0, // tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 117712 | 0, // tcGPRnotx16x17:qsub0_qsub1 |
| 117713 | 0, // tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 117714 | 0, // tcGPRnotx16x17:qsub1_qsub2 |
| 117715 | 0, // tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 117716 | 0, // tcGPRnotx16x17:qsub2_qsub3 |
| 117717 | 0, // tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 |
| 117718 | 0, // tcGPRnotx16x17:x8sub_0_x8sub_1 |
| 117719 | 0, // tcGPRnotx16x17:x8sub_2_x8sub_3 |
| 117720 | 0, // tcGPRnotx16x17:x8sub_4_x8sub_5 |
| 117721 | 0, // tcGPRnotx16x17:x8sub_6_x8sub_7 |
| 117722 | 0, // tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117723 | 0, // tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117724 | 0, // tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117725 | 0, // tcGPRnotx16x17:sub_32_subo64_then_sub_32 |
| 117726 | 0, // tcGPRnotx16x17:zsub_qsub1 |
| 117727 | 0, // tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 117728 | 0, // tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 117729 | 0, // tcGPRnotx16x17:zsub0_zsub1 |
| 117730 | 0, // tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 117731 | 0, // tcGPRnotx16x17:zsub1_zsub2 |
| 117732 | 0, // tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 117733 | 0, // tcGPRnotx16x17:zsub2_zsub3 |
| 117734 | 0, // tcGPRnotx16x17:zsub0_zsub2 |
| 117735 | 0, // tcGPRnotx16x17:zsub1_zsub3 |
| 117736 | }, |
| 117737 | { // FPR64_lo |
| 117738 | 7, // FPR64_lo:bsub -> FPR8 |
| 117739 | 0, // FPR64_lo:bsub_hi |
| 117740 | 0, // FPR64_lo:dsub |
| 117741 | 0, // FPR64_lo:dsub0 |
| 117742 | 0, // FPR64_lo:dsub1 |
| 117743 | 0, // FPR64_lo:dsub2 |
| 117744 | 0, // FPR64_lo:dsub3 |
| 117745 | 0, // FPR64_lo:dsub_hi |
| 117746 | 10, // FPR64_lo:hsub -> FPR16_lo |
| 117747 | 0, // FPR64_lo:hsub_hi |
| 117748 | 0, // FPR64_lo:psub |
| 117749 | 0, // FPR64_lo:psub0 |
| 117750 | 0, // FPR64_lo:psub1 |
| 117751 | 0, // FPR64_lo:qsub0 |
| 117752 | 0, // FPR64_lo:qsub1 |
| 117753 | 0, // FPR64_lo:qsub2 |
| 117754 | 0, // FPR64_lo:qsub3 |
| 117755 | 44, // FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 117756 | 0, // FPR64_lo:ssub_hi |
| 117757 | 0, // FPR64_lo:sub_32 |
| 117758 | 0, // FPR64_lo:sub_32_hi |
| 117759 | 0, // FPR64_lo:sube32 |
| 117760 | 0, // FPR64_lo:sube64 |
| 117761 | 0, // FPR64_lo:subo32 |
| 117762 | 0, // FPR64_lo:subo64 |
| 117763 | 0, // FPR64_lo:x8sub_0 |
| 117764 | 0, // FPR64_lo:x8sub_1 |
| 117765 | 0, // FPR64_lo:x8sub_2 |
| 117766 | 0, // FPR64_lo:x8sub_3 |
| 117767 | 0, // FPR64_lo:x8sub_4 |
| 117768 | 0, // FPR64_lo:x8sub_5 |
| 117769 | 0, // FPR64_lo:x8sub_6 |
| 117770 | 0, // FPR64_lo:x8sub_7 |
| 117771 | 0, // FPR64_lo:zasubb |
| 117772 | 0, // FPR64_lo:zasubd0 |
| 117773 | 0, // FPR64_lo:zasubd1 |
| 117774 | 0, // FPR64_lo:zasubh0 |
| 117775 | 0, // FPR64_lo:zasubh1 |
| 117776 | 0, // FPR64_lo:zasubq0 |
| 117777 | 0, // FPR64_lo:zasubq1 |
| 117778 | 0, // FPR64_lo:zasubs0 |
| 117779 | 0, // FPR64_lo:zasubs1 |
| 117780 | 0, // FPR64_lo:zsub |
| 117781 | 0, // FPR64_lo:zsub0 |
| 117782 | 0, // FPR64_lo:zsub1 |
| 117783 | 0, // FPR64_lo:zsub2 |
| 117784 | 0, // FPR64_lo:zsub3 |
| 117785 | 0, // FPR64_lo:zsub_hi |
| 117786 | 0, // FPR64_lo:zasubd1_then_zasubq0 |
| 117787 | 0, // FPR64_lo:zasubd1_then_zasubq1 |
| 117788 | 0, // FPR64_lo:zasubs1_then_zasubd0 |
| 117789 | 0, // FPR64_lo:zasubs1_then_zasubd1 |
| 117790 | 0, // FPR64_lo:zasubs1_then_zasubq0 |
| 117791 | 0, // FPR64_lo:zasubs1_then_zasubq1 |
| 117792 | 0, // FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 117793 | 0, // FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 117794 | 0, // FPR64_lo:zasubh1_then_zasubd0 |
| 117795 | 0, // FPR64_lo:zasubh1_then_zasubd1 |
| 117796 | 0, // FPR64_lo:zasubh1_then_zasubq0 |
| 117797 | 0, // FPR64_lo:zasubh1_then_zasubq1 |
| 117798 | 0, // FPR64_lo:zasubh1_then_zasubs0 |
| 117799 | 0, // FPR64_lo:zasubh1_then_zasubs1 |
| 117800 | 0, // FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 117801 | 0, // FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 117802 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 117803 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 117804 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 117805 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 117806 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117807 | 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117808 | 0, // FPR64_lo:dsub1_then_bsub |
| 117809 | 0, // FPR64_lo:dsub1_then_bsub_hi |
| 117810 | 0, // FPR64_lo:dsub1_then_hsub |
| 117811 | 0, // FPR64_lo:dsub1_then_hsub_hi |
| 117812 | 0, // FPR64_lo:dsub1_then_ssub |
| 117813 | 0, // FPR64_lo:dsub1_then_ssub_hi |
| 117814 | 0, // FPR64_lo:dsub3_then_bsub |
| 117815 | 0, // FPR64_lo:dsub3_then_bsub_hi |
| 117816 | 0, // FPR64_lo:dsub3_then_hsub |
| 117817 | 0, // FPR64_lo:dsub3_then_hsub_hi |
| 117818 | 0, // FPR64_lo:dsub3_then_ssub |
| 117819 | 0, // FPR64_lo:dsub3_then_ssub_hi |
| 117820 | 0, // FPR64_lo:dsub2_then_bsub |
| 117821 | 0, // FPR64_lo:dsub2_then_bsub_hi |
| 117822 | 0, // FPR64_lo:dsub2_then_hsub |
| 117823 | 0, // FPR64_lo:dsub2_then_hsub_hi |
| 117824 | 0, // FPR64_lo:dsub2_then_ssub |
| 117825 | 0, // FPR64_lo:dsub2_then_ssub_hi |
| 117826 | 0, // FPR64_lo:psub1_then_psub |
| 117827 | 0, // FPR64_lo:qsub1_then_dsub_hi |
| 117828 | 0, // FPR64_lo:qsub3_then_dsub_hi |
| 117829 | 0, // FPR64_lo:qsub2_then_dsub_hi |
| 117830 | 0, // FPR64_lo:x8sub_7_then_sub_32 |
| 117831 | 0, // FPR64_lo:x8sub_7_then_sub_32_hi |
| 117832 | 0, // FPR64_lo:x8sub_6_then_sub_32 |
| 117833 | 0, // FPR64_lo:x8sub_6_then_sub_32_hi |
| 117834 | 0, // FPR64_lo:x8sub_5_then_sub_32 |
| 117835 | 0, // FPR64_lo:x8sub_5_then_sub_32_hi |
| 117836 | 0, // FPR64_lo:x8sub_4_then_sub_32 |
| 117837 | 0, // FPR64_lo:x8sub_4_then_sub_32_hi |
| 117838 | 0, // FPR64_lo:x8sub_3_then_sub_32 |
| 117839 | 0, // FPR64_lo:x8sub_3_then_sub_32_hi |
| 117840 | 0, // FPR64_lo:x8sub_2_then_sub_32 |
| 117841 | 0, // FPR64_lo:x8sub_2_then_sub_32_hi |
| 117842 | 0, // FPR64_lo:x8sub_1_then_sub_32 |
| 117843 | 0, // FPR64_lo:x8sub_1_then_sub_32_hi |
| 117844 | 0, // FPR64_lo:subo64_then_sub_32 |
| 117845 | 0, // FPR64_lo:subo64_then_sub_32_hi |
| 117846 | 0, // FPR64_lo:zsub1_then_zsub_hi |
| 117847 | 0, // FPR64_lo:zsub3_then_zsub_hi |
| 117848 | 0, // FPR64_lo:zsub2_then_zsub_hi |
| 117849 | 0, // FPR64_lo:dsub0_dsub1 |
| 117850 | 0, // FPR64_lo:dsub0_dsub1_dsub2 |
| 117851 | 0, // FPR64_lo:dsub1_dsub2 |
| 117852 | 0, // FPR64_lo:dsub1_dsub2_dsub3 |
| 117853 | 0, // FPR64_lo:dsub2_dsub3 |
| 117854 | 0, // FPR64_lo:dsub_dsub1 |
| 117855 | 0, // FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 117856 | 0, // FPR64_lo:dsub_dsub1_dsub2 |
| 117857 | 0, // FPR64_lo:qsub0_qsub1 |
| 117858 | 0, // FPR64_lo:qsub0_qsub1_qsub2 |
| 117859 | 0, // FPR64_lo:qsub1_qsub2 |
| 117860 | 0, // FPR64_lo:qsub1_qsub2_qsub3 |
| 117861 | 0, // FPR64_lo:qsub2_qsub3 |
| 117862 | 0, // FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 117863 | 0, // FPR64_lo:x8sub_0_x8sub_1 |
| 117864 | 0, // FPR64_lo:x8sub_2_x8sub_3 |
| 117865 | 0, // FPR64_lo:x8sub_4_x8sub_5 |
| 117866 | 0, // FPR64_lo:x8sub_6_x8sub_7 |
| 117867 | 0, // FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 117868 | 0, // FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 117869 | 0, // FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 117870 | 0, // FPR64_lo:sub_32_subo64_then_sub_32 |
| 117871 | 0, // FPR64_lo:zsub_qsub1 |
| 117872 | 0, // FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 117873 | 0, // FPR64_lo:zsub_qsub1_qsub2 |
| 117874 | 0, // FPR64_lo:zsub0_zsub1 |
| 117875 | 0, // FPR64_lo:zsub0_zsub1_zsub2 |
| 117876 | 0, // FPR64_lo:zsub1_zsub2 |
| 117877 | 0, // FPR64_lo:zsub1_zsub2_zsub3 |
| 117878 | 0, // FPR64_lo:zsub2_zsub3 |
| 117879 | 0, // FPR64_lo:zsub0_zsub2 |
| 117880 | 0, // FPR64_lo:zsub1_zsub3 |
| 117881 | }, |
| 117882 | { // GPR64arg |
| 117883 | 0, // GPR64arg:bsub |
| 117884 | 0, // GPR64arg:bsub_hi |
| 117885 | 0, // GPR64arg:dsub |
| 117886 | 0, // GPR64arg:dsub0 |
| 117887 | 0, // GPR64arg:dsub1 |
| 117888 | 0, // GPR64arg:dsub2 |
| 117889 | 0, // GPR64arg:dsub3 |
| 117890 | 0, // GPR64arg:dsub_hi |
| 117891 | 0, // GPR64arg:hsub |
| 117892 | 0, // GPR64arg:hsub_hi |
| 117893 | 0, // GPR64arg:psub |
| 117894 | 0, // GPR64arg:psub0 |
| 117895 | 0, // GPR64arg:psub1 |
| 117896 | 0, // GPR64arg:qsub0 |
| 117897 | 0, // GPR64arg:qsub1 |
| 117898 | 0, // GPR64arg:qsub2 |
| 117899 | 0, // GPR64arg:qsub3 |
| 117900 | 0, // GPR64arg:ssub |
| 117901 | 0, // GPR64arg:ssub_hi |
| 117902 | 45, // GPR64arg:sub_32 -> GPR32arg |
| 117903 | 0, // GPR64arg:sub_32_hi |
| 117904 | 0, // GPR64arg:sube32 |
| 117905 | 0, // GPR64arg:sube64 |
| 117906 | 0, // GPR64arg:subo32 |
| 117907 | 0, // GPR64arg:subo64 |
| 117908 | 0, // GPR64arg:x8sub_0 |
| 117909 | 0, // GPR64arg:x8sub_1 |
| 117910 | 0, // GPR64arg:x8sub_2 |
| 117911 | 0, // GPR64arg:x8sub_3 |
| 117912 | 0, // GPR64arg:x8sub_4 |
| 117913 | 0, // GPR64arg:x8sub_5 |
| 117914 | 0, // GPR64arg:x8sub_6 |
| 117915 | 0, // GPR64arg:x8sub_7 |
| 117916 | 0, // GPR64arg:zasubb |
| 117917 | 0, // GPR64arg:zasubd0 |
| 117918 | 0, // GPR64arg:zasubd1 |
| 117919 | 0, // GPR64arg:zasubh0 |
| 117920 | 0, // GPR64arg:zasubh1 |
| 117921 | 0, // GPR64arg:zasubq0 |
| 117922 | 0, // GPR64arg:zasubq1 |
| 117923 | 0, // GPR64arg:zasubs0 |
| 117924 | 0, // GPR64arg:zasubs1 |
| 117925 | 0, // GPR64arg:zsub |
| 117926 | 0, // GPR64arg:zsub0 |
| 117927 | 0, // GPR64arg:zsub1 |
| 117928 | 0, // GPR64arg:zsub2 |
| 117929 | 0, // GPR64arg:zsub3 |
| 117930 | 0, // GPR64arg:zsub_hi |
| 117931 | 0, // GPR64arg:zasubd1_then_zasubq0 |
| 117932 | 0, // GPR64arg:zasubd1_then_zasubq1 |
| 117933 | 0, // GPR64arg:zasubs1_then_zasubd0 |
| 117934 | 0, // GPR64arg:zasubs1_then_zasubd1 |
| 117935 | 0, // GPR64arg:zasubs1_then_zasubq0 |
| 117936 | 0, // GPR64arg:zasubs1_then_zasubq1 |
| 117937 | 0, // GPR64arg:zasubs1_then_zasubd1_then_zasubq0 |
| 117938 | 0, // GPR64arg:zasubs1_then_zasubd1_then_zasubq1 |
| 117939 | 0, // GPR64arg:zasubh1_then_zasubd0 |
| 117940 | 0, // GPR64arg:zasubh1_then_zasubd1 |
| 117941 | 0, // GPR64arg:zasubh1_then_zasubq0 |
| 117942 | 0, // GPR64arg:zasubh1_then_zasubq1 |
| 117943 | 0, // GPR64arg:zasubh1_then_zasubs0 |
| 117944 | 0, // GPR64arg:zasubh1_then_zasubs1 |
| 117945 | 0, // GPR64arg:zasubh1_then_zasubd1_then_zasubq0 |
| 117946 | 0, // GPR64arg:zasubh1_then_zasubd1_then_zasubq1 |
| 117947 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd0 |
| 117948 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1 |
| 117949 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubq0 |
| 117950 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubq1 |
| 117951 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 117952 | 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 117953 | 0, // GPR64arg:dsub1_then_bsub |
| 117954 | 0, // GPR64arg:dsub1_then_bsub_hi |
| 117955 | 0, // GPR64arg:dsub1_then_hsub |
| 117956 | 0, // GPR64arg:dsub1_then_hsub_hi |
| 117957 | 0, // GPR64arg:dsub1_then_ssub |
| 117958 | 0, // GPR64arg:dsub1_then_ssub_hi |
| 117959 | 0, // GPR64arg:dsub3_then_bsub |
| 117960 | 0, // GPR64arg:dsub3_then_bsub_hi |
| 117961 | 0, // GPR64arg:dsub3_then_hsub |
| 117962 | 0, // GPR64arg:dsub3_then_hsub_hi |
| 117963 | 0, // GPR64arg:dsub3_then_ssub |
| 117964 | 0, // GPR64arg:dsub3_then_ssub_hi |
| 117965 | 0, // GPR64arg:dsub2_then_bsub |
| 117966 | 0, // GPR64arg:dsub2_then_bsub_hi |
| 117967 | 0, // GPR64arg:dsub2_then_hsub |
| 117968 | 0, // GPR64arg:dsub2_then_hsub_hi |
| 117969 | 0, // GPR64arg:dsub2_then_ssub |
| 117970 | 0, // GPR64arg:dsub2_then_ssub_hi |
| 117971 | 0, // GPR64arg:psub1_then_psub |
| 117972 | 0, // GPR64arg:qsub1_then_dsub_hi |
| 117973 | 0, // GPR64arg:qsub3_then_dsub_hi |
| 117974 | 0, // GPR64arg:qsub2_then_dsub_hi |
| 117975 | 0, // GPR64arg:x8sub_7_then_sub_32 |
| 117976 | 0, // GPR64arg:x8sub_7_then_sub_32_hi |
| 117977 | 0, // GPR64arg:x8sub_6_then_sub_32 |
| 117978 | 0, // GPR64arg:x8sub_6_then_sub_32_hi |
| 117979 | 0, // GPR64arg:x8sub_5_then_sub_32 |
| 117980 | 0, // GPR64arg:x8sub_5_then_sub_32_hi |
| 117981 | 0, // GPR64arg:x8sub_4_then_sub_32 |
| 117982 | 0, // GPR64arg:x8sub_4_then_sub_32_hi |
| 117983 | 0, // GPR64arg:x8sub_3_then_sub_32 |
| 117984 | 0, // GPR64arg:x8sub_3_then_sub_32_hi |
| 117985 | 0, // GPR64arg:x8sub_2_then_sub_32 |
| 117986 | 0, // GPR64arg:x8sub_2_then_sub_32_hi |
| 117987 | 0, // GPR64arg:x8sub_1_then_sub_32 |
| 117988 | 0, // GPR64arg:x8sub_1_then_sub_32_hi |
| 117989 | 0, // GPR64arg:subo64_then_sub_32 |
| 117990 | 0, // GPR64arg:subo64_then_sub_32_hi |
| 117991 | 0, // GPR64arg:zsub1_then_zsub_hi |
| 117992 | 0, // GPR64arg:zsub3_then_zsub_hi |
| 117993 | 0, // GPR64arg:zsub2_then_zsub_hi |
| 117994 | 0, // GPR64arg:dsub0_dsub1 |
| 117995 | 0, // GPR64arg:dsub0_dsub1_dsub2 |
| 117996 | 0, // GPR64arg:dsub1_dsub2 |
| 117997 | 0, // GPR64arg:dsub1_dsub2_dsub3 |
| 117998 | 0, // GPR64arg:dsub2_dsub3 |
| 117999 | 0, // GPR64arg:dsub_dsub1 |
| 118000 | 0, // GPR64arg:dsub_dsub1_dsub2_dsub3 |
| 118001 | 0, // GPR64arg:dsub_dsub1_dsub2 |
| 118002 | 0, // GPR64arg:qsub0_qsub1 |
| 118003 | 0, // GPR64arg:qsub0_qsub1_qsub2 |
| 118004 | 0, // GPR64arg:qsub1_qsub2 |
| 118005 | 0, // GPR64arg:qsub1_qsub2_qsub3 |
| 118006 | 0, // GPR64arg:qsub2_qsub3 |
| 118007 | 0, // GPR64arg:sub_32_x8sub_1_then_sub_32 |
| 118008 | 0, // GPR64arg:x8sub_0_x8sub_1 |
| 118009 | 0, // GPR64arg:x8sub_2_x8sub_3 |
| 118010 | 0, // GPR64arg:x8sub_4_x8sub_5 |
| 118011 | 0, // GPR64arg:x8sub_6_x8sub_7 |
| 118012 | 0, // GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118013 | 0, // GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118014 | 0, // GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118015 | 0, // GPR64arg:sub_32_subo64_then_sub_32 |
| 118016 | 0, // GPR64arg:zsub_qsub1 |
| 118017 | 0, // GPR64arg:zsub_qsub1_qsub2_qsub3 |
| 118018 | 0, // GPR64arg:zsub_qsub1_qsub2 |
| 118019 | 0, // GPR64arg:zsub0_zsub1 |
| 118020 | 0, // GPR64arg:zsub0_zsub1_zsub2 |
| 118021 | 0, // GPR64arg:zsub1_zsub2 |
| 118022 | 0, // GPR64arg:zsub1_zsub2_zsub3 |
| 118023 | 0, // GPR64arg:zsub2_zsub3 |
| 118024 | 0, // GPR64arg:zsub0_zsub2 |
| 118025 | 0, // GPR64arg:zsub1_zsub3 |
| 118026 | }, |
| 118027 | { // FIXED_REGS |
| 118028 | 0, // FIXED_REGS:bsub |
| 118029 | 0, // FIXED_REGS:bsub_hi |
| 118030 | 0, // FIXED_REGS:dsub |
| 118031 | 0, // FIXED_REGS:dsub0 |
| 118032 | 0, // FIXED_REGS:dsub1 |
| 118033 | 0, // FIXED_REGS:dsub2 |
| 118034 | 0, // FIXED_REGS:dsub3 |
| 118035 | 0, // FIXED_REGS:dsub_hi |
| 118036 | 0, // FIXED_REGS:hsub |
| 118037 | 0, // FIXED_REGS:hsub_hi |
| 118038 | 0, // FIXED_REGS:psub |
| 118039 | 0, // FIXED_REGS:psub0 |
| 118040 | 0, // FIXED_REGS:psub1 |
| 118041 | 0, // FIXED_REGS:qsub0 |
| 118042 | 0, // FIXED_REGS:qsub1 |
| 118043 | 0, // FIXED_REGS:qsub2 |
| 118044 | 0, // FIXED_REGS:qsub3 |
| 118045 | 0, // FIXED_REGS:ssub |
| 118046 | 0, // FIXED_REGS:ssub_hi |
| 118047 | 42, // FIXED_REGS:sub_32 -> GPR32sp |
| 118048 | 0, // FIXED_REGS:sub_32_hi |
| 118049 | 0, // FIXED_REGS:sube32 |
| 118050 | 0, // FIXED_REGS:sube64 |
| 118051 | 0, // FIXED_REGS:subo32 |
| 118052 | 0, // FIXED_REGS:subo64 |
| 118053 | 0, // FIXED_REGS:x8sub_0 |
| 118054 | 0, // FIXED_REGS:x8sub_1 |
| 118055 | 0, // FIXED_REGS:x8sub_2 |
| 118056 | 0, // FIXED_REGS:x8sub_3 |
| 118057 | 0, // FIXED_REGS:x8sub_4 |
| 118058 | 0, // FIXED_REGS:x8sub_5 |
| 118059 | 0, // FIXED_REGS:x8sub_6 |
| 118060 | 0, // FIXED_REGS:x8sub_7 |
| 118061 | 0, // FIXED_REGS:zasubb |
| 118062 | 0, // FIXED_REGS:zasubd0 |
| 118063 | 0, // FIXED_REGS:zasubd1 |
| 118064 | 0, // FIXED_REGS:zasubh0 |
| 118065 | 0, // FIXED_REGS:zasubh1 |
| 118066 | 0, // FIXED_REGS:zasubq0 |
| 118067 | 0, // FIXED_REGS:zasubq1 |
| 118068 | 0, // FIXED_REGS:zasubs0 |
| 118069 | 0, // FIXED_REGS:zasubs1 |
| 118070 | 0, // FIXED_REGS:zsub |
| 118071 | 0, // FIXED_REGS:zsub0 |
| 118072 | 0, // FIXED_REGS:zsub1 |
| 118073 | 0, // FIXED_REGS:zsub2 |
| 118074 | 0, // FIXED_REGS:zsub3 |
| 118075 | 0, // FIXED_REGS:zsub_hi |
| 118076 | 0, // FIXED_REGS:zasubd1_then_zasubq0 |
| 118077 | 0, // FIXED_REGS:zasubd1_then_zasubq1 |
| 118078 | 0, // FIXED_REGS:zasubs1_then_zasubd0 |
| 118079 | 0, // FIXED_REGS:zasubs1_then_zasubd1 |
| 118080 | 0, // FIXED_REGS:zasubs1_then_zasubq0 |
| 118081 | 0, // FIXED_REGS:zasubs1_then_zasubq1 |
| 118082 | 0, // FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 |
| 118083 | 0, // FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 |
| 118084 | 0, // FIXED_REGS:zasubh1_then_zasubd0 |
| 118085 | 0, // FIXED_REGS:zasubh1_then_zasubd1 |
| 118086 | 0, // FIXED_REGS:zasubh1_then_zasubq0 |
| 118087 | 0, // FIXED_REGS:zasubh1_then_zasubq1 |
| 118088 | 0, // FIXED_REGS:zasubh1_then_zasubs0 |
| 118089 | 0, // FIXED_REGS:zasubh1_then_zasubs1 |
| 118090 | 0, // FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 |
| 118091 | 0, // FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 |
| 118092 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 |
| 118093 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 |
| 118094 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 |
| 118095 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 |
| 118096 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118097 | 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118098 | 0, // FIXED_REGS:dsub1_then_bsub |
| 118099 | 0, // FIXED_REGS:dsub1_then_bsub_hi |
| 118100 | 0, // FIXED_REGS:dsub1_then_hsub |
| 118101 | 0, // FIXED_REGS:dsub1_then_hsub_hi |
| 118102 | 0, // FIXED_REGS:dsub1_then_ssub |
| 118103 | 0, // FIXED_REGS:dsub1_then_ssub_hi |
| 118104 | 0, // FIXED_REGS:dsub3_then_bsub |
| 118105 | 0, // FIXED_REGS:dsub3_then_bsub_hi |
| 118106 | 0, // FIXED_REGS:dsub3_then_hsub |
| 118107 | 0, // FIXED_REGS:dsub3_then_hsub_hi |
| 118108 | 0, // FIXED_REGS:dsub3_then_ssub |
| 118109 | 0, // FIXED_REGS:dsub3_then_ssub_hi |
| 118110 | 0, // FIXED_REGS:dsub2_then_bsub |
| 118111 | 0, // FIXED_REGS:dsub2_then_bsub_hi |
| 118112 | 0, // FIXED_REGS:dsub2_then_hsub |
| 118113 | 0, // FIXED_REGS:dsub2_then_hsub_hi |
| 118114 | 0, // FIXED_REGS:dsub2_then_ssub |
| 118115 | 0, // FIXED_REGS:dsub2_then_ssub_hi |
| 118116 | 0, // FIXED_REGS:psub1_then_psub |
| 118117 | 0, // FIXED_REGS:qsub1_then_dsub_hi |
| 118118 | 0, // FIXED_REGS:qsub3_then_dsub_hi |
| 118119 | 0, // FIXED_REGS:qsub2_then_dsub_hi |
| 118120 | 0, // FIXED_REGS:x8sub_7_then_sub_32 |
| 118121 | 0, // FIXED_REGS:x8sub_7_then_sub_32_hi |
| 118122 | 0, // FIXED_REGS:x8sub_6_then_sub_32 |
| 118123 | 0, // FIXED_REGS:x8sub_6_then_sub_32_hi |
| 118124 | 0, // FIXED_REGS:x8sub_5_then_sub_32 |
| 118125 | 0, // FIXED_REGS:x8sub_5_then_sub_32_hi |
| 118126 | 0, // FIXED_REGS:x8sub_4_then_sub_32 |
| 118127 | 0, // FIXED_REGS:x8sub_4_then_sub_32_hi |
| 118128 | 0, // FIXED_REGS:x8sub_3_then_sub_32 |
| 118129 | 0, // FIXED_REGS:x8sub_3_then_sub_32_hi |
| 118130 | 0, // FIXED_REGS:x8sub_2_then_sub_32 |
| 118131 | 0, // FIXED_REGS:x8sub_2_then_sub_32_hi |
| 118132 | 0, // FIXED_REGS:x8sub_1_then_sub_32 |
| 118133 | 0, // FIXED_REGS:x8sub_1_then_sub_32_hi |
| 118134 | 0, // FIXED_REGS:subo64_then_sub_32 |
| 118135 | 0, // FIXED_REGS:subo64_then_sub_32_hi |
| 118136 | 0, // FIXED_REGS:zsub1_then_zsub_hi |
| 118137 | 0, // FIXED_REGS:zsub3_then_zsub_hi |
| 118138 | 0, // FIXED_REGS:zsub2_then_zsub_hi |
| 118139 | 0, // FIXED_REGS:dsub0_dsub1 |
| 118140 | 0, // FIXED_REGS:dsub0_dsub1_dsub2 |
| 118141 | 0, // FIXED_REGS:dsub1_dsub2 |
| 118142 | 0, // FIXED_REGS:dsub1_dsub2_dsub3 |
| 118143 | 0, // FIXED_REGS:dsub2_dsub3 |
| 118144 | 0, // FIXED_REGS:dsub_dsub1 |
| 118145 | 0, // FIXED_REGS:dsub_dsub1_dsub2_dsub3 |
| 118146 | 0, // FIXED_REGS:dsub_dsub1_dsub2 |
| 118147 | 0, // FIXED_REGS:qsub0_qsub1 |
| 118148 | 0, // FIXED_REGS:qsub0_qsub1_qsub2 |
| 118149 | 0, // FIXED_REGS:qsub1_qsub2 |
| 118150 | 0, // FIXED_REGS:qsub1_qsub2_qsub3 |
| 118151 | 0, // FIXED_REGS:qsub2_qsub3 |
| 118152 | 0, // FIXED_REGS:sub_32_x8sub_1_then_sub_32 |
| 118153 | 0, // FIXED_REGS:x8sub_0_x8sub_1 |
| 118154 | 0, // FIXED_REGS:x8sub_2_x8sub_3 |
| 118155 | 0, // FIXED_REGS:x8sub_4_x8sub_5 |
| 118156 | 0, // FIXED_REGS:x8sub_6_x8sub_7 |
| 118157 | 0, // FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118158 | 0, // FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118159 | 0, // FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118160 | 0, // FIXED_REGS:sub_32_subo64_then_sub_32 |
| 118161 | 0, // FIXED_REGS:zsub_qsub1 |
| 118162 | 0, // FIXED_REGS:zsub_qsub1_qsub2_qsub3 |
| 118163 | 0, // FIXED_REGS:zsub_qsub1_qsub2 |
| 118164 | 0, // FIXED_REGS:zsub0_zsub1 |
| 118165 | 0, // FIXED_REGS:zsub0_zsub1_zsub2 |
| 118166 | 0, // FIXED_REGS:zsub1_zsub2 |
| 118167 | 0, // FIXED_REGS:zsub1_zsub2_zsub3 |
| 118168 | 0, // FIXED_REGS:zsub2_zsub3 |
| 118169 | 0, // FIXED_REGS:zsub0_zsub2 |
| 118170 | 0, // FIXED_REGS:zsub1_zsub3 |
| 118171 | }, |
| 118172 | { // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 118173 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub |
| 118174 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub_hi |
| 118175 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub |
| 118176 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 |
| 118177 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 |
| 118178 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 |
| 118179 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 |
| 118180 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_hi |
| 118181 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub |
| 118182 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub_hi |
| 118183 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub |
| 118184 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 |
| 118185 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 |
| 118186 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 |
| 118187 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 |
| 118188 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 |
| 118189 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 |
| 118190 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub |
| 118191 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub_hi |
| 118192 | 46, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 |
| 118193 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_hi |
| 118194 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 |
| 118195 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 |
| 118196 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 |
| 118197 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 |
| 118198 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 |
| 118199 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 |
| 118200 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 |
| 118201 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 |
| 118202 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 |
| 118203 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 |
| 118204 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 |
| 118205 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 |
| 118206 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb |
| 118207 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 |
| 118208 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 |
| 118209 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 |
| 118210 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 |
| 118211 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 |
| 118212 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 |
| 118213 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 |
| 118214 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 |
| 118215 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub |
| 118216 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 |
| 118217 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 |
| 118218 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 |
| 118219 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 |
| 118220 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi |
| 118221 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 118222 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 118223 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 118224 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 118225 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 118226 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 118227 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 118228 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 118229 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 118230 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 118231 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 118232 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 118233 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 118234 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 118235 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 118236 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 118237 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 118238 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 118239 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 118240 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 118241 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118242 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118243 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 118244 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 118245 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 118246 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 118247 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 118248 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 118249 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 118250 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 118251 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 118252 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 118253 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 118254 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 118255 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 118256 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 118257 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 118258 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 118259 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 118260 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 118261 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1_then_psub |
| 118262 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 118263 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 118264 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 118265 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 |
| 118266 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 118267 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 |
| 118268 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 118269 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 |
| 118270 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 118271 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 |
| 118272 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 118273 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 |
| 118274 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 118275 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 |
| 118276 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 118277 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 |
| 118278 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 118279 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 |
| 118280 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 118281 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 118282 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 118283 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 118284 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 118285 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 118286 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 118287 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 118288 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 118289 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1 |
| 118290 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 118291 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 118292 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 118293 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 118294 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 118295 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 118296 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 118297 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 |
| 118298 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 |
| 118299 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 |
| 118300 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 |
| 118301 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 |
| 118302 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118303 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118304 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118305 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 |
| 118306 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1 |
| 118307 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 118308 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 118309 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 118310 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 118311 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 118312 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 118313 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 118314 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 118315 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 118316 | }, |
| 118317 | { // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 118318 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 118319 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 118320 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 118321 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 118322 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 118323 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 118324 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 118325 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 118326 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 118327 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 118328 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 118329 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 118330 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 118331 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 118332 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 118333 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 118334 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 118335 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 118336 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 118337 | 47, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 |
| 118338 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 118339 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 118340 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 118341 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 118342 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 118343 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 |
| 118344 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 |
| 118345 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 |
| 118346 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 |
| 118347 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 |
| 118348 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 |
| 118349 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 |
| 118350 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 |
| 118351 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 118352 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 118353 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 118354 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 118355 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 118356 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 118357 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 118358 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 118359 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 118360 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 118361 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 118362 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 118363 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 118364 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 118365 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 118366 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 118367 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 118368 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 118369 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 118370 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 118371 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 118372 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 118373 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 118374 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 118375 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 118376 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 118377 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 118378 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 118379 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 118380 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 118381 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 118382 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 118383 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 118384 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 118385 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 118386 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118387 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118388 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 118389 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 118390 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 118391 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 118392 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 118393 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 118394 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 118395 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 118396 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 118397 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 118398 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 118399 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 118400 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 118401 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 118402 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 118403 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 118404 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 118405 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 118406 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 118407 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 118408 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 118409 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 118410 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 |
| 118411 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 118412 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 |
| 118413 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 118414 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 |
| 118415 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 118416 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 |
| 118417 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 118418 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 |
| 118419 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 118420 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 |
| 118421 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 118422 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 |
| 118423 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 118424 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 118425 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 118426 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 118427 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 118428 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 118429 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 118430 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 118431 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 118432 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 118433 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 118434 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 118435 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 118436 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 118437 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 118438 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 118439 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 118440 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 118441 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 118442 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 |
| 118443 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 |
| 118444 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 |
| 118445 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 |
| 118446 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 |
| 118447 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118448 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118449 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118450 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 118451 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 118452 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 118453 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 118454 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 118455 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 118456 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 118457 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 118458 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 118459 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 118460 | 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 118461 | }, |
| 118462 | { // FIXED_REGS_with_sub_32 |
| 118463 | 0, // FIXED_REGS_with_sub_32:bsub |
| 118464 | 0, // FIXED_REGS_with_sub_32:bsub_hi |
| 118465 | 0, // FIXED_REGS_with_sub_32:dsub |
| 118466 | 0, // FIXED_REGS_with_sub_32:dsub0 |
| 118467 | 0, // FIXED_REGS_with_sub_32:dsub1 |
| 118468 | 0, // FIXED_REGS_with_sub_32:dsub2 |
| 118469 | 0, // FIXED_REGS_with_sub_32:dsub3 |
| 118470 | 0, // FIXED_REGS_with_sub_32:dsub_hi |
| 118471 | 0, // FIXED_REGS_with_sub_32:hsub |
| 118472 | 0, // FIXED_REGS_with_sub_32:hsub_hi |
| 118473 | 0, // FIXED_REGS_with_sub_32:psub |
| 118474 | 0, // FIXED_REGS_with_sub_32:psub0 |
| 118475 | 0, // FIXED_REGS_with_sub_32:psub1 |
| 118476 | 0, // FIXED_REGS_with_sub_32:qsub0 |
| 118477 | 0, // FIXED_REGS_with_sub_32:qsub1 |
| 118478 | 0, // FIXED_REGS_with_sub_32:qsub2 |
| 118479 | 0, // FIXED_REGS_with_sub_32:qsub3 |
| 118480 | 0, // FIXED_REGS_with_sub_32:ssub |
| 118481 | 0, // FIXED_REGS_with_sub_32:ssub_hi |
| 118482 | 42, // FIXED_REGS_with_sub_32:sub_32 -> GPR32sp |
| 118483 | 0, // FIXED_REGS_with_sub_32:sub_32_hi |
| 118484 | 0, // FIXED_REGS_with_sub_32:sube32 |
| 118485 | 0, // FIXED_REGS_with_sub_32:sube64 |
| 118486 | 0, // FIXED_REGS_with_sub_32:subo32 |
| 118487 | 0, // FIXED_REGS_with_sub_32:subo64 |
| 118488 | 0, // FIXED_REGS_with_sub_32:x8sub_0 |
| 118489 | 0, // FIXED_REGS_with_sub_32:x8sub_1 |
| 118490 | 0, // FIXED_REGS_with_sub_32:x8sub_2 |
| 118491 | 0, // FIXED_REGS_with_sub_32:x8sub_3 |
| 118492 | 0, // FIXED_REGS_with_sub_32:x8sub_4 |
| 118493 | 0, // FIXED_REGS_with_sub_32:x8sub_5 |
| 118494 | 0, // FIXED_REGS_with_sub_32:x8sub_6 |
| 118495 | 0, // FIXED_REGS_with_sub_32:x8sub_7 |
| 118496 | 0, // FIXED_REGS_with_sub_32:zasubb |
| 118497 | 0, // FIXED_REGS_with_sub_32:zasubd0 |
| 118498 | 0, // FIXED_REGS_with_sub_32:zasubd1 |
| 118499 | 0, // FIXED_REGS_with_sub_32:zasubh0 |
| 118500 | 0, // FIXED_REGS_with_sub_32:zasubh1 |
| 118501 | 0, // FIXED_REGS_with_sub_32:zasubq0 |
| 118502 | 0, // FIXED_REGS_with_sub_32:zasubq1 |
| 118503 | 0, // FIXED_REGS_with_sub_32:zasubs0 |
| 118504 | 0, // FIXED_REGS_with_sub_32:zasubs1 |
| 118505 | 0, // FIXED_REGS_with_sub_32:zsub |
| 118506 | 0, // FIXED_REGS_with_sub_32:zsub0 |
| 118507 | 0, // FIXED_REGS_with_sub_32:zsub1 |
| 118508 | 0, // FIXED_REGS_with_sub_32:zsub2 |
| 118509 | 0, // FIXED_REGS_with_sub_32:zsub3 |
| 118510 | 0, // FIXED_REGS_with_sub_32:zsub_hi |
| 118511 | 0, // FIXED_REGS_with_sub_32:zasubd1_then_zasubq0 |
| 118512 | 0, // FIXED_REGS_with_sub_32:zasubd1_then_zasubq1 |
| 118513 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd0 |
| 118514 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1 |
| 118515 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubq0 |
| 118516 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubq1 |
| 118517 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1_then_zasubq0 |
| 118518 | 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1_then_zasubq1 |
| 118519 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd0 |
| 118520 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1 |
| 118521 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubq0 |
| 118522 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubq1 |
| 118523 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs0 |
| 118524 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1 |
| 118525 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1_then_zasubq0 |
| 118526 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1_then_zasubq1 |
| 118527 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd0 |
| 118528 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1 |
| 118529 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubq0 |
| 118530 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubq1 |
| 118531 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118532 | 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118533 | 0, // FIXED_REGS_with_sub_32:dsub1_then_bsub |
| 118534 | 0, // FIXED_REGS_with_sub_32:dsub1_then_bsub_hi |
| 118535 | 0, // FIXED_REGS_with_sub_32:dsub1_then_hsub |
| 118536 | 0, // FIXED_REGS_with_sub_32:dsub1_then_hsub_hi |
| 118537 | 0, // FIXED_REGS_with_sub_32:dsub1_then_ssub |
| 118538 | 0, // FIXED_REGS_with_sub_32:dsub1_then_ssub_hi |
| 118539 | 0, // FIXED_REGS_with_sub_32:dsub3_then_bsub |
| 118540 | 0, // FIXED_REGS_with_sub_32:dsub3_then_bsub_hi |
| 118541 | 0, // FIXED_REGS_with_sub_32:dsub3_then_hsub |
| 118542 | 0, // FIXED_REGS_with_sub_32:dsub3_then_hsub_hi |
| 118543 | 0, // FIXED_REGS_with_sub_32:dsub3_then_ssub |
| 118544 | 0, // FIXED_REGS_with_sub_32:dsub3_then_ssub_hi |
| 118545 | 0, // FIXED_REGS_with_sub_32:dsub2_then_bsub |
| 118546 | 0, // FIXED_REGS_with_sub_32:dsub2_then_bsub_hi |
| 118547 | 0, // FIXED_REGS_with_sub_32:dsub2_then_hsub |
| 118548 | 0, // FIXED_REGS_with_sub_32:dsub2_then_hsub_hi |
| 118549 | 0, // FIXED_REGS_with_sub_32:dsub2_then_ssub |
| 118550 | 0, // FIXED_REGS_with_sub_32:dsub2_then_ssub_hi |
| 118551 | 0, // FIXED_REGS_with_sub_32:psub1_then_psub |
| 118552 | 0, // FIXED_REGS_with_sub_32:qsub1_then_dsub_hi |
| 118553 | 0, // FIXED_REGS_with_sub_32:qsub3_then_dsub_hi |
| 118554 | 0, // FIXED_REGS_with_sub_32:qsub2_then_dsub_hi |
| 118555 | 0, // FIXED_REGS_with_sub_32:x8sub_7_then_sub_32 |
| 118556 | 0, // FIXED_REGS_with_sub_32:x8sub_7_then_sub_32_hi |
| 118557 | 0, // FIXED_REGS_with_sub_32:x8sub_6_then_sub_32 |
| 118558 | 0, // FIXED_REGS_with_sub_32:x8sub_6_then_sub_32_hi |
| 118559 | 0, // FIXED_REGS_with_sub_32:x8sub_5_then_sub_32 |
| 118560 | 0, // FIXED_REGS_with_sub_32:x8sub_5_then_sub_32_hi |
| 118561 | 0, // FIXED_REGS_with_sub_32:x8sub_4_then_sub_32 |
| 118562 | 0, // FIXED_REGS_with_sub_32:x8sub_4_then_sub_32_hi |
| 118563 | 0, // FIXED_REGS_with_sub_32:x8sub_3_then_sub_32 |
| 118564 | 0, // FIXED_REGS_with_sub_32:x8sub_3_then_sub_32_hi |
| 118565 | 0, // FIXED_REGS_with_sub_32:x8sub_2_then_sub_32 |
| 118566 | 0, // FIXED_REGS_with_sub_32:x8sub_2_then_sub_32_hi |
| 118567 | 0, // FIXED_REGS_with_sub_32:x8sub_1_then_sub_32 |
| 118568 | 0, // FIXED_REGS_with_sub_32:x8sub_1_then_sub_32_hi |
| 118569 | 0, // FIXED_REGS_with_sub_32:subo64_then_sub_32 |
| 118570 | 0, // FIXED_REGS_with_sub_32:subo64_then_sub_32_hi |
| 118571 | 0, // FIXED_REGS_with_sub_32:zsub1_then_zsub_hi |
| 118572 | 0, // FIXED_REGS_with_sub_32:zsub3_then_zsub_hi |
| 118573 | 0, // FIXED_REGS_with_sub_32:zsub2_then_zsub_hi |
| 118574 | 0, // FIXED_REGS_with_sub_32:dsub0_dsub1 |
| 118575 | 0, // FIXED_REGS_with_sub_32:dsub0_dsub1_dsub2 |
| 118576 | 0, // FIXED_REGS_with_sub_32:dsub1_dsub2 |
| 118577 | 0, // FIXED_REGS_with_sub_32:dsub1_dsub2_dsub3 |
| 118578 | 0, // FIXED_REGS_with_sub_32:dsub2_dsub3 |
| 118579 | 0, // FIXED_REGS_with_sub_32:dsub_dsub1 |
| 118580 | 0, // FIXED_REGS_with_sub_32:dsub_dsub1_dsub2_dsub3 |
| 118581 | 0, // FIXED_REGS_with_sub_32:dsub_dsub1_dsub2 |
| 118582 | 0, // FIXED_REGS_with_sub_32:qsub0_qsub1 |
| 118583 | 0, // FIXED_REGS_with_sub_32:qsub0_qsub1_qsub2 |
| 118584 | 0, // FIXED_REGS_with_sub_32:qsub1_qsub2 |
| 118585 | 0, // FIXED_REGS_with_sub_32:qsub1_qsub2_qsub3 |
| 118586 | 0, // FIXED_REGS_with_sub_32:qsub2_qsub3 |
| 118587 | 0, // FIXED_REGS_with_sub_32:sub_32_x8sub_1_then_sub_32 |
| 118588 | 0, // FIXED_REGS_with_sub_32:x8sub_0_x8sub_1 |
| 118589 | 0, // FIXED_REGS_with_sub_32:x8sub_2_x8sub_3 |
| 118590 | 0, // FIXED_REGS_with_sub_32:x8sub_4_x8sub_5 |
| 118591 | 0, // FIXED_REGS_with_sub_32:x8sub_6_x8sub_7 |
| 118592 | 0, // FIXED_REGS_with_sub_32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118593 | 0, // FIXED_REGS_with_sub_32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118594 | 0, // FIXED_REGS_with_sub_32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118595 | 0, // FIXED_REGS_with_sub_32:sub_32_subo64_then_sub_32 |
| 118596 | 0, // FIXED_REGS_with_sub_32:zsub_qsub1 |
| 118597 | 0, // FIXED_REGS_with_sub_32:zsub_qsub1_qsub2_qsub3 |
| 118598 | 0, // FIXED_REGS_with_sub_32:zsub_qsub1_qsub2 |
| 118599 | 0, // FIXED_REGS_with_sub_32:zsub0_zsub1 |
| 118600 | 0, // FIXED_REGS_with_sub_32:zsub0_zsub1_zsub2 |
| 118601 | 0, // FIXED_REGS_with_sub_32:zsub1_zsub2 |
| 118602 | 0, // FIXED_REGS_with_sub_32:zsub1_zsub2_zsub3 |
| 118603 | 0, // FIXED_REGS_with_sub_32:zsub2_zsub3 |
| 118604 | 0, // FIXED_REGS_with_sub_32:zsub0_zsub2 |
| 118605 | 0, // FIXED_REGS_with_sub_32:zsub1_zsub3 |
| 118606 | }, |
| 118607 | { // tcGPRx16x17 |
| 118608 | 0, // tcGPRx16x17:bsub |
| 118609 | 0, // tcGPRx16x17:bsub_hi |
| 118610 | 0, // tcGPRx16x17:dsub |
| 118611 | 0, // tcGPRx16x17:dsub0 |
| 118612 | 0, // tcGPRx16x17:dsub1 |
| 118613 | 0, // tcGPRx16x17:dsub2 |
| 118614 | 0, // tcGPRx16x17:dsub3 |
| 118615 | 0, // tcGPRx16x17:dsub_hi |
| 118616 | 0, // tcGPRx16x17:hsub |
| 118617 | 0, // tcGPRx16x17:hsub_hi |
| 118618 | 0, // tcGPRx16x17:psub |
| 118619 | 0, // tcGPRx16x17:psub0 |
| 118620 | 0, // tcGPRx16x17:psub1 |
| 118621 | 0, // tcGPRx16x17:qsub0 |
| 118622 | 0, // tcGPRx16x17:qsub1 |
| 118623 | 0, // tcGPRx16x17:qsub2 |
| 118624 | 0, // tcGPRx16x17:qsub3 |
| 118625 | 0, // tcGPRx16x17:ssub |
| 118626 | 0, // tcGPRx16x17:ssub_hi |
| 118627 | 43, // tcGPRx16x17:sub_32 -> GPR32common |
| 118628 | 0, // tcGPRx16x17:sub_32_hi |
| 118629 | 0, // tcGPRx16x17:sube32 |
| 118630 | 0, // tcGPRx16x17:sube64 |
| 118631 | 0, // tcGPRx16x17:subo32 |
| 118632 | 0, // tcGPRx16x17:subo64 |
| 118633 | 0, // tcGPRx16x17:x8sub_0 |
| 118634 | 0, // tcGPRx16x17:x8sub_1 |
| 118635 | 0, // tcGPRx16x17:x8sub_2 |
| 118636 | 0, // tcGPRx16x17:x8sub_3 |
| 118637 | 0, // tcGPRx16x17:x8sub_4 |
| 118638 | 0, // tcGPRx16x17:x8sub_5 |
| 118639 | 0, // tcGPRx16x17:x8sub_6 |
| 118640 | 0, // tcGPRx16x17:x8sub_7 |
| 118641 | 0, // tcGPRx16x17:zasubb |
| 118642 | 0, // tcGPRx16x17:zasubd0 |
| 118643 | 0, // tcGPRx16x17:zasubd1 |
| 118644 | 0, // tcGPRx16x17:zasubh0 |
| 118645 | 0, // tcGPRx16x17:zasubh1 |
| 118646 | 0, // tcGPRx16x17:zasubq0 |
| 118647 | 0, // tcGPRx16x17:zasubq1 |
| 118648 | 0, // tcGPRx16x17:zasubs0 |
| 118649 | 0, // tcGPRx16x17:zasubs1 |
| 118650 | 0, // tcGPRx16x17:zsub |
| 118651 | 0, // tcGPRx16x17:zsub0 |
| 118652 | 0, // tcGPRx16x17:zsub1 |
| 118653 | 0, // tcGPRx16x17:zsub2 |
| 118654 | 0, // tcGPRx16x17:zsub3 |
| 118655 | 0, // tcGPRx16x17:zsub_hi |
| 118656 | 0, // tcGPRx16x17:zasubd1_then_zasubq0 |
| 118657 | 0, // tcGPRx16x17:zasubd1_then_zasubq1 |
| 118658 | 0, // tcGPRx16x17:zasubs1_then_zasubd0 |
| 118659 | 0, // tcGPRx16x17:zasubs1_then_zasubd1 |
| 118660 | 0, // tcGPRx16x17:zasubs1_then_zasubq0 |
| 118661 | 0, // tcGPRx16x17:zasubs1_then_zasubq1 |
| 118662 | 0, // tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 118663 | 0, // tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 118664 | 0, // tcGPRx16x17:zasubh1_then_zasubd0 |
| 118665 | 0, // tcGPRx16x17:zasubh1_then_zasubd1 |
| 118666 | 0, // tcGPRx16x17:zasubh1_then_zasubq0 |
| 118667 | 0, // tcGPRx16x17:zasubh1_then_zasubq1 |
| 118668 | 0, // tcGPRx16x17:zasubh1_then_zasubs0 |
| 118669 | 0, // tcGPRx16x17:zasubh1_then_zasubs1 |
| 118670 | 0, // tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 118671 | 0, // tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 118672 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 118673 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 118674 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 118675 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 118676 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118677 | 0, // tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118678 | 0, // tcGPRx16x17:dsub1_then_bsub |
| 118679 | 0, // tcGPRx16x17:dsub1_then_bsub_hi |
| 118680 | 0, // tcGPRx16x17:dsub1_then_hsub |
| 118681 | 0, // tcGPRx16x17:dsub1_then_hsub_hi |
| 118682 | 0, // tcGPRx16x17:dsub1_then_ssub |
| 118683 | 0, // tcGPRx16x17:dsub1_then_ssub_hi |
| 118684 | 0, // tcGPRx16x17:dsub3_then_bsub |
| 118685 | 0, // tcGPRx16x17:dsub3_then_bsub_hi |
| 118686 | 0, // tcGPRx16x17:dsub3_then_hsub |
| 118687 | 0, // tcGPRx16x17:dsub3_then_hsub_hi |
| 118688 | 0, // tcGPRx16x17:dsub3_then_ssub |
| 118689 | 0, // tcGPRx16x17:dsub3_then_ssub_hi |
| 118690 | 0, // tcGPRx16x17:dsub2_then_bsub |
| 118691 | 0, // tcGPRx16x17:dsub2_then_bsub_hi |
| 118692 | 0, // tcGPRx16x17:dsub2_then_hsub |
| 118693 | 0, // tcGPRx16x17:dsub2_then_hsub_hi |
| 118694 | 0, // tcGPRx16x17:dsub2_then_ssub |
| 118695 | 0, // tcGPRx16x17:dsub2_then_ssub_hi |
| 118696 | 0, // tcGPRx16x17:psub1_then_psub |
| 118697 | 0, // tcGPRx16x17:qsub1_then_dsub_hi |
| 118698 | 0, // tcGPRx16x17:qsub3_then_dsub_hi |
| 118699 | 0, // tcGPRx16x17:qsub2_then_dsub_hi |
| 118700 | 0, // tcGPRx16x17:x8sub_7_then_sub_32 |
| 118701 | 0, // tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 118702 | 0, // tcGPRx16x17:x8sub_6_then_sub_32 |
| 118703 | 0, // tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 118704 | 0, // tcGPRx16x17:x8sub_5_then_sub_32 |
| 118705 | 0, // tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 118706 | 0, // tcGPRx16x17:x8sub_4_then_sub_32 |
| 118707 | 0, // tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 118708 | 0, // tcGPRx16x17:x8sub_3_then_sub_32 |
| 118709 | 0, // tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 118710 | 0, // tcGPRx16x17:x8sub_2_then_sub_32 |
| 118711 | 0, // tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 118712 | 0, // tcGPRx16x17:x8sub_1_then_sub_32 |
| 118713 | 0, // tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 118714 | 0, // tcGPRx16x17:subo64_then_sub_32 |
| 118715 | 0, // tcGPRx16x17:subo64_then_sub_32_hi |
| 118716 | 0, // tcGPRx16x17:zsub1_then_zsub_hi |
| 118717 | 0, // tcGPRx16x17:zsub3_then_zsub_hi |
| 118718 | 0, // tcGPRx16x17:zsub2_then_zsub_hi |
| 118719 | 0, // tcGPRx16x17:dsub0_dsub1 |
| 118720 | 0, // tcGPRx16x17:dsub0_dsub1_dsub2 |
| 118721 | 0, // tcGPRx16x17:dsub1_dsub2 |
| 118722 | 0, // tcGPRx16x17:dsub1_dsub2_dsub3 |
| 118723 | 0, // tcGPRx16x17:dsub2_dsub3 |
| 118724 | 0, // tcGPRx16x17:dsub_dsub1 |
| 118725 | 0, // tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 118726 | 0, // tcGPRx16x17:dsub_dsub1_dsub2 |
| 118727 | 0, // tcGPRx16x17:qsub0_qsub1 |
| 118728 | 0, // tcGPRx16x17:qsub0_qsub1_qsub2 |
| 118729 | 0, // tcGPRx16x17:qsub1_qsub2 |
| 118730 | 0, // tcGPRx16x17:qsub1_qsub2_qsub3 |
| 118731 | 0, // tcGPRx16x17:qsub2_qsub3 |
| 118732 | 0, // tcGPRx16x17:sub_32_x8sub_1_then_sub_32 |
| 118733 | 0, // tcGPRx16x17:x8sub_0_x8sub_1 |
| 118734 | 0, // tcGPRx16x17:x8sub_2_x8sub_3 |
| 118735 | 0, // tcGPRx16x17:x8sub_4_x8sub_5 |
| 118736 | 0, // tcGPRx16x17:x8sub_6_x8sub_7 |
| 118737 | 0, // tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118738 | 0, // tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118739 | 0, // tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118740 | 0, // tcGPRx16x17:sub_32_subo64_then_sub_32 |
| 118741 | 0, // tcGPRx16x17:zsub_qsub1 |
| 118742 | 0, // tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 118743 | 0, // tcGPRx16x17:zsub_qsub1_qsub2 |
| 118744 | 0, // tcGPRx16x17:zsub0_zsub1 |
| 118745 | 0, // tcGPRx16x17:zsub0_zsub1_zsub2 |
| 118746 | 0, // tcGPRx16x17:zsub1_zsub2 |
| 118747 | 0, // tcGPRx16x17:zsub1_zsub2_zsub3 |
| 118748 | 0, // tcGPRx16x17:zsub2_zsub3 |
| 118749 | 0, // tcGPRx16x17:zsub0_zsub2 |
| 118750 | 0, // tcGPRx16x17:zsub1_zsub3 |
| 118751 | }, |
| 118752 | { // FIXED_REGS_and_GPR64 |
| 118753 | 0, // FIXED_REGS_and_GPR64:bsub |
| 118754 | 0, // FIXED_REGS_and_GPR64:bsub_hi |
| 118755 | 0, // FIXED_REGS_and_GPR64:dsub |
| 118756 | 0, // FIXED_REGS_and_GPR64:dsub0 |
| 118757 | 0, // FIXED_REGS_and_GPR64:dsub1 |
| 118758 | 0, // FIXED_REGS_and_GPR64:dsub2 |
| 118759 | 0, // FIXED_REGS_and_GPR64:dsub3 |
| 118760 | 0, // FIXED_REGS_and_GPR64:dsub_hi |
| 118761 | 0, // FIXED_REGS_and_GPR64:hsub |
| 118762 | 0, // FIXED_REGS_and_GPR64:hsub_hi |
| 118763 | 0, // FIXED_REGS_and_GPR64:psub |
| 118764 | 0, // FIXED_REGS_and_GPR64:psub0 |
| 118765 | 0, // FIXED_REGS_and_GPR64:psub1 |
| 118766 | 0, // FIXED_REGS_and_GPR64:qsub0 |
| 118767 | 0, // FIXED_REGS_and_GPR64:qsub1 |
| 118768 | 0, // FIXED_REGS_and_GPR64:qsub2 |
| 118769 | 0, // FIXED_REGS_and_GPR64:qsub3 |
| 118770 | 0, // FIXED_REGS_and_GPR64:ssub |
| 118771 | 0, // FIXED_REGS_and_GPR64:ssub_hi |
| 118772 | 43, // FIXED_REGS_and_GPR64:sub_32 -> GPR32common |
| 118773 | 0, // FIXED_REGS_and_GPR64:sub_32_hi |
| 118774 | 0, // FIXED_REGS_and_GPR64:sube32 |
| 118775 | 0, // FIXED_REGS_and_GPR64:sube64 |
| 118776 | 0, // FIXED_REGS_and_GPR64:subo32 |
| 118777 | 0, // FIXED_REGS_and_GPR64:subo64 |
| 118778 | 0, // FIXED_REGS_and_GPR64:x8sub_0 |
| 118779 | 0, // FIXED_REGS_and_GPR64:x8sub_1 |
| 118780 | 0, // FIXED_REGS_and_GPR64:x8sub_2 |
| 118781 | 0, // FIXED_REGS_and_GPR64:x8sub_3 |
| 118782 | 0, // FIXED_REGS_and_GPR64:x8sub_4 |
| 118783 | 0, // FIXED_REGS_and_GPR64:x8sub_5 |
| 118784 | 0, // FIXED_REGS_and_GPR64:x8sub_6 |
| 118785 | 0, // FIXED_REGS_and_GPR64:x8sub_7 |
| 118786 | 0, // FIXED_REGS_and_GPR64:zasubb |
| 118787 | 0, // FIXED_REGS_and_GPR64:zasubd0 |
| 118788 | 0, // FIXED_REGS_and_GPR64:zasubd1 |
| 118789 | 0, // FIXED_REGS_and_GPR64:zasubh0 |
| 118790 | 0, // FIXED_REGS_and_GPR64:zasubh1 |
| 118791 | 0, // FIXED_REGS_and_GPR64:zasubq0 |
| 118792 | 0, // FIXED_REGS_and_GPR64:zasubq1 |
| 118793 | 0, // FIXED_REGS_and_GPR64:zasubs0 |
| 118794 | 0, // FIXED_REGS_and_GPR64:zasubs1 |
| 118795 | 0, // FIXED_REGS_and_GPR64:zsub |
| 118796 | 0, // FIXED_REGS_and_GPR64:zsub0 |
| 118797 | 0, // FIXED_REGS_and_GPR64:zsub1 |
| 118798 | 0, // FIXED_REGS_and_GPR64:zsub2 |
| 118799 | 0, // FIXED_REGS_and_GPR64:zsub3 |
| 118800 | 0, // FIXED_REGS_and_GPR64:zsub_hi |
| 118801 | 0, // FIXED_REGS_and_GPR64:zasubd1_then_zasubq0 |
| 118802 | 0, // FIXED_REGS_and_GPR64:zasubd1_then_zasubq1 |
| 118803 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd0 |
| 118804 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1 |
| 118805 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubq0 |
| 118806 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubq1 |
| 118807 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 118808 | 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 118809 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd0 |
| 118810 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1 |
| 118811 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubq0 |
| 118812 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubq1 |
| 118813 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs0 |
| 118814 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1 |
| 118815 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 118816 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 118817 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 118818 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 118819 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 118820 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 118821 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118822 | 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118823 | 0, // FIXED_REGS_and_GPR64:dsub1_then_bsub |
| 118824 | 0, // FIXED_REGS_and_GPR64:dsub1_then_bsub_hi |
| 118825 | 0, // FIXED_REGS_and_GPR64:dsub1_then_hsub |
| 118826 | 0, // FIXED_REGS_and_GPR64:dsub1_then_hsub_hi |
| 118827 | 0, // FIXED_REGS_and_GPR64:dsub1_then_ssub |
| 118828 | 0, // FIXED_REGS_and_GPR64:dsub1_then_ssub_hi |
| 118829 | 0, // FIXED_REGS_and_GPR64:dsub3_then_bsub |
| 118830 | 0, // FIXED_REGS_and_GPR64:dsub3_then_bsub_hi |
| 118831 | 0, // FIXED_REGS_and_GPR64:dsub3_then_hsub |
| 118832 | 0, // FIXED_REGS_and_GPR64:dsub3_then_hsub_hi |
| 118833 | 0, // FIXED_REGS_and_GPR64:dsub3_then_ssub |
| 118834 | 0, // FIXED_REGS_and_GPR64:dsub3_then_ssub_hi |
| 118835 | 0, // FIXED_REGS_and_GPR64:dsub2_then_bsub |
| 118836 | 0, // FIXED_REGS_and_GPR64:dsub2_then_bsub_hi |
| 118837 | 0, // FIXED_REGS_and_GPR64:dsub2_then_hsub |
| 118838 | 0, // FIXED_REGS_and_GPR64:dsub2_then_hsub_hi |
| 118839 | 0, // FIXED_REGS_and_GPR64:dsub2_then_ssub |
| 118840 | 0, // FIXED_REGS_and_GPR64:dsub2_then_ssub_hi |
| 118841 | 0, // FIXED_REGS_and_GPR64:psub1_then_psub |
| 118842 | 0, // FIXED_REGS_and_GPR64:qsub1_then_dsub_hi |
| 118843 | 0, // FIXED_REGS_and_GPR64:qsub3_then_dsub_hi |
| 118844 | 0, // FIXED_REGS_and_GPR64:qsub2_then_dsub_hi |
| 118845 | 0, // FIXED_REGS_and_GPR64:x8sub_7_then_sub_32 |
| 118846 | 0, // FIXED_REGS_and_GPR64:x8sub_7_then_sub_32_hi |
| 118847 | 0, // FIXED_REGS_and_GPR64:x8sub_6_then_sub_32 |
| 118848 | 0, // FIXED_REGS_and_GPR64:x8sub_6_then_sub_32_hi |
| 118849 | 0, // FIXED_REGS_and_GPR64:x8sub_5_then_sub_32 |
| 118850 | 0, // FIXED_REGS_and_GPR64:x8sub_5_then_sub_32_hi |
| 118851 | 0, // FIXED_REGS_and_GPR64:x8sub_4_then_sub_32 |
| 118852 | 0, // FIXED_REGS_and_GPR64:x8sub_4_then_sub_32_hi |
| 118853 | 0, // FIXED_REGS_and_GPR64:x8sub_3_then_sub_32 |
| 118854 | 0, // FIXED_REGS_and_GPR64:x8sub_3_then_sub_32_hi |
| 118855 | 0, // FIXED_REGS_and_GPR64:x8sub_2_then_sub_32 |
| 118856 | 0, // FIXED_REGS_and_GPR64:x8sub_2_then_sub_32_hi |
| 118857 | 0, // FIXED_REGS_and_GPR64:x8sub_1_then_sub_32 |
| 118858 | 0, // FIXED_REGS_and_GPR64:x8sub_1_then_sub_32_hi |
| 118859 | 0, // FIXED_REGS_and_GPR64:subo64_then_sub_32 |
| 118860 | 0, // FIXED_REGS_and_GPR64:subo64_then_sub_32_hi |
| 118861 | 0, // FIXED_REGS_and_GPR64:zsub1_then_zsub_hi |
| 118862 | 0, // FIXED_REGS_and_GPR64:zsub3_then_zsub_hi |
| 118863 | 0, // FIXED_REGS_and_GPR64:zsub2_then_zsub_hi |
| 118864 | 0, // FIXED_REGS_and_GPR64:dsub0_dsub1 |
| 118865 | 0, // FIXED_REGS_and_GPR64:dsub0_dsub1_dsub2 |
| 118866 | 0, // FIXED_REGS_and_GPR64:dsub1_dsub2 |
| 118867 | 0, // FIXED_REGS_and_GPR64:dsub1_dsub2_dsub3 |
| 118868 | 0, // FIXED_REGS_and_GPR64:dsub2_dsub3 |
| 118869 | 0, // FIXED_REGS_and_GPR64:dsub_dsub1 |
| 118870 | 0, // FIXED_REGS_and_GPR64:dsub_dsub1_dsub2_dsub3 |
| 118871 | 0, // FIXED_REGS_and_GPR64:dsub_dsub1_dsub2 |
| 118872 | 0, // FIXED_REGS_and_GPR64:qsub0_qsub1 |
| 118873 | 0, // FIXED_REGS_and_GPR64:qsub0_qsub1_qsub2 |
| 118874 | 0, // FIXED_REGS_and_GPR64:qsub1_qsub2 |
| 118875 | 0, // FIXED_REGS_and_GPR64:qsub1_qsub2_qsub3 |
| 118876 | 0, // FIXED_REGS_and_GPR64:qsub2_qsub3 |
| 118877 | 0, // FIXED_REGS_and_GPR64:sub_32_x8sub_1_then_sub_32 |
| 118878 | 0, // FIXED_REGS_and_GPR64:x8sub_0_x8sub_1 |
| 118879 | 0, // FIXED_REGS_and_GPR64:x8sub_2_x8sub_3 |
| 118880 | 0, // FIXED_REGS_and_GPR64:x8sub_4_x8sub_5 |
| 118881 | 0, // FIXED_REGS_and_GPR64:x8sub_6_x8sub_7 |
| 118882 | 0, // FIXED_REGS_and_GPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 118883 | 0, // FIXED_REGS_and_GPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 118884 | 0, // FIXED_REGS_and_GPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 118885 | 0, // FIXED_REGS_and_GPR64:sub_32_subo64_then_sub_32 |
| 118886 | 0, // FIXED_REGS_and_GPR64:zsub_qsub1 |
| 118887 | 0, // FIXED_REGS_and_GPR64:zsub_qsub1_qsub2_qsub3 |
| 118888 | 0, // FIXED_REGS_and_GPR64:zsub_qsub1_qsub2 |
| 118889 | 0, // FIXED_REGS_and_GPR64:zsub0_zsub1 |
| 118890 | 0, // FIXED_REGS_and_GPR64:zsub0_zsub1_zsub2 |
| 118891 | 0, // FIXED_REGS_and_GPR64:zsub1_zsub2 |
| 118892 | 0, // FIXED_REGS_and_GPR64:zsub1_zsub2_zsub3 |
| 118893 | 0, // FIXED_REGS_and_GPR64:zsub2_zsub3 |
| 118894 | 0, // FIXED_REGS_and_GPR64:zsub0_zsub2 |
| 118895 | 0, // FIXED_REGS_and_GPR64:zsub1_zsub3 |
| 118896 | }, |
| 118897 | { // GPR64sponly |
| 118898 | 0, // GPR64sponly:bsub |
| 118899 | 0, // GPR64sponly:bsub_hi |
| 118900 | 0, // GPR64sponly:dsub |
| 118901 | 0, // GPR64sponly:dsub0 |
| 118902 | 0, // GPR64sponly:dsub1 |
| 118903 | 0, // GPR64sponly:dsub2 |
| 118904 | 0, // GPR64sponly:dsub3 |
| 118905 | 0, // GPR64sponly:dsub_hi |
| 118906 | 0, // GPR64sponly:hsub |
| 118907 | 0, // GPR64sponly:hsub_hi |
| 118908 | 0, // GPR64sponly:psub |
| 118909 | 0, // GPR64sponly:psub0 |
| 118910 | 0, // GPR64sponly:psub1 |
| 118911 | 0, // GPR64sponly:qsub0 |
| 118912 | 0, // GPR64sponly:qsub1 |
| 118913 | 0, // GPR64sponly:qsub2 |
| 118914 | 0, // GPR64sponly:qsub3 |
| 118915 | 0, // GPR64sponly:ssub |
| 118916 | 0, // GPR64sponly:ssub_hi |
| 118917 | 49, // GPR64sponly:sub_32 -> GPR32sponly |
| 118918 | 0, // GPR64sponly:sub_32_hi |
| 118919 | 0, // GPR64sponly:sube32 |
| 118920 | 0, // GPR64sponly:sube64 |
| 118921 | 0, // GPR64sponly:subo32 |
| 118922 | 0, // GPR64sponly:subo64 |
| 118923 | 0, // GPR64sponly:x8sub_0 |
| 118924 | 0, // GPR64sponly:x8sub_1 |
| 118925 | 0, // GPR64sponly:x8sub_2 |
| 118926 | 0, // GPR64sponly:x8sub_3 |
| 118927 | 0, // GPR64sponly:x8sub_4 |
| 118928 | 0, // GPR64sponly:x8sub_5 |
| 118929 | 0, // GPR64sponly:x8sub_6 |
| 118930 | 0, // GPR64sponly:x8sub_7 |
| 118931 | 0, // GPR64sponly:zasubb |
| 118932 | 0, // GPR64sponly:zasubd0 |
| 118933 | 0, // GPR64sponly:zasubd1 |
| 118934 | 0, // GPR64sponly:zasubh0 |
| 118935 | 0, // GPR64sponly:zasubh1 |
| 118936 | 0, // GPR64sponly:zasubq0 |
| 118937 | 0, // GPR64sponly:zasubq1 |
| 118938 | 0, // GPR64sponly:zasubs0 |
| 118939 | 0, // GPR64sponly:zasubs1 |
| 118940 | 0, // GPR64sponly:zsub |
| 118941 | 0, // GPR64sponly:zsub0 |
| 118942 | 0, // GPR64sponly:zsub1 |
| 118943 | 0, // GPR64sponly:zsub2 |
| 118944 | 0, // GPR64sponly:zsub3 |
| 118945 | 0, // GPR64sponly:zsub_hi |
| 118946 | 0, // GPR64sponly:zasubd1_then_zasubq0 |
| 118947 | 0, // GPR64sponly:zasubd1_then_zasubq1 |
| 118948 | 0, // GPR64sponly:zasubs1_then_zasubd0 |
| 118949 | 0, // GPR64sponly:zasubs1_then_zasubd1 |
| 118950 | 0, // GPR64sponly:zasubs1_then_zasubq0 |
| 118951 | 0, // GPR64sponly:zasubs1_then_zasubq1 |
| 118952 | 0, // GPR64sponly:zasubs1_then_zasubd1_then_zasubq0 |
| 118953 | 0, // GPR64sponly:zasubs1_then_zasubd1_then_zasubq1 |
| 118954 | 0, // GPR64sponly:zasubh1_then_zasubd0 |
| 118955 | 0, // GPR64sponly:zasubh1_then_zasubd1 |
| 118956 | 0, // GPR64sponly:zasubh1_then_zasubq0 |
| 118957 | 0, // GPR64sponly:zasubh1_then_zasubq1 |
| 118958 | 0, // GPR64sponly:zasubh1_then_zasubs0 |
| 118959 | 0, // GPR64sponly:zasubh1_then_zasubs1 |
| 118960 | 0, // GPR64sponly:zasubh1_then_zasubd1_then_zasubq0 |
| 118961 | 0, // GPR64sponly:zasubh1_then_zasubd1_then_zasubq1 |
| 118962 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd0 |
| 118963 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1 |
| 118964 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubq0 |
| 118965 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubq1 |
| 118966 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 118967 | 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 118968 | 0, // GPR64sponly:dsub1_then_bsub |
| 118969 | 0, // GPR64sponly:dsub1_then_bsub_hi |
| 118970 | 0, // GPR64sponly:dsub1_then_hsub |
| 118971 | 0, // GPR64sponly:dsub1_then_hsub_hi |
| 118972 | 0, // GPR64sponly:dsub1_then_ssub |
| 118973 | 0, // GPR64sponly:dsub1_then_ssub_hi |
| 118974 | 0, // GPR64sponly:dsub3_then_bsub |
| 118975 | 0, // GPR64sponly:dsub3_then_bsub_hi |
| 118976 | 0, // GPR64sponly:dsub3_then_hsub |
| 118977 | 0, // GPR64sponly:dsub3_then_hsub_hi |
| 118978 | 0, // GPR64sponly:dsub3_then_ssub |
| 118979 | 0, // GPR64sponly:dsub3_then_ssub_hi |
| 118980 | 0, // GPR64sponly:dsub2_then_bsub |
| 118981 | 0, // GPR64sponly:dsub2_then_bsub_hi |
| 118982 | 0, // GPR64sponly:dsub2_then_hsub |
| 118983 | 0, // GPR64sponly:dsub2_then_hsub_hi |
| 118984 | 0, // GPR64sponly:dsub2_then_ssub |
| 118985 | 0, // GPR64sponly:dsub2_then_ssub_hi |
| 118986 | 0, // GPR64sponly:psub1_then_psub |
| 118987 | 0, // GPR64sponly:qsub1_then_dsub_hi |
| 118988 | 0, // GPR64sponly:qsub3_then_dsub_hi |
| 118989 | 0, // GPR64sponly:qsub2_then_dsub_hi |
| 118990 | 0, // GPR64sponly:x8sub_7_then_sub_32 |
| 118991 | 0, // GPR64sponly:x8sub_7_then_sub_32_hi |
| 118992 | 0, // GPR64sponly:x8sub_6_then_sub_32 |
| 118993 | 0, // GPR64sponly:x8sub_6_then_sub_32_hi |
| 118994 | 0, // GPR64sponly:x8sub_5_then_sub_32 |
| 118995 | 0, // GPR64sponly:x8sub_5_then_sub_32_hi |
| 118996 | 0, // GPR64sponly:x8sub_4_then_sub_32 |
| 118997 | 0, // GPR64sponly:x8sub_4_then_sub_32_hi |
| 118998 | 0, // GPR64sponly:x8sub_3_then_sub_32 |
| 118999 | 0, // GPR64sponly:x8sub_3_then_sub_32_hi |
| 119000 | 0, // GPR64sponly:x8sub_2_then_sub_32 |
| 119001 | 0, // GPR64sponly:x8sub_2_then_sub_32_hi |
| 119002 | 0, // GPR64sponly:x8sub_1_then_sub_32 |
| 119003 | 0, // GPR64sponly:x8sub_1_then_sub_32_hi |
| 119004 | 0, // GPR64sponly:subo64_then_sub_32 |
| 119005 | 0, // GPR64sponly:subo64_then_sub_32_hi |
| 119006 | 0, // GPR64sponly:zsub1_then_zsub_hi |
| 119007 | 0, // GPR64sponly:zsub3_then_zsub_hi |
| 119008 | 0, // GPR64sponly:zsub2_then_zsub_hi |
| 119009 | 0, // GPR64sponly:dsub0_dsub1 |
| 119010 | 0, // GPR64sponly:dsub0_dsub1_dsub2 |
| 119011 | 0, // GPR64sponly:dsub1_dsub2 |
| 119012 | 0, // GPR64sponly:dsub1_dsub2_dsub3 |
| 119013 | 0, // GPR64sponly:dsub2_dsub3 |
| 119014 | 0, // GPR64sponly:dsub_dsub1 |
| 119015 | 0, // GPR64sponly:dsub_dsub1_dsub2_dsub3 |
| 119016 | 0, // GPR64sponly:dsub_dsub1_dsub2 |
| 119017 | 0, // GPR64sponly:qsub0_qsub1 |
| 119018 | 0, // GPR64sponly:qsub0_qsub1_qsub2 |
| 119019 | 0, // GPR64sponly:qsub1_qsub2 |
| 119020 | 0, // GPR64sponly:qsub1_qsub2_qsub3 |
| 119021 | 0, // GPR64sponly:qsub2_qsub3 |
| 119022 | 0, // GPR64sponly:sub_32_x8sub_1_then_sub_32 |
| 119023 | 0, // GPR64sponly:x8sub_0_x8sub_1 |
| 119024 | 0, // GPR64sponly:x8sub_2_x8sub_3 |
| 119025 | 0, // GPR64sponly:x8sub_4_x8sub_5 |
| 119026 | 0, // GPR64sponly:x8sub_6_x8sub_7 |
| 119027 | 0, // GPR64sponly:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119028 | 0, // GPR64sponly:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119029 | 0, // GPR64sponly:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119030 | 0, // GPR64sponly:sub_32_subo64_then_sub_32 |
| 119031 | 0, // GPR64sponly:zsub_qsub1 |
| 119032 | 0, // GPR64sponly:zsub_qsub1_qsub2_qsub3 |
| 119033 | 0, // GPR64sponly:zsub_qsub1_qsub2 |
| 119034 | 0, // GPR64sponly:zsub0_zsub1 |
| 119035 | 0, // GPR64sponly:zsub0_zsub1_zsub2 |
| 119036 | 0, // GPR64sponly:zsub1_zsub2 |
| 119037 | 0, // GPR64sponly:zsub1_zsub2_zsub3 |
| 119038 | 0, // GPR64sponly:zsub2_zsub3 |
| 119039 | 0, // GPR64sponly:zsub0_zsub2 |
| 119040 | 0, // GPR64sponly:zsub1_zsub3 |
| 119041 | }, |
| 119042 | { // tcGPRx17 |
| 119043 | 0, // tcGPRx17:bsub |
| 119044 | 0, // tcGPRx17:bsub_hi |
| 119045 | 0, // tcGPRx17:dsub |
| 119046 | 0, // tcGPRx17:dsub0 |
| 119047 | 0, // tcGPRx17:dsub1 |
| 119048 | 0, // tcGPRx17:dsub2 |
| 119049 | 0, // tcGPRx17:dsub3 |
| 119050 | 0, // tcGPRx17:dsub_hi |
| 119051 | 0, // tcGPRx17:hsub |
| 119052 | 0, // tcGPRx17:hsub_hi |
| 119053 | 0, // tcGPRx17:psub |
| 119054 | 0, // tcGPRx17:psub0 |
| 119055 | 0, // tcGPRx17:psub1 |
| 119056 | 0, // tcGPRx17:qsub0 |
| 119057 | 0, // tcGPRx17:qsub1 |
| 119058 | 0, // tcGPRx17:qsub2 |
| 119059 | 0, // tcGPRx17:qsub3 |
| 119060 | 0, // tcGPRx17:ssub |
| 119061 | 0, // tcGPRx17:ssub_hi |
| 119062 | 43, // tcGPRx17:sub_32 -> GPR32common |
| 119063 | 0, // tcGPRx17:sub_32_hi |
| 119064 | 0, // tcGPRx17:sube32 |
| 119065 | 0, // tcGPRx17:sube64 |
| 119066 | 0, // tcGPRx17:subo32 |
| 119067 | 0, // tcGPRx17:subo64 |
| 119068 | 0, // tcGPRx17:x8sub_0 |
| 119069 | 0, // tcGPRx17:x8sub_1 |
| 119070 | 0, // tcGPRx17:x8sub_2 |
| 119071 | 0, // tcGPRx17:x8sub_3 |
| 119072 | 0, // tcGPRx17:x8sub_4 |
| 119073 | 0, // tcGPRx17:x8sub_5 |
| 119074 | 0, // tcGPRx17:x8sub_6 |
| 119075 | 0, // tcGPRx17:x8sub_7 |
| 119076 | 0, // tcGPRx17:zasubb |
| 119077 | 0, // tcGPRx17:zasubd0 |
| 119078 | 0, // tcGPRx17:zasubd1 |
| 119079 | 0, // tcGPRx17:zasubh0 |
| 119080 | 0, // tcGPRx17:zasubh1 |
| 119081 | 0, // tcGPRx17:zasubq0 |
| 119082 | 0, // tcGPRx17:zasubq1 |
| 119083 | 0, // tcGPRx17:zasubs0 |
| 119084 | 0, // tcGPRx17:zasubs1 |
| 119085 | 0, // tcGPRx17:zsub |
| 119086 | 0, // tcGPRx17:zsub0 |
| 119087 | 0, // tcGPRx17:zsub1 |
| 119088 | 0, // tcGPRx17:zsub2 |
| 119089 | 0, // tcGPRx17:zsub3 |
| 119090 | 0, // tcGPRx17:zsub_hi |
| 119091 | 0, // tcGPRx17:zasubd1_then_zasubq0 |
| 119092 | 0, // tcGPRx17:zasubd1_then_zasubq1 |
| 119093 | 0, // tcGPRx17:zasubs1_then_zasubd0 |
| 119094 | 0, // tcGPRx17:zasubs1_then_zasubd1 |
| 119095 | 0, // tcGPRx17:zasubs1_then_zasubq0 |
| 119096 | 0, // tcGPRx17:zasubs1_then_zasubq1 |
| 119097 | 0, // tcGPRx17:zasubs1_then_zasubd1_then_zasubq0 |
| 119098 | 0, // tcGPRx17:zasubs1_then_zasubd1_then_zasubq1 |
| 119099 | 0, // tcGPRx17:zasubh1_then_zasubd0 |
| 119100 | 0, // tcGPRx17:zasubh1_then_zasubd1 |
| 119101 | 0, // tcGPRx17:zasubh1_then_zasubq0 |
| 119102 | 0, // tcGPRx17:zasubh1_then_zasubq1 |
| 119103 | 0, // tcGPRx17:zasubh1_then_zasubs0 |
| 119104 | 0, // tcGPRx17:zasubh1_then_zasubs1 |
| 119105 | 0, // tcGPRx17:zasubh1_then_zasubd1_then_zasubq0 |
| 119106 | 0, // tcGPRx17:zasubh1_then_zasubd1_then_zasubq1 |
| 119107 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubd0 |
| 119108 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubd1 |
| 119109 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubq0 |
| 119110 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubq1 |
| 119111 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119112 | 0, // tcGPRx17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119113 | 0, // tcGPRx17:dsub1_then_bsub |
| 119114 | 0, // tcGPRx17:dsub1_then_bsub_hi |
| 119115 | 0, // tcGPRx17:dsub1_then_hsub |
| 119116 | 0, // tcGPRx17:dsub1_then_hsub_hi |
| 119117 | 0, // tcGPRx17:dsub1_then_ssub |
| 119118 | 0, // tcGPRx17:dsub1_then_ssub_hi |
| 119119 | 0, // tcGPRx17:dsub3_then_bsub |
| 119120 | 0, // tcGPRx17:dsub3_then_bsub_hi |
| 119121 | 0, // tcGPRx17:dsub3_then_hsub |
| 119122 | 0, // tcGPRx17:dsub3_then_hsub_hi |
| 119123 | 0, // tcGPRx17:dsub3_then_ssub |
| 119124 | 0, // tcGPRx17:dsub3_then_ssub_hi |
| 119125 | 0, // tcGPRx17:dsub2_then_bsub |
| 119126 | 0, // tcGPRx17:dsub2_then_bsub_hi |
| 119127 | 0, // tcGPRx17:dsub2_then_hsub |
| 119128 | 0, // tcGPRx17:dsub2_then_hsub_hi |
| 119129 | 0, // tcGPRx17:dsub2_then_ssub |
| 119130 | 0, // tcGPRx17:dsub2_then_ssub_hi |
| 119131 | 0, // tcGPRx17:psub1_then_psub |
| 119132 | 0, // tcGPRx17:qsub1_then_dsub_hi |
| 119133 | 0, // tcGPRx17:qsub3_then_dsub_hi |
| 119134 | 0, // tcGPRx17:qsub2_then_dsub_hi |
| 119135 | 0, // tcGPRx17:x8sub_7_then_sub_32 |
| 119136 | 0, // tcGPRx17:x8sub_7_then_sub_32_hi |
| 119137 | 0, // tcGPRx17:x8sub_6_then_sub_32 |
| 119138 | 0, // tcGPRx17:x8sub_6_then_sub_32_hi |
| 119139 | 0, // tcGPRx17:x8sub_5_then_sub_32 |
| 119140 | 0, // tcGPRx17:x8sub_5_then_sub_32_hi |
| 119141 | 0, // tcGPRx17:x8sub_4_then_sub_32 |
| 119142 | 0, // tcGPRx17:x8sub_4_then_sub_32_hi |
| 119143 | 0, // tcGPRx17:x8sub_3_then_sub_32 |
| 119144 | 0, // tcGPRx17:x8sub_3_then_sub_32_hi |
| 119145 | 0, // tcGPRx17:x8sub_2_then_sub_32 |
| 119146 | 0, // tcGPRx17:x8sub_2_then_sub_32_hi |
| 119147 | 0, // tcGPRx17:x8sub_1_then_sub_32 |
| 119148 | 0, // tcGPRx17:x8sub_1_then_sub_32_hi |
| 119149 | 0, // tcGPRx17:subo64_then_sub_32 |
| 119150 | 0, // tcGPRx17:subo64_then_sub_32_hi |
| 119151 | 0, // tcGPRx17:zsub1_then_zsub_hi |
| 119152 | 0, // tcGPRx17:zsub3_then_zsub_hi |
| 119153 | 0, // tcGPRx17:zsub2_then_zsub_hi |
| 119154 | 0, // tcGPRx17:dsub0_dsub1 |
| 119155 | 0, // tcGPRx17:dsub0_dsub1_dsub2 |
| 119156 | 0, // tcGPRx17:dsub1_dsub2 |
| 119157 | 0, // tcGPRx17:dsub1_dsub2_dsub3 |
| 119158 | 0, // tcGPRx17:dsub2_dsub3 |
| 119159 | 0, // tcGPRx17:dsub_dsub1 |
| 119160 | 0, // tcGPRx17:dsub_dsub1_dsub2_dsub3 |
| 119161 | 0, // tcGPRx17:dsub_dsub1_dsub2 |
| 119162 | 0, // tcGPRx17:qsub0_qsub1 |
| 119163 | 0, // tcGPRx17:qsub0_qsub1_qsub2 |
| 119164 | 0, // tcGPRx17:qsub1_qsub2 |
| 119165 | 0, // tcGPRx17:qsub1_qsub2_qsub3 |
| 119166 | 0, // tcGPRx17:qsub2_qsub3 |
| 119167 | 0, // tcGPRx17:sub_32_x8sub_1_then_sub_32 |
| 119168 | 0, // tcGPRx17:x8sub_0_x8sub_1 |
| 119169 | 0, // tcGPRx17:x8sub_2_x8sub_3 |
| 119170 | 0, // tcGPRx17:x8sub_4_x8sub_5 |
| 119171 | 0, // tcGPRx17:x8sub_6_x8sub_7 |
| 119172 | 0, // tcGPRx17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119173 | 0, // tcGPRx17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119174 | 0, // tcGPRx17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119175 | 0, // tcGPRx17:sub_32_subo64_then_sub_32 |
| 119176 | 0, // tcGPRx17:zsub_qsub1 |
| 119177 | 0, // tcGPRx17:zsub_qsub1_qsub2_qsub3 |
| 119178 | 0, // tcGPRx17:zsub_qsub1_qsub2 |
| 119179 | 0, // tcGPRx17:zsub0_zsub1 |
| 119180 | 0, // tcGPRx17:zsub0_zsub1_zsub2 |
| 119181 | 0, // tcGPRx17:zsub1_zsub2 |
| 119182 | 0, // tcGPRx17:zsub1_zsub2_zsub3 |
| 119183 | 0, // tcGPRx17:zsub2_zsub3 |
| 119184 | 0, // tcGPRx17:zsub0_zsub2 |
| 119185 | 0, // tcGPRx17:zsub1_zsub3 |
| 119186 | }, |
| 119187 | { // DD |
| 119188 | 7, // DD:bsub -> FPR8 |
| 119189 | 0, // DD:bsub_hi |
| 119190 | 0, // DD:dsub |
| 119191 | 56, // DD:dsub0 -> FPR64 |
| 119192 | 56, // DD:dsub1 -> FPR64 |
| 119193 | 0, // DD:dsub2 |
| 119194 | 0, // DD:dsub3 |
| 119195 | 0, // DD:dsub_hi |
| 119196 | 8, // DD:hsub -> FPR16 |
| 119197 | 0, // DD:hsub_hi |
| 119198 | 0, // DD:psub |
| 119199 | 0, // DD:psub0 |
| 119200 | 0, // DD:psub1 |
| 119201 | 0, // DD:qsub0 |
| 119202 | 0, // DD:qsub1 |
| 119203 | 0, // DD:qsub2 |
| 119204 | 0, // DD:qsub3 |
| 119205 | 40, // DD:ssub -> FPR32 |
| 119206 | 0, // DD:ssub_hi |
| 119207 | 0, // DD:sub_32 |
| 119208 | 0, // DD:sub_32_hi |
| 119209 | 0, // DD:sube32 |
| 119210 | 0, // DD:sube64 |
| 119211 | 0, // DD:subo32 |
| 119212 | 0, // DD:subo64 |
| 119213 | 0, // DD:x8sub_0 |
| 119214 | 0, // DD:x8sub_1 |
| 119215 | 0, // DD:x8sub_2 |
| 119216 | 0, // DD:x8sub_3 |
| 119217 | 0, // DD:x8sub_4 |
| 119218 | 0, // DD:x8sub_5 |
| 119219 | 0, // DD:x8sub_6 |
| 119220 | 0, // DD:x8sub_7 |
| 119221 | 0, // DD:zasubb |
| 119222 | 0, // DD:zasubd0 |
| 119223 | 0, // DD:zasubd1 |
| 119224 | 0, // DD:zasubh0 |
| 119225 | 0, // DD:zasubh1 |
| 119226 | 0, // DD:zasubq0 |
| 119227 | 0, // DD:zasubq1 |
| 119228 | 0, // DD:zasubs0 |
| 119229 | 0, // DD:zasubs1 |
| 119230 | 0, // DD:zsub |
| 119231 | 0, // DD:zsub0 |
| 119232 | 0, // DD:zsub1 |
| 119233 | 0, // DD:zsub2 |
| 119234 | 0, // DD:zsub3 |
| 119235 | 0, // DD:zsub_hi |
| 119236 | 0, // DD:zasubd1_then_zasubq0 |
| 119237 | 0, // DD:zasubd1_then_zasubq1 |
| 119238 | 0, // DD:zasubs1_then_zasubd0 |
| 119239 | 0, // DD:zasubs1_then_zasubd1 |
| 119240 | 0, // DD:zasubs1_then_zasubq0 |
| 119241 | 0, // DD:zasubs1_then_zasubq1 |
| 119242 | 0, // DD:zasubs1_then_zasubd1_then_zasubq0 |
| 119243 | 0, // DD:zasubs1_then_zasubd1_then_zasubq1 |
| 119244 | 0, // DD:zasubh1_then_zasubd0 |
| 119245 | 0, // DD:zasubh1_then_zasubd1 |
| 119246 | 0, // DD:zasubh1_then_zasubq0 |
| 119247 | 0, // DD:zasubh1_then_zasubq1 |
| 119248 | 0, // DD:zasubh1_then_zasubs0 |
| 119249 | 0, // DD:zasubh1_then_zasubs1 |
| 119250 | 0, // DD:zasubh1_then_zasubd1_then_zasubq0 |
| 119251 | 0, // DD:zasubh1_then_zasubd1_then_zasubq1 |
| 119252 | 0, // DD:zasubh1_then_zasubs1_then_zasubd0 |
| 119253 | 0, // DD:zasubh1_then_zasubs1_then_zasubd1 |
| 119254 | 0, // DD:zasubh1_then_zasubs1_then_zasubq0 |
| 119255 | 0, // DD:zasubh1_then_zasubs1_then_zasubq1 |
| 119256 | 0, // DD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119257 | 0, // DD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119258 | 7, // DD:dsub1_then_bsub -> FPR8 |
| 119259 | 0, // DD:dsub1_then_bsub_hi |
| 119260 | 8, // DD:dsub1_then_hsub -> FPR16 |
| 119261 | 0, // DD:dsub1_then_hsub_hi |
| 119262 | 40, // DD:dsub1_then_ssub -> FPR32 |
| 119263 | 0, // DD:dsub1_then_ssub_hi |
| 119264 | 0, // DD:dsub3_then_bsub |
| 119265 | 0, // DD:dsub3_then_bsub_hi |
| 119266 | 0, // DD:dsub3_then_hsub |
| 119267 | 0, // DD:dsub3_then_hsub_hi |
| 119268 | 0, // DD:dsub3_then_ssub |
| 119269 | 0, // DD:dsub3_then_ssub_hi |
| 119270 | 0, // DD:dsub2_then_bsub |
| 119271 | 0, // DD:dsub2_then_bsub_hi |
| 119272 | 0, // DD:dsub2_then_hsub |
| 119273 | 0, // DD:dsub2_then_hsub_hi |
| 119274 | 0, // DD:dsub2_then_ssub |
| 119275 | 0, // DD:dsub2_then_ssub_hi |
| 119276 | 0, // DD:psub1_then_psub |
| 119277 | 0, // DD:qsub1_then_dsub_hi |
| 119278 | 0, // DD:qsub3_then_dsub_hi |
| 119279 | 0, // DD:qsub2_then_dsub_hi |
| 119280 | 0, // DD:x8sub_7_then_sub_32 |
| 119281 | 0, // DD:x8sub_7_then_sub_32_hi |
| 119282 | 0, // DD:x8sub_6_then_sub_32 |
| 119283 | 0, // DD:x8sub_6_then_sub_32_hi |
| 119284 | 0, // DD:x8sub_5_then_sub_32 |
| 119285 | 0, // DD:x8sub_5_then_sub_32_hi |
| 119286 | 0, // DD:x8sub_4_then_sub_32 |
| 119287 | 0, // DD:x8sub_4_then_sub_32_hi |
| 119288 | 0, // DD:x8sub_3_then_sub_32 |
| 119289 | 0, // DD:x8sub_3_then_sub_32_hi |
| 119290 | 0, // DD:x8sub_2_then_sub_32 |
| 119291 | 0, // DD:x8sub_2_then_sub_32_hi |
| 119292 | 0, // DD:x8sub_1_then_sub_32 |
| 119293 | 0, // DD:x8sub_1_then_sub_32_hi |
| 119294 | 0, // DD:subo64_then_sub_32 |
| 119295 | 0, // DD:subo64_then_sub_32_hi |
| 119296 | 0, // DD:zsub1_then_zsub_hi |
| 119297 | 0, // DD:zsub3_then_zsub_hi |
| 119298 | 0, // DD:zsub2_then_zsub_hi |
| 119299 | 0, // DD:dsub0_dsub1 |
| 119300 | 0, // DD:dsub0_dsub1_dsub2 |
| 119301 | 0, // DD:dsub1_dsub2 |
| 119302 | 0, // DD:dsub1_dsub2_dsub3 |
| 119303 | 0, // DD:dsub2_dsub3 |
| 119304 | 0, // DD:dsub_dsub1 |
| 119305 | 0, // DD:dsub_dsub1_dsub2_dsub3 |
| 119306 | 0, // DD:dsub_dsub1_dsub2 |
| 119307 | 0, // DD:qsub0_qsub1 |
| 119308 | 0, // DD:qsub0_qsub1_qsub2 |
| 119309 | 0, // DD:qsub1_qsub2 |
| 119310 | 0, // DD:qsub1_qsub2_qsub3 |
| 119311 | 0, // DD:qsub2_qsub3 |
| 119312 | 0, // DD:sub_32_x8sub_1_then_sub_32 |
| 119313 | 0, // DD:x8sub_0_x8sub_1 |
| 119314 | 0, // DD:x8sub_2_x8sub_3 |
| 119315 | 0, // DD:x8sub_4_x8sub_5 |
| 119316 | 0, // DD:x8sub_6_x8sub_7 |
| 119317 | 0, // DD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119318 | 0, // DD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119319 | 0, // DD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119320 | 0, // DD:sub_32_subo64_then_sub_32 |
| 119321 | 0, // DD:zsub_qsub1 |
| 119322 | 0, // DD:zsub_qsub1_qsub2_qsub3 |
| 119323 | 0, // DD:zsub_qsub1_qsub2 |
| 119324 | 0, // DD:zsub0_zsub1 |
| 119325 | 0, // DD:zsub0_zsub1_zsub2 |
| 119326 | 0, // DD:zsub1_zsub2 |
| 119327 | 0, // DD:zsub1_zsub2_zsub3 |
| 119328 | 0, // DD:zsub2_zsub3 |
| 119329 | 0, // DD:zsub0_zsub2 |
| 119330 | 0, // DD:zsub1_zsub3 |
| 119331 | }, |
| 119332 | { // DD_with_dsub0_in_FPR64_lo |
| 119333 | 7, // DD_with_dsub0_in_FPR64_lo:bsub -> FPR8 |
| 119334 | 0, // DD_with_dsub0_in_FPR64_lo:bsub_hi |
| 119335 | 0, // DD_with_dsub0_in_FPR64_lo:dsub |
| 119336 | 65, // DD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo |
| 119337 | 56, // DD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 |
| 119338 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2 |
| 119339 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3 |
| 119340 | 0, // DD_with_dsub0_in_FPR64_lo:dsub_hi |
| 119341 | 10, // DD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo |
| 119342 | 0, // DD_with_dsub0_in_FPR64_lo:hsub_hi |
| 119343 | 0, // DD_with_dsub0_in_FPR64_lo:psub |
| 119344 | 0, // DD_with_dsub0_in_FPR64_lo:psub0 |
| 119345 | 0, // DD_with_dsub0_in_FPR64_lo:psub1 |
| 119346 | 0, // DD_with_dsub0_in_FPR64_lo:qsub0 |
| 119347 | 0, // DD_with_dsub0_in_FPR64_lo:qsub1 |
| 119348 | 0, // DD_with_dsub0_in_FPR64_lo:qsub2 |
| 119349 | 0, // DD_with_dsub0_in_FPR64_lo:qsub3 |
| 119350 | 44, // DD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 119351 | 0, // DD_with_dsub0_in_FPR64_lo:ssub_hi |
| 119352 | 0, // DD_with_dsub0_in_FPR64_lo:sub_32 |
| 119353 | 0, // DD_with_dsub0_in_FPR64_lo:sub_32_hi |
| 119354 | 0, // DD_with_dsub0_in_FPR64_lo:sube32 |
| 119355 | 0, // DD_with_dsub0_in_FPR64_lo:sube64 |
| 119356 | 0, // DD_with_dsub0_in_FPR64_lo:subo32 |
| 119357 | 0, // DD_with_dsub0_in_FPR64_lo:subo64 |
| 119358 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_0 |
| 119359 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_1 |
| 119360 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2 |
| 119361 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_3 |
| 119362 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4 |
| 119363 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_5 |
| 119364 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6 |
| 119365 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_7 |
| 119366 | 0, // DD_with_dsub0_in_FPR64_lo:zasubb |
| 119367 | 0, // DD_with_dsub0_in_FPR64_lo:zasubd0 |
| 119368 | 0, // DD_with_dsub0_in_FPR64_lo:zasubd1 |
| 119369 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh0 |
| 119370 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1 |
| 119371 | 0, // DD_with_dsub0_in_FPR64_lo:zasubq0 |
| 119372 | 0, // DD_with_dsub0_in_FPR64_lo:zasubq1 |
| 119373 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs0 |
| 119374 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1 |
| 119375 | 0, // DD_with_dsub0_in_FPR64_lo:zsub |
| 119376 | 0, // DD_with_dsub0_in_FPR64_lo:zsub0 |
| 119377 | 0, // DD_with_dsub0_in_FPR64_lo:zsub1 |
| 119378 | 0, // DD_with_dsub0_in_FPR64_lo:zsub2 |
| 119379 | 0, // DD_with_dsub0_in_FPR64_lo:zsub3 |
| 119380 | 0, // DD_with_dsub0_in_FPR64_lo:zsub_hi |
| 119381 | 0, // DD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 |
| 119382 | 0, // DD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 |
| 119383 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 |
| 119384 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 |
| 119385 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 |
| 119386 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 |
| 119387 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 119388 | 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 119389 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 |
| 119390 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 |
| 119391 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 |
| 119392 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 |
| 119393 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 |
| 119394 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 |
| 119395 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 119396 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 119397 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 119398 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 119399 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 119400 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 119401 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119402 | 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119403 | 7, // DD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 119404 | 0, // DD_with_dsub0_in_FPR64_lo:dsub1_then_bsub_hi |
| 119405 | 8, // DD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 119406 | 0, // DD_with_dsub0_in_FPR64_lo:dsub1_then_hsub_hi |
| 119407 | 40, // DD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 119408 | 0, // DD_with_dsub0_in_FPR64_lo:dsub1_then_ssub_hi |
| 119409 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_bsub |
| 119410 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_bsub_hi |
| 119411 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_hsub |
| 119412 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_hsub_hi |
| 119413 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_ssub |
| 119414 | 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_ssub_hi |
| 119415 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_bsub |
| 119416 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_bsub_hi |
| 119417 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_hsub |
| 119418 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_hsub_hi |
| 119419 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_ssub |
| 119420 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_ssub_hi |
| 119421 | 0, // DD_with_dsub0_in_FPR64_lo:psub1_then_psub |
| 119422 | 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_hi |
| 119423 | 0, // DD_with_dsub0_in_FPR64_lo:qsub3_then_dsub_hi |
| 119424 | 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_hi |
| 119425 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 |
| 119426 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 119427 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 |
| 119428 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 119429 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 |
| 119430 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 119431 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 |
| 119432 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 119433 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 |
| 119434 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 119435 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 |
| 119436 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 119437 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 |
| 119438 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 119439 | 0, // DD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 |
| 119440 | 0, // DD_with_dsub0_in_FPR64_lo:subo64_then_sub_32_hi |
| 119441 | 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi |
| 119442 | 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi |
| 119443 | 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi |
| 119444 | 0, // DD_with_dsub0_in_FPR64_lo:dsub0_dsub1 |
| 119445 | 0, // DD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 119446 | 0, // DD_with_dsub0_in_FPR64_lo:dsub1_dsub2 |
| 119447 | 0, // DD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 119448 | 0, // DD_with_dsub0_in_FPR64_lo:dsub2_dsub3 |
| 119449 | 0, // DD_with_dsub0_in_FPR64_lo:dsub_dsub1 |
| 119450 | 0, // DD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 119451 | 0, // DD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2 |
| 119452 | 0, // DD_with_dsub0_in_FPR64_lo:qsub0_qsub1 |
| 119453 | 0, // DD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 119454 | 0, // DD_with_dsub0_in_FPR64_lo:qsub1_qsub2 |
| 119455 | 0, // DD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 119456 | 0, // DD_with_dsub0_in_FPR64_lo:qsub2_qsub3 |
| 119457 | 0, // DD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 119458 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 |
| 119459 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 |
| 119460 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 |
| 119461 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 |
| 119462 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119463 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119464 | 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119465 | 0, // DD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 119466 | 0, // DD_with_dsub0_in_FPR64_lo:zsub_qsub1 |
| 119467 | 0, // DD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 119468 | 0, // DD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2 |
| 119469 | 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub1 |
| 119470 | 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 119471 | 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub2 |
| 119472 | 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 119473 | 0, // DD_with_dsub0_in_FPR64_lo:zsub2_zsub3 |
| 119474 | 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub2 |
| 119475 | 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub3 |
| 119476 | }, |
| 119477 | { // DD_with_dsub1_in_FPR64_lo |
| 119478 | 7, // DD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 119479 | 0, // DD_with_dsub1_in_FPR64_lo:bsub_hi |
| 119480 | 0, // DD_with_dsub1_in_FPR64_lo:dsub |
| 119481 | 56, // DD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 |
| 119482 | 65, // DD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 119483 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2 |
| 119484 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3 |
| 119485 | 0, // DD_with_dsub1_in_FPR64_lo:dsub_hi |
| 119486 | 8, // DD_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 119487 | 0, // DD_with_dsub1_in_FPR64_lo:hsub_hi |
| 119488 | 0, // DD_with_dsub1_in_FPR64_lo:psub |
| 119489 | 0, // DD_with_dsub1_in_FPR64_lo:psub0 |
| 119490 | 0, // DD_with_dsub1_in_FPR64_lo:psub1 |
| 119491 | 0, // DD_with_dsub1_in_FPR64_lo:qsub0 |
| 119492 | 0, // DD_with_dsub1_in_FPR64_lo:qsub1 |
| 119493 | 0, // DD_with_dsub1_in_FPR64_lo:qsub2 |
| 119494 | 0, // DD_with_dsub1_in_FPR64_lo:qsub3 |
| 119495 | 40, // DD_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 119496 | 0, // DD_with_dsub1_in_FPR64_lo:ssub_hi |
| 119497 | 0, // DD_with_dsub1_in_FPR64_lo:sub_32 |
| 119498 | 0, // DD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 119499 | 0, // DD_with_dsub1_in_FPR64_lo:sube32 |
| 119500 | 0, // DD_with_dsub1_in_FPR64_lo:sube64 |
| 119501 | 0, // DD_with_dsub1_in_FPR64_lo:subo32 |
| 119502 | 0, // DD_with_dsub1_in_FPR64_lo:subo64 |
| 119503 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 119504 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 119505 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 119506 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 119507 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 119508 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 119509 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 119510 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 119511 | 0, // DD_with_dsub1_in_FPR64_lo:zasubb |
| 119512 | 0, // DD_with_dsub1_in_FPR64_lo:zasubd0 |
| 119513 | 0, // DD_with_dsub1_in_FPR64_lo:zasubd1 |
| 119514 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh0 |
| 119515 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1 |
| 119516 | 0, // DD_with_dsub1_in_FPR64_lo:zasubq0 |
| 119517 | 0, // DD_with_dsub1_in_FPR64_lo:zasubq1 |
| 119518 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs0 |
| 119519 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1 |
| 119520 | 0, // DD_with_dsub1_in_FPR64_lo:zsub |
| 119521 | 0, // DD_with_dsub1_in_FPR64_lo:zsub0 |
| 119522 | 0, // DD_with_dsub1_in_FPR64_lo:zsub1 |
| 119523 | 0, // DD_with_dsub1_in_FPR64_lo:zsub2 |
| 119524 | 0, // DD_with_dsub1_in_FPR64_lo:zsub3 |
| 119525 | 0, // DD_with_dsub1_in_FPR64_lo:zsub_hi |
| 119526 | 0, // DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 119527 | 0, // DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 119528 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 119529 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 119530 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 119531 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 119532 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 119533 | 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 119534 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 119535 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 119536 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 119537 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 119538 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 119539 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 119540 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 119541 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 119542 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 119543 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 119544 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 119545 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 119546 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119547 | 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119548 | 7, // DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 119549 | 0, // DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 119550 | 10, // DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 119551 | 0, // DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 119552 | 44, // DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 119553 | 0, // DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 119554 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 119555 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 119556 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 119557 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 119558 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 119559 | 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 119560 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 119561 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 119562 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 119563 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 119564 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 119565 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 119566 | 0, // DD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 119567 | 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 119568 | 0, // DD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 119569 | 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 119570 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 119571 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 119572 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 119573 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 119574 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 119575 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 119576 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 119577 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 119578 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 119579 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 119580 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 119581 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 119582 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 119583 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 119584 | 0, // DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 119585 | 0, // DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 119586 | 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 119587 | 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 119588 | 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 119589 | 0, // DD_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 119590 | 0, // DD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 119591 | 0, // DD_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 119592 | 0, // DD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 119593 | 0, // DD_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 119594 | 0, // DD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 119595 | 0, // DD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 119596 | 0, // DD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 119597 | 0, // DD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 119598 | 0, // DD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 119599 | 0, // DD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 119600 | 0, // DD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 119601 | 0, // DD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 119602 | 0, // DD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 119603 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 119604 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 119605 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 119606 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 119607 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119608 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119609 | 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119610 | 0, // DD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 119611 | 0, // DD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 119612 | 0, // DD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 119613 | 0, // DD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 119614 | 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 119615 | 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 119616 | 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 119617 | 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 119618 | 0, // DD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 119619 | 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 119620 | 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 119621 | }, |
| 119622 | { // XSeqPairsClass |
| 119623 | 0, // XSeqPairsClass:bsub |
| 119624 | 0, // XSeqPairsClass:bsub_hi |
| 119625 | 0, // XSeqPairsClass:dsub |
| 119626 | 0, // XSeqPairsClass:dsub0 |
| 119627 | 0, // XSeqPairsClass:dsub1 |
| 119628 | 0, // XSeqPairsClass:dsub2 |
| 119629 | 0, // XSeqPairsClass:dsub3 |
| 119630 | 0, // XSeqPairsClass:dsub_hi |
| 119631 | 0, // XSeqPairsClass:hsub |
| 119632 | 0, // XSeqPairsClass:hsub_hi |
| 119633 | 0, // XSeqPairsClass:psub |
| 119634 | 0, // XSeqPairsClass:psub0 |
| 119635 | 0, // XSeqPairsClass:psub1 |
| 119636 | 0, // XSeqPairsClass:qsub0 |
| 119637 | 0, // XSeqPairsClass:qsub1 |
| 119638 | 0, // XSeqPairsClass:qsub2 |
| 119639 | 0, // XSeqPairsClass:qsub3 |
| 119640 | 0, // XSeqPairsClass:ssub |
| 119641 | 0, // XSeqPairsClass:ssub_hi |
| 119642 | 43, // XSeqPairsClass:sub_32 -> GPR32common |
| 119643 | 0, // XSeqPairsClass:sub_32_hi |
| 119644 | 0, // XSeqPairsClass:sube32 |
| 119645 | 59, // XSeqPairsClass:sube64 -> GPR64common |
| 119646 | 0, // XSeqPairsClass:subo32 |
| 119647 | 57, // XSeqPairsClass:subo64 -> GPR64 |
| 119648 | 0, // XSeqPairsClass:x8sub_0 |
| 119649 | 0, // XSeqPairsClass:x8sub_1 |
| 119650 | 0, // XSeqPairsClass:x8sub_2 |
| 119651 | 0, // XSeqPairsClass:x8sub_3 |
| 119652 | 0, // XSeqPairsClass:x8sub_4 |
| 119653 | 0, // XSeqPairsClass:x8sub_5 |
| 119654 | 0, // XSeqPairsClass:x8sub_6 |
| 119655 | 0, // XSeqPairsClass:x8sub_7 |
| 119656 | 0, // XSeqPairsClass:zasubb |
| 119657 | 0, // XSeqPairsClass:zasubd0 |
| 119658 | 0, // XSeqPairsClass:zasubd1 |
| 119659 | 0, // XSeqPairsClass:zasubh0 |
| 119660 | 0, // XSeqPairsClass:zasubh1 |
| 119661 | 0, // XSeqPairsClass:zasubq0 |
| 119662 | 0, // XSeqPairsClass:zasubq1 |
| 119663 | 0, // XSeqPairsClass:zasubs0 |
| 119664 | 0, // XSeqPairsClass:zasubs1 |
| 119665 | 0, // XSeqPairsClass:zsub |
| 119666 | 0, // XSeqPairsClass:zsub0 |
| 119667 | 0, // XSeqPairsClass:zsub1 |
| 119668 | 0, // XSeqPairsClass:zsub2 |
| 119669 | 0, // XSeqPairsClass:zsub3 |
| 119670 | 0, // XSeqPairsClass:zsub_hi |
| 119671 | 0, // XSeqPairsClass:zasubd1_then_zasubq0 |
| 119672 | 0, // XSeqPairsClass:zasubd1_then_zasubq1 |
| 119673 | 0, // XSeqPairsClass:zasubs1_then_zasubd0 |
| 119674 | 0, // XSeqPairsClass:zasubs1_then_zasubd1 |
| 119675 | 0, // XSeqPairsClass:zasubs1_then_zasubq0 |
| 119676 | 0, // XSeqPairsClass:zasubs1_then_zasubq1 |
| 119677 | 0, // XSeqPairsClass:zasubs1_then_zasubd1_then_zasubq0 |
| 119678 | 0, // XSeqPairsClass:zasubs1_then_zasubd1_then_zasubq1 |
| 119679 | 0, // XSeqPairsClass:zasubh1_then_zasubd0 |
| 119680 | 0, // XSeqPairsClass:zasubh1_then_zasubd1 |
| 119681 | 0, // XSeqPairsClass:zasubh1_then_zasubq0 |
| 119682 | 0, // XSeqPairsClass:zasubh1_then_zasubq1 |
| 119683 | 0, // XSeqPairsClass:zasubh1_then_zasubs0 |
| 119684 | 0, // XSeqPairsClass:zasubh1_then_zasubs1 |
| 119685 | 0, // XSeqPairsClass:zasubh1_then_zasubd1_then_zasubq0 |
| 119686 | 0, // XSeqPairsClass:zasubh1_then_zasubd1_then_zasubq1 |
| 119687 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd0 |
| 119688 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1 |
| 119689 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubq0 |
| 119690 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubq1 |
| 119691 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119692 | 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119693 | 0, // XSeqPairsClass:dsub1_then_bsub |
| 119694 | 0, // XSeqPairsClass:dsub1_then_bsub_hi |
| 119695 | 0, // XSeqPairsClass:dsub1_then_hsub |
| 119696 | 0, // XSeqPairsClass:dsub1_then_hsub_hi |
| 119697 | 0, // XSeqPairsClass:dsub1_then_ssub |
| 119698 | 0, // XSeqPairsClass:dsub1_then_ssub_hi |
| 119699 | 0, // XSeqPairsClass:dsub3_then_bsub |
| 119700 | 0, // XSeqPairsClass:dsub3_then_bsub_hi |
| 119701 | 0, // XSeqPairsClass:dsub3_then_hsub |
| 119702 | 0, // XSeqPairsClass:dsub3_then_hsub_hi |
| 119703 | 0, // XSeqPairsClass:dsub3_then_ssub |
| 119704 | 0, // XSeqPairsClass:dsub3_then_ssub_hi |
| 119705 | 0, // XSeqPairsClass:dsub2_then_bsub |
| 119706 | 0, // XSeqPairsClass:dsub2_then_bsub_hi |
| 119707 | 0, // XSeqPairsClass:dsub2_then_hsub |
| 119708 | 0, // XSeqPairsClass:dsub2_then_hsub_hi |
| 119709 | 0, // XSeqPairsClass:dsub2_then_ssub |
| 119710 | 0, // XSeqPairsClass:dsub2_then_ssub_hi |
| 119711 | 0, // XSeqPairsClass:psub1_then_psub |
| 119712 | 0, // XSeqPairsClass:qsub1_then_dsub_hi |
| 119713 | 0, // XSeqPairsClass:qsub3_then_dsub_hi |
| 119714 | 0, // XSeqPairsClass:qsub2_then_dsub_hi |
| 119715 | 0, // XSeqPairsClass:x8sub_7_then_sub_32 |
| 119716 | 0, // XSeqPairsClass:x8sub_7_then_sub_32_hi |
| 119717 | 0, // XSeqPairsClass:x8sub_6_then_sub_32 |
| 119718 | 0, // XSeqPairsClass:x8sub_6_then_sub_32_hi |
| 119719 | 0, // XSeqPairsClass:x8sub_5_then_sub_32 |
| 119720 | 0, // XSeqPairsClass:x8sub_5_then_sub_32_hi |
| 119721 | 0, // XSeqPairsClass:x8sub_4_then_sub_32 |
| 119722 | 0, // XSeqPairsClass:x8sub_4_then_sub_32_hi |
| 119723 | 0, // XSeqPairsClass:x8sub_3_then_sub_32 |
| 119724 | 0, // XSeqPairsClass:x8sub_3_then_sub_32_hi |
| 119725 | 0, // XSeqPairsClass:x8sub_2_then_sub_32 |
| 119726 | 0, // XSeqPairsClass:x8sub_2_then_sub_32_hi |
| 119727 | 0, // XSeqPairsClass:x8sub_1_then_sub_32 |
| 119728 | 0, // XSeqPairsClass:x8sub_1_then_sub_32_hi |
| 119729 | 41, // XSeqPairsClass:subo64_then_sub_32 -> GPR32 |
| 119730 | 0, // XSeqPairsClass:subo64_then_sub_32_hi |
| 119731 | 0, // XSeqPairsClass:zsub1_then_zsub_hi |
| 119732 | 0, // XSeqPairsClass:zsub3_then_zsub_hi |
| 119733 | 0, // XSeqPairsClass:zsub2_then_zsub_hi |
| 119734 | 0, // XSeqPairsClass:dsub0_dsub1 |
| 119735 | 0, // XSeqPairsClass:dsub0_dsub1_dsub2 |
| 119736 | 0, // XSeqPairsClass:dsub1_dsub2 |
| 119737 | 0, // XSeqPairsClass:dsub1_dsub2_dsub3 |
| 119738 | 0, // XSeqPairsClass:dsub2_dsub3 |
| 119739 | 0, // XSeqPairsClass:dsub_dsub1 |
| 119740 | 0, // XSeqPairsClass:dsub_dsub1_dsub2_dsub3 |
| 119741 | 0, // XSeqPairsClass:dsub_dsub1_dsub2 |
| 119742 | 0, // XSeqPairsClass:qsub0_qsub1 |
| 119743 | 0, // XSeqPairsClass:qsub0_qsub1_qsub2 |
| 119744 | 0, // XSeqPairsClass:qsub1_qsub2 |
| 119745 | 0, // XSeqPairsClass:qsub1_qsub2_qsub3 |
| 119746 | 0, // XSeqPairsClass:qsub2_qsub3 |
| 119747 | 0, // XSeqPairsClass:sub_32_x8sub_1_then_sub_32 |
| 119748 | 0, // XSeqPairsClass:x8sub_0_x8sub_1 |
| 119749 | 0, // XSeqPairsClass:x8sub_2_x8sub_3 |
| 119750 | 0, // XSeqPairsClass:x8sub_4_x8sub_5 |
| 119751 | 0, // XSeqPairsClass:x8sub_6_x8sub_7 |
| 119752 | 0, // XSeqPairsClass:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119753 | 0, // XSeqPairsClass:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119754 | 0, // XSeqPairsClass:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119755 | 50, // XSeqPairsClass:sub_32_subo64_then_sub_32 -> WSeqPairsClass |
| 119756 | 0, // XSeqPairsClass:zsub_qsub1 |
| 119757 | 0, // XSeqPairsClass:zsub_qsub1_qsub2_qsub3 |
| 119758 | 0, // XSeqPairsClass:zsub_qsub1_qsub2 |
| 119759 | 0, // XSeqPairsClass:zsub0_zsub1 |
| 119760 | 0, // XSeqPairsClass:zsub0_zsub1_zsub2 |
| 119761 | 0, // XSeqPairsClass:zsub1_zsub2 |
| 119762 | 0, // XSeqPairsClass:zsub1_zsub2_zsub3 |
| 119763 | 0, // XSeqPairsClass:zsub2_zsub3 |
| 119764 | 0, // XSeqPairsClass:zsub0_zsub2 |
| 119765 | 0, // XSeqPairsClass:zsub1_zsub3 |
| 119766 | }, |
| 119767 | { // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 119768 | 7, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 119769 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:bsub_hi |
| 119770 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub |
| 119771 | 65, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo |
| 119772 | 65, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 119773 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2 |
| 119774 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3 |
| 119775 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_hi |
| 119776 | 10, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 119777 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:hsub_hi |
| 119778 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub |
| 119779 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub0 |
| 119780 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub1 |
| 119781 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0 |
| 119782 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1 |
| 119783 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2 |
| 119784 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3 |
| 119785 | 44, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 119786 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:ssub_hi |
| 119787 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32 |
| 119788 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 119789 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sube32 |
| 119790 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sube64 |
| 119791 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo32 |
| 119792 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo64 |
| 119793 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 119794 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 119795 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 119796 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 119797 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 119798 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 119799 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 119800 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 119801 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubb |
| 119802 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd0 |
| 119803 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1 |
| 119804 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh0 |
| 119805 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1 |
| 119806 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubq0 |
| 119807 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubq1 |
| 119808 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs0 |
| 119809 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1 |
| 119810 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub |
| 119811 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0 |
| 119812 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1 |
| 119813 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2 |
| 119814 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3 |
| 119815 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_hi |
| 119816 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 119817 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 119818 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 119819 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 119820 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 119821 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 119822 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 119823 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 119824 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 119825 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 119826 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 119827 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 119828 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 119829 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 119830 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 119831 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 119832 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 119833 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 119834 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 119835 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 119836 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119837 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119838 | 7, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 119839 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 119840 | 10, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 119841 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 119842 | 44, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 119843 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 119844 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 119845 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 119846 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 119847 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 119848 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 119849 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 119850 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 119851 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 119852 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 119853 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 119854 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 119855 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 119856 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 119857 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 119858 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 119859 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 119860 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 119861 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 119862 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 119863 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 119864 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 119865 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 119866 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 119867 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 119868 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 119869 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 119870 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 119871 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 119872 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 119873 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 119874 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 119875 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 119876 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 119877 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 119878 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 119879 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 119880 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 119881 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 119882 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 119883 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 119884 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 119885 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 119886 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 119887 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 119888 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 119889 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 119890 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 119891 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 119892 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 119893 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 119894 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 119895 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 119896 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 119897 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 119898 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 119899 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 119900 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 119901 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 119902 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 119903 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 119904 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 119905 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 119906 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 119907 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 119908 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 119909 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 119910 | 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 119911 | }, |
| 119912 | { // XSeqPairsClass_with_subo64_in_GPR64common |
| 119913 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:bsub |
| 119914 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:bsub_hi |
| 119915 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub |
| 119916 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0 |
| 119917 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1 |
| 119918 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2 |
| 119919 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3 |
| 119920 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_hi |
| 119921 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:hsub |
| 119922 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:hsub_hi |
| 119923 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub |
| 119924 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub0 |
| 119925 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub1 |
| 119926 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0 |
| 119927 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1 |
| 119928 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2 |
| 119929 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3 |
| 119930 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:ssub |
| 119931 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:ssub_hi |
| 119932 | 43, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32 -> GPR32common |
| 119933 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32_hi |
| 119934 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:sube32 |
| 119935 | 59, // XSeqPairsClass_with_subo64_in_GPR64common:sube64 -> GPR64common |
| 119936 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:subo32 |
| 119937 | 59, // XSeqPairsClass_with_subo64_in_GPR64common:subo64 -> GPR64common |
| 119938 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_0 |
| 119939 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_1 |
| 119940 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2 |
| 119941 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_3 |
| 119942 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4 |
| 119943 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_5 |
| 119944 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6 |
| 119945 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_7 |
| 119946 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubb |
| 119947 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd0 |
| 119948 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1 |
| 119949 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh0 |
| 119950 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1 |
| 119951 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubq0 |
| 119952 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubq1 |
| 119953 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs0 |
| 119954 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1 |
| 119955 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub |
| 119956 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0 |
| 119957 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1 |
| 119958 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2 |
| 119959 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3 |
| 119960 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_hi |
| 119961 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1_then_zasubq0 |
| 119962 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1_then_zasubq1 |
| 119963 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd0 |
| 119964 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1 |
| 119965 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubq0 |
| 119966 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubq1 |
| 119967 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1_then_zasubq0 |
| 119968 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1_then_zasubq1 |
| 119969 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd0 |
| 119970 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1 |
| 119971 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubq0 |
| 119972 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubq1 |
| 119973 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs0 |
| 119974 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1 |
| 119975 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1_then_zasubq0 |
| 119976 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1_then_zasubq1 |
| 119977 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd0 |
| 119978 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1 |
| 119979 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubq0 |
| 119980 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubq1 |
| 119981 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 119982 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 119983 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_bsub |
| 119984 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_bsub_hi |
| 119985 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_hsub |
| 119986 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_hsub_hi |
| 119987 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_ssub |
| 119988 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_ssub_hi |
| 119989 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_bsub |
| 119990 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_bsub_hi |
| 119991 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_hsub |
| 119992 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_hsub_hi |
| 119993 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_ssub |
| 119994 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_ssub_hi |
| 119995 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_bsub |
| 119996 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_bsub_hi |
| 119997 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_hsub |
| 119998 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_hsub_hi |
| 119999 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_ssub |
| 120000 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_ssub_hi |
| 120001 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub1_then_psub |
| 120002 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_dsub_hi |
| 120003 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3_then_dsub_hi |
| 120004 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_dsub_hi |
| 120005 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_7_then_sub_32 |
| 120006 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_7_then_sub_32_hi |
| 120007 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_then_sub_32 |
| 120008 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_then_sub_32_hi |
| 120009 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_5_then_sub_32 |
| 120010 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_5_then_sub_32_hi |
| 120011 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_then_sub_32 |
| 120012 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_then_sub_32_hi |
| 120013 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_3_then_sub_32 |
| 120014 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_3_then_sub_32_hi |
| 120015 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_then_sub_32 |
| 120016 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_then_sub_32_hi |
| 120017 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_1_then_sub_32 |
| 120018 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_1_then_sub_32_hi |
| 120019 | 43, // XSeqPairsClass_with_subo64_in_GPR64common:subo64_then_sub_32 -> GPR32common |
| 120020 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:subo64_then_sub_32_hi |
| 120021 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_zsub_hi |
| 120022 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_zsub_hi |
| 120023 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_zsub_hi |
| 120024 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0_dsub1 |
| 120025 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0_dsub1_dsub2 |
| 120026 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_dsub2 |
| 120027 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_dsub2_dsub3 |
| 120028 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_dsub3 |
| 120029 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_dsub1 |
| 120030 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_dsub1_dsub2_dsub3 |
| 120031 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_dsub1_dsub2 |
| 120032 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0_qsub1 |
| 120033 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0_qsub1_qsub2 |
| 120034 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_qsub2 |
| 120035 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_qsub2_qsub3 |
| 120036 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_qsub3 |
| 120037 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32_x8sub_1_then_sub_32 |
| 120038 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_0_x8sub_1 |
| 120039 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_x8sub_3 |
| 120040 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_x8sub_5 |
| 120041 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_x8sub_7 |
| 120042 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120043 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120044 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120045 | 51, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120046 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_qsub1 |
| 120047 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_qsub1_qsub2_qsub3 |
| 120048 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_qsub1_qsub2 |
| 120049 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub1 |
| 120050 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub1_zsub2 |
| 120051 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub2 |
| 120052 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub2_zsub3 |
| 120053 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_zsub3 |
| 120054 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub2 |
| 120055 | 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub3 |
| 120056 | }, |
| 120057 | { // XSeqPairsClass_with_subo64_in_GPR64noip |
| 120058 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:bsub |
| 120059 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:bsub_hi |
| 120060 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub |
| 120061 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0 |
| 120062 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1 |
| 120063 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2 |
| 120064 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3 |
| 120065 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_hi |
| 120066 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:hsub |
| 120067 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:hsub_hi |
| 120068 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub |
| 120069 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub0 |
| 120070 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub1 |
| 120071 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0 |
| 120072 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1 |
| 120073 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2 |
| 120074 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3 |
| 120075 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:ssub |
| 120076 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:ssub_hi |
| 120077 | 43, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32 -> GPR32common |
| 120078 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32_hi |
| 120079 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:sube32 |
| 120080 | 59, // XSeqPairsClass_with_subo64_in_GPR64noip:sube64 -> GPR64common |
| 120081 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:subo32 |
| 120082 | 60, // XSeqPairsClass_with_subo64_in_GPR64noip:subo64 -> GPR64noip |
| 120083 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_0 |
| 120084 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_1 |
| 120085 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2 |
| 120086 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_3 |
| 120087 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4 |
| 120088 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_5 |
| 120089 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6 |
| 120090 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_7 |
| 120091 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubb |
| 120092 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd0 |
| 120093 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1 |
| 120094 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh0 |
| 120095 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1 |
| 120096 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubq0 |
| 120097 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubq1 |
| 120098 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs0 |
| 120099 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1 |
| 120100 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub |
| 120101 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0 |
| 120102 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1 |
| 120103 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2 |
| 120104 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3 |
| 120105 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_hi |
| 120106 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1_then_zasubq0 |
| 120107 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1_then_zasubq1 |
| 120108 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd0 |
| 120109 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1 |
| 120110 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubq0 |
| 120111 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubq1 |
| 120112 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 120113 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 120114 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd0 |
| 120115 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1 |
| 120116 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubq0 |
| 120117 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubq1 |
| 120118 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs0 |
| 120119 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1 |
| 120120 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 120121 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 120122 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 120123 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 120124 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 120125 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 120126 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120127 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120128 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_bsub |
| 120129 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_bsub_hi |
| 120130 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_hsub |
| 120131 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_hsub_hi |
| 120132 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_ssub |
| 120133 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_ssub_hi |
| 120134 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_bsub |
| 120135 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_bsub_hi |
| 120136 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_hsub |
| 120137 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_hsub_hi |
| 120138 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_ssub |
| 120139 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_ssub_hi |
| 120140 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_bsub |
| 120141 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_bsub_hi |
| 120142 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_hsub |
| 120143 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_hsub_hi |
| 120144 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_ssub |
| 120145 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_ssub_hi |
| 120146 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub1_then_psub |
| 120147 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_dsub_hi |
| 120148 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3_then_dsub_hi |
| 120149 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_dsub_hi |
| 120150 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_7_then_sub_32 |
| 120151 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 120152 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_then_sub_32 |
| 120153 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 120154 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_5_then_sub_32 |
| 120155 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 120156 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_then_sub_32 |
| 120157 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 120158 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_3_then_sub_32 |
| 120159 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 120160 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_then_sub_32 |
| 120161 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 120162 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_1_then_sub_32 |
| 120163 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 120164 | 41, // XSeqPairsClass_with_subo64_in_GPR64noip:subo64_then_sub_32 -> GPR32 |
| 120165 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:subo64_then_sub_32_hi |
| 120166 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_zsub_hi |
| 120167 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_zsub_hi |
| 120168 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_zsub_hi |
| 120169 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0_dsub1 |
| 120170 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0_dsub1_dsub2 |
| 120171 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_dsub2 |
| 120172 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_dsub2_dsub3 |
| 120173 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_dsub3 |
| 120174 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_dsub1 |
| 120175 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 120176 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_dsub1_dsub2 |
| 120177 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0_qsub1 |
| 120178 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0_qsub1_qsub2 |
| 120179 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_qsub2 |
| 120180 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_qsub2_qsub3 |
| 120181 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_qsub3 |
| 120182 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32_x8sub_1_then_sub_32 |
| 120183 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_0_x8sub_1 |
| 120184 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_x8sub_3 |
| 120185 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_x8sub_5 |
| 120186 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_x8sub_7 |
| 120187 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120188 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120189 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120190 | 50, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32_subo64_then_sub_32 -> WSeqPairsClass |
| 120191 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_qsub1 |
| 120192 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 120193 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_qsub1_qsub2 |
| 120194 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub1 |
| 120195 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub1_zsub2 |
| 120196 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub2 |
| 120197 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub2_zsub3 |
| 120198 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_zsub3 |
| 120199 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub2 |
| 120200 | 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub3 |
| 120201 | }, |
| 120202 | { // XSeqPairsClass_with_sube64_in_GPR64noip |
| 120203 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:bsub |
| 120204 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:bsub_hi |
| 120205 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub |
| 120206 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0 |
| 120207 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1 |
| 120208 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2 |
| 120209 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3 |
| 120210 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_hi |
| 120211 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:hsub |
| 120212 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:hsub_hi |
| 120213 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub |
| 120214 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub0 |
| 120215 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub1 |
| 120216 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0 |
| 120217 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1 |
| 120218 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2 |
| 120219 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3 |
| 120220 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:ssub |
| 120221 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:ssub_hi |
| 120222 | 43, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32 -> GPR32common |
| 120223 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32_hi |
| 120224 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:sube32 |
| 120225 | 61, // XSeqPairsClass_with_sube64_in_GPR64noip:sube64 -> GPR64common_and_GPR64noip |
| 120226 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:subo32 |
| 120227 | 61, // XSeqPairsClass_with_sube64_in_GPR64noip:subo64 -> GPR64common_and_GPR64noip |
| 120228 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_0 |
| 120229 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_1 |
| 120230 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2 |
| 120231 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_3 |
| 120232 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4 |
| 120233 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_5 |
| 120234 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6 |
| 120235 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_7 |
| 120236 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubb |
| 120237 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd0 |
| 120238 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1 |
| 120239 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh0 |
| 120240 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1 |
| 120241 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubq0 |
| 120242 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubq1 |
| 120243 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs0 |
| 120244 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1 |
| 120245 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub |
| 120246 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0 |
| 120247 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1 |
| 120248 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2 |
| 120249 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3 |
| 120250 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_hi |
| 120251 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1_then_zasubq0 |
| 120252 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1_then_zasubq1 |
| 120253 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd0 |
| 120254 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1 |
| 120255 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubq0 |
| 120256 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubq1 |
| 120257 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 120258 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 120259 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd0 |
| 120260 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1 |
| 120261 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubq0 |
| 120262 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubq1 |
| 120263 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs0 |
| 120264 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1 |
| 120265 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 120266 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 120267 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 120268 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 120269 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 120270 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 120271 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120272 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120273 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_bsub |
| 120274 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_bsub_hi |
| 120275 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_hsub |
| 120276 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_hsub_hi |
| 120277 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_ssub |
| 120278 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_ssub_hi |
| 120279 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_bsub |
| 120280 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_bsub_hi |
| 120281 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_hsub |
| 120282 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_hsub_hi |
| 120283 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_ssub |
| 120284 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_ssub_hi |
| 120285 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_bsub |
| 120286 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_bsub_hi |
| 120287 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_hsub |
| 120288 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_hsub_hi |
| 120289 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_ssub |
| 120290 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_ssub_hi |
| 120291 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub1_then_psub |
| 120292 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_dsub_hi |
| 120293 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3_then_dsub_hi |
| 120294 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_dsub_hi |
| 120295 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_7_then_sub_32 |
| 120296 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 120297 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_then_sub_32 |
| 120298 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 120299 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_5_then_sub_32 |
| 120300 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 120301 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_then_sub_32 |
| 120302 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 120303 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_3_then_sub_32 |
| 120304 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 120305 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_then_sub_32 |
| 120306 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 120307 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_1_then_sub_32 |
| 120308 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 120309 | 43, // XSeqPairsClass_with_sube64_in_GPR64noip:subo64_then_sub_32 -> GPR32common |
| 120310 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:subo64_then_sub_32_hi |
| 120311 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_zsub_hi |
| 120312 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_zsub_hi |
| 120313 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_zsub_hi |
| 120314 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0_dsub1 |
| 120315 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0_dsub1_dsub2 |
| 120316 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_dsub2 |
| 120317 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_dsub2_dsub3 |
| 120318 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_dsub3 |
| 120319 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_dsub1 |
| 120320 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 120321 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_dsub1_dsub2 |
| 120322 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0_qsub1 |
| 120323 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0_qsub1_qsub2 |
| 120324 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_qsub2 |
| 120325 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_qsub2_qsub3 |
| 120326 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_qsub3 |
| 120327 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32_x8sub_1_then_sub_32 |
| 120328 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_0_x8sub_1 |
| 120329 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_x8sub_3 |
| 120330 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_x8sub_5 |
| 120331 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_x8sub_7 |
| 120332 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120333 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120334 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120335 | 51, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120336 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_qsub1 |
| 120337 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 120338 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_qsub1_qsub2 |
| 120339 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub1 |
| 120340 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub1_zsub2 |
| 120341 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub2 |
| 120342 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub2_zsub3 |
| 120343 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_zsub3 |
| 120344 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub2 |
| 120345 | 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub3 |
| 120346 | }, |
| 120347 | { // XSeqPairsClass_with_sube64_in_tcGPR64 |
| 120348 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:bsub |
| 120349 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:bsub_hi |
| 120350 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub |
| 120351 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0 |
| 120352 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1 |
| 120353 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2 |
| 120354 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3 |
| 120355 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_hi |
| 120356 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:hsub |
| 120357 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:hsub_hi |
| 120358 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub |
| 120359 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub0 |
| 120360 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub1 |
| 120361 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0 |
| 120362 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1 |
| 120363 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2 |
| 120364 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3 |
| 120365 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:ssub |
| 120366 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:ssub_hi |
| 120367 | 43, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32 -> GPR32common |
| 120368 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32_hi |
| 120369 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:sube32 |
| 120370 | 62, // XSeqPairsClass_with_sube64_in_tcGPR64:sube64 -> tcGPR64 |
| 120371 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:subo32 |
| 120372 | 59, // XSeqPairsClass_with_sube64_in_tcGPR64:subo64 -> GPR64common |
| 120373 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_0 |
| 120374 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_1 |
| 120375 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2 |
| 120376 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_3 |
| 120377 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4 |
| 120378 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_5 |
| 120379 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6 |
| 120380 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_7 |
| 120381 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubb |
| 120382 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd0 |
| 120383 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1 |
| 120384 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh0 |
| 120385 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1 |
| 120386 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubq0 |
| 120387 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubq1 |
| 120388 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs0 |
| 120389 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1 |
| 120390 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub |
| 120391 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0 |
| 120392 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1 |
| 120393 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2 |
| 120394 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3 |
| 120395 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_hi |
| 120396 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1_then_zasubq0 |
| 120397 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1_then_zasubq1 |
| 120398 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd0 |
| 120399 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1 |
| 120400 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubq0 |
| 120401 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubq1 |
| 120402 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 120403 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 120404 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd0 |
| 120405 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1 |
| 120406 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubq0 |
| 120407 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubq1 |
| 120408 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs0 |
| 120409 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1 |
| 120410 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 120411 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 120412 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 120413 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 120414 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 120415 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 120416 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120417 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120418 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_bsub |
| 120419 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_bsub_hi |
| 120420 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_hsub |
| 120421 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_hsub_hi |
| 120422 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_ssub |
| 120423 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_ssub_hi |
| 120424 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_bsub |
| 120425 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_bsub_hi |
| 120426 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_hsub |
| 120427 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_hsub_hi |
| 120428 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_ssub |
| 120429 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_ssub_hi |
| 120430 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_bsub |
| 120431 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_bsub_hi |
| 120432 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_hsub |
| 120433 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_hsub_hi |
| 120434 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_ssub |
| 120435 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_ssub_hi |
| 120436 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub1_then_psub |
| 120437 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_dsub_hi |
| 120438 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3_then_dsub_hi |
| 120439 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_dsub_hi |
| 120440 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_7_then_sub_32 |
| 120441 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_7_then_sub_32_hi |
| 120442 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_then_sub_32 |
| 120443 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_then_sub_32_hi |
| 120444 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_5_then_sub_32 |
| 120445 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_5_then_sub_32_hi |
| 120446 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_then_sub_32 |
| 120447 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_then_sub_32_hi |
| 120448 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_3_then_sub_32 |
| 120449 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_3_then_sub_32_hi |
| 120450 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_then_sub_32 |
| 120451 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_then_sub_32_hi |
| 120452 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_1_then_sub_32 |
| 120453 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_1_then_sub_32_hi |
| 120454 | 43, // XSeqPairsClass_with_sube64_in_tcGPR64:subo64_then_sub_32 -> GPR32common |
| 120455 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:subo64_then_sub_32_hi |
| 120456 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_zsub_hi |
| 120457 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_zsub_hi |
| 120458 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_zsub_hi |
| 120459 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0_dsub1 |
| 120460 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0_dsub1_dsub2 |
| 120461 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_dsub2 |
| 120462 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_dsub2_dsub3 |
| 120463 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_dsub3 |
| 120464 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_dsub1 |
| 120465 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_dsub1_dsub2_dsub3 |
| 120466 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_dsub1_dsub2 |
| 120467 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0_qsub1 |
| 120468 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0_qsub1_qsub2 |
| 120469 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_qsub2 |
| 120470 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_qsub2_qsub3 |
| 120471 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_qsub3 |
| 120472 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32_x8sub_1_then_sub_32 |
| 120473 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_0_x8sub_1 |
| 120474 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_x8sub_3 |
| 120475 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_x8sub_5 |
| 120476 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_x8sub_7 |
| 120477 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120478 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120479 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120480 | 51, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120481 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_qsub1 |
| 120482 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_qsub1_qsub2_qsub3 |
| 120483 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_qsub1_qsub2 |
| 120484 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub1 |
| 120485 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub1_zsub2 |
| 120486 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub2 |
| 120487 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub2_zsub3 |
| 120488 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_zsub3 |
| 120489 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub2 |
| 120490 | 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub3 |
| 120491 | }, |
| 120492 | { // XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 120493 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:bsub |
| 120494 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:bsub_hi |
| 120495 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub |
| 120496 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub0 |
| 120497 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1 |
| 120498 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2 |
| 120499 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3 |
| 120500 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub_hi |
| 120501 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:hsub |
| 120502 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:hsub_hi |
| 120503 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:psub |
| 120504 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:psub0 |
| 120505 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:psub1 |
| 120506 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub0 |
| 120507 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub1 |
| 120508 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub2 |
| 120509 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub3 |
| 120510 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:ssub |
| 120511 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:ssub_hi |
| 120512 | 43, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sub_32 -> GPR32common |
| 120513 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sub_32_hi |
| 120514 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sube32 |
| 120515 | 64, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sube64 -> tcGPRnotx16x17 |
| 120516 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:subo32 |
| 120517 | 61, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:subo64 -> GPR64common_and_GPR64noip |
| 120518 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_0 |
| 120519 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_1 |
| 120520 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_2 |
| 120521 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_3 |
| 120522 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_4 |
| 120523 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_5 |
| 120524 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_6 |
| 120525 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_7 |
| 120526 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubb |
| 120527 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubd0 |
| 120528 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubd1 |
| 120529 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh0 |
| 120530 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1 |
| 120531 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubq0 |
| 120532 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubq1 |
| 120533 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs0 |
| 120534 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1 |
| 120535 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub |
| 120536 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub0 |
| 120537 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub1 |
| 120538 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub2 |
| 120539 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub3 |
| 120540 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub_hi |
| 120541 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubd1_then_zasubq0 |
| 120542 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubd1_then_zasubq1 |
| 120543 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubd0 |
| 120544 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubd1 |
| 120545 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubq0 |
| 120546 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubq1 |
| 120547 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 120548 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 120549 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubd0 |
| 120550 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubd1 |
| 120551 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubq0 |
| 120552 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubq1 |
| 120553 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs0 |
| 120554 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1 |
| 120555 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 120556 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 120557 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 120558 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 120559 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 120560 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 120561 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120562 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120563 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_bsub |
| 120564 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_bsub_hi |
| 120565 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_hsub |
| 120566 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_hsub_hi |
| 120567 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_ssub |
| 120568 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_then_ssub_hi |
| 120569 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_bsub |
| 120570 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_bsub_hi |
| 120571 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_hsub |
| 120572 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_hsub_hi |
| 120573 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_ssub |
| 120574 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub3_then_ssub_hi |
| 120575 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_bsub |
| 120576 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_bsub_hi |
| 120577 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_hsub |
| 120578 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_hsub_hi |
| 120579 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_ssub |
| 120580 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_then_ssub_hi |
| 120581 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:psub1_then_psub |
| 120582 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub1_then_dsub_hi |
| 120583 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub3_then_dsub_hi |
| 120584 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub2_then_dsub_hi |
| 120585 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_7_then_sub_32 |
| 120586 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 120587 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_6_then_sub_32 |
| 120588 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 120589 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_5_then_sub_32 |
| 120590 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 120591 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_4_then_sub_32 |
| 120592 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 120593 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_3_then_sub_32 |
| 120594 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 120595 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_2_then_sub_32 |
| 120596 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 120597 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_1_then_sub_32 |
| 120598 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 120599 | 43, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:subo64_then_sub_32 -> GPR32common |
| 120600 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:subo64_then_sub_32_hi |
| 120601 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub1_then_zsub_hi |
| 120602 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub3_then_zsub_hi |
| 120603 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub2_then_zsub_hi |
| 120604 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub0_dsub1 |
| 120605 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub0_dsub1_dsub2 |
| 120606 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_dsub2 |
| 120607 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub1_dsub2_dsub3 |
| 120608 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub2_dsub3 |
| 120609 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub_dsub1 |
| 120610 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 120611 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:dsub_dsub1_dsub2 |
| 120612 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub0_qsub1 |
| 120613 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub0_qsub1_qsub2 |
| 120614 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub1_qsub2 |
| 120615 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub1_qsub2_qsub3 |
| 120616 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:qsub2_qsub3 |
| 120617 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sub_32_x8sub_1_then_sub_32 |
| 120618 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_0_x8sub_1 |
| 120619 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_2_x8sub_3 |
| 120620 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_4_x8sub_5 |
| 120621 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_6_x8sub_7 |
| 120622 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120623 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120624 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120625 | 51, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120626 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub_qsub1 |
| 120627 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 120628 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub_qsub1_qsub2 |
| 120629 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub0_zsub1 |
| 120630 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub0_zsub1_zsub2 |
| 120631 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub1_zsub2 |
| 120632 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub1_zsub2_zsub3 |
| 120633 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub2_zsub3 |
| 120634 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub0_zsub2 |
| 120635 | 0, // XSeqPairsClass_with_sube64_in_tcGPRnotx16:zsub1_zsub3 |
| 120636 | }, |
| 120637 | { // XSeqPairsClass_with_subo64_in_tcGPR64 |
| 120638 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:bsub |
| 120639 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:bsub_hi |
| 120640 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub |
| 120641 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0 |
| 120642 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1 |
| 120643 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2 |
| 120644 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3 |
| 120645 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_hi |
| 120646 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:hsub |
| 120647 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:hsub_hi |
| 120648 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub |
| 120649 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub0 |
| 120650 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub1 |
| 120651 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0 |
| 120652 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1 |
| 120653 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2 |
| 120654 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3 |
| 120655 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:ssub |
| 120656 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:ssub_hi |
| 120657 | 43, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32 -> GPR32common |
| 120658 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32_hi |
| 120659 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:sube32 |
| 120660 | 62, // XSeqPairsClass_with_subo64_in_tcGPR64:sube64 -> tcGPR64 |
| 120661 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:subo32 |
| 120662 | 63, // XSeqPairsClass_with_subo64_in_tcGPR64:subo64 -> tcGPRnotx16 |
| 120663 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_0 |
| 120664 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_1 |
| 120665 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2 |
| 120666 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_3 |
| 120667 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4 |
| 120668 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_5 |
| 120669 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6 |
| 120670 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_7 |
| 120671 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubb |
| 120672 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd0 |
| 120673 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1 |
| 120674 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh0 |
| 120675 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1 |
| 120676 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubq0 |
| 120677 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubq1 |
| 120678 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs0 |
| 120679 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1 |
| 120680 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub |
| 120681 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0 |
| 120682 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1 |
| 120683 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2 |
| 120684 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3 |
| 120685 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_hi |
| 120686 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1_then_zasubq0 |
| 120687 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1_then_zasubq1 |
| 120688 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd0 |
| 120689 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1 |
| 120690 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubq0 |
| 120691 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubq1 |
| 120692 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 120693 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 120694 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd0 |
| 120695 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1 |
| 120696 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubq0 |
| 120697 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubq1 |
| 120698 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs0 |
| 120699 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1 |
| 120700 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 120701 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 120702 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 120703 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 120704 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 120705 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 120706 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120707 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120708 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_bsub |
| 120709 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_bsub_hi |
| 120710 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_hsub |
| 120711 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_hsub_hi |
| 120712 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_ssub |
| 120713 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_ssub_hi |
| 120714 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_bsub |
| 120715 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_bsub_hi |
| 120716 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_hsub |
| 120717 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_hsub_hi |
| 120718 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_ssub |
| 120719 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_ssub_hi |
| 120720 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_bsub |
| 120721 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_bsub_hi |
| 120722 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_hsub |
| 120723 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_hsub_hi |
| 120724 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_ssub |
| 120725 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_ssub_hi |
| 120726 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub1_then_psub |
| 120727 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_dsub_hi |
| 120728 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3_then_dsub_hi |
| 120729 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_dsub_hi |
| 120730 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_7_then_sub_32 |
| 120731 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_7_then_sub_32_hi |
| 120732 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_then_sub_32 |
| 120733 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_then_sub_32_hi |
| 120734 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_5_then_sub_32 |
| 120735 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_5_then_sub_32_hi |
| 120736 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_then_sub_32 |
| 120737 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_then_sub_32_hi |
| 120738 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_3_then_sub_32 |
| 120739 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_3_then_sub_32_hi |
| 120740 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_then_sub_32 |
| 120741 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_then_sub_32_hi |
| 120742 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_1_then_sub_32 |
| 120743 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_1_then_sub_32_hi |
| 120744 | 43, // XSeqPairsClass_with_subo64_in_tcGPR64:subo64_then_sub_32 -> GPR32common |
| 120745 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:subo64_then_sub_32_hi |
| 120746 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_zsub_hi |
| 120747 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_zsub_hi |
| 120748 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_zsub_hi |
| 120749 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0_dsub1 |
| 120750 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0_dsub1_dsub2 |
| 120751 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_dsub2 |
| 120752 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_dsub2_dsub3 |
| 120753 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_dsub3 |
| 120754 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_dsub1 |
| 120755 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_dsub1_dsub2_dsub3 |
| 120756 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_dsub1_dsub2 |
| 120757 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0_qsub1 |
| 120758 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0_qsub1_qsub2 |
| 120759 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_qsub2 |
| 120760 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_qsub2_qsub3 |
| 120761 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_qsub3 |
| 120762 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32_x8sub_1_then_sub_32 |
| 120763 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_0_x8sub_1 |
| 120764 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_x8sub_3 |
| 120765 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_x8sub_5 |
| 120766 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_x8sub_7 |
| 120767 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120768 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120769 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120770 | 51, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120771 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_qsub1 |
| 120772 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_qsub1_qsub2_qsub3 |
| 120773 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_qsub1_qsub2 |
| 120774 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub1 |
| 120775 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub1_zsub2 |
| 120776 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub2 |
| 120777 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub2_zsub3 |
| 120778 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_zsub3 |
| 120779 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub2 |
| 120780 | 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub3 |
| 120781 | }, |
| 120782 | { // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 120783 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:bsub |
| 120784 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:bsub_hi |
| 120785 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub |
| 120786 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub0 |
| 120787 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1 |
| 120788 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2 |
| 120789 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3 |
| 120790 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub_hi |
| 120791 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:hsub |
| 120792 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:hsub_hi |
| 120793 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:psub |
| 120794 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:psub0 |
| 120795 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:psub1 |
| 120796 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub0 |
| 120797 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub1 |
| 120798 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub2 |
| 120799 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub3 |
| 120800 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:ssub |
| 120801 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:ssub_hi |
| 120802 | 43, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sub_32 -> GPR32common |
| 120803 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sub_32_hi |
| 120804 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sube32 |
| 120805 | 64, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sube64 -> tcGPRnotx16x17 |
| 120806 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:subo32 |
| 120807 | 64, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:subo64 -> tcGPRnotx16x17 |
| 120808 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_0 |
| 120809 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_1 |
| 120810 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_2 |
| 120811 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_3 |
| 120812 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_4 |
| 120813 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_5 |
| 120814 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_6 |
| 120815 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_7 |
| 120816 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubb |
| 120817 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubd0 |
| 120818 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubd1 |
| 120819 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh0 |
| 120820 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1 |
| 120821 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubq0 |
| 120822 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubq1 |
| 120823 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs0 |
| 120824 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1 |
| 120825 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub |
| 120826 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub0 |
| 120827 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub1 |
| 120828 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub2 |
| 120829 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub3 |
| 120830 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub_hi |
| 120831 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 120832 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 120833 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 120834 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 120835 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 120836 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 120837 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 120838 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 120839 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 120840 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 120841 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 120842 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 120843 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 120844 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 120845 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 120846 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 120847 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 120848 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 120849 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 120850 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 120851 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120852 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120853 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_bsub |
| 120854 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_bsub_hi |
| 120855 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_hsub |
| 120856 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_hsub_hi |
| 120857 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_ssub |
| 120858 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_then_ssub_hi |
| 120859 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_bsub |
| 120860 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_bsub_hi |
| 120861 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_hsub |
| 120862 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_hsub_hi |
| 120863 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_ssub |
| 120864 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub3_then_ssub_hi |
| 120865 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_bsub |
| 120866 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_bsub_hi |
| 120867 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_hsub |
| 120868 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_hsub_hi |
| 120869 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_ssub |
| 120870 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_then_ssub_hi |
| 120871 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:psub1_then_psub |
| 120872 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub1_then_dsub_hi |
| 120873 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub3_then_dsub_hi |
| 120874 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub2_then_dsub_hi |
| 120875 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_7_then_sub_32 |
| 120876 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 120877 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_6_then_sub_32 |
| 120878 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 120879 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_5_then_sub_32 |
| 120880 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 120881 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_4_then_sub_32 |
| 120882 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 120883 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_3_then_sub_32 |
| 120884 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 120885 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_2_then_sub_32 |
| 120886 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 120887 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_1_then_sub_32 |
| 120888 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 120889 | 43, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:subo64_then_sub_32 -> GPR32common |
| 120890 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:subo64_then_sub_32_hi |
| 120891 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub1_then_zsub_hi |
| 120892 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub3_then_zsub_hi |
| 120893 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub2_then_zsub_hi |
| 120894 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub0_dsub1 |
| 120895 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 120896 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_dsub2 |
| 120897 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 120898 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub2_dsub3 |
| 120899 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub_dsub1 |
| 120900 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 120901 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 120902 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub0_qsub1 |
| 120903 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 120904 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub1_qsub2 |
| 120905 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 120906 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:qsub2_qsub3 |
| 120907 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 |
| 120908 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_0_x8sub_1 |
| 120909 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_2_x8sub_3 |
| 120910 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_4_x8sub_5 |
| 120911 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_6_x8sub_7 |
| 120912 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 120913 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 120914 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 120915 | 51, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 120916 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub_qsub1 |
| 120917 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 120918 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 120919 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub0_zsub1 |
| 120920 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 120921 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub1_zsub2 |
| 120922 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 120923 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub2_zsub3 |
| 120924 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub0_zsub2 |
| 120925 | 0, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17:zsub1_zsub3 |
| 120926 | }, |
| 120927 | { // XSeqPairsClass_with_sube64_in_GPR64arg |
| 120928 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:bsub |
| 120929 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:bsub_hi |
| 120930 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub |
| 120931 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub0 |
| 120932 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1 |
| 120933 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2 |
| 120934 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3 |
| 120935 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub_hi |
| 120936 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:hsub |
| 120937 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:hsub_hi |
| 120938 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:psub |
| 120939 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:psub0 |
| 120940 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:psub1 |
| 120941 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub0 |
| 120942 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub1 |
| 120943 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub2 |
| 120944 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub3 |
| 120945 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:ssub |
| 120946 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:ssub_hi |
| 120947 | 45, // XSeqPairsClass_with_sube64_in_GPR64arg:sub_32 -> GPR32arg |
| 120948 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:sub_32_hi |
| 120949 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:sube32 |
| 120950 | 66, // XSeqPairsClass_with_sube64_in_GPR64arg:sube64 -> GPR64arg |
| 120951 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:subo32 |
| 120952 | 66, // XSeqPairsClass_with_sube64_in_GPR64arg:subo64 -> GPR64arg |
| 120953 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_0 |
| 120954 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_1 |
| 120955 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_2 |
| 120956 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_3 |
| 120957 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_4 |
| 120958 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_5 |
| 120959 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_6 |
| 120960 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_7 |
| 120961 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubb |
| 120962 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubd0 |
| 120963 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubd1 |
| 120964 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh0 |
| 120965 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1 |
| 120966 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubq0 |
| 120967 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubq1 |
| 120968 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs0 |
| 120969 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1 |
| 120970 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub |
| 120971 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub0 |
| 120972 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub1 |
| 120973 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub2 |
| 120974 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub3 |
| 120975 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub_hi |
| 120976 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubd1_then_zasubq0 |
| 120977 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubd1_then_zasubq1 |
| 120978 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubd0 |
| 120979 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubd1 |
| 120980 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubq0 |
| 120981 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubq1 |
| 120982 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 |
| 120983 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 |
| 120984 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubd0 |
| 120985 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubd1 |
| 120986 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubq0 |
| 120987 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubq1 |
| 120988 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs0 |
| 120989 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1 |
| 120990 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 |
| 120991 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 |
| 120992 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 |
| 120993 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 |
| 120994 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 |
| 120995 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 |
| 120996 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 120997 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 120998 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_bsub |
| 120999 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_bsub_hi |
| 121000 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_hsub |
| 121001 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_hsub_hi |
| 121002 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_ssub |
| 121003 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_then_ssub_hi |
| 121004 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_bsub |
| 121005 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_bsub_hi |
| 121006 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_hsub |
| 121007 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_hsub_hi |
| 121008 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_ssub |
| 121009 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub3_then_ssub_hi |
| 121010 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_bsub |
| 121011 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_bsub_hi |
| 121012 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_hsub |
| 121013 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_hsub_hi |
| 121014 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_ssub |
| 121015 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_then_ssub_hi |
| 121016 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:psub1_then_psub |
| 121017 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub1_then_dsub_hi |
| 121018 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub3_then_dsub_hi |
| 121019 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub2_then_dsub_hi |
| 121020 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_7_then_sub_32 |
| 121021 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_7_then_sub_32_hi |
| 121022 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_6_then_sub_32 |
| 121023 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_6_then_sub_32_hi |
| 121024 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_5_then_sub_32 |
| 121025 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_5_then_sub_32_hi |
| 121026 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_4_then_sub_32 |
| 121027 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_4_then_sub_32_hi |
| 121028 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_3_then_sub_32 |
| 121029 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_3_then_sub_32_hi |
| 121030 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_2_then_sub_32 |
| 121031 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_2_then_sub_32_hi |
| 121032 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_1_then_sub_32 |
| 121033 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_1_then_sub_32_hi |
| 121034 | 45, // XSeqPairsClass_with_sube64_in_GPR64arg:subo64_then_sub_32 -> GPR32arg |
| 121035 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:subo64_then_sub_32_hi |
| 121036 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub1_then_zsub_hi |
| 121037 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub3_then_zsub_hi |
| 121038 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub2_then_zsub_hi |
| 121039 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub0_dsub1 |
| 121040 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub0_dsub1_dsub2 |
| 121041 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_dsub2 |
| 121042 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub1_dsub2_dsub3 |
| 121043 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub2_dsub3 |
| 121044 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub_dsub1 |
| 121045 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub_dsub1_dsub2_dsub3 |
| 121046 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:dsub_dsub1_dsub2 |
| 121047 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub0_qsub1 |
| 121048 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub0_qsub1_qsub2 |
| 121049 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub1_qsub2 |
| 121050 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub1_qsub2_qsub3 |
| 121051 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:qsub2_qsub3 |
| 121052 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:sub_32_x8sub_1_then_sub_32 |
| 121053 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_0_x8sub_1 |
| 121054 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_2_x8sub_3 |
| 121055 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_4_x8sub_5 |
| 121056 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_6_x8sub_7 |
| 121057 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121058 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121059 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121060 | 52, // XSeqPairsClass_with_sube64_in_GPR64arg:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 121061 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub_qsub1 |
| 121062 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub_qsub1_qsub2_qsub3 |
| 121063 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub_qsub1_qsub2 |
| 121064 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub0_zsub1 |
| 121065 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub0_zsub1_zsub2 |
| 121066 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub1_zsub2 |
| 121067 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub1_zsub2_zsub3 |
| 121068 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub2_zsub3 |
| 121069 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub0_zsub2 |
| 121070 | 0, // XSeqPairsClass_with_sube64_in_GPR64arg:zsub1_zsub3 |
| 121071 | }, |
| 121072 | { // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 121073 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub |
| 121074 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub_hi |
| 121075 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub |
| 121076 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 |
| 121077 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 |
| 121078 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 |
| 121079 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 |
| 121080 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_hi |
| 121081 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub |
| 121082 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub_hi |
| 121083 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub |
| 121084 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 |
| 121085 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 |
| 121086 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 |
| 121087 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 |
| 121088 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 |
| 121089 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 |
| 121090 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub |
| 121091 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub_hi |
| 121092 | 46, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 |
| 121093 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_hi |
| 121094 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 |
| 121095 | 68, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 121096 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 |
| 121097 | 68, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 121098 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 |
| 121099 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 |
| 121100 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 |
| 121101 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 |
| 121102 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 |
| 121103 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 |
| 121104 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 |
| 121105 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 |
| 121106 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb |
| 121107 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 |
| 121108 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 |
| 121109 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 |
| 121110 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 |
| 121111 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 |
| 121112 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 |
| 121113 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 |
| 121114 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 |
| 121115 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub |
| 121116 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 |
| 121117 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 |
| 121118 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 |
| 121119 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 |
| 121120 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi |
| 121121 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 121122 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 121123 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 121124 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 121125 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 121126 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 121127 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 121128 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 121129 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 121130 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 121131 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 121132 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 121133 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 121134 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 121135 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 121136 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 121137 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 121138 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 121139 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 121140 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 121141 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121142 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121143 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 121144 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 121145 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 121146 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 121147 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 121148 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 121149 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 121150 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 121151 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 121152 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 121153 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 121154 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 121155 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 121156 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 121157 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 121158 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 121159 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 121160 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 121161 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1_then_psub |
| 121162 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 121163 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 121164 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 121165 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 |
| 121166 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 121167 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 |
| 121168 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 121169 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 |
| 121170 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 121171 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 |
| 121172 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 121173 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 |
| 121174 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 121175 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 |
| 121176 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 121177 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 |
| 121178 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 121179 | 46, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 121180 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 121181 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 121182 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 121183 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 121184 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 121185 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 121186 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 121187 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 121188 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 121189 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1 |
| 121190 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 121191 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 121192 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 121193 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 121194 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 121195 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 121196 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 121197 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 |
| 121198 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 |
| 121199 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 |
| 121200 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 |
| 121201 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 |
| 121202 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121203 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121204 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121205 | 53, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 121206 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1 |
| 121207 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 121208 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 121209 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 121210 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 121211 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 121212 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 121213 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 121214 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 121215 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 121216 | }, |
| 121217 | { // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 121218 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 121219 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 121220 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 121221 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 121222 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 121223 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 121224 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 121225 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 121226 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 121227 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 121228 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 121229 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 121230 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 121231 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 121232 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 121233 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 121234 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 121235 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 121236 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 121237 | 47, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 |
| 121238 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 121239 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 121240 | 69, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 121241 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 121242 | 69, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 121243 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 |
| 121244 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 |
| 121245 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 |
| 121246 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 |
| 121247 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 |
| 121248 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 |
| 121249 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 |
| 121250 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 |
| 121251 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 121252 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 121253 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 121254 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 121255 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 121256 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 121257 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 121258 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 121259 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 121260 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 121261 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 121262 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 121263 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 121264 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 121265 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 121266 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 121267 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 121268 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 121269 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 121270 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 121271 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 121272 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 121273 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 121274 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 121275 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 121276 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 121277 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 121278 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 121279 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 121280 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 121281 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 121282 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 121283 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 121284 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 121285 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 121286 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121287 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121288 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 121289 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 121290 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 121291 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 121292 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 121293 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 121294 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 121295 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 121296 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 121297 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 121298 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 121299 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 121300 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 121301 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 121302 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 121303 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 121304 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 121305 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 121306 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 121307 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 121308 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 121309 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 121310 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 |
| 121311 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 121312 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 |
| 121313 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 121314 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 |
| 121315 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 121316 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 |
| 121317 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 121318 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 |
| 121319 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 121320 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 |
| 121321 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 121322 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 |
| 121323 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 121324 | 47, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 121325 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 121326 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 121327 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 121328 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 121329 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 121330 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 121331 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 121332 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 121333 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 121334 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 121335 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 121336 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 121337 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 121338 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 121339 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 121340 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 121341 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 121342 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 |
| 121343 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 |
| 121344 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 |
| 121345 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 |
| 121346 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 |
| 121347 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121348 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121349 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121350 | 54, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 121351 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 121352 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 121353 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 121354 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 121355 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 121356 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 121357 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 121358 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 121359 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 121360 | 0, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 121361 | }, |
| 121362 | { // XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 121363 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:bsub |
| 121364 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:bsub_hi |
| 121365 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub |
| 121366 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub0 |
| 121367 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1 |
| 121368 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2 |
| 121369 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3 |
| 121370 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub_hi |
| 121371 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:hsub |
| 121372 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:hsub_hi |
| 121373 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:psub |
| 121374 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:psub0 |
| 121375 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:psub1 |
| 121376 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub0 |
| 121377 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub1 |
| 121378 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub2 |
| 121379 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub3 |
| 121380 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:ssub |
| 121381 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:ssub_hi |
| 121382 | 43, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sub_32 -> GPR32common |
| 121383 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sub_32_hi |
| 121384 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sube32 |
| 121385 | 71, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sube64 -> tcGPRx16x17 |
| 121386 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:subo32 |
| 121387 | 74, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:subo64 -> tcGPRx17 |
| 121388 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_0 |
| 121389 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_1 |
| 121390 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_2 |
| 121391 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_3 |
| 121392 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_4 |
| 121393 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_5 |
| 121394 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_6 |
| 121395 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_7 |
| 121396 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubb |
| 121397 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubd0 |
| 121398 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubd1 |
| 121399 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh0 |
| 121400 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1 |
| 121401 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubq0 |
| 121402 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubq1 |
| 121403 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs0 |
| 121404 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1 |
| 121405 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub |
| 121406 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub0 |
| 121407 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub1 |
| 121408 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub2 |
| 121409 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub3 |
| 121410 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub_hi |
| 121411 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubd1_then_zasubq0 |
| 121412 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubd1_then_zasubq1 |
| 121413 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubd0 |
| 121414 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubd1 |
| 121415 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubq0 |
| 121416 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubq1 |
| 121417 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 121418 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 121419 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubd0 |
| 121420 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubd1 |
| 121421 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubq0 |
| 121422 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubq1 |
| 121423 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs0 |
| 121424 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1 |
| 121425 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 121426 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 121427 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 121428 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 121429 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 121430 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 121431 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121432 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121433 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_bsub |
| 121434 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_bsub_hi |
| 121435 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_hsub |
| 121436 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_hsub_hi |
| 121437 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_ssub |
| 121438 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_then_ssub_hi |
| 121439 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_bsub |
| 121440 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_bsub_hi |
| 121441 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_hsub |
| 121442 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_hsub_hi |
| 121443 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_ssub |
| 121444 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub3_then_ssub_hi |
| 121445 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_bsub |
| 121446 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_bsub_hi |
| 121447 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_hsub |
| 121448 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_hsub_hi |
| 121449 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_ssub |
| 121450 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_then_ssub_hi |
| 121451 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:psub1_then_psub |
| 121452 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub1_then_dsub_hi |
| 121453 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub3_then_dsub_hi |
| 121454 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub2_then_dsub_hi |
| 121455 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_7_then_sub_32 |
| 121456 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 121457 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_6_then_sub_32 |
| 121458 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 121459 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_5_then_sub_32 |
| 121460 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 121461 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_4_then_sub_32 |
| 121462 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 121463 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_3_then_sub_32 |
| 121464 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 121465 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_2_then_sub_32 |
| 121466 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 121467 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_1_then_sub_32 |
| 121468 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 121469 | 43, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:subo64_then_sub_32 -> GPR32common |
| 121470 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:subo64_then_sub_32_hi |
| 121471 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub1_then_zsub_hi |
| 121472 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub3_then_zsub_hi |
| 121473 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub2_then_zsub_hi |
| 121474 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub0_dsub1 |
| 121475 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub0_dsub1_dsub2 |
| 121476 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_dsub2 |
| 121477 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub1_dsub2_dsub3 |
| 121478 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub2_dsub3 |
| 121479 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub_dsub1 |
| 121480 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 121481 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:dsub_dsub1_dsub2 |
| 121482 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub0_qsub1 |
| 121483 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub0_qsub1_qsub2 |
| 121484 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub1_qsub2 |
| 121485 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub1_qsub2_qsub3 |
| 121486 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:qsub2_qsub3 |
| 121487 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sub_32_x8sub_1_then_sub_32 |
| 121488 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_0_x8sub_1 |
| 121489 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_2_x8sub_3 |
| 121490 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_4_x8sub_5 |
| 121491 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_6_x8sub_7 |
| 121492 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121493 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121494 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121495 | 51, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 121496 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub_qsub1 |
| 121497 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 121498 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub_qsub1_qsub2 |
| 121499 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub0_zsub1 |
| 121500 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub0_zsub1_zsub2 |
| 121501 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub1_zsub2 |
| 121502 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub1_zsub2_zsub3 |
| 121503 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub2_zsub3 |
| 121504 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub0_zsub2 |
| 121505 | 0, // XSeqPairsClass_with_sube64_in_tcGPRx16x17:zsub1_zsub3 |
| 121506 | }, |
| 121507 | { // XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 121508 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:bsub |
| 121509 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:bsub_hi |
| 121510 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub |
| 121511 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0 |
| 121512 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1 |
| 121513 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2 |
| 121514 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3 |
| 121515 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_hi |
| 121516 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:hsub |
| 121517 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:hsub_hi |
| 121518 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub |
| 121519 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub0 |
| 121520 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub1 |
| 121521 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0 |
| 121522 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1 |
| 121523 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2 |
| 121524 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3 |
| 121525 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:ssub |
| 121526 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:ssub_hi |
| 121527 | 43, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32 -> GPR32common |
| 121528 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32_hi |
| 121529 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sube32 |
| 121530 | 61, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sube64 -> GPR64common_and_GPR64noip |
| 121531 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo32 |
| 121532 | 72, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo64 -> FIXED_REGS_and_GPR64 |
| 121533 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_0 |
| 121534 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_1 |
| 121535 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2 |
| 121536 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_3 |
| 121537 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4 |
| 121538 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_5 |
| 121539 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6 |
| 121540 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_7 |
| 121541 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubb |
| 121542 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd0 |
| 121543 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1 |
| 121544 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh0 |
| 121545 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1 |
| 121546 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubq0 |
| 121547 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubq1 |
| 121548 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs0 |
| 121549 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1 |
| 121550 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub |
| 121551 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0 |
| 121552 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1 |
| 121553 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2 |
| 121554 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3 |
| 121555 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_hi |
| 121556 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1_then_zasubq0 |
| 121557 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1_then_zasubq1 |
| 121558 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd0 |
| 121559 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1 |
| 121560 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubq0 |
| 121561 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubq1 |
| 121562 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 |
| 121563 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 |
| 121564 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd0 |
| 121565 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1 |
| 121566 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubq0 |
| 121567 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubq1 |
| 121568 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs0 |
| 121569 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1 |
| 121570 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 |
| 121571 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 |
| 121572 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 |
| 121573 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 |
| 121574 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 |
| 121575 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 |
| 121576 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121577 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121578 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_bsub |
| 121579 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_bsub_hi |
| 121580 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_hsub |
| 121581 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_hsub_hi |
| 121582 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_ssub |
| 121583 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_ssub_hi |
| 121584 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_bsub |
| 121585 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_bsub_hi |
| 121586 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_hsub |
| 121587 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_hsub_hi |
| 121588 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_ssub |
| 121589 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_ssub_hi |
| 121590 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_bsub |
| 121591 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_bsub_hi |
| 121592 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_hsub |
| 121593 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_hsub_hi |
| 121594 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_ssub |
| 121595 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_ssub_hi |
| 121596 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub1_then_psub |
| 121597 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_dsub_hi |
| 121598 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3_then_dsub_hi |
| 121599 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_dsub_hi |
| 121600 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_7_then_sub_32 |
| 121601 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_7_then_sub_32_hi |
| 121602 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_then_sub_32 |
| 121603 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_then_sub_32_hi |
| 121604 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_5_then_sub_32 |
| 121605 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_5_then_sub_32_hi |
| 121606 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_then_sub_32 |
| 121607 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_then_sub_32_hi |
| 121608 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_3_then_sub_32 |
| 121609 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_3_then_sub_32_hi |
| 121610 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_then_sub_32 |
| 121611 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_then_sub_32_hi |
| 121612 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_1_then_sub_32 |
| 121613 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_1_then_sub_32_hi |
| 121614 | 43, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo64_then_sub_32 -> GPR32common |
| 121615 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo64_then_sub_32_hi |
| 121616 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_zsub_hi |
| 121617 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_zsub_hi |
| 121618 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_zsub_hi |
| 121619 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0_dsub1 |
| 121620 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0_dsub1_dsub2 |
| 121621 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_dsub2 |
| 121622 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_dsub2_dsub3 |
| 121623 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_dsub3 |
| 121624 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_dsub1 |
| 121625 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_dsub1_dsub2_dsub3 |
| 121626 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_dsub1_dsub2 |
| 121627 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0_qsub1 |
| 121628 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0_qsub1_qsub2 |
| 121629 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_qsub2 |
| 121630 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_qsub2_qsub3 |
| 121631 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_qsub3 |
| 121632 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32_x8sub_1_then_sub_32 |
| 121633 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_0_x8sub_1 |
| 121634 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_x8sub_3 |
| 121635 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_x8sub_5 |
| 121636 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_x8sub_7 |
| 121637 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121638 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121639 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121640 | 51, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 121641 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_qsub1 |
| 121642 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_qsub1_qsub2_qsub3 |
| 121643 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_qsub1_qsub2 |
| 121644 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub1 |
| 121645 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub1_zsub2 |
| 121646 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub2 |
| 121647 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub2_zsub3 |
| 121648 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_zsub3 |
| 121649 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub2 |
| 121650 | 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub3 |
| 121651 | }, |
| 121652 | { // FPR128 |
| 121653 | 7, // FPR128:bsub -> FPR8 |
| 121654 | 0, // FPR128:bsub_hi |
| 121655 | 56, // FPR128:dsub -> FPR64 |
| 121656 | 0, // FPR128:dsub0 |
| 121657 | 0, // FPR128:dsub1 |
| 121658 | 0, // FPR128:dsub2 |
| 121659 | 0, // FPR128:dsub3 |
| 121660 | 0, // FPR128:dsub_hi |
| 121661 | 8, // FPR128:hsub -> FPR16 |
| 121662 | 0, // FPR128:hsub_hi |
| 121663 | 0, // FPR128:psub |
| 121664 | 0, // FPR128:psub0 |
| 121665 | 0, // FPR128:psub1 |
| 121666 | 0, // FPR128:qsub0 |
| 121667 | 0, // FPR128:qsub1 |
| 121668 | 0, // FPR128:qsub2 |
| 121669 | 0, // FPR128:qsub3 |
| 121670 | 40, // FPR128:ssub -> FPR32 |
| 121671 | 0, // FPR128:ssub_hi |
| 121672 | 0, // FPR128:sub_32 |
| 121673 | 0, // FPR128:sub_32_hi |
| 121674 | 0, // FPR128:sube32 |
| 121675 | 0, // FPR128:sube64 |
| 121676 | 0, // FPR128:subo32 |
| 121677 | 0, // FPR128:subo64 |
| 121678 | 0, // FPR128:x8sub_0 |
| 121679 | 0, // FPR128:x8sub_1 |
| 121680 | 0, // FPR128:x8sub_2 |
| 121681 | 0, // FPR128:x8sub_3 |
| 121682 | 0, // FPR128:x8sub_4 |
| 121683 | 0, // FPR128:x8sub_5 |
| 121684 | 0, // FPR128:x8sub_6 |
| 121685 | 0, // FPR128:x8sub_7 |
| 121686 | 0, // FPR128:zasubb |
| 121687 | 0, // FPR128:zasubd0 |
| 121688 | 0, // FPR128:zasubd1 |
| 121689 | 0, // FPR128:zasubh0 |
| 121690 | 0, // FPR128:zasubh1 |
| 121691 | 0, // FPR128:zasubq0 |
| 121692 | 0, // FPR128:zasubq1 |
| 121693 | 0, // FPR128:zasubs0 |
| 121694 | 0, // FPR128:zasubs1 |
| 121695 | 0, // FPR128:zsub |
| 121696 | 0, // FPR128:zsub0 |
| 121697 | 0, // FPR128:zsub1 |
| 121698 | 0, // FPR128:zsub2 |
| 121699 | 0, // FPR128:zsub3 |
| 121700 | 0, // FPR128:zsub_hi |
| 121701 | 0, // FPR128:zasubd1_then_zasubq0 |
| 121702 | 0, // FPR128:zasubd1_then_zasubq1 |
| 121703 | 0, // FPR128:zasubs1_then_zasubd0 |
| 121704 | 0, // FPR128:zasubs1_then_zasubd1 |
| 121705 | 0, // FPR128:zasubs1_then_zasubq0 |
| 121706 | 0, // FPR128:zasubs1_then_zasubq1 |
| 121707 | 0, // FPR128:zasubs1_then_zasubd1_then_zasubq0 |
| 121708 | 0, // FPR128:zasubs1_then_zasubd1_then_zasubq1 |
| 121709 | 0, // FPR128:zasubh1_then_zasubd0 |
| 121710 | 0, // FPR128:zasubh1_then_zasubd1 |
| 121711 | 0, // FPR128:zasubh1_then_zasubq0 |
| 121712 | 0, // FPR128:zasubh1_then_zasubq1 |
| 121713 | 0, // FPR128:zasubh1_then_zasubs0 |
| 121714 | 0, // FPR128:zasubh1_then_zasubs1 |
| 121715 | 0, // FPR128:zasubh1_then_zasubd1_then_zasubq0 |
| 121716 | 0, // FPR128:zasubh1_then_zasubd1_then_zasubq1 |
| 121717 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubd0 |
| 121718 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1 |
| 121719 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubq0 |
| 121720 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubq1 |
| 121721 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121722 | 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121723 | 0, // FPR128:dsub1_then_bsub |
| 121724 | 0, // FPR128:dsub1_then_bsub_hi |
| 121725 | 0, // FPR128:dsub1_then_hsub |
| 121726 | 0, // FPR128:dsub1_then_hsub_hi |
| 121727 | 0, // FPR128:dsub1_then_ssub |
| 121728 | 0, // FPR128:dsub1_then_ssub_hi |
| 121729 | 0, // FPR128:dsub3_then_bsub |
| 121730 | 0, // FPR128:dsub3_then_bsub_hi |
| 121731 | 0, // FPR128:dsub3_then_hsub |
| 121732 | 0, // FPR128:dsub3_then_hsub_hi |
| 121733 | 0, // FPR128:dsub3_then_ssub |
| 121734 | 0, // FPR128:dsub3_then_ssub_hi |
| 121735 | 0, // FPR128:dsub2_then_bsub |
| 121736 | 0, // FPR128:dsub2_then_bsub_hi |
| 121737 | 0, // FPR128:dsub2_then_hsub |
| 121738 | 0, // FPR128:dsub2_then_hsub_hi |
| 121739 | 0, // FPR128:dsub2_then_ssub |
| 121740 | 0, // FPR128:dsub2_then_ssub_hi |
| 121741 | 0, // FPR128:psub1_then_psub |
| 121742 | 0, // FPR128:qsub1_then_dsub_hi |
| 121743 | 0, // FPR128:qsub3_then_dsub_hi |
| 121744 | 0, // FPR128:qsub2_then_dsub_hi |
| 121745 | 0, // FPR128:x8sub_7_then_sub_32 |
| 121746 | 0, // FPR128:x8sub_7_then_sub_32_hi |
| 121747 | 0, // FPR128:x8sub_6_then_sub_32 |
| 121748 | 0, // FPR128:x8sub_6_then_sub_32_hi |
| 121749 | 0, // FPR128:x8sub_5_then_sub_32 |
| 121750 | 0, // FPR128:x8sub_5_then_sub_32_hi |
| 121751 | 0, // FPR128:x8sub_4_then_sub_32 |
| 121752 | 0, // FPR128:x8sub_4_then_sub_32_hi |
| 121753 | 0, // FPR128:x8sub_3_then_sub_32 |
| 121754 | 0, // FPR128:x8sub_3_then_sub_32_hi |
| 121755 | 0, // FPR128:x8sub_2_then_sub_32 |
| 121756 | 0, // FPR128:x8sub_2_then_sub_32_hi |
| 121757 | 0, // FPR128:x8sub_1_then_sub_32 |
| 121758 | 0, // FPR128:x8sub_1_then_sub_32_hi |
| 121759 | 0, // FPR128:subo64_then_sub_32 |
| 121760 | 0, // FPR128:subo64_then_sub_32_hi |
| 121761 | 0, // FPR128:zsub1_then_zsub_hi |
| 121762 | 0, // FPR128:zsub3_then_zsub_hi |
| 121763 | 0, // FPR128:zsub2_then_zsub_hi |
| 121764 | 0, // FPR128:dsub0_dsub1 |
| 121765 | 0, // FPR128:dsub0_dsub1_dsub2 |
| 121766 | 0, // FPR128:dsub1_dsub2 |
| 121767 | 0, // FPR128:dsub1_dsub2_dsub3 |
| 121768 | 0, // FPR128:dsub2_dsub3 |
| 121769 | 0, // FPR128:dsub_dsub1 |
| 121770 | 0, // FPR128:dsub_dsub1_dsub2_dsub3 |
| 121771 | 0, // FPR128:dsub_dsub1_dsub2 |
| 121772 | 0, // FPR128:qsub0_qsub1 |
| 121773 | 0, // FPR128:qsub0_qsub1_qsub2 |
| 121774 | 0, // FPR128:qsub1_qsub2 |
| 121775 | 0, // FPR128:qsub1_qsub2_qsub3 |
| 121776 | 0, // FPR128:qsub2_qsub3 |
| 121777 | 0, // FPR128:sub_32_x8sub_1_then_sub_32 |
| 121778 | 0, // FPR128:x8sub_0_x8sub_1 |
| 121779 | 0, // FPR128:x8sub_2_x8sub_3 |
| 121780 | 0, // FPR128:x8sub_4_x8sub_5 |
| 121781 | 0, // FPR128:x8sub_6_x8sub_7 |
| 121782 | 0, // FPR128:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121783 | 0, // FPR128:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121784 | 0, // FPR128:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121785 | 0, // FPR128:sub_32_subo64_then_sub_32 |
| 121786 | 0, // FPR128:zsub_qsub1 |
| 121787 | 0, // FPR128:zsub_qsub1_qsub2_qsub3 |
| 121788 | 0, // FPR128:zsub_qsub1_qsub2 |
| 121789 | 0, // FPR128:zsub0_zsub1 |
| 121790 | 0, // FPR128:zsub0_zsub1_zsub2 |
| 121791 | 0, // FPR128:zsub1_zsub2 |
| 121792 | 0, // FPR128:zsub1_zsub2_zsub3 |
| 121793 | 0, // FPR128:zsub2_zsub3 |
| 121794 | 0, // FPR128:zsub0_zsub2 |
| 121795 | 0, // FPR128:zsub1_zsub3 |
| 121796 | }, |
| 121797 | { // ZPR |
| 121798 | 7, // ZPR:bsub -> FPR8 |
| 121799 | 0, // ZPR:bsub_hi |
| 121800 | 56, // ZPR:dsub -> FPR64 |
| 121801 | 0, // ZPR:dsub0 |
| 121802 | 0, // ZPR:dsub1 |
| 121803 | 0, // ZPR:dsub2 |
| 121804 | 0, // ZPR:dsub3 |
| 121805 | 0, // ZPR:dsub_hi |
| 121806 | 8, // ZPR:hsub -> FPR16 |
| 121807 | 0, // ZPR:hsub_hi |
| 121808 | 0, // ZPR:psub |
| 121809 | 0, // ZPR:psub0 |
| 121810 | 0, // ZPR:psub1 |
| 121811 | 0, // ZPR:qsub0 |
| 121812 | 0, // ZPR:qsub1 |
| 121813 | 0, // ZPR:qsub2 |
| 121814 | 0, // ZPR:qsub3 |
| 121815 | 40, // ZPR:ssub -> FPR32 |
| 121816 | 0, // ZPR:ssub_hi |
| 121817 | 0, // ZPR:sub_32 |
| 121818 | 0, // ZPR:sub_32_hi |
| 121819 | 0, // ZPR:sube32 |
| 121820 | 0, // ZPR:sube64 |
| 121821 | 0, // ZPR:subo32 |
| 121822 | 0, // ZPR:subo64 |
| 121823 | 0, // ZPR:x8sub_0 |
| 121824 | 0, // ZPR:x8sub_1 |
| 121825 | 0, // ZPR:x8sub_2 |
| 121826 | 0, // ZPR:x8sub_3 |
| 121827 | 0, // ZPR:x8sub_4 |
| 121828 | 0, // ZPR:x8sub_5 |
| 121829 | 0, // ZPR:x8sub_6 |
| 121830 | 0, // ZPR:x8sub_7 |
| 121831 | 0, // ZPR:zasubb |
| 121832 | 0, // ZPR:zasubd0 |
| 121833 | 0, // ZPR:zasubd1 |
| 121834 | 0, // ZPR:zasubh0 |
| 121835 | 0, // ZPR:zasubh1 |
| 121836 | 0, // ZPR:zasubq0 |
| 121837 | 0, // ZPR:zasubq1 |
| 121838 | 0, // ZPR:zasubs0 |
| 121839 | 0, // ZPR:zasubs1 |
| 121840 | 92, // ZPR:zsub -> FPR128 |
| 121841 | 0, // ZPR:zsub0 |
| 121842 | 0, // ZPR:zsub1 |
| 121843 | 0, // ZPR:zsub2 |
| 121844 | 0, // ZPR:zsub3 |
| 121845 | 0, // ZPR:zsub_hi |
| 121846 | 0, // ZPR:zasubd1_then_zasubq0 |
| 121847 | 0, // ZPR:zasubd1_then_zasubq1 |
| 121848 | 0, // ZPR:zasubs1_then_zasubd0 |
| 121849 | 0, // ZPR:zasubs1_then_zasubd1 |
| 121850 | 0, // ZPR:zasubs1_then_zasubq0 |
| 121851 | 0, // ZPR:zasubs1_then_zasubq1 |
| 121852 | 0, // ZPR:zasubs1_then_zasubd1_then_zasubq0 |
| 121853 | 0, // ZPR:zasubs1_then_zasubd1_then_zasubq1 |
| 121854 | 0, // ZPR:zasubh1_then_zasubd0 |
| 121855 | 0, // ZPR:zasubh1_then_zasubd1 |
| 121856 | 0, // ZPR:zasubh1_then_zasubq0 |
| 121857 | 0, // ZPR:zasubh1_then_zasubq1 |
| 121858 | 0, // ZPR:zasubh1_then_zasubs0 |
| 121859 | 0, // ZPR:zasubh1_then_zasubs1 |
| 121860 | 0, // ZPR:zasubh1_then_zasubd1_then_zasubq0 |
| 121861 | 0, // ZPR:zasubh1_then_zasubd1_then_zasubq1 |
| 121862 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubd0 |
| 121863 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1 |
| 121864 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubq0 |
| 121865 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubq1 |
| 121866 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 121867 | 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 121868 | 0, // ZPR:dsub1_then_bsub |
| 121869 | 0, // ZPR:dsub1_then_bsub_hi |
| 121870 | 0, // ZPR:dsub1_then_hsub |
| 121871 | 0, // ZPR:dsub1_then_hsub_hi |
| 121872 | 0, // ZPR:dsub1_then_ssub |
| 121873 | 0, // ZPR:dsub1_then_ssub_hi |
| 121874 | 0, // ZPR:dsub3_then_bsub |
| 121875 | 0, // ZPR:dsub3_then_bsub_hi |
| 121876 | 0, // ZPR:dsub3_then_hsub |
| 121877 | 0, // ZPR:dsub3_then_hsub_hi |
| 121878 | 0, // ZPR:dsub3_then_ssub |
| 121879 | 0, // ZPR:dsub3_then_ssub_hi |
| 121880 | 0, // ZPR:dsub2_then_bsub |
| 121881 | 0, // ZPR:dsub2_then_bsub_hi |
| 121882 | 0, // ZPR:dsub2_then_hsub |
| 121883 | 0, // ZPR:dsub2_then_hsub_hi |
| 121884 | 0, // ZPR:dsub2_then_ssub |
| 121885 | 0, // ZPR:dsub2_then_ssub_hi |
| 121886 | 0, // ZPR:psub1_then_psub |
| 121887 | 0, // ZPR:qsub1_then_dsub_hi |
| 121888 | 0, // ZPR:qsub3_then_dsub_hi |
| 121889 | 0, // ZPR:qsub2_then_dsub_hi |
| 121890 | 0, // ZPR:x8sub_7_then_sub_32 |
| 121891 | 0, // ZPR:x8sub_7_then_sub_32_hi |
| 121892 | 0, // ZPR:x8sub_6_then_sub_32 |
| 121893 | 0, // ZPR:x8sub_6_then_sub_32_hi |
| 121894 | 0, // ZPR:x8sub_5_then_sub_32 |
| 121895 | 0, // ZPR:x8sub_5_then_sub_32_hi |
| 121896 | 0, // ZPR:x8sub_4_then_sub_32 |
| 121897 | 0, // ZPR:x8sub_4_then_sub_32_hi |
| 121898 | 0, // ZPR:x8sub_3_then_sub_32 |
| 121899 | 0, // ZPR:x8sub_3_then_sub_32_hi |
| 121900 | 0, // ZPR:x8sub_2_then_sub_32 |
| 121901 | 0, // ZPR:x8sub_2_then_sub_32_hi |
| 121902 | 0, // ZPR:x8sub_1_then_sub_32 |
| 121903 | 0, // ZPR:x8sub_1_then_sub_32_hi |
| 121904 | 0, // ZPR:subo64_then_sub_32 |
| 121905 | 0, // ZPR:subo64_then_sub_32_hi |
| 121906 | 0, // ZPR:zsub1_then_zsub_hi |
| 121907 | 0, // ZPR:zsub3_then_zsub_hi |
| 121908 | 0, // ZPR:zsub2_then_zsub_hi |
| 121909 | 0, // ZPR:dsub0_dsub1 |
| 121910 | 0, // ZPR:dsub0_dsub1_dsub2 |
| 121911 | 0, // ZPR:dsub1_dsub2 |
| 121912 | 0, // ZPR:dsub1_dsub2_dsub3 |
| 121913 | 0, // ZPR:dsub2_dsub3 |
| 121914 | 0, // ZPR:dsub_dsub1 |
| 121915 | 0, // ZPR:dsub_dsub1_dsub2_dsub3 |
| 121916 | 0, // ZPR:dsub_dsub1_dsub2 |
| 121917 | 0, // ZPR:qsub0_qsub1 |
| 121918 | 0, // ZPR:qsub0_qsub1_qsub2 |
| 121919 | 0, // ZPR:qsub1_qsub2 |
| 121920 | 0, // ZPR:qsub1_qsub2_qsub3 |
| 121921 | 0, // ZPR:qsub2_qsub3 |
| 121922 | 0, // ZPR:sub_32_x8sub_1_then_sub_32 |
| 121923 | 0, // ZPR:x8sub_0_x8sub_1 |
| 121924 | 0, // ZPR:x8sub_2_x8sub_3 |
| 121925 | 0, // ZPR:x8sub_4_x8sub_5 |
| 121926 | 0, // ZPR:x8sub_6_x8sub_7 |
| 121927 | 0, // ZPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 121928 | 0, // ZPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 121929 | 0, // ZPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 121930 | 0, // ZPR:sub_32_subo64_then_sub_32 |
| 121931 | 0, // ZPR:zsub_qsub1 |
| 121932 | 0, // ZPR:zsub_qsub1_qsub2_qsub3 |
| 121933 | 0, // ZPR:zsub_qsub1_qsub2 |
| 121934 | 0, // ZPR:zsub0_zsub1 |
| 121935 | 0, // ZPR:zsub0_zsub1_zsub2 |
| 121936 | 0, // ZPR:zsub1_zsub2 |
| 121937 | 0, // ZPR:zsub1_zsub2_zsub3 |
| 121938 | 0, // ZPR:zsub2_zsub3 |
| 121939 | 0, // ZPR:zsub0_zsub2 |
| 121940 | 0, // ZPR:zsub1_zsub3 |
| 121941 | }, |
| 121942 | { // FPR128_lo |
| 121943 | 7, // FPR128_lo:bsub -> FPR8 |
| 121944 | 0, // FPR128_lo:bsub_hi |
| 121945 | 65, // FPR128_lo:dsub -> FPR64_lo |
| 121946 | 0, // FPR128_lo:dsub0 |
| 121947 | 0, // FPR128_lo:dsub1 |
| 121948 | 0, // FPR128_lo:dsub2 |
| 121949 | 0, // FPR128_lo:dsub3 |
| 121950 | 0, // FPR128_lo:dsub_hi |
| 121951 | 10, // FPR128_lo:hsub -> FPR16_lo |
| 121952 | 0, // FPR128_lo:hsub_hi |
| 121953 | 0, // FPR128_lo:psub |
| 121954 | 0, // FPR128_lo:psub0 |
| 121955 | 0, // FPR128_lo:psub1 |
| 121956 | 0, // FPR128_lo:qsub0 |
| 121957 | 0, // FPR128_lo:qsub1 |
| 121958 | 0, // FPR128_lo:qsub2 |
| 121959 | 0, // FPR128_lo:qsub3 |
| 121960 | 44, // FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 121961 | 0, // FPR128_lo:ssub_hi |
| 121962 | 0, // FPR128_lo:sub_32 |
| 121963 | 0, // FPR128_lo:sub_32_hi |
| 121964 | 0, // FPR128_lo:sube32 |
| 121965 | 0, // FPR128_lo:sube64 |
| 121966 | 0, // FPR128_lo:subo32 |
| 121967 | 0, // FPR128_lo:subo64 |
| 121968 | 0, // FPR128_lo:x8sub_0 |
| 121969 | 0, // FPR128_lo:x8sub_1 |
| 121970 | 0, // FPR128_lo:x8sub_2 |
| 121971 | 0, // FPR128_lo:x8sub_3 |
| 121972 | 0, // FPR128_lo:x8sub_4 |
| 121973 | 0, // FPR128_lo:x8sub_5 |
| 121974 | 0, // FPR128_lo:x8sub_6 |
| 121975 | 0, // FPR128_lo:x8sub_7 |
| 121976 | 0, // FPR128_lo:zasubb |
| 121977 | 0, // FPR128_lo:zasubd0 |
| 121978 | 0, // FPR128_lo:zasubd1 |
| 121979 | 0, // FPR128_lo:zasubh0 |
| 121980 | 0, // FPR128_lo:zasubh1 |
| 121981 | 0, // FPR128_lo:zasubq0 |
| 121982 | 0, // FPR128_lo:zasubq1 |
| 121983 | 0, // FPR128_lo:zasubs0 |
| 121984 | 0, // FPR128_lo:zasubs1 |
| 121985 | 0, // FPR128_lo:zsub |
| 121986 | 0, // FPR128_lo:zsub0 |
| 121987 | 0, // FPR128_lo:zsub1 |
| 121988 | 0, // FPR128_lo:zsub2 |
| 121989 | 0, // FPR128_lo:zsub3 |
| 121990 | 0, // FPR128_lo:zsub_hi |
| 121991 | 0, // FPR128_lo:zasubd1_then_zasubq0 |
| 121992 | 0, // FPR128_lo:zasubd1_then_zasubq1 |
| 121993 | 0, // FPR128_lo:zasubs1_then_zasubd0 |
| 121994 | 0, // FPR128_lo:zasubs1_then_zasubd1 |
| 121995 | 0, // FPR128_lo:zasubs1_then_zasubq0 |
| 121996 | 0, // FPR128_lo:zasubs1_then_zasubq1 |
| 121997 | 0, // FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 121998 | 0, // FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 121999 | 0, // FPR128_lo:zasubh1_then_zasubd0 |
| 122000 | 0, // FPR128_lo:zasubh1_then_zasubd1 |
| 122001 | 0, // FPR128_lo:zasubh1_then_zasubq0 |
| 122002 | 0, // FPR128_lo:zasubh1_then_zasubq1 |
| 122003 | 0, // FPR128_lo:zasubh1_then_zasubs0 |
| 122004 | 0, // FPR128_lo:zasubh1_then_zasubs1 |
| 122005 | 0, // FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 122006 | 0, // FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 122007 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 122008 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 122009 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 122010 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 122011 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122012 | 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122013 | 0, // FPR128_lo:dsub1_then_bsub |
| 122014 | 0, // FPR128_lo:dsub1_then_bsub_hi |
| 122015 | 0, // FPR128_lo:dsub1_then_hsub |
| 122016 | 0, // FPR128_lo:dsub1_then_hsub_hi |
| 122017 | 0, // FPR128_lo:dsub1_then_ssub |
| 122018 | 0, // FPR128_lo:dsub1_then_ssub_hi |
| 122019 | 0, // FPR128_lo:dsub3_then_bsub |
| 122020 | 0, // FPR128_lo:dsub3_then_bsub_hi |
| 122021 | 0, // FPR128_lo:dsub3_then_hsub |
| 122022 | 0, // FPR128_lo:dsub3_then_hsub_hi |
| 122023 | 0, // FPR128_lo:dsub3_then_ssub |
| 122024 | 0, // FPR128_lo:dsub3_then_ssub_hi |
| 122025 | 0, // FPR128_lo:dsub2_then_bsub |
| 122026 | 0, // FPR128_lo:dsub2_then_bsub_hi |
| 122027 | 0, // FPR128_lo:dsub2_then_hsub |
| 122028 | 0, // FPR128_lo:dsub2_then_hsub_hi |
| 122029 | 0, // FPR128_lo:dsub2_then_ssub |
| 122030 | 0, // FPR128_lo:dsub2_then_ssub_hi |
| 122031 | 0, // FPR128_lo:psub1_then_psub |
| 122032 | 0, // FPR128_lo:qsub1_then_dsub_hi |
| 122033 | 0, // FPR128_lo:qsub3_then_dsub_hi |
| 122034 | 0, // FPR128_lo:qsub2_then_dsub_hi |
| 122035 | 0, // FPR128_lo:x8sub_7_then_sub_32 |
| 122036 | 0, // FPR128_lo:x8sub_7_then_sub_32_hi |
| 122037 | 0, // FPR128_lo:x8sub_6_then_sub_32 |
| 122038 | 0, // FPR128_lo:x8sub_6_then_sub_32_hi |
| 122039 | 0, // FPR128_lo:x8sub_5_then_sub_32 |
| 122040 | 0, // FPR128_lo:x8sub_5_then_sub_32_hi |
| 122041 | 0, // FPR128_lo:x8sub_4_then_sub_32 |
| 122042 | 0, // FPR128_lo:x8sub_4_then_sub_32_hi |
| 122043 | 0, // FPR128_lo:x8sub_3_then_sub_32 |
| 122044 | 0, // FPR128_lo:x8sub_3_then_sub_32_hi |
| 122045 | 0, // FPR128_lo:x8sub_2_then_sub_32 |
| 122046 | 0, // FPR128_lo:x8sub_2_then_sub_32_hi |
| 122047 | 0, // FPR128_lo:x8sub_1_then_sub_32 |
| 122048 | 0, // FPR128_lo:x8sub_1_then_sub_32_hi |
| 122049 | 0, // FPR128_lo:subo64_then_sub_32 |
| 122050 | 0, // FPR128_lo:subo64_then_sub_32_hi |
| 122051 | 0, // FPR128_lo:zsub1_then_zsub_hi |
| 122052 | 0, // FPR128_lo:zsub3_then_zsub_hi |
| 122053 | 0, // FPR128_lo:zsub2_then_zsub_hi |
| 122054 | 0, // FPR128_lo:dsub0_dsub1 |
| 122055 | 0, // FPR128_lo:dsub0_dsub1_dsub2 |
| 122056 | 0, // FPR128_lo:dsub1_dsub2 |
| 122057 | 0, // FPR128_lo:dsub1_dsub2_dsub3 |
| 122058 | 0, // FPR128_lo:dsub2_dsub3 |
| 122059 | 0, // FPR128_lo:dsub_dsub1 |
| 122060 | 0, // FPR128_lo:dsub_dsub1_dsub2_dsub3 |
| 122061 | 0, // FPR128_lo:dsub_dsub1_dsub2 |
| 122062 | 0, // FPR128_lo:qsub0_qsub1 |
| 122063 | 0, // FPR128_lo:qsub0_qsub1_qsub2 |
| 122064 | 0, // FPR128_lo:qsub1_qsub2 |
| 122065 | 0, // FPR128_lo:qsub1_qsub2_qsub3 |
| 122066 | 0, // FPR128_lo:qsub2_qsub3 |
| 122067 | 0, // FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 122068 | 0, // FPR128_lo:x8sub_0_x8sub_1 |
| 122069 | 0, // FPR128_lo:x8sub_2_x8sub_3 |
| 122070 | 0, // FPR128_lo:x8sub_4_x8sub_5 |
| 122071 | 0, // FPR128_lo:x8sub_6_x8sub_7 |
| 122072 | 0, // FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122073 | 0, // FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122074 | 0, // FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122075 | 0, // FPR128_lo:sub_32_subo64_then_sub_32 |
| 122076 | 0, // FPR128_lo:zsub_qsub1 |
| 122077 | 0, // FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 122078 | 0, // FPR128_lo:zsub_qsub1_qsub2 |
| 122079 | 0, // FPR128_lo:zsub0_zsub1 |
| 122080 | 0, // FPR128_lo:zsub0_zsub1_zsub2 |
| 122081 | 0, // FPR128_lo:zsub1_zsub2 |
| 122082 | 0, // FPR128_lo:zsub1_zsub2_zsub3 |
| 122083 | 0, // FPR128_lo:zsub2_zsub3 |
| 122084 | 0, // FPR128_lo:zsub0_zsub2 |
| 122085 | 0, // FPR128_lo:zsub1_zsub3 |
| 122086 | }, |
| 122087 | { // MPR128 |
| 122088 | 0, // MPR128:bsub |
| 122089 | 0, // MPR128:bsub_hi |
| 122090 | 0, // MPR128:dsub |
| 122091 | 0, // MPR128:dsub0 |
| 122092 | 0, // MPR128:dsub1 |
| 122093 | 0, // MPR128:dsub2 |
| 122094 | 0, // MPR128:dsub3 |
| 122095 | 0, // MPR128:dsub_hi |
| 122096 | 0, // MPR128:hsub |
| 122097 | 0, // MPR128:hsub_hi |
| 122098 | 0, // MPR128:psub |
| 122099 | 0, // MPR128:psub0 |
| 122100 | 0, // MPR128:psub1 |
| 122101 | 0, // MPR128:qsub0 |
| 122102 | 0, // MPR128:qsub1 |
| 122103 | 0, // MPR128:qsub2 |
| 122104 | 0, // MPR128:qsub3 |
| 122105 | 0, // MPR128:ssub |
| 122106 | 0, // MPR128:ssub_hi |
| 122107 | 0, // MPR128:sub_32 |
| 122108 | 0, // MPR128:sub_32_hi |
| 122109 | 0, // MPR128:sube32 |
| 122110 | 0, // MPR128:sube64 |
| 122111 | 0, // MPR128:subo32 |
| 122112 | 0, // MPR128:subo64 |
| 122113 | 0, // MPR128:x8sub_0 |
| 122114 | 0, // MPR128:x8sub_1 |
| 122115 | 0, // MPR128:x8sub_2 |
| 122116 | 0, // MPR128:x8sub_3 |
| 122117 | 0, // MPR128:x8sub_4 |
| 122118 | 0, // MPR128:x8sub_5 |
| 122119 | 0, // MPR128:x8sub_6 |
| 122120 | 0, // MPR128:x8sub_7 |
| 122121 | 0, // MPR128:zasubb |
| 122122 | 0, // MPR128:zasubd0 |
| 122123 | 0, // MPR128:zasubd1 |
| 122124 | 0, // MPR128:zasubh0 |
| 122125 | 0, // MPR128:zasubh1 |
| 122126 | 0, // MPR128:zasubq0 |
| 122127 | 0, // MPR128:zasubq1 |
| 122128 | 0, // MPR128:zasubs0 |
| 122129 | 0, // MPR128:zasubs1 |
| 122130 | 0, // MPR128:zsub |
| 122131 | 0, // MPR128:zsub0 |
| 122132 | 0, // MPR128:zsub1 |
| 122133 | 0, // MPR128:zsub2 |
| 122134 | 0, // MPR128:zsub3 |
| 122135 | 0, // MPR128:zsub_hi |
| 122136 | 0, // MPR128:zasubd1_then_zasubq0 |
| 122137 | 0, // MPR128:zasubd1_then_zasubq1 |
| 122138 | 0, // MPR128:zasubs1_then_zasubd0 |
| 122139 | 0, // MPR128:zasubs1_then_zasubd1 |
| 122140 | 0, // MPR128:zasubs1_then_zasubq0 |
| 122141 | 0, // MPR128:zasubs1_then_zasubq1 |
| 122142 | 0, // MPR128:zasubs1_then_zasubd1_then_zasubq0 |
| 122143 | 0, // MPR128:zasubs1_then_zasubd1_then_zasubq1 |
| 122144 | 0, // MPR128:zasubh1_then_zasubd0 |
| 122145 | 0, // MPR128:zasubh1_then_zasubd1 |
| 122146 | 0, // MPR128:zasubh1_then_zasubq0 |
| 122147 | 0, // MPR128:zasubh1_then_zasubq1 |
| 122148 | 0, // MPR128:zasubh1_then_zasubs0 |
| 122149 | 0, // MPR128:zasubh1_then_zasubs1 |
| 122150 | 0, // MPR128:zasubh1_then_zasubd1_then_zasubq0 |
| 122151 | 0, // MPR128:zasubh1_then_zasubd1_then_zasubq1 |
| 122152 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubd0 |
| 122153 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1 |
| 122154 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubq0 |
| 122155 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubq1 |
| 122156 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122157 | 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122158 | 0, // MPR128:dsub1_then_bsub |
| 122159 | 0, // MPR128:dsub1_then_bsub_hi |
| 122160 | 0, // MPR128:dsub1_then_hsub |
| 122161 | 0, // MPR128:dsub1_then_hsub_hi |
| 122162 | 0, // MPR128:dsub1_then_ssub |
| 122163 | 0, // MPR128:dsub1_then_ssub_hi |
| 122164 | 0, // MPR128:dsub3_then_bsub |
| 122165 | 0, // MPR128:dsub3_then_bsub_hi |
| 122166 | 0, // MPR128:dsub3_then_hsub |
| 122167 | 0, // MPR128:dsub3_then_hsub_hi |
| 122168 | 0, // MPR128:dsub3_then_ssub |
| 122169 | 0, // MPR128:dsub3_then_ssub_hi |
| 122170 | 0, // MPR128:dsub2_then_bsub |
| 122171 | 0, // MPR128:dsub2_then_bsub_hi |
| 122172 | 0, // MPR128:dsub2_then_hsub |
| 122173 | 0, // MPR128:dsub2_then_hsub_hi |
| 122174 | 0, // MPR128:dsub2_then_ssub |
| 122175 | 0, // MPR128:dsub2_then_ssub_hi |
| 122176 | 0, // MPR128:psub1_then_psub |
| 122177 | 0, // MPR128:qsub1_then_dsub_hi |
| 122178 | 0, // MPR128:qsub3_then_dsub_hi |
| 122179 | 0, // MPR128:qsub2_then_dsub_hi |
| 122180 | 0, // MPR128:x8sub_7_then_sub_32 |
| 122181 | 0, // MPR128:x8sub_7_then_sub_32_hi |
| 122182 | 0, // MPR128:x8sub_6_then_sub_32 |
| 122183 | 0, // MPR128:x8sub_6_then_sub_32_hi |
| 122184 | 0, // MPR128:x8sub_5_then_sub_32 |
| 122185 | 0, // MPR128:x8sub_5_then_sub_32_hi |
| 122186 | 0, // MPR128:x8sub_4_then_sub_32 |
| 122187 | 0, // MPR128:x8sub_4_then_sub_32_hi |
| 122188 | 0, // MPR128:x8sub_3_then_sub_32 |
| 122189 | 0, // MPR128:x8sub_3_then_sub_32_hi |
| 122190 | 0, // MPR128:x8sub_2_then_sub_32 |
| 122191 | 0, // MPR128:x8sub_2_then_sub_32_hi |
| 122192 | 0, // MPR128:x8sub_1_then_sub_32 |
| 122193 | 0, // MPR128:x8sub_1_then_sub_32_hi |
| 122194 | 0, // MPR128:subo64_then_sub_32 |
| 122195 | 0, // MPR128:subo64_then_sub_32_hi |
| 122196 | 0, // MPR128:zsub1_then_zsub_hi |
| 122197 | 0, // MPR128:zsub3_then_zsub_hi |
| 122198 | 0, // MPR128:zsub2_then_zsub_hi |
| 122199 | 0, // MPR128:dsub0_dsub1 |
| 122200 | 0, // MPR128:dsub0_dsub1_dsub2 |
| 122201 | 0, // MPR128:dsub1_dsub2 |
| 122202 | 0, // MPR128:dsub1_dsub2_dsub3 |
| 122203 | 0, // MPR128:dsub2_dsub3 |
| 122204 | 0, // MPR128:dsub_dsub1 |
| 122205 | 0, // MPR128:dsub_dsub1_dsub2_dsub3 |
| 122206 | 0, // MPR128:dsub_dsub1_dsub2 |
| 122207 | 0, // MPR128:qsub0_qsub1 |
| 122208 | 0, // MPR128:qsub0_qsub1_qsub2 |
| 122209 | 0, // MPR128:qsub1_qsub2 |
| 122210 | 0, // MPR128:qsub1_qsub2_qsub3 |
| 122211 | 0, // MPR128:qsub2_qsub3 |
| 122212 | 0, // MPR128:sub_32_x8sub_1_then_sub_32 |
| 122213 | 0, // MPR128:x8sub_0_x8sub_1 |
| 122214 | 0, // MPR128:x8sub_2_x8sub_3 |
| 122215 | 0, // MPR128:x8sub_4_x8sub_5 |
| 122216 | 0, // MPR128:x8sub_6_x8sub_7 |
| 122217 | 0, // MPR128:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122218 | 0, // MPR128:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122219 | 0, // MPR128:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122220 | 0, // MPR128:sub_32_subo64_then_sub_32 |
| 122221 | 0, // MPR128:zsub_qsub1 |
| 122222 | 0, // MPR128:zsub_qsub1_qsub2_qsub3 |
| 122223 | 0, // MPR128:zsub_qsub1_qsub2 |
| 122224 | 0, // MPR128:zsub0_zsub1 |
| 122225 | 0, // MPR128:zsub0_zsub1_zsub2 |
| 122226 | 0, // MPR128:zsub1_zsub2 |
| 122227 | 0, // MPR128:zsub1_zsub2_zsub3 |
| 122228 | 0, // MPR128:zsub2_zsub3 |
| 122229 | 0, // MPR128:zsub0_zsub2 |
| 122230 | 0, // MPR128:zsub1_zsub3 |
| 122231 | }, |
| 122232 | { // ZPRMul2 |
| 122233 | 7, // ZPRMul2:bsub -> FPR8 |
| 122234 | 0, // ZPRMul2:bsub_hi |
| 122235 | 56, // ZPRMul2:dsub -> FPR64 |
| 122236 | 0, // ZPRMul2:dsub0 |
| 122237 | 0, // ZPRMul2:dsub1 |
| 122238 | 0, // ZPRMul2:dsub2 |
| 122239 | 0, // ZPRMul2:dsub3 |
| 122240 | 0, // ZPRMul2:dsub_hi |
| 122241 | 8, // ZPRMul2:hsub -> FPR16 |
| 122242 | 0, // ZPRMul2:hsub_hi |
| 122243 | 0, // ZPRMul2:psub |
| 122244 | 0, // ZPRMul2:psub0 |
| 122245 | 0, // ZPRMul2:psub1 |
| 122246 | 0, // ZPRMul2:qsub0 |
| 122247 | 0, // ZPRMul2:qsub1 |
| 122248 | 0, // ZPRMul2:qsub2 |
| 122249 | 0, // ZPRMul2:qsub3 |
| 122250 | 40, // ZPRMul2:ssub -> FPR32 |
| 122251 | 0, // ZPRMul2:ssub_hi |
| 122252 | 0, // ZPRMul2:sub_32 |
| 122253 | 0, // ZPRMul2:sub_32_hi |
| 122254 | 0, // ZPRMul2:sube32 |
| 122255 | 0, // ZPRMul2:sube64 |
| 122256 | 0, // ZPRMul2:subo32 |
| 122257 | 0, // ZPRMul2:subo64 |
| 122258 | 0, // ZPRMul2:x8sub_0 |
| 122259 | 0, // ZPRMul2:x8sub_1 |
| 122260 | 0, // ZPRMul2:x8sub_2 |
| 122261 | 0, // ZPRMul2:x8sub_3 |
| 122262 | 0, // ZPRMul2:x8sub_4 |
| 122263 | 0, // ZPRMul2:x8sub_5 |
| 122264 | 0, // ZPRMul2:x8sub_6 |
| 122265 | 0, // ZPRMul2:x8sub_7 |
| 122266 | 0, // ZPRMul2:zasubb |
| 122267 | 0, // ZPRMul2:zasubd0 |
| 122268 | 0, // ZPRMul2:zasubd1 |
| 122269 | 0, // ZPRMul2:zasubh0 |
| 122270 | 0, // ZPRMul2:zasubh1 |
| 122271 | 0, // ZPRMul2:zasubq0 |
| 122272 | 0, // ZPRMul2:zasubq1 |
| 122273 | 0, // ZPRMul2:zasubs0 |
| 122274 | 0, // ZPRMul2:zasubs1 |
| 122275 | 92, // ZPRMul2:zsub -> FPR128 |
| 122276 | 0, // ZPRMul2:zsub0 |
| 122277 | 0, // ZPRMul2:zsub1 |
| 122278 | 0, // ZPRMul2:zsub2 |
| 122279 | 0, // ZPRMul2:zsub3 |
| 122280 | 0, // ZPRMul2:zsub_hi |
| 122281 | 0, // ZPRMul2:zasubd1_then_zasubq0 |
| 122282 | 0, // ZPRMul2:zasubd1_then_zasubq1 |
| 122283 | 0, // ZPRMul2:zasubs1_then_zasubd0 |
| 122284 | 0, // ZPRMul2:zasubs1_then_zasubd1 |
| 122285 | 0, // ZPRMul2:zasubs1_then_zasubq0 |
| 122286 | 0, // ZPRMul2:zasubs1_then_zasubq1 |
| 122287 | 0, // ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 122288 | 0, // ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 122289 | 0, // ZPRMul2:zasubh1_then_zasubd0 |
| 122290 | 0, // ZPRMul2:zasubh1_then_zasubd1 |
| 122291 | 0, // ZPRMul2:zasubh1_then_zasubq0 |
| 122292 | 0, // ZPRMul2:zasubh1_then_zasubq1 |
| 122293 | 0, // ZPRMul2:zasubh1_then_zasubs0 |
| 122294 | 0, // ZPRMul2:zasubh1_then_zasubs1 |
| 122295 | 0, // ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 122296 | 0, // ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 122297 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 122298 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 122299 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 122300 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 122301 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122302 | 0, // ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122303 | 0, // ZPRMul2:dsub1_then_bsub |
| 122304 | 0, // ZPRMul2:dsub1_then_bsub_hi |
| 122305 | 0, // ZPRMul2:dsub1_then_hsub |
| 122306 | 0, // ZPRMul2:dsub1_then_hsub_hi |
| 122307 | 0, // ZPRMul2:dsub1_then_ssub |
| 122308 | 0, // ZPRMul2:dsub1_then_ssub_hi |
| 122309 | 0, // ZPRMul2:dsub3_then_bsub |
| 122310 | 0, // ZPRMul2:dsub3_then_bsub_hi |
| 122311 | 0, // ZPRMul2:dsub3_then_hsub |
| 122312 | 0, // ZPRMul2:dsub3_then_hsub_hi |
| 122313 | 0, // ZPRMul2:dsub3_then_ssub |
| 122314 | 0, // ZPRMul2:dsub3_then_ssub_hi |
| 122315 | 0, // ZPRMul2:dsub2_then_bsub |
| 122316 | 0, // ZPRMul2:dsub2_then_bsub_hi |
| 122317 | 0, // ZPRMul2:dsub2_then_hsub |
| 122318 | 0, // ZPRMul2:dsub2_then_hsub_hi |
| 122319 | 0, // ZPRMul2:dsub2_then_ssub |
| 122320 | 0, // ZPRMul2:dsub2_then_ssub_hi |
| 122321 | 0, // ZPRMul2:psub1_then_psub |
| 122322 | 0, // ZPRMul2:qsub1_then_dsub_hi |
| 122323 | 0, // ZPRMul2:qsub3_then_dsub_hi |
| 122324 | 0, // ZPRMul2:qsub2_then_dsub_hi |
| 122325 | 0, // ZPRMul2:x8sub_7_then_sub_32 |
| 122326 | 0, // ZPRMul2:x8sub_7_then_sub_32_hi |
| 122327 | 0, // ZPRMul2:x8sub_6_then_sub_32 |
| 122328 | 0, // ZPRMul2:x8sub_6_then_sub_32_hi |
| 122329 | 0, // ZPRMul2:x8sub_5_then_sub_32 |
| 122330 | 0, // ZPRMul2:x8sub_5_then_sub_32_hi |
| 122331 | 0, // ZPRMul2:x8sub_4_then_sub_32 |
| 122332 | 0, // ZPRMul2:x8sub_4_then_sub_32_hi |
| 122333 | 0, // ZPRMul2:x8sub_3_then_sub_32 |
| 122334 | 0, // ZPRMul2:x8sub_3_then_sub_32_hi |
| 122335 | 0, // ZPRMul2:x8sub_2_then_sub_32 |
| 122336 | 0, // ZPRMul2:x8sub_2_then_sub_32_hi |
| 122337 | 0, // ZPRMul2:x8sub_1_then_sub_32 |
| 122338 | 0, // ZPRMul2:x8sub_1_then_sub_32_hi |
| 122339 | 0, // ZPRMul2:subo64_then_sub_32 |
| 122340 | 0, // ZPRMul2:subo64_then_sub_32_hi |
| 122341 | 0, // ZPRMul2:zsub1_then_zsub_hi |
| 122342 | 0, // ZPRMul2:zsub3_then_zsub_hi |
| 122343 | 0, // ZPRMul2:zsub2_then_zsub_hi |
| 122344 | 0, // ZPRMul2:dsub0_dsub1 |
| 122345 | 0, // ZPRMul2:dsub0_dsub1_dsub2 |
| 122346 | 0, // ZPRMul2:dsub1_dsub2 |
| 122347 | 0, // ZPRMul2:dsub1_dsub2_dsub3 |
| 122348 | 0, // ZPRMul2:dsub2_dsub3 |
| 122349 | 0, // ZPRMul2:dsub_dsub1 |
| 122350 | 0, // ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 122351 | 0, // ZPRMul2:dsub_dsub1_dsub2 |
| 122352 | 0, // ZPRMul2:qsub0_qsub1 |
| 122353 | 0, // ZPRMul2:qsub0_qsub1_qsub2 |
| 122354 | 0, // ZPRMul2:qsub1_qsub2 |
| 122355 | 0, // ZPRMul2:qsub1_qsub2_qsub3 |
| 122356 | 0, // ZPRMul2:qsub2_qsub3 |
| 122357 | 0, // ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 122358 | 0, // ZPRMul2:x8sub_0_x8sub_1 |
| 122359 | 0, // ZPRMul2:x8sub_2_x8sub_3 |
| 122360 | 0, // ZPRMul2:x8sub_4_x8sub_5 |
| 122361 | 0, // ZPRMul2:x8sub_6_x8sub_7 |
| 122362 | 0, // ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122363 | 0, // ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122364 | 0, // ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122365 | 0, // ZPRMul2:sub_32_subo64_then_sub_32 |
| 122366 | 0, // ZPRMul2:zsub_qsub1 |
| 122367 | 0, // ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 122368 | 0, // ZPRMul2:zsub_qsub1_qsub2 |
| 122369 | 0, // ZPRMul2:zsub0_zsub1 |
| 122370 | 0, // ZPRMul2:zsub0_zsub1_zsub2 |
| 122371 | 0, // ZPRMul2:zsub1_zsub2 |
| 122372 | 0, // ZPRMul2:zsub1_zsub2_zsub3 |
| 122373 | 0, // ZPRMul2:zsub2_zsub3 |
| 122374 | 0, // ZPRMul2:zsub0_zsub2 |
| 122375 | 0, // ZPRMul2:zsub1_zsub3 |
| 122376 | }, |
| 122377 | { // ZPR_4b |
| 122378 | 7, // ZPR_4b:bsub -> FPR8 |
| 122379 | 0, // ZPR_4b:bsub_hi |
| 122380 | 65, // ZPR_4b:dsub -> FPR64_lo |
| 122381 | 0, // ZPR_4b:dsub0 |
| 122382 | 0, // ZPR_4b:dsub1 |
| 122383 | 0, // ZPR_4b:dsub2 |
| 122384 | 0, // ZPR_4b:dsub3 |
| 122385 | 0, // ZPR_4b:dsub_hi |
| 122386 | 10, // ZPR_4b:hsub -> FPR16_lo |
| 122387 | 0, // ZPR_4b:hsub_hi |
| 122388 | 0, // ZPR_4b:psub |
| 122389 | 0, // ZPR_4b:psub0 |
| 122390 | 0, // ZPR_4b:psub1 |
| 122391 | 0, // ZPR_4b:qsub0 |
| 122392 | 0, // ZPR_4b:qsub1 |
| 122393 | 0, // ZPR_4b:qsub2 |
| 122394 | 0, // ZPR_4b:qsub3 |
| 122395 | 44, // ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 122396 | 0, // ZPR_4b:ssub_hi |
| 122397 | 0, // ZPR_4b:sub_32 |
| 122398 | 0, // ZPR_4b:sub_32_hi |
| 122399 | 0, // ZPR_4b:sube32 |
| 122400 | 0, // ZPR_4b:sube64 |
| 122401 | 0, // ZPR_4b:subo32 |
| 122402 | 0, // ZPR_4b:subo64 |
| 122403 | 0, // ZPR_4b:x8sub_0 |
| 122404 | 0, // ZPR_4b:x8sub_1 |
| 122405 | 0, // ZPR_4b:x8sub_2 |
| 122406 | 0, // ZPR_4b:x8sub_3 |
| 122407 | 0, // ZPR_4b:x8sub_4 |
| 122408 | 0, // ZPR_4b:x8sub_5 |
| 122409 | 0, // ZPR_4b:x8sub_6 |
| 122410 | 0, // ZPR_4b:x8sub_7 |
| 122411 | 0, // ZPR_4b:zasubb |
| 122412 | 0, // ZPR_4b:zasubd0 |
| 122413 | 0, // ZPR_4b:zasubd1 |
| 122414 | 0, // ZPR_4b:zasubh0 |
| 122415 | 0, // ZPR_4b:zasubh1 |
| 122416 | 0, // ZPR_4b:zasubq0 |
| 122417 | 0, // ZPR_4b:zasubq1 |
| 122418 | 0, // ZPR_4b:zasubs0 |
| 122419 | 0, // ZPR_4b:zasubs1 |
| 122420 | 94, // ZPR_4b:zsub -> FPR128_lo |
| 122421 | 0, // ZPR_4b:zsub0 |
| 122422 | 0, // ZPR_4b:zsub1 |
| 122423 | 0, // ZPR_4b:zsub2 |
| 122424 | 0, // ZPR_4b:zsub3 |
| 122425 | 0, // ZPR_4b:zsub_hi |
| 122426 | 0, // ZPR_4b:zasubd1_then_zasubq0 |
| 122427 | 0, // ZPR_4b:zasubd1_then_zasubq1 |
| 122428 | 0, // ZPR_4b:zasubs1_then_zasubd0 |
| 122429 | 0, // ZPR_4b:zasubs1_then_zasubd1 |
| 122430 | 0, // ZPR_4b:zasubs1_then_zasubq0 |
| 122431 | 0, // ZPR_4b:zasubs1_then_zasubq1 |
| 122432 | 0, // ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 |
| 122433 | 0, // ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 |
| 122434 | 0, // ZPR_4b:zasubh1_then_zasubd0 |
| 122435 | 0, // ZPR_4b:zasubh1_then_zasubd1 |
| 122436 | 0, // ZPR_4b:zasubh1_then_zasubq0 |
| 122437 | 0, // ZPR_4b:zasubh1_then_zasubq1 |
| 122438 | 0, // ZPR_4b:zasubh1_then_zasubs0 |
| 122439 | 0, // ZPR_4b:zasubh1_then_zasubs1 |
| 122440 | 0, // ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 |
| 122441 | 0, // ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 |
| 122442 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 |
| 122443 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 |
| 122444 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 |
| 122445 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 |
| 122446 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122447 | 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122448 | 0, // ZPR_4b:dsub1_then_bsub |
| 122449 | 0, // ZPR_4b:dsub1_then_bsub_hi |
| 122450 | 0, // ZPR_4b:dsub1_then_hsub |
| 122451 | 0, // ZPR_4b:dsub1_then_hsub_hi |
| 122452 | 0, // ZPR_4b:dsub1_then_ssub |
| 122453 | 0, // ZPR_4b:dsub1_then_ssub_hi |
| 122454 | 0, // ZPR_4b:dsub3_then_bsub |
| 122455 | 0, // ZPR_4b:dsub3_then_bsub_hi |
| 122456 | 0, // ZPR_4b:dsub3_then_hsub |
| 122457 | 0, // ZPR_4b:dsub3_then_hsub_hi |
| 122458 | 0, // ZPR_4b:dsub3_then_ssub |
| 122459 | 0, // ZPR_4b:dsub3_then_ssub_hi |
| 122460 | 0, // ZPR_4b:dsub2_then_bsub |
| 122461 | 0, // ZPR_4b:dsub2_then_bsub_hi |
| 122462 | 0, // ZPR_4b:dsub2_then_hsub |
| 122463 | 0, // ZPR_4b:dsub2_then_hsub_hi |
| 122464 | 0, // ZPR_4b:dsub2_then_ssub |
| 122465 | 0, // ZPR_4b:dsub2_then_ssub_hi |
| 122466 | 0, // ZPR_4b:psub1_then_psub |
| 122467 | 0, // ZPR_4b:qsub1_then_dsub_hi |
| 122468 | 0, // ZPR_4b:qsub3_then_dsub_hi |
| 122469 | 0, // ZPR_4b:qsub2_then_dsub_hi |
| 122470 | 0, // ZPR_4b:x8sub_7_then_sub_32 |
| 122471 | 0, // ZPR_4b:x8sub_7_then_sub_32_hi |
| 122472 | 0, // ZPR_4b:x8sub_6_then_sub_32 |
| 122473 | 0, // ZPR_4b:x8sub_6_then_sub_32_hi |
| 122474 | 0, // ZPR_4b:x8sub_5_then_sub_32 |
| 122475 | 0, // ZPR_4b:x8sub_5_then_sub_32_hi |
| 122476 | 0, // ZPR_4b:x8sub_4_then_sub_32 |
| 122477 | 0, // ZPR_4b:x8sub_4_then_sub_32_hi |
| 122478 | 0, // ZPR_4b:x8sub_3_then_sub_32 |
| 122479 | 0, // ZPR_4b:x8sub_3_then_sub_32_hi |
| 122480 | 0, // ZPR_4b:x8sub_2_then_sub_32 |
| 122481 | 0, // ZPR_4b:x8sub_2_then_sub_32_hi |
| 122482 | 0, // ZPR_4b:x8sub_1_then_sub_32 |
| 122483 | 0, // ZPR_4b:x8sub_1_then_sub_32_hi |
| 122484 | 0, // ZPR_4b:subo64_then_sub_32 |
| 122485 | 0, // ZPR_4b:subo64_then_sub_32_hi |
| 122486 | 0, // ZPR_4b:zsub1_then_zsub_hi |
| 122487 | 0, // ZPR_4b:zsub3_then_zsub_hi |
| 122488 | 0, // ZPR_4b:zsub2_then_zsub_hi |
| 122489 | 0, // ZPR_4b:dsub0_dsub1 |
| 122490 | 0, // ZPR_4b:dsub0_dsub1_dsub2 |
| 122491 | 0, // ZPR_4b:dsub1_dsub2 |
| 122492 | 0, // ZPR_4b:dsub1_dsub2_dsub3 |
| 122493 | 0, // ZPR_4b:dsub2_dsub3 |
| 122494 | 0, // ZPR_4b:dsub_dsub1 |
| 122495 | 0, // ZPR_4b:dsub_dsub1_dsub2_dsub3 |
| 122496 | 0, // ZPR_4b:dsub_dsub1_dsub2 |
| 122497 | 0, // ZPR_4b:qsub0_qsub1 |
| 122498 | 0, // ZPR_4b:qsub0_qsub1_qsub2 |
| 122499 | 0, // ZPR_4b:qsub1_qsub2 |
| 122500 | 0, // ZPR_4b:qsub1_qsub2_qsub3 |
| 122501 | 0, // ZPR_4b:qsub2_qsub3 |
| 122502 | 0, // ZPR_4b:sub_32_x8sub_1_then_sub_32 |
| 122503 | 0, // ZPR_4b:x8sub_0_x8sub_1 |
| 122504 | 0, // ZPR_4b:x8sub_2_x8sub_3 |
| 122505 | 0, // ZPR_4b:x8sub_4_x8sub_5 |
| 122506 | 0, // ZPR_4b:x8sub_6_x8sub_7 |
| 122507 | 0, // ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122508 | 0, // ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122509 | 0, // ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122510 | 0, // ZPR_4b:sub_32_subo64_then_sub_32 |
| 122511 | 0, // ZPR_4b:zsub_qsub1 |
| 122512 | 0, // ZPR_4b:zsub_qsub1_qsub2_qsub3 |
| 122513 | 0, // ZPR_4b:zsub_qsub1_qsub2 |
| 122514 | 0, // ZPR_4b:zsub0_zsub1 |
| 122515 | 0, // ZPR_4b:zsub0_zsub1_zsub2 |
| 122516 | 0, // ZPR_4b:zsub1_zsub2 |
| 122517 | 0, // ZPR_4b:zsub1_zsub2_zsub3 |
| 122518 | 0, // ZPR_4b:zsub2_zsub3 |
| 122519 | 0, // ZPR_4b:zsub0_zsub2 |
| 122520 | 0, // ZPR_4b:zsub1_zsub3 |
| 122521 | }, |
| 122522 | { // FPR128_0to7 |
| 122523 | 7, // FPR128_0to7:bsub -> FPR8 |
| 122524 | 0, // FPR128_0to7:bsub_hi |
| 122525 | 65, // FPR128_0to7:dsub -> FPR64_lo |
| 122526 | 0, // FPR128_0to7:dsub0 |
| 122527 | 0, // FPR128_0to7:dsub1 |
| 122528 | 0, // FPR128_0to7:dsub2 |
| 122529 | 0, // FPR128_0to7:dsub3 |
| 122530 | 0, // FPR128_0to7:dsub_hi |
| 122531 | 10, // FPR128_0to7:hsub -> FPR16_lo |
| 122532 | 0, // FPR128_0to7:hsub_hi |
| 122533 | 0, // FPR128_0to7:psub |
| 122534 | 0, // FPR128_0to7:psub0 |
| 122535 | 0, // FPR128_0to7:psub1 |
| 122536 | 0, // FPR128_0to7:qsub0 |
| 122537 | 0, // FPR128_0to7:qsub1 |
| 122538 | 0, // FPR128_0to7:qsub2 |
| 122539 | 0, // FPR128_0to7:qsub3 |
| 122540 | 44, // FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 122541 | 0, // FPR128_0to7:ssub_hi |
| 122542 | 0, // FPR128_0to7:sub_32 |
| 122543 | 0, // FPR128_0to7:sub_32_hi |
| 122544 | 0, // FPR128_0to7:sube32 |
| 122545 | 0, // FPR128_0to7:sube64 |
| 122546 | 0, // FPR128_0to7:subo32 |
| 122547 | 0, // FPR128_0to7:subo64 |
| 122548 | 0, // FPR128_0to7:x8sub_0 |
| 122549 | 0, // FPR128_0to7:x8sub_1 |
| 122550 | 0, // FPR128_0to7:x8sub_2 |
| 122551 | 0, // FPR128_0to7:x8sub_3 |
| 122552 | 0, // FPR128_0to7:x8sub_4 |
| 122553 | 0, // FPR128_0to7:x8sub_5 |
| 122554 | 0, // FPR128_0to7:x8sub_6 |
| 122555 | 0, // FPR128_0to7:x8sub_7 |
| 122556 | 0, // FPR128_0to7:zasubb |
| 122557 | 0, // FPR128_0to7:zasubd0 |
| 122558 | 0, // FPR128_0to7:zasubd1 |
| 122559 | 0, // FPR128_0to7:zasubh0 |
| 122560 | 0, // FPR128_0to7:zasubh1 |
| 122561 | 0, // FPR128_0to7:zasubq0 |
| 122562 | 0, // FPR128_0to7:zasubq1 |
| 122563 | 0, // FPR128_0to7:zasubs0 |
| 122564 | 0, // FPR128_0to7:zasubs1 |
| 122565 | 0, // FPR128_0to7:zsub |
| 122566 | 0, // FPR128_0to7:zsub0 |
| 122567 | 0, // FPR128_0to7:zsub1 |
| 122568 | 0, // FPR128_0to7:zsub2 |
| 122569 | 0, // FPR128_0to7:zsub3 |
| 122570 | 0, // FPR128_0to7:zsub_hi |
| 122571 | 0, // FPR128_0to7:zasubd1_then_zasubq0 |
| 122572 | 0, // FPR128_0to7:zasubd1_then_zasubq1 |
| 122573 | 0, // FPR128_0to7:zasubs1_then_zasubd0 |
| 122574 | 0, // FPR128_0to7:zasubs1_then_zasubd1 |
| 122575 | 0, // FPR128_0to7:zasubs1_then_zasubq0 |
| 122576 | 0, // FPR128_0to7:zasubs1_then_zasubq1 |
| 122577 | 0, // FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 122578 | 0, // FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 122579 | 0, // FPR128_0to7:zasubh1_then_zasubd0 |
| 122580 | 0, // FPR128_0to7:zasubh1_then_zasubd1 |
| 122581 | 0, // FPR128_0to7:zasubh1_then_zasubq0 |
| 122582 | 0, // FPR128_0to7:zasubh1_then_zasubq1 |
| 122583 | 0, // FPR128_0to7:zasubh1_then_zasubs0 |
| 122584 | 0, // FPR128_0to7:zasubh1_then_zasubs1 |
| 122585 | 0, // FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 122586 | 0, // FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 122587 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 122588 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 122589 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 122590 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 122591 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122592 | 0, // FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122593 | 0, // FPR128_0to7:dsub1_then_bsub |
| 122594 | 0, // FPR128_0to7:dsub1_then_bsub_hi |
| 122595 | 0, // FPR128_0to7:dsub1_then_hsub |
| 122596 | 0, // FPR128_0to7:dsub1_then_hsub_hi |
| 122597 | 0, // FPR128_0to7:dsub1_then_ssub |
| 122598 | 0, // FPR128_0to7:dsub1_then_ssub_hi |
| 122599 | 0, // FPR128_0to7:dsub3_then_bsub |
| 122600 | 0, // FPR128_0to7:dsub3_then_bsub_hi |
| 122601 | 0, // FPR128_0to7:dsub3_then_hsub |
| 122602 | 0, // FPR128_0to7:dsub3_then_hsub_hi |
| 122603 | 0, // FPR128_0to7:dsub3_then_ssub |
| 122604 | 0, // FPR128_0to7:dsub3_then_ssub_hi |
| 122605 | 0, // FPR128_0to7:dsub2_then_bsub |
| 122606 | 0, // FPR128_0to7:dsub2_then_bsub_hi |
| 122607 | 0, // FPR128_0to7:dsub2_then_hsub |
| 122608 | 0, // FPR128_0to7:dsub2_then_hsub_hi |
| 122609 | 0, // FPR128_0to7:dsub2_then_ssub |
| 122610 | 0, // FPR128_0to7:dsub2_then_ssub_hi |
| 122611 | 0, // FPR128_0to7:psub1_then_psub |
| 122612 | 0, // FPR128_0to7:qsub1_then_dsub_hi |
| 122613 | 0, // FPR128_0to7:qsub3_then_dsub_hi |
| 122614 | 0, // FPR128_0to7:qsub2_then_dsub_hi |
| 122615 | 0, // FPR128_0to7:x8sub_7_then_sub_32 |
| 122616 | 0, // FPR128_0to7:x8sub_7_then_sub_32_hi |
| 122617 | 0, // FPR128_0to7:x8sub_6_then_sub_32 |
| 122618 | 0, // FPR128_0to7:x8sub_6_then_sub_32_hi |
| 122619 | 0, // FPR128_0to7:x8sub_5_then_sub_32 |
| 122620 | 0, // FPR128_0to7:x8sub_5_then_sub_32_hi |
| 122621 | 0, // FPR128_0to7:x8sub_4_then_sub_32 |
| 122622 | 0, // FPR128_0to7:x8sub_4_then_sub_32_hi |
| 122623 | 0, // FPR128_0to7:x8sub_3_then_sub_32 |
| 122624 | 0, // FPR128_0to7:x8sub_3_then_sub_32_hi |
| 122625 | 0, // FPR128_0to7:x8sub_2_then_sub_32 |
| 122626 | 0, // FPR128_0to7:x8sub_2_then_sub_32_hi |
| 122627 | 0, // FPR128_0to7:x8sub_1_then_sub_32 |
| 122628 | 0, // FPR128_0to7:x8sub_1_then_sub_32_hi |
| 122629 | 0, // FPR128_0to7:subo64_then_sub_32 |
| 122630 | 0, // FPR128_0to7:subo64_then_sub_32_hi |
| 122631 | 0, // FPR128_0to7:zsub1_then_zsub_hi |
| 122632 | 0, // FPR128_0to7:zsub3_then_zsub_hi |
| 122633 | 0, // FPR128_0to7:zsub2_then_zsub_hi |
| 122634 | 0, // FPR128_0to7:dsub0_dsub1 |
| 122635 | 0, // FPR128_0to7:dsub0_dsub1_dsub2 |
| 122636 | 0, // FPR128_0to7:dsub1_dsub2 |
| 122637 | 0, // FPR128_0to7:dsub1_dsub2_dsub3 |
| 122638 | 0, // FPR128_0to7:dsub2_dsub3 |
| 122639 | 0, // FPR128_0to7:dsub_dsub1 |
| 122640 | 0, // FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 122641 | 0, // FPR128_0to7:dsub_dsub1_dsub2 |
| 122642 | 0, // FPR128_0to7:qsub0_qsub1 |
| 122643 | 0, // FPR128_0to7:qsub0_qsub1_qsub2 |
| 122644 | 0, // FPR128_0to7:qsub1_qsub2 |
| 122645 | 0, // FPR128_0to7:qsub1_qsub2_qsub3 |
| 122646 | 0, // FPR128_0to7:qsub2_qsub3 |
| 122647 | 0, // FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 122648 | 0, // FPR128_0to7:x8sub_0_x8sub_1 |
| 122649 | 0, // FPR128_0to7:x8sub_2_x8sub_3 |
| 122650 | 0, // FPR128_0to7:x8sub_4_x8sub_5 |
| 122651 | 0, // FPR128_0to7:x8sub_6_x8sub_7 |
| 122652 | 0, // FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122653 | 0, // FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122654 | 0, // FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122655 | 0, // FPR128_0to7:sub_32_subo64_then_sub_32 |
| 122656 | 0, // FPR128_0to7:zsub_qsub1 |
| 122657 | 0, // FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 122658 | 0, // FPR128_0to7:zsub_qsub1_qsub2 |
| 122659 | 0, // FPR128_0to7:zsub0_zsub1 |
| 122660 | 0, // FPR128_0to7:zsub0_zsub1_zsub2 |
| 122661 | 0, // FPR128_0to7:zsub1_zsub2 |
| 122662 | 0, // FPR128_0to7:zsub1_zsub2_zsub3 |
| 122663 | 0, // FPR128_0to7:zsub2_zsub3 |
| 122664 | 0, // FPR128_0to7:zsub0_zsub2 |
| 122665 | 0, // FPR128_0to7:zsub1_zsub3 |
| 122666 | }, |
| 122667 | { // ZPRMul2_Hi |
| 122668 | 7, // ZPRMul2_Hi:bsub -> FPR8 |
| 122669 | 0, // ZPRMul2_Hi:bsub_hi |
| 122670 | 56, // ZPRMul2_Hi:dsub -> FPR64 |
| 122671 | 0, // ZPRMul2_Hi:dsub0 |
| 122672 | 0, // ZPRMul2_Hi:dsub1 |
| 122673 | 0, // ZPRMul2_Hi:dsub2 |
| 122674 | 0, // ZPRMul2_Hi:dsub3 |
| 122675 | 0, // ZPRMul2_Hi:dsub_hi |
| 122676 | 8, // ZPRMul2_Hi:hsub -> FPR16 |
| 122677 | 0, // ZPRMul2_Hi:hsub_hi |
| 122678 | 0, // ZPRMul2_Hi:psub |
| 122679 | 0, // ZPRMul2_Hi:psub0 |
| 122680 | 0, // ZPRMul2_Hi:psub1 |
| 122681 | 0, // ZPRMul2_Hi:qsub0 |
| 122682 | 0, // ZPRMul2_Hi:qsub1 |
| 122683 | 0, // ZPRMul2_Hi:qsub2 |
| 122684 | 0, // ZPRMul2_Hi:qsub3 |
| 122685 | 40, // ZPRMul2_Hi:ssub -> FPR32 |
| 122686 | 0, // ZPRMul2_Hi:ssub_hi |
| 122687 | 0, // ZPRMul2_Hi:sub_32 |
| 122688 | 0, // ZPRMul2_Hi:sub_32_hi |
| 122689 | 0, // ZPRMul2_Hi:sube32 |
| 122690 | 0, // ZPRMul2_Hi:sube64 |
| 122691 | 0, // ZPRMul2_Hi:subo32 |
| 122692 | 0, // ZPRMul2_Hi:subo64 |
| 122693 | 0, // ZPRMul2_Hi:x8sub_0 |
| 122694 | 0, // ZPRMul2_Hi:x8sub_1 |
| 122695 | 0, // ZPRMul2_Hi:x8sub_2 |
| 122696 | 0, // ZPRMul2_Hi:x8sub_3 |
| 122697 | 0, // ZPRMul2_Hi:x8sub_4 |
| 122698 | 0, // ZPRMul2_Hi:x8sub_5 |
| 122699 | 0, // ZPRMul2_Hi:x8sub_6 |
| 122700 | 0, // ZPRMul2_Hi:x8sub_7 |
| 122701 | 0, // ZPRMul2_Hi:zasubb |
| 122702 | 0, // ZPRMul2_Hi:zasubd0 |
| 122703 | 0, // ZPRMul2_Hi:zasubd1 |
| 122704 | 0, // ZPRMul2_Hi:zasubh0 |
| 122705 | 0, // ZPRMul2_Hi:zasubh1 |
| 122706 | 0, // ZPRMul2_Hi:zasubq0 |
| 122707 | 0, // ZPRMul2_Hi:zasubq1 |
| 122708 | 0, // ZPRMul2_Hi:zasubs0 |
| 122709 | 0, // ZPRMul2_Hi:zasubs1 |
| 122710 | 92, // ZPRMul2_Hi:zsub -> FPR128 |
| 122711 | 0, // ZPRMul2_Hi:zsub0 |
| 122712 | 0, // ZPRMul2_Hi:zsub1 |
| 122713 | 0, // ZPRMul2_Hi:zsub2 |
| 122714 | 0, // ZPRMul2_Hi:zsub3 |
| 122715 | 0, // ZPRMul2_Hi:zsub_hi |
| 122716 | 0, // ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 122717 | 0, // ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 122718 | 0, // ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 122719 | 0, // ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 122720 | 0, // ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 122721 | 0, // ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 122722 | 0, // ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 122723 | 0, // ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 122724 | 0, // ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 122725 | 0, // ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 122726 | 0, // ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 122727 | 0, // ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 122728 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 122729 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 122730 | 0, // ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 122731 | 0, // ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 122732 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 122733 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 122734 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 122735 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 122736 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122737 | 0, // ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122738 | 0, // ZPRMul2_Hi:dsub1_then_bsub |
| 122739 | 0, // ZPRMul2_Hi:dsub1_then_bsub_hi |
| 122740 | 0, // ZPRMul2_Hi:dsub1_then_hsub |
| 122741 | 0, // ZPRMul2_Hi:dsub1_then_hsub_hi |
| 122742 | 0, // ZPRMul2_Hi:dsub1_then_ssub |
| 122743 | 0, // ZPRMul2_Hi:dsub1_then_ssub_hi |
| 122744 | 0, // ZPRMul2_Hi:dsub3_then_bsub |
| 122745 | 0, // ZPRMul2_Hi:dsub3_then_bsub_hi |
| 122746 | 0, // ZPRMul2_Hi:dsub3_then_hsub |
| 122747 | 0, // ZPRMul2_Hi:dsub3_then_hsub_hi |
| 122748 | 0, // ZPRMul2_Hi:dsub3_then_ssub |
| 122749 | 0, // ZPRMul2_Hi:dsub3_then_ssub_hi |
| 122750 | 0, // ZPRMul2_Hi:dsub2_then_bsub |
| 122751 | 0, // ZPRMul2_Hi:dsub2_then_bsub_hi |
| 122752 | 0, // ZPRMul2_Hi:dsub2_then_hsub |
| 122753 | 0, // ZPRMul2_Hi:dsub2_then_hsub_hi |
| 122754 | 0, // ZPRMul2_Hi:dsub2_then_ssub |
| 122755 | 0, // ZPRMul2_Hi:dsub2_then_ssub_hi |
| 122756 | 0, // ZPRMul2_Hi:psub1_then_psub |
| 122757 | 0, // ZPRMul2_Hi:qsub1_then_dsub_hi |
| 122758 | 0, // ZPRMul2_Hi:qsub3_then_dsub_hi |
| 122759 | 0, // ZPRMul2_Hi:qsub2_then_dsub_hi |
| 122760 | 0, // ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 122761 | 0, // ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 122762 | 0, // ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 122763 | 0, // ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 122764 | 0, // ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 122765 | 0, // ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 122766 | 0, // ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 122767 | 0, // ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 122768 | 0, // ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 122769 | 0, // ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 122770 | 0, // ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 122771 | 0, // ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 122772 | 0, // ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 122773 | 0, // ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 122774 | 0, // ZPRMul2_Hi:subo64_then_sub_32 |
| 122775 | 0, // ZPRMul2_Hi:subo64_then_sub_32_hi |
| 122776 | 0, // ZPRMul2_Hi:zsub1_then_zsub_hi |
| 122777 | 0, // ZPRMul2_Hi:zsub3_then_zsub_hi |
| 122778 | 0, // ZPRMul2_Hi:zsub2_then_zsub_hi |
| 122779 | 0, // ZPRMul2_Hi:dsub0_dsub1 |
| 122780 | 0, // ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 122781 | 0, // ZPRMul2_Hi:dsub1_dsub2 |
| 122782 | 0, // ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 122783 | 0, // ZPRMul2_Hi:dsub2_dsub3 |
| 122784 | 0, // ZPRMul2_Hi:dsub_dsub1 |
| 122785 | 0, // ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 122786 | 0, // ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 122787 | 0, // ZPRMul2_Hi:qsub0_qsub1 |
| 122788 | 0, // ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 122789 | 0, // ZPRMul2_Hi:qsub1_qsub2 |
| 122790 | 0, // ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 122791 | 0, // ZPRMul2_Hi:qsub2_qsub3 |
| 122792 | 0, // ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 122793 | 0, // ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 122794 | 0, // ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 122795 | 0, // ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 122796 | 0, // ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 122797 | 0, // ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122798 | 0, // ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122799 | 0, // ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122800 | 0, // ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 122801 | 0, // ZPRMul2_Hi:zsub_qsub1 |
| 122802 | 0, // ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 122803 | 0, // ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 122804 | 0, // ZPRMul2_Hi:zsub0_zsub1 |
| 122805 | 0, // ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 122806 | 0, // ZPRMul2_Hi:zsub1_zsub2 |
| 122807 | 0, // ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 122808 | 0, // ZPRMul2_Hi:zsub2_zsub3 |
| 122809 | 0, // ZPRMul2_Hi:zsub0_zsub2 |
| 122810 | 0, // ZPRMul2_Hi:zsub1_zsub3 |
| 122811 | }, |
| 122812 | { // ZPRMul2_Lo |
| 122813 | 7, // ZPRMul2_Lo:bsub -> FPR8 |
| 122814 | 0, // ZPRMul2_Lo:bsub_hi |
| 122815 | 65, // ZPRMul2_Lo:dsub -> FPR64_lo |
| 122816 | 0, // ZPRMul2_Lo:dsub0 |
| 122817 | 0, // ZPRMul2_Lo:dsub1 |
| 122818 | 0, // ZPRMul2_Lo:dsub2 |
| 122819 | 0, // ZPRMul2_Lo:dsub3 |
| 122820 | 0, // ZPRMul2_Lo:dsub_hi |
| 122821 | 10, // ZPRMul2_Lo:hsub -> FPR16_lo |
| 122822 | 0, // ZPRMul2_Lo:hsub_hi |
| 122823 | 0, // ZPRMul2_Lo:psub |
| 122824 | 0, // ZPRMul2_Lo:psub0 |
| 122825 | 0, // ZPRMul2_Lo:psub1 |
| 122826 | 0, // ZPRMul2_Lo:qsub0 |
| 122827 | 0, // ZPRMul2_Lo:qsub1 |
| 122828 | 0, // ZPRMul2_Lo:qsub2 |
| 122829 | 0, // ZPRMul2_Lo:qsub3 |
| 122830 | 44, // ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 122831 | 0, // ZPRMul2_Lo:ssub_hi |
| 122832 | 0, // ZPRMul2_Lo:sub_32 |
| 122833 | 0, // ZPRMul2_Lo:sub_32_hi |
| 122834 | 0, // ZPRMul2_Lo:sube32 |
| 122835 | 0, // ZPRMul2_Lo:sube64 |
| 122836 | 0, // ZPRMul2_Lo:subo32 |
| 122837 | 0, // ZPRMul2_Lo:subo64 |
| 122838 | 0, // ZPRMul2_Lo:x8sub_0 |
| 122839 | 0, // ZPRMul2_Lo:x8sub_1 |
| 122840 | 0, // ZPRMul2_Lo:x8sub_2 |
| 122841 | 0, // ZPRMul2_Lo:x8sub_3 |
| 122842 | 0, // ZPRMul2_Lo:x8sub_4 |
| 122843 | 0, // ZPRMul2_Lo:x8sub_5 |
| 122844 | 0, // ZPRMul2_Lo:x8sub_6 |
| 122845 | 0, // ZPRMul2_Lo:x8sub_7 |
| 122846 | 0, // ZPRMul2_Lo:zasubb |
| 122847 | 0, // ZPRMul2_Lo:zasubd0 |
| 122848 | 0, // ZPRMul2_Lo:zasubd1 |
| 122849 | 0, // ZPRMul2_Lo:zasubh0 |
| 122850 | 0, // ZPRMul2_Lo:zasubh1 |
| 122851 | 0, // ZPRMul2_Lo:zasubq0 |
| 122852 | 0, // ZPRMul2_Lo:zasubq1 |
| 122853 | 0, // ZPRMul2_Lo:zasubs0 |
| 122854 | 0, // ZPRMul2_Lo:zasubs1 |
| 122855 | 94, // ZPRMul2_Lo:zsub -> FPR128_lo |
| 122856 | 0, // ZPRMul2_Lo:zsub0 |
| 122857 | 0, // ZPRMul2_Lo:zsub1 |
| 122858 | 0, // ZPRMul2_Lo:zsub2 |
| 122859 | 0, // ZPRMul2_Lo:zsub3 |
| 122860 | 0, // ZPRMul2_Lo:zsub_hi |
| 122861 | 0, // ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 122862 | 0, // ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 122863 | 0, // ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 122864 | 0, // ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 122865 | 0, // ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 122866 | 0, // ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 122867 | 0, // ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 122868 | 0, // ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 122869 | 0, // ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 122870 | 0, // ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 122871 | 0, // ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 122872 | 0, // ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 122873 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 122874 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 122875 | 0, // ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 122876 | 0, // ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 122877 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 122878 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 122879 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 122880 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 122881 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 122882 | 0, // ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 122883 | 0, // ZPRMul2_Lo:dsub1_then_bsub |
| 122884 | 0, // ZPRMul2_Lo:dsub1_then_bsub_hi |
| 122885 | 0, // ZPRMul2_Lo:dsub1_then_hsub |
| 122886 | 0, // ZPRMul2_Lo:dsub1_then_hsub_hi |
| 122887 | 0, // ZPRMul2_Lo:dsub1_then_ssub |
| 122888 | 0, // ZPRMul2_Lo:dsub1_then_ssub_hi |
| 122889 | 0, // ZPRMul2_Lo:dsub3_then_bsub |
| 122890 | 0, // ZPRMul2_Lo:dsub3_then_bsub_hi |
| 122891 | 0, // ZPRMul2_Lo:dsub3_then_hsub |
| 122892 | 0, // ZPRMul2_Lo:dsub3_then_hsub_hi |
| 122893 | 0, // ZPRMul2_Lo:dsub3_then_ssub |
| 122894 | 0, // ZPRMul2_Lo:dsub3_then_ssub_hi |
| 122895 | 0, // ZPRMul2_Lo:dsub2_then_bsub |
| 122896 | 0, // ZPRMul2_Lo:dsub2_then_bsub_hi |
| 122897 | 0, // ZPRMul2_Lo:dsub2_then_hsub |
| 122898 | 0, // ZPRMul2_Lo:dsub2_then_hsub_hi |
| 122899 | 0, // ZPRMul2_Lo:dsub2_then_ssub |
| 122900 | 0, // ZPRMul2_Lo:dsub2_then_ssub_hi |
| 122901 | 0, // ZPRMul2_Lo:psub1_then_psub |
| 122902 | 0, // ZPRMul2_Lo:qsub1_then_dsub_hi |
| 122903 | 0, // ZPRMul2_Lo:qsub3_then_dsub_hi |
| 122904 | 0, // ZPRMul2_Lo:qsub2_then_dsub_hi |
| 122905 | 0, // ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 122906 | 0, // ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 122907 | 0, // ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 122908 | 0, // ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 122909 | 0, // ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 122910 | 0, // ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 122911 | 0, // ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 122912 | 0, // ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 122913 | 0, // ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 122914 | 0, // ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 122915 | 0, // ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 122916 | 0, // ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 122917 | 0, // ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 122918 | 0, // ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 122919 | 0, // ZPRMul2_Lo:subo64_then_sub_32 |
| 122920 | 0, // ZPRMul2_Lo:subo64_then_sub_32_hi |
| 122921 | 0, // ZPRMul2_Lo:zsub1_then_zsub_hi |
| 122922 | 0, // ZPRMul2_Lo:zsub3_then_zsub_hi |
| 122923 | 0, // ZPRMul2_Lo:zsub2_then_zsub_hi |
| 122924 | 0, // ZPRMul2_Lo:dsub0_dsub1 |
| 122925 | 0, // ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 122926 | 0, // ZPRMul2_Lo:dsub1_dsub2 |
| 122927 | 0, // ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 122928 | 0, // ZPRMul2_Lo:dsub2_dsub3 |
| 122929 | 0, // ZPRMul2_Lo:dsub_dsub1 |
| 122930 | 0, // ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 122931 | 0, // ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 122932 | 0, // ZPRMul2_Lo:qsub0_qsub1 |
| 122933 | 0, // ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 122934 | 0, // ZPRMul2_Lo:qsub1_qsub2 |
| 122935 | 0, // ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 122936 | 0, // ZPRMul2_Lo:qsub2_qsub3 |
| 122937 | 0, // ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 122938 | 0, // ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 122939 | 0, // ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 122940 | 0, // ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 122941 | 0, // ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 122942 | 0, // ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 122943 | 0, // ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 122944 | 0, // ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 122945 | 0, // ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 122946 | 0, // ZPRMul2_Lo:zsub_qsub1 |
| 122947 | 0, // ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 122948 | 0, // ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 122949 | 0, // ZPRMul2_Lo:zsub0_zsub1 |
| 122950 | 0, // ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 122951 | 0, // ZPRMul2_Lo:zsub1_zsub2 |
| 122952 | 0, // ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 122953 | 0, // ZPRMul2_Lo:zsub2_zsub3 |
| 122954 | 0, // ZPRMul2_Lo:zsub0_zsub2 |
| 122955 | 0, // ZPRMul2_Lo:zsub1_zsub3 |
| 122956 | }, |
| 122957 | { // ZPRMul4 |
| 122958 | 7, // ZPRMul4:bsub -> FPR8 |
| 122959 | 0, // ZPRMul4:bsub_hi |
| 122960 | 56, // ZPRMul4:dsub -> FPR64 |
| 122961 | 0, // ZPRMul4:dsub0 |
| 122962 | 0, // ZPRMul4:dsub1 |
| 122963 | 0, // ZPRMul4:dsub2 |
| 122964 | 0, // ZPRMul4:dsub3 |
| 122965 | 0, // ZPRMul4:dsub_hi |
| 122966 | 8, // ZPRMul4:hsub -> FPR16 |
| 122967 | 0, // ZPRMul4:hsub_hi |
| 122968 | 0, // ZPRMul4:psub |
| 122969 | 0, // ZPRMul4:psub0 |
| 122970 | 0, // ZPRMul4:psub1 |
| 122971 | 0, // ZPRMul4:qsub0 |
| 122972 | 0, // ZPRMul4:qsub1 |
| 122973 | 0, // ZPRMul4:qsub2 |
| 122974 | 0, // ZPRMul4:qsub3 |
| 122975 | 40, // ZPRMul4:ssub -> FPR32 |
| 122976 | 0, // ZPRMul4:ssub_hi |
| 122977 | 0, // ZPRMul4:sub_32 |
| 122978 | 0, // ZPRMul4:sub_32_hi |
| 122979 | 0, // ZPRMul4:sube32 |
| 122980 | 0, // ZPRMul4:sube64 |
| 122981 | 0, // ZPRMul4:subo32 |
| 122982 | 0, // ZPRMul4:subo64 |
| 122983 | 0, // ZPRMul4:x8sub_0 |
| 122984 | 0, // ZPRMul4:x8sub_1 |
| 122985 | 0, // ZPRMul4:x8sub_2 |
| 122986 | 0, // ZPRMul4:x8sub_3 |
| 122987 | 0, // ZPRMul4:x8sub_4 |
| 122988 | 0, // ZPRMul4:x8sub_5 |
| 122989 | 0, // ZPRMul4:x8sub_6 |
| 122990 | 0, // ZPRMul4:x8sub_7 |
| 122991 | 0, // ZPRMul4:zasubb |
| 122992 | 0, // ZPRMul4:zasubd0 |
| 122993 | 0, // ZPRMul4:zasubd1 |
| 122994 | 0, // ZPRMul4:zasubh0 |
| 122995 | 0, // ZPRMul4:zasubh1 |
| 122996 | 0, // ZPRMul4:zasubq0 |
| 122997 | 0, // ZPRMul4:zasubq1 |
| 122998 | 0, // ZPRMul4:zasubs0 |
| 122999 | 0, // ZPRMul4:zasubs1 |
| 123000 | 92, // ZPRMul4:zsub -> FPR128 |
| 123001 | 0, // ZPRMul4:zsub0 |
| 123002 | 0, // ZPRMul4:zsub1 |
| 123003 | 0, // ZPRMul4:zsub2 |
| 123004 | 0, // ZPRMul4:zsub3 |
| 123005 | 0, // ZPRMul4:zsub_hi |
| 123006 | 0, // ZPRMul4:zasubd1_then_zasubq0 |
| 123007 | 0, // ZPRMul4:zasubd1_then_zasubq1 |
| 123008 | 0, // ZPRMul4:zasubs1_then_zasubd0 |
| 123009 | 0, // ZPRMul4:zasubs1_then_zasubd1 |
| 123010 | 0, // ZPRMul4:zasubs1_then_zasubq0 |
| 123011 | 0, // ZPRMul4:zasubs1_then_zasubq1 |
| 123012 | 0, // ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 123013 | 0, // ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 123014 | 0, // ZPRMul4:zasubh1_then_zasubd0 |
| 123015 | 0, // ZPRMul4:zasubh1_then_zasubd1 |
| 123016 | 0, // ZPRMul4:zasubh1_then_zasubq0 |
| 123017 | 0, // ZPRMul4:zasubh1_then_zasubq1 |
| 123018 | 0, // ZPRMul4:zasubh1_then_zasubs0 |
| 123019 | 0, // ZPRMul4:zasubh1_then_zasubs1 |
| 123020 | 0, // ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 123021 | 0, // ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 123022 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 123023 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 123024 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 123025 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 123026 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123027 | 0, // ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123028 | 0, // ZPRMul4:dsub1_then_bsub |
| 123029 | 0, // ZPRMul4:dsub1_then_bsub_hi |
| 123030 | 0, // ZPRMul4:dsub1_then_hsub |
| 123031 | 0, // ZPRMul4:dsub1_then_hsub_hi |
| 123032 | 0, // ZPRMul4:dsub1_then_ssub |
| 123033 | 0, // ZPRMul4:dsub1_then_ssub_hi |
| 123034 | 0, // ZPRMul4:dsub3_then_bsub |
| 123035 | 0, // ZPRMul4:dsub3_then_bsub_hi |
| 123036 | 0, // ZPRMul4:dsub3_then_hsub |
| 123037 | 0, // ZPRMul4:dsub3_then_hsub_hi |
| 123038 | 0, // ZPRMul4:dsub3_then_ssub |
| 123039 | 0, // ZPRMul4:dsub3_then_ssub_hi |
| 123040 | 0, // ZPRMul4:dsub2_then_bsub |
| 123041 | 0, // ZPRMul4:dsub2_then_bsub_hi |
| 123042 | 0, // ZPRMul4:dsub2_then_hsub |
| 123043 | 0, // ZPRMul4:dsub2_then_hsub_hi |
| 123044 | 0, // ZPRMul4:dsub2_then_ssub |
| 123045 | 0, // ZPRMul4:dsub2_then_ssub_hi |
| 123046 | 0, // ZPRMul4:psub1_then_psub |
| 123047 | 0, // ZPRMul4:qsub1_then_dsub_hi |
| 123048 | 0, // ZPRMul4:qsub3_then_dsub_hi |
| 123049 | 0, // ZPRMul4:qsub2_then_dsub_hi |
| 123050 | 0, // ZPRMul4:x8sub_7_then_sub_32 |
| 123051 | 0, // ZPRMul4:x8sub_7_then_sub_32_hi |
| 123052 | 0, // ZPRMul4:x8sub_6_then_sub_32 |
| 123053 | 0, // ZPRMul4:x8sub_6_then_sub_32_hi |
| 123054 | 0, // ZPRMul4:x8sub_5_then_sub_32 |
| 123055 | 0, // ZPRMul4:x8sub_5_then_sub_32_hi |
| 123056 | 0, // ZPRMul4:x8sub_4_then_sub_32 |
| 123057 | 0, // ZPRMul4:x8sub_4_then_sub_32_hi |
| 123058 | 0, // ZPRMul4:x8sub_3_then_sub_32 |
| 123059 | 0, // ZPRMul4:x8sub_3_then_sub_32_hi |
| 123060 | 0, // ZPRMul4:x8sub_2_then_sub_32 |
| 123061 | 0, // ZPRMul4:x8sub_2_then_sub_32_hi |
| 123062 | 0, // ZPRMul4:x8sub_1_then_sub_32 |
| 123063 | 0, // ZPRMul4:x8sub_1_then_sub_32_hi |
| 123064 | 0, // ZPRMul4:subo64_then_sub_32 |
| 123065 | 0, // ZPRMul4:subo64_then_sub_32_hi |
| 123066 | 0, // ZPRMul4:zsub1_then_zsub_hi |
| 123067 | 0, // ZPRMul4:zsub3_then_zsub_hi |
| 123068 | 0, // ZPRMul4:zsub2_then_zsub_hi |
| 123069 | 0, // ZPRMul4:dsub0_dsub1 |
| 123070 | 0, // ZPRMul4:dsub0_dsub1_dsub2 |
| 123071 | 0, // ZPRMul4:dsub1_dsub2 |
| 123072 | 0, // ZPRMul4:dsub1_dsub2_dsub3 |
| 123073 | 0, // ZPRMul4:dsub2_dsub3 |
| 123074 | 0, // ZPRMul4:dsub_dsub1 |
| 123075 | 0, // ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 123076 | 0, // ZPRMul4:dsub_dsub1_dsub2 |
| 123077 | 0, // ZPRMul4:qsub0_qsub1 |
| 123078 | 0, // ZPRMul4:qsub0_qsub1_qsub2 |
| 123079 | 0, // ZPRMul4:qsub1_qsub2 |
| 123080 | 0, // ZPRMul4:qsub1_qsub2_qsub3 |
| 123081 | 0, // ZPRMul4:qsub2_qsub3 |
| 123082 | 0, // ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 123083 | 0, // ZPRMul4:x8sub_0_x8sub_1 |
| 123084 | 0, // ZPRMul4:x8sub_2_x8sub_3 |
| 123085 | 0, // ZPRMul4:x8sub_4_x8sub_5 |
| 123086 | 0, // ZPRMul4:x8sub_6_x8sub_7 |
| 123087 | 0, // ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123088 | 0, // ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123089 | 0, // ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123090 | 0, // ZPRMul4:sub_32_subo64_then_sub_32 |
| 123091 | 0, // ZPRMul4:zsub_qsub1 |
| 123092 | 0, // ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 123093 | 0, // ZPRMul4:zsub_qsub1_qsub2 |
| 123094 | 0, // ZPRMul4:zsub0_zsub1 |
| 123095 | 0, // ZPRMul4:zsub0_zsub1_zsub2 |
| 123096 | 0, // ZPRMul4:zsub1_zsub2 |
| 123097 | 0, // ZPRMul4:zsub1_zsub2_zsub3 |
| 123098 | 0, // ZPRMul4:zsub2_zsub3 |
| 123099 | 0, // ZPRMul4:zsub0_zsub2 |
| 123100 | 0, // ZPRMul4:zsub1_zsub3 |
| 123101 | }, |
| 123102 | { // ZPR_3b |
| 123103 | 7, // ZPR_3b:bsub -> FPR8 |
| 123104 | 0, // ZPR_3b:bsub_hi |
| 123105 | 65, // ZPR_3b:dsub -> FPR64_lo |
| 123106 | 0, // ZPR_3b:dsub0 |
| 123107 | 0, // ZPR_3b:dsub1 |
| 123108 | 0, // ZPR_3b:dsub2 |
| 123109 | 0, // ZPR_3b:dsub3 |
| 123110 | 0, // ZPR_3b:dsub_hi |
| 123111 | 10, // ZPR_3b:hsub -> FPR16_lo |
| 123112 | 0, // ZPR_3b:hsub_hi |
| 123113 | 0, // ZPR_3b:psub |
| 123114 | 0, // ZPR_3b:psub0 |
| 123115 | 0, // ZPR_3b:psub1 |
| 123116 | 0, // ZPR_3b:qsub0 |
| 123117 | 0, // ZPR_3b:qsub1 |
| 123118 | 0, // ZPR_3b:qsub2 |
| 123119 | 0, // ZPR_3b:qsub3 |
| 123120 | 44, // ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 123121 | 0, // ZPR_3b:ssub_hi |
| 123122 | 0, // ZPR_3b:sub_32 |
| 123123 | 0, // ZPR_3b:sub_32_hi |
| 123124 | 0, // ZPR_3b:sube32 |
| 123125 | 0, // ZPR_3b:sube64 |
| 123126 | 0, // ZPR_3b:subo32 |
| 123127 | 0, // ZPR_3b:subo64 |
| 123128 | 0, // ZPR_3b:x8sub_0 |
| 123129 | 0, // ZPR_3b:x8sub_1 |
| 123130 | 0, // ZPR_3b:x8sub_2 |
| 123131 | 0, // ZPR_3b:x8sub_3 |
| 123132 | 0, // ZPR_3b:x8sub_4 |
| 123133 | 0, // ZPR_3b:x8sub_5 |
| 123134 | 0, // ZPR_3b:x8sub_6 |
| 123135 | 0, // ZPR_3b:x8sub_7 |
| 123136 | 0, // ZPR_3b:zasubb |
| 123137 | 0, // ZPR_3b:zasubd0 |
| 123138 | 0, // ZPR_3b:zasubd1 |
| 123139 | 0, // ZPR_3b:zasubh0 |
| 123140 | 0, // ZPR_3b:zasubh1 |
| 123141 | 0, // ZPR_3b:zasubq0 |
| 123142 | 0, // ZPR_3b:zasubq1 |
| 123143 | 0, // ZPR_3b:zasubs0 |
| 123144 | 0, // ZPR_3b:zasubs1 |
| 123145 | 98, // ZPR_3b:zsub -> FPR128_0to7 |
| 123146 | 0, // ZPR_3b:zsub0 |
| 123147 | 0, // ZPR_3b:zsub1 |
| 123148 | 0, // ZPR_3b:zsub2 |
| 123149 | 0, // ZPR_3b:zsub3 |
| 123150 | 0, // ZPR_3b:zsub_hi |
| 123151 | 0, // ZPR_3b:zasubd1_then_zasubq0 |
| 123152 | 0, // ZPR_3b:zasubd1_then_zasubq1 |
| 123153 | 0, // ZPR_3b:zasubs1_then_zasubd0 |
| 123154 | 0, // ZPR_3b:zasubs1_then_zasubd1 |
| 123155 | 0, // ZPR_3b:zasubs1_then_zasubq0 |
| 123156 | 0, // ZPR_3b:zasubs1_then_zasubq1 |
| 123157 | 0, // ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 123158 | 0, // ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 123159 | 0, // ZPR_3b:zasubh1_then_zasubd0 |
| 123160 | 0, // ZPR_3b:zasubh1_then_zasubd1 |
| 123161 | 0, // ZPR_3b:zasubh1_then_zasubq0 |
| 123162 | 0, // ZPR_3b:zasubh1_then_zasubq1 |
| 123163 | 0, // ZPR_3b:zasubh1_then_zasubs0 |
| 123164 | 0, // ZPR_3b:zasubh1_then_zasubs1 |
| 123165 | 0, // ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 123166 | 0, // ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 123167 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 123168 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 123169 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 123170 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 123171 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123172 | 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123173 | 0, // ZPR_3b:dsub1_then_bsub |
| 123174 | 0, // ZPR_3b:dsub1_then_bsub_hi |
| 123175 | 0, // ZPR_3b:dsub1_then_hsub |
| 123176 | 0, // ZPR_3b:dsub1_then_hsub_hi |
| 123177 | 0, // ZPR_3b:dsub1_then_ssub |
| 123178 | 0, // ZPR_3b:dsub1_then_ssub_hi |
| 123179 | 0, // ZPR_3b:dsub3_then_bsub |
| 123180 | 0, // ZPR_3b:dsub3_then_bsub_hi |
| 123181 | 0, // ZPR_3b:dsub3_then_hsub |
| 123182 | 0, // ZPR_3b:dsub3_then_hsub_hi |
| 123183 | 0, // ZPR_3b:dsub3_then_ssub |
| 123184 | 0, // ZPR_3b:dsub3_then_ssub_hi |
| 123185 | 0, // ZPR_3b:dsub2_then_bsub |
| 123186 | 0, // ZPR_3b:dsub2_then_bsub_hi |
| 123187 | 0, // ZPR_3b:dsub2_then_hsub |
| 123188 | 0, // ZPR_3b:dsub2_then_hsub_hi |
| 123189 | 0, // ZPR_3b:dsub2_then_ssub |
| 123190 | 0, // ZPR_3b:dsub2_then_ssub_hi |
| 123191 | 0, // ZPR_3b:psub1_then_psub |
| 123192 | 0, // ZPR_3b:qsub1_then_dsub_hi |
| 123193 | 0, // ZPR_3b:qsub3_then_dsub_hi |
| 123194 | 0, // ZPR_3b:qsub2_then_dsub_hi |
| 123195 | 0, // ZPR_3b:x8sub_7_then_sub_32 |
| 123196 | 0, // ZPR_3b:x8sub_7_then_sub_32_hi |
| 123197 | 0, // ZPR_3b:x8sub_6_then_sub_32 |
| 123198 | 0, // ZPR_3b:x8sub_6_then_sub_32_hi |
| 123199 | 0, // ZPR_3b:x8sub_5_then_sub_32 |
| 123200 | 0, // ZPR_3b:x8sub_5_then_sub_32_hi |
| 123201 | 0, // ZPR_3b:x8sub_4_then_sub_32 |
| 123202 | 0, // ZPR_3b:x8sub_4_then_sub_32_hi |
| 123203 | 0, // ZPR_3b:x8sub_3_then_sub_32 |
| 123204 | 0, // ZPR_3b:x8sub_3_then_sub_32_hi |
| 123205 | 0, // ZPR_3b:x8sub_2_then_sub_32 |
| 123206 | 0, // ZPR_3b:x8sub_2_then_sub_32_hi |
| 123207 | 0, // ZPR_3b:x8sub_1_then_sub_32 |
| 123208 | 0, // ZPR_3b:x8sub_1_then_sub_32_hi |
| 123209 | 0, // ZPR_3b:subo64_then_sub_32 |
| 123210 | 0, // ZPR_3b:subo64_then_sub_32_hi |
| 123211 | 0, // ZPR_3b:zsub1_then_zsub_hi |
| 123212 | 0, // ZPR_3b:zsub3_then_zsub_hi |
| 123213 | 0, // ZPR_3b:zsub2_then_zsub_hi |
| 123214 | 0, // ZPR_3b:dsub0_dsub1 |
| 123215 | 0, // ZPR_3b:dsub0_dsub1_dsub2 |
| 123216 | 0, // ZPR_3b:dsub1_dsub2 |
| 123217 | 0, // ZPR_3b:dsub1_dsub2_dsub3 |
| 123218 | 0, // ZPR_3b:dsub2_dsub3 |
| 123219 | 0, // ZPR_3b:dsub_dsub1 |
| 123220 | 0, // ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 123221 | 0, // ZPR_3b:dsub_dsub1_dsub2 |
| 123222 | 0, // ZPR_3b:qsub0_qsub1 |
| 123223 | 0, // ZPR_3b:qsub0_qsub1_qsub2 |
| 123224 | 0, // ZPR_3b:qsub1_qsub2 |
| 123225 | 0, // ZPR_3b:qsub1_qsub2_qsub3 |
| 123226 | 0, // ZPR_3b:qsub2_qsub3 |
| 123227 | 0, // ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 123228 | 0, // ZPR_3b:x8sub_0_x8sub_1 |
| 123229 | 0, // ZPR_3b:x8sub_2_x8sub_3 |
| 123230 | 0, // ZPR_3b:x8sub_4_x8sub_5 |
| 123231 | 0, // ZPR_3b:x8sub_6_x8sub_7 |
| 123232 | 0, // ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123233 | 0, // ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123234 | 0, // ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123235 | 0, // ZPR_3b:sub_32_subo64_then_sub_32 |
| 123236 | 0, // ZPR_3b:zsub_qsub1 |
| 123237 | 0, // ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 123238 | 0, // ZPR_3b:zsub_qsub1_qsub2 |
| 123239 | 0, // ZPR_3b:zsub0_zsub1 |
| 123240 | 0, // ZPR_3b:zsub0_zsub1_zsub2 |
| 123241 | 0, // ZPR_3b:zsub1_zsub2 |
| 123242 | 0, // ZPR_3b:zsub1_zsub2_zsub3 |
| 123243 | 0, // ZPR_3b:zsub2_zsub3 |
| 123244 | 0, // ZPR_3b:zsub0_zsub2 |
| 123245 | 0, // ZPR_3b:zsub1_zsub3 |
| 123246 | }, |
| 123247 | { // ZPR_K |
| 123248 | 7, // ZPR_K:bsub -> FPR8 |
| 123249 | 0, // ZPR_K:bsub_hi |
| 123250 | 56, // ZPR_K:dsub -> FPR64 |
| 123251 | 0, // ZPR_K:dsub0 |
| 123252 | 0, // ZPR_K:dsub1 |
| 123253 | 0, // ZPR_K:dsub2 |
| 123254 | 0, // ZPR_K:dsub3 |
| 123255 | 0, // ZPR_K:dsub_hi |
| 123256 | 8, // ZPR_K:hsub -> FPR16 |
| 123257 | 0, // ZPR_K:hsub_hi |
| 123258 | 0, // ZPR_K:psub |
| 123259 | 0, // ZPR_K:psub0 |
| 123260 | 0, // ZPR_K:psub1 |
| 123261 | 0, // ZPR_K:qsub0 |
| 123262 | 0, // ZPR_K:qsub1 |
| 123263 | 0, // ZPR_K:qsub2 |
| 123264 | 0, // ZPR_K:qsub3 |
| 123265 | 40, // ZPR_K:ssub -> FPR32 |
| 123266 | 0, // ZPR_K:ssub_hi |
| 123267 | 0, // ZPR_K:sub_32 |
| 123268 | 0, // ZPR_K:sub_32_hi |
| 123269 | 0, // ZPR_K:sube32 |
| 123270 | 0, // ZPR_K:sube64 |
| 123271 | 0, // ZPR_K:subo32 |
| 123272 | 0, // ZPR_K:subo64 |
| 123273 | 0, // ZPR_K:x8sub_0 |
| 123274 | 0, // ZPR_K:x8sub_1 |
| 123275 | 0, // ZPR_K:x8sub_2 |
| 123276 | 0, // ZPR_K:x8sub_3 |
| 123277 | 0, // ZPR_K:x8sub_4 |
| 123278 | 0, // ZPR_K:x8sub_5 |
| 123279 | 0, // ZPR_K:x8sub_6 |
| 123280 | 0, // ZPR_K:x8sub_7 |
| 123281 | 0, // ZPR_K:zasubb |
| 123282 | 0, // ZPR_K:zasubd0 |
| 123283 | 0, // ZPR_K:zasubd1 |
| 123284 | 0, // ZPR_K:zasubh0 |
| 123285 | 0, // ZPR_K:zasubh1 |
| 123286 | 0, // ZPR_K:zasubq0 |
| 123287 | 0, // ZPR_K:zasubq1 |
| 123288 | 0, // ZPR_K:zasubs0 |
| 123289 | 0, // ZPR_K:zasubs1 |
| 123290 | 92, // ZPR_K:zsub -> FPR128 |
| 123291 | 0, // ZPR_K:zsub0 |
| 123292 | 0, // ZPR_K:zsub1 |
| 123293 | 0, // ZPR_K:zsub2 |
| 123294 | 0, // ZPR_K:zsub3 |
| 123295 | 0, // ZPR_K:zsub_hi |
| 123296 | 0, // ZPR_K:zasubd1_then_zasubq0 |
| 123297 | 0, // ZPR_K:zasubd1_then_zasubq1 |
| 123298 | 0, // ZPR_K:zasubs1_then_zasubd0 |
| 123299 | 0, // ZPR_K:zasubs1_then_zasubd1 |
| 123300 | 0, // ZPR_K:zasubs1_then_zasubq0 |
| 123301 | 0, // ZPR_K:zasubs1_then_zasubq1 |
| 123302 | 0, // ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 123303 | 0, // ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 123304 | 0, // ZPR_K:zasubh1_then_zasubd0 |
| 123305 | 0, // ZPR_K:zasubh1_then_zasubd1 |
| 123306 | 0, // ZPR_K:zasubh1_then_zasubq0 |
| 123307 | 0, // ZPR_K:zasubh1_then_zasubq1 |
| 123308 | 0, // ZPR_K:zasubh1_then_zasubs0 |
| 123309 | 0, // ZPR_K:zasubh1_then_zasubs1 |
| 123310 | 0, // ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 123311 | 0, // ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 123312 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 123313 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 123314 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 123315 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 123316 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123317 | 0, // ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123318 | 0, // ZPR_K:dsub1_then_bsub |
| 123319 | 0, // ZPR_K:dsub1_then_bsub_hi |
| 123320 | 0, // ZPR_K:dsub1_then_hsub |
| 123321 | 0, // ZPR_K:dsub1_then_hsub_hi |
| 123322 | 0, // ZPR_K:dsub1_then_ssub |
| 123323 | 0, // ZPR_K:dsub1_then_ssub_hi |
| 123324 | 0, // ZPR_K:dsub3_then_bsub |
| 123325 | 0, // ZPR_K:dsub3_then_bsub_hi |
| 123326 | 0, // ZPR_K:dsub3_then_hsub |
| 123327 | 0, // ZPR_K:dsub3_then_hsub_hi |
| 123328 | 0, // ZPR_K:dsub3_then_ssub |
| 123329 | 0, // ZPR_K:dsub3_then_ssub_hi |
| 123330 | 0, // ZPR_K:dsub2_then_bsub |
| 123331 | 0, // ZPR_K:dsub2_then_bsub_hi |
| 123332 | 0, // ZPR_K:dsub2_then_hsub |
| 123333 | 0, // ZPR_K:dsub2_then_hsub_hi |
| 123334 | 0, // ZPR_K:dsub2_then_ssub |
| 123335 | 0, // ZPR_K:dsub2_then_ssub_hi |
| 123336 | 0, // ZPR_K:psub1_then_psub |
| 123337 | 0, // ZPR_K:qsub1_then_dsub_hi |
| 123338 | 0, // ZPR_K:qsub3_then_dsub_hi |
| 123339 | 0, // ZPR_K:qsub2_then_dsub_hi |
| 123340 | 0, // ZPR_K:x8sub_7_then_sub_32 |
| 123341 | 0, // ZPR_K:x8sub_7_then_sub_32_hi |
| 123342 | 0, // ZPR_K:x8sub_6_then_sub_32 |
| 123343 | 0, // ZPR_K:x8sub_6_then_sub_32_hi |
| 123344 | 0, // ZPR_K:x8sub_5_then_sub_32 |
| 123345 | 0, // ZPR_K:x8sub_5_then_sub_32_hi |
| 123346 | 0, // ZPR_K:x8sub_4_then_sub_32 |
| 123347 | 0, // ZPR_K:x8sub_4_then_sub_32_hi |
| 123348 | 0, // ZPR_K:x8sub_3_then_sub_32 |
| 123349 | 0, // ZPR_K:x8sub_3_then_sub_32_hi |
| 123350 | 0, // ZPR_K:x8sub_2_then_sub_32 |
| 123351 | 0, // ZPR_K:x8sub_2_then_sub_32_hi |
| 123352 | 0, // ZPR_K:x8sub_1_then_sub_32 |
| 123353 | 0, // ZPR_K:x8sub_1_then_sub_32_hi |
| 123354 | 0, // ZPR_K:subo64_then_sub_32 |
| 123355 | 0, // ZPR_K:subo64_then_sub_32_hi |
| 123356 | 0, // ZPR_K:zsub1_then_zsub_hi |
| 123357 | 0, // ZPR_K:zsub3_then_zsub_hi |
| 123358 | 0, // ZPR_K:zsub2_then_zsub_hi |
| 123359 | 0, // ZPR_K:dsub0_dsub1 |
| 123360 | 0, // ZPR_K:dsub0_dsub1_dsub2 |
| 123361 | 0, // ZPR_K:dsub1_dsub2 |
| 123362 | 0, // ZPR_K:dsub1_dsub2_dsub3 |
| 123363 | 0, // ZPR_K:dsub2_dsub3 |
| 123364 | 0, // ZPR_K:dsub_dsub1 |
| 123365 | 0, // ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 123366 | 0, // ZPR_K:dsub_dsub1_dsub2 |
| 123367 | 0, // ZPR_K:qsub0_qsub1 |
| 123368 | 0, // ZPR_K:qsub0_qsub1_qsub2 |
| 123369 | 0, // ZPR_K:qsub1_qsub2 |
| 123370 | 0, // ZPR_K:qsub1_qsub2_qsub3 |
| 123371 | 0, // ZPR_K:qsub2_qsub3 |
| 123372 | 0, // ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 123373 | 0, // ZPR_K:x8sub_0_x8sub_1 |
| 123374 | 0, // ZPR_K:x8sub_2_x8sub_3 |
| 123375 | 0, // ZPR_K:x8sub_4_x8sub_5 |
| 123376 | 0, // ZPR_K:x8sub_6_x8sub_7 |
| 123377 | 0, // ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123378 | 0, // ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123379 | 0, // ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123380 | 0, // ZPR_K:sub_32_subo64_then_sub_32 |
| 123381 | 0, // ZPR_K:zsub_qsub1 |
| 123382 | 0, // ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 123383 | 0, // ZPR_K:zsub_qsub1_qsub2 |
| 123384 | 0, // ZPR_K:zsub0_zsub1 |
| 123385 | 0, // ZPR_K:zsub0_zsub1_zsub2 |
| 123386 | 0, // ZPR_K:zsub1_zsub2 |
| 123387 | 0, // ZPR_K:zsub1_zsub2_zsub3 |
| 123388 | 0, // ZPR_K:zsub2_zsub3 |
| 123389 | 0, // ZPR_K:zsub0_zsub2 |
| 123390 | 0, // ZPR_K:zsub1_zsub3 |
| 123391 | }, |
| 123392 | { // ZPRMul2_Hi_and_ZPRMul4 |
| 123393 | 7, // ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 123394 | 0, // ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 123395 | 56, // ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 123396 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 123397 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1 |
| 123398 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2 |
| 123399 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 123400 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 123401 | 8, // ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 123402 | 0, // ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 123403 | 0, // ZPRMul2_Hi_and_ZPRMul4:psub |
| 123404 | 0, // ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 123405 | 0, // ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 123406 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 123407 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub1 |
| 123408 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub2 |
| 123409 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 123410 | 40, // ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 123411 | 0, // ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 123412 | 0, // ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 123413 | 0, // ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 123414 | 0, // ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 123415 | 0, // ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 123416 | 0, // ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 123417 | 0, // ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 123418 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 123419 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 123420 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 123421 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 123422 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 123423 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 123424 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 123425 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 123426 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 123427 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 123428 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 123429 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 123430 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 123431 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 123432 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 123433 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 123434 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 123435 | 92, // ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 123436 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub0 |
| 123437 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub1 |
| 123438 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub2 |
| 123439 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 123440 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 123441 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 123442 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 123443 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 123444 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 123445 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 123446 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 123447 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 123448 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 123449 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 123450 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 123451 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 123452 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 123453 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 123454 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 123455 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 123456 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 123457 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 123458 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 123459 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 123460 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 123461 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123462 | 0, // ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123463 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub |
| 123464 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 123465 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub |
| 123466 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 123467 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub |
| 123468 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 123469 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 123470 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 123471 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 123472 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 123473 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 123474 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 123475 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub |
| 123476 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 123477 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub |
| 123478 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 123479 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub |
| 123480 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 123481 | 0, // ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 123482 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 123483 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 123484 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 123485 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 123486 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 123487 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 123488 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 123489 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 123490 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 123491 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 123492 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 123493 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 123494 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 123495 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 123496 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 123497 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 123498 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 123499 | 0, // ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 123500 | 0, // ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 123501 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 123502 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 123503 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 123504 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 123505 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 123506 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 123507 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 123508 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 123509 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 |
| 123510 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 123511 | 0, // ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 123512 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 123513 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 123514 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 123515 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 123516 | 0, // ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 123517 | 0, // ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 123518 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 123519 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 123520 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 123521 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 123522 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123523 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123524 | 0, // ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123525 | 0, // ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 123526 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 |
| 123527 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 123528 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 123529 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 123530 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 123531 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 123532 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 123533 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 123534 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 123535 | 0, // ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 123536 | }, |
| 123537 | { // ZPRMul2_Lo_and_ZPRMul4 |
| 123538 | 7, // ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 123539 | 0, // ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 123540 | 65, // ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 123541 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 123542 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1 |
| 123543 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2 |
| 123544 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 123545 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 123546 | 10, // ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 123547 | 0, // ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 123548 | 0, // ZPRMul2_Lo_and_ZPRMul4:psub |
| 123549 | 0, // ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 123550 | 0, // ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 123551 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 123552 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub1 |
| 123553 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub2 |
| 123554 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 123555 | 44, // ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 123556 | 0, // ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 123557 | 0, // ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 123558 | 0, // ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 123559 | 0, // ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 123560 | 0, // ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 123561 | 0, // ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 123562 | 0, // ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 123563 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 123564 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 123565 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 123566 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 123567 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 123568 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 123569 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 123570 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 123571 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 123572 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 123573 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 123574 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 123575 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 123576 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 123577 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 123578 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 123579 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 123580 | 94, // ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 123581 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub0 |
| 123582 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub1 |
| 123583 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub2 |
| 123584 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 123585 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 123586 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 123587 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 123588 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 123589 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 123590 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 123591 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 123592 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 123593 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 123594 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 123595 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 123596 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 123597 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 123598 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 123599 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 123600 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 123601 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 123602 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 123603 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 123604 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 123605 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 123606 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123607 | 0, // ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123608 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub |
| 123609 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 123610 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub |
| 123611 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 123612 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub |
| 123613 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 123614 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 123615 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 123616 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 123617 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 123618 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 123619 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 123620 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub |
| 123621 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 123622 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub |
| 123623 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 123624 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub |
| 123625 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 123626 | 0, // ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 123627 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 123628 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 123629 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 123630 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 123631 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 123632 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 123633 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 123634 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 123635 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 123636 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 123637 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 123638 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 123639 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 123640 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 123641 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 123642 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 123643 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 123644 | 0, // ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 123645 | 0, // ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 123646 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 123647 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 123648 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 123649 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 123650 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 123651 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 123652 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 123653 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 123654 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 |
| 123655 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 123656 | 0, // ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 123657 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 123658 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 123659 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 123660 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 123661 | 0, // ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 123662 | 0, // ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 123663 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 123664 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 123665 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 123666 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 123667 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123668 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123669 | 0, // ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123670 | 0, // ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 123671 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 |
| 123672 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 123673 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 123674 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 123675 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 123676 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 123677 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 123678 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 123679 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 123680 | 0, // ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 123681 | }, |
| 123682 | { // ZPRMul2_and_ZPR_3b |
| 123683 | 7, // ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 123684 | 0, // ZPRMul2_and_ZPR_3b:bsub_hi |
| 123685 | 65, // ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 123686 | 0, // ZPRMul2_and_ZPR_3b:dsub0 |
| 123687 | 0, // ZPRMul2_and_ZPR_3b:dsub1 |
| 123688 | 0, // ZPRMul2_and_ZPR_3b:dsub2 |
| 123689 | 0, // ZPRMul2_and_ZPR_3b:dsub3 |
| 123690 | 0, // ZPRMul2_and_ZPR_3b:dsub_hi |
| 123691 | 10, // ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 123692 | 0, // ZPRMul2_and_ZPR_3b:hsub_hi |
| 123693 | 0, // ZPRMul2_and_ZPR_3b:psub |
| 123694 | 0, // ZPRMul2_and_ZPR_3b:psub0 |
| 123695 | 0, // ZPRMul2_and_ZPR_3b:psub1 |
| 123696 | 0, // ZPRMul2_and_ZPR_3b:qsub0 |
| 123697 | 0, // ZPRMul2_and_ZPR_3b:qsub1 |
| 123698 | 0, // ZPRMul2_and_ZPR_3b:qsub2 |
| 123699 | 0, // ZPRMul2_and_ZPR_3b:qsub3 |
| 123700 | 44, // ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 123701 | 0, // ZPRMul2_and_ZPR_3b:ssub_hi |
| 123702 | 0, // ZPRMul2_and_ZPR_3b:sub_32 |
| 123703 | 0, // ZPRMul2_and_ZPR_3b:sub_32_hi |
| 123704 | 0, // ZPRMul2_and_ZPR_3b:sube32 |
| 123705 | 0, // ZPRMul2_and_ZPR_3b:sube64 |
| 123706 | 0, // ZPRMul2_and_ZPR_3b:subo32 |
| 123707 | 0, // ZPRMul2_and_ZPR_3b:subo64 |
| 123708 | 0, // ZPRMul2_and_ZPR_3b:x8sub_0 |
| 123709 | 0, // ZPRMul2_and_ZPR_3b:x8sub_1 |
| 123710 | 0, // ZPRMul2_and_ZPR_3b:x8sub_2 |
| 123711 | 0, // ZPRMul2_and_ZPR_3b:x8sub_3 |
| 123712 | 0, // ZPRMul2_and_ZPR_3b:x8sub_4 |
| 123713 | 0, // ZPRMul2_and_ZPR_3b:x8sub_5 |
| 123714 | 0, // ZPRMul2_and_ZPR_3b:x8sub_6 |
| 123715 | 0, // ZPRMul2_and_ZPR_3b:x8sub_7 |
| 123716 | 0, // ZPRMul2_and_ZPR_3b:zasubb |
| 123717 | 0, // ZPRMul2_and_ZPR_3b:zasubd0 |
| 123718 | 0, // ZPRMul2_and_ZPR_3b:zasubd1 |
| 123719 | 0, // ZPRMul2_and_ZPR_3b:zasubh0 |
| 123720 | 0, // ZPRMul2_and_ZPR_3b:zasubh1 |
| 123721 | 0, // ZPRMul2_and_ZPR_3b:zasubq0 |
| 123722 | 0, // ZPRMul2_and_ZPR_3b:zasubq1 |
| 123723 | 0, // ZPRMul2_and_ZPR_3b:zasubs0 |
| 123724 | 0, // ZPRMul2_and_ZPR_3b:zasubs1 |
| 123725 | 98, // ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 123726 | 0, // ZPRMul2_and_ZPR_3b:zsub0 |
| 123727 | 0, // ZPRMul2_and_ZPR_3b:zsub1 |
| 123728 | 0, // ZPRMul2_and_ZPR_3b:zsub2 |
| 123729 | 0, // ZPRMul2_and_ZPR_3b:zsub3 |
| 123730 | 0, // ZPRMul2_and_ZPR_3b:zsub_hi |
| 123731 | 0, // ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 123732 | 0, // ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 123733 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 123734 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 123735 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 123736 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 123737 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 123738 | 0, // ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 123739 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 123740 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 123741 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 123742 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 123743 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 123744 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 123745 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 123746 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 123747 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 123748 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 123749 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 123750 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 123751 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123752 | 0, // ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123753 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_bsub |
| 123754 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 123755 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_hsub |
| 123756 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 123757 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_ssub |
| 123758 | 0, // ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 123759 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 123760 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 123761 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 123762 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 123763 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 123764 | 0, // ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 123765 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_bsub |
| 123766 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 123767 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_hsub |
| 123768 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 123769 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_ssub |
| 123770 | 0, // ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 123771 | 0, // ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 123772 | 0, // ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 123773 | 0, // ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 123774 | 0, // ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 123775 | 0, // ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 123776 | 0, // ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 123777 | 0, // ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 123778 | 0, // ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 123779 | 0, // ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 123780 | 0, // ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 123781 | 0, // ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 123782 | 0, // ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 123783 | 0, // ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 123784 | 0, // ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 123785 | 0, // ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 123786 | 0, // ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 123787 | 0, // ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 123788 | 0, // ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 123789 | 0, // ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 123790 | 0, // ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 123791 | 0, // ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 123792 | 0, // ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 123793 | 0, // ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 123794 | 0, // ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 123795 | 0, // ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 123796 | 0, // ZPRMul2_and_ZPR_3b:dsub1_dsub2 |
| 123797 | 0, // ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 123798 | 0, // ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 123799 | 0, // ZPRMul2_and_ZPR_3b:dsub_dsub1 |
| 123800 | 0, // ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 123801 | 0, // ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 |
| 123802 | 0, // ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 123803 | 0, // ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 123804 | 0, // ZPRMul2_and_ZPR_3b:qsub1_qsub2 |
| 123805 | 0, // ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 123806 | 0, // ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 123807 | 0, // ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 123808 | 0, // ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 123809 | 0, // ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 123810 | 0, // ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 123811 | 0, // ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 123812 | 0, // ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123813 | 0, // ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123814 | 0, // ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123815 | 0, // ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 123816 | 0, // ZPRMul2_and_ZPR_3b:zsub_qsub1 |
| 123817 | 0, // ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 123818 | 0, // ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 |
| 123819 | 0, // ZPRMul2_and_ZPR_3b:zsub0_zsub1 |
| 123820 | 0, // ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 123821 | 0, // ZPRMul2_and_ZPR_3b:zsub1_zsub2 |
| 123822 | 0, // ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 123823 | 0, // ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 123824 | 0, // ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 123825 | 0, // ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 123826 | }, |
| 123827 | { // ZPRMul2_and_ZPR_K |
| 123828 | 7, // ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 123829 | 0, // ZPRMul2_and_ZPR_K:bsub_hi |
| 123830 | 56, // ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 123831 | 0, // ZPRMul2_and_ZPR_K:dsub0 |
| 123832 | 0, // ZPRMul2_and_ZPR_K:dsub1 |
| 123833 | 0, // ZPRMul2_and_ZPR_K:dsub2 |
| 123834 | 0, // ZPRMul2_and_ZPR_K:dsub3 |
| 123835 | 0, // ZPRMul2_and_ZPR_K:dsub_hi |
| 123836 | 8, // ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 123837 | 0, // ZPRMul2_and_ZPR_K:hsub_hi |
| 123838 | 0, // ZPRMul2_and_ZPR_K:psub |
| 123839 | 0, // ZPRMul2_and_ZPR_K:psub0 |
| 123840 | 0, // ZPRMul2_and_ZPR_K:psub1 |
| 123841 | 0, // ZPRMul2_and_ZPR_K:qsub0 |
| 123842 | 0, // ZPRMul2_and_ZPR_K:qsub1 |
| 123843 | 0, // ZPRMul2_and_ZPR_K:qsub2 |
| 123844 | 0, // ZPRMul2_and_ZPR_K:qsub3 |
| 123845 | 40, // ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 123846 | 0, // ZPRMul2_and_ZPR_K:ssub_hi |
| 123847 | 0, // ZPRMul2_and_ZPR_K:sub_32 |
| 123848 | 0, // ZPRMul2_and_ZPR_K:sub_32_hi |
| 123849 | 0, // ZPRMul2_and_ZPR_K:sube32 |
| 123850 | 0, // ZPRMul2_and_ZPR_K:sube64 |
| 123851 | 0, // ZPRMul2_and_ZPR_K:subo32 |
| 123852 | 0, // ZPRMul2_and_ZPR_K:subo64 |
| 123853 | 0, // ZPRMul2_and_ZPR_K:x8sub_0 |
| 123854 | 0, // ZPRMul2_and_ZPR_K:x8sub_1 |
| 123855 | 0, // ZPRMul2_and_ZPR_K:x8sub_2 |
| 123856 | 0, // ZPRMul2_and_ZPR_K:x8sub_3 |
| 123857 | 0, // ZPRMul2_and_ZPR_K:x8sub_4 |
| 123858 | 0, // ZPRMul2_and_ZPR_K:x8sub_5 |
| 123859 | 0, // ZPRMul2_and_ZPR_K:x8sub_6 |
| 123860 | 0, // ZPRMul2_and_ZPR_K:x8sub_7 |
| 123861 | 0, // ZPRMul2_and_ZPR_K:zasubb |
| 123862 | 0, // ZPRMul2_and_ZPR_K:zasubd0 |
| 123863 | 0, // ZPRMul2_and_ZPR_K:zasubd1 |
| 123864 | 0, // ZPRMul2_and_ZPR_K:zasubh0 |
| 123865 | 0, // ZPRMul2_and_ZPR_K:zasubh1 |
| 123866 | 0, // ZPRMul2_and_ZPR_K:zasubq0 |
| 123867 | 0, // ZPRMul2_and_ZPR_K:zasubq1 |
| 123868 | 0, // ZPRMul2_and_ZPR_K:zasubs0 |
| 123869 | 0, // ZPRMul2_and_ZPR_K:zasubs1 |
| 123870 | 92, // ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 123871 | 0, // ZPRMul2_and_ZPR_K:zsub0 |
| 123872 | 0, // ZPRMul2_and_ZPR_K:zsub1 |
| 123873 | 0, // ZPRMul2_and_ZPR_K:zsub2 |
| 123874 | 0, // ZPRMul2_and_ZPR_K:zsub3 |
| 123875 | 0, // ZPRMul2_and_ZPR_K:zsub_hi |
| 123876 | 0, // ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 123877 | 0, // ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 123878 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 123879 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 123880 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 123881 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 123882 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 123883 | 0, // ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 123884 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 123885 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 123886 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 123887 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 123888 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 123889 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 123890 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 123891 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 123892 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 123893 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 123894 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 123895 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 123896 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 123897 | 0, // ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 123898 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_bsub |
| 123899 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 123900 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_hsub |
| 123901 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 123902 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_ssub |
| 123903 | 0, // ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 123904 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 123905 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 123906 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 123907 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 123908 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 123909 | 0, // ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 123910 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_bsub |
| 123911 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 123912 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_hsub |
| 123913 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 123914 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_ssub |
| 123915 | 0, // ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 123916 | 0, // ZPRMul2_and_ZPR_K:psub1_then_psub |
| 123917 | 0, // ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 123918 | 0, // ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 123919 | 0, // ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 123920 | 0, // ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 123921 | 0, // ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 123922 | 0, // ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 123923 | 0, // ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 123924 | 0, // ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 123925 | 0, // ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 123926 | 0, // ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 123927 | 0, // ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 123928 | 0, // ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 123929 | 0, // ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 123930 | 0, // ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 123931 | 0, // ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 123932 | 0, // ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 123933 | 0, // ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 123934 | 0, // ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 123935 | 0, // ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 123936 | 0, // ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 123937 | 0, // ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 123938 | 0, // ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 123939 | 0, // ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 123940 | 0, // ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 123941 | 0, // ZPRMul2_and_ZPR_K:dsub1_dsub2 |
| 123942 | 0, // ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 123943 | 0, // ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 123944 | 0, // ZPRMul2_and_ZPR_K:dsub_dsub1 |
| 123945 | 0, // ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 123946 | 0, // ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 |
| 123947 | 0, // ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 123948 | 0, // ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 123949 | 0, // ZPRMul2_and_ZPR_K:qsub1_qsub2 |
| 123950 | 0, // ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 123951 | 0, // ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 123952 | 0, // ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 123953 | 0, // ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 123954 | 0, // ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 123955 | 0, // ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 123956 | 0, // ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 123957 | 0, // ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 123958 | 0, // ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 123959 | 0, // ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 123960 | 0, // ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 123961 | 0, // ZPRMul2_and_ZPR_K:zsub_qsub1 |
| 123962 | 0, // ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 123963 | 0, // ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 |
| 123964 | 0, // ZPRMul2_and_ZPR_K:zsub0_zsub1 |
| 123965 | 0, // ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 123966 | 0, // ZPRMul2_and_ZPR_K:zsub1_zsub2 |
| 123967 | 0, // ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 123968 | 0, // ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 123969 | 0, // ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 123970 | 0, // ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 123971 | }, |
| 123972 | { // ZPRMul4_and_ZPR_3b |
| 123973 | 7, // ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 123974 | 0, // ZPRMul4_and_ZPR_3b:bsub_hi |
| 123975 | 65, // ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 123976 | 0, // ZPRMul4_and_ZPR_3b:dsub0 |
| 123977 | 0, // ZPRMul4_and_ZPR_3b:dsub1 |
| 123978 | 0, // ZPRMul4_and_ZPR_3b:dsub2 |
| 123979 | 0, // ZPRMul4_and_ZPR_3b:dsub3 |
| 123980 | 0, // ZPRMul4_and_ZPR_3b:dsub_hi |
| 123981 | 10, // ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 123982 | 0, // ZPRMul4_and_ZPR_3b:hsub_hi |
| 123983 | 0, // ZPRMul4_and_ZPR_3b:psub |
| 123984 | 0, // ZPRMul4_and_ZPR_3b:psub0 |
| 123985 | 0, // ZPRMul4_and_ZPR_3b:psub1 |
| 123986 | 0, // ZPRMul4_and_ZPR_3b:qsub0 |
| 123987 | 0, // ZPRMul4_and_ZPR_3b:qsub1 |
| 123988 | 0, // ZPRMul4_and_ZPR_3b:qsub2 |
| 123989 | 0, // ZPRMul4_and_ZPR_3b:qsub3 |
| 123990 | 44, // ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 123991 | 0, // ZPRMul4_and_ZPR_3b:ssub_hi |
| 123992 | 0, // ZPRMul4_and_ZPR_3b:sub_32 |
| 123993 | 0, // ZPRMul4_and_ZPR_3b:sub_32_hi |
| 123994 | 0, // ZPRMul4_and_ZPR_3b:sube32 |
| 123995 | 0, // ZPRMul4_and_ZPR_3b:sube64 |
| 123996 | 0, // ZPRMul4_and_ZPR_3b:subo32 |
| 123997 | 0, // ZPRMul4_and_ZPR_3b:subo64 |
| 123998 | 0, // ZPRMul4_and_ZPR_3b:x8sub_0 |
| 123999 | 0, // ZPRMul4_and_ZPR_3b:x8sub_1 |
| 124000 | 0, // ZPRMul4_and_ZPR_3b:x8sub_2 |
| 124001 | 0, // ZPRMul4_and_ZPR_3b:x8sub_3 |
| 124002 | 0, // ZPRMul4_and_ZPR_3b:x8sub_4 |
| 124003 | 0, // ZPRMul4_and_ZPR_3b:x8sub_5 |
| 124004 | 0, // ZPRMul4_and_ZPR_3b:x8sub_6 |
| 124005 | 0, // ZPRMul4_and_ZPR_3b:x8sub_7 |
| 124006 | 0, // ZPRMul4_and_ZPR_3b:zasubb |
| 124007 | 0, // ZPRMul4_and_ZPR_3b:zasubd0 |
| 124008 | 0, // ZPRMul4_and_ZPR_3b:zasubd1 |
| 124009 | 0, // ZPRMul4_and_ZPR_3b:zasubh0 |
| 124010 | 0, // ZPRMul4_and_ZPR_3b:zasubh1 |
| 124011 | 0, // ZPRMul4_and_ZPR_3b:zasubq0 |
| 124012 | 0, // ZPRMul4_and_ZPR_3b:zasubq1 |
| 124013 | 0, // ZPRMul4_and_ZPR_3b:zasubs0 |
| 124014 | 0, // ZPRMul4_and_ZPR_3b:zasubs1 |
| 124015 | 98, // ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 124016 | 0, // ZPRMul4_and_ZPR_3b:zsub0 |
| 124017 | 0, // ZPRMul4_and_ZPR_3b:zsub1 |
| 124018 | 0, // ZPRMul4_and_ZPR_3b:zsub2 |
| 124019 | 0, // ZPRMul4_and_ZPR_3b:zsub3 |
| 124020 | 0, // ZPRMul4_and_ZPR_3b:zsub_hi |
| 124021 | 0, // ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 124022 | 0, // ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 124023 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 124024 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 124025 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 124026 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 124027 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 124028 | 0, // ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 124029 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 124030 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 124031 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 124032 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 124033 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 124034 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 124035 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 124036 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 124037 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 124038 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 124039 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 124040 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 124041 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124042 | 0, // ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124043 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_bsub |
| 124044 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 124045 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_hsub |
| 124046 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 124047 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_ssub |
| 124048 | 0, // ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 124049 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 124050 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 124051 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 124052 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 124053 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 124054 | 0, // ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 124055 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_bsub |
| 124056 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 124057 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_hsub |
| 124058 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 124059 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_ssub |
| 124060 | 0, // ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 124061 | 0, // ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 124062 | 0, // ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 124063 | 0, // ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 124064 | 0, // ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 124065 | 0, // ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 124066 | 0, // ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 124067 | 0, // ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 124068 | 0, // ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 124069 | 0, // ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 124070 | 0, // ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 124071 | 0, // ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 124072 | 0, // ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 124073 | 0, // ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 124074 | 0, // ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 124075 | 0, // ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 124076 | 0, // ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 124077 | 0, // ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 124078 | 0, // ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 124079 | 0, // ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 124080 | 0, // ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 124081 | 0, // ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 124082 | 0, // ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 124083 | 0, // ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 124084 | 0, // ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 124085 | 0, // ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 124086 | 0, // ZPRMul4_and_ZPR_3b:dsub1_dsub2 |
| 124087 | 0, // ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 124088 | 0, // ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 124089 | 0, // ZPRMul4_and_ZPR_3b:dsub_dsub1 |
| 124090 | 0, // ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 124091 | 0, // ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 |
| 124092 | 0, // ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 124093 | 0, // ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 124094 | 0, // ZPRMul4_and_ZPR_3b:qsub1_qsub2 |
| 124095 | 0, // ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 124096 | 0, // ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 124097 | 0, // ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 124098 | 0, // ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 124099 | 0, // ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 124100 | 0, // ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 124101 | 0, // ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 124102 | 0, // ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124103 | 0, // ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124104 | 0, // ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124105 | 0, // ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 124106 | 0, // ZPRMul4_and_ZPR_3b:zsub_qsub1 |
| 124107 | 0, // ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 124108 | 0, // ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 |
| 124109 | 0, // ZPRMul4_and_ZPR_3b:zsub0_zsub1 |
| 124110 | 0, // ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 124111 | 0, // ZPRMul4_and_ZPR_3b:zsub1_zsub2 |
| 124112 | 0, // ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 124113 | 0, // ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 124114 | 0, // ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 124115 | 0, // ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 124116 | }, |
| 124117 | { // ZPRMul4_and_ZPR_K |
| 124118 | 7, // ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 124119 | 0, // ZPRMul4_and_ZPR_K:bsub_hi |
| 124120 | 56, // ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 124121 | 0, // ZPRMul4_and_ZPR_K:dsub0 |
| 124122 | 0, // ZPRMul4_and_ZPR_K:dsub1 |
| 124123 | 0, // ZPRMul4_and_ZPR_K:dsub2 |
| 124124 | 0, // ZPRMul4_and_ZPR_K:dsub3 |
| 124125 | 0, // ZPRMul4_and_ZPR_K:dsub_hi |
| 124126 | 8, // ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 124127 | 0, // ZPRMul4_and_ZPR_K:hsub_hi |
| 124128 | 0, // ZPRMul4_and_ZPR_K:psub |
| 124129 | 0, // ZPRMul4_and_ZPR_K:psub0 |
| 124130 | 0, // ZPRMul4_and_ZPR_K:psub1 |
| 124131 | 0, // ZPRMul4_and_ZPR_K:qsub0 |
| 124132 | 0, // ZPRMul4_and_ZPR_K:qsub1 |
| 124133 | 0, // ZPRMul4_and_ZPR_K:qsub2 |
| 124134 | 0, // ZPRMul4_and_ZPR_K:qsub3 |
| 124135 | 40, // ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 124136 | 0, // ZPRMul4_and_ZPR_K:ssub_hi |
| 124137 | 0, // ZPRMul4_and_ZPR_K:sub_32 |
| 124138 | 0, // ZPRMul4_and_ZPR_K:sub_32_hi |
| 124139 | 0, // ZPRMul4_and_ZPR_K:sube32 |
| 124140 | 0, // ZPRMul4_and_ZPR_K:sube64 |
| 124141 | 0, // ZPRMul4_and_ZPR_K:subo32 |
| 124142 | 0, // ZPRMul4_and_ZPR_K:subo64 |
| 124143 | 0, // ZPRMul4_and_ZPR_K:x8sub_0 |
| 124144 | 0, // ZPRMul4_and_ZPR_K:x8sub_1 |
| 124145 | 0, // ZPRMul4_and_ZPR_K:x8sub_2 |
| 124146 | 0, // ZPRMul4_and_ZPR_K:x8sub_3 |
| 124147 | 0, // ZPRMul4_and_ZPR_K:x8sub_4 |
| 124148 | 0, // ZPRMul4_and_ZPR_K:x8sub_5 |
| 124149 | 0, // ZPRMul4_and_ZPR_K:x8sub_6 |
| 124150 | 0, // ZPRMul4_and_ZPR_K:x8sub_7 |
| 124151 | 0, // ZPRMul4_and_ZPR_K:zasubb |
| 124152 | 0, // ZPRMul4_and_ZPR_K:zasubd0 |
| 124153 | 0, // ZPRMul4_and_ZPR_K:zasubd1 |
| 124154 | 0, // ZPRMul4_and_ZPR_K:zasubh0 |
| 124155 | 0, // ZPRMul4_and_ZPR_K:zasubh1 |
| 124156 | 0, // ZPRMul4_and_ZPR_K:zasubq0 |
| 124157 | 0, // ZPRMul4_and_ZPR_K:zasubq1 |
| 124158 | 0, // ZPRMul4_and_ZPR_K:zasubs0 |
| 124159 | 0, // ZPRMul4_and_ZPR_K:zasubs1 |
| 124160 | 92, // ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 124161 | 0, // ZPRMul4_and_ZPR_K:zsub0 |
| 124162 | 0, // ZPRMul4_and_ZPR_K:zsub1 |
| 124163 | 0, // ZPRMul4_and_ZPR_K:zsub2 |
| 124164 | 0, // ZPRMul4_and_ZPR_K:zsub3 |
| 124165 | 0, // ZPRMul4_and_ZPR_K:zsub_hi |
| 124166 | 0, // ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 124167 | 0, // ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 124168 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 124169 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 124170 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 124171 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 124172 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 124173 | 0, // ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 124174 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 124175 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 124176 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 124177 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 124178 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 124179 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 124180 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 124181 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 124182 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 124183 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 124184 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 124185 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 124186 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124187 | 0, // ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124188 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_bsub |
| 124189 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 124190 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_hsub |
| 124191 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 124192 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_ssub |
| 124193 | 0, // ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 124194 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 124195 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 124196 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 124197 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 124198 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 124199 | 0, // ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 124200 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_bsub |
| 124201 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 124202 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_hsub |
| 124203 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 124204 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_ssub |
| 124205 | 0, // ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 124206 | 0, // ZPRMul4_and_ZPR_K:psub1_then_psub |
| 124207 | 0, // ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 124208 | 0, // ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 124209 | 0, // ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 124210 | 0, // ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 124211 | 0, // ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 124212 | 0, // ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 124213 | 0, // ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 124214 | 0, // ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 124215 | 0, // ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 124216 | 0, // ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 124217 | 0, // ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 124218 | 0, // ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 124219 | 0, // ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 124220 | 0, // ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 124221 | 0, // ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 124222 | 0, // ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 124223 | 0, // ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 124224 | 0, // ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 124225 | 0, // ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 124226 | 0, // ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 124227 | 0, // ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 124228 | 0, // ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 124229 | 0, // ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 124230 | 0, // ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 124231 | 0, // ZPRMul4_and_ZPR_K:dsub1_dsub2 |
| 124232 | 0, // ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 124233 | 0, // ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 124234 | 0, // ZPRMul4_and_ZPR_K:dsub_dsub1 |
| 124235 | 0, // ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 124236 | 0, // ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 |
| 124237 | 0, // ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 124238 | 0, // ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 124239 | 0, // ZPRMul4_and_ZPR_K:qsub1_qsub2 |
| 124240 | 0, // ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 124241 | 0, // ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 124242 | 0, // ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 124243 | 0, // ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 124244 | 0, // ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 124245 | 0, // ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 124246 | 0, // ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 124247 | 0, // ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124248 | 0, // ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124249 | 0, // ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124250 | 0, // ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 124251 | 0, // ZPRMul4_and_ZPR_K:zsub_qsub1 |
| 124252 | 0, // ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 124253 | 0, // ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 |
| 124254 | 0, // ZPRMul4_and_ZPR_K:zsub0_zsub1 |
| 124255 | 0, // ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 124256 | 0, // ZPRMul4_and_ZPR_K:zsub1_zsub2 |
| 124257 | 0, // ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 124258 | 0, // ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 124259 | 0, // ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 124260 | 0, // ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 124261 | }, |
| 124262 | { // DDD |
| 124263 | 7, // DDD:bsub -> FPR8 |
| 124264 | 0, // DDD:bsub_hi |
| 124265 | 0, // DDD:dsub |
| 124266 | 56, // DDD:dsub0 -> FPR64 |
| 124267 | 56, // DDD:dsub1 -> FPR64 |
| 124268 | 56, // DDD:dsub2 -> FPR64 |
| 124269 | 0, // DDD:dsub3 |
| 124270 | 0, // DDD:dsub_hi |
| 124271 | 8, // DDD:hsub -> FPR16 |
| 124272 | 0, // DDD:hsub_hi |
| 124273 | 0, // DDD:psub |
| 124274 | 0, // DDD:psub0 |
| 124275 | 0, // DDD:psub1 |
| 124276 | 0, // DDD:qsub0 |
| 124277 | 0, // DDD:qsub1 |
| 124278 | 0, // DDD:qsub2 |
| 124279 | 0, // DDD:qsub3 |
| 124280 | 40, // DDD:ssub -> FPR32 |
| 124281 | 0, // DDD:ssub_hi |
| 124282 | 0, // DDD:sub_32 |
| 124283 | 0, // DDD:sub_32_hi |
| 124284 | 0, // DDD:sube32 |
| 124285 | 0, // DDD:sube64 |
| 124286 | 0, // DDD:subo32 |
| 124287 | 0, // DDD:subo64 |
| 124288 | 0, // DDD:x8sub_0 |
| 124289 | 0, // DDD:x8sub_1 |
| 124290 | 0, // DDD:x8sub_2 |
| 124291 | 0, // DDD:x8sub_3 |
| 124292 | 0, // DDD:x8sub_4 |
| 124293 | 0, // DDD:x8sub_5 |
| 124294 | 0, // DDD:x8sub_6 |
| 124295 | 0, // DDD:x8sub_7 |
| 124296 | 0, // DDD:zasubb |
| 124297 | 0, // DDD:zasubd0 |
| 124298 | 0, // DDD:zasubd1 |
| 124299 | 0, // DDD:zasubh0 |
| 124300 | 0, // DDD:zasubh1 |
| 124301 | 0, // DDD:zasubq0 |
| 124302 | 0, // DDD:zasubq1 |
| 124303 | 0, // DDD:zasubs0 |
| 124304 | 0, // DDD:zasubs1 |
| 124305 | 0, // DDD:zsub |
| 124306 | 0, // DDD:zsub0 |
| 124307 | 0, // DDD:zsub1 |
| 124308 | 0, // DDD:zsub2 |
| 124309 | 0, // DDD:zsub3 |
| 124310 | 0, // DDD:zsub_hi |
| 124311 | 0, // DDD:zasubd1_then_zasubq0 |
| 124312 | 0, // DDD:zasubd1_then_zasubq1 |
| 124313 | 0, // DDD:zasubs1_then_zasubd0 |
| 124314 | 0, // DDD:zasubs1_then_zasubd1 |
| 124315 | 0, // DDD:zasubs1_then_zasubq0 |
| 124316 | 0, // DDD:zasubs1_then_zasubq1 |
| 124317 | 0, // DDD:zasubs1_then_zasubd1_then_zasubq0 |
| 124318 | 0, // DDD:zasubs1_then_zasubd1_then_zasubq1 |
| 124319 | 0, // DDD:zasubh1_then_zasubd0 |
| 124320 | 0, // DDD:zasubh1_then_zasubd1 |
| 124321 | 0, // DDD:zasubh1_then_zasubq0 |
| 124322 | 0, // DDD:zasubh1_then_zasubq1 |
| 124323 | 0, // DDD:zasubh1_then_zasubs0 |
| 124324 | 0, // DDD:zasubh1_then_zasubs1 |
| 124325 | 0, // DDD:zasubh1_then_zasubd1_then_zasubq0 |
| 124326 | 0, // DDD:zasubh1_then_zasubd1_then_zasubq1 |
| 124327 | 0, // DDD:zasubh1_then_zasubs1_then_zasubd0 |
| 124328 | 0, // DDD:zasubh1_then_zasubs1_then_zasubd1 |
| 124329 | 0, // DDD:zasubh1_then_zasubs1_then_zasubq0 |
| 124330 | 0, // DDD:zasubh1_then_zasubs1_then_zasubq1 |
| 124331 | 0, // DDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124332 | 0, // DDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124333 | 7, // DDD:dsub1_then_bsub -> FPR8 |
| 124334 | 0, // DDD:dsub1_then_bsub_hi |
| 124335 | 8, // DDD:dsub1_then_hsub -> FPR16 |
| 124336 | 0, // DDD:dsub1_then_hsub_hi |
| 124337 | 40, // DDD:dsub1_then_ssub -> FPR32 |
| 124338 | 0, // DDD:dsub1_then_ssub_hi |
| 124339 | 0, // DDD:dsub3_then_bsub |
| 124340 | 0, // DDD:dsub3_then_bsub_hi |
| 124341 | 0, // DDD:dsub3_then_hsub |
| 124342 | 0, // DDD:dsub3_then_hsub_hi |
| 124343 | 0, // DDD:dsub3_then_ssub |
| 124344 | 0, // DDD:dsub3_then_ssub_hi |
| 124345 | 7, // DDD:dsub2_then_bsub -> FPR8 |
| 124346 | 0, // DDD:dsub2_then_bsub_hi |
| 124347 | 8, // DDD:dsub2_then_hsub -> FPR16 |
| 124348 | 0, // DDD:dsub2_then_hsub_hi |
| 124349 | 40, // DDD:dsub2_then_ssub -> FPR32 |
| 124350 | 0, // DDD:dsub2_then_ssub_hi |
| 124351 | 0, // DDD:psub1_then_psub |
| 124352 | 0, // DDD:qsub1_then_dsub_hi |
| 124353 | 0, // DDD:qsub3_then_dsub_hi |
| 124354 | 0, // DDD:qsub2_then_dsub_hi |
| 124355 | 0, // DDD:x8sub_7_then_sub_32 |
| 124356 | 0, // DDD:x8sub_7_then_sub_32_hi |
| 124357 | 0, // DDD:x8sub_6_then_sub_32 |
| 124358 | 0, // DDD:x8sub_6_then_sub_32_hi |
| 124359 | 0, // DDD:x8sub_5_then_sub_32 |
| 124360 | 0, // DDD:x8sub_5_then_sub_32_hi |
| 124361 | 0, // DDD:x8sub_4_then_sub_32 |
| 124362 | 0, // DDD:x8sub_4_then_sub_32_hi |
| 124363 | 0, // DDD:x8sub_3_then_sub_32 |
| 124364 | 0, // DDD:x8sub_3_then_sub_32_hi |
| 124365 | 0, // DDD:x8sub_2_then_sub_32 |
| 124366 | 0, // DDD:x8sub_2_then_sub_32_hi |
| 124367 | 0, // DDD:x8sub_1_then_sub_32 |
| 124368 | 0, // DDD:x8sub_1_then_sub_32_hi |
| 124369 | 0, // DDD:subo64_then_sub_32 |
| 124370 | 0, // DDD:subo64_then_sub_32_hi |
| 124371 | 0, // DDD:zsub1_then_zsub_hi |
| 124372 | 0, // DDD:zsub3_then_zsub_hi |
| 124373 | 0, // DDD:zsub2_then_zsub_hi |
| 124374 | 75, // DDD:dsub0_dsub1 -> DD |
| 124375 | 0, // DDD:dsub0_dsub1_dsub2 |
| 124376 | 75, // DDD:dsub1_dsub2 -> DD |
| 124377 | 0, // DDD:dsub1_dsub2_dsub3 |
| 124378 | 0, // DDD:dsub2_dsub3 |
| 124379 | 0, // DDD:dsub_dsub1 |
| 124380 | 0, // DDD:dsub_dsub1_dsub2_dsub3 |
| 124381 | 0, // DDD:dsub_dsub1_dsub2 |
| 124382 | 0, // DDD:qsub0_qsub1 |
| 124383 | 0, // DDD:qsub0_qsub1_qsub2 |
| 124384 | 0, // DDD:qsub1_qsub2 |
| 124385 | 0, // DDD:qsub1_qsub2_qsub3 |
| 124386 | 0, // DDD:qsub2_qsub3 |
| 124387 | 0, // DDD:sub_32_x8sub_1_then_sub_32 |
| 124388 | 0, // DDD:x8sub_0_x8sub_1 |
| 124389 | 0, // DDD:x8sub_2_x8sub_3 |
| 124390 | 0, // DDD:x8sub_4_x8sub_5 |
| 124391 | 0, // DDD:x8sub_6_x8sub_7 |
| 124392 | 0, // DDD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124393 | 0, // DDD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124394 | 0, // DDD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124395 | 0, // DDD:sub_32_subo64_then_sub_32 |
| 124396 | 0, // DDD:zsub_qsub1 |
| 124397 | 0, // DDD:zsub_qsub1_qsub2_qsub3 |
| 124398 | 0, // DDD:zsub_qsub1_qsub2 |
| 124399 | 0, // DDD:zsub0_zsub1 |
| 124400 | 0, // DDD:zsub0_zsub1_zsub2 |
| 124401 | 0, // DDD:zsub1_zsub2 |
| 124402 | 0, // DDD:zsub1_zsub2_zsub3 |
| 124403 | 0, // DDD:zsub2_zsub3 |
| 124404 | 0, // DDD:zsub0_zsub2 |
| 124405 | 0, // DDD:zsub1_zsub3 |
| 124406 | }, |
| 124407 | { // DDD_with_dsub0_in_FPR64_lo |
| 124408 | 7, // DDD_with_dsub0_in_FPR64_lo:bsub -> FPR8 |
| 124409 | 0, // DDD_with_dsub0_in_FPR64_lo:bsub_hi |
| 124410 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub |
| 124411 | 65, // DDD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo |
| 124412 | 56, // DDD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 |
| 124413 | 56, // DDD_with_dsub0_in_FPR64_lo:dsub2 -> FPR64 |
| 124414 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3 |
| 124415 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub_hi |
| 124416 | 10, // DDD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo |
| 124417 | 0, // DDD_with_dsub0_in_FPR64_lo:hsub_hi |
| 124418 | 0, // DDD_with_dsub0_in_FPR64_lo:psub |
| 124419 | 0, // DDD_with_dsub0_in_FPR64_lo:psub0 |
| 124420 | 0, // DDD_with_dsub0_in_FPR64_lo:psub1 |
| 124421 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub0 |
| 124422 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub1 |
| 124423 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub2 |
| 124424 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub3 |
| 124425 | 44, // DDD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 124426 | 0, // DDD_with_dsub0_in_FPR64_lo:ssub_hi |
| 124427 | 0, // DDD_with_dsub0_in_FPR64_lo:sub_32 |
| 124428 | 0, // DDD_with_dsub0_in_FPR64_lo:sub_32_hi |
| 124429 | 0, // DDD_with_dsub0_in_FPR64_lo:sube32 |
| 124430 | 0, // DDD_with_dsub0_in_FPR64_lo:sube64 |
| 124431 | 0, // DDD_with_dsub0_in_FPR64_lo:subo32 |
| 124432 | 0, // DDD_with_dsub0_in_FPR64_lo:subo64 |
| 124433 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_0 |
| 124434 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_1 |
| 124435 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2 |
| 124436 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_3 |
| 124437 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4 |
| 124438 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_5 |
| 124439 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6 |
| 124440 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_7 |
| 124441 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubb |
| 124442 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubd0 |
| 124443 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1 |
| 124444 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh0 |
| 124445 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1 |
| 124446 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubq0 |
| 124447 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubq1 |
| 124448 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs0 |
| 124449 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1 |
| 124450 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub |
| 124451 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub0 |
| 124452 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub1 |
| 124453 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub2 |
| 124454 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub3 |
| 124455 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub_hi |
| 124456 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 |
| 124457 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 |
| 124458 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 |
| 124459 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 |
| 124460 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 |
| 124461 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 |
| 124462 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 124463 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 124464 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 |
| 124465 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 |
| 124466 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 |
| 124467 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 |
| 124468 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 |
| 124469 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 |
| 124470 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 124471 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 124472 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 124473 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 124474 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 124475 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 124476 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124477 | 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124478 | 7, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 124479 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub_hi |
| 124480 | 8, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 124481 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub_hi |
| 124482 | 40, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 124483 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub_hi |
| 124484 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub |
| 124485 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub_hi |
| 124486 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub |
| 124487 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub_hi |
| 124488 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub |
| 124489 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub_hi |
| 124490 | 7, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 124491 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub_hi |
| 124492 | 8, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 124493 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub_hi |
| 124494 | 40, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 124495 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub_hi |
| 124496 | 0, // DDD_with_dsub0_in_FPR64_lo:psub1_then_psub |
| 124497 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_hi |
| 124498 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub3_then_dsub_hi |
| 124499 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_hi |
| 124500 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 |
| 124501 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 124502 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 |
| 124503 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 124504 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 |
| 124505 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 124506 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 |
| 124507 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 124508 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 |
| 124509 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 124510 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 |
| 124511 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 124512 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 |
| 124513 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 124514 | 0, // DDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 |
| 124515 | 0, // DDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32_hi |
| 124516 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi |
| 124517 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi |
| 124518 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi |
| 124519 | 76, // DDD_with_dsub0_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 124520 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 124521 | 75, // DDD_with_dsub0_in_FPR64_lo:dsub1_dsub2 -> DD |
| 124522 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 124523 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub2_dsub3 |
| 124524 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub_dsub1 |
| 124525 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 124526 | 0, // DDD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2 |
| 124527 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub0_qsub1 |
| 124528 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 124529 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_qsub2 |
| 124530 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 124531 | 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_qsub3 |
| 124532 | 0, // DDD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 124533 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 |
| 124534 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 |
| 124535 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 |
| 124536 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 |
| 124537 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124538 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124539 | 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124540 | 0, // DDD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 124541 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub_qsub1 |
| 124542 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 124543 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2 |
| 124544 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub1 |
| 124545 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 124546 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub2 |
| 124547 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 124548 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_zsub3 |
| 124549 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub2 |
| 124550 | 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub3 |
| 124551 | }, |
| 124552 | { // DDD_with_dsub1_in_FPR64_lo |
| 124553 | 7, // DDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 124554 | 0, // DDD_with_dsub1_in_FPR64_lo:bsub_hi |
| 124555 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub |
| 124556 | 56, // DDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 |
| 124557 | 65, // DDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 124558 | 56, // DDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 124559 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3 |
| 124560 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub_hi |
| 124561 | 8, // DDD_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 124562 | 0, // DDD_with_dsub1_in_FPR64_lo:hsub_hi |
| 124563 | 0, // DDD_with_dsub1_in_FPR64_lo:psub |
| 124564 | 0, // DDD_with_dsub1_in_FPR64_lo:psub0 |
| 124565 | 0, // DDD_with_dsub1_in_FPR64_lo:psub1 |
| 124566 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub0 |
| 124567 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub1 |
| 124568 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub2 |
| 124569 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub3 |
| 124570 | 40, // DDD_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 124571 | 0, // DDD_with_dsub1_in_FPR64_lo:ssub_hi |
| 124572 | 0, // DDD_with_dsub1_in_FPR64_lo:sub_32 |
| 124573 | 0, // DDD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 124574 | 0, // DDD_with_dsub1_in_FPR64_lo:sube32 |
| 124575 | 0, // DDD_with_dsub1_in_FPR64_lo:sube64 |
| 124576 | 0, // DDD_with_dsub1_in_FPR64_lo:subo32 |
| 124577 | 0, // DDD_with_dsub1_in_FPR64_lo:subo64 |
| 124578 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 124579 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 124580 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 124581 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 124582 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 124583 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 124584 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 124585 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 124586 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubb |
| 124587 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubd0 |
| 124588 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1 |
| 124589 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh0 |
| 124590 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1 |
| 124591 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubq0 |
| 124592 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubq1 |
| 124593 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs0 |
| 124594 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1 |
| 124595 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub |
| 124596 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub0 |
| 124597 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub1 |
| 124598 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub2 |
| 124599 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub3 |
| 124600 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub_hi |
| 124601 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 124602 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 124603 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 124604 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 124605 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 124606 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 124607 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 124608 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 124609 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 124610 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 124611 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 124612 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 124613 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 124614 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 124615 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 124616 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 124617 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 124618 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 124619 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 124620 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 124621 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124622 | 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124623 | 7, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 124624 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 124625 | 10, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 124626 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 124627 | 44, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 124628 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 124629 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 124630 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 124631 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 124632 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 124633 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 124634 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 124635 | 7, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 124636 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 124637 | 8, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 124638 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 124639 | 40, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 124640 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 124641 | 0, // DDD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 124642 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 124643 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 124644 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 124645 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 124646 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 124647 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 124648 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 124649 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 124650 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 124651 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 124652 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 124653 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 124654 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 124655 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 124656 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 124657 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 124658 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 124659 | 0, // DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 124660 | 0, // DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 124661 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 124662 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 124663 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 124664 | 77, // DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 124665 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 124666 | 76, // DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 124667 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 124668 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 124669 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 124670 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 124671 | 0, // DDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 124672 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 124673 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 124674 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 124675 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 124676 | 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 124677 | 0, // DDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 124678 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 124679 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 124680 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 124681 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 124682 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124683 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124684 | 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124685 | 0, // DDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 124686 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 124687 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 124688 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 124689 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 124690 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 124691 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 124692 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 124693 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 124694 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 124695 | 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 124696 | }, |
| 124697 | { // DDD_with_dsub2_in_FPR64_lo |
| 124698 | 7, // DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 124699 | 0, // DDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 124700 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub |
| 124701 | 56, // DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 |
| 124702 | 56, // DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 124703 | 65, // DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 124704 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3 |
| 124705 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 124706 | 8, // DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 124707 | 0, // DDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 124708 | 0, // DDD_with_dsub2_in_FPR64_lo:psub |
| 124709 | 0, // DDD_with_dsub2_in_FPR64_lo:psub0 |
| 124710 | 0, // DDD_with_dsub2_in_FPR64_lo:psub1 |
| 124711 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub0 |
| 124712 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub1 |
| 124713 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub2 |
| 124714 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub3 |
| 124715 | 40, // DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 124716 | 0, // DDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 124717 | 0, // DDD_with_dsub2_in_FPR64_lo:sub_32 |
| 124718 | 0, // DDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 124719 | 0, // DDD_with_dsub2_in_FPR64_lo:sube32 |
| 124720 | 0, // DDD_with_dsub2_in_FPR64_lo:sube64 |
| 124721 | 0, // DDD_with_dsub2_in_FPR64_lo:subo32 |
| 124722 | 0, // DDD_with_dsub2_in_FPR64_lo:subo64 |
| 124723 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 124724 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 124725 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 124726 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 124727 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 124728 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 124729 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 124730 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 124731 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubb |
| 124732 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 124733 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 124734 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 124735 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 124736 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 124737 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 124738 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 124739 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 124740 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub |
| 124741 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub0 |
| 124742 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub1 |
| 124743 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub2 |
| 124744 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub3 |
| 124745 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 124746 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 124747 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 124748 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 124749 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 124750 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 124751 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 124752 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 124753 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 124754 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 124755 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 124756 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 124757 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 124758 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 124759 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 124760 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 124761 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 124762 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 124763 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 124764 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 124765 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 124766 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124767 | 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124768 | 7, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 124769 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 124770 | 8, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 124771 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 124772 | 40, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 124773 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 124774 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 124775 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 124776 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 124777 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 124778 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 124779 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 124780 | 7, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 124781 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 124782 | 10, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 124783 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 124784 | 44, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 124785 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 124786 | 0, // DDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 124787 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 124788 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 124789 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 124790 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 124791 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 124792 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 124793 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 124794 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 124795 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 124796 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 124797 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 124798 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 124799 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 124800 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 124801 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 124802 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 124803 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 124804 | 0, // DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 124805 | 0, // DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 124806 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 124807 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 124808 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 124809 | 75, // DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD |
| 124810 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 124811 | 77, // DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 124812 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 124813 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 124814 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 124815 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 124816 | 0, // DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 124817 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 124818 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 124819 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 124820 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 124821 | 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 124822 | 0, // DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 124823 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 124824 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 124825 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 124826 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 124827 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124828 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124829 | 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124830 | 0, // DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 124831 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 124832 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 124833 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 124834 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 124835 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 124836 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 124837 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 124838 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 124839 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 124840 | 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 124841 | }, |
| 124842 | { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 124843 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 124844 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:bsub_hi |
| 124845 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub |
| 124846 | 65, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo |
| 124847 | 65, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 124848 | 56, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 124849 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3 |
| 124850 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_hi |
| 124851 | 10, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 124852 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:hsub_hi |
| 124853 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub |
| 124854 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub0 |
| 124855 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub1 |
| 124856 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0 |
| 124857 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1 |
| 124858 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2 |
| 124859 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3 |
| 124860 | 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 124861 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:ssub_hi |
| 124862 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32 |
| 124863 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 124864 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sube32 |
| 124865 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sube64 |
| 124866 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo32 |
| 124867 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo64 |
| 124868 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 124869 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 124870 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 124871 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 124872 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 124873 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 124874 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 124875 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 124876 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubb |
| 124877 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd0 |
| 124878 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1 |
| 124879 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh0 |
| 124880 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1 |
| 124881 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubq0 |
| 124882 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubq1 |
| 124883 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs0 |
| 124884 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1 |
| 124885 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub |
| 124886 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0 |
| 124887 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1 |
| 124888 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2 |
| 124889 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3 |
| 124890 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_hi |
| 124891 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 124892 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 124893 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 124894 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 124895 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 124896 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 124897 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 124898 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 124899 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 124900 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 124901 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 124902 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 124903 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 124904 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 124905 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 124906 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 124907 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 124908 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 124909 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 124910 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 124911 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 124912 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 124913 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 124914 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 124915 | 10, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 124916 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 124917 | 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 124918 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 124919 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 124920 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 124921 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 124922 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 124923 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 124924 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 124925 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 124926 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 124927 | 8, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 124928 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 124929 | 40, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 124930 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 124931 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 124932 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 124933 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 124934 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 124935 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 124936 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 124937 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 124938 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 124939 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 124940 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 124941 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 124942 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 124943 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 124944 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 124945 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 124946 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 124947 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 124948 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 124949 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 124950 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 124951 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 124952 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 124953 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 124954 | 79, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 124955 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 124956 | 76, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 124957 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 124958 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 124959 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 124960 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 124961 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 124962 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 124963 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 124964 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 124965 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 124966 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 124967 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 124968 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 124969 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 124970 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 124971 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 124972 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 124973 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 124974 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 124975 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 124976 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 124977 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 124978 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 124979 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 124980 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 124981 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 124982 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 124983 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 124984 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 124985 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 124986 | }, |
| 124987 | { // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 124988 | 7, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 124989 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 124990 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub |
| 124991 | 56, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 |
| 124992 | 65, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 124993 | 65, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 124994 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3 |
| 124995 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 124996 | 8, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 124997 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 124998 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub |
| 124999 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub0 |
| 125000 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1 |
| 125001 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0 |
| 125002 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1 |
| 125003 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2 |
| 125004 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3 |
| 125005 | 40, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 125006 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 125007 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32 |
| 125008 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 125009 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube32 |
| 125010 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube64 |
| 125011 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo32 |
| 125012 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64 |
| 125013 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 125014 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 125015 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 125016 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 125017 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 125018 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 125019 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 125020 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 125021 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubb |
| 125022 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 125023 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 125024 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 125025 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 125026 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 125027 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 125028 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 125029 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 125030 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub |
| 125031 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0 |
| 125032 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1 |
| 125033 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2 |
| 125034 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3 |
| 125035 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 125036 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125037 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125038 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125039 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125040 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125041 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125042 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125043 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125044 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125045 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125046 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125047 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125048 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125049 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125050 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125051 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125052 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125053 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125054 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125055 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125056 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125057 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125058 | 7, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125059 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 125060 | 10, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 125061 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 125062 | 44, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125063 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 125064 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 125065 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 125066 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 125067 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 125068 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 125069 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 125070 | 7, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125071 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 125072 | 10, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 125073 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 125074 | 44, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125075 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 125076 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 125077 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 125078 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 125079 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 125080 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125081 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125082 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125083 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125084 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125085 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125086 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125087 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125088 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125089 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125090 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125091 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125092 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125093 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125094 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 125095 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 125096 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 125097 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 125098 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 125099 | 77, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 125100 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 125101 | 79, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 125102 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 125103 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 125104 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 125105 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125106 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125107 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 125108 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125109 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 125110 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125111 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 125112 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125113 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125114 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125115 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125116 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125117 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125118 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125119 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125120 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125121 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 125122 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125123 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125124 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 125125 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125126 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 125127 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125128 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 125129 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 125130 | 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 125131 | }, |
| 125132 | { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 125133 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 125134 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 125135 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub |
| 125136 | 65, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64_lo |
| 125137 | 65, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 125138 | 65, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 125139 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3 |
| 125140 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 125141 | 10, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 125142 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 125143 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub |
| 125144 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub0 |
| 125145 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1 |
| 125146 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0 |
| 125147 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1 |
| 125148 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2 |
| 125149 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3 |
| 125150 | 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125151 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 125152 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32 |
| 125153 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 125154 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube32 |
| 125155 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube64 |
| 125156 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo32 |
| 125157 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64 |
| 125158 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 125159 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 125160 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 125161 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 125162 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 125163 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 125164 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 125165 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 125166 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubb |
| 125167 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 125168 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 125169 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 125170 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 125171 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 125172 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 125173 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 125174 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 125175 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub |
| 125176 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0 |
| 125177 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1 |
| 125178 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2 |
| 125179 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3 |
| 125180 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 125181 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125182 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125183 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125184 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125185 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125186 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125187 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125188 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125189 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125190 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125191 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125192 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125193 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125194 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125195 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125196 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125197 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125198 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125199 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125200 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125201 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125202 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125203 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125204 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 125205 | 10, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 125206 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 125207 | 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125208 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 125209 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 125210 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 125211 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 125212 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 125213 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 125214 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 125215 | 7, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125216 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 125217 | 10, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 125218 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 125219 | 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125220 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 125221 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 125222 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 125223 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 125224 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 125225 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125226 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125227 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125228 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125229 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125230 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125231 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125232 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125233 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125234 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125235 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125236 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125237 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125238 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125239 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 125240 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 125241 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 125242 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 125243 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 125244 | 79, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 125245 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 125246 | 79, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 125247 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 125248 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 125249 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 125250 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125251 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125252 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 125253 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125254 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 125255 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125256 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 125257 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125258 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125259 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125260 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125261 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125262 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125263 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125264 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125265 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125266 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 125267 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125268 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125269 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 125270 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125271 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 125272 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125273 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 125274 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 125275 | 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 125276 | }, |
| 125277 | { // DDDD |
| 125278 | 7, // DDDD:bsub -> FPR8 |
| 125279 | 0, // DDDD:bsub_hi |
| 125280 | 0, // DDDD:dsub |
| 125281 | 56, // DDDD:dsub0 -> FPR64 |
| 125282 | 56, // DDDD:dsub1 -> FPR64 |
| 125283 | 56, // DDDD:dsub2 -> FPR64 |
| 125284 | 56, // DDDD:dsub3 -> FPR64 |
| 125285 | 0, // DDDD:dsub_hi |
| 125286 | 8, // DDDD:hsub -> FPR16 |
| 125287 | 0, // DDDD:hsub_hi |
| 125288 | 0, // DDDD:psub |
| 125289 | 0, // DDDD:psub0 |
| 125290 | 0, // DDDD:psub1 |
| 125291 | 0, // DDDD:qsub0 |
| 125292 | 0, // DDDD:qsub1 |
| 125293 | 0, // DDDD:qsub2 |
| 125294 | 0, // DDDD:qsub3 |
| 125295 | 40, // DDDD:ssub -> FPR32 |
| 125296 | 0, // DDDD:ssub_hi |
| 125297 | 0, // DDDD:sub_32 |
| 125298 | 0, // DDDD:sub_32_hi |
| 125299 | 0, // DDDD:sube32 |
| 125300 | 0, // DDDD:sube64 |
| 125301 | 0, // DDDD:subo32 |
| 125302 | 0, // DDDD:subo64 |
| 125303 | 0, // DDDD:x8sub_0 |
| 125304 | 0, // DDDD:x8sub_1 |
| 125305 | 0, // DDDD:x8sub_2 |
| 125306 | 0, // DDDD:x8sub_3 |
| 125307 | 0, // DDDD:x8sub_4 |
| 125308 | 0, // DDDD:x8sub_5 |
| 125309 | 0, // DDDD:x8sub_6 |
| 125310 | 0, // DDDD:x8sub_7 |
| 125311 | 0, // DDDD:zasubb |
| 125312 | 0, // DDDD:zasubd0 |
| 125313 | 0, // DDDD:zasubd1 |
| 125314 | 0, // DDDD:zasubh0 |
| 125315 | 0, // DDDD:zasubh1 |
| 125316 | 0, // DDDD:zasubq0 |
| 125317 | 0, // DDDD:zasubq1 |
| 125318 | 0, // DDDD:zasubs0 |
| 125319 | 0, // DDDD:zasubs1 |
| 125320 | 0, // DDDD:zsub |
| 125321 | 0, // DDDD:zsub0 |
| 125322 | 0, // DDDD:zsub1 |
| 125323 | 0, // DDDD:zsub2 |
| 125324 | 0, // DDDD:zsub3 |
| 125325 | 0, // DDDD:zsub_hi |
| 125326 | 0, // DDDD:zasubd1_then_zasubq0 |
| 125327 | 0, // DDDD:zasubd1_then_zasubq1 |
| 125328 | 0, // DDDD:zasubs1_then_zasubd0 |
| 125329 | 0, // DDDD:zasubs1_then_zasubd1 |
| 125330 | 0, // DDDD:zasubs1_then_zasubq0 |
| 125331 | 0, // DDDD:zasubs1_then_zasubq1 |
| 125332 | 0, // DDDD:zasubs1_then_zasubd1_then_zasubq0 |
| 125333 | 0, // DDDD:zasubs1_then_zasubd1_then_zasubq1 |
| 125334 | 0, // DDDD:zasubh1_then_zasubd0 |
| 125335 | 0, // DDDD:zasubh1_then_zasubd1 |
| 125336 | 0, // DDDD:zasubh1_then_zasubq0 |
| 125337 | 0, // DDDD:zasubh1_then_zasubq1 |
| 125338 | 0, // DDDD:zasubh1_then_zasubs0 |
| 125339 | 0, // DDDD:zasubh1_then_zasubs1 |
| 125340 | 0, // DDDD:zasubh1_then_zasubd1_then_zasubq0 |
| 125341 | 0, // DDDD:zasubh1_then_zasubd1_then_zasubq1 |
| 125342 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubd0 |
| 125343 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1 |
| 125344 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubq0 |
| 125345 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubq1 |
| 125346 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125347 | 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125348 | 7, // DDDD:dsub1_then_bsub -> FPR8 |
| 125349 | 0, // DDDD:dsub1_then_bsub_hi |
| 125350 | 8, // DDDD:dsub1_then_hsub -> FPR16 |
| 125351 | 0, // DDDD:dsub1_then_hsub_hi |
| 125352 | 40, // DDDD:dsub1_then_ssub -> FPR32 |
| 125353 | 0, // DDDD:dsub1_then_ssub_hi |
| 125354 | 7, // DDDD:dsub3_then_bsub -> FPR8 |
| 125355 | 0, // DDDD:dsub3_then_bsub_hi |
| 125356 | 8, // DDDD:dsub3_then_hsub -> FPR16 |
| 125357 | 0, // DDDD:dsub3_then_hsub_hi |
| 125358 | 40, // DDDD:dsub3_then_ssub -> FPR32 |
| 125359 | 0, // DDDD:dsub3_then_ssub_hi |
| 125360 | 7, // DDDD:dsub2_then_bsub -> FPR8 |
| 125361 | 0, // DDDD:dsub2_then_bsub_hi |
| 125362 | 8, // DDDD:dsub2_then_hsub -> FPR16 |
| 125363 | 0, // DDDD:dsub2_then_hsub_hi |
| 125364 | 40, // DDDD:dsub2_then_ssub -> FPR32 |
| 125365 | 0, // DDDD:dsub2_then_ssub_hi |
| 125366 | 0, // DDDD:psub1_then_psub |
| 125367 | 0, // DDDD:qsub1_then_dsub_hi |
| 125368 | 0, // DDDD:qsub3_then_dsub_hi |
| 125369 | 0, // DDDD:qsub2_then_dsub_hi |
| 125370 | 0, // DDDD:x8sub_7_then_sub_32 |
| 125371 | 0, // DDDD:x8sub_7_then_sub_32_hi |
| 125372 | 0, // DDDD:x8sub_6_then_sub_32 |
| 125373 | 0, // DDDD:x8sub_6_then_sub_32_hi |
| 125374 | 0, // DDDD:x8sub_5_then_sub_32 |
| 125375 | 0, // DDDD:x8sub_5_then_sub_32_hi |
| 125376 | 0, // DDDD:x8sub_4_then_sub_32 |
| 125377 | 0, // DDDD:x8sub_4_then_sub_32_hi |
| 125378 | 0, // DDDD:x8sub_3_then_sub_32 |
| 125379 | 0, // DDDD:x8sub_3_then_sub_32_hi |
| 125380 | 0, // DDDD:x8sub_2_then_sub_32 |
| 125381 | 0, // DDDD:x8sub_2_then_sub_32_hi |
| 125382 | 0, // DDDD:x8sub_1_then_sub_32 |
| 125383 | 0, // DDDD:x8sub_1_then_sub_32_hi |
| 125384 | 0, // DDDD:subo64_then_sub_32 |
| 125385 | 0, // DDDD:subo64_then_sub_32_hi |
| 125386 | 0, // DDDD:zsub1_then_zsub_hi |
| 125387 | 0, // DDDD:zsub3_then_zsub_hi |
| 125388 | 0, // DDDD:zsub2_then_zsub_hi |
| 125389 | 75, // DDDD:dsub0_dsub1 -> DD |
| 125390 | 110, // DDDD:dsub0_dsub1_dsub2 -> DDD |
| 125391 | 75, // DDDD:dsub1_dsub2 -> DD |
| 125392 | 110, // DDDD:dsub1_dsub2_dsub3 -> DDD |
| 125393 | 75, // DDDD:dsub2_dsub3 -> DD |
| 125394 | 0, // DDDD:dsub_dsub1 |
| 125395 | 0, // DDDD:dsub_dsub1_dsub2_dsub3 |
| 125396 | 0, // DDDD:dsub_dsub1_dsub2 |
| 125397 | 0, // DDDD:qsub0_qsub1 |
| 125398 | 0, // DDDD:qsub0_qsub1_qsub2 |
| 125399 | 0, // DDDD:qsub1_qsub2 |
| 125400 | 0, // DDDD:qsub1_qsub2_qsub3 |
| 125401 | 0, // DDDD:qsub2_qsub3 |
| 125402 | 0, // DDDD:sub_32_x8sub_1_then_sub_32 |
| 125403 | 0, // DDDD:x8sub_0_x8sub_1 |
| 125404 | 0, // DDDD:x8sub_2_x8sub_3 |
| 125405 | 0, // DDDD:x8sub_4_x8sub_5 |
| 125406 | 0, // DDDD:x8sub_6_x8sub_7 |
| 125407 | 0, // DDDD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125408 | 0, // DDDD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125409 | 0, // DDDD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125410 | 0, // DDDD:sub_32_subo64_then_sub_32 |
| 125411 | 0, // DDDD:zsub_qsub1 |
| 125412 | 0, // DDDD:zsub_qsub1_qsub2_qsub3 |
| 125413 | 0, // DDDD:zsub_qsub1_qsub2 |
| 125414 | 0, // DDDD:zsub0_zsub1 |
| 125415 | 0, // DDDD:zsub0_zsub1_zsub2 |
| 125416 | 0, // DDDD:zsub1_zsub2 |
| 125417 | 0, // DDDD:zsub1_zsub2_zsub3 |
| 125418 | 0, // DDDD:zsub2_zsub3 |
| 125419 | 0, // DDDD:zsub0_zsub2 |
| 125420 | 0, // DDDD:zsub1_zsub3 |
| 125421 | }, |
| 125422 | { // DDDD_with_dsub0_in_FPR64_lo |
| 125423 | 7, // DDDD_with_dsub0_in_FPR64_lo:bsub -> FPR8 |
| 125424 | 0, // DDDD_with_dsub0_in_FPR64_lo:bsub_hi |
| 125425 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub |
| 125426 | 65, // DDDD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo |
| 125427 | 56, // DDDD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 |
| 125428 | 56, // DDDD_with_dsub0_in_FPR64_lo:dsub2 -> FPR64 |
| 125429 | 56, // DDDD_with_dsub0_in_FPR64_lo:dsub3 -> FPR64 |
| 125430 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_hi |
| 125431 | 10, // DDDD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo |
| 125432 | 0, // DDDD_with_dsub0_in_FPR64_lo:hsub_hi |
| 125433 | 0, // DDDD_with_dsub0_in_FPR64_lo:psub |
| 125434 | 0, // DDDD_with_dsub0_in_FPR64_lo:psub0 |
| 125435 | 0, // DDDD_with_dsub0_in_FPR64_lo:psub1 |
| 125436 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0 |
| 125437 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1 |
| 125438 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2 |
| 125439 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3 |
| 125440 | 44, // DDDD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125441 | 0, // DDDD_with_dsub0_in_FPR64_lo:ssub_hi |
| 125442 | 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32 |
| 125443 | 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32_hi |
| 125444 | 0, // DDDD_with_dsub0_in_FPR64_lo:sube32 |
| 125445 | 0, // DDDD_with_dsub0_in_FPR64_lo:sube64 |
| 125446 | 0, // DDDD_with_dsub0_in_FPR64_lo:subo32 |
| 125447 | 0, // DDDD_with_dsub0_in_FPR64_lo:subo64 |
| 125448 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_0 |
| 125449 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_1 |
| 125450 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2 |
| 125451 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_3 |
| 125452 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4 |
| 125453 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_5 |
| 125454 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6 |
| 125455 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_7 |
| 125456 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubb |
| 125457 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd0 |
| 125458 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1 |
| 125459 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh0 |
| 125460 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1 |
| 125461 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubq0 |
| 125462 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubq1 |
| 125463 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs0 |
| 125464 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1 |
| 125465 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub |
| 125466 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0 |
| 125467 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1 |
| 125468 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2 |
| 125469 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3 |
| 125470 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_hi |
| 125471 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125472 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125473 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125474 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125475 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125476 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125477 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125478 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125479 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125480 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125481 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125482 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125483 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125484 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125485 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125486 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125487 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125488 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125489 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125490 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125491 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125492 | 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125493 | 7, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125494 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub_hi |
| 125495 | 8, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 125496 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub_hi |
| 125497 | 40, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 125498 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub_hi |
| 125499 | 7, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 125500 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub_hi |
| 125501 | 8, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 125502 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub_hi |
| 125503 | 40, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 125504 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub_hi |
| 125505 | 7, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125506 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub_hi |
| 125507 | 8, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 125508 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub_hi |
| 125509 | 40, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 125510 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub_hi |
| 125511 | 0, // DDDD_with_dsub0_in_FPR64_lo:psub1_then_psub |
| 125512 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_hi |
| 125513 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3_then_dsub_hi |
| 125514 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_hi |
| 125515 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125516 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125517 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125518 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125519 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125520 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125521 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125522 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125523 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125524 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125525 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125526 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125527 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125528 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125529 | 0, // DDDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 |
| 125530 | 0, // DDDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32_hi |
| 125531 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi |
| 125532 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi |
| 125533 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi |
| 125534 | 76, // DDDD_with_dsub0_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 125535 | 111, // DDDD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 125536 | 75, // DDDD_with_dsub0_in_FPR64_lo:dsub1_dsub2 -> DD |
| 125537 | 110, // DDDD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD |
| 125538 | 75, // DDDD_with_dsub0_in_FPR64_lo:dsub2_dsub3 -> DD |
| 125539 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_dsub1 |
| 125540 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125541 | 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125542 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0_qsub1 |
| 125543 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125544 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_qsub2 |
| 125545 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125546 | 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_qsub3 |
| 125547 | 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125548 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125549 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125550 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125551 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125552 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125553 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125554 | 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125555 | 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125556 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_qsub1 |
| 125557 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125558 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125559 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub1 |
| 125560 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125561 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub2 |
| 125562 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125563 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_zsub3 |
| 125564 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub2 |
| 125565 | 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub3 |
| 125566 | }, |
| 125567 | { // DDDD_with_dsub1_in_FPR64_lo |
| 125568 | 7, // DDDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 125569 | 0, // DDDD_with_dsub1_in_FPR64_lo:bsub_hi |
| 125570 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub |
| 125571 | 56, // DDDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 |
| 125572 | 65, // DDDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 125573 | 56, // DDDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 125574 | 56, // DDDD_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 125575 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_hi |
| 125576 | 8, // DDDD_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 125577 | 0, // DDDD_with_dsub1_in_FPR64_lo:hsub_hi |
| 125578 | 0, // DDDD_with_dsub1_in_FPR64_lo:psub |
| 125579 | 0, // DDDD_with_dsub1_in_FPR64_lo:psub0 |
| 125580 | 0, // DDDD_with_dsub1_in_FPR64_lo:psub1 |
| 125581 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0 |
| 125582 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1 |
| 125583 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2 |
| 125584 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3 |
| 125585 | 40, // DDDD_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 125586 | 0, // DDDD_with_dsub1_in_FPR64_lo:ssub_hi |
| 125587 | 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32 |
| 125588 | 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 125589 | 0, // DDDD_with_dsub1_in_FPR64_lo:sube32 |
| 125590 | 0, // DDDD_with_dsub1_in_FPR64_lo:sube64 |
| 125591 | 0, // DDDD_with_dsub1_in_FPR64_lo:subo32 |
| 125592 | 0, // DDDD_with_dsub1_in_FPR64_lo:subo64 |
| 125593 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 125594 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 125595 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 125596 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 125597 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 125598 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 125599 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 125600 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 125601 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubb |
| 125602 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd0 |
| 125603 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1 |
| 125604 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh0 |
| 125605 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1 |
| 125606 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubq0 |
| 125607 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubq1 |
| 125608 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs0 |
| 125609 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1 |
| 125610 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub |
| 125611 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0 |
| 125612 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1 |
| 125613 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2 |
| 125614 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3 |
| 125615 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_hi |
| 125616 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125617 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125618 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125619 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125620 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125621 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125622 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125623 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125624 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125625 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125626 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125627 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125628 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125629 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125630 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125631 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125632 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125633 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125634 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125635 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125636 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125637 | 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125638 | 7, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125639 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 125640 | 10, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 125641 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 125642 | 44, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125643 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 125644 | 7, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 125645 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 125646 | 8, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 125647 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 125648 | 40, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 125649 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 125650 | 7, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125651 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 125652 | 8, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 125653 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 125654 | 40, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 125655 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 125656 | 0, // DDDD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 125657 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 125658 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 125659 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 125660 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125661 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125662 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125663 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125664 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125665 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125666 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125667 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125668 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125669 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125670 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125671 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125672 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125673 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125674 | 0, // DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 125675 | 0, // DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 125676 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 125677 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 125678 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 125679 | 77, // DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 125680 | 112, // DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 125681 | 76, // DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 125682 | 111, // DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 125683 | 75, // DDDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 125684 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 125685 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125686 | 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125687 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 125688 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125689 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 125690 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125691 | 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 125692 | 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125693 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125694 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125695 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125696 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125697 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125698 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125699 | 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125700 | 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125701 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 125702 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125703 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125704 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 125705 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125706 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 125707 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125708 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 125709 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 125710 | 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 125711 | }, |
| 125712 | { // DDDD_with_dsub2_in_FPR64_lo |
| 125713 | 7, // DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 125714 | 0, // DDDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 125715 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub |
| 125716 | 56, // DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 |
| 125717 | 56, // DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 125718 | 65, // DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 125719 | 56, // DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 125720 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 125721 | 8, // DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 125722 | 0, // DDDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 125723 | 0, // DDDD_with_dsub2_in_FPR64_lo:psub |
| 125724 | 0, // DDDD_with_dsub2_in_FPR64_lo:psub0 |
| 125725 | 0, // DDDD_with_dsub2_in_FPR64_lo:psub1 |
| 125726 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0 |
| 125727 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1 |
| 125728 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2 |
| 125729 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3 |
| 125730 | 40, // DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 125731 | 0, // DDDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 125732 | 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32 |
| 125733 | 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 125734 | 0, // DDDD_with_dsub2_in_FPR64_lo:sube32 |
| 125735 | 0, // DDDD_with_dsub2_in_FPR64_lo:sube64 |
| 125736 | 0, // DDDD_with_dsub2_in_FPR64_lo:subo32 |
| 125737 | 0, // DDDD_with_dsub2_in_FPR64_lo:subo64 |
| 125738 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 125739 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 125740 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 125741 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 125742 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 125743 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 125744 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 125745 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 125746 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubb |
| 125747 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 125748 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 125749 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 125750 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 125751 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 125752 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 125753 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 125754 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 125755 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub |
| 125756 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0 |
| 125757 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1 |
| 125758 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2 |
| 125759 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3 |
| 125760 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 125761 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125762 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125763 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125764 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125765 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125766 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125767 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125768 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125769 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125770 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125771 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125772 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125773 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125774 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125775 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125776 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125777 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125778 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125779 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125780 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125781 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125782 | 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125783 | 7, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125784 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 125785 | 8, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 125786 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 125787 | 40, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 125788 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 125789 | 7, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 125790 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 125791 | 8, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 125792 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 125793 | 40, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 125794 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 125795 | 7, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125796 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 125797 | 10, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 125798 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 125799 | 44, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125800 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 125801 | 0, // DDDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 125802 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 125803 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 125804 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 125805 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125806 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125807 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125808 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125809 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125810 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125811 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125812 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125813 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125814 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125815 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125816 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125817 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125818 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125819 | 0, // DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 125820 | 0, // DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 125821 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 125822 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 125823 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 125824 | 75, // DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD |
| 125825 | 113, // DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 125826 | 77, // DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 125827 | 112, // DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo |
| 125828 | 76, // DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 125829 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 125830 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125831 | 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125832 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 125833 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125834 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 125835 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125836 | 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 125837 | 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125838 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125839 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125840 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125841 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125842 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125843 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125844 | 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125845 | 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125846 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 125847 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125848 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125849 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 125850 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125851 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 125852 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125853 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 125854 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 125855 | 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 125856 | }, |
| 125857 | { // DDDD_with_dsub3_in_FPR64_lo |
| 125858 | 7, // DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 125859 | 0, // DDDD_with_dsub3_in_FPR64_lo:bsub_hi |
| 125860 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub |
| 125861 | 56, // DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 |
| 125862 | 56, // DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 125863 | 56, // DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64 |
| 125864 | 65, // DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 125865 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_hi |
| 125866 | 8, // DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 125867 | 0, // DDDD_with_dsub3_in_FPR64_lo:hsub_hi |
| 125868 | 0, // DDDD_with_dsub3_in_FPR64_lo:psub |
| 125869 | 0, // DDDD_with_dsub3_in_FPR64_lo:psub0 |
| 125870 | 0, // DDDD_with_dsub3_in_FPR64_lo:psub1 |
| 125871 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0 |
| 125872 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1 |
| 125873 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2 |
| 125874 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3 |
| 125875 | 40, // DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 125876 | 0, // DDDD_with_dsub3_in_FPR64_lo:ssub_hi |
| 125877 | 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32 |
| 125878 | 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32_hi |
| 125879 | 0, // DDDD_with_dsub3_in_FPR64_lo:sube32 |
| 125880 | 0, // DDDD_with_dsub3_in_FPR64_lo:sube64 |
| 125881 | 0, // DDDD_with_dsub3_in_FPR64_lo:subo32 |
| 125882 | 0, // DDDD_with_dsub3_in_FPR64_lo:subo64 |
| 125883 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_0 |
| 125884 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_1 |
| 125885 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2 |
| 125886 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_3 |
| 125887 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4 |
| 125888 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_5 |
| 125889 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6 |
| 125890 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_7 |
| 125891 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubb |
| 125892 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd0 |
| 125893 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1 |
| 125894 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh0 |
| 125895 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1 |
| 125896 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubq0 |
| 125897 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubq1 |
| 125898 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs0 |
| 125899 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1 |
| 125900 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub |
| 125901 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0 |
| 125902 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1 |
| 125903 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2 |
| 125904 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3 |
| 125905 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_hi |
| 125906 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 125907 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 125908 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 125909 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 125910 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 125911 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 125912 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 125913 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 125914 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 125915 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 125916 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 125917 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 125918 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 125919 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 125920 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 125921 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 125922 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 125923 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 125924 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 125925 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 125926 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 125927 | 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 125928 | 7, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 125929 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 125930 | 8, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 125931 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 125932 | 40, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 125933 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 125934 | 7, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 125935 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 125936 | 10, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 125937 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 125938 | 44, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 125939 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 125940 | 7, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 125941 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 125942 | 8, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 125943 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 125944 | 40, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 125945 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 125946 | 0, // DDDD_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 125947 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 125948 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 125949 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 125950 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 125951 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 125952 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 125953 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 125954 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 125955 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 125956 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 125957 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 125958 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 125959 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 125960 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 125961 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 125962 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 125963 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 125964 | 0, // DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 125965 | 0, // DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 125966 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 125967 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 125968 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 125969 | 75, // DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD |
| 125970 | 110, // DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD |
| 125971 | 75, // DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD |
| 125972 | 113, // DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 125973 | 77, // DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 125974 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1 |
| 125975 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 125976 | 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 |
| 125977 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 125978 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 125979 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 |
| 125980 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 125981 | 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 |
| 125982 | 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 125983 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 125984 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 125985 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 125986 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 125987 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 125988 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 125989 | 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 125990 | 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 125991 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 125992 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 125993 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 125994 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 125995 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 125996 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 125997 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 125998 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 125999 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 126000 | 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 126001 | }, |
| 126002 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 126003 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 126004 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:bsub_hi |
| 126005 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub |
| 126006 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo |
| 126007 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 126008 | 56, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 126009 | 56, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 126010 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_hi |
| 126011 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 126012 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:hsub_hi |
| 126013 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub |
| 126014 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub0 |
| 126015 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub1 |
| 126016 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0 |
| 126017 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1 |
| 126018 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2 |
| 126019 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3 |
| 126020 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126021 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:ssub_hi |
| 126022 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32 |
| 126023 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32_hi |
| 126024 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sube32 |
| 126025 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sube64 |
| 126026 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo32 |
| 126027 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo64 |
| 126028 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_0 |
| 126029 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_1 |
| 126030 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2 |
| 126031 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_3 |
| 126032 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4 |
| 126033 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_5 |
| 126034 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6 |
| 126035 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_7 |
| 126036 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubb |
| 126037 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd0 |
| 126038 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1 |
| 126039 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh0 |
| 126040 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1 |
| 126041 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubq0 |
| 126042 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubq1 |
| 126043 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs0 |
| 126044 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1 |
| 126045 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub |
| 126046 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0 |
| 126047 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1 |
| 126048 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2 |
| 126049 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3 |
| 126050 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_hi |
| 126051 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126052 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126053 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126054 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126055 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126056 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126057 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126058 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126059 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126060 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126061 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126062 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126063 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126064 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126065 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126066 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126067 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126068 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126069 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126070 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126071 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126072 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126073 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126074 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 126075 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 126076 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 126077 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126078 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 126079 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126080 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 126081 | 8, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 126082 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 126083 | 40, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 126084 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 126085 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126086 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 126087 | 8, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 126088 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 126089 | 40, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 126090 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 126091 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 126092 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 126093 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 126094 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 126095 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126096 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126097 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126098 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126099 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126100 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126101 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126102 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126103 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126104 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126105 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126106 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126107 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126108 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126109 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 126110 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 126111 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 126112 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 126113 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 126114 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126115 | 114, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 126116 | 76, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 126117 | 111, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 126118 | 75, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 126119 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1 |
| 126120 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126121 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126122 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 126123 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126124 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 126125 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126126 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 126127 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126128 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126129 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126130 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126131 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126132 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126133 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126134 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126135 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126136 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 126137 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126138 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126139 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 126140 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126141 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 126142 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126143 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 126144 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 126145 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 126146 | }, |
| 126147 | { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 126148 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 126149 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 126150 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub |
| 126151 | 56, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 |
| 126152 | 65, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 126153 | 65, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 126154 | 56, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 126155 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 126156 | 8, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 126157 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 126158 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub |
| 126159 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub0 |
| 126160 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1 |
| 126161 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0 |
| 126162 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1 |
| 126163 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2 |
| 126164 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3 |
| 126165 | 40, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 126166 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 126167 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32 |
| 126168 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 126169 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube32 |
| 126170 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube64 |
| 126171 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo32 |
| 126172 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64 |
| 126173 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 126174 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 126175 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 126176 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 126177 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 126178 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 126179 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 126180 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 126181 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubb |
| 126182 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 126183 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 126184 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 126185 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 126186 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 126187 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 126188 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 126189 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 126190 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub |
| 126191 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0 |
| 126192 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1 |
| 126193 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2 |
| 126194 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3 |
| 126195 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 126196 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126197 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126198 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126199 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126200 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126201 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126202 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126203 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126204 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126205 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126206 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126207 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126208 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126209 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126210 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126211 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126212 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126213 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126214 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126215 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126216 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126217 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126218 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126219 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 126220 | 10, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 126221 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 126222 | 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126223 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 126224 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126225 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 126226 | 8, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 126227 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 126228 | 40, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 126229 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 126230 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126231 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 126232 | 10, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 126233 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 126234 | 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126235 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 126236 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 126237 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 126238 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 126239 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 126240 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126241 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126242 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126243 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126244 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126245 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126246 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126247 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126248 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126249 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126250 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126251 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126252 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126253 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126254 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 126255 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 126256 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 126257 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 126258 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 126259 | 77, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 126260 | 115, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126261 | 79, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126262 | 114, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 126263 | 76, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 126264 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 126265 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126266 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126267 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 126268 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126269 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 126270 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126271 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 126272 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126273 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126274 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126275 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126276 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126277 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126278 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126279 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126280 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126281 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 126282 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126283 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126284 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 126285 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126286 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 126287 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126288 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 126289 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 126290 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 126291 | }, |
| 126292 | { // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 126293 | 7, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 126294 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub_hi |
| 126295 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub |
| 126296 | 56, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 |
| 126297 | 56, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 126298 | 65, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 126299 | 65, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 126300 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_hi |
| 126301 | 8, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 126302 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub_hi |
| 126303 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub |
| 126304 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 |
| 126305 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 |
| 126306 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 |
| 126307 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 |
| 126308 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 |
| 126309 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 |
| 126310 | 40, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 126311 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub_hi |
| 126312 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 |
| 126313 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_hi |
| 126314 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 |
| 126315 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 |
| 126316 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 |
| 126317 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 |
| 126318 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 |
| 126319 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 |
| 126320 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 |
| 126321 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 |
| 126322 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 |
| 126323 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 |
| 126324 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 |
| 126325 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 |
| 126326 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb |
| 126327 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 |
| 126328 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 |
| 126329 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 |
| 126330 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 |
| 126331 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 |
| 126332 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 |
| 126333 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 |
| 126334 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 |
| 126335 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub |
| 126336 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 |
| 126337 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 |
| 126338 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 |
| 126339 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 |
| 126340 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi |
| 126341 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126342 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126343 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126344 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126345 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126346 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126347 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126348 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126349 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126350 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126351 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126352 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126353 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126354 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126355 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126356 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126357 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126358 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126359 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126360 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126361 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126362 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126363 | 7, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126364 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 126365 | 8, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 126366 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 126367 | 40, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 126368 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 126369 | 7, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126370 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 126371 | 10, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 126372 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 126373 | 44, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126374 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 126375 | 7, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126376 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 126377 | 10, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 126378 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 126379 | 44, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126380 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 126381 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 126382 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 126383 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 126384 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 126385 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126386 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126387 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126388 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126389 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126390 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126391 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126392 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126393 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126394 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126395 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126396 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126397 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126398 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126399 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 126400 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 126401 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 126402 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 126403 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 126404 | 75, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD |
| 126405 | 113, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 126406 | 77, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 126407 | 115, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126408 | 79, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126409 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1 |
| 126410 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126411 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126412 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 126413 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126414 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 |
| 126415 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126416 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 |
| 126417 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126418 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126419 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126420 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126421 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126422 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126423 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126424 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126425 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126426 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 126427 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126428 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126429 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 126430 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126431 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 126432 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126433 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 126434 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 126435 | 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 126436 | }, |
| 126437 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 126438 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 126439 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub_hi |
| 126440 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub |
| 126441 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64_lo |
| 126442 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 126443 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 126444 | 56, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 126445 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_hi |
| 126446 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 126447 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub_hi |
| 126448 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub |
| 126449 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub0 |
| 126450 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1 |
| 126451 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0 |
| 126452 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1 |
| 126453 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2 |
| 126454 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3 |
| 126455 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126456 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub_hi |
| 126457 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32 |
| 126458 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_hi |
| 126459 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube32 |
| 126460 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube64 |
| 126461 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo32 |
| 126462 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64 |
| 126463 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0 |
| 126464 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1 |
| 126465 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2 |
| 126466 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3 |
| 126467 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4 |
| 126468 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5 |
| 126469 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6 |
| 126470 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7 |
| 126471 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubb |
| 126472 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd0 |
| 126473 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1 |
| 126474 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh0 |
| 126475 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1 |
| 126476 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq0 |
| 126477 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq1 |
| 126478 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs0 |
| 126479 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1 |
| 126480 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub |
| 126481 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0 |
| 126482 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1 |
| 126483 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2 |
| 126484 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3 |
| 126485 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_hi |
| 126486 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126487 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126488 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126489 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126490 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126491 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126492 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126493 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126494 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126495 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126496 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126497 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126498 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126499 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126500 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126501 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126502 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126503 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126504 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126505 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126506 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126507 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126508 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126509 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 126510 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 126511 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 126512 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126513 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 126514 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126515 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 126516 | 8, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 126517 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 126518 | 40, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 126519 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 126520 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126521 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 126522 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 126523 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 126524 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126525 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 126526 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 126527 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 126528 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 126529 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 126530 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126531 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126532 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126533 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126534 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126535 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126536 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126537 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126538 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126539 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126540 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126541 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126542 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126543 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126544 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 126545 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 126546 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 126547 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 126548 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 126549 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126550 | 116, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126551 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126552 | 114, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 126553 | 76, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 126554 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1 |
| 126555 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126556 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126557 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 126558 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126559 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 |
| 126560 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126561 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 126562 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126563 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126564 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126565 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126566 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126567 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126568 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126569 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126570 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126571 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 126572 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126573 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126574 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 126575 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126576 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 126577 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126578 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 126579 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 126580 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 126581 | }, |
| 126582 | { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 126583 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 126584 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub_hi |
| 126585 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub |
| 126586 | 56, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 |
| 126587 | 65, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 126588 | 65, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 126589 | 65, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 126590 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_hi |
| 126591 | 8, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 126592 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub_hi |
| 126593 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub |
| 126594 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 |
| 126595 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 |
| 126596 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 |
| 126597 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 |
| 126598 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 |
| 126599 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 |
| 126600 | 40, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 126601 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub_hi |
| 126602 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 |
| 126603 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_hi |
| 126604 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 |
| 126605 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 |
| 126606 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 |
| 126607 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 |
| 126608 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 |
| 126609 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 |
| 126610 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 |
| 126611 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 |
| 126612 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 |
| 126613 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 |
| 126614 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 |
| 126615 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 |
| 126616 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb |
| 126617 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 |
| 126618 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 |
| 126619 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 |
| 126620 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 |
| 126621 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 |
| 126622 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 |
| 126623 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 |
| 126624 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 |
| 126625 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub |
| 126626 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 |
| 126627 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 |
| 126628 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 |
| 126629 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 |
| 126630 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi |
| 126631 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126632 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126633 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126634 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126635 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126636 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126637 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126638 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126639 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126640 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126641 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126642 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126643 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126644 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126645 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126646 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126647 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126648 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126649 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126650 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126651 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126652 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126653 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126654 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 126655 | 10, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 126656 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 126657 | 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126658 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 126659 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126660 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 126661 | 10, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 126662 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 126663 | 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126664 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 126665 | 7, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126666 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 126667 | 10, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 126668 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 126669 | 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126670 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 126671 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 126672 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 126673 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 126674 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 126675 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126676 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126677 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126678 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126679 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126680 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126681 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126682 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126683 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126684 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126685 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126686 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126687 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126688 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126689 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 126690 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 126691 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 126692 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 126693 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 126694 | 77, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 126695 | 115, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126696 | 79, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126697 | 116, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126698 | 79, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126699 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1 |
| 126700 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126701 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126702 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 126703 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126704 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 |
| 126705 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126706 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 |
| 126707 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126708 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126709 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126710 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126711 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126712 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126713 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126714 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126715 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126716 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 126717 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126718 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126719 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 126720 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126721 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 126722 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126723 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 126724 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 126725 | 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 126726 | }, |
| 126727 | { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 126728 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 126729 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub_hi |
| 126730 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub |
| 126731 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64_lo |
| 126732 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 126733 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 126734 | 65, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 126735 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_hi |
| 126736 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16_lo |
| 126737 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub_hi |
| 126738 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub |
| 126739 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 |
| 126740 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 |
| 126741 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 |
| 126742 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 |
| 126743 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 |
| 126744 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 |
| 126745 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126746 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub_hi |
| 126747 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 |
| 126748 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_hi |
| 126749 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 |
| 126750 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 |
| 126751 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 |
| 126752 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 |
| 126753 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 |
| 126754 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 |
| 126755 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 |
| 126756 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 |
| 126757 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 |
| 126758 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 |
| 126759 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 |
| 126760 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 |
| 126761 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb |
| 126762 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 |
| 126763 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 |
| 126764 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 |
| 126765 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 |
| 126766 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 |
| 126767 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 |
| 126768 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 |
| 126769 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 |
| 126770 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub |
| 126771 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 |
| 126772 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 |
| 126773 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 |
| 126774 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 |
| 126775 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi |
| 126776 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 126777 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 126778 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 126779 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 126780 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 126781 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 126782 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 126783 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 126784 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 126785 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 126786 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 126787 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 126788 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 126789 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 126790 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 126791 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 126792 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 126793 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 126794 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 126795 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 126796 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126797 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126798 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 126799 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 126800 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 126801 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 126802 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126803 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 126804 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 126805 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 126806 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 126807 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 126808 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126809 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 126810 | 7, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 126811 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 126812 | 10, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 126813 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 126814 | 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 126815 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 126816 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 126817 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 126818 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 126819 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 126820 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 126821 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 126822 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 126823 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 126824 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 126825 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 126826 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 126827 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 126828 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 126829 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 126830 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 126831 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 126832 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 126833 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 126834 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 126835 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 126836 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 126837 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 126838 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 126839 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126840 | 116, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126841 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126842 | 116, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 126843 | 79, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 126844 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1 |
| 126845 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 126846 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 |
| 126847 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 126848 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 126849 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 |
| 126850 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 126851 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 |
| 126852 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 126853 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 126854 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 126855 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 126856 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 126857 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 126858 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 126859 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 126860 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 126861 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 126862 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 126863 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 126864 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 126865 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 126866 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 126867 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 126868 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 126869 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 126870 | 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 126871 | }, |
| 126872 | |
| 126873 | 7, // QQ:bsub -> FPR8 |
| 126874 | 0, // QQ:bsub_hi |
| 126875 | 56, // QQ:dsub -> FPR64 |
| 126876 | 0, // QQ:dsub0 |
| 126877 | 56, // QQ:dsub1 -> FPR64 |
| 126878 | 0, // QQ:dsub2 |
| 126879 | 0, // QQ:dsub3 |
| 126880 | 0, // QQ:dsub_hi |
| 126881 | 8, // QQ:hsub -> FPR16 |
| 126882 | 0, // QQ:hsub_hi |
| 126883 | 0, // QQ:psub |
| 126884 | 0, // QQ:psub0 |
| 126885 | 0, // QQ:psub1 |
| 126886 | 92, // QQ:qsub0 -> FPR128 |
| 126887 | 92, // QQ:qsub1 -> FPR128 |
| 126888 | 0, // QQ:qsub2 |
| 126889 | 0, // QQ:qsub3 |
| 126890 | 40, // QQ:ssub -> FPR32 |
| 126891 | 0, // QQ:ssub_hi |
| 126892 | 0, // QQ:sub_32 |
| 126893 | 0, // QQ:sub_32_hi |
| 126894 | 0, // QQ:sube32 |
| 126895 | 0, // QQ:sube64 |
| 126896 | 0, // QQ:subo32 |
| 126897 | 0, // QQ:subo64 |
| 126898 | 0, // QQ:x8sub_0 |
| 126899 | 0, // QQ:x8sub_1 |
| 126900 | 0, // QQ:x8sub_2 |
| 126901 | 0, // QQ:x8sub_3 |
| 126902 | 0, // QQ:x8sub_4 |
| 126903 | 0, // QQ:x8sub_5 |
| 126904 | 0, // QQ:x8sub_6 |
| 126905 | 0, // QQ:x8sub_7 |
| 126906 | 0, // QQ:zasubb |
| 126907 | 0, // QQ:zasubd0 |
| 126908 | 0, // QQ:zasubd1 |
| 126909 | 0, // QQ:zasubh0 |
| 126910 | 0, // QQ:zasubh1 |
| 126911 | 0, // QQ:zasubq0 |
| 126912 | 0, // QQ:zasubq1 |
| 126913 | 0, // QQ:zasubs0 |
| 126914 | 0, // QQ:zasubs1 |
| 126915 | 0, // QQ:zsub |
| 126916 | 0, // QQ:zsub0 |
| 126917 | 0, // QQ:zsub1 |
| 126918 | 0, // QQ:zsub2 |
| 126919 | 0, // QQ:zsub3 |
| 126920 | 0, // QQ:zsub_hi |
| 126921 | 0, // QQ:zasubd1_then_zasubq0 |
| 126922 | 0, // QQ:zasubd1_then_zasubq1 |
| 126923 | 0, // QQ:zasubs1_then_zasubd0 |
| 126924 | 0, // QQ:zasubs1_then_zasubd1 |
| 126925 | 0, // QQ:zasubs1_then_zasubq0 |
| 126926 | 0, // QQ:zasubs1_then_zasubq1 |
| 126927 | 0, // QQ:zasubs1_then_zasubd1_then_zasubq0 |
| 126928 | 0, // QQ:zasubs1_then_zasubd1_then_zasubq1 |
| 126929 | 0, // QQ:zasubh1_then_zasubd0 |
| 126930 | 0, // QQ:zasubh1_then_zasubd1 |
| 126931 | 0, // QQ:zasubh1_then_zasubq0 |
| 126932 | 0, // QQ:zasubh1_then_zasubq1 |
| 126933 | 0, // QQ:zasubh1_then_zasubs0 |
| 126934 | 0, // QQ:zasubh1_then_zasubs1 |
| 126935 | 0, // QQ:zasubh1_then_zasubd1_then_zasubq0 |
| 126936 | 0, // QQ:zasubh1_then_zasubd1_then_zasubq1 |
| 126937 | 0, // QQ:zasubh1_then_zasubs1_then_zasubd0 |
| 126938 | 0, // QQ:zasubh1_then_zasubs1_then_zasubd1 |
| 126939 | 0, // QQ:zasubh1_then_zasubs1_then_zasubq0 |
| 126940 | 0, // QQ:zasubh1_then_zasubs1_then_zasubq1 |
| 126941 | 0, // QQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 126942 | 0, // QQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 126943 | 7, // QQ:dsub1_then_bsub -> FPR8 |
| 126944 | 0, // QQ:dsub1_then_bsub_hi |
| 126945 | 8, // QQ:dsub1_then_hsub -> FPR16 |
| 126946 | 0, // QQ:dsub1_then_hsub_hi |
| 126947 | 40, // QQ:dsub1_then_ssub -> FPR32 |
| 126948 | 0, // QQ:dsub1_then_ssub_hi |
| 126949 | 0, // QQ:dsub3_then_bsub |
| 126950 | 0, // QQ:dsub3_then_bsub_hi |
| 126951 | 0, // QQ:dsub3_then_hsub |
| 126952 | 0, // QQ:dsub3_then_hsub_hi |
| 126953 | 0, // QQ:dsub3_then_ssub |
| 126954 | 0, // QQ:dsub3_then_ssub_hi |
| 126955 | 0, // QQ:dsub2_then_bsub |
| 126956 | 0, // QQ:dsub2_then_bsub_hi |
| 126957 | 0, // QQ:dsub2_then_hsub |
| 126958 | 0, // QQ:dsub2_then_hsub_hi |
| 126959 | 0, // QQ:dsub2_then_ssub |
| 126960 | 0, // QQ:dsub2_then_ssub_hi |
| 126961 | 0, // QQ:psub1_then_psub |
| 126962 | 0, // QQ:qsub1_then_dsub_hi |
| 126963 | 0, // QQ:qsub3_then_dsub_hi |
| 126964 | 0, // QQ:qsub2_then_dsub_hi |
| 126965 | 0, // QQ:x8sub_7_then_sub_32 |
| 126966 | 0, // QQ:x8sub_7_then_sub_32_hi |
| 126967 | 0, // QQ:x8sub_6_then_sub_32 |
| 126968 | 0, // QQ:x8sub_6_then_sub_32_hi |
| 126969 | 0, // QQ:x8sub_5_then_sub_32 |
| 126970 | 0, // QQ:x8sub_5_then_sub_32_hi |
| 126971 | 0, // QQ:x8sub_4_then_sub_32 |
| 126972 | 0, // QQ:x8sub_4_then_sub_32_hi |
| 126973 | 0, // QQ:x8sub_3_then_sub_32 |
| 126974 | 0, // QQ:x8sub_3_then_sub_32_hi |
| 126975 | 0, // QQ:x8sub_2_then_sub_32 |
| 126976 | 0, // QQ:x8sub_2_then_sub_32_hi |
| 126977 | 0, // QQ:x8sub_1_then_sub_32 |
| 126978 | 0, // QQ:x8sub_1_then_sub_32_hi |
| 126979 | 0, // QQ:subo64_then_sub_32 |
| 126980 | 0, // QQ:subo64_then_sub_32_hi |
| 126981 | 0, // QQ:zsub1_then_zsub_hi |
| 126982 | 0, // QQ:zsub3_then_zsub_hi |
| 126983 | 0, // QQ:zsub2_then_zsub_hi |
| 126984 | 0, // QQ:dsub0_dsub1 |
| 126985 | 0, // QQ:dsub0_dsub1_dsub2 |
| 126986 | 0, // QQ:dsub1_dsub2 |
| 126987 | 0, // QQ:dsub1_dsub2_dsub3 |
| 126988 | 0, // QQ:dsub2_dsub3 |
| 126989 | 75, // QQ:dsub_dsub1 -> DD |
| 126990 | 0, // QQ:dsub_dsub1_dsub2_dsub3 |
| 126991 | 0, // QQ:dsub_dsub1_dsub2 |
| 126992 | 0, // QQ:qsub0_qsub1 |
| 126993 | 0, // QQ:qsub0_qsub1_qsub2 |
| 126994 | 0, // QQ:qsub1_qsub2 |
| 126995 | 0, // QQ:qsub1_qsub2_qsub3 |
| 126996 | 0, // QQ:qsub2_qsub3 |
| 126997 | 0, // QQ:sub_32_x8sub_1_then_sub_32 |
| 126998 | 0, // QQ:x8sub_0_x8sub_1 |
| 126999 | 0, // QQ:x8sub_2_x8sub_3 |
| 127000 | 0, // QQ:x8sub_4_x8sub_5 |
| 127001 | 0, // QQ:x8sub_6_x8sub_7 |
| 127002 | 0, // QQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127003 | 0, // QQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127004 | 0, // QQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127005 | 0, // QQ:sub_32_subo64_then_sub_32 |
| 127006 | 0, // QQ:zsub_qsub1 |
| 127007 | 0, // QQ:zsub_qsub1_qsub2_qsub3 |
| 127008 | 0, // QQ:zsub_qsub1_qsub2 |
| 127009 | 0, // QQ:zsub0_zsub1 |
| 127010 | 0, // QQ:zsub0_zsub1_zsub2 |
| 127011 | 0, // QQ:zsub1_zsub2 |
| 127012 | 0, // QQ:zsub1_zsub2_zsub3 |
| 127013 | 0, // QQ:zsub2_zsub3 |
| 127014 | 0, // QQ:zsub0_zsub2 |
| 127015 | 0, // QQ:zsub1_zsub3 |
| 127016 | }, |
| 127017 | { // ZPR2 |
| 127018 | 7, // ZPR2:bsub -> FPR8 |
| 127019 | 0, // ZPR2:bsub_hi |
| 127020 | 56, // ZPR2:dsub -> FPR64 |
| 127021 | 0, // ZPR2:dsub0 |
| 127022 | 56, // ZPR2:dsub1 -> FPR64 |
| 127023 | 0, // ZPR2:dsub2 |
| 127024 | 0, // ZPR2:dsub3 |
| 127025 | 0, // ZPR2:dsub_hi |
| 127026 | 8, // ZPR2:hsub -> FPR16 |
| 127027 | 0, // ZPR2:hsub_hi |
| 127028 | 0, // ZPR2:psub |
| 127029 | 0, // ZPR2:psub0 |
| 127030 | 0, // ZPR2:psub1 |
| 127031 | 0, // ZPR2:qsub0 |
| 127032 | 92, // ZPR2:qsub1 -> FPR128 |
| 127033 | 0, // ZPR2:qsub2 |
| 127034 | 0, // ZPR2:qsub3 |
| 127035 | 40, // ZPR2:ssub -> FPR32 |
| 127036 | 0, // ZPR2:ssub_hi |
| 127037 | 0, // ZPR2:sub_32 |
| 127038 | 0, // ZPR2:sub_32_hi |
| 127039 | 0, // ZPR2:sube32 |
| 127040 | 0, // ZPR2:sube64 |
| 127041 | 0, // ZPR2:subo32 |
| 127042 | 0, // ZPR2:subo64 |
| 127043 | 0, // ZPR2:x8sub_0 |
| 127044 | 0, // ZPR2:x8sub_1 |
| 127045 | 0, // ZPR2:x8sub_2 |
| 127046 | 0, // ZPR2:x8sub_3 |
| 127047 | 0, // ZPR2:x8sub_4 |
| 127048 | 0, // ZPR2:x8sub_5 |
| 127049 | 0, // ZPR2:x8sub_6 |
| 127050 | 0, // ZPR2:x8sub_7 |
| 127051 | 0, // ZPR2:zasubb |
| 127052 | 0, // ZPR2:zasubd0 |
| 127053 | 0, // ZPR2:zasubd1 |
| 127054 | 0, // ZPR2:zasubh0 |
| 127055 | 0, // ZPR2:zasubh1 |
| 127056 | 0, // ZPR2:zasubq0 |
| 127057 | 0, // ZPR2:zasubq1 |
| 127058 | 0, // ZPR2:zasubs0 |
| 127059 | 0, // ZPR2:zasubs1 |
| 127060 | 92, // ZPR2:zsub -> FPR128 |
| 127061 | 93, // ZPR2:zsub0 -> ZPR |
| 127062 | 93, // ZPR2:zsub1 -> ZPR |
| 127063 | 0, // ZPR2:zsub2 |
| 127064 | 0, // ZPR2:zsub3 |
| 127065 | 0, // ZPR2:zsub_hi |
| 127066 | 0, // ZPR2:zasubd1_then_zasubq0 |
| 127067 | 0, // ZPR2:zasubd1_then_zasubq1 |
| 127068 | 0, // ZPR2:zasubs1_then_zasubd0 |
| 127069 | 0, // ZPR2:zasubs1_then_zasubd1 |
| 127070 | 0, // ZPR2:zasubs1_then_zasubq0 |
| 127071 | 0, // ZPR2:zasubs1_then_zasubq1 |
| 127072 | 0, // ZPR2:zasubs1_then_zasubd1_then_zasubq0 |
| 127073 | 0, // ZPR2:zasubs1_then_zasubd1_then_zasubq1 |
| 127074 | 0, // ZPR2:zasubh1_then_zasubd0 |
| 127075 | 0, // ZPR2:zasubh1_then_zasubd1 |
| 127076 | 0, // ZPR2:zasubh1_then_zasubq0 |
| 127077 | 0, // ZPR2:zasubh1_then_zasubq1 |
| 127078 | 0, // ZPR2:zasubh1_then_zasubs0 |
| 127079 | 0, // ZPR2:zasubh1_then_zasubs1 |
| 127080 | 0, // ZPR2:zasubh1_then_zasubd1_then_zasubq0 |
| 127081 | 0, // ZPR2:zasubh1_then_zasubd1_then_zasubq1 |
| 127082 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd0 |
| 127083 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1 |
| 127084 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubq0 |
| 127085 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubq1 |
| 127086 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127087 | 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127088 | 7, // ZPR2:dsub1_then_bsub -> FPR8 |
| 127089 | 0, // ZPR2:dsub1_then_bsub_hi |
| 127090 | 8, // ZPR2:dsub1_then_hsub -> FPR16 |
| 127091 | 0, // ZPR2:dsub1_then_hsub_hi |
| 127092 | 40, // ZPR2:dsub1_then_ssub -> FPR32 |
| 127093 | 0, // ZPR2:dsub1_then_ssub_hi |
| 127094 | 0, // ZPR2:dsub3_then_bsub |
| 127095 | 0, // ZPR2:dsub3_then_bsub_hi |
| 127096 | 0, // ZPR2:dsub3_then_hsub |
| 127097 | 0, // ZPR2:dsub3_then_hsub_hi |
| 127098 | 0, // ZPR2:dsub3_then_ssub |
| 127099 | 0, // ZPR2:dsub3_then_ssub_hi |
| 127100 | 0, // ZPR2:dsub2_then_bsub |
| 127101 | 0, // ZPR2:dsub2_then_bsub_hi |
| 127102 | 0, // ZPR2:dsub2_then_hsub |
| 127103 | 0, // ZPR2:dsub2_then_hsub_hi |
| 127104 | 0, // ZPR2:dsub2_then_ssub |
| 127105 | 0, // ZPR2:dsub2_then_ssub_hi |
| 127106 | 0, // ZPR2:psub1_then_psub |
| 127107 | 0, // ZPR2:qsub1_then_dsub_hi |
| 127108 | 0, // ZPR2:qsub3_then_dsub_hi |
| 127109 | 0, // ZPR2:qsub2_then_dsub_hi |
| 127110 | 0, // ZPR2:x8sub_7_then_sub_32 |
| 127111 | 0, // ZPR2:x8sub_7_then_sub_32_hi |
| 127112 | 0, // ZPR2:x8sub_6_then_sub_32 |
| 127113 | 0, // ZPR2:x8sub_6_then_sub_32_hi |
| 127114 | 0, // ZPR2:x8sub_5_then_sub_32 |
| 127115 | 0, // ZPR2:x8sub_5_then_sub_32_hi |
| 127116 | 0, // ZPR2:x8sub_4_then_sub_32 |
| 127117 | 0, // ZPR2:x8sub_4_then_sub_32_hi |
| 127118 | 0, // ZPR2:x8sub_3_then_sub_32 |
| 127119 | 0, // ZPR2:x8sub_3_then_sub_32_hi |
| 127120 | 0, // ZPR2:x8sub_2_then_sub_32 |
| 127121 | 0, // ZPR2:x8sub_2_then_sub_32_hi |
| 127122 | 0, // ZPR2:x8sub_1_then_sub_32 |
| 127123 | 0, // ZPR2:x8sub_1_then_sub_32_hi |
| 127124 | 0, // ZPR2:subo64_then_sub_32 |
| 127125 | 0, // ZPR2:subo64_then_sub_32_hi |
| 127126 | 0, // ZPR2:zsub1_then_zsub_hi |
| 127127 | 0, // ZPR2:zsub3_then_zsub_hi |
| 127128 | 0, // ZPR2:zsub2_then_zsub_hi |
| 127129 | 0, // ZPR2:dsub0_dsub1 |
| 127130 | 0, // ZPR2:dsub0_dsub1_dsub2 |
| 127131 | 0, // ZPR2:dsub1_dsub2 |
| 127132 | 0, // ZPR2:dsub1_dsub2_dsub3 |
| 127133 | 0, // ZPR2:dsub2_dsub3 |
| 127134 | 75, // ZPR2:dsub_dsub1 -> DD |
| 127135 | 0, // ZPR2:dsub_dsub1_dsub2_dsub3 |
| 127136 | 0, // ZPR2:dsub_dsub1_dsub2 |
| 127137 | 0, // ZPR2:qsub0_qsub1 |
| 127138 | 0, // ZPR2:qsub0_qsub1_qsub2 |
| 127139 | 0, // ZPR2:qsub1_qsub2 |
| 127140 | 0, // ZPR2:qsub1_qsub2_qsub3 |
| 127141 | 0, // ZPR2:qsub2_qsub3 |
| 127142 | 0, // ZPR2:sub_32_x8sub_1_then_sub_32 |
| 127143 | 0, // ZPR2:x8sub_0_x8sub_1 |
| 127144 | 0, // ZPR2:x8sub_2_x8sub_3 |
| 127145 | 0, // ZPR2:x8sub_4_x8sub_5 |
| 127146 | 0, // ZPR2:x8sub_6_x8sub_7 |
| 127147 | 0, // ZPR2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127148 | 0, // ZPR2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127149 | 0, // ZPR2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127150 | 0, // ZPR2:sub_32_subo64_then_sub_32 |
| 127151 | 128, // ZPR2:zsub_qsub1 -> QQ |
| 127152 | 0, // ZPR2:zsub_qsub1_qsub2_qsub3 |
| 127153 | 0, // ZPR2:zsub_qsub1_qsub2 |
| 127154 | 0, // ZPR2:zsub0_zsub1 |
| 127155 | 0, // ZPR2:zsub0_zsub1_zsub2 |
| 127156 | 0, // ZPR2:zsub1_zsub2 |
| 127157 | 0, // ZPR2:zsub1_zsub2_zsub3 |
| 127158 | 0, // ZPR2:zsub2_zsub3 |
| 127159 | 0, // ZPR2:zsub0_zsub2 |
| 127160 | 0, // ZPR2:zsub1_zsub3 |
| 127161 | }, |
| 127162 | { // ZPR2StridedOrContiguous |
| 127163 | 7, // ZPR2StridedOrContiguous:bsub -> FPR8 |
| 127164 | 0, // ZPR2StridedOrContiguous:bsub_hi |
| 127165 | 56, // ZPR2StridedOrContiguous:dsub -> FPR64 |
| 127166 | 0, // ZPR2StridedOrContiguous:dsub0 |
| 127167 | 56, // ZPR2StridedOrContiguous:dsub1 -> FPR64 |
| 127168 | 0, // ZPR2StridedOrContiguous:dsub2 |
| 127169 | 0, // ZPR2StridedOrContiguous:dsub3 |
| 127170 | 0, // ZPR2StridedOrContiguous:dsub_hi |
| 127171 | 8, // ZPR2StridedOrContiguous:hsub -> FPR16 |
| 127172 | 0, // ZPR2StridedOrContiguous:hsub_hi |
| 127173 | 0, // ZPR2StridedOrContiguous:psub |
| 127174 | 0, // ZPR2StridedOrContiguous:psub0 |
| 127175 | 0, // ZPR2StridedOrContiguous:psub1 |
| 127176 | 0, // ZPR2StridedOrContiguous:qsub0 |
| 127177 | 92, // ZPR2StridedOrContiguous:qsub1 -> FPR128 |
| 127178 | 0, // ZPR2StridedOrContiguous:qsub2 |
| 127179 | 0, // ZPR2StridedOrContiguous:qsub3 |
| 127180 | 40, // ZPR2StridedOrContiguous:ssub -> FPR32 |
| 127181 | 0, // ZPR2StridedOrContiguous:ssub_hi |
| 127182 | 0, // ZPR2StridedOrContiguous:sub_32 |
| 127183 | 0, // ZPR2StridedOrContiguous:sub_32_hi |
| 127184 | 0, // ZPR2StridedOrContiguous:sube32 |
| 127185 | 0, // ZPR2StridedOrContiguous:sube64 |
| 127186 | 0, // ZPR2StridedOrContiguous:subo32 |
| 127187 | 0, // ZPR2StridedOrContiguous:subo64 |
| 127188 | 0, // ZPR2StridedOrContiguous:x8sub_0 |
| 127189 | 0, // ZPR2StridedOrContiguous:x8sub_1 |
| 127190 | 0, // ZPR2StridedOrContiguous:x8sub_2 |
| 127191 | 0, // ZPR2StridedOrContiguous:x8sub_3 |
| 127192 | 0, // ZPR2StridedOrContiguous:x8sub_4 |
| 127193 | 0, // ZPR2StridedOrContiguous:x8sub_5 |
| 127194 | 0, // ZPR2StridedOrContiguous:x8sub_6 |
| 127195 | 0, // ZPR2StridedOrContiguous:x8sub_7 |
| 127196 | 0, // ZPR2StridedOrContiguous:zasubb |
| 127197 | 0, // ZPR2StridedOrContiguous:zasubd0 |
| 127198 | 0, // ZPR2StridedOrContiguous:zasubd1 |
| 127199 | 0, // ZPR2StridedOrContiguous:zasubh0 |
| 127200 | 0, // ZPR2StridedOrContiguous:zasubh1 |
| 127201 | 0, // ZPR2StridedOrContiguous:zasubq0 |
| 127202 | 0, // ZPR2StridedOrContiguous:zasubq1 |
| 127203 | 0, // ZPR2StridedOrContiguous:zasubs0 |
| 127204 | 0, // ZPR2StridedOrContiguous:zasubs1 |
| 127205 | 92, // ZPR2StridedOrContiguous:zsub -> FPR128 |
| 127206 | 93, // ZPR2StridedOrContiguous:zsub0 -> ZPR |
| 127207 | 93, // ZPR2StridedOrContiguous:zsub1 -> ZPR |
| 127208 | 0, // ZPR2StridedOrContiguous:zsub2 |
| 127209 | 0, // ZPR2StridedOrContiguous:zsub3 |
| 127210 | 0, // ZPR2StridedOrContiguous:zsub_hi |
| 127211 | 0, // ZPR2StridedOrContiguous:zasubd1_then_zasubq0 |
| 127212 | 0, // ZPR2StridedOrContiguous:zasubd1_then_zasubq1 |
| 127213 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubd0 |
| 127214 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubd1 |
| 127215 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubq0 |
| 127216 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubq1 |
| 127217 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubd1_then_zasubq0 |
| 127218 | 0, // ZPR2StridedOrContiguous:zasubs1_then_zasubd1_then_zasubq1 |
| 127219 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubd0 |
| 127220 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubd1 |
| 127221 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubq0 |
| 127222 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubq1 |
| 127223 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs0 |
| 127224 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1 |
| 127225 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubd1_then_zasubq0 |
| 127226 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubd1_then_zasubq1 |
| 127227 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd0 |
| 127228 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1 |
| 127229 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubq0 |
| 127230 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubq1 |
| 127231 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127232 | 0, // ZPR2StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127233 | 7, // ZPR2StridedOrContiguous:dsub1_then_bsub -> FPR8 |
| 127234 | 0, // ZPR2StridedOrContiguous:dsub1_then_bsub_hi |
| 127235 | 8, // ZPR2StridedOrContiguous:dsub1_then_hsub -> FPR16 |
| 127236 | 0, // ZPR2StridedOrContiguous:dsub1_then_hsub_hi |
| 127237 | 40, // ZPR2StridedOrContiguous:dsub1_then_ssub -> FPR32 |
| 127238 | 0, // ZPR2StridedOrContiguous:dsub1_then_ssub_hi |
| 127239 | 0, // ZPR2StridedOrContiguous:dsub3_then_bsub |
| 127240 | 0, // ZPR2StridedOrContiguous:dsub3_then_bsub_hi |
| 127241 | 0, // ZPR2StridedOrContiguous:dsub3_then_hsub |
| 127242 | 0, // ZPR2StridedOrContiguous:dsub3_then_hsub_hi |
| 127243 | 0, // ZPR2StridedOrContiguous:dsub3_then_ssub |
| 127244 | 0, // ZPR2StridedOrContiguous:dsub3_then_ssub_hi |
| 127245 | 0, // ZPR2StridedOrContiguous:dsub2_then_bsub |
| 127246 | 0, // ZPR2StridedOrContiguous:dsub2_then_bsub_hi |
| 127247 | 0, // ZPR2StridedOrContiguous:dsub2_then_hsub |
| 127248 | 0, // ZPR2StridedOrContiguous:dsub2_then_hsub_hi |
| 127249 | 0, // ZPR2StridedOrContiguous:dsub2_then_ssub |
| 127250 | 0, // ZPR2StridedOrContiguous:dsub2_then_ssub_hi |
| 127251 | 0, // ZPR2StridedOrContiguous:psub1_then_psub |
| 127252 | 0, // ZPR2StridedOrContiguous:qsub1_then_dsub_hi |
| 127253 | 0, // ZPR2StridedOrContiguous:qsub3_then_dsub_hi |
| 127254 | 0, // ZPR2StridedOrContiguous:qsub2_then_dsub_hi |
| 127255 | 0, // ZPR2StridedOrContiguous:x8sub_7_then_sub_32 |
| 127256 | 0, // ZPR2StridedOrContiguous:x8sub_7_then_sub_32_hi |
| 127257 | 0, // ZPR2StridedOrContiguous:x8sub_6_then_sub_32 |
| 127258 | 0, // ZPR2StridedOrContiguous:x8sub_6_then_sub_32_hi |
| 127259 | 0, // ZPR2StridedOrContiguous:x8sub_5_then_sub_32 |
| 127260 | 0, // ZPR2StridedOrContiguous:x8sub_5_then_sub_32_hi |
| 127261 | 0, // ZPR2StridedOrContiguous:x8sub_4_then_sub_32 |
| 127262 | 0, // ZPR2StridedOrContiguous:x8sub_4_then_sub_32_hi |
| 127263 | 0, // ZPR2StridedOrContiguous:x8sub_3_then_sub_32 |
| 127264 | 0, // ZPR2StridedOrContiguous:x8sub_3_then_sub_32_hi |
| 127265 | 0, // ZPR2StridedOrContiguous:x8sub_2_then_sub_32 |
| 127266 | 0, // ZPR2StridedOrContiguous:x8sub_2_then_sub_32_hi |
| 127267 | 0, // ZPR2StridedOrContiguous:x8sub_1_then_sub_32 |
| 127268 | 0, // ZPR2StridedOrContiguous:x8sub_1_then_sub_32_hi |
| 127269 | 0, // ZPR2StridedOrContiguous:subo64_then_sub_32 |
| 127270 | 0, // ZPR2StridedOrContiguous:subo64_then_sub_32_hi |
| 127271 | 0, // ZPR2StridedOrContiguous:zsub1_then_zsub_hi |
| 127272 | 0, // ZPR2StridedOrContiguous:zsub3_then_zsub_hi |
| 127273 | 0, // ZPR2StridedOrContiguous:zsub2_then_zsub_hi |
| 127274 | 0, // ZPR2StridedOrContiguous:dsub0_dsub1 |
| 127275 | 0, // ZPR2StridedOrContiguous:dsub0_dsub1_dsub2 |
| 127276 | 0, // ZPR2StridedOrContiguous:dsub1_dsub2 |
| 127277 | 0, // ZPR2StridedOrContiguous:dsub1_dsub2_dsub3 |
| 127278 | 0, // ZPR2StridedOrContiguous:dsub2_dsub3 |
| 127279 | 75, // ZPR2StridedOrContiguous:dsub_dsub1 -> DD |
| 127280 | 0, // ZPR2StridedOrContiguous:dsub_dsub1_dsub2_dsub3 |
| 127281 | 0, // ZPR2StridedOrContiguous:dsub_dsub1_dsub2 |
| 127282 | 0, // ZPR2StridedOrContiguous:qsub0_qsub1 |
| 127283 | 0, // ZPR2StridedOrContiguous:qsub0_qsub1_qsub2 |
| 127284 | 0, // ZPR2StridedOrContiguous:qsub1_qsub2 |
| 127285 | 0, // ZPR2StridedOrContiguous:qsub1_qsub2_qsub3 |
| 127286 | 0, // ZPR2StridedOrContiguous:qsub2_qsub3 |
| 127287 | 0, // ZPR2StridedOrContiguous:sub_32_x8sub_1_then_sub_32 |
| 127288 | 0, // ZPR2StridedOrContiguous:x8sub_0_x8sub_1 |
| 127289 | 0, // ZPR2StridedOrContiguous:x8sub_2_x8sub_3 |
| 127290 | 0, // ZPR2StridedOrContiguous:x8sub_4_x8sub_5 |
| 127291 | 0, // ZPR2StridedOrContiguous:x8sub_6_x8sub_7 |
| 127292 | 0, // ZPR2StridedOrContiguous:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127293 | 0, // ZPR2StridedOrContiguous:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127294 | 0, // ZPR2StridedOrContiguous:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127295 | 0, // ZPR2StridedOrContiguous:sub_32_subo64_then_sub_32 |
| 127296 | 128, // ZPR2StridedOrContiguous:zsub_qsub1 -> QQ |
| 127297 | 0, // ZPR2StridedOrContiguous:zsub_qsub1_qsub2_qsub3 |
| 127298 | 0, // ZPR2StridedOrContiguous:zsub_qsub1_qsub2 |
| 127299 | 0, // ZPR2StridedOrContiguous:zsub0_zsub1 |
| 127300 | 0, // ZPR2StridedOrContiguous:zsub0_zsub1_zsub2 |
| 127301 | 0, // ZPR2StridedOrContiguous:zsub1_zsub2 |
| 127302 | 0, // ZPR2StridedOrContiguous:zsub1_zsub2_zsub3 |
| 127303 | 0, // ZPR2StridedOrContiguous:zsub2_zsub3 |
| 127304 | 0, // ZPR2StridedOrContiguous:zsub0_zsub2 |
| 127305 | 0, // ZPR2StridedOrContiguous:zsub1_zsub3 |
| 127306 | }, |
| 127307 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 127308 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:bsub -> FPR8 |
| 127309 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:bsub_hi |
| 127310 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub -> FPR64 |
| 127311 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0 |
| 127312 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1 -> FPR64 |
| 127313 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2 |
| 127314 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3 |
| 127315 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_hi |
| 127316 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:hsub -> FPR16 |
| 127317 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:hsub_hi |
| 127318 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:psub |
| 127319 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:psub0 |
| 127320 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:psub1 |
| 127321 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0 |
| 127322 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1 -> FPR128 |
| 127323 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2 |
| 127324 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub3 |
| 127325 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:ssub -> FPR32 |
| 127326 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:ssub_hi |
| 127327 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32 |
| 127328 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_hi |
| 127329 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sube32 |
| 127330 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sube64 |
| 127331 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:subo32 |
| 127332 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64 |
| 127333 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_0 |
| 127334 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1 |
| 127335 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2 |
| 127336 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3 |
| 127337 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4 |
| 127338 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5 |
| 127339 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6 |
| 127340 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7 |
| 127341 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubb |
| 127342 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd0 |
| 127343 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1 |
| 127344 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh0 |
| 127345 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1 |
| 127346 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubq0 |
| 127347 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubq1 |
| 127348 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs0 |
| 127349 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1 |
| 127350 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub -> FPR128 |
| 127351 | 96, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0 -> ZPRMul2 |
| 127352 | 93, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1 -> ZPR |
| 127353 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2 |
| 127354 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub3 |
| 127355 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_hi |
| 127356 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq0 |
| 127357 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq1 |
| 127358 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd0 |
| 127359 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1 |
| 127360 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq0 |
| 127361 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq1 |
| 127362 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 127363 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 127364 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd0 |
| 127365 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1 |
| 127366 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq0 |
| 127367 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq1 |
| 127368 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs0 |
| 127369 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1 |
| 127370 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 127371 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 127372 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 127373 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 127374 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 127375 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 127376 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127377 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127378 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 127379 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_bsub_hi |
| 127380 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 127381 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_hsub_hi |
| 127382 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 127383 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_ssub_hi |
| 127384 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_bsub |
| 127385 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_bsub_hi |
| 127386 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_hsub |
| 127387 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_hsub_hi |
| 127388 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_ssub |
| 127389 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_ssub_hi |
| 127390 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_bsub |
| 127391 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_bsub_hi |
| 127392 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_hsub |
| 127393 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_hsub_hi |
| 127394 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_ssub |
| 127395 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_ssub_hi |
| 127396 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:psub1_then_psub |
| 127397 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_then_dsub_hi |
| 127398 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub3_then_dsub_hi |
| 127399 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2_then_dsub_hi |
| 127400 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32 |
| 127401 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 127402 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32 |
| 127403 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 127404 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32 |
| 127405 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 127406 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32 |
| 127407 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 127408 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32 |
| 127409 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 127410 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32 |
| 127411 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 127412 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32 |
| 127413 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 127414 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64_then_sub_32 |
| 127415 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64_then_sub_32_hi |
| 127416 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_then_zsub_hi |
| 127417 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub3_then_zsub_hi |
| 127418 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2_then_zsub_hi |
| 127419 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0_dsub1 |
| 127420 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 127421 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_dsub2 |
| 127422 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 127423 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_dsub3 |
| 127424 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1 -> DD |
| 127425 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 127426 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2 |
| 127427 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0_qsub1 |
| 127428 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 127429 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_qsub2 |
| 127430 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 127431 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2_qsub3 |
| 127432 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 127433 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_0_x8sub_1 |
| 127434 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_x8sub_3 |
| 127435 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_x8sub_5 |
| 127436 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_x8sub_7 |
| 127437 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127438 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127439 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127440 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 127441 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1 -> QQ |
| 127442 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 127443 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2 |
| 127444 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub1 |
| 127445 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 127446 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub2 |
| 127447 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 127448 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2_zsub3 |
| 127449 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub2 |
| 127450 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub3 |
| 127451 | }, |
| 127452 | { // QQ_with_dsub1_in_FPR64_lo |
| 127453 | 7, // QQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 127454 | 0, // QQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 127455 | 56, // QQ_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 127456 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub0 |
| 127457 | 65, // QQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 127458 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2 |
| 127459 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3 |
| 127460 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 127461 | 8, // QQ_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 127462 | 0, // QQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 127463 | 0, // QQ_with_dsub1_in_FPR64_lo:psub |
| 127464 | 0, // QQ_with_dsub1_in_FPR64_lo:psub0 |
| 127465 | 0, // QQ_with_dsub1_in_FPR64_lo:psub1 |
| 127466 | 92, // QQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128 |
| 127467 | 94, // QQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 127468 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub2 |
| 127469 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub3 |
| 127470 | 40, // QQ_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 127471 | 0, // QQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 127472 | 0, // QQ_with_dsub1_in_FPR64_lo:sub_32 |
| 127473 | 0, // QQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 127474 | 0, // QQ_with_dsub1_in_FPR64_lo:sube32 |
| 127475 | 0, // QQ_with_dsub1_in_FPR64_lo:sube64 |
| 127476 | 0, // QQ_with_dsub1_in_FPR64_lo:subo32 |
| 127477 | 0, // QQ_with_dsub1_in_FPR64_lo:subo64 |
| 127478 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 127479 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 127480 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 127481 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 127482 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 127483 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 127484 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 127485 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 127486 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubb |
| 127487 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 127488 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 127489 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 127490 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 127491 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 127492 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 127493 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 127494 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 127495 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub |
| 127496 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub0 |
| 127497 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub1 |
| 127498 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub2 |
| 127499 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub3 |
| 127500 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 127501 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 127502 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 127503 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 127504 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 127505 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 127506 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 127507 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 127508 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 127509 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 127510 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 127511 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 127512 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 127513 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 127514 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 127515 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 127516 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 127517 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 127518 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 127519 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 127520 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 127521 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127522 | 0, // QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127523 | 7, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 127524 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 127525 | 10, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 127526 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 127527 | 44, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 127528 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 127529 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 127530 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 127531 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 127532 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 127533 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 127534 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 127535 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 127536 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 127537 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 127538 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 127539 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 127540 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 127541 | 0, // QQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 127542 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 127543 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 127544 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 127545 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 127546 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 127547 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 127548 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 127549 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 127550 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 127551 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 127552 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 127553 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 127554 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 127555 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 127556 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 127557 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 127558 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 127559 | 0, // QQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 127560 | 0, // QQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 127561 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 127562 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 127563 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 127564 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 127565 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 127566 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 127567 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 127568 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 127569 | 77, // QQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 127570 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 127571 | 0, // QQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 127572 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 127573 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 127574 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 127575 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 127576 | 0, // QQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 127577 | 0, // QQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 127578 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 127579 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 127580 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 127581 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 127582 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127583 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127584 | 0, // QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127585 | 0, // QQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 127586 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 127587 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 127588 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 127589 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 127590 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 127591 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 127592 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 127593 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 127594 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 127595 | 0, // QQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 127596 | }, |
| 127597 | { // QQ_with_qsub0_in_FPR128_lo |
| 127598 | 7, // QQ_with_qsub0_in_FPR128_lo:bsub -> FPR8 |
| 127599 | 0, // QQ_with_qsub0_in_FPR128_lo:bsub_hi |
| 127600 | 65, // QQ_with_qsub0_in_FPR128_lo:dsub -> FPR64_lo |
| 127601 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub0 |
| 127602 | 56, // QQ_with_qsub0_in_FPR128_lo:dsub1 -> FPR64 |
| 127603 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2 |
| 127604 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3 |
| 127605 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub_hi |
| 127606 | 10, // QQ_with_qsub0_in_FPR128_lo:hsub -> FPR16_lo |
| 127607 | 0, // QQ_with_qsub0_in_FPR128_lo:hsub_hi |
| 127608 | 0, // QQ_with_qsub0_in_FPR128_lo:psub |
| 127609 | 0, // QQ_with_qsub0_in_FPR128_lo:psub0 |
| 127610 | 0, // QQ_with_qsub0_in_FPR128_lo:psub1 |
| 127611 | 94, // QQ_with_qsub0_in_FPR128_lo:qsub0 -> FPR128_lo |
| 127612 | 92, // QQ_with_qsub0_in_FPR128_lo:qsub1 -> FPR128 |
| 127613 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub2 |
| 127614 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub3 |
| 127615 | 44, // QQ_with_qsub0_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 127616 | 0, // QQ_with_qsub0_in_FPR128_lo:ssub_hi |
| 127617 | 0, // QQ_with_qsub0_in_FPR128_lo:sub_32 |
| 127618 | 0, // QQ_with_qsub0_in_FPR128_lo:sub_32_hi |
| 127619 | 0, // QQ_with_qsub0_in_FPR128_lo:sube32 |
| 127620 | 0, // QQ_with_qsub0_in_FPR128_lo:sube64 |
| 127621 | 0, // QQ_with_qsub0_in_FPR128_lo:subo32 |
| 127622 | 0, // QQ_with_qsub0_in_FPR128_lo:subo64 |
| 127623 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_0 |
| 127624 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_1 |
| 127625 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_2 |
| 127626 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_3 |
| 127627 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_4 |
| 127628 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_5 |
| 127629 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_6 |
| 127630 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_7 |
| 127631 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubb |
| 127632 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubd0 |
| 127633 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubd1 |
| 127634 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh0 |
| 127635 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1 |
| 127636 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubq0 |
| 127637 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubq1 |
| 127638 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs0 |
| 127639 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1 |
| 127640 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub |
| 127641 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub0 |
| 127642 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub1 |
| 127643 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub2 |
| 127644 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub3 |
| 127645 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub_hi |
| 127646 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq0 |
| 127647 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq1 |
| 127648 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd0 |
| 127649 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1 |
| 127650 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq0 |
| 127651 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq1 |
| 127652 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 127653 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 127654 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd0 |
| 127655 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1 |
| 127656 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq0 |
| 127657 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq1 |
| 127658 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs0 |
| 127659 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1 |
| 127660 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 127661 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 127662 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 127663 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 127664 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 127665 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 127666 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127667 | 0, // QQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127668 | 7, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 127669 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub_hi |
| 127670 | 8, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 127671 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub_hi |
| 127672 | 40, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 127673 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub_hi |
| 127674 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub |
| 127675 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub_hi |
| 127676 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub |
| 127677 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub_hi |
| 127678 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub |
| 127679 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub_hi |
| 127680 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub |
| 127681 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub_hi |
| 127682 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub |
| 127683 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub_hi |
| 127684 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub |
| 127685 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub_hi |
| 127686 | 0, // QQ_with_qsub0_in_FPR128_lo:psub1_then_psub |
| 127687 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub1_then_dsub_hi |
| 127688 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub3_then_dsub_hi |
| 127689 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub2_then_dsub_hi |
| 127690 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32 |
| 127691 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 127692 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32 |
| 127693 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 127694 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32 |
| 127695 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 127696 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32 |
| 127697 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 127698 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32 |
| 127699 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 127700 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32 |
| 127701 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 127702 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32 |
| 127703 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 127704 | 0, // QQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32 |
| 127705 | 0, // QQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32_hi |
| 127706 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub1_then_zsub_hi |
| 127707 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub3_then_zsub_hi |
| 127708 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub2_then_zsub_hi |
| 127709 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub0_dsub1 |
| 127710 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 127711 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub1_dsub2 |
| 127712 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub1_dsub2_dsub3 |
| 127713 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub2_dsub3 |
| 127714 | 76, // QQ_with_qsub0_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 127715 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 |
| 127716 | 0, // QQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2 |
| 127717 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub0_qsub1 |
| 127718 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub0_qsub1_qsub2 |
| 127719 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub1_qsub2 |
| 127720 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub1_qsub2_qsub3 |
| 127721 | 0, // QQ_with_qsub0_in_FPR128_lo:qsub2_qsub3 |
| 127722 | 0, // QQ_with_qsub0_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 127723 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_0_x8sub_1 |
| 127724 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_2_x8sub_3 |
| 127725 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_4_x8sub_5 |
| 127726 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_6_x8sub_7 |
| 127727 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127728 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127729 | 0, // QQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127730 | 0, // QQ_with_qsub0_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 127731 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub_qsub1 |
| 127732 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 127733 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2 |
| 127734 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub0_zsub1 |
| 127735 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub0_zsub1_zsub2 |
| 127736 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub1_zsub2 |
| 127737 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub1_zsub2_zsub3 |
| 127738 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub2_zsub3 |
| 127739 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub0_zsub2 |
| 127740 | 0, // QQ_with_qsub0_in_FPR128_lo:zsub1_zsub3 |
| 127741 | }, |
| 127742 | { // ZPR2Mul2 |
| 127743 | 7, // ZPR2Mul2:bsub -> FPR8 |
| 127744 | 0, // ZPR2Mul2:bsub_hi |
| 127745 | 56, // ZPR2Mul2:dsub -> FPR64 |
| 127746 | 0, // ZPR2Mul2:dsub0 |
| 127747 | 56, // ZPR2Mul2:dsub1 -> FPR64 |
| 127748 | 0, // ZPR2Mul2:dsub2 |
| 127749 | 0, // ZPR2Mul2:dsub3 |
| 127750 | 0, // ZPR2Mul2:dsub_hi |
| 127751 | 8, // ZPR2Mul2:hsub -> FPR16 |
| 127752 | 0, // ZPR2Mul2:hsub_hi |
| 127753 | 0, // ZPR2Mul2:psub |
| 127754 | 0, // ZPR2Mul2:psub0 |
| 127755 | 0, // ZPR2Mul2:psub1 |
| 127756 | 0, // ZPR2Mul2:qsub0 |
| 127757 | 92, // ZPR2Mul2:qsub1 -> FPR128 |
| 127758 | 0, // ZPR2Mul2:qsub2 |
| 127759 | 0, // ZPR2Mul2:qsub3 |
| 127760 | 40, // ZPR2Mul2:ssub -> FPR32 |
| 127761 | 0, // ZPR2Mul2:ssub_hi |
| 127762 | 0, // ZPR2Mul2:sub_32 |
| 127763 | 0, // ZPR2Mul2:sub_32_hi |
| 127764 | 0, // ZPR2Mul2:sube32 |
| 127765 | 0, // ZPR2Mul2:sube64 |
| 127766 | 0, // ZPR2Mul2:subo32 |
| 127767 | 0, // ZPR2Mul2:subo64 |
| 127768 | 0, // ZPR2Mul2:x8sub_0 |
| 127769 | 0, // ZPR2Mul2:x8sub_1 |
| 127770 | 0, // ZPR2Mul2:x8sub_2 |
| 127771 | 0, // ZPR2Mul2:x8sub_3 |
| 127772 | 0, // ZPR2Mul2:x8sub_4 |
| 127773 | 0, // ZPR2Mul2:x8sub_5 |
| 127774 | 0, // ZPR2Mul2:x8sub_6 |
| 127775 | 0, // ZPR2Mul2:x8sub_7 |
| 127776 | 0, // ZPR2Mul2:zasubb |
| 127777 | 0, // ZPR2Mul2:zasubd0 |
| 127778 | 0, // ZPR2Mul2:zasubd1 |
| 127779 | 0, // ZPR2Mul2:zasubh0 |
| 127780 | 0, // ZPR2Mul2:zasubh1 |
| 127781 | 0, // ZPR2Mul2:zasubq0 |
| 127782 | 0, // ZPR2Mul2:zasubq1 |
| 127783 | 0, // ZPR2Mul2:zasubs0 |
| 127784 | 0, // ZPR2Mul2:zasubs1 |
| 127785 | 92, // ZPR2Mul2:zsub -> FPR128 |
| 127786 | 96, // ZPR2Mul2:zsub0 -> ZPRMul2 |
| 127787 | 93, // ZPR2Mul2:zsub1 -> ZPR |
| 127788 | 0, // ZPR2Mul2:zsub2 |
| 127789 | 0, // ZPR2Mul2:zsub3 |
| 127790 | 0, // ZPR2Mul2:zsub_hi |
| 127791 | 0, // ZPR2Mul2:zasubd1_then_zasubq0 |
| 127792 | 0, // ZPR2Mul2:zasubd1_then_zasubq1 |
| 127793 | 0, // ZPR2Mul2:zasubs1_then_zasubd0 |
| 127794 | 0, // ZPR2Mul2:zasubs1_then_zasubd1 |
| 127795 | 0, // ZPR2Mul2:zasubs1_then_zasubq0 |
| 127796 | 0, // ZPR2Mul2:zasubs1_then_zasubq1 |
| 127797 | 0, // ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 |
| 127798 | 0, // ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 |
| 127799 | 0, // ZPR2Mul2:zasubh1_then_zasubd0 |
| 127800 | 0, // ZPR2Mul2:zasubh1_then_zasubd1 |
| 127801 | 0, // ZPR2Mul2:zasubh1_then_zasubq0 |
| 127802 | 0, // ZPR2Mul2:zasubh1_then_zasubq1 |
| 127803 | 0, // ZPR2Mul2:zasubh1_then_zasubs0 |
| 127804 | 0, // ZPR2Mul2:zasubh1_then_zasubs1 |
| 127805 | 0, // ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 |
| 127806 | 0, // ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 |
| 127807 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 |
| 127808 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 |
| 127809 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 |
| 127810 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 |
| 127811 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127812 | 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127813 | 7, // ZPR2Mul2:dsub1_then_bsub -> FPR8 |
| 127814 | 0, // ZPR2Mul2:dsub1_then_bsub_hi |
| 127815 | 8, // ZPR2Mul2:dsub1_then_hsub -> FPR16 |
| 127816 | 0, // ZPR2Mul2:dsub1_then_hsub_hi |
| 127817 | 40, // ZPR2Mul2:dsub1_then_ssub -> FPR32 |
| 127818 | 0, // ZPR2Mul2:dsub1_then_ssub_hi |
| 127819 | 0, // ZPR2Mul2:dsub3_then_bsub |
| 127820 | 0, // ZPR2Mul2:dsub3_then_bsub_hi |
| 127821 | 0, // ZPR2Mul2:dsub3_then_hsub |
| 127822 | 0, // ZPR2Mul2:dsub3_then_hsub_hi |
| 127823 | 0, // ZPR2Mul2:dsub3_then_ssub |
| 127824 | 0, // ZPR2Mul2:dsub3_then_ssub_hi |
| 127825 | 0, // ZPR2Mul2:dsub2_then_bsub |
| 127826 | 0, // ZPR2Mul2:dsub2_then_bsub_hi |
| 127827 | 0, // ZPR2Mul2:dsub2_then_hsub |
| 127828 | 0, // ZPR2Mul2:dsub2_then_hsub_hi |
| 127829 | 0, // ZPR2Mul2:dsub2_then_ssub |
| 127830 | 0, // ZPR2Mul2:dsub2_then_ssub_hi |
| 127831 | 0, // ZPR2Mul2:psub1_then_psub |
| 127832 | 0, // ZPR2Mul2:qsub1_then_dsub_hi |
| 127833 | 0, // ZPR2Mul2:qsub3_then_dsub_hi |
| 127834 | 0, // ZPR2Mul2:qsub2_then_dsub_hi |
| 127835 | 0, // ZPR2Mul2:x8sub_7_then_sub_32 |
| 127836 | 0, // ZPR2Mul2:x8sub_7_then_sub_32_hi |
| 127837 | 0, // ZPR2Mul2:x8sub_6_then_sub_32 |
| 127838 | 0, // ZPR2Mul2:x8sub_6_then_sub_32_hi |
| 127839 | 0, // ZPR2Mul2:x8sub_5_then_sub_32 |
| 127840 | 0, // ZPR2Mul2:x8sub_5_then_sub_32_hi |
| 127841 | 0, // ZPR2Mul2:x8sub_4_then_sub_32 |
| 127842 | 0, // ZPR2Mul2:x8sub_4_then_sub_32_hi |
| 127843 | 0, // ZPR2Mul2:x8sub_3_then_sub_32 |
| 127844 | 0, // ZPR2Mul2:x8sub_3_then_sub_32_hi |
| 127845 | 0, // ZPR2Mul2:x8sub_2_then_sub_32 |
| 127846 | 0, // ZPR2Mul2:x8sub_2_then_sub_32_hi |
| 127847 | 0, // ZPR2Mul2:x8sub_1_then_sub_32 |
| 127848 | 0, // ZPR2Mul2:x8sub_1_then_sub_32_hi |
| 127849 | 0, // ZPR2Mul2:subo64_then_sub_32 |
| 127850 | 0, // ZPR2Mul2:subo64_then_sub_32_hi |
| 127851 | 0, // ZPR2Mul2:zsub1_then_zsub_hi |
| 127852 | 0, // ZPR2Mul2:zsub3_then_zsub_hi |
| 127853 | 0, // ZPR2Mul2:zsub2_then_zsub_hi |
| 127854 | 0, // ZPR2Mul2:dsub0_dsub1 |
| 127855 | 0, // ZPR2Mul2:dsub0_dsub1_dsub2 |
| 127856 | 0, // ZPR2Mul2:dsub1_dsub2 |
| 127857 | 0, // ZPR2Mul2:dsub1_dsub2_dsub3 |
| 127858 | 0, // ZPR2Mul2:dsub2_dsub3 |
| 127859 | 75, // ZPR2Mul2:dsub_dsub1 -> DD |
| 127860 | 0, // ZPR2Mul2:dsub_dsub1_dsub2_dsub3 |
| 127861 | 0, // ZPR2Mul2:dsub_dsub1_dsub2 |
| 127862 | 0, // ZPR2Mul2:qsub0_qsub1 |
| 127863 | 0, // ZPR2Mul2:qsub0_qsub1_qsub2 |
| 127864 | 0, // ZPR2Mul2:qsub1_qsub2 |
| 127865 | 0, // ZPR2Mul2:qsub1_qsub2_qsub3 |
| 127866 | 0, // ZPR2Mul2:qsub2_qsub3 |
| 127867 | 0, // ZPR2Mul2:sub_32_x8sub_1_then_sub_32 |
| 127868 | 0, // ZPR2Mul2:x8sub_0_x8sub_1 |
| 127869 | 0, // ZPR2Mul2:x8sub_2_x8sub_3 |
| 127870 | 0, // ZPR2Mul2:x8sub_4_x8sub_5 |
| 127871 | 0, // ZPR2Mul2:x8sub_6_x8sub_7 |
| 127872 | 0, // ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 127873 | 0, // ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 127874 | 0, // ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 127875 | 0, // ZPR2Mul2:sub_32_subo64_then_sub_32 |
| 127876 | 128, // ZPR2Mul2:zsub_qsub1 -> QQ |
| 127877 | 0, // ZPR2Mul2:zsub_qsub1_qsub2_qsub3 |
| 127878 | 0, // ZPR2Mul2:zsub_qsub1_qsub2 |
| 127879 | 0, // ZPR2Mul2:zsub0_zsub1 |
| 127880 | 0, // ZPR2Mul2:zsub0_zsub1_zsub2 |
| 127881 | 0, // ZPR2Mul2:zsub1_zsub2 |
| 127882 | 0, // ZPR2Mul2:zsub1_zsub2_zsub3 |
| 127883 | 0, // ZPR2Mul2:zsub2_zsub3 |
| 127884 | 0, // ZPR2Mul2:zsub0_zsub2 |
| 127885 | 0, // ZPR2Mul2:zsub1_zsub3 |
| 127886 | }, |
| 127887 | { // ZPR2Strided |
| 127888 | 7, // ZPR2Strided:bsub -> FPR8 |
| 127889 | 0, // ZPR2Strided:bsub_hi |
| 127890 | 56, // ZPR2Strided:dsub -> FPR64 |
| 127891 | 0, // ZPR2Strided:dsub0 |
| 127892 | 56, // ZPR2Strided:dsub1 -> FPR64 |
| 127893 | 0, // ZPR2Strided:dsub2 |
| 127894 | 0, // ZPR2Strided:dsub3 |
| 127895 | 0, // ZPR2Strided:dsub_hi |
| 127896 | 8, // ZPR2Strided:hsub -> FPR16 |
| 127897 | 0, // ZPR2Strided:hsub_hi |
| 127898 | 0, // ZPR2Strided:psub |
| 127899 | 0, // ZPR2Strided:psub0 |
| 127900 | 0, // ZPR2Strided:psub1 |
| 127901 | 0, // ZPR2Strided:qsub0 |
| 127902 | 92, // ZPR2Strided:qsub1 -> FPR128 |
| 127903 | 0, // ZPR2Strided:qsub2 |
| 127904 | 0, // ZPR2Strided:qsub3 |
| 127905 | 40, // ZPR2Strided:ssub -> FPR32 |
| 127906 | 0, // ZPR2Strided:ssub_hi |
| 127907 | 0, // ZPR2Strided:sub_32 |
| 127908 | 0, // ZPR2Strided:sub_32_hi |
| 127909 | 0, // ZPR2Strided:sube32 |
| 127910 | 0, // ZPR2Strided:sube64 |
| 127911 | 0, // ZPR2Strided:subo32 |
| 127912 | 0, // ZPR2Strided:subo64 |
| 127913 | 0, // ZPR2Strided:x8sub_0 |
| 127914 | 0, // ZPR2Strided:x8sub_1 |
| 127915 | 0, // ZPR2Strided:x8sub_2 |
| 127916 | 0, // ZPR2Strided:x8sub_3 |
| 127917 | 0, // ZPR2Strided:x8sub_4 |
| 127918 | 0, // ZPR2Strided:x8sub_5 |
| 127919 | 0, // ZPR2Strided:x8sub_6 |
| 127920 | 0, // ZPR2Strided:x8sub_7 |
| 127921 | 0, // ZPR2Strided:zasubb |
| 127922 | 0, // ZPR2Strided:zasubd0 |
| 127923 | 0, // ZPR2Strided:zasubd1 |
| 127924 | 0, // ZPR2Strided:zasubh0 |
| 127925 | 0, // ZPR2Strided:zasubh1 |
| 127926 | 0, // ZPR2Strided:zasubq0 |
| 127927 | 0, // ZPR2Strided:zasubq1 |
| 127928 | 0, // ZPR2Strided:zasubs0 |
| 127929 | 0, // ZPR2Strided:zasubs1 |
| 127930 | 92, // ZPR2Strided:zsub -> FPR128 |
| 127931 | 93, // ZPR2Strided:zsub0 -> ZPR |
| 127932 | 93, // ZPR2Strided:zsub1 -> ZPR |
| 127933 | 0, // ZPR2Strided:zsub2 |
| 127934 | 0, // ZPR2Strided:zsub3 |
| 127935 | 0, // ZPR2Strided:zsub_hi |
| 127936 | 0, // ZPR2Strided:zasubd1_then_zasubq0 |
| 127937 | 0, // ZPR2Strided:zasubd1_then_zasubq1 |
| 127938 | 0, // ZPR2Strided:zasubs1_then_zasubd0 |
| 127939 | 0, // ZPR2Strided:zasubs1_then_zasubd1 |
| 127940 | 0, // ZPR2Strided:zasubs1_then_zasubq0 |
| 127941 | 0, // ZPR2Strided:zasubs1_then_zasubq1 |
| 127942 | 0, // ZPR2Strided:zasubs1_then_zasubd1_then_zasubq0 |
| 127943 | 0, // ZPR2Strided:zasubs1_then_zasubd1_then_zasubq1 |
| 127944 | 0, // ZPR2Strided:zasubh1_then_zasubd0 |
| 127945 | 0, // ZPR2Strided:zasubh1_then_zasubd1 |
| 127946 | 0, // ZPR2Strided:zasubh1_then_zasubq0 |
| 127947 | 0, // ZPR2Strided:zasubh1_then_zasubq1 |
| 127948 | 0, // ZPR2Strided:zasubh1_then_zasubs0 |
| 127949 | 0, // ZPR2Strided:zasubh1_then_zasubs1 |
| 127950 | 0, // ZPR2Strided:zasubh1_then_zasubd1_then_zasubq0 |
| 127951 | 0, // ZPR2Strided:zasubh1_then_zasubd1_then_zasubq1 |
| 127952 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd0 |
| 127953 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1 |
| 127954 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubq0 |
| 127955 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubq1 |
| 127956 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 127957 | 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 127958 | 7, // ZPR2Strided:dsub1_then_bsub -> FPR8 |
| 127959 | 0, // ZPR2Strided:dsub1_then_bsub_hi |
| 127960 | 8, // ZPR2Strided:dsub1_then_hsub -> FPR16 |
| 127961 | 0, // ZPR2Strided:dsub1_then_hsub_hi |
| 127962 | 40, // ZPR2Strided:dsub1_then_ssub -> FPR32 |
| 127963 | 0, // ZPR2Strided:dsub1_then_ssub_hi |
| 127964 | 0, // ZPR2Strided:dsub3_then_bsub |
| 127965 | 0, // ZPR2Strided:dsub3_then_bsub_hi |
| 127966 | 0, // ZPR2Strided:dsub3_then_hsub |
| 127967 | 0, // ZPR2Strided:dsub3_then_hsub_hi |
| 127968 | 0, // ZPR2Strided:dsub3_then_ssub |
| 127969 | 0, // ZPR2Strided:dsub3_then_ssub_hi |
| 127970 | 0, // ZPR2Strided:dsub2_then_bsub |
| 127971 | 0, // ZPR2Strided:dsub2_then_bsub_hi |
| 127972 | 0, // ZPR2Strided:dsub2_then_hsub |
| 127973 | 0, // ZPR2Strided:dsub2_then_hsub_hi |
| 127974 | 0, // ZPR2Strided:dsub2_then_ssub |
| 127975 | 0, // ZPR2Strided:dsub2_then_ssub_hi |
| 127976 | 0, // ZPR2Strided:psub1_then_psub |
| 127977 | 0, // ZPR2Strided:qsub1_then_dsub_hi |
| 127978 | 0, // ZPR2Strided:qsub3_then_dsub_hi |
| 127979 | 0, // ZPR2Strided:qsub2_then_dsub_hi |
| 127980 | 0, // ZPR2Strided:x8sub_7_then_sub_32 |
| 127981 | 0, // ZPR2Strided:x8sub_7_then_sub_32_hi |
| 127982 | 0, // ZPR2Strided:x8sub_6_then_sub_32 |
| 127983 | 0, // ZPR2Strided:x8sub_6_then_sub_32_hi |
| 127984 | 0, // ZPR2Strided:x8sub_5_then_sub_32 |
| 127985 | 0, // ZPR2Strided:x8sub_5_then_sub_32_hi |
| 127986 | 0, // ZPR2Strided:x8sub_4_then_sub_32 |
| 127987 | 0, // ZPR2Strided:x8sub_4_then_sub_32_hi |
| 127988 | 0, // ZPR2Strided:x8sub_3_then_sub_32 |
| 127989 | 0, // ZPR2Strided:x8sub_3_then_sub_32_hi |
| 127990 | 0, // ZPR2Strided:x8sub_2_then_sub_32 |
| 127991 | 0, // ZPR2Strided:x8sub_2_then_sub_32_hi |
| 127992 | 0, // ZPR2Strided:x8sub_1_then_sub_32 |
| 127993 | 0, // ZPR2Strided:x8sub_1_then_sub_32_hi |
| 127994 | 0, // ZPR2Strided:subo64_then_sub_32 |
| 127995 | 0, // ZPR2Strided:subo64_then_sub_32_hi |
| 127996 | 0, // ZPR2Strided:zsub1_then_zsub_hi |
| 127997 | 0, // ZPR2Strided:zsub3_then_zsub_hi |
| 127998 | 0, // ZPR2Strided:zsub2_then_zsub_hi |
| 127999 | 0, // ZPR2Strided:dsub0_dsub1 |
| 128000 | 0, // ZPR2Strided:dsub0_dsub1_dsub2 |
| 128001 | 0, // ZPR2Strided:dsub1_dsub2 |
| 128002 | 0, // ZPR2Strided:dsub1_dsub2_dsub3 |
| 128003 | 0, // ZPR2Strided:dsub2_dsub3 |
| 128004 | 0, // ZPR2Strided:dsub_dsub1 |
| 128005 | 0, // ZPR2Strided:dsub_dsub1_dsub2_dsub3 |
| 128006 | 0, // ZPR2Strided:dsub_dsub1_dsub2 |
| 128007 | 0, // ZPR2Strided:qsub0_qsub1 |
| 128008 | 0, // ZPR2Strided:qsub0_qsub1_qsub2 |
| 128009 | 0, // ZPR2Strided:qsub1_qsub2 |
| 128010 | 0, // ZPR2Strided:qsub1_qsub2_qsub3 |
| 128011 | 0, // ZPR2Strided:qsub2_qsub3 |
| 128012 | 0, // ZPR2Strided:sub_32_x8sub_1_then_sub_32 |
| 128013 | 0, // ZPR2Strided:x8sub_0_x8sub_1 |
| 128014 | 0, // ZPR2Strided:x8sub_2_x8sub_3 |
| 128015 | 0, // ZPR2Strided:x8sub_4_x8sub_5 |
| 128016 | 0, // ZPR2Strided:x8sub_6_x8sub_7 |
| 128017 | 0, // ZPR2Strided:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128018 | 0, // ZPR2Strided:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128019 | 0, // ZPR2Strided:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128020 | 0, // ZPR2Strided:sub_32_subo64_then_sub_32 |
| 128021 | 0, // ZPR2Strided:zsub_qsub1 |
| 128022 | 0, // ZPR2Strided:zsub_qsub1_qsub2_qsub3 |
| 128023 | 0, // ZPR2Strided:zsub_qsub1_qsub2 |
| 128024 | 0, // ZPR2Strided:zsub0_zsub1 |
| 128025 | 0, // ZPR2Strided:zsub0_zsub1_zsub2 |
| 128026 | 0, // ZPR2Strided:zsub1_zsub2 |
| 128027 | 0, // ZPR2Strided:zsub1_zsub2_zsub3 |
| 128028 | 0, // ZPR2Strided:zsub2_zsub3 |
| 128029 | 0, // ZPR2Strided:zsub0_zsub2 |
| 128030 | 0, // ZPR2Strided:zsub1_zsub3 |
| 128031 | }, |
| 128032 | { // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 128033 | 7, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:bsub -> FPR8 |
| 128034 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:bsub_hi |
| 128035 | 65, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub -> FPR64_lo |
| 128036 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0 |
| 128037 | 65, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1 -> FPR64_lo |
| 128038 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2 |
| 128039 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3 |
| 128040 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_hi |
| 128041 | 10, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:hsub -> FPR16_lo |
| 128042 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:hsub_hi |
| 128043 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:psub |
| 128044 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:psub0 |
| 128045 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:psub1 |
| 128046 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0 |
| 128047 | 94, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1 -> FPR128_lo |
| 128048 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2 |
| 128049 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub3 |
| 128050 | 44, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128051 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:ssub_hi |
| 128052 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32 |
| 128053 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_hi |
| 128054 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sube32 |
| 128055 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sube64 |
| 128056 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:subo32 |
| 128057 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:subo64 |
| 128058 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_0 |
| 128059 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1 |
| 128060 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2 |
| 128061 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3 |
| 128062 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4 |
| 128063 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5 |
| 128064 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6 |
| 128065 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7 |
| 128066 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubb |
| 128067 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd0 |
| 128068 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1 |
| 128069 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh0 |
| 128070 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1 |
| 128071 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubq0 |
| 128072 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubq1 |
| 128073 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs0 |
| 128074 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1 |
| 128075 | 94, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub -> FPR128_lo |
| 128076 | 97, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b |
| 128077 | 97, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b |
| 128078 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2 |
| 128079 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub3 |
| 128080 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_hi |
| 128081 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 |
| 128082 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 |
| 128083 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 |
| 128084 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 |
| 128085 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 |
| 128086 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 |
| 128087 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 128088 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 128089 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 |
| 128090 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 |
| 128091 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 |
| 128092 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 |
| 128093 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 |
| 128094 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 |
| 128095 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 128096 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 128097 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 128098 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 128099 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 128100 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 128101 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128102 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128103 | 7, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 128104 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_bsub_hi |
| 128105 | 10, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 128106 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_hsub_hi |
| 128107 | 44, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128108 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_ssub_hi |
| 128109 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_bsub |
| 128110 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_bsub_hi |
| 128111 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_hsub |
| 128112 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_hsub_hi |
| 128113 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_ssub |
| 128114 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_ssub_hi |
| 128115 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_bsub |
| 128116 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_bsub_hi |
| 128117 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_hsub |
| 128118 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_hsub_hi |
| 128119 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_ssub |
| 128120 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_ssub_hi |
| 128121 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:psub1_then_psub |
| 128122 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_then_dsub_hi |
| 128123 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub3_then_dsub_hi |
| 128124 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2_then_dsub_hi |
| 128125 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 |
| 128126 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 128127 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 |
| 128128 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 128129 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 |
| 128130 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 128131 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 |
| 128132 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 128133 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 |
| 128134 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 128135 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 |
| 128136 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 128137 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 |
| 128138 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 128139 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:subo64_then_sub_32 |
| 128140 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:subo64_then_sub_32_hi |
| 128141 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi |
| 128142 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi |
| 128143 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi |
| 128144 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0_dsub1 |
| 128145 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 128146 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_dsub2 |
| 128147 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 128148 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_dsub3 |
| 128149 | 79, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 128150 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 128151 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2 |
| 128152 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0_qsub1 |
| 128153 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 128154 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_qsub2 |
| 128155 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 128156 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2_qsub3 |
| 128157 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 128158 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 |
| 128159 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 |
| 128160 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 |
| 128161 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 |
| 128162 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128163 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128164 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128165 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 128166 | 140, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 128167 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 128168 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2 |
| 128169 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub1 |
| 128170 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 128171 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub2 |
| 128172 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 128173 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2_zsub3 |
| 128174 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub2 |
| 128175 | 0, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub3 |
| 128176 | }, |
| 128177 | { // ZPR2_with_dsub1_in_FPR64_lo |
| 128178 | 7, // ZPR2_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 128179 | 0, // ZPR2_with_dsub1_in_FPR64_lo:bsub_hi |
| 128180 | 56, // ZPR2_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 128181 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub0 |
| 128182 | 65, // ZPR2_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 128183 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2 |
| 128184 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3 |
| 128185 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub_hi |
| 128186 | 8, // ZPR2_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 128187 | 0, // ZPR2_with_dsub1_in_FPR64_lo:hsub_hi |
| 128188 | 0, // ZPR2_with_dsub1_in_FPR64_lo:psub |
| 128189 | 0, // ZPR2_with_dsub1_in_FPR64_lo:psub0 |
| 128190 | 0, // ZPR2_with_dsub1_in_FPR64_lo:psub1 |
| 128191 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub0 |
| 128192 | 94, // ZPR2_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 128193 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub2 |
| 128194 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub3 |
| 128195 | 40, // ZPR2_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 128196 | 0, // ZPR2_with_dsub1_in_FPR64_lo:ssub_hi |
| 128197 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sub_32 |
| 128198 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sub_32_hi |
| 128199 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sube32 |
| 128200 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sube64 |
| 128201 | 0, // ZPR2_with_dsub1_in_FPR64_lo:subo32 |
| 128202 | 0, // ZPR2_with_dsub1_in_FPR64_lo:subo64 |
| 128203 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_0 |
| 128204 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_1 |
| 128205 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_2 |
| 128206 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_3 |
| 128207 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_4 |
| 128208 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_5 |
| 128209 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_6 |
| 128210 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_7 |
| 128211 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubb |
| 128212 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubd0 |
| 128213 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubd1 |
| 128214 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh0 |
| 128215 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1 |
| 128216 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubq0 |
| 128217 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubq1 |
| 128218 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs0 |
| 128219 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1 |
| 128220 | 92, // ZPR2_with_dsub1_in_FPR64_lo:zsub -> FPR128 |
| 128221 | 93, // ZPR2_with_dsub1_in_FPR64_lo:zsub0 -> ZPR |
| 128222 | 97, // ZPR2_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 128223 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub2 |
| 128224 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub3 |
| 128225 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub_hi |
| 128226 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 128227 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 128228 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 128229 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 128230 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 128231 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 128232 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 128233 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 128234 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 128235 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 128236 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 128237 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 128238 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 128239 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 128240 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 128241 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 128242 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 128243 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 128244 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 128245 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 128246 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128247 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128248 | 7, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 128249 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 128250 | 10, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 128251 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 128252 | 44, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128253 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 128254 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 128255 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 128256 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 128257 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 128258 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 128259 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 128260 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 128261 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 128262 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 128263 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 128264 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 128265 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 128266 | 0, // ZPR2_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 128267 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 128268 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 128269 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 128270 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 128271 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 128272 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 128273 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 128274 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 128275 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 128276 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 128277 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 128278 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 128279 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 128280 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 128281 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 128282 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 128283 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 128284 | 0, // ZPR2_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 128285 | 0, // ZPR2_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 128286 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 128287 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 128288 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 128289 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 128290 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 128291 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 128292 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 128293 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 128294 | 77, // ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 128295 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 128296 | 0, // ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 128297 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 128298 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 128299 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 128300 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 128301 | 0, // ZPR2_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 128302 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 128303 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 128304 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 128305 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 128306 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 128307 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128308 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128309 | 0, // ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128310 | 0, // ZPR2_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 128311 | 132, // ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 128312 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 128313 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 128314 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 128315 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 128316 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 128317 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 128318 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 128319 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 128320 | 0, // ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 128321 | }, |
| 128322 | { // ZPR2_with_zsub1_in_ZPRMul2 |
| 128323 | 7, // ZPR2_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 128324 | 0, // ZPR2_with_zsub1_in_ZPRMul2:bsub_hi |
| 128325 | 56, // ZPR2_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 128326 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub0 |
| 128327 | 56, // ZPR2_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 128328 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2 |
| 128329 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3 |
| 128330 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub_hi |
| 128331 | 8, // ZPR2_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 128332 | 0, // ZPR2_with_zsub1_in_ZPRMul2:hsub_hi |
| 128333 | 0, // ZPR2_with_zsub1_in_ZPRMul2:psub |
| 128334 | 0, // ZPR2_with_zsub1_in_ZPRMul2:psub0 |
| 128335 | 0, // ZPR2_with_zsub1_in_ZPRMul2:psub1 |
| 128336 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub0 |
| 128337 | 92, // ZPR2_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 128338 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub2 |
| 128339 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub3 |
| 128340 | 40, // ZPR2_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 128341 | 0, // ZPR2_with_zsub1_in_ZPRMul2:ssub_hi |
| 128342 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sub_32 |
| 128343 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sub_32_hi |
| 128344 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sube32 |
| 128345 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sube64 |
| 128346 | 0, // ZPR2_with_zsub1_in_ZPRMul2:subo32 |
| 128347 | 0, // ZPR2_with_zsub1_in_ZPRMul2:subo64 |
| 128348 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_0 |
| 128349 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_1 |
| 128350 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_2 |
| 128351 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_3 |
| 128352 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_4 |
| 128353 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_5 |
| 128354 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_6 |
| 128355 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_7 |
| 128356 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubb |
| 128357 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubd0 |
| 128358 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubd1 |
| 128359 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh0 |
| 128360 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1 |
| 128361 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubq0 |
| 128362 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubq1 |
| 128363 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs0 |
| 128364 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1 |
| 128365 | 92, // ZPR2_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 128366 | 93, // ZPR2_with_zsub1_in_ZPRMul2:zsub0 -> ZPR |
| 128367 | 96, // ZPR2_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 128368 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub2 |
| 128369 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub3 |
| 128370 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub_hi |
| 128371 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 128372 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 128373 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 128374 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 128375 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 128376 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 128377 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 128378 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 128379 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 128380 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 128381 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 128382 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 128383 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 128384 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 128385 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 128386 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 128387 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 128388 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 128389 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 128390 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 128391 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128392 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128393 | 7, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 128394 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 128395 | 8, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 128396 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 128397 | 40, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 128398 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 128399 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 128400 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 128401 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 128402 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 128403 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 128404 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 128405 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub |
| 128406 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 128407 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub |
| 128408 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 128409 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub |
| 128410 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 128411 | 0, // ZPR2_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 128412 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 128413 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 128414 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 128415 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 128416 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 128417 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 128418 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 128419 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 128420 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 128421 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 128422 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 128423 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 128424 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 128425 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 128426 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 128427 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 128428 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 128429 | 0, // ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 128430 | 0, // ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 128431 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 128432 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 128433 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 128434 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 128435 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 128436 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2 |
| 128437 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 128438 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 128439 | 75, // ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 128440 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 128441 | 0, // ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 |
| 128442 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 128443 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 128444 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2 |
| 128445 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 128446 | 0, // ZPR2_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 128447 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 128448 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 128449 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 128450 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 128451 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 128452 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128453 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128454 | 0, // ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128455 | 0, // ZPR2_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 128456 | 128, // ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 128457 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 128458 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 |
| 128459 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1 |
| 128460 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 128461 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2 |
| 128462 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 128463 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 128464 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 128465 | 0, // ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 128466 | }, |
| 128467 | { // ZPR2_with_zsub_in_FPR128_lo |
| 128468 | 7, // ZPR2_with_zsub_in_FPR128_lo:bsub -> FPR8 |
| 128469 | 0, // ZPR2_with_zsub_in_FPR128_lo:bsub_hi |
| 128470 | 65, // ZPR2_with_zsub_in_FPR128_lo:dsub -> FPR64_lo |
| 128471 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub0 |
| 128472 | 56, // ZPR2_with_zsub_in_FPR128_lo:dsub1 -> FPR64 |
| 128473 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2 |
| 128474 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3 |
| 128475 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub_hi |
| 128476 | 10, // ZPR2_with_zsub_in_FPR128_lo:hsub -> FPR16_lo |
| 128477 | 0, // ZPR2_with_zsub_in_FPR128_lo:hsub_hi |
| 128478 | 0, // ZPR2_with_zsub_in_FPR128_lo:psub |
| 128479 | 0, // ZPR2_with_zsub_in_FPR128_lo:psub0 |
| 128480 | 0, // ZPR2_with_zsub_in_FPR128_lo:psub1 |
| 128481 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub0 |
| 128482 | 92, // ZPR2_with_zsub_in_FPR128_lo:qsub1 -> FPR128 |
| 128483 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub2 |
| 128484 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub3 |
| 128485 | 44, // ZPR2_with_zsub_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128486 | 0, // ZPR2_with_zsub_in_FPR128_lo:ssub_hi |
| 128487 | 0, // ZPR2_with_zsub_in_FPR128_lo:sub_32 |
| 128488 | 0, // ZPR2_with_zsub_in_FPR128_lo:sub_32_hi |
| 128489 | 0, // ZPR2_with_zsub_in_FPR128_lo:sube32 |
| 128490 | 0, // ZPR2_with_zsub_in_FPR128_lo:sube64 |
| 128491 | 0, // ZPR2_with_zsub_in_FPR128_lo:subo32 |
| 128492 | 0, // ZPR2_with_zsub_in_FPR128_lo:subo64 |
| 128493 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_0 |
| 128494 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_1 |
| 128495 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_2 |
| 128496 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_3 |
| 128497 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_4 |
| 128498 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_5 |
| 128499 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_6 |
| 128500 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_7 |
| 128501 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubb |
| 128502 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubd0 |
| 128503 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubd1 |
| 128504 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh0 |
| 128505 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1 |
| 128506 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubq0 |
| 128507 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubq1 |
| 128508 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs0 |
| 128509 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1 |
| 128510 | 94, // ZPR2_with_zsub_in_FPR128_lo:zsub -> FPR128_lo |
| 128511 | 97, // ZPR2_with_zsub_in_FPR128_lo:zsub0 -> ZPR_4b |
| 128512 | 93, // ZPR2_with_zsub_in_FPR128_lo:zsub1 -> ZPR |
| 128513 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub2 |
| 128514 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub3 |
| 128515 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub_hi |
| 128516 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubd1_then_zasubq0 |
| 128517 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubd1_then_zasubq1 |
| 128518 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubd0 |
| 128519 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1 |
| 128520 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubq0 |
| 128521 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubq1 |
| 128522 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 128523 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 128524 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubd0 |
| 128525 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1 |
| 128526 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubq0 |
| 128527 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubq1 |
| 128528 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs0 |
| 128529 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1 |
| 128530 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 128531 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 128532 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 128533 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 128534 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 128535 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 128536 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128537 | 0, // ZPR2_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128538 | 7, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 128539 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_bsub_hi |
| 128540 | 8, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 128541 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_hsub_hi |
| 128542 | 40, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 128543 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub1_then_ssub_hi |
| 128544 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_bsub |
| 128545 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_bsub_hi |
| 128546 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_hsub |
| 128547 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_hsub_hi |
| 128548 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_ssub |
| 128549 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub3_then_ssub_hi |
| 128550 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_bsub |
| 128551 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_bsub_hi |
| 128552 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_hsub |
| 128553 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_hsub_hi |
| 128554 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_ssub |
| 128555 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_then_ssub_hi |
| 128556 | 0, // ZPR2_with_zsub_in_FPR128_lo:psub1_then_psub |
| 128557 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub1_then_dsub_hi |
| 128558 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub3_then_dsub_hi |
| 128559 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub2_then_dsub_hi |
| 128560 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32 |
| 128561 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 128562 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32 |
| 128563 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 128564 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32 |
| 128565 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 128566 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32 |
| 128567 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 128568 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32 |
| 128569 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 128570 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32 |
| 128571 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 128572 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32 |
| 128573 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 128574 | 0, // ZPR2_with_zsub_in_FPR128_lo:subo64_then_sub_32 |
| 128575 | 0, // ZPR2_with_zsub_in_FPR128_lo:subo64_then_sub_32_hi |
| 128576 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub1_then_zsub_hi |
| 128577 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub3_then_zsub_hi |
| 128578 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub2_then_zsub_hi |
| 128579 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub0_dsub1 |
| 128580 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 128581 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub1_dsub2 |
| 128582 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub1_dsub2_dsub3 |
| 128583 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub2_dsub3 |
| 128584 | 76, // ZPR2_with_zsub_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 128585 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 |
| 128586 | 0, // ZPR2_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2 |
| 128587 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub0_qsub1 |
| 128588 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub0_qsub1_qsub2 |
| 128589 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub1_qsub2 |
| 128590 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub1_qsub2_qsub3 |
| 128591 | 0, // ZPR2_with_zsub_in_FPR128_lo:qsub2_qsub3 |
| 128592 | 0, // ZPR2_with_zsub_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 128593 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_0_x8sub_1 |
| 128594 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_2_x8sub_3 |
| 128595 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_4_x8sub_5 |
| 128596 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_6_x8sub_7 |
| 128597 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128598 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128599 | 0, // ZPR2_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128600 | 0, // ZPR2_with_zsub_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 128601 | 133, // ZPR2_with_zsub_in_FPR128_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 128602 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 128603 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2 |
| 128604 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub0_zsub1 |
| 128605 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub0_zsub1_zsub2 |
| 128606 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub1_zsub2 |
| 128607 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub1_zsub2_zsub3 |
| 128608 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub2_zsub3 |
| 128609 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub0_zsub2 |
| 128610 | 0, // ZPR2_with_zsub_in_FPR128_lo:zsub1_zsub3 |
| 128611 | }, |
| 128612 | { // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 128613 | 7, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 128614 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 128615 | 65, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 128616 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub0 |
| 128617 | 65, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 128618 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2 |
| 128619 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3 |
| 128620 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 128621 | 10, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 128622 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 128623 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:psub |
| 128624 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:psub0 |
| 128625 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:psub1 |
| 128626 | 94, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128_lo |
| 128627 | 94, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 128628 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub2 |
| 128629 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub3 |
| 128630 | 44, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128631 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 128632 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sub_32 |
| 128633 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 128634 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sube32 |
| 128635 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sube64 |
| 128636 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:subo32 |
| 128637 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:subo64 |
| 128638 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 128639 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 128640 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 128641 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 128642 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 128643 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 128644 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 128645 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 128646 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubb |
| 128647 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 128648 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 128649 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 128650 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 128651 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 128652 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 128653 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 128654 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 128655 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub |
| 128656 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub0 |
| 128657 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub1 |
| 128658 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub2 |
| 128659 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub3 |
| 128660 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 128661 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 128662 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 128663 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 128664 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 128665 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 128666 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 128667 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 128668 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 128669 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 128670 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 128671 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 128672 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 128673 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 128674 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 128675 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 128676 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 128677 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 128678 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 128679 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 128680 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 128681 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128682 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128683 | 7, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 128684 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 128685 | 10, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 128686 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 128687 | 44, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128688 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 128689 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 128690 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 128691 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 128692 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 128693 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 128694 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 128695 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 128696 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 128697 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 128698 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 128699 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 128700 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 128701 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 128702 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 128703 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 128704 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 128705 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 128706 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 128707 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 128708 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 128709 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 128710 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 128711 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 128712 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 128713 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 128714 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 128715 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 128716 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 128717 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 128718 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 128719 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 128720 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 128721 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 128722 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 128723 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 128724 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 128725 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 128726 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 128727 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 128728 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 128729 | 79, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 128730 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 128731 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 128732 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 128733 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 128734 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 128735 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 128736 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 128737 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 128738 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 128739 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 128740 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 128741 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 128742 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128743 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128744 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128745 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 128746 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 128747 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 128748 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 128749 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 128750 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 128751 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 128752 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 128753 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 128754 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 128755 | 0, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 128756 | }, |
| 128757 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 128758 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 128759 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:bsub_hi |
| 128760 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 128761 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub0 |
| 128762 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 128763 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2 |
| 128764 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3 |
| 128765 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub_hi |
| 128766 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 128767 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:hsub_hi |
| 128768 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:psub |
| 128769 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:psub0 |
| 128770 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:psub1 |
| 128771 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub0 |
| 128772 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 128773 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub2 |
| 128774 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub3 |
| 128775 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128776 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:ssub_hi |
| 128777 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sub_32 |
| 128778 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sub_32_hi |
| 128779 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sube32 |
| 128780 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sube64 |
| 128781 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:subo32 |
| 128782 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:subo64 |
| 128783 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_0 |
| 128784 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_1 |
| 128785 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_2 |
| 128786 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_3 |
| 128787 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_4 |
| 128788 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_5 |
| 128789 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_6 |
| 128790 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_7 |
| 128791 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubb |
| 128792 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubd0 |
| 128793 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubd1 |
| 128794 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh0 |
| 128795 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1 |
| 128796 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubq0 |
| 128797 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubq1 |
| 128798 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs0 |
| 128799 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1 |
| 128800 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub -> FPR128_lo |
| 128801 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub0 -> ZPR_4b |
| 128802 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 128803 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub2 |
| 128804 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub3 |
| 128805 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub_hi |
| 128806 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 128807 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 128808 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 128809 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 128810 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 128811 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 128812 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 128813 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 128814 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 128815 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 128816 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 128817 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 128818 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 128819 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 128820 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 128821 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 128822 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 128823 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 128824 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 128825 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 128826 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128827 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128828 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 128829 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 128830 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 128831 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 128832 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 128833 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 128834 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 128835 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 128836 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 128837 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 128838 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 128839 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 128840 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_bsub |
| 128841 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 128842 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_hsub |
| 128843 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 128844 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_ssub |
| 128845 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 128846 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 128847 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 128848 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 128849 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 128850 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 128851 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 128852 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 128853 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 128854 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 128855 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 128856 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 128857 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 128858 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 128859 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 128860 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 128861 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 128862 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 128863 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 128864 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 128865 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 128866 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 128867 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 128868 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 128869 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 128870 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 128871 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_dsub2 |
| 128872 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 128873 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 128874 | 79, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 128875 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 128876 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 |
| 128877 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 128878 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 128879 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub1_qsub2 |
| 128880 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 128881 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 128882 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 128883 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 128884 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 128885 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 128886 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 128887 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 128888 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 128889 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 128890 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 128891 | 140, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 128892 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 128893 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 128894 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 128895 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 128896 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 128897 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 128898 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 128899 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 128900 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 128901 | }, |
| 128902 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 128903 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:bsub -> FPR8 |
| 128904 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:bsub_hi |
| 128905 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub -> FPR64 |
| 128906 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0 |
| 128907 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 128908 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2 |
| 128909 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3 |
| 128910 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_hi |
| 128911 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:hsub -> FPR16 |
| 128912 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:hsub_hi |
| 128913 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub |
| 128914 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub0 |
| 128915 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub1 |
| 128916 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0 |
| 128917 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 128918 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2 |
| 128919 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub3 |
| 128920 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:ssub -> FPR32 |
| 128921 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:ssub_hi |
| 128922 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32 |
| 128923 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_hi |
| 128924 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sube32 |
| 128925 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sube64 |
| 128926 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo32 |
| 128927 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64 |
| 128928 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_0 |
| 128929 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1 |
| 128930 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2 |
| 128931 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3 |
| 128932 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4 |
| 128933 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5 |
| 128934 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6 |
| 128935 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7 |
| 128936 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubb |
| 128937 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd0 |
| 128938 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1 |
| 128939 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh0 |
| 128940 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1 |
| 128941 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubq0 |
| 128942 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubq1 |
| 128943 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs0 |
| 128944 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1 |
| 128945 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub -> FPR128 |
| 128946 | 99, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 128947 | 93, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 128948 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2 |
| 128949 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub3 |
| 128950 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_hi |
| 128951 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 128952 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 128953 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 128954 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 128955 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 128956 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 128957 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 128958 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 128959 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 128960 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 128961 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 128962 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 128963 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 128964 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 128965 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 128966 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 128967 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 128968 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 128969 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 128970 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 128971 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 128972 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 128973 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 128974 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 128975 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 128976 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 128977 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 128978 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 128979 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub |
| 128980 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 128981 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub |
| 128982 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 128983 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub |
| 128984 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 128985 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub |
| 128986 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 128987 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub |
| 128988 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 128989 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub |
| 128990 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 128991 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub1_then_psub |
| 128992 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 128993 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 128994 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 128995 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 128996 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 128997 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 128998 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 128999 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 129000 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 129001 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 129002 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 129003 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 129004 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 129005 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 129006 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 129007 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 129008 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 129009 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 129010 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 129011 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 129012 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 129013 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 129014 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1 |
| 129015 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 129016 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2 |
| 129017 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 129018 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_dsub3 |
| 129019 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 129020 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 129021 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 129022 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1 |
| 129023 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 129024 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2 |
| 129025 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 129026 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2_qsub3 |
| 129027 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 129028 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 129029 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 129030 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 129031 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 129032 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129033 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129034 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129035 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 129036 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 129037 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 129038 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 129039 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1 |
| 129040 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 129041 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2 |
| 129042 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 129043 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2_zsub3 |
| 129044 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub2 |
| 129045 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub3 |
| 129046 | }, |
| 129047 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 129048 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:bsub -> FPR8 |
| 129049 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:bsub_hi |
| 129050 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 129051 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0 |
| 129052 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 129053 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2 |
| 129054 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3 |
| 129055 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_hi |
| 129056 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 129057 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:hsub_hi |
| 129058 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub |
| 129059 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub0 |
| 129060 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub1 |
| 129061 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0 |
| 129062 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 129063 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2 |
| 129064 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub3 |
| 129065 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129066 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:ssub_hi |
| 129067 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32 |
| 129068 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_hi |
| 129069 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sube32 |
| 129070 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sube64 |
| 129071 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo32 |
| 129072 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64 |
| 129073 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_0 |
| 129074 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1 |
| 129075 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2 |
| 129076 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3 |
| 129077 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4 |
| 129078 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5 |
| 129079 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6 |
| 129080 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7 |
| 129081 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubb |
| 129082 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd0 |
| 129083 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1 |
| 129084 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh0 |
| 129085 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1 |
| 129086 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubq0 |
| 129087 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubq1 |
| 129088 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs0 |
| 129089 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1 |
| 129090 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 129091 | 100, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_Lo |
| 129092 | 97, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1 -> ZPR_4b |
| 129093 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2 |
| 129094 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub3 |
| 129095 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_hi |
| 129096 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 129097 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 129098 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 129099 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 129100 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 129101 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 129102 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 129103 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 129104 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 129105 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 129106 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 129107 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 129108 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 129109 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 129110 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 129111 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 129112 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 129113 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 129114 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 129115 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 129116 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129117 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129118 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 129119 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 129120 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 129121 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 129122 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129123 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 129124 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub |
| 129125 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 129126 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub |
| 129127 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 129128 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub |
| 129129 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 129130 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub |
| 129131 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 129132 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub |
| 129133 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 129134 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub |
| 129135 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 129136 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub1_then_psub |
| 129137 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 129138 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 129139 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 129140 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 129141 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 129142 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 129143 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 129144 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 129145 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 129146 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 129147 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 129148 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 129149 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 129150 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 129151 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 129152 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 129153 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 129154 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 129155 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 129156 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 129157 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 129158 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 129159 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1 |
| 129160 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 129161 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2 |
| 129162 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 129163 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_dsub3 |
| 129164 | 79, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 129165 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 129166 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 129167 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1 |
| 129168 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 129169 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2 |
| 129170 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 129171 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2_qsub3 |
| 129172 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 129173 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 129174 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 129175 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 129176 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 129177 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129178 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129179 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129180 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 129181 | 140, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 129182 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 129183 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 129184 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1 |
| 129185 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 129186 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2 |
| 129187 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 129188 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2_zsub3 |
| 129189 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub2 |
| 129190 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub3 |
| 129191 | }, |
| 129192 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 129193 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 129194 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:bsub_hi |
| 129195 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 129196 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0 |
| 129197 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 129198 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2 |
| 129199 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3 |
| 129200 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_hi |
| 129201 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 129202 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:hsub_hi |
| 129203 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:psub |
| 129204 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:psub0 |
| 129205 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:psub1 |
| 129206 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0 |
| 129207 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 129208 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2 |
| 129209 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub3 |
| 129210 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 129211 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:ssub_hi |
| 129212 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32 |
| 129213 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_hi |
| 129214 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sube32 |
| 129215 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sube64 |
| 129216 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:subo32 |
| 129217 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64 |
| 129218 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_0 |
| 129219 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1 |
| 129220 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2 |
| 129221 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3 |
| 129222 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4 |
| 129223 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5 |
| 129224 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6 |
| 129225 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7 |
| 129226 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubb |
| 129227 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd0 |
| 129228 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1 |
| 129229 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh0 |
| 129230 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1 |
| 129231 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubq0 |
| 129232 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubq1 |
| 129233 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs0 |
| 129234 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1 |
| 129235 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 129236 | 101, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 129237 | 93, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 129238 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2 |
| 129239 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub3 |
| 129240 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_hi |
| 129241 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 129242 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 129243 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 129244 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 129245 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 129246 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 129247 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 129248 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 129249 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 129250 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 129251 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 129252 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 129253 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 129254 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 129255 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 129256 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 129257 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 129258 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 129259 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 129260 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 129261 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129262 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129263 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 129264 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 129265 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 129266 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 129267 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 129268 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 129269 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 129270 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 129271 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 129272 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 129273 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 129274 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 129275 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_bsub |
| 129276 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 129277 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_hsub |
| 129278 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 129279 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_ssub |
| 129280 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 129281 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 129282 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 129283 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 129284 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 129285 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 129286 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 129287 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 129288 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 129289 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 129290 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 129291 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 129292 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 129293 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 129294 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 129295 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 129296 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 129297 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 129298 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 129299 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 129300 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 129301 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 129302 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 129303 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 129304 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 129305 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 129306 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 129307 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 129308 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 129309 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 129310 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 129311 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 129312 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 129313 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 129314 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 129315 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 129316 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 129317 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 129318 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 129319 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 129320 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 129321 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 129322 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129323 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129324 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129325 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 129326 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 129327 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 129328 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 129329 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 129330 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 129331 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 129332 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 129333 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 129334 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 129335 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 129336 | }, |
| 129337 | { // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 129338 | 7, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 129339 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:bsub_hi |
| 129340 | 65, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 129341 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0 |
| 129342 | 65, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 129343 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2 |
| 129344 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3 |
| 129345 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_hi |
| 129346 | 10, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 129347 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:hsub_hi |
| 129348 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:psub |
| 129349 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:psub0 |
| 129350 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:psub1 |
| 129351 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0 |
| 129352 | 94, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 129353 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2 |
| 129354 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub3 |
| 129355 | 44, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129356 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:ssub_hi |
| 129357 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32 |
| 129358 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_hi |
| 129359 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sube32 |
| 129360 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sube64 |
| 129361 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:subo32 |
| 129362 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64 |
| 129363 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_0 |
| 129364 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1 |
| 129365 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2 |
| 129366 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3 |
| 129367 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4 |
| 129368 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5 |
| 129369 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6 |
| 129370 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7 |
| 129371 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubb |
| 129372 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd0 |
| 129373 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1 |
| 129374 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh0 |
| 129375 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1 |
| 129376 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubq0 |
| 129377 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubq1 |
| 129378 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs0 |
| 129379 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1 |
| 129380 | 98, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 129381 | 102, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 129382 | 97, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_4b |
| 129383 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2 |
| 129384 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub3 |
| 129385 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_hi |
| 129386 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 129387 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 129388 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 129389 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 129390 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 129391 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 129392 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 129393 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 129394 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 129395 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 129396 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 129397 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 129398 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 129399 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 129400 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 129401 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 129402 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 129403 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 129404 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 129405 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 129406 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129407 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129408 | 7, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 129409 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 129410 | 10, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 129411 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 129412 | 44, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129413 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 129414 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 129415 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 129416 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 129417 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 129418 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 129419 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 129420 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_bsub |
| 129421 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 129422 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_hsub |
| 129423 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 129424 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_ssub |
| 129425 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 129426 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 129427 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 129428 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 129429 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 129430 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 129431 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 129432 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 129433 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 129434 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 129435 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 129436 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 129437 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 129438 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 129439 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 129440 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 129441 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 129442 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 129443 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 129444 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 129445 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 129446 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 129447 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 129448 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 129449 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 129450 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 129451 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_dsub2 |
| 129452 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 129453 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 129454 | 79, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 129455 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 129456 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 129457 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 129458 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 129459 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_qsub2 |
| 129460 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 129461 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 129462 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 129463 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 129464 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 129465 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 129466 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 129467 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129468 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129469 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129470 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 129471 | 163, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 129472 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 129473 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 129474 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub1 |
| 129475 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 129476 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub2 |
| 129477 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 129478 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 129479 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 129480 | 0, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 129481 | }, |
| 129482 | { // QQ_with_qsub0_in_FPR128_0to7 |
| 129483 | 7, // QQ_with_qsub0_in_FPR128_0to7:bsub -> FPR8 |
| 129484 | 0, // QQ_with_qsub0_in_FPR128_0to7:bsub_hi |
| 129485 | 65, // QQ_with_qsub0_in_FPR128_0to7:dsub -> FPR64_lo |
| 129486 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub0 |
| 129487 | 65, // QQ_with_qsub0_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 129488 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2 |
| 129489 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3 |
| 129490 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub_hi |
| 129491 | 10, // QQ_with_qsub0_in_FPR128_0to7:hsub -> FPR16_lo |
| 129492 | 0, // QQ_with_qsub0_in_FPR128_0to7:hsub_hi |
| 129493 | 0, // QQ_with_qsub0_in_FPR128_0to7:psub |
| 129494 | 0, // QQ_with_qsub0_in_FPR128_0to7:psub0 |
| 129495 | 0, // QQ_with_qsub0_in_FPR128_0to7:psub1 |
| 129496 | 98, // QQ_with_qsub0_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 129497 | 94, // QQ_with_qsub0_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 129498 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub2 |
| 129499 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub3 |
| 129500 | 44, // QQ_with_qsub0_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129501 | 0, // QQ_with_qsub0_in_FPR128_0to7:ssub_hi |
| 129502 | 0, // QQ_with_qsub0_in_FPR128_0to7:sub_32 |
| 129503 | 0, // QQ_with_qsub0_in_FPR128_0to7:sub_32_hi |
| 129504 | 0, // QQ_with_qsub0_in_FPR128_0to7:sube32 |
| 129505 | 0, // QQ_with_qsub0_in_FPR128_0to7:sube64 |
| 129506 | 0, // QQ_with_qsub0_in_FPR128_0to7:subo32 |
| 129507 | 0, // QQ_with_qsub0_in_FPR128_0to7:subo64 |
| 129508 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_0 |
| 129509 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_1 |
| 129510 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_2 |
| 129511 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_3 |
| 129512 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_4 |
| 129513 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_5 |
| 129514 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_6 |
| 129515 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_7 |
| 129516 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubb |
| 129517 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubd0 |
| 129518 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubd1 |
| 129519 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh0 |
| 129520 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1 |
| 129521 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubq0 |
| 129522 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubq1 |
| 129523 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs0 |
| 129524 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1 |
| 129525 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub |
| 129526 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub0 |
| 129527 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub1 |
| 129528 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub2 |
| 129529 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub3 |
| 129530 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub_hi |
| 129531 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 129532 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 129533 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 129534 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 129535 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 129536 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 129537 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 129538 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 129539 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 129540 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 129541 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 129542 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 129543 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 129544 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 129545 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 129546 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 129547 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 129548 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 129549 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 129550 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 129551 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129552 | 0, // QQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129553 | 7, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 129554 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub_hi |
| 129555 | 10, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 129556 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub_hi |
| 129557 | 44, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129558 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub_hi |
| 129559 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub |
| 129560 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub_hi |
| 129561 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub |
| 129562 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub_hi |
| 129563 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub |
| 129564 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub_hi |
| 129565 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub |
| 129566 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub_hi |
| 129567 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub |
| 129568 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub_hi |
| 129569 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub |
| 129570 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub_hi |
| 129571 | 0, // QQ_with_qsub0_in_FPR128_0to7:psub1_then_psub |
| 129572 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub1_then_dsub_hi |
| 129573 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub3_then_dsub_hi |
| 129574 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub2_then_dsub_hi |
| 129575 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 129576 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 129577 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 129578 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 129579 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 129580 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 129581 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 129582 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 129583 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 129584 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 129585 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 129586 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 129587 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 129588 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 129589 | 0, // QQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32 |
| 129590 | 0, // QQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32_hi |
| 129591 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub1_then_zsub_hi |
| 129592 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub3_then_zsub_hi |
| 129593 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub2_then_zsub_hi |
| 129594 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1 |
| 129595 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 129596 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2 |
| 129597 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 129598 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub2_dsub3 |
| 129599 | 79, // QQ_with_qsub0_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 129600 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 129601 | 0, // QQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 129602 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1 |
| 129603 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 129604 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2 |
| 129605 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 129606 | 0, // QQ_with_qsub0_in_FPR128_0to7:qsub2_qsub3 |
| 129607 | 0, // QQ_with_qsub0_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 129608 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 129609 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 129610 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 129611 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 129612 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129613 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129614 | 0, // QQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129615 | 0, // QQ_with_qsub0_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 129616 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub_qsub1 |
| 129617 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 129618 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 129619 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1 |
| 129620 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 129621 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2 |
| 129622 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 129623 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub2_zsub3 |
| 129624 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub0_zsub2 |
| 129625 | 0, // QQ_with_qsub0_in_FPR128_0to7:zsub1_zsub3 |
| 129626 | }, |
| 129627 | { // QQ_with_qsub1_in_FPR128_0to7 |
| 129628 | 7, // QQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 129629 | 0, // QQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 129630 | 56, // QQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 129631 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 129632 | 65, // QQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 129633 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2 |
| 129634 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3 |
| 129635 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 129636 | 8, // QQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 129637 | 0, // QQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 129638 | 0, // QQ_with_qsub1_in_FPR128_0to7:psub |
| 129639 | 0, // QQ_with_qsub1_in_FPR128_0to7:psub0 |
| 129640 | 0, // QQ_with_qsub1_in_FPR128_0to7:psub1 |
| 129641 | 92, // QQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128 |
| 129642 | 98, // QQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 129643 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub2 |
| 129644 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub3 |
| 129645 | 40, // QQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 129646 | 0, // QQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 129647 | 0, // QQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 129648 | 0, // QQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 129649 | 0, // QQ_with_qsub1_in_FPR128_0to7:sube32 |
| 129650 | 0, // QQ_with_qsub1_in_FPR128_0to7:sube64 |
| 129651 | 0, // QQ_with_qsub1_in_FPR128_0to7:subo32 |
| 129652 | 0, // QQ_with_qsub1_in_FPR128_0to7:subo64 |
| 129653 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 129654 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 129655 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 129656 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 129657 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 129658 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 129659 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 129660 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 129661 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubb |
| 129662 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 129663 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 129664 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 129665 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 129666 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 129667 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 129668 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 129669 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 129670 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub |
| 129671 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 129672 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 129673 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 129674 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 129675 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 129676 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 129677 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 129678 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 129679 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 129680 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 129681 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 129682 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 129683 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 129684 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 129685 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 129686 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 129687 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 129688 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 129689 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 129690 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 129691 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 129692 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 129693 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 129694 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 129695 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 129696 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129697 | 0, // QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129698 | 7, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 129699 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 129700 | 10, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 129701 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 129702 | 44, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129703 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 129704 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 129705 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 129706 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 129707 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 129708 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 129709 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 129710 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub |
| 129711 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 129712 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub |
| 129713 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 129714 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub |
| 129715 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 129716 | 0, // QQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 129717 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 129718 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 129719 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 129720 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 129721 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 129722 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 129723 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 129724 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 129725 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 129726 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 129727 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 129728 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 129729 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 129730 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 129731 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 129732 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 129733 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 129734 | 0, // QQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 129735 | 0, // QQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 129736 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 129737 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 129738 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 129739 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 129740 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 129741 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 |
| 129742 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 129743 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 129744 | 77, // QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 129745 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 129746 | 0, // QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 129747 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 129748 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 129749 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 |
| 129750 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 129751 | 0, // QQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 129752 | 0, // QQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 129753 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 129754 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 129755 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 129756 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 129757 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129758 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129759 | 0, // QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129760 | 0, // QQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 129761 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 129762 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 129763 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 129764 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 129765 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 129766 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 129767 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 129768 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 129769 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 129770 | 0, // QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 129771 | }, |
| 129772 | { // ZPR2Mul2_Hi |
| 129773 | 7, // ZPR2Mul2_Hi:bsub -> FPR8 |
| 129774 | 0, // ZPR2Mul2_Hi:bsub_hi |
| 129775 | 56, // ZPR2Mul2_Hi:dsub -> FPR64 |
| 129776 | 0, // ZPR2Mul2_Hi:dsub0 |
| 129777 | 56, // ZPR2Mul2_Hi:dsub1 -> FPR64 |
| 129778 | 0, // ZPR2Mul2_Hi:dsub2 |
| 129779 | 0, // ZPR2Mul2_Hi:dsub3 |
| 129780 | 0, // ZPR2Mul2_Hi:dsub_hi |
| 129781 | 8, // ZPR2Mul2_Hi:hsub -> FPR16 |
| 129782 | 0, // ZPR2Mul2_Hi:hsub_hi |
| 129783 | 0, // ZPR2Mul2_Hi:psub |
| 129784 | 0, // ZPR2Mul2_Hi:psub0 |
| 129785 | 0, // ZPR2Mul2_Hi:psub1 |
| 129786 | 0, // ZPR2Mul2_Hi:qsub0 |
| 129787 | 92, // ZPR2Mul2_Hi:qsub1 -> FPR128 |
| 129788 | 0, // ZPR2Mul2_Hi:qsub2 |
| 129789 | 0, // ZPR2Mul2_Hi:qsub3 |
| 129790 | 40, // ZPR2Mul2_Hi:ssub -> FPR32 |
| 129791 | 0, // ZPR2Mul2_Hi:ssub_hi |
| 129792 | 0, // ZPR2Mul2_Hi:sub_32 |
| 129793 | 0, // ZPR2Mul2_Hi:sub_32_hi |
| 129794 | 0, // ZPR2Mul2_Hi:sube32 |
| 129795 | 0, // ZPR2Mul2_Hi:sube64 |
| 129796 | 0, // ZPR2Mul2_Hi:subo32 |
| 129797 | 0, // ZPR2Mul2_Hi:subo64 |
| 129798 | 0, // ZPR2Mul2_Hi:x8sub_0 |
| 129799 | 0, // ZPR2Mul2_Hi:x8sub_1 |
| 129800 | 0, // ZPR2Mul2_Hi:x8sub_2 |
| 129801 | 0, // ZPR2Mul2_Hi:x8sub_3 |
| 129802 | 0, // ZPR2Mul2_Hi:x8sub_4 |
| 129803 | 0, // ZPR2Mul2_Hi:x8sub_5 |
| 129804 | 0, // ZPR2Mul2_Hi:x8sub_6 |
| 129805 | 0, // ZPR2Mul2_Hi:x8sub_7 |
| 129806 | 0, // ZPR2Mul2_Hi:zasubb |
| 129807 | 0, // ZPR2Mul2_Hi:zasubd0 |
| 129808 | 0, // ZPR2Mul2_Hi:zasubd1 |
| 129809 | 0, // ZPR2Mul2_Hi:zasubh0 |
| 129810 | 0, // ZPR2Mul2_Hi:zasubh1 |
| 129811 | 0, // ZPR2Mul2_Hi:zasubq0 |
| 129812 | 0, // ZPR2Mul2_Hi:zasubq1 |
| 129813 | 0, // ZPR2Mul2_Hi:zasubs0 |
| 129814 | 0, // ZPR2Mul2_Hi:zasubs1 |
| 129815 | 92, // ZPR2Mul2_Hi:zsub -> FPR128 |
| 129816 | 99, // ZPR2Mul2_Hi:zsub0 -> ZPRMul2_Hi |
| 129817 | 93, // ZPR2Mul2_Hi:zsub1 -> ZPR |
| 129818 | 0, // ZPR2Mul2_Hi:zsub2 |
| 129819 | 0, // ZPR2Mul2_Hi:zsub3 |
| 129820 | 0, // ZPR2Mul2_Hi:zsub_hi |
| 129821 | 0, // ZPR2Mul2_Hi:zasubd1_then_zasubq0 |
| 129822 | 0, // ZPR2Mul2_Hi:zasubd1_then_zasubq1 |
| 129823 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubd0 |
| 129824 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubd1 |
| 129825 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubq0 |
| 129826 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubq1 |
| 129827 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 129828 | 0, // ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 129829 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubd0 |
| 129830 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubd1 |
| 129831 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubq0 |
| 129832 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubq1 |
| 129833 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs0 |
| 129834 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1 |
| 129835 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 129836 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 129837 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 129838 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 129839 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 129840 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 129841 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129842 | 0, // ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129843 | 7, // ZPR2Mul2_Hi:dsub1_then_bsub -> FPR8 |
| 129844 | 0, // ZPR2Mul2_Hi:dsub1_then_bsub_hi |
| 129845 | 8, // ZPR2Mul2_Hi:dsub1_then_hsub -> FPR16 |
| 129846 | 0, // ZPR2Mul2_Hi:dsub1_then_hsub_hi |
| 129847 | 40, // ZPR2Mul2_Hi:dsub1_then_ssub -> FPR32 |
| 129848 | 0, // ZPR2Mul2_Hi:dsub1_then_ssub_hi |
| 129849 | 0, // ZPR2Mul2_Hi:dsub3_then_bsub |
| 129850 | 0, // ZPR2Mul2_Hi:dsub3_then_bsub_hi |
| 129851 | 0, // ZPR2Mul2_Hi:dsub3_then_hsub |
| 129852 | 0, // ZPR2Mul2_Hi:dsub3_then_hsub_hi |
| 129853 | 0, // ZPR2Mul2_Hi:dsub3_then_ssub |
| 129854 | 0, // ZPR2Mul2_Hi:dsub3_then_ssub_hi |
| 129855 | 0, // ZPR2Mul2_Hi:dsub2_then_bsub |
| 129856 | 0, // ZPR2Mul2_Hi:dsub2_then_bsub_hi |
| 129857 | 0, // ZPR2Mul2_Hi:dsub2_then_hsub |
| 129858 | 0, // ZPR2Mul2_Hi:dsub2_then_hsub_hi |
| 129859 | 0, // ZPR2Mul2_Hi:dsub2_then_ssub |
| 129860 | 0, // ZPR2Mul2_Hi:dsub2_then_ssub_hi |
| 129861 | 0, // ZPR2Mul2_Hi:psub1_then_psub |
| 129862 | 0, // ZPR2Mul2_Hi:qsub1_then_dsub_hi |
| 129863 | 0, // ZPR2Mul2_Hi:qsub3_then_dsub_hi |
| 129864 | 0, // ZPR2Mul2_Hi:qsub2_then_dsub_hi |
| 129865 | 0, // ZPR2Mul2_Hi:x8sub_7_then_sub_32 |
| 129866 | 0, // ZPR2Mul2_Hi:x8sub_7_then_sub_32_hi |
| 129867 | 0, // ZPR2Mul2_Hi:x8sub_6_then_sub_32 |
| 129868 | 0, // ZPR2Mul2_Hi:x8sub_6_then_sub_32_hi |
| 129869 | 0, // ZPR2Mul2_Hi:x8sub_5_then_sub_32 |
| 129870 | 0, // ZPR2Mul2_Hi:x8sub_5_then_sub_32_hi |
| 129871 | 0, // ZPR2Mul2_Hi:x8sub_4_then_sub_32 |
| 129872 | 0, // ZPR2Mul2_Hi:x8sub_4_then_sub_32_hi |
| 129873 | 0, // ZPR2Mul2_Hi:x8sub_3_then_sub_32 |
| 129874 | 0, // ZPR2Mul2_Hi:x8sub_3_then_sub_32_hi |
| 129875 | 0, // ZPR2Mul2_Hi:x8sub_2_then_sub_32 |
| 129876 | 0, // ZPR2Mul2_Hi:x8sub_2_then_sub_32_hi |
| 129877 | 0, // ZPR2Mul2_Hi:x8sub_1_then_sub_32 |
| 129878 | 0, // ZPR2Mul2_Hi:x8sub_1_then_sub_32_hi |
| 129879 | 0, // ZPR2Mul2_Hi:subo64_then_sub_32 |
| 129880 | 0, // ZPR2Mul2_Hi:subo64_then_sub_32_hi |
| 129881 | 0, // ZPR2Mul2_Hi:zsub1_then_zsub_hi |
| 129882 | 0, // ZPR2Mul2_Hi:zsub3_then_zsub_hi |
| 129883 | 0, // ZPR2Mul2_Hi:zsub2_then_zsub_hi |
| 129884 | 0, // ZPR2Mul2_Hi:dsub0_dsub1 |
| 129885 | 0, // ZPR2Mul2_Hi:dsub0_dsub1_dsub2 |
| 129886 | 0, // ZPR2Mul2_Hi:dsub1_dsub2 |
| 129887 | 0, // ZPR2Mul2_Hi:dsub1_dsub2_dsub3 |
| 129888 | 0, // ZPR2Mul2_Hi:dsub2_dsub3 |
| 129889 | 75, // ZPR2Mul2_Hi:dsub_dsub1 -> DD |
| 129890 | 0, // ZPR2Mul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 129891 | 0, // ZPR2Mul2_Hi:dsub_dsub1_dsub2 |
| 129892 | 0, // ZPR2Mul2_Hi:qsub0_qsub1 |
| 129893 | 0, // ZPR2Mul2_Hi:qsub0_qsub1_qsub2 |
| 129894 | 0, // ZPR2Mul2_Hi:qsub1_qsub2 |
| 129895 | 0, // ZPR2Mul2_Hi:qsub1_qsub2_qsub3 |
| 129896 | 0, // ZPR2Mul2_Hi:qsub2_qsub3 |
| 129897 | 0, // ZPR2Mul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 129898 | 0, // ZPR2Mul2_Hi:x8sub_0_x8sub_1 |
| 129899 | 0, // ZPR2Mul2_Hi:x8sub_2_x8sub_3 |
| 129900 | 0, // ZPR2Mul2_Hi:x8sub_4_x8sub_5 |
| 129901 | 0, // ZPR2Mul2_Hi:x8sub_6_x8sub_7 |
| 129902 | 0, // ZPR2Mul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 129903 | 0, // ZPR2Mul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 129904 | 0, // ZPR2Mul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 129905 | 0, // ZPR2Mul2_Hi:sub_32_subo64_then_sub_32 |
| 129906 | 128, // ZPR2Mul2_Hi:zsub_qsub1 -> QQ |
| 129907 | 0, // ZPR2Mul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 129908 | 0, // ZPR2Mul2_Hi:zsub_qsub1_qsub2 |
| 129909 | 0, // ZPR2Mul2_Hi:zsub0_zsub1 |
| 129910 | 0, // ZPR2Mul2_Hi:zsub0_zsub1_zsub2 |
| 129911 | 0, // ZPR2Mul2_Hi:zsub1_zsub2 |
| 129912 | 0, // ZPR2Mul2_Hi:zsub1_zsub2_zsub3 |
| 129913 | 0, // ZPR2Mul2_Hi:zsub2_zsub3 |
| 129914 | 0, // ZPR2Mul2_Hi:zsub0_zsub2 |
| 129915 | 0, // ZPR2Mul2_Hi:zsub1_zsub3 |
| 129916 | }, |
| 129917 | { // ZPR2Mul2_Lo |
| 129918 | 7, // ZPR2Mul2_Lo:bsub -> FPR8 |
| 129919 | 0, // ZPR2Mul2_Lo:bsub_hi |
| 129920 | 65, // ZPR2Mul2_Lo:dsub -> FPR64_lo |
| 129921 | 0, // ZPR2Mul2_Lo:dsub0 |
| 129922 | 65, // ZPR2Mul2_Lo:dsub1 -> FPR64_lo |
| 129923 | 0, // ZPR2Mul2_Lo:dsub2 |
| 129924 | 0, // ZPR2Mul2_Lo:dsub3 |
| 129925 | 0, // ZPR2Mul2_Lo:dsub_hi |
| 129926 | 10, // ZPR2Mul2_Lo:hsub -> FPR16_lo |
| 129927 | 0, // ZPR2Mul2_Lo:hsub_hi |
| 129928 | 0, // ZPR2Mul2_Lo:psub |
| 129929 | 0, // ZPR2Mul2_Lo:psub0 |
| 129930 | 0, // ZPR2Mul2_Lo:psub1 |
| 129931 | 0, // ZPR2Mul2_Lo:qsub0 |
| 129932 | 94, // ZPR2Mul2_Lo:qsub1 -> FPR128_lo |
| 129933 | 0, // ZPR2Mul2_Lo:qsub2 |
| 129934 | 0, // ZPR2Mul2_Lo:qsub3 |
| 129935 | 44, // ZPR2Mul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129936 | 0, // ZPR2Mul2_Lo:ssub_hi |
| 129937 | 0, // ZPR2Mul2_Lo:sub_32 |
| 129938 | 0, // ZPR2Mul2_Lo:sub_32_hi |
| 129939 | 0, // ZPR2Mul2_Lo:sube32 |
| 129940 | 0, // ZPR2Mul2_Lo:sube64 |
| 129941 | 0, // ZPR2Mul2_Lo:subo32 |
| 129942 | 0, // ZPR2Mul2_Lo:subo64 |
| 129943 | 0, // ZPR2Mul2_Lo:x8sub_0 |
| 129944 | 0, // ZPR2Mul2_Lo:x8sub_1 |
| 129945 | 0, // ZPR2Mul2_Lo:x8sub_2 |
| 129946 | 0, // ZPR2Mul2_Lo:x8sub_3 |
| 129947 | 0, // ZPR2Mul2_Lo:x8sub_4 |
| 129948 | 0, // ZPR2Mul2_Lo:x8sub_5 |
| 129949 | 0, // ZPR2Mul2_Lo:x8sub_6 |
| 129950 | 0, // ZPR2Mul2_Lo:x8sub_7 |
| 129951 | 0, // ZPR2Mul2_Lo:zasubb |
| 129952 | 0, // ZPR2Mul2_Lo:zasubd0 |
| 129953 | 0, // ZPR2Mul2_Lo:zasubd1 |
| 129954 | 0, // ZPR2Mul2_Lo:zasubh0 |
| 129955 | 0, // ZPR2Mul2_Lo:zasubh1 |
| 129956 | 0, // ZPR2Mul2_Lo:zasubq0 |
| 129957 | 0, // ZPR2Mul2_Lo:zasubq1 |
| 129958 | 0, // ZPR2Mul2_Lo:zasubs0 |
| 129959 | 0, // ZPR2Mul2_Lo:zasubs1 |
| 129960 | 94, // ZPR2Mul2_Lo:zsub -> FPR128_lo |
| 129961 | 100, // ZPR2Mul2_Lo:zsub0 -> ZPRMul2_Lo |
| 129962 | 97, // ZPR2Mul2_Lo:zsub1 -> ZPR_4b |
| 129963 | 0, // ZPR2Mul2_Lo:zsub2 |
| 129964 | 0, // ZPR2Mul2_Lo:zsub3 |
| 129965 | 0, // ZPR2Mul2_Lo:zsub_hi |
| 129966 | 0, // ZPR2Mul2_Lo:zasubd1_then_zasubq0 |
| 129967 | 0, // ZPR2Mul2_Lo:zasubd1_then_zasubq1 |
| 129968 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubd0 |
| 129969 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubd1 |
| 129970 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubq0 |
| 129971 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubq1 |
| 129972 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 129973 | 0, // ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 129974 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubd0 |
| 129975 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubd1 |
| 129976 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubq0 |
| 129977 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubq1 |
| 129978 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs0 |
| 129979 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1 |
| 129980 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 129981 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 129982 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 129983 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 129984 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 129985 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 129986 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 129987 | 0, // ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 129988 | 7, // ZPR2Mul2_Lo:dsub1_then_bsub -> FPR8 |
| 129989 | 0, // ZPR2Mul2_Lo:dsub1_then_bsub_hi |
| 129990 | 10, // ZPR2Mul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 129991 | 0, // ZPR2Mul2_Lo:dsub1_then_hsub_hi |
| 129992 | 44, // ZPR2Mul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 129993 | 0, // ZPR2Mul2_Lo:dsub1_then_ssub_hi |
| 129994 | 0, // ZPR2Mul2_Lo:dsub3_then_bsub |
| 129995 | 0, // ZPR2Mul2_Lo:dsub3_then_bsub_hi |
| 129996 | 0, // ZPR2Mul2_Lo:dsub3_then_hsub |
| 129997 | 0, // ZPR2Mul2_Lo:dsub3_then_hsub_hi |
| 129998 | 0, // ZPR2Mul2_Lo:dsub3_then_ssub |
| 129999 | 0, // ZPR2Mul2_Lo:dsub3_then_ssub_hi |
| 130000 | 0, // ZPR2Mul2_Lo:dsub2_then_bsub |
| 130001 | 0, // ZPR2Mul2_Lo:dsub2_then_bsub_hi |
| 130002 | 0, // ZPR2Mul2_Lo:dsub2_then_hsub |
| 130003 | 0, // ZPR2Mul2_Lo:dsub2_then_hsub_hi |
| 130004 | 0, // ZPR2Mul2_Lo:dsub2_then_ssub |
| 130005 | 0, // ZPR2Mul2_Lo:dsub2_then_ssub_hi |
| 130006 | 0, // ZPR2Mul2_Lo:psub1_then_psub |
| 130007 | 0, // ZPR2Mul2_Lo:qsub1_then_dsub_hi |
| 130008 | 0, // ZPR2Mul2_Lo:qsub3_then_dsub_hi |
| 130009 | 0, // ZPR2Mul2_Lo:qsub2_then_dsub_hi |
| 130010 | 0, // ZPR2Mul2_Lo:x8sub_7_then_sub_32 |
| 130011 | 0, // ZPR2Mul2_Lo:x8sub_7_then_sub_32_hi |
| 130012 | 0, // ZPR2Mul2_Lo:x8sub_6_then_sub_32 |
| 130013 | 0, // ZPR2Mul2_Lo:x8sub_6_then_sub_32_hi |
| 130014 | 0, // ZPR2Mul2_Lo:x8sub_5_then_sub_32 |
| 130015 | 0, // ZPR2Mul2_Lo:x8sub_5_then_sub_32_hi |
| 130016 | 0, // ZPR2Mul2_Lo:x8sub_4_then_sub_32 |
| 130017 | 0, // ZPR2Mul2_Lo:x8sub_4_then_sub_32_hi |
| 130018 | 0, // ZPR2Mul2_Lo:x8sub_3_then_sub_32 |
| 130019 | 0, // ZPR2Mul2_Lo:x8sub_3_then_sub_32_hi |
| 130020 | 0, // ZPR2Mul2_Lo:x8sub_2_then_sub_32 |
| 130021 | 0, // ZPR2Mul2_Lo:x8sub_2_then_sub_32_hi |
| 130022 | 0, // ZPR2Mul2_Lo:x8sub_1_then_sub_32 |
| 130023 | 0, // ZPR2Mul2_Lo:x8sub_1_then_sub_32_hi |
| 130024 | 0, // ZPR2Mul2_Lo:subo64_then_sub_32 |
| 130025 | 0, // ZPR2Mul2_Lo:subo64_then_sub_32_hi |
| 130026 | 0, // ZPR2Mul2_Lo:zsub1_then_zsub_hi |
| 130027 | 0, // ZPR2Mul2_Lo:zsub3_then_zsub_hi |
| 130028 | 0, // ZPR2Mul2_Lo:zsub2_then_zsub_hi |
| 130029 | 0, // ZPR2Mul2_Lo:dsub0_dsub1 |
| 130030 | 0, // ZPR2Mul2_Lo:dsub0_dsub1_dsub2 |
| 130031 | 0, // ZPR2Mul2_Lo:dsub1_dsub2 |
| 130032 | 0, // ZPR2Mul2_Lo:dsub1_dsub2_dsub3 |
| 130033 | 0, // ZPR2Mul2_Lo:dsub2_dsub3 |
| 130034 | 79, // ZPR2Mul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 130035 | 0, // ZPR2Mul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 130036 | 0, // ZPR2Mul2_Lo:dsub_dsub1_dsub2 |
| 130037 | 0, // ZPR2Mul2_Lo:qsub0_qsub1 |
| 130038 | 0, // ZPR2Mul2_Lo:qsub0_qsub1_qsub2 |
| 130039 | 0, // ZPR2Mul2_Lo:qsub1_qsub2 |
| 130040 | 0, // ZPR2Mul2_Lo:qsub1_qsub2_qsub3 |
| 130041 | 0, // ZPR2Mul2_Lo:qsub2_qsub3 |
| 130042 | 0, // ZPR2Mul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 130043 | 0, // ZPR2Mul2_Lo:x8sub_0_x8sub_1 |
| 130044 | 0, // ZPR2Mul2_Lo:x8sub_2_x8sub_3 |
| 130045 | 0, // ZPR2Mul2_Lo:x8sub_4_x8sub_5 |
| 130046 | 0, // ZPR2Mul2_Lo:x8sub_6_x8sub_7 |
| 130047 | 0, // ZPR2Mul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130048 | 0, // ZPR2Mul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130049 | 0, // ZPR2Mul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130050 | 0, // ZPR2Mul2_Lo:sub_32_subo64_then_sub_32 |
| 130051 | 140, // ZPR2Mul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 130052 | 0, // ZPR2Mul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 130053 | 0, // ZPR2Mul2_Lo:zsub_qsub1_qsub2 |
| 130054 | 0, // ZPR2Mul2_Lo:zsub0_zsub1 |
| 130055 | 0, // ZPR2Mul2_Lo:zsub0_zsub1_zsub2 |
| 130056 | 0, // ZPR2Mul2_Lo:zsub1_zsub2 |
| 130057 | 0, // ZPR2Mul2_Lo:zsub1_zsub2_zsub3 |
| 130058 | 0, // ZPR2Mul2_Lo:zsub2_zsub3 |
| 130059 | 0, // ZPR2Mul2_Lo:zsub0_zsub2 |
| 130060 | 0, // ZPR2Mul2_Lo:zsub1_zsub3 |
| 130061 | }, |
| 130062 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 130063 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 130064 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 130065 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 130066 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 130067 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 130068 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2 |
| 130069 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3 |
| 130070 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 130071 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 130072 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 130073 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub |
| 130074 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub0 |
| 130075 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub1 |
| 130076 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 130077 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_lo |
| 130078 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2 |
| 130079 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub3 |
| 130080 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 130081 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 130082 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 130083 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 130084 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sube32 |
| 130085 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sube64 |
| 130086 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo32 |
| 130087 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64 |
| 130088 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 130089 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 130090 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 130091 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 130092 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 130093 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 130094 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 130095 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 130096 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubb |
| 130097 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 130098 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 130099 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 130100 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 130101 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 130102 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 130103 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 130104 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 130105 | 98, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 130106 | 100, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPRMul2_Lo |
| 130107 | 97, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPR_4b |
| 130108 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2 |
| 130109 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub3 |
| 130110 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 130111 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 130112 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 130113 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 130114 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 130115 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 130116 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 130117 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 130118 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 130119 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 130120 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 130121 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 130122 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 130123 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 130124 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 130125 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 130126 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 130127 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 130128 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 130129 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 130130 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 130131 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130132 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130133 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 130134 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 130135 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 130136 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 130137 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 130138 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 130139 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 130140 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 130141 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 130142 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 130143 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 130144 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 130145 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub |
| 130146 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 130147 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub |
| 130148 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 130149 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub |
| 130150 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 130151 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 130152 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 130153 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 130154 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 130155 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 130156 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 130157 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 130158 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 130159 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 130160 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 130161 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 130162 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 130163 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 130164 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 130165 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 130166 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 130167 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 130168 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 130169 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 130170 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 130171 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 130172 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 130173 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 130174 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 130175 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 130176 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 |
| 130177 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 130178 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 130179 | 79, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 130180 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 130181 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 |
| 130182 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 130183 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 130184 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 |
| 130185 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 130186 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 130187 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 130188 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 130189 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 130190 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 130191 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 130192 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130193 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130194 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130195 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 130196 | 163, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 130197 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 130198 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 |
| 130199 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 |
| 130200 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 130201 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 |
| 130202 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 130203 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 130204 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 130205 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 130206 | }, |
| 130207 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 130208 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 130209 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:bsub_hi |
| 130210 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 130211 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub0 |
| 130212 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 130213 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2 |
| 130214 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3 |
| 130215 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub_hi |
| 130216 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 130217 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:hsub_hi |
| 130218 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:psub |
| 130219 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:psub0 |
| 130220 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:psub1 |
| 130221 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub0 |
| 130222 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 130223 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub2 |
| 130224 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub3 |
| 130225 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 130226 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:ssub_hi |
| 130227 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sub_32 |
| 130228 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sub_32_hi |
| 130229 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sube32 |
| 130230 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sube64 |
| 130231 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:subo32 |
| 130232 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:subo64 |
| 130233 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_0 |
| 130234 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_1 |
| 130235 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_2 |
| 130236 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_3 |
| 130237 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_4 |
| 130238 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_5 |
| 130239 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_6 |
| 130240 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_7 |
| 130241 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubb |
| 130242 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubd0 |
| 130243 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubd1 |
| 130244 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh0 |
| 130245 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1 |
| 130246 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubq0 |
| 130247 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubq1 |
| 130248 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs0 |
| 130249 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1 |
| 130250 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 130251 | 103, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 130252 | 103, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 130253 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub2 |
| 130254 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub3 |
| 130255 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub_hi |
| 130256 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 130257 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 130258 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 130259 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 130260 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 130261 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 130262 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 130263 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 130264 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 130265 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 130266 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 130267 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 130268 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 130269 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 130270 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 130271 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 130272 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 130273 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 130274 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 130275 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 130276 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130277 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130278 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 130279 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 130280 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 130281 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 130282 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 130283 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 130284 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 130285 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 130286 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 130287 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 130288 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 130289 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 130290 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_bsub |
| 130291 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 130292 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_hsub |
| 130293 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 130294 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_ssub |
| 130295 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 130296 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:psub1_then_psub |
| 130297 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 130298 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 130299 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 130300 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 130301 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 130302 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 130303 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 130304 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 130305 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 130306 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 130307 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 130308 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 130309 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 130310 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 130311 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 130312 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 130313 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 130314 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 130315 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 130316 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 130317 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 130318 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 130319 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 130320 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 130321 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_dsub2 |
| 130322 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 130323 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 130324 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 130325 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 130326 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 |
| 130327 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 130328 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 130329 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub1_qsub2 |
| 130330 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 130331 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 130332 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 130333 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 130334 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 130335 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 130336 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 130337 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130338 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130339 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130340 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 130341 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 130342 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 130343 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 |
| 130344 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub0_zsub1 |
| 130345 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 130346 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub1_zsub2 |
| 130347 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 130348 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 130349 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 130350 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 130351 | }, |
| 130352 | { // ZPR2Strided_with_dsub_in_FPR64_lo |
| 130353 | 7, // ZPR2Strided_with_dsub_in_FPR64_lo:bsub -> FPR8 |
| 130354 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:bsub_hi |
| 130355 | 65, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub -> FPR64_lo |
| 130356 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0 |
| 130357 | 65, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1 -> FPR64_lo |
| 130358 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2 |
| 130359 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3 |
| 130360 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_hi |
| 130361 | 10, // ZPR2Strided_with_dsub_in_FPR64_lo:hsub -> FPR16_lo |
| 130362 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:hsub_hi |
| 130363 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub |
| 130364 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub0 |
| 130365 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub1 |
| 130366 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0 |
| 130367 | 94, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1 -> FPR128_lo |
| 130368 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2 |
| 130369 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3 |
| 130370 | 44, // ZPR2Strided_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 130371 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:ssub_hi |
| 130372 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32 |
| 130373 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32_hi |
| 130374 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sube32 |
| 130375 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sube64 |
| 130376 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo32 |
| 130377 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo64 |
| 130378 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_0 |
| 130379 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_1 |
| 130380 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2 |
| 130381 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_3 |
| 130382 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4 |
| 130383 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_5 |
| 130384 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6 |
| 130385 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_7 |
| 130386 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubb |
| 130387 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd0 |
| 130388 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1 |
| 130389 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh0 |
| 130390 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1 |
| 130391 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubq0 |
| 130392 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubq1 |
| 130393 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs0 |
| 130394 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1 |
| 130395 | 98, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub -> FPR128_0to7 |
| 130396 | 102, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0 -> ZPR_3b |
| 130397 | 97, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b |
| 130398 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2 |
| 130399 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3 |
| 130400 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_hi |
| 130401 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 |
| 130402 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 |
| 130403 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 |
| 130404 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 |
| 130405 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 |
| 130406 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 |
| 130407 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 130408 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 130409 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 |
| 130410 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 |
| 130411 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 |
| 130412 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 |
| 130413 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 |
| 130414 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 |
| 130415 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 130416 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 130417 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 130418 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 130419 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 130420 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 130421 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130422 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130423 | 7, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 130424 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub_hi |
| 130425 | 10, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 130426 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub_hi |
| 130427 | 44, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 130428 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub_hi |
| 130429 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub |
| 130430 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub_hi |
| 130431 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub |
| 130432 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub_hi |
| 130433 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub |
| 130434 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub_hi |
| 130435 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub |
| 130436 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub_hi |
| 130437 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub |
| 130438 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub_hi |
| 130439 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub |
| 130440 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub_hi |
| 130441 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub1_then_psub |
| 130442 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_hi |
| 130443 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3_then_dsub_hi |
| 130444 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub_hi |
| 130445 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 |
| 130446 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 130447 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 |
| 130448 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 130449 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 |
| 130450 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 130451 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 |
| 130452 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 130453 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 |
| 130454 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 130455 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 |
| 130456 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 130457 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 |
| 130458 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 130459 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32 |
| 130460 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32_hi |
| 130461 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi |
| 130462 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi |
| 130463 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi |
| 130464 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0_dsub1 |
| 130465 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 130466 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_dsub2 |
| 130467 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 130468 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_dsub3 |
| 130469 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_dsub1 |
| 130470 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 130471 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2 |
| 130472 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0_qsub1 |
| 130473 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 130474 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_qsub2 |
| 130475 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 130476 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_qsub3 |
| 130477 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 130478 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 |
| 130479 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 |
| 130480 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 |
| 130481 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 |
| 130482 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130483 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130484 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130485 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 130486 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_qsub1 |
| 130487 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 130488 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2 |
| 130489 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub1 |
| 130490 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 130491 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub2 |
| 130492 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 130493 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_zsub3 |
| 130494 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub2 |
| 130495 | 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub3 |
| 130496 | }, |
| 130497 | { // ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 130498 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2:bsub -> FPR8 |
| 130499 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:bsub_hi |
| 130500 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub -> FPR64 |
| 130501 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub0 |
| 130502 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1 -> FPR64 |
| 130503 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2 |
| 130504 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3 |
| 130505 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub_hi |
| 130506 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2:hsub -> FPR16 |
| 130507 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:hsub_hi |
| 130508 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:psub |
| 130509 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:psub0 |
| 130510 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:psub1 |
| 130511 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub0 |
| 130512 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub1 -> FPR128 |
| 130513 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub2 |
| 130514 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub3 |
| 130515 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2:ssub -> FPR32 |
| 130516 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:ssub_hi |
| 130517 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sub_32 |
| 130518 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sub_32_hi |
| 130519 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sube32 |
| 130520 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sube64 |
| 130521 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:subo32 |
| 130522 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:subo64 |
| 130523 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_0 |
| 130524 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_1 |
| 130525 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_2 |
| 130526 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_3 |
| 130527 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_4 |
| 130528 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_5 |
| 130529 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_6 |
| 130530 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_7 |
| 130531 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubb |
| 130532 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubd0 |
| 130533 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubd1 |
| 130534 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh0 |
| 130535 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1 |
| 130536 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubq0 |
| 130537 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubq1 |
| 130538 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs0 |
| 130539 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1 |
| 130540 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub -> FPR128 |
| 130541 | 96, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub0 -> ZPRMul2 |
| 130542 | 96, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 130543 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub2 |
| 130544 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub3 |
| 130545 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub_hi |
| 130546 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq0 |
| 130547 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq1 |
| 130548 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd0 |
| 130549 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1 |
| 130550 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq0 |
| 130551 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq1 |
| 130552 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 130553 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 130554 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd0 |
| 130555 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1 |
| 130556 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq0 |
| 130557 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq1 |
| 130558 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs0 |
| 130559 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1 |
| 130560 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 130561 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 130562 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 130563 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 130564 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 130565 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 130566 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130567 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130568 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 130569 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_bsub_hi |
| 130570 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 130571 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_hsub_hi |
| 130572 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 130573 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_then_ssub_hi |
| 130574 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_bsub |
| 130575 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_bsub_hi |
| 130576 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_hsub |
| 130577 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_hsub_hi |
| 130578 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_ssub |
| 130579 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub3_then_ssub_hi |
| 130580 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_bsub |
| 130581 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_bsub_hi |
| 130582 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_hsub |
| 130583 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_hsub_hi |
| 130584 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_ssub |
| 130585 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_then_ssub_hi |
| 130586 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:psub1_then_psub |
| 130587 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub1_then_dsub_hi |
| 130588 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub3_then_dsub_hi |
| 130589 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub2_then_dsub_hi |
| 130590 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32 |
| 130591 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 130592 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32 |
| 130593 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 130594 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32 |
| 130595 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 130596 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32 |
| 130597 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 130598 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32 |
| 130599 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 130600 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32 |
| 130601 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 130602 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32 |
| 130603 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 130604 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:subo64_then_sub_32 |
| 130605 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:subo64_then_sub_32_hi |
| 130606 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub1_then_zsub_hi |
| 130607 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub3_then_zsub_hi |
| 130608 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub2_then_zsub_hi |
| 130609 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub0_dsub1 |
| 130610 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 130611 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_dsub2 |
| 130612 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 130613 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub2_dsub3 |
| 130614 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub_dsub1 |
| 130615 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 130616 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2 |
| 130617 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub0_qsub1 |
| 130618 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 130619 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub1_qsub2 |
| 130620 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 130621 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:qsub2_qsub3 |
| 130622 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 130623 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_0_x8sub_1 |
| 130624 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_2_x8sub_3 |
| 130625 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_4_x8sub_5 |
| 130626 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_6_x8sub_7 |
| 130627 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130628 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130629 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130630 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 130631 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub_qsub1 |
| 130632 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 130633 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2 |
| 130634 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub0_zsub1 |
| 130635 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 130636 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub1_zsub2 |
| 130637 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 130638 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub2_zsub3 |
| 130639 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub0_zsub2 |
| 130640 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2:zsub1_zsub3 |
| 130641 | }, |
| 130642 | { // ZPR2_with_qsub1_in_FPR128_0to7 |
| 130643 | 7, // ZPR2_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 130644 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:bsub_hi |
| 130645 | 56, // ZPR2_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 130646 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub0 |
| 130647 | 65, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 130648 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2 |
| 130649 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3 |
| 130650 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub_hi |
| 130651 | 8, // ZPR2_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 130652 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:hsub_hi |
| 130653 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:psub |
| 130654 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:psub0 |
| 130655 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:psub1 |
| 130656 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub0 |
| 130657 | 98, // ZPR2_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 130658 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub2 |
| 130659 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub3 |
| 130660 | 40, // ZPR2_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 130661 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:ssub_hi |
| 130662 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sub_32 |
| 130663 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 130664 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sube32 |
| 130665 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sube64 |
| 130666 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:subo32 |
| 130667 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:subo64 |
| 130668 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 130669 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 130670 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 130671 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 130672 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 130673 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 130674 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 130675 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 130676 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubb |
| 130677 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubd0 |
| 130678 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubd1 |
| 130679 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh0 |
| 130680 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1 |
| 130681 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubq0 |
| 130682 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubq1 |
| 130683 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs0 |
| 130684 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1 |
| 130685 | 92, // ZPR2_with_qsub1_in_FPR128_0to7:zsub -> FPR128 |
| 130686 | 93, // ZPR2_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR |
| 130687 | 102, // ZPR2_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 130688 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub2 |
| 130689 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub3 |
| 130690 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub_hi |
| 130691 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 130692 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 130693 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 130694 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 130695 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 130696 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 130697 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 130698 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 130699 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 130700 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 130701 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 130702 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 130703 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 130704 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 130705 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 130706 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 130707 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 130708 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 130709 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 130710 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 130711 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130712 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130713 | 7, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 130714 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 130715 | 10, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 130716 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 130717 | 44, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 130718 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 130719 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 130720 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 130721 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 130722 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 130723 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 130724 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 130725 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_bsub |
| 130726 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 130727 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_hsub |
| 130728 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 130729 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_ssub |
| 130730 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 130731 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 130732 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 130733 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 130734 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 130735 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 130736 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 130737 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 130738 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 130739 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 130740 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 130741 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 130742 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 130743 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 130744 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 130745 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 130746 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 130747 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 130748 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 130749 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 130750 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 130751 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 130752 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 130753 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 130754 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 130755 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 130756 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_dsub2 |
| 130757 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 130758 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 130759 | 77, // ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 130760 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 130761 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 130762 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 130763 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 130764 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub1_qsub2 |
| 130765 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 130766 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 130767 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 130768 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 130769 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 130770 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 130771 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 130772 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130773 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130774 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130775 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 130776 | 147, // ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 130777 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 130778 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 130779 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 130780 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 130781 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 130782 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 130783 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 130784 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 130785 | 0, // ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 130786 | }, |
| 130787 | { // ZPR2_with_zsub0_in_ZPRMul4 |
| 130788 | 7, // ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 130789 | 0, // ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 130790 | 56, // ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 130791 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 130792 | 56, // ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 130793 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2 |
| 130794 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 130795 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 130796 | 8, // ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 130797 | 0, // ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 130798 | 0, // ZPR2_with_zsub0_in_ZPRMul4:psub |
| 130799 | 0, // ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 130800 | 0, // ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 130801 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 130802 | 92, // ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 130803 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub2 |
| 130804 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 130805 | 40, // ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 130806 | 0, // ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 130807 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 130808 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 130809 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 130810 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 130811 | 0, // ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 130812 | 0, // ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 130813 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 130814 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 130815 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 130816 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 130817 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 130818 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 130819 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 130820 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 130821 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 130822 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 130823 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 130824 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 130825 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 130826 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 130827 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 130828 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 130829 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 130830 | 92, // ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 130831 | 101, // ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 130832 | 93, // ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 130833 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub2 |
| 130834 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 130835 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 130836 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 130837 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 130838 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 130839 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 130840 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 130841 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 130842 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 130843 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 130844 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 130845 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 130846 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 130847 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 130848 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 130849 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 130850 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 130851 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 130852 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 130853 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 130854 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 130855 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 130856 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 130857 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 130858 | 7, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 130859 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 130860 | 8, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 130861 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 130862 | 40, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 130863 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 130864 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 130865 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 130866 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 130867 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 130868 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 130869 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 130870 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub |
| 130871 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 130872 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub |
| 130873 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 130874 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub |
| 130875 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 130876 | 0, // ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 130877 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 130878 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 130879 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 130880 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 130881 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 130882 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 130883 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 130884 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 130885 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 130886 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 130887 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 130888 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 130889 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 130890 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 130891 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 130892 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 130893 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 130894 | 0, // ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 130895 | 0, // ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 130896 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 130897 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 130898 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 130899 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 130900 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 130901 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 130902 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 130903 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 130904 | 75, // ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 130905 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 130906 | 0, // ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 130907 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 130908 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 130909 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 130910 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 130911 | 0, // ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 130912 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 130913 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 130914 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 130915 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 130916 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 130917 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 130918 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 130919 | 0, // ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 130920 | 0, // ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 130921 | 128, // ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 130922 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 130923 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 130924 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 130925 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 130926 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 130927 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 130928 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 130929 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 130930 | 0, // ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 130931 | }, |
| 130932 | { // ZPR2_with_zsub0_in_ZPR_K |
| 130933 | 7, // ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 130934 | 0, // ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 130935 | 56, // ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 130936 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 130937 | 56, // ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 130938 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2 |
| 130939 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 130940 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 130941 | 8, // ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 130942 | 0, // ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 130943 | 0, // ZPR2_with_zsub0_in_ZPR_K:psub |
| 130944 | 0, // ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 130945 | 0, // ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 130946 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 130947 | 92, // ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 130948 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub2 |
| 130949 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 130950 | 40, // ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 130951 | 0, // ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 130952 | 0, // ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 130953 | 0, // ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 130954 | 0, // ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 130955 | 0, // ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 130956 | 0, // ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 130957 | 0, // ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 130958 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 130959 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 130960 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 130961 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 130962 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 130963 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 130964 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 130965 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 130966 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 130967 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 130968 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 130969 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 130970 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 130971 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 130972 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 130973 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 130974 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 130975 | 92, // ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 130976 | 103, // ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 130977 | 93, // ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 130978 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub2 |
| 130979 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 130980 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 130981 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 130982 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 130983 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 130984 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 130985 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 130986 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 130987 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 130988 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 130989 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 130990 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 130991 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 130992 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 130993 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 130994 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 130995 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 130996 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 130997 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 130998 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 130999 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 131000 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 131001 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131002 | 0, // ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131003 | 7, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 131004 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 131005 | 8, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 131006 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 131007 | 40, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 131008 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 131009 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 131010 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 131011 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 131012 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 131013 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 131014 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 131015 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub |
| 131016 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 131017 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub |
| 131018 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 131019 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub |
| 131020 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 131021 | 0, // ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 131022 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 131023 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 131024 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 131025 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 131026 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 131027 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 131028 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 131029 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 131030 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 131031 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 131032 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 131033 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 131034 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 131035 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 131036 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 131037 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 131038 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 131039 | 0, // ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 131040 | 0, // ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 131041 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 131042 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 131043 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 131044 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 131045 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 131046 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 |
| 131047 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 131048 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 131049 | 75, // ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 131050 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 131051 | 0, // ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 |
| 131052 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 131053 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 131054 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 |
| 131055 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 131056 | 0, // ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 131057 | 0, // ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 131058 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 131059 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 131060 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 131061 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 131062 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131063 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131064 | 0, // ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131065 | 0, // ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 131066 | 128, // ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 131067 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 131068 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 |
| 131069 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 |
| 131070 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 131071 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 |
| 131072 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 131073 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 131074 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 131075 | 0, // ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 131076 | }, |
| 131077 | { // ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 131078 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 131079 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 131080 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 131081 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 131082 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 131083 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 |
| 131084 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 131085 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 131086 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 131087 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 131088 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 131089 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 131090 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 131091 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 131092 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 131093 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 |
| 131094 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 131095 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 131096 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 131097 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 131098 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 131099 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 131100 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 131101 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 131102 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 131103 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 131104 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 131105 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 131106 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 131107 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 131108 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 131109 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 131110 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 131111 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 131112 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 131113 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 131114 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 131115 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 131116 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 131117 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 131118 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 131119 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 131120 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 131121 | 93, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 131122 | 99, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 131123 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 |
| 131124 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 131125 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 131126 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 131127 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 131128 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 131129 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 131130 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 131131 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 131132 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 131133 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 131134 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 131135 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 131136 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 131137 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 131138 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 131139 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 131140 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 131141 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 131142 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 131143 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 131144 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 131145 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 131146 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131147 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131148 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 131149 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 131150 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 131151 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 131152 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 131153 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 131154 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 131155 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 131156 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 131157 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 131158 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 131159 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 131160 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub |
| 131161 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 131162 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub |
| 131163 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 131164 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub |
| 131165 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 131166 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 131167 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 131168 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 131169 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 131170 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 131171 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 131172 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 131173 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 131174 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 131175 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 131176 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 131177 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 131178 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 131179 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 131180 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 131181 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 131182 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 131183 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 131184 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 131185 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 131186 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 131187 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 131188 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 131189 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 131190 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 131191 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 |
| 131192 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 131193 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 131194 | 75, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 131195 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 131196 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 131197 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 131198 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 131199 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 |
| 131200 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 131201 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 131202 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 131203 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 131204 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 131205 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 131206 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 131207 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131208 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131209 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131210 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 131211 | 128, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 131212 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 131213 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 131214 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 |
| 131215 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 131216 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 |
| 131217 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 131218 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 131219 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 131220 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 131221 | }, |
| 131222 | { // ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 131223 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 131224 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 131225 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64 |
| 131226 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 131227 | 65, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 131228 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2 |
| 131229 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3 |
| 131230 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 131231 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16 |
| 131232 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 131233 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:psub |
| 131234 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 131235 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 131236 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 131237 | 94, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 131238 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2 |
| 131239 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub3 |
| 131240 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32 |
| 131241 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 131242 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 131243 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 131244 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 131245 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 131246 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 131247 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 131248 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 131249 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 131250 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 131251 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 131252 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 131253 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 131254 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 131255 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 131256 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 131257 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 131258 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 131259 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 131260 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 131261 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 131262 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 131263 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 131264 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 131265 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128 |
| 131266 | 93, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR |
| 131267 | 100, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 131268 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2 |
| 131269 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub3 |
| 131270 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 131271 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 131272 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 131273 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 131274 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 131275 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 131276 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 131277 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 131278 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 131279 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 131280 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 131281 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 131282 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 131283 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 131284 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 131285 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 131286 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 131287 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 131288 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 131289 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 131290 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 131291 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131292 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131293 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 131294 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 131295 | 10, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 131296 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 131297 | 44, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 131298 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 131299 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub |
| 131300 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 131301 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub |
| 131302 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 131303 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub |
| 131304 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 131305 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub |
| 131306 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 131307 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub |
| 131308 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 131309 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub |
| 131310 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 131311 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 131312 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 131313 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 131314 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 131315 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 131316 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 131317 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 131318 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 131319 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 131320 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 131321 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 131322 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 131323 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 131324 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 131325 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 131326 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 131327 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 131328 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 131329 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 131330 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 131331 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 131332 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 131333 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 131334 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 131335 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 131336 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 |
| 131337 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 131338 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 |
| 131339 | 77, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 131340 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 131341 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 131342 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 131343 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 131344 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 |
| 131345 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 131346 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 |
| 131347 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 131348 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 131349 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 131350 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 131351 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 131352 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131353 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131354 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131355 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 131356 | 132, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 131357 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 131358 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 131359 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 |
| 131360 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 131361 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 |
| 131362 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 131363 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 |
| 131364 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 131365 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 131366 | }, |
| 131367 | { // ZPR2_with_zsub1_in_ZPRMul4 |
| 131368 | 7, // ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 131369 | 0, // ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 131370 | 56, // ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 131371 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 131372 | 56, // ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 131373 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2 |
| 131374 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3 |
| 131375 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 131376 | 8, // ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 131377 | 0, // ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 131378 | 0, // ZPR2_with_zsub1_in_ZPRMul4:psub |
| 131379 | 0, // ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 131380 | 0, // ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 131381 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 131382 | 92, // ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 131383 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub2 |
| 131384 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub3 |
| 131385 | 40, // ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 131386 | 0, // ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 131387 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 131388 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 131389 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 131390 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 131391 | 0, // ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 131392 | 0, // ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 131393 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 131394 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 131395 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 131396 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 131397 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 131398 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 131399 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 131400 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 131401 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 131402 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 131403 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 131404 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 131405 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 131406 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 131407 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 131408 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 131409 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 131410 | 92, // ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 131411 | 93, // ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPR |
| 131412 | 101, // ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 131413 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub2 |
| 131414 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub3 |
| 131415 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 131416 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 131417 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 131418 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 131419 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 131420 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 131421 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 131422 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 131423 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 131424 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 131425 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 131426 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 131427 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 131428 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 131429 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 131430 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 131431 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 131432 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 131433 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 131434 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 131435 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 131436 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131437 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131438 | 7, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 131439 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 131440 | 8, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 131441 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 131442 | 40, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 131443 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 131444 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 131445 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 131446 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 131447 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 131448 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 131449 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 131450 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub |
| 131451 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 131452 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub |
| 131453 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 131454 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub |
| 131455 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 131456 | 0, // ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 131457 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 131458 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 131459 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 131460 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 131461 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 131462 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 131463 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 131464 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 131465 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 131466 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 131467 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 131468 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 131469 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 131470 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 131471 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 131472 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 131473 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 131474 | 0, // ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 131475 | 0, // ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 131476 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 131477 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 131478 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 131479 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 131480 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 131481 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 |
| 131482 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 131483 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 131484 | 75, // ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 131485 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 131486 | 0, // ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 |
| 131487 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 131488 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 131489 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 |
| 131490 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 131491 | 0, // ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 131492 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 131493 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 131494 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 131495 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 131496 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 131497 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131498 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131499 | 0, // ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131500 | 0, // ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 131501 | 128, // ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 131502 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 131503 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 |
| 131504 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 |
| 131505 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 131506 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 |
| 131507 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 131508 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 131509 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 131510 | 0, // ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 131511 | }, |
| 131512 | { // ZPR2_with_zsub1_in_ZPR_K |
| 131513 | 7, // ZPR2_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 131514 | 0, // ZPR2_with_zsub1_in_ZPR_K:bsub_hi |
| 131515 | 56, // ZPR2_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 131516 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub0 |
| 131517 | 56, // ZPR2_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 131518 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2 |
| 131519 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3 |
| 131520 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub_hi |
| 131521 | 8, // ZPR2_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 131522 | 0, // ZPR2_with_zsub1_in_ZPR_K:hsub_hi |
| 131523 | 0, // ZPR2_with_zsub1_in_ZPR_K:psub |
| 131524 | 0, // ZPR2_with_zsub1_in_ZPR_K:psub0 |
| 131525 | 0, // ZPR2_with_zsub1_in_ZPR_K:psub1 |
| 131526 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub0 |
| 131527 | 92, // ZPR2_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 131528 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub2 |
| 131529 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub3 |
| 131530 | 40, // ZPR2_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 131531 | 0, // ZPR2_with_zsub1_in_ZPR_K:ssub_hi |
| 131532 | 0, // ZPR2_with_zsub1_in_ZPR_K:sub_32 |
| 131533 | 0, // ZPR2_with_zsub1_in_ZPR_K:sub_32_hi |
| 131534 | 0, // ZPR2_with_zsub1_in_ZPR_K:sube32 |
| 131535 | 0, // ZPR2_with_zsub1_in_ZPR_K:sube64 |
| 131536 | 0, // ZPR2_with_zsub1_in_ZPR_K:subo32 |
| 131537 | 0, // ZPR2_with_zsub1_in_ZPR_K:subo64 |
| 131538 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_0 |
| 131539 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_1 |
| 131540 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_2 |
| 131541 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_3 |
| 131542 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_4 |
| 131543 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_5 |
| 131544 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_6 |
| 131545 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_7 |
| 131546 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubb |
| 131547 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubd0 |
| 131548 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubd1 |
| 131549 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh0 |
| 131550 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1 |
| 131551 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubq0 |
| 131552 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubq1 |
| 131553 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs0 |
| 131554 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1 |
| 131555 | 92, // ZPR2_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 131556 | 93, // ZPR2_with_zsub1_in_ZPR_K:zsub0 -> ZPR |
| 131557 | 103, // ZPR2_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 131558 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub2 |
| 131559 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub3 |
| 131560 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub_hi |
| 131561 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 131562 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 131563 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 131564 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 131565 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 131566 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 131567 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 131568 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 131569 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 131570 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 131571 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 131572 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 131573 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 131574 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 131575 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 131576 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 131577 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 131578 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 131579 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 131580 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 131581 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131582 | 0, // ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131583 | 7, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 131584 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 131585 | 8, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 131586 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 131587 | 40, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 131588 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 131589 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_bsub |
| 131590 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 131591 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_hsub |
| 131592 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 131593 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_ssub |
| 131594 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 131595 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_bsub |
| 131596 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 131597 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_hsub |
| 131598 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 131599 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_ssub |
| 131600 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 131601 | 0, // ZPR2_with_zsub1_in_ZPR_K:psub1_then_psub |
| 131602 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 131603 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 131604 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 131605 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 131606 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 131607 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 131608 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 131609 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 131610 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 131611 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 131612 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 131613 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 131614 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 131615 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 131616 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 131617 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 131618 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 131619 | 0, // ZPR2_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 131620 | 0, // ZPR2_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 131621 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 131622 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 131623 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 131624 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 131625 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 131626 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub1_dsub2 |
| 131627 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 |
| 131628 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub2_dsub3 |
| 131629 | 75, // ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 131630 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 131631 | 0, // ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 |
| 131632 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 131633 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 131634 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub1_qsub2 |
| 131635 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 |
| 131636 | 0, // ZPR2_with_zsub1_in_ZPR_K:qsub2_qsub3 |
| 131637 | 0, // ZPR2_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 131638 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 131639 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 131640 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 131641 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 131642 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131643 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131644 | 0, // ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131645 | 0, // ZPR2_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 131646 | 128, // ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 131647 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 131648 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 |
| 131649 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub1 |
| 131650 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 |
| 131651 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub2 |
| 131652 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 |
| 131653 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub2_zsub3 |
| 131654 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 131655 | 0, // ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 131656 | }, |
| 131657 | { // ZPR2_with_zsub_in_FPR128_0to7 |
| 131658 | 7, // ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 131659 | 0, // ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 131660 | 65, // ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 131661 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 131662 | 65, // ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 131663 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2 |
| 131664 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3 |
| 131665 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 131666 | 10, // ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 131667 | 0, // ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 131668 | 0, // ZPR2_with_zsub_in_FPR128_0to7:psub |
| 131669 | 0, // ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 131670 | 0, // ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 131671 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 131672 | 94, // ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 131673 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub2 |
| 131674 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub3 |
| 131675 | 44, // ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 131676 | 0, // ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 131677 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 131678 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 131679 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 131680 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 131681 | 0, // ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 131682 | 0, // ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 131683 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 131684 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 131685 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 131686 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 131687 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 131688 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 131689 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 131690 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 131691 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 131692 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 131693 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 131694 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 131695 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 131696 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 131697 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 131698 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 131699 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 131700 | 98, // ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 131701 | 102, // ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 131702 | 97, // ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_4b |
| 131703 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub2 |
| 131704 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub3 |
| 131705 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 131706 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 131707 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 131708 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 131709 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 131710 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 131711 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 131712 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 131713 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 131714 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 131715 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 131716 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 131717 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 131718 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 131719 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 131720 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 131721 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 131722 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 131723 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 131724 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 131725 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 131726 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131727 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131728 | 7, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 131729 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 131730 | 10, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 131731 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 131732 | 44, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 131733 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 131734 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 131735 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 131736 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 131737 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 131738 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 131739 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 131740 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub |
| 131741 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 131742 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub |
| 131743 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 131744 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub |
| 131745 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 131746 | 0, // ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 131747 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 131748 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 131749 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 131750 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 131751 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 131752 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 131753 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 131754 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 131755 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 131756 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 131757 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 131758 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 131759 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 131760 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 131761 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 131762 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 131763 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 131764 | 0, // ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 131765 | 0, // ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 131766 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 131767 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 131768 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 131769 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 131770 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 131771 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 |
| 131772 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 131773 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 131774 | 79, // ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 131775 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 131776 | 0, // ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 131777 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 131778 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 131779 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 |
| 131780 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 131781 | 0, // ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 131782 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 131783 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 131784 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 131785 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 131786 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 131787 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131788 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131789 | 0, // ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131790 | 0, // ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 131791 | 146, // ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 131792 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 131793 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 131794 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 |
| 131795 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 131796 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 |
| 131797 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 131798 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 131799 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 131800 | 0, // ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 131801 | }, |
| 131802 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 131803 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 131804 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:bsub_hi |
| 131805 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 131806 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0 |
| 131807 | 56, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 131808 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2 |
| 131809 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3 |
| 131810 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_hi |
| 131811 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 131812 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:hsub_hi |
| 131813 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:psub |
| 131814 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:psub0 |
| 131815 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:psub1 |
| 131816 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0 |
| 131817 | 92, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 131818 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2 |
| 131819 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3 |
| 131820 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 131821 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:ssub_hi |
| 131822 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32 |
| 131823 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_hi |
| 131824 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sube32 |
| 131825 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sube64 |
| 131826 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:subo32 |
| 131827 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:subo64 |
| 131828 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0 |
| 131829 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1 |
| 131830 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2 |
| 131831 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3 |
| 131832 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4 |
| 131833 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5 |
| 131834 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6 |
| 131835 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7 |
| 131836 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubb |
| 131837 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd0 |
| 131838 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1 |
| 131839 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh0 |
| 131840 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1 |
| 131841 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq0 |
| 131842 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq1 |
| 131843 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs0 |
| 131844 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1 |
| 131845 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub -> FPR128_lo |
| 131846 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_4b |
| 131847 | 96, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 131848 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2 |
| 131849 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3 |
| 131850 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_hi |
| 131851 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 131852 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 131853 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 131854 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 131855 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 131856 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 131857 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 131858 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 131859 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 131860 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 131861 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 131862 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 131863 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 131864 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 131865 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 131866 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 131867 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 131868 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 131869 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 131870 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 131871 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 131872 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 131873 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 131874 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 131875 | 8, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 131876 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 131877 | 40, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 131878 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 131879 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 131880 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 131881 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 131882 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 131883 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 131884 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 131885 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub |
| 131886 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 131887 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub |
| 131888 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 131889 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub |
| 131890 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 131891 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 131892 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 131893 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 131894 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 131895 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 131896 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 131897 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 131898 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 131899 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 131900 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 131901 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 131902 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 131903 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 131904 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 131905 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 131906 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 131907 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 131908 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 131909 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 131910 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 131911 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 131912 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 131913 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 131914 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 131915 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 131916 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2 |
| 131917 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 131918 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 131919 | 76, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 131920 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 131921 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 |
| 131922 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 131923 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 131924 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2 |
| 131925 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 131926 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 131927 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 131928 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 131929 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 131930 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 131931 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 131932 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 131933 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 131934 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 131935 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 131936 | 133, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 131937 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 131938 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 |
| 131939 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1 |
| 131940 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 131941 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2 |
| 131942 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 131943 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 131944 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 131945 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 131946 | }, |
| 131947 | { // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 131948 | 7, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 131949 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 131950 | 65, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 131951 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 131952 | 65, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 131953 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2 |
| 131954 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3 |
| 131955 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 131956 | 10, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 131957 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 131958 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:psub |
| 131959 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:psub0 |
| 131960 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:psub1 |
| 131961 | 98, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 131962 | 98, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 131963 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub2 |
| 131964 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub3 |
| 131965 | 44, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 131966 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 131967 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 131968 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 131969 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sube32 |
| 131970 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sube64 |
| 131971 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:subo32 |
| 131972 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:subo64 |
| 131973 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 131974 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 131975 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 131976 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 131977 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 131978 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 131979 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 131980 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 131981 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubb |
| 131982 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 131983 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 131984 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 131985 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 131986 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 131987 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 131988 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 131989 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 131990 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub |
| 131991 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 131992 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 131993 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 131994 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 131995 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 131996 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 131997 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 131998 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 131999 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 132000 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 132001 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 132002 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 132003 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 132004 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 132005 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 132006 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 132007 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 132008 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 132009 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 132010 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 132011 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 132012 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 132013 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 132014 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 132015 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 132016 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132017 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132018 | 7, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 132019 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 132020 | 10, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 132021 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 132022 | 44, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132023 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 132024 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 132025 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 132026 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 132027 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 132028 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 132029 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 132030 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub |
| 132031 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 132032 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub |
| 132033 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 132034 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub |
| 132035 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 132036 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 132037 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 132038 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 132039 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 132040 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 132041 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 132042 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 132043 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 132044 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 132045 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 132046 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 132047 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 132048 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 132049 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 132050 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 132051 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 132052 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 132053 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 132054 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 132055 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 132056 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 132057 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 132058 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 132059 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 132060 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 132061 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 |
| 132062 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 132063 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 132064 | 79, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 132065 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 132066 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 132067 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 132068 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 132069 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 |
| 132070 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 132071 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 132072 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 132073 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 132074 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 132075 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 132076 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 132077 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132078 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132079 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132080 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 132081 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 132082 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 132083 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 132084 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 132085 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 132086 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 132087 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 132088 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 132089 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 132090 | 0, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 132091 | }, |
| 132092 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 132093 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 132094 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:bsub_hi |
| 132095 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 132096 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub0 |
| 132097 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 132098 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2 |
| 132099 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3 |
| 132100 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub_hi |
| 132101 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 132102 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:hsub_hi |
| 132103 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:psub |
| 132104 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:psub0 |
| 132105 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:psub1 |
| 132106 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub0 |
| 132107 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 132108 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub2 |
| 132109 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub3 |
| 132110 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132111 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:ssub_hi |
| 132112 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sub_32 |
| 132113 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 132114 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sube32 |
| 132115 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sube64 |
| 132116 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:subo32 |
| 132117 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:subo64 |
| 132118 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 132119 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 132120 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 132121 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 132122 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 132123 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 132124 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 132125 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 132126 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubb |
| 132127 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubd0 |
| 132128 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubd1 |
| 132129 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh0 |
| 132130 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1 |
| 132131 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubq0 |
| 132132 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubq1 |
| 132133 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs0 |
| 132134 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1 |
| 132135 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 132136 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 132137 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 132138 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub2 |
| 132139 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub3 |
| 132140 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub_hi |
| 132141 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 132142 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 132143 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 132144 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 132145 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 132146 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 132147 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 132148 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 132149 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 132150 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 132151 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 132152 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 132153 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 132154 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 132155 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 132156 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 132157 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 132158 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 132159 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 132160 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 132161 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132162 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132163 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 132164 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 132165 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 132166 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 132167 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132168 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 132169 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 132170 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 132171 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 132172 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 132173 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 132174 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 132175 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_bsub |
| 132176 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 132177 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_hsub |
| 132178 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 132179 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_ssub |
| 132180 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 132181 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 132182 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 132183 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 132184 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 132185 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 132186 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 132187 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 132188 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 132189 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 132190 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 132191 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 132192 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 132193 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 132194 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 132195 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 132196 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 132197 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 132198 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 132199 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 132200 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 132201 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 132202 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 132203 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 132204 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 132205 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 132206 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_dsub2 |
| 132207 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 132208 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 132209 | 79, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 132210 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 132211 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 132212 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 132213 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 132214 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub1_qsub2 |
| 132215 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 132216 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 132217 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 132218 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 132219 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 132220 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 132221 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 132222 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132223 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132224 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132225 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 132226 | 163, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 132227 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 132228 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 132229 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 132230 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 132231 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 132232 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 132233 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 132234 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 132235 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 132236 | }, |
| 132237 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 132238 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 132239 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 132240 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 132241 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 132242 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 132243 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2 |
| 132244 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3 |
| 132245 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 132246 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 132247 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 132248 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:psub |
| 132249 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 132250 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 132251 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 132252 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 132253 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2 |
| 132254 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub3 |
| 132255 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132256 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 132257 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 132258 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 132259 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 132260 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 132261 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 132262 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 132263 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 132264 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 132265 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 132266 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 132267 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 132268 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 132269 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 132270 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 132271 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 132272 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 132273 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 132274 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 132275 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 132276 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 132277 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 132278 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 132279 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 132280 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 132281 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR_4b |
| 132282 | 100, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 132283 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2 |
| 132284 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub3 |
| 132285 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 132286 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 132287 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 132288 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 132289 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 132290 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 132291 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 132292 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 132293 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 132294 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 132295 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 132296 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 132297 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 132298 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 132299 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 132300 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 132301 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 132302 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 132303 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 132304 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 132305 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 132306 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132307 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132308 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 132309 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 132310 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 132311 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 132312 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132313 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 132314 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub |
| 132315 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 132316 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub |
| 132317 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 132318 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub |
| 132319 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 132320 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub |
| 132321 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 132322 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub |
| 132323 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 132324 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub |
| 132325 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 132326 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 132327 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 132328 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 132329 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 132330 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 132331 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 132332 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 132333 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 132334 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 132335 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 132336 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 132337 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 132338 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 132339 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 132340 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 132341 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 132342 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 132343 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 132344 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 132345 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 132346 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 132347 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 132348 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 132349 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 132350 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 132351 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 |
| 132352 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 132353 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 |
| 132354 | 79, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 132355 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 132356 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 132357 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 132358 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 132359 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 |
| 132360 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 132361 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 |
| 132362 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 132363 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 132364 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 132365 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 132366 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 132367 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132368 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132369 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132370 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 132371 | 140, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 132372 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 132373 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 132374 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 |
| 132375 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 132376 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 |
| 132377 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 132378 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 |
| 132379 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 132380 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 132381 | }, |
| 132382 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 132383 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 132384 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 132385 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 132386 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 132387 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 132388 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 |
| 132389 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 132390 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 132391 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 132392 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 132393 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 132394 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 132395 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 132396 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 132397 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 132398 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 |
| 132399 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 132400 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 132401 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 132402 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 132403 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 132404 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 132405 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 132406 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 132407 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 132408 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 132409 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 132410 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 132411 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 132412 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 132413 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 132414 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 132415 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 132416 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 132417 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 132418 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 132419 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 132420 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 132421 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 132422 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 132423 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 132424 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 132425 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 132426 | 104, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 132427 | 93, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR |
| 132428 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 |
| 132429 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 132430 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 132431 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 132432 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 132433 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 132434 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 132435 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 132436 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 132437 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 132438 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 132439 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 132440 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 132441 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 132442 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 132443 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 132444 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 132445 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 132446 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 132447 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 132448 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 132449 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 132450 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 132451 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132452 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132453 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 132454 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 132455 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 132456 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 132457 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 132458 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 132459 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 132460 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 132461 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 132462 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 132463 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 132464 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 132465 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub |
| 132466 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 132467 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub |
| 132468 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 132469 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub |
| 132470 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 132471 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 132472 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 132473 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 132474 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 132475 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 132476 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 132477 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 132478 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 132479 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 132480 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 132481 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 132482 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 132483 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 132484 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 132485 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 132486 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 132487 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 132488 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 132489 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 132490 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 132491 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 132492 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 132493 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 132494 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 132495 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 132496 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 132497 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 132498 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 132499 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 132500 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 132501 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 132502 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 132503 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 132504 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 132505 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 132506 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 132507 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 132508 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 132509 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 132510 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 132511 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 132512 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132513 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132514 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132515 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 132516 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 132517 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 132518 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 132519 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 132520 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 132521 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 132522 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 132523 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 132524 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 132525 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 132526 | }, |
| 132527 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 132528 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 132529 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 132530 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 132531 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 132532 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 132533 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 |
| 132534 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 132535 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 132536 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 132537 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 132538 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 132539 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 132540 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 132541 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 132542 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 132543 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 |
| 132544 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 132545 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132546 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 132547 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 132548 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 132549 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 132550 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 132551 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 132552 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 132553 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 132554 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 132555 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 132556 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 132557 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 132558 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 132559 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 132560 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 132561 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 132562 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 132563 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 132564 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 132565 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 132566 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 132567 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 132568 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 132569 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 132570 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 132571 | 105, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 132572 | 97, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPR_4b |
| 132573 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 |
| 132574 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 132575 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 132576 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 132577 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 132578 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 132579 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 132580 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 132581 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 132582 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 132583 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 132584 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 132585 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 132586 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 132587 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 132588 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 132589 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 132590 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 132591 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 132592 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 132593 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 132594 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 132595 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 132596 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132597 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132598 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 132599 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 132600 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 132601 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 132602 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 132603 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 132604 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 132605 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 132606 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 132607 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 132608 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 132609 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 132610 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub |
| 132611 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 132612 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub |
| 132613 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 132614 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub |
| 132615 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 132616 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 132617 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 132618 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 132619 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 132620 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 132621 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 132622 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 132623 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 132624 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 132625 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 132626 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 132627 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 132628 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 132629 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 132630 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 132631 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 132632 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 132633 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 132634 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 132635 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 132636 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 132637 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 132638 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 132639 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 132640 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 132641 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 132642 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 132643 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 132644 | 79, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 132645 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 132646 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 132647 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 132648 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 132649 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 132650 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 132651 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 132652 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 132653 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 132654 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 132655 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 132656 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 132657 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132658 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132659 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132660 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 132661 | 140, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 132662 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 132663 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 132664 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 132665 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 132666 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 132667 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 132668 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 132669 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 132670 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 132671 | }, |
| 132672 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 132673 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 132674 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 132675 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 132676 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0 |
| 132677 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 132678 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2 |
| 132679 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3 |
| 132680 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 132681 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 132682 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 132683 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:psub |
| 132684 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:psub0 |
| 132685 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:psub1 |
| 132686 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0 |
| 132687 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 132688 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2 |
| 132689 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub3 |
| 132690 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 132691 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 132692 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32 |
| 132693 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 132694 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sube32 |
| 132695 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sube64 |
| 132696 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:subo32 |
| 132697 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64 |
| 132698 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 132699 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 132700 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 132701 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 132702 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 132703 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 132704 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 132705 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 132706 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubb |
| 132707 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 132708 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 132709 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 132710 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 132711 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 132712 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 132713 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 132714 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 132715 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 132716 | 107, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPRMul2_and_ZPR_K |
| 132717 | 103, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPR_K |
| 132718 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2 |
| 132719 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub3 |
| 132720 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 132721 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 132722 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 132723 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 132724 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 132725 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 132726 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 132727 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 132728 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 132729 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 132730 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 132731 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 132732 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 132733 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 132734 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 132735 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 132736 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 132737 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 132738 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 132739 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 132740 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 132741 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132742 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132743 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 132744 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 132745 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 132746 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 132747 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 132748 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 132749 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 132750 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 132751 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 132752 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 132753 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 132754 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 132755 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub |
| 132756 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 132757 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub |
| 132758 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 132759 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub |
| 132760 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 132761 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 132762 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 132763 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 132764 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 132765 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 132766 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 132767 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 132768 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 132769 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 132770 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 132771 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 132772 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 132773 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 132774 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 132775 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 132776 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 132777 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 132778 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 132779 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 132780 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 132781 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 132782 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 132783 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 132784 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 132785 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 132786 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 |
| 132787 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 132788 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 132789 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1 -> DD |
| 132790 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 132791 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 |
| 132792 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 132793 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 132794 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 |
| 132795 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 132796 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 132797 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 132798 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 132799 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 132800 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 132801 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 132802 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132803 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132804 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132805 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 132806 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1 -> QQ |
| 132807 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 132808 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 |
| 132809 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 |
| 132810 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 132811 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 |
| 132812 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 132813 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 132814 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 132815 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 132816 | }, |
| 132817 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 132818 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 132819 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:bsub_hi |
| 132820 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 132821 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub0 |
| 132822 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 132823 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2 |
| 132824 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3 |
| 132825 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub_hi |
| 132826 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 132827 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:hsub_hi |
| 132828 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:psub |
| 132829 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:psub0 |
| 132830 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:psub1 |
| 132831 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub0 |
| 132832 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 132833 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub2 |
| 132834 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub3 |
| 132835 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 132836 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:ssub_hi |
| 132837 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sub_32 |
| 132838 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sub_32_hi |
| 132839 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sube32 |
| 132840 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sube64 |
| 132841 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:subo32 |
| 132842 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:subo64 |
| 132843 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_0 |
| 132844 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_1 |
| 132845 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_2 |
| 132846 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_3 |
| 132847 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_4 |
| 132848 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_5 |
| 132849 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_6 |
| 132850 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_7 |
| 132851 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubb |
| 132852 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubd0 |
| 132853 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubd1 |
| 132854 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh0 |
| 132855 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1 |
| 132856 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubq0 |
| 132857 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubq1 |
| 132858 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs0 |
| 132859 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1 |
| 132860 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 132861 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub0 -> ZPR_K |
| 132862 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 132863 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub2 |
| 132864 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub3 |
| 132865 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub_hi |
| 132866 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 132867 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 132868 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 132869 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 132870 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 132871 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 132872 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 132873 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 132874 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 132875 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 132876 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 132877 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 132878 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 132879 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 132880 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 132881 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 132882 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 132883 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 132884 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 132885 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 132886 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 132887 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 132888 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 132889 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 132890 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 132891 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 132892 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 132893 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 132894 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_bsub |
| 132895 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 132896 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_hsub |
| 132897 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 132898 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_ssub |
| 132899 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 132900 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_bsub |
| 132901 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 132902 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_hsub |
| 132903 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 132904 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_ssub |
| 132905 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 132906 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:psub1_then_psub |
| 132907 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 132908 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 132909 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 132910 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 132911 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 132912 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 132913 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 132914 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 132915 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 132916 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 132917 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 132918 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 132919 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 132920 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 132921 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 132922 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 132923 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 132924 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 132925 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 132926 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 132927 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 132928 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 132929 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 132930 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 132931 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_dsub2 |
| 132932 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 |
| 132933 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub2_dsub3 |
| 132934 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 132935 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 132936 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 |
| 132937 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 132938 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 132939 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub1_qsub2 |
| 132940 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 |
| 132941 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:qsub2_qsub3 |
| 132942 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 132943 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 132944 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 132945 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 132946 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 132947 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 132948 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 132949 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 132950 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 132951 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 132952 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 132953 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 |
| 132954 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub1 |
| 132955 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 |
| 132956 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub2 |
| 132957 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 |
| 132958 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub2_zsub3 |
| 132959 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 132960 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 132961 | }, |
| 132962 | { // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 132963 | 7, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 132964 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 132965 | 56, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 132966 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 132967 | 56, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 132968 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 |
| 132969 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 132970 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 132971 | 8, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 132972 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 132973 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 132974 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 132975 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 132976 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 132977 | 92, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 132978 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 |
| 132979 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 132980 | 40, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 132981 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 132982 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 132983 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 132984 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 132985 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 132986 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 132987 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 132988 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 132989 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 132990 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 132991 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 132992 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 132993 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 132994 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 132995 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 132996 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 132997 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 132998 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 132999 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 133000 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 133001 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 133002 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 133003 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 133004 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 133005 | 92, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 133006 | 104, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 133007 | 93, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 133008 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 |
| 133009 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 133010 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 133011 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 133012 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 133013 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 133014 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 133015 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 133016 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 133017 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 133018 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 133019 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 133020 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 133021 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 133022 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 133023 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 133024 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 133025 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 133026 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 133027 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 133028 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 133029 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 133030 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 133031 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133032 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133033 | 7, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 133034 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 133035 | 8, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 133036 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 133037 | 40, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 133038 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 133039 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 133040 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 133041 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 133042 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 133043 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 133044 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 133045 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub |
| 133046 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 133047 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub |
| 133048 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 133049 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub |
| 133050 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 133051 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 133052 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 133053 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 133054 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 133055 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 133056 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 133057 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 133058 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 133059 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 133060 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 133061 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 133062 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 133063 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 133064 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 133065 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 133066 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 133067 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 133068 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 133069 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 133070 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 133071 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 133072 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 133073 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 133074 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 133075 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 133076 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 133077 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 133078 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 133079 | 75, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 133080 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 133081 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 133082 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 133083 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 133084 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 133085 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 133086 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 133087 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 133088 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 133089 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 133090 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 133091 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 133092 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133093 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133094 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133095 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 133096 | 128, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 133097 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 133098 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 133099 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 133100 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 133101 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 133102 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 133103 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 133104 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 133105 | 0, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 133106 | }, |
| 133107 | { // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 133108 | 7, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 133109 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 133110 | 65, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 133111 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 133112 | 65, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 133113 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 |
| 133114 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 133115 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 133116 | 10, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 133117 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 133118 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 133119 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 133120 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 133121 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 133122 | 94, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 133123 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 |
| 133124 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 133125 | 44, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133126 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 133127 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 133128 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 133129 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 133130 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 133131 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 133132 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 133133 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 133134 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 133135 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 133136 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 133137 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 133138 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 133139 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 133140 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 133141 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 133142 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 133143 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 133144 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 133145 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 133146 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 133147 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 133148 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 133149 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 133150 | 94, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 133151 | 105, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 133152 | 97, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR_4b |
| 133153 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 |
| 133154 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 133155 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 133156 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 133157 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 133158 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 133159 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 133160 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 133161 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 133162 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 133163 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 133164 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 133165 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 133166 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 133167 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 133168 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 133169 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 133170 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 133171 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 133172 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 133173 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 133174 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 133175 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 133176 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133177 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133178 | 7, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 133179 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 133180 | 10, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 133181 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 133182 | 44, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133183 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 133184 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 133185 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 133186 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 133187 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 133188 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 133189 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 133190 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub |
| 133191 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 133192 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub |
| 133193 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 133194 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub |
| 133195 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 133196 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 133197 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 133198 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 133199 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 133200 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 133201 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 133202 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 133203 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 133204 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 133205 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 133206 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 133207 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 133208 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 133209 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 133210 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 133211 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 133212 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 133213 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 133214 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 133215 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 133216 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 133217 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 133218 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 133219 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 133220 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 133221 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 133222 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 133223 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 133224 | 79, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 133225 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 133226 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 133227 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 133228 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 133229 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 133230 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 133231 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 133232 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 133233 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 133234 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 133235 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 133236 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 133237 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133238 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133239 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133240 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 133241 | 140, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 133242 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 133243 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 133244 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 133245 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 133246 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 133247 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 133248 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 133249 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 133250 | 0, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 133251 | }, |
| 133252 | { // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 133253 | 7, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 133254 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 133255 | 56, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 133256 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 133257 | 56, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 133258 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 |
| 133259 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 133260 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 133261 | 8, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 133262 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 133263 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 133264 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 133265 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 133266 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 133267 | 92, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 133268 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 |
| 133269 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 133270 | 40, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 133271 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 133272 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 133273 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 133274 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 133275 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 133276 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 133277 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 133278 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 133279 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 133280 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 133281 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 133282 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 133283 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 133284 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 133285 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 133286 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 133287 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 133288 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 133289 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 133290 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 133291 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 133292 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 133293 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 133294 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 133295 | 92, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 133296 | 107, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPRMul2_and_ZPR_K |
| 133297 | 103, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 133298 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 |
| 133299 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 133300 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 133301 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 133302 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 133303 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 133304 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 133305 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 133306 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 133307 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 133308 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 133309 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 133310 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 133311 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 133312 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 133313 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 133314 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 133315 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 133316 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 133317 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 133318 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 133319 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 133320 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 133321 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133322 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133323 | 7, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 133324 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 133325 | 8, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 133326 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 133327 | 40, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 133328 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 133329 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 133330 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 133331 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 133332 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 133333 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 133334 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 133335 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub |
| 133336 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 133337 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub |
| 133338 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 133339 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub |
| 133340 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 133341 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 133342 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 133343 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 133344 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 133345 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 133346 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 133347 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 133348 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 133349 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 133350 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 133351 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 133352 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 133353 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 133354 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 133355 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 133356 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 133357 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 133358 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 133359 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 133360 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 133361 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 133362 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 133363 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 133364 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 133365 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 133366 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 |
| 133367 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 133368 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 133369 | 75, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 133370 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 133371 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 |
| 133372 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 133373 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 133374 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 |
| 133375 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 133376 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 133377 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 133378 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 133379 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 133380 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 133381 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 133382 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133383 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133384 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133385 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 133386 | 128, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 133387 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 133388 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 |
| 133389 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 |
| 133390 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 133391 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 |
| 133392 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 133393 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 133394 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 133395 | 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 133396 | }, |
| 133397 | { // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 133398 | 7, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 133399 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 133400 | 65, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 133401 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 133402 | 65, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 133403 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 |
| 133404 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 |
| 133405 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 133406 | 10, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 133407 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 133408 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 133409 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 133410 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 133411 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 133412 | 98, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 133413 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 |
| 133414 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 |
| 133415 | 44, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133416 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 133417 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 133418 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 133419 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 133420 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 133421 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 133422 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 133423 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 133424 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 133425 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 133426 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 133427 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 133428 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 133429 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 133430 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 133431 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 133432 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 133433 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 133434 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 133435 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 133436 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 133437 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 133438 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 133439 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 133440 | 98, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 133441 | 106, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul2_and_ZPR_3b |
| 133442 | 102, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 133443 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 |
| 133444 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 |
| 133445 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 133446 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 133447 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 133448 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 133449 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 133450 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 133451 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 133452 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 133453 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 133454 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 133455 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 133456 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 133457 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 133458 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 133459 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 133460 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 133461 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 133462 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 133463 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 133464 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 133465 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 133466 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133467 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133468 | 7, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 133469 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 133470 | 10, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 133471 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 133472 | 44, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133473 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 133474 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 133475 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 133476 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 133477 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 133478 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 133479 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 133480 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub |
| 133481 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 133482 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub |
| 133483 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 133484 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub |
| 133485 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 133486 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 133487 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 133488 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 133489 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 133490 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 133491 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 133492 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 133493 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 133494 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 133495 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 133496 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 133497 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 133498 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 133499 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 133500 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 133501 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 133502 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 133503 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 133504 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 133505 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 133506 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 133507 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 133508 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 133509 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 133510 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 133511 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 |
| 133512 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 133513 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 133514 | 79, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 133515 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 133516 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 |
| 133517 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 133518 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 133519 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 |
| 133520 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 133521 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 133522 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 133523 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 133524 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 133525 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 133526 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 133527 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133528 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133529 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133530 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 133531 | 163, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 133532 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 133533 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 133534 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 |
| 133535 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 133536 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 |
| 133537 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 133538 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 133539 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 133540 | 0, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 133541 | }, |
| 133542 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 133543 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 133544 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 133545 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 133546 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 133547 | 65, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 133548 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2 |
| 133549 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 133550 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 133551 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 133552 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 133553 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub |
| 133554 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub0 |
| 133555 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1 |
| 133556 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 133557 | 94, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_lo |
| 133558 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2 |
| 133559 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 133560 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133561 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 133562 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 133563 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 133564 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube32 |
| 133565 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube64 |
| 133566 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo32 |
| 133567 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64 |
| 133568 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 133569 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 133570 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 133571 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 133572 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 133573 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 133574 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 133575 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 133576 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubb |
| 133577 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 133578 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 133579 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 133580 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 133581 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 133582 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 133583 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 133584 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 133585 | 98, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 133586 | 105, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 133587 | 97, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_4b |
| 133588 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2 |
| 133589 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 133590 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 133591 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 133592 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 133593 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 133594 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 133595 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 133596 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 133597 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 133598 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 133599 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 133600 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 133601 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 133602 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 133603 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 133604 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 133605 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 133606 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 133607 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 133608 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 133609 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 133610 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 133611 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133612 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133613 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 133614 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 133615 | 10, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 133616 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 133617 | 44, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133618 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 133619 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 133620 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 133621 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 133622 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 133623 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 133624 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 133625 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub |
| 133626 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 133627 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub |
| 133628 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 133629 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub |
| 133630 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 133631 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 133632 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 133633 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 133634 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 133635 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 133636 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 133637 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 133638 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 133639 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 133640 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 133641 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 133642 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 133643 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 133644 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 133645 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 133646 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 133647 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 133648 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 133649 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 133650 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 133651 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 133652 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 133653 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 133654 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 133655 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 133656 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 |
| 133657 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 133658 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 133659 | 79, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 133660 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 133661 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 |
| 133662 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 133663 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 133664 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 |
| 133665 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 133666 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 133667 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 133668 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 133669 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 133670 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 133671 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 133672 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133673 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133674 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133675 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 133676 | 163, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 133677 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 133678 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 |
| 133679 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 |
| 133680 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 133681 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 |
| 133682 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 133683 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 133684 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 133685 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 133686 | }, |
| 133687 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 133688 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:bsub -> FPR8 |
| 133689 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:bsub_hi |
| 133690 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub -> FPR64 |
| 133691 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub0 |
| 133692 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 133693 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2 |
| 133694 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3 |
| 133695 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub_hi |
| 133696 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:hsub -> FPR16 |
| 133697 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:hsub_hi |
| 133698 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:psub |
| 133699 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:psub0 |
| 133700 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:psub1 |
| 133701 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub0 |
| 133702 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 133703 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub2 |
| 133704 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub3 |
| 133705 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:ssub -> FPR32 |
| 133706 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:ssub_hi |
| 133707 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sub_32 |
| 133708 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_hi |
| 133709 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sube32 |
| 133710 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sube64 |
| 133711 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:subo32 |
| 133712 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:subo64 |
| 133713 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_0 |
| 133714 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1 |
| 133715 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2 |
| 133716 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3 |
| 133717 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4 |
| 133718 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5 |
| 133719 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6 |
| 133720 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7 |
| 133721 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubb |
| 133722 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubd0 |
| 133723 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1 |
| 133724 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh0 |
| 133725 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1 |
| 133726 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubq0 |
| 133727 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubq1 |
| 133728 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs0 |
| 133729 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1 |
| 133730 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub -> FPR128 |
| 133731 | 99, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 133732 | 99, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 133733 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub2 |
| 133734 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub3 |
| 133735 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub_hi |
| 133736 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 133737 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 133738 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 133739 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 133740 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 133741 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 133742 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 133743 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 133744 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 133745 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 133746 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 133747 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 133748 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 133749 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 133750 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 133751 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 133752 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 133753 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 133754 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 133755 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 133756 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133757 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133758 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 133759 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 133760 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 133761 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 133762 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 133763 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 133764 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub |
| 133765 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 133766 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub |
| 133767 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 133768 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub |
| 133769 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 133770 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub |
| 133771 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 133772 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub |
| 133773 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 133774 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub |
| 133775 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 133776 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:psub1_then_psub |
| 133777 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 133778 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 133779 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 133780 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 133781 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 133782 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 133783 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 133784 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 133785 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 133786 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 133787 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 133788 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 133789 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 133790 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 133791 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 133792 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 133793 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 133794 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 133795 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 133796 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 133797 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 133798 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 133799 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1 |
| 133800 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 133801 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2 |
| 133802 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 133803 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_dsub3 |
| 133804 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1 |
| 133805 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 133806 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 133807 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1 |
| 133808 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 133809 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2 |
| 133810 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 133811 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:qsub2_qsub3 |
| 133812 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 133813 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 133814 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 133815 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 133816 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 133817 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133818 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133819 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133820 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 133821 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1 |
| 133822 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 133823 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 133824 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1 |
| 133825 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 133826 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2 |
| 133827 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 133828 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub2_zsub3 |
| 133829 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub2 |
| 133830 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub3 |
| 133831 | }, |
| 133832 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 133833 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:bsub -> FPR8 |
| 133834 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:bsub_hi |
| 133835 | 65, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 133836 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub0 |
| 133837 | 65, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 133838 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2 |
| 133839 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3 |
| 133840 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub_hi |
| 133841 | 10, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 133842 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:hsub_hi |
| 133843 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:psub |
| 133844 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:psub0 |
| 133845 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:psub1 |
| 133846 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub0 |
| 133847 | 94, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 133848 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub2 |
| 133849 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub3 |
| 133850 | 44, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133851 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:ssub_hi |
| 133852 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sub_32 |
| 133853 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_hi |
| 133854 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sube32 |
| 133855 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sube64 |
| 133856 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:subo32 |
| 133857 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:subo64 |
| 133858 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_0 |
| 133859 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1 |
| 133860 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2 |
| 133861 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3 |
| 133862 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4 |
| 133863 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5 |
| 133864 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6 |
| 133865 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7 |
| 133866 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubb |
| 133867 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubd0 |
| 133868 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1 |
| 133869 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh0 |
| 133870 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1 |
| 133871 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubq0 |
| 133872 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubq1 |
| 133873 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs0 |
| 133874 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1 |
| 133875 | 98, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub -> FPR128_0to7 |
| 133876 | 106, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_and_ZPR_3b |
| 133877 | 100, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 133878 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub2 |
| 133879 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub3 |
| 133880 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub_hi |
| 133881 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 133882 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 133883 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 133884 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 133885 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 133886 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 133887 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 133888 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 133889 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 133890 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 133891 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 133892 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 133893 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 133894 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 133895 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 133896 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 133897 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 133898 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 133899 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 133900 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 133901 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 133902 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 133903 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 133904 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 133905 | 10, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 133906 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 133907 | 44, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 133908 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 133909 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub |
| 133910 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 133911 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub |
| 133912 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 133913 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub |
| 133914 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 133915 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub |
| 133916 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 133917 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub |
| 133918 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 133919 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub |
| 133920 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 133921 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:psub1_then_psub |
| 133922 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 133923 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 133924 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 133925 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 133926 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 133927 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 133928 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 133929 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 133930 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 133931 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 133932 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 133933 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 133934 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 133935 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 133936 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 133937 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 133938 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 133939 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 133940 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 133941 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 133942 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 133943 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 133944 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1 |
| 133945 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 133946 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2 |
| 133947 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 133948 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_dsub3 |
| 133949 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1 |
| 133950 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 133951 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 133952 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1 |
| 133953 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 133954 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2 |
| 133955 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 133956 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:qsub2_qsub3 |
| 133957 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 133958 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 133959 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 133960 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 133961 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 133962 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 133963 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 133964 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 133965 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 133966 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1 |
| 133967 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 133968 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 133969 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1 |
| 133970 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 133971 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2 |
| 133972 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 133973 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub2_zsub3 |
| 133974 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub2 |
| 133975 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub3 |
| 133976 | }, |
| 133977 | { // ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 133978 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 133979 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:bsub_hi |
| 133980 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 133981 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub0 |
| 133982 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 133983 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2 |
| 133984 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3 |
| 133985 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub_hi |
| 133986 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 133987 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:hsub_hi |
| 133988 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:psub |
| 133989 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:psub0 |
| 133990 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:psub1 |
| 133991 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub0 |
| 133992 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 133993 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub2 |
| 133994 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub3 |
| 133995 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 133996 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:ssub_hi |
| 133997 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sub_32 |
| 133998 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sub_32_hi |
| 133999 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sube32 |
| 134000 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sube64 |
| 134001 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:subo32 |
| 134002 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:subo64 |
| 134003 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_0 |
| 134004 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_1 |
| 134005 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_2 |
| 134006 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_3 |
| 134007 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_4 |
| 134008 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_5 |
| 134009 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_6 |
| 134010 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_7 |
| 134011 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubb |
| 134012 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubd0 |
| 134013 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubd1 |
| 134014 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh0 |
| 134015 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1 |
| 134016 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubq0 |
| 134017 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubq1 |
| 134018 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs0 |
| 134019 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1 |
| 134020 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 134021 | 101, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 134022 | 101, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 134023 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub2 |
| 134024 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub3 |
| 134025 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub_hi |
| 134026 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 134027 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 134028 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 134029 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 134030 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 134031 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 134032 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 134033 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 134034 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 134035 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 134036 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 134037 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 134038 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 134039 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 134040 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 134041 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 134042 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 134043 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 134044 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 134045 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 134046 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134047 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134048 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 134049 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 134050 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 134051 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 134052 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 134053 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 134054 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 134055 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 134056 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 134057 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 134058 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 134059 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 134060 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_bsub |
| 134061 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 134062 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_hsub |
| 134063 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 134064 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_ssub |
| 134065 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 134066 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 134067 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 134068 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 134069 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 134070 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 134071 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 134072 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 134073 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 134074 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 134075 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 134076 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 134077 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 134078 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 134079 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 134080 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 134081 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 134082 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 134083 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 134084 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 134085 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 134086 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 134087 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 134088 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 134089 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 134090 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 134091 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 134092 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 134093 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 134094 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub_dsub1 |
| 134095 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 134096 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 134097 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 134098 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 134099 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 134100 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 134101 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 134102 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 134103 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 134104 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 134105 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 134106 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 134107 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134108 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134109 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134110 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 134111 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub_qsub1 |
| 134112 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 134113 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 134114 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 134115 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 134116 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 134117 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 134118 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 134119 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 134120 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 134121 | }, |
| 134122 | { // ZPR2Strided_with_zsub0_in_ZPR_K |
| 134123 | 7, // ZPR2Strided_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 134124 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:bsub_hi |
| 134125 | 56, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 134126 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub0 |
| 134127 | 56, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 134128 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2 |
| 134129 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3 |
| 134130 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub_hi |
| 134131 | 8, // ZPR2Strided_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 134132 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:hsub_hi |
| 134133 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:psub |
| 134134 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:psub0 |
| 134135 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:psub1 |
| 134136 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub0 |
| 134137 | 92, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 134138 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub2 |
| 134139 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub3 |
| 134140 | 40, // ZPR2Strided_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 134141 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:ssub_hi |
| 134142 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sub_32 |
| 134143 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sub_32_hi |
| 134144 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sube32 |
| 134145 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sube64 |
| 134146 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:subo32 |
| 134147 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:subo64 |
| 134148 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_0 |
| 134149 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_1 |
| 134150 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_2 |
| 134151 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_3 |
| 134152 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_4 |
| 134153 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_5 |
| 134154 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_6 |
| 134155 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_7 |
| 134156 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubb |
| 134157 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubd0 |
| 134158 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubd1 |
| 134159 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh0 |
| 134160 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1 |
| 134161 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubq0 |
| 134162 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubq1 |
| 134163 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs0 |
| 134164 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1 |
| 134165 | 92, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 134166 | 103, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 134167 | 103, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 134168 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub2 |
| 134169 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub3 |
| 134170 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub_hi |
| 134171 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 134172 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 134173 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 134174 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 134175 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 134176 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 134177 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 134178 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 134179 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 134180 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 134181 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 134182 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 134183 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 134184 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 134185 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 134186 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 134187 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 134188 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 134189 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 134190 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 134191 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134192 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134193 | 7, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 134194 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 134195 | 8, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 134196 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 134197 | 40, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 134198 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 134199 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 134200 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 134201 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 134202 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 134203 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 134204 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 134205 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_bsub |
| 134206 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 134207 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_hsub |
| 134208 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 134209 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_ssub |
| 134210 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 134211 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:psub1_then_psub |
| 134212 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 134213 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 134214 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 134215 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 134216 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 134217 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 134218 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 134219 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 134220 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 134221 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 134222 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 134223 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 134224 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 134225 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 134226 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 134227 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 134228 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 134229 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 134230 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 134231 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 134232 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 134233 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 134234 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 134235 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 134236 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_dsub2 |
| 134237 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 134238 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 134239 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub_dsub1 |
| 134240 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 134241 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 |
| 134242 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 134243 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 134244 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub1_qsub2 |
| 134245 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 134246 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 134247 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 134248 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 134249 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 134250 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 134251 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 134252 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134253 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134254 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134255 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 134256 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub_qsub1 |
| 134257 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 134258 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 |
| 134259 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub0_zsub1 |
| 134260 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 134261 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub1_zsub2 |
| 134262 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 134263 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 134264 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 134265 | 0, // ZPR2Strided_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 134266 | }, |
| 134267 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 134268 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 134269 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:bsub_hi |
| 134270 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 134271 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0 |
| 134272 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 134273 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2 |
| 134274 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3 |
| 134275 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_hi |
| 134276 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 134277 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:hsub_hi |
| 134278 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub |
| 134279 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub0 |
| 134280 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub1 |
| 134281 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0 |
| 134282 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 134283 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2 |
| 134284 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3 |
| 134285 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 134286 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:ssub_hi |
| 134287 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32 |
| 134288 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_hi |
| 134289 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sube32 |
| 134290 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sube64 |
| 134291 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo32 |
| 134292 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64 |
| 134293 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0 |
| 134294 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1 |
| 134295 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2 |
| 134296 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3 |
| 134297 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4 |
| 134298 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5 |
| 134299 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6 |
| 134300 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7 |
| 134301 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubb |
| 134302 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd0 |
| 134303 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1 |
| 134304 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh0 |
| 134305 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1 |
| 134306 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq0 |
| 134307 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq1 |
| 134308 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs0 |
| 134309 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1 |
| 134310 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 134311 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_K |
| 134312 | 96, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 134313 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2 |
| 134314 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3 |
| 134315 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_hi |
| 134316 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 134317 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 134318 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 134319 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 134320 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 134321 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 134322 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 134323 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 134324 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 134325 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 134326 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 134327 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 134328 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 134329 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 134330 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 134331 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 134332 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 134333 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 134334 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 134335 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 134336 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134337 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134338 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 134339 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 134340 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 134341 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 134342 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 134343 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 134344 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 134345 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 134346 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 134347 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 134348 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 134349 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 134350 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub |
| 134351 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 134352 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub |
| 134353 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 134354 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub |
| 134355 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 134356 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 134357 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 134358 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 134359 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 134360 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 134361 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 134362 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 134363 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 134364 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 134365 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 134366 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 134367 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 134368 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 134369 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 134370 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 134371 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 134372 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 134373 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 134374 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 134375 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 134376 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 134377 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 134378 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 134379 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 134380 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 134381 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2 |
| 134382 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 134383 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 134384 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 134385 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 134386 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 |
| 134387 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 134388 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 134389 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2 |
| 134390 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 134391 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 134392 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 134393 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 134394 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 134395 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 134396 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 134397 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134398 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134399 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134400 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 134401 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 134402 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 134403 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 |
| 134404 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1 |
| 134405 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 134406 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2 |
| 134407 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 134408 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 134409 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 134410 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 134411 | }, |
| 134412 | { // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 134413 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 134414 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 134415 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 134416 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 134417 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 134418 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 |
| 134419 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 134420 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 134421 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 134422 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 134423 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 134424 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 134425 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 134426 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 134427 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 134428 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 |
| 134429 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 134430 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 134431 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 134432 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 134433 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 134434 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 134435 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 134436 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 134437 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 134438 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 134439 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 134440 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 134441 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 134442 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 134443 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 134444 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 134445 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 134446 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 134447 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 134448 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 134449 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 134450 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 134451 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 134452 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 134453 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 134454 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 134455 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 134456 | 93, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR |
| 134457 | 104, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 134458 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 |
| 134459 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 134460 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 134461 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 134462 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 134463 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 134464 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 134465 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 134466 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 134467 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 134468 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 134469 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 134470 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 134471 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 134472 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 134473 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 134474 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 134475 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 134476 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 134477 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 134478 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 134479 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 134480 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 134481 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134482 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134483 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 134484 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 134485 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 134486 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 134487 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 134488 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 134489 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 134490 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 134491 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 134492 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 134493 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 134494 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 134495 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub |
| 134496 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 134497 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub |
| 134498 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 134499 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub |
| 134500 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 134501 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 134502 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 134503 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 134504 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 134505 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 134506 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 134507 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 134508 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 134509 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 134510 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 134511 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 134512 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 134513 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 134514 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 134515 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 134516 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 134517 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 134518 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 134519 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 134520 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 134521 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 134522 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 134523 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 134524 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 134525 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 134526 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 134527 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 134528 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 134529 | 75, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 134530 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 134531 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 134532 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 134533 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 134534 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 134535 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 134536 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 134537 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 134538 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 134539 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 134540 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 134541 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 134542 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134543 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134544 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134545 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 134546 | 128, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 134547 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 134548 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 134549 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 134550 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 134551 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 134552 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 134553 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 134554 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 134555 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 134556 | }, |
| 134557 | { // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 134558 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 134559 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 134560 | 56, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64 |
| 134561 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 134562 | 65, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 134563 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 |
| 134564 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 134565 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 134566 | 8, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16 |
| 134567 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 134568 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 134569 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 134570 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 134571 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 134572 | 94, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 134573 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 |
| 134574 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 134575 | 40, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32 |
| 134576 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 134577 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 134578 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 134579 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 134580 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 134581 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 134582 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 134583 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 134584 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 134585 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 134586 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 134587 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 134588 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 134589 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 134590 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 134591 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 134592 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 134593 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 134594 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 134595 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 134596 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 134597 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 134598 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 134599 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 134600 | 92, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128 |
| 134601 | 93, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPR |
| 134602 | 105, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 134603 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 |
| 134604 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 134605 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 134606 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 134607 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 134608 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 134609 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 134610 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 134611 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 134612 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 134613 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 134614 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 134615 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 134616 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 134617 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 134618 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 134619 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 134620 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 134621 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 134622 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 134623 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 134624 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 134625 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 134626 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134627 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134628 | 7, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 134629 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 134630 | 10, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 134631 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 134632 | 44, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 134633 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 134634 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 134635 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 134636 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 134637 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 134638 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 134639 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 134640 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub |
| 134641 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 134642 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub |
| 134643 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 134644 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub |
| 134645 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 134646 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 134647 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 134648 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 134649 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 134650 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 134651 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 134652 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 134653 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 134654 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 134655 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 134656 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 134657 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 134658 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 134659 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 134660 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 134661 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 134662 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 134663 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 134664 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 134665 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 134666 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 134667 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 134668 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 134669 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 134670 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 134671 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 134672 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 134673 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 134674 | 77, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 134675 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 134676 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 134677 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 134678 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 134679 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 134680 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 134681 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 134682 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 134683 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 134684 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 134685 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 134686 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 134687 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134688 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134689 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134690 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 134691 | 132, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 134692 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 134693 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 134694 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 134695 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 134696 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 134697 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 134698 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 134699 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 134700 | 0, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 134701 | }, |
| 134702 | { // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 134703 | 7, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 134704 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 134705 | 56, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64 |
| 134706 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 134707 | 65, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 134708 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2 |
| 134709 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3 |
| 134710 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 134711 | 8, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16 |
| 134712 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 134713 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub |
| 134714 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub0 |
| 134715 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub1 |
| 134716 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 134717 | 98, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 134718 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2 |
| 134719 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub3 |
| 134720 | 40, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32 |
| 134721 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 134722 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 134723 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 134724 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sube32 |
| 134725 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sube64 |
| 134726 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo32 |
| 134727 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64 |
| 134728 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 134729 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 134730 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 134731 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 134732 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 134733 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 134734 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 134735 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 134736 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubb |
| 134737 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 134738 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 134739 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 134740 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 134741 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 134742 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 134743 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 134744 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 134745 | 92, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128 |
| 134746 | 93, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPR |
| 134747 | 106, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPRMul2_and_ZPR_3b |
| 134748 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2 |
| 134749 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub3 |
| 134750 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 134751 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 134752 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 134753 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 134754 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 134755 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 134756 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 134757 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 134758 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 134759 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 134760 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 134761 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 134762 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 134763 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 134764 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 134765 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 134766 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 134767 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 134768 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 134769 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 134770 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 134771 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134772 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134773 | 7, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 134774 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 134775 | 10, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 134776 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 134777 | 44, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 134778 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 134779 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 134780 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 134781 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 134782 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 134783 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 134784 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 134785 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub |
| 134786 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 134787 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub |
| 134788 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 134789 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub |
| 134790 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 134791 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 134792 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 134793 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 134794 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 134795 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 134796 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 134797 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 134798 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 134799 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 134800 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 134801 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 134802 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 134803 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 134804 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 134805 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 134806 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 134807 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 134808 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 134809 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 134810 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 134811 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 134812 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 134813 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 134814 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 134815 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 134816 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 |
| 134817 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 134818 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 134819 | 77, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 134820 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 134821 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 |
| 134822 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 134823 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 134824 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 |
| 134825 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 134826 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 134827 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 134828 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 134829 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 134830 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 134831 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 134832 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134833 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134834 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134835 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 134836 | 147, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 134837 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 134838 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 |
| 134839 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 |
| 134840 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 134841 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 |
| 134842 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 134843 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 134844 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 134845 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 134846 | }, |
| 134847 | { // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 134848 | 7, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 134849 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 134850 | 56, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 134851 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0 |
| 134852 | 56, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 134853 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2 |
| 134854 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3 |
| 134855 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 134856 | 8, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 134857 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 134858 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub |
| 134859 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub0 |
| 134860 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub1 |
| 134861 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0 |
| 134862 | 92, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 134863 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2 |
| 134864 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub3 |
| 134865 | 40, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 134866 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 134867 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32 |
| 134868 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 134869 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sube32 |
| 134870 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sube64 |
| 134871 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo32 |
| 134872 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64 |
| 134873 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 134874 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 134875 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 134876 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 134877 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 134878 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 134879 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 134880 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 134881 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubb |
| 134882 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 134883 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 134884 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 134885 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 134886 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 134887 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 134888 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 134889 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 134890 | 92, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 134891 | 93, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPR |
| 134892 | 107, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 134893 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2 |
| 134894 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub3 |
| 134895 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 134896 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 134897 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 134898 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 134899 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 134900 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 134901 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 134902 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 134903 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 134904 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 134905 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 134906 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 134907 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 134908 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 134909 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 134910 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 134911 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 134912 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 134913 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 134914 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 134915 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 134916 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 134917 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 134918 | 7, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 134919 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 134920 | 8, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 134921 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 134922 | 40, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 134923 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 134924 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 134925 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 134926 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 134927 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 134928 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 134929 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 134930 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub |
| 134931 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 134932 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub |
| 134933 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 134934 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub |
| 134935 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 134936 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 134937 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 134938 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 134939 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 134940 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 134941 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 134942 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 134943 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 134944 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 134945 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 134946 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 134947 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 134948 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 134949 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 134950 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 134951 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 134952 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 134953 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 134954 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 134955 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 134956 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 134957 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 134958 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 134959 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 134960 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 134961 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 |
| 134962 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 134963 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 134964 | 75, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1 -> DD |
| 134965 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 134966 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 |
| 134967 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 134968 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 134969 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 |
| 134970 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 134971 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 134972 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 134973 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 134974 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 134975 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 134976 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 134977 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 134978 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 134979 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 134980 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 134981 | 128, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1 -> QQ |
| 134982 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 134983 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 |
| 134984 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 |
| 134985 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 134986 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 |
| 134987 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 134988 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 134989 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 134990 | 0, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 134991 | }, |
| 134992 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 134993 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 134994 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:bsub_hi |
| 134995 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 134996 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0 |
| 134997 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1 -> FPR64_lo |
| 134998 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2 |
| 134999 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3 |
| 135000 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_hi |
| 135001 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 135002 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:hsub_hi |
| 135003 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:psub |
| 135004 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:psub0 |
| 135005 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:psub1 |
| 135006 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0 |
| 135007 | 94, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1 -> FPR128_lo |
| 135008 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2 |
| 135009 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3 |
| 135010 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135011 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:ssub_hi |
| 135012 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32 |
| 135013 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_hi |
| 135014 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sube32 |
| 135015 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sube64 |
| 135016 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:subo32 |
| 135017 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:subo64 |
| 135018 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0 |
| 135019 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1 |
| 135020 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2 |
| 135021 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3 |
| 135022 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4 |
| 135023 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5 |
| 135024 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6 |
| 135025 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7 |
| 135026 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubb |
| 135027 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd0 |
| 135028 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1 |
| 135029 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh0 |
| 135030 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1 |
| 135031 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq0 |
| 135032 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq1 |
| 135033 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs0 |
| 135034 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1 |
| 135035 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub -> FPR128_0to7 |
| 135036 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_3b |
| 135037 | 100, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2_Lo |
| 135038 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2 |
| 135039 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3 |
| 135040 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_hi |
| 135041 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 135042 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 135043 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 135044 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 135045 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 135046 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 135047 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 135048 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 135049 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 135050 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 135051 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 135052 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 135053 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 135054 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 135055 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 135056 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 135057 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 135058 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 135059 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 135060 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 135061 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135062 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135063 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 135064 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 135065 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16_lo |
| 135066 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 135067 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135068 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 135069 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 135070 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 135071 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 135072 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 135073 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 135074 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 135075 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub |
| 135076 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 135077 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub |
| 135078 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 135079 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub |
| 135080 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 135081 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 135082 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 135083 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 135084 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 135085 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 135086 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 135087 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 135088 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 135089 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 135090 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 135091 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 135092 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 135093 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 135094 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 135095 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 135096 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 135097 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 135098 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 135099 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 135100 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 135101 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 135102 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 135103 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 135104 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 135105 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 135106 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2 |
| 135107 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 135108 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 135109 | 79, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 135110 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 135111 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 |
| 135112 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 135113 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 135114 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2 |
| 135115 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 135116 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 135117 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 135118 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 135119 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 135120 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 135121 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 135122 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135123 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135124 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135125 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 135126 | 146, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 135127 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 135128 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 |
| 135129 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1 |
| 135130 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 135131 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2 |
| 135132 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 135133 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 135134 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 135135 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 135136 | }, |
| 135137 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 135138 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 135139 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 135140 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 135141 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 135142 | 56, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 135143 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2 |
| 135144 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3 |
| 135145 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 135146 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 135147 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 135148 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:psub |
| 135149 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 135150 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 135151 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 135152 | 92, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 135153 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2 |
| 135154 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3 |
| 135155 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135156 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 135157 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 135158 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 135159 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 135160 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 135161 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 135162 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 135163 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 135164 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 135165 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 135166 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 135167 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 135168 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 135169 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 135170 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 135171 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 135172 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 135173 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 135174 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 135175 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 135176 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 135177 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 135178 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 135179 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 135180 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128_lo |
| 135181 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_4b |
| 135182 | 101, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 135183 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2 |
| 135184 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3 |
| 135185 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 135186 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 135187 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 135188 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 135189 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 135190 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 135191 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 135192 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 135193 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 135194 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 135195 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 135196 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 135197 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 135198 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 135199 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 135200 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 135201 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 135202 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 135203 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 135204 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 135205 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 135206 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135207 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135208 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 135209 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 135210 | 8, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 135211 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 135212 | 40, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 135213 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 135214 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 135215 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 135216 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 135217 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 135218 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 135219 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 135220 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub |
| 135221 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 135222 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub |
| 135223 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 135224 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub |
| 135225 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 135226 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 135227 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 135228 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 135229 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 135230 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 135231 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 135232 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 135233 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 135234 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 135235 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 135236 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 135237 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 135238 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 135239 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 135240 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 135241 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 135242 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 135243 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 135244 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 135245 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 135246 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 135247 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 135248 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 135249 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 135250 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 135251 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 |
| 135252 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 135253 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 135254 | 76, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 135255 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 135256 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 |
| 135257 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 135258 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 135259 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 |
| 135260 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 135261 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 135262 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 135263 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 135264 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 135265 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 135266 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 135267 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135268 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135269 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135270 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 135271 | 133, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 135272 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 135273 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 |
| 135274 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 |
| 135275 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 135276 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 |
| 135277 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 135278 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 135279 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 135280 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 135281 | }, |
| 135282 | { // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 135283 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 135284 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 135285 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 135286 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0 |
| 135287 | 56, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 135288 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2 |
| 135289 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3 |
| 135290 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 135291 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 135292 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 135293 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:psub |
| 135294 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:psub0 |
| 135295 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1 |
| 135296 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0 |
| 135297 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 135298 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2 |
| 135299 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3 |
| 135300 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 135301 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 135302 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32 |
| 135303 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 135304 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sube32 |
| 135305 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sube64 |
| 135306 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:subo32 |
| 135307 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64 |
| 135308 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 135309 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 135310 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 135311 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 135312 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 135313 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 135314 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 135315 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 135316 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubb |
| 135317 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 135318 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 135319 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 135320 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 135321 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 135322 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 135323 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 135324 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 135325 | 92, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 135326 | 109, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul4_and_ZPR_K |
| 135327 | 103, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPR_K |
| 135328 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2 |
| 135329 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3 |
| 135330 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 135331 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 135332 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 135333 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 135334 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 135335 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 135336 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 135337 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 135338 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 135339 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 135340 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 135341 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 135342 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 135343 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 135344 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 135345 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 135346 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 135347 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 135348 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 135349 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 135350 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 135351 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135352 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135353 | 7, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 135354 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 135355 | 8, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 135356 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 135357 | 40, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 135358 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 135359 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 135360 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 135361 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 135362 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 135363 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 135364 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 135365 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub |
| 135366 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 135367 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub |
| 135368 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 135369 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub |
| 135370 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 135371 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 135372 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 135373 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 135374 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 135375 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 135376 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 135377 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 135378 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 135379 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 135380 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 135381 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 135382 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 135383 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 135384 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 135385 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 135386 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 135387 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 135388 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 135389 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 135390 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 135391 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 135392 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 135393 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 135394 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 135395 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 135396 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 |
| 135397 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 135398 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 135399 | 75, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 135400 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 135401 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 |
| 135402 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 135403 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 135404 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 |
| 135405 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 135406 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 135407 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 135408 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 135409 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 135410 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 135411 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 135412 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135413 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135414 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135415 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 135416 | 128, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 135417 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 135418 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 |
| 135419 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 |
| 135420 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 135421 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 |
| 135422 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 135423 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 135424 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 135425 | 0, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 135426 | }, |
| 135427 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 135428 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 135429 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 135430 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 135431 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 135432 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 135433 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 |
| 135434 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 135435 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 135436 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 135437 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 135438 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 135439 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 135440 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 135441 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 135442 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 135443 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 |
| 135444 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 135445 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 135446 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 135447 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 135448 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 135449 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 135450 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 135451 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 135452 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 135453 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 135454 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 135455 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 135456 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 135457 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 135458 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 135459 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 135460 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 135461 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 135462 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 135463 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 135464 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 135465 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 135466 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 135467 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 135468 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 135469 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 135470 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 135471 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_K |
| 135472 | 99, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 135473 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 |
| 135474 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 135475 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 135476 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 135477 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 135478 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 135479 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 135480 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 135481 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 135482 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 135483 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 135484 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 135485 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 135486 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 135487 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 135488 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 135489 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 135490 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 135491 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 135492 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 135493 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 135494 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 135495 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 135496 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135497 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135498 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 135499 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 135500 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 135501 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 135502 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 135503 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 135504 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 135505 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 135506 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 135507 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 135508 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 135509 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 135510 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub |
| 135511 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 135512 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub |
| 135513 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 135514 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub |
| 135515 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 135516 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 135517 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 135518 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 135519 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 135520 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 135521 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 135522 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 135523 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 135524 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 135525 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 135526 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 135527 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 135528 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 135529 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 135530 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 135531 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 135532 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 135533 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 135534 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 135535 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 135536 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 135537 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 135538 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 135539 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 135540 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 135541 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 |
| 135542 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 135543 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 135544 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 135545 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 135546 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 135547 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 135548 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 135549 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 |
| 135550 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 135551 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 135552 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 135553 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 135554 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 135555 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 135556 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 135557 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135558 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135559 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135560 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 135561 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 135562 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 135563 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 135564 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 |
| 135565 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 135566 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 |
| 135567 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 135568 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 135569 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 135570 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 135571 | }, |
| 135572 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 135573 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 135574 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 135575 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 135576 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 135577 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 135578 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2 |
| 135579 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3 |
| 135580 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 135581 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 135582 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 135583 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub |
| 135584 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub0 |
| 135585 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub1 |
| 135586 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 135587 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 135588 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2 |
| 135589 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub3 |
| 135590 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135591 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 135592 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 135593 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 135594 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sube32 |
| 135595 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sube64 |
| 135596 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo32 |
| 135597 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64 |
| 135598 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 135599 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 135600 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 135601 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 135602 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 135603 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 135604 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 135605 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 135606 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubb |
| 135607 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 135608 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 135609 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 135610 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 135611 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 135612 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 135613 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 135614 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 135615 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 135616 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPR_3b |
| 135617 | 106, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPRMul2_and_ZPR_3b |
| 135618 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2 |
| 135619 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub3 |
| 135620 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 135621 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 135622 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 135623 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 135624 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 135625 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 135626 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 135627 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 135628 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 135629 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 135630 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 135631 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 135632 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 135633 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 135634 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 135635 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 135636 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 135637 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 135638 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 135639 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 135640 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 135641 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135642 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135643 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 135644 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 135645 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 135646 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 135647 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135648 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 135649 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 135650 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 135651 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 135652 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 135653 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 135654 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 135655 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub |
| 135656 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 135657 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub |
| 135658 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 135659 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub |
| 135660 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 135661 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 135662 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 135663 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 135664 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 135665 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 135666 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 135667 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 135668 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 135669 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 135670 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 135671 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 135672 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 135673 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 135674 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 135675 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 135676 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 135677 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 135678 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 135679 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 135680 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 135681 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 135682 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 135683 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 135684 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 135685 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 135686 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 |
| 135687 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 135688 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 135689 | 79, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 135690 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 135691 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 |
| 135692 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 135693 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 135694 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 |
| 135695 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 135696 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 135697 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 135698 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 135699 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 135700 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 135701 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 135702 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135703 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135704 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135705 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 135706 | 163, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 135707 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 135708 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 |
| 135709 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 |
| 135710 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 135711 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 |
| 135712 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 135713 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 135714 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 135715 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 135716 | }, |
| 135717 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 135718 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 135719 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 135720 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 135721 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 135722 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 135723 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 |
| 135724 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 135725 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 135726 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 135727 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 135728 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 135729 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 135730 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 135731 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 135732 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 135733 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 |
| 135734 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 135735 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135736 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 135737 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 135738 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 135739 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 135740 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 135741 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 135742 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 135743 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 135744 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 135745 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 135746 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 135747 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 135748 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 135749 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 135750 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 135751 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 135752 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 135753 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 135754 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 135755 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 135756 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 135757 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 135758 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 135759 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 135760 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 135761 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPR_4b |
| 135762 | 105, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 135763 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 |
| 135764 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 135765 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 135766 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 135767 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 135768 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 135769 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 135770 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 135771 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 135772 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 135773 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 135774 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 135775 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 135776 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 135777 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 135778 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 135779 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 135780 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 135781 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 135782 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 135783 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 135784 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 135785 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 135786 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135787 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135788 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 135789 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 135790 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 135791 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 135792 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 135793 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 135794 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 135795 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 135796 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 135797 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 135798 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 135799 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 135800 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub |
| 135801 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 135802 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub |
| 135803 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 135804 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub |
| 135805 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 135806 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 135807 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 135808 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 135809 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 135810 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 135811 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 135812 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 135813 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 135814 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 135815 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 135816 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 135817 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 135818 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 135819 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 135820 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 135821 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 135822 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 135823 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 135824 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 135825 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 135826 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 135827 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 135828 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 135829 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 135830 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 135831 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 135832 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 135833 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 135834 | 79, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 135835 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 135836 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 135837 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 135838 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 135839 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 135840 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 135841 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 135842 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 135843 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 135844 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 135845 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 135846 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 135847 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135848 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135849 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135850 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 135851 | 140, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 135852 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 135853 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 135854 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 135855 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 135856 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 135857 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 135858 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 135859 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 135860 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 135861 | }, |
| 135862 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 135863 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 135864 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 135865 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 135866 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 135867 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 135868 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 |
| 135869 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 135870 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 135871 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 135872 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 135873 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 135874 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 135875 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 135876 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 135877 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 135878 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 |
| 135879 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 135880 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 135881 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 135882 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 135883 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 135884 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 135885 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 135886 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 135887 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 135888 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 135889 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 135890 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 135891 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 135892 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 135893 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 135894 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 135895 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 135896 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 135897 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 135898 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 135899 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 135900 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 135901 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 135902 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 135903 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 135904 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 135905 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 135906 | 104, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 135907 | 104, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 135908 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 |
| 135909 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 135910 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 135911 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 135912 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 135913 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 135914 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 135915 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 135916 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 135917 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 135918 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 135919 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 135920 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 135921 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 135922 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 135923 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 135924 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 135925 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 135926 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 135927 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 135928 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 135929 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 135930 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 135931 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 135932 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 135933 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 135934 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 135935 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 135936 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 135937 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 135938 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 135939 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 135940 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 135941 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 135942 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 135943 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 135944 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 135945 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub |
| 135946 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 135947 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub |
| 135948 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 135949 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub |
| 135950 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 135951 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 135952 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 135953 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 135954 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 135955 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 135956 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 135957 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 135958 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 135959 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 135960 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 135961 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 135962 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 135963 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 135964 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 135965 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 135966 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 135967 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 135968 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 135969 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 135970 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 135971 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 135972 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 135973 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 135974 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 135975 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 135976 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 135977 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 135978 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 135979 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 |
| 135980 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 135981 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 135982 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 135983 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 135984 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 135985 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 135986 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 135987 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 135988 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 135989 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 135990 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 135991 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 135992 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 135993 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 135994 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 135995 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 135996 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 |
| 135997 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 135998 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 135999 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 136000 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 136001 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 136002 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 136003 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 136004 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 136005 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 136006 | }, |
| 136007 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 136008 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 136009 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 136010 | 65, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 136011 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 136012 | 65, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 136013 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 |
| 136014 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 136015 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 136016 | 10, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 136017 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 136018 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 136019 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 136020 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 136021 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 136022 | 94, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 136023 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 |
| 136024 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 136025 | 44, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 136026 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 136027 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 136028 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 136029 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 136030 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 136031 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 136032 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 136033 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 136034 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 136035 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 136036 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 136037 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 136038 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 136039 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 136040 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 136041 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 136042 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 136043 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 136044 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 136045 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 136046 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 136047 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 136048 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 136049 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 136050 | 98, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_0to7 |
| 136051 | 108, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul4_and_ZPR_3b |
| 136052 | 105, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 136053 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 |
| 136054 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 136055 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 136056 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 136057 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 136058 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 136059 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 136060 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 136061 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 136062 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 136063 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 136064 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 136065 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 136066 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 136067 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 136068 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 136069 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 136070 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 136071 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 136072 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 136073 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 136074 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 136075 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 136076 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136077 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136078 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 136079 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 136080 | 10, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 136081 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 136082 | 44, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 136083 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 136084 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 136085 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 136086 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 136087 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 136088 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 136089 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 136090 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub |
| 136091 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 136092 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub |
| 136093 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 136094 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub |
| 136095 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 136096 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 136097 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 136098 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 136099 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 136100 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 136101 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 136102 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 136103 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 136104 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 136105 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 136106 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 136107 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 136108 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 136109 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 136110 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 136111 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 136112 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 136113 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 136114 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 136115 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 136116 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 136117 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 136118 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 136119 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 136120 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 136121 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 136122 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 136123 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 136124 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 |
| 136125 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 136126 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 136127 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 136128 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 136129 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 136130 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 136131 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 136132 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 136133 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 136134 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 136135 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 136136 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 136137 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136138 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136139 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136140 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 136141 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 |
| 136142 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 136143 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 136144 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 136145 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 136146 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 136147 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 136148 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 136149 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 136150 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 136151 | }, |
| 136152 | { // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 136153 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 136154 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 136155 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 136156 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0 |
| 136157 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 136158 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2 |
| 136159 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3 |
| 136160 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 136161 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 136162 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 136163 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:psub |
| 136164 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:psub0 |
| 136165 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:psub1 |
| 136166 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0 |
| 136167 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 136168 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2 |
| 136169 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub3 |
| 136170 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 136171 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 136172 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32 |
| 136173 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 136174 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sube32 |
| 136175 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sube64 |
| 136176 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:subo32 |
| 136177 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64 |
| 136178 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 136179 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 136180 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 136181 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 136182 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 136183 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 136184 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 136185 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 136186 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubb |
| 136187 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 136188 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 136189 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 136190 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 136191 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 136192 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 136193 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 136194 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 136195 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 136196 | 107, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPRMul2_and_ZPR_K |
| 136197 | 107, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 136198 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2 |
| 136199 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub3 |
| 136200 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 136201 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 136202 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 136203 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 136204 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 136205 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 136206 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 136207 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 136208 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 136209 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 136210 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 136211 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 136212 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 136213 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 136214 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 136215 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 136216 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 136217 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 136218 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 136219 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 136220 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 136221 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136222 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136223 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 136224 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 136225 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 136226 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 136227 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 136228 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 136229 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 136230 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 136231 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 136232 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 136233 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 136234 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 136235 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub |
| 136236 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 136237 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub |
| 136238 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 136239 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub |
| 136240 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 136241 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 136242 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 136243 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 136244 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 136245 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 136246 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 136247 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 136248 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 136249 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 136250 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 136251 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 136252 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 136253 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 136254 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 136255 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 136256 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 136257 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 136258 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 136259 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 136260 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 136261 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 136262 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 136263 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 136264 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 136265 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 136266 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 |
| 136267 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 136268 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 136269 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1 |
| 136270 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 136271 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 |
| 136272 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 136273 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 136274 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 |
| 136275 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 136276 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 136277 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 136278 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 136279 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 136280 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 136281 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 136282 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136283 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136284 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136285 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 136286 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1 |
| 136287 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 136288 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 |
| 136289 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 |
| 136290 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 136291 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 |
| 136292 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 136293 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 136294 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 136295 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 136296 | }, |
| 136297 | { // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 136298 | 7, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 136299 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 136300 | 65, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 136301 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 136302 | 65, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 136303 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2 |
| 136304 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 136305 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 136306 | 10, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 136307 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 136308 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub |
| 136309 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub0 |
| 136310 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1 |
| 136311 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 136312 | 98, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 136313 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2 |
| 136314 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 136315 | 44, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 136316 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 136317 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 136318 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 136319 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube32 |
| 136320 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube64 |
| 136321 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo32 |
| 136322 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64 |
| 136323 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 136324 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 136325 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 136326 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 136327 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 136328 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 136329 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 136330 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 136331 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubb |
| 136332 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 136333 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 136334 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 136335 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 136336 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 136337 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 136338 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 136339 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 136340 | 98, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 136341 | 108, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul4_and_ZPR_3b |
| 136342 | 102, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_3b |
| 136343 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2 |
| 136344 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 136345 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 136346 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 136347 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 136348 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 136349 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 136350 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 136351 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 136352 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 136353 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 136354 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 136355 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 136356 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 136357 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 136358 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 136359 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 136360 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 136361 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 136362 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 136363 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 136364 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 136365 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 136366 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136367 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136368 | 7, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 136369 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 136370 | 10, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 136371 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 136372 | 44, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 136373 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 136374 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 136375 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 136376 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 136377 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 136378 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 136379 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 136380 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub |
| 136381 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 136382 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub |
| 136383 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 136384 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub |
| 136385 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 136386 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 136387 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 136388 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 136389 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 136390 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 136391 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 136392 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 136393 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 136394 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 136395 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 136396 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 136397 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 136398 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 136399 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 136400 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 136401 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 136402 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 136403 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 136404 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 136405 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 136406 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 136407 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 136408 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 136409 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 136410 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 136411 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 |
| 136412 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 136413 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 136414 | 79, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 136415 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 136416 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 |
| 136417 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 136418 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 136419 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 |
| 136420 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 136421 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 136422 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 136423 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 136424 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 136425 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 136426 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 136427 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136428 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136429 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136430 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 136431 | 163, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 136432 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 136433 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 |
| 136434 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 |
| 136435 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 136436 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 |
| 136437 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 136438 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 136439 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 136440 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 136441 | }, |
| 136442 | { // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 136443 | 7, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 136444 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 136445 | 56, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 136446 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0 |
| 136447 | 56, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 136448 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2 |
| 136449 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3 |
| 136450 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 136451 | 8, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 136452 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 136453 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:psub |
| 136454 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:psub0 |
| 136455 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1 |
| 136456 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0 |
| 136457 | 92, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 136458 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2 |
| 136459 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3 |
| 136460 | 40, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 136461 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 136462 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32 |
| 136463 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 136464 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sube32 |
| 136465 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sube64 |
| 136466 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:subo32 |
| 136467 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64 |
| 136468 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 136469 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 136470 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 136471 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 136472 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 136473 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 136474 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 136475 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 136476 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubb |
| 136477 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 136478 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 136479 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 136480 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 136481 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 136482 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 136483 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 136484 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 136485 | 92, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 136486 | 109, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul4_and_ZPR_K |
| 136487 | 103, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPR_K |
| 136488 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2 |
| 136489 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3 |
| 136490 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 136491 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 136492 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 136493 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 136494 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 136495 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 136496 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 136497 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 136498 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 136499 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 136500 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 136501 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 136502 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 136503 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 136504 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 136505 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 136506 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 136507 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 136508 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 136509 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 136510 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 136511 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136512 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136513 | 7, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 136514 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 136515 | 8, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 136516 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 136517 | 40, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 136518 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 136519 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 136520 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 136521 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 136522 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 136523 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 136524 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 136525 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub |
| 136526 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 136527 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub |
| 136528 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 136529 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub |
| 136530 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 136531 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 136532 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 136533 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 136534 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 136535 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 136536 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 136537 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 136538 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 136539 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 136540 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 136541 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 136542 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 136543 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 136544 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 136545 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 136546 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 136547 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 136548 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 136549 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 136550 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 136551 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 136552 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 136553 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 136554 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 136555 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 136556 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 |
| 136557 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 136558 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 136559 | 75, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 136560 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 136561 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 |
| 136562 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 136563 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 136564 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 |
| 136565 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 136566 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 136567 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 136568 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 136569 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 136570 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 136571 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 136572 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136573 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136574 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136575 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 136576 | 128, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 136577 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 136578 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 |
| 136579 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 |
| 136580 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 136581 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 |
| 136582 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 136583 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 136584 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 136585 | 0, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 136586 | }, |
| 136587 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 136588 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 136589 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 136590 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 136591 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0 |
| 136592 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 136593 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2 |
| 136594 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3 |
| 136595 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 136596 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 136597 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 136598 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub |
| 136599 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub0 |
| 136600 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub1 |
| 136601 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0 |
| 136602 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 136603 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2 |
| 136604 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub3 |
| 136605 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 136606 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 136607 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32 |
| 136608 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 136609 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sube32 |
| 136610 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sube64 |
| 136611 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo32 |
| 136612 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64 |
| 136613 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 136614 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 136615 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 136616 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 136617 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 136618 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 136619 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 136620 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 136621 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubb |
| 136622 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 136623 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 136624 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 136625 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 136626 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 136627 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 136628 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 136629 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 136630 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 136631 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPR_K |
| 136632 | 107, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 136633 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2 |
| 136634 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub3 |
| 136635 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 136636 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 136637 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 136638 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 136639 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 136640 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 136641 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 136642 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 136643 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 136644 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 136645 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 136646 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 136647 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 136648 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 136649 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 136650 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 136651 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 136652 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 136653 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 136654 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 136655 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 136656 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136657 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136658 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 136659 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 136660 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 136661 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 136662 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 136663 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 136664 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 136665 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 136666 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 136667 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 136668 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 136669 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 136670 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub |
| 136671 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 136672 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub |
| 136673 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 136674 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub |
| 136675 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 136676 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 136677 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 136678 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 136679 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 136680 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 136681 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 136682 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 136683 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 136684 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 136685 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 136686 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 136687 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 136688 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 136689 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 136690 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 136691 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 136692 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 136693 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 136694 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 136695 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 136696 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 136697 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 136698 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 136699 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 136700 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 136701 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 |
| 136702 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 136703 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 136704 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1 -> DD |
| 136705 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 136706 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 |
| 136707 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 136708 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 136709 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 |
| 136710 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 136711 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 136712 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 136713 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 136714 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 136715 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 136716 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 136717 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136718 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136719 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136720 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 136721 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1 -> QQ |
| 136722 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 136723 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 |
| 136724 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 |
| 136725 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 136726 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 |
| 136727 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 136728 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 136729 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 136730 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 136731 | }, |
| 136732 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 136733 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 136734 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 136735 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 136736 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 136737 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 136738 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2 |
| 136739 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3 |
| 136740 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 136741 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 136742 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 136743 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub |
| 136744 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 136745 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 136746 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 136747 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 136748 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2 |
| 136749 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3 |
| 136750 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 136751 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 136752 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 136753 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 136754 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 136755 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 136756 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 136757 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 136758 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 136759 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 136760 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 136761 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 136762 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 136763 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 136764 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 136765 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 136766 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 136767 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 136768 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 136769 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 136770 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 136771 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 136772 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 136773 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 136774 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 136775 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 136776 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_K |
| 136777 | 101, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 136778 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2 |
| 136779 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3 |
| 136780 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 136781 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 136782 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 136783 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 136784 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 136785 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 136786 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 136787 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 136788 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 136789 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 136790 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 136791 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 136792 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 136793 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 136794 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 136795 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 136796 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 136797 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 136798 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 136799 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 136800 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 136801 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136802 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136803 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 136804 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 136805 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 136806 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 136807 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 136808 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 136809 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 136810 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 136811 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 136812 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 136813 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 136814 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 136815 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub |
| 136816 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 136817 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub |
| 136818 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 136819 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub |
| 136820 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 136821 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 136822 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 136823 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 136824 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 136825 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 136826 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 136827 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 136828 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 136829 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 136830 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 136831 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 136832 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 136833 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 136834 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 136835 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 136836 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 136837 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 136838 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 136839 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 136840 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 136841 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 136842 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 136843 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 136844 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 136845 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 136846 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 |
| 136847 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 136848 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 136849 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 136850 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 136851 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 |
| 136852 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 136853 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 136854 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 |
| 136855 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 136856 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 136857 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 136858 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 136859 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 136860 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 136861 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 136862 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 136863 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 136864 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 136865 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 136866 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 136867 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 136868 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 |
| 136869 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 |
| 136870 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 136871 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 |
| 136872 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 136873 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 136874 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 136875 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 136876 | }, |
| 136877 | { // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 136878 | 7, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 136879 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 136880 | 56, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 136881 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 136882 | 65, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 136883 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 |
| 136884 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 136885 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 136886 | 8, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 136887 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 136888 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 136889 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 136890 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 136891 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 136892 | 98, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 136893 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 |
| 136894 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 136895 | 40, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 136896 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 136897 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 136898 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 136899 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 136900 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 136901 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 136902 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 136903 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 136904 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 136905 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 136906 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 136907 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 136908 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 136909 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 136910 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 136911 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 136912 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 136913 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 136914 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 136915 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 136916 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 136917 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 136918 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 136919 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 136920 | 92, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 136921 | 93, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR |
| 136922 | 108, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 136923 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 |
| 136924 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 136925 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 136926 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 136927 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 136928 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 136929 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 136930 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 136931 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 136932 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 136933 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 136934 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 136935 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 136936 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 136937 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 136938 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 136939 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 136940 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 136941 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 136942 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 136943 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 136944 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 136945 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 136946 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 136947 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 136948 | 7, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 136949 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 136950 | 10, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 136951 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 136952 | 44, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 136953 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 136954 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 136955 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 136956 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 136957 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 136958 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 136959 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 136960 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub |
| 136961 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 136962 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub |
| 136963 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 136964 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub |
| 136965 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 136966 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 136967 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 136968 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 136969 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 136970 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 136971 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 136972 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 136973 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 136974 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 136975 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 136976 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 136977 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 136978 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 136979 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 136980 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 136981 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 136982 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 136983 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 136984 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 136985 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 136986 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 136987 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 136988 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 136989 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 136990 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 136991 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 |
| 136992 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 136993 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 136994 | 77, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 136995 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 136996 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 |
| 136997 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 136998 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 136999 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 |
| 137000 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 137001 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 137002 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 137003 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 137004 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 137005 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 137006 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 137007 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137008 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137009 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137010 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 137011 | 147, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 137012 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 137013 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 |
| 137014 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 |
| 137015 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 137016 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 |
| 137017 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 137018 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 137019 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 137020 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 137021 | }, |
| 137022 | { // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 137023 | 7, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 137024 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 137025 | 56, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 137026 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0 |
| 137027 | 56, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 137028 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2 |
| 137029 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3 |
| 137030 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 137031 | 8, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 137032 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 137033 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:psub |
| 137034 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:psub0 |
| 137035 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1 |
| 137036 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0 |
| 137037 | 92, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 137038 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2 |
| 137039 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3 |
| 137040 | 40, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 137041 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 137042 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32 |
| 137043 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 137044 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sube32 |
| 137045 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sube64 |
| 137046 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:subo32 |
| 137047 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64 |
| 137048 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 137049 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 137050 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 137051 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 137052 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 137053 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 137054 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 137055 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 137056 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubb |
| 137057 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 137058 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 137059 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 137060 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 137061 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 137062 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 137063 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 137064 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 137065 | 92, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 137066 | 93, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPR |
| 137067 | 109, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_K |
| 137068 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2 |
| 137069 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3 |
| 137070 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 137071 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 137072 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 137073 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 137074 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 137075 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 137076 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 137077 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 137078 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 137079 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 137080 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 137081 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 137082 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 137083 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 137084 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 137085 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 137086 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 137087 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 137088 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 137089 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 137090 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 137091 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137092 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137093 | 7, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 137094 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 137095 | 8, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 137096 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 137097 | 40, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 137098 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 137099 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 137100 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 137101 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 137102 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 137103 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 137104 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 137105 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub |
| 137106 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 137107 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub |
| 137108 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 137109 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub |
| 137110 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 137111 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 137112 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 137113 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 137114 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 137115 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 137116 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 137117 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 137118 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 137119 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 137120 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 137121 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 137122 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 137123 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 137124 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 137125 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 137126 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 137127 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 137128 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 137129 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 137130 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 137131 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 137132 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 137133 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 137134 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 137135 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 137136 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 |
| 137137 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 137138 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 137139 | 75, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 137140 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 137141 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 |
| 137142 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 137143 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 137144 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 |
| 137145 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 137146 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 137147 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 137148 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 137149 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 137150 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 137151 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 137152 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137153 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137154 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137155 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 137156 | 128, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 137157 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 137158 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 |
| 137159 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 |
| 137160 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 137161 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 |
| 137162 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 137163 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 137164 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 137165 | 0, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 137166 | }, |
| 137167 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 137168 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 137169 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 137170 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 137171 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 137172 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64_lo |
| 137173 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2 |
| 137174 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3 |
| 137175 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 137176 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 137177 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 137178 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:psub |
| 137179 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 137180 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 137181 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 137182 | 94, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128_lo |
| 137183 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2 |
| 137184 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3 |
| 137185 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137186 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 137187 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 137188 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 137189 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 137190 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 137191 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 137192 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 137193 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 137194 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 137195 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 137196 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 137197 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 137198 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 137199 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 137200 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 137201 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 137202 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 137203 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 137204 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 137205 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 137206 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 137207 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 137208 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 137209 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 137210 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128_0to7 |
| 137211 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_3b |
| 137212 | 105, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 137213 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2 |
| 137214 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3 |
| 137215 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 137216 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 137217 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 137218 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 137219 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 137220 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 137221 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 137222 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 137223 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 137224 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 137225 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 137226 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 137227 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 137228 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 137229 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 137230 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 137231 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 137232 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 137233 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 137234 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 137235 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 137236 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137237 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137238 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 137239 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 137240 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 137241 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 137242 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137243 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 137244 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 137245 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 137246 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 137247 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 137248 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 137249 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 137250 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub |
| 137251 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 137252 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub |
| 137253 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 137254 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub |
| 137255 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 137256 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 137257 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 137258 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 137259 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 137260 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 137261 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 137262 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 137263 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 137264 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 137265 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 137266 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 137267 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 137268 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 137269 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 137270 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 137271 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 137272 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 137273 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 137274 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 137275 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 137276 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 137277 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 137278 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 137279 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 137280 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 137281 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 |
| 137282 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 137283 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 137284 | 79, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 137285 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 137286 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 |
| 137287 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 137288 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 137289 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 |
| 137290 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 137291 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 137292 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 137293 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 137294 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 137295 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 137296 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 137297 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137298 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137299 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137300 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 137301 | 146, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 137302 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 137303 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 |
| 137304 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 |
| 137305 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 137306 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 |
| 137307 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 137308 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 137309 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 137310 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 137311 | }, |
| 137312 | { // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 137313 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 137314 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 137315 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 137316 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0 |
| 137317 | 56, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 137318 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2 |
| 137319 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3 |
| 137320 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 137321 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 137322 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 137323 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:psub |
| 137324 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:psub0 |
| 137325 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1 |
| 137326 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0 |
| 137327 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 137328 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2 |
| 137329 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3 |
| 137330 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 137331 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 137332 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32 |
| 137333 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 137334 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sube32 |
| 137335 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sube64 |
| 137336 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:subo32 |
| 137337 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64 |
| 137338 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 137339 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 137340 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 137341 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 137342 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 137343 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 137344 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 137345 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 137346 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubb |
| 137347 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 137348 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 137349 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 137350 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 137351 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 137352 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 137353 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 137354 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 137355 | 92, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 137356 | 109, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul4_and_ZPR_K |
| 137357 | 109, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_K |
| 137358 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2 |
| 137359 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3 |
| 137360 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 137361 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 137362 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 137363 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 137364 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 137365 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 137366 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 137367 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 137368 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 137369 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 137370 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 137371 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 137372 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 137373 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 137374 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 137375 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 137376 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 137377 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 137378 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 137379 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 137380 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 137381 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137382 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137383 | 7, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 137384 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 137385 | 8, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 137386 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 137387 | 40, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 137388 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 137389 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 137390 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 137391 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 137392 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 137393 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 137394 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 137395 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub |
| 137396 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 137397 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub |
| 137398 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 137399 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub |
| 137400 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 137401 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 137402 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 137403 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 137404 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 137405 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 137406 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 137407 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 137408 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 137409 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 137410 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 137411 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 137412 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 137413 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 137414 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 137415 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 137416 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 137417 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 137418 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 137419 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 137420 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 137421 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 137422 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 137423 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 137424 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 137425 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 137426 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 |
| 137427 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 137428 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 137429 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1 |
| 137430 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 137431 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 |
| 137432 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 137433 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 137434 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 |
| 137435 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 137436 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 137437 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 137438 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 137439 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 137440 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 137441 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 137442 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137443 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137444 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137445 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 137446 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1 |
| 137447 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 137448 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 |
| 137449 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 |
| 137450 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 137451 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 |
| 137452 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 137453 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 137454 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 137455 | 0, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 137456 | }, |
| 137457 | { // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 137458 | 7, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 137459 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 137460 | 56, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 137461 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 137462 | 65, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64_lo |
| 137463 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 |
| 137464 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 137465 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 137466 | 8, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 137467 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 137468 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 137469 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 137470 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 137471 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 137472 | 98, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128_0to7 |
| 137473 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 |
| 137474 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 137475 | 40, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 137476 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 137477 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 137478 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 137479 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 137480 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 137481 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 137482 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 137483 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 137484 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 137485 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 137486 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 137487 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 137488 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 137489 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 137490 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 137491 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 137492 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 137493 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 137494 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 137495 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 137496 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 137497 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 137498 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 137499 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 137500 | 92, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 137501 | 103, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 137502 | 108, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_3b |
| 137503 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 |
| 137504 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 137505 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 137506 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 137507 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 137508 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 137509 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 137510 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 137511 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 137512 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 137513 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 137514 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 137515 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 137516 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 137517 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 137518 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 137519 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 137520 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 137521 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 137522 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 137523 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 137524 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 137525 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 137526 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137527 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137528 | 7, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 137529 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 137530 | 10, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16_lo |
| 137531 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 137532 | 44, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137533 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 137534 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 137535 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 137536 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 137537 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 137538 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 137539 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 137540 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub |
| 137541 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 137542 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub |
| 137543 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 137544 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub |
| 137545 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 137546 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 137547 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 137548 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 137549 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 137550 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 137551 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 137552 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 137553 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 137554 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 137555 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 137556 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 137557 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 137558 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 137559 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 137560 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 137561 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 137562 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 137563 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 137564 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 137565 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 137566 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 137567 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 137568 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 137569 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 137570 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 137571 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 |
| 137572 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 137573 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 137574 | 77, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 137575 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 137576 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 |
| 137577 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 137578 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 137579 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 |
| 137580 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 137581 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 137582 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 137583 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 137584 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 137585 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 137586 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 137587 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137588 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137589 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137590 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 137591 | 147, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 137592 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 137593 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 |
| 137594 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 |
| 137595 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 137596 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 |
| 137597 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 137598 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 137599 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 137600 | 0, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 137601 | }, |
| 137602 | { // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 137603 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 137604 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 137605 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 137606 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 137607 | 56, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 137608 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 |
| 137609 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 137610 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 137611 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 137612 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 137613 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 137614 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 137615 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 137616 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 137617 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 137618 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 |
| 137619 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 137620 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 137621 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 137622 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 137623 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 137624 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 137625 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 137626 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 137627 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 137628 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 137629 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 137630 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 137631 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 137632 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 137633 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 137634 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 137635 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 137636 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 137637 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 137638 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 137639 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 137640 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 137641 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 137642 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 137643 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 137644 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 137645 | 92, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 137646 | 103, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR_K |
| 137647 | 104, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 137648 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 |
| 137649 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 137650 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 137651 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 137652 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 137653 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 137654 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 137655 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 137656 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 137657 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 137658 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 137659 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 137660 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 137661 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 137662 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 137663 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 137664 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 137665 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 137666 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 137667 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 137668 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 137669 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 137670 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 137671 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137672 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137673 | 7, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 137674 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 137675 | 8, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 137676 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 137677 | 40, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 137678 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 137679 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 137680 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 137681 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 137682 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 137683 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 137684 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 137685 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub |
| 137686 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 137687 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub |
| 137688 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 137689 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub |
| 137690 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 137691 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 137692 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 137693 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 137694 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 137695 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 137696 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 137697 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 137698 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 137699 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 137700 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 137701 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 137702 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 137703 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 137704 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 137705 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 137706 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 137707 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 137708 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 137709 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 137710 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 137711 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 137712 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 137713 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 137714 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 137715 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 137716 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 137717 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 137718 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 137719 | 75, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 137720 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 137721 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 137722 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 137723 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 137724 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 137725 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 137726 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 137727 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 137728 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 137729 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 137730 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 137731 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 137732 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137733 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137734 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137735 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 137736 | 128, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 137737 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 137738 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 137739 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 137740 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 137741 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 137742 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 137743 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 137744 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 137745 | 0, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 137746 | }, |
| 137747 | { // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 137748 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 137749 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 137750 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 137751 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 137752 | 65, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 137753 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 |
| 137754 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 137755 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 137756 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 137757 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 137758 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 137759 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 137760 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 137761 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 137762 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 137763 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 |
| 137764 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 137765 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137766 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 137767 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 137768 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 137769 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 137770 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 137771 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 137772 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 137773 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 137774 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 137775 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 137776 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 137777 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 137778 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 137779 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 137780 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 137781 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 137782 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 137783 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 137784 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 137785 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 137786 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 137787 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 137788 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 137789 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 137790 | 98, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 137791 | 102, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR_3b |
| 137792 | 108, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 137793 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 |
| 137794 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 137795 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 137796 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 137797 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 137798 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 137799 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 137800 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 137801 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 137802 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 137803 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 137804 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 137805 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 137806 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 137807 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 137808 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 137809 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 137810 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 137811 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 137812 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 137813 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 137814 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 137815 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 137816 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137817 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137818 | 7, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 137819 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 137820 | 10, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 137821 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 137822 | 44, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137823 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 137824 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 137825 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 137826 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 137827 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 137828 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 137829 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 137830 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub |
| 137831 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 137832 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub |
| 137833 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 137834 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub |
| 137835 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 137836 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 137837 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 137838 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 137839 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 137840 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 137841 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 137842 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 137843 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 137844 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 137845 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 137846 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 137847 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 137848 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 137849 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 137850 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 137851 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 137852 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 137853 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 137854 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 137855 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 137856 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 137857 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 137858 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 137859 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 137860 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 137861 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 |
| 137862 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 137863 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 137864 | 79, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 137865 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 137866 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 |
| 137867 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 137868 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 137869 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 |
| 137870 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 137871 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 137872 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 137873 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 137874 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 137875 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 137876 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 137877 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 137878 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 137879 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 137880 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 137881 | 163, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 137882 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 137883 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 |
| 137884 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 |
| 137885 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 137886 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 |
| 137887 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 137888 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 137889 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 137890 | 0, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 137891 | }, |
| 137892 | { // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 137893 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 137894 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 137895 | 65, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 137896 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 137897 | 56, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 137898 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 |
| 137899 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 137900 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 137901 | 10, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 137902 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 137903 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 137904 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 137905 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 137906 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 137907 | 92, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 137908 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 |
| 137909 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 137910 | 44, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 137911 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 137912 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 137913 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 137914 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 137915 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 137916 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 137917 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 137918 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 137919 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 137920 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 137921 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 137922 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 137923 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 137924 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 137925 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 137926 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 137927 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 137928 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 137929 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 137930 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 137931 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 137932 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 137933 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 137934 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 137935 | 94, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 137936 | 97, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_4b |
| 137937 | 104, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 137938 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 |
| 137939 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 137940 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 137941 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 137942 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 137943 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 137944 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 137945 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 137946 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 137947 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 137948 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 137949 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 137950 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 137951 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 137952 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 137953 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 137954 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 137955 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 137956 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 137957 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 137958 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 137959 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 137960 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 137961 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 137962 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 137963 | 7, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 137964 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 137965 | 8, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 137966 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 137967 | 40, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 137968 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 137969 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 137970 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 137971 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 137972 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 137973 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 137974 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 137975 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub |
| 137976 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 137977 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub |
| 137978 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 137979 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub |
| 137980 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 137981 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 137982 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 137983 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 137984 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 137985 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 137986 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 137987 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 137988 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 137989 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 137990 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 137991 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 137992 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 137993 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 137994 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 137995 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 137996 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 137997 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 137998 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 137999 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 138000 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 138001 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 138002 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 138003 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 138004 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 138005 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 138006 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 |
| 138007 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 138008 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 138009 | 76, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 138010 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 138011 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 138012 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 138013 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 138014 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 |
| 138015 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 138016 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 138017 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 138018 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 138019 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 138020 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 138021 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 138022 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138023 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138024 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138025 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 138026 | 133, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 138027 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 138028 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 138029 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 |
| 138030 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 138031 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 |
| 138032 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 138033 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 138034 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 138035 | 0, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 138036 | }, |
| 138037 | { // MPR64 |
| 138038 | 0, // MPR64:bsub |
| 138039 | 0, // MPR64:bsub_hi |
| 138040 | 0, // MPR64:dsub |
| 138041 | 0, // MPR64:dsub0 |
| 138042 | 0, // MPR64:dsub1 |
| 138043 | 0, // MPR64:dsub2 |
| 138044 | 0, // MPR64:dsub3 |
| 138045 | 0, // MPR64:dsub_hi |
| 138046 | 0, // MPR64:hsub |
| 138047 | 0, // MPR64:hsub_hi |
| 138048 | 0, // MPR64:psub |
| 138049 | 0, // MPR64:psub0 |
| 138050 | 0, // MPR64:psub1 |
| 138051 | 0, // MPR64:qsub0 |
| 138052 | 0, // MPR64:qsub1 |
| 138053 | 0, // MPR64:qsub2 |
| 138054 | 0, // MPR64:qsub3 |
| 138055 | 0, // MPR64:ssub |
| 138056 | 0, // MPR64:ssub_hi |
| 138057 | 0, // MPR64:sub_32 |
| 138058 | 0, // MPR64:sub_32_hi |
| 138059 | 0, // MPR64:sube32 |
| 138060 | 0, // MPR64:sube64 |
| 138061 | 0, // MPR64:subo32 |
| 138062 | 0, // MPR64:subo64 |
| 138063 | 0, // MPR64:x8sub_0 |
| 138064 | 0, // MPR64:x8sub_1 |
| 138065 | 0, // MPR64:x8sub_2 |
| 138066 | 0, // MPR64:x8sub_3 |
| 138067 | 0, // MPR64:x8sub_4 |
| 138068 | 0, // MPR64:x8sub_5 |
| 138069 | 0, // MPR64:x8sub_6 |
| 138070 | 0, // MPR64:x8sub_7 |
| 138071 | 0, // MPR64:zasubb |
| 138072 | 0, // MPR64:zasubd0 |
| 138073 | 0, // MPR64:zasubd1 |
| 138074 | 0, // MPR64:zasubh0 |
| 138075 | 0, // MPR64:zasubh1 |
| 138076 | 95, // MPR64:zasubq0 -> MPR128 |
| 138077 | 95, // MPR64:zasubq1 -> MPR128 |
| 138078 | 0, // MPR64:zasubs0 |
| 138079 | 0, // MPR64:zasubs1 |
| 138080 | 0, // MPR64:zsub |
| 138081 | 0, // MPR64:zsub0 |
| 138082 | 0, // MPR64:zsub1 |
| 138083 | 0, // MPR64:zsub2 |
| 138084 | 0, // MPR64:zsub3 |
| 138085 | 0, // MPR64:zsub_hi |
| 138086 | 0, // MPR64:zasubd1_then_zasubq0 |
| 138087 | 0, // MPR64:zasubd1_then_zasubq1 |
| 138088 | 0, // MPR64:zasubs1_then_zasubd0 |
| 138089 | 0, // MPR64:zasubs1_then_zasubd1 |
| 138090 | 0, // MPR64:zasubs1_then_zasubq0 |
| 138091 | 0, // MPR64:zasubs1_then_zasubq1 |
| 138092 | 0, // MPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 138093 | 0, // MPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 138094 | 0, // MPR64:zasubh1_then_zasubd0 |
| 138095 | 0, // MPR64:zasubh1_then_zasubd1 |
| 138096 | 0, // MPR64:zasubh1_then_zasubq0 |
| 138097 | 0, // MPR64:zasubh1_then_zasubq1 |
| 138098 | 0, // MPR64:zasubh1_then_zasubs0 |
| 138099 | 0, // MPR64:zasubh1_then_zasubs1 |
| 138100 | 0, // MPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 138101 | 0, // MPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 138102 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 138103 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 138104 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 138105 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 138106 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138107 | 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138108 | 0, // MPR64:dsub1_then_bsub |
| 138109 | 0, // MPR64:dsub1_then_bsub_hi |
| 138110 | 0, // MPR64:dsub1_then_hsub |
| 138111 | 0, // MPR64:dsub1_then_hsub_hi |
| 138112 | 0, // MPR64:dsub1_then_ssub |
| 138113 | 0, // MPR64:dsub1_then_ssub_hi |
| 138114 | 0, // MPR64:dsub3_then_bsub |
| 138115 | 0, // MPR64:dsub3_then_bsub_hi |
| 138116 | 0, // MPR64:dsub3_then_hsub |
| 138117 | 0, // MPR64:dsub3_then_hsub_hi |
| 138118 | 0, // MPR64:dsub3_then_ssub |
| 138119 | 0, // MPR64:dsub3_then_ssub_hi |
| 138120 | 0, // MPR64:dsub2_then_bsub |
| 138121 | 0, // MPR64:dsub2_then_bsub_hi |
| 138122 | 0, // MPR64:dsub2_then_hsub |
| 138123 | 0, // MPR64:dsub2_then_hsub_hi |
| 138124 | 0, // MPR64:dsub2_then_ssub |
| 138125 | 0, // MPR64:dsub2_then_ssub_hi |
| 138126 | 0, // MPR64:psub1_then_psub |
| 138127 | 0, // MPR64:qsub1_then_dsub_hi |
| 138128 | 0, // MPR64:qsub3_then_dsub_hi |
| 138129 | 0, // MPR64:qsub2_then_dsub_hi |
| 138130 | 0, // MPR64:x8sub_7_then_sub_32 |
| 138131 | 0, // MPR64:x8sub_7_then_sub_32_hi |
| 138132 | 0, // MPR64:x8sub_6_then_sub_32 |
| 138133 | 0, // MPR64:x8sub_6_then_sub_32_hi |
| 138134 | 0, // MPR64:x8sub_5_then_sub_32 |
| 138135 | 0, // MPR64:x8sub_5_then_sub_32_hi |
| 138136 | 0, // MPR64:x8sub_4_then_sub_32 |
| 138137 | 0, // MPR64:x8sub_4_then_sub_32_hi |
| 138138 | 0, // MPR64:x8sub_3_then_sub_32 |
| 138139 | 0, // MPR64:x8sub_3_then_sub_32_hi |
| 138140 | 0, // MPR64:x8sub_2_then_sub_32 |
| 138141 | 0, // MPR64:x8sub_2_then_sub_32_hi |
| 138142 | 0, // MPR64:x8sub_1_then_sub_32 |
| 138143 | 0, // MPR64:x8sub_1_then_sub_32_hi |
| 138144 | 0, // MPR64:subo64_then_sub_32 |
| 138145 | 0, // MPR64:subo64_then_sub_32_hi |
| 138146 | 0, // MPR64:zsub1_then_zsub_hi |
| 138147 | 0, // MPR64:zsub3_then_zsub_hi |
| 138148 | 0, // MPR64:zsub2_then_zsub_hi |
| 138149 | 0, // MPR64:dsub0_dsub1 |
| 138150 | 0, // MPR64:dsub0_dsub1_dsub2 |
| 138151 | 0, // MPR64:dsub1_dsub2 |
| 138152 | 0, // MPR64:dsub1_dsub2_dsub3 |
| 138153 | 0, // MPR64:dsub2_dsub3 |
| 138154 | 0, // MPR64:dsub_dsub1 |
| 138155 | 0, // MPR64:dsub_dsub1_dsub2_dsub3 |
| 138156 | 0, // MPR64:dsub_dsub1_dsub2 |
| 138157 | 0, // MPR64:qsub0_qsub1 |
| 138158 | 0, // MPR64:qsub0_qsub1_qsub2 |
| 138159 | 0, // MPR64:qsub1_qsub2 |
| 138160 | 0, // MPR64:qsub1_qsub2_qsub3 |
| 138161 | 0, // MPR64:qsub2_qsub3 |
| 138162 | 0, // MPR64:sub_32_x8sub_1_then_sub_32 |
| 138163 | 0, // MPR64:x8sub_0_x8sub_1 |
| 138164 | 0, // MPR64:x8sub_2_x8sub_3 |
| 138165 | 0, // MPR64:x8sub_4_x8sub_5 |
| 138166 | 0, // MPR64:x8sub_6_x8sub_7 |
| 138167 | 0, // MPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138168 | 0, // MPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138169 | 0, // MPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138170 | 0, // MPR64:sub_32_subo64_then_sub_32 |
| 138171 | 0, // MPR64:zsub_qsub1 |
| 138172 | 0, // MPR64:zsub_qsub1_qsub2_qsub3 |
| 138173 | 0, // MPR64:zsub_qsub1_qsub2 |
| 138174 | 0, // MPR64:zsub0_zsub1 |
| 138175 | 0, // MPR64:zsub0_zsub1_zsub2 |
| 138176 | 0, // MPR64:zsub1_zsub2 |
| 138177 | 0, // MPR64:zsub1_zsub2_zsub3 |
| 138178 | 0, // MPR64:zsub2_zsub3 |
| 138179 | 0, // MPR64:zsub0_zsub2 |
| 138180 | 0, // MPR64:zsub1_zsub3 |
| 138181 | }, |
| 138182 | { // QQQ |
| 138183 | 7, // QQQ:bsub -> FPR8 |
| 138184 | 0, // QQQ:bsub_hi |
| 138185 | 56, // QQQ:dsub -> FPR64 |
| 138186 | 0, // QQQ:dsub0 |
| 138187 | 56, // QQQ:dsub1 -> FPR64 |
| 138188 | 56, // QQQ:dsub2 -> FPR64 |
| 138189 | 0, // QQQ:dsub3 |
| 138190 | 0, // QQQ:dsub_hi |
| 138191 | 8, // QQQ:hsub -> FPR16 |
| 138192 | 0, // QQQ:hsub_hi |
| 138193 | 0, // QQQ:psub |
| 138194 | 0, // QQQ:psub0 |
| 138195 | 0, // QQQ:psub1 |
| 138196 | 92, // QQQ:qsub0 -> FPR128 |
| 138197 | 92, // QQQ:qsub1 -> FPR128 |
| 138198 | 92, // QQQ:qsub2 -> FPR128 |
| 138199 | 0, // QQQ:qsub3 |
| 138200 | 40, // QQQ:ssub -> FPR32 |
| 138201 | 0, // QQQ:ssub_hi |
| 138202 | 0, // QQQ:sub_32 |
| 138203 | 0, // QQQ:sub_32_hi |
| 138204 | 0, // QQQ:sube32 |
| 138205 | 0, // QQQ:sube64 |
| 138206 | 0, // QQQ:subo32 |
| 138207 | 0, // QQQ:subo64 |
| 138208 | 0, // QQQ:x8sub_0 |
| 138209 | 0, // QQQ:x8sub_1 |
| 138210 | 0, // QQQ:x8sub_2 |
| 138211 | 0, // QQQ:x8sub_3 |
| 138212 | 0, // QQQ:x8sub_4 |
| 138213 | 0, // QQQ:x8sub_5 |
| 138214 | 0, // QQQ:x8sub_6 |
| 138215 | 0, // QQQ:x8sub_7 |
| 138216 | 0, // QQQ:zasubb |
| 138217 | 0, // QQQ:zasubd0 |
| 138218 | 0, // QQQ:zasubd1 |
| 138219 | 0, // QQQ:zasubh0 |
| 138220 | 0, // QQQ:zasubh1 |
| 138221 | 0, // QQQ:zasubq0 |
| 138222 | 0, // QQQ:zasubq1 |
| 138223 | 0, // QQQ:zasubs0 |
| 138224 | 0, // QQQ:zasubs1 |
| 138225 | 0, // QQQ:zsub |
| 138226 | 0, // QQQ:zsub0 |
| 138227 | 0, // QQQ:zsub1 |
| 138228 | 0, // QQQ:zsub2 |
| 138229 | 0, // QQQ:zsub3 |
| 138230 | 0, // QQQ:zsub_hi |
| 138231 | 0, // QQQ:zasubd1_then_zasubq0 |
| 138232 | 0, // QQQ:zasubd1_then_zasubq1 |
| 138233 | 0, // QQQ:zasubs1_then_zasubd0 |
| 138234 | 0, // QQQ:zasubs1_then_zasubd1 |
| 138235 | 0, // QQQ:zasubs1_then_zasubq0 |
| 138236 | 0, // QQQ:zasubs1_then_zasubq1 |
| 138237 | 0, // QQQ:zasubs1_then_zasubd1_then_zasubq0 |
| 138238 | 0, // QQQ:zasubs1_then_zasubd1_then_zasubq1 |
| 138239 | 0, // QQQ:zasubh1_then_zasubd0 |
| 138240 | 0, // QQQ:zasubh1_then_zasubd1 |
| 138241 | 0, // QQQ:zasubh1_then_zasubq0 |
| 138242 | 0, // QQQ:zasubh1_then_zasubq1 |
| 138243 | 0, // QQQ:zasubh1_then_zasubs0 |
| 138244 | 0, // QQQ:zasubh1_then_zasubs1 |
| 138245 | 0, // QQQ:zasubh1_then_zasubd1_then_zasubq0 |
| 138246 | 0, // QQQ:zasubh1_then_zasubd1_then_zasubq1 |
| 138247 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubd0 |
| 138248 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1 |
| 138249 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubq0 |
| 138250 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubq1 |
| 138251 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138252 | 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138253 | 7, // QQQ:dsub1_then_bsub -> FPR8 |
| 138254 | 0, // QQQ:dsub1_then_bsub_hi |
| 138255 | 8, // QQQ:dsub1_then_hsub -> FPR16 |
| 138256 | 0, // QQQ:dsub1_then_hsub_hi |
| 138257 | 40, // QQQ:dsub1_then_ssub -> FPR32 |
| 138258 | 0, // QQQ:dsub1_then_ssub_hi |
| 138259 | 0, // QQQ:dsub3_then_bsub |
| 138260 | 0, // QQQ:dsub3_then_bsub_hi |
| 138261 | 0, // QQQ:dsub3_then_hsub |
| 138262 | 0, // QQQ:dsub3_then_hsub_hi |
| 138263 | 0, // QQQ:dsub3_then_ssub |
| 138264 | 0, // QQQ:dsub3_then_ssub_hi |
| 138265 | 7, // QQQ:dsub2_then_bsub -> FPR8 |
| 138266 | 0, // QQQ:dsub2_then_bsub_hi |
| 138267 | 8, // QQQ:dsub2_then_hsub -> FPR16 |
| 138268 | 0, // QQQ:dsub2_then_hsub_hi |
| 138269 | 40, // QQQ:dsub2_then_ssub -> FPR32 |
| 138270 | 0, // QQQ:dsub2_then_ssub_hi |
| 138271 | 0, // QQQ:psub1_then_psub |
| 138272 | 0, // QQQ:qsub1_then_dsub_hi |
| 138273 | 0, // QQQ:qsub3_then_dsub_hi |
| 138274 | 0, // QQQ:qsub2_then_dsub_hi |
| 138275 | 0, // QQQ:x8sub_7_then_sub_32 |
| 138276 | 0, // QQQ:x8sub_7_then_sub_32_hi |
| 138277 | 0, // QQQ:x8sub_6_then_sub_32 |
| 138278 | 0, // QQQ:x8sub_6_then_sub_32_hi |
| 138279 | 0, // QQQ:x8sub_5_then_sub_32 |
| 138280 | 0, // QQQ:x8sub_5_then_sub_32_hi |
| 138281 | 0, // QQQ:x8sub_4_then_sub_32 |
| 138282 | 0, // QQQ:x8sub_4_then_sub_32_hi |
| 138283 | 0, // QQQ:x8sub_3_then_sub_32 |
| 138284 | 0, // QQQ:x8sub_3_then_sub_32_hi |
| 138285 | 0, // QQQ:x8sub_2_then_sub_32 |
| 138286 | 0, // QQQ:x8sub_2_then_sub_32_hi |
| 138287 | 0, // QQQ:x8sub_1_then_sub_32 |
| 138288 | 0, // QQQ:x8sub_1_then_sub_32_hi |
| 138289 | 0, // QQQ:subo64_then_sub_32 |
| 138290 | 0, // QQQ:subo64_then_sub_32_hi |
| 138291 | 0, // QQQ:zsub1_then_zsub_hi |
| 138292 | 0, // QQQ:zsub3_then_zsub_hi |
| 138293 | 0, // QQQ:zsub2_then_zsub_hi |
| 138294 | 0, // QQQ:dsub0_dsub1 |
| 138295 | 0, // QQQ:dsub0_dsub1_dsub2 |
| 138296 | 75, // QQQ:dsub1_dsub2 -> DD |
| 138297 | 0, // QQQ:dsub1_dsub2_dsub3 |
| 138298 | 0, // QQQ:dsub2_dsub3 |
| 138299 | 75, // QQQ:dsub_dsub1 -> DD |
| 138300 | 0, // QQQ:dsub_dsub1_dsub2_dsub3 |
| 138301 | 110, // QQQ:dsub_dsub1_dsub2 -> DDD |
| 138302 | 128, // QQQ:qsub0_qsub1 -> QQ |
| 138303 | 0, // QQQ:qsub0_qsub1_qsub2 |
| 138304 | 128, // QQQ:qsub1_qsub2 -> QQ |
| 138305 | 0, // QQQ:qsub1_qsub2_qsub3 |
| 138306 | 0, // QQQ:qsub2_qsub3 |
| 138307 | 0, // QQQ:sub_32_x8sub_1_then_sub_32 |
| 138308 | 0, // QQQ:x8sub_0_x8sub_1 |
| 138309 | 0, // QQQ:x8sub_2_x8sub_3 |
| 138310 | 0, // QQQ:x8sub_4_x8sub_5 |
| 138311 | 0, // QQQ:x8sub_6_x8sub_7 |
| 138312 | 0, // QQQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138313 | 0, // QQQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138314 | 0, // QQQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138315 | 0, // QQQ:sub_32_subo64_then_sub_32 |
| 138316 | 0, // QQQ:zsub_qsub1 |
| 138317 | 0, // QQQ:zsub_qsub1_qsub2_qsub3 |
| 138318 | 0, // QQQ:zsub_qsub1_qsub2 |
| 138319 | 0, // QQQ:zsub0_zsub1 |
| 138320 | 0, // QQQ:zsub0_zsub1_zsub2 |
| 138321 | 0, // QQQ:zsub1_zsub2 |
| 138322 | 0, // QQQ:zsub1_zsub2_zsub3 |
| 138323 | 0, // QQQ:zsub2_zsub3 |
| 138324 | 0, // QQQ:zsub0_zsub2 |
| 138325 | 0, // QQQ:zsub1_zsub3 |
| 138326 | }, |
| 138327 | { // ZPR3 |
| 138328 | 7, // ZPR3:bsub -> FPR8 |
| 138329 | 0, // ZPR3:bsub_hi |
| 138330 | 56, // ZPR3:dsub -> FPR64 |
| 138331 | 0, // ZPR3:dsub0 |
| 138332 | 56, // ZPR3:dsub1 -> FPR64 |
| 138333 | 56, // ZPR3:dsub2 -> FPR64 |
| 138334 | 0, // ZPR3:dsub3 |
| 138335 | 0, // ZPR3:dsub_hi |
| 138336 | 8, // ZPR3:hsub -> FPR16 |
| 138337 | 0, // ZPR3:hsub_hi |
| 138338 | 0, // ZPR3:psub |
| 138339 | 0, // ZPR3:psub0 |
| 138340 | 0, // ZPR3:psub1 |
| 138341 | 0, // ZPR3:qsub0 |
| 138342 | 92, // ZPR3:qsub1 -> FPR128 |
| 138343 | 92, // ZPR3:qsub2 -> FPR128 |
| 138344 | 0, // ZPR3:qsub3 |
| 138345 | 40, // ZPR3:ssub -> FPR32 |
| 138346 | 0, // ZPR3:ssub_hi |
| 138347 | 0, // ZPR3:sub_32 |
| 138348 | 0, // ZPR3:sub_32_hi |
| 138349 | 0, // ZPR3:sube32 |
| 138350 | 0, // ZPR3:sube64 |
| 138351 | 0, // ZPR3:subo32 |
| 138352 | 0, // ZPR3:subo64 |
| 138353 | 0, // ZPR3:x8sub_0 |
| 138354 | 0, // ZPR3:x8sub_1 |
| 138355 | 0, // ZPR3:x8sub_2 |
| 138356 | 0, // ZPR3:x8sub_3 |
| 138357 | 0, // ZPR3:x8sub_4 |
| 138358 | 0, // ZPR3:x8sub_5 |
| 138359 | 0, // ZPR3:x8sub_6 |
| 138360 | 0, // ZPR3:x8sub_7 |
| 138361 | 0, // ZPR3:zasubb |
| 138362 | 0, // ZPR3:zasubd0 |
| 138363 | 0, // ZPR3:zasubd1 |
| 138364 | 0, // ZPR3:zasubh0 |
| 138365 | 0, // ZPR3:zasubh1 |
| 138366 | 0, // ZPR3:zasubq0 |
| 138367 | 0, // ZPR3:zasubq1 |
| 138368 | 0, // ZPR3:zasubs0 |
| 138369 | 0, // ZPR3:zasubs1 |
| 138370 | 92, // ZPR3:zsub -> FPR128 |
| 138371 | 93, // ZPR3:zsub0 -> ZPR |
| 138372 | 93, // ZPR3:zsub1 -> ZPR |
| 138373 | 93, // ZPR3:zsub2 -> ZPR |
| 138374 | 0, // ZPR3:zsub3 |
| 138375 | 0, // ZPR3:zsub_hi |
| 138376 | 0, // ZPR3:zasubd1_then_zasubq0 |
| 138377 | 0, // ZPR3:zasubd1_then_zasubq1 |
| 138378 | 0, // ZPR3:zasubs1_then_zasubd0 |
| 138379 | 0, // ZPR3:zasubs1_then_zasubd1 |
| 138380 | 0, // ZPR3:zasubs1_then_zasubq0 |
| 138381 | 0, // ZPR3:zasubs1_then_zasubq1 |
| 138382 | 0, // ZPR3:zasubs1_then_zasubd1_then_zasubq0 |
| 138383 | 0, // ZPR3:zasubs1_then_zasubd1_then_zasubq1 |
| 138384 | 0, // ZPR3:zasubh1_then_zasubd0 |
| 138385 | 0, // ZPR3:zasubh1_then_zasubd1 |
| 138386 | 0, // ZPR3:zasubh1_then_zasubq0 |
| 138387 | 0, // ZPR3:zasubh1_then_zasubq1 |
| 138388 | 0, // ZPR3:zasubh1_then_zasubs0 |
| 138389 | 0, // ZPR3:zasubh1_then_zasubs1 |
| 138390 | 0, // ZPR3:zasubh1_then_zasubd1_then_zasubq0 |
| 138391 | 0, // ZPR3:zasubh1_then_zasubd1_then_zasubq1 |
| 138392 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd0 |
| 138393 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1 |
| 138394 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubq0 |
| 138395 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubq1 |
| 138396 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138397 | 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138398 | 7, // ZPR3:dsub1_then_bsub -> FPR8 |
| 138399 | 0, // ZPR3:dsub1_then_bsub_hi |
| 138400 | 8, // ZPR3:dsub1_then_hsub -> FPR16 |
| 138401 | 0, // ZPR3:dsub1_then_hsub_hi |
| 138402 | 40, // ZPR3:dsub1_then_ssub -> FPR32 |
| 138403 | 0, // ZPR3:dsub1_then_ssub_hi |
| 138404 | 0, // ZPR3:dsub3_then_bsub |
| 138405 | 0, // ZPR3:dsub3_then_bsub_hi |
| 138406 | 0, // ZPR3:dsub3_then_hsub |
| 138407 | 0, // ZPR3:dsub3_then_hsub_hi |
| 138408 | 0, // ZPR3:dsub3_then_ssub |
| 138409 | 0, // ZPR3:dsub3_then_ssub_hi |
| 138410 | 7, // ZPR3:dsub2_then_bsub -> FPR8 |
| 138411 | 0, // ZPR3:dsub2_then_bsub_hi |
| 138412 | 8, // ZPR3:dsub2_then_hsub -> FPR16 |
| 138413 | 0, // ZPR3:dsub2_then_hsub_hi |
| 138414 | 40, // ZPR3:dsub2_then_ssub -> FPR32 |
| 138415 | 0, // ZPR3:dsub2_then_ssub_hi |
| 138416 | 0, // ZPR3:psub1_then_psub |
| 138417 | 0, // ZPR3:qsub1_then_dsub_hi |
| 138418 | 0, // ZPR3:qsub3_then_dsub_hi |
| 138419 | 0, // ZPR3:qsub2_then_dsub_hi |
| 138420 | 0, // ZPR3:x8sub_7_then_sub_32 |
| 138421 | 0, // ZPR3:x8sub_7_then_sub_32_hi |
| 138422 | 0, // ZPR3:x8sub_6_then_sub_32 |
| 138423 | 0, // ZPR3:x8sub_6_then_sub_32_hi |
| 138424 | 0, // ZPR3:x8sub_5_then_sub_32 |
| 138425 | 0, // ZPR3:x8sub_5_then_sub_32_hi |
| 138426 | 0, // ZPR3:x8sub_4_then_sub_32 |
| 138427 | 0, // ZPR3:x8sub_4_then_sub_32_hi |
| 138428 | 0, // ZPR3:x8sub_3_then_sub_32 |
| 138429 | 0, // ZPR3:x8sub_3_then_sub_32_hi |
| 138430 | 0, // ZPR3:x8sub_2_then_sub_32 |
| 138431 | 0, // ZPR3:x8sub_2_then_sub_32_hi |
| 138432 | 0, // ZPR3:x8sub_1_then_sub_32 |
| 138433 | 0, // ZPR3:x8sub_1_then_sub_32_hi |
| 138434 | 0, // ZPR3:subo64_then_sub_32 |
| 138435 | 0, // ZPR3:subo64_then_sub_32_hi |
| 138436 | 0, // ZPR3:zsub1_then_zsub_hi |
| 138437 | 0, // ZPR3:zsub3_then_zsub_hi |
| 138438 | 0, // ZPR3:zsub2_then_zsub_hi |
| 138439 | 0, // ZPR3:dsub0_dsub1 |
| 138440 | 0, // ZPR3:dsub0_dsub1_dsub2 |
| 138441 | 75, // ZPR3:dsub1_dsub2 -> DD |
| 138442 | 0, // ZPR3:dsub1_dsub2_dsub3 |
| 138443 | 0, // ZPR3:dsub2_dsub3 |
| 138444 | 75, // ZPR3:dsub_dsub1 -> DD |
| 138445 | 0, // ZPR3:dsub_dsub1_dsub2_dsub3 |
| 138446 | 110, // ZPR3:dsub_dsub1_dsub2 -> DDD |
| 138447 | 0, // ZPR3:qsub0_qsub1 |
| 138448 | 0, // ZPR3:qsub0_qsub1_qsub2 |
| 138449 | 128, // ZPR3:qsub1_qsub2 -> QQ |
| 138450 | 0, // ZPR3:qsub1_qsub2_qsub3 |
| 138451 | 0, // ZPR3:qsub2_qsub3 |
| 138452 | 0, // ZPR3:sub_32_x8sub_1_then_sub_32 |
| 138453 | 0, // ZPR3:x8sub_0_x8sub_1 |
| 138454 | 0, // ZPR3:x8sub_2_x8sub_3 |
| 138455 | 0, // ZPR3:x8sub_4_x8sub_5 |
| 138456 | 0, // ZPR3:x8sub_6_x8sub_7 |
| 138457 | 0, // ZPR3:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138458 | 0, // ZPR3:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138459 | 0, // ZPR3:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138460 | 0, // ZPR3:sub_32_subo64_then_sub_32 |
| 138461 | 128, // ZPR3:zsub_qsub1 -> QQ |
| 138462 | 0, // ZPR3:zsub_qsub1_qsub2_qsub3 |
| 138463 | 206, // ZPR3:zsub_qsub1_qsub2 -> QQQ |
| 138464 | 129, // ZPR3:zsub0_zsub1 -> ZPR2 |
| 138465 | 0, // ZPR3:zsub0_zsub1_zsub2 |
| 138466 | 129, // ZPR3:zsub1_zsub2 -> ZPR2 |
| 138467 | 0, // ZPR3:zsub1_zsub2_zsub3 |
| 138468 | 0, // ZPR3:zsub2_zsub3 |
| 138469 | 0, // ZPR3:zsub0_zsub2 |
| 138470 | 0, // ZPR3:zsub1_zsub3 |
| 138471 | }, |
| 138472 | { // QQQ_with_dsub1_in_FPR64_lo |
| 138473 | 7, // QQQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 138474 | 0, // QQQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 138475 | 56, // QQQ_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 138476 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub0 |
| 138477 | 65, // QQQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 138478 | 56, // QQQ_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 138479 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3 |
| 138480 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 138481 | 8, // QQQ_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 138482 | 0, // QQQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 138483 | 0, // QQQ_with_dsub1_in_FPR64_lo:psub |
| 138484 | 0, // QQQ_with_dsub1_in_FPR64_lo:psub0 |
| 138485 | 0, // QQQ_with_dsub1_in_FPR64_lo:psub1 |
| 138486 | 92, // QQQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128 |
| 138487 | 94, // QQQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 138488 | 92, // QQQ_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 138489 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub3 |
| 138490 | 40, // QQQ_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 138491 | 0, // QQQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 138492 | 0, // QQQ_with_dsub1_in_FPR64_lo:sub_32 |
| 138493 | 0, // QQQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 138494 | 0, // QQQ_with_dsub1_in_FPR64_lo:sube32 |
| 138495 | 0, // QQQ_with_dsub1_in_FPR64_lo:sube64 |
| 138496 | 0, // QQQ_with_dsub1_in_FPR64_lo:subo32 |
| 138497 | 0, // QQQ_with_dsub1_in_FPR64_lo:subo64 |
| 138498 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 138499 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 138500 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 138501 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 138502 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 138503 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 138504 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 138505 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 138506 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubb |
| 138507 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 138508 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 138509 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 138510 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 138511 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 138512 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 138513 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 138514 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 138515 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub |
| 138516 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub0 |
| 138517 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub1 |
| 138518 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub2 |
| 138519 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub3 |
| 138520 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 138521 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 138522 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 138523 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 138524 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 138525 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 138526 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 138527 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 138528 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 138529 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 138530 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 138531 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 138532 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 138533 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 138534 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 138535 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 138536 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 138537 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 138538 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 138539 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 138540 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 138541 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138542 | 0, // QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138543 | 7, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 138544 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 138545 | 10, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 138546 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 138547 | 44, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 138548 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 138549 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 138550 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 138551 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 138552 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 138553 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 138554 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 138555 | 7, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 138556 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 138557 | 8, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 138558 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 138559 | 40, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 138560 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 138561 | 0, // QQQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 138562 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 138563 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 138564 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 138565 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 138566 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 138567 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 138568 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 138569 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 138570 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 138571 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 138572 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 138573 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 138574 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 138575 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 138576 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 138577 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 138578 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 138579 | 0, // QQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 138580 | 0, // QQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 138581 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 138582 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 138583 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 138584 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 138585 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 138586 | 76, // QQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 138587 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 138588 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 138589 | 77, // QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 138590 | 0, // QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 138591 | 112, // QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 138592 | 132, // QQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 138593 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 138594 | 133, // QQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 138595 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 138596 | 0, // QQQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 138597 | 0, // QQQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 138598 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 138599 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 138600 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 138601 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 138602 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138603 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138604 | 0, // QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138605 | 0, // QQQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 138606 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 138607 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 138608 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 138609 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 138610 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 138611 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 138612 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 138613 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 138614 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 138615 | 0, // QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 138616 | }, |
| 138617 | { // QQQ_with_dsub2_in_FPR64_lo |
| 138618 | 7, // QQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 138619 | 0, // QQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 138620 | 56, // QQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 138621 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 138622 | 56, // QQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 138623 | 65, // QQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 138624 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3 |
| 138625 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 138626 | 8, // QQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 138627 | 0, // QQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 138628 | 0, // QQQ_with_dsub2_in_FPR64_lo:psub |
| 138629 | 0, // QQQ_with_dsub2_in_FPR64_lo:psub0 |
| 138630 | 0, // QQQ_with_dsub2_in_FPR64_lo:psub1 |
| 138631 | 92, // QQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128 |
| 138632 | 92, // QQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128 |
| 138633 | 94, // QQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 138634 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub3 |
| 138635 | 40, // QQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 138636 | 0, // QQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 138637 | 0, // QQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 138638 | 0, // QQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 138639 | 0, // QQQ_with_dsub2_in_FPR64_lo:sube32 |
| 138640 | 0, // QQQ_with_dsub2_in_FPR64_lo:sube64 |
| 138641 | 0, // QQQ_with_dsub2_in_FPR64_lo:subo32 |
| 138642 | 0, // QQQ_with_dsub2_in_FPR64_lo:subo64 |
| 138643 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 138644 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 138645 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 138646 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 138647 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 138648 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 138649 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 138650 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 138651 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubb |
| 138652 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 138653 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 138654 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 138655 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 138656 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 138657 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 138658 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 138659 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 138660 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub |
| 138661 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 138662 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 138663 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 138664 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 138665 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 138666 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 138667 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 138668 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 138669 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 138670 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 138671 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 138672 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 138673 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 138674 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 138675 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 138676 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 138677 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 138678 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 138679 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 138680 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 138681 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 138682 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 138683 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 138684 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 138685 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 138686 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138687 | 0, // QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138688 | 7, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 138689 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 138690 | 8, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 138691 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 138692 | 40, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 138693 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 138694 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 138695 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 138696 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 138697 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 138698 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 138699 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 138700 | 7, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 138701 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 138702 | 10, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 138703 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 138704 | 44, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 138705 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 138706 | 0, // QQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 138707 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 138708 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 138709 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 138710 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 138711 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 138712 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 138713 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 138714 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 138715 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 138716 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 138717 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 138718 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 138719 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 138720 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 138721 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 138722 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 138723 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 138724 | 0, // QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 138725 | 0, // QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 138726 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 138727 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 138728 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 138729 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 138730 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 138731 | 77, // QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 138732 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 138733 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 138734 | 75, // QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD |
| 138735 | 0, // QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 138736 | 113, // QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 138737 | 128, // QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ |
| 138738 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 138739 | 132, // QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 138740 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 138741 | 0, // QQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 138742 | 0, // QQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 138743 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 138744 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 138745 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 138746 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 138747 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138748 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138749 | 0, // QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138750 | 0, // QQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 138751 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 138752 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 138753 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 138754 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 138755 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 138756 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 138757 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 138758 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 138759 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 138760 | 0, // QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 138761 | }, |
| 138762 | { // QQQ_with_qsub0_in_FPR128_lo |
| 138763 | 7, // QQQ_with_qsub0_in_FPR128_lo:bsub -> FPR8 |
| 138764 | 0, // QQQ_with_qsub0_in_FPR128_lo:bsub_hi |
| 138765 | 65, // QQQ_with_qsub0_in_FPR128_lo:dsub -> FPR64_lo |
| 138766 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub0 |
| 138767 | 56, // QQQ_with_qsub0_in_FPR128_lo:dsub1 -> FPR64 |
| 138768 | 56, // QQQ_with_qsub0_in_FPR128_lo:dsub2 -> FPR64 |
| 138769 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3 |
| 138770 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub_hi |
| 138771 | 10, // QQQ_with_qsub0_in_FPR128_lo:hsub -> FPR16_lo |
| 138772 | 0, // QQQ_with_qsub0_in_FPR128_lo:hsub_hi |
| 138773 | 0, // QQQ_with_qsub0_in_FPR128_lo:psub |
| 138774 | 0, // QQQ_with_qsub0_in_FPR128_lo:psub0 |
| 138775 | 0, // QQQ_with_qsub0_in_FPR128_lo:psub1 |
| 138776 | 94, // QQQ_with_qsub0_in_FPR128_lo:qsub0 -> FPR128_lo |
| 138777 | 92, // QQQ_with_qsub0_in_FPR128_lo:qsub1 -> FPR128 |
| 138778 | 92, // QQQ_with_qsub0_in_FPR128_lo:qsub2 -> FPR128 |
| 138779 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub3 |
| 138780 | 44, // QQQ_with_qsub0_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 138781 | 0, // QQQ_with_qsub0_in_FPR128_lo:ssub_hi |
| 138782 | 0, // QQQ_with_qsub0_in_FPR128_lo:sub_32 |
| 138783 | 0, // QQQ_with_qsub0_in_FPR128_lo:sub_32_hi |
| 138784 | 0, // QQQ_with_qsub0_in_FPR128_lo:sube32 |
| 138785 | 0, // QQQ_with_qsub0_in_FPR128_lo:sube64 |
| 138786 | 0, // QQQ_with_qsub0_in_FPR128_lo:subo32 |
| 138787 | 0, // QQQ_with_qsub0_in_FPR128_lo:subo64 |
| 138788 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_0 |
| 138789 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_1 |
| 138790 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_2 |
| 138791 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_3 |
| 138792 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_4 |
| 138793 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_5 |
| 138794 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_6 |
| 138795 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_7 |
| 138796 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubb |
| 138797 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubd0 |
| 138798 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubd1 |
| 138799 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh0 |
| 138800 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1 |
| 138801 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubq0 |
| 138802 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubq1 |
| 138803 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs0 |
| 138804 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1 |
| 138805 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub |
| 138806 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub0 |
| 138807 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub1 |
| 138808 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub2 |
| 138809 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub3 |
| 138810 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub_hi |
| 138811 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq0 |
| 138812 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq1 |
| 138813 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd0 |
| 138814 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1 |
| 138815 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq0 |
| 138816 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq1 |
| 138817 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 138818 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 138819 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd0 |
| 138820 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1 |
| 138821 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq0 |
| 138822 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq1 |
| 138823 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs0 |
| 138824 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1 |
| 138825 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 138826 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 138827 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 138828 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 138829 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 138830 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 138831 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138832 | 0, // QQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138833 | 7, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 138834 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub_hi |
| 138835 | 8, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 138836 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub_hi |
| 138837 | 40, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 138838 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub_hi |
| 138839 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub |
| 138840 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub_hi |
| 138841 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub |
| 138842 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub_hi |
| 138843 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub |
| 138844 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub_hi |
| 138845 | 7, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub -> FPR8 |
| 138846 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub_hi |
| 138847 | 8, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub -> FPR16 |
| 138848 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub_hi |
| 138849 | 40, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub -> FPR32 |
| 138850 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub_hi |
| 138851 | 0, // QQQ_with_qsub0_in_FPR128_lo:psub1_then_psub |
| 138852 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub1_then_dsub_hi |
| 138853 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub3_then_dsub_hi |
| 138854 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub2_then_dsub_hi |
| 138855 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32 |
| 138856 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 138857 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32 |
| 138858 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 138859 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32 |
| 138860 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 138861 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32 |
| 138862 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 138863 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32 |
| 138864 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 138865 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32 |
| 138866 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 138867 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32 |
| 138868 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 138869 | 0, // QQQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32 |
| 138870 | 0, // QQQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32_hi |
| 138871 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub1_then_zsub_hi |
| 138872 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub3_then_zsub_hi |
| 138873 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub2_then_zsub_hi |
| 138874 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub0_dsub1 |
| 138875 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 138876 | 75, // QQQ_with_qsub0_in_FPR128_lo:dsub1_dsub2 -> DD |
| 138877 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub1_dsub2_dsub3 |
| 138878 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub2_dsub3 |
| 138879 | 76, // QQQ_with_qsub0_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 138880 | 0, // QQQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 |
| 138881 | 111, // QQQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 138882 | 133, // QQQ_with_qsub0_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 138883 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub0_qsub1_qsub2 |
| 138884 | 128, // QQQ_with_qsub0_in_FPR128_lo:qsub1_qsub2 -> QQ |
| 138885 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub1_qsub2_qsub3 |
| 138886 | 0, // QQQ_with_qsub0_in_FPR128_lo:qsub2_qsub3 |
| 138887 | 0, // QQQ_with_qsub0_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 138888 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_0_x8sub_1 |
| 138889 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_2_x8sub_3 |
| 138890 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_4_x8sub_5 |
| 138891 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_6_x8sub_7 |
| 138892 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 138893 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 138894 | 0, // QQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 138895 | 0, // QQQ_with_qsub0_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 138896 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub_qsub1 |
| 138897 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 138898 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2 |
| 138899 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub0_zsub1 |
| 138900 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub0_zsub1_zsub2 |
| 138901 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub1_zsub2 |
| 138902 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub1_zsub2_zsub3 |
| 138903 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub2_zsub3 |
| 138904 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub0_zsub2 |
| 138905 | 0, // QQQ_with_qsub0_in_FPR128_lo:zsub1_zsub3 |
| 138906 | }, |
| 138907 | { // ZPR3_with_dsub1_in_FPR64_lo |
| 138908 | 7, // ZPR3_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 138909 | 0, // ZPR3_with_dsub1_in_FPR64_lo:bsub_hi |
| 138910 | 56, // ZPR3_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 138911 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub0 |
| 138912 | 65, // ZPR3_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 138913 | 56, // ZPR3_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 138914 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3 |
| 138915 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub_hi |
| 138916 | 8, // ZPR3_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 138917 | 0, // ZPR3_with_dsub1_in_FPR64_lo:hsub_hi |
| 138918 | 0, // ZPR3_with_dsub1_in_FPR64_lo:psub |
| 138919 | 0, // ZPR3_with_dsub1_in_FPR64_lo:psub0 |
| 138920 | 0, // ZPR3_with_dsub1_in_FPR64_lo:psub1 |
| 138921 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub0 |
| 138922 | 94, // ZPR3_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 138923 | 92, // ZPR3_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 138924 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub3 |
| 138925 | 40, // ZPR3_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 138926 | 0, // ZPR3_with_dsub1_in_FPR64_lo:ssub_hi |
| 138927 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sub_32 |
| 138928 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sub_32_hi |
| 138929 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sube32 |
| 138930 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sube64 |
| 138931 | 0, // ZPR3_with_dsub1_in_FPR64_lo:subo32 |
| 138932 | 0, // ZPR3_with_dsub1_in_FPR64_lo:subo64 |
| 138933 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_0 |
| 138934 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_1 |
| 138935 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_2 |
| 138936 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_3 |
| 138937 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_4 |
| 138938 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_5 |
| 138939 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_6 |
| 138940 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_7 |
| 138941 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubb |
| 138942 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubd0 |
| 138943 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubd1 |
| 138944 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh0 |
| 138945 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1 |
| 138946 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubq0 |
| 138947 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubq1 |
| 138948 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs0 |
| 138949 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1 |
| 138950 | 92, // ZPR3_with_dsub1_in_FPR64_lo:zsub -> FPR128 |
| 138951 | 93, // ZPR3_with_dsub1_in_FPR64_lo:zsub0 -> ZPR |
| 138952 | 97, // ZPR3_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 138953 | 93, // ZPR3_with_dsub1_in_FPR64_lo:zsub2 -> ZPR |
| 138954 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub3 |
| 138955 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub_hi |
| 138956 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 138957 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 138958 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 138959 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 138960 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 138961 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 138962 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 138963 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 138964 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 138965 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 138966 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 138967 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 138968 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 138969 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 138970 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 138971 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 138972 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 138973 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 138974 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 138975 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 138976 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 138977 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 138978 | 7, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 138979 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 138980 | 10, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 138981 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 138982 | 44, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 138983 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 138984 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 138985 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 138986 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 138987 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 138988 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 138989 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 138990 | 7, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 138991 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 138992 | 8, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 138993 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 138994 | 40, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 138995 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 138996 | 0, // ZPR3_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 138997 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 138998 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 138999 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 139000 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 139001 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 139002 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 139003 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 139004 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 139005 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 139006 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 139007 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 139008 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 139009 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 139010 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 139011 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 139012 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 139013 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 139014 | 0, // ZPR3_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 139015 | 0, // ZPR3_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 139016 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 139017 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 139018 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 139019 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 139020 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 139021 | 76, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 139022 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 139023 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 139024 | 77, // ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 139025 | 0, // ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 139026 | 112, // ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 139027 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 139028 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 139029 | 133, // ZPR3_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 139030 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 139031 | 0, // ZPR3_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 139032 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 139033 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 139034 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 139035 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 139036 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 139037 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139038 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139039 | 0, // ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139040 | 0, // ZPR3_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 139041 | 132, // ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 139042 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 139043 | 208, // ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 139044 | 137, // ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 139045 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 139046 | 139, // ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo |
| 139047 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 139048 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 139049 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 139050 | 0, // ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 139051 | }, |
| 139052 | { // ZPR3_with_dsub2_in_FPR64_lo |
| 139053 | 7, // ZPR3_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 139054 | 0, // ZPR3_with_dsub2_in_FPR64_lo:bsub_hi |
| 139055 | 56, // ZPR3_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 139056 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub0 |
| 139057 | 56, // ZPR3_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 139058 | 65, // ZPR3_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 139059 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3 |
| 139060 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub_hi |
| 139061 | 8, // ZPR3_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 139062 | 0, // ZPR3_with_dsub2_in_FPR64_lo:hsub_hi |
| 139063 | 0, // ZPR3_with_dsub2_in_FPR64_lo:psub |
| 139064 | 0, // ZPR3_with_dsub2_in_FPR64_lo:psub0 |
| 139065 | 0, // ZPR3_with_dsub2_in_FPR64_lo:psub1 |
| 139066 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub0 |
| 139067 | 92, // ZPR3_with_dsub2_in_FPR64_lo:qsub1 -> FPR128 |
| 139068 | 94, // ZPR3_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 139069 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub3 |
| 139070 | 40, // ZPR3_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 139071 | 0, // ZPR3_with_dsub2_in_FPR64_lo:ssub_hi |
| 139072 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sub_32 |
| 139073 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sub_32_hi |
| 139074 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sube32 |
| 139075 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sube64 |
| 139076 | 0, // ZPR3_with_dsub2_in_FPR64_lo:subo32 |
| 139077 | 0, // ZPR3_with_dsub2_in_FPR64_lo:subo64 |
| 139078 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_0 |
| 139079 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_1 |
| 139080 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_2 |
| 139081 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_3 |
| 139082 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_4 |
| 139083 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_5 |
| 139084 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_6 |
| 139085 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_7 |
| 139086 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubb |
| 139087 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubd0 |
| 139088 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubd1 |
| 139089 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh0 |
| 139090 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1 |
| 139091 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubq0 |
| 139092 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubq1 |
| 139093 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs0 |
| 139094 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1 |
| 139095 | 92, // ZPR3_with_dsub2_in_FPR64_lo:zsub -> FPR128 |
| 139096 | 93, // ZPR3_with_dsub2_in_FPR64_lo:zsub0 -> ZPR |
| 139097 | 93, // ZPR3_with_dsub2_in_FPR64_lo:zsub1 -> ZPR |
| 139098 | 97, // ZPR3_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 139099 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub3 |
| 139100 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub_hi |
| 139101 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 139102 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 139103 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 139104 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 139105 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 139106 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 139107 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 139108 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 139109 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 139110 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 139111 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 139112 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 139113 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 139114 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 139115 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 139116 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 139117 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 139118 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 139119 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 139120 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 139121 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139122 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139123 | 7, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 139124 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 139125 | 8, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 139126 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 139127 | 40, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 139128 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 139129 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 139130 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 139131 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 139132 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 139133 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 139134 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 139135 | 7, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 139136 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 139137 | 10, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 139138 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 139139 | 44, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139140 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 139141 | 0, // ZPR3_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 139142 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 139143 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 139144 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 139145 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 139146 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 139147 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 139148 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 139149 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 139150 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 139151 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 139152 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 139153 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 139154 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 139155 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 139156 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 139157 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 139158 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 139159 | 0, // ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 139160 | 0, // ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 139161 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 139162 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 139163 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 139164 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 139165 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 139166 | 77, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 139167 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 139168 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 139169 | 75, // ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD |
| 139170 | 0, // ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 139171 | 113, // ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 139172 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 139173 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 139174 | 132, // ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 139175 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 139176 | 0, // ZPR3_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 139177 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 139178 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 139179 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 139180 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 139181 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 139182 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139183 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139184 | 0, // ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139185 | 0, // ZPR3_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 139186 | 128, // ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ |
| 139187 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 139188 | 209, // ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 139189 | 129, // ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2 |
| 139190 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 139191 | 137, // ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub1_in_FPR64_lo |
| 139192 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 139193 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 139194 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 139195 | 0, // ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 139196 | }, |
| 139197 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 139198 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 |
| 139199 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub_hi |
| 139200 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 |
| 139201 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 |
| 139202 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 -> FPR64 |
| 139203 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 -> FPR64 |
| 139204 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 |
| 139205 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_hi |
| 139206 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 |
| 139207 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub_hi |
| 139208 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub |
| 139209 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 |
| 139210 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 |
| 139211 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 |
| 139212 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 -> FPR128 |
| 139213 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 -> FPR128 |
| 139214 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 |
| 139215 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 |
| 139216 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub_hi |
| 139217 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 |
| 139218 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_hi |
| 139219 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 |
| 139220 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 |
| 139221 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 |
| 139222 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 |
| 139223 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 |
| 139224 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 |
| 139225 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 |
| 139226 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 |
| 139227 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 |
| 139228 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 |
| 139229 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 |
| 139230 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 |
| 139231 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb |
| 139232 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 |
| 139233 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 |
| 139234 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 |
| 139235 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 |
| 139236 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 |
| 139237 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 |
| 139238 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 |
| 139239 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 |
| 139240 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 |
| 139241 | 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPRMul2 |
| 139242 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR |
| 139243 | 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPRMul2 |
| 139244 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 |
| 139245 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi |
| 139246 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 |
| 139247 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 |
| 139248 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 |
| 139249 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 |
| 139250 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 |
| 139251 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 |
| 139252 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 |
| 139253 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 |
| 139254 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 |
| 139255 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 |
| 139256 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 |
| 139257 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 |
| 139258 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 |
| 139259 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 |
| 139260 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 |
| 139261 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 |
| 139262 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 |
| 139263 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 |
| 139264 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 |
| 139265 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 |
| 139266 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139267 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139268 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub -> FPR8 |
| 139269 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub_hi |
| 139270 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub -> FPR16 |
| 139271 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub_hi |
| 139272 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub -> FPR32 |
| 139273 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub_hi |
| 139274 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub |
| 139275 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub_hi |
| 139276 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub |
| 139277 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub_hi |
| 139278 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub |
| 139279 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub_hi |
| 139280 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub -> FPR8 |
| 139281 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub_hi |
| 139282 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub -> FPR16 |
| 139283 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub_hi |
| 139284 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub -> FPR32 |
| 139285 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub_hi |
| 139286 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1_then_psub |
| 139287 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_hi |
| 139288 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub_hi |
| 139289 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_hi |
| 139290 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 |
| 139291 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32_hi |
| 139292 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 |
| 139293 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_hi |
| 139294 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 |
| 139295 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32_hi |
| 139296 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 |
| 139297 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_hi |
| 139298 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 |
| 139299 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32_hi |
| 139300 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 |
| 139301 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_hi |
| 139302 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 |
| 139303 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32_hi |
| 139304 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 |
| 139305 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32_hi |
| 139306 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi |
| 139307 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi |
| 139308 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi |
| 139309 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 |
| 139310 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 |
| 139311 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 -> DD |
| 139312 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 |
| 139313 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 |
| 139314 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1 -> DD |
| 139315 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1_dsub2_dsub3 |
| 139316 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1_dsub2 -> DDD |
| 139317 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 |
| 139318 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 |
| 139319 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 -> QQ |
| 139320 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 |
| 139321 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 |
| 139322 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 |
| 139323 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 |
| 139324 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 |
| 139325 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 |
| 139326 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 |
| 139327 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139328 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139329 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139330 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 |
| 139331 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1 -> QQ |
| 139332 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1_qsub2_qsub3 |
| 139333 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1_qsub2 -> QQQ |
| 139334 | 134, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 |
| 139335 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 |
| 139336 | 138, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 139337 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 |
| 139338 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 |
| 139339 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 |
| 139340 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 |
| 139341 | }, |
| 139342 | { // ZPR3_with_zsub1_in_ZPRMul2 |
| 139343 | 7, // ZPR3_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 139344 | 0, // ZPR3_with_zsub1_in_ZPRMul2:bsub_hi |
| 139345 | 56, // ZPR3_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 139346 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub0 |
| 139347 | 56, // ZPR3_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 139348 | 56, // ZPR3_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 139349 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3 |
| 139350 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub_hi |
| 139351 | 8, // ZPR3_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 139352 | 0, // ZPR3_with_zsub1_in_ZPRMul2:hsub_hi |
| 139353 | 0, // ZPR3_with_zsub1_in_ZPRMul2:psub |
| 139354 | 0, // ZPR3_with_zsub1_in_ZPRMul2:psub0 |
| 139355 | 0, // ZPR3_with_zsub1_in_ZPRMul2:psub1 |
| 139356 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub0 |
| 139357 | 92, // ZPR3_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 139358 | 92, // ZPR3_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 139359 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub3 |
| 139360 | 40, // ZPR3_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 139361 | 0, // ZPR3_with_zsub1_in_ZPRMul2:ssub_hi |
| 139362 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sub_32 |
| 139363 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sub_32_hi |
| 139364 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sube32 |
| 139365 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sube64 |
| 139366 | 0, // ZPR3_with_zsub1_in_ZPRMul2:subo32 |
| 139367 | 0, // ZPR3_with_zsub1_in_ZPRMul2:subo64 |
| 139368 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_0 |
| 139369 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_1 |
| 139370 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_2 |
| 139371 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_3 |
| 139372 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_4 |
| 139373 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_5 |
| 139374 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_6 |
| 139375 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_7 |
| 139376 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubb |
| 139377 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubd0 |
| 139378 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubd1 |
| 139379 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh0 |
| 139380 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1 |
| 139381 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubq0 |
| 139382 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubq1 |
| 139383 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs0 |
| 139384 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1 |
| 139385 | 92, // ZPR3_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 139386 | 93, // ZPR3_with_zsub1_in_ZPRMul2:zsub0 -> ZPR |
| 139387 | 96, // ZPR3_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 139388 | 93, // ZPR3_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 139389 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub3 |
| 139390 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub_hi |
| 139391 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 139392 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 139393 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 139394 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 139395 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 139396 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 139397 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 139398 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 139399 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 139400 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 139401 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 139402 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 139403 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 139404 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 139405 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 139406 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 139407 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 139408 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 139409 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 139410 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 139411 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139412 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139413 | 7, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 139414 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 139415 | 8, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 139416 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 139417 | 40, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 139418 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 139419 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 139420 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 139421 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 139422 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 139423 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 139424 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 139425 | 7, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 139426 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 139427 | 8, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 139428 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 139429 | 40, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 139430 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 139431 | 0, // ZPR3_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 139432 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 139433 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 139434 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 139435 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 139436 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 139437 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 139438 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 139439 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 139440 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 139441 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 139442 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 139443 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 139444 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 139445 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 139446 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 139447 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 139448 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 139449 | 0, // ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 139450 | 0, // ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 139451 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 139452 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 139453 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 139454 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 139455 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 139456 | 75, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 139457 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 139458 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 139459 | 75, // ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 139460 | 0, // ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 139461 | 110, // ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 139462 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 139463 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 139464 | 128, // ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 139465 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 139466 | 0, // ZPR3_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 139467 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 139468 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 139469 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 139470 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 139471 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 139472 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139473 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139474 | 0, // ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139475 | 0, // ZPR3_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 139476 | 128, // ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 139477 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 139478 | 206, // ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 139479 | 138, // ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 139480 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 139481 | 134, // ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 139482 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 139483 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 139484 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 139485 | 0, // ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 139486 | }, |
| 139487 | { // ZPR3_with_zsub_in_FPR128_lo |
| 139488 | 7, // ZPR3_with_zsub_in_FPR128_lo:bsub -> FPR8 |
| 139489 | 0, // ZPR3_with_zsub_in_FPR128_lo:bsub_hi |
| 139490 | 65, // ZPR3_with_zsub_in_FPR128_lo:dsub -> FPR64_lo |
| 139491 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub0 |
| 139492 | 56, // ZPR3_with_zsub_in_FPR128_lo:dsub1 -> FPR64 |
| 139493 | 56, // ZPR3_with_zsub_in_FPR128_lo:dsub2 -> FPR64 |
| 139494 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3 |
| 139495 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub_hi |
| 139496 | 10, // ZPR3_with_zsub_in_FPR128_lo:hsub -> FPR16_lo |
| 139497 | 0, // ZPR3_with_zsub_in_FPR128_lo:hsub_hi |
| 139498 | 0, // ZPR3_with_zsub_in_FPR128_lo:psub |
| 139499 | 0, // ZPR3_with_zsub_in_FPR128_lo:psub0 |
| 139500 | 0, // ZPR3_with_zsub_in_FPR128_lo:psub1 |
| 139501 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub0 |
| 139502 | 92, // ZPR3_with_zsub_in_FPR128_lo:qsub1 -> FPR128 |
| 139503 | 92, // ZPR3_with_zsub_in_FPR128_lo:qsub2 -> FPR128 |
| 139504 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub3 |
| 139505 | 44, // ZPR3_with_zsub_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139506 | 0, // ZPR3_with_zsub_in_FPR128_lo:ssub_hi |
| 139507 | 0, // ZPR3_with_zsub_in_FPR128_lo:sub_32 |
| 139508 | 0, // ZPR3_with_zsub_in_FPR128_lo:sub_32_hi |
| 139509 | 0, // ZPR3_with_zsub_in_FPR128_lo:sube32 |
| 139510 | 0, // ZPR3_with_zsub_in_FPR128_lo:sube64 |
| 139511 | 0, // ZPR3_with_zsub_in_FPR128_lo:subo32 |
| 139512 | 0, // ZPR3_with_zsub_in_FPR128_lo:subo64 |
| 139513 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_0 |
| 139514 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_1 |
| 139515 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_2 |
| 139516 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_3 |
| 139517 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_4 |
| 139518 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_5 |
| 139519 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_6 |
| 139520 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_7 |
| 139521 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubb |
| 139522 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubd0 |
| 139523 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubd1 |
| 139524 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh0 |
| 139525 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1 |
| 139526 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubq0 |
| 139527 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubq1 |
| 139528 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs0 |
| 139529 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1 |
| 139530 | 94, // ZPR3_with_zsub_in_FPR128_lo:zsub -> FPR128_lo |
| 139531 | 97, // ZPR3_with_zsub_in_FPR128_lo:zsub0 -> ZPR_4b |
| 139532 | 93, // ZPR3_with_zsub_in_FPR128_lo:zsub1 -> ZPR |
| 139533 | 93, // ZPR3_with_zsub_in_FPR128_lo:zsub2 -> ZPR |
| 139534 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub3 |
| 139535 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub_hi |
| 139536 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubd1_then_zasubq0 |
| 139537 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubd1_then_zasubq1 |
| 139538 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubd0 |
| 139539 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1 |
| 139540 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubq0 |
| 139541 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubq1 |
| 139542 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 139543 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 139544 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubd0 |
| 139545 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1 |
| 139546 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubq0 |
| 139547 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubq1 |
| 139548 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs0 |
| 139549 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1 |
| 139550 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 139551 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 139552 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 139553 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 139554 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 139555 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 139556 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139557 | 0, // ZPR3_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139558 | 7, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 139559 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_bsub_hi |
| 139560 | 8, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 139561 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_hsub_hi |
| 139562 | 40, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 139563 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub1_then_ssub_hi |
| 139564 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_bsub |
| 139565 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_bsub_hi |
| 139566 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_hsub |
| 139567 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_hsub_hi |
| 139568 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_ssub |
| 139569 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub3_then_ssub_hi |
| 139570 | 7, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_bsub -> FPR8 |
| 139571 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_bsub_hi |
| 139572 | 8, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_hsub -> FPR16 |
| 139573 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_hsub_hi |
| 139574 | 40, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_ssub -> FPR32 |
| 139575 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub2_then_ssub_hi |
| 139576 | 0, // ZPR3_with_zsub_in_FPR128_lo:psub1_then_psub |
| 139577 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub1_then_dsub_hi |
| 139578 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub3_then_dsub_hi |
| 139579 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub2_then_dsub_hi |
| 139580 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32 |
| 139581 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 139582 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32 |
| 139583 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 139584 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32 |
| 139585 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 139586 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32 |
| 139587 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 139588 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32 |
| 139589 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 139590 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32 |
| 139591 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 139592 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32 |
| 139593 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 139594 | 0, // ZPR3_with_zsub_in_FPR128_lo:subo64_then_sub_32 |
| 139595 | 0, // ZPR3_with_zsub_in_FPR128_lo:subo64_then_sub_32_hi |
| 139596 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub1_then_zsub_hi |
| 139597 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub3_then_zsub_hi |
| 139598 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub2_then_zsub_hi |
| 139599 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub0_dsub1 |
| 139600 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 139601 | 75, // ZPR3_with_zsub_in_FPR128_lo:dsub1_dsub2 -> DD |
| 139602 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub1_dsub2_dsub3 |
| 139603 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub2_dsub3 |
| 139604 | 76, // ZPR3_with_zsub_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 139605 | 0, // ZPR3_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 |
| 139606 | 111, // ZPR3_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 139607 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub0_qsub1 |
| 139608 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub0_qsub1_qsub2 |
| 139609 | 128, // ZPR3_with_zsub_in_FPR128_lo:qsub1_qsub2 -> QQ |
| 139610 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub1_qsub2_qsub3 |
| 139611 | 0, // ZPR3_with_zsub_in_FPR128_lo:qsub2_qsub3 |
| 139612 | 0, // ZPR3_with_zsub_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 139613 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_0_x8sub_1 |
| 139614 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_2_x8sub_3 |
| 139615 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_4_x8sub_5 |
| 139616 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_6_x8sub_7 |
| 139617 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139618 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139619 | 0, // ZPR3_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139620 | 0, // ZPR3_with_zsub_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 139621 | 133, // ZPR3_with_zsub_in_FPR128_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 139622 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 139623 | 210, // ZPR3_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 139624 | 139, // ZPR3_with_zsub_in_FPR128_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 139625 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub0_zsub1_zsub2 |
| 139626 | 129, // ZPR3_with_zsub_in_FPR128_lo:zsub1_zsub2 -> ZPR2 |
| 139627 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub1_zsub2_zsub3 |
| 139628 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub2_zsub3 |
| 139629 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub0_zsub2 |
| 139630 | 0, // ZPR3_with_zsub_in_FPR128_lo:zsub1_zsub3 |
| 139631 | }, |
| 139632 | { // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 139633 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 139634 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 139635 | 56, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 139636 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 139637 | 65, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 139638 | 65, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 139639 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3 |
| 139640 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 139641 | 8, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 139642 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 139643 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub |
| 139644 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub0 |
| 139645 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub1 |
| 139646 | 92, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128 |
| 139647 | 94, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 139648 | 94, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 139649 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub3 |
| 139650 | 40, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 139651 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 139652 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 139653 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 139654 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sube32 |
| 139655 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sube64 |
| 139656 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo32 |
| 139657 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64 |
| 139658 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 139659 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 139660 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 139661 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 139662 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 139663 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 139664 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 139665 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 139666 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubb |
| 139667 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 139668 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 139669 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 139670 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 139671 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 139672 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 139673 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 139674 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 139675 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub |
| 139676 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 139677 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 139678 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 139679 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 139680 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 139681 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 139682 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 139683 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 139684 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 139685 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 139686 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 139687 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 139688 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 139689 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 139690 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 139691 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 139692 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 139693 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 139694 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 139695 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 139696 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 139697 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 139698 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 139699 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 139700 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 139701 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139702 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139703 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 139704 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 139705 | 10, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 139706 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 139707 | 44, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139708 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 139709 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 139710 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 139711 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 139712 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 139713 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 139714 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 139715 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 139716 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 139717 | 10, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 139718 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 139719 | 44, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139720 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 139721 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 139722 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 139723 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 139724 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 139725 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 139726 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 139727 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 139728 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 139729 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 139730 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 139731 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 139732 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 139733 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 139734 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 139735 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 139736 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 139737 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 139738 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 139739 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 139740 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 139741 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 139742 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 139743 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 139744 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 139745 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 139746 | 79, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 139747 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 139748 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 139749 | 77, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 139750 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 139751 | 115, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 139752 | 132, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 139753 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 139754 | 140, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 139755 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 139756 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 139757 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 139758 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 139759 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 139760 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 139761 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 139762 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139763 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139764 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139765 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 139766 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 139767 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 139768 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 139769 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 139770 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 139771 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 139772 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 139773 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 139774 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 139775 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 139776 | }, |
| 139777 | { // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 139778 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 139779 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 139780 | 65, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 139781 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub0 |
| 139782 | 65, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 139783 | 56, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 139784 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3 |
| 139785 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 139786 | 10, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 139787 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 139788 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:psub |
| 139789 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:psub0 |
| 139790 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:psub1 |
| 139791 | 94, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128_lo |
| 139792 | 94, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 139793 | 92, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 139794 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub3 |
| 139795 | 44, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139796 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 139797 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sub_32 |
| 139798 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 139799 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sube32 |
| 139800 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sube64 |
| 139801 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:subo32 |
| 139802 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:subo64 |
| 139803 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 139804 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 139805 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 139806 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 139807 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 139808 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 139809 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 139810 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 139811 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubb |
| 139812 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 139813 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 139814 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 139815 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 139816 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 139817 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 139818 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 139819 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 139820 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub |
| 139821 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub0 |
| 139822 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub1 |
| 139823 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub2 |
| 139824 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub3 |
| 139825 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 139826 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 139827 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 139828 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 139829 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 139830 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 139831 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 139832 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 139833 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 139834 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 139835 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 139836 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 139837 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 139838 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 139839 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 139840 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 139841 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 139842 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 139843 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 139844 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 139845 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 139846 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139847 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139848 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 139849 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 139850 | 10, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 139851 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 139852 | 44, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139853 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 139854 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 139855 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 139856 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 139857 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 139858 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 139859 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 139860 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 139861 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 139862 | 8, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 139863 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 139864 | 40, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 139865 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 139866 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 139867 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 139868 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 139869 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 139870 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 139871 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 139872 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 139873 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 139874 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 139875 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 139876 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 139877 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 139878 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 139879 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 139880 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 139881 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 139882 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 139883 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 139884 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 139885 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 139886 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 139887 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 139888 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 139889 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 139890 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 139891 | 76, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 139892 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 139893 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 139894 | 79, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 139895 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 139896 | 114, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 139897 | 140, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 139898 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 139899 | 133, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 139900 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 139901 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 139902 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 139903 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 139904 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 139905 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 139906 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 139907 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 139908 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 139909 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 139910 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 139911 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 139912 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 139913 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 139914 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 139915 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 139916 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 139917 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 139918 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 139919 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 139920 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 139921 | }, |
| 139922 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 139923 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 139924 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:bsub_hi |
| 139925 | 56, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 139926 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0 |
| 139927 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 139928 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 139929 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3 |
| 139930 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_hi |
| 139931 | 8, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 139932 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:hsub_hi |
| 139933 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub |
| 139934 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub0 |
| 139935 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub1 |
| 139936 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0 |
| 139937 | 94, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 139938 | 94, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 139939 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub3 |
| 139940 | 40, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 139941 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:ssub_hi |
| 139942 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32 |
| 139943 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_hi |
| 139944 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sube32 |
| 139945 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sube64 |
| 139946 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo32 |
| 139947 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64 |
| 139948 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_0 |
| 139949 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1 |
| 139950 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2 |
| 139951 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3 |
| 139952 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4 |
| 139953 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5 |
| 139954 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6 |
| 139955 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7 |
| 139956 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubb |
| 139957 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd0 |
| 139958 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1 |
| 139959 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh0 |
| 139960 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1 |
| 139961 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubq0 |
| 139962 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubq1 |
| 139963 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs0 |
| 139964 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1 |
| 139965 | 92, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub -> FPR128 |
| 139966 | 93, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0 -> ZPR |
| 139967 | 97, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1 -> ZPR_4b |
| 139968 | 97, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 139969 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub3 |
| 139970 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_hi |
| 139971 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 139972 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 139973 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 139974 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 139975 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 139976 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 139977 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 139978 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 139979 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 139980 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 139981 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 139982 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 139983 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 139984 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 139985 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 139986 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 139987 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 139988 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 139989 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 139990 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 139991 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 139992 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 139993 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 139994 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 139995 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 139996 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 139997 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 139998 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 139999 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 140000 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 140001 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 140002 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 140003 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 140004 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 140005 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 140006 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 140007 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 140008 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 140009 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140010 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 140011 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 140012 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 140013 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 140014 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 140015 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 140016 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 140017 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 140018 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 140019 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 140020 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 140021 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 140022 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 140023 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 140024 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 140025 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 140026 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 140027 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 140028 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 140029 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 140030 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 140031 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 140032 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 140033 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 140034 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 140035 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 140036 | 79, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140037 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 140038 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 140039 | 77, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 140040 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 140041 | 115, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 140042 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 140043 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 140044 | 140, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140045 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 140046 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 140047 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 140048 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 140049 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 140050 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 140051 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 140052 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140053 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140054 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140055 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 140056 | 132, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 140057 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 140058 | 216, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 140059 | 137, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 140060 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 140061 | 141, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 140062 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 140063 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 140064 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 140065 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 140066 | }, |
| 140067 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 140068 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 140069 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:bsub_hi |
| 140070 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 140071 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub0 |
| 140072 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 140073 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 140074 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3 |
| 140075 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub_hi |
| 140076 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 140077 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:hsub_hi |
| 140078 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:psub |
| 140079 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:psub0 |
| 140080 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:psub1 |
| 140081 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub0 |
| 140082 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 140083 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 140084 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub3 |
| 140085 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140086 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:ssub_hi |
| 140087 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sub_32 |
| 140088 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sub_32_hi |
| 140089 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sube32 |
| 140090 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sube64 |
| 140091 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:subo32 |
| 140092 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:subo64 |
| 140093 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_0 |
| 140094 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_1 |
| 140095 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_2 |
| 140096 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_3 |
| 140097 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_4 |
| 140098 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_5 |
| 140099 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_6 |
| 140100 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_7 |
| 140101 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubb |
| 140102 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubd0 |
| 140103 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubd1 |
| 140104 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh0 |
| 140105 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1 |
| 140106 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubq0 |
| 140107 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubq1 |
| 140108 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs0 |
| 140109 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1 |
| 140110 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub -> FPR128_lo |
| 140111 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub0 -> ZPR_4b |
| 140112 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 140113 | 93, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub2 -> ZPR |
| 140114 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub3 |
| 140115 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub_hi |
| 140116 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 140117 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 140118 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 140119 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 140120 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 140121 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 140122 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 140123 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 140124 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 140125 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 140126 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 140127 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 140128 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 140129 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 140130 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 140131 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 140132 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 140133 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 140134 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 140135 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 140136 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140137 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140138 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 140139 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 140140 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 140141 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 140142 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140143 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 140144 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_bsub |
| 140145 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 140146 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_hsub |
| 140147 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 140148 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_ssub |
| 140149 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 140150 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 140151 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 140152 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 140153 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 140154 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 140155 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 140156 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 140157 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 140158 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 140159 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 140160 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 140161 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 140162 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 140163 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 140164 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 140165 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 140166 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 140167 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 140168 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 140169 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 140170 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 140171 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 140172 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 140173 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 140174 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 140175 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 140176 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 140177 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 140178 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 140179 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 140180 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 140181 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 140182 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 140183 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub2_dsub3 |
| 140184 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140185 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 140186 | 114, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 140187 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 140188 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 140189 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 140190 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 140191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:qsub2_qsub3 |
| 140192 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 140193 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 140194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 140195 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 140196 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 140197 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140198 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140199 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140200 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 140201 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140202 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 140203 | 217, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 140204 | 141, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 140205 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 140206 | 139, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo |
| 140207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 140208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 140209 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 140210 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 140211 | }, |
| 140212 | { // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 140213 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 140214 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 140215 | 65, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64_lo |
| 140216 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 140217 | 65, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 140218 | 65, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 140219 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3 |
| 140220 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 140221 | 10, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 140222 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 140223 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub |
| 140224 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub0 |
| 140225 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub1 |
| 140226 | 94, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128_lo |
| 140227 | 94, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 140228 | 94, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 140229 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub3 |
| 140230 | 44, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140231 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 140232 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 140233 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 140234 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sube32 |
| 140235 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sube64 |
| 140236 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo32 |
| 140237 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64 |
| 140238 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 140239 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 140240 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 140241 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 140242 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 140243 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 140244 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 140245 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 140246 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubb |
| 140247 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 140248 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 140249 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 140250 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 140251 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 140252 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 140253 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 140254 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 140255 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub |
| 140256 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 140257 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 140258 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 140259 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 140260 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 140261 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 140262 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 140263 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 140264 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 140265 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 140266 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 140267 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 140268 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 140269 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 140270 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 140271 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 140272 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 140273 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 140274 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 140275 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 140276 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 140277 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 140278 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 140279 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 140280 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 140281 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140282 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140283 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 140284 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 140285 | 10, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 140286 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 140287 | 44, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140288 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 140289 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 140290 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 140291 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 140292 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 140293 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 140294 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 140295 | 7, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 140296 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 140297 | 10, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 140298 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 140299 | 44, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140300 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 140301 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 140302 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 140303 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 140304 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 140305 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 140306 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 140307 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 140308 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 140309 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 140310 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 140311 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 140312 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 140313 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 140314 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 140315 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 140316 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 140317 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 140318 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 140319 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 140320 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 140321 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 140322 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 140323 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 140324 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 140325 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 140326 | 79, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140327 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 140328 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 140329 | 79, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140330 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 140331 | 116, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 140332 | 140, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140333 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 140334 | 140, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140335 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 140336 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 140337 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 140338 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 140339 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 140340 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 140341 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 140342 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140343 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140344 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140345 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 140346 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 140347 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 140348 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 140349 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 140350 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 140351 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 140352 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 140353 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 140354 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 140355 | 0, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 140356 | }, |
| 140357 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 140358 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 140359 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:bsub_hi |
| 140360 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub -> FPR64_lo |
| 140361 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0 |
| 140362 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 140363 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 140364 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3 |
| 140365 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_hi |
| 140366 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 140367 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:hsub_hi |
| 140368 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub |
| 140369 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub0 |
| 140370 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub1 |
| 140371 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0 |
| 140372 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 140373 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 140374 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub3 |
| 140375 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140376 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:ssub_hi |
| 140377 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32 |
| 140378 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_hi |
| 140379 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sube32 |
| 140380 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sube64 |
| 140381 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo32 |
| 140382 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64 |
| 140383 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_0 |
| 140384 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1 |
| 140385 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2 |
| 140386 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3 |
| 140387 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4 |
| 140388 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5 |
| 140389 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6 |
| 140390 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7 |
| 140391 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubb |
| 140392 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd0 |
| 140393 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1 |
| 140394 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh0 |
| 140395 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1 |
| 140396 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubq0 |
| 140397 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubq1 |
| 140398 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs0 |
| 140399 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1 |
| 140400 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub -> FPR128_lo |
| 140401 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0 -> ZPR_4b |
| 140402 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1 -> ZPR_4b |
| 140403 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 140404 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub3 |
| 140405 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_hi |
| 140406 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 140407 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 140408 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 140409 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 140410 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 140411 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 140412 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 140413 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 140414 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 140415 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 140416 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 140417 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 140418 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 140419 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 140420 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 140421 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 140422 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 140423 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 140424 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 140425 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 140426 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140427 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140428 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 140429 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 140430 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 140431 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 140432 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140433 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 140434 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub |
| 140435 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 140436 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub |
| 140437 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 140438 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub |
| 140439 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 140440 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 140441 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 140442 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 140443 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 140444 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140445 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 140446 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 140447 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 140448 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 140449 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 140450 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 140451 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 140452 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 140453 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 140454 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 140455 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 140456 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 140457 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 140458 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 140459 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 140460 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 140461 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 140462 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 140463 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 140464 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 140465 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 140466 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 140467 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 140468 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 140469 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 140470 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 140471 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140472 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 140473 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub2_dsub3 |
| 140474 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140475 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 140476 | 116, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 140477 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 140478 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 140479 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140480 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 140481 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:qsub2_qsub3 |
| 140482 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 140483 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 140484 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 140485 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 140486 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 140487 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140488 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140489 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140490 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 140491 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140492 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 140493 | 220, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 140494 | 141, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 140495 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 140496 | 141, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 140497 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 140498 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 140499 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 140500 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 140501 | }, |
| 140502 | { // QQQ_with_qsub0_in_FPR128_0to7 |
| 140503 | 7, // QQQ_with_qsub0_in_FPR128_0to7:bsub -> FPR8 |
| 140504 | 0, // QQQ_with_qsub0_in_FPR128_0to7:bsub_hi |
| 140505 | 65, // QQQ_with_qsub0_in_FPR128_0to7:dsub -> FPR64_lo |
| 140506 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub0 |
| 140507 | 65, // QQQ_with_qsub0_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 140508 | 65, // QQQ_with_qsub0_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 140509 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3 |
| 140510 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub_hi |
| 140511 | 10, // QQQ_with_qsub0_in_FPR128_0to7:hsub -> FPR16_lo |
| 140512 | 0, // QQQ_with_qsub0_in_FPR128_0to7:hsub_hi |
| 140513 | 0, // QQQ_with_qsub0_in_FPR128_0to7:psub |
| 140514 | 0, // QQQ_with_qsub0_in_FPR128_0to7:psub0 |
| 140515 | 0, // QQQ_with_qsub0_in_FPR128_0to7:psub1 |
| 140516 | 98, // QQQ_with_qsub0_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 140517 | 94, // QQQ_with_qsub0_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 140518 | 94, // QQQ_with_qsub0_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 140519 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub3 |
| 140520 | 44, // QQQ_with_qsub0_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140521 | 0, // QQQ_with_qsub0_in_FPR128_0to7:ssub_hi |
| 140522 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sub_32 |
| 140523 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sub_32_hi |
| 140524 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sube32 |
| 140525 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sube64 |
| 140526 | 0, // QQQ_with_qsub0_in_FPR128_0to7:subo32 |
| 140527 | 0, // QQQ_with_qsub0_in_FPR128_0to7:subo64 |
| 140528 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_0 |
| 140529 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_1 |
| 140530 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_2 |
| 140531 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_3 |
| 140532 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_4 |
| 140533 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_5 |
| 140534 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_6 |
| 140535 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_7 |
| 140536 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubb |
| 140537 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubd0 |
| 140538 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubd1 |
| 140539 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh0 |
| 140540 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1 |
| 140541 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubq0 |
| 140542 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubq1 |
| 140543 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs0 |
| 140544 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1 |
| 140545 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub |
| 140546 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub0 |
| 140547 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub1 |
| 140548 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub2 |
| 140549 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub3 |
| 140550 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub_hi |
| 140551 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 140552 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 140553 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 140554 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 140555 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 140556 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 140557 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 140558 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 140559 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 140560 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 140561 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 140562 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 140563 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 140564 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 140565 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 140566 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 140567 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 140568 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 140569 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 140570 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 140571 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140572 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140573 | 7, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 140574 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub_hi |
| 140575 | 10, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 140576 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub_hi |
| 140577 | 44, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140578 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub_hi |
| 140579 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub |
| 140580 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub_hi |
| 140581 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub |
| 140582 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub_hi |
| 140583 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub |
| 140584 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub_hi |
| 140585 | 7, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 140586 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub_hi |
| 140587 | 10, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 140588 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub_hi |
| 140589 | 44, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140590 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub_hi |
| 140591 | 0, // QQQ_with_qsub0_in_FPR128_0to7:psub1_then_psub |
| 140592 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub1_then_dsub_hi |
| 140593 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub3_then_dsub_hi |
| 140594 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub2_then_dsub_hi |
| 140595 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 140596 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 140597 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 140598 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 140599 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 140600 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 140601 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 140602 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 140603 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 140604 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 140605 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 140606 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 140607 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 140608 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 140609 | 0, // QQQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32 |
| 140610 | 0, // QQQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32_hi |
| 140611 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub1_then_zsub_hi |
| 140612 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub3_then_zsub_hi |
| 140613 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub2_then_zsub_hi |
| 140614 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1 |
| 140615 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 140616 | 79, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140617 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 140618 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub2_dsub3 |
| 140619 | 79, // QQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140620 | 0, // QQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 140621 | 116, // QQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 140622 | 146, // QQQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 140623 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 140624 | 140, // QQQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 140625 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 140626 | 0, // QQQ_with_qsub0_in_FPR128_0to7:qsub2_qsub3 |
| 140627 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 140628 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 140629 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 140630 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 140631 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 140632 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140633 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140634 | 0, // QQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140635 | 0, // QQQ_with_qsub0_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 140636 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1 |
| 140637 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 140638 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 140639 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1 |
| 140640 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 140641 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2 |
| 140642 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 140643 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub2_zsub3 |
| 140644 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub2 |
| 140645 | 0, // QQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub3 |
| 140646 | }, |
| 140647 | { // QQQ_with_qsub1_in_FPR128_0to7 |
| 140648 | 7, // QQQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 140649 | 0, // QQQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 140650 | 56, // QQQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 140651 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 140652 | 65, // QQQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 140653 | 65, // QQQ_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 140654 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3 |
| 140655 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 140656 | 8, // QQQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 140657 | 0, // QQQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 140658 | 0, // QQQ_with_qsub1_in_FPR128_0to7:psub |
| 140659 | 0, // QQQ_with_qsub1_in_FPR128_0to7:psub0 |
| 140660 | 0, // QQQ_with_qsub1_in_FPR128_0to7:psub1 |
| 140661 | 92, // QQQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128 |
| 140662 | 98, // QQQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 140663 | 94, // QQQ_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 140664 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub3 |
| 140665 | 40, // QQQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 140666 | 0, // QQQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 140667 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 140668 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 140669 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sube32 |
| 140670 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sube64 |
| 140671 | 0, // QQQ_with_qsub1_in_FPR128_0to7:subo32 |
| 140672 | 0, // QQQ_with_qsub1_in_FPR128_0to7:subo64 |
| 140673 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 140674 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 140675 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 140676 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 140677 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 140678 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 140679 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 140680 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 140681 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubb |
| 140682 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 140683 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 140684 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 140685 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 140686 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 140687 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 140688 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 140689 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 140690 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub |
| 140691 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 140692 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 140693 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 140694 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 140695 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 140696 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 140697 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 140698 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 140699 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 140700 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 140701 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 140702 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 140703 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 140704 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 140705 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 140706 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 140707 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 140708 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 140709 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 140710 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 140711 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 140712 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 140713 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 140714 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 140715 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 140716 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140717 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140718 | 7, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 140719 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 140720 | 10, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 140721 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 140722 | 44, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140723 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 140724 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 140725 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 140726 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 140727 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 140728 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 140729 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 140730 | 7, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 140731 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 140732 | 10, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 140733 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 140734 | 44, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140735 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 140736 | 0, // QQQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 140737 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 140738 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 140739 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 140740 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 140741 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 140742 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 140743 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 140744 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 140745 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 140746 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 140747 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 140748 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 140749 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 140750 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 140751 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 140752 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 140753 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 140754 | 0, // QQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 140755 | 0, // QQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 140756 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 140757 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 140758 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 140759 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 140760 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 140761 | 79, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 140762 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 140763 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 140764 | 77, // QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 140765 | 0, // QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 140766 | 115, // QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 140767 | 147, // QQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 140768 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 140769 | 146, // QQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 140770 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 140771 | 0, // QQQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 140772 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 140773 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 140774 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 140775 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 140776 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 140777 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140778 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140779 | 0, // QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140780 | 0, // QQQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 140781 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 140782 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 140783 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 140784 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 140785 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 140786 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 140787 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 140788 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 140789 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 140790 | 0, // QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 140791 | }, |
| 140792 | { // QQQ_with_qsub2_in_FPR128_0to7 |
| 140793 | 7, // QQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 140794 | 0, // QQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 140795 | 56, // QQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 140796 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 140797 | 56, // QQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64 |
| 140798 | 65, // QQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 140799 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3 |
| 140800 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 140801 | 8, // QQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 140802 | 0, // QQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 140803 | 0, // QQQ_with_qsub2_in_FPR128_0to7:psub |
| 140804 | 0, // QQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 140805 | 0, // QQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 140806 | 92, // QQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128 |
| 140807 | 92, // QQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128 |
| 140808 | 98, // QQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 140809 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub3 |
| 140810 | 40, // QQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 140811 | 0, // QQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 140812 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 140813 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 140814 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 140815 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 140816 | 0, // QQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 140817 | 0, // QQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 140818 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 140819 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 140820 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 140821 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 140822 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 140823 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 140824 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 140825 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 140826 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 140827 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 140828 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 140829 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 140830 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 140831 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 140832 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 140833 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 140834 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 140835 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub |
| 140836 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 140837 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 140838 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 140839 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 140840 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 140841 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 140842 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 140843 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 140844 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 140845 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 140846 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 140847 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 140848 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 140849 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 140850 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 140851 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 140852 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 140853 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 140854 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 140855 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 140856 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 140857 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 140858 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 140859 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 140860 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 140861 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 140862 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 140863 | 7, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 140864 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 140865 | 8, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 140866 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 140867 | 40, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 140868 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 140869 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 140870 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 140871 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 140872 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 140873 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 140874 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 140875 | 7, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 140876 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 140877 | 10, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 140878 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 140879 | 44, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 140880 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 140881 | 0, // QQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 140882 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 140883 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 140884 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 140885 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 140886 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 140887 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 140888 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 140889 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 140890 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 140891 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 140892 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 140893 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 140894 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 140895 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 140896 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 140897 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 140898 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 140899 | 0, // QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 140900 | 0, // QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 140901 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 140902 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 140903 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 140904 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 140905 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 140906 | 77, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 140907 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 140908 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 140909 | 75, // QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD |
| 140910 | 0, // QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 140911 | 113, // QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 140912 | 128, // QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ |
| 140913 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 140914 | 147, // QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 140915 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 140916 | 0, // QQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 140917 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 140918 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 140919 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 140920 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 140921 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 140922 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 140923 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 140924 | 0, // QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 140925 | 0, // QQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 140926 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 140927 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 140928 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 140929 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 140930 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 140931 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 140932 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 140933 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 140934 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 140935 | 0, // QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 140936 | }, |
| 140937 | { // ZPR3_with_qsub1_in_FPR128_0to7 |
| 140938 | 7, // ZPR3_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 140939 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:bsub_hi |
| 140940 | 56, // ZPR3_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 140941 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub0 |
| 140942 | 65, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 140943 | 65, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 140944 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3 |
| 140945 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub_hi |
| 140946 | 8, // ZPR3_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 140947 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:hsub_hi |
| 140948 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:psub |
| 140949 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:psub0 |
| 140950 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:psub1 |
| 140951 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub0 |
| 140952 | 98, // ZPR3_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 140953 | 94, // ZPR3_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 140954 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub3 |
| 140955 | 40, // ZPR3_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 140956 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:ssub_hi |
| 140957 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sub_32 |
| 140958 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 140959 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sube32 |
| 140960 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sube64 |
| 140961 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:subo32 |
| 140962 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:subo64 |
| 140963 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 140964 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 140965 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 140966 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 140967 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 140968 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 140969 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 140970 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 140971 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubb |
| 140972 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubd0 |
| 140973 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubd1 |
| 140974 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh0 |
| 140975 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1 |
| 140976 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubq0 |
| 140977 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubq1 |
| 140978 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs0 |
| 140979 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1 |
| 140980 | 92, // ZPR3_with_qsub1_in_FPR128_0to7:zsub -> FPR128 |
| 140981 | 93, // ZPR3_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR |
| 140982 | 102, // ZPR3_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 140983 | 97, // ZPR3_with_qsub1_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 140984 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub3 |
| 140985 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub_hi |
| 140986 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 140987 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 140988 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 140989 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 140990 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 140991 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 140992 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 140993 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 140994 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 140995 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 140996 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 140997 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 140998 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 140999 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 141000 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 141001 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 141002 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 141003 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 141004 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 141005 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 141006 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141007 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141008 | 7, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 141009 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 141010 | 10, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 141011 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 141012 | 44, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 141013 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 141014 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 141015 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 141016 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 141017 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 141018 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 141019 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 141020 | 7, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 141021 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 141022 | 10, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 141023 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 141024 | 44, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 141025 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 141026 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 141027 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 141028 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 141029 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 141030 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 141031 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 141032 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 141033 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 141034 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 141035 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 141036 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 141037 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 141038 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 141039 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 141040 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 141041 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 141042 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 141043 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 141044 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 141045 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 141046 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 141047 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 141048 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 141049 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 141050 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 141051 | 79, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 141052 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 141053 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 141054 | 77, // ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 141055 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 141056 | 115, // ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 141057 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 141058 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 141059 | 146, // ZPR3_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 141060 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 141061 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 141062 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 141063 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 141064 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 141065 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 141066 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 141067 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141068 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141069 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141070 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 141071 | 147, // ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 141072 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 141073 | 223, // ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 141074 | 154, // ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 141075 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 141076 | 161, // ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 141077 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 141078 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 141079 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 141080 | 0, // ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 141081 | }, |
| 141082 | { // ZPR3_with_qsub2_in_FPR128_0to7 |
| 141083 | 7, // ZPR3_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 141084 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:bsub_hi |
| 141085 | 56, // ZPR3_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 141086 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub0 |
| 141087 | 56, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64 |
| 141088 | 65, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 141089 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3 |
| 141090 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub_hi |
| 141091 | 8, // ZPR3_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 141092 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:hsub_hi |
| 141093 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:psub |
| 141094 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:psub0 |
| 141095 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:psub1 |
| 141096 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub0 |
| 141097 | 92, // ZPR3_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128 |
| 141098 | 98, // ZPR3_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 141099 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub3 |
| 141100 | 40, // ZPR3_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 141101 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:ssub_hi |
| 141102 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sub_32 |
| 141103 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 141104 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sube32 |
| 141105 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sube64 |
| 141106 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:subo32 |
| 141107 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:subo64 |
| 141108 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 141109 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 141110 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 141111 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 141112 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 141113 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 141114 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 141115 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 141116 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubb |
| 141117 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubd0 |
| 141118 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubd1 |
| 141119 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh0 |
| 141120 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1 |
| 141121 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubq0 |
| 141122 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubq1 |
| 141123 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs0 |
| 141124 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1 |
| 141125 | 92, // ZPR3_with_qsub2_in_FPR128_0to7:zsub -> FPR128 |
| 141126 | 93, // ZPR3_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR |
| 141127 | 93, // ZPR3_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR |
| 141128 | 102, // ZPR3_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 141129 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub3 |
| 141130 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub_hi |
| 141131 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 141132 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 141133 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 141134 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 141135 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 141136 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 141137 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 141138 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 141139 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 141140 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 141141 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 141142 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 141143 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 141144 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 141145 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 141146 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 141147 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 141148 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 141149 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 141150 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 141151 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141152 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141153 | 7, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 141154 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 141155 | 8, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 141156 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 141157 | 40, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 141158 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 141159 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 141160 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 141161 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 141162 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 141163 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 141164 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 141165 | 7, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 141166 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 141167 | 10, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 141168 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 141169 | 44, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 141170 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 141171 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 141172 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 141173 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 141174 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 141175 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 141176 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 141177 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 141178 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 141179 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 141180 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 141181 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 141182 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 141183 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 141184 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 141185 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 141186 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 141187 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 141188 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 141189 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 141190 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 141191 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 141192 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 141193 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 141194 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 141195 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 141196 | 77, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 141197 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 141198 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 141199 | 75, // ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD |
| 141200 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 141201 | 113, // ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 141202 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 141203 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 141204 | 147, // ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 141205 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 141206 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 141207 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 141208 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 141209 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 141210 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 141211 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 141212 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141213 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141214 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141215 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 141216 | 128, // ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ |
| 141217 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 141218 | 224, // ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 141219 | 129, // ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2 |
| 141220 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 141221 | 154, // ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 141222 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 141223 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 141224 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 141225 | 0, // ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 141226 | }, |
| 141227 | { // ZPR3_with_zsub0_in_ZPRMul4 |
| 141228 | 7, // ZPR3_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 141229 | 0, // ZPR3_with_zsub0_in_ZPRMul4:bsub_hi |
| 141230 | 56, // ZPR3_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 141231 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub0 |
| 141232 | 56, // ZPR3_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 141233 | 56, // ZPR3_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 141234 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3 |
| 141235 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub_hi |
| 141236 | 8, // ZPR3_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 141237 | 0, // ZPR3_with_zsub0_in_ZPRMul4:hsub_hi |
| 141238 | 0, // ZPR3_with_zsub0_in_ZPRMul4:psub |
| 141239 | 0, // ZPR3_with_zsub0_in_ZPRMul4:psub0 |
| 141240 | 0, // ZPR3_with_zsub0_in_ZPRMul4:psub1 |
| 141241 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub0 |
| 141242 | 92, // ZPR3_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 141243 | 92, // ZPR3_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 141244 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub3 |
| 141245 | 40, // ZPR3_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 141246 | 0, // ZPR3_with_zsub0_in_ZPRMul4:ssub_hi |
| 141247 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sub_32 |
| 141248 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sub_32_hi |
| 141249 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sube32 |
| 141250 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sube64 |
| 141251 | 0, // ZPR3_with_zsub0_in_ZPRMul4:subo32 |
| 141252 | 0, // ZPR3_with_zsub0_in_ZPRMul4:subo64 |
| 141253 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_0 |
| 141254 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_1 |
| 141255 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_2 |
| 141256 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_3 |
| 141257 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_4 |
| 141258 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_5 |
| 141259 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_6 |
| 141260 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_7 |
| 141261 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubb |
| 141262 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubd0 |
| 141263 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubd1 |
| 141264 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh0 |
| 141265 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1 |
| 141266 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubq0 |
| 141267 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubq1 |
| 141268 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs0 |
| 141269 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1 |
| 141270 | 92, // ZPR3_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 141271 | 101, // ZPR3_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 141272 | 93, // ZPR3_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 141273 | 96, // ZPR3_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2 |
| 141274 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub3 |
| 141275 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub_hi |
| 141276 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 141277 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 141278 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 141279 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 141280 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 141281 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 141282 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 141283 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 141284 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 141285 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 141286 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 141287 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 141288 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 141289 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 141290 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 141291 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 141292 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 141293 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 141294 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 141295 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 141296 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141297 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141298 | 7, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 141299 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 141300 | 8, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 141301 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 141302 | 40, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 141303 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 141304 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 141305 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 141306 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 141307 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 141308 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 141309 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 141310 | 7, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 141311 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 141312 | 8, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 141313 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 141314 | 40, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 141315 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 141316 | 0, // ZPR3_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 141317 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 141318 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 141319 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 141320 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 141321 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 141322 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 141323 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 141324 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 141325 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 141326 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 141327 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 141328 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 141329 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 141330 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 141331 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 141332 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 141333 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 141334 | 0, // ZPR3_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 141335 | 0, // ZPR3_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 141336 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 141337 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 141338 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 141339 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 141340 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 141341 | 75, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 141342 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 141343 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 141344 | 75, // ZPR3_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 141345 | 0, // ZPR3_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 141346 | 110, // ZPR3_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 141347 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 141348 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 141349 | 128, // ZPR3_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 141350 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 141351 | 0, // ZPR3_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 141352 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 141353 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 141354 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 141355 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 141356 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 141357 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141358 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141359 | 0, // ZPR3_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141360 | 0, // ZPR3_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 141361 | 128, // ZPR3_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 141362 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 141363 | 206, // ZPR3_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 141364 | 155, // ZPR3_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 141365 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 141366 | 138, // ZPR3_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 141367 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 141368 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 141369 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 141370 | 0, // ZPR3_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 141371 | }, |
| 141372 | { // ZPR3_with_zsub0_in_ZPR_K |
| 141373 | 7, // ZPR3_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 141374 | 0, // ZPR3_with_zsub0_in_ZPR_K:bsub_hi |
| 141375 | 56, // ZPR3_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 141376 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub0 |
| 141377 | 56, // ZPR3_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 141378 | 56, // ZPR3_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 141379 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3 |
| 141380 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub_hi |
| 141381 | 8, // ZPR3_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 141382 | 0, // ZPR3_with_zsub0_in_ZPR_K:hsub_hi |
| 141383 | 0, // ZPR3_with_zsub0_in_ZPR_K:psub |
| 141384 | 0, // ZPR3_with_zsub0_in_ZPR_K:psub0 |
| 141385 | 0, // ZPR3_with_zsub0_in_ZPR_K:psub1 |
| 141386 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub0 |
| 141387 | 92, // ZPR3_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 141388 | 92, // ZPR3_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 141389 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub3 |
| 141390 | 40, // ZPR3_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 141391 | 0, // ZPR3_with_zsub0_in_ZPR_K:ssub_hi |
| 141392 | 0, // ZPR3_with_zsub0_in_ZPR_K:sub_32 |
| 141393 | 0, // ZPR3_with_zsub0_in_ZPR_K:sub_32_hi |
| 141394 | 0, // ZPR3_with_zsub0_in_ZPR_K:sube32 |
| 141395 | 0, // ZPR3_with_zsub0_in_ZPR_K:sube64 |
| 141396 | 0, // ZPR3_with_zsub0_in_ZPR_K:subo32 |
| 141397 | 0, // ZPR3_with_zsub0_in_ZPR_K:subo64 |
| 141398 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_0 |
| 141399 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_1 |
| 141400 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_2 |
| 141401 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_3 |
| 141402 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_4 |
| 141403 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_5 |
| 141404 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_6 |
| 141405 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_7 |
| 141406 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubb |
| 141407 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubd0 |
| 141408 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubd1 |
| 141409 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh0 |
| 141410 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1 |
| 141411 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubq0 |
| 141412 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubq1 |
| 141413 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs0 |
| 141414 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1 |
| 141415 | 92, // ZPR3_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 141416 | 103, // ZPR3_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 141417 | 93, // ZPR3_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 141418 | 93, // ZPR3_with_zsub0_in_ZPR_K:zsub2 -> ZPR |
| 141419 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub3 |
| 141420 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub_hi |
| 141421 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 141422 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 141423 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 141424 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 141425 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 141426 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 141427 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 141428 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 141429 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 141430 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 141431 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 141432 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 141433 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 141434 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 141435 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 141436 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 141437 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 141438 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 141439 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 141440 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 141441 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141442 | 0, // ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141443 | 7, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 141444 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 141445 | 8, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 141446 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 141447 | 40, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 141448 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 141449 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 141450 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 141451 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 141452 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 141453 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 141454 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 141455 | 7, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 141456 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 141457 | 8, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 141458 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 141459 | 40, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 141460 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 141461 | 0, // ZPR3_with_zsub0_in_ZPR_K:psub1_then_psub |
| 141462 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 141463 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 141464 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 141465 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 141466 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 141467 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 141468 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 141469 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 141470 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 141471 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 141472 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 141473 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 141474 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 141475 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 141476 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 141477 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 141478 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 141479 | 0, // ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 141480 | 0, // ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 141481 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 141482 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 141483 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 141484 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 141485 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 141486 | 75, // ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 141487 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 141488 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 141489 | 75, // ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 141490 | 0, // ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 141491 | 110, // ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 141492 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 141493 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 141494 | 128, // ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 141495 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 141496 | 0, // ZPR3_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 141497 | 0, // ZPR3_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 141498 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 141499 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 141500 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 141501 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 141502 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141503 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141504 | 0, // ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141505 | 0, // ZPR3_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 141506 | 128, // ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 141507 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 141508 | 206, // ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 141509 | 156, // ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 141510 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 141511 | 129, // ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2 |
| 141512 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 141513 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 141514 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 141515 | 0, // ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 141516 | }, |
| 141517 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 141518 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub -> FPR8 |
| 141519 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub_hi |
| 141520 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub -> FPR64 |
| 141521 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0 |
| 141522 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1 -> FPR64 |
| 141523 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2 -> FPR64 |
| 141524 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3 |
| 141525 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_hi |
| 141526 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub -> FPR16 |
| 141527 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub_hi |
| 141528 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub |
| 141529 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub0 |
| 141530 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1 |
| 141531 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0 |
| 141532 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1 -> FPR128 |
| 141533 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2 -> FPR128 |
| 141534 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3 |
| 141535 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub -> FPR32 |
| 141536 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub_hi |
| 141537 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32 |
| 141538 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_hi |
| 141539 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube32 |
| 141540 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube64 |
| 141541 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo32 |
| 141542 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64 |
| 141543 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0 |
| 141544 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1 |
| 141545 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2 |
| 141546 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3 |
| 141547 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4 |
| 141548 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5 |
| 141549 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6 |
| 141550 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7 |
| 141551 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubb |
| 141552 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd0 |
| 141553 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1 |
| 141554 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh0 |
| 141555 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1 |
| 141556 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq0 |
| 141557 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq1 |
| 141558 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs0 |
| 141559 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1 |
| 141560 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub -> FPR128 |
| 141561 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0 -> ZPRMul2_Hi |
| 141562 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1 -> ZPR |
| 141563 | 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2 -> ZPRMul2 |
| 141564 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3 |
| 141565 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_hi |
| 141566 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq0 |
| 141567 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq1 |
| 141568 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd0 |
| 141569 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1 |
| 141570 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq0 |
| 141571 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq1 |
| 141572 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 141573 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 141574 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd0 |
| 141575 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1 |
| 141576 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq0 |
| 141577 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq1 |
| 141578 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs0 |
| 141579 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1 |
| 141580 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 141581 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 141582 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 141583 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 141584 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 141585 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 141586 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141587 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141588 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub -> FPR8 |
| 141589 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub_hi |
| 141590 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub -> FPR16 |
| 141591 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub_hi |
| 141592 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub -> FPR32 |
| 141593 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub_hi |
| 141594 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub |
| 141595 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub_hi |
| 141596 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub |
| 141597 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub_hi |
| 141598 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub |
| 141599 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub_hi |
| 141600 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub -> FPR8 |
| 141601 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub_hi |
| 141602 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub -> FPR16 |
| 141603 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub_hi |
| 141604 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub -> FPR32 |
| 141605 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub_hi |
| 141606 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1_then_psub |
| 141607 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_then_dsub_hi |
| 141608 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3_then_dsub_hi |
| 141609 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_then_dsub_hi |
| 141610 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32 |
| 141611 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32_hi |
| 141612 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32 |
| 141613 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_hi |
| 141614 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32 |
| 141615 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32_hi |
| 141616 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32 |
| 141617 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_hi |
| 141618 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32 |
| 141619 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32_hi |
| 141620 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32 |
| 141621 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_hi |
| 141622 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32 |
| 141623 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32_hi |
| 141624 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32 |
| 141625 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32_hi |
| 141626 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_then_zsub_hi |
| 141627 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3_then_zsub_hi |
| 141628 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_then_zsub_hi |
| 141629 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1 |
| 141630 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1_dsub2 |
| 141631 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2 -> DD |
| 141632 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2_dsub3 |
| 141633 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_dsub3 |
| 141634 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1 -> DD |
| 141635 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 141636 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 141637 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1 |
| 141638 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1_qsub2 |
| 141639 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2 -> QQ |
| 141640 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2_qsub3 |
| 141641 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_qsub3 |
| 141642 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 141643 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0_x8sub_1 |
| 141644 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_x8sub_3 |
| 141645 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_x8sub_5 |
| 141646 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_x8sub_7 |
| 141647 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141648 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141649 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141650 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_subo64_then_sub_32 |
| 141651 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1 -> QQ |
| 141652 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 141653 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 141654 | 148, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 141655 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1_zsub2 |
| 141656 | 138, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 141657 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2_zsub3 |
| 141658 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_zsub3 |
| 141659 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub2 |
| 141660 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub3 |
| 141661 | }, |
| 141662 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 141663 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:bsub -> FPR8 |
| 141664 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:bsub_hi |
| 141665 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub -> FPR64_lo |
| 141666 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0 |
| 141667 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1 -> FPR64_lo |
| 141668 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2 -> FPR64 |
| 141669 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3 |
| 141670 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_hi |
| 141671 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:hsub -> FPR16_lo |
| 141672 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:hsub_hi |
| 141673 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub |
| 141674 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub0 |
| 141675 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub1 |
| 141676 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0 |
| 141677 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1 -> FPR128_lo |
| 141678 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2 -> FPR128 |
| 141679 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub3 |
| 141680 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 141681 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:ssub_hi |
| 141682 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32 |
| 141683 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_hi |
| 141684 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sube32 |
| 141685 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sube64 |
| 141686 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo32 |
| 141687 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64 |
| 141688 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_0 |
| 141689 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1 |
| 141690 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2 |
| 141691 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3 |
| 141692 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4 |
| 141693 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5 |
| 141694 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6 |
| 141695 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7 |
| 141696 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubb |
| 141697 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd0 |
| 141698 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1 |
| 141699 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh0 |
| 141700 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1 |
| 141701 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubq0 |
| 141702 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubq1 |
| 141703 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs0 |
| 141704 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1 |
| 141705 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub -> FPR128_lo |
| 141706 | 100, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0 -> ZPRMul2_Lo |
| 141707 | 97, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1 -> ZPR_4b |
| 141708 | 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2 -> ZPRMul2 |
| 141709 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub3 |
| 141710 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_hi |
| 141711 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1_then_zasubq0 |
| 141712 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1_then_zasubq1 |
| 141713 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd0 |
| 141714 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1 |
| 141715 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubq0 |
| 141716 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubq1 |
| 141717 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 141718 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 141719 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd0 |
| 141720 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1 |
| 141721 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubq0 |
| 141722 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubq1 |
| 141723 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs0 |
| 141724 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1 |
| 141725 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 141726 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 141727 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 141728 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 141729 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 141730 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 141731 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141732 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141733 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_bsub -> FPR8 |
| 141734 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_bsub_hi |
| 141735 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 141736 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_hsub_hi |
| 141737 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 141738 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_ssub_hi |
| 141739 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_bsub |
| 141740 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_bsub_hi |
| 141741 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_hsub |
| 141742 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_hsub_hi |
| 141743 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_ssub |
| 141744 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_ssub_hi |
| 141745 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_bsub -> FPR8 |
| 141746 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_bsub_hi |
| 141747 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_hsub -> FPR16 |
| 141748 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_hsub_hi |
| 141749 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_ssub -> FPR32 |
| 141750 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_ssub_hi |
| 141751 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub1_then_psub |
| 141752 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_then_dsub_hi |
| 141753 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub3_then_dsub_hi |
| 141754 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2_then_dsub_hi |
| 141755 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7_then_sub_32 |
| 141756 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7_then_sub_32_hi |
| 141757 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32 |
| 141758 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32_hi |
| 141759 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5_then_sub_32 |
| 141760 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5_then_sub_32_hi |
| 141761 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32 |
| 141762 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32_hi |
| 141763 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3_then_sub_32 |
| 141764 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3_then_sub_32_hi |
| 141765 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32 |
| 141766 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32_hi |
| 141767 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1_then_sub_32 |
| 141768 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1_then_sub_32_hi |
| 141769 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64_then_sub_32 |
| 141770 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64_then_sub_32_hi |
| 141771 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_then_zsub_hi |
| 141772 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub3_then_zsub_hi |
| 141773 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2_then_zsub_hi |
| 141774 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0_dsub1 |
| 141775 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0_dsub1_dsub2 |
| 141776 | 76, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 141777 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_dsub2_dsub3 |
| 141778 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_dsub3 |
| 141779 | 79, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 141780 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 141781 | 114, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 141782 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0_qsub1 |
| 141783 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0_qsub1_qsub2 |
| 141784 | 133, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 141785 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_qsub2_qsub3 |
| 141786 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2_qsub3 |
| 141787 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 141788 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_0_x8sub_1 |
| 141789 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_x8sub_3 |
| 141790 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_x8sub_5 |
| 141791 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_x8sub_7 |
| 141792 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141793 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141794 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141795 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_subo64_then_sub_32 |
| 141796 | 140, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 141797 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 141798 | 217, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 141799 | 149, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 141800 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub1_zsub2 |
| 141801 | 162, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 141802 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub2_zsub3 |
| 141803 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2_zsub3 |
| 141804 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub2 |
| 141805 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub3 |
| 141806 | }, |
| 141807 | { // ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 141808 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 141809 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 141810 | 56, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 141811 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 141812 | 56, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 141813 | 56, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 141814 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 141815 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 141816 | 8, // ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 141817 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 141818 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:psub |
| 141819 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 141820 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 141821 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 141822 | 92, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 141823 | 92, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 141824 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 141825 | 40, // ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 141826 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 141827 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 141828 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 141829 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 141830 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 141831 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 141832 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 141833 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 141834 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 141835 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 141836 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 141837 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 141838 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 141839 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 141840 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 141841 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 141842 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 141843 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 141844 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 141845 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 141846 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 141847 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 141848 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 141849 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 141850 | 92, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 141851 | 93, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 141852 | 99, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 141853 | 93, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 141854 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 141855 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 141856 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 141857 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 141858 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 141859 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 141860 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 141861 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 141862 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 141863 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 141864 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 141865 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 141866 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 141867 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 141868 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 141869 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 141870 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 141871 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 141872 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 141873 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 141874 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 141875 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 141876 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 141877 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 141878 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 141879 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 141880 | 8, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 141881 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 141882 | 40, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 141883 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 141884 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 141885 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 141886 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 141887 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 141888 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 141889 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 141890 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 141891 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 141892 | 8, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 141893 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 141894 | 40, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 141895 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 141896 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 141897 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 141898 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 141899 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 141900 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 141901 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 141902 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 141903 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 141904 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 141905 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 141906 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 141907 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 141908 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 141909 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 141910 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 141911 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 141912 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 141913 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 141914 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 141915 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 141916 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 141917 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 141918 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 141919 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 141920 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 141921 | 75, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 141922 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 141923 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 141924 | 75, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 141925 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 141926 | 110, // ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 141927 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 141928 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 141929 | 128, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 141930 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 141931 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 141932 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 141933 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 141934 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 141935 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 141936 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 141937 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 141938 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 141939 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 141940 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 141941 | 128, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 141942 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 141943 | 206, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 141944 | 157, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 141945 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 141946 | 148, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 141947 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 141948 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 141949 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 141950 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 141951 | }, |
| 141952 | { // ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 141953 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 141954 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 141955 | 56, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64 |
| 141956 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 141957 | 65, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 141958 | 65, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 141959 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3 |
| 141960 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 141961 | 8, // ZPR3_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16 |
| 141962 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 141963 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:psub |
| 141964 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 141965 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 141966 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 141967 | 94, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 141968 | 94, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 141969 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub3 |
| 141970 | 40, // ZPR3_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32 |
| 141971 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 141972 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 141973 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 141974 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 141975 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 141976 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 141977 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 141978 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 141979 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 141980 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 141981 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 141982 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 141983 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 141984 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 141985 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 141986 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 141987 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 141988 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 141989 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 141990 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 141991 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 141992 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 141993 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 141994 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 141995 | 92, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128 |
| 141996 | 93, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR |
| 141997 | 100, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 141998 | 97, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 141999 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub3 |
| 142000 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 142001 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 142002 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 142003 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 142004 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 142005 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 142006 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 142007 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 142008 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 142009 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 142010 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 142011 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 142012 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 142013 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 142014 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 142015 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 142016 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 142017 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 142018 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 142019 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 142020 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 142021 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142022 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142023 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 142024 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 142025 | 10, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 142026 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 142027 | 44, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 142028 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 142029 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub |
| 142030 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 142031 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub |
| 142032 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 142033 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub |
| 142034 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 142035 | 7, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 142036 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 142037 | 10, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 142038 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 142039 | 44, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 142040 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 142041 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 142042 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 142043 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 142044 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 142045 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 142046 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 142047 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 142048 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 142049 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 142050 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 142051 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 142052 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 142053 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 142054 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 142055 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 142056 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 142057 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 142058 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 142059 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 142060 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 142061 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 142062 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 142063 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 142064 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 142065 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 142066 | 79, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 142067 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 142068 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 |
| 142069 | 77, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 142070 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 142071 | 115, // ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 142072 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 142073 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 142074 | 140, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 142075 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 142076 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 |
| 142077 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 142078 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 142079 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 142080 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 142081 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 142082 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142083 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142084 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142085 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 142086 | 132, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 142087 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 142088 | 216, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 142089 | 158, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 142090 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 142091 | 149, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 142092 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 142093 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 |
| 142094 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 142095 | 0, // ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 142096 | }, |
| 142097 | { // ZPR3_with_zsub1_in_ZPRMul4 |
| 142098 | 7, // ZPR3_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 142099 | 0, // ZPR3_with_zsub1_in_ZPRMul4:bsub_hi |
| 142100 | 56, // ZPR3_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 142101 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub0 |
| 142102 | 56, // ZPR3_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 142103 | 56, // ZPR3_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 142104 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3 |
| 142105 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub_hi |
| 142106 | 8, // ZPR3_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 142107 | 0, // ZPR3_with_zsub1_in_ZPRMul4:hsub_hi |
| 142108 | 0, // ZPR3_with_zsub1_in_ZPRMul4:psub |
| 142109 | 0, // ZPR3_with_zsub1_in_ZPRMul4:psub0 |
| 142110 | 0, // ZPR3_with_zsub1_in_ZPRMul4:psub1 |
| 142111 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub0 |
| 142112 | 92, // ZPR3_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 142113 | 92, // ZPR3_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 142114 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub3 |
| 142115 | 40, // ZPR3_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 142116 | 0, // ZPR3_with_zsub1_in_ZPRMul4:ssub_hi |
| 142117 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sub_32 |
| 142118 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sub_32_hi |
| 142119 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sube32 |
| 142120 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sube64 |
| 142121 | 0, // ZPR3_with_zsub1_in_ZPRMul4:subo32 |
| 142122 | 0, // ZPR3_with_zsub1_in_ZPRMul4:subo64 |
| 142123 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_0 |
| 142124 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_1 |
| 142125 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_2 |
| 142126 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_3 |
| 142127 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_4 |
| 142128 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_5 |
| 142129 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_6 |
| 142130 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_7 |
| 142131 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubb |
| 142132 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubd0 |
| 142133 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubd1 |
| 142134 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh0 |
| 142135 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1 |
| 142136 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubq0 |
| 142137 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubq1 |
| 142138 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs0 |
| 142139 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1 |
| 142140 | 92, // ZPR3_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 142141 | 93, // ZPR3_with_zsub1_in_ZPRMul4:zsub0 -> ZPR |
| 142142 | 101, // ZPR3_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 142143 | 93, // ZPR3_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 142144 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub3 |
| 142145 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub_hi |
| 142146 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 142147 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 142148 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 142149 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 142150 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 142151 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 142152 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 142153 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 142154 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 142155 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 142156 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 142157 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 142158 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 142159 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 142160 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 142161 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 142162 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 142163 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 142164 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 142165 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 142166 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142167 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142168 | 7, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 142169 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 142170 | 8, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 142171 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 142172 | 40, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 142173 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 142174 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 142175 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 142176 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 142177 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 142178 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 142179 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 142180 | 7, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 142181 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 142182 | 8, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 142183 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 142184 | 40, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 142185 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 142186 | 0, // ZPR3_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 142187 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 142188 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 142189 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 142190 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 142191 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 142192 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 142193 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 142194 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 142195 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 142196 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 142197 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 142198 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 142199 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 142200 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 142201 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 142202 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 142203 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 142204 | 0, // ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 142205 | 0, // ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 142206 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 142207 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 142208 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 142209 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 142210 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 142211 | 75, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 142212 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 142213 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 142214 | 75, // ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 142215 | 0, // ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 142216 | 110, // ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 142217 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 142218 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 142219 | 128, // ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 142220 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 142221 | 0, // ZPR3_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 142222 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 142223 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 142224 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 142225 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 142226 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 142227 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142228 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142229 | 0, // ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142230 | 0, // ZPR3_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 142231 | 128, // ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 142232 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 142233 | 206, // ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 142234 | 159, // ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 142235 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 142236 | 155, // ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 142237 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 142238 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 142239 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 142240 | 0, // ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 142241 | }, |
| 142242 | { // ZPR3_with_zsub1_in_ZPR_K |
| 142243 | 7, // ZPR3_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 142244 | 0, // ZPR3_with_zsub1_in_ZPR_K:bsub_hi |
| 142245 | 56, // ZPR3_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 142246 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub0 |
| 142247 | 56, // ZPR3_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 142248 | 56, // ZPR3_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 142249 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3 |
| 142250 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub_hi |
| 142251 | 8, // ZPR3_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 142252 | 0, // ZPR3_with_zsub1_in_ZPR_K:hsub_hi |
| 142253 | 0, // ZPR3_with_zsub1_in_ZPR_K:psub |
| 142254 | 0, // ZPR3_with_zsub1_in_ZPR_K:psub0 |
| 142255 | 0, // ZPR3_with_zsub1_in_ZPR_K:psub1 |
| 142256 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub0 |
| 142257 | 92, // ZPR3_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 142258 | 92, // ZPR3_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 142259 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub3 |
| 142260 | 40, // ZPR3_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 142261 | 0, // ZPR3_with_zsub1_in_ZPR_K:ssub_hi |
| 142262 | 0, // ZPR3_with_zsub1_in_ZPR_K:sub_32 |
| 142263 | 0, // ZPR3_with_zsub1_in_ZPR_K:sub_32_hi |
| 142264 | 0, // ZPR3_with_zsub1_in_ZPR_K:sube32 |
| 142265 | 0, // ZPR3_with_zsub1_in_ZPR_K:sube64 |
| 142266 | 0, // ZPR3_with_zsub1_in_ZPR_K:subo32 |
| 142267 | 0, // ZPR3_with_zsub1_in_ZPR_K:subo64 |
| 142268 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_0 |
| 142269 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_1 |
| 142270 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_2 |
| 142271 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_3 |
| 142272 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_4 |
| 142273 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_5 |
| 142274 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_6 |
| 142275 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_7 |
| 142276 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubb |
| 142277 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubd0 |
| 142278 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubd1 |
| 142279 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh0 |
| 142280 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1 |
| 142281 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubq0 |
| 142282 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubq1 |
| 142283 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs0 |
| 142284 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1 |
| 142285 | 92, // ZPR3_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 142286 | 93, // ZPR3_with_zsub1_in_ZPR_K:zsub0 -> ZPR |
| 142287 | 103, // ZPR3_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 142288 | 93, // ZPR3_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 142289 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub3 |
| 142290 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub_hi |
| 142291 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 142292 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 142293 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 142294 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 142295 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 142296 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 142297 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 142298 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 142299 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 142300 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 142301 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 142302 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 142303 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 142304 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 142305 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 142306 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 142307 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 142308 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 142309 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 142310 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 142311 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142312 | 0, // ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142313 | 7, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 142314 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 142315 | 8, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 142316 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 142317 | 40, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 142318 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 142319 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_bsub |
| 142320 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 142321 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_hsub |
| 142322 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 142323 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_ssub |
| 142324 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 142325 | 7, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 142326 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 142327 | 8, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 142328 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 142329 | 40, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 142330 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 142331 | 0, // ZPR3_with_zsub1_in_ZPR_K:psub1_then_psub |
| 142332 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 142333 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 142334 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 142335 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 142336 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 142337 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 142338 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 142339 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 142340 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 142341 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 142342 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 142343 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 142344 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 142345 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 142346 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 142347 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 142348 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 142349 | 0, // ZPR3_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 142350 | 0, // ZPR3_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 142351 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 142352 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 142353 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 142354 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 142355 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 142356 | 75, // ZPR3_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 142357 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 |
| 142358 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub2_dsub3 |
| 142359 | 75, // ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 142360 | 0, // ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 142361 | 110, // ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 142362 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 142363 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 142364 | 128, // ZPR3_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 142365 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 |
| 142366 | 0, // ZPR3_with_zsub1_in_ZPR_K:qsub2_qsub3 |
| 142367 | 0, // ZPR3_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 142368 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 142369 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 142370 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 142371 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 142372 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142373 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142374 | 0, // ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142375 | 0, // ZPR3_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 142376 | 128, // ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 142377 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 142378 | 206, // ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 142379 | 160, // ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 142380 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 |
| 142381 | 156, // ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K |
| 142382 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 |
| 142383 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub2_zsub3 |
| 142384 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 142385 | 0, // ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 142386 | }, |
| 142387 | { // ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 142388 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 142389 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 142390 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64 |
| 142391 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 142392 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 142393 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 142394 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3 |
| 142395 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 142396 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16 |
| 142397 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 142398 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:psub |
| 142399 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 142400 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 142401 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 142402 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 142403 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 142404 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3 |
| 142405 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32 |
| 142406 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 142407 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 142408 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 142409 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 142410 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 142411 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 142412 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 142413 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 142414 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 142415 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 142416 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 142417 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 142418 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 142419 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 142420 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 142421 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 142422 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 142423 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 142424 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 142425 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 142426 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 142427 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 142428 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 142429 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 142430 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128 |
| 142431 | 96, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2 |
| 142432 | 93, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 142433 | 99, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 142434 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3 |
| 142435 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 142436 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 142437 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 142438 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 142439 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 142440 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 142441 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 142442 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 142443 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 142444 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 142445 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 142446 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 142447 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 142448 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 142449 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 142450 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 142451 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 142452 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 142453 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 142454 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 142455 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 142456 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142457 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142458 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 142459 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 142460 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 142461 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 142462 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 142463 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 142464 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub |
| 142465 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 142466 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub |
| 142467 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 142468 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub |
| 142469 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 142470 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 142471 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 142472 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 142473 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 142474 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 142475 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 142476 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 142477 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 142478 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 142479 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 142480 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 142481 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 142482 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 142483 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 142484 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 142485 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 142486 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 142487 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 142488 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 142489 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 142490 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 142491 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 142492 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 142493 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 142494 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 142495 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 142496 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 142497 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 142498 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 142499 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 142500 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 142501 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 142502 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 142503 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 |
| 142504 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 142505 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 142506 | 110, // ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 142507 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 142508 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 142509 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 142510 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 142511 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 |
| 142512 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 142513 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 142514 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 142515 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 142516 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 142517 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142518 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142519 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142520 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 142521 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 142522 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 142523 | 206, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 142524 | 134, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2 |
| 142525 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 142526 | 157, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 142527 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 142528 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 |
| 142529 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 142530 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 142531 | }, |
| 142532 | { // ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 142533 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo:bsub -> FPR8 |
| 142534 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:bsub_hi |
| 142535 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub -> FPR64 |
| 142536 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0 |
| 142537 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1 -> FPR64 |
| 142538 | 65, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 142539 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3 |
| 142540 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_hi |
| 142541 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Lo:hsub -> FPR16 |
| 142542 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:hsub_hi |
| 142543 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:psub |
| 142544 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:psub0 |
| 142545 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:psub1 |
| 142546 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0 |
| 142547 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1 -> FPR128 |
| 142548 | 94, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 142549 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub3 |
| 142550 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Lo:ssub -> FPR32 |
| 142551 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:ssub_hi |
| 142552 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32 |
| 142553 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_hi |
| 142554 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sube32 |
| 142555 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sube64 |
| 142556 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:subo32 |
| 142557 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64 |
| 142558 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_0 |
| 142559 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1 |
| 142560 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2 |
| 142561 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3 |
| 142562 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4 |
| 142563 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5 |
| 142564 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6 |
| 142565 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7 |
| 142566 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubb |
| 142567 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd0 |
| 142568 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1 |
| 142569 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh0 |
| 142570 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1 |
| 142571 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubq0 |
| 142572 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubq1 |
| 142573 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs0 |
| 142574 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1 |
| 142575 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub -> FPR128 |
| 142576 | 96, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0 -> ZPRMul2 |
| 142577 | 93, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1 -> ZPR |
| 142578 | 100, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 142579 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub3 |
| 142580 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_hi |
| 142581 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 142582 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 142583 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 142584 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 142585 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 142586 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 142587 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 142588 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 142589 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 142590 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 142591 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 142592 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 142593 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 142594 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 142595 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 142596 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 142597 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 142598 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 142599 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 142600 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 142601 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142602 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142603 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 142604 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 142605 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16 |
| 142606 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 142607 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32 |
| 142608 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 142609 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub |
| 142610 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 142611 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub |
| 142612 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 142613 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub |
| 142614 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 142615 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 142616 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 142617 | 10, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 142618 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 142619 | 44, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 142620 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 142621 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:psub1_then_psub |
| 142622 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 142623 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 142624 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 142625 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 142626 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 142627 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 142628 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 142629 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 142630 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 142631 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 142632 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 142633 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 142634 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 142635 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 142636 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 142637 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 142638 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 142639 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 142640 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 142641 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 142642 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 142643 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 142644 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1 |
| 142645 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 142646 | 77, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 142647 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 142648 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_dsub3 |
| 142649 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1 -> DD |
| 142650 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 142651 | 113, // ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 142652 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1 |
| 142653 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 142654 | 132, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 142655 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 142656 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2_qsub3 |
| 142657 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 142658 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 142659 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 142660 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 142661 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 142662 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142663 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142664 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142665 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 142666 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1 -> QQ |
| 142667 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 142668 | 209, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 142669 | 134, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2Mul2 |
| 142670 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 142671 | 158, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 142672 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 142673 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2_zsub3 |
| 142674 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub2 |
| 142675 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub3 |
| 142676 | }, |
| 142677 | { // ZPR3_with_zsub2_in_ZPRMul4 |
| 142678 | 7, // ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 142679 | 0, // ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 142680 | 56, // ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64 |
| 142681 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 142682 | 56, // ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64 |
| 142683 | 56, // ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 142684 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3 |
| 142685 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 142686 | 8, // ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16 |
| 142687 | 0, // ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 142688 | 0, // ZPR3_with_zsub2_in_ZPRMul4:psub |
| 142689 | 0, // ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 142690 | 0, // ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 142691 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 142692 | 92, // ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128 |
| 142693 | 92, // ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 142694 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub3 |
| 142695 | 40, // ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32 |
| 142696 | 0, // ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 142697 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 142698 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 142699 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 142700 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 142701 | 0, // ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 142702 | 0, // ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 142703 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 142704 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 142705 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 142706 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 142707 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 142708 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 142709 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 142710 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 142711 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 142712 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 142713 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 142714 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 142715 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 142716 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 142717 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 142718 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 142719 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 142720 | 92, // ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128 |
| 142721 | 96, // ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2 |
| 142722 | 93, // ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPR |
| 142723 | 101, // ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 142724 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub3 |
| 142725 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 142726 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 142727 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 142728 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 142729 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 142730 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 142731 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 142732 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 142733 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 142734 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 142735 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 142736 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 142737 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 142738 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 142739 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 142740 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 142741 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 142742 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 142743 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 142744 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 142745 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 142746 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142747 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142748 | 7, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 142749 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 142750 | 8, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 142751 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 142752 | 40, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 142753 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 142754 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub |
| 142755 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 142756 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub |
| 142757 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 142758 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub |
| 142759 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 142760 | 7, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 142761 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 142762 | 8, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 142763 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 142764 | 40, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 142765 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 142766 | 0, // ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 142767 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 142768 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 142769 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 142770 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 142771 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 142772 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 142773 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 142774 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 142775 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 142776 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 142777 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 142778 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 142779 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 142780 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 142781 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 142782 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 142783 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 142784 | 0, // ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 142785 | 0, // ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 142786 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 142787 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 142788 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 142789 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 142790 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 142791 | 75, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD |
| 142792 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 142793 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 |
| 142794 | 75, // ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD |
| 142795 | 0, // ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 142796 | 110, // ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 142797 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 142798 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 142799 | 128, // ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 142800 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 142801 | 0, // ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 |
| 142802 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 142803 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 142804 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 142805 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 142806 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 142807 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142808 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142809 | 0, // ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142810 | 0, // ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 142811 | 128, // ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ |
| 142812 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 142813 | 206, // ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 142814 | 134, // ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 142815 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 142816 | 159, // ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 142817 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 142818 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 |
| 142819 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 142820 | 0, // ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 142821 | }, |
| 142822 | { // ZPR3_with_zsub2_in_ZPR_K |
| 142823 | 7, // ZPR3_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 142824 | 0, // ZPR3_with_zsub2_in_ZPR_K:bsub_hi |
| 142825 | 56, // ZPR3_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 142826 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub0 |
| 142827 | 56, // ZPR3_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 142828 | 56, // ZPR3_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 142829 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3 |
| 142830 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub_hi |
| 142831 | 8, // ZPR3_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 142832 | 0, // ZPR3_with_zsub2_in_ZPR_K:hsub_hi |
| 142833 | 0, // ZPR3_with_zsub2_in_ZPR_K:psub |
| 142834 | 0, // ZPR3_with_zsub2_in_ZPR_K:psub0 |
| 142835 | 0, // ZPR3_with_zsub2_in_ZPR_K:psub1 |
| 142836 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub0 |
| 142837 | 92, // ZPR3_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 142838 | 92, // ZPR3_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 142839 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub3 |
| 142840 | 40, // ZPR3_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 142841 | 0, // ZPR3_with_zsub2_in_ZPR_K:ssub_hi |
| 142842 | 0, // ZPR3_with_zsub2_in_ZPR_K:sub_32 |
| 142843 | 0, // ZPR3_with_zsub2_in_ZPR_K:sub_32_hi |
| 142844 | 0, // ZPR3_with_zsub2_in_ZPR_K:sube32 |
| 142845 | 0, // ZPR3_with_zsub2_in_ZPR_K:sube64 |
| 142846 | 0, // ZPR3_with_zsub2_in_ZPR_K:subo32 |
| 142847 | 0, // ZPR3_with_zsub2_in_ZPR_K:subo64 |
| 142848 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_0 |
| 142849 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_1 |
| 142850 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_2 |
| 142851 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_3 |
| 142852 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_4 |
| 142853 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_5 |
| 142854 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_6 |
| 142855 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_7 |
| 142856 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubb |
| 142857 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubd0 |
| 142858 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubd1 |
| 142859 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh0 |
| 142860 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1 |
| 142861 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubq0 |
| 142862 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubq1 |
| 142863 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs0 |
| 142864 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1 |
| 142865 | 92, // ZPR3_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 142866 | 93, // ZPR3_with_zsub2_in_ZPR_K:zsub0 -> ZPR |
| 142867 | 93, // ZPR3_with_zsub2_in_ZPR_K:zsub1 -> ZPR |
| 142868 | 103, // ZPR3_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 142869 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub3 |
| 142870 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub_hi |
| 142871 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 142872 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 142873 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 142874 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 142875 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 142876 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 142877 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 142878 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 142879 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 142880 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 142881 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 142882 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 142883 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 142884 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 142885 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 142886 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 142887 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 142888 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 142889 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 142890 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 142891 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 142892 | 0, // ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 142893 | 7, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 142894 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 142895 | 8, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 142896 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 142897 | 40, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 142898 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 142899 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub |
| 142900 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 142901 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub |
| 142902 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 142903 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub |
| 142904 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 142905 | 7, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 142906 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 142907 | 8, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 142908 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 142909 | 40, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 142910 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 142911 | 0, // ZPR3_with_zsub2_in_ZPR_K:psub1_then_psub |
| 142912 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 142913 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 142914 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 142915 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 142916 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 142917 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 142918 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 142919 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 142920 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 142921 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 142922 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 142923 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 142924 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 142925 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 142926 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 142927 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 142928 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 142929 | 0, // ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 142930 | 0, // ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 142931 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 142932 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 142933 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 142934 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 142935 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 142936 | 75, // ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 142937 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 |
| 142938 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub2_dsub3 |
| 142939 | 75, // ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 142940 | 0, // ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 142941 | 110, // ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 142942 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 142943 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 142944 | 128, // ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 142945 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 |
| 142946 | 0, // ZPR3_with_zsub2_in_ZPR_K:qsub2_qsub3 |
| 142947 | 0, // ZPR3_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 142948 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 142949 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 142950 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 142951 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 142952 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 142953 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 142954 | 0, // ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 142955 | 0, // ZPR3_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 142956 | 128, // ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 142957 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 142958 | 206, // ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 142959 | 129, // ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2 |
| 142960 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 |
| 142961 | 160, // ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_K |
| 142962 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 |
| 142963 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub2_zsub3 |
| 142964 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 142965 | 0, // ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 142966 | }, |
| 142967 | { // ZPR3_with_zsub_in_FPR128_0to7 |
| 142968 | 7, // ZPR3_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 142969 | 0, // ZPR3_with_zsub_in_FPR128_0to7:bsub_hi |
| 142970 | 65, // ZPR3_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 142971 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub0 |
| 142972 | 65, // ZPR3_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 142973 | 65, // ZPR3_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 142974 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3 |
| 142975 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub_hi |
| 142976 | 10, // ZPR3_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 142977 | 0, // ZPR3_with_zsub_in_FPR128_0to7:hsub_hi |
| 142978 | 0, // ZPR3_with_zsub_in_FPR128_0to7:psub |
| 142979 | 0, // ZPR3_with_zsub_in_FPR128_0to7:psub0 |
| 142980 | 0, // ZPR3_with_zsub_in_FPR128_0to7:psub1 |
| 142981 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub0 |
| 142982 | 94, // ZPR3_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 142983 | 94, // ZPR3_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 142984 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub3 |
| 142985 | 44, // ZPR3_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 142986 | 0, // ZPR3_with_zsub_in_FPR128_0to7:ssub_hi |
| 142987 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sub_32 |
| 142988 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sub_32_hi |
| 142989 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sube32 |
| 142990 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sube64 |
| 142991 | 0, // ZPR3_with_zsub_in_FPR128_0to7:subo32 |
| 142992 | 0, // ZPR3_with_zsub_in_FPR128_0to7:subo64 |
| 142993 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_0 |
| 142994 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_1 |
| 142995 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_2 |
| 142996 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_3 |
| 142997 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_4 |
| 142998 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_5 |
| 142999 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_6 |
| 143000 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_7 |
| 143001 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubb |
| 143002 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubd0 |
| 143003 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubd1 |
| 143004 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh0 |
| 143005 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1 |
| 143006 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubq0 |
| 143007 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubq1 |
| 143008 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs0 |
| 143009 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1 |
| 143010 | 98, // ZPR3_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 143011 | 102, // ZPR3_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 143012 | 97, // ZPR3_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_4b |
| 143013 | 97, // ZPR3_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 143014 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub3 |
| 143015 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub_hi |
| 143016 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 143017 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 143018 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 143019 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 143020 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 143021 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 143022 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 143023 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 143024 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 143025 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 143026 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 143027 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 143028 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 143029 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 143030 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 143031 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 143032 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 143033 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 143034 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 143035 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 143036 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143037 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143038 | 7, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 143039 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 143040 | 10, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 143041 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 143042 | 44, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143043 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 143044 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 143045 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 143046 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 143047 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 143048 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 143049 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 143050 | 7, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 143051 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 143052 | 10, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 143053 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 143054 | 44, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143055 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 143056 | 0, // ZPR3_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 143057 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 143058 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 143059 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 143060 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 143061 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 143062 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 143063 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 143064 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 143065 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 143066 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 143067 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 143068 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 143069 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 143070 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 143071 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 143072 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 143073 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 143074 | 0, // ZPR3_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 143075 | 0, // ZPR3_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 143076 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 143077 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 143078 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 143079 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 143080 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 143081 | 79, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143082 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 143083 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 143084 | 79, // ZPR3_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143085 | 0, // ZPR3_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 143086 | 116, // ZPR3_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 143087 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 143088 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 143089 | 140, // ZPR3_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 143090 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 143091 | 0, // ZPR3_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 143092 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 143093 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 143094 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 143095 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 143096 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 143097 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143098 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143099 | 0, // ZPR3_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143100 | 0, // ZPR3_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 143101 | 146, // ZPR3_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 143102 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 143103 | 222, // ZPR3_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 143104 | 161, // ZPR3_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 143105 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 143106 | 141, // ZPR3_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 143107 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 143108 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 143109 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 143110 | 0, // ZPR3_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 143111 | }, |
| 143112 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 143113 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 143114 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:bsub_hi |
| 143115 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 143116 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0 |
| 143117 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 143118 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 143119 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3 |
| 143120 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_hi |
| 143121 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 143122 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:hsub_hi |
| 143123 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:psub |
| 143124 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:psub0 |
| 143125 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:psub1 |
| 143126 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0 |
| 143127 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 143128 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 143129 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3 |
| 143130 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143131 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:ssub_hi |
| 143132 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32 |
| 143133 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_hi |
| 143134 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sube32 |
| 143135 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sube64 |
| 143136 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:subo32 |
| 143137 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:subo64 |
| 143138 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0 |
| 143139 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1 |
| 143140 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2 |
| 143141 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3 |
| 143142 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4 |
| 143143 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5 |
| 143144 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6 |
| 143145 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7 |
| 143146 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubb |
| 143147 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd0 |
| 143148 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1 |
| 143149 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh0 |
| 143150 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1 |
| 143151 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq0 |
| 143152 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq1 |
| 143153 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs0 |
| 143154 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1 |
| 143155 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub -> FPR128_lo |
| 143156 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_4b |
| 143157 | 96, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 143158 | 93, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 143159 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3 |
| 143160 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_hi |
| 143161 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 143162 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 143163 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 143164 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 143165 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 143166 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 143167 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 143168 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 143169 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 143170 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 143171 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 143172 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 143173 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 143174 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 143175 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 143176 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 143177 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 143178 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 143179 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 143180 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 143181 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143182 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143183 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 143184 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 143185 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 143186 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 143187 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 143188 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 143189 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 143190 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 143191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 143192 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 143193 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 143194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 143195 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 143196 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 143197 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 143198 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 143199 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 143200 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 143201 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 143202 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 143203 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 143204 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 143205 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 143206 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 143207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 143208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 143209 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 143210 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 143211 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 143212 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 143213 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 143214 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 143215 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 143216 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 143217 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 143218 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 143219 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 143220 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 143221 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 143222 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 143223 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 143224 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 143225 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 143226 | 75, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 143227 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 143228 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 143229 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 143230 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 143231 | 111, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 143232 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 143233 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 143234 | 128, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 143235 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 143236 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 143237 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 143238 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 143239 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 143240 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 143241 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 143242 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143243 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143244 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143245 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 143246 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 143247 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 143248 | 210, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 143249 | 162, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 143250 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 143251 | 134, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 143252 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 143253 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 143254 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 143255 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 143256 | }, |
| 143257 | { // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 143258 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 143259 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 143260 | 56, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 143261 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 143262 | 65, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 143263 | 65, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 143264 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3 |
| 143265 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 143266 | 8, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 143267 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 143268 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:psub |
| 143269 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 143270 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 143271 | 92, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128 |
| 143272 | 98, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 143273 | 98, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 143274 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub3 |
| 143275 | 40, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 143276 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 143277 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 143278 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 143279 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 143280 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 143281 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 143282 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 143283 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 143284 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 143285 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 143286 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 143287 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 143288 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 143289 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 143290 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 143291 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 143292 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 143293 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 143294 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 143295 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 143296 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 143297 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 143298 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 143299 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 143300 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub |
| 143301 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 143302 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 143303 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 143304 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 143305 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 143306 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 143307 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 143308 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 143309 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 143310 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 143311 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 143312 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 143313 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 143314 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 143315 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 143316 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 143317 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 143318 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 143319 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 143320 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 143321 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 143322 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 143323 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 143324 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 143325 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 143326 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143327 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143328 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 143329 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 143330 | 10, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 143331 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 143332 | 44, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143333 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 143334 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 143335 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 143336 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 143337 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 143338 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 143339 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 143340 | 7, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 143341 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 143342 | 10, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 143343 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 143344 | 44, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143345 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 143346 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 143347 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 143348 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 143349 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 143350 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 143351 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 143352 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 143353 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 143354 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 143355 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 143356 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 143357 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 143358 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 143359 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 143360 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 143361 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 143362 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 143363 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 143364 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 143365 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 143366 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 143367 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 143368 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 143369 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 143370 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 143371 | 79, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143372 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 143373 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 143374 | 77, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 143375 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 143376 | 115, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 143377 | 147, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 143378 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 143379 | 163, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 143380 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 143381 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 143382 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 143383 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 143384 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 143385 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 143386 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 143387 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143388 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143389 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143390 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 143391 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 143392 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 143393 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 143394 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 143395 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 143396 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 143397 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 143398 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 143399 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 143400 | 0, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 143401 | }, |
| 143402 | { // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 143403 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 143404 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 143405 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 143406 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 143407 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 143408 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 143409 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3 |
| 143410 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 143411 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 143412 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 143413 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:psub |
| 143414 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:psub0 |
| 143415 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:psub1 |
| 143416 | 98, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 143417 | 98, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 143418 | 94, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 143419 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub3 |
| 143420 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143421 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 143422 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 143423 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 143424 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sube32 |
| 143425 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sube64 |
| 143426 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:subo32 |
| 143427 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:subo64 |
| 143428 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 143429 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 143430 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 143431 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 143432 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 143433 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 143434 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 143435 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 143436 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubb |
| 143437 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 143438 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 143439 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 143440 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 143441 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 143442 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 143443 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 143444 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 143445 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub |
| 143446 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 143447 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 143448 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 143449 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 143450 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 143451 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 143452 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 143453 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 143454 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 143455 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 143456 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 143457 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 143458 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 143459 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 143460 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 143461 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 143462 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 143463 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 143464 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 143465 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 143466 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 143467 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 143468 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 143469 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 143470 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 143471 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143472 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143473 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 143474 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 143475 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 143476 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 143477 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143478 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 143479 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 143480 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 143481 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 143482 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 143483 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 143484 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 143485 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 143486 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 143487 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 143488 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 143489 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143490 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 143491 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 143492 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 143493 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 143494 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 143495 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 143496 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 143497 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 143498 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 143499 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 143500 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 143501 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 143502 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 143503 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 143504 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 143505 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 143506 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 143507 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 143508 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 143509 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 143510 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 143511 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 143512 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 143513 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 143514 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 143515 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 143516 | 79, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143517 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 143518 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 143519 | 79, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143520 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 143521 | 116, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 143522 | 163, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 143523 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 143524 | 146, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 143525 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 143526 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 143527 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 143528 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 143529 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 143530 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 143531 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 143532 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143533 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143534 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143535 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 143536 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 143537 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 143538 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 143539 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 143540 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 143541 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 143542 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 143543 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 143544 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 143545 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 143546 | }, |
| 143547 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 143548 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 143549 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:bsub_hi |
| 143550 | 56, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 143551 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0 |
| 143552 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 143553 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 143554 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3 |
| 143555 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_hi |
| 143556 | 8, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 143557 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:hsub_hi |
| 143558 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:psub |
| 143559 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:psub0 |
| 143560 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:psub1 |
| 143561 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0 |
| 143562 | 98, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 143563 | 98, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 143564 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub3 |
| 143565 | 40, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 143566 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:ssub_hi |
| 143567 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32 |
| 143568 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 143569 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sube32 |
| 143570 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sube64 |
| 143571 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:subo32 |
| 143572 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64 |
| 143573 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 143574 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 143575 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 143576 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 143577 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 143578 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 143579 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 143580 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 143581 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubb |
| 143582 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd0 |
| 143583 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1 |
| 143584 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh0 |
| 143585 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1 |
| 143586 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubq0 |
| 143587 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubq1 |
| 143588 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs0 |
| 143589 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1 |
| 143590 | 92, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub -> FPR128 |
| 143591 | 93, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR |
| 143592 | 102, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 143593 | 102, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 143594 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub3 |
| 143595 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_hi |
| 143596 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 143597 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 143598 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 143599 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 143600 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 143601 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 143602 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 143603 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 143604 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 143605 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 143606 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 143607 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 143608 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 143609 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 143610 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 143611 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 143612 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 143613 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 143614 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 143615 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 143616 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143617 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143618 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 143619 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 143620 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 143621 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 143622 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143623 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 143624 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 143625 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 143626 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 143627 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 143628 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 143629 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 143630 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 143631 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 143632 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 143633 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 143634 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143635 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 143636 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 143637 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 143638 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 143639 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 143640 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 143641 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 143642 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 143643 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 143644 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 143645 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 143646 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 143647 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 143648 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 143649 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 143650 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 143651 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 143652 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 143653 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 143654 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 143655 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 143656 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 143657 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 143658 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 143659 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 143660 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 143661 | 79, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143662 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 143663 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 143664 | 77, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 143665 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 143666 | 115, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 143667 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 143668 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 143669 | 163, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 143670 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 143671 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 143672 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 143673 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 143674 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 143675 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 143676 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 143677 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143678 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143679 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143680 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 143681 | 147, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 143682 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 143683 | 241, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 143684 | 154, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 143685 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 143686 | 164, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 143687 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 143688 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 143689 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 143690 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 143691 | }, |
| 143692 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 143693 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 143694 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 143695 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64 |
| 143696 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 143697 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 143698 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 143699 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3 |
| 143700 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 143701 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16 |
| 143702 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 143703 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub |
| 143704 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 143705 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 143706 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 143707 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 143708 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 143709 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3 |
| 143710 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32 |
| 143711 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 143712 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 143713 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 143714 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 143715 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 143716 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 143717 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 143718 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 143719 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 143720 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 143721 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 143722 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 143723 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 143724 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 143725 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 143726 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 143727 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 143728 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 143729 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 143730 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 143731 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 143732 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 143733 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 143734 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 143735 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128 |
| 143736 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 143737 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 143738 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 143739 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3 |
| 143740 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 143741 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 143742 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 143743 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 143744 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 143745 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 143746 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 143747 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 143748 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 143749 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 143750 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 143751 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 143752 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 143753 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 143754 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 143755 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 143756 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 143757 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 143758 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 143759 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 143760 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 143761 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143762 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143763 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 143764 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 143765 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 143766 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 143767 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 143768 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 143769 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub |
| 143770 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 143771 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub |
| 143772 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 143773 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub |
| 143774 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 143775 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 143776 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 143777 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 143778 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 143779 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 143780 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 143781 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 143782 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 143783 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 143784 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 143785 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 143786 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 143787 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 143788 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 143789 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 143790 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 143791 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 143792 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 143793 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 143794 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 143795 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 143796 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 143797 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 143798 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 143799 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 143800 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 143801 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 143802 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 143803 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 143804 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 143805 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 143806 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 143807 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 143808 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 |
| 143809 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 143810 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 143811 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 143812 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 143813 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 143814 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 143815 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 143816 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 |
| 143817 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 143818 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 143819 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 143820 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 143821 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 143822 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143823 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143824 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143825 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 143826 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 143827 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 143828 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 143829 | 148, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 143830 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 143831 | 157, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 143832 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 143833 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 |
| 143834 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 143835 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 143836 | }, |
| 143837 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 143838 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 143839 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:bsub_hi |
| 143840 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 143841 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub0 |
| 143842 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 143843 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 143844 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3 |
| 143845 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub_hi |
| 143846 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 143847 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:hsub_hi |
| 143848 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:psub |
| 143849 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:psub0 |
| 143850 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:psub1 |
| 143851 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub0 |
| 143852 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 143853 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 143854 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub3 |
| 143855 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143856 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:ssub_hi |
| 143857 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sub_32 |
| 143858 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 143859 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sube32 |
| 143860 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sube64 |
| 143861 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:subo32 |
| 143862 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:subo64 |
| 143863 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 143864 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 143865 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 143866 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 143867 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 143868 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 143869 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 143870 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 143871 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubb |
| 143872 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubd0 |
| 143873 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubd1 |
| 143874 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh0 |
| 143875 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1 |
| 143876 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubq0 |
| 143877 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubq1 |
| 143878 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs0 |
| 143879 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1 |
| 143880 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 143881 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 143882 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 143883 | 97, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 143884 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub3 |
| 143885 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub_hi |
| 143886 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 143887 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 143888 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 143889 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 143890 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 143891 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 143892 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 143893 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 143894 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 143895 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 143896 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 143897 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 143898 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 143899 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 143900 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 143901 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 143902 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 143903 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 143904 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 143905 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 143906 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 143907 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 143908 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 143909 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 143910 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 143911 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 143912 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143913 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 143914 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_bsub |
| 143915 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 143916 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_hsub |
| 143917 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 143918 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_ssub |
| 143919 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 143920 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 143921 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 143922 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 143923 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 143924 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 143925 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 143926 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 143927 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 143928 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 143929 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 143930 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 143931 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 143932 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 143933 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 143934 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 143935 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 143936 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 143937 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 143938 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 143939 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 143940 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 143941 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 143942 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 143943 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 143944 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 143945 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 143946 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 143947 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 143948 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 143949 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 143950 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 143951 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143952 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 143953 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub2_dsub3 |
| 143954 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 143955 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 143956 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 143957 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 143958 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 143959 | 146, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 143960 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 143961 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:qsub2_qsub3 |
| 143962 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 143963 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 143964 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 143965 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 143966 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 143967 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 143968 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 143969 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 143970 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 143971 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 143972 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 143973 | 242, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 143974 | 164, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 143975 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 143976 | 161, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 143977 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 143978 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 143979 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 143980 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 143981 | }, |
| 143982 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 143983 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 143984 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 143985 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 143986 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 143987 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 143988 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 143989 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3 |
| 143990 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 143991 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 143992 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 143993 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:psub |
| 143994 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 143995 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 143996 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 143997 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 143998 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 143999 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub3 |
| 144000 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144001 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 144002 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 144003 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 144004 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 144005 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 144006 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 144007 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 144008 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 144009 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 144010 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 144011 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 144012 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 144013 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 144014 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 144015 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 144016 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 144017 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 144018 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 144019 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 144020 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 144021 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 144022 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 144023 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 144024 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 144025 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 144026 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR_4b |
| 144027 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 144028 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 144029 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub3 |
| 144030 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 144031 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 144032 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 144033 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 144034 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 144035 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 144036 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 144037 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 144038 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 144039 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 144040 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 144041 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 144042 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 144043 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 144044 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 144045 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 144046 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 144047 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 144048 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 144049 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 144050 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 144051 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144052 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144053 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 144054 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 144055 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 144056 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 144057 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144058 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 144059 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub |
| 144060 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 144061 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub |
| 144062 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 144063 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub |
| 144064 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 144065 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 144066 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 144067 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 144068 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 144069 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144070 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 144071 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 144072 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 144073 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 144074 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 144075 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 144076 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 144077 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 144078 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 144079 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 144080 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 144081 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 144082 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 144083 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 144084 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 144085 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 144086 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 144087 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 144088 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 144089 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 144090 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 144091 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 144092 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 144093 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 144094 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 144095 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 144096 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144097 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 144098 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 |
| 144099 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144100 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 144101 | 116, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 144102 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 144103 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 144104 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 144105 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 144106 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 |
| 144107 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 144108 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 144109 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 144110 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 144111 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 144112 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144113 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144114 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144115 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 144116 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 144117 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 144118 | 220, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 144119 | 165, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 144120 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 144121 | 149, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 144122 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 144123 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 |
| 144124 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 144125 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 144126 | }, |
| 144127 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 144128 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:bsub -> FPR8 |
| 144129 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:bsub_hi |
| 144130 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 144131 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0 |
| 144132 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 144133 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 144134 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3 |
| 144135 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_hi |
| 144136 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 144137 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:hsub_hi |
| 144138 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:psub |
| 144139 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:psub0 |
| 144140 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:psub1 |
| 144141 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0 |
| 144142 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 144143 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 144144 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub3 |
| 144145 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144146 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:ssub_hi |
| 144147 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32 |
| 144148 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_hi |
| 144149 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sube32 |
| 144150 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sube64 |
| 144151 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:subo32 |
| 144152 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64 |
| 144153 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_0 |
| 144154 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1 |
| 144155 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2 |
| 144156 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3 |
| 144157 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4 |
| 144158 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5 |
| 144159 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6 |
| 144160 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7 |
| 144161 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubb |
| 144162 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd0 |
| 144163 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1 |
| 144164 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh0 |
| 144165 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1 |
| 144166 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubq0 |
| 144167 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubq1 |
| 144168 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs0 |
| 144169 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1 |
| 144170 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 144171 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_Lo |
| 144172 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1 -> ZPR_4b |
| 144173 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 144174 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub3 |
| 144175 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_hi |
| 144176 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 144177 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 144178 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 144179 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 144180 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 144181 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 144182 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 144183 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 144184 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 144185 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 144186 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 144187 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 144188 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 144189 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 144190 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 144191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 144192 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 144193 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 144194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 144195 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 144196 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144197 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144198 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 144199 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 144200 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 144201 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 144202 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144203 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 144204 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub |
| 144205 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 144206 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub |
| 144207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 144208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub |
| 144209 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 144210 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 144211 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 144212 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 144213 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 144214 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144215 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 144216 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:psub1_then_psub |
| 144217 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 144218 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 144219 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 144220 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 144221 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 144222 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 144223 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 144224 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 144225 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 144226 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 144227 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 144228 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 144229 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 144230 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 144231 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 144232 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 144233 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 144234 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 144235 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 144236 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 144237 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 144238 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 144239 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1 |
| 144240 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 144241 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144242 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 144243 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub2_dsub3 |
| 144244 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144245 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 144246 | 116, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 144247 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1 |
| 144248 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 144249 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 144250 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 144251 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:qsub2_qsub3 |
| 144252 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 144253 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 144254 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 144255 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 144256 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 144257 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144258 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144259 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144260 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 144261 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 144262 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 144263 | 220, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 144264 | 149, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 144265 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 144266 | 165, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 144267 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 144268 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub2_zsub3 |
| 144269 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub2 |
| 144270 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub3 |
| 144271 | }, |
| 144272 | { // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 144273 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 144274 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 144275 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64_lo |
| 144276 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 144277 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 144278 | 65, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 144279 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3 |
| 144280 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 144281 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16_lo |
| 144282 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 144283 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:psub |
| 144284 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 144285 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 144286 | 98, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 144287 | 98, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 144288 | 98, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 144289 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub3 |
| 144290 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144291 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 144292 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 144293 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 144294 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 144295 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 144296 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 144297 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 144298 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 144299 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 144300 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 144301 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 144302 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 144303 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 144304 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 144305 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 144306 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 144307 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 144308 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 144309 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 144310 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 144311 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 144312 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 144313 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 144314 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 144315 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub |
| 144316 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 144317 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 144318 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 144319 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 144320 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 144321 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 144322 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 144323 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 144324 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 144325 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 144326 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 144327 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 144328 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 144329 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 144330 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 144331 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 144332 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 144333 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 144334 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 144335 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 144336 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 144337 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 144338 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 144339 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 144340 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 144341 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144342 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144343 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 144344 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 144345 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 144346 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 144347 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144348 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 144349 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 144350 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 144351 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 144352 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 144353 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 144354 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 144355 | 7, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 144356 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 144357 | 10, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 144358 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 144359 | 44, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144360 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 144361 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 144362 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 144363 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 144364 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 144365 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 144366 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 144367 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 144368 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 144369 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 144370 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 144371 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 144372 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 144373 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 144374 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 144375 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 144376 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 144377 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 144378 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 144379 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 144380 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 144381 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 144382 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 144383 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 144384 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 144385 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 144386 | 79, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144387 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 144388 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 144389 | 79, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144390 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 144391 | 116, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 144392 | 163, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 144393 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 144394 | 163, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 144395 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 144396 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 144397 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 144398 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 144399 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 144400 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 144401 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 144402 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144403 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144404 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144405 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 144406 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 144407 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 144408 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 144409 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 144410 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 144411 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 144412 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 144413 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 144414 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 144415 | 0, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 144416 | }, |
| 144417 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 144418 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 144419 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:bsub_hi |
| 144420 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 144421 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub0 |
| 144422 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 144423 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 144424 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3 |
| 144425 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub_hi |
| 144426 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 144427 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:hsub_hi |
| 144428 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:psub |
| 144429 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:psub0 |
| 144430 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:psub1 |
| 144431 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub0 |
| 144432 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 144433 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 144434 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub3 |
| 144435 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 144436 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:ssub_hi |
| 144437 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sub_32 |
| 144438 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sub_32_hi |
| 144439 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sube32 |
| 144440 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sube64 |
| 144441 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:subo32 |
| 144442 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:subo64 |
| 144443 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_0 |
| 144444 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_1 |
| 144445 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_2 |
| 144446 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_3 |
| 144447 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_4 |
| 144448 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_5 |
| 144449 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_6 |
| 144450 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_7 |
| 144451 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubb |
| 144452 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubd0 |
| 144453 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubd1 |
| 144454 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh0 |
| 144455 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1 |
| 144456 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubq0 |
| 144457 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubq1 |
| 144458 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs0 |
| 144459 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1 |
| 144460 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 144461 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub0 -> ZPR_K |
| 144462 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 144463 | 93, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 144464 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub3 |
| 144465 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub_hi |
| 144466 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 144467 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 144468 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 144469 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 144470 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 144471 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 144472 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 144473 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 144474 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 144475 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 144476 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 144477 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 144478 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 144479 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 144480 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 144481 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 144482 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 144483 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 144484 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 144485 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 144486 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144487 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144488 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 144489 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 144490 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 144491 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 144492 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 144493 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 144494 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_bsub |
| 144495 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 144496 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_hsub |
| 144497 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 144498 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_ssub |
| 144499 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 144500 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 144501 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 144502 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 144503 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 144504 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 144505 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 144506 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:psub1_then_psub |
| 144507 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 144508 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 144509 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 144510 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 144511 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 144512 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 144513 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 144514 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 144515 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 144516 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 144517 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 144518 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 144519 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 144520 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 144521 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 144522 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 144523 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 144524 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 144525 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 144526 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 144527 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 144528 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 144529 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 144530 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 144531 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 144532 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 |
| 144533 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub2_dsub3 |
| 144534 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 144535 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 144536 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 144537 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 144538 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 144539 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 144540 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 |
| 144541 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:qsub2_qsub3 |
| 144542 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 144543 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 144544 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 144545 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 144546 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 144547 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144548 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144549 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144550 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 144551 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 144552 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 144553 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 144554 | 169, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 144555 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 |
| 144556 | 156, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K |
| 144557 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 |
| 144558 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub2_zsub3 |
| 144559 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 144560 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 144561 | }, |
| 144562 | { // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 144563 | 7, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 144564 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:bsub_hi |
| 144565 | 56, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 144566 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0 |
| 144567 | 56, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 144568 | 56, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 144569 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3 |
| 144570 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_hi |
| 144571 | 8, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 144572 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:hsub_hi |
| 144573 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub |
| 144574 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub0 |
| 144575 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub1 |
| 144576 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0 |
| 144577 | 92, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 144578 | 92, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 144579 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub3 |
| 144580 | 40, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 144581 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:ssub_hi |
| 144582 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32 |
| 144583 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_hi |
| 144584 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sube32 |
| 144585 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sube64 |
| 144586 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo32 |
| 144587 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64 |
| 144588 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_0 |
| 144589 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1 |
| 144590 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2 |
| 144591 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3 |
| 144592 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4 |
| 144593 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5 |
| 144594 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6 |
| 144595 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7 |
| 144596 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubb |
| 144597 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd0 |
| 144598 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1 |
| 144599 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh0 |
| 144600 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1 |
| 144601 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubq0 |
| 144602 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubq1 |
| 144603 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs0 |
| 144604 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1 |
| 144605 | 92, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 144606 | 93, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0 -> ZPR |
| 144607 | 103, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1 -> ZPR_K |
| 144608 | 103, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 144609 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub3 |
| 144610 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_hi |
| 144611 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 144612 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 144613 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 144614 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 144615 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 144616 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 144617 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 144618 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 144619 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 144620 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 144621 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 144622 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 144623 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 144624 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 144625 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 144626 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 144627 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 144628 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 144629 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 144630 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 144631 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144632 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144633 | 7, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 144634 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 144635 | 8, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 144636 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 144637 | 40, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 144638 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 144639 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub |
| 144640 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 144641 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub |
| 144642 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 144643 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub |
| 144644 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 144645 | 7, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 144646 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 144647 | 8, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 144648 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 144649 | 40, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 144650 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 144651 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub1_then_psub |
| 144652 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 144653 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 144654 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 144655 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 144656 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 144657 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 144658 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 144659 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 144660 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 144661 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 144662 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 144663 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 144664 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 144665 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 144666 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 144667 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 144668 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 144669 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 144670 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 144671 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 144672 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 144673 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 144674 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 144675 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 144676 | 75, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 144677 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 |
| 144678 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_dsub3 |
| 144679 | 75, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 144680 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 144681 | 110, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 144682 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 144683 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 144684 | 128, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 144685 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 |
| 144686 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2_qsub3 |
| 144687 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 144688 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 144689 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 144690 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 144691 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 144692 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144693 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144694 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144695 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 144696 | 128, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 144697 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 144698 | 206, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 144699 | 160, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 144700 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 |
| 144701 | 169, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 144702 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 |
| 144703 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2_zsub3 |
| 144704 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 144705 | 0, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 144706 | }, |
| 144707 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 144708 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 144709 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:bsub_hi |
| 144710 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub -> FPR64_lo |
| 144711 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0 |
| 144712 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 144713 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 144714 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3 |
| 144715 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_hi |
| 144716 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:hsub -> FPR16_lo |
| 144717 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:hsub_hi |
| 144718 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:psub |
| 144719 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:psub0 |
| 144720 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:psub1 |
| 144721 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0 |
| 144722 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 144723 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 144724 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub3 |
| 144725 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144726 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:ssub_hi |
| 144727 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32 |
| 144728 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 144729 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sube32 |
| 144730 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sube64 |
| 144731 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:subo32 |
| 144732 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64 |
| 144733 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 144734 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 144735 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 144736 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 144737 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 144738 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 144739 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 144740 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 144741 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubb |
| 144742 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd0 |
| 144743 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1 |
| 144744 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh0 |
| 144745 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1 |
| 144746 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubq0 |
| 144747 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubq1 |
| 144748 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs0 |
| 144749 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1 |
| 144750 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 144751 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 144752 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 144753 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 144754 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub3 |
| 144755 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_hi |
| 144756 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 144757 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 144758 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 144759 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 144760 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 144761 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 144762 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 144763 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 144764 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 144765 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 144766 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 144767 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 144768 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 144769 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 144770 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 144771 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 144772 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 144773 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 144774 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 144775 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 144776 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144777 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144778 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 144779 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 144780 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 144781 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 144782 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144783 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 144784 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub |
| 144785 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 144786 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub |
| 144787 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 144788 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub |
| 144789 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 144790 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 144791 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 144792 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 144793 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 144794 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 144795 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 144796 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 144797 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 144798 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 144799 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 144800 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 144801 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 144802 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 144803 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 144804 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 144805 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 144806 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 144807 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 144808 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 144809 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 144810 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 144811 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 144812 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 144813 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 144814 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 144815 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 144816 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 144817 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 144818 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 144819 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 144820 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 144821 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144822 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 144823 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub2_dsub3 |
| 144824 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 144825 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 144826 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 144827 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 144828 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 144829 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 144830 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 144831 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:qsub2_qsub3 |
| 144832 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 144833 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 144834 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 144835 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 144836 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 144837 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144838 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144839 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144840 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 144841 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 144842 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 144843 | 248, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 144844 | 164, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 144845 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 144846 | 164, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 144847 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 144848 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 144849 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 144850 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 144851 | }, |
| 144852 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 144853 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 144854 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:bsub_hi |
| 144855 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 144856 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0 |
| 144857 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 144858 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 144859 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3 |
| 144860 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_hi |
| 144861 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 144862 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:hsub_hi |
| 144863 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:psub |
| 144864 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:psub0 |
| 144865 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:psub1 |
| 144866 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0 |
| 144867 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 144868 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 144869 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3 |
| 144870 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 144871 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:ssub_hi |
| 144872 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32 |
| 144873 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_hi |
| 144874 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sube32 |
| 144875 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sube64 |
| 144876 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:subo32 |
| 144877 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:subo64 |
| 144878 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0 |
| 144879 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1 |
| 144880 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2 |
| 144881 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3 |
| 144882 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4 |
| 144883 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5 |
| 144884 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6 |
| 144885 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7 |
| 144886 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubb |
| 144887 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd0 |
| 144888 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1 |
| 144889 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh0 |
| 144890 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1 |
| 144891 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq0 |
| 144892 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq1 |
| 144893 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs0 |
| 144894 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1 |
| 144895 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 144896 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_K |
| 144897 | 96, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 144898 | 93, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 144899 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3 |
| 144900 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_hi |
| 144901 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 144902 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 144903 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 144904 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 144905 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 144906 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 144907 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 144908 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 144909 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 144910 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 144911 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 144912 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 144913 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 144914 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 144915 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 144916 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 144917 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 144918 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 144919 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 144920 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 144921 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 144922 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 144923 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 144924 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 144925 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 144926 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 144927 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 144928 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 144929 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 144930 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 144931 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 144932 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 144933 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 144934 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 144935 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 144936 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 144937 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 144938 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 144939 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 144940 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 144941 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 144942 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 144943 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 144944 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 144945 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 144946 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 144947 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 144948 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 144949 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 144950 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 144951 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 144952 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 144953 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 144954 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 144955 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 144956 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 144957 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 144958 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 144959 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 144960 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 144961 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 144962 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 144963 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 144964 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 144965 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 144966 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 144967 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 144968 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 144969 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 144970 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 144971 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 144972 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 144973 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 144974 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 144975 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 144976 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 144977 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 144978 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 144979 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 144980 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 144981 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 144982 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 144983 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 144984 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 144985 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 144986 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 144987 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 144988 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 144989 | 179, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 144990 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 144991 | 134, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 144992 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 144993 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 144994 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 144995 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 144996 | }, |
| 144997 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 144998 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 144999 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:bsub_hi |
| 145000 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 145001 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0 |
| 145002 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 145003 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 145004 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3 |
| 145005 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_hi |
| 145006 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 145007 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:hsub_hi |
| 145008 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub |
| 145009 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub0 |
| 145010 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub1 |
| 145011 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0 |
| 145012 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 145013 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 145014 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub3 |
| 145015 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 145016 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:ssub_hi |
| 145017 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32 |
| 145018 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_hi |
| 145019 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sube32 |
| 145020 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sube64 |
| 145021 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo32 |
| 145022 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64 |
| 145023 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_0 |
| 145024 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1 |
| 145025 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2 |
| 145026 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3 |
| 145027 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4 |
| 145028 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5 |
| 145029 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6 |
| 145030 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7 |
| 145031 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubb |
| 145032 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd0 |
| 145033 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1 |
| 145034 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh0 |
| 145035 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1 |
| 145036 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubq0 |
| 145037 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubq1 |
| 145038 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs0 |
| 145039 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1 |
| 145040 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 145041 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0 -> ZPR_K |
| 145042 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1 -> ZPR_K |
| 145043 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 145044 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub3 |
| 145045 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_hi |
| 145046 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 145047 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 145048 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 145049 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 145050 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 145051 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 145052 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 145053 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 145054 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 145055 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 145056 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 145057 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 145058 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 145059 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 145060 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 145061 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 145062 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 145063 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 145064 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 145065 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 145066 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145067 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145068 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 145069 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 145070 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 145071 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 145072 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 145073 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 145074 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub |
| 145075 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 145076 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub |
| 145077 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 145078 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub |
| 145079 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 145080 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 145081 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 145082 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 145083 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 145084 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 145085 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 145086 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:psub1_then_psub |
| 145087 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 145088 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 145089 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 145090 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 145091 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 145092 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 145093 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 145094 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 145095 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 145096 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 145097 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 145098 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 145099 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 145100 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 145101 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 145102 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 145103 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 145104 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 145105 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 145106 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 145107 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 145108 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 145109 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 145110 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 145111 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 145112 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 |
| 145113 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub2_dsub3 |
| 145114 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 145115 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 145116 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 145117 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 145118 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 145119 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 145120 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 |
| 145121 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:qsub2_qsub3 |
| 145122 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 145123 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 145124 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 145125 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 145126 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 145127 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145128 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145129 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145130 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 145131 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 145132 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 145133 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 145134 | 169, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 145135 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 |
| 145136 | 169, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 145137 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 |
| 145138 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub2_zsub3 |
| 145139 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 145140 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 145141 | }, |
| 145142 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 145143 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 145144 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 145145 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 145146 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 145147 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 145148 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 145149 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 145150 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 145151 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 145152 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 145153 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 145154 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 145155 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 145156 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 145157 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 145158 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 145159 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 145160 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 145161 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 145162 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 145163 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 145164 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 145165 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 145166 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 145167 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 145168 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 145169 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 145170 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 145171 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 145172 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 145173 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 145174 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 145175 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 145176 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 145177 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 145178 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 145179 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 145180 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 145181 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 145182 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 145183 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 145184 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 145185 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 145186 | 104, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 145187 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 145188 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Hi |
| 145189 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 145190 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 145191 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 145192 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 145193 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 145194 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 145195 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 145196 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 145197 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 145198 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 145199 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 145200 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 145201 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 145202 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 145203 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 145204 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 145205 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 145206 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 145207 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 145208 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 145209 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 145210 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 145211 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145212 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145213 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 145214 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 145215 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 145216 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 145217 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 145218 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 145219 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 145220 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 145221 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 145222 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 145223 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 145224 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 145225 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 145226 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 145227 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 145228 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 145229 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 145230 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 145231 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 145232 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 145233 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 145234 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 145235 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 145236 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 145237 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 145238 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 145239 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 145240 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 145241 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 145242 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 145243 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 145244 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 145245 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 145246 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 145247 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 145248 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 145249 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 145250 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 145251 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 145252 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 145253 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 145254 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 145255 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 145256 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 145257 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 145258 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 145259 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 145260 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 145261 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 145262 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 145263 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 145264 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 145265 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 145266 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 145267 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 145268 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 145269 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 145270 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 145271 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 145272 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145273 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145274 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145275 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 145276 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 145277 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 145278 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 145279 | 170, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 145280 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 145281 | 157, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 145282 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 145283 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 145284 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 145285 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 145286 | }, |
| 145287 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 145288 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 145289 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 145290 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64 |
| 145291 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 145292 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64 |
| 145293 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 145294 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3 |
| 145295 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 145296 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16 |
| 145297 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 145298 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub |
| 145299 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 145300 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 145301 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 145302 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128 |
| 145303 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 145304 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3 |
| 145305 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32 |
| 145306 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 145307 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 145308 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 145309 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 145310 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 145311 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 145312 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 145313 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 145314 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 145315 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 145316 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 145317 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 145318 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 145319 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 145320 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 145321 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 145322 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 145323 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 145324 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 145325 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 145326 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 145327 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 145328 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 145329 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 145330 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128 |
| 145331 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_Hi |
| 145332 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPR |
| 145333 | 101, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 145334 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3 |
| 145335 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 145336 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 145337 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 145338 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 145339 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 145340 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 145341 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 145342 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 145343 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 145344 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 145345 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 145346 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 145347 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 145348 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 145349 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 145350 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 145351 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 145352 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 145353 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 145354 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 145355 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 145356 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145357 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145358 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 145359 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 145360 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 145361 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 145362 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 145363 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 145364 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub |
| 145365 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 145366 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub |
| 145367 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 145368 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub |
| 145369 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 145370 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 145371 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 145372 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 145373 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 145374 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 145375 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 145376 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 145377 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 145378 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 145379 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 145380 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 145381 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 145382 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 145383 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 145384 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 145385 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 145386 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 145387 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 145388 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 145389 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 145390 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 145391 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 145392 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 145393 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 145394 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 145395 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 145396 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 145397 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 145398 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 145399 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 145400 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 145401 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD |
| 145402 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 145403 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 |
| 145404 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD |
| 145405 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 145406 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 145407 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 145408 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 145409 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 145410 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 145411 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 |
| 145412 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 145413 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 145414 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 145415 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 145416 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 145417 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145418 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145419 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145420 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 145421 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ |
| 145422 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 145423 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 145424 | 148, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 145425 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 145426 | 159, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 145427 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 145428 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 |
| 145429 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 145430 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 145431 | }, |
| 145432 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 145433 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 145434 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 145435 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 145436 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 145437 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 145438 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 145439 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 145440 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 145441 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 145442 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 145443 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 145444 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 145445 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 145446 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 145447 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 145448 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 145449 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 145450 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145451 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 145452 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 145453 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 145454 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 145455 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 145456 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 145457 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 145458 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 145459 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 145460 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 145461 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 145462 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 145463 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 145464 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 145465 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 145466 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 145467 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 145468 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 145469 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 145470 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 145471 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 145472 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 145473 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 145474 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 145475 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 145476 | 105, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 145477 | 97, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR_4b |
| 145478 | 100, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Lo |
| 145479 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 145480 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 145481 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 145482 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 145483 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 145484 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 145485 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 145486 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 145487 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 145488 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 145489 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 145490 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 145491 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 145492 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 145493 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 145494 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 145495 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 145496 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 145497 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 145498 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 145499 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 145500 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 145501 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145502 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145503 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 145504 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 145505 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 145506 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 145507 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145508 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 145509 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 145510 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 145511 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 145512 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 145513 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 145514 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 145515 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 145516 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 145517 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 145518 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 145519 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145520 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 145521 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 145522 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 145523 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 145524 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 145525 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 145526 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 145527 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 145528 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 145529 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 145530 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 145531 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 145532 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 145533 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 145534 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 145535 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 145536 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 145537 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 145538 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 145539 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 145540 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 145541 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 145542 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 145543 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 145544 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 145545 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 145546 | 79, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 145547 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 145548 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 145549 | 79, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 145550 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 145551 | 116, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 145552 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 145553 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 145554 | 140, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 145555 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 145556 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 145557 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 145558 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 145559 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 145560 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 145561 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 145562 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145563 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145564 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145565 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 145566 | 140, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 145567 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 145568 | 220, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 145569 | 171, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 145570 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 145571 | 165, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 145572 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 145573 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 145574 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 145575 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 145576 | }, |
| 145577 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 145578 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 145579 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 145580 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 145581 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 145582 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 145583 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 145584 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 145585 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 145586 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 145587 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 145588 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 145589 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 145590 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 145591 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 145592 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 145593 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 145594 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 145595 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 145596 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 145597 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 145598 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 145599 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 145600 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 145601 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 145602 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 145603 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 145604 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 145605 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 145606 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 145607 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 145608 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 145609 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 145610 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 145611 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 145612 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 145613 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 145614 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 145615 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 145616 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 145617 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 145618 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 145619 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 145620 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 145621 | 107, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPRMul2_and_ZPR_K |
| 145622 | 103, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 145623 | 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPRMul2 |
| 145624 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 145625 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 145626 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 145627 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 145628 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 145629 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 145630 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 145631 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 145632 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 145633 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 145634 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 145635 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 145636 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 145637 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 145638 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 145639 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 145640 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 145641 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 145642 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 145643 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 145644 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 145645 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 145646 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145647 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145648 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 145649 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 145650 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 145651 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 145652 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 145653 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 145654 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 145655 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 145656 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 145657 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 145658 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 145659 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 145660 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 145661 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 145662 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 145663 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 145664 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 145665 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 145666 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 145667 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 145668 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 145669 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 145670 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 145671 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 145672 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 145673 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 145674 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 145675 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 145676 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 145677 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 145678 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 145679 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 145680 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 145681 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 145682 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 145683 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 145684 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 145685 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 145686 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 145687 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 145688 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 145689 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 145690 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 145691 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 145692 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 145693 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 145694 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 145695 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 145696 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 145697 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 145698 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 145699 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 145700 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 145701 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 145702 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 145703 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 145704 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 145705 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 145706 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 145707 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145708 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145709 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145710 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 145711 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 145712 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 145713 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 145714 | 172, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 145715 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 145716 | 179, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 145717 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 145718 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 145719 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 145720 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 145721 | }, |
| 145722 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 145723 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 145724 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 145725 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 145726 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 145727 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 145728 | 65, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 145729 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 |
| 145730 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 145731 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 145732 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 145733 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 145734 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 145735 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 145736 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 145737 | 98, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 145738 | 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 145739 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 |
| 145740 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145741 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 145742 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 145743 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 145744 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 145745 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 145746 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 145747 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 145748 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 145749 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 145750 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 145751 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 145752 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 145753 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 145754 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 145755 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 145756 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 145757 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 145758 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 145759 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 145760 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 145761 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 145762 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 145763 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 145764 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 145765 | 98, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 145766 | 106, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul2_and_ZPR_3b |
| 145767 | 102, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 145768 | 100, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPRMul2_Lo |
| 145769 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 |
| 145770 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 145771 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 145772 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 145773 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 145774 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 145775 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 145776 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 145777 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 145778 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 145779 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 145780 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 145781 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 145782 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 145783 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 145784 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 145785 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 145786 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 145787 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 145788 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 145789 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 145790 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 145791 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145792 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145793 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 145794 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 145795 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 145796 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 145797 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145798 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 145799 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 145800 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 145801 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 145802 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 145803 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 145804 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 145805 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 145806 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 145807 | 10, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 145808 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 145809 | 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 145810 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 145811 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 145812 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 145813 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 145814 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 145815 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 145816 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 145817 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 145818 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 145819 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 145820 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 145821 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 145822 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 145823 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 145824 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 145825 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 145826 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 145827 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 145828 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 145829 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 145830 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 145831 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 145832 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 145833 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 145834 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 145835 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 145836 | 79, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 145837 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 145838 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 145839 | 79, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 145840 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 145841 | 116, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 145842 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 145843 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 145844 | 146, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 145845 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 145846 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 145847 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 145848 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 145849 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 145850 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 145851 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 145852 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145853 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145854 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 145855 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 145856 | 163, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 145857 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 145858 | 242, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 145859 | 173, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 145860 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 145861 | 184, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 145862 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 145863 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 145864 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 145865 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 145866 | }, |
| 145867 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 145868 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 145869 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 145870 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 145871 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 145872 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 145873 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 145874 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 145875 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 145876 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 145877 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 145878 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 145879 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 145880 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 145881 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 145882 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 145883 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 145884 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 145885 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 145886 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 145887 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 145888 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 145889 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 145890 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 145891 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 145892 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 145893 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 145894 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 145895 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 145896 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 145897 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 145898 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 145899 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 145900 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 145901 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 145902 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 145903 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 145904 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 145905 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 145906 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 145907 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 145908 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 145909 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 145910 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 145911 | 93, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR |
| 145912 | 104, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 145913 | 93, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR |
| 145914 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 145915 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 145916 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 145917 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 145918 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 145919 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 145920 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 145921 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 145922 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 145923 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 145924 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 145925 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 145926 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 145927 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 145928 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 145929 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 145930 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 145931 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 145932 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 145933 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 145934 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 145935 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 145936 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 145937 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 145938 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 145939 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 145940 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 145941 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 145942 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 145943 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 145944 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 145945 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 145946 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 145947 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 145948 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 145949 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 145950 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 145951 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 145952 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 145953 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 145954 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 145955 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 145956 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 145957 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 145958 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 145959 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 145960 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 145961 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 145962 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 145963 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 145964 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 145965 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 145966 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 145967 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 145968 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 145969 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 145970 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 145971 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 145972 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 145973 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 145974 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 145975 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 145976 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 145977 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 145978 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 145979 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 145980 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 145981 | 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 145982 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 145983 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 145984 | 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 145985 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 145986 | 110, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 145987 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 145988 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 145989 | 128, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 145990 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 145991 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 145992 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 145993 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 145994 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 145995 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 145996 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 145997 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 145998 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 145999 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146000 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 146001 | 128, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 146002 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 146003 | 206, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 146004 | 180, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 146005 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 146006 | 170, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 146007 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 146008 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 146009 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 146010 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 146011 | }, |
| 146012 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 146013 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 146014 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 146015 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 146016 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 146017 | 65, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 146018 | 65, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 146019 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 146020 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 146021 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 146022 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 146023 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 146024 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 146025 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 146026 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 146027 | 94, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 146028 | 94, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 146029 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 146030 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 146031 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 146032 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 146033 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 146034 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 146035 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 146036 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 146037 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 146038 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 146039 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 146040 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 146041 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 146042 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 146043 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 146044 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 146045 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 146046 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 146047 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 146048 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 146049 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 146050 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 146051 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 146052 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 146053 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 146054 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 146055 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 146056 | 93, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR |
| 146057 | 105, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 146058 | 97, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR_4b |
| 146059 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 146060 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 146061 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 146062 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 146063 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 146064 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 146065 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 146066 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 146067 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 146068 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 146069 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 146070 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 146071 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 146072 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 146073 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 146074 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 146075 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 146076 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 146077 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 146078 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 146079 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 146080 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 146081 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146082 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146083 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 146084 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 146085 | 10, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 146086 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 146087 | 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146088 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 146089 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 146090 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 146091 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 146092 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 146093 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 146094 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 146095 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 146096 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 146097 | 10, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 146098 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 146099 | 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146100 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 146101 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 146102 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 146103 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 146104 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 146105 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 146106 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 146107 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 146108 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 146109 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 146110 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 146111 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 146112 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 146113 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 146114 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 146115 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 146116 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 146117 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 146118 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 146119 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 146120 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 146121 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 146122 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 146123 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 146124 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 146125 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 146126 | 79, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 146127 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 146128 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 146129 | 77, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 146130 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 146131 | 115, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 146132 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 146133 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 146134 | 140, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 146135 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 146136 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 146137 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 146138 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 146139 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 146140 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 146141 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 146142 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146143 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146144 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146145 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 146146 | 132, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 146147 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 146148 | 216, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 146149 | 181, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 146150 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 146151 | 171, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 146152 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 146153 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 146154 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 146155 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 146156 | }, |
| 146157 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 146158 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 146159 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 146160 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 146161 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 146162 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 146163 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 146164 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 146165 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 146166 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 146167 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 146168 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 146169 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 146170 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 146171 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 146172 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 146173 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 146174 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 146175 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 146176 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 146177 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 146178 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 146179 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 146180 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 146181 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 146182 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 146183 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 146184 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 146185 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 146186 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 146187 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 146188 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 146189 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 146190 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 146191 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 146192 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 146193 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 146194 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 146195 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 146196 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 146197 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 146198 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 146199 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 146200 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 146201 | 93, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR |
| 146202 | 107, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 146203 | 103, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPR_K |
| 146204 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 146205 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 146206 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 146207 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 146208 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 146209 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 146210 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 146211 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 146212 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 146213 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 146214 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 146215 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 146216 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 146217 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 146218 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 146219 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 146220 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 146221 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 146222 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 146223 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 146224 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 146225 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 146226 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146227 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146228 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 146229 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 146230 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 146231 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 146232 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 146233 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 146234 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 146235 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 146236 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 146237 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 146238 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 146239 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 146240 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 146241 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 146242 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 146243 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 146244 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 146245 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 146246 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 146247 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 146248 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 146249 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 146250 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 146251 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 146252 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 146253 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 146254 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 146255 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 146256 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 146257 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 146258 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 146259 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 146260 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 146261 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 146262 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 146263 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 146264 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 146265 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 146266 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 146267 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 146268 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 146269 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 146270 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 146271 | 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 146272 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 146273 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 146274 | 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 146275 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 146276 | 110, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 146277 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 146278 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 146279 | 128, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 146280 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 146281 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 146282 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 146283 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 146284 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 146285 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 146286 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 146287 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146288 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146289 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146290 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 146291 | 128, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 146292 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 146293 | 206, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 146294 | 183, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 146295 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 146296 | 172, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 146297 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 146298 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 146299 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 146300 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 146301 | }, |
| 146302 | { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 146303 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 146304 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 146305 | 56, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64 |
| 146306 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 146307 | 65, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 146308 | 65, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 146309 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 |
| 146310 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 146311 | 8, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16 |
| 146312 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 146313 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 146314 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 146315 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 146316 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 146317 | 98, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 146318 | 98, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 146319 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 |
| 146320 | 40, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32 |
| 146321 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 146322 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 146323 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 146324 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 146325 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 146326 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 146327 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 146328 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 146329 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 146330 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 146331 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 146332 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 146333 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 146334 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 146335 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 146336 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 146337 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 146338 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 146339 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 146340 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 146341 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 146342 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 146343 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 146344 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 146345 | 92, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128 |
| 146346 | 93, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPR |
| 146347 | 106, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPRMul2_and_ZPR_3b |
| 146348 | 102, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 146349 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 |
| 146350 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 146351 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 146352 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 146353 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 146354 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 146355 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 146356 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 146357 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 146358 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 146359 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 146360 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 146361 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 146362 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 146363 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 146364 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 146365 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 146366 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 146367 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 146368 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 146369 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 146370 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 146371 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146372 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146373 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 146374 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 146375 | 10, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 146376 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 146377 | 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146378 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 146379 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 146380 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 146381 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 146382 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 146383 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 146384 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 146385 | 7, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 146386 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 146387 | 10, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 146388 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 146389 | 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146390 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 146391 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 146392 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 146393 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 146394 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 146395 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 146396 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 146397 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 146398 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 146399 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 146400 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 146401 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 146402 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 146403 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 146404 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 146405 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 146406 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 146407 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 146408 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 146409 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 146410 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 146411 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 146412 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 146413 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 146414 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 146415 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 146416 | 79, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 146417 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 146418 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 146419 | 77, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 146420 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 146421 | 115, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 146422 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 146423 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 146424 | 163, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 146425 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 146426 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 146427 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 146428 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 146429 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 146430 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 146431 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 146432 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146433 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146434 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146435 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 146436 | 147, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 146437 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 146438 | 241, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 146439 | 182, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 146440 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 146441 | 173, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 146442 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 146443 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 146444 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 146445 | 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 146446 | }, |
| 146447 | { // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 146448 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 146449 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 146450 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 146451 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 146452 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 146453 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 146454 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 146455 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 146456 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 146457 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 146458 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 146459 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 146460 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 146461 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 146462 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 146463 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 146464 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 146465 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 146466 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 146467 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 146468 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 146469 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 146470 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 146471 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 146472 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 146473 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 146474 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 146475 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 146476 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 146477 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 146478 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 146479 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 146480 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 146481 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 146482 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 146483 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 146484 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 146485 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 146486 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 146487 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 146488 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 146489 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 146490 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 146491 | 96, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2 |
| 146492 | 93, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR |
| 146493 | 104, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 146494 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 146495 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 146496 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 146497 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 146498 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 146499 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 146500 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 146501 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 146502 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 146503 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 146504 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 146505 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 146506 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 146507 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 146508 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 146509 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 146510 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 146511 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 146512 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 146513 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 146514 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 146515 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 146516 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146517 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146518 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 146519 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 146520 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 146521 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 146522 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 146523 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 146524 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 146525 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 146526 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 146527 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 146528 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 146529 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 146530 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 146531 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 146532 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 146533 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 146534 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 146535 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 146536 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 146537 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 146538 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 146539 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 146540 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 146541 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 146542 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 146543 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 146544 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 146545 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 146546 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 146547 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 146548 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 146549 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 146550 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 146551 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 146552 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 146553 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 146554 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 146555 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 146556 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 146557 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 146558 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 146559 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 146560 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 146561 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 146562 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 146563 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 146564 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 146565 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 146566 | 110, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 146567 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 146568 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 146569 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 146570 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 146571 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 146572 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 146573 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 146574 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 146575 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 146576 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 146577 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146578 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146579 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146580 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 146581 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 146582 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 146583 | 206, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 146584 | 134, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 146585 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 146586 | 180, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 146587 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 146588 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 146589 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 146590 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 146591 | }, |
| 146592 | { // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 146593 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 146594 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 146595 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64 |
| 146596 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 146597 | 56, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64 |
| 146598 | 65, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64_lo |
| 146599 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 146600 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 146601 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16 |
| 146602 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 146603 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 146604 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 146605 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 146606 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 146607 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128 |
| 146608 | 94, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128_lo |
| 146609 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 146610 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32 |
| 146611 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 146612 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 146613 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 146614 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 146615 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 146616 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 146617 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 146618 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 146619 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 146620 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 146621 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 146622 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 146623 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 146624 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 146625 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 146626 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 146627 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 146628 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 146629 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 146630 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 146631 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 146632 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 146633 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 146634 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 146635 | 92, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128 |
| 146636 | 96, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul2 |
| 146637 | 93, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPR |
| 146638 | 105, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 146639 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 146640 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 146641 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 146642 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 146643 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 146644 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 146645 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 146646 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 146647 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 146648 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 146649 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 146650 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 146651 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 146652 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 146653 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 146654 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 146655 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 146656 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 146657 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 146658 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 146659 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 146660 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 146661 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146662 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146663 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 146664 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 146665 | 8, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 146666 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 146667 | 40, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 146668 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 146669 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 146670 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 146671 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 146672 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 146673 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 146674 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 146675 | 7, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 146676 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 146677 | 10, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 146678 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 146679 | 44, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146680 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 146681 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 146682 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 146683 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 146684 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 146685 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 146686 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 146687 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 146688 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 146689 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 146690 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 146691 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 146692 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 146693 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 146694 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 146695 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 146696 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 146697 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 146698 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 146699 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 146700 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 146701 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 146702 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 146703 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 146704 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 146705 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 146706 | 77, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 146707 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 146708 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 146709 | 75, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD |
| 146710 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 146711 | 113, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 146712 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 146713 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 146714 | 132, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 146715 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 146716 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 146717 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 146718 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 146719 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 146720 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 146721 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 146722 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146723 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146724 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146725 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 146726 | 128, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ |
| 146727 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 146728 | 209, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 146729 | 134, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 146730 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 146731 | 181, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 146732 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 146733 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 146734 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 146735 | 0, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 146736 | }, |
| 146737 | { // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 146738 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 146739 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 146740 | 56, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64 |
| 146741 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 146742 | 56, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64 |
| 146743 | 65, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64_lo |
| 146744 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3 |
| 146745 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 146746 | 8, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16 |
| 146747 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 146748 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub |
| 146749 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub0 |
| 146750 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub1 |
| 146751 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 146752 | 92, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128 |
| 146753 | 98, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 146754 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub3 |
| 146755 | 40, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32 |
| 146756 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 146757 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 146758 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 146759 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sube32 |
| 146760 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sube64 |
| 146761 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo32 |
| 146762 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64 |
| 146763 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 146764 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 146765 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 146766 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 146767 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 146768 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 146769 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 146770 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 146771 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubb |
| 146772 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 146773 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 146774 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 146775 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 146776 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 146777 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 146778 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 146779 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 146780 | 92, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128 |
| 146781 | 96, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPRMul2 |
| 146782 | 93, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPR |
| 146783 | 106, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPRMul2_and_ZPR_3b |
| 146784 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub3 |
| 146785 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 146786 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 146787 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 146788 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 146789 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 146790 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 146791 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 146792 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 146793 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 146794 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 146795 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 146796 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 146797 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 146798 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 146799 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 146800 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 146801 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 146802 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 146803 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 146804 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 146805 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 146806 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146807 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146808 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 146809 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 146810 | 8, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16 |
| 146811 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 146812 | 40, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32 |
| 146813 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 146814 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 146815 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 146816 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 146817 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 146818 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 146819 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 146820 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 146821 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 146822 | 10, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 146823 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 146824 | 44, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 146825 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 146826 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 146827 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 146828 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 146829 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 146830 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 146831 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 146832 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 146833 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 146834 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 146835 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 146836 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 146837 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 146838 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 146839 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 146840 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 146841 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 146842 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 146843 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 146844 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 146845 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 146846 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 146847 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 146848 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 146849 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 146850 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 146851 | 77, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 146852 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 146853 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 146854 | 75, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD |
| 146855 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 146856 | 113, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 146857 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 146858 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 146859 | 147, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 146860 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 146861 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 146862 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 146863 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 146864 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 146865 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 146866 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 146867 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 146868 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 146869 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 146870 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 146871 | 128, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ |
| 146872 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 146873 | 224, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 146874 | 134, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2 |
| 146875 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 146876 | 182, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 146877 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 146878 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 146879 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 146880 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 146881 | }, |
| 146882 | { // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 146883 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 146884 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 146885 | 56, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 146886 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub0 |
| 146887 | 56, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 146888 | 56, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2 -> FPR64 |
| 146889 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3 |
| 146890 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 146891 | 8, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 146892 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 146893 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:psub |
| 146894 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:psub0 |
| 146895 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:psub1 |
| 146896 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub0 |
| 146897 | 92, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 146898 | 92, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub2 -> FPR128 |
| 146899 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub3 |
| 146900 | 40, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 146901 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 146902 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sub_32 |
| 146903 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 146904 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sube32 |
| 146905 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sube64 |
| 146906 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:subo32 |
| 146907 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:subo64 |
| 146908 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 146909 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 146910 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 146911 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 146912 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 146913 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 146914 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 146915 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 146916 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubb |
| 146917 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 146918 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 146919 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 146920 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 146921 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 146922 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 146923 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 146924 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 146925 | 92, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 146926 | 99, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPRMul2_Hi |
| 146927 | 93, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPR |
| 146928 | 107, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub2 -> ZPRMul2_and_ZPR_K |
| 146929 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub3 |
| 146930 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 146931 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 146932 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 146933 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 146934 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 146935 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 146936 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 146937 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 146938 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 146939 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 146940 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 146941 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 146942 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 146943 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 146944 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 146945 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 146946 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 146947 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 146948 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 146949 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 146950 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 146951 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 146952 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 146953 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 146954 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 146955 | 8, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 146956 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 146957 | 40, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 146958 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 146959 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub |
| 146960 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 146961 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub |
| 146962 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 146963 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub |
| 146964 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 146965 | 7, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 146966 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 146967 | 8, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 146968 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 146969 | 40, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 146970 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 146971 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 146972 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 146973 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 146974 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 146975 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 146976 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 146977 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 146978 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 146979 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 146980 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 146981 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 146982 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 146983 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 146984 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 146985 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 146986 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 146987 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 146988 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 146989 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 146990 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 146991 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 146992 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 146993 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 146994 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 146995 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 146996 | 75, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 -> DD |
| 146997 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 |
| 146998 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 |
| 146999 | 75, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub_dsub1 -> DD |
| 147000 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 147001 | 110, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 147002 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 147003 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 147004 | 128, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 -> QQ |
| 147005 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 |
| 147006 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 |
| 147007 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 147008 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 147009 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 147010 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 147011 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 147012 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147013 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147014 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147015 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 147016 | 128, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub_qsub1 -> QQ |
| 147017 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 147018 | 206, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 147019 | 148, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 147020 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 |
| 147021 | 183, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 147022 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 |
| 147023 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 |
| 147024 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 147025 | 0, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 147026 | }, |
| 147027 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 147028 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 147029 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:bsub_hi |
| 147030 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 147031 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0 |
| 147032 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1 -> FPR64_lo |
| 147033 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2 -> FPR64_lo |
| 147034 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3 |
| 147035 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_hi |
| 147036 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 147037 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:hsub_hi |
| 147038 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:psub |
| 147039 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:psub0 |
| 147040 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:psub1 |
| 147041 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0 |
| 147042 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1 -> FPR128_lo |
| 147043 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2 -> FPR128_lo |
| 147044 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3 |
| 147045 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147046 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:ssub_hi |
| 147047 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32 |
| 147048 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_hi |
| 147049 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sube32 |
| 147050 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sube64 |
| 147051 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:subo32 |
| 147052 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:subo64 |
| 147053 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0 |
| 147054 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1 |
| 147055 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2 |
| 147056 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3 |
| 147057 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4 |
| 147058 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5 |
| 147059 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6 |
| 147060 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7 |
| 147061 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubb |
| 147062 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd0 |
| 147063 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1 |
| 147064 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh0 |
| 147065 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1 |
| 147066 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq0 |
| 147067 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubq1 |
| 147068 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs0 |
| 147069 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1 |
| 147070 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub -> FPR128_0to7 |
| 147071 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_3b |
| 147072 | 100, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2_Lo |
| 147073 | 97, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2 -> ZPR_4b |
| 147074 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3 |
| 147075 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_hi |
| 147076 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 147077 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 147078 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 147079 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 147080 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 147081 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 147082 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 147083 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 147084 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 147085 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 147086 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 147087 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 147088 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 147089 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 147090 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 147091 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 147092 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 147093 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 147094 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 147095 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 147096 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147097 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147098 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 147099 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 147100 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16_lo |
| 147101 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 147102 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147103 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 147104 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub |
| 147105 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 147106 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub |
| 147107 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 147108 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub |
| 147109 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 147110 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 147111 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 147112 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16_lo |
| 147113 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 147114 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147115 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 147116 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 147117 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 147118 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 147119 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 147120 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 147121 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 147122 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 147123 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 147124 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 147125 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 147126 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 147127 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 147128 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 147129 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 147130 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 147131 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 147132 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 147133 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 147134 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 147135 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 147136 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 147137 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 147138 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 147139 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 147140 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 147141 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 147142 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 147143 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub2_dsub3 |
| 147144 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 147145 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 147146 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 147147 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 147148 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 147149 | 140, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 147150 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 147151 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:qsub2_qsub3 |
| 147152 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 147153 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 147154 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 147155 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 147156 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 147157 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147158 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147159 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147160 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 147161 | 146, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 147162 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 147163 | 222, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 147164 | 184, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 147165 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 147166 | 149, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 147167 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 147168 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub2_zsub3 |
| 147169 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 147170 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 147171 | }, |
| 147172 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 147173 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 147174 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:bsub_hi |
| 147175 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 147176 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0 |
| 147177 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 147178 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 147179 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3 |
| 147180 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_hi |
| 147181 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 147182 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:hsub_hi |
| 147183 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:psub |
| 147184 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:psub0 |
| 147185 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:psub1 |
| 147186 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0 |
| 147187 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 147188 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 147189 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3 |
| 147190 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:ssub_hi |
| 147192 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32 |
| 147193 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_hi |
| 147194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sube32 |
| 147195 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sube64 |
| 147196 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:subo32 |
| 147197 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:subo64 |
| 147198 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0 |
| 147199 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1 |
| 147200 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2 |
| 147201 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3 |
| 147202 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4 |
| 147203 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5 |
| 147204 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6 |
| 147205 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7 |
| 147206 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubb |
| 147207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd0 |
| 147208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1 |
| 147209 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh0 |
| 147210 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1 |
| 147211 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq0 |
| 147212 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq1 |
| 147213 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs0 |
| 147214 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1 |
| 147215 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub -> FPR128_lo |
| 147216 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_4b |
| 147217 | 101, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 147218 | 93, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 147219 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3 |
| 147220 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_hi |
| 147221 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 147222 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 147223 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 147224 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 147225 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 147226 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 147227 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 147228 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 147229 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 147230 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 147231 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 147232 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 147233 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 147234 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 147235 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 147236 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 147237 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 147238 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 147239 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 147240 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 147241 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147242 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147243 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 147244 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 147245 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 147246 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 147247 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 147248 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 147249 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 147250 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 147251 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 147252 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 147253 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 147254 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 147255 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 147256 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 147257 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 147258 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 147259 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 147260 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 147261 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 147262 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 147263 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 147264 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 147265 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 147266 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 147267 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 147268 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 147269 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 147270 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 147271 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 147272 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 147273 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 147274 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 147275 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 147276 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 147277 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 147278 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 147279 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 147280 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 147281 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 147282 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 147283 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 147284 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 147285 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 147286 | 75, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 147287 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 147288 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 147289 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 147290 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 147291 | 111, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 147292 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 147293 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 147294 | 128, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 147295 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 147296 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 147297 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 147298 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 147299 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 147300 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 147301 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 147302 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147303 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147304 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147305 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 147306 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 147307 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 147308 | 210, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 147309 | 185, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 147310 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 147311 | 155, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 147312 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 147313 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 147314 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 147315 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 147316 | }, |
| 147317 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 147318 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 147319 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 147320 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64_lo |
| 147321 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 147322 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64_lo |
| 147323 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 147324 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3 |
| 147325 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 147326 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16_lo |
| 147327 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 147328 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:psub |
| 147329 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 147330 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 147331 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 147332 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128_lo |
| 147333 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 147334 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3 |
| 147335 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147336 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 147337 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 147338 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 147339 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 147340 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 147341 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 147342 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 147343 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 147344 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 147345 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 147346 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 147347 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 147348 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 147349 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 147350 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 147351 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 147352 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 147353 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 147354 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 147355 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 147356 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 147357 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 147358 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 147359 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 147360 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128_lo |
| 147361 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_Lo |
| 147362 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPR_4b |
| 147363 | 101, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 147364 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3 |
| 147365 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 147366 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 147367 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 147368 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 147369 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 147370 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 147371 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 147372 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 147373 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 147374 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 147375 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 147376 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 147377 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 147378 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 147379 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 147380 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 147381 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 147382 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 147383 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 147384 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 147385 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 147386 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147387 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147388 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 147389 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 147390 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 147391 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 147392 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147393 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 147394 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub |
| 147395 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 147396 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub |
| 147397 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 147398 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub |
| 147399 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 147400 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 147401 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 147402 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 147403 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 147404 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 147405 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 147406 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 147407 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 147408 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 147409 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 147410 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 147411 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 147412 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 147413 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 147414 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 147415 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 147416 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 147417 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 147418 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 147419 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 147420 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 147421 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 147422 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 147423 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 147424 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 147425 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 147426 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 147427 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 147428 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 147429 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 147430 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 147431 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 147432 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 147433 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 |
| 147434 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 147435 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 147436 | 114, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 147437 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 147438 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 147439 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 147440 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 147441 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 |
| 147442 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 147443 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 147444 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 147445 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 147446 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 147447 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147448 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147449 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147450 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 147451 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 147452 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 147453 | 217, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 147454 | 149, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 147455 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 147456 | 185, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 147457 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 147458 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 |
| 147459 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 147460 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 147461 | }, |
| 147462 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 147463 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 147464 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 147465 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 147466 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 147467 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 147468 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 147469 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 147470 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 147471 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 147472 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 147473 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub |
| 147474 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 147475 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 147476 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 147477 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 147478 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 147479 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 147480 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 147481 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 147482 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 147483 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 147484 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 147485 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 147486 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 147487 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 147488 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 147489 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 147490 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 147491 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 147492 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 147493 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 147494 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 147495 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 147496 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 147497 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 147498 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 147499 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 147500 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 147501 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 147502 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 147503 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 147504 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 147505 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 147506 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_K |
| 147507 | 99, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 147508 | 93, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 147509 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 147510 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 147511 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 147512 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 147513 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 147514 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 147515 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 147516 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 147517 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 147518 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 147519 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 147520 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 147521 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 147522 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 147523 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 147524 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 147525 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 147526 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 147527 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 147528 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 147529 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 147530 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 147531 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147532 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147533 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 147534 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 147535 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 147536 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 147537 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 147538 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 147539 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 147540 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 147541 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 147542 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 147543 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 147544 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 147545 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 147546 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 147547 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 147548 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 147549 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 147550 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 147551 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 147552 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 147553 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 147554 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 147555 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 147556 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 147557 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 147558 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 147559 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 147560 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 147561 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 147562 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 147563 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 147564 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 147565 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 147566 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 147567 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 147568 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 147569 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 147570 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 147571 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 147572 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 147573 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 147574 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 147575 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 147576 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 147577 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 147578 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 147579 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 147580 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 147581 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 147582 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 147583 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 147584 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 147585 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 147586 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 147587 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 147588 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 147589 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 147590 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 147591 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 147592 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147593 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147594 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147595 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 147596 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 147597 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 147598 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 147599 | 187, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 147600 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 147601 | 148, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 147602 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 147603 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 147604 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 147605 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 147606 | }, |
| 147607 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 147608 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 147609 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 147610 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 147611 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 147612 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 147613 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 147614 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 147615 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 147616 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 147617 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 147618 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 147619 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 147620 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 147621 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 147622 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 147623 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 147624 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 147625 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 147626 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 147627 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 147628 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 147629 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 147630 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 147631 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 147632 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 147633 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 147634 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 147635 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 147636 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 147637 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 147638 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 147639 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 147640 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 147641 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 147642 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 147643 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 147644 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 147645 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 147646 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 147647 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 147648 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 147649 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 147650 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 147651 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi |
| 147652 | 93, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR |
| 147653 | 104, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 147654 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 147655 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 147656 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 147657 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 147658 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 147659 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 147660 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 147661 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 147662 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 147663 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 147664 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 147665 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 147666 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 147667 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 147668 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 147669 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 147670 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 147671 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 147672 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 147673 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 147674 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 147675 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 147676 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147677 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147678 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 147679 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 147680 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 147681 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 147682 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 147683 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 147684 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 147685 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 147686 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 147687 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 147688 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 147689 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 147690 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 147691 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 147692 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 147693 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 147694 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 147695 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 147696 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 147697 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 147698 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 147699 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 147700 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 147701 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 147702 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 147703 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 147704 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 147705 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 147706 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 147707 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 147708 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 147709 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 147710 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 147711 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 147712 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 147713 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 147714 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 147715 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 147716 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 147717 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 147718 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 147719 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 147720 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 147721 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 147722 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 147723 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 147724 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 147725 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 147726 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 147727 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 147728 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 147729 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 147730 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 147731 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 147732 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 147733 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 147734 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 147735 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 147736 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 147737 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147738 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147739 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147740 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 147741 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 147742 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 147743 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 147744 | 148, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 147745 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 147746 | 180, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 147747 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 147748 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 147749 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 147750 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 147751 | }, |
| 147752 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 147753 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 147754 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 147755 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 147756 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 147757 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 147758 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 147759 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 147760 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 147761 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 147762 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 147763 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 147764 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 147765 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 147766 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 147767 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 147768 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 147769 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 147770 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 147771 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 147772 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 147773 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 147774 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 147775 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 147776 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 147777 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 147778 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 147779 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 147780 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 147781 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 147782 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 147783 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 147784 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 147785 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 147786 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 147787 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 147788 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 147789 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 147790 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 147791 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 147792 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 147793 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 147794 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 147795 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 147796 | 107, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_and_ZPR_K |
| 147797 | 103, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPR_K |
| 147798 | 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 147799 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 147800 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 147801 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 147802 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 147803 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 147804 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 147805 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 147806 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 147807 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 147808 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 147809 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 147810 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 147811 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 147812 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 147813 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 147814 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 147815 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 147816 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 147817 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 147818 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 147819 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 147820 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 147821 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147822 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147823 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 147824 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 147825 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 147826 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 147827 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 147828 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 147829 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 147830 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 147831 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 147832 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 147833 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 147834 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 147835 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 147836 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 147837 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 147838 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 147839 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 147840 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 147841 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 147842 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 147843 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 147844 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 147845 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 147846 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 147847 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 147848 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 147849 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 147850 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 147851 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 147852 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 147853 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 147854 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 147855 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 147856 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 147857 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 147858 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 147859 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 147860 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 147861 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 147862 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 147863 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 147864 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 147865 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 147866 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 147867 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 147868 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 147869 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 147870 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 147871 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 147872 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 147873 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 147874 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 147875 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 147876 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 147877 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 147878 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 147879 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 147880 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 147881 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 147882 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 147883 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 147884 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 147885 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 147886 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 147887 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 147888 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 147889 | 172, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 147890 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 147891 | 187, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 147892 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 147893 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 147894 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 147895 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 147896 | }, |
| 147897 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 147898 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 147899 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 147900 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 147901 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 147902 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 147903 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 147904 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 |
| 147905 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 147906 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 147907 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 147908 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 147909 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 147910 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 147911 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 147912 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 147913 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 147914 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 |
| 147915 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147916 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 147917 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 147918 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 147919 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 147920 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 147921 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 147922 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 147923 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 147924 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 147925 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 147926 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 147927 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 147928 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 147929 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 147930 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 147931 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 147932 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 147933 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 147934 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 147935 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 147936 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 147937 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 147938 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 147939 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 147940 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 147941 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 147942 | 106, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPRMul2_and_ZPR_3b |
| 147943 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 147944 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 |
| 147945 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 147946 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 147947 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 147948 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 147949 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 147950 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 147951 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 147952 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 147953 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 147954 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 147955 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 147956 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 147957 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 147958 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 147959 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 147960 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 147961 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 147962 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 147963 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 147964 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 147965 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 147966 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 147967 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 147968 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 147969 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 147970 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 147971 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 147972 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147973 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 147974 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub |
| 147975 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 147976 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub |
| 147977 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 147978 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub |
| 147979 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 147980 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 147981 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 147982 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 147983 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 147984 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 147985 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 147986 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 147987 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 147988 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 147989 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 147990 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 147991 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 147992 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 147993 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 147994 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 147995 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 147996 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 147997 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 147998 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 147999 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 148000 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 148001 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 148002 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 148003 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 148004 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 148005 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 148006 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 148007 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 148008 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 148009 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 148010 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 148011 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148012 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 |
| 148013 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 |
| 148014 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148015 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 |
| 148016 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 148017 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 148018 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 148019 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148020 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 |
| 148021 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 |
| 148022 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 148023 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 148024 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 148025 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 148026 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 148027 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148028 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148029 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148030 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 148031 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148032 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 148033 | 248, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 148034 | 188, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 148035 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 148036 | 173, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 148037 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 148038 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 |
| 148039 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 148040 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 148041 | }, |
| 148042 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 148043 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 148044 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 148045 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 148046 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 148047 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 148048 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64_lo |
| 148049 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3 |
| 148050 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 148051 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 148052 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 148053 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub |
| 148054 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub0 |
| 148055 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub1 |
| 148056 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 148057 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 148058 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 148059 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub3 |
| 148060 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148061 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 148062 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 148063 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 148064 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sube32 |
| 148065 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sube64 |
| 148066 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo32 |
| 148067 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64 |
| 148068 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 148069 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 148070 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 148071 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 148072 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 148073 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 148074 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 148075 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 148076 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubb |
| 148077 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 148078 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 148079 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 148080 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 148081 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 148082 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 148083 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 148084 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 148085 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 148086 | 106, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPRMul2_and_ZPR_3b |
| 148087 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPR_3b |
| 148088 | 106, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPRMul2_and_ZPR_3b |
| 148089 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub3 |
| 148090 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 148091 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 148092 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 148093 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 148094 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 148095 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 148096 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 148097 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 148098 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 148099 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 148100 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 148101 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 148102 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 148103 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 148104 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 148105 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 148106 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 148107 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 148108 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 148109 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 148110 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 148111 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148112 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148113 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 148114 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 148115 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 148116 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 148117 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148118 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 148119 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub |
| 148120 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 148121 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub |
| 148122 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 148123 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub |
| 148124 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 148125 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 148126 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 148127 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 148128 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 148129 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148130 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 148131 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 148132 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 148133 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 148134 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 148135 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 148136 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 148137 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 148138 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 148139 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 148140 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 148141 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 148142 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 148143 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 148144 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 148145 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 148146 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 148147 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 148148 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 148149 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 148150 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 148151 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 148152 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 148153 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 148154 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 148155 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 148156 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148157 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 148158 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 |
| 148159 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148160 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 148161 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 148162 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 148163 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 148164 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148165 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 148166 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 |
| 148167 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 148168 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 148169 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 148170 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 148171 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 148172 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148173 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148174 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148175 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 148176 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148177 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 148178 | 248, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 148179 | 173, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 148180 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 148181 | 188, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 148182 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 148183 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 |
| 148184 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 148185 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 148186 | }, |
| 148187 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 148188 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 148189 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 148190 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 148191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 148192 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 148193 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 148194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 148195 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 148196 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 148197 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 148198 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 148199 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 148200 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 148201 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 148202 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 148203 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 148204 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 148205 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148206 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 148207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 148208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 148209 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 148210 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 148211 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 148212 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 148213 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 148214 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 148215 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 148216 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 148217 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 148218 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 148219 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 148220 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 148221 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 148222 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 148223 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 148224 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 148225 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 148226 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 148227 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 148228 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 148229 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 148230 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 148231 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR_4b |
| 148232 | 105, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 148233 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR_4b |
| 148234 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 148235 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 148236 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 148237 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 148238 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 148239 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 148240 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 148241 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 148242 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 148243 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 148244 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 148245 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 148246 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 148247 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 148248 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 148249 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 148250 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 148251 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 148252 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 148253 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 148254 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 148255 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 148256 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148257 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148258 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 148259 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 148260 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 148261 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 148262 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148263 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 148264 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 148265 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 148266 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 148267 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 148268 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 148269 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 148270 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 148271 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 148272 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 148273 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 148274 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148275 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 148276 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 148277 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 148278 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 148279 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 148280 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 148281 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 148282 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 148283 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 148284 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 148285 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 148286 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 148287 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 148288 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 148289 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 148290 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 148291 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 148292 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 148293 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 148294 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 148295 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 148296 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 148297 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 148298 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 148299 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 148300 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 148301 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148302 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 148303 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 148304 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148305 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 148306 | 116, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 148307 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 148308 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 148309 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 148310 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 148311 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 148312 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 148313 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 148314 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 148315 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 148316 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 148317 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148318 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148319 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148320 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 148321 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 148322 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 148323 | 220, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 148324 | 189, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 148325 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 148326 | 171, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 148327 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 148328 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 148329 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 148330 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 148331 | }, |
| 148332 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 148333 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 148334 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 148335 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 148336 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 148337 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 148338 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64_lo |
| 148339 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 |
| 148340 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 148341 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 148342 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 148343 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 148344 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 148345 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 148346 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 148347 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 148348 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128_lo |
| 148349 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 |
| 148350 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148351 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 148352 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 148353 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 148354 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 148355 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 148356 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 148357 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 148358 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 148359 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 148360 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 148361 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 148362 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 148363 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 148364 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 148365 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 148366 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 148367 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 148368 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 148369 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 148370 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 148371 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 148372 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 148373 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 148374 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 148375 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 148376 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul2_Lo |
| 148377 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPR_4b |
| 148378 | 105, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 148379 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 |
| 148380 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 148381 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 148382 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 148383 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 148384 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 148385 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 148386 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 148387 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 148388 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 148389 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 148390 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 148391 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 148392 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 148393 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 148394 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 148395 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 148396 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 148397 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 148398 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 148399 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 148400 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 148401 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148402 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148403 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 148404 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 148405 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 148406 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 148407 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148408 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 148409 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub |
| 148410 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 148411 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub |
| 148412 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 148413 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub |
| 148414 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 148415 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 148416 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 148417 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 148418 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 148419 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148420 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 148421 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 148422 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 148423 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 148424 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 148425 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 148426 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 148427 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 148428 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 148429 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 148430 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 148431 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 148432 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 148433 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 148434 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 148435 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 148436 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 148437 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 148438 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 148439 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 148440 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 148441 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 148442 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 148443 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 148444 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 148445 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 148446 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148447 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 148448 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 148449 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148450 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 148451 | 116, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 148452 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 148453 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 148454 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 148455 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 148456 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 148457 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 148458 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 148459 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 148460 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 148461 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 148462 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148463 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148464 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148465 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 148466 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 148467 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 148468 | 220, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 148469 | 149, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 148470 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 148471 | 189, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 148472 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 148473 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 148474 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 148475 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 148476 | }, |
| 148477 | { // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 148478 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 148479 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:bsub_hi |
| 148480 | 56, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 148481 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0 |
| 148482 | 56, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 148483 | 65, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2 -> FPR64_lo |
| 148484 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3 |
| 148485 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_hi |
| 148486 | 8, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 148487 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:hsub_hi |
| 148488 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub |
| 148489 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub0 |
| 148490 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub1 |
| 148491 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0 |
| 148492 | 92, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 148493 | 98, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2 -> FPR128_0to7 |
| 148494 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub3 |
| 148495 | 40, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 148496 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:ssub_hi |
| 148497 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32 |
| 148498 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_hi |
| 148499 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sube32 |
| 148500 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sube64 |
| 148501 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo32 |
| 148502 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64 |
| 148503 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_0 |
| 148504 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1 |
| 148505 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2 |
| 148506 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3 |
| 148507 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4 |
| 148508 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5 |
| 148509 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6 |
| 148510 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7 |
| 148511 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubb |
| 148512 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd0 |
| 148513 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1 |
| 148514 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh0 |
| 148515 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1 |
| 148516 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubq0 |
| 148517 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubq1 |
| 148518 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs0 |
| 148519 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1 |
| 148520 | 92, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 148521 | 103, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 148522 | 93, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 148523 | 102, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2 -> ZPR_3b |
| 148524 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub3 |
| 148525 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_hi |
| 148526 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 148527 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 148528 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 148529 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 148530 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 148531 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 148532 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 148533 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 148534 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 148535 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 148536 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 148537 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 148538 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 148539 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 148540 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 148541 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 148542 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 148543 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 148544 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 148545 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 148546 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148547 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148548 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 148549 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 148550 | 8, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 148551 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 148552 | 40, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 148553 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 148554 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 148555 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 148556 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 148557 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 148558 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 148559 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 148560 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 148561 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 148562 | 10, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16_lo |
| 148563 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 148564 | 44, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148565 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 148566 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub1_then_psub |
| 148567 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 148568 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 148569 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 148570 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 148571 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 148572 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 148573 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 148574 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 148575 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 148576 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 148577 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 148578 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 148579 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 148580 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 148581 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 148582 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 148583 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 148584 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 148585 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 148586 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 148587 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 148588 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 148589 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 148590 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 148591 | 77, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 148592 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 148593 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 148594 | 75, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 148595 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 148596 | 113, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 148597 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 148598 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 148599 | 147, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 148600 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 148601 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 148602 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 148603 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 148604 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 148605 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 148606 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 148607 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148608 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148609 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148610 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 148611 | 128, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 148612 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 148613 | 224, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 148614 | 156, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 148615 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 148616 | 154, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 148617 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 148618 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 148619 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 148620 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 148621 | }, |
| 148622 | { // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 148623 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 148624 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 148625 | 65, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 148626 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 148627 | 65, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 148628 | 65, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 148629 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 148630 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 148631 | 10, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 148632 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 148633 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub |
| 148634 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub0 |
| 148635 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1 |
| 148636 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 148637 | 98, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 148638 | 98, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 148639 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 148640 | 44, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148641 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 148642 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 148643 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 148644 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube32 |
| 148645 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube64 |
| 148646 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo32 |
| 148647 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64 |
| 148648 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 148649 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 148650 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 148651 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 148652 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 148653 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 148654 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 148655 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 148656 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubb |
| 148657 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 148658 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 148659 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 148660 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 148661 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 148662 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 148663 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 148664 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 148665 | 98, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 148666 | 108, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul4_and_ZPR_3b |
| 148667 | 102, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_3b |
| 148668 | 106, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul2_and_ZPR_3b |
| 148669 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 148670 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 148671 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 148672 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 148673 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 148674 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 148675 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 148676 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 148677 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 148678 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 148679 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 148680 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 148681 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 148682 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 148683 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 148684 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 148685 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 148686 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 148687 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 148688 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 148689 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 148690 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 148691 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148692 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148693 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 148694 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 148695 | 10, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 148696 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 148697 | 44, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148698 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 148699 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 148700 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 148701 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 148702 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 148703 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 148704 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 148705 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 148706 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 148707 | 10, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 148708 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 148709 | 44, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 148710 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 148711 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 148712 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 148713 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 148714 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 148715 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 148716 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 148717 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 148718 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 148719 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 148720 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 148721 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 148722 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 148723 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 148724 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 148725 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 148726 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 148727 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 148728 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 148729 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 148730 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 148731 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 148732 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 148733 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 148734 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 148735 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 148736 | 79, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148737 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 148738 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 148739 | 79, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 148740 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 148741 | 116, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 148742 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 148743 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 148744 | 163, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148745 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 148746 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 148747 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 148748 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 148749 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 148750 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 148751 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 148752 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148753 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148754 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148755 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 148756 | 163, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 148757 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 148758 | 248, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 148759 | 193, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 148760 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 148761 | 188, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 148762 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 148763 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 148764 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 148765 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 148766 | }, |
| 148767 | { // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 148768 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 148769 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 148770 | 56, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 148771 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0 |
| 148772 | 56, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 148773 | 56, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 148774 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3 |
| 148775 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 148776 | 8, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 148777 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 148778 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:psub |
| 148779 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:psub0 |
| 148780 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1 |
| 148781 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0 |
| 148782 | 92, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 148783 | 92, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 148784 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3 |
| 148785 | 40, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 148786 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 148787 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32 |
| 148788 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 148789 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sube32 |
| 148790 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sube64 |
| 148791 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:subo32 |
| 148792 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64 |
| 148793 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 148794 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 148795 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 148796 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 148797 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 148798 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 148799 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 148800 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 148801 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubb |
| 148802 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 148803 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 148804 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 148805 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 148806 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 148807 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 148808 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 148809 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 148810 | 92, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 148811 | 109, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul4_and_ZPR_K |
| 148812 | 103, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPR_K |
| 148813 | 107, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPRMul2_and_ZPR_K |
| 148814 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3 |
| 148815 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 148816 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 148817 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 148818 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 148819 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 148820 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 148821 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 148822 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 148823 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 148824 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 148825 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 148826 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 148827 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 148828 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 148829 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 148830 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 148831 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 148832 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 148833 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 148834 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 148835 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 148836 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148837 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148838 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 148839 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 148840 | 8, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 148841 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 148842 | 40, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 148843 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 148844 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 148845 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 148846 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 148847 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 148848 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 148849 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 148850 | 7, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 148851 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 148852 | 8, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 148853 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 148854 | 40, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 148855 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 148856 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 148857 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 148858 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 148859 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 148860 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 148861 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 148862 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 148863 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 148864 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 148865 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 148866 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 148867 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 148868 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 148869 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 148870 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 148871 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 148872 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 148873 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 148874 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 148875 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 148876 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 148877 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 148878 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 148879 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 148880 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 148881 | 75, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 148882 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 148883 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 148884 | 75, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 148885 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 148886 | 110, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 148887 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 148888 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 148889 | 128, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 148890 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 148891 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 148892 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 148893 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 148894 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 148895 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 148896 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 148897 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 148898 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 148899 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 148900 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 148901 | 128, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 148902 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 148903 | 206, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 148904 | 194, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 148905 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 148906 | 195, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 148907 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 148908 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 148909 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 148910 | 0, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 148911 | }, |
| 148912 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 148913 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 148914 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:bsub_hi |
| 148915 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 148916 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0 |
| 148917 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 148918 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 148919 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3 |
| 148920 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_hi |
| 148921 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 148922 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:hsub_hi |
| 148923 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:psub |
| 148924 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:psub0 |
| 148925 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:psub1 |
| 148926 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0 |
| 148927 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 148928 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 148929 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3 |
| 148930 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 148931 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:ssub_hi |
| 148932 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32 |
| 148933 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_hi |
| 148934 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sube32 |
| 148935 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sube64 |
| 148936 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:subo32 |
| 148937 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:subo64 |
| 148938 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0 |
| 148939 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1 |
| 148940 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2 |
| 148941 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3 |
| 148942 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4 |
| 148943 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5 |
| 148944 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6 |
| 148945 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7 |
| 148946 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubb |
| 148947 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd0 |
| 148948 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1 |
| 148949 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh0 |
| 148950 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1 |
| 148951 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq0 |
| 148952 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq1 |
| 148953 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs0 |
| 148954 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1 |
| 148955 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 148956 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_K |
| 148957 | 101, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 148958 | 93, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 148959 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3 |
| 148960 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_hi |
| 148961 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 148962 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 148963 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 148964 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 148965 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 148966 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 148967 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 148968 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 148969 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 148970 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 148971 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 148972 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 148973 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 148974 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 148975 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 148976 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 148977 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 148978 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 148979 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 148980 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 148981 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 148982 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 148983 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 148984 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 148985 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 148986 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 148987 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 148988 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 148989 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 148990 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 148991 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 148992 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 148993 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 148994 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 148995 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 148996 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 148997 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 148998 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 148999 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 149000 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 149001 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 149002 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 149003 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 149004 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 149005 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 149006 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 149007 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 149008 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 149009 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 149010 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 149011 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 149012 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 149013 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 149014 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 149015 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 149016 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 149017 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 149018 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 149019 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 149020 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 149021 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 149022 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 149023 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 149024 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 149025 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 149026 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 149027 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 149028 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 149029 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 149030 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 149031 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 149032 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 149033 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 149034 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 149035 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 149036 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 149037 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 149038 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 149039 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 149040 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 149041 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 149042 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149043 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149044 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149045 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 149046 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 149047 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 149048 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 149049 | 196, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 149050 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 149051 | 155, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 149052 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 149053 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 149054 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 149055 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 149056 | }, |
| 149057 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 149058 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 149059 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 149060 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 149061 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 149062 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 149063 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 149064 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 |
| 149065 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 149066 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 149067 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 149068 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 149069 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 149070 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 149071 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 149072 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 149073 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 149074 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 |
| 149075 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 149076 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 149077 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 149078 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 149079 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 149080 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 149081 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 149082 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 149083 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 149084 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 149085 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 149086 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 149087 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 149088 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 149089 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 149090 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 149091 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 149092 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 149093 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 149094 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 149095 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 149096 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 149097 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 149098 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 149099 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 149100 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 149101 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 149102 | 107, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 149103 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPR_K |
| 149104 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 |
| 149105 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 149106 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 149107 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 149108 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 149109 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 149110 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 149111 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 149112 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 149113 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 149114 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 149115 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 149116 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 149117 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 149118 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 149119 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 149120 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 149121 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 149122 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 149123 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 149124 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 149125 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 149126 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149127 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149128 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 149129 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 149130 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 149131 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 149132 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 149133 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 149134 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 149135 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 149136 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 149137 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 149138 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 149139 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 149140 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 149141 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 149142 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 149143 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 149144 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 149145 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 149146 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 149147 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 149148 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 149149 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 149150 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 149151 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 149152 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 149153 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 149154 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 149155 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 149156 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 149157 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 149158 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 149159 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 149160 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 149161 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 149162 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 149163 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 149164 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 149165 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 149166 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 149167 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 149168 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 149169 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 149170 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 149171 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 149172 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 149173 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 149174 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 149175 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 149176 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 149177 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 149178 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 149179 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 149180 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 149181 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 149182 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 149183 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 149184 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 149185 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 149186 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 149187 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149188 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149189 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149190 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 149191 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 149192 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 149193 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 149194 | 195, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 149195 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 149196 | 172, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 149197 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 149198 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 149199 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 149200 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 149201 | }, |
| 149202 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 149203 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 149204 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 149205 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 149206 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 149207 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 149208 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 149209 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3 |
| 149210 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 149211 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 149212 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 149213 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub |
| 149214 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 149215 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 149216 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 149217 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 149218 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 149219 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3 |
| 149220 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 149221 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 149222 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 149223 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 149224 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 149225 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 149226 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 149227 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 149228 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 149229 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 149230 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 149231 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 149232 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 149233 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 149234 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 149235 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 149236 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 149237 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 149238 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 149239 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 149240 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 149241 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 149242 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 149243 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 149244 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 149245 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 149246 | 107, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_K |
| 149247 | 103, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPR_K |
| 149248 | 101, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 149249 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3 |
| 149250 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 149251 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 149252 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 149253 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 149254 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 149255 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 149256 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 149257 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 149258 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 149259 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 149260 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 149261 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 149262 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 149263 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 149264 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 149265 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 149266 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 149267 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 149268 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 149269 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 149270 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 149271 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149272 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149273 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 149274 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 149275 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 149276 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 149277 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 149278 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 149279 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 149280 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 149281 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 149282 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 149283 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 149284 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 149285 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 149286 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 149287 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 149288 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 149289 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 149290 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 149291 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 149292 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 149293 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 149294 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 149295 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 149296 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 149297 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 149298 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 149299 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 149300 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 149301 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 149302 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 149303 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 149304 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 149305 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 149306 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 149307 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 149308 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 149309 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 149310 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 149311 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 149312 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 149313 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 149314 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 149315 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 149316 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 149317 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 149318 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 149319 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 149320 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 149321 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 149322 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 149323 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 149324 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 149325 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 149326 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 149327 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 149328 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 149329 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 149330 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 149331 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 149332 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149333 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149334 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149335 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 149336 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 149337 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 149338 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 149339 | 172, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 149340 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 149341 | 196, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 149342 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 149343 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 149344 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 149345 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 149346 | }, |
| 149347 | { // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 149348 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 149349 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 149350 | 56, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 149351 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 149352 | 65, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 149353 | 65, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 149354 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 149355 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 149356 | 8, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 149357 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 149358 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 149359 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 149360 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 149361 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 149362 | 98, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 149363 | 98, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 149364 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 149365 | 40, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 149366 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 149367 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 149368 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 149369 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 149370 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 149371 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 149372 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 149373 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 149374 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 149375 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 149376 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 149377 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 149378 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 149379 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 149380 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 149381 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 149382 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 149383 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 149384 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 149385 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 149386 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 149387 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 149388 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 149389 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 149390 | 92, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 149391 | 93, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR |
| 149392 | 108, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 149393 | 102, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR_3b |
| 149394 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 149395 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 149396 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 149397 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 149398 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 149399 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 149400 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 149401 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 149402 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 149403 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 149404 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 149405 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 149406 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 149407 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 149408 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 149409 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 149410 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 149411 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 149412 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 149413 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 149414 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 149415 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 149416 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149417 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149418 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 149419 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 149420 | 10, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 149421 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 149422 | 44, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 149423 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 149424 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 149425 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 149426 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 149427 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 149428 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 149429 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 149430 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 149431 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 149432 | 10, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 149433 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 149434 | 44, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 149435 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 149436 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 149437 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 149438 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 149439 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 149440 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 149441 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 149442 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 149443 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 149444 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 149445 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 149446 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 149447 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 149448 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 149449 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 149450 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 149451 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 149452 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 149453 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 149454 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 149455 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 149456 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 149457 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 149458 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 149459 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 149460 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 149461 | 79, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 149462 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 149463 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 149464 | 77, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 149465 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 149466 | 115, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 149467 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 149468 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 149469 | 163, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 149470 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 149471 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 149472 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 149473 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 149474 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 149475 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 149476 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 149477 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149478 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149479 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149480 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 149481 | 147, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 149482 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 149483 | 241, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 149484 | 197, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 149485 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 149486 | 193, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 149487 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 149488 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 149489 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 149490 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 149491 | }, |
| 149492 | { // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 149493 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 149494 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 149495 | 56, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 149496 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0 |
| 149497 | 56, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 149498 | 56, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 149499 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3 |
| 149500 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 149501 | 8, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 149502 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 149503 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:psub |
| 149504 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:psub0 |
| 149505 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1 |
| 149506 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0 |
| 149507 | 92, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 149508 | 92, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 149509 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3 |
| 149510 | 40, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 149511 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 149512 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32 |
| 149513 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 149514 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sube32 |
| 149515 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sube64 |
| 149516 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:subo32 |
| 149517 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64 |
| 149518 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 149519 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 149520 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 149521 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 149522 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 149523 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 149524 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 149525 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 149526 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubb |
| 149527 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 149528 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 149529 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 149530 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 149531 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 149532 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 149533 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 149534 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 149535 | 92, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 149536 | 93, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPR |
| 149537 | 109, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_K |
| 149538 | 103, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPR_K |
| 149539 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3 |
| 149540 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 149541 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 149542 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 149543 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 149544 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 149545 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 149546 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 149547 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 149548 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 149549 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 149550 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 149551 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 149552 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 149553 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 149554 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 149555 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 149556 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 149557 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 149558 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 149559 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 149560 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 149561 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149562 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149563 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 149564 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 149565 | 8, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 149566 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 149567 | 40, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 149568 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 149569 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 149570 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 149571 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 149572 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 149573 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 149574 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 149575 | 7, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 149576 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 149577 | 8, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 149578 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 149579 | 40, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 149580 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 149581 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 149582 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 149583 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 149584 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 149585 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 149586 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 149587 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 149588 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 149589 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 149590 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 149591 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 149592 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 149593 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 149594 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 149595 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 149596 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 149597 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 149598 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 149599 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 149600 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 149601 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 149602 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 149603 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 149604 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 149605 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 149606 | 75, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 149607 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 149608 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 149609 | 75, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 149610 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 149611 | 110, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 149612 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 149613 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 149614 | 128, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 149615 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 149616 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 149617 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 149618 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 149619 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 149620 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 149621 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 149622 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149623 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149624 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149625 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 149626 | 128, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 149627 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 149628 | 206, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 149629 | 198, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 149630 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 149631 | 194, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 149632 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 149633 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 149634 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 149635 | 0, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 149636 | }, |
| 149637 | { // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 149638 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 149639 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 149640 | 56, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 149641 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 149642 | 56, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64 |
| 149643 | 65, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 149644 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 149645 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 149646 | 8, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 149647 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 149648 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub |
| 149649 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub0 |
| 149650 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1 |
| 149651 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 149652 | 92, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128 |
| 149653 | 98, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 149654 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 149655 | 40, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 149656 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 149657 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 149658 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 149659 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube32 |
| 149660 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube64 |
| 149661 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo32 |
| 149662 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64 |
| 149663 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 149664 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 149665 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 149666 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 149667 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 149668 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 149669 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 149670 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 149671 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubb |
| 149672 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 149673 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 149674 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 149675 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 149676 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 149677 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 149678 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 149679 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 149680 | 92, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 149681 | 96, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul2 |
| 149682 | 93, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR |
| 149683 | 108, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul4_and_ZPR_3b |
| 149684 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 149685 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 149686 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 149687 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 149688 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 149689 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 149690 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 149691 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 149692 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 149693 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 149694 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 149695 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 149696 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 149697 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 149698 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 149699 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 149700 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 149701 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 149702 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 149703 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 149704 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 149705 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 149706 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149707 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149708 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 149709 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 149710 | 8, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16 |
| 149711 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 149712 | 40, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32 |
| 149713 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 149714 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 149715 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 149716 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 149717 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 149718 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 149719 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 149720 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 149721 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 149722 | 10, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 149723 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 149724 | 44, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 149725 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 149726 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 149727 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 149728 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 149729 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 149730 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 149731 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 149732 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 149733 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 149734 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 149735 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 149736 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 149737 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 149738 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 149739 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 149740 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 149741 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 149742 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 149743 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 149744 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 149745 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 149746 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 149747 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 149748 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 149749 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 149750 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 149751 | 77, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 149752 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 149753 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 149754 | 75, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD |
| 149755 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 149756 | 113, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 149757 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 149758 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 149759 | 147, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 149760 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 149761 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 149762 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 149763 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 149764 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 149765 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 149766 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 149767 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149768 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149769 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149770 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 149771 | 128, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ |
| 149772 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 149773 | 224, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 149774 | 134, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2 |
| 149775 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 149776 | 197, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 149777 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 149778 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 149779 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 149780 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 149781 | }, |
| 149782 | { // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 149783 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 149784 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 149785 | 56, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 149786 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0 |
| 149787 | 56, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 149788 | 56, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 149789 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3 |
| 149790 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 149791 | 8, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 149792 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 149793 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:psub |
| 149794 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:psub0 |
| 149795 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:psub1 |
| 149796 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0 |
| 149797 | 92, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 149798 | 92, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 149799 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub3 |
| 149800 | 40, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 149801 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 149802 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32 |
| 149803 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 149804 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sube32 |
| 149805 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sube64 |
| 149806 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:subo32 |
| 149807 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64 |
| 149808 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 149809 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 149810 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 149811 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 149812 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 149813 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 149814 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 149815 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 149816 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubb |
| 149817 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 149818 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 149819 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 149820 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 149821 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 149822 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 149823 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 149824 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 149825 | 92, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 149826 | 99, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul2_Hi |
| 149827 | 93, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPR |
| 149828 | 109, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPRMul4_and_ZPR_K |
| 149829 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub3 |
| 149830 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 149831 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 149832 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 149833 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 149834 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 149835 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 149836 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 149837 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 149838 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 149839 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 149840 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 149841 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 149842 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 149843 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 149844 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 149845 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 149846 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 149847 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 149848 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 149849 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 149850 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 149851 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149852 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149853 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 149854 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 149855 | 8, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 149856 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 149857 | 40, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 149858 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 149859 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub |
| 149860 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 149861 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub |
| 149862 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 149863 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub |
| 149864 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 149865 | 7, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 149866 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 149867 | 8, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 149868 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 149869 | 40, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 149870 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 149871 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 149872 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 149873 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 149874 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 149875 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 149876 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 149877 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 149878 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 149879 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 149880 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 149881 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 149882 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 149883 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 149884 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 149885 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 149886 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 149887 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 149888 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 149889 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 149890 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 149891 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 149892 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 149893 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 149894 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 149895 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 149896 | 75, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 149897 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 |
| 149898 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 |
| 149899 | 75, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 149900 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 149901 | 110, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 149902 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 149903 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 149904 | 128, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 149905 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 |
| 149906 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 |
| 149907 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 149908 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 149909 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 149910 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 149911 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 149912 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 149913 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 149914 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 149915 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 149916 | 128, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 149917 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 149918 | 206, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 149919 | 148, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 149920 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 |
| 149921 | 198, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 149922 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 |
| 149923 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 |
| 149924 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 149925 | 0, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 149926 | }, |
| 149927 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 149928 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 149929 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:bsub_hi |
| 149930 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 149931 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0 |
| 149932 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1 -> FPR64_lo |
| 149933 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2 -> FPR64_lo |
| 149934 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3 |
| 149935 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_hi |
| 149936 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 149937 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:hsub_hi |
| 149938 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:psub |
| 149939 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:psub0 |
| 149940 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:psub1 |
| 149941 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0 |
| 149942 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1 -> FPR128_lo |
| 149943 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2 -> FPR128_lo |
| 149944 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3 |
| 149945 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 149946 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:ssub_hi |
| 149947 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32 |
| 149948 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_hi |
| 149949 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sube32 |
| 149950 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sube64 |
| 149951 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:subo32 |
| 149952 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:subo64 |
| 149953 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0 |
| 149954 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1 |
| 149955 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2 |
| 149956 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3 |
| 149957 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4 |
| 149958 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5 |
| 149959 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6 |
| 149960 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7 |
| 149961 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubb |
| 149962 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd0 |
| 149963 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1 |
| 149964 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh0 |
| 149965 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1 |
| 149966 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq0 |
| 149967 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubq1 |
| 149968 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs0 |
| 149969 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1 |
| 149970 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub -> FPR128_0to7 |
| 149971 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_3b |
| 149972 | 105, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 149973 | 97, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2 -> ZPR_4b |
| 149974 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3 |
| 149975 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_hi |
| 149976 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 149977 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 149978 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 149979 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 149980 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 149981 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 149982 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 149983 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 149984 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 149985 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 149986 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 149987 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 149988 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 149989 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 149990 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 149991 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 149992 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 149993 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 149994 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 149995 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 149996 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 149997 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 149998 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 149999 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 150000 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 150001 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 150002 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150003 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 150004 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub |
| 150005 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 150006 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub |
| 150007 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 150008 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub |
| 150009 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 150010 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 150011 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 150012 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 150013 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 150014 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150015 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 150016 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 150017 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 150018 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 150019 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 150020 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 150021 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 150022 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 150023 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 150024 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 150025 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 150026 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 150027 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 150028 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 150029 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 150030 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 150031 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 150032 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 150033 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 150034 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 150035 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 150036 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 150037 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 150038 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 150039 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 150040 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 150041 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150042 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 150043 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub2_dsub3 |
| 150044 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150045 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 150046 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 150047 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 150048 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 150049 | 140, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 150050 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 150051 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:qsub2_qsub3 |
| 150052 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 150053 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 150054 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 150055 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 150056 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 150057 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150058 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150059 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150060 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 150061 | 146, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 150062 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 150063 | 222, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 150064 | 199, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 150065 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 150066 | 171, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 150067 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 150068 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub2_zsub3 |
| 150069 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 150070 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 150071 | }, |
| 150072 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 150073 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 150074 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 150075 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64_lo |
| 150076 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 150077 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64_lo |
| 150078 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64_lo |
| 150079 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3 |
| 150080 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 150081 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16_lo |
| 150082 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 150083 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:psub |
| 150084 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 150085 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 150086 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 150087 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128_0to7 |
| 150088 | 94, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128_lo |
| 150089 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3 |
| 150090 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150091 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 150092 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 150093 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 150094 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 150095 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 150096 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 150097 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 150098 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 150099 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 150100 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 150101 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 150102 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 150103 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 150104 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 150105 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 150106 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 150107 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 150108 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 150109 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 150110 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 150111 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 150112 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 150113 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 150114 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 150115 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128_0to7 |
| 150116 | 106, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_3b |
| 150117 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPR_3b |
| 150118 | 105, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 150119 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3 |
| 150120 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 150121 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 150122 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 150123 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 150124 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 150125 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 150126 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 150127 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 150128 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 150129 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 150130 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 150131 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 150132 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 150133 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 150134 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 150135 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 150136 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 150137 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 150138 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 150139 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 150140 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 150141 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150142 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150143 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 150144 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 150145 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 150146 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 150147 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150148 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 150149 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub |
| 150150 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 150151 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub |
| 150152 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 150153 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub |
| 150154 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 150155 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 150156 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 150157 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 150158 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 150159 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150160 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 150161 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 150162 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 150163 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 150164 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 150165 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 150166 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 150167 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 150168 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 150169 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 150170 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 150171 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 150172 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 150173 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 150174 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 150175 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 150176 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 150177 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 150178 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 150179 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 150180 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 150181 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 150182 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 150183 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 150184 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 150185 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 150186 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150187 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 150188 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 |
| 150189 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150190 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 150191 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 150192 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 150193 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 150194 | 146, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 150195 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 150196 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 |
| 150197 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 150198 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 150199 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 150200 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 150201 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 150202 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150203 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150204 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150205 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 150206 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 150207 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 150208 | 242, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 150209 | 173, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 150210 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 150211 | 199, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 150212 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 150213 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 |
| 150214 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 150215 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 150216 | }, |
| 150217 | { // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 150218 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 150219 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:bsub_hi |
| 150220 | 56, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 150221 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0 |
| 150222 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1 -> FPR64_lo |
| 150223 | 65, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2 -> FPR64_lo |
| 150224 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3 |
| 150225 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_hi |
| 150226 | 8, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 150227 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:hsub_hi |
| 150228 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub |
| 150229 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub0 |
| 150230 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub1 |
| 150231 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0 |
| 150232 | 98, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1 -> FPR128_0to7 |
| 150233 | 98, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2 -> FPR128_0to7 |
| 150234 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub3 |
| 150235 | 40, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 150236 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:ssub_hi |
| 150237 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32 |
| 150238 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_hi |
| 150239 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sube32 |
| 150240 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sube64 |
| 150241 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo32 |
| 150242 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64 |
| 150243 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_0 |
| 150244 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1 |
| 150245 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2 |
| 150246 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3 |
| 150247 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4 |
| 150248 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5 |
| 150249 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6 |
| 150250 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7 |
| 150251 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubb |
| 150252 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd0 |
| 150253 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1 |
| 150254 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh0 |
| 150255 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1 |
| 150256 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubq0 |
| 150257 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubq1 |
| 150258 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs0 |
| 150259 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1 |
| 150260 | 92, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 150261 | 103, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 150262 | 108, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_3b |
| 150263 | 102, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2 -> ZPR_3b |
| 150264 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub3 |
| 150265 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_hi |
| 150266 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 150267 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 150268 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 150269 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 150270 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 150271 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 150272 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 150273 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 150274 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 150275 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 150276 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 150277 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 150278 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 150279 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 150280 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 150281 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 150282 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 150283 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 150284 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 150285 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 150286 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150287 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150288 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 150289 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 150290 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16_lo |
| 150291 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 150292 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150293 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 150294 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub |
| 150295 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 150296 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub |
| 150297 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 150298 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub |
| 150299 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 150300 | 7, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 150301 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 150302 | 10, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16_lo |
| 150303 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 150304 | 44, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150305 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 150306 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:psub1_then_psub |
| 150307 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 150308 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 150309 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 150310 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 150311 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 150312 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 150313 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 150314 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 150315 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 150316 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 150317 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 150318 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 150319 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 150320 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 150321 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 150322 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 150323 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 150324 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 150325 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 150326 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 150327 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 150328 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 150329 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 150330 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 150331 | 79, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150332 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 |
| 150333 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub2_dsub3 |
| 150334 | 77, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 150335 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 150336 | 115, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 150337 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 150338 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 150339 | 163, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 150340 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 |
| 150341 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:qsub2_qsub3 |
| 150342 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 150343 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 150344 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 150345 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 150346 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 150347 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150348 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150349 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150350 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 150351 | 147, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 150352 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 150353 | 241, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 150354 | 201, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 150355 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 |
| 150356 | 193, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 150357 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 |
| 150358 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub2_zsub3 |
| 150359 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 150360 | 0, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 150361 | }, |
| 150362 | { // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 150363 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub -> FPR8 |
| 150364 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub_hi |
| 150365 | 56, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub -> FPR64 |
| 150366 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0 |
| 150367 | 56, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1 -> FPR64 |
| 150368 | 65, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2 -> FPR64_lo |
| 150369 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3 |
| 150370 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_hi |
| 150371 | 8, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub -> FPR16 |
| 150372 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub_hi |
| 150373 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub |
| 150374 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub0 |
| 150375 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1 |
| 150376 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0 |
| 150377 | 92, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1 -> FPR128 |
| 150378 | 98, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2 -> FPR128_0to7 |
| 150379 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3 |
| 150380 | 40, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub -> FPR32 |
| 150381 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub_hi |
| 150382 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32 |
| 150383 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_hi |
| 150384 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube32 |
| 150385 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube64 |
| 150386 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo32 |
| 150387 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64 |
| 150388 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0 |
| 150389 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1 |
| 150390 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2 |
| 150391 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3 |
| 150392 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4 |
| 150393 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5 |
| 150394 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6 |
| 150395 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7 |
| 150396 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubb |
| 150397 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd0 |
| 150398 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1 |
| 150399 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh0 |
| 150400 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1 |
| 150401 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq0 |
| 150402 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq1 |
| 150403 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs0 |
| 150404 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1 |
| 150405 | 92, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub -> FPR128 |
| 150406 | 107, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0 -> ZPRMul2_and_ZPR_K |
| 150407 | 103, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1 -> ZPR_K |
| 150408 | 108, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2 -> ZPRMul4_and_ZPR_3b |
| 150409 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3 |
| 150410 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_hi |
| 150411 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq0 |
| 150412 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq1 |
| 150413 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd0 |
| 150414 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1 |
| 150415 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq0 |
| 150416 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq1 |
| 150417 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 150418 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 150419 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd0 |
| 150420 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1 |
| 150421 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq0 |
| 150422 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq1 |
| 150423 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs0 |
| 150424 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1 |
| 150425 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 150426 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 150427 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 150428 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 150429 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 150430 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 150431 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150432 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150433 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub -> FPR8 |
| 150434 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub_hi |
| 150435 | 8, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub -> FPR16 |
| 150436 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub_hi |
| 150437 | 40, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub -> FPR32 |
| 150438 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub_hi |
| 150439 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub |
| 150440 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub_hi |
| 150441 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub |
| 150442 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub_hi |
| 150443 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub |
| 150444 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub_hi |
| 150445 | 7, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub -> FPR8 |
| 150446 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub_hi |
| 150447 | 10, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub -> FPR16_lo |
| 150448 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub_hi |
| 150449 | 44, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150450 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub_hi |
| 150451 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1_then_psub |
| 150452 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_then_dsub_hi |
| 150453 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3_then_dsub_hi |
| 150454 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_then_dsub_hi |
| 150455 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32 |
| 150456 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32_hi |
| 150457 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32 |
| 150458 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_hi |
| 150459 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32 |
| 150460 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32_hi |
| 150461 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32 |
| 150462 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_hi |
| 150463 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32 |
| 150464 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32_hi |
| 150465 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32 |
| 150466 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_hi |
| 150467 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32 |
| 150468 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32_hi |
| 150469 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32 |
| 150470 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32_hi |
| 150471 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_then_zsub_hi |
| 150472 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3_then_zsub_hi |
| 150473 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_then_zsub_hi |
| 150474 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1 |
| 150475 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1_dsub2 |
| 150476 | 77, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 150477 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2_dsub3 |
| 150478 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_dsub3 |
| 150479 | 75, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1 -> DD |
| 150480 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 150481 | 113, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 150482 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1 |
| 150483 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1_qsub2 |
| 150484 | 147, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 150485 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2_qsub3 |
| 150486 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_qsub3 |
| 150487 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 150488 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0_x8sub_1 |
| 150489 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_x8sub_3 |
| 150490 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_x8sub_5 |
| 150491 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_x8sub_7 |
| 150492 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150493 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150494 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150495 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_subo64_then_sub_32 |
| 150496 | 128, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1 -> QQ |
| 150497 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 150498 | 224, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 150499 | 172, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 150500 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1_zsub2 |
| 150501 | 201, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 150502 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2_zsub3 |
| 150503 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_zsub3 |
| 150504 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub2 |
| 150505 | 0, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub3 |
| 150506 | }, |
| 150507 | { // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 150508 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 150509 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 150510 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 150511 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 150512 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 150513 | 56, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 150514 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 |
| 150515 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 150516 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 150517 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 150518 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 150519 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 150520 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 150521 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 150522 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 150523 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 150524 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 |
| 150525 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 150526 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 150527 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 150528 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 150529 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 150530 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 150531 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 150532 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 150533 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 150534 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 150535 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 150536 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 150537 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 150538 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 150539 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 150540 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 150541 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 150542 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 150543 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 150544 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 150545 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 150546 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 150547 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 150548 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 150549 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 150550 | 92, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 150551 | 103, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR_K |
| 150552 | 104, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 150553 | 93, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR |
| 150554 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 |
| 150555 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 150556 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 150557 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 150558 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 150559 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 150560 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 150561 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 150562 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 150563 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 150564 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 150565 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 150566 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 150567 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 150568 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 150569 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 150570 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 150571 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 150572 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 150573 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 150574 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 150575 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 150576 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150577 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150578 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 150579 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 150580 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 150581 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 150582 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 150583 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 150584 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub |
| 150585 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 150586 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub |
| 150587 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 150588 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub |
| 150589 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 150590 | 7, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 150591 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 150592 | 8, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 150593 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 150594 | 40, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 150595 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 150596 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 150597 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 150598 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 150599 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 150600 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 150601 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 150602 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 150603 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 150604 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 150605 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 150606 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 150607 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 150608 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 150609 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 150610 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 150611 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 150612 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 150613 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 150614 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 150615 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 150616 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 150617 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 150618 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 150619 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 150620 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 150621 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 150622 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 150623 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 150624 | 75, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 150625 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 150626 | 110, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 150627 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 150628 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 150629 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 150630 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 150631 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 150632 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 150633 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 150634 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 150635 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 150636 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 150637 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150638 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150639 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150640 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 150641 | 128, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 150642 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 150643 | 206, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 150644 | 202, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 150645 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 150646 | 170, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 150647 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 150648 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 150649 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 150650 | 0, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 150651 | }, |
| 150652 | { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 150653 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 150654 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 150655 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 150656 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 150657 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 150658 | 56, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 150659 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 |
| 150660 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 150661 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 150662 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 150663 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 150664 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 150665 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 150666 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 150667 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 150668 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 150669 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 |
| 150670 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 150671 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 150672 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 150673 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 150674 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 150675 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 150676 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 150677 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 150678 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 150679 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 150680 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 150681 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 150682 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 150683 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 150684 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 150685 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 150686 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 150687 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 150688 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 150689 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 150690 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 150691 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 150692 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 150693 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 150694 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 150695 | 92, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 150696 | 107, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_K |
| 150697 | 103, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR_K |
| 150698 | 104, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 150699 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 |
| 150700 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 150701 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 150702 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 150703 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 150704 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 150705 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 150706 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 150707 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 150708 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 150709 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 150710 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 150711 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 150712 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 150713 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 150714 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 150715 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 150716 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 150717 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 150718 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 150719 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 150720 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 150721 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150722 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150723 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 150724 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 150725 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 150726 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 150727 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 150728 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 150729 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub |
| 150730 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 150731 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub |
| 150732 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 150733 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub |
| 150734 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 150735 | 7, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 150736 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 150737 | 8, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 150738 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 150739 | 40, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 150740 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 150741 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 150742 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 150743 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 150744 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 150745 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 150746 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 150747 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 150748 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 150749 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 150750 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 150751 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 150752 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 150753 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 150754 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 150755 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 150756 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 150757 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 150758 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 150759 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 150760 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 150761 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 150762 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 150763 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 150764 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 150765 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 150766 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 150767 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 150768 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 150769 | 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 150770 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 150771 | 110, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 150772 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 150773 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 150774 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 150775 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 150776 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 150777 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 150778 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 150779 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 150780 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 150781 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 150782 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150783 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150784 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150785 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 150786 | 128, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 150787 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 150788 | 206, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 150789 | 172, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 150790 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 150791 | 202, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 150792 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 150793 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 150794 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 150795 | 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 150796 | }, |
| 150797 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 150798 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 150799 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 150800 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 150801 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 150802 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 150803 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 150804 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 150805 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 150806 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 150807 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 150808 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 150809 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 150810 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 150811 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 150812 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 150813 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 150814 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 150815 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150816 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 150817 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 150818 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 150819 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 150820 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 150821 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 150822 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 150823 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 150824 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 150825 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 150826 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 150827 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 150828 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 150829 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 150830 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 150831 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 150832 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 150833 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 150834 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 150835 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 150836 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 150837 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 150838 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 150839 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 150840 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 150841 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR_3b |
| 150842 | 108, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 150843 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR_3b |
| 150844 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 150845 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 150846 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 150847 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 150848 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 150849 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 150850 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 150851 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 150852 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 150853 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 150854 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 150855 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 150856 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 150857 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 150858 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 150859 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 150860 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 150861 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 150862 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 150863 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 150864 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 150865 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 150866 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 150867 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 150868 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 150869 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 150870 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 150871 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 150872 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150873 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 150874 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 150875 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 150876 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 150877 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 150878 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 150879 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 150880 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 150881 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 150882 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 150883 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 150884 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150885 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 150886 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 150887 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 150888 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 150889 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 150890 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 150891 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 150892 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 150893 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 150894 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 150895 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 150896 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 150897 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 150898 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 150899 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 150900 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 150901 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 150902 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 150903 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 150904 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 150905 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 150906 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 150907 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 150908 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 150909 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 150910 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 150911 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150912 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 150913 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 150914 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 150915 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 150916 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 150917 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 150918 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 150919 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 150920 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 150921 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 150922 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 150923 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 150924 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 150925 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 150926 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 150927 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 150928 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 150929 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 150930 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 150931 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 150932 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 150933 | 248, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 150934 | 203, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 150935 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 150936 | 193, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 150937 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 150938 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 150939 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 150940 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 150941 | }, |
| 150942 | { // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 150943 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 150944 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 150945 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 150946 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 150947 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 150948 | 65, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 150949 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3 |
| 150950 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 150951 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 150952 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 150953 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub |
| 150954 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub0 |
| 150955 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1 |
| 150956 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 150957 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 150958 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 150959 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3 |
| 150960 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 150961 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 150962 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 150963 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 150964 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube32 |
| 150965 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube64 |
| 150966 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo32 |
| 150967 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64 |
| 150968 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 150969 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 150970 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 150971 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 150972 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 150973 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 150974 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 150975 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 150976 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubb |
| 150977 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 150978 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 150979 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 150980 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 150981 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 150982 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 150983 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 150984 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 150985 | 98, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 150986 | 106, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul2_and_ZPR_3b |
| 150987 | 102, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_3b |
| 150988 | 108, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul4_and_ZPR_3b |
| 150989 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3 |
| 150990 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 150991 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 150992 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 150993 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 150994 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 150995 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 150996 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 150997 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 150998 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 150999 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 151000 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 151001 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 151002 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 151003 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 151004 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 151005 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 151006 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 151007 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 151008 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 151009 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 151010 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 151011 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151012 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151013 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 151014 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 151015 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 151016 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 151017 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151018 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 151019 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub |
| 151020 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 151021 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub |
| 151022 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 151023 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub |
| 151024 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 151025 | 7, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 151026 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 151027 | 10, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 151028 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 151029 | 44, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151030 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 151031 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 151032 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 151033 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 151034 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 151035 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 151036 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 151037 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 151038 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 151039 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 151040 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 151041 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 151042 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 151043 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 151044 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 151045 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 151046 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 151047 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 151048 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 151049 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 151050 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 151051 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 151052 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 151053 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 151054 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 151055 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 151056 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 151057 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 |
| 151058 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 |
| 151059 | 79, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 151060 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 |
| 151061 | 116, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 151062 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 151063 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 151064 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 151065 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 |
| 151066 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 |
| 151067 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 151068 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 151069 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 151070 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 151071 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 151072 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151073 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151074 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151075 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 151076 | 163, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 151077 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 |
| 151078 | 248, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 151079 | 173, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 151080 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 |
| 151081 | 203, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 151082 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 |
| 151083 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 |
| 151084 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 151085 | 0, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 151086 | }, |
| 151087 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 151088 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 151089 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 151090 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 151091 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 151092 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 151093 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 151094 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3 |
| 151095 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 151096 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 151097 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 151098 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub |
| 151099 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 151100 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 151101 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 151102 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 151103 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 151104 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3 |
| 151105 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151106 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 151107 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 151108 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 151109 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 151110 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 151111 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 151112 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 151113 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 151114 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 151115 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 151116 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 151117 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 151118 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 151119 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 151120 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 151121 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 151122 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 151123 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 151124 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 151125 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 151126 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 151127 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 151128 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 151129 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 151130 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 151131 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_4b |
| 151132 | 104, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 151133 | 93, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 151134 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3 |
| 151135 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 151136 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 151137 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 151138 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 151139 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 151140 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 151141 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 151142 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 151143 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 151144 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 151145 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 151146 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 151147 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 151148 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 151149 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 151150 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 151151 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 151152 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 151153 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 151154 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 151155 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 151156 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151157 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151158 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 151159 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 151160 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 151161 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 151162 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 151163 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 151164 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub |
| 151165 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 151166 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub |
| 151167 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 151168 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub |
| 151169 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 151170 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 151171 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 151172 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 151173 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 151174 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 151175 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 151176 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 151177 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 151178 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 151179 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 151180 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 151181 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 151182 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 151183 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 151184 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 151185 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 151186 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 151187 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 151188 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 151189 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 151190 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 151191 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 151192 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 151193 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 151194 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 151195 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 151196 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 151197 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 151198 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 151199 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 151200 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 151201 | 75, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 151202 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 151203 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 |
| 151204 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 151205 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 151206 | 111, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 151207 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 151208 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 151209 | 128, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 151210 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 151211 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 |
| 151212 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 151213 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 151214 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 151215 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 151216 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 151217 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151218 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151219 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151220 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 151221 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 151222 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 151223 | 210, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 151224 | 204, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 151225 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 151226 | 170, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 151227 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 151228 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 |
| 151229 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 151230 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 151231 | }, |
| 151232 | { // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 151233 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 151234 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 151235 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 151236 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 151237 | 65, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64_lo |
| 151238 | 56, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 151239 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3 |
| 151240 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 151241 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 151242 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 151243 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub |
| 151244 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 151245 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 151246 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 151247 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128_lo |
| 151248 | 92, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 151249 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3 |
| 151250 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151251 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 151252 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 151253 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 151254 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 151255 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 151256 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 151257 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 151258 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 151259 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 151260 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 151261 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 151262 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 151263 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 151264 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 151265 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 151266 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 151267 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 151268 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 151269 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 151270 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 151271 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 151272 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 151273 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 151274 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 151275 | 94, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 151276 | 100, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Lo |
| 151277 | 97, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR_4b |
| 151278 | 104, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 151279 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3 |
| 151280 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 151281 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 151282 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 151283 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 151284 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 151285 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 151286 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 151287 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 151288 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 151289 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 151290 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 151291 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 151292 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 151293 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 151294 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 151295 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 151296 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 151297 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 151298 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 151299 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 151300 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 151301 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151302 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151303 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 151304 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 151305 | 10, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16_lo |
| 151306 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 151307 | 44, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151308 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 151309 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub |
| 151310 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 151311 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub |
| 151312 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 151313 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub |
| 151314 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 151315 | 7, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 151316 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 151317 | 8, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 151318 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 151319 | 40, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 151320 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 151321 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 151322 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 151323 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 151324 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 151325 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 151326 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 151327 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 151328 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 151329 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 151330 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 151331 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 151332 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 151333 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 151334 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 151335 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 151336 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 151337 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 151338 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 151339 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 151340 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 151341 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 151342 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 151343 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 151344 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 151345 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 151346 | 76, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 151347 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 151348 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 |
| 151349 | 79, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 151350 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 151351 | 114, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 151352 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 151353 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 151354 | 133, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 151355 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 151356 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 |
| 151357 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 151358 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 151359 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 151360 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 151361 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 151362 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151363 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151364 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151365 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 151366 | 140, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 151367 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 151368 | 217, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 151369 | 149, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 151370 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 151371 | 204, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 151372 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 151373 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 |
| 151374 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 151375 | 0, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 151376 | }, |
| 151377 | { // QQQQ |
| 151378 | 7, // QQQQ:bsub -> FPR8 |
| 151379 | 0, // QQQQ:bsub_hi |
| 151380 | 56, // QQQQ:dsub -> FPR64 |
| 151381 | 0, // QQQQ:dsub0 |
| 151382 | 56, // QQQQ:dsub1 -> FPR64 |
| 151383 | 56, // QQQQ:dsub2 -> FPR64 |
| 151384 | 56, // QQQQ:dsub3 -> FPR64 |
| 151385 | 0, // QQQQ:dsub_hi |
| 151386 | 8, // QQQQ:hsub -> FPR16 |
| 151387 | 0, // QQQQ:hsub_hi |
| 151388 | 0, // QQQQ:psub |
| 151389 | 0, // QQQQ:psub0 |
| 151390 | 0, // QQQQ:psub1 |
| 151391 | 92, // QQQQ:qsub0 -> FPR128 |
| 151392 | 92, // QQQQ:qsub1 -> FPR128 |
| 151393 | 92, // QQQQ:qsub2 -> FPR128 |
| 151394 | 92, // QQQQ:qsub3 -> FPR128 |
| 151395 | 40, // QQQQ:ssub -> FPR32 |
| 151396 | 0, // QQQQ:ssub_hi |
| 151397 | 0, // QQQQ:sub_32 |
| 151398 | 0, // QQQQ:sub_32_hi |
| 151399 | 0, // QQQQ:sube32 |
| 151400 | 0, // QQQQ:sube64 |
| 151401 | 0, // QQQQ:subo32 |
| 151402 | 0, // QQQQ:subo64 |
| 151403 | 0, // QQQQ:x8sub_0 |
| 151404 | 0, // QQQQ:x8sub_1 |
| 151405 | 0, // QQQQ:x8sub_2 |
| 151406 | 0, // QQQQ:x8sub_3 |
| 151407 | 0, // QQQQ:x8sub_4 |
| 151408 | 0, // QQQQ:x8sub_5 |
| 151409 | 0, // QQQQ:x8sub_6 |
| 151410 | 0, // QQQQ:x8sub_7 |
| 151411 | 0, // QQQQ:zasubb |
| 151412 | 0, // QQQQ:zasubd0 |
| 151413 | 0, // QQQQ:zasubd1 |
| 151414 | 0, // QQQQ:zasubh0 |
| 151415 | 0, // QQQQ:zasubh1 |
| 151416 | 0, // QQQQ:zasubq0 |
| 151417 | 0, // QQQQ:zasubq1 |
| 151418 | 0, // QQQQ:zasubs0 |
| 151419 | 0, // QQQQ:zasubs1 |
| 151420 | 0, // QQQQ:zsub |
| 151421 | 0, // QQQQ:zsub0 |
| 151422 | 0, // QQQQ:zsub1 |
| 151423 | 0, // QQQQ:zsub2 |
| 151424 | 0, // QQQQ:zsub3 |
| 151425 | 0, // QQQQ:zsub_hi |
| 151426 | 0, // QQQQ:zasubd1_then_zasubq0 |
| 151427 | 0, // QQQQ:zasubd1_then_zasubq1 |
| 151428 | 0, // QQQQ:zasubs1_then_zasubd0 |
| 151429 | 0, // QQQQ:zasubs1_then_zasubd1 |
| 151430 | 0, // QQQQ:zasubs1_then_zasubq0 |
| 151431 | 0, // QQQQ:zasubs1_then_zasubq1 |
| 151432 | 0, // QQQQ:zasubs1_then_zasubd1_then_zasubq0 |
| 151433 | 0, // QQQQ:zasubs1_then_zasubd1_then_zasubq1 |
| 151434 | 0, // QQQQ:zasubh1_then_zasubd0 |
| 151435 | 0, // QQQQ:zasubh1_then_zasubd1 |
| 151436 | 0, // QQQQ:zasubh1_then_zasubq0 |
| 151437 | 0, // QQQQ:zasubh1_then_zasubq1 |
| 151438 | 0, // QQQQ:zasubh1_then_zasubs0 |
| 151439 | 0, // QQQQ:zasubh1_then_zasubs1 |
| 151440 | 0, // QQQQ:zasubh1_then_zasubd1_then_zasubq0 |
| 151441 | 0, // QQQQ:zasubh1_then_zasubd1_then_zasubq1 |
| 151442 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd0 |
| 151443 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1 |
| 151444 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubq0 |
| 151445 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubq1 |
| 151446 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151447 | 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151448 | 7, // QQQQ:dsub1_then_bsub -> FPR8 |
| 151449 | 0, // QQQQ:dsub1_then_bsub_hi |
| 151450 | 8, // QQQQ:dsub1_then_hsub -> FPR16 |
| 151451 | 0, // QQQQ:dsub1_then_hsub_hi |
| 151452 | 40, // QQQQ:dsub1_then_ssub -> FPR32 |
| 151453 | 0, // QQQQ:dsub1_then_ssub_hi |
| 151454 | 7, // QQQQ:dsub3_then_bsub -> FPR8 |
| 151455 | 0, // QQQQ:dsub3_then_bsub_hi |
| 151456 | 8, // QQQQ:dsub3_then_hsub -> FPR16 |
| 151457 | 0, // QQQQ:dsub3_then_hsub_hi |
| 151458 | 40, // QQQQ:dsub3_then_ssub -> FPR32 |
| 151459 | 0, // QQQQ:dsub3_then_ssub_hi |
| 151460 | 7, // QQQQ:dsub2_then_bsub -> FPR8 |
| 151461 | 0, // QQQQ:dsub2_then_bsub_hi |
| 151462 | 8, // QQQQ:dsub2_then_hsub -> FPR16 |
| 151463 | 0, // QQQQ:dsub2_then_hsub_hi |
| 151464 | 40, // QQQQ:dsub2_then_ssub -> FPR32 |
| 151465 | 0, // QQQQ:dsub2_then_ssub_hi |
| 151466 | 0, // QQQQ:psub1_then_psub |
| 151467 | 0, // QQQQ:qsub1_then_dsub_hi |
| 151468 | 0, // QQQQ:qsub3_then_dsub_hi |
| 151469 | 0, // QQQQ:qsub2_then_dsub_hi |
| 151470 | 0, // QQQQ:x8sub_7_then_sub_32 |
| 151471 | 0, // QQQQ:x8sub_7_then_sub_32_hi |
| 151472 | 0, // QQQQ:x8sub_6_then_sub_32 |
| 151473 | 0, // QQQQ:x8sub_6_then_sub_32_hi |
| 151474 | 0, // QQQQ:x8sub_5_then_sub_32 |
| 151475 | 0, // QQQQ:x8sub_5_then_sub_32_hi |
| 151476 | 0, // QQQQ:x8sub_4_then_sub_32 |
| 151477 | 0, // QQQQ:x8sub_4_then_sub_32_hi |
| 151478 | 0, // QQQQ:x8sub_3_then_sub_32 |
| 151479 | 0, // QQQQ:x8sub_3_then_sub_32_hi |
| 151480 | 0, // QQQQ:x8sub_2_then_sub_32 |
| 151481 | 0, // QQQQ:x8sub_2_then_sub_32_hi |
| 151482 | 0, // QQQQ:x8sub_1_then_sub_32 |
| 151483 | 0, // QQQQ:x8sub_1_then_sub_32_hi |
| 151484 | 0, // QQQQ:subo64_then_sub_32 |
| 151485 | 0, // QQQQ:subo64_then_sub_32_hi |
| 151486 | 0, // QQQQ:zsub1_then_zsub_hi |
| 151487 | 0, // QQQQ:zsub3_then_zsub_hi |
| 151488 | 0, // QQQQ:zsub2_then_zsub_hi |
| 151489 | 0, // QQQQ:dsub0_dsub1 |
| 151490 | 0, // QQQQ:dsub0_dsub1_dsub2 |
| 151491 | 75, // QQQQ:dsub1_dsub2 -> DD |
| 151492 | 110, // QQQQ:dsub1_dsub2_dsub3 -> DDD |
| 151493 | 75, // QQQQ:dsub2_dsub3 -> DD |
| 151494 | 75, // QQQQ:dsub_dsub1 -> DD |
| 151495 | 117, // QQQQ:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 151496 | 110, // QQQQ:dsub_dsub1_dsub2 -> DDD |
| 151497 | 128, // QQQQ:qsub0_qsub1 -> QQ |
| 151498 | 206, // QQQQ:qsub0_qsub1_qsub2 -> QQQ |
| 151499 | 128, // QQQQ:qsub1_qsub2 -> QQ |
| 151500 | 206, // QQQQ:qsub1_qsub2_qsub3 -> QQQ |
| 151501 | 128, // QQQQ:qsub2_qsub3 -> QQ |
| 151502 | 0, // QQQQ:sub_32_x8sub_1_then_sub_32 |
| 151503 | 0, // QQQQ:x8sub_0_x8sub_1 |
| 151504 | 0, // QQQQ:x8sub_2_x8sub_3 |
| 151505 | 0, // QQQQ:x8sub_4_x8sub_5 |
| 151506 | 0, // QQQQ:x8sub_6_x8sub_7 |
| 151507 | 0, // QQQQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151508 | 0, // QQQQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151509 | 0, // QQQQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151510 | 0, // QQQQ:sub_32_subo64_then_sub_32 |
| 151511 | 0, // QQQQ:zsub_qsub1 |
| 151512 | 0, // QQQQ:zsub_qsub1_qsub2_qsub3 |
| 151513 | 0, // QQQQ:zsub_qsub1_qsub2 |
| 151514 | 0, // QQQQ:zsub0_zsub1 |
| 151515 | 0, // QQQQ:zsub0_zsub1_zsub2 |
| 151516 | 0, // QQQQ:zsub1_zsub2 |
| 151517 | 0, // QQQQ:zsub1_zsub2_zsub3 |
| 151518 | 0, // QQQQ:zsub2_zsub3 |
| 151519 | 0, // QQQQ:zsub0_zsub2 |
| 151520 | 0, // QQQQ:zsub1_zsub3 |
| 151521 | }, |
| 151522 | { // ZPR4 |
| 151523 | 7, // ZPR4:bsub -> FPR8 |
| 151524 | 0, // ZPR4:bsub_hi |
| 151525 | 56, // ZPR4:dsub -> FPR64 |
| 151526 | 0, // ZPR4:dsub0 |
| 151527 | 56, // ZPR4:dsub1 -> FPR64 |
| 151528 | 56, // ZPR4:dsub2 -> FPR64 |
| 151529 | 56, // ZPR4:dsub3 -> FPR64 |
| 151530 | 0, // ZPR4:dsub_hi |
| 151531 | 8, // ZPR4:hsub -> FPR16 |
| 151532 | 0, // ZPR4:hsub_hi |
| 151533 | 0, // ZPR4:psub |
| 151534 | 0, // ZPR4:psub0 |
| 151535 | 0, // ZPR4:psub1 |
| 151536 | 0, // ZPR4:qsub0 |
| 151537 | 92, // ZPR4:qsub1 -> FPR128 |
| 151538 | 92, // ZPR4:qsub2 -> FPR128 |
| 151539 | 92, // ZPR4:qsub3 -> FPR128 |
| 151540 | 40, // ZPR4:ssub -> FPR32 |
| 151541 | 0, // ZPR4:ssub_hi |
| 151542 | 0, // ZPR4:sub_32 |
| 151543 | 0, // ZPR4:sub_32_hi |
| 151544 | 0, // ZPR4:sube32 |
| 151545 | 0, // ZPR4:sube64 |
| 151546 | 0, // ZPR4:subo32 |
| 151547 | 0, // ZPR4:subo64 |
| 151548 | 0, // ZPR4:x8sub_0 |
| 151549 | 0, // ZPR4:x8sub_1 |
| 151550 | 0, // ZPR4:x8sub_2 |
| 151551 | 0, // ZPR4:x8sub_3 |
| 151552 | 0, // ZPR4:x8sub_4 |
| 151553 | 0, // ZPR4:x8sub_5 |
| 151554 | 0, // ZPR4:x8sub_6 |
| 151555 | 0, // ZPR4:x8sub_7 |
| 151556 | 0, // ZPR4:zasubb |
| 151557 | 0, // ZPR4:zasubd0 |
| 151558 | 0, // ZPR4:zasubd1 |
| 151559 | 0, // ZPR4:zasubh0 |
| 151560 | 0, // ZPR4:zasubh1 |
| 151561 | 0, // ZPR4:zasubq0 |
| 151562 | 0, // ZPR4:zasubq1 |
| 151563 | 0, // ZPR4:zasubs0 |
| 151564 | 0, // ZPR4:zasubs1 |
| 151565 | 92, // ZPR4:zsub -> FPR128 |
| 151566 | 93, // ZPR4:zsub0 -> ZPR |
| 151567 | 93, // ZPR4:zsub1 -> ZPR |
| 151568 | 93, // ZPR4:zsub2 -> ZPR |
| 151569 | 93, // ZPR4:zsub3 -> ZPR |
| 151570 | 0, // ZPR4:zsub_hi |
| 151571 | 0, // ZPR4:zasubd1_then_zasubq0 |
| 151572 | 0, // ZPR4:zasubd1_then_zasubq1 |
| 151573 | 0, // ZPR4:zasubs1_then_zasubd0 |
| 151574 | 0, // ZPR4:zasubs1_then_zasubd1 |
| 151575 | 0, // ZPR4:zasubs1_then_zasubq0 |
| 151576 | 0, // ZPR4:zasubs1_then_zasubq1 |
| 151577 | 0, // ZPR4:zasubs1_then_zasubd1_then_zasubq0 |
| 151578 | 0, // ZPR4:zasubs1_then_zasubd1_then_zasubq1 |
| 151579 | 0, // ZPR4:zasubh1_then_zasubd0 |
| 151580 | 0, // ZPR4:zasubh1_then_zasubd1 |
| 151581 | 0, // ZPR4:zasubh1_then_zasubq0 |
| 151582 | 0, // ZPR4:zasubh1_then_zasubq1 |
| 151583 | 0, // ZPR4:zasubh1_then_zasubs0 |
| 151584 | 0, // ZPR4:zasubh1_then_zasubs1 |
| 151585 | 0, // ZPR4:zasubh1_then_zasubd1_then_zasubq0 |
| 151586 | 0, // ZPR4:zasubh1_then_zasubd1_then_zasubq1 |
| 151587 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd0 |
| 151588 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1 |
| 151589 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubq0 |
| 151590 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubq1 |
| 151591 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151592 | 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151593 | 7, // ZPR4:dsub1_then_bsub -> FPR8 |
| 151594 | 0, // ZPR4:dsub1_then_bsub_hi |
| 151595 | 8, // ZPR4:dsub1_then_hsub -> FPR16 |
| 151596 | 0, // ZPR4:dsub1_then_hsub_hi |
| 151597 | 40, // ZPR4:dsub1_then_ssub -> FPR32 |
| 151598 | 0, // ZPR4:dsub1_then_ssub_hi |
| 151599 | 7, // ZPR4:dsub3_then_bsub -> FPR8 |
| 151600 | 0, // ZPR4:dsub3_then_bsub_hi |
| 151601 | 8, // ZPR4:dsub3_then_hsub -> FPR16 |
| 151602 | 0, // ZPR4:dsub3_then_hsub_hi |
| 151603 | 40, // ZPR4:dsub3_then_ssub -> FPR32 |
| 151604 | 0, // ZPR4:dsub3_then_ssub_hi |
| 151605 | 7, // ZPR4:dsub2_then_bsub -> FPR8 |
| 151606 | 0, // ZPR4:dsub2_then_bsub_hi |
| 151607 | 8, // ZPR4:dsub2_then_hsub -> FPR16 |
| 151608 | 0, // ZPR4:dsub2_then_hsub_hi |
| 151609 | 40, // ZPR4:dsub2_then_ssub -> FPR32 |
| 151610 | 0, // ZPR4:dsub2_then_ssub_hi |
| 151611 | 0, // ZPR4:psub1_then_psub |
| 151612 | 0, // ZPR4:qsub1_then_dsub_hi |
| 151613 | 0, // ZPR4:qsub3_then_dsub_hi |
| 151614 | 0, // ZPR4:qsub2_then_dsub_hi |
| 151615 | 0, // ZPR4:x8sub_7_then_sub_32 |
| 151616 | 0, // ZPR4:x8sub_7_then_sub_32_hi |
| 151617 | 0, // ZPR4:x8sub_6_then_sub_32 |
| 151618 | 0, // ZPR4:x8sub_6_then_sub_32_hi |
| 151619 | 0, // ZPR4:x8sub_5_then_sub_32 |
| 151620 | 0, // ZPR4:x8sub_5_then_sub_32_hi |
| 151621 | 0, // ZPR4:x8sub_4_then_sub_32 |
| 151622 | 0, // ZPR4:x8sub_4_then_sub_32_hi |
| 151623 | 0, // ZPR4:x8sub_3_then_sub_32 |
| 151624 | 0, // ZPR4:x8sub_3_then_sub_32_hi |
| 151625 | 0, // ZPR4:x8sub_2_then_sub_32 |
| 151626 | 0, // ZPR4:x8sub_2_then_sub_32_hi |
| 151627 | 0, // ZPR4:x8sub_1_then_sub_32 |
| 151628 | 0, // ZPR4:x8sub_1_then_sub_32_hi |
| 151629 | 0, // ZPR4:subo64_then_sub_32 |
| 151630 | 0, // ZPR4:subo64_then_sub_32_hi |
| 151631 | 0, // ZPR4:zsub1_then_zsub_hi |
| 151632 | 0, // ZPR4:zsub3_then_zsub_hi |
| 151633 | 0, // ZPR4:zsub2_then_zsub_hi |
| 151634 | 0, // ZPR4:dsub0_dsub1 |
| 151635 | 0, // ZPR4:dsub0_dsub1_dsub2 |
| 151636 | 75, // ZPR4:dsub1_dsub2 -> DD |
| 151637 | 110, // ZPR4:dsub1_dsub2_dsub3 -> DDD |
| 151638 | 75, // ZPR4:dsub2_dsub3 -> DD |
| 151639 | 75, // ZPR4:dsub_dsub1 -> DD |
| 151640 | 117, // ZPR4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 151641 | 110, // ZPR4:dsub_dsub1_dsub2 -> DDD |
| 151642 | 0, // ZPR4:qsub0_qsub1 |
| 151643 | 0, // ZPR4:qsub0_qsub1_qsub2 |
| 151644 | 128, // ZPR4:qsub1_qsub2 -> QQ |
| 151645 | 206, // ZPR4:qsub1_qsub2_qsub3 -> QQQ |
| 151646 | 128, // ZPR4:qsub2_qsub3 -> QQ |
| 151647 | 0, // ZPR4:sub_32_x8sub_1_then_sub_32 |
| 151648 | 0, // ZPR4:x8sub_0_x8sub_1 |
| 151649 | 0, // ZPR4:x8sub_2_x8sub_3 |
| 151650 | 0, // ZPR4:x8sub_4_x8sub_5 |
| 151651 | 0, // ZPR4:x8sub_6_x8sub_7 |
| 151652 | 0, // ZPR4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151653 | 0, // ZPR4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151654 | 0, // ZPR4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151655 | 0, // ZPR4:sub_32_subo64_then_sub_32 |
| 151656 | 128, // ZPR4:zsub_qsub1 -> QQ |
| 151657 | 297, // ZPR4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 151658 | 206, // ZPR4:zsub_qsub1_qsub2 -> QQQ |
| 151659 | 129, // ZPR4:zsub0_zsub1 -> ZPR2 |
| 151660 | 207, // ZPR4:zsub0_zsub1_zsub2 -> ZPR3 |
| 151661 | 129, // ZPR4:zsub1_zsub2 -> ZPR2 |
| 151662 | 207, // ZPR4:zsub1_zsub2_zsub3 -> ZPR3 |
| 151663 | 129, // ZPR4:zsub2_zsub3 -> ZPR2 |
| 151664 | 0, // ZPR4:zsub0_zsub2 |
| 151665 | 0, // ZPR4:zsub1_zsub3 |
| 151666 | }, |
| 151667 | { // QQQQ_with_dsub1_in_FPR64_lo |
| 151668 | 7, // QQQQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 151669 | 0, // QQQQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 151670 | 56, // QQQQ_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 151671 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub0 |
| 151672 | 65, // QQQQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 151673 | 56, // QQQQ_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 151674 | 56, // QQQQ_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 151675 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 151676 | 8, // QQQQ_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 151677 | 0, // QQQQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 151678 | 0, // QQQQ_with_dsub1_in_FPR64_lo:psub |
| 151679 | 0, // QQQQ_with_dsub1_in_FPR64_lo:psub0 |
| 151680 | 0, // QQQQ_with_dsub1_in_FPR64_lo:psub1 |
| 151681 | 92, // QQQQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128 |
| 151682 | 94, // QQQQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 151683 | 92, // QQQQ_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 151684 | 92, // QQQQ_with_dsub1_in_FPR64_lo:qsub3 -> FPR128 |
| 151685 | 40, // QQQQ_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 151686 | 0, // QQQQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 151687 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sub_32 |
| 151688 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 151689 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sube32 |
| 151690 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sube64 |
| 151691 | 0, // QQQQ_with_dsub1_in_FPR64_lo:subo32 |
| 151692 | 0, // QQQQ_with_dsub1_in_FPR64_lo:subo64 |
| 151693 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 151694 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 151695 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 151696 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 151697 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 151698 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 151699 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 151700 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 151701 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubb |
| 151702 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 151703 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 151704 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 151705 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 151706 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 151707 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 151708 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 151709 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 151710 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub |
| 151711 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub0 |
| 151712 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub1 |
| 151713 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub2 |
| 151714 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub3 |
| 151715 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 151716 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 151717 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 151718 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 151719 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 151720 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 151721 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 151722 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 151723 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 151724 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 151725 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 151726 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 151727 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 151728 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 151729 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 151730 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 151731 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 151732 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 151733 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 151734 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 151735 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 151736 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151737 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151738 | 7, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 151739 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 151740 | 10, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 151741 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 151742 | 44, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151743 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 151744 | 7, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 151745 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 151746 | 8, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 151747 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 151748 | 40, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 151749 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 151750 | 7, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 151751 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 151752 | 8, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 151753 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 151754 | 40, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 151755 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 151756 | 0, // QQQQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 151757 | 0, // QQQQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 151758 | 0, // QQQQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 151759 | 0, // QQQQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 151760 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 151761 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 151762 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 151763 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 151764 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 151765 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 151766 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 151767 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 151768 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 151769 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 151770 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 151771 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 151772 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 151773 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 151774 | 0, // QQQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 151775 | 0, // QQQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 151776 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 151777 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 151778 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 151779 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 151780 | 0, // QQQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 151781 | 76, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 151782 | 111, // QQQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 151783 | 75, // QQQQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 151784 | 77, // QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 151785 | 119, // QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo |
| 151786 | 112, // QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 151787 | 132, // QQQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 151788 | 208, // QQQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 151789 | 133, // QQQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 151790 | 210, // QQQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 151791 | 128, // QQQQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 -> QQ |
| 151792 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 151793 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 151794 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 151795 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 151796 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 151797 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151798 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151799 | 0, // QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151800 | 0, // QQQQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 151801 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 151802 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 151803 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 151804 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 151805 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 151806 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 151807 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 151808 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 151809 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 151810 | 0, // QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 151811 | }, |
| 151812 | { // QQQQ_with_dsub2_in_FPR64_lo |
| 151813 | 7, // QQQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 151814 | 0, // QQQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 151815 | 56, // QQQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 151816 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 151817 | 56, // QQQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 151818 | 65, // QQQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 151819 | 56, // QQQQ_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 151820 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 151821 | 8, // QQQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 151822 | 0, // QQQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 151823 | 0, // QQQQ_with_dsub2_in_FPR64_lo:psub |
| 151824 | 0, // QQQQ_with_dsub2_in_FPR64_lo:psub0 |
| 151825 | 0, // QQQQ_with_dsub2_in_FPR64_lo:psub1 |
| 151826 | 92, // QQQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128 |
| 151827 | 92, // QQQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128 |
| 151828 | 94, // QQQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 151829 | 92, // QQQQ_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 151830 | 40, // QQQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 151831 | 0, // QQQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 151832 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 151833 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 151834 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sube32 |
| 151835 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sube64 |
| 151836 | 0, // QQQQ_with_dsub2_in_FPR64_lo:subo32 |
| 151837 | 0, // QQQQ_with_dsub2_in_FPR64_lo:subo64 |
| 151838 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 151839 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 151840 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 151841 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 151842 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 151843 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 151844 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 151845 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 151846 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubb |
| 151847 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 151848 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 151849 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 151850 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 151851 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 151852 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 151853 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 151854 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 151855 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub |
| 151856 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 151857 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 151858 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 151859 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 151860 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 151861 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 151862 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 151863 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 151864 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 151865 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 151866 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 151867 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 151868 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 151869 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 151870 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 151871 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 151872 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 151873 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 151874 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 151875 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 151876 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 151877 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 151878 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 151879 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 151880 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 151881 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 151882 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 151883 | 7, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 151884 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 151885 | 8, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 151886 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 151887 | 40, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 151888 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 151889 | 7, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 151890 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 151891 | 8, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 151892 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 151893 | 40, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 151894 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 151895 | 7, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 151896 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 151897 | 10, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 151898 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 151899 | 44, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 151900 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 151901 | 0, // QQQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 151902 | 0, // QQQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 151903 | 0, // QQQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 151904 | 0, // QQQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 151905 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 151906 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 151907 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 151908 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 151909 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 151910 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 151911 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 151912 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 151913 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 151914 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 151915 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 151916 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 151917 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 151918 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 151919 | 0, // QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 151920 | 0, // QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 151921 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 151922 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 151923 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 151924 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 151925 | 0, // QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 151926 | 77, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 151927 | 112, // QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo |
| 151928 | 76, // QQQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 151929 | 75, // QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD |
| 151930 | 120, // QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo |
| 151931 | 113, // QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 151932 | 128, // QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ |
| 151933 | 209, // QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 151934 | 132, // QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 151935 | 208, // QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo |
| 151936 | 133, // QQQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 151937 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 151938 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 151939 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 151940 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 151941 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 151942 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 151943 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 151944 | 0, // QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 151945 | 0, // QQQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 151946 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 151947 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 151948 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 151949 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 151950 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 151951 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 151952 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 151953 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 151954 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 151955 | 0, // QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 151956 | }, |
| 151957 | { // QQQQ_with_dsub3_in_FPR64_lo |
| 151958 | 7, // QQQQ_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 151959 | 0, // QQQQ_with_dsub3_in_FPR64_lo:bsub_hi |
| 151960 | 56, // QQQQ_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 151961 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub0 |
| 151962 | 56, // QQQQ_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 151963 | 56, // QQQQ_with_dsub3_in_FPR64_lo:dsub2 -> FPR64 |
| 151964 | 65, // QQQQ_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 151965 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub_hi |
| 151966 | 8, // QQQQ_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 151967 | 0, // QQQQ_with_dsub3_in_FPR64_lo:hsub_hi |
| 151968 | 0, // QQQQ_with_dsub3_in_FPR64_lo:psub |
| 151969 | 0, // QQQQ_with_dsub3_in_FPR64_lo:psub0 |
| 151970 | 0, // QQQQ_with_dsub3_in_FPR64_lo:psub1 |
| 151971 | 92, // QQQQ_with_dsub3_in_FPR64_lo:qsub0 -> FPR128 |
| 151972 | 92, // QQQQ_with_dsub3_in_FPR64_lo:qsub1 -> FPR128 |
| 151973 | 92, // QQQQ_with_dsub3_in_FPR64_lo:qsub2 -> FPR128 |
| 151974 | 94, // QQQQ_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 151975 | 40, // QQQQ_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 151976 | 0, // QQQQ_with_dsub3_in_FPR64_lo:ssub_hi |
| 151977 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sub_32 |
| 151978 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sub_32_hi |
| 151979 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sube32 |
| 151980 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sube64 |
| 151981 | 0, // QQQQ_with_dsub3_in_FPR64_lo:subo32 |
| 151982 | 0, // QQQQ_with_dsub3_in_FPR64_lo:subo64 |
| 151983 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_0 |
| 151984 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_1 |
| 151985 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_2 |
| 151986 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_3 |
| 151987 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_4 |
| 151988 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_5 |
| 151989 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_6 |
| 151990 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_7 |
| 151991 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubb |
| 151992 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubd0 |
| 151993 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubd1 |
| 151994 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh0 |
| 151995 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1 |
| 151996 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubq0 |
| 151997 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubq1 |
| 151998 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs0 |
| 151999 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1 |
| 152000 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub |
| 152001 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub0 |
| 152002 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub1 |
| 152003 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub2 |
| 152004 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub3 |
| 152005 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub_hi |
| 152006 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 152007 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 152008 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 152009 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 152010 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 152011 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 152012 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 152013 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 152014 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 152015 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 152016 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 152017 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 152018 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 152019 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 152020 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 152021 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 152022 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 152023 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 152024 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 152025 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 152026 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152027 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152028 | 7, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 152029 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 152030 | 8, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 152031 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 152032 | 40, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 152033 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 152034 | 7, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 152035 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 152036 | 10, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 152037 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 152038 | 44, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 152039 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 152040 | 7, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 152041 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 152042 | 8, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 152043 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 152044 | 40, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 152045 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 152046 | 0, // QQQQ_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 152047 | 0, // QQQQ_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 152048 | 0, // QQQQ_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 152049 | 0, // QQQQ_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 152050 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 152051 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 152052 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 152053 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 152054 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 152055 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 152056 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 152057 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 152058 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 152059 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 152060 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 152061 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 152062 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 152063 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 152064 | 0, // QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 152065 | 0, // QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 152066 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 152067 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 152068 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 152069 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 152070 | 0, // QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 152071 | 75, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD |
| 152072 | 113, // QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 152073 | 77, // QQQQ_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 152074 | 75, // QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD |
| 152075 | 121, // QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 152076 | 110, // QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD |
| 152077 | 128, // QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1 -> QQ |
| 152078 | 206, // QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ |
| 152079 | 128, // QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ |
| 152080 | 209, // QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub2_in_FPR64_lo |
| 152081 | 132, // QQQQ_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_dsub1_in_FPR64_lo |
| 152082 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 152083 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 152084 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 152085 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 152086 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 152087 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152088 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152089 | 0, // QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152090 | 0, // QQQQ_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 152091 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 152092 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 152093 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 152094 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 152095 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 152096 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 152097 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 152098 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 152099 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 152100 | 0, // QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 152101 | }, |
| 152102 | { // QQQQ_with_qsub0_in_FPR128_lo |
| 152103 | 7, // QQQQ_with_qsub0_in_FPR128_lo:bsub -> FPR8 |
| 152104 | 0, // QQQQ_with_qsub0_in_FPR128_lo:bsub_hi |
| 152105 | 65, // QQQQ_with_qsub0_in_FPR128_lo:dsub -> FPR64_lo |
| 152106 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub0 |
| 152107 | 56, // QQQQ_with_qsub0_in_FPR128_lo:dsub1 -> FPR64 |
| 152108 | 56, // QQQQ_with_qsub0_in_FPR128_lo:dsub2 -> FPR64 |
| 152109 | 56, // QQQQ_with_qsub0_in_FPR128_lo:dsub3 -> FPR64 |
| 152110 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub_hi |
| 152111 | 10, // QQQQ_with_qsub0_in_FPR128_lo:hsub -> FPR16_lo |
| 152112 | 0, // QQQQ_with_qsub0_in_FPR128_lo:hsub_hi |
| 152113 | 0, // QQQQ_with_qsub0_in_FPR128_lo:psub |
| 152114 | 0, // QQQQ_with_qsub0_in_FPR128_lo:psub0 |
| 152115 | 0, // QQQQ_with_qsub0_in_FPR128_lo:psub1 |
| 152116 | 94, // QQQQ_with_qsub0_in_FPR128_lo:qsub0 -> FPR128_lo |
| 152117 | 92, // QQQQ_with_qsub0_in_FPR128_lo:qsub1 -> FPR128 |
| 152118 | 92, // QQQQ_with_qsub0_in_FPR128_lo:qsub2 -> FPR128 |
| 152119 | 92, // QQQQ_with_qsub0_in_FPR128_lo:qsub3 -> FPR128 |
| 152120 | 44, // QQQQ_with_qsub0_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 152121 | 0, // QQQQ_with_qsub0_in_FPR128_lo:ssub_hi |
| 152122 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sub_32 |
| 152123 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sub_32_hi |
| 152124 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sube32 |
| 152125 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sube64 |
| 152126 | 0, // QQQQ_with_qsub0_in_FPR128_lo:subo32 |
| 152127 | 0, // QQQQ_with_qsub0_in_FPR128_lo:subo64 |
| 152128 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_0 |
| 152129 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_1 |
| 152130 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_2 |
| 152131 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_3 |
| 152132 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_4 |
| 152133 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_5 |
| 152134 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_6 |
| 152135 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_7 |
| 152136 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubb |
| 152137 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubd0 |
| 152138 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubd1 |
| 152139 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh0 |
| 152140 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1 |
| 152141 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubq0 |
| 152142 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubq1 |
| 152143 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs0 |
| 152144 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1 |
| 152145 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub |
| 152146 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub0 |
| 152147 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub1 |
| 152148 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub2 |
| 152149 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub3 |
| 152150 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub_hi |
| 152151 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq0 |
| 152152 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubd1_then_zasubq1 |
| 152153 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd0 |
| 152154 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1 |
| 152155 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq0 |
| 152156 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubq1 |
| 152157 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 152158 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 152159 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd0 |
| 152160 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1 |
| 152161 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq0 |
| 152162 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubq1 |
| 152163 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs0 |
| 152164 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1 |
| 152165 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 152166 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 152167 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 152168 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 152169 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 152170 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 152171 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152172 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152173 | 7, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 152174 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_bsub_hi |
| 152175 | 8, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 152176 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_hsub_hi |
| 152177 | 40, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 152178 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_then_ssub_hi |
| 152179 | 7, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub -> FPR8 |
| 152180 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_bsub_hi |
| 152181 | 8, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub -> FPR16 |
| 152182 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_hsub_hi |
| 152183 | 40, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub -> FPR32 |
| 152184 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub3_then_ssub_hi |
| 152185 | 7, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub -> FPR8 |
| 152186 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_bsub_hi |
| 152187 | 8, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub -> FPR16 |
| 152188 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_hsub_hi |
| 152189 | 40, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub -> FPR32 |
| 152190 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_then_ssub_hi |
| 152191 | 0, // QQQQ_with_qsub0_in_FPR128_lo:psub1_then_psub |
| 152192 | 0, // QQQQ_with_qsub0_in_FPR128_lo:qsub1_then_dsub_hi |
| 152193 | 0, // QQQQ_with_qsub0_in_FPR128_lo:qsub3_then_dsub_hi |
| 152194 | 0, // QQQQ_with_qsub0_in_FPR128_lo:qsub2_then_dsub_hi |
| 152195 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32 |
| 152196 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 152197 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32 |
| 152198 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 152199 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32 |
| 152200 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 152201 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32 |
| 152202 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 152203 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32 |
| 152204 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 152205 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32 |
| 152206 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 152207 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32 |
| 152208 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 152209 | 0, // QQQQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32 |
| 152210 | 0, // QQQQ_with_qsub0_in_FPR128_lo:subo64_then_sub_32_hi |
| 152211 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub1_then_zsub_hi |
| 152212 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub3_then_zsub_hi |
| 152213 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub2_then_zsub_hi |
| 152214 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub0_dsub1 |
| 152215 | 0, // QQQQ_with_qsub0_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 152216 | 75, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_dsub2 -> DD |
| 152217 | 110, // QQQQ_with_qsub0_in_FPR128_lo:dsub1_dsub2_dsub3 -> DDD |
| 152218 | 75, // QQQQ_with_qsub0_in_FPR128_lo:dsub2_dsub3 -> DD |
| 152219 | 76, // QQQQ_with_qsub0_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 152220 | 118, // QQQQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 152221 | 111, // QQQQ_with_qsub0_in_FPR128_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 152222 | 133, // QQQQ_with_qsub0_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 152223 | 210, // QQQQ_with_qsub0_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 152224 | 128, // QQQQ_with_qsub0_in_FPR128_lo:qsub1_qsub2 -> QQ |
| 152225 | 206, // QQQQ_with_qsub0_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ |
| 152226 | 128, // QQQQ_with_qsub0_in_FPR128_lo:qsub2_qsub3 -> QQ |
| 152227 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 152228 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_0_x8sub_1 |
| 152229 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_2_x8sub_3 |
| 152230 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_4_x8sub_5 |
| 152231 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_6_x8sub_7 |
| 152232 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152233 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152234 | 0, // QQQQ_with_qsub0_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152235 | 0, // QQQQ_with_qsub0_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 152236 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub_qsub1 |
| 152237 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 |
| 152238 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub_qsub1_qsub2 |
| 152239 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub0_zsub1 |
| 152240 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub0_zsub1_zsub2 |
| 152241 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub1_zsub2 |
| 152242 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub1_zsub2_zsub3 |
| 152243 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub2_zsub3 |
| 152244 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub0_zsub2 |
| 152245 | 0, // QQQQ_with_qsub0_in_FPR128_lo:zsub1_zsub3 |
| 152246 | }, |
| 152247 | { // ZPR4StridedOrContiguous |
| 152248 | 7, // ZPR4StridedOrContiguous:bsub -> FPR8 |
| 152249 | 0, // ZPR4StridedOrContiguous:bsub_hi |
| 152250 | 56, // ZPR4StridedOrContiguous:dsub -> FPR64 |
| 152251 | 0, // ZPR4StridedOrContiguous:dsub0 |
| 152252 | 56, // ZPR4StridedOrContiguous:dsub1 -> FPR64 |
| 152253 | 56, // ZPR4StridedOrContiguous:dsub2 -> FPR64 |
| 152254 | 56, // ZPR4StridedOrContiguous:dsub3 -> FPR64 |
| 152255 | 0, // ZPR4StridedOrContiguous:dsub_hi |
| 152256 | 8, // ZPR4StridedOrContiguous:hsub -> FPR16 |
| 152257 | 0, // ZPR4StridedOrContiguous:hsub_hi |
| 152258 | 0, // ZPR4StridedOrContiguous:psub |
| 152259 | 0, // ZPR4StridedOrContiguous:psub0 |
| 152260 | 0, // ZPR4StridedOrContiguous:psub1 |
| 152261 | 0, // ZPR4StridedOrContiguous:qsub0 |
| 152262 | 92, // ZPR4StridedOrContiguous:qsub1 -> FPR128 |
| 152263 | 92, // ZPR4StridedOrContiguous:qsub2 -> FPR128 |
| 152264 | 92, // ZPR4StridedOrContiguous:qsub3 -> FPR128 |
| 152265 | 40, // ZPR4StridedOrContiguous:ssub -> FPR32 |
| 152266 | 0, // ZPR4StridedOrContiguous:ssub_hi |
| 152267 | 0, // ZPR4StridedOrContiguous:sub_32 |
| 152268 | 0, // ZPR4StridedOrContiguous:sub_32_hi |
| 152269 | 0, // ZPR4StridedOrContiguous:sube32 |
| 152270 | 0, // ZPR4StridedOrContiguous:sube64 |
| 152271 | 0, // ZPR4StridedOrContiguous:subo32 |
| 152272 | 0, // ZPR4StridedOrContiguous:subo64 |
| 152273 | 0, // ZPR4StridedOrContiguous:x8sub_0 |
| 152274 | 0, // ZPR4StridedOrContiguous:x8sub_1 |
| 152275 | 0, // ZPR4StridedOrContiguous:x8sub_2 |
| 152276 | 0, // ZPR4StridedOrContiguous:x8sub_3 |
| 152277 | 0, // ZPR4StridedOrContiguous:x8sub_4 |
| 152278 | 0, // ZPR4StridedOrContiguous:x8sub_5 |
| 152279 | 0, // ZPR4StridedOrContiguous:x8sub_6 |
| 152280 | 0, // ZPR4StridedOrContiguous:x8sub_7 |
| 152281 | 0, // ZPR4StridedOrContiguous:zasubb |
| 152282 | 0, // ZPR4StridedOrContiguous:zasubd0 |
| 152283 | 0, // ZPR4StridedOrContiguous:zasubd1 |
| 152284 | 0, // ZPR4StridedOrContiguous:zasubh0 |
| 152285 | 0, // ZPR4StridedOrContiguous:zasubh1 |
| 152286 | 0, // ZPR4StridedOrContiguous:zasubq0 |
| 152287 | 0, // ZPR4StridedOrContiguous:zasubq1 |
| 152288 | 0, // ZPR4StridedOrContiguous:zasubs0 |
| 152289 | 0, // ZPR4StridedOrContiguous:zasubs1 |
| 152290 | 92, // ZPR4StridedOrContiguous:zsub -> FPR128 |
| 152291 | 93, // ZPR4StridedOrContiguous:zsub0 -> ZPR |
| 152292 | 93, // ZPR4StridedOrContiguous:zsub1 -> ZPR |
| 152293 | 93, // ZPR4StridedOrContiguous:zsub2 -> ZPR |
| 152294 | 93, // ZPR4StridedOrContiguous:zsub3 -> ZPR |
| 152295 | 0, // ZPR4StridedOrContiguous:zsub_hi |
| 152296 | 0, // ZPR4StridedOrContiguous:zasubd1_then_zasubq0 |
| 152297 | 0, // ZPR4StridedOrContiguous:zasubd1_then_zasubq1 |
| 152298 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubd0 |
| 152299 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubd1 |
| 152300 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubq0 |
| 152301 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubq1 |
| 152302 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubd1_then_zasubq0 |
| 152303 | 0, // ZPR4StridedOrContiguous:zasubs1_then_zasubd1_then_zasubq1 |
| 152304 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubd0 |
| 152305 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubd1 |
| 152306 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubq0 |
| 152307 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubq1 |
| 152308 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs0 |
| 152309 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1 |
| 152310 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubd1_then_zasubq0 |
| 152311 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubd1_then_zasubq1 |
| 152312 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd0 |
| 152313 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1 |
| 152314 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubq0 |
| 152315 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubq1 |
| 152316 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152317 | 0, // ZPR4StridedOrContiguous:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152318 | 7, // ZPR4StridedOrContiguous:dsub1_then_bsub -> FPR8 |
| 152319 | 0, // ZPR4StridedOrContiguous:dsub1_then_bsub_hi |
| 152320 | 8, // ZPR4StridedOrContiguous:dsub1_then_hsub -> FPR16 |
| 152321 | 0, // ZPR4StridedOrContiguous:dsub1_then_hsub_hi |
| 152322 | 40, // ZPR4StridedOrContiguous:dsub1_then_ssub -> FPR32 |
| 152323 | 0, // ZPR4StridedOrContiguous:dsub1_then_ssub_hi |
| 152324 | 7, // ZPR4StridedOrContiguous:dsub3_then_bsub -> FPR8 |
| 152325 | 0, // ZPR4StridedOrContiguous:dsub3_then_bsub_hi |
| 152326 | 8, // ZPR4StridedOrContiguous:dsub3_then_hsub -> FPR16 |
| 152327 | 0, // ZPR4StridedOrContiguous:dsub3_then_hsub_hi |
| 152328 | 40, // ZPR4StridedOrContiguous:dsub3_then_ssub -> FPR32 |
| 152329 | 0, // ZPR4StridedOrContiguous:dsub3_then_ssub_hi |
| 152330 | 7, // ZPR4StridedOrContiguous:dsub2_then_bsub -> FPR8 |
| 152331 | 0, // ZPR4StridedOrContiguous:dsub2_then_bsub_hi |
| 152332 | 8, // ZPR4StridedOrContiguous:dsub2_then_hsub -> FPR16 |
| 152333 | 0, // ZPR4StridedOrContiguous:dsub2_then_hsub_hi |
| 152334 | 40, // ZPR4StridedOrContiguous:dsub2_then_ssub -> FPR32 |
| 152335 | 0, // ZPR4StridedOrContiguous:dsub2_then_ssub_hi |
| 152336 | 0, // ZPR4StridedOrContiguous:psub1_then_psub |
| 152337 | 0, // ZPR4StridedOrContiguous:qsub1_then_dsub_hi |
| 152338 | 0, // ZPR4StridedOrContiguous:qsub3_then_dsub_hi |
| 152339 | 0, // ZPR4StridedOrContiguous:qsub2_then_dsub_hi |
| 152340 | 0, // ZPR4StridedOrContiguous:x8sub_7_then_sub_32 |
| 152341 | 0, // ZPR4StridedOrContiguous:x8sub_7_then_sub_32_hi |
| 152342 | 0, // ZPR4StridedOrContiguous:x8sub_6_then_sub_32 |
| 152343 | 0, // ZPR4StridedOrContiguous:x8sub_6_then_sub_32_hi |
| 152344 | 0, // ZPR4StridedOrContiguous:x8sub_5_then_sub_32 |
| 152345 | 0, // ZPR4StridedOrContiguous:x8sub_5_then_sub_32_hi |
| 152346 | 0, // ZPR4StridedOrContiguous:x8sub_4_then_sub_32 |
| 152347 | 0, // ZPR4StridedOrContiguous:x8sub_4_then_sub_32_hi |
| 152348 | 0, // ZPR4StridedOrContiguous:x8sub_3_then_sub_32 |
| 152349 | 0, // ZPR4StridedOrContiguous:x8sub_3_then_sub_32_hi |
| 152350 | 0, // ZPR4StridedOrContiguous:x8sub_2_then_sub_32 |
| 152351 | 0, // ZPR4StridedOrContiguous:x8sub_2_then_sub_32_hi |
| 152352 | 0, // ZPR4StridedOrContiguous:x8sub_1_then_sub_32 |
| 152353 | 0, // ZPR4StridedOrContiguous:x8sub_1_then_sub_32_hi |
| 152354 | 0, // ZPR4StridedOrContiguous:subo64_then_sub_32 |
| 152355 | 0, // ZPR4StridedOrContiguous:subo64_then_sub_32_hi |
| 152356 | 0, // ZPR4StridedOrContiguous:zsub1_then_zsub_hi |
| 152357 | 0, // ZPR4StridedOrContiguous:zsub3_then_zsub_hi |
| 152358 | 0, // ZPR4StridedOrContiguous:zsub2_then_zsub_hi |
| 152359 | 0, // ZPR4StridedOrContiguous:dsub0_dsub1 |
| 152360 | 0, // ZPR4StridedOrContiguous:dsub0_dsub1_dsub2 |
| 152361 | 75, // ZPR4StridedOrContiguous:dsub1_dsub2 -> DD |
| 152362 | 110, // ZPR4StridedOrContiguous:dsub1_dsub2_dsub3 -> DDD |
| 152363 | 75, // ZPR4StridedOrContiguous:dsub2_dsub3 -> DD |
| 152364 | 75, // ZPR4StridedOrContiguous:dsub_dsub1 -> DD |
| 152365 | 117, // ZPR4StridedOrContiguous:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 152366 | 110, // ZPR4StridedOrContiguous:dsub_dsub1_dsub2 -> DDD |
| 152367 | 0, // ZPR4StridedOrContiguous:qsub0_qsub1 |
| 152368 | 0, // ZPR4StridedOrContiguous:qsub0_qsub1_qsub2 |
| 152369 | 128, // ZPR4StridedOrContiguous:qsub1_qsub2 -> QQ |
| 152370 | 206, // ZPR4StridedOrContiguous:qsub1_qsub2_qsub3 -> QQQ |
| 152371 | 128, // ZPR4StridedOrContiguous:qsub2_qsub3 -> QQ |
| 152372 | 0, // ZPR4StridedOrContiguous:sub_32_x8sub_1_then_sub_32 |
| 152373 | 0, // ZPR4StridedOrContiguous:x8sub_0_x8sub_1 |
| 152374 | 0, // ZPR4StridedOrContiguous:x8sub_2_x8sub_3 |
| 152375 | 0, // ZPR4StridedOrContiguous:x8sub_4_x8sub_5 |
| 152376 | 0, // ZPR4StridedOrContiguous:x8sub_6_x8sub_7 |
| 152377 | 0, // ZPR4StridedOrContiguous:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152378 | 0, // ZPR4StridedOrContiguous:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152379 | 0, // ZPR4StridedOrContiguous:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152380 | 0, // ZPR4StridedOrContiguous:sub_32_subo64_then_sub_32 |
| 152381 | 128, // ZPR4StridedOrContiguous:zsub_qsub1 -> QQ |
| 152382 | 297, // ZPR4StridedOrContiguous:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 152383 | 206, // ZPR4StridedOrContiguous:zsub_qsub1_qsub2 -> QQQ |
| 152384 | 155, // ZPR4StridedOrContiguous:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 152385 | 227, // ZPR4StridedOrContiguous:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 152386 | 138, // ZPR4StridedOrContiguous:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 152387 | 214, // ZPR4StridedOrContiguous:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 152388 | 134, // ZPR4StridedOrContiguous:zsub2_zsub3 -> ZPR2Mul2 |
| 152389 | 135, // ZPR4StridedOrContiguous:zsub0_zsub2 -> ZPR2Strided |
| 152390 | 135, // ZPR4StridedOrContiguous:zsub1_zsub3 -> ZPR2Strided |
| 152391 | }, |
| 152392 | { // ZPR4_with_dsub1_in_FPR64_lo |
| 152393 | 7, // ZPR4_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 152394 | 0, // ZPR4_with_dsub1_in_FPR64_lo:bsub_hi |
| 152395 | 56, // ZPR4_with_dsub1_in_FPR64_lo:dsub -> FPR64 |
| 152396 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub0 |
| 152397 | 65, // ZPR4_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 152398 | 56, // ZPR4_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 152399 | 56, // ZPR4_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 152400 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub_hi |
| 152401 | 8, // ZPR4_with_dsub1_in_FPR64_lo:hsub -> FPR16 |
| 152402 | 0, // ZPR4_with_dsub1_in_FPR64_lo:hsub_hi |
| 152403 | 0, // ZPR4_with_dsub1_in_FPR64_lo:psub |
| 152404 | 0, // ZPR4_with_dsub1_in_FPR64_lo:psub0 |
| 152405 | 0, // ZPR4_with_dsub1_in_FPR64_lo:psub1 |
| 152406 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub0 |
| 152407 | 94, // ZPR4_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 152408 | 92, // ZPR4_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 152409 | 92, // ZPR4_with_dsub1_in_FPR64_lo:qsub3 -> FPR128 |
| 152410 | 40, // ZPR4_with_dsub1_in_FPR64_lo:ssub -> FPR32 |
| 152411 | 0, // ZPR4_with_dsub1_in_FPR64_lo:ssub_hi |
| 152412 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sub_32 |
| 152413 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sub_32_hi |
| 152414 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sube32 |
| 152415 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sube64 |
| 152416 | 0, // ZPR4_with_dsub1_in_FPR64_lo:subo32 |
| 152417 | 0, // ZPR4_with_dsub1_in_FPR64_lo:subo64 |
| 152418 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_0 |
| 152419 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_1 |
| 152420 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_2 |
| 152421 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_3 |
| 152422 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_4 |
| 152423 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_5 |
| 152424 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_6 |
| 152425 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_7 |
| 152426 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubb |
| 152427 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubd0 |
| 152428 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubd1 |
| 152429 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh0 |
| 152430 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1 |
| 152431 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubq0 |
| 152432 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubq1 |
| 152433 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs0 |
| 152434 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1 |
| 152435 | 92, // ZPR4_with_dsub1_in_FPR64_lo:zsub -> FPR128 |
| 152436 | 93, // ZPR4_with_dsub1_in_FPR64_lo:zsub0 -> ZPR |
| 152437 | 97, // ZPR4_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 152438 | 93, // ZPR4_with_dsub1_in_FPR64_lo:zsub2 -> ZPR |
| 152439 | 93, // ZPR4_with_dsub1_in_FPR64_lo:zsub3 -> ZPR |
| 152440 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub_hi |
| 152441 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 152442 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 152443 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 152444 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 152445 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 152446 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 152447 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 152448 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 152449 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 152450 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 152451 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 152452 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 152453 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 152454 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 152455 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 152456 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 152457 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 152458 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 152459 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 152460 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 152461 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152462 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152463 | 7, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 152464 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 152465 | 10, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 152466 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 152467 | 44, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 152468 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 152469 | 7, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 152470 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 152471 | 8, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 152472 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 152473 | 40, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 152474 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 152475 | 7, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 152476 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 152477 | 8, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 152478 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 152479 | 40, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 152480 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 152481 | 0, // ZPR4_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 152482 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 152483 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 152484 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 152485 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 152486 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 152487 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 152488 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 152489 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 152490 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 152491 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 152492 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 152493 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 152494 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 152495 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 152496 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 152497 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 152498 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 152499 | 0, // ZPR4_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 152500 | 0, // ZPR4_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 152501 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 152502 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 152503 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 152504 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 152505 | 0, // ZPR4_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 152506 | 76, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 152507 | 111, // ZPR4_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 152508 | 75, // ZPR4_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 152509 | 77, // ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 152510 | 119, // ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo |
| 152511 | 112, // ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo |
| 152512 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 152513 | 0, // ZPR4_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 152514 | 133, // ZPR4_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 152515 | 210, // ZPR4_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 152516 | 128, // ZPR4_with_dsub1_in_FPR64_lo:qsub2_qsub3 -> QQ |
| 152517 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 152518 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 152519 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 152520 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 152521 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 152522 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152523 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152524 | 0, // ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152525 | 0, // ZPR4_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 152526 | 132, // ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 152527 | 299, // ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo |
| 152528 | 208, // ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo |
| 152529 | 137, // ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 152530 | 211, // ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo |
| 152531 | 139, // ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo |
| 152532 | 215, // ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo |
| 152533 | 129, // ZPR4_with_dsub1_in_FPR64_lo:zsub2_zsub3 -> ZPR2 |
| 152534 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 152535 | 0, // ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 152536 | }, |
| 152537 | { // ZPR4_with_dsub2_in_FPR64_lo |
| 152538 | 7, // ZPR4_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 152539 | 0, // ZPR4_with_dsub2_in_FPR64_lo:bsub_hi |
| 152540 | 56, // ZPR4_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 152541 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub0 |
| 152542 | 56, // ZPR4_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 |
| 152543 | 65, // ZPR4_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 152544 | 56, // ZPR4_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 152545 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub_hi |
| 152546 | 8, // ZPR4_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 152547 | 0, // ZPR4_with_dsub2_in_FPR64_lo:hsub_hi |
| 152548 | 0, // ZPR4_with_dsub2_in_FPR64_lo:psub |
| 152549 | 0, // ZPR4_with_dsub2_in_FPR64_lo:psub0 |
| 152550 | 0, // ZPR4_with_dsub2_in_FPR64_lo:psub1 |
| 152551 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub0 |
| 152552 | 92, // ZPR4_with_dsub2_in_FPR64_lo:qsub1 -> FPR128 |
| 152553 | 94, // ZPR4_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 152554 | 92, // ZPR4_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 152555 | 40, // ZPR4_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 152556 | 0, // ZPR4_with_dsub2_in_FPR64_lo:ssub_hi |
| 152557 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sub_32 |
| 152558 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sub_32_hi |
| 152559 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sube32 |
| 152560 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sube64 |
| 152561 | 0, // ZPR4_with_dsub2_in_FPR64_lo:subo32 |
| 152562 | 0, // ZPR4_with_dsub2_in_FPR64_lo:subo64 |
| 152563 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_0 |
| 152564 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_1 |
| 152565 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_2 |
| 152566 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_3 |
| 152567 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_4 |
| 152568 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_5 |
| 152569 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_6 |
| 152570 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_7 |
| 152571 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubb |
| 152572 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubd0 |
| 152573 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubd1 |
| 152574 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh0 |
| 152575 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1 |
| 152576 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubq0 |
| 152577 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubq1 |
| 152578 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs0 |
| 152579 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1 |
| 152580 | 92, // ZPR4_with_dsub2_in_FPR64_lo:zsub -> FPR128 |
| 152581 | 93, // ZPR4_with_dsub2_in_FPR64_lo:zsub0 -> ZPR |
| 152582 | 93, // ZPR4_with_dsub2_in_FPR64_lo:zsub1 -> ZPR |
| 152583 | 97, // ZPR4_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 152584 | 93, // ZPR4_with_dsub2_in_FPR64_lo:zsub3 -> ZPR |
| 152585 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub_hi |
| 152586 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 152587 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 152588 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 152589 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 152590 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 152591 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 152592 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 152593 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 152594 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 152595 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 152596 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 152597 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 152598 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 152599 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 152600 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 152601 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 152602 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 152603 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 152604 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 152605 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 152606 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152607 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152608 | 7, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 152609 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 152610 | 8, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 152611 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 152612 | 40, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 152613 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 152614 | 7, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 152615 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 152616 | 8, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 152617 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 152618 | 40, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 152619 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 152620 | 7, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 152621 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 152622 | 10, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 152623 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 152624 | 44, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 152625 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 152626 | 0, // ZPR4_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 152627 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 152628 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 152629 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 152630 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 152631 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 152632 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 152633 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 152634 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 152635 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 152636 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 152637 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 152638 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 152639 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 152640 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 152641 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 152642 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 152643 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 152644 | 0, // ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 152645 | 0, // ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 152646 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 152647 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 152648 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 152649 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 152650 | 0, // ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 152651 | 77, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 152652 | 112, // ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo |
| 152653 | 76, // ZPR4_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 152654 | 75, // ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD |
| 152655 | 120, // ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo |
| 152656 | 113, // ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 152657 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 152658 | 0, // ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 152659 | 132, // ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 152660 | 208, // ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo |
| 152661 | 133, // ZPR4_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 152662 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 152663 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 152664 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 152665 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 152666 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 152667 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152668 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152669 | 0, // ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152670 | 0, // ZPR4_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 152671 | 128, // ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ |
| 152672 | 300, // ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo |
| 152673 | 209, // ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 152674 | 129, // ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2 |
| 152675 | 212, // ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 152676 | 137, // ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub1_in_FPR64_lo |
| 152677 | 211, // ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub1_in_FPR64_lo |
| 152678 | 139, // ZPR4_with_dsub2_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo |
| 152679 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 152680 | 0, // ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 152681 | }, |
| 152682 | { // ZPR4_with_dsub3_in_FPR64_lo |
| 152683 | 7, // ZPR4_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 152684 | 0, // ZPR4_with_dsub3_in_FPR64_lo:bsub_hi |
| 152685 | 56, // ZPR4_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 152686 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub0 |
| 152687 | 56, // ZPR4_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 152688 | 56, // ZPR4_with_dsub3_in_FPR64_lo:dsub2 -> FPR64 |
| 152689 | 65, // ZPR4_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 152690 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub_hi |
| 152691 | 8, // ZPR4_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 152692 | 0, // ZPR4_with_dsub3_in_FPR64_lo:hsub_hi |
| 152693 | 0, // ZPR4_with_dsub3_in_FPR64_lo:psub |
| 152694 | 0, // ZPR4_with_dsub3_in_FPR64_lo:psub0 |
| 152695 | 0, // ZPR4_with_dsub3_in_FPR64_lo:psub1 |
| 152696 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub0 |
| 152697 | 92, // ZPR4_with_dsub3_in_FPR64_lo:qsub1 -> FPR128 |
| 152698 | 92, // ZPR4_with_dsub3_in_FPR64_lo:qsub2 -> FPR128 |
| 152699 | 94, // ZPR4_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 152700 | 40, // ZPR4_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 152701 | 0, // ZPR4_with_dsub3_in_FPR64_lo:ssub_hi |
| 152702 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sub_32 |
| 152703 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sub_32_hi |
| 152704 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sube32 |
| 152705 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sube64 |
| 152706 | 0, // ZPR4_with_dsub3_in_FPR64_lo:subo32 |
| 152707 | 0, // ZPR4_with_dsub3_in_FPR64_lo:subo64 |
| 152708 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_0 |
| 152709 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_1 |
| 152710 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_2 |
| 152711 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_3 |
| 152712 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_4 |
| 152713 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_5 |
| 152714 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_6 |
| 152715 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_7 |
| 152716 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubb |
| 152717 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubd0 |
| 152718 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubd1 |
| 152719 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh0 |
| 152720 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1 |
| 152721 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubq0 |
| 152722 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubq1 |
| 152723 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs0 |
| 152724 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1 |
| 152725 | 92, // ZPR4_with_dsub3_in_FPR64_lo:zsub -> FPR128 |
| 152726 | 93, // ZPR4_with_dsub3_in_FPR64_lo:zsub0 -> ZPR |
| 152727 | 93, // ZPR4_with_dsub3_in_FPR64_lo:zsub1 -> ZPR |
| 152728 | 93, // ZPR4_with_dsub3_in_FPR64_lo:zsub2 -> ZPR |
| 152729 | 97, // ZPR4_with_dsub3_in_FPR64_lo:zsub3 -> ZPR_4b |
| 152730 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub_hi |
| 152731 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 152732 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 152733 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 152734 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 152735 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 152736 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 152737 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 152738 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 152739 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 152740 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 152741 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 152742 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 152743 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 152744 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 152745 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 152746 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 152747 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 152748 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 152749 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 152750 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 152751 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152752 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152753 | 7, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 152754 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 152755 | 8, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 152756 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 152757 | 40, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 152758 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 152759 | 7, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 152760 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 152761 | 10, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 152762 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 152763 | 44, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 152764 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 152765 | 7, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 152766 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 152767 | 8, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 152768 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 152769 | 40, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 152770 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 152771 | 0, // ZPR4_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 152772 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 152773 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 152774 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 152775 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 152776 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 152777 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 152778 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 152779 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 152780 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 152781 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 152782 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 152783 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 152784 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 152785 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 152786 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 152787 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 152788 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 152789 | 0, // ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 152790 | 0, // ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 152791 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 152792 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 152793 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 152794 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 152795 | 0, // ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 152796 | 75, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD |
| 152797 | 113, // ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 152798 | 77, // ZPR4_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 152799 | 75, // ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD |
| 152800 | 121, // ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 152801 | 110, // ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD |
| 152802 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 152803 | 0, // ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 152804 | 128, // ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ |
| 152805 | 209, // ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub2_in_FPR64_lo |
| 152806 | 132, // ZPR4_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_dsub1_in_FPR64_lo |
| 152807 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 152808 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 152809 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 152810 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 152811 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 152812 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152813 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152814 | 0, // ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152815 | 0, // ZPR4_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 152816 | 128, // ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1 -> QQ |
| 152817 | 301, // ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 152818 | 206, // ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ |
| 152819 | 129, // ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1 -> ZPR2 |
| 152820 | 207, // ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3 |
| 152821 | 129, // ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2 -> ZPR2 |
| 152822 | 212, // ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub2_in_FPR64_lo |
| 152823 | 137, // ZPR4_with_dsub3_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_dsub1_in_FPR64_lo |
| 152824 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 152825 | 0, // ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 152826 | }, |
| 152827 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 152828 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 |
| 152829 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:bsub_hi |
| 152830 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 |
| 152831 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 |
| 152832 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 -> FPR64 |
| 152833 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 -> FPR64 |
| 152834 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 -> FPR64 |
| 152835 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_hi |
| 152836 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 |
| 152837 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:hsub_hi |
| 152838 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub |
| 152839 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub0 |
| 152840 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub1 |
| 152841 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 |
| 152842 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 -> FPR128 |
| 152843 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 -> FPR128 |
| 152844 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 -> FPR128 |
| 152845 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 |
| 152846 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:ssub_hi |
| 152847 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 |
| 152848 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_hi |
| 152849 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sube32 |
| 152850 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sube64 |
| 152851 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo32 |
| 152852 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo64 |
| 152853 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 |
| 152854 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 |
| 152855 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 |
| 152856 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 |
| 152857 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 |
| 152858 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 |
| 152859 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 |
| 152860 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 |
| 152861 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubb |
| 152862 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 |
| 152863 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 |
| 152864 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 |
| 152865 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 |
| 152866 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 |
| 152867 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 |
| 152868 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 |
| 152869 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 |
| 152870 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 |
| 152871 | 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPRMul2 |
| 152872 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR |
| 152873 | 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPRMul2 |
| 152874 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR |
| 152875 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi |
| 152876 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 |
| 152877 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 |
| 152878 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 |
| 152879 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 |
| 152880 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 |
| 152881 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 |
| 152882 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 |
| 152883 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 |
| 152884 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 |
| 152885 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 |
| 152886 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 |
| 152887 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 |
| 152888 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 |
| 152889 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 |
| 152890 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 |
| 152891 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 |
| 152892 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 |
| 152893 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 |
| 152894 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 |
| 152895 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 |
| 152896 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 152897 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 152898 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub -> FPR8 |
| 152899 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub_hi |
| 152900 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub -> FPR16 |
| 152901 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub_hi |
| 152902 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub -> FPR32 |
| 152903 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub_hi |
| 152904 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub -> FPR8 |
| 152905 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub_hi |
| 152906 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub -> FPR16 |
| 152907 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub_hi |
| 152908 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub -> FPR32 |
| 152909 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub_hi |
| 152910 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub -> FPR8 |
| 152911 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub_hi |
| 152912 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub -> FPR16 |
| 152913 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub_hi |
| 152914 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub -> FPR32 |
| 152915 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub_hi |
| 152916 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub1_then_psub |
| 152917 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_hi |
| 152918 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub_hi |
| 152919 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_hi |
| 152920 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 |
| 152921 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32_hi |
| 152922 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 |
| 152923 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_hi |
| 152924 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 |
| 152925 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32_hi |
| 152926 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 |
| 152927 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_hi |
| 152928 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 |
| 152929 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32_hi |
| 152930 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 |
| 152931 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_hi |
| 152932 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 |
| 152933 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32_hi |
| 152934 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 |
| 152935 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32_hi |
| 152936 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi |
| 152937 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi |
| 152938 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi |
| 152939 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 |
| 152940 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 |
| 152941 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 -> DD |
| 152942 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 -> DDD |
| 152943 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 -> DD |
| 152944 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1 -> DD |
| 152945 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 152946 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_dsub1_dsub2 -> DDD |
| 152947 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 |
| 152948 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 |
| 152949 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 -> QQ |
| 152950 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 -> QQQ |
| 152951 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 -> QQ |
| 152952 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 |
| 152953 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 |
| 152954 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 |
| 152955 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 |
| 152956 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 |
| 152957 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 152958 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 152959 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 152960 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 |
| 152961 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1 -> QQ |
| 152962 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 152963 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_qsub1_qsub2 -> QQQ |
| 152964 | 134, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 |
| 152965 | 213, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 152966 | 138, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 152967 | 214, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 152968 | 134, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2Mul2 |
| 152969 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 |
| 152970 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 |
| 152971 | }, |
| 152972 | { // ZPR4_with_zsub1_in_ZPRMul2 |
| 152973 | 7, // ZPR4_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 152974 | 0, // ZPR4_with_zsub1_in_ZPRMul2:bsub_hi |
| 152975 | 56, // ZPR4_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 152976 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub0 |
| 152977 | 56, // ZPR4_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 152978 | 56, // ZPR4_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 152979 | 56, // ZPR4_with_zsub1_in_ZPRMul2:dsub3 -> FPR64 |
| 152980 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub_hi |
| 152981 | 8, // ZPR4_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 152982 | 0, // ZPR4_with_zsub1_in_ZPRMul2:hsub_hi |
| 152983 | 0, // ZPR4_with_zsub1_in_ZPRMul2:psub |
| 152984 | 0, // ZPR4_with_zsub1_in_ZPRMul2:psub0 |
| 152985 | 0, // ZPR4_with_zsub1_in_ZPRMul2:psub1 |
| 152986 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub0 |
| 152987 | 92, // ZPR4_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 152988 | 92, // ZPR4_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 152989 | 92, // ZPR4_with_zsub1_in_ZPRMul2:qsub3 -> FPR128 |
| 152990 | 40, // ZPR4_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 152991 | 0, // ZPR4_with_zsub1_in_ZPRMul2:ssub_hi |
| 152992 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sub_32 |
| 152993 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sub_32_hi |
| 152994 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sube32 |
| 152995 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sube64 |
| 152996 | 0, // ZPR4_with_zsub1_in_ZPRMul2:subo32 |
| 152997 | 0, // ZPR4_with_zsub1_in_ZPRMul2:subo64 |
| 152998 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_0 |
| 152999 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_1 |
| 153000 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_2 |
| 153001 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_3 |
| 153002 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_4 |
| 153003 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_5 |
| 153004 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_6 |
| 153005 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_7 |
| 153006 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubb |
| 153007 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubd0 |
| 153008 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubd1 |
| 153009 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh0 |
| 153010 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1 |
| 153011 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubq0 |
| 153012 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubq1 |
| 153013 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs0 |
| 153014 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1 |
| 153015 | 92, // ZPR4_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 153016 | 93, // ZPR4_with_zsub1_in_ZPRMul2:zsub0 -> ZPR |
| 153017 | 96, // ZPR4_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 153018 | 93, // ZPR4_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 153019 | 96, // ZPR4_with_zsub1_in_ZPRMul2:zsub3 -> ZPRMul2 |
| 153020 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub_hi |
| 153021 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 153022 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 153023 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 153024 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 153025 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 153026 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 153027 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 153028 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 153029 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 153030 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 153031 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 153032 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 153033 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 153034 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 153035 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 153036 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 153037 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 153038 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 153039 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 153040 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 153041 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153042 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153043 | 7, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 153044 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 153045 | 8, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 153046 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 153047 | 40, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 153048 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 153049 | 7, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 153050 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 153051 | 8, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub -> FPR16 |
| 153052 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 153053 | 40, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub -> FPR32 |
| 153054 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 153055 | 7, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 153056 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 153057 | 8, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 153058 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 153059 | 40, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 153060 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 153061 | 0, // ZPR4_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 153062 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 153063 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 153064 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 153065 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 153066 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 153067 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 153068 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 153069 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 153070 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 153071 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 153072 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 153073 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 153074 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 153075 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 153076 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 153077 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 153078 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 153079 | 0, // ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 153080 | 0, // ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 153081 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 153082 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 153083 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 153084 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 153085 | 0, // ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 153086 | 75, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 153087 | 110, // ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD |
| 153088 | 75, // ZPR4_with_zsub1_in_ZPRMul2:dsub2_dsub3 -> DD |
| 153089 | 75, // ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 153090 | 117, // ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 153091 | 110, // ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 153092 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 153093 | 0, // ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 153094 | 128, // ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 153095 | 206, // ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ |
| 153096 | 128, // ZPR4_with_zsub1_in_ZPRMul2:qsub2_qsub3 -> QQ |
| 153097 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 153098 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 153099 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 153100 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 153101 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 153102 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153103 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153104 | 0, // ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153105 | 0, // ZPR4_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 153106 | 128, // ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 153107 | 297, // ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 153108 | 206, // ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 153109 | 138, // ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 153110 | 214, // ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 153111 | 134, // ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 153112 | 213, // ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 153113 | 138, // ZPR4_with_zsub1_in_ZPRMul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 153114 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 153115 | 0, // ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 153116 | }, |
| 153117 | { // ZPR4_with_zsub_in_FPR128_lo |
| 153118 | 7, // ZPR4_with_zsub_in_FPR128_lo:bsub -> FPR8 |
| 153119 | 0, // ZPR4_with_zsub_in_FPR128_lo:bsub_hi |
| 153120 | 65, // ZPR4_with_zsub_in_FPR128_lo:dsub -> FPR64_lo |
| 153121 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub0 |
| 153122 | 56, // ZPR4_with_zsub_in_FPR128_lo:dsub1 -> FPR64 |
| 153123 | 56, // ZPR4_with_zsub_in_FPR128_lo:dsub2 -> FPR64 |
| 153124 | 56, // ZPR4_with_zsub_in_FPR128_lo:dsub3 -> FPR64 |
| 153125 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub_hi |
| 153126 | 10, // ZPR4_with_zsub_in_FPR128_lo:hsub -> FPR16_lo |
| 153127 | 0, // ZPR4_with_zsub_in_FPR128_lo:hsub_hi |
| 153128 | 0, // ZPR4_with_zsub_in_FPR128_lo:psub |
| 153129 | 0, // ZPR4_with_zsub_in_FPR128_lo:psub0 |
| 153130 | 0, // ZPR4_with_zsub_in_FPR128_lo:psub1 |
| 153131 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub0 |
| 153132 | 92, // ZPR4_with_zsub_in_FPR128_lo:qsub1 -> FPR128 |
| 153133 | 92, // ZPR4_with_zsub_in_FPR128_lo:qsub2 -> FPR128 |
| 153134 | 92, // ZPR4_with_zsub_in_FPR128_lo:qsub3 -> FPR128 |
| 153135 | 44, // ZPR4_with_zsub_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153136 | 0, // ZPR4_with_zsub_in_FPR128_lo:ssub_hi |
| 153137 | 0, // ZPR4_with_zsub_in_FPR128_lo:sub_32 |
| 153138 | 0, // ZPR4_with_zsub_in_FPR128_lo:sub_32_hi |
| 153139 | 0, // ZPR4_with_zsub_in_FPR128_lo:sube32 |
| 153140 | 0, // ZPR4_with_zsub_in_FPR128_lo:sube64 |
| 153141 | 0, // ZPR4_with_zsub_in_FPR128_lo:subo32 |
| 153142 | 0, // ZPR4_with_zsub_in_FPR128_lo:subo64 |
| 153143 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_0 |
| 153144 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_1 |
| 153145 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_2 |
| 153146 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_3 |
| 153147 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_4 |
| 153148 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_5 |
| 153149 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_6 |
| 153150 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_7 |
| 153151 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubb |
| 153152 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubd0 |
| 153153 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubd1 |
| 153154 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh0 |
| 153155 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1 |
| 153156 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubq0 |
| 153157 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubq1 |
| 153158 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs0 |
| 153159 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1 |
| 153160 | 94, // ZPR4_with_zsub_in_FPR128_lo:zsub -> FPR128_lo |
| 153161 | 97, // ZPR4_with_zsub_in_FPR128_lo:zsub0 -> ZPR_4b |
| 153162 | 93, // ZPR4_with_zsub_in_FPR128_lo:zsub1 -> ZPR |
| 153163 | 93, // ZPR4_with_zsub_in_FPR128_lo:zsub2 -> ZPR |
| 153164 | 93, // ZPR4_with_zsub_in_FPR128_lo:zsub3 -> ZPR |
| 153165 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub_hi |
| 153166 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubd1_then_zasubq0 |
| 153167 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubd1_then_zasubq1 |
| 153168 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubd0 |
| 153169 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1 |
| 153170 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubq0 |
| 153171 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubq1 |
| 153172 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153173 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153174 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubd0 |
| 153175 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1 |
| 153176 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubq0 |
| 153177 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubq1 |
| 153178 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs0 |
| 153179 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1 |
| 153180 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153181 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153182 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153183 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153184 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153185 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153186 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153187 | 0, // ZPR4_with_zsub_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153188 | 7, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_bsub -> FPR8 |
| 153189 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_bsub_hi |
| 153190 | 8, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_hsub -> FPR16 |
| 153191 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_hsub_hi |
| 153192 | 40, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_ssub -> FPR32 |
| 153193 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub1_then_ssub_hi |
| 153194 | 7, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_bsub -> FPR8 |
| 153195 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_bsub_hi |
| 153196 | 8, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_hsub -> FPR16 |
| 153197 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_hsub_hi |
| 153198 | 40, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_ssub -> FPR32 |
| 153199 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub3_then_ssub_hi |
| 153200 | 7, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_bsub -> FPR8 |
| 153201 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_bsub_hi |
| 153202 | 8, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_hsub -> FPR16 |
| 153203 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_hsub_hi |
| 153204 | 40, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_ssub -> FPR32 |
| 153205 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub2_then_ssub_hi |
| 153206 | 0, // ZPR4_with_zsub_in_FPR128_lo:psub1_then_psub |
| 153207 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub1_then_dsub_hi |
| 153208 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub3_then_dsub_hi |
| 153209 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub2_then_dsub_hi |
| 153210 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32 |
| 153211 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_7_then_sub_32_hi |
| 153212 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32 |
| 153213 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_hi |
| 153214 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32 |
| 153215 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_5_then_sub_32_hi |
| 153216 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32 |
| 153217 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_hi |
| 153218 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32 |
| 153219 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_3_then_sub_32_hi |
| 153220 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32 |
| 153221 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_hi |
| 153222 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32 |
| 153223 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_1_then_sub_32_hi |
| 153224 | 0, // ZPR4_with_zsub_in_FPR128_lo:subo64_then_sub_32 |
| 153225 | 0, // ZPR4_with_zsub_in_FPR128_lo:subo64_then_sub_32_hi |
| 153226 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub1_then_zsub_hi |
| 153227 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub3_then_zsub_hi |
| 153228 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub2_then_zsub_hi |
| 153229 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub0_dsub1 |
| 153230 | 0, // ZPR4_with_zsub_in_FPR128_lo:dsub0_dsub1_dsub2 |
| 153231 | 75, // ZPR4_with_zsub_in_FPR128_lo:dsub1_dsub2 -> DD |
| 153232 | 110, // ZPR4_with_zsub_in_FPR128_lo:dsub1_dsub2_dsub3 -> DDD |
| 153233 | 75, // ZPR4_with_zsub_in_FPR128_lo:dsub2_dsub3 -> DD |
| 153234 | 76, // ZPR4_with_zsub_in_FPR128_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 153235 | 118, // ZPR4_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 153236 | 111, // ZPR4_with_zsub_in_FPR128_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 153237 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub0_qsub1 |
| 153238 | 0, // ZPR4_with_zsub_in_FPR128_lo:qsub0_qsub1_qsub2 |
| 153239 | 128, // ZPR4_with_zsub_in_FPR128_lo:qsub1_qsub2 -> QQ |
| 153240 | 206, // ZPR4_with_zsub_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ |
| 153241 | 128, // ZPR4_with_zsub_in_FPR128_lo:qsub2_qsub3 -> QQ |
| 153242 | 0, // ZPR4_with_zsub_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 |
| 153243 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_0_x8sub_1 |
| 153244 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_2_x8sub_3 |
| 153245 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_4_x8sub_5 |
| 153246 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_6_x8sub_7 |
| 153247 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153248 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153249 | 0, // ZPR4_with_zsub_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153250 | 0, // ZPR4_with_zsub_in_FPR128_lo:sub_32_subo64_then_sub_32 |
| 153251 | 133, // ZPR4_with_zsub_in_FPR128_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 153252 | 302, // ZPR4_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 153253 | 210, // ZPR4_with_zsub_in_FPR128_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 153254 | 139, // ZPR4_with_zsub_in_FPR128_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo |
| 153255 | 215, // ZPR4_with_zsub_in_FPR128_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo |
| 153256 | 129, // ZPR4_with_zsub_in_FPR128_lo:zsub1_zsub2 -> ZPR2 |
| 153257 | 207, // ZPR4_with_zsub_in_FPR128_lo:zsub1_zsub2_zsub3 -> ZPR3 |
| 153258 | 129, // ZPR4_with_zsub_in_FPR128_lo:zsub2_zsub3 -> ZPR2 |
| 153259 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub0_zsub2 |
| 153260 | 0, // ZPR4_with_zsub_in_FPR128_lo:zsub1_zsub3 |
| 153261 | }, |
| 153262 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 153263 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 153264 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 153265 | 56, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 153266 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 153267 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 153268 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 153269 | 56, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 153270 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 153271 | 8, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 153272 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 153273 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub |
| 153274 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub0 |
| 153275 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub1 |
| 153276 | 92, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128 |
| 153277 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 153278 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 153279 | 92, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 153280 | 40, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 153281 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 153282 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 153283 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 153284 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sube32 |
| 153285 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sube64 |
| 153286 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo32 |
| 153287 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64 |
| 153288 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 153289 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 153290 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 153291 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 153292 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 153293 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 153294 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 153295 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 153296 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubb |
| 153297 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 153298 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 153299 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 153300 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 153301 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 153302 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 153303 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 153304 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 153305 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub |
| 153306 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 153307 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 153308 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 153309 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 153310 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 153311 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 153312 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 153313 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 153314 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 153315 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 153316 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 153317 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153318 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153319 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 153320 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 153321 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 153322 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 153323 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 153324 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 153325 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153326 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153327 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153328 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153329 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153330 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153331 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153332 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153333 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 153334 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 153335 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 153336 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 153337 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153338 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 153339 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 153340 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 153341 | 8, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 153342 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 153343 | 40, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 153344 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 153345 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 153346 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 153347 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 153348 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 153349 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153350 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 153351 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 153352 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 153353 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 153354 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 153355 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 153356 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 153357 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 153358 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 153359 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 153360 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 153361 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 153362 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 153363 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 153364 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 153365 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 153366 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 153367 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 153368 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 153369 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 153370 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 153371 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 153372 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 153373 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 153374 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 153375 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 153376 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 153377 | 114, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 153378 | 76, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 153379 | 77, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 153380 | 123, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 153381 | 115, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 153382 | 132, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 153383 | 216, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 153384 | 140, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 153385 | 217, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 153386 | 133, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 153387 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 153388 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 153389 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 153390 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 153391 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 153392 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153393 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153394 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153395 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 153396 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 153397 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 153398 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 153399 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 153400 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 153401 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 153402 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 153403 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 153404 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 153405 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 153406 | }, |
| 153407 | { // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 153408 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 153409 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub_hi |
| 153410 | 56, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 153411 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0 |
| 153412 | 56, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 153413 | 65, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 153414 | 65, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 153415 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_hi |
| 153416 | 8, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 153417 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub_hi |
| 153418 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub |
| 153419 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub0 |
| 153420 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1 |
| 153421 | 92, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0 -> FPR128 |
| 153422 | 92, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1 -> FPR128 |
| 153423 | 94, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 153424 | 94, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 153425 | 40, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 153426 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub_hi |
| 153427 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32 |
| 153428 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_hi |
| 153429 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube32 |
| 153430 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube64 |
| 153431 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo32 |
| 153432 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64 |
| 153433 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0 |
| 153434 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1 |
| 153435 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2 |
| 153436 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3 |
| 153437 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4 |
| 153438 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5 |
| 153439 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6 |
| 153440 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7 |
| 153441 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubb |
| 153442 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd0 |
| 153443 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1 |
| 153444 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh0 |
| 153445 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1 |
| 153446 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq0 |
| 153447 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq1 |
| 153448 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs0 |
| 153449 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1 |
| 153450 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub |
| 153451 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0 |
| 153452 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1 |
| 153453 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2 |
| 153454 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3 |
| 153455 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_hi |
| 153456 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 153457 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 153458 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 153459 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 153460 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 153461 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 153462 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153463 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153464 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 153465 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 153466 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 153467 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 153468 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 153469 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 153470 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153471 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153472 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153473 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153474 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153475 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153476 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153477 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153478 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 153479 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 153480 | 8, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 153481 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 153482 | 40, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 153483 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 153484 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 153485 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 153486 | 10, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 153487 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 153488 | 44, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153489 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 153490 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 153491 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 153492 | 10, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 153493 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 153494 | 44, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153495 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 153496 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 153497 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 153498 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 153499 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 153500 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 153501 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 153502 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 153503 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 153504 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 153505 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 153506 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 153507 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 153508 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 153509 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 153510 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 153511 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 153512 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 153513 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 153514 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 153515 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 153516 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 153517 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 153518 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 153519 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 153520 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 153521 | 77, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 153522 | 115, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 153523 | 79, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 153524 | 75, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD |
| 153525 | 124, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 153526 | 113, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 153527 | 128, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1 -> QQ |
| 153528 | 209, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 153529 | 132, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 153530 | 216, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 153531 | 140, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 153532 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 153533 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 153534 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 153535 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 153536 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 153537 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153538 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153539 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153540 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 153541 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 153542 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 153543 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 153544 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 153545 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 153546 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 153547 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 153548 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 153549 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 153550 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 153551 | }, |
| 153552 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 153553 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 153554 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:bsub_hi |
| 153555 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 153556 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub0 |
| 153557 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 153558 | 56, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 153559 | 56, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 153560 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub_hi |
| 153561 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 153562 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:hsub_hi |
| 153563 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:psub |
| 153564 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:psub0 |
| 153565 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:psub1 |
| 153566 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub0 -> FPR128_lo |
| 153567 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 153568 | 92, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 153569 | 92, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub3 -> FPR128 |
| 153570 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153571 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:ssub_hi |
| 153572 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sub_32 |
| 153573 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sub_32_hi |
| 153574 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sube32 |
| 153575 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sube64 |
| 153576 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:subo32 |
| 153577 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:subo64 |
| 153578 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_0 |
| 153579 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_1 |
| 153580 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_2 |
| 153581 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_3 |
| 153582 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_4 |
| 153583 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_5 |
| 153584 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_6 |
| 153585 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_7 |
| 153586 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubb |
| 153587 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubd0 |
| 153588 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubd1 |
| 153589 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh0 |
| 153590 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1 |
| 153591 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubq0 |
| 153592 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubq1 |
| 153593 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs0 |
| 153594 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1 |
| 153595 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub |
| 153596 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub0 |
| 153597 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub1 |
| 153598 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub2 |
| 153599 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub3 |
| 153600 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub_hi |
| 153601 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 153602 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 153603 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 153604 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 153605 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 153606 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 153607 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153608 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153609 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 153610 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 153611 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 153612 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 153613 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 153614 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 153615 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153616 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153617 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153618 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153619 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153620 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153621 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153622 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153623 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 153624 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 153625 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 153626 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 153627 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153628 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 153629 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 153630 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 153631 | 8, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 153632 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 153633 | 40, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 153634 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 153635 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 153636 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 153637 | 8, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 153638 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 153639 | 40, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 153640 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 153641 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 153642 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 153643 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 153644 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 153645 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 153646 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 153647 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 153648 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 153649 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 153650 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 153651 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 153652 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 153653 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 153654 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 153655 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 153656 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 153657 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 153658 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 153659 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 153660 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 153661 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 153662 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 153663 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 153664 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 153665 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 153666 | 76, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 153667 | 111, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 153668 | 75, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 153669 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 153670 | 122, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 153671 | 114, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 153672 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 153673 | 217, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 153674 | 133, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 153675 | 210, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 153676 | 128, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:qsub2_qsub3 -> QQ |
| 153677 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 153678 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 153679 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 153680 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 153681 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 153682 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153683 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153684 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153685 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 153686 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1 |
| 153687 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 153688 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 |
| 153689 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1 |
| 153690 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 153691 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2 |
| 153692 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 153693 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub2_zsub3 |
| 153694 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 153695 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 153696 | }, |
| 153697 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 153698 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 153699 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:bsub_hi |
| 153700 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub -> FPR64 |
| 153701 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0 |
| 153702 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 153703 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 153704 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 153705 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_hi |
| 153706 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:hsub -> FPR16 |
| 153707 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:hsub_hi |
| 153708 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub |
| 153709 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub0 |
| 153710 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub1 |
| 153711 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0 |
| 153712 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 153713 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 153714 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 153715 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:ssub -> FPR32 |
| 153716 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:ssub_hi |
| 153717 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32 |
| 153718 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_hi |
| 153719 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sube32 |
| 153720 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sube64 |
| 153721 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo32 |
| 153722 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64 |
| 153723 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_0 |
| 153724 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1 |
| 153725 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2 |
| 153726 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3 |
| 153727 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4 |
| 153728 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5 |
| 153729 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6 |
| 153730 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7 |
| 153731 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubb |
| 153732 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd0 |
| 153733 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1 |
| 153734 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh0 |
| 153735 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1 |
| 153736 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubq0 |
| 153737 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubq1 |
| 153738 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs0 |
| 153739 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1 |
| 153740 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub -> FPR128 |
| 153741 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0 -> ZPR |
| 153742 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1 -> ZPR_4b |
| 153743 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 153744 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub3 -> ZPR |
| 153745 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_hi |
| 153746 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 153747 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 153748 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 153749 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 153750 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 153751 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 153752 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153753 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153754 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 153755 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 153756 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 153757 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 153758 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 153759 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 153760 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153761 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153762 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153763 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153764 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153765 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153766 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153767 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153768 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 153769 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 153770 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 153771 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 153772 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153773 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 153774 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 153775 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 153776 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 153777 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 153778 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 153779 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 153780 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 153781 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 153782 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 153783 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 153784 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153785 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 153786 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 153787 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 153788 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 153789 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 153790 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 153791 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 153792 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 153793 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 153794 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 153795 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 153796 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 153797 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 153798 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 153799 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 153800 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 153801 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 153802 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 153803 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 153804 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 153805 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 153806 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 153807 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 153808 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 153809 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 153810 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 153811 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 153812 | 114, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 153813 | 76, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 153814 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 153815 | 123, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 153816 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 153817 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 153818 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 153819 | 140, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 153820 | 217, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 153821 | 133, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 153822 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 153823 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 153824 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 153825 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 153826 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 153827 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153828 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153829 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153830 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 153831 | 132, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 153832 | 310, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 153833 | 216, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 153834 | 137, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 153835 | 218, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 153836 | 141, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 153837 | 219, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 153838 | 139, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo |
| 153839 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 153840 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 153841 | }, |
| 153842 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 153843 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 153844 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub_hi |
| 153845 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 153846 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0 |
| 153847 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 |
| 153848 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 153849 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 153850 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_hi |
| 153851 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 153852 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub_hi |
| 153853 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub |
| 153854 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub0 |
| 153855 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1 |
| 153856 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0 |
| 153857 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1 -> FPR128 |
| 153858 | 94, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 153859 | 94, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 153860 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 153861 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub_hi |
| 153862 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32 |
| 153863 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_hi |
| 153864 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube32 |
| 153865 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube64 |
| 153866 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo32 |
| 153867 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64 |
| 153868 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0 |
| 153869 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1 |
| 153870 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2 |
| 153871 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3 |
| 153872 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4 |
| 153873 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5 |
| 153874 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6 |
| 153875 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7 |
| 153876 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubb |
| 153877 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd0 |
| 153878 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1 |
| 153879 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh0 |
| 153880 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1 |
| 153881 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq0 |
| 153882 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq1 |
| 153883 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs0 |
| 153884 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1 |
| 153885 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub -> FPR128 |
| 153886 | 93, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0 -> ZPR |
| 153887 | 93, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1 -> ZPR |
| 153888 | 97, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2 -> ZPR_4b |
| 153889 | 97, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3 -> ZPR_4b |
| 153890 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_hi |
| 153891 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 153892 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 153893 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 153894 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 153895 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 153896 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 153897 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 153898 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 153899 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 153900 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 153901 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 153902 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 153903 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 153904 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 153905 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 153906 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 153907 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 153908 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 153909 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 153910 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 153911 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 153912 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 153913 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 153914 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 153915 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 |
| 153916 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 153917 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 |
| 153918 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 153919 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 153920 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 153921 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 153922 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 153923 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153924 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 153925 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 153926 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 153927 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 153928 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 153929 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 153930 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 153931 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 153932 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 153933 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 153934 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 153935 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 153936 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 153937 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 153938 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 153939 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 153940 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 153941 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 153942 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 153943 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 153944 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 153945 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 153946 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 153947 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 153948 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 153949 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 153950 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 153951 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 153952 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 153953 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 153954 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 153955 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 153956 | 77, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 153957 | 115, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 153958 | 79, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 153959 | 75, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD |
| 153960 | 124, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 153961 | 113, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 153962 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 153963 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 153964 | 132, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 153965 | 216, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 153966 | 140, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 153967 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 153968 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 153969 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 153970 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 153971 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 153972 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 153973 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 153974 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 153975 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 153976 | 128, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1 -> QQ |
| 153977 | 311, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 153978 | 209, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 153979 | 129, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1 -> ZPR2 |
| 153980 | 212, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo |
| 153981 | 137, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub1_in_FPR64_lo |
| 153982 | 218, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 153983 | 141, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 153984 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 153985 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 153986 | }, |
| 153987 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 153988 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:bsub -> FPR8 |
| 153989 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:bsub_hi |
| 153990 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub -> FPR64_lo |
| 153991 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub0 |
| 153992 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo |
| 153993 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 |
| 153994 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 |
| 153995 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub_hi |
| 153996 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo |
| 153997 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:hsub_hi |
| 153998 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:psub |
| 153999 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:psub0 |
| 154000 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:psub1 |
| 154001 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub0 |
| 154002 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154003 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub2 -> FPR128 |
| 154004 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub3 -> FPR128 |
| 154005 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154006 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:ssub_hi |
| 154007 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sub_32 |
| 154008 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sub_32_hi |
| 154009 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sube32 |
| 154010 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sube64 |
| 154011 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:subo32 |
| 154012 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:subo64 |
| 154013 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_0 |
| 154014 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_1 |
| 154015 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_2 |
| 154016 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_3 |
| 154017 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_4 |
| 154018 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_5 |
| 154019 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_6 |
| 154020 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_7 |
| 154021 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubb |
| 154022 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubd0 |
| 154023 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubd1 |
| 154024 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh0 |
| 154025 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1 |
| 154026 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubq0 |
| 154027 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubq1 |
| 154028 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs0 |
| 154029 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1 |
| 154030 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub -> FPR128_lo |
| 154031 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub0 -> ZPR_4b |
| 154032 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub1 -> ZPR_4b |
| 154033 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub2 -> ZPR |
| 154034 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub3 -> ZPR |
| 154035 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub_hi |
| 154036 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154037 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154038 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154039 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154040 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154041 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154042 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154043 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154044 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154045 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154046 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154047 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154048 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154049 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154050 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154051 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154052 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154053 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154054 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154055 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154056 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154057 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154058 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154059 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_bsub_hi |
| 154060 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154061 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_hsub_hi |
| 154062 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154063 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_then_ssub_hi |
| 154064 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154065 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_bsub_hi |
| 154066 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 154067 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_hsub_hi |
| 154068 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 154069 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub3_then_ssub_hi |
| 154070 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154071 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_bsub_hi |
| 154072 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 |
| 154073 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_hsub_hi |
| 154074 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 |
| 154075 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_then_ssub_hi |
| 154076 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:psub1_then_psub |
| 154077 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub1_then_dsub_hi |
| 154078 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub3_then_dsub_hi |
| 154079 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub2_then_dsub_hi |
| 154080 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154081 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154082 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154083 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154084 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154085 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154086 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154087 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154088 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154089 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154090 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154091 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154092 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154093 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154094 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:subo64_then_sub_32 |
| 154095 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:subo64_then_sub_32_hi |
| 154096 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi |
| 154097 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi |
| 154098 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi |
| 154099 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub0_dsub1 |
| 154100 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154101 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 154102 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 154103 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD |
| 154104 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154105 | 122, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 154106 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 154107 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub0_qsub1 |
| 154108 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 154109 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 154110 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 154111 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:qsub2_qsub3 -> QQ |
| 154112 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154113 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154114 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154115 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154116 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154117 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154118 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154119 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154120 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154121 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154122 | 312, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 154123 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 154124 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154125 | 219, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 154126 | 139, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo |
| 154127 | 215, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo |
| 154128 | 129, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub2_zsub3 -> ZPR2 |
| 154129 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub0_zsub2 |
| 154130 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo:zsub1_zsub3 |
| 154131 | }, |
| 154132 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 154133 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 154134 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub_hi |
| 154135 | 56, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 154136 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0 |
| 154137 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154138 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154139 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 154140 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_hi |
| 154141 | 8, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 154142 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub_hi |
| 154143 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub |
| 154144 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub0 |
| 154145 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1 |
| 154146 | 92, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0 -> FPR128 |
| 154147 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154148 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154149 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 154150 | 40, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 154151 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub_hi |
| 154152 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32 |
| 154153 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_hi |
| 154154 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube32 |
| 154155 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube64 |
| 154156 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo32 |
| 154157 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64 |
| 154158 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0 |
| 154159 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1 |
| 154160 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2 |
| 154161 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3 |
| 154162 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4 |
| 154163 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5 |
| 154164 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6 |
| 154165 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7 |
| 154166 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubb |
| 154167 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd0 |
| 154168 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1 |
| 154169 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh0 |
| 154170 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1 |
| 154171 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq0 |
| 154172 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq1 |
| 154173 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs0 |
| 154174 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1 |
| 154175 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub |
| 154176 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0 |
| 154177 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1 |
| 154178 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2 |
| 154179 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3 |
| 154180 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_hi |
| 154181 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154182 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154183 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154184 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154185 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154186 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154187 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154188 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154189 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154190 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154191 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154192 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154193 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154194 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154195 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154196 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154197 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154198 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154199 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154200 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154201 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154202 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154203 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154204 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 154205 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154206 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 154207 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154208 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 154209 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154210 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 154211 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 154212 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 154213 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154214 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 154215 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154216 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 154217 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154218 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 154219 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154220 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 154221 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 154222 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 154223 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 154224 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 154225 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154226 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154227 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154228 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154229 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154230 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154231 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154232 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154233 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154234 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154235 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154236 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154237 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154238 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154239 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 154240 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 154241 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 154242 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 154243 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 154244 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 154245 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154246 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154247 | 116, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154248 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154249 | 77, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 154250 | 126, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 154251 | 115, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154252 | 132, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 154253 | 216, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154254 | 140, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154255 | 220, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154256 | 140, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154257 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154258 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154259 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154260 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154261 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154262 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154263 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154264 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154265 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154266 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 154267 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 154268 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 154269 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 154270 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 154271 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 154272 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 154273 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 154274 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 154275 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 154276 | }, |
| 154277 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 154278 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 154279 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:bsub_hi |
| 154280 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub -> FPR64_lo |
| 154281 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0 |
| 154282 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154283 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154284 | 56, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 154285 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_hi |
| 154286 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 154287 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:hsub_hi |
| 154288 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub |
| 154289 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub0 |
| 154290 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub1 |
| 154291 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0 -> FPR128_lo |
| 154292 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154293 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154294 | 92, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 154295 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154296 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:ssub_hi |
| 154297 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32 |
| 154298 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_hi |
| 154299 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sube32 |
| 154300 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sube64 |
| 154301 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo32 |
| 154302 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64 |
| 154303 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_0 |
| 154304 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1 |
| 154305 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2 |
| 154306 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3 |
| 154307 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4 |
| 154308 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5 |
| 154309 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6 |
| 154310 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7 |
| 154311 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubb |
| 154312 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd0 |
| 154313 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1 |
| 154314 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh0 |
| 154315 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1 |
| 154316 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubq0 |
| 154317 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubq1 |
| 154318 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs0 |
| 154319 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1 |
| 154320 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub |
| 154321 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0 |
| 154322 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1 |
| 154323 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2 |
| 154324 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub3 |
| 154325 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_hi |
| 154326 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154327 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154328 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154329 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154330 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154331 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154332 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154333 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154334 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154335 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154336 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154337 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154338 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154339 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154340 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154341 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154342 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154343 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154344 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154345 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154346 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154347 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154348 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154349 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 154350 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154351 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 154352 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154353 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 154354 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154355 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 154356 | 8, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 154357 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 154358 | 40, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 154359 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 154360 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154361 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 154362 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154363 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 154364 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154365 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 154366 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 154367 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 154368 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 154369 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 154370 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154371 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154372 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154373 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154374 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154375 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154376 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154377 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154378 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154379 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154380 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154381 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154382 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154383 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154384 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 154385 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 154386 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 154387 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 154388 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 154389 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 154390 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154391 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154392 | 114, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 154393 | 76, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 154394 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154395 | 125, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 154396 | 116, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154397 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154398 | 220, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154399 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154400 | 217, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 154401 | 133, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 154402 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154403 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154404 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154405 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154406 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154407 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154408 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154409 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154410 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154411 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1 |
| 154412 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 154413 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 |
| 154414 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1 |
| 154415 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 154416 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2 |
| 154417 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 154418 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub2_zsub3 |
| 154419 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 154420 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 154421 | }, |
| 154422 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 154423 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 154424 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub_hi |
| 154425 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub -> FPR64 |
| 154426 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0 |
| 154427 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154428 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154429 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 154430 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_hi |
| 154431 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub -> FPR16 |
| 154432 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub_hi |
| 154433 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub |
| 154434 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub0 |
| 154435 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1 |
| 154436 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0 |
| 154437 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154438 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154439 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 154440 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub -> FPR32 |
| 154441 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub_hi |
| 154442 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32 |
| 154443 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_hi |
| 154444 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube32 |
| 154445 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube64 |
| 154446 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo32 |
| 154447 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64 |
| 154448 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0 |
| 154449 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1 |
| 154450 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2 |
| 154451 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3 |
| 154452 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4 |
| 154453 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5 |
| 154454 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6 |
| 154455 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7 |
| 154456 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubb |
| 154457 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd0 |
| 154458 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1 |
| 154459 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh0 |
| 154460 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1 |
| 154461 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq0 |
| 154462 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq1 |
| 154463 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs0 |
| 154464 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1 |
| 154465 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub -> FPR128 |
| 154466 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0 -> ZPR |
| 154467 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1 -> ZPR_4b |
| 154468 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2 -> ZPR_4b |
| 154469 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3 -> ZPR_4b |
| 154470 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_hi |
| 154471 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154472 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154473 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154474 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154475 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154476 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154477 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154478 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154479 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154480 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154481 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154482 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154483 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154484 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154485 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154486 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154487 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154488 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154489 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154490 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154491 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154492 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154493 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154494 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 154495 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154496 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 154497 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154498 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 154499 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154500 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 154501 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 154502 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 154503 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154504 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 154505 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154506 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 154507 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154508 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 154509 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154510 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 154511 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 154512 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 154513 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 154514 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 154515 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154516 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154517 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154518 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154519 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154520 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154521 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154522 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154523 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154524 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154525 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154526 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154527 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154528 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154529 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 154530 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 154531 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 154532 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 154533 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 154534 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 154535 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154536 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154537 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154538 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154539 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 154540 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 154541 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154542 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 154543 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 154544 | 140, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154545 | 220, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154546 | 140, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154547 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154548 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154549 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154550 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154551 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154552 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154553 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154554 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154555 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154556 | 132, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 154557 | 316, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 154558 | 216, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154559 | 137, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo |
| 154560 | 218, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 154561 | 141, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154562 | 221, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 154563 | 141, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154564 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 154565 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 154566 | }, |
| 154567 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 154568 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:bsub -> FPR8 |
| 154569 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:bsub_hi |
| 154570 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub -> FPR64_lo |
| 154571 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0 |
| 154572 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154573 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154574 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 |
| 154575 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_hi |
| 154576 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo |
| 154577 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:hsub_hi |
| 154578 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub |
| 154579 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub0 |
| 154580 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub1 |
| 154581 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0 |
| 154582 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154583 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154584 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub3 -> FPR128 |
| 154585 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154586 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:ssub_hi |
| 154587 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32 |
| 154588 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_hi |
| 154589 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sube32 |
| 154590 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sube64 |
| 154591 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo32 |
| 154592 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64 |
| 154593 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_0 |
| 154594 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1 |
| 154595 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2 |
| 154596 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3 |
| 154597 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4 |
| 154598 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5 |
| 154599 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6 |
| 154600 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7 |
| 154601 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubb |
| 154602 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd0 |
| 154603 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1 |
| 154604 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh0 |
| 154605 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1 |
| 154606 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubq0 |
| 154607 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubq1 |
| 154608 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs0 |
| 154609 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1 |
| 154610 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub -> FPR128_lo |
| 154611 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0 -> ZPR_4b |
| 154612 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1 -> ZPR_4b |
| 154613 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2 -> ZPR_4b |
| 154614 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub3 -> ZPR |
| 154615 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_hi |
| 154616 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154617 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154618 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154619 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154620 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154621 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154622 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154623 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154624 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154625 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154626 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154627 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154628 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154629 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154630 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154631 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154632 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154633 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154634 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154635 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154636 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154637 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154638 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154639 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_bsub_hi |
| 154640 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154641 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_hsub_hi |
| 154642 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154643 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_then_ssub_hi |
| 154644 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154645 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_bsub_hi |
| 154646 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 |
| 154647 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_hsub_hi |
| 154648 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 |
| 154649 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub3_then_ssub_hi |
| 154650 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154651 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_bsub_hi |
| 154652 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154653 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_hsub_hi |
| 154654 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154655 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_then_ssub_hi |
| 154656 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:psub1_then_psub |
| 154657 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_then_dsub_hi |
| 154658 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub3_then_dsub_hi |
| 154659 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2_then_dsub_hi |
| 154660 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154661 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154662 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154663 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154664 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154665 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154666 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154667 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154668 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154669 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154670 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154671 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154672 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154673 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154674 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32 |
| 154675 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:subo64_then_sub_32_hi |
| 154676 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi |
| 154677 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi |
| 154678 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi |
| 154679 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1 |
| 154680 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154681 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154682 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 154683 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 154684 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154685 | 125, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 154686 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154687 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1 |
| 154688 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 154689 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154690 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 154691 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 154692 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154693 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154694 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154695 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154696 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154697 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154698 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154699 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154700 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154701 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154702 | 317, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 154703 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154704 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154705 | 221, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 154706 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154707 | 219, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 154708 | 139, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo |
| 154709 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub0_zsub2 |
| 154710 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo:zsub1_zsub3 |
| 154711 | }, |
| 154712 | { // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 154713 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 154714 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:bsub_hi |
| 154715 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub -> FPR64_lo |
| 154716 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0 |
| 154717 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154718 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154719 | 65, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 154720 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_hi |
| 154721 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub -> FPR16_lo |
| 154722 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:hsub_hi |
| 154723 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub |
| 154724 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub0 |
| 154725 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1 |
| 154726 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0 -> FPR128_lo |
| 154727 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154728 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154729 | 94, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 154730 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154731 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:ssub_hi |
| 154732 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32 |
| 154733 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_hi |
| 154734 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube32 |
| 154735 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sube64 |
| 154736 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo32 |
| 154737 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64 |
| 154738 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0 |
| 154739 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1 |
| 154740 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2 |
| 154741 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3 |
| 154742 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4 |
| 154743 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5 |
| 154744 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6 |
| 154745 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7 |
| 154746 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubb |
| 154747 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd0 |
| 154748 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1 |
| 154749 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh0 |
| 154750 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1 |
| 154751 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq0 |
| 154752 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubq1 |
| 154753 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs0 |
| 154754 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1 |
| 154755 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub |
| 154756 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0 |
| 154757 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1 |
| 154758 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2 |
| 154759 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3 |
| 154760 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_hi |
| 154761 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154762 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154763 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154764 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154765 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154766 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154767 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154768 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154769 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154770 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154771 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154772 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154773 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154774 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154775 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154776 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154777 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154778 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154779 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154780 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154781 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154782 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154783 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154784 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 154785 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154786 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 154787 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154788 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 154789 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154790 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 154791 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 154792 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 154793 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154794 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 154795 | 7, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154796 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 154797 | 10, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154798 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 154799 | 44, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154800 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 154801 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 154802 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 154803 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 154804 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 154805 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154806 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154807 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154808 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154809 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154810 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154811 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154812 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154813 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154814 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154815 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154816 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154817 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154818 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154819 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 154820 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 154821 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 154822 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 154823 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 154824 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 154825 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154826 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154827 | 116, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154828 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154829 | 79, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154830 | 127, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 154831 | 116, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154832 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154833 | 220, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154834 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154835 | 220, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154836 | 140, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154837 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154838 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154839 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154840 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154841 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154842 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154843 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154844 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154845 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154846 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1 |
| 154847 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 154848 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 |
| 154849 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1 |
| 154850 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 154851 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2 |
| 154852 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 154853 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub2_zsub3 |
| 154854 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 154855 | 0, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 154856 | }, |
| 154857 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 154858 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub -> FPR8 |
| 154859 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:bsub_hi |
| 154860 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub -> FPR64_lo |
| 154861 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0 |
| 154862 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo |
| 154863 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo |
| 154864 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo |
| 154865 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_hi |
| 154866 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub -> FPR16_lo |
| 154867 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:hsub_hi |
| 154868 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub |
| 154869 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub0 |
| 154870 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1 |
| 154871 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0 |
| 154872 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1 -> FPR128_lo |
| 154873 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2 -> FPR128_lo |
| 154874 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3 -> FPR128_lo |
| 154875 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154876 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:ssub_hi |
| 154877 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32 |
| 154878 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_hi |
| 154879 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube32 |
| 154880 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sube64 |
| 154881 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo32 |
| 154882 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64 |
| 154883 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0 |
| 154884 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1 |
| 154885 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2 |
| 154886 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3 |
| 154887 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4 |
| 154888 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5 |
| 154889 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6 |
| 154890 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7 |
| 154891 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubb |
| 154892 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd0 |
| 154893 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1 |
| 154894 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh0 |
| 154895 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1 |
| 154896 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq0 |
| 154897 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubq1 |
| 154898 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs0 |
| 154899 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1 |
| 154900 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub -> FPR128_lo |
| 154901 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0 -> ZPR_4b |
| 154902 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1 -> ZPR_4b |
| 154903 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2 -> ZPR_4b |
| 154904 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3 -> ZPR_4b |
| 154905 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_hi |
| 154906 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 |
| 154907 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 |
| 154908 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 |
| 154909 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 |
| 154910 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 |
| 154911 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 |
| 154912 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 154913 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 154914 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 |
| 154915 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 |
| 154916 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 |
| 154917 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 |
| 154918 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 |
| 154919 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 |
| 154920 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 154921 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 154922 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 154923 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 154924 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 154925 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 154926 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 154927 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 154928 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 154929 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_bsub_hi |
| 154930 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 154931 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_hsub_hi |
| 154932 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154933 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_then_ssub_hi |
| 154934 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 154935 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_bsub_hi |
| 154936 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 154937 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_hsub_hi |
| 154938 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154939 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub3_then_ssub_hi |
| 154940 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 154941 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_bsub_hi |
| 154942 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 154943 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_hsub_hi |
| 154944 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 154945 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_then_ssub_hi |
| 154946 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:psub1_then_psub |
| 154947 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_then_dsub_hi |
| 154948 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub3_then_dsub_hi |
| 154949 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_then_dsub_hi |
| 154950 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 |
| 154951 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 154952 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 |
| 154953 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 154954 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 |
| 154955 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 154956 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 |
| 154957 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 154958 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 |
| 154959 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 154960 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 |
| 154961 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 154962 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 |
| 154963 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 154964 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32 |
| 154965 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:subo64_then_sub_32_hi |
| 154966 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi |
| 154967 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi |
| 154968 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi |
| 154969 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1 |
| 154970 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 154971 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154972 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154973 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154974 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 154975 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 154976 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 154977 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1 |
| 154978 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 154979 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154980 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154981 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154982 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 154983 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 |
| 154984 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 |
| 154985 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 |
| 154986 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 |
| 154987 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 154988 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 154989 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 154990 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 154991 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 154992 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 154993 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 154994 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154995 | 221, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 154996 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154997 | 221, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 154998 | 141, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 154999 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub0_zsub2 |
| 155000 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo:zsub1_zsub3 |
| 155001 | }, |
| 155002 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 155003 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:bsub -> FPR8 |
| 155004 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:bsub_hi |
| 155005 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub -> FPR64 |
| 155006 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0 |
| 155007 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1 -> FPR64 |
| 155008 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2 -> FPR64 |
| 155009 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3 -> FPR64 |
| 155010 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_hi |
| 155011 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:hsub -> FPR16 |
| 155012 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:hsub_hi |
| 155013 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:psub |
| 155014 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:psub0 |
| 155015 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:psub1 |
| 155016 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0 |
| 155017 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1 -> FPR128 |
| 155018 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2 -> FPR128 |
| 155019 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub3 -> FPR128 |
| 155020 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:ssub -> FPR32 |
| 155021 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:ssub_hi |
| 155022 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32 |
| 155023 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_hi |
| 155024 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sube32 |
| 155025 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sube64 |
| 155026 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:subo32 |
| 155027 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64 |
| 155028 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_0 |
| 155029 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1 |
| 155030 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2 |
| 155031 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3 |
| 155032 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4 |
| 155033 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5 |
| 155034 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6 |
| 155035 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7 |
| 155036 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubb |
| 155037 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd0 |
| 155038 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1 |
| 155039 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh0 |
| 155040 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1 |
| 155041 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubq0 |
| 155042 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubq1 |
| 155043 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs0 |
| 155044 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1 |
| 155045 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub -> FPR128 |
| 155046 | 96, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0 -> ZPRMul2 |
| 155047 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1 -> ZPR |
| 155048 | 96, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2 -> ZPRMul2 |
| 155049 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub3 -> ZPR |
| 155050 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_hi |
| 155051 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq0 |
| 155052 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq1 |
| 155053 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd0 |
| 155054 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1 |
| 155055 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq0 |
| 155056 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq1 |
| 155057 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 155058 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 155059 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd0 |
| 155060 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1 |
| 155061 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq0 |
| 155062 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq1 |
| 155063 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs0 |
| 155064 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1 |
| 155065 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 155066 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 155067 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 155068 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 155069 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 155070 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 155071 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155072 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155073 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 155074 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_bsub_hi |
| 155075 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 155076 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_hsub_hi |
| 155077 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 155078 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_then_ssub_hi |
| 155079 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 155080 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_bsub_hi |
| 155081 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_hsub -> FPR16 |
| 155082 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_hsub_hi |
| 155083 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_ssub -> FPR32 |
| 155084 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub3_then_ssub_hi |
| 155085 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 155086 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_bsub_hi |
| 155087 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 155088 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_hsub_hi |
| 155089 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 155090 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_then_ssub_hi |
| 155091 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:psub1_then_psub |
| 155092 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_then_dsub_hi |
| 155093 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub3_then_dsub_hi |
| 155094 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2_then_dsub_hi |
| 155095 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32 |
| 155096 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 155097 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32 |
| 155098 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 155099 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32 |
| 155100 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 155101 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32 |
| 155102 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 155103 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32 |
| 155104 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 155105 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32 |
| 155106 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 155107 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32 |
| 155108 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 155109 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64_then_sub_32 |
| 155110 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:subo64_then_sub_32_hi |
| 155111 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_then_zsub_hi |
| 155112 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub3_then_zsub_hi |
| 155113 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2_then_zsub_hi |
| 155114 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0_dsub1 |
| 155115 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 155116 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_dsub2 -> DD |
| 155117 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD |
| 155118 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub2_dsub3 -> DD |
| 155119 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1 -> DD |
| 155120 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 155121 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 155122 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0_qsub1 |
| 155123 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 155124 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 155125 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ |
| 155126 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:qsub2_qsub3 -> QQ |
| 155127 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 155128 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_0_x8sub_1 |
| 155129 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_x8sub_3 |
| 155130 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_x8sub_5 |
| 155131 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_x8sub_7 |
| 155132 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155133 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155134 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155135 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 155136 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1 -> QQ |
| 155137 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 155138 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 155139 | 155, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 155140 | 227, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 155141 | 138, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 155142 | 214, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 155143 | 134, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub2_zsub3 -> ZPR2Mul2 |
| 155144 | 153, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 155145 | 153, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 155146 | }, |
| 155147 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 155148 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 155149 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:bsub_hi |
| 155150 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 155151 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0 |
| 155152 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 155153 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 155154 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 155155 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_hi |
| 155156 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 155157 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:hsub_hi |
| 155158 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:psub |
| 155159 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:psub0 |
| 155160 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:psub1 |
| 155161 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0 |
| 155162 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 155163 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 155164 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 155165 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 155166 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:ssub_hi |
| 155167 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32 |
| 155168 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_hi |
| 155169 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sube32 |
| 155170 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sube64 |
| 155171 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:subo32 |
| 155172 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64 |
| 155173 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_0 |
| 155174 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1 |
| 155175 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2 |
| 155176 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3 |
| 155177 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4 |
| 155178 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5 |
| 155179 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6 |
| 155180 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7 |
| 155181 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubb |
| 155182 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd0 |
| 155183 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1 |
| 155184 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh0 |
| 155185 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1 |
| 155186 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubq0 |
| 155187 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubq1 |
| 155188 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs0 |
| 155189 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1 |
| 155190 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 155191 | 101, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 155192 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 155193 | 96, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2 |
| 155194 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub3 -> ZPR |
| 155195 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_hi |
| 155196 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 155197 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 155198 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 155199 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 155200 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 155201 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 155202 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 155203 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 155204 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 155205 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 155206 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 155207 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 155208 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 155209 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 155210 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 155211 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 155212 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 155213 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 155214 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 155215 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 155216 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155217 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155218 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 155219 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 155220 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 155221 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 155222 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 155223 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 155224 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 155225 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 155226 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 155227 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 155228 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 155229 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 155230 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 155231 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 155232 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 155233 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 155234 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 155235 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 155236 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 155237 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 155238 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 155239 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 155240 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 155241 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 155242 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 155243 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 155244 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 155245 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 155246 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 155247 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 155248 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 155249 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 155250 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 155251 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 155252 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 155253 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 155254 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 155255 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 155256 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 155257 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 155258 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 155259 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 155260 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 155261 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 155262 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 155263 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD |
| 155264 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 155265 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 155266 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 155267 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 155268 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 155269 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 155270 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 155271 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 155272 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 155273 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 155274 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 155275 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 155276 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 155277 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155278 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155279 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155280 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 155281 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 155282 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 155283 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 155284 | 155, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 155285 | 227, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 155286 | 138, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 155287 | 214, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 155288 | 134, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2 |
| 155289 | 177, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 155290 | 177, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 155291 | }, |
| 155292 | { // QQQQ_with_qsub0_in_FPR128_0to7 |
| 155293 | 7, // QQQQ_with_qsub0_in_FPR128_0to7:bsub -> FPR8 |
| 155294 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:bsub_hi |
| 155295 | 65, // QQQQ_with_qsub0_in_FPR128_0to7:dsub -> FPR64_lo |
| 155296 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub0 |
| 155297 | 65, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 155298 | 65, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 155299 | 65, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 155300 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub_hi |
| 155301 | 10, // QQQQ_with_qsub0_in_FPR128_0to7:hsub -> FPR16_lo |
| 155302 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:hsub_hi |
| 155303 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:psub |
| 155304 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:psub0 |
| 155305 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:psub1 |
| 155306 | 98, // QQQQ_with_qsub0_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 155307 | 94, // QQQQ_with_qsub0_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 155308 | 94, // QQQQ_with_qsub0_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 155309 | 94, // QQQQ_with_qsub0_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 155310 | 44, // QQQQ_with_qsub0_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155311 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:ssub_hi |
| 155312 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sub_32 |
| 155313 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sub_32_hi |
| 155314 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sube32 |
| 155315 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sube64 |
| 155316 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:subo32 |
| 155317 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:subo64 |
| 155318 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_0 |
| 155319 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_1 |
| 155320 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_2 |
| 155321 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_3 |
| 155322 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_4 |
| 155323 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_5 |
| 155324 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_6 |
| 155325 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_7 |
| 155326 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubb |
| 155327 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubd0 |
| 155328 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubd1 |
| 155329 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh0 |
| 155330 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1 |
| 155331 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubq0 |
| 155332 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubq1 |
| 155333 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs0 |
| 155334 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1 |
| 155335 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub |
| 155336 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub0 |
| 155337 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub1 |
| 155338 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub2 |
| 155339 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub3 |
| 155340 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub_hi |
| 155341 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 155342 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 155343 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 155344 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 155345 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 155346 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 155347 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 155348 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 155349 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 155350 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 155351 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 155352 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 155353 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 155354 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 155355 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 155356 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 155357 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 155358 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 155359 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 155360 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 155361 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155362 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155363 | 7, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 155364 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_bsub_hi |
| 155365 | 10, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 155366 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_hsub_hi |
| 155367 | 44, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155368 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_then_ssub_hi |
| 155369 | 7, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 155370 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_bsub_hi |
| 155371 | 10, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 155372 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_hsub_hi |
| 155373 | 44, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155374 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub3_then_ssub_hi |
| 155375 | 7, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 155376 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_bsub_hi |
| 155377 | 10, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 155378 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_hsub_hi |
| 155379 | 44, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155380 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_then_ssub_hi |
| 155381 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:psub1_then_psub |
| 155382 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:qsub1_then_dsub_hi |
| 155383 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:qsub3_then_dsub_hi |
| 155384 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:qsub2_then_dsub_hi |
| 155385 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 155386 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 155387 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 155388 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 155389 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 155390 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 155391 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 155392 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 155393 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 155394 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 155395 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 155396 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 155397 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 155398 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 155399 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32 |
| 155400 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:subo64_then_sub_32_hi |
| 155401 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub1_then_zsub_hi |
| 155402 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub3_then_zsub_hi |
| 155403 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub2_then_zsub_hi |
| 155404 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1 |
| 155405 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 155406 | 79, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155407 | 116, // QQQQ_with_qsub0_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 155408 | 79, // QQQQ_with_qsub0_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155409 | 79, // QQQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155410 | 127, // QQQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 155411 | 116, // QQQQ_with_qsub0_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 155412 | 146, // QQQQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 155413 | 222, // QQQQ_with_qsub0_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 155414 | 140, // QQQQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 155415 | 220, // QQQQ_with_qsub0_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 155416 | 140, // QQQQ_with_qsub0_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 155417 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 155418 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 155419 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 155420 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 155421 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 155422 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155423 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155424 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155425 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 155426 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1 |
| 155427 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 155428 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 155429 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1 |
| 155430 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 155431 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2 |
| 155432 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 155433 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub2_zsub3 |
| 155434 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub0_zsub2 |
| 155435 | 0, // QQQQ_with_qsub0_in_FPR128_0to7:zsub1_zsub3 |
| 155436 | }, |
| 155437 | { // QQQQ_with_qsub1_in_FPR128_0to7 |
| 155438 | 7, // QQQQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 155439 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 155440 | 56, // QQQQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 155441 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 155442 | 65, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 155443 | 65, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 155444 | 65, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 155445 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 155446 | 8, // QQQQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 155447 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 155448 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:psub |
| 155449 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:psub0 |
| 155450 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:psub1 |
| 155451 | 92, // QQQQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128 |
| 155452 | 98, // QQQQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 155453 | 94, // QQQQ_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 155454 | 94, // QQQQ_with_qsub1_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 155455 | 40, // QQQQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 155456 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 155457 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 155458 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 155459 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sube32 |
| 155460 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sube64 |
| 155461 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:subo32 |
| 155462 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:subo64 |
| 155463 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 155464 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 155465 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 155466 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 155467 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 155468 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 155469 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 155470 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 155471 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubb |
| 155472 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 155473 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 155474 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 155475 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 155476 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 155477 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 155478 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 155479 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 155480 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub |
| 155481 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 155482 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 155483 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 155484 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 155485 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 155486 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 155487 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 155488 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 155489 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 155490 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 155491 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 155492 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 155493 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 155494 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 155495 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 155496 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 155497 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 155498 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 155499 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 155500 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 155501 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 155502 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 155503 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 155504 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 155505 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 155506 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155507 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155508 | 7, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 155509 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 155510 | 10, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 155511 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 155512 | 44, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155513 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 155514 | 7, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 155515 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 155516 | 10, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 155517 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 155518 | 44, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155519 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 155520 | 7, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 155521 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 155522 | 10, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 155523 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 155524 | 44, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155525 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 155526 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 155527 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 155528 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 155529 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 155530 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 155531 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 155532 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 155533 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 155534 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 155535 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 155536 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 155537 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 155538 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 155539 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 155540 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 155541 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 155542 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 155543 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 155544 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 155545 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 155546 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 155547 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 155548 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 155549 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 155550 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 155551 | 79, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155552 | 116, // QQQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 155553 | 79, // QQQQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155554 | 77, // QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 155555 | 126, // QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 155556 | 115, // QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 155557 | 147, // QQQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 155558 | 223, // QQQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 155559 | 146, // QQQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 155560 | 222, // QQQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 155561 | 140, // QQQQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 155562 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 155563 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 155564 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 155565 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 155566 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 155567 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155568 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155569 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155570 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 155571 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 155572 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 155573 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 155574 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 155575 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 155576 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 155577 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 155578 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 155579 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 155580 | 0, // QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 155581 | }, |
| 155582 | { // QQQQ_with_qsub2_in_FPR128_0to7 |
| 155583 | 7, // QQQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 155584 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 155585 | 56, // QQQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 155586 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 155587 | 56, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64 |
| 155588 | 65, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 155589 | 65, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 155590 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 155591 | 8, // QQQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 155592 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 155593 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:psub |
| 155594 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 155595 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 155596 | 92, // QQQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128 |
| 155597 | 92, // QQQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128 |
| 155598 | 98, // QQQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 155599 | 94, // QQQQ_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 155600 | 40, // QQQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 155601 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 155602 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 155603 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 155604 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 155605 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 155606 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 155607 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 155608 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 155609 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 155610 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 155611 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 155612 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 155613 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 155614 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 155615 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 155616 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 155617 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 155618 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 155619 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 155620 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 155621 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 155622 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 155623 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 155624 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 155625 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub |
| 155626 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 155627 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 155628 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 155629 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 155630 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 155631 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 155632 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 155633 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 155634 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 155635 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 155636 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 155637 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 155638 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 155639 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 155640 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 155641 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 155642 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 155643 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 155644 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 155645 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 155646 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 155647 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 155648 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 155649 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 155650 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 155651 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155652 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155653 | 7, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 155654 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 155655 | 8, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 155656 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 155657 | 40, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 155658 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 155659 | 7, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 155660 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 155661 | 10, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 155662 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 155663 | 44, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155664 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 155665 | 7, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 155666 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 155667 | 10, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 155668 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 155669 | 44, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155670 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 155671 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 155672 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 155673 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 155674 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 155675 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 155676 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 155677 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 155678 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 155679 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 155680 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 155681 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 155682 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 155683 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 155684 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 155685 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 155686 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 155687 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 155688 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 155689 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 155690 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 155691 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 155692 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 155693 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 155694 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 155695 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 155696 | 77, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 155697 | 115, // QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 155698 | 79, // QQQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 155699 | 75, // QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD |
| 155700 | 124, // QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 155701 | 113, // QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 155702 | 128, // QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ |
| 155703 | 224, // QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 155704 | 147, // QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 155705 | 223, // QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 155706 | 146, // QQQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 155707 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 155708 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 155709 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 155710 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 155711 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 155712 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155713 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155714 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155715 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 155716 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 155717 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 155718 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 155719 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 155720 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 155721 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 155722 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 155723 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 155724 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 155725 | 0, // QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 155726 | }, |
| 155727 | { // QQQQ_with_qsub3_in_FPR128_0to7 |
| 155728 | 7, // QQQQ_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 155729 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:bsub_hi |
| 155730 | 56, // QQQQ_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 155731 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub0 |
| 155732 | 56, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64 |
| 155733 | 56, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64 |
| 155734 | 65, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 155735 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub_hi |
| 155736 | 8, // QQQQ_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 155737 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:hsub_hi |
| 155738 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:psub |
| 155739 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:psub0 |
| 155740 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:psub1 |
| 155741 | 92, // QQQQ_with_qsub3_in_FPR128_0to7:qsub0 -> FPR128 |
| 155742 | 92, // QQQQ_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128 |
| 155743 | 92, // QQQQ_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128 |
| 155744 | 98, // QQQQ_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 155745 | 40, // QQQQ_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 155746 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:ssub_hi |
| 155747 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sub_32 |
| 155748 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 155749 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sube32 |
| 155750 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sube64 |
| 155751 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:subo32 |
| 155752 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:subo64 |
| 155753 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 155754 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 155755 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 155756 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 155757 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 155758 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 155759 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 155760 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 155761 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubb |
| 155762 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubd0 |
| 155763 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubd1 |
| 155764 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh0 |
| 155765 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1 |
| 155766 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubq0 |
| 155767 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubq1 |
| 155768 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs0 |
| 155769 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1 |
| 155770 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub |
| 155771 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub0 |
| 155772 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub1 |
| 155773 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub2 |
| 155774 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub3 |
| 155775 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub_hi |
| 155776 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 155777 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 155778 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 155779 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 155780 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 155781 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 155782 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 155783 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 155784 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 155785 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 155786 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 155787 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 155788 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 155789 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 155790 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 155791 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 155792 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 155793 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 155794 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 155795 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 155796 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155797 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155798 | 7, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 155799 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 155800 | 8, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 155801 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 155802 | 40, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 155803 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 155804 | 7, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 155805 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 155806 | 10, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 155807 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 155808 | 44, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 155809 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 155810 | 7, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 155811 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 155812 | 8, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16 |
| 155813 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 155814 | 40, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32 |
| 155815 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 155816 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 155817 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 155818 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 155819 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 155820 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 155821 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 155822 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 155823 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 155824 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 155825 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 155826 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 155827 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 155828 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 155829 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 155830 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 155831 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 155832 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 155833 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 155834 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 155835 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 155836 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 155837 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 155838 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 155839 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 155840 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 155841 | 75, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD |
| 155842 | 113, // QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 155843 | 77, // QQQQ_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 155844 | 75, // QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD |
| 155845 | 121, // QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 155846 | 110, // QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD |
| 155847 | 128, // QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1 -> QQ |
| 155848 | 206, // QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ |
| 155849 | 128, // QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ |
| 155850 | 224, // QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 155851 | 147, // QQQQ_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 155852 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 155853 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 155854 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 155855 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 155856 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 155857 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 155858 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 155859 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 155860 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 155861 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1 |
| 155862 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 155863 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 155864 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1 |
| 155865 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 155866 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2 |
| 155867 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 155868 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub2_zsub3 |
| 155869 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 155870 | 0, // QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 155871 | }, |
| 155872 | { // ZPR4Mul4 |
| 155873 | 7, // ZPR4Mul4:bsub -> FPR8 |
| 155874 | 0, // ZPR4Mul4:bsub_hi |
| 155875 | 56, // ZPR4Mul4:dsub -> FPR64 |
| 155876 | 0, // ZPR4Mul4:dsub0 |
| 155877 | 56, // ZPR4Mul4:dsub1 -> FPR64 |
| 155878 | 56, // ZPR4Mul4:dsub2 -> FPR64 |
| 155879 | 56, // ZPR4Mul4:dsub3 -> FPR64 |
| 155880 | 0, // ZPR4Mul4:dsub_hi |
| 155881 | 8, // ZPR4Mul4:hsub -> FPR16 |
| 155882 | 0, // ZPR4Mul4:hsub_hi |
| 155883 | 0, // ZPR4Mul4:psub |
| 155884 | 0, // ZPR4Mul4:psub0 |
| 155885 | 0, // ZPR4Mul4:psub1 |
| 155886 | 0, // ZPR4Mul4:qsub0 |
| 155887 | 92, // ZPR4Mul4:qsub1 -> FPR128 |
| 155888 | 92, // ZPR4Mul4:qsub2 -> FPR128 |
| 155889 | 92, // ZPR4Mul4:qsub3 -> FPR128 |
| 155890 | 40, // ZPR4Mul4:ssub -> FPR32 |
| 155891 | 0, // ZPR4Mul4:ssub_hi |
| 155892 | 0, // ZPR4Mul4:sub_32 |
| 155893 | 0, // ZPR4Mul4:sub_32_hi |
| 155894 | 0, // ZPR4Mul4:sube32 |
| 155895 | 0, // ZPR4Mul4:sube64 |
| 155896 | 0, // ZPR4Mul4:subo32 |
| 155897 | 0, // ZPR4Mul4:subo64 |
| 155898 | 0, // ZPR4Mul4:x8sub_0 |
| 155899 | 0, // ZPR4Mul4:x8sub_1 |
| 155900 | 0, // ZPR4Mul4:x8sub_2 |
| 155901 | 0, // ZPR4Mul4:x8sub_3 |
| 155902 | 0, // ZPR4Mul4:x8sub_4 |
| 155903 | 0, // ZPR4Mul4:x8sub_5 |
| 155904 | 0, // ZPR4Mul4:x8sub_6 |
| 155905 | 0, // ZPR4Mul4:x8sub_7 |
| 155906 | 0, // ZPR4Mul4:zasubb |
| 155907 | 0, // ZPR4Mul4:zasubd0 |
| 155908 | 0, // ZPR4Mul4:zasubd1 |
| 155909 | 0, // ZPR4Mul4:zasubh0 |
| 155910 | 0, // ZPR4Mul4:zasubh1 |
| 155911 | 0, // ZPR4Mul4:zasubq0 |
| 155912 | 0, // ZPR4Mul4:zasubq1 |
| 155913 | 0, // ZPR4Mul4:zasubs0 |
| 155914 | 0, // ZPR4Mul4:zasubs1 |
| 155915 | 92, // ZPR4Mul4:zsub -> FPR128 |
| 155916 | 101, // ZPR4Mul4:zsub0 -> ZPRMul4 |
| 155917 | 93, // ZPR4Mul4:zsub1 -> ZPR |
| 155918 | 96, // ZPR4Mul4:zsub2 -> ZPRMul2 |
| 155919 | 93, // ZPR4Mul4:zsub3 -> ZPR |
| 155920 | 0, // ZPR4Mul4:zsub_hi |
| 155921 | 0, // ZPR4Mul4:zasubd1_then_zasubq0 |
| 155922 | 0, // ZPR4Mul4:zasubd1_then_zasubq1 |
| 155923 | 0, // ZPR4Mul4:zasubs1_then_zasubd0 |
| 155924 | 0, // ZPR4Mul4:zasubs1_then_zasubd1 |
| 155925 | 0, // ZPR4Mul4:zasubs1_then_zasubq0 |
| 155926 | 0, // ZPR4Mul4:zasubs1_then_zasubq1 |
| 155927 | 0, // ZPR4Mul4:zasubs1_then_zasubd1_then_zasubq0 |
| 155928 | 0, // ZPR4Mul4:zasubs1_then_zasubd1_then_zasubq1 |
| 155929 | 0, // ZPR4Mul4:zasubh1_then_zasubd0 |
| 155930 | 0, // ZPR4Mul4:zasubh1_then_zasubd1 |
| 155931 | 0, // ZPR4Mul4:zasubh1_then_zasubq0 |
| 155932 | 0, // ZPR4Mul4:zasubh1_then_zasubq1 |
| 155933 | 0, // ZPR4Mul4:zasubh1_then_zasubs0 |
| 155934 | 0, // ZPR4Mul4:zasubh1_then_zasubs1 |
| 155935 | 0, // ZPR4Mul4:zasubh1_then_zasubd1_then_zasubq0 |
| 155936 | 0, // ZPR4Mul4:zasubh1_then_zasubd1_then_zasubq1 |
| 155937 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd0 |
| 155938 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1 |
| 155939 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubq0 |
| 155940 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubq1 |
| 155941 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 155942 | 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 155943 | 7, // ZPR4Mul4:dsub1_then_bsub -> FPR8 |
| 155944 | 0, // ZPR4Mul4:dsub1_then_bsub_hi |
| 155945 | 8, // ZPR4Mul4:dsub1_then_hsub -> FPR16 |
| 155946 | 0, // ZPR4Mul4:dsub1_then_hsub_hi |
| 155947 | 40, // ZPR4Mul4:dsub1_then_ssub -> FPR32 |
| 155948 | 0, // ZPR4Mul4:dsub1_then_ssub_hi |
| 155949 | 7, // ZPR4Mul4:dsub3_then_bsub -> FPR8 |
| 155950 | 0, // ZPR4Mul4:dsub3_then_bsub_hi |
| 155951 | 8, // ZPR4Mul4:dsub3_then_hsub -> FPR16 |
| 155952 | 0, // ZPR4Mul4:dsub3_then_hsub_hi |
| 155953 | 40, // ZPR4Mul4:dsub3_then_ssub -> FPR32 |
| 155954 | 0, // ZPR4Mul4:dsub3_then_ssub_hi |
| 155955 | 7, // ZPR4Mul4:dsub2_then_bsub -> FPR8 |
| 155956 | 0, // ZPR4Mul4:dsub2_then_bsub_hi |
| 155957 | 8, // ZPR4Mul4:dsub2_then_hsub -> FPR16 |
| 155958 | 0, // ZPR4Mul4:dsub2_then_hsub_hi |
| 155959 | 40, // ZPR4Mul4:dsub2_then_ssub -> FPR32 |
| 155960 | 0, // ZPR4Mul4:dsub2_then_ssub_hi |
| 155961 | 0, // ZPR4Mul4:psub1_then_psub |
| 155962 | 0, // ZPR4Mul4:qsub1_then_dsub_hi |
| 155963 | 0, // ZPR4Mul4:qsub3_then_dsub_hi |
| 155964 | 0, // ZPR4Mul4:qsub2_then_dsub_hi |
| 155965 | 0, // ZPR4Mul4:x8sub_7_then_sub_32 |
| 155966 | 0, // ZPR4Mul4:x8sub_7_then_sub_32_hi |
| 155967 | 0, // ZPR4Mul4:x8sub_6_then_sub_32 |
| 155968 | 0, // ZPR4Mul4:x8sub_6_then_sub_32_hi |
| 155969 | 0, // ZPR4Mul4:x8sub_5_then_sub_32 |
| 155970 | 0, // ZPR4Mul4:x8sub_5_then_sub_32_hi |
| 155971 | 0, // ZPR4Mul4:x8sub_4_then_sub_32 |
| 155972 | 0, // ZPR4Mul4:x8sub_4_then_sub_32_hi |
| 155973 | 0, // ZPR4Mul4:x8sub_3_then_sub_32 |
| 155974 | 0, // ZPR4Mul4:x8sub_3_then_sub_32_hi |
| 155975 | 0, // ZPR4Mul4:x8sub_2_then_sub_32 |
| 155976 | 0, // ZPR4Mul4:x8sub_2_then_sub_32_hi |
| 155977 | 0, // ZPR4Mul4:x8sub_1_then_sub_32 |
| 155978 | 0, // ZPR4Mul4:x8sub_1_then_sub_32_hi |
| 155979 | 0, // ZPR4Mul4:subo64_then_sub_32 |
| 155980 | 0, // ZPR4Mul4:subo64_then_sub_32_hi |
| 155981 | 0, // ZPR4Mul4:zsub1_then_zsub_hi |
| 155982 | 0, // ZPR4Mul4:zsub3_then_zsub_hi |
| 155983 | 0, // ZPR4Mul4:zsub2_then_zsub_hi |
| 155984 | 0, // ZPR4Mul4:dsub0_dsub1 |
| 155985 | 0, // ZPR4Mul4:dsub0_dsub1_dsub2 |
| 155986 | 75, // ZPR4Mul4:dsub1_dsub2 -> DD |
| 155987 | 110, // ZPR4Mul4:dsub1_dsub2_dsub3 -> DDD |
| 155988 | 75, // ZPR4Mul4:dsub2_dsub3 -> DD |
| 155989 | 75, // ZPR4Mul4:dsub_dsub1 -> DD |
| 155990 | 117, // ZPR4Mul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 155991 | 110, // ZPR4Mul4:dsub_dsub1_dsub2 -> DDD |
| 155992 | 0, // ZPR4Mul4:qsub0_qsub1 |
| 155993 | 0, // ZPR4Mul4:qsub0_qsub1_qsub2 |
| 155994 | 128, // ZPR4Mul4:qsub1_qsub2 -> QQ |
| 155995 | 206, // ZPR4Mul4:qsub1_qsub2_qsub3 -> QQQ |
| 155996 | 128, // ZPR4Mul4:qsub2_qsub3 -> QQ |
| 155997 | 0, // ZPR4Mul4:sub_32_x8sub_1_then_sub_32 |
| 155998 | 0, // ZPR4Mul4:x8sub_0_x8sub_1 |
| 155999 | 0, // ZPR4Mul4:x8sub_2_x8sub_3 |
| 156000 | 0, // ZPR4Mul4:x8sub_4_x8sub_5 |
| 156001 | 0, // ZPR4Mul4:x8sub_6_x8sub_7 |
| 156002 | 0, // ZPR4Mul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156003 | 0, // ZPR4Mul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156004 | 0, // ZPR4Mul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156005 | 0, // ZPR4Mul4:sub_32_subo64_then_sub_32 |
| 156006 | 128, // ZPR4Mul4:zsub_qsub1 -> QQ |
| 156007 | 297, // ZPR4Mul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 156008 | 206, // ZPR4Mul4:zsub_qsub1_qsub2 -> QQQ |
| 156009 | 155, // ZPR4Mul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 156010 | 227, // ZPR4Mul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 156011 | 138, // ZPR4Mul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 156012 | 214, // ZPR4Mul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 156013 | 134, // ZPR4Mul4:zsub2_zsub3 -> ZPR2Mul2 |
| 156014 | 0, // ZPR4Mul4:zsub0_zsub2 |
| 156015 | 0, // ZPR4Mul4:zsub1_zsub3 |
| 156016 | }, |
| 156017 | { // ZPR4Strided |
| 156018 | 7, // ZPR4Strided:bsub -> FPR8 |
| 156019 | 0, // ZPR4Strided:bsub_hi |
| 156020 | 56, // ZPR4Strided:dsub -> FPR64 |
| 156021 | 0, // ZPR4Strided:dsub0 |
| 156022 | 56, // ZPR4Strided:dsub1 -> FPR64 |
| 156023 | 56, // ZPR4Strided:dsub2 -> FPR64 |
| 156024 | 56, // ZPR4Strided:dsub3 -> FPR64 |
| 156025 | 0, // ZPR4Strided:dsub_hi |
| 156026 | 8, // ZPR4Strided:hsub -> FPR16 |
| 156027 | 0, // ZPR4Strided:hsub_hi |
| 156028 | 0, // ZPR4Strided:psub |
| 156029 | 0, // ZPR4Strided:psub0 |
| 156030 | 0, // ZPR4Strided:psub1 |
| 156031 | 0, // ZPR4Strided:qsub0 |
| 156032 | 92, // ZPR4Strided:qsub1 -> FPR128 |
| 156033 | 92, // ZPR4Strided:qsub2 -> FPR128 |
| 156034 | 92, // ZPR4Strided:qsub3 -> FPR128 |
| 156035 | 40, // ZPR4Strided:ssub -> FPR32 |
| 156036 | 0, // ZPR4Strided:ssub_hi |
| 156037 | 0, // ZPR4Strided:sub_32 |
| 156038 | 0, // ZPR4Strided:sub_32_hi |
| 156039 | 0, // ZPR4Strided:sube32 |
| 156040 | 0, // ZPR4Strided:sube64 |
| 156041 | 0, // ZPR4Strided:subo32 |
| 156042 | 0, // ZPR4Strided:subo64 |
| 156043 | 0, // ZPR4Strided:x8sub_0 |
| 156044 | 0, // ZPR4Strided:x8sub_1 |
| 156045 | 0, // ZPR4Strided:x8sub_2 |
| 156046 | 0, // ZPR4Strided:x8sub_3 |
| 156047 | 0, // ZPR4Strided:x8sub_4 |
| 156048 | 0, // ZPR4Strided:x8sub_5 |
| 156049 | 0, // ZPR4Strided:x8sub_6 |
| 156050 | 0, // ZPR4Strided:x8sub_7 |
| 156051 | 0, // ZPR4Strided:zasubb |
| 156052 | 0, // ZPR4Strided:zasubd0 |
| 156053 | 0, // ZPR4Strided:zasubd1 |
| 156054 | 0, // ZPR4Strided:zasubh0 |
| 156055 | 0, // ZPR4Strided:zasubh1 |
| 156056 | 0, // ZPR4Strided:zasubq0 |
| 156057 | 0, // ZPR4Strided:zasubq1 |
| 156058 | 0, // ZPR4Strided:zasubs0 |
| 156059 | 0, // ZPR4Strided:zasubs1 |
| 156060 | 92, // ZPR4Strided:zsub -> FPR128 |
| 156061 | 93, // ZPR4Strided:zsub0 -> ZPR |
| 156062 | 93, // ZPR4Strided:zsub1 -> ZPR |
| 156063 | 93, // ZPR4Strided:zsub2 -> ZPR |
| 156064 | 93, // ZPR4Strided:zsub3 -> ZPR |
| 156065 | 0, // ZPR4Strided:zsub_hi |
| 156066 | 0, // ZPR4Strided:zasubd1_then_zasubq0 |
| 156067 | 0, // ZPR4Strided:zasubd1_then_zasubq1 |
| 156068 | 0, // ZPR4Strided:zasubs1_then_zasubd0 |
| 156069 | 0, // ZPR4Strided:zasubs1_then_zasubd1 |
| 156070 | 0, // ZPR4Strided:zasubs1_then_zasubq0 |
| 156071 | 0, // ZPR4Strided:zasubs1_then_zasubq1 |
| 156072 | 0, // ZPR4Strided:zasubs1_then_zasubd1_then_zasubq0 |
| 156073 | 0, // ZPR4Strided:zasubs1_then_zasubd1_then_zasubq1 |
| 156074 | 0, // ZPR4Strided:zasubh1_then_zasubd0 |
| 156075 | 0, // ZPR4Strided:zasubh1_then_zasubd1 |
| 156076 | 0, // ZPR4Strided:zasubh1_then_zasubq0 |
| 156077 | 0, // ZPR4Strided:zasubh1_then_zasubq1 |
| 156078 | 0, // ZPR4Strided:zasubh1_then_zasubs0 |
| 156079 | 0, // ZPR4Strided:zasubh1_then_zasubs1 |
| 156080 | 0, // ZPR4Strided:zasubh1_then_zasubd1_then_zasubq0 |
| 156081 | 0, // ZPR4Strided:zasubh1_then_zasubd1_then_zasubq1 |
| 156082 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd0 |
| 156083 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1 |
| 156084 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubq0 |
| 156085 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubq1 |
| 156086 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156087 | 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156088 | 7, // ZPR4Strided:dsub1_then_bsub -> FPR8 |
| 156089 | 0, // ZPR4Strided:dsub1_then_bsub_hi |
| 156090 | 8, // ZPR4Strided:dsub1_then_hsub -> FPR16 |
| 156091 | 0, // ZPR4Strided:dsub1_then_hsub_hi |
| 156092 | 40, // ZPR4Strided:dsub1_then_ssub -> FPR32 |
| 156093 | 0, // ZPR4Strided:dsub1_then_ssub_hi |
| 156094 | 7, // ZPR4Strided:dsub3_then_bsub -> FPR8 |
| 156095 | 0, // ZPR4Strided:dsub3_then_bsub_hi |
| 156096 | 8, // ZPR4Strided:dsub3_then_hsub -> FPR16 |
| 156097 | 0, // ZPR4Strided:dsub3_then_hsub_hi |
| 156098 | 40, // ZPR4Strided:dsub3_then_ssub -> FPR32 |
| 156099 | 0, // ZPR4Strided:dsub3_then_ssub_hi |
| 156100 | 7, // ZPR4Strided:dsub2_then_bsub -> FPR8 |
| 156101 | 0, // ZPR4Strided:dsub2_then_bsub_hi |
| 156102 | 8, // ZPR4Strided:dsub2_then_hsub -> FPR16 |
| 156103 | 0, // ZPR4Strided:dsub2_then_hsub_hi |
| 156104 | 40, // ZPR4Strided:dsub2_then_ssub -> FPR32 |
| 156105 | 0, // ZPR4Strided:dsub2_then_ssub_hi |
| 156106 | 0, // ZPR4Strided:psub1_then_psub |
| 156107 | 0, // ZPR4Strided:qsub1_then_dsub_hi |
| 156108 | 0, // ZPR4Strided:qsub3_then_dsub_hi |
| 156109 | 0, // ZPR4Strided:qsub2_then_dsub_hi |
| 156110 | 0, // ZPR4Strided:x8sub_7_then_sub_32 |
| 156111 | 0, // ZPR4Strided:x8sub_7_then_sub_32_hi |
| 156112 | 0, // ZPR4Strided:x8sub_6_then_sub_32 |
| 156113 | 0, // ZPR4Strided:x8sub_6_then_sub_32_hi |
| 156114 | 0, // ZPR4Strided:x8sub_5_then_sub_32 |
| 156115 | 0, // ZPR4Strided:x8sub_5_then_sub_32_hi |
| 156116 | 0, // ZPR4Strided:x8sub_4_then_sub_32 |
| 156117 | 0, // ZPR4Strided:x8sub_4_then_sub_32_hi |
| 156118 | 0, // ZPR4Strided:x8sub_3_then_sub_32 |
| 156119 | 0, // ZPR4Strided:x8sub_3_then_sub_32_hi |
| 156120 | 0, // ZPR4Strided:x8sub_2_then_sub_32 |
| 156121 | 0, // ZPR4Strided:x8sub_2_then_sub_32_hi |
| 156122 | 0, // ZPR4Strided:x8sub_1_then_sub_32 |
| 156123 | 0, // ZPR4Strided:x8sub_1_then_sub_32_hi |
| 156124 | 0, // ZPR4Strided:subo64_then_sub_32 |
| 156125 | 0, // ZPR4Strided:subo64_then_sub_32_hi |
| 156126 | 0, // ZPR4Strided:zsub1_then_zsub_hi |
| 156127 | 0, // ZPR4Strided:zsub3_then_zsub_hi |
| 156128 | 0, // ZPR4Strided:zsub2_then_zsub_hi |
| 156129 | 0, // ZPR4Strided:dsub0_dsub1 |
| 156130 | 0, // ZPR4Strided:dsub0_dsub1_dsub2 |
| 156131 | 0, // ZPR4Strided:dsub1_dsub2 |
| 156132 | 0, // ZPR4Strided:dsub1_dsub2_dsub3 |
| 156133 | 0, // ZPR4Strided:dsub2_dsub3 |
| 156134 | 0, // ZPR4Strided:dsub_dsub1 |
| 156135 | 0, // ZPR4Strided:dsub_dsub1_dsub2_dsub3 |
| 156136 | 0, // ZPR4Strided:dsub_dsub1_dsub2 |
| 156137 | 0, // ZPR4Strided:qsub0_qsub1 |
| 156138 | 0, // ZPR4Strided:qsub0_qsub1_qsub2 |
| 156139 | 0, // ZPR4Strided:qsub1_qsub2 |
| 156140 | 0, // ZPR4Strided:qsub1_qsub2_qsub3 |
| 156141 | 0, // ZPR4Strided:qsub2_qsub3 |
| 156142 | 0, // ZPR4Strided:sub_32_x8sub_1_then_sub_32 |
| 156143 | 0, // ZPR4Strided:x8sub_0_x8sub_1 |
| 156144 | 0, // ZPR4Strided:x8sub_2_x8sub_3 |
| 156145 | 0, // ZPR4Strided:x8sub_4_x8sub_5 |
| 156146 | 0, // ZPR4Strided:x8sub_6_x8sub_7 |
| 156147 | 0, // ZPR4Strided:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156148 | 0, // ZPR4Strided:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156149 | 0, // ZPR4Strided:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156150 | 0, // ZPR4Strided:sub_32_subo64_then_sub_32 |
| 156151 | 0, // ZPR4Strided:zsub_qsub1 |
| 156152 | 0, // ZPR4Strided:zsub_qsub1_qsub2_qsub3 |
| 156153 | 0, // ZPR4Strided:zsub_qsub1_qsub2 |
| 156154 | 0, // ZPR4Strided:zsub0_zsub1 |
| 156155 | 0, // ZPR4Strided:zsub0_zsub1_zsub2 |
| 156156 | 0, // ZPR4Strided:zsub1_zsub2 |
| 156157 | 0, // ZPR4Strided:zsub1_zsub2_zsub3 |
| 156158 | 0, // ZPR4Strided:zsub2_zsub3 |
| 156159 | 135, // ZPR4Strided:zsub0_zsub2 -> ZPR2Strided |
| 156160 | 135, // ZPR4Strided:zsub1_zsub3 -> ZPR2Strided |
| 156161 | }, |
| 156162 | { // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 156163 | 7, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:bsub -> FPR8 |
| 156164 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:bsub_hi |
| 156165 | 65, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub -> FPR64_lo |
| 156166 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0 |
| 156167 | 65, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1 -> FPR64_lo |
| 156168 | 65, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2 -> FPR64_lo |
| 156169 | 65, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3 -> FPR64_lo |
| 156170 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_hi |
| 156171 | 10, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:hsub -> FPR16_lo |
| 156172 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:hsub_hi |
| 156173 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:psub |
| 156174 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:psub0 |
| 156175 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:psub1 |
| 156176 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0 |
| 156177 | 94, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1 -> FPR128_lo |
| 156178 | 94, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2 -> FPR128_lo |
| 156179 | 94, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub3 -> FPR128_lo |
| 156180 | 44, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156181 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:ssub_hi |
| 156182 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32 |
| 156183 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_hi |
| 156184 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sube32 |
| 156185 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sube64 |
| 156186 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:subo32 |
| 156187 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:subo64 |
| 156188 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_0 |
| 156189 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1 |
| 156190 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2 |
| 156191 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3 |
| 156192 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4 |
| 156193 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5 |
| 156194 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6 |
| 156195 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7 |
| 156196 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubb |
| 156197 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd0 |
| 156198 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1 |
| 156199 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh0 |
| 156200 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1 |
| 156201 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubq0 |
| 156202 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubq1 |
| 156203 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs0 |
| 156204 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1 |
| 156205 | 94, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub -> FPR128_lo |
| 156206 | 97, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b |
| 156207 | 97, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b |
| 156208 | 97, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b |
| 156209 | 97, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b |
| 156210 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_hi |
| 156211 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 |
| 156212 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 |
| 156213 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 |
| 156214 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 |
| 156215 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 |
| 156216 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 |
| 156217 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 156218 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 156219 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 |
| 156220 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 |
| 156221 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 |
| 156222 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 |
| 156223 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 |
| 156224 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 |
| 156225 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 156226 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 156227 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 156228 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 156229 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 156230 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 156231 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156232 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156233 | 7, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 156234 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_bsub_hi |
| 156235 | 10, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 156236 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_hsub_hi |
| 156237 | 44, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156238 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_then_ssub_hi |
| 156239 | 7, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 156240 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_bsub_hi |
| 156241 | 10, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 156242 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_hsub_hi |
| 156243 | 44, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156244 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub3_then_ssub_hi |
| 156245 | 7, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 156246 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_bsub_hi |
| 156247 | 10, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 156248 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_hsub_hi |
| 156249 | 44, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156250 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_then_ssub_hi |
| 156251 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:psub1_then_psub |
| 156252 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_then_dsub_hi |
| 156253 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub3_then_dsub_hi |
| 156254 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2_then_dsub_hi |
| 156255 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 |
| 156256 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 156257 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 |
| 156258 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 156259 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 |
| 156260 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 156261 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 |
| 156262 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 156263 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 |
| 156264 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 156265 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 |
| 156266 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 156267 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 |
| 156268 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 156269 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:subo64_then_sub_32 |
| 156270 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:subo64_then_sub_32_hi |
| 156271 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi |
| 156272 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi |
| 156273 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi |
| 156274 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0_dsub1 |
| 156275 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 156276 | 79, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156277 | 116, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 156278 | 79, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156279 | 79, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156280 | 127, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 156281 | 116, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 156282 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0_qsub1 |
| 156283 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 156284 | 140, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 156285 | 220, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 156286 | 140, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 156287 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 156288 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 |
| 156289 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 |
| 156290 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 |
| 156291 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 |
| 156292 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156293 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156294 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156295 | 0, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 156296 | 140, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 156297 | 320, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 156298 | 220, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 156299 | 171, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 156300 | 256, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 156301 | 165, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 156302 | 246, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 156303 | 149, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 156304 | 152, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub0_zsub2 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 156305 | 152, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo:zsub1_zsub3 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 156306 | }, |
| 156307 | { // ZPR4_with_qsub1_in_FPR128_0to7 |
| 156308 | 7, // ZPR4_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 156309 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:bsub_hi |
| 156310 | 56, // ZPR4_with_qsub1_in_FPR128_0to7:dsub -> FPR64 |
| 156311 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub0 |
| 156312 | 65, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 156313 | 65, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 156314 | 65, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 156315 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub_hi |
| 156316 | 8, // ZPR4_with_qsub1_in_FPR128_0to7:hsub -> FPR16 |
| 156317 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:hsub_hi |
| 156318 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:psub |
| 156319 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:psub0 |
| 156320 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:psub1 |
| 156321 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub0 |
| 156322 | 98, // ZPR4_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 156323 | 94, // ZPR4_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 156324 | 94, // ZPR4_with_qsub1_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 156325 | 40, // ZPR4_with_qsub1_in_FPR128_0to7:ssub -> FPR32 |
| 156326 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:ssub_hi |
| 156327 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sub_32 |
| 156328 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 156329 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sube32 |
| 156330 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sube64 |
| 156331 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:subo32 |
| 156332 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:subo64 |
| 156333 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 156334 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 156335 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 156336 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 156337 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 156338 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 156339 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 156340 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 156341 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubb |
| 156342 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubd0 |
| 156343 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubd1 |
| 156344 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh0 |
| 156345 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1 |
| 156346 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubq0 |
| 156347 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubq1 |
| 156348 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs0 |
| 156349 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1 |
| 156350 | 92, // ZPR4_with_qsub1_in_FPR128_0to7:zsub -> FPR128 |
| 156351 | 93, // ZPR4_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR |
| 156352 | 102, // ZPR4_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 156353 | 97, // ZPR4_with_qsub1_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 156354 | 97, // ZPR4_with_qsub1_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 156355 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub_hi |
| 156356 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 156357 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 156358 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 156359 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 156360 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 156361 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 156362 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 156363 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 156364 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 156365 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 156366 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 156367 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 156368 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 156369 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 156370 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 156371 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 156372 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 156373 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 156374 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 156375 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 156376 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156377 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156378 | 7, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 156379 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 156380 | 10, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 156381 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 156382 | 44, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156383 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 156384 | 7, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 156385 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 156386 | 10, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 156387 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 156388 | 44, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156389 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 156390 | 7, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 156391 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 156392 | 10, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 156393 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 156394 | 44, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156395 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 156396 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 156397 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 156398 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 156399 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 156400 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 156401 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 156402 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 156403 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 156404 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 156405 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 156406 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 156407 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 156408 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 156409 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 156410 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 156411 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 156412 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 156413 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 156414 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 156415 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 156416 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 156417 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 156418 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 156419 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 156420 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 156421 | 79, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156422 | 116, // ZPR4_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 156423 | 79, // ZPR4_with_qsub1_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156424 | 77, // ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 156425 | 126, // ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 156426 | 115, // ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 156427 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 156428 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 156429 | 146, // ZPR4_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 156430 | 222, // ZPR4_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 156431 | 140, // ZPR4_with_qsub1_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 156432 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 156433 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 156434 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 156435 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 156436 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 156437 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156438 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156439 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156440 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 156441 | 147, // ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 156442 | 325, // ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_0to7 |
| 156443 | 223, // ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 156444 | 154, // ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 156445 | 225, // ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 156446 | 161, // ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 156447 | 239, // ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 156448 | 141, // ZPR4_with_qsub1_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 156449 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 156450 | 0, // ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 156451 | }, |
| 156452 | { // ZPR4_with_qsub2_in_FPR128_0to7 |
| 156453 | 7, // ZPR4_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 156454 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:bsub_hi |
| 156455 | 56, // ZPR4_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 156456 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub0 |
| 156457 | 56, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64 |
| 156458 | 65, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 156459 | 65, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 156460 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub_hi |
| 156461 | 8, // ZPR4_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 156462 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:hsub_hi |
| 156463 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:psub |
| 156464 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:psub0 |
| 156465 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:psub1 |
| 156466 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub0 |
| 156467 | 92, // ZPR4_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128 |
| 156468 | 98, // ZPR4_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 156469 | 94, // ZPR4_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 156470 | 40, // ZPR4_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 156471 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:ssub_hi |
| 156472 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sub_32 |
| 156473 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 156474 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sube32 |
| 156475 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sube64 |
| 156476 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:subo32 |
| 156477 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:subo64 |
| 156478 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 156479 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 156480 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 156481 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 156482 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 156483 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 156484 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 156485 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 156486 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubb |
| 156487 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubd0 |
| 156488 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubd1 |
| 156489 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh0 |
| 156490 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1 |
| 156491 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubq0 |
| 156492 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubq1 |
| 156493 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs0 |
| 156494 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1 |
| 156495 | 92, // ZPR4_with_qsub2_in_FPR128_0to7:zsub -> FPR128 |
| 156496 | 93, // ZPR4_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR |
| 156497 | 93, // ZPR4_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR |
| 156498 | 102, // ZPR4_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 156499 | 97, // ZPR4_with_qsub2_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 156500 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub_hi |
| 156501 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 156502 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 156503 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 156504 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 156505 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 156506 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 156507 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 156508 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 156509 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 156510 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 156511 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 156512 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 156513 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 156514 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 156515 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 156516 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 156517 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 156518 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 156519 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 156520 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 156521 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156522 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156523 | 7, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 156524 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 156525 | 8, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 156526 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 156527 | 40, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 156528 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 156529 | 7, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 156530 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 156531 | 10, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 156532 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 156533 | 44, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156534 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 156535 | 7, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 156536 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 156537 | 10, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 156538 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 156539 | 44, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156540 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 156541 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 156542 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 156543 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 156544 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 156545 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 156546 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 156547 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 156548 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 156549 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 156550 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 156551 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 156552 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 156553 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 156554 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 156555 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 156556 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 156557 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 156558 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 156559 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 156560 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 156561 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 156562 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 156563 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 156564 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 156565 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 156566 | 77, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 156567 | 115, // ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 156568 | 79, // ZPR4_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 156569 | 75, // ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD |
| 156570 | 124, // ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 156571 | 113, // ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 156572 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 156573 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 156574 | 147, // ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 156575 | 223, // ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub1_in_FPR128_0to7 |
| 156576 | 146, // ZPR4_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 156577 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 156578 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 156579 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 156580 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 156581 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 156582 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156583 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156584 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156585 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 156586 | 128, // ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ |
| 156587 | 326, // ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_0to7 |
| 156588 | 224, // ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 156589 | 129, // ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2 |
| 156590 | 226, // ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 156591 | 154, // ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 156592 | 225, // ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_qsub1_in_FPR128_0to7 |
| 156593 | 161, // ZPR4_with_qsub2_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 156594 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 156595 | 0, // ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 156596 | }, |
| 156597 | { // ZPR4_with_qsub3_in_FPR128_0to7 |
| 156598 | 7, // ZPR4_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 156599 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:bsub_hi |
| 156600 | 56, // ZPR4_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 156601 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub0 |
| 156602 | 56, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64 |
| 156603 | 56, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64 |
| 156604 | 65, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 156605 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub_hi |
| 156606 | 8, // ZPR4_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 156607 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:hsub_hi |
| 156608 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:psub |
| 156609 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:psub0 |
| 156610 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:psub1 |
| 156611 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub0 |
| 156612 | 92, // ZPR4_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128 |
| 156613 | 92, // ZPR4_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128 |
| 156614 | 98, // ZPR4_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 156615 | 40, // ZPR4_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 156616 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:ssub_hi |
| 156617 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sub_32 |
| 156618 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 156619 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sube32 |
| 156620 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sube64 |
| 156621 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:subo32 |
| 156622 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:subo64 |
| 156623 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 156624 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 156625 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 156626 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 156627 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 156628 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 156629 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 156630 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 156631 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubb |
| 156632 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubd0 |
| 156633 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubd1 |
| 156634 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh0 |
| 156635 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1 |
| 156636 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubq0 |
| 156637 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubq1 |
| 156638 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs0 |
| 156639 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1 |
| 156640 | 92, // ZPR4_with_qsub3_in_FPR128_0to7:zsub -> FPR128 |
| 156641 | 93, // ZPR4_with_qsub3_in_FPR128_0to7:zsub0 -> ZPR |
| 156642 | 93, // ZPR4_with_qsub3_in_FPR128_0to7:zsub1 -> ZPR |
| 156643 | 93, // ZPR4_with_qsub3_in_FPR128_0to7:zsub2 -> ZPR |
| 156644 | 102, // ZPR4_with_qsub3_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 156645 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub_hi |
| 156646 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 156647 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 156648 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 156649 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 156650 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 156651 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 156652 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 156653 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 156654 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 156655 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 156656 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 156657 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 156658 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 156659 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 156660 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 156661 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 156662 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 156663 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 156664 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 156665 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 156666 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156667 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156668 | 7, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 156669 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 156670 | 8, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 156671 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 156672 | 40, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 156673 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 156674 | 7, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 156675 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 156676 | 10, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 156677 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 156678 | 44, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 156679 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 156680 | 7, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 156681 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 156682 | 8, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16 |
| 156683 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 156684 | 40, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32 |
| 156685 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 156686 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 156687 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 156688 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 156689 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 156690 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 156691 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 156692 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 156693 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 156694 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 156695 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 156696 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 156697 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 156698 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 156699 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 156700 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 156701 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 156702 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 156703 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 156704 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 156705 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 156706 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 156707 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 156708 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 156709 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 156710 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 156711 | 75, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD |
| 156712 | 113, // ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 156713 | 77, // ZPR4_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 156714 | 75, // ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD |
| 156715 | 121, // ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 156716 | 110, // ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD |
| 156717 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1 |
| 156718 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 156719 | 128, // ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ |
| 156720 | 224, // ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 156721 | 147, // ZPR4_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 156722 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 156723 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 156724 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 156725 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 156726 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 156727 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156728 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156729 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156730 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 156731 | 128, // ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1 -> QQ |
| 156732 | 327, // ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 156733 | 206, // ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ |
| 156734 | 129, // ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1 -> ZPR2 |
| 156735 | 207, // ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3 |
| 156736 | 129, // ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2 -> ZPR2 |
| 156737 | 226, // ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 156738 | 154, // ZPR4_with_qsub3_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 156739 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 156740 | 0, // ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 156741 | }, |
| 156742 | { // ZPR4_with_zsub0_in_ZPR_K |
| 156743 | 7, // ZPR4_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 156744 | 0, // ZPR4_with_zsub0_in_ZPR_K:bsub_hi |
| 156745 | 56, // ZPR4_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 156746 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub0 |
| 156747 | 56, // ZPR4_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 156748 | 56, // ZPR4_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 156749 | 56, // ZPR4_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 156750 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub_hi |
| 156751 | 8, // ZPR4_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 156752 | 0, // ZPR4_with_zsub0_in_ZPR_K:hsub_hi |
| 156753 | 0, // ZPR4_with_zsub0_in_ZPR_K:psub |
| 156754 | 0, // ZPR4_with_zsub0_in_ZPR_K:psub0 |
| 156755 | 0, // ZPR4_with_zsub0_in_ZPR_K:psub1 |
| 156756 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub0 |
| 156757 | 92, // ZPR4_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 156758 | 92, // ZPR4_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 156759 | 92, // ZPR4_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 156760 | 40, // ZPR4_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 156761 | 0, // ZPR4_with_zsub0_in_ZPR_K:ssub_hi |
| 156762 | 0, // ZPR4_with_zsub0_in_ZPR_K:sub_32 |
| 156763 | 0, // ZPR4_with_zsub0_in_ZPR_K:sub_32_hi |
| 156764 | 0, // ZPR4_with_zsub0_in_ZPR_K:sube32 |
| 156765 | 0, // ZPR4_with_zsub0_in_ZPR_K:sube64 |
| 156766 | 0, // ZPR4_with_zsub0_in_ZPR_K:subo32 |
| 156767 | 0, // ZPR4_with_zsub0_in_ZPR_K:subo64 |
| 156768 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_0 |
| 156769 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_1 |
| 156770 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_2 |
| 156771 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_3 |
| 156772 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_4 |
| 156773 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_5 |
| 156774 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_6 |
| 156775 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_7 |
| 156776 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubb |
| 156777 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubd0 |
| 156778 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubd1 |
| 156779 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh0 |
| 156780 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1 |
| 156781 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubq0 |
| 156782 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubq1 |
| 156783 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs0 |
| 156784 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1 |
| 156785 | 92, // ZPR4_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 156786 | 103, // ZPR4_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 156787 | 93, // ZPR4_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 156788 | 93, // ZPR4_with_zsub0_in_ZPR_K:zsub2 -> ZPR |
| 156789 | 93, // ZPR4_with_zsub0_in_ZPR_K:zsub3 -> ZPR |
| 156790 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub_hi |
| 156791 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 156792 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 156793 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 156794 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 156795 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 156796 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 156797 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 156798 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 156799 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 156800 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 156801 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 156802 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 156803 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 156804 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 156805 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 156806 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 156807 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 156808 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 156809 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 156810 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 156811 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156812 | 0, // ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156813 | 7, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 156814 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 156815 | 8, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 156816 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 156817 | 40, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 156818 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 156819 | 7, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 156820 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 156821 | 8, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 156822 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 156823 | 40, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 156824 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 156825 | 7, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 156826 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 156827 | 8, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 156828 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 156829 | 40, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 156830 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 156831 | 0, // ZPR4_with_zsub0_in_ZPR_K:psub1_then_psub |
| 156832 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 156833 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 156834 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 156835 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 156836 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 156837 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 156838 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 156839 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 156840 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 156841 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 156842 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 156843 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 156844 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 156845 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 156846 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 156847 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 156848 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 156849 | 0, // ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 156850 | 0, // ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 156851 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 156852 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 156853 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 156854 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 156855 | 0, // ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 156856 | 75, // ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 156857 | 110, // ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 156858 | 75, // ZPR4_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 156859 | 75, // ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 156860 | 117, // ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 156861 | 110, // ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 156862 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 156863 | 0, // ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 156864 | 128, // ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 156865 | 206, // ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 156866 | 128, // ZPR4_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 156867 | 0, // ZPR4_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 156868 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 156869 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 156870 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 156871 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 156872 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 156873 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 156874 | 0, // ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 156875 | 0, // ZPR4_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 156876 | 128, // ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 156877 | 297, // ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 156878 | 206, // ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 156879 | 156, // ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 156880 | 228, // ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 156881 | 129, // ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2 |
| 156882 | 207, // ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3 |
| 156883 | 129, // ZPR4_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2 |
| 156884 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 156885 | 0, // ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 156886 | }, |
| 156887 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 156888 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub -> FPR8 |
| 156889 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub_hi |
| 156890 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub -> FPR64 |
| 156891 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0 |
| 156892 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1 -> FPR64 |
| 156893 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2 -> FPR64 |
| 156894 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3 -> FPR64 |
| 156895 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_hi |
| 156896 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub -> FPR16 |
| 156897 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub_hi |
| 156898 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub |
| 156899 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub0 |
| 156900 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1 |
| 156901 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0 |
| 156902 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1 -> FPR128 |
| 156903 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2 -> FPR128 |
| 156904 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3 -> FPR128 |
| 156905 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub -> FPR32 |
| 156906 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub_hi |
| 156907 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32 |
| 156908 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_hi |
| 156909 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube32 |
| 156910 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube64 |
| 156911 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo32 |
| 156912 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64 |
| 156913 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0 |
| 156914 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1 |
| 156915 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2 |
| 156916 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3 |
| 156917 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4 |
| 156918 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5 |
| 156919 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6 |
| 156920 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7 |
| 156921 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubb |
| 156922 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd0 |
| 156923 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1 |
| 156924 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh0 |
| 156925 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1 |
| 156926 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq0 |
| 156927 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq1 |
| 156928 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs0 |
| 156929 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1 |
| 156930 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub -> FPR128 |
| 156931 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0 -> ZPRMul2_Hi |
| 156932 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1 -> ZPR |
| 156933 | 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2 -> ZPRMul2 |
| 156934 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3 -> ZPR |
| 156935 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_hi |
| 156936 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq0 |
| 156937 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq1 |
| 156938 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd0 |
| 156939 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1 |
| 156940 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq0 |
| 156941 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq1 |
| 156942 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 156943 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 156944 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd0 |
| 156945 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1 |
| 156946 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq0 |
| 156947 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq1 |
| 156948 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs0 |
| 156949 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1 |
| 156950 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 156951 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 156952 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 156953 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 156954 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 156955 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 156956 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 156957 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 156958 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub -> FPR8 |
| 156959 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub_hi |
| 156960 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub -> FPR16 |
| 156961 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub_hi |
| 156962 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub -> FPR32 |
| 156963 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub_hi |
| 156964 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub -> FPR8 |
| 156965 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub_hi |
| 156966 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub -> FPR16 |
| 156967 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub_hi |
| 156968 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub -> FPR32 |
| 156969 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub_hi |
| 156970 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub -> FPR8 |
| 156971 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub_hi |
| 156972 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub -> FPR16 |
| 156973 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub_hi |
| 156974 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub -> FPR32 |
| 156975 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub_hi |
| 156976 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1_then_psub |
| 156977 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_then_dsub_hi |
| 156978 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3_then_dsub_hi |
| 156979 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_then_dsub_hi |
| 156980 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32 |
| 156981 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32_hi |
| 156982 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32 |
| 156983 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_hi |
| 156984 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32 |
| 156985 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32_hi |
| 156986 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32 |
| 156987 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_hi |
| 156988 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32 |
| 156989 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32_hi |
| 156990 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32 |
| 156991 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_hi |
| 156992 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32 |
| 156993 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32_hi |
| 156994 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32 |
| 156995 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32_hi |
| 156996 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_then_zsub_hi |
| 156997 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3_then_zsub_hi |
| 156998 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_then_zsub_hi |
| 156999 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1 |
| 157000 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1_dsub2 |
| 157001 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2 -> DD |
| 157002 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 157003 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_dsub3 -> DD |
| 157004 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1 -> DD |
| 157005 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 157006 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 157007 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1 |
| 157008 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1_qsub2 |
| 157009 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2 -> QQ |
| 157010 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 157011 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_qsub3 -> QQ |
| 157012 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 157013 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0_x8sub_1 |
| 157014 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_x8sub_3 |
| 157015 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_x8sub_5 |
| 157016 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_x8sub_7 |
| 157017 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157018 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157019 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157020 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_subo64_then_sub_32 |
| 157021 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1 -> QQ |
| 157022 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 157023 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 157024 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 157025 | 229, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 157026 | 138, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 157027 | 214, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 157028 | 134, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_zsub3 -> ZPR2Mul2 |
| 157029 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub2 |
| 157030 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub3 |
| 157031 | }, |
| 157032 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 157033 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:bsub -> FPR8 |
| 157034 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:bsub_hi |
| 157035 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub -> FPR64_lo |
| 157036 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0 |
| 157037 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1 -> FPR64_lo |
| 157038 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2 -> FPR64 |
| 157039 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3 -> FPR64 |
| 157040 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_hi |
| 157041 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:hsub -> FPR16_lo |
| 157042 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:hsub_hi |
| 157043 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub |
| 157044 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub0 |
| 157045 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub1 |
| 157046 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0 |
| 157047 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1 -> FPR128_lo |
| 157048 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2 -> FPR128 |
| 157049 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub3 -> FPR128 |
| 157050 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157051 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:ssub_hi |
| 157052 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32 |
| 157053 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_hi |
| 157054 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sube32 |
| 157055 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sube64 |
| 157056 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo32 |
| 157057 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64 |
| 157058 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_0 |
| 157059 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1 |
| 157060 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2 |
| 157061 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3 |
| 157062 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4 |
| 157063 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5 |
| 157064 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6 |
| 157065 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7 |
| 157066 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubb |
| 157067 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd0 |
| 157068 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1 |
| 157069 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh0 |
| 157070 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1 |
| 157071 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubq0 |
| 157072 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubq1 |
| 157073 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs0 |
| 157074 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1 |
| 157075 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub -> FPR128_lo |
| 157076 | 100, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0 -> ZPRMul2_Lo |
| 157077 | 97, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1 -> ZPR_4b |
| 157078 | 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2 -> ZPRMul2 |
| 157079 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub3 -> ZPR |
| 157080 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_hi |
| 157081 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1_then_zasubq0 |
| 157082 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubd1_then_zasubq1 |
| 157083 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd0 |
| 157084 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1 |
| 157085 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubq0 |
| 157086 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubq1 |
| 157087 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 157088 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 157089 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd0 |
| 157090 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1 |
| 157091 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubq0 |
| 157092 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubq1 |
| 157093 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs0 |
| 157094 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1 |
| 157095 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 157096 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 157097 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 157098 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 157099 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 157100 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 157101 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157102 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157103 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_bsub -> FPR8 |
| 157104 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_bsub_hi |
| 157105 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 157106 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_hsub_hi |
| 157107 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157108 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_then_ssub_hi |
| 157109 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_bsub -> FPR8 |
| 157110 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_bsub_hi |
| 157111 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_hsub -> FPR16 |
| 157112 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_hsub_hi |
| 157113 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_ssub -> FPR32 |
| 157114 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub3_then_ssub_hi |
| 157115 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_bsub -> FPR8 |
| 157116 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_bsub_hi |
| 157117 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_hsub -> FPR16 |
| 157118 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_hsub_hi |
| 157119 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_ssub -> FPR32 |
| 157120 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_then_ssub_hi |
| 157121 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:psub1_then_psub |
| 157122 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_then_dsub_hi |
| 157123 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub3_then_dsub_hi |
| 157124 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2_then_dsub_hi |
| 157125 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7_then_sub_32 |
| 157126 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_7_then_sub_32_hi |
| 157127 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32 |
| 157128 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32_hi |
| 157129 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5_then_sub_32 |
| 157130 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_5_then_sub_32_hi |
| 157131 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32 |
| 157132 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32_hi |
| 157133 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3_then_sub_32 |
| 157134 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_3_then_sub_32_hi |
| 157135 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32 |
| 157136 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32_hi |
| 157137 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1_then_sub_32 |
| 157138 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_1_then_sub_32_hi |
| 157139 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64_then_sub_32 |
| 157140 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:subo64_then_sub_32_hi |
| 157141 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_then_zsub_hi |
| 157142 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub3_then_zsub_hi |
| 157143 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2_then_zsub_hi |
| 157144 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0_dsub1 |
| 157145 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub0_dsub1_dsub2 |
| 157146 | 76, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 157147 | 111, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 157148 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub2_dsub3 -> DD |
| 157149 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 157150 | 122, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 157151 | 114, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 157152 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0_qsub1 |
| 157153 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub0_qsub1_qsub2 |
| 157154 | 133, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 157155 | 210, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 157156 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:qsub2_qsub3 -> QQ |
| 157157 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 157158 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_0_x8sub_1 |
| 157159 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_x8sub_3 |
| 157160 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_x8sub_5 |
| 157161 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_x8sub_7 |
| 157162 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157163 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157164 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157165 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:sub_32_subo64_then_sub_32 |
| 157166 | 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 157167 | 312, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 157168 | 217, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 157169 | 149, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 157170 | 230, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 157171 | 162, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 157172 | 240, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 157173 | 134, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub2_zsub3 -> ZPR2Mul2 |
| 157174 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub0_zsub2 |
| 157175 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo:zsub1_zsub3 |
| 157176 | }, |
| 157177 | { // ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 157178 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 157179 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 157180 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 157181 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 157182 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 157183 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 157184 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 157185 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 157186 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 157187 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 157188 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:psub |
| 157189 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 157190 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 157191 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 157192 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 157193 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 157194 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 157195 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 157196 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 157197 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 157198 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 157199 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 157200 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 157201 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 157202 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 157203 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 157204 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 157205 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 157206 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 157207 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 157208 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 157209 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 157210 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 157211 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 157212 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 157213 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 157214 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 157215 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 157216 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 157217 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 157218 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 157219 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 157220 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 157221 | 93, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 157222 | 99, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 157223 | 93, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 157224 | 96, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPRMul2 |
| 157225 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 157226 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 157227 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 157228 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 157229 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 157230 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 157231 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 157232 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 157233 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 157234 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 157235 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 157236 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 157237 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 157238 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 157239 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 157240 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 157241 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 157242 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 157243 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 157244 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 157245 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 157246 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157247 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157248 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 157249 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 157250 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 157251 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 157252 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 157253 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 157254 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 157255 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 157256 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 157257 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 157258 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 157259 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 157260 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 157261 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 157262 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 157263 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 157264 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 157265 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 157266 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 157267 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 157268 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 157269 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 157270 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 157271 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 157272 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 157273 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 157274 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 157275 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 157276 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 157277 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 157278 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 157279 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 157280 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 157281 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 157282 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 157283 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 157284 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 157285 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 157286 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 157287 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 157288 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 157289 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 157290 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 157291 | 75, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 157292 | 110, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 157293 | 75, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 157294 | 75, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 157295 | 117, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 157296 | 110, // ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 157297 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 157298 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 157299 | 128, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 157300 | 206, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 157301 | 128, // ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 157302 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 157303 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 157304 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 157305 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 157306 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 157307 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157308 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157309 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157310 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 157311 | 128, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 157312 | 297, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 157313 | 206, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 157314 | 157, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 157315 | 231, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 157316 | 148, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 157317 | 229, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 157318 | 138, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 157319 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 157320 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 157321 | }, |
| 157322 | { // ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 157323 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 157324 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 157325 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64 |
| 157326 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 157327 | 65, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 157328 | 65, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 157329 | 56, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3 -> FPR64 |
| 157330 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 157331 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16 |
| 157332 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 157333 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:psub |
| 157334 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 157335 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 157336 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 157337 | 94, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 157338 | 94, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 157339 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub3 -> FPR128 |
| 157340 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32 |
| 157341 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 157342 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 157343 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 157344 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 157345 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 157346 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 157347 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 157348 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 157349 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 157350 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 157351 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 157352 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 157353 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 157354 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 157355 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 157356 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 157357 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 157358 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 157359 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 157360 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 157361 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 157362 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 157363 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 157364 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 157365 | 92, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128 |
| 157366 | 93, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR |
| 157367 | 100, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 157368 | 97, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 157369 | 96, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub3 -> ZPRMul2 |
| 157370 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 157371 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 157372 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 157373 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 157374 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 157375 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 157376 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 157377 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 157378 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 157379 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 157380 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 157381 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 157382 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 157383 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 157384 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 157385 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 157386 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 157387 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 157388 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 157389 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 157390 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 157391 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157392 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157393 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 157394 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 157395 | 10, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 157396 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 157397 | 44, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157398 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 157399 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 157400 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 157401 | 8, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16 |
| 157402 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 157403 | 40, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32 |
| 157404 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 157405 | 7, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 157406 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 157407 | 10, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 157408 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 157409 | 44, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157410 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 157411 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 157412 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 157413 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 157414 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 157415 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 157416 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 157417 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 157418 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 157419 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 157420 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 157421 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 157422 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 157423 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 157424 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 157425 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 157426 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 157427 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 157428 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 157429 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 157430 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 157431 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 157432 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 157433 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 157434 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 157435 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 157436 | 79, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 157437 | 114, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 157438 | 76, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 157439 | 77, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 157440 | 123, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 157441 | 115, // ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 157442 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 157443 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 157444 | 140, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 157445 | 217, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 157446 | 133, // ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 157447 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 157448 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 157449 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 157450 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 157451 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 157452 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157453 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157454 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157455 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 157456 | 132, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 157457 | 310, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 157458 | 216, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 157459 | 158, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 157460 | 232, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 157461 | 149, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 157462 | 230, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 157463 | 162, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 157464 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 157465 | 0, // ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 157466 | }, |
| 157467 | { // ZPR4_with_zsub1_in_ZPRMul4 |
| 157468 | 7, // ZPR4_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 157469 | 0, // ZPR4_with_zsub1_in_ZPRMul4:bsub_hi |
| 157470 | 56, // ZPR4_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 157471 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub0 |
| 157472 | 56, // ZPR4_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 157473 | 56, // ZPR4_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 157474 | 56, // ZPR4_with_zsub1_in_ZPRMul4:dsub3 -> FPR64 |
| 157475 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub_hi |
| 157476 | 8, // ZPR4_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 157477 | 0, // ZPR4_with_zsub1_in_ZPRMul4:hsub_hi |
| 157478 | 0, // ZPR4_with_zsub1_in_ZPRMul4:psub |
| 157479 | 0, // ZPR4_with_zsub1_in_ZPRMul4:psub0 |
| 157480 | 0, // ZPR4_with_zsub1_in_ZPRMul4:psub1 |
| 157481 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub0 |
| 157482 | 92, // ZPR4_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 157483 | 92, // ZPR4_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 157484 | 92, // ZPR4_with_zsub1_in_ZPRMul4:qsub3 -> FPR128 |
| 157485 | 40, // ZPR4_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 157486 | 0, // ZPR4_with_zsub1_in_ZPRMul4:ssub_hi |
| 157487 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sub_32 |
| 157488 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sub_32_hi |
| 157489 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sube32 |
| 157490 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sube64 |
| 157491 | 0, // ZPR4_with_zsub1_in_ZPRMul4:subo32 |
| 157492 | 0, // ZPR4_with_zsub1_in_ZPRMul4:subo64 |
| 157493 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_0 |
| 157494 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_1 |
| 157495 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_2 |
| 157496 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_3 |
| 157497 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_4 |
| 157498 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_5 |
| 157499 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_6 |
| 157500 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_7 |
| 157501 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubb |
| 157502 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubd0 |
| 157503 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubd1 |
| 157504 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh0 |
| 157505 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1 |
| 157506 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubq0 |
| 157507 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubq1 |
| 157508 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs0 |
| 157509 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1 |
| 157510 | 92, // ZPR4_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 157511 | 93, // ZPR4_with_zsub1_in_ZPRMul4:zsub0 -> ZPR |
| 157512 | 101, // ZPR4_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 157513 | 93, // ZPR4_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 157514 | 96, // ZPR4_with_zsub1_in_ZPRMul4:zsub3 -> ZPRMul2 |
| 157515 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub_hi |
| 157516 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 157517 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 157518 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 157519 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 157520 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 157521 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 157522 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 157523 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 157524 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 157525 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 157526 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 157527 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 157528 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 157529 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 157530 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 157531 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 157532 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 157533 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 157534 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 157535 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 157536 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157537 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157538 | 7, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 157539 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 157540 | 8, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 157541 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 157542 | 40, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 157543 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 157544 | 7, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 157545 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 157546 | 8, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 157547 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 157548 | 40, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 157549 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 157550 | 7, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 157551 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 157552 | 8, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 157553 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 157554 | 40, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 157555 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 157556 | 0, // ZPR4_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 157557 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 157558 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 157559 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 157560 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 157561 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 157562 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 157563 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 157564 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 157565 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 157566 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 157567 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 157568 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 157569 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 157570 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 157571 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 157572 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 157573 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 157574 | 0, // ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 157575 | 0, // ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 157576 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 157577 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 157578 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 157579 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 157580 | 0, // ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 157581 | 75, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 157582 | 110, // ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 157583 | 75, // ZPR4_with_zsub1_in_ZPRMul4:dsub2_dsub3 -> DD |
| 157584 | 75, // ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 157585 | 117, // ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 157586 | 110, // ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 157587 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 157588 | 0, // ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 157589 | 128, // ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 157590 | 206, // ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 157591 | 128, // ZPR4_with_zsub1_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 157592 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 157593 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 157594 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 157595 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 157596 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 157597 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157598 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157599 | 0, // ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157600 | 0, // ZPR4_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 157601 | 128, // ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 157602 | 297, // ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 157603 | 206, // ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 157604 | 159, // ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 157605 | 233, // ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 157606 | 155, // ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 157607 | 227, // ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 157608 | 138, // ZPR4_with_zsub1_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 157609 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 157610 | 0, // ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 157611 | }, |
| 157612 | { // ZPR4_with_zsub1_in_ZPR_K |
| 157613 | 7, // ZPR4_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 157614 | 0, // ZPR4_with_zsub1_in_ZPR_K:bsub_hi |
| 157615 | 56, // ZPR4_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 157616 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub0 |
| 157617 | 56, // ZPR4_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 157618 | 56, // ZPR4_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 157619 | 56, // ZPR4_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 157620 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub_hi |
| 157621 | 8, // ZPR4_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 157622 | 0, // ZPR4_with_zsub1_in_ZPR_K:hsub_hi |
| 157623 | 0, // ZPR4_with_zsub1_in_ZPR_K:psub |
| 157624 | 0, // ZPR4_with_zsub1_in_ZPR_K:psub0 |
| 157625 | 0, // ZPR4_with_zsub1_in_ZPR_K:psub1 |
| 157626 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub0 |
| 157627 | 92, // ZPR4_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 157628 | 92, // ZPR4_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 157629 | 92, // ZPR4_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 157630 | 40, // ZPR4_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 157631 | 0, // ZPR4_with_zsub1_in_ZPR_K:ssub_hi |
| 157632 | 0, // ZPR4_with_zsub1_in_ZPR_K:sub_32 |
| 157633 | 0, // ZPR4_with_zsub1_in_ZPR_K:sub_32_hi |
| 157634 | 0, // ZPR4_with_zsub1_in_ZPR_K:sube32 |
| 157635 | 0, // ZPR4_with_zsub1_in_ZPR_K:sube64 |
| 157636 | 0, // ZPR4_with_zsub1_in_ZPR_K:subo32 |
| 157637 | 0, // ZPR4_with_zsub1_in_ZPR_K:subo64 |
| 157638 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_0 |
| 157639 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_1 |
| 157640 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_2 |
| 157641 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_3 |
| 157642 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_4 |
| 157643 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_5 |
| 157644 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_6 |
| 157645 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_7 |
| 157646 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubb |
| 157647 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubd0 |
| 157648 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubd1 |
| 157649 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh0 |
| 157650 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1 |
| 157651 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubq0 |
| 157652 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubq1 |
| 157653 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs0 |
| 157654 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1 |
| 157655 | 92, // ZPR4_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 157656 | 93, // ZPR4_with_zsub1_in_ZPR_K:zsub0 -> ZPR |
| 157657 | 103, // ZPR4_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 157658 | 93, // ZPR4_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 157659 | 93, // ZPR4_with_zsub1_in_ZPR_K:zsub3 -> ZPR |
| 157660 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub_hi |
| 157661 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 157662 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 157663 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 157664 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 157665 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 157666 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 157667 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 157668 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 157669 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 157670 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 157671 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 157672 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 157673 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 157674 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 157675 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 157676 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 157677 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 157678 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 157679 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 157680 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 157681 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157682 | 0, // ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157683 | 7, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 157684 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 157685 | 8, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 157686 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 157687 | 40, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 157688 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 157689 | 7, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 157690 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 157691 | 8, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 157692 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 157693 | 40, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 157694 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 157695 | 7, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 157696 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 157697 | 8, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 157698 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 157699 | 40, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 157700 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 157701 | 0, // ZPR4_with_zsub1_in_ZPR_K:psub1_then_psub |
| 157702 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 157703 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 157704 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 157705 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 157706 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 157707 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 157708 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 157709 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 157710 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 157711 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 157712 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 157713 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 157714 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 157715 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 157716 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 157717 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 157718 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 157719 | 0, // ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 157720 | 0, // ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 157721 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 157722 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 157723 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 157724 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 157725 | 0, // ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 157726 | 75, // ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 157727 | 110, // ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 157728 | 75, // ZPR4_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD |
| 157729 | 75, // ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 157730 | 117, // ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 157731 | 110, // ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 157732 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 157733 | 0, // ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 157734 | 128, // ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 157735 | 206, // ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 157736 | 128, // ZPR4_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ |
| 157737 | 0, // ZPR4_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 157738 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 157739 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 157740 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 157741 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 157742 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157743 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157744 | 0, // ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157745 | 0, // ZPR4_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 157746 | 128, // ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 157747 | 297, // ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 157748 | 206, // ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 157749 | 160, // ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 157750 | 234, // ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_K |
| 157751 | 156, // ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K |
| 157752 | 228, // ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K |
| 157753 | 129, // ZPR4_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2 |
| 157754 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 157755 | 0, // ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 157756 | }, |
| 157757 | { // ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 157758 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 157759 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 157760 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64 |
| 157761 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 157762 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 157763 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 157764 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 157765 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 157766 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16 |
| 157767 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 157768 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:psub |
| 157769 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 157770 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 157771 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 157772 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 157773 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 157774 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 157775 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32 |
| 157776 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 157777 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 157778 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 157779 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 157780 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 157781 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 157782 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 157783 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 157784 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 157785 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 157786 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 157787 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 157788 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 157789 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 157790 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 157791 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 157792 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 157793 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 157794 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 157795 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 157796 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 157797 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 157798 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 157799 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 157800 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128 |
| 157801 | 96, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2 |
| 157802 | 93, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 157803 | 99, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 157804 | 93, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub3 -> ZPR |
| 157805 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 157806 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 157807 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 157808 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 157809 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 157810 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 157811 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 157812 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 157813 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 157814 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 157815 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 157816 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 157817 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 157818 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 157819 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 157820 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 157821 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 157822 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 157823 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 157824 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 157825 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 157826 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157827 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157828 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 157829 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 157830 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 157831 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 157832 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 157833 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 157834 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 157835 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 157836 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 157837 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 157838 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 157839 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 157840 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 157841 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 157842 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 157843 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 157844 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 157845 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 157846 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 157847 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 157848 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 157849 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 157850 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 157851 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 157852 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 157853 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 157854 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 157855 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 157856 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 157857 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 157858 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 157859 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 157860 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 157861 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 157862 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 157863 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 157864 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 157865 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 157866 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 157867 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 157868 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 157869 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 157870 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 157871 | 75, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 157872 | 110, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 157873 | 75, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 157874 | 75, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 157875 | 117, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 157876 | 110, // ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 157877 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 157878 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 157879 | 128, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 157880 | 206, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 157881 | 128, // ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 157882 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 157883 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 157884 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 157885 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 157886 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 157887 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 157888 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 157889 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 157890 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 157891 | 128, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 157892 | 297, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 157893 | 206, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 157894 | 134, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2 |
| 157895 | 235, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 157896 | 157, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 157897 | 231, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 157898 | 148, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 157899 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 157900 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 157901 | }, |
| 157902 | { // ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 157903 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Lo:bsub -> FPR8 |
| 157904 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:bsub_hi |
| 157905 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub -> FPR64 |
| 157906 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0 |
| 157907 | 56, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1 -> FPR64 |
| 157908 | 65, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 157909 | 65, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 157910 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_hi |
| 157911 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Lo:hsub -> FPR16 |
| 157912 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:hsub_hi |
| 157913 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:psub |
| 157914 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:psub0 |
| 157915 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:psub1 |
| 157916 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0 |
| 157917 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1 -> FPR128 |
| 157918 | 94, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 157919 | 94, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 157920 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Lo:ssub -> FPR32 |
| 157921 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:ssub_hi |
| 157922 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32 |
| 157923 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_hi |
| 157924 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sube32 |
| 157925 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sube64 |
| 157926 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:subo32 |
| 157927 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64 |
| 157928 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_0 |
| 157929 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1 |
| 157930 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2 |
| 157931 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3 |
| 157932 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4 |
| 157933 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5 |
| 157934 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6 |
| 157935 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7 |
| 157936 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubb |
| 157937 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd0 |
| 157938 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1 |
| 157939 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh0 |
| 157940 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1 |
| 157941 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubq0 |
| 157942 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubq1 |
| 157943 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs0 |
| 157944 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1 |
| 157945 | 92, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub -> FPR128 |
| 157946 | 96, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0 -> ZPRMul2 |
| 157947 | 93, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1 -> ZPR |
| 157948 | 100, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 157949 | 97, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub3 -> ZPR_4b |
| 157950 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_hi |
| 157951 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 157952 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 157953 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 157954 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 157955 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 157956 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 157957 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 157958 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 157959 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 157960 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 157961 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 157962 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 157963 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 157964 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 157965 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 157966 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 157967 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 157968 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 157969 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 157970 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 157971 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 157972 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 157973 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 157974 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 157975 | 8, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16 |
| 157976 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 157977 | 40, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32 |
| 157978 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 157979 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 157980 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 157981 | 10, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 157982 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 157983 | 44, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157984 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 157985 | 7, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 157986 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 157987 | 10, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 157988 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 157989 | 44, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 157990 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 157991 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:psub1_then_psub |
| 157992 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 157993 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 157994 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 157995 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 157996 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 157997 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 157998 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 157999 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 158000 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 158001 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 158002 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 158003 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 158004 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 158005 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 158006 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 158007 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 158008 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 158009 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 158010 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 158011 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 158012 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 158013 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 158014 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1 |
| 158015 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 158016 | 77, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 158017 | 115, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 158018 | 79, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 158019 | 75, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1 -> DD |
| 158020 | 124, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 158021 | 113, // ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 158022 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1 |
| 158023 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 158024 | 132, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 158025 | 216, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 158026 | 140, // ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 158027 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 158028 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 158029 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 158030 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 158031 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 158032 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158033 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158034 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158035 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 158036 | 128, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1 -> QQ |
| 158037 | 311, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 158038 | 209, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 158039 | 134, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2Mul2 |
| 158040 | 236, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 158041 | 158, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 158042 | 232, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 158043 | 149, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 158044 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub2 |
| 158045 | 0, // ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub3 |
| 158046 | }, |
| 158047 | { // ZPR4_with_zsub2_in_ZPRMul4 |
| 158048 | 7, // ZPR4_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 158049 | 0, // ZPR4_with_zsub2_in_ZPRMul4:bsub_hi |
| 158050 | 56, // ZPR4_with_zsub2_in_ZPRMul4:dsub -> FPR64 |
| 158051 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub0 |
| 158052 | 56, // ZPR4_with_zsub2_in_ZPRMul4:dsub1 -> FPR64 |
| 158053 | 56, // ZPR4_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 158054 | 56, // ZPR4_with_zsub2_in_ZPRMul4:dsub3 -> FPR64 |
| 158055 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub_hi |
| 158056 | 8, // ZPR4_with_zsub2_in_ZPRMul4:hsub -> FPR16 |
| 158057 | 0, // ZPR4_with_zsub2_in_ZPRMul4:hsub_hi |
| 158058 | 0, // ZPR4_with_zsub2_in_ZPRMul4:psub |
| 158059 | 0, // ZPR4_with_zsub2_in_ZPRMul4:psub0 |
| 158060 | 0, // ZPR4_with_zsub2_in_ZPRMul4:psub1 |
| 158061 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub0 |
| 158062 | 92, // ZPR4_with_zsub2_in_ZPRMul4:qsub1 -> FPR128 |
| 158063 | 92, // ZPR4_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 158064 | 92, // ZPR4_with_zsub2_in_ZPRMul4:qsub3 -> FPR128 |
| 158065 | 40, // ZPR4_with_zsub2_in_ZPRMul4:ssub -> FPR32 |
| 158066 | 0, // ZPR4_with_zsub2_in_ZPRMul4:ssub_hi |
| 158067 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sub_32 |
| 158068 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sub_32_hi |
| 158069 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sube32 |
| 158070 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sube64 |
| 158071 | 0, // ZPR4_with_zsub2_in_ZPRMul4:subo32 |
| 158072 | 0, // ZPR4_with_zsub2_in_ZPRMul4:subo64 |
| 158073 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_0 |
| 158074 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_1 |
| 158075 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_2 |
| 158076 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_3 |
| 158077 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_4 |
| 158078 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_5 |
| 158079 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_6 |
| 158080 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_7 |
| 158081 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubb |
| 158082 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubd0 |
| 158083 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubd1 |
| 158084 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh0 |
| 158085 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1 |
| 158086 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubq0 |
| 158087 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubq1 |
| 158088 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs0 |
| 158089 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1 |
| 158090 | 92, // ZPR4_with_zsub2_in_ZPRMul4:zsub -> FPR128 |
| 158091 | 96, // ZPR4_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2 |
| 158092 | 93, // ZPR4_with_zsub2_in_ZPRMul4:zsub1 -> ZPR |
| 158093 | 101, // ZPR4_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 158094 | 93, // ZPR4_with_zsub2_in_ZPRMul4:zsub3 -> ZPR |
| 158095 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub_hi |
| 158096 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 158097 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 158098 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 158099 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 158100 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 158101 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 158102 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 158103 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 158104 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 158105 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 158106 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 158107 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 158108 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 158109 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 158110 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 158111 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 158112 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 158113 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 158114 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 158115 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 158116 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158117 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158118 | 7, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 158119 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 158120 | 8, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 158121 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 158122 | 40, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 158123 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 158124 | 7, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 158125 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 158126 | 8, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 158127 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 158128 | 40, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 158129 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 158130 | 7, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 158131 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 158132 | 8, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 158133 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 158134 | 40, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 158135 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 158136 | 0, // ZPR4_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 158137 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 158138 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 158139 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 158140 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 158141 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 158142 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 158143 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 158144 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 158145 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 158146 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 158147 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 158148 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 158149 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 158150 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 158151 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 158152 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 158153 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 158154 | 0, // ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 158155 | 0, // ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 158156 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 158157 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 158158 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 158159 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 158160 | 0, // ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 158161 | 75, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD |
| 158162 | 110, // ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 158163 | 75, // ZPR4_with_zsub2_in_ZPRMul4:dsub2_dsub3 -> DD |
| 158164 | 75, // ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD |
| 158165 | 117, // ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 158166 | 110, // ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 158167 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 158168 | 0, // ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 158169 | 128, // ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 158170 | 206, // ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 158171 | 128, // ZPR4_with_zsub2_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 158172 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 158173 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 158174 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 158175 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 158176 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 158177 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158178 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158179 | 0, // ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158180 | 0, // ZPR4_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 158181 | 128, // ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ |
| 158182 | 297, // ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 158183 | 206, // ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 158184 | 134, // ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 158185 | 237, // ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 158186 | 159, // ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 158187 | 233, // ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 158188 | 155, // ZPR4_with_zsub2_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 158189 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 158190 | 0, // ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 158191 | }, |
| 158192 | { // ZPR4_with_zsub2_in_ZPR_K |
| 158193 | 7, // ZPR4_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 158194 | 0, // ZPR4_with_zsub2_in_ZPR_K:bsub_hi |
| 158195 | 56, // ZPR4_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 158196 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub0 |
| 158197 | 56, // ZPR4_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 158198 | 56, // ZPR4_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 158199 | 56, // ZPR4_with_zsub2_in_ZPR_K:dsub3 -> FPR64 |
| 158200 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub_hi |
| 158201 | 8, // ZPR4_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 158202 | 0, // ZPR4_with_zsub2_in_ZPR_K:hsub_hi |
| 158203 | 0, // ZPR4_with_zsub2_in_ZPR_K:psub |
| 158204 | 0, // ZPR4_with_zsub2_in_ZPR_K:psub0 |
| 158205 | 0, // ZPR4_with_zsub2_in_ZPR_K:psub1 |
| 158206 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub0 |
| 158207 | 92, // ZPR4_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 158208 | 92, // ZPR4_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 158209 | 92, // ZPR4_with_zsub2_in_ZPR_K:qsub3 -> FPR128 |
| 158210 | 40, // ZPR4_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 158211 | 0, // ZPR4_with_zsub2_in_ZPR_K:ssub_hi |
| 158212 | 0, // ZPR4_with_zsub2_in_ZPR_K:sub_32 |
| 158213 | 0, // ZPR4_with_zsub2_in_ZPR_K:sub_32_hi |
| 158214 | 0, // ZPR4_with_zsub2_in_ZPR_K:sube32 |
| 158215 | 0, // ZPR4_with_zsub2_in_ZPR_K:sube64 |
| 158216 | 0, // ZPR4_with_zsub2_in_ZPR_K:subo32 |
| 158217 | 0, // ZPR4_with_zsub2_in_ZPR_K:subo64 |
| 158218 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_0 |
| 158219 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_1 |
| 158220 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_2 |
| 158221 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_3 |
| 158222 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_4 |
| 158223 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_5 |
| 158224 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_6 |
| 158225 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_7 |
| 158226 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubb |
| 158227 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubd0 |
| 158228 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubd1 |
| 158229 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh0 |
| 158230 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1 |
| 158231 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubq0 |
| 158232 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubq1 |
| 158233 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs0 |
| 158234 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1 |
| 158235 | 92, // ZPR4_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 158236 | 93, // ZPR4_with_zsub2_in_ZPR_K:zsub0 -> ZPR |
| 158237 | 93, // ZPR4_with_zsub2_in_ZPR_K:zsub1 -> ZPR |
| 158238 | 103, // ZPR4_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 158239 | 93, // ZPR4_with_zsub2_in_ZPR_K:zsub3 -> ZPR |
| 158240 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub_hi |
| 158241 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 158242 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 158243 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 158244 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 158245 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 158246 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 158247 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 158248 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 158249 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 158250 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 158251 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 158252 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 158253 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 158254 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 158255 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 158256 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 158257 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 158258 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 158259 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 158260 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 158261 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158262 | 0, // ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158263 | 7, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 158264 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 158265 | 8, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 158266 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 158267 | 40, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 158268 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 158269 | 7, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 158270 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 158271 | 8, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 158272 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 158273 | 40, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 158274 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 158275 | 7, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 158276 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 158277 | 8, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 158278 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 158279 | 40, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 158280 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 158281 | 0, // ZPR4_with_zsub2_in_ZPR_K:psub1_then_psub |
| 158282 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 158283 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 158284 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 158285 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 158286 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 158287 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 158288 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 158289 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 158290 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 158291 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 158292 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 158293 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 158294 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 158295 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 158296 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 158297 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 158298 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 158299 | 0, // ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 158300 | 0, // ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 158301 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 158302 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 158303 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 158304 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 158305 | 0, // ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 158306 | 75, // ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 158307 | 110, // ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 158308 | 75, // ZPR4_with_zsub2_in_ZPR_K:dsub2_dsub3 -> DD |
| 158309 | 75, // ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 158310 | 117, // ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 158311 | 110, // ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 158312 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 158313 | 0, // ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 158314 | 128, // ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 158315 | 206, // ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 158316 | 128, // ZPR4_with_zsub2_in_ZPR_K:qsub2_qsub3 -> QQ |
| 158317 | 0, // ZPR4_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 158318 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 158319 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 158320 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 158321 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 158322 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158323 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158324 | 0, // ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158325 | 0, // ZPR4_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 158326 | 128, // ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 158327 | 297, // ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 158328 | 206, // ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 158329 | 129, // ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2 |
| 158330 | 238, // ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 158331 | 160, // ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_K |
| 158332 | 234, // ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_K |
| 158333 | 156, // ZPR4_with_zsub2_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K |
| 158334 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 158335 | 0, // ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 158336 | }, |
| 158337 | { // ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 158338 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub -> FPR8 |
| 158339 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub_hi |
| 158340 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub -> FPR64 |
| 158341 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0 |
| 158342 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 158343 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 158344 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 158345 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_hi |
| 158346 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub -> FPR16 |
| 158347 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub_hi |
| 158348 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:psub |
| 158349 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:psub0 |
| 158350 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1 |
| 158351 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0 |
| 158352 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 158353 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 158354 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 158355 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub -> FPR32 |
| 158356 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub_hi |
| 158357 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32 |
| 158358 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_hi |
| 158359 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sube32 |
| 158360 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sube64 |
| 158361 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:subo32 |
| 158362 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64 |
| 158363 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0 |
| 158364 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1 |
| 158365 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2 |
| 158366 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3 |
| 158367 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4 |
| 158368 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5 |
| 158369 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6 |
| 158370 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7 |
| 158371 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubb |
| 158372 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd0 |
| 158373 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1 |
| 158374 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh0 |
| 158375 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1 |
| 158376 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq0 |
| 158377 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq1 |
| 158378 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs0 |
| 158379 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1 |
| 158380 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub -> FPR128 |
| 158381 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 158382 | 96, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1 -> ZPRMul2 |
| 158383 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 158384 | 99, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 158385 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_hi |
| 158386 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 158387 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 158388 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 158389 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 158390 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 158391 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 158392 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 158393 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 158394 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 158395 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 158396 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 158397 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 158398 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 158399 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 158400 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 158401 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 158402 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 158403 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 158404 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 158405 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 158406 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158407 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158408 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 158409 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 158410 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 158411 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 158412 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 158413 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 158414 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 158415 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 158416 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 158417 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 158418 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 158419 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 158420 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 158421 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 158422 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 158423 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 158424 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 158425 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 158426 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1_then_psub |
| 158427 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 158428 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 158429 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 158430 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 158431 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 158432 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 158433 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 158434 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 158435 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 158436 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 158437 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 158438 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 158439 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 158440 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 158441 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 158442 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 158443 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 158444 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 158445 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 158446 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 158447 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 158448 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 158449 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1 |
| 158450 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 158451 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 158452 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 158453 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 158454 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 158455 | 117, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 158456 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 158457 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1 |
| 158458 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 158459 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 158460 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 158461 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 158462 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 158463 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 158464 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 158465 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 158466 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 158467 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158468 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158469 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158470 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 158471 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 158472 | 297, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 158473 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 158474 | 138, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 158475 | 214, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 158476 | 134, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2 |
| 158477 | 235, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 158478 | 157, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 158479 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub2 |
| 158480 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub3 |
| 158481 | }, |
| 158482 | { // ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 158483 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub -> FPR8 |
| 158484 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub_hi |
| 158485 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub -> FPR64 |
| 158486 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0 |
| 158487 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1 -> FPR64 |
| 158488 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2 -> FPR64 |
| 158489 | 65, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 158490 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_hi |
| 158491 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub -> FPR16 |
| 158492 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub_hi |
| 158493 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:psub |
| 158494 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:psub0 |
| 158495 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1 |
| 158496 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0 |
| 158497 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1 -> FPR128 |
| 158498 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2 -> FPR128 |
| 158499 | 94, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 158500 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub -> FPR32 |
| 158501 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub_hi |
| 158502 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32 |
| 158503 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_hi |
| 158504 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sube32 |
| 158505 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sube64 |
| 158506 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:subo32 |
| 158507 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64 |
| 158508 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0 |
| 158509 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1 |
| 158510 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2 |
| 158511 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3 |
| 158512 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4 |
| 158513 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5 |
| 158514 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6 |
| 158515 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7 |
| 158516 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubb |
| 158517 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd0 |
| 158518 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1 |
| 158519 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh0 |
| 158520 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1 |
| 158521 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq0 |
| 158522 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq1 |
| 158523 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs0 |
| 158524 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1 |
| 158525 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub -> FPR128 |
| 158526 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0 -> ZPR |
| 158527 | 96, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1 -> ZPRMul2 |
| 158528 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2 -> ZPR |
| 158529 | 100, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3 -> ZPRMul2_Lo |
| 158530 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_hi |
| 158531 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 158532 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 158533 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 158534 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 158535 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 158536 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 158537 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 158538 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 158539 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 158540 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 158541 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 158542 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 158543 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 158544 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 158545 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 158546 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 158547 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 158548 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 158549 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 158550 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 158551 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158552 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158553 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 158554 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 158555 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16 |
| 158556 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 158557 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32 |
| 158558 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 158559 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 158560 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 158561 | 10, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 158562 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 158563 | 44, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 158564 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 158565 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 158566 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 158567 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16 |
| 158568 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 158569 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32 |
| 158570 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 158571 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1_then_psub |
| 158572 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 158573 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 158574 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 158575 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 158576 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 158577 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 158578 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 158579 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 158580 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 158581 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 158582 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 158583 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 158584 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 158585 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 158586 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 158587 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 158588 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 158589 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 158590 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 158591 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 158592 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 158593 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 158594 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1 |
| 158595 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 158596 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2 -> DD |
| 158597 | 113, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 158598 | 77, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 158599 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1 -> DD |
| 158600 | 121, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 158601 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD |
| 158602 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1 |
| 158603 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 158604 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ |
| 158605 | 209, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub2_in_FPR64_lo |
| 158606 | 132, // ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_dsub1_in_FPR64_lo |
| 158607 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 158608 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 158609 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 158610 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 158611 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 158612 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158613 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158614 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158615 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 158616 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1 -> QQ |
| 158617 | 301, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 158618 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ |
| 158619 | 138, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 158620 | 214, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 158621 | 134, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2 |
| 158622 | 236, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 158623 | 158, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 158624 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub2 |
| 158625 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub3 |
| 158626 | }, |
| 158627 | { // ZPR4_with_zsub3_in_ZPRMul4 |
| 158628 | 7, // ZPR4_with_zsub3_in_ZPRMul4:bsub -> FPR8 |
| 158629 | 0, // ZPR4_with_zsub3_in_ZPRMul4:bsub_hi |
| 158630 | 56, // ZPR4_with_zsub3_in_ZPRMul4:dsub -> FPR64 |
| 158631 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub0 |
| 158632 | 56, // ZPR4_with_zsub3_in_ZPRMul4:dsub1 -> FPR64 |
| 158633 | 56, // ZPR4_with_zsub3_in_ZPRMul4:dsub2 -> FPR64 |
| 158634 | 56, // ZPR4_with_zsub3_in_ZPRMul4:dsub3 -> FPR64 |
| 158635 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub_hi |
| 158636 | 8, // ZPR4_with_zsub3_in_ZPRMul4:hsub -> FPR16 |
| 158637 | 0, // ZPR4_with_zsub3_in_ZPRMul4:hsub_hi |
| 158638 | 0, // ZPR4_with_zsub3_in_ZPRMul4:psub |
| 158639 | 0, // ZPR4_with_zsub3_in_ZPRMul4:psub0 |
| 158640 | 0, // ZPR4_with_zsub3_in_ZPRMul4:psub1 |
| 158641 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub0 |
| 158642 | 92, // ZPR4_with_zsub3_in_ZPRMul4:qsub1 -> FPR128 |
| 158643 | 92, // ZPR4_with_zsub3_in_ZPRMul4:qsub2 -> FPR128 |
| 158644 | 92, // ZPR4_with_zsub3_in_ZPRMul4:qsub3 -> FPR128 |
| 158645 | 40, // ZPR4_with_zsub3_in_ZPRMul4:ssub -> FPR32 |
| 158646 | 0, // ZPR4_with_zsub3_in_ZPRMul4:ssub_hi |
| 158647 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sub_32 |
| 158648 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sub_32_hi |
| 158649 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sube32 |
| 158650 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sube64 |
| 158651 | 0, // ZPR4_with_zsub3_in_ZPRMul4:subo32 |
| 158652 | 0, // ZPR4_with_zsub3_in_ZPRMul4:subo64 |
| 158653 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_0 |
| 158654 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_1 |
| 158655 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_2 |
| 158656 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_3 |
| 158657 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_4 |
| 158658 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_5 |
| 158659 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_6 |
| 158660 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_7 |
| 158661 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubb |
| 158662 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubd0 |
| 158663 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubd1 |
| 158664 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh0 |
| 158665 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1 |
| 158666 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubq0 |
| 158667 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubq1 |
| 158668 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs0 |
| 158669 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1 |
| 158670 | 92, // ZPR4_with_zsub3_in_ZPRMul4:zsub -> FPR128 |
| 158671 | 93, // ZPR4_with_zsub3_in_ZPRMul4:zsub0 -> ZPR |
| 158672 | 96, // ZPR4_with_zsub3_in_ZPRMul4:zsub1 -> ZPRMul2 |
| 158673 | 93, // ZPR4_with_zsub3_in_ZPRMul4:zsub2 -> ZPR |
| 158674 | 101, // ZPR4_with_zsub3_in_ZPRMul4:zsub3 -> ZPRMul4 |
| 158675 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub_hi |
| 158676 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq0 |
| 158677 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq1 |
| 158678 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd0 |
| 158679 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1 |
| 158680 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq0 |
| 158681 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq1 |
| 158682 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 158683 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 158684 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd0 |
| 158685 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1 |
| 158686 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq0 |
| 158687 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq1 |
| 158688 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs0 |
| 158689 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1 |
| 158690 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 158691 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 158692 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 158693 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 158694 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 158695 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 158696 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158697 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158698 | 7, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 158699 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub_hi |
| 158700 | 8, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 158701 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub_hi |
| 158702 | 40, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 158703 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub_hi |
| 158704 | 7, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 158705 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub_hi |
| 158706 | 8, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 158707 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub_hi |
| 158708 | 40, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 158709 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub_hi |
| 158710 | 7, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 158711 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub_hi |
| 158712 | 8, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 158713 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub_hi |
| 158714 | 40, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 158715 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub_hi |
| 158716 | 0, // ZPR4_with_zsub3_in_ZPRMul4:psub1_then_psub |
| 158717 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub1_then_dsub_hi |
| 158718 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub3_then_dsub_hi |
| 158719 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub2_then_dsub_hi |
| 158720 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32 |
| 158721 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 158722 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32 |
| 158723 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 158724 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32 |
| 158725 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 158726 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32 |
| 158727 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 158728 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32 |
| 158729 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 158730 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32 |
| 158731 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 158732 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32 |
| 158733 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 158734 | 0, // ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32 |
| 158735 | 0, // ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32_hi |
| 158736 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub1_then_zsub_hi |
| 158737 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub3_then_zsub_hi |
| 158738 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub2_then_zsub_hi |
| 158739 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1 |
| 158740 | 0, // ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 158741 | 75, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2 -> DD |
| 158742 | 110, // ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 158743 | 75, // ZPR4_with_zsub3_in_ZPRMul4:dsub2_dsub3 -> DD |
| 158744 | 75, // ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1 -> DD |
| 158745 | 117, // ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 158746 | 110, // ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 158747 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1 |
| 158748 | 0, // ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 158749 | 128, // ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 158750 | 206, // ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 158751 | 128, // ZPR4_with_zsub3_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 158752 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 158753 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_0_x8sub_1 |
| 158754 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_x8sub_3 |
| 158755 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_x8sub_5 |
| 158756 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_x8sub_7 |
| 158757 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158758 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158759 | 0, // ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158760 | 0, // ZPR4_with_zsub3_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 158761 | 128, // ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1 -> QQ |
| 158762 | 297, // ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 158763 | 206, // ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 158764 | 138, // ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 158765 | 214, // ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 158766 | 134, // ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2 |
| 158767 | 237, // ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul4 |
| 158768 | 159, // ZPR4_with_zsub3_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 158769 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub2 |
| 158770 | 0, // ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub3 |
| 158771 | }, |
| 158772 | { // ZPR4_with_zsub3_in_ZPR_K |
| 158773 | 7, // ZPR4_with_zsub3_in_ZPR_K:bsub -> FPR8 |
| 158774 | 0, // ZPR4_with_zsub3_in_ZPR_K:bsub_hi |
| 158775 | 56, // ZPR4_with_zsub3_in_ZPR_K:dsub -> FPR64 |
| 158776 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub0 |
| 158777 | 56, // ZPR4_with_zsub3_in_ZPR_K:dsub1 -> FPR64 |
| 158778 | 56, // ZPR4_with_zsub3_in_ZPR_K:dsub2 -> FPR64 |
| 158779 | 56, // ZPR4_with_zsub3_in_ZPR_K:dsub3 -> FPR64 |
| 158780 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub_hi |
| 158781 | 8, // ZPR4_with_zsub3_in_ZPR_K:hsub -> FPR16 |
| 158782 | 0, // ZPR4_with_zsub3_in_ZPR_K:hsub_hi |
| 158783 | 0, // ZPR4_with_zsub3_in_ZPR_K:psub |
| 158784 | 0, // ZPR4_with_zsub3_in_ZPR_K:psub0 |
| 158785 | 0, // ZPR4_with_zsub3_in_ZPR_K:psub1 |
| 158786 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub0 |
| 158787 | 92, // ZPR4_with_zsub3_in_ZPR_K:qsub1 -> FPR128 |
| 158788 | 92, // ZPR4_with_zsub3_in_ZPR_K:qsub2 -> FPR128 |
| 158789 | 92, // ZPR4_with_zsub3_in_ZPR_K:qsub3 -> FPR128 |
| 158790 | 40, // ZPR4_with_zsub3_in_ZPR_K:ssub -> FPR32 |
| 158791 | 0, // ZPR4_with_zsub3_in_ZPR_K:ssub_hi |
| 158792 | 0, // ZPR4_with_zsub3_in_ZPR_K:sub_32 |
| 158793 | 0, // ZPR4_with_zsub3_in_ZPR_K:sub_32_hi |
| 158794 | 0, // ZPR4_with_zsub3_in_ZPR_K:sube32 |
| 158795 | 0, // ZPR4_with_zsub3_in_ZPR_K:sube64 |
| 158796 | 0, // ZPR4_with_zsub3_in_ZPR_K:subo32 |
| 158797 | 0, // ZPR4_with_zsub3_in_ZPR_K:subo64 |
| 158798 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_0 |
| 158799 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_1 |
| 158800 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_2 |
| 158801 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_3 |
| 158802 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_4 |
| 158803 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_5 |
| 158804 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_6 |
| 158805 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_7 |
| 158806 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubb |
| 158807 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubd0 |
| 158808 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubd1 |
| 158809 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh0 |
| 158810 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1 |
| 158811 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubq0 |
| 158812 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubq1 |
| 158813 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs0 |
| 158814 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1 |
| 158815 | 92, // ZPR4_with_zsub3_in_ZPR_K:zsub -> FPR128 |
| 158816 | 93, // ZPR4_with_zsub3_in_ZPR_K:zsub0 -> ZPR |
| 158817 | 93, // ZPR4_with_zsub3_in_ZPR_K:zsub1 -> ZPR |
| 158818 | 93, // ZPR4_with_zsub3_in_ZPR_K:zsub2 -> ZPR |
| 158819 | 103, // ZPR4_with_zsub3_in_ZPR_K:zsub3 -> ZPR_K |
| 158820 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub_hi |
| 158821 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq0 |
| 158822 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq1 |
| 158823 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd0 |
| 158824 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1 |
| 158825 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq0 |
| 158826 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq1 |
| 158827 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 158828 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 158829 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd0 |
| 158830 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1 |
| 158831 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq0 |
| 158832 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq1 |
| 158833 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs0 |
| 158834 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1 |
| 158835 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 158836 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 158837 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 158838 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 158839 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 158840 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 158841 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158842 | 0, // ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158843 | 7, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 158844 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub_hi |
| 158845 | 8, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 158846 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub_hi |
| 158847 | 40, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 158848 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub_hi |
| 158849 | 7, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 158850 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub_hi |
| 158851 | 8, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 158852 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub_hi |
| 158853 | 40, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 158854 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub_hi |
| 158855 | 7, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 158856 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub_hi |
| 158857 | 8, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 158858 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub_hi |
| 158859 | 40, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 158860 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub_hi |
| 158861 | 0, // ZPR4_with_zsub3_in_ZPR_K:psub1_then_psub |
| 158862 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub1_then_dsub_hi |
| 158863 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub3_then_dsub_hi |
| 158864 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub2_then_dsub_hi |
| 158865 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32 |
| 158866 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 158867 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32 |
| 158868 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 158869 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32 |
| 158870 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 158871 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32 |
| 158872 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 158873 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32 |
| 158874 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 158875 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32 |
| 158876 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 158877 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32 |
| 158878 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 158879 | 0, // ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32 |
| 158880 | 0, // ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32_hi |
| 158881 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub1_then_zsub_hi |
| 158882 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub3_then_zsub_hi |
| 158883 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub2_then_zsub_hi |
| 158884 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1 |
| 158885 | 0, // ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1_dsub2 |
| 158886 | 75, // ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2 -> DD |
| 158887 | 110, // ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 158888 | 75, // ZPR4_with_zsub3_in_ZPR_K:dsub2_dsub3 -> DD |
| 158889 | 75, // ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1 -> DD |
| 158890 | 117, // ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 158891 | 110, // ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 158892 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1 |
| 158893 | 0, // ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1_qsub2 |
| 158894 | 128, // ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2 -> QQ |
| 158895 | 206, // ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 158896 | 128, // ZPR4_with_zsub3_in_ZPR_K:qsub2_qsub3 -> QQ |
| 158897 | 0, // ZPR4_with_zsub3_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 158898 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_0_x8sub_1 |
| 158899 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_2_x8sub_3 |
| 158900 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_4_x8sub_5 |
| 158901 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_6_x8sub_7 |
| 158902 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 158903 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 158904 | 0, // ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 158905 | 0, // ZPR4_with_zsub3_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 158906 | 128, // ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1 -> QQ |
| 158907 | 297, // ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 158908 | 206, // ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 158909 | 129, // ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1 -> ZPR2 |
| 158910 | 207, // ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3 |
| 158911 | 129, // ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2 -> ZPR2 |
| 158912 | 238, // ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_K |
| 158913 | 160, // ZPR4_with_zsub3_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPR_K |
| 158914 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub2 |
| 158915 | 0, // ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub3 |
| 158916 | }, |
| 158917 | { // ZPR4_with_zsub_in_FPR128_0to7 |
| 158918 | 7, // ZPR4_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 158919 | 0, // ZPR4_with_zsub_in_FPR128_0to7:bsub_hi |
| 158920 | 65, // ZPR4_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 158921 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub0 |
| 158922 | 65, // ZPR4_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 158923 | 65, // ZPR4_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 158924 | 65, // ZPR4_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 158925 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub_hi |
| 158926 | 10, // ZPR4_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 158927 | 0, // ZPR4_with_zsub_in_FPR128_0to7:hsub_hi |
| 158928 | 0, // ZPR4_with_zsub_in_FPR128_0to7:psub |
| 158929 | 0, // ZPR4_with_zsub_in_FPR128_0to7:psub0 |
| 158930 | 0, // ZPR4_with_zsub_in_FPR128_0to7:psub1 |
| 158931 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub0 |
| 158932 | 94, // ZPR4_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_lo |
| 158933 | 94, // ZPR4_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 158934 | 94, // ZPR4_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 158935 | 44, // ZPR4_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 158936 | 0, // ZPR4_with_zsub_in_FPR128_0to7:ssub_hi |
| 158937 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sub_32 |
| 158938 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sub_32_hi |
| 158939 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sube32 |
| 158940 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sube64 |
| 158941 | 0, // ZPR4_with_zsub_in_FPR128_0to7:subo32 |
| 158942 | 0, // ZPR4_with_zsub_in_FPR128_0to7:subo64 |
| 158943 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_0 |
| 158944 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_1 |
| 158945 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_2 |
| 158946 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_3 |
| 158947 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_4 |
| 158948 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_5 |
| 158949 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_6 |
| 158950 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_7 |
| 158951 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubb |
| 158952 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubd0 |
| 158953 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubd1 |
| 158954 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh0 |
| 158955 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1 |
| 158956 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubq0 |
| 158957 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubq1 |
| 158958 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs0 |
| 158959 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1 |
| 158960 | 98, // ZPR4_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 158961 | 102, // ZPR4_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 158962 | 97, // ZPR4_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_4b |
| 158963 | 97, // ZPR4_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 158964 | 97, // ZPR4_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 158965 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub_hi |
| 158966 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 158967 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 158968 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 158969 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 158970 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 158971 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 158972 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 158973 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 158974 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 158975 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 158976 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 158977 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 158978 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 158979 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 158980 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 158981 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 158982 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 158983 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 158984 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 158985 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 158986 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 158987 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 158988 | 7, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 158989 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 158990 | 10, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 158991 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 158992 | 44, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 158993 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 158994 | 7, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 158995 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 158996 | 10, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 158997 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 158998 | 44, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 158999 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 159000 | 7, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 159001 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 159002 | 10, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 159003 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 159004 | 44, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159005 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 159006 | 0, // ZPR4_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 159007 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 159008 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 159009 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 159010 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 159011 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 159012 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 159013 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 159014 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 159015 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 159016 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 159017 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 159018 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 159019 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 159020 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 159021 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 159022 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 159023 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 159024 | 0, // ZPR4_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 159025 | 0, // ZPR4_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 159026 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 159027 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 159028 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 159029 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 159030 | 0, // ZPR4_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 159031 | 79, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159032 | 116, // ZPR4_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159033 | 79, // ZPR4_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159034 | 79, // ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159035 | 127, // ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159036 | 116, // ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159037 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 159038 | 0, // ZPR4_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 159039 | 140, // ZPR4_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 159040 | 220, // ZPR4_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 159041 | 140, // ZPR4_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 159042 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 159043 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 159044 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 159045 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 159046 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 159047 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159048 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159049 | 0, // ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159050 | 0, // ZPR4_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 159051 | 146, // ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 159052 | 324, // ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 159053 | 222, // ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 159054 | 161, // ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 159055 | 239, // ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 159056 | 141, // ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 159057 | 221, // ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 159058 | 141, // ZPR4_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 159059 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 159060 | 0, // ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 159061 | }, |
| 159062 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 159063 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 159064 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:bsub_hi |
| 159065 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 159066 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0 |
| 159067 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 159068 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 159069 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3 -> FPR64 |
| 159070 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_hi |
| 159071 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 159072 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:hsub_hi |
| 159073 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:psub |
| 159074 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:psub0 |
| 159075 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:psub1 |
| 159076 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0 |
| 159077 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 159078 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 159079 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3 -> FPR128 |
| 159080 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159081 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:ssub_hi |
| 159082 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32 |
| 159083 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_hi |
| 159084 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sube32 |
| 159085 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sube64 |
| 159086 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:subo32 |
| 159087 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:subo64 |
| 159088 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0 |
| 159089 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1 |
| 159090 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2 |
| 159091 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3 |
| 159092 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4 |
| 159093 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5 |
| 159094 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6 |
| 159095 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7 |
| 159096 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubb |
| 159097 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd0 |
| 159098 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1 |
| 159099 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh0 |
| 159100 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1 |
| 159101 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq0 |
| 159102 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq1 |
| 159103 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs0 |
| 159104 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1 |
| 159105 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub -> FPR128_lo |
| 159106 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_4b |
| 159107 | 96, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 159108 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 159109 | 96, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3 -> ZPRMul2 |
| 159110 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_hi |
| 159111 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 159112 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 159113 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 159114 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 159115 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 159116 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 159117 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 159118 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 159119 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 159120 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 159121 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 159122 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 159123 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 159124 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 159125 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 159126 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 159127 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 159128 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 159129 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 159130 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 159131 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159132 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159133 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 159134 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 159135 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 159136 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 159137 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 159138 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 159139 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 159140 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 159141 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub -> FPR16 |
| 159142 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 159143 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub -> FPR32 |
| 159144 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 159145 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 159146 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 159147 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 159148 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 159149 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 159150 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 159151 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 159152 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 159153 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 159154 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 159155 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 159156 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 159157 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 159158 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 159159 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 159160 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 159161 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 159162 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 159163 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 159164 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 159165 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 159166 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 159167 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 159168 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 159169 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 159170 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 159171 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 159172 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 159173 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 159174 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 159175 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 159176 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 159177 | 110, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD |
| 159178 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_dsub3 -> DD |
| 159179 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 159180 | 118, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 159181 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 159182 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 159183 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 159184 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 159185 | 206, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ |
| 159186 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_qsub3 -> QQ |
| 159187 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 159188 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 159189 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 159190 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 159191 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 159192 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159193 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159194 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159195 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 159196 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 159197 | 302, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 159198 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 159199 | 162, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 159200 | 240, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 159201 | 134, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 159202 | 213, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 159203 | 138, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 159204 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 159205 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 159206 | }, |
| 159207 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 159208 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 159209 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 159210 | 56, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 159211 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 159212 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 159213 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 159214 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 159215 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 159216 | 8, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 159217 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 159218 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:psub |
| 159219 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 159220 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 159221 | 92, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128 |
| 159222 | 98, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 159223 | 98, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 159224 | 94, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 159225 | 40, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 159226 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 159227 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 159228 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 159229 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 159230 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 159231 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 159232 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 159233 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 159234 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 159235 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 159236 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 159237 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 159238 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 159239 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 159240 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 159241 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 159242 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 159243 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 159244 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 159245 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 159246 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 159247 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 159248 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 159249 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 159250 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub |
| 159251 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 159252 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 159253 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 159254 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 159255 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 159256 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 159257 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 159258 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 159259 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 159260 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 159261 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 159262 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 159263 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 159264 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 159265 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 159266 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 159267 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 159268 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 159269 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 159270 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 159271 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 159272 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 159273 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 159274 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 159275 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 159276 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159277 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159278 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 159279 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 159280 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 159281 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 159282 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159283 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 159284 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 159285 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 159286 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 159287 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 159288 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159289 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 159290 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 159291 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 159292 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 159293 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 159294 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159295 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 159296 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 159297 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 159298 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 159299 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 159300 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 159301 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 159302 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 159303 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 159304 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 159305 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 159306 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 159307 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 159308 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 159309 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 159310 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 159311 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 159312 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 159313 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 159314 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 159315 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 159316 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 159317 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 159318 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 159319 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 159320 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 159321 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159322 | 116, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159323 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159324 | 77, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 159325 | 126, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159326 | 115, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159327 | 147, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 159328 | 241, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 159329 | 163, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 159330 | 242, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 159331 | 146, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 159332 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 159333 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 159334 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 159335 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 159336 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 159337 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159338 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159339 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159340 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 159341 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 159342 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 159343 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 159344 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 159345 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 159346 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 159347 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 159348 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 159349 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 159350 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 159351 | }, |
| 159352 | { // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 159353 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 159354 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub_hi |
| 159355 | 56, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 159356 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0 |
| 159357 | 56, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64 |
| 159358 | 65, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 159359 | 65, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 159360 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_hi |
| 159361 | 8, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 159362 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub_hi |
| 159363 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub |
| 159364 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub0 |
| 159365 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1 |
| 159366 | 92, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0 -> FPR128 |
| 159367 | 92, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128 |
| 159368 | 98, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 159369 | 98, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 159370 | 40, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 159371 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub_hi |
| 159372 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32 |
| 159373 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 159374 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sube32 |
| 159375 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sube64 |
| 159376 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo32 |
| 159377 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64 |
| 159378 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 159379 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 159380 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 159381 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 159382 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 159383 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 159384 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 159385 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 159386 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubb |
| 159387 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd0 |
| 159388 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1 |
| 159389 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh0 |
| 159390 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1 |
| 159391 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq0 |
| 159392 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq1 |
| 159393 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs0 |
| 159394 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1 |
| 159395 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub |
| 159396 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0 |
| 159397 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1 |
| 159398 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2 |
| 159399 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3 |
| 159400 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_hi |
| 159401 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 159402 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 159403 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 159404 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 159405 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 159406 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 159407 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 159408 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 159409 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 159410 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 159411 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 159412 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 159413 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 159414 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 159415 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 159416 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 159417 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 159418 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 159419 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 159420 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 159421 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159422 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159423 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 159424 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 159425 | 8, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 159426 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 159427 | 40, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 159428 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 159429 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 159430 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 159431 | 10, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 159432 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 159433 | 44, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159434 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 159435 | 7, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 159436 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 159437 | 10, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 159438 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 159439 | 44, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159440 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 159441 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 159442 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 159443 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 159444 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 159445 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 159446 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 159447 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 159448 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 159449 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 159450 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 159451 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 159452 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 159453 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 159454 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 159455 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 159456 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 159457 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 159458 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 159459 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 159460 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 159461 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 159462 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 159463 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 159464 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 159465 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 159466 | 77, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 159467 | 115, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159468 | 79, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159469 | 75, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD |
| 159470 | 124, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159471 | 113, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 159472 | 128, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1 -> QQ |
| 159473 | 224, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 159474 | 147, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 159475 | 241, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 159476 | 163, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 159477 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 159478 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 159479 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 159480 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 159481 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 159482 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159483 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159484 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159485 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 159486 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1 |
| 159487 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 159488 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 159489 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1 |
| 159490 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 159491 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2 |
| 159492 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 159493 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_zsub3 |
| 159494 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 159495 | 0, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 159496 | }, |
| 159497 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 159498 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 159499 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:bsub_hi |
| 159500 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 159501 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub0 |
| 159502 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 159503 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 159504 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 159505 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub_hi |
| 159506 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 159507 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:hsub_hi |
| 159508 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:psub |
| 159509 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:psub0 |
| 159510 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:psub1 |
| 159511 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 159512 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 159513 | 94, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 159514 | 94, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 159515 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159516 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:ssub_hi |
| 159517 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sub_32 |
| 159518 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 159519 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sube32 |
| 159520 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sube64 |
| 159521 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:subo32 |
| 159522 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:subo64 |
| 159523 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 159524 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 159525 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 159526 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 159527 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 159528 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 159529 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 159530 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 159531 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubb |
| 159532 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubd0 |
| 159533 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubd1 |
| 159534 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh0 |
| 159535 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1 |
| 159536 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubq0 |
| 159537 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubq1 |
| 159538 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs0 |
| 159539 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1 |
| 159540 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub |
| 159541 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub0 |
| 159542 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub1 |
| 159543 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub2 |
| 159544 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub3 |
| 159545 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub_hi |
| 159546 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 159547 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 159548 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 159549 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 159550 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 159551 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 159552 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 159553 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 159554 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 159555 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 159556 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 159557 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 159558 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 159559 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 159560 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 159561 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 159562 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 159563 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 159564 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 159565 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 159566 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159567 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159568 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 159569 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 159570 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 159571 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 159572 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159573 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 159574 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 159575 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 159576 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 159577 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 159578 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159579 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 159580 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 159581 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 159582 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 159583 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 159584 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159585 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 159586 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 159587 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 159588 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 159589 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 159590 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 159591 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 159592 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 159593 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 159594 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 159595 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 159596 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 159597 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 159598 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 159599 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 159600 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 159601 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 159602 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 159603 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 159604 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 159605 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 159606 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 159607 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 159608 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 159609 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 159610 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 159611 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159612 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159613 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159614 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159615 | 127, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159616 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159617 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 159618 | 242, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 159619 | 146, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 159620 | 222, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 159621 | 140, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 159622 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 159623 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 159624 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 159625 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 159626 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 159627 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159628 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159629 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159630 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 159631 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1 |
| 159632 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 159633 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 159634 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1 |
| 159635 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 159636 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2 |
| 159637 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 159638 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub2_zsub3 |
| 159639 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 159640 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 159641 | }, |
| 159642 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 159643 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 159644 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:bsub_hi |
| 159645 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub -> FPR64 |
| 159646 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0 |
| 159647 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 159648 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 159649 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 159650 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_hi |
| 159651 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:hsub -> FPR16 |
| 159652 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:hsub_hi |
| 159653 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:psub |
| 159654 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:psub0 |
| 159655 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:psub1 |
| 159656 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0 |
| 159657 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 159658 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 159659 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 159660 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:ssub -> FPR32 |
| 159661 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:ssub_hi |
| 159662 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32 |
| 159663 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 159664 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sube32 |
| 159665 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sube64 |
| 159666 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:subo32 |
| 159667 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64 |
| 159668 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 159669 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 159670 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 159671 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 159672 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 159673 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 159674 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 159675 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 159676 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubb |
| 159677 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd0 |
| 159678 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1 |
| 159679 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh0 |
| 159680 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1 |
| 159681 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubq0 |
| 159682 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubq1 |
| 159683 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs0 |
| 159684 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1 |
| 159685 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub -> FPR128 |
| 159686 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR |
| 159687 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 159688 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 159689 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 159690 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_hi |
| 159691 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 159692 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 159693 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 159694 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 159695 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 159696 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 159697 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 159698 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 159699 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 159700 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 159701 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 159702 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 159703 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 159704 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 159705 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 159706 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 159707 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 159708 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 159709 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 159710 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 159711 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159712 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159713 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 159714 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 159715 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 159716 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 159717 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159718 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 159719 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 159720 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 159721 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 159722 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 159723 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159724 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 159725 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 159726 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 159727 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 159728 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 159729 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159730 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 159731 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 159732 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 159733 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 159734 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 159735 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 159736 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 159737 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 159738 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 159739 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 159740 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 159741 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 159742 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 159743 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 159744 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 159745 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 159746 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 159747 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 159748 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 159749 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 159750 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 159751 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 159752 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 159753 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 159754 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 159755 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 159756 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159757 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159758 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159759 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 159760 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159761 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159762 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 159763 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 159764 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 159765 | 242, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 159766 | 146, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 159767 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 159768 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 159769 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 159770 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 159771 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 159772 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159773 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159774 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159775 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 159776 | 147, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 159777 | 351, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 159778 | 241, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 159779 | 154, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 159780 | 243, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 159781 | 164, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 159782 | 245, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 159783 | 161, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 159784 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 159785 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 159786 | }, |
| 159787 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 159788 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub -> FPR8 |
| 159789 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub_hi |
| 159790 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub -> FPR64 |
| 159791 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0 |
| 159792 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 159793 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 159794 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 159795 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_hi |
| 159796 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub -> FPR16 |
| 159797 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub_hi |
| 159798 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub |
| 159799 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub0 |
| 159800 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1 |
| 159801 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0 |
| 159802 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 159803 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 159804 | 94, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 159805 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub -> FPR32 |
| 159806 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub_hi |
| 159807 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32 |
| 159808 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_hi |
| 159809 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sube32 |
| 159810 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sube64 |
| 159811 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo32 |
| 159812 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64 |
| 159813 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0 |
| 159814 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1 |
| 159815 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2 |
| 159816 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3 |
| 159817 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4 |
| 159818 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5 |
| 159819 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6 |
| 159820 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7 |
| 159821 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubb |
| 159822 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd0 |
| 159823 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1 |
| 159824 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh0 |
| 159825 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1 |
| 159826 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq0 |
| 159827 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq1 |
| 159828 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs0 |
| 159829 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1 |
| 159830 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub -> FPR128 |
| 159831 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0 -> ZPR |
| 159832 | 100, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 159833 | 97, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 159834 | 100, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3 -> ZPRMul2_Lo |
| 159835 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_hi |
| 159836 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 159837 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 159838 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 159839 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 159840 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 159841 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 159842 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 159843 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 159844 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 159845 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 159846 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 159847 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 159848 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 159849 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 159850 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 159851 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 159852 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 159853 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 159854 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 159855 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 159856 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 159857 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 159858 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 159859 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 159860 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 159861 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 159862 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159863 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 159864 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 159865 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 159866 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 159867 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 159868 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159869 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 159870 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 159871 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 159872 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 159873 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 159874 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 159875 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 159876 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1_then_psub |
| 159877 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 159878 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 159879 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 159880 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 159881 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 159882 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 159883 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 159884 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 159885 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 159886 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 159887 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 159888 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 159889 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 159890 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 159891 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 159892 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 159893 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 159894 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 159895 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 159896 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 159897 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 159898 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 159899 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1 |
| 159900 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 159901 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159902 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159903 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 159904 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 159905 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 159906 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 159907 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1 |
| 159908 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 159909 | 140, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 159910 | 220, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 159911 | 140, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 159912 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 159913 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 159914 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 159915 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 159916 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 159917 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 159918 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 159919 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 159920 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 159921 | 132, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 159922 | 316, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 159923 | 216, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 159924 | 158, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 159925 | 232, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 159926 | 149, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 159927 | 247, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 159928 | 165, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 159929 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub2 |
| 159930 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub3 |
| 159931 | }, |
| 159932 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 159933 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 159934 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub_hi |
| 159935 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 159936 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0 |
| 159937 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64 |
| 159938 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 159939 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 159940 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_hi |
| 159941 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 159942 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub_hi |
| 159943 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub |
| 159944 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub0 |
| 159945 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1 |
| 159946 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0 |
| 159947 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128 |
| 159948 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 159949 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 159950 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 159951 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub_hi |
| 159952 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32 |
| 159953 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 159954 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sube32 |
| 159955 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sube64 |
| 159956 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo32 |
| 159957 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64 |
| 159958 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 159959 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 159960 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 159961 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 159962 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 159963 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 159964 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 159965 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 159966 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubb |
| 159967 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd0 |
| 159968 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1 |
| 159969 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh0 |
| 159970 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1 |
| 159971 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq0 |
| 159972 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq1 |
| 159973 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs0 |
| 159974 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1 |
| 159975 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub -> FPR128 |
| 159976 | 93, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0 -> ZPR |
| 159977 | 93, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1 -> ZPR |
| 159978 | 102, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 159979 | 102, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 159980 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_hi |
| 159981 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 159982 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 159983 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 159984 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 159985 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 159986 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 159987 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 159988 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 159989 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 159990 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 159991 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 159992 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 159993 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 159994 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 159995 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 159996 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 159997 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 159998 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 159999 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 160000 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 160001 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160002 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160003 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 160004 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 160005 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 160006 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 160007 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 160008 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 160009 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 160010 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 160011 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 160012 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 160013 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160014 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 160015 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 160016 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 160017 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 160018 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 160019 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160020 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 160021 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 160022 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 160023 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 160024 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 160025 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 160026 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 160027 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 160028 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 160029 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 160030 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 160031 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 160032 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 160033 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 160034 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 160035 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 160036 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 160037 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 160038 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 160039 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 160040 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 160041 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 160042 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 160043 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 160044 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 160045 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 160046 | 77, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 160047 | 115, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160048 | 79, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160049 | 75, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD |
| 160050 | 124, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 160051 | 113, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 160052 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1 |
| 160053 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 160054 | 147, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 160055 | 241, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 160056 | 163, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 160057 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 160058 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 160059 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 160060 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 160061 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 160062 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160063 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160064 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160065 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 160066 | 128, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1 -> QQ |
| 160067 | 352, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 160068 | 224, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 160069 | 129, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1 -> ZPR2 |
| 160070 | 226, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 160071 | 154, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 160072 | 243, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 160073 | 164, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 160074 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 160075 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 160076 | }, |
| 160077 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 160078 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 160079 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 160080 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64 |
| 160081 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 160082 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 160083 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 160084 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 160085 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 160086 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16 |
| 160087 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 160088 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub |
| 160089 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 160090 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 160091 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 160092 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 160093 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 160094 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 160095 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32 |
| 160096 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 160097 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 160098 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 160099 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 160100 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 160101 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 160102 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 160103 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 160104 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 160105 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 160106 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 160107 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 160108 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 160109 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 160110 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 160111 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 160112 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 160113 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 160114 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 160115 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 160116 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 160117 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 160118 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 160119 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 160120 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128 |
| 160121 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 160122 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 160123 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 160124 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3 -> ZPR |
| 160125 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 160126 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 160127 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 160128 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 160129 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 160130 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 160131 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 160132 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 160133 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 160134 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 160135 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 160136 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 160137 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 160138 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 160139 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 160140 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 160141 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 160142 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 160143 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 160144 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 160145 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 160146 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160147 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160148 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 160149 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 160150 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 160151 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 160152 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 160153 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 160154 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 160155 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 160156 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 160157 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 160158 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 160159 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 160160 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 160161 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 160162 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 160163 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 160164 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 160165 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 160166 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 160167 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 160168 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 160169 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 160170 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 160171 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 160172 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 160173 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 160174 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 160175 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 160176 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 160177 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 160178 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 160179 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 160180 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 160181 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 160182 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 160183 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 160184 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 160185 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 160186 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 160187 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 160188 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 160189 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 160190 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 160191 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 160192 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 160193 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 160194 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 160195 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 160196 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 160197 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 160198 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 160199 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 160200 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 160201 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 160202 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 160203 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 160204 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 160205 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 160206 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 160207 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160208 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160209 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160210 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 160211 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 160212 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 160213 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 160214 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 160215 | 244, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 160216 | 157, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 160217 | 231, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 160218 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 160219 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 160220 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 160221 | }, |
| 160222 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 160223 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 160224 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 160225 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64 |
| 160226 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 160227 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 160228 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 160229 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 160230 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 160231 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16 |
| 160232 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 160233 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub |
| 160234 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 160235 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 160236 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 160237 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 160238 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 160239 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 160240 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32 |
| 160241 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 160242 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 160243 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 160244 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 160245 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 160246 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 160247 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 160248 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 160249 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 160250 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 160251 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 160252 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 160253 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 160254 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 160255 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 160256 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 160257 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 160258 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 160259 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 160260 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 160261 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 160262 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 160263 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 160264 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 160265 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128 |
| 160266 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 160267 | 99, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 160268 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 160269 | 99, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 160270 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 160271 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 160272 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 160273 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 160274 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 160275 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 160276 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 160277 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 160278 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 160279 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 160280 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 160281 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 160282 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 160283 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 160284 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 160285 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 160286 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 160287 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 160288 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 160289 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 160290 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 160291 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160292 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160293 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 160294 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 160295 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 160296 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 160297 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 160298 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 160299 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 160300 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 160301 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 160302 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 160303 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 160304 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 160305 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 160306 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 160307 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 160308 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 160309 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 160310 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 160311 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 160312 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 160313 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 160314 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 160315 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 160316 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 160317 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 160318 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 160319 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 160320 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 160321 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 160322 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 160323 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 160324 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 160325 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 160326 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 160327 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 160328 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 160329 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 160330 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 160331 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 160332 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 160333 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 160334 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 160335 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 160336 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 160337 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 160338 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 160339 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 160340 | 117, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 160341 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 160342 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 160343 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 160344 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 160345 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 160346 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 160347 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 160348 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 160349 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 160350 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 160351 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 160352 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160353 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160354 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160355 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 160356 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 160357 | 297, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 160358 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 160359 | 157, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 160360 | 231, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 160361 | 148, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 160362 | 244, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 160363 | 157, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 160364 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 160365 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 160366 | }, |
| 160367 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 160368 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:bsub -> FPR8 |
| 160369 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:bsub_hi |
| 160370 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub -> FPR64_lo |
| 160371 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub0 |
| 160372 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 160373 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 160374 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 160375 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub_hi |
| 160376 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:hsub -> FPR16_lo |
| 160377 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:hsub_hi |
| 160378 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:psub |
| 160379 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:psub0 |
| 160380 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:psub1 |
| 160381 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub0 |
| 160382 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 160383 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 160384 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 160385 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160386 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:ssub_hi |
| 160387 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sub_32 |
| 160388 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sub_32_hi |
| 160389 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sube32 |
| 160390 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sube64 |
| 160391 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:subo32 |
| 160392 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:subo64 |
| 160393 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_0 |
| 160394 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1 |
| 160395 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2 |
| 160396 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3 |
| 160397 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4 |
| 160398 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5 |
| 160399 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6 |
| 160400 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7 |
| 160401 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubb |
| 160402 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubd0 |
| 160403 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubd1 |
| 160404 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh0 |
| 160405 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1 |
| 160406 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubq0 |
| 160407 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubq1 |
| 160408 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs0 |
| 160409 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1 |
| 160410 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 160411 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 160412 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 160413 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 160414 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 160415 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub_hi |
| 160416 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 160417 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 160418 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 160419 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 160420 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 160421 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 160422 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 160423 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 160424 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 160425 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 160426 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 160427 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 160428 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 160429 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 160430 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 160431 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 160432 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 160433 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 160434 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 160435 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 160436 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160437 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160438 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 160439 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_bsub_hi |
| 160440 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 160441 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_hsub_hi |
| 160442 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160443 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_then_ssub_hi |
| 160444 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 160445 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_bsub_hi |
| 160446 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 160447 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_hsub_hi |
| 160448 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160449 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub3_then_ssub_hi |
| 160450 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 160451 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_bsub_hi |
| 160452 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 160453 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_hsub_hi |
| 160454 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160455 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_then_ssub_hi |
| 160456 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:psub1_then_psub |
| 160457 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub1_then_dsub_hi |
| 160458 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub3_then_dsub_hi |
| 160459 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub2_then_dsub_hi |
| 160460 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 160461 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 160462 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 160463 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 160464 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 160465 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 160466 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 160467 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 160468 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 160469 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 160470 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 160471 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 160472 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 160473 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 160474 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:subo64_then_sub_32 |
| 160475 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:subo64_then_sub_32_hi |
| 160476 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub1_then_zsub_hi |
| 160477 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub3_then_zsub_hi |
| 160478 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub2_then_zsub_hi |
| 160479 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub0_dsub1 |
| 160480 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 160481 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160482 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160483 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160484 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160485 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 160486 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160487 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub0_qsub1 |
| 160488 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 160489 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 160490 | 222, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 160491 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160492 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 160493 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 160494 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 160495 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 160496 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 160497 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160498 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160499 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160500 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 160501 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 160502 | 353, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 160503 | 242, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 160504 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 160505 | 245, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 160506 | 161, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 160507 | 239, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7 |
| 160508 | 141, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 160509 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub0_zsub2 |
| 160510 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7:zsub1_zsub3 |
| 160511 | }, |
| 160512 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 160513 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:bsub -> FPR8 |
| 160514 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:bsub_hi |
| 160515 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 160516 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0 |
| 160517 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 160518 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 160519 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3 -> FPR64 |
| 160520 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_hi |
| 160521 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 160522 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:hsub_hi |
| 160523 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:psub |
| 160524 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:psub0 |
| 160525 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:psub1 |
| 160526 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0 |
| 160527 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 160528 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 160529 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub3 -> FPR128 |
| 160530 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160531 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:ssub_hi |
| 160532 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32 |
| 160533 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_hi |
| 160534 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sube32 |
| 160535 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sube64 |
| 160536 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:subo32 |
| 160537 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64 |
| 160538 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_0 |
| 160539 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1 |
| 160540 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2 |
| 160541 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3 |
| 160542 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4 |
| 160543 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5 |
| 160544 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6 |
| 160545 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7 |
| 160546 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubb |
| 160547 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd0 |
| 160548 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1 |
| 160549 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh0 |
| 160550 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1 |
| 160551 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubq0 |
| 160552 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubq1 |
| 160553 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs0 |
| 160554 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1 |
| 160555 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 160556 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0 -> ZPR_4b |
| 160557 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 160558 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 160559 | 96, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub3 -> ZPRMul2 |
| 160560 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_hi |
| 160561 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 160562 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 160563 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 160564 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 160565 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 160566 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 160567 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 160568 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 160569 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 160570 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 160571 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 160572 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 160573 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 160574 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 160575 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 160576 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 160577 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 160578 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 160579 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 160580 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 160581 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160582 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160583 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 160584 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 160585 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 160586 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 160587 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160588 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 160589 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 160590 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 160591 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16 |
| 160592 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 160593 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32 |
| 160594 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 160595 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 160596 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 160597 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 160598 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 160599 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160600 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 160601 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:psub1_then_psub |
| 160602 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 160603 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 160604 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 160605 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 160606 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 160607 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 160608 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 160609 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 160610 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 160611 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 160612 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 160613 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 160614 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 160615 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 160616 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 160617 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 160618 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 160619 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 160620 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 160621 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 160622 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 160623 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 160624 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1 |
| 160625 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 160626 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160627 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 160628 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 160629 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160630 | 125, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 160631 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160632 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1 |
| 160633 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 160634 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160635 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 160636 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 160637 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 160638 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 160639 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 160640 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 160641 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 160642 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160643 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160644 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160645 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 160646 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160647 | 317, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 160648 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 160649 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 160650 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 160651 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 160652 | 230, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 160653 | 162, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 160654 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub0_zsub2 |
| 160655 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo:zsub1_zsub3 |
| 160656 | }, |
| 160657 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 160658 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:bsub -> FPR8 |
| 160659 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:bsub_hi |
| 160660 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 160661 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0 |
| 160662 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 160663 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 160664 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 160665 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_hi |
| 160666 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 160667 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:hsub_hi |
| 160668 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:psub |
| 160669 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:psub0 |
| 160670 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:psub1 |
| 160671 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0 |
| 160672 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 160673 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 160674 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 160675 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160676 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:ssub_hi |
| 160677 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32 |
| 160678 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_hi |
| 160679 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sube32 |
| 160680 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sube64 |
| 160681 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:subo32 |
| 160682 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64 |
| 160683 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_0 |
| 160684 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1 |
| 160685 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2 |
| 160686 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3 |
| 160687 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4 |
| 160688 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5 |
| 160689 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6 |
| 160690 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7 |
| 160691 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubb |
| 160692 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd0 |
| 160693 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1 |
| 160694 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh0 |
| 160695 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1 |
| 160696 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubq0 |
| 160697 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubq1 |
| 160698 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs0 |
| 160699 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1 |
| 160700 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 160701 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_Lo |
| 160702 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1 -> ZPR_4b |
| 160703 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 160704 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub3 -> ZPR_4b |
| 160705 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_hi |
| 160706 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 160707 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 160708 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 160709 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 160710 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 160711 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 160712 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 160713 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 160714 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 160715 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 160716 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 160717 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 160718 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 160719 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 160720 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 160721 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 160722 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 160723 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 160724 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 160725 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 160726 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160727 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160728 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 160729 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 160730 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 160731 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 160732 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160733 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 160734 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 160735 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 160736 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 160737 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 160738 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160739 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 160740 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 160741 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 160742 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 160743 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 160744 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160745 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 160746 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:psub1_then_psub |
| 160747 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 160748 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 160749 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 160750 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 160751 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 160752 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 160753 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 160754 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 160755 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 160756 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 160757 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 160758 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 160759 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 160760 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 160761 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 160762 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 160763 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 160764 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 160765 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 160766 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 160767 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 160768 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 160769 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1 |
| 160770 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 160771 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160772 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160773 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160774 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160775 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 160776 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160777 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1 |
| 160778 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 160779 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160780 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 160781 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160782 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 160783 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 160784 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 160785 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 160786 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 160787 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160788 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160789 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160790 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 160791 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 160792 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 160793 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 160794 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 160795 | 247, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 160796 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 160797 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 160798 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 160799 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub0_zsub2 |
| 160800 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo:zsub1_zsub3 |
| 160801 | }, |
| 160802 | { // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 160803 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 160804 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub_hi |
| 160805 | 56, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 160806 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0 |
| 160807 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 160808 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 160809 | 65, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 160810 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_hi |
| 160811 | 8, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 160812 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub_hi |
| 160813 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub |
| 160814 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub0 |
| 160815 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1 |
| 160816 | 92, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0 -> FPR128 |
| 160817 | 98, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 160818 | 98, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 160819 | 98, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 160820 | 40, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 160821 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub_hi |
| 160822 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32 |
| 160823 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 160824 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sube32 |
| 160825 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sube64 |
| 160826 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo32 |
| 160827 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64 |
| 160828 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 160829 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 160830 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 160831 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 160832 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 160833 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 160834 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 160835 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 160836 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubb |
| 160837 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd0 |
| 160838 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1 |
| 160839 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh0 |
| 160840 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1 |
| 160841 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq0 |
| 160842 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq1 |
| 160843 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs0 |
| 160844 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1 |
| 160845 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub |
| 160846 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0 |
| 160847 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1 |
| 160848 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2 |
| 160849 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3 |
| 160850 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_hi |
| 160851 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 160852 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 160853 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 160854 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 160855 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 160856 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 160857 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 160858 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 160859 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 160860 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 160861 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 160862 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 160863 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 160864 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 160865 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 160866 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 160867 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 160868 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 160869 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 160870 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 160871 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 160872 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 160873 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 160874 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 160875 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 160876 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 160877 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160878 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 160879 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 160880 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 160881 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 160882 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 160883 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160884 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 160885 | 7, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 160886 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 160887 | 10, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 160888 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 160889 | 44, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160890 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 160891 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 160892 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 160893 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 160894 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 160895 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 160896 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 160897 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 160898 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 160899 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 160900 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 160901 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 160902 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 160903 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 160904 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 160905 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 160906 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 160907 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 160908 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 160909 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 160910 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 160911 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 160912 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 160913 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 160914 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 160915 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 160916 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160917 | 116, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160918 | 79, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 160919 | 77, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 160920 | 126, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 160921 | 115, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 160922 | 147, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 160923 | 241, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 160924 | 163, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 160925 | 248, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 160926 | 163, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 160927 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 160928 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 160929 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 160930 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 160931 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 160932 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 160933 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 160934 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 160935 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 160936 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1 |
| 160937 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 160938 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 160939 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1 |
| 160940 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 160941 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2 |
| 160942 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 160943 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_zsub3 |
| 160944 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 160945 | 0, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 160946 | }, |
| 160947 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 160948 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 160949 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:bsub_hi |
| 160950 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub -> FPR64_lo |
| 160951 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0 |
| 160952 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 160953 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 160954 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 160955 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_hi |
| 160956 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:hsub -> FPR16_lo |
| 160957 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:hsub_hi |
| 160958 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:psub |
| 160959 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:psub0 |
| 160960 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:psub1 |
| 160961 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 160962 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 160963 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 160964 | 94, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 160965 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 160966 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:ssub_hi |
| 160967 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32 |
| 160968 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 160969 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sube32 |
| 160970 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sube64 |
| 160971 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:subo32 |
| 160972 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64 |
| 160973 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 160974 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 160975 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 160976 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 160977 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 160978 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 160979 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 160980 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 160981 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubb |
| 160982 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd0 |
| 160983 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1 |
| 160984 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh0 |
| 160985 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1 |
| 160986 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubq0 |
| 160987 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubq1 |
| 160988 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs0 |
| 160989 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1 |
| 160990 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub |
| 160991 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0 |
| 160992 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1 |
| 160993 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2 |
| 160994 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub3 |
| 160995 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_hi |
| 160996 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 160997 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 160998 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 160999 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 161000 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 161001 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 161002 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 161003 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 161004 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 161005 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 161006 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 161007 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 161008 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 161009 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 161010 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 161011 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 161012 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 161013 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 161014 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 161015 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 161016 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161017 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161018 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 161019 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 161020 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 161021 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 161022 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161023 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 161024 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 161025 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 161026 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 161027 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 161028 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161029 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 161030 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 161031 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 161032 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 161033 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 161034 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161035 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 161036 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 161037 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 161038 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 161039 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 161040 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 161041 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 161042 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 161043 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 161044 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 161045 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 161046 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 161047 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 161048 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 161049 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 161050 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 161051 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 161052 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 161053 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 161054 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 161055 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 161056 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 161057 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 161058 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 161059 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 161060 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 161061 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161062 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161063 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161064 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161065 | 127, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 161066 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161067 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161068 | 248, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 161069 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161070 | 242, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 161071 | 146, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 161072 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 161073 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 161074 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 161075 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 161076 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 161077 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161078 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161079 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161080 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 161081 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1 |
| 161082 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 161083 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 161084 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1 |
| 161085 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 161086 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2 |
| 161087 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 161088 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub2_zsub3 |
| 161089 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 161090 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 161091 | }, |
| 161092 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 161093 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:bsub -> FPR8 |
| 161094 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:bsub_hi |
| 161095 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub -> FPR64 |
| 161096 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0 |
| 161097 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 161098 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 161099 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 161100 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_hi |
| 161101 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:hsub -> FPR16 |
| 161102 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:hsub_hi |
| 161103 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub |
| 161104 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub0 |
| 161105 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub1 |
| 161106 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0 |
| 161107 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 161108 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 161109 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 161110 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:ssub -> FPR32 |
| 161111 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:ssub_hi |
| 161112 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32 |
| 161113 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_hi |
| 161114 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sube32 |
| 161115 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sube64 |
| 161116 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo32 |
| 161117 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64 |
| 161118 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_0 |
| 161119 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1 |
| 161120 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2 |
| 161121 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3 |
| 161122 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4 |
| 161123 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5 |
| 161124 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6 |
| 161125 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7 |
| 161126 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubb |
| 161127 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd0 |
| 161128 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1 |
| 161129 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh0 |
| 161130 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1 |
| 161131 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubq0 |
| 161132 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubq1 |
| 161133 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs0 |
| 161134 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1 |
| 161135 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub -> FPR128 |
| 161136 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 161137 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1 -> ZPR |
| 161138 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 161139 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub3 -> ZPR |
| 161140 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_hi |
| 161141 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 161142 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 161143 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 161144 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 161145 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 161146 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 161147 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 161148 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 161149 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 161150 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 161151 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 161152 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 161153 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 161154 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 161155 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 161156 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 161157 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 161158 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 161159 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 161160 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 161161 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161162 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161163 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 161164 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 161165 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 161166 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 161167 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 161168 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 161169 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 161170 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 161171 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 161172 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 161173 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 161174 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 161175 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 161176 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 161177 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 161178 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 161179 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 161180 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 161181 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:psub1_then_psub |
| 161182 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 161183 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 161184 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 161185 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 161186 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 161187 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 161188 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 161189 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 161190 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 161191 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 161192 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 161193 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 161194 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 161195 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 161196 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 161197 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 161198 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 161199 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 161200 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 161201 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 161202 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 161203 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 161204 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1 |
| 161205 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 161206 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 161207 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 161208 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 161209 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 161210 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 161211 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 161212 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1 |
| 161213 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 161214 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 161215 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 161216 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 161217 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 161218 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 161219 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 161220 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 161221 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 161222 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161223 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161224 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161225 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 161226 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 161227 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 161228 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 161229 | 170, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 161230 | 254, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 161231 | 157, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 161232 | 231, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 161233 | 148, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 161234 | 175, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 161235 | 192, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 161236 | }, |
| 161237 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 161238 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:bsub -> FPR8 |
| 161239 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:bsub_hi |
| 161240 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 161241 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0 |
| 161242 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 161243 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 161244 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 161245 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_hi |
| 161246 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 161247 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:hsub_hi |
| 161248 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub |
| 161249 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub0 |
| 161250 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub1 |
| 161251 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0 |
| 161252 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 161253 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 161254 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 161255 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161256 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:ssub_hi |
| 161257 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32 |
| 161258 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_hi |
| 161259 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sube32 |
| 161260 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sube64 |
| 161261 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo32 |
| 161262 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64 |
| 161263 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_0 |
| 161264 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1 |
| 161265 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2 |
| 161266 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3 |
| 161267 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4 |
| 161268 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5 |
| 161269 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6 |
| 161270 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7 |
| 161271 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubb |
| 161272 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd0 |
| 161273 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1 |
| 161274 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh0 |
| 161275 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1 |
| 161276 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubq0 |
| 161277 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubq1 |
| 161278 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs0 |
| 161279 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1 |
| 161280 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 161281 | 100, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_Lo |
| 161282 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1 -> ZPR_4b |
| 161283 | 100, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 161284 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub3 -> ZPR_4b |
| 161285 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_hi |
| 161286 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 161287 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 161288 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 161289 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 161290 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 161291 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 161292 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 161293 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 161294 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 161295 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 161296 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 161297 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 161298 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 161299 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 161300 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 161301 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 161302 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 161303 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 161304 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 161305 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 161306 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161307 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161308 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 161309 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 161310 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 161311 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 161312 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161313 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 161314 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 161315 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 161316 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 161317 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 161318 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161319 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 161320 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 161321 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 161322 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 161323 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 161324 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161325 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 161326 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:psub1_then_psub |
| 161327 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 161328 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 161329 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 161330 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 161331 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 161332 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 161333 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 161334 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 161335 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 161336 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 161337 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 161338 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 161339 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 161340 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 161341 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 161342 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 161343 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 161344 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 161345 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 161346 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 161347 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 161348 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 161349 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1 |
| 161350 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 161351 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161352 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161353 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161354 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161355 | 127, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 161356 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161357 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1 |
| 161358 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 161359 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 161360 | 220, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 161361 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 161362 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 161363 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 161364 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 161365 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 161366 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 161367 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161368 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161369 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161370 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 161371 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 161372 | 320, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 161373 | 220, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 161374 | 171, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 161375 | 256, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 161376 | 165, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 161377 | 246, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 161378 | 149, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 161379 | 176, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 161380 | 176, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 161381 | }, |
| 161382 | { // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 161383 | 7, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 161384 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub_hi |
| 161385 | 56, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 161386 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0 |
| 161387 | 56, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 161388 | 56, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 161389 | 56, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 161390 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_hi |
| 161391 | 8, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 161392 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub_hi |
| 161393 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub |
| 161394 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub0 |
| 161395 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1 |
| 161396 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0 |
| 161397 | 92, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 161398 | 92, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 161399 | 92, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 161400 | 40, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 161401 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub_hi |
| 161402 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32 |
| 161403 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_hi |
| 161404 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube32 |
| 161405 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube64 |
| 161406 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo32 |
| 161407 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64 |
| 161408 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0 |
| 161409 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1 |
| 161410 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2 |
| 161411 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3 |
| 161412 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4 |
| 161413 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5 |
| 161414 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6 |
| 161415 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7 |
| 161416 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubb |
| 161417 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd0 |
| 161418 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1 |
| 161419 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh0 |
| 161420 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1 |
| 161421 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq0 |
| 161422 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq1 |
| 161423 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs0 |
| 161424 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1 |
| 161425 | 92, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 161426 | 93, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0 -> ZPR |
| 161427 | 103, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 161428 | 93, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 161429 | 103, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3 -> ZPR_K |
| 161430 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_hi |
| 161431 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 161432 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 161433 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 161434 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 161435 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 161436 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 161437 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 161438 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 161439 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 161440 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 161441 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 161442 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 161443 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 161444 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 161445 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 161446 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 161447 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 161448 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 161449 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 161450 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 161451 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161452 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161453 | 7, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 161454 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 161455 | 8, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 161456 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 161457 | 40, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 161458 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 161459 | 7, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 161460 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 161461 | 8, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 161462 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 161463 | 40, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 161464 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 161465 | 7, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 161466 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 161467 | 8, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 161468 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 161469 | 40, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 161470 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 161471 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1_then_psub |
| 161472 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 161473 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 161474 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 161475 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 161476 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 161477 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 161478 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 161479 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 161480 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 161481 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 161482 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 161483 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 161484 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 161485 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 161486 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 161487 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 161488 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 161489 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 161490 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 161491 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 161492 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 161493 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 161494 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 161495 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 161496 | 75, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 161497 | 110, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 161498 | 75, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD |
| 161499 | 75, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 161500 | 117, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 161501 | 110, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 161502 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 161503 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 161504 | 128, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 161505 | 206, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 161506 | 128, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ |
| 161507 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 161508 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 161509 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 161510 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 161511 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 161512 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161513 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161514 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161515 | 0, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 161516 | 128, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 161517 | 297, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 161518 | 206, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 161519 | 194, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 161520 | 279, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 161521 | 195, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 161522 | 281, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 161523 | 172, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 161524 | 135, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub2 -> ZPR2Strided |
| 161525 | 178, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 161526 | }, |
| 161527 | { // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 161528 | 7, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 161529 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:bsub_hi |
| 161530 | 65, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 161531 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0 |
| 161532 | 65, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 161533 | 65, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 161534 | 65, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 161535 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_hi |
| 161536 | 10, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 161537 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:hsub_hi |
| 161538 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:psub |
| 161539 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:psub0 |
| 161540 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:psub1 |
| 161541 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0 |
| 161542 | 98, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 161543 | 94, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 161544 | 94, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 161545 | 44, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161546 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:ssub_hi |
| 161547 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32 |
| 161548 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_hi |
| 161549 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sube32 |
| 161550 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sube64 |
| 161551 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:subo32 |
| 161552 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64 |
| 161553 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_0 |
| 161554 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1 |
| 161555 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2 |
| 161556 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3 |
| 161557 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4 |
| 161558 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5 |
| 161559 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6 |
| 161560 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7 |
| 161561 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubb |
| 161562 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd0 |
| 161563 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1 |
| 161564 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh0 |
| 161565 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1 |
| 161566 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubq0 |
| 161567 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubq1 |
| 161568 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs0 |
| 161569 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1 |
| 161570 | 98, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 161571 | 102, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 161572 | 102, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 161573 | 97, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_4b |
| 161574 | 97, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 161575 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_hi |
| 161576 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 161577 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 161578 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 161579 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 161580 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 161581 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 161582 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 161583 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 161584 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 161585 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 161586 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 161587 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 161588 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 161589 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 161590 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 161591 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 161592 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 161593 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 161594 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 161595 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 161596 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161597 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161598 | 7, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 161599 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 161600 | 10, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 161601 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 161602 | 44, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161603 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 161604 | 7, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 161605 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 161606 | 10, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 161607 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 161608 | 44, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161609 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 161610 | 7, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 161611 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 161612 | 10, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 161613 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 161614 | 44, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161615 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 161616 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 161617 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 161618 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 161619 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 161620 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 161621 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 161622 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 161623 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 161624 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 161625 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 161626 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 161627 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 161628 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 161629 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 161630 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 161631 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 161632 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 161633 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 161634 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 161635 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 161636 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 161637 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 161638 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 161639 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 161640 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 161641 | 79, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161642 | 116, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161643 | 79, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161644 | 79, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161645 | 127, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 161646 | 116, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161647 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 161648 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 161649 | 163, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161650 | 248, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 161651 | 163, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161652 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 161653 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 161654 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 161655 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 161656 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 161657 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161658 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161659 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161660 | 0, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 161661 | 163, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161662 | 374, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 161663 | 248, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 161664 | 193, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 161665 | 278, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 161666 | 188, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 161667 | 273, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 161668 | 173, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 161669 | 152, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub0_zsub2 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 161670 | 152, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7:zsub1_zsub3 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 161671 | }, |
| 161672 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 161673 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 161674 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub_hi |
| 161675 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub -> FPR64 |
| 161676 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0 |
| 161677 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 161678 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 161679 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 161680 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_hi |
| 161681 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub -> FPR16 |
| 161682 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub_hi |
| 161683 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub |
| 161684 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub0 |
| 161685 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1 |
| 161686 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0 |
| 161687 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 161688 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 161689 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 161690 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub -> FPR32 |
| 161691 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub_hi |
| 161692 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32 |
| 161693 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 161694 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sube32 |
| 161695 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sube64 |
| 161696 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo32 |
| 161697 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64 |
| 161698 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 161699 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 161700 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 161701 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 161702 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 161703 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 161704 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 161705 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 161706 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubb |
| 161707 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd0 |
| 161708 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1 |
| 161709 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh0 |
| 161710 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1 |
| 161711 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq0 |
| 161712 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq1 |
| 161713 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs0 |
| 161714 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1 |
| 161715 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub -> FPR128 |
| 161716 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0 -> ZPR |
| 161717 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 161718 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 161719 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 161720 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_hi |
| 161721 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 161722 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 161723 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 161724 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 161725 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 161726 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 161727 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 161728 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 161729 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 161730 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 161731 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 161732 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 161733 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 161734 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 161735 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 161736 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 161737 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 161738 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 161739 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 161740 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 161741 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161742 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161743 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 161744 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 161745 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 161746 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 161747 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161748 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 161749 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 161750 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 161751 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 161752 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 161753 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161754 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 161755 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 161756 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 161757 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 161758 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 161759 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 161760 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 161761 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 161762 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 161763 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 161764 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 161765 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 161766 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 161767 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 161768 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 161769 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 161770 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 161771 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 161772 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 161773 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 161774 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 161775 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 161776 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 161777 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 161778 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 161779 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 161780 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 161781 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 161782 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 161783 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 161784 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 161785 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 161786 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161787 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161788 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 161789 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 161790 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 161791 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 161792 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1 |
| 161793 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 161794 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161795 | 248, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 161796 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 161797 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 161798 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 161799 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 161800 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 161801 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 161802 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161803 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161804 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161805 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 161806 | 147, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 161807 | 362, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 161808 | 241, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 161809 | 154, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 161810 | 243, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 161811 | 164, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 161812 | 251, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 161813 | 164, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 161814 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 161815 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 161816 | }, |
| 161817 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 161818 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 161819 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:bsub_hi |
| 161820 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 161821 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub0 |
| 161822 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 161823 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 161824 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 161825 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub_hi |
| 161826 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 161827 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:hsub_hi |
| 161828 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:psub |
| 161829 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:psub0 |
| 161830 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:psub1 |
| 161831 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub0 |
| 161832 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 161833 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 161834 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 161835 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 161836 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:ssub_hi |
| 161837 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sub_32 |
| 161838 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_hi |
| 161839 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sube32 |
| 161840 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sube64 |
| 161841 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:subo32 |
| 161842 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:subo64 |
| 161843 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_0 |
| 161844 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1 |
| 161845 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2 |
| 161846 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3 |
| 161847 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4 |
| 161848 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5 |
| 161849 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6 |
| 161850 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7 |
| 161851 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubb |
| 161852 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubd0 |
| 161853 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1 |
| 161854 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh0 |
| 161855 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1 |
| 161856 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubq0 |
| 161857 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubq1 |
| 161858 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs0 |
| 161859 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1 |
| 161860 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 161861 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub0 -> ZPR_K |
| 161862 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 161863 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 161864 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub3 -> ZPR |
| 161865 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub_hi |
| 161866 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 161867 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 161868 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 161869 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 161870 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 161871 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 161872 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 161873 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 161874 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 161875 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 161876 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 161877 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 161878 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 161879 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 161880 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 161881 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 161882 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 161883 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 161884 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 161885 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 161886 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 161887 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 161888 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 161889 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 161890 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 161891 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 161892 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 161893 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 161894 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 161895 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 161896 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 161897 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 161898 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 161899 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 161900 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 161901 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 161902 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 161903 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 161904 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 161905 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 161906 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:psub1_then_psub |
| 161907 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 161908 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 161909 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 161910 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 161911 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 161912 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 161913 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 161914 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 161915 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 161916 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 161917 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 161918 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 161919 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 161920 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 161921 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 161922 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 161923 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 161924 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 161925 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 161926 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 161927 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 161928 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 161929 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 161930 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 161931 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 161932 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 161933 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD |
| 161934 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 161935 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 161936 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 161937 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 161938 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 161939 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 161940 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 161941 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ |
| 161942 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 161943 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 161944 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 161945 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 161946 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 161947 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 161948 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 161949 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 161950 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 161951 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 161952 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 161953 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 161954 | 169, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 161955 | 249, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 161956 | 156, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K |
| 161957 | 228, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K |
| 161958 | 129, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2 |
| 161959 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 161960 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 161961 | }, |
| 161962 | { // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 161963 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 161964 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:bsub_hi |
| 161965 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 161966 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0 |
| 161967 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 161968 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 161969 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3 -> FPR64 |
| 161970 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_hi |
| 161971 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 161972 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:hsub_hi |
| 161973 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub |
| 161974 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub0 |
| 161975 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub1 |
| 161976 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0 |
| 161977 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 161978 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 161979 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub3 -> FPR128 |
| 161980 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 161981 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:ssub_hi |
| 161982 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32 |
| 161983 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_hi |
| 161984 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sube32 |
| 161985 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sube64 |
| 161986 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo32 |
| 161987 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64 |
| 161988 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_0 |
| 161989 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1 |
| 161990 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2 |
| 161991 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3 |
| 161992 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4 |
| 161993 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5 |
| 161994 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6 |
| 161995 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7 |
| 161996 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubb |
| 161997 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd0 |
| 161998 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1 |
| 161999 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh0 |
| 162000 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1 |
| 162001 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubq0 |
| 162002 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubq1 |
| 162003 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs0 |
| 162004 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1 |
| 162005 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 162006 | 93, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0 -> ZPR |
| 162007 | 103, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1 -> ZPR_K |
| 162008 | 103, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 162009 | 93, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub3 -> ZPR |
| 162010 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_hi |
| 162011 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 162012 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 162013 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 162014 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 162015 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 162016 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 162017 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 162018 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 162019 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 162020 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 162021 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 162022 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 162023 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 162024 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 162025 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 162026 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 162027 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 162028 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 162029 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 162030 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 162031 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162032 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162033 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 162034 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 162035 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 162036 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 162037 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 162038 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 162039 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 162040 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 162041 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 162042 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 162043 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 162044 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 162045 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 162046 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 162047 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 162048 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 162049 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 162050 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 162051 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub1_then_psub |
| 162052 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 162053 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 162054 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 162055 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 162056 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 162057 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 162058 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 162059 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 162060 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 162061 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 162062 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 162063 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 162064 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 162065 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 162066 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 162067 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 162068 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 162069 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 162070 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 162071 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 162072 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 162073 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 162074 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 162075 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 162076 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 162077 | 110, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 162078 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_dsub3 -> DD |
| 162079 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 162080 | 117, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 162081 | 110, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 162082 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 162083 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 162084 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 162085 | 206, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 162086 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2_qsub3 -> QQ |
| 162087 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 162088 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 162089 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 162090 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 162091 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 162092 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162093 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162094 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162095 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 162096 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 162097 | 297, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 162098 | 206, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 162099 | 160, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 162100 | 250, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 162101 | 169, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 162102 | 249, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 162103 | 156, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K |
| 162104 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 162105 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 162106 | }, |
| 162107 | { // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 162108 | 7, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:bsub -> FPR8 |
| 162109 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:bsub_hi |
| 162110 | 56, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub -> FPR64 |
| 162111 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0 |
| 162112 | 56, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1 -> FPR64 |
| 162113 | 56, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2 -> FPR64 |
| 162114 | 56, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3 -> FPR64 |
| 162115 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_hi |
| 162116 | 8, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:hsub -> FPR16 |
| 162117 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:hsub_hi |
| 162118 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub |
| 162119 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub0 |
| 162120 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub1 |
| 162121 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0 |
| 162122 | 92, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1 -> FPR128 |
| 162123 | 92, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2 -> FPR128 |
| 162124 | 92, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub3 -> FPR128 |
| 162125 | 40, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:ssub -> FPR32 |
| 162126 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:ssub_hi |
| 162127 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32 |
| 162128 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_hi |
| 162129 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sube32 |
| 162130 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sube64 |
| 162131 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo32 |
| 162132 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64 |
| 162133 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_0 |
| 162134 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1 |
| 162135 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2 |
| 162136 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3 |
| 162137 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4 |
| 162138 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5 |
| 162139 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6 |
| 162140 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7 |
| 162141 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubb |
| 162142 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd0 |
| 162143 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1 |
| 162144 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh0 |
| 162145 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1 |
| 162146 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubq0 |
| 162147 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubq1 |
| 162148 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs0 |
| 162149 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1 |
| 162150 | 92, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub -> FPR128 |
| 162151 | 93, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0 -> ZPR |
| 162152 | 93, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1 -> ZPR |
| 162153 | 103, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2 -> ZPR_K |
| 162154 | 103, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub3 -> ZPR_K |
| 162155 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_hi |
| 162156 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq0 |
| 162157 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq1 |
| 162158 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd0 |
| 162159 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1 |
| 162160 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq0 |
| 162161 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq1 |
| 162162 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 162163 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 162164 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd0 |
| 162165 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1 |
| 162166 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq0 |
| 162167 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq1 |
| 162168 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs0 |
| 162169 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1 |
| 162170 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 162171 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 162172 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 162173 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 162174 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 162175 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 162176 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162177 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162178 | 7, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 162179 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub_hi |
| 162180 | 8, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 162181 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub_hi |
| 162182 | 40, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 162183 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub_hi |
| 162184 | 7, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 162185 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub_hi |
| 162186 | 8, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 162187 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub_hi |
| 162188 | 40, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 162189 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub_hi |
| 162190 | 7, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 162191 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub_hi |
| 162192 | 8, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 162193 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub_hi |
| 162194 | 40, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 162195 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub_hi |
| 162196 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub1_then_psub |
| 162197 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_then_dsub_hi |
| 162198 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub3_then_dsub_hi |
| 162199 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2_then_dsub_hi |
| 162200 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32 |
| 162201 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 162202 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32 |
| 162203 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 162204 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32 |
| 162205 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 162206 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32 |
| 162207 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 162208 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32 |
| 162209 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 162210 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32 |
| 162211 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 162212 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32 |
| 162213 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 162214 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32 |
| 162215 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32_hi |
| 162216 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_then_zsub_hi |
| 162217 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub3_then_zsub_hi |
| 162218 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2_then_zsub_hi |
| 162219 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1 |
| 162220 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1_dsub2 |
| 162221 | 75, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2 -> DD |
| 162222 | 110, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 162223 | 75, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_dsub3 -> DD |
| 162224 | 75, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1 -> DD |
| 162225 | 117, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 162226 | 110, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 162227 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1 |
| 162228 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1_qsub2 |
| 162229 | 128, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2 -> QQ |
| 162230 | 206, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 162231 | 128, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2_qsub3 -> QQ |
| 162232 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 162233 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_0_x8sub_1 |
| 162234 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_x8sub_3 |
| 162235 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_x8sub_5 |
| 162236 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_x8sub_7 |
| 162237 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162238 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162239 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162240 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 162241 | 128, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1 -> QQ |
| 162242 | 297, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 162243 | 206, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 162244 | 129, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1 -> ZPR2 |
| 162245 | 238, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_K |
| 162246 | 160, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_K |
| 162247 | 250, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 162248 | 169, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 162249 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub2 |
| 162250 | 0, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub3 |
| 162251 | }, |
| 162252 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 162253 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:bsub -> FPR8 |
| 162254 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:bsub_hi |
| 162255 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub -> FPR64_lo |
| 162256 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0 |
| 162257 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 162258 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 162259 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 162260 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_hi |
| 162261 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:hsub -> FPR16_lo |
| 162262 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:hsub_hi |
| 162263 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:psub |
| 162264 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:psub0 |
| 162265 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:psub1 |
| 162266 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0 |
| 162267 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 162268 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 162269 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 162270 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162271 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:ssub_hi |
| 162272 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32 |
| 162273 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_hi |
| 162274 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sube32 |
| 162275 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sube64 |
| 162276 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:subo32 |
| 162277 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64 |
| 162278 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0 |
| 162279 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1 |
| 162280 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2 |
| 162281 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3 |
| 162282 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4 |
| 162283 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5 |
| 162284 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6 |
| 162285 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7 |
| 162286 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubb |
| 162287 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd0 |
| 162288 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1 |
| 162289 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh0 |
| 162290 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1 |
| 162291 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubq0 |
| 162292 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubq1 |
| 162293 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs0 |
| 162294 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1 |
| 162295 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 162296 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 162297 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 162298 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 162299 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 162300 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_hi |
| 162301 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 162302 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 162303 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 162304 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 162305 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 162306 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 162307 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 162308 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 162309 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 162310 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 162311 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 162312 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 162313 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 162314 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 162315 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 162316 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 162317 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 162318 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 162319 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 162320 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 162321 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162322 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162323 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 162324 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_bsub_hi |
| 162325 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 162326 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_hsub_hi |
| 162327 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162328 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_then_ssub_hi |
| 162329 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 162330 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_bsub_hi |
| 162331 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 162332 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_hsub_hi |
| 162333 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162334 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub3_then_ssub_hi |
| 162335 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 162336 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_bsub_hi |
| 162337 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 162338 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_hsub_hi |
| 162339 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162340 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_then_ssub_hi |
| 162341 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:psub1_then_psub |
| 162342 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_then_dsub_hi |
| 162343 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub3_then_dsub_hi |
| 162344 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2_then_dsub_hi |
| 162345 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 162346 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 162347 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 162348 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 162349 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 162350 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 162351 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 162352 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 162353 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 162354 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 162355 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 162356 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 162357 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 162358 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 162359 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32 |
| 162360 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:subo64_then_sub_32_hi |
| 162361 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_then_zsub_hi |
| 162362 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub3_then_zsub_hi |
| 162363 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2_then_zsub_hi |
| 162364 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1 |
| 162365 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 162366 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162367 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162368 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162369 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162370 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 162371 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162372 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1 |
| 162373 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 162374 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 162375 | 242, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 162376 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 162377 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 162378 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 162379 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 162380 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 162381 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 162382 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162383 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162384 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162385 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 162386 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 162387 | 363, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 162388 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 162389 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 162390 | 251, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 162391 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 162392 | 245, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 162393 | 161, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7 |
| 162394 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub0_zsub2 |
| 162395 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7:zsub1_zsub3 |
| 162396 | }, |
| 162397 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 162398 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub -> FPR8 |
| 162399 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:bsub_hi |
| 162400 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 162401 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0 |
| 162402 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 162403 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 162404 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 162405 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_hi |
| 162406 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 162407 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:hsub_hi |
| 162408 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub |
| 162409 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub0 |
| 162410 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1 |
| 162411 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0 |
| 162412 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1 -> FPR128_lo |
| 162413 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 162414 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 162415 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162416 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:ssub_hi |
| 162417 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32 |
| 162418 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_hi |
| 162419 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sube32 |
| 162420 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sube64 |
| 162421 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo32 |
| 162422 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64 |
| 162423 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0 |
| 162424 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1 |
| 162425 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2 |
| 162426 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3 |
| 162427 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4 |
| 162428 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5 |
| 162429 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6 |
| 162430 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7 |
| 162431 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubb |
| 162432 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd0 |
| 162433 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1 |
| 162434 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh0 |
| 162435 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1 |
| 162436 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq0 |
| 162437 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubq1 |
| 162438 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs0 |
| 162439 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1 |
| 162440 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub -> FPR128_lo |
| 162441 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0 -> ZPR_4b |
| 162442 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_Lo |
| 162443 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2 -> ZPR_4b |
| 162444 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3 -> ZPRMul2_Lo |
| 162445 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_hi |
| 162446 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 162447 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 162448 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 162449 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 162450 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 162451 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 162452 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 162453 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 162454 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 162455 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 162456 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 162457 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 162458 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 162459 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 162460 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 162461 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 162462 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 162463 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 162464 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 162465 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 162466 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162467 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162468 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 162469 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 162470 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 162471 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 162472 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162473 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 162474 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 162475 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 162476 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 162477 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 162478 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162479 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 162480 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 162481 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 162482 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 162483 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 162484 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162485 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 162486 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:psub1_then_psub |
| 162487 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 162488 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 162489 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 162490 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 162491 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 162492 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 162493 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 162494 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 162495 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 162496 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 162497 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 162498 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 162499 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 162500 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 162501 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 162502 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 162503 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 162504 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 162505 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 162506 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 162507 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 162508 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 162509 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1 |
| 162510 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 162511 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162512 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162513 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162514 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162515 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 162516 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162517 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1 |
| 162518 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 162519 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162520 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 162521 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162522 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 162523 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 162524 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 162525 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 162526 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 162527 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162528 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162529 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162530 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 162531 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162532 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 162533 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 162534 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 162535 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 162536 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 162537 | 247, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 162538 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 162539 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub0_zsub2 |
| 162540 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo:zsub1_zsub3 |
| 162541 | }, |
| 162542 | { // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 162543 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 162544 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:bsub_hi |
| 162545 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub -> FPR64_lo |
| 162546 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0 |
| 162547 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 162548 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 162549 | 65, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 162550 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_hi |
| 162551 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub -> FPR16_lo |
| 162552 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:hsub_hi |
| 162553 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:psub |
| 162554 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:psub0 |
| 162555 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1 |
| 162556 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0 -> FPR128_0to7 |
| 162557 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 162558 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 162559 | 98, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 162560 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162561 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:ssub_hi |
| 162562 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32 |
| 162563 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 162564 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sube32 |
| 162565 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sube64 |
| 162566 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:subo32 |
| 162567 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64 |
| 162568 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 162569 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 162570 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 162571 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 162572 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 162573 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 162574 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 162575 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 162576 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubb |
| 162577 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd0 |
| 162578 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1 |
| 162579 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh0 |
| 162580 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1 |
| 162581 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq0 |
| 162582 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubq1 |
| 162583 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs0 |
| 162584 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1 |
| 162585 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub |
| 162586 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0 |
| 162587 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1 |
| 162588 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2 |
| 162589 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3 |
| 162590 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_hi |
| 162591 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 162592 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 162593 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 162594 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 162595 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 162596 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 162597 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 162598 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 162599 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 162600 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 162601 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 162602 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 162603 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 162604 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 162605 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 162606 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 162607 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 162608 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 162609 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 162610 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 162611 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162612 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162613 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 162614 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 162615 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 162616 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 162617 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162618 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 162619 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 162620 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 162621 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 162622 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 162623 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162624 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 162625 | 7, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 162626 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 162627 | 10, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 162628 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 162629 | 44, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162630 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 162631 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 162632 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 162633 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 162634 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 162635 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 162636 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 162637 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 162638 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 162639 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 162640 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 162641 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 162642 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 162643 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 162644 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 162645 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 162646 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 162647 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 162648 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 162649 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 162650 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 162651 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 162652 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 162653 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 162654 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 162655 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 162656 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162657 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162658 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162659 | 79, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162660 | 127, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 162661 | 116, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162662 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 162663 | 248, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 162664 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 162665 | 248, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 162666 | 163, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 162667 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 162668 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 162669 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 162670 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 162671 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 162672 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162673 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162674 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162675 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 162676 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1 |
| 162677 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 |
| 162678 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 |
| 162679 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1 |
| 162680 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 |
| 162681 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2 |
| 162682 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 |
| 162683 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub2_zsub3 |
| 162684 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 162685 | 0, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 162686 | }, |
| 162687 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 162688 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 162689 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 162690 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 162691 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 162692 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 162693 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 162694 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 162695 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 162696 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 162697 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 162698 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 162699 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 162700 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 162701 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 162702 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 162703 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 162704 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 162705 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 162706 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 162707 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 162708 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 162709 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 162710 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 162711 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 162712 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 162713 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 162714 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 162715 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 162716 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 162717 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 162718 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 162719 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 162720 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 162721 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 162722 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 162723 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 162724 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 162725 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 162726 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 162727 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 162728 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 162729 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 162730 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 162731 | 104, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 162732 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR |
| 162733 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi |
| 162734 | 93, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPR |
| 162735 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 162736 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 162737 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 162738 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 162739 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 162740 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 162741 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 162742 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 162743 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 162744 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 162745 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 162746 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 162747 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 162748 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 162749 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 162750 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 162751 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 162752 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 162753 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 162754 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 162755 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 162756 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162757 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162758 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 162759 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 162760 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 162761 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 162762 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 162763 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 162764 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 162765 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 162766 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 162767 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 162768 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 162769 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 162770 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 162771 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 162772 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 162773 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 162774 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 162775 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 162776 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 162777 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 162778 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 162779 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 162780 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 162781 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 162782 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 162783 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 162784 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 162785 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 162786 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 162787 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 162788 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 162789 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 162790 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 162791 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 162792 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 162793 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 162794 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 162795 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 162796 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 162797 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 162798 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 162799 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 162800 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 162801 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 162802 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 162803 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 162804 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 162805 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 162806 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 162807 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 162808 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 162809 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 162810 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 162811 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 162812 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 162813 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 162814 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 162815 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 162816 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 162817 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162818 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162819 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162820 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 162821 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 162822 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 162823 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 162824 | 170, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 162825 | 254, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 162826 | 157, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 162827 | 231, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 162828 | 148, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 162829 | 190, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 162830 | 200, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 162831 | }, |
| 162832 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 162833 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 162834 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 162835 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 162836 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 162837 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 162838 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64_lo |
| 162839 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 -> FPR64_lo |
| 162840 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 162841 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 162842 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 162843 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 162844 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 162845 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 162846 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 162847 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 162848 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128_lo |
| 162849 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 -> FPR128_lo |
| 162850 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162851 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 162852 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 162853 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 162854 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 162855 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 162856 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 162857 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 162858 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 162859 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 162860 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 162861 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 162862 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 162863 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 162864 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 162865 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 162866 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 162867 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 162868 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 162869 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 162870 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 162871 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 162872 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 162873 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 162874 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 162875 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 162876 | 105, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 162877 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPR_4b |
| 162878 | 100, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPRMul2_Lo |
| 162879 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 -> ZPR_4b |
| 162880 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 162881 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 162882 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 162883 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 162884 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 162885 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 162886 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 162887 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 162888 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 162889 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 162890 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 162891 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 162892 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 162893 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 162894 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 162895 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 162896 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 162897 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 162898 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 162899 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 162900 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 162901 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 162902 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 162903 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 162904 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 162905 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 162906 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 162907 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162908 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 162909 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 162910 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 162911 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 162912 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 162913 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162914 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 162915 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 162916 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 162917 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 162918 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 162919 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162920 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 162921 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 162922 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 162923 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 162924 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 162925 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 162926 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 162927 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 162928 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 162929 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 162930 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 162931 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 162932 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 162933 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 162934 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 162935 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 162936 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 162937 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 162938 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 162939 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 162940 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 162941 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 162942 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 162943 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 162944 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 162945 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 162946 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162947 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162948 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162949 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 162950 | 127, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 162951 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 162952 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 162953 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 162954 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162955 | 220, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 162956 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162957 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 162958 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 162959 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 162960 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 162961 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 162962 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 162963 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 162964 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 162965 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 162966 | 140, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 162967 | 320, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 162968 | 220, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 162969 | 171, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 162970 | 256, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 162971 | 165, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 162972 | 246, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 162973 | 149, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 162974 | 191, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 162975 | 191, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 162976 | }, |
| 162977 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 162978 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub -> FPR8 |
| 162979 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:bsub_hi |
| 162980 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub -> FPR64_lo |
| 162981 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0 |
| 162982 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 162983 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 162984 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 162985 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_hi |
| 162986 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub -> FPR16_lo |
| 162987 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:hsub_hi |
| 162988 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:psub |
| 162989 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:psub0 |
| 162990 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1 |
| 162991 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0 |
| 162992 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 162993 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 162994 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 162995 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 162996 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:ssub_hi |
| 162997 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32 |
| 162998 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_hi |
| 162999 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sube32 |
| 163000 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sube64 |
| 163001 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:subo32 |
| 163002 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64 |
| 163003 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0 |
| 163004 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1 |
| 163005 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2 |
| 163006 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3 |
| 163007 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4 |
| 163008 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5 |
| 163009 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6 |
| 163010 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7 |
| 163011 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubb |
| 163012 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd0 |
| 163013 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1 |
| 163014 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh0 |
| 163015 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1 |
| 163016 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq0 |
| 163017 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubq1 |
| 163018 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs0 |
| 163019 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1 |
| 163020 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 163021 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 163022 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 163023 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 163024 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 163025 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_hi |
| 163026 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 163027 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 163028 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 163029 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 163030 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 163031 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 163032 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 163033 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 163034 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 163035 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 163036 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 163037 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 163038 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 163039 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 163040 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 163041 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 163042 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 163043 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 163044 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 163045 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 163046 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163047 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163048 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 163049 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_bsub_hi |
| 163050 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 163051 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_hsub_hi |
| 163052 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163053 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_then_ssub_hi |
| 163054 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 163055 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_bsub_hi |
| 163056 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 163057 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_hsub_hi |
| 163058 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163059 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub3_then_ssub_hi |
| 163060 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 163061 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_bsub_hi |
| 163062 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 163063 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_hsub_hi |
| 163064 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163065 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_then_ssub_hi |
| 163066 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:psub1_then_psub |
| 163067 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_then_dsub_hi |
| 163068 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub3_then_dsub_hi |
| 163069 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_then_dsub_hi |
| 163070 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 163071 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 163072 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 163073 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 163074 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 163075 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 163076 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 163077 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 163078 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 163079 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 163080 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 163081 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 163082 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 163083 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 163084 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32 |
| 163085 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:subo64_then_sub_32_hi |
| 163086 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_then_zsub_hi |
| 163087 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub3_then_zsub_hi |
| 163088 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_then_zsub_hi |
| 163089 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1 |
| 163090 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 163091 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163092 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 163093 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163094 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163095 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 163096 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 163097 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1 |
| 163098 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 163099 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163100 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 163101 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163102 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 163103 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 163104 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 163105 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 163106 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 163107 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163108 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163109 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163110 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 163111 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163112 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 163113 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 163114 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 163115 | 251, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 163116 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 163117 | 251, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 163118 | 164, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 163119 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub0_zsub2 |
| 163120 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7:zsub1_zsub3 |
| 163121 | }, |
| 163122 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 163123 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 163124 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub_hi |
| 163125 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 163126 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0 |
| 163127 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 163128 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 163129 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 163130 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_hi |
| 163131 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 163132 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub_hi |
| 163133 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub |
| 163134 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub0 |
| 163135 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1 |
| 163136 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0 |
| 163137 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 163138 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 163139 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 163140 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 163141 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub_hi |
| 163142 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32 |
| 163143 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_hi |
| 163144 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube32 |
| 163145 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube64 |
| 163146 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo32 |
| 163147 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64 |
| 163148 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0 |
| 163149 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1 |
| 163150 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2 |
| 163151 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3 |
| 163152 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4 |
| 163153 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5 |
| 163154 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6 |
| 163155 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7 |
| 163156 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubb |
| 163157 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd0 |
| 163158 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1 |
| 163159 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh0 |
| 163160 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1 |
| 163161 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq0 |
| 163162 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq1 |
| 163163 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs0 |
| 163164 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1 |
| 163165 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 163166 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0 -> ZPRMul2_Hi |
| 163167 | 103, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 163168 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2 -> ZPRMul2_Hi |
| 163169 | 103, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3 -> ZPR_K |
| 163170 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_hi |
| 163171 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 163172 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 163173 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 163174 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 163175 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 163176 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 163177 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 163178 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 163179 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 163180 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 163181 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 163182 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 163183 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 163184 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 163185 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 163186 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 163187 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 163188 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 163189 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 163190 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 163191 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163192 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163193 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 163194 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 163195 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 163196 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 163197 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 163198 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 163199 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 163200 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 163201 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 163202 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 163203 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 163204 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 163205 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 163206 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 163207 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 163208 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 163209 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 163210 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 163211 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1_then_psub |
| 163212 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 163213 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 163214 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 163215 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 163216 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 163217 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 163218 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 163219 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 163220 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 163221 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 163222 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 163223 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 163224 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 163225 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 163226 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 163227 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 163228 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 163229 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 163230 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 163231 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 163232 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 163233 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 163234 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 163235 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 163236 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 163237 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 163238 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD |
| 163239 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 163240 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 163241 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 163242 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 163243 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 163244 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 163245 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 163246 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ |
| 163247 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 163248 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 163249 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 163250 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 163251 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 163252 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163253 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163254 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163255 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 163256 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 163257 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 163258 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 163259 | 194, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 163260 | 279, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 163261 | 195, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 163262 | 281, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 163263 | 172, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 163264 | 175, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 163265 | 192, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 163266 | }, |
| 163267 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 163268 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 163269 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 163270 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 163271 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 163272 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 163273 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64_lo |
| 163274 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3 -> FPR64_lo |
| 163275 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 163276 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 163277 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 163278 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub |
| 163279 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub0 |
| 163280 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub1 |
| 163281 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 163282 | 98, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 163283 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128_lo |
| 163284 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub3 -> FPR128_lo |
| 163285 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163286 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 163287 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 163288 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 163289 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sube32 |
| 163290 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sube64 |
| 163291 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo32 |
| 163292 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64 |
| 163293 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 163294 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 163295 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 163296 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 163297 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 163298 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 163299 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 163300 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 163301 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubb |
| 163302 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 163303 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 163304 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 163305 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 163306 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 163307 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 163308 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 163309 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 163310 | 98, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 163311 | 106, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPRMul2_and_ZPR_3b |
| 163312 | 102, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPR_3b |
| 163313 | 100, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPRMul2_Lo |
| 163314 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub3 -> ZPR_4b |
| 163315 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 163316 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 163317 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 163318 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 163319 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 163320 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 163321 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 163322 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 163323 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 163324 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 163325 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 163326 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 163327 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 163328 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 163329 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 163330 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 163331 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 163332 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 163333 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 163334 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 163335 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 163336 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163337 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163338 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 163339 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 163340 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 163341 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 163342 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163343 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 163344 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 163345 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 163346 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 163347 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 163348 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163349 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 163350 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 163351 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 163352 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 163353 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 163354 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163355 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 163356 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 163357 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 163358 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 163359 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 163360 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 163361 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 163362 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 163363 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 163364 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 163365 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 163366 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 163367 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 163368 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 163369 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 163370 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 163371 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 163372 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 163373 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 163374 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 163375 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 163376 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 163377 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 163378 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 163379 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 163380 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 163381 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163382 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 163383 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163384 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 163385 | 127, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 163386 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 163387 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 163388 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 163389 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163390 | 248, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 163391 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163392 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 163393 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 163394 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 163395 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 163396 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 163397 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163398 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163399 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163400 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 163401 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 163402 | 374, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 163403 | 248, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 163404 | 193, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 163405 | 278, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 163406 | 188, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 163407 | 273, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 163408 | 173, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 163409 | 176, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 163410 | 176, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 163411 | }, |
| 163412 | { // ZPR4Strided_with_dsub_in_FPR64_lo |
| 163413 | 7, // ZPR4Strided_with_dsub_in_FPR64_lo:bsub -> FPR8 |
| 163414 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:bsub_hi |
| 163415 | 65, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub -> FPR64_lo |
| 163416 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0 |
| 163417 | 65, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1 -> FPR64_lo |
| 163418 | 65, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2 -> FPR64_lo |
| 163419 | 65, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3 -> FPR64_lo |
| 163420 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_hi |
| 163421 | 10, // ZPR4Strided_with_dsub_in_FPR64_lo:hsub -> FPR16_lo |
| 163422 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:hsub_hi |
| 163423 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub |
| 163424 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub0 |
| 163425 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub1 |
| 163426 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0 |
| 163427 | 98, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1 -> FPR128_0to7 |
| 163428 | 94, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2 -> FPR128_lo |
| 163429 | 94, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3 -> FPR128_lo |
| 163430 | 44, // ZPR4Strided_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163431 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:ssub_hi |
| 163432 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32 |
| 163433 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32_hi |
| 163434 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sube32 |
| 163435 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sube64 |
| 163436 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo32 |
| 163437 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo64 |
| 163438 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_0 |
| 163439 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_1 |
| 163440 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2 |
| 163441 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_3 |
| 163442 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4 |
| 163443 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_5 |
| 163444 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6 |
| 163445 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_7 |
| 163446 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubb |
| 163447 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd0 |
| 163448 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1 |
| 163449 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh0 |
| 163450 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1 |
| 163451 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubq0 |
| 163452 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubq1 |
| 163453 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs0 |
| 163454 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1 |
| 163455 | 98, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub -> FPR128_0to7 |
| 163456 | 102, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0 -> ZPR_3b |
| 163457 | 102, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1 -> ZPR_3b |
| 163458 | 97, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b |
| 163459 | 97, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b |
| 163460 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_hi |
| 163461 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 |
| 163462 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 |
| 163463 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 |
| 163464 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 |
| 163465 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 |
| 163466 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 |
| 163467 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 |
| 163468 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 |
| 163469 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 |
| 163470 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 |
| 163471 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 |
| 163472 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 |
| 163473 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 |
| 163474 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 |
| 163475 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 |
| 163476 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 |
| 163477 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 |
| 163478 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 |
| 163479 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 |
| 163480 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 |
| 163481 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163482 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163483 | 7, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub -> FPR8 |
| 163484 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub_hi |
| 163485 | 10, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo |
| 163486 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub_hi |
| 163487 | 44, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163488 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub_hi |
| 163489 | 7, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub -> FPR8 |
| 163490 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub_hi |
| 163491 | 10, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo |
| 163492 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub_hi |
| 163493 | 44, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163494 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub_hi |
| 163495 | 7, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub -> FPR8 |
| 163496 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub_hi |
| 163497 | 10, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo |
| 163498 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub_hi |
| 163499 | 44, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 163500 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub_hi |
| 163501 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub1_then_psub |
| 163502 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_hi |
| 163503 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3_then_dsub_hi |
| 163504 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub_hi |
| 163505 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 |
| 163506 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32_hi |
| 163507 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 |
| 163508 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_hi |
| 163509 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 |
| 163510 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32_hi |
| 163511 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 |
| 163512 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_hi |
| 163513 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 |
| 163514 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32_hi |
| 163515 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 |
| 163516 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_hi |
| 163517 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 |
| 163518 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32_hi |
| 163519 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32 |
| 163520 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32_hi |
| 163521 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi |
| 163522 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi |
| 163523 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi |
| 163524 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0_dsub1 |
| 163525 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 |
| 163526 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_dsub2 |
| 163527 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 |
| 163528 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_dsub3 |
| 163529 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_dsub1 |
| 163530 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2_dsub3 |
| 163531 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_dsub1_dsub2 |
| 163532 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0_qsub1 |
| 163533 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 |
| 163534 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_qsub2 |
| 163535 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 |
| 163536 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_qsub3 |
| 163537 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 |
| 163538 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 |
| 163539 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 |
| 163540 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 |
| 163541 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 |
| 163542 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163543 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163544 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163545 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 |
| 163546 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_qsub1 |
| 163547 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2_qsub3 |
| 163548 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_qsub1_qsub2 |
| 163549 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub1 |
| 163550 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 |
| 163551 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub2 |
| 163552 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 |
| 163553 | 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_zsub3 |
| 163554 | 152, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub2 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 163555 | 152, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub3 -> ZPR2Strided_with_dsub_in_FPR64_lo |
| 163556 | }, |
| 163557 | { // ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 163558 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2:bsub -> FPR8 |
| 163559 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:bsub_hi |
| 163560 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub -> FPR64 |
| 163561 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub0 |
| 163562 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1 -> FPR64 |
| 163563 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2 -> FPR64 |
| 163564 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3 -> FPR64 |
| 163565 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub_hi |
| 163566 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2:hsub -> FPR16 |
| 163567 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:hsub_hi |
| 163568 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:psub |
| 163569 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:psub0 |
| 163570 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:psub1 |
| 163571 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub0 |
| 163572 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub1 -> FPR128 |
| 163573 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub2 -> FPR128 |
| 163574 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub3 -> FPR128 |
| 163575 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2:ssub -> FPR32 |
| 163576 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:ssub_hi |
| 163577 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sub_32 |
| 163578 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sub_32_hi |
| 163579 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sube32 |
| 163580 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sube64 |
| 163581 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:subo32 |
| 163582 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:subo64 |
| 163583 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_0 |
| 163584 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_1 |
| 163585 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_2 |
| 163586 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_3 |
| 163587 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_4 |
| 163588 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_5 |
| 163589 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_6 |
| 163590 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_7 |
| 163591 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubb |
| 163592 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubd0 |
| 163593 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubd1 |
| 163594 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh0 |
| 163595 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1 |
| 163596 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubq0 |
| 163597 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubq1 |
| 163598 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs0 |
| 163599 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1 |
| 163600 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub -> FPR128 |
| 163601 | 96, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub0 -> ZPRMul2 |
| 163602 | 96, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 163603 | 96, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub2 -> ZPRMul2 |
| 163604 | 96, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub3 -> ZPRMul2 |
| 163605 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub_hi |
| 163606 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq0 |
| 163607 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubd1_then_zasubq1 |
| 163608 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd0 |
| 163609 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1 |
| 163610 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq0 |
| 163611 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubq1 |
| 163612 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 163613 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 163614 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd0 |
| 163615 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1 |
| 163616 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq0 |
| 163617 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubq1 |
| 163618 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs0 |
| 163619 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1 |
| 163620 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 163621 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 163622 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 163623 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 163624 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 163625 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 163626 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163627 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163628 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 163629 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_bsub_hi |
| 163630 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 163631 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_hsub_hi |
| 163632 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 163633 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_then_ssub_hi |
| 163634 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 163635 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_bsub_hi |
| 163636 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_hsub -> FPR16 |
| 163637 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_hsub_hi |
| 163638 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_ssub -> FPR32 |
| 163639 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub3_then_ssub_hi |
| 163640 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 163641 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_bsub_hi |
| 163642 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 163643 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_hsub_hi |
| 163644 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 163645 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_then_ssub_hi |
| 163646 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:psub1_then_psub |
| 163647 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub1_then_dsub_hi |
| 163648 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub3_then_dsub_hi |
| 163649 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub2_then_dsub_hi |
| 163650 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32 |
| 163651 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 163652 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32 |
| 163653 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 163654 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32 |
| 163655 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 163656 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32 |
| 163657 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 163658 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32 |
| 163659 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 163660 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32 |
| 163661 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 163662 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32 |
| 163663 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 163664 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:subo64_then_sub_32 |
| 163665 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:subo64_then_sub_32_hi |
| 163666 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub1_then_zsub_hi |
| 163667 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub3_then_zsub_hi |
| 163668 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub2_then_zsub_hi |
| 163669 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub0_dsub1 |
| 163670 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 163671 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_dsub2 |
| 163672 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub1_dsub2_dsub3 |
| 163673 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub2_dsub3 |
| 163674 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub_dsub1 |
| 163675 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 |
| 163676 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:dsub_dsub1_dsub2 |
| 163677 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub0_qsub1 |
| 163678 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 163679 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub1_qsub2 |
| 163680 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub1_qsub2_qsub3 |
| 163681 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:qsub2_qsub3 |
| 163682 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 163683 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_0_x8sub_1 |
| 163684 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_2_x8sub_3 |
| 163685 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_4_x8sub_5 |
| 163686 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_6_x8sub_7 |
| 163687 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163688 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163689 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163690 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 163691 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub_qsub1 |
| 163692 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 |
| 163693 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub_qsub1_qsub2 |
| 163694 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub0_zsub1 |
| 163695 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub0_zsub1_zsub2 |
| 163696 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub1_zsub2 |
| 163697 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub1_zsub2_zsub3 |
| 163698 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub2_zsub3 |
| 163699 | 153, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 163700 | 153, // ZPR4Strided_with_zsub0_in_ZPRMul2:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 163701 | }, |
| 163702 | { // ZPR4Strided_with_zsub1_in_ZPR_K |
| 163703 | 7, // ZPR4Strided_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 163704 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:bsub_hi |
| 163705 | 56, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 163706 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub0 |
| 163707 | 56, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 163708 | 56, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 163709 | 56, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 163710 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub_hi |
| 163711 | 8, // ZPR4Strided_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 163712 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:hsub_hi |
| 163713 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:psub |
| 163714 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:psub0 |
| 163715 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:psub1 |
| 163716 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub0 |
| 163717 | 92, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 163718 | 92, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 163719 | 92, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 163720 | 40, // ZPR4Strided_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 163721 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:ssub_hi |
| 163722 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sub_32 |
| 163723 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sub_32_hi |
| 163724 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sube32 |
| 163725 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sube64 |
| 163726 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:subo32 |
| 163727 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:subo64 |
| 163728 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_0 |
| 163729 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_1 |
| 163730 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_2 |
| 163731 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_3 |
| 163732 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_4 |
| 163733 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_5 |
| 163734 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_6 |
| 163735 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_7 |
| 163736 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubb |
| 163737 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubd0 |
| 163738 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubd1 |
| 163739 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh0 |
| 163740 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1 |
| 163741 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubq0 |
| 163742 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubq1 |
| 163743 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs0 |
| 163744 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1 |
| 163745 | 92, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 163746 | 93, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub0 -> ZPR |
| 163747 | 103, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 163748 | 93, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 163749 | 103, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub3 -> ZPR_K |
| 163750 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub_hi |
| 163751 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 163752 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 163753 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 163754 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 163755 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 163756 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 163757 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 163758 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 163759 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 163760 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 163761 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 163762 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 163763 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 163764 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 163765 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 163766 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 163767 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 163768 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 163769 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 163770 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 163771 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163772 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163773 | 7, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 163774 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 163775 | 8, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 163776 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 163777 | 40, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 163778 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 163779 | 7, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 163780 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 163781 | 8, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 163782 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 163783 | 40, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 163784 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 163785 | 7, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 163786 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 163787 | 8, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 163788 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 163789 | 40, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 163790 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 163791 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:psub1_then_psub |
| 163792 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 163793 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 163794 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 163795 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 163796 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 163797 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 163798 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 163799 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 163800 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 163801 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 163802 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 163803 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 163804 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 163805 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 163806 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 163807 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 163808 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 163809 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 163810 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 163811 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 163812 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 163813 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 163814 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 163815 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 163816 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_dsub2 |
| 163817 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 |
| 163818 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub2_dsub3 |
| 163819 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub_dsub1 |
| 163820 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 |
| 163821 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 |
| 163822 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 163823 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 163824 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub1_qsub2 |
| 163825 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 |
| 163826 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:qsub2_qsub3 |
| 163827 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 163828 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 163829 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 163830 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 163831 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 163832 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163833 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163834 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163835 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 163836 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub_qsub1 |
| 163837 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 |
| 163838 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 |
| 163839 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub0_zsub1 |
| 163840 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 |
| 163841 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub1_zsub2 |
| 163842 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 |
| 163843 | 0, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub2_zsub3 |
| 163844 | 135, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub0_zsub2 -> ZPR2Strided |
| 163845 | 178, // ZPR4Strided_with_zsub1_in_ZPR_K:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPR_K |
| 163846 | }, |
| 163847 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 163848 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 163849 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:bsub_hi |
| 163850 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 163851 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0 |
| 163852 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 163853 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 163854 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3 -> FPR64 |
| 163855 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_hi |
| 163856 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 163857 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:hsub_hi |
| 163858 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:psub |
| 163859 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:psub0 |
| 163860 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:psub1 |
| 163861 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0 |
| 163862 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 163863 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 163864 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3 -> FPR128 |
| 163865 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 163866 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:ssub_hi |
| 163867 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32 |
| 163868 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_hi |
| 163869 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sube32 |
| 163870 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sube64 |
| 163871 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:subo32 |
| 163872 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:subo64 |
| 163873 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0 |
| 163874 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1 |
| 163875 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2 |
| 163876 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3 |
| 163877 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4 |
| 163878 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5 |
| 163879 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6 |
| 163880 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7 |
| 163881 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubb |
| 163882 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd0 |
| 163883 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1 |
| 163884 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh0 |
| 163885 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1 |
| 163886 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq0 |
| 163887 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq1 |
| 163888 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs0 |
| 163889 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1 |
| 163890 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 163891 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_K |
| 163892 | 96, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 163893 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 163894 | 96, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3 -> ZPRMul2 |
| 163895 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_hi |
| 163896 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 163897 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 163898 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 163899 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 163900 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 163901 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 163902 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 163903 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 163904 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 163905 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 163906 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 163907 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 163908 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 163909 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 163910 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 163911 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 163912 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 163913 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 163914 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 163915 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 163916 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 163917 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 163918 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 163919 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 163920 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 163921 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 163922 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 163923 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 163924 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 163925 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 163926 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub -> FPR16 |
| 163927 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 163928 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub -> FPR32 |
| 163929 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 163930 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 163931 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 163932 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 163933 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 163934 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 163935 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 163936 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 163937 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 163938 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 163939 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 163940 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 163941 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 163942 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 163943 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 163944 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 163945 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 163946 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 163947 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 163948 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 163949 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 163950 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 163951 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 163952 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 163953 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 163954 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 163955 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 163956 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 163957 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 163958 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 163959 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 163960 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 163961 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 163962 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD |
| 163963 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_dsub3 -> DD |
| 163964 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 163965 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 163966 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 163967 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 163968 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 163969 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 163970 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ |
| 163971 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_qsub3 -> QQ |
| 163972 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 163973 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 163974 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 163975 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 163976 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 163977 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 163978 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 163979 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 163980 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 163981 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 163982 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 163983 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 163984 | 179, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 163985 | 252, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 163986 | 134, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 163987 | 213, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 163988 | 138, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 163989 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 163990 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 163991 | }, |
| 163992 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 163993 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:bsub -> FPR8 |
| 163994 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:bsub_hi |
| 163995 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub -> FPR64 |
| 163996 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0 |
| 163997 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1 -> FPR64 |
| 163998 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2 -> FPR64 |
| 163999 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3 -> FPR64 |
| 164000 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_hi |
| 164001 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:hsub -> FPR16 |
| 164002 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:hsub_hi |
| 164003 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub |
| 164004 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub0 |
| 164005 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub1 |
| 164006 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0 |
| 164007 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1 -> FPR128 |
| 164008 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2 -> FPR128 |
| 164009 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub3 -> FPR128 |
| 164010 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:ssub -> FPR32 |
| 164011 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:ssub_hi |
| 164012 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32 |
| 164013 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_hi |
| 164014 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sube32 |
| 164015 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sube64 |
| 164016 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo32 |
| 164017 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64 |
| 164018 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_0 |
| 164019 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1 |
| 164020 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2 |
| 164021 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3 |
| 164022 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4 |
| 164023 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5 |
| 164024 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6 |
| 164025 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7 |
| 164026 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubb |
| 164027 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd0 |
| 164028 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1 |
| 164029 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh0 |
| 164030 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1 |
| 164031 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubq0 |
| 164032 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubq1 |
| 164033 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs0 |
| 164034 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1 |
| 164035 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub -> FPR128 |
| 164036 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0 -> ZPR_K |
| 164037 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1 -> ZPR_K |
| 164038 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2 -> ZPR_K |
| 164039 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub3 -> ZPR |
| 164040 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_hi |
| 164041 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq0 |
| 164042 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubd1_then_zasubq1 |
| 164043 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd0 |
| 164044 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1 |
| 164045 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq0 |
| 164046 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubq1 |
| 164047 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 164048 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 164049 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd0 |
| 164050 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1 |
| 164051 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq0 |
| 164052 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubq1 |
| 164053 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs0 |
| 164054 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1 |
| 164055 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 164056 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 164057 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 164058 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 164059 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 164060 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 164061 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164062 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164063 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 164064 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_bsub_hi |
| 164065 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 164066 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_hsub_hi |
| 164067 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 164068 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_then_ssub_hi |
| 164069 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 164070 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_bsub_hi |
| 164071 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 164072 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_hsub_hi |
| 164073 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 164074 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub3_then_ssub_hi |
| 164075 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 164076 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_bsub_hi |
| 164077 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 164078 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_hsub_hi |
| 164079 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 164080 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_then_ssub_hi |
| 164081 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:psub1_then_psub |
| 164082 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_then_dsub_hi |
| 164083 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub3_then_dsub_hi |
| 164084 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2_then_dsub_hi |
| 164085 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32 |
| 164086 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 164087 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32 |
| 164088 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 164089 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32 |
| 164090 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 164091 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32 |
| 164092 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 164093 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32 |
| 164094 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 164095 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32 |
| 164096 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 164097 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32 |
| 164098 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 164099 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32 |
| 164100 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:subo64_then_sub_32_hi |
| 164101 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_then_zsub_hi |
| 164102 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub3_then_zsub_hi |
| 164103 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2_then_zsub_hi |
| 164104 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1 |
| 164105 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub0_dsub1_dsub2 |
| 164106 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2 -> DD |
| 164107 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 164108 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub2_dsub3 -> DD |
| 164109 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1 -> DD |
| 164110 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 164111 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 164112 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1 |
| 164113 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub0_qsub1_qsub2 |
| 164114 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2 -> QQ |
| 164115 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 164116 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:qsub2_qsub3 -> QQ |
| 164117 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 164118 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_0_x8sub_1 |
| 164119 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_x8sub_3 |
| 164120 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_x8sub_5 |
| 164121 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_x8sub_7 |
| 164122 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164123 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164124 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164125 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 164126 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1 -> QQ |
| 164127 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 164128 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 164129 | 169, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 164130 | 253, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 164131 | 169, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 164132 | 249, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 164133 | 156, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K |
| 164134 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub0_zsub2 |
| 164135 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K:zsub1_zsub3 |
| 164136 | }, |
| 164137 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164138 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 164139 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 164140 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 164141 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 164142 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 164143 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 164144 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 164145 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 164146 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 164147 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 164148 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 164149 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 164150 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 164151 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 164152 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 164153 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 164154 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 164155 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 164156 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 164157 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 164158 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 164159 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 164160 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 164161 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 164162 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 164163 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 164164 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 164165 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 164166 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 164167 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 164168 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 164169 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 164170 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 164171 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 164172 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 164173 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 164174 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 164175 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 164176 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 164177 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 164178 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 164179 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 164180 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 164181 | 104, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 164182 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 164183 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Hi |
| 164184 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPR |
| 164185 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 164186 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 164187 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 164188 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 164189 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 164190 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 164191 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 164192 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 164193 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 164194 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 164195 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 164196 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 164197 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 164198 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 164199 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 164200 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 164201 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 164202 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 164203 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 164204 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 164205 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 164206 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164207 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164208 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 164209 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 164210 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 164211 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 164212 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 164213 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 164214 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 164215 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 164216 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 164217 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 164218 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 164219 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 164220 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 164221 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 164222 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 164223 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 164224 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 164225 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 164226 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 164227 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 164228 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 164229 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 164230 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 164231 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 164232 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 164233 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 164234 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 164235 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 164236 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 164237 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 164238 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 164239 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 164240 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 164241 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 164242 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 164243 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 164244 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 164245 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 164246 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 164247 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 164248 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 164249 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 164250 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 164251 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 164252 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 164253 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD |
| 164254 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 164255 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 164256 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 164257 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 164258 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 164259 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 164260 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 164261 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 164262 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 164263 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 164264 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 164265 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 164266 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 164267 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164268 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164269 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164270 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 164271 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 164272 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 164273 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 164274 | 170, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164275 | 254, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164276 | 157, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 164277 | 231, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 164278 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 164279 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 164280 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 164281 | }, |
| 164282 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164283 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 164284 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 164285 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 164286 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 164287 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 164288 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 164289 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64_lo |
| 164290 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 164291 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 164292 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 164293 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 164294 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 164295 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 164296 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 164297 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 164298 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 164299 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128_lo |
| 164300 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164301 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 164302 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 164303 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 164304 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 164305 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 164306 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 164307 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 164308 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 164309 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 164310 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 164311 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 164312 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 164313 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 164314 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 164315 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 164316 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 164317 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 164318 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 164319 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 164320 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 164321 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 164322 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 164323 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 164324 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 164325 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 164326 | 105, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Lo_and_ZPRMul4 |
| 164327 | 97, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR_4b |
| 164328 | 100, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Lo |
| 164329 | 97, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPR_4b |
| 164330 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 164331 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 164332 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 164333 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 164334 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 164335 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 164336 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 164337 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 164338 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 164339 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 164340 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 164341 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 164342 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 164343 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 164344 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 164345 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 164346 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 164347 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 164348 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 164349 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 164350 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 164351 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164352 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164353 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 164354 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 164355 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 164356 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 164357 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164358 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 164359 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 164360 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 164361 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 164362 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 164363 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164364 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 164365 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 164366 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 164367 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 164368 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 164369 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164370 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 164371 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 164372 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 164373 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 164374 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 164375 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 164376 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 164377 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 164378 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 164379 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 164380 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 164381 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 164382 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 164383 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 164384 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 164385 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 164386 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 164387 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 164388 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 164389 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 164390 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 164391 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 164392 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 164393 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 164394 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 164395 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 164396 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164397 | 116, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 164398 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164399 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164400 | 127, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 164401 | 116, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 164402 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 164403 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 164404 | 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 164405 | 220, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 164406 | 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 164407 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 164408 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 164409 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 164410 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 164411 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 164412 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164413 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164414 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164415 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 164416 | 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 164417 | 320, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 164418 | 220, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 164419 | 171, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164420 | 256, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164421 | 165, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 164422 | 246, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 164423 | 149, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 164424 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 164425 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 164426 | }, |
| 164427 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 164428 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 164429 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 164430 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 164431 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 164432 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 164433 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 164434 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 164435 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 164436 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 164437 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 164438 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 164439 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 164440 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 164441 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 164442 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 164443 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 164444 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 164445 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 164446 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 164447 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 164448 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 164449 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 164450 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 164451 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 164452 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 164453 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 164454 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 164455 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 164456 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 164457 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 164458 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 164459 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 164460 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 164461 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 164462 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 164463 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 164464 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 164465 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 164466 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 164467 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 164468 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 164469 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 164470 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 164471 | 107, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPRMul2_and_ZPR_K |
| 164472 | 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 164473 | 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPRMul2 |
| 164474 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 -> ZPR |
| 164475 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 164476 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 164477 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 164478 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 164479 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 164480 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 164481 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 164482 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 164483 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 164484 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 164485 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 164486 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 164487 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 164488 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 164489 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 164490 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 164491 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 164492 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 164493 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 164494 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 164495 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 164496 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164497 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164498 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 164499 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 164500 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 164501 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 164502 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 164503 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 164504 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 164505 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 164506 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 164507 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 164508 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 164509 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 164510 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 164511 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 164512 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 164513 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 164514 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 164515 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 164516 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 164517 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 164518 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 164519 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 164520 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 164521 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 164522 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 164523 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 164524 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 164525 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 164526 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 164527 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 164528 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 164529 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 164530 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 164531 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 164532 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 164533 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 164534 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 164535 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 164536 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 164537 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 164538 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 164539 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 164540 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 164541 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 164542 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 164543 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 164544 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 164545 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 164546 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 164547 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 164548 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 164549 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 164550 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 164551 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 164552 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 164553 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 164554 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 164555 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 164556 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 164557 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164558 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164559 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164560 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 164561 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 164562 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 164563 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 164564 | 172, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 164565 | 257, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 164566 | 179, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 164567 | 252, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 164568 | 134, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2 |
| 164569 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 164570 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 164571 | }, |
| 164572 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 164573 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 164574 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 164575 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 164576 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 164577 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 164578 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 164579 | 65, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 164580 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 164581 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 164582 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 164583 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 164584 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 164585 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 164586 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 164587 | 98, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 164588 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_lo |
| 164589 | 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 164590 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164591 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 164592 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 164593 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 164594 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 164595 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 164596 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 164597 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 164598 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 164599 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 164600 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 164601 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 164602 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 164603 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 164604 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 164605 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 164606 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 164607 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 164608 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 164609 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 164610 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 164611 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 164612 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 164613 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 164614 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 164615 | 98, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 164616 | 106, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul2_and_ZPR_3b |
| 164617 | 102, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 164618 | 100, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPRMul2_Lo |
| 164619 | 97, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_4b |
| 164620 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 164621 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 164622 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 164623 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 164624 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 164625 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 164626 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 164627 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 164628 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 164629 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 164630 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 164631 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 164632 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 164633 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 164634 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 164635 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 164636 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 164637 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 164638 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 164639 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 164640 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 164641 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164642 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164643 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 164644 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 164645 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 164646 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 164647 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164648 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 164649 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 164650 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 164651 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 164652 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 164653 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164654 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 164655 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 164656 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 164657 | 10, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 164658 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 164659 | 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 164660 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 164661 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 164662 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 164663 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 164664 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 164665 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 164666 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 164667 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 164668 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 164669 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 164670 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 164671 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 164672 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 164673 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 164674 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 164675 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 164676 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 164677 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 164678 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 164679 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 164680 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 164681 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 164682 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 164683 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 164684 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 164685 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 164686 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164687 | 116, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 164688 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164689 | 79, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 164690 | 127, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 164691 | 116, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 164692 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 164693 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 164694 | 146, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 164695 | 222, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 164696 | 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 164697 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 164698 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 164699 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 164700 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 164701 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 164702 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164703 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164704 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164705 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 164706 | 163, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 164707 | 353, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 164708 | 242, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 164709 | 173, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 164710 | 258, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 164711 | 184, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 164712 | 267, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 164713 | 149, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2Mul2_Lo |
| 164714 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 164715 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 164716 | }, |
| 164717 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 164718 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 164719 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 164720 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64 |
| 164721 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 164722 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64 |
| 164723 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 164724 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3 -> FPR64 |
| 164725 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 164726 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16 |
| 164727 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 164728 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub |
| 164729 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 164730 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 164731 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 164732 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128 |
| 164733 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 164734 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3 -> FPR128 |
| 164735 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32 |
| 164736 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 164737 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 164738 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 164739 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 164740 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 164741 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 164742 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 164743 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 164744 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 164745 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 164746 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 164747 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 164748 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 164749 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 164750 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 164751 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 164752 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 164753 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 164754 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 164755 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 164756 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 164757 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 164758 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 164759 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 164760 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128 |
| 164761 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_Hi |
| 164762 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPR |
| 164763 | 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 164764 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3 -> ZPR |
| 164765 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 164766 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 164767 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 164768 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 164769 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 164770 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 164771 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 164772 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 164773 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 164774 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 164775 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 164776 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 164777 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 164778 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 164779 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 164780 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 164781 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 164782 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 164783 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 164784 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 164785 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 164786 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164787 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164788 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 164789 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 164790 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 164791 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 164792 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 164793 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 164794 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 164795 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 164796 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 164797 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 164798 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 164799 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 164800 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 164801 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 164802 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 164803 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 164804 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 164805 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 164806 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 164807 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 164808 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 164809 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 164810 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 164811 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 164812 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 164813 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 164814 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 164815 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 164816 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 164817 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 164818 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 164819 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 164820 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 164821 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 164822 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 164823 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 164824 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 164825 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 164826 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 164827 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 164828 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 164829 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 164830 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 164831 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD |
| 164832 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 164833 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 -> DD |
| 164834 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD |
| 164835 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 164836 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 164837 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 164838 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 164839 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 164840 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 164841 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 164842 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 164843 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 164844 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 164845 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 164846 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 164847 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164848 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164849 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164850 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 164851 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ |
| 164852 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 164853 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 164854 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 164855 | 255, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 164856 | 159, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 164857 | 233, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul4 |
| 164858 | 155, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 164859 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 164860 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 164861 | }, |
| 164862 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 164863 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 164864 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 164865 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 164866 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 164867 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 164868 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 164869 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 164870 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 164871 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 164872 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 164873 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 164874 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 164875 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 164876 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 164877 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 164878 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 164879 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 164880 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 164881 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 164882 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 164883 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 164884 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 164885 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 164886 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 164887 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 164888 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 164889 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 164890 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 164891 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 164892 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 164893 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 164894 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 164895 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 164896 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 164897 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 164898 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 164899 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 164900 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 164901 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 164902 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 164903 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 164904 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 164905 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 164906 | 93, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR |
| 164907 | 104, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 164908 | 93, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR |
| 164909 | 99, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPRMul2_Hi |
| 164910 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 164911 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 164912 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 164913 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 164914 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 164915 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 164916 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 164917 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 164918 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 164919 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 164920 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 164921 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 164922 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 164923 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 164924 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 164925 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 164926 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 164927 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 164928 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 164929 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 164930 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 164931 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 164932 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 164933 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 164934 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 164935 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 164936 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 164937 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 164938 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 164939 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 164940 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 164941 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 164942 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 164943 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 164944 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 164945 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 164946 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 164947 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 164948 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 164949 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 164950 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 164951 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 164952 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 164953 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 164954 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 164955 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 164956 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 164957 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 164958 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 164959 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 164960 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 164961 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 164962 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 164963 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 164964 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 164965 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 164966 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 164967 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 164968 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 164969 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 164970 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 164971 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 164972 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 164973 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 164974 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 164975 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 164976 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 164977 | 110, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 164978 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD |
| 164979 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 164980 | 117, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 164981 | 110, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 164982 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 164983 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 164984 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 164985 | 206, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 164986 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 164987 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 164988 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 164989 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 164990 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 164991 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 164992 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 164993 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 164994 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 164995 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 164996 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 164997 | 297, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 164998 | 206, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 164999 | 180, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 165000 | 259, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165001 | 170, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165002 | 254, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165003 | 157, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 165004 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 165005 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 165006 | }, |
| 165007 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165008 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 165009 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 165010 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 165011 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 165012 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 165013 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 165014 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64_lo |
| 165015 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 165016 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 165017 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 165018 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 165019 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 165020 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 165021 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 165022 | 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 165023 | 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 165024 | 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128_lo |
| 165025 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 165026 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 165027 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 165028 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 165029 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 165030 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 165031 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 165032 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 165033 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 165034 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 165035 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 165036 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 165037 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 165038 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 165039 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 165040 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 165041 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 165042 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 165043 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 165044 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 165045 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 165046 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 165047 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 165048 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 165049 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 165050 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 165051 | 93, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR |
| 165052 | 105, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 165053 | 97, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR_4b |
| 165054 | 100, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPRMul2_Lo |
| 165055 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 165056 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 165057 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 165058 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 165059 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 165060 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 165061 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 165062 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 165063 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 165064 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 165065 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 165066 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 165067 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 165068 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 165069 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 165070 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 165071 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 165072 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 165073 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 165074 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 165075 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 165076 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165077 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165078 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 165079 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 165080 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 165081 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 165082 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165083 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 165084 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 165085 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 165086 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 165087 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 165088 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165089 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 165090 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 165091 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 165092 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 165093 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 165094 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165095 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 165096 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 165097 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 165098 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 165099 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 165100 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 165101 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 165102 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 165103 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 165104 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 165105 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 165106 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 165107 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 165108 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 165109 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 165110 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 165111 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 165112 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 165113 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 165114 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 165115 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 165116 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 165117 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 165118 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 165119 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 165120 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 165121 | 79, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 165122 | 116, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 165123 | 79, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 165124 | 77, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 165125 | 126, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 165126 | 115, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 165127 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 165128 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 165129 | 140, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 165130 | 220, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 165131 | 140, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 165132 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 165133 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 165134 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 165135 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 165136 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 165137 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165138 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165139 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165140 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 165141 | 132, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_dsub1_in_FPR64_lo |
| 165142 | 316, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 165143 | 216, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 165144 | 181, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 165145 | 260, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165146 | 171, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165147 | 256, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165148 | 165, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 165149 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 165150 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 165151 | }, |
| 165152 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 165153 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 165154 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 165155 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 165156 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 165157 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 165158 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 165159 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 165160 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 165161 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 165162 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 165163 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 165164 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 165165 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 165166 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 165167 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 165168 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 165169 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 165170 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 165171 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 165172 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 165173 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 165174 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 165175 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 165176 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 165177 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 165178 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 165179 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 165180 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 165181 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 165182 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 165183 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 165184 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 165185 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 165186 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 165187 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 165188 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 165189 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 165190 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 165191 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 165192 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 165193 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 165194 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 165195 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 165196 | 93, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR |
| 165197 | 107, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 165198 | 103, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPR_K |
| 165199 | 96, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 -> ZPRMul2 |
| 165200 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 165201 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 165202 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 165203 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 165204 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 165205 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 165206 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 165207 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 165208 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 165209 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 165210 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 165211 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 165212 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 165213 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 165214 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 165215 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 165216 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 165217 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 165218 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 165219 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 165220 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 165221 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165222 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165223 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 165224 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 165225 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 165226 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 165227 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 165228 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 165229 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 165230 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 165231 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 165232 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 165233 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 165234 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 165235 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 165236 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 165237 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 165238 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 165239 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 165240 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 165241 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 165242 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 165243 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 165244 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 165245 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 165246 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 165247 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 165248 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 165249 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 165250 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 165251 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 165252 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 165253 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 165254 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 165255 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 165256 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 165257 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 165258 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 165259 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 165260 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 165261 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 165262 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 165263 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 165264 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 165265 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 165266 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 165267 | 110, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 165268 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 165269 | 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 165270 | 117, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 165271 | 110, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 165272 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 165273 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 165274 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 165275 | 206, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 165276 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 165277 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 165278 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 165279 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 165280 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 165281 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 165282 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165283 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165284 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165285 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 165286 | 128, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 165287 | 297, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 165288 | 206, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 165289 | 183, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 165290 | 261, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 165291 | 172, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 165292 | 257, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 165293 | 179, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 165294 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 165295 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 165296 | }, |
| 165297 | { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 165298 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 165299 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 165300 | 56, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64 |
| 165301 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 165302 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 165303 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 165304 | 65, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 165305 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 165306 | 8, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16 |
| 165307 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 165308 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 165309 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 165310 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 165311 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 165312 | 98, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 165313 | 98, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 165314 | 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 165315 | 40, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32 |
| 165316 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 165317 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 165318 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 165319 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 165320 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 165321 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 165322 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 165323 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 165324 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 165325 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 165326 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 165327 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 165328 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 165329 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 165330 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 165331 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 165332 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 165333 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 165334 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 165335 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 165336 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 165337 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 165338 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 165339 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 165340 | 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128 |
| 165341 | 93, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPR |
| 165342 | 106, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPRMul2_and_ZPR_3b |
| 165343 | 102, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 165344 | 100, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 -> ZPRMul2_Lo |
| 165345 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 165346 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 165347 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 165348 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 165349 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 165350 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 165351 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 165352 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 165353 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 165354 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 165355 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 165356 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 165357 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 165358 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 165359 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 165360 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 165361 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 165362 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 165363 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 165364 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 165365 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 165366 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165367 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165368 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 165369 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 165370 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 165371 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 165372 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165373 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 165374 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 165375 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 165376 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 165377 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 165378 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165379 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 165380 | 7, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 165381 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 165382 | 10, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 165383 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 165384 | 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165385 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 165386 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 165387 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 165388 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 165389 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 165390 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 165391 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 165392 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 165393 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 165394 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 165395 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 165396 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 165397 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 165398 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 165399 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 165400 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 165401 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 165402 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 165403 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 165404 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 165405 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 165406 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 165407 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 165408 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 165409 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 165410 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 165411 | 79, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 165412 | 116, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 165413 | 79, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 165414 | 77, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 165415 | 126, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 165416 | 115, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 165417 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 165418 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 165419 | 163, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 165420 | 242, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 165421 | 146, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 165422 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 165423 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 165424 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 165425 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 165426 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 165427 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165428 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165429 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165430 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 165431 | 147, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 165432 | 351, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 165433 | 241, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 165434 | 182, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 165435 | 262, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 165436 | 173, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 165437 | 258, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 165438 | 184, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 165439 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 165440 | 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 165441 | }, |
| 165442 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 165443 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 165444 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:bsub_hi |
| 165445 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub -> FPR64 |
| 165446 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0 |
| 165447 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1 -> FPR64 |
| 165448 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 165449 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3 -> FPR64 |
| 165450 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_hi |
| 165451 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub -> FPR16 |
| 165452 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:hsub_hi |
| 165453 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub |
| 165454 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub0 |
| 165455 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1 |
| 165456 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0 |
| 165457 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1 -> FPR128 |
| 165458 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 165459 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3 -> FPR128 |
| 165460 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub -> FPR32 |
| 165461 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:ssub_hi |
| 165462 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32 |
| 165463 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_hi |
| 165464 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube32 |
| 165465 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sube64 |
| 165466 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo32 |
| 165467 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64 |
| 165468 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0 |
| 165469 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1 |
| 165470 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2 |
| 165471 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3 |
| 165472 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4 |
| 165473 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5 |
| 165474 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6 |
| 165475 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7 |
| 165476 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubb |
| 165477 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd0 |
| 165478 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1 |
| 165479 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh0 |
| 165480 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1 |
| 165481 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq0 |
| 165482 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubq1 |
| 165483 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs0 |
| 165484 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1 |
| 165485 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub -> FPR128 |
| 165486 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0 -> ZPR |
| 165487 | 99, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1 -> ZPRMul2_Hi |
| 165488 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2 -> ZPR |
| 165489 | 101, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3 -> ZPRMul4 |
| 165490 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_hi |
| 165491 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 165492 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 165493 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 165494 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 165495 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 165496 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 165497 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 165498 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 165499 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 165500 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 165501 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 165502 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 165503 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 165504 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 165505 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 165506 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 165507 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 165508 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 165509 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 165510 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 165511 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165512 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165513 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 165514 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 165515 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 165516 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 165517 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 165518 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 165519 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 165520 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 165521 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 165522 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 165523 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 165524 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 165525 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 165526 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 165527 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 165528 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 165529 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 165530 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 165531 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 165532 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 165533 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 165534 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 165535 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 165536 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 165537 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 165538 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 165539 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 165540 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 165541 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 165542 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 165543 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 165544 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 165545 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 165546 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 165547 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 165548 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 165549 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 165550 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 165551 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 165552 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 165553 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 165554 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 165555 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 165556 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD |
| 165557 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 165558 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub2_dsub3 -> DD |
| 165559 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD |
| 165560 | 117, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 165561 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 165562 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 165563 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 165564 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 165565 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 165566 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 165567 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 165568 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 165569 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 165570 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 165571 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 165572 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165573 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165574 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165575 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 165576 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ |
| 165577 | 297, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 165578 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 165579 | 157, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 165580 | 231, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 165581 | 148, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 165582 | 255, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 165583 | 159, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul4 |
| 165584 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 165585 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 165586 | }, |
| 165587 | { // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 165588 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:bsub -> FPR8 |
| 165589 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:bsub_hi |
| 165590 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub -> FPR64 |
| 165591 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0 |
| 165592 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1 -> FPR64 |
| 165593 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2 -> FPR64 |
| 165594 | 56, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3 -> FPR64 |
| 165595 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_hi |
| 165596 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:hsub -> FPR16 |
| 165597 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:hsub_hi |
| 165598 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub |
| 165599 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub0 |
| 165600 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub1 |
| 165601 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0 |
| 165602 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1 -> FPR128 |
| 165603 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2 -> FPR128 |
| 165604 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub3 -> FPR128 |
| 165605 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:ssub -> FPR32 |
| 165606 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:ssub_hi |
| 165607 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32 |
| 165608 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_hi |
| 165609 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sube32 |
| 165610 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sube64 |
| 165611 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo32 |
| 165612 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64 |
| 165613 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_0 |
| 165614 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1 |
| 165615 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2 |
| 165616 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3 |
| 165617 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4 |
| 165618 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5 |
| 165619 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6 |
| 165620 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7 |
| 165621 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubb |
| 165622 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd0 |
| 165623 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1 |
| 165624 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh0 |
| 165625 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1 |
| 165626 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubq0 |
| 165627 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubq1 |
| 165628 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs0 |
| 165629 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1 |
| 165630 | 92, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub -> FPR128 |
| 165631 | 93, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0 -> ZPR |
| 165632 | 103, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1 -> ZPR_K |
| 165633 | 103, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2 -> ZPR_K |
| 165634 | 103, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub3 -> ZPR_K |
| 165635 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_hi |
| 165636 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq0 |
| 165637 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubd1_then_zasubq1 |
| 165638 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd0 |
| 165639 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1 |
| 165640 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq0 |
| 165641 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubq1 |
| 165642 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 165643 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 165644 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd0 |
| 165645 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1 |
| 165646 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq0 |
| 165647 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubq1 |
| 165648 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs0 |
| 165649 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1 |
| 165650 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 165651 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 165652 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 165653 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 165654 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 165655 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 165656 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165657 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165658 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 165659 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_bsub_hi |
| 165660 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 165661 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_hsub_hi |
| 165662 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 165663 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_then_ssub_hi |
| 165664 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 165665 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_bsub_hi |
| 165666 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 165667 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_hsub_hi |
| 165668 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 165669 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub3_then_ssub_hi |
| 165670 | 7, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 165671 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_bsub_hi |
| 165672 | 8, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 165673 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_hsub_hi |
| 165674 | 40, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 165675 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_then_ssub_hi |
| 165676 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:psub1_then_psub |
| 165677 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_then_dsub_hi |
| 165678 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub3_then_dsub_hi |
| 165679 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2_then_dsub_hi |
| 165680 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32 |
| 165681 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 165682 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32 |
| 165683 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 165684 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32 |
| 165685 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 165686 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32 |
| 165687 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 165688 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32 |
| 165689 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 165690 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32 |
| 165691 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 165692 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32 |
| 165693 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 165694 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32 |
| 165695 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:subo64_then_sub_32_hi |
| 165696 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_then_zsub_hi |
| 165697 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub3_then_zsub_hi |
| 165698 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2_then_zsub_hi |
| 165699 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1 |
| 165700 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub0_dsub1_dsub2 |
| 165701 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2 -> DD |
| 165702 | 110, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 165703 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub2_dsub3 -> DD |
| 165704 | 75, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1 -> DD |
| 165705 | 117, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 165706 | 110, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 165707 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1 |
| 165708 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub0_qsub1_qsub2 |
| 165709 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2 -> QQ |
| 165710 | 206, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 165711 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:qsub2_qsub3 -> QQ |
| 165712 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 165713 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_0_x8sub_1 |
| 165714 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_x8sub_3 |
| 165715 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_x8sub_5 |
| 165716 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_x8sub_7 |
| 165717 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165718 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165719 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165720 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 165721 | 128, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1 -> QQ |
| 165722 | 297, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 165723 | 206, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 165724 | 160, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_K |
| 165725 | 250, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 165726 | 169, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 165727 | 253, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 165728 | 169, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 165729 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub0_zsub2 |
| 165730 | 0, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K:zsub1_zsub3 |
| 165731 | }, |
| 165732 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165733 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 165734 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 165735 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 165736 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 165737 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 165738 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 165739 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 165740 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 165741 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 165742 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 165743 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 165744 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 165745 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 165746 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 165747 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 165748 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 165749 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 165750 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 165751 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 165752 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 165753 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 165754 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 165755 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 165756 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 165757 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 165758 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 165759 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 165760 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 165761 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 165762 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 165763 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 165764 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 165765 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 165766 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 165767 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 165768 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 165769 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 165770 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 165771 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 165772 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 165773 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 165774 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 165775 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 165776 | 96, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2 |
| 165777 | 93, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 165778 | 104, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 165779 | 93, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPR |
| 165780 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 165781 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 165782 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 165783 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 165784 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 165785 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 165786 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 165787 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 165788 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 165789 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 165790 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 165791 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 165792 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 165793 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 165794 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 165795 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 165796 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 165797 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 165798 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 165799 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 165800 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 165801 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165802 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165803 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 165804 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 165805 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 165806 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 165807 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 165808 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 165809 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 165810 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 165811 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 165812 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 165813 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 165814 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 165815 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 165816 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 165817 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 165818 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 165819 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 165820 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 165821 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 165822 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 165823 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 165824 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 165825 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 165826 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 165827 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 165828 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 165829 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 165830 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 165831 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 165832 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 165833 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 165834 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 165835 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 165836 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 165837 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 165838 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 165839 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 165840 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 165841 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 165842 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 165843 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 165844 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 165845 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 165846 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 165847 | 110, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 165848 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD |
| 165849 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 165850 | 117, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 165851 | 110, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 165852 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 165853 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 165854 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 165855 | 206, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 165856 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 165857 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 165858 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 165859 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 165860 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 165861 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 165862 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 165863 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 165864 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 165865 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 165866 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 165867 | 297, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 165868 | 206, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 165869 | 134, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 165870 | 263, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 165871 | 180, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 165872 | 259, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165873 | 170, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165874 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 165875 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 165876 | }, |
| 165877 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 165878 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 165879 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 165880 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 165881 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 165882 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 165883 | 65, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 165884 | 65, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64_lo |
| 165885 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 165886 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 165887 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 165888 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 165889 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 165890 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 165891 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 165892 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 165893 | 94, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 165894 | 94, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128_lo |
| 165895 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 165896 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 165897 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 165898 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 165899 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 165900 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 165901 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 165902 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 165903 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 165904 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 165905 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 165906 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 165907 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 165908 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 165909 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 165910 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 165911 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 165912 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 165913 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 165914 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 165915 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 165916 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 165917 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 165918 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 165919 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 165920 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 165921 | 96, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2 |
| 165922 | 93, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR |
| 165923 | 105, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 165924 | 97, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPR_4b |
| 165925 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 165926 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 165927 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 165928 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 165929 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 165930 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 165931 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 165932 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 165933 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 165934 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 165935 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 165936 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 165937 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 165938 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 165939 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 165940 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 165941 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 165942 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 165943 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 165944 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 165945 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 165946 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 165947 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 165948 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 165949 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 165950 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 165951 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 165952 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 165953 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 165954 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 165955 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 165956 | 10, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 165957 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 165958 | 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165959 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 165960 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 165961 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 165962 | 10, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 165963 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 165964 | 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 165965 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 165966 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 165967 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 165968 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 165969 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 165970 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 165971 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 165972 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 165973 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 165974 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 165975 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 165976 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 165977 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 165978 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 165979 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 165980 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 165981 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 165982 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 165983 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 165984 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 165985 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 165986 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 165987 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 165988 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 165989 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 165990 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 165991 | 77, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 165992 | 115, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 165993 | 79, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 165994 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 165995 | 124, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 165996 | 113, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 165997 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 165998 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 165999 | 132, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_dsub1_in_FPR64_lo |
| 166000 | 216, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 166001 | 140, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 166002 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 166003 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 166004 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 166005 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 166006 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 166007 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166008 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166009 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166010 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 166011 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 166012 | 311, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 166013 | 209, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_dsub2_in_FPR64_lo |
| 166014 | 134, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2 |
| 166015 | 264, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 166016 | 181, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 166017 | 260, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 166018 | 171, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 166019 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 166020 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 166021 | }, |
| 166022 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 166023 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 166024 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 166025 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 166026 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 166027 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 166028 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 166029 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 166030 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 166031 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 166032 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 166033 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 166034 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 166035 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 166036 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 166037 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 166038 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 166039 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 166040 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 166041 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 166042 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 166043 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 166044 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 166045 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 166046 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 166047 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 166048 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 166049 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 166050 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 166051 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 166052 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 166053 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 166054 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 166055 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 166056 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 166057 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 166058 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 166059 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 166060 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 166061 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 166062 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 166063 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 166064 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 166065 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 166066 | 99, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPRMul2_Hi |
| 166067 | 93, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 166068 | 107, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPRMul2_and_ZPR_K |
| 166069 | 103, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 -> ZPR_K |
| 166070 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 166071 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 166072 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 166073 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 166074 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 166075 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 166076 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 166077 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 166078 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 166079 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 166080 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 166081 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 166082 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 166083 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 166084 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 166085 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 166086 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 166087 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 166088 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 166089 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 166090 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 166091 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166092 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166093 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 166094 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 166095 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 166096 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 166097 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 166098 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 166099 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 166100 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 166101 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 166102 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 166103 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 166104 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 166105 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 166106 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 166107 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 166108 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 166109 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 166110 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 166111 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 166112 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 166113 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 166114 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 166115 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 166116 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 166117 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 166118 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 166119 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 166120 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 166121 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 166122 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 166123 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 166124 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 166125 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 166126 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 166127 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 166128 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 166129 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 166130 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 166131 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 166132 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 166133 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 166134 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 166135 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 166136 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 166137 | 110, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 166138 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 166139 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 166140 | 117, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 166141 | 110, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 166142 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 166143 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 166144 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 166145 | 206, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 166146 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 166147 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 166148 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 166149 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 166150 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 166151 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 166152 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166153 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166154 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166155 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 166156 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 166157 | 297, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 166158 | 206, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 166159 | 148, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 166160 | 266, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 166161 | 183, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 166162 | 261, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 166163 | 172, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 166164 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 166165 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 166166 | }, |
| 166167 | { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 166168 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 166169 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 166170 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64 |
| 166171 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 166172 | 56, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64 |
| 166173 | 65, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 166174 | 65, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 166175 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 166176 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16 |
| 166177 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 166178 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 166179 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 166180 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 166181 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 166182 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128 |
| 166183 | 98, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 166184 | 98, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 166185 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32 |
| 166186 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 166187 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 166188 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 166189 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 166190 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 166191 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 166192 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 166193 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 166194 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 166195 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 166196 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 166197 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 166198 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 166199 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 166200 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 166201 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 166202 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 166203 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 166204 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 166205 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 166206 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 166207 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 166208 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 166209 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 166210 | 92, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128 |
| 166211 | 96, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul2 |
| 166212 | 93, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR |
| 166213 | 106, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPRMul2_and_ZPR_3b |
| 166214 | 102, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 166215 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 166216 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 166217 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 166218 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 166219 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 166220 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 166221 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 166222 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 166223 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 166224 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 166225 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 166226 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 166227 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 166228 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 166229 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 166230 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 166231 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 166232 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 166233 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 166234 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 166235 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 166236 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166237 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166238 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 166239 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 166240 | 8, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16 |
| 166241 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 166242 | 40, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32 |
| 166243 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 166244 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 166245 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 166246 | 10, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 166247 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 166248 | 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166249 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 166250 | 7, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 166251 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 166252 | 10, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 166253 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 166254 | 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166255 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 166256 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 166257 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 166258 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 166259 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 166260 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 166261 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 166262 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 166263 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 166264 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 166265 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 166266 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 166267 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 166268 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 166269 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 166270 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 166271 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 166272 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 166273 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 166274 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 166275 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 166276 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 166277 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 166278 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 166279 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 166280 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 166281 | 77, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 166282 | 115, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 166283 | 79, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 166284 | 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD |
| 166285 | 124, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 166286 | 113, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 166287 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 166288 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 166289 | 147, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 166290 | 241, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 166291 | 163, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 166292 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 166293 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 166294 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 166295 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 166296 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 166297 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166298 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166299 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166300 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 166301 | 128, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ |
| 166302 | 352, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 166303 | 224, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 166304 | 134, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2Mul2 |
| 166305 | 265, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 166306 | 182, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 166307 | 262, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 166308 | 173, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 166309 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 166310 | 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 166311 | }, |
| 166312 | { // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 166313 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 166314 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 166315 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 166316 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 166317 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 166318 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 166319 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 166320 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 166321 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 166322 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 166323 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 166324 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 166325 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 166326 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 166327 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 166328 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 166329 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 166330 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 166331 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 166332 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 166333 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 166334 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 166335 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 166336 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 166337 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 166338 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 166339 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 166340 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 166341 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 166342 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 166343 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 166344 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 166345 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 166346 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 166347 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 166348 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 166349 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 166350 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 166351 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 166352 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 166353 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 166354 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 166355 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 166356 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR |
| 166357 | 96, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2 |
| 166358 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPR |
| 166359 | 104, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPRMul2_Hi_and_ZPRMul4 |
| 166360 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 166361 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 166362 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 166363 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 166364 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 166365 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 166366 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 166367 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 166368 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 166369 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 166370 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 166371 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 166372 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 166373 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 166374 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 166375 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 166376 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 166377 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 166378 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 166379 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 166380 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 166381 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166382 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166383 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 166384 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 166385 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 166386 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 166387 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 166388 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 166389 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 166390 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 166391 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 166392 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 166393 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 166394 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 166395 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 166396 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 166397 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 166398 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 166399 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 166400 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 166401 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 166402 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 166403 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 166404 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 166405 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 166406 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 166407 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 166408 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 166409 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 166410 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 166411 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 166412 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 166413 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 166414 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 166415 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 166416 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 166417 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 166418 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 166419 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 166420 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 166421 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 166422 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 166423 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 166424 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 166425 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 166426 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 166427 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 166428 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 166429 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 166430 | 117, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 166431 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 166432 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 166433 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 166434 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 166435 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 166436 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 166437 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 166438 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 166439 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 166440 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 166441 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 166442 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166443 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166444 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166445 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 166446 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 166447 | 297, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 166448 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 166449 | 138, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 166450 | 214, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 166451 | 134, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2 |
| 166452 | 263, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 166453 | 180, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 166454 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 166455 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 166456 | }, |
| 166457 | { // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 166458 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 166459 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 166460 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64 |
| 166461 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 166462 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64 |
| 166463 | 56, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64 |
| 166464 | 65, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 -> FPR64_lo |
| 166465 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 166466 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16 |
| 166467 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 166468 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 166469 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 166470 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 166471 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 166472 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128 |
| 166473 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128 |
| 166474 | 94, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 -> FPR128_lo |
| 166475 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32 |
| 166476 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 166477 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 166478 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 166479 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 166480 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 166481 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 166482 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 166483 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 166484 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 166485 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 166486 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 166487 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 166488 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 166489 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 166490 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 166491 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 166492 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 166493 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 166494 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 166495 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 166496 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 166497 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 166498 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 166499 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 166500 | 92, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128 |
| 166501 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPR |
| 166502 | 96, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul2 |
| 166503 | 93, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPR |
| 166504 | 105, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 -> ZPRMul2_Lo_and_ZPRMul4 |
| 166505 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 166506 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 166507 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 166508 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 166509 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 166510 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 166511 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 166512 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 166513 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 166514 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 166515 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 166516 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 166517 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 166518 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 166519 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 166520 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 166521 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 166522 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 166523 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 166524 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 166525 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 166526 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166527 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166528 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 166529 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 166530 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 166531 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 166532 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 166533 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 166534 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 166535 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 166536 | 10, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 166537 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 166538 | 44, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166539 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 166540 | 7, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 166541 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 166542 | 8, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 166543 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 166544 | 40, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 166545 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 166546 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 166547 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 166548 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 166549 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 166550 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 166551 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 166552 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 166553 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 166554 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 166555 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 166556 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 166557 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 166558 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 166559 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 166560 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 166561 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 166562 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 166563 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 166564 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 166565 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 166566 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 166567 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 166568 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 166569 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 166570 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 166571 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 -> DD |
| 166572 | 113, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 166573 | 77, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 166574 | 75, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD |
| 166575 | 121, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 166576 | 110, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 166577 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 166578 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 166579 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 166580 | 209, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_dsub2_in_FPR64_lo |
| 166581 | 132, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 -> QQ_with_dsub1_in_FPR64_lo |
| 166582 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 166583 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 166584 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 166585 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 166586 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 166587 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166588 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166589 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166590 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 166591 | 128, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ |
| 166592 | 301, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub3_in_FPR64_lo |
| 166593 | 206, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 166594 | 138, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 166595 | 214, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 166596 | 134, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2 |
| 166597 | 264, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 166598 | 181, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 166599 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 166600 | 0, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 166601 | }, |
| 166602 | { // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 166603 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 166604 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 166605 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64 |
| 166606 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 166607 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64 |
| 166608 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64 |
| 166609 | 65, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3 -> FPR64_lo |
| 166610 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 166611 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16 |
| 166612 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 166613 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub |
| 166614 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub0 |
| 166615 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1 |
| 166616 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 166617 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128 |
| 166618 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128 |
| 166619 | 98, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 166620 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32 |
| 166621 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 166622 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 166623 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 166624 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube32 |
| 166625 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube64 |
| 166626 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo32 |
| 166627 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64 |
| 166628 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 166629 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 166630 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 166631 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 166632 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 166633 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 166634 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 166635 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 166636 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubb |
| 166637 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 166638 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 166639 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 166640 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 166641 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 166642 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 166643 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 166644 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 166645 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128 |
| 166646 | 93, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPR |
| 166647 | 96, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPRMul2 |
| 166648 | 93, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPR |
| 166649 | 106, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3 -> ZPRMul2_and_ZPR_3b |
| 166650 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 166651 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 166652 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 166653 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 166654 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 166655 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 166656 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 166657 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 166658 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 166659 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 166660 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 166661 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 166662 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 166663 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 166664 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 166665 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 166666 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 166667 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 166668 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 166669 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 166670 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 166671 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166672 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166673 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 166674 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 166675 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16 |
| 166676 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 166677 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32 |
| 166678 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 166679 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 166680 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 166681 | 10, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 166682 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 166683 | 44, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166684 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 166685 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 166686 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 166687 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16 |
| 166688 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 166689 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32 |
| 166690 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 166691 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 166692 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 166693 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 166694 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 166695 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 166696 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 166697 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 166698 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 166699 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 166700 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 166701 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 166702 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 166703 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 166704 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 166705 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 166706 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 166707 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 166708 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 166709 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 166710 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 166711 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 166712 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 166713 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 166714 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 166715 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 166716 | 75, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD |
| 166717 | 113, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 166718 | 77, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 166719 | 75, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD |
| 166720 | 121, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 166721 | 110, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD |
| 166722 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 166723 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 166724 | 128, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ |
| 166725 | 224, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 166726 | 147, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 166727 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 166728 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 166729 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 166730 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 166731 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 166732 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166733 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166734 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166735 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 166736 | 128, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ |
| 166737 | 327, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 166738 | 206, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ |
| 166739 | 138, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 166740 | 214, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 166741 | 134, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2 |
| 166742 | 265, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 166743 | 182, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 166744 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 166745 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 166746 | }, |
| 166747 | { // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 166748 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:bsub -> FPR8 |
| 166749 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:bsub_hi |
| 166750 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub -> FPR64 |
| 166751 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub0 |
| 166752 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1 -> FPR64 |
| 166753 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2 -> FPR64 |
| 166754 | 56, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3 -> FPR64 |
| 166755 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub_hi |
| 166756 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:hsub -> FPR16 |
| 166757 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:hsub_hi |
| 166758 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:psub |
| 166759 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:psub0 |
| 166760 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:psub1 |
| 166761 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub0 |
| 166762 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub1 -> FPR128 |
| 166763 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub2 -> FPR128 |
| 166764 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub3 -> FPR128 |
| 166765 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:ssub -> FPR32 |
| 166766 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:ssub_hi |
| 166767 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sub_32 |
| 166768 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sub_32_hi |
| 166769 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sube32 |
| 166770 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sube64 |
| 166771 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:subo32 |
| 166772 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:subo64 |
| 166773 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_0 |
| 166774 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_1 |
| 166775 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_2 |
| 166776 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_3 |
| 166777 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_4 |
| 166778 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_5 |
| 166779 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_6 |
| 166780 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_7 |
| 166781 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubb |
| 166782 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubd0 |
| 166783 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubd1 |
| 166784 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh0 |
| 166785 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1 |
| 166786 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubq0 |
| 166787 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubq1 |
| 166788 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs0 |
| 166789 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1 |
| 166790 | 92, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub -> FPR128 |
| 166791 | 93, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub0 -> ZPR |
| 166792 | 99, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub1 -> ZPRMul2_Hi |
| 166793 | 93, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub2 -> ZPR |
| 166794 | 107, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub3 -> ZPRMul2_and_ZPR_K |
| 166795 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub_hi |
| 166796 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq0 |
| 166797 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubd1_then_zasubq1 |
| 166798 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd0 |
| 166799 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1 |
| 166800 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq0 |
| 166801 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubq1 |
| 166802 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 166803 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 166804 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd0 |
| 166805 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1 |
| 166806 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq0 |
| 166807 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubq1 |
| 166808 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs0 |
| 166809 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1 |
| 166810 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 166811 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 166812 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 166813 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 166814 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 166815 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 166816 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166817 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166818 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 166819 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_bsub_hi |
| 166820 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 166821 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_hsub_hi |
| 166822 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 166823 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_then_ssub_hi |
| 166824 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub -> FPR8 |
| 166825 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_bsub_hi |
| 166826 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub -> FPR16 |
| 166827 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_hsub_hi |
| 166828 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub -> FPR32 |
| 166829 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub3_then_ssub_hi |
| 166830 | 7, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 166831 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_bsub_hi |
| 166832 | 8, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 166833 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_hsub_hi |
| 166834 | 40, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 166835 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_then_ssub_hi |
| 166836 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:psub1_then_psub |
| 166837 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub1_then_dsub_hi |
| 166838 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub3_then_dsub_hi |
| 166839 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub2_then_dsub_hi |
| 166840 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32 |
| 166841 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 166842 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32 |
| 166843 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 166844 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32 |
| 166845 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 166846 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32 |
| 166847 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 166848 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32 |
| 166849 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 166850 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32 |
| 166851 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 166852 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32 |
| 166853 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 166854 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32 |
| 166855 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:subo64_then_sub_32_hi |
| 166856 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub1_then_zsub_hi |
| 166857 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub3_then_zsub_hi |
| 166858 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub2_then_zsub_hi |
| 166859 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub0_dsub1 |
| 166860 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub0_dsub1_dsub2 |
| 166861 | 75, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_dsub2 -> DD |
| 166862 | 110, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 166863 | 75, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub2_dsub3 -> DD |
| 166864 | 75, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub_dsub1 -> DD |
| 166865 | 117, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 166866 | 110, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 166867 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub0_qsub1 |
| 166868 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub0_qsub1_qsub2 |
| 166869 | 128, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub1_qsub2 -> QQ |
| 166870 | 206, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 166871 | 128, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:qsub2_qsub3 -> QQ |
| 166872 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 166873 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_0_x8sub_1 |
| 166874 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_2_x8sub_3 |
| 166875 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_4_x8sub_5 |
| 166876 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_6_x8sub_7 |
| 166877 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 166878 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 166879 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 166880 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 166881 | 128, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub_qsub1 -> QQ |
| 166882 | 297, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 166883 | 206, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 166884 | 157, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 166885 | 231, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 166886 | 148, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 166887 | 266, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 166888 | 183, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 166889 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub0_zsub2 |
| 166890 | 0, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K:zsub1_zsub3 |
| 166891 | }, |
| 166892 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 166893 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 166894 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:bsub_hi |
| 166895 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub -> FPR64_lo |
| 166896 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0 |
| 166897 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1 -> FPR64_lo |
| 166898 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2 -> FPR64_lo |
| 166899 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3 -> FPR64_lo |
| 166900 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_hi |
| 166901 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:hsub -> FPR16_lo |
| 166902 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:hsub_hi |
| 166903 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:psub |
| 166904 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:psub0 |
| 166905 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:psub1 |
| 166906 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0 |
| 166907 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1 -> FPR128_lo |
| 166908 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2 -> FPR128_lo |
| 166909 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3 -> FPR128_lo |
| 166910 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166911 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:ssub_hi |
| 166912 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32 |
| 166913 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_hi |
| 166914 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sube32 |
| 166915 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sube64 |
| 166916 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:subo32 |
| 166917 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:subo64 |
| 166918 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0 |
| 166919 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1 |
| 166920 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2 |
| 166921 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3 |
| 166922 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4 |
| 166923 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5 |
| 166924 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6 |
| 166925 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7 |
| 166926 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubb |
| 166927 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd0 |
| 166928 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1 |
| 166929 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh0 |
| 166930 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1 |
| 166931 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq0 |
| 166932 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubq1 |
| 166933 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs0 |
| 166934 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1 |
| 166935 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub -> FPR128_0to7 |
| 166936 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_3b |
| 166937 | 100, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2_Lo |
| 166938 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2 -> ZPR_4b |
| 166939 | 100, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3 -> ZPRMul2_Lo |
| 166940 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_hi |
| 166941 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 166942 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 166943 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 166944 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 166945 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 166946 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 166947 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 166948 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 166949 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 166950 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 166951 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 166952 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 166953 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 166954 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 166955 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 166956 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 166957 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 166958 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 166959 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 166960 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 166961 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 166962 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 166963 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 166964 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 166965 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16_lo |
| 166966 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 166967 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166968 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 166969 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 166970 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 166971 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub -> FPR16_lo |
| 166972 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 166973 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166974 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 166975 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 166976 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 166977 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16_lo |
| 166978 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 166979 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 166980 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 166981 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 166982 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 166983 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 166984 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 166985 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 166986 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 166987 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 166988 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 166989 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 166990 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 166991 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 166992 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 166993 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 166994 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 166995 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 166996 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 166997 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 166998 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 166999 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 167000 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 167001 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 167002 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 167003 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 167004 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 167005 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 167006 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167007 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167008 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167009 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167010 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 167011 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167012 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 167013 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 167014 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 167015 | 220, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 167016 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 167017 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 167018 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 167019 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 167020 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 167021 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 167022 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167023 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167024 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167025 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 167026 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 167027 | 324, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 167028 | 222, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 167029 | 184, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 167030 | 267, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 167031 | 149, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 167032 | 247, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 167033 | 165, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 167034 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 167035 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 167036 | }, |
| 167037 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 167038 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 167039 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:bsub_hi |
| 167040 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 167041 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0 |
| 167042 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 167043 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 167044 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3 -> FPR64 |
| 167045 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_hi |
| 167046 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 167047 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:hsub_hi |
| 167048 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:psub |
| 167049 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:psub0 |
| 167050 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:psub1 |
| 167051 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0 |
| 167052 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 167053 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 167054 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3 -> FPR128 |
| 167055 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167056 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:ssub_hi |
| 167057 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32 |
| 167058 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_hi |
| 167059 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sube32 |
| 167060 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sube64 |
| 167061 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:subo32 |
| 167062 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:subo64 |
| 167063 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0 |
| 167064 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1 |
| 167065 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2 |
| 167066 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3 |
| 167067 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4 |
| 167068 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5 |
| 167069 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6 |
| 167070 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7 |
| 167071 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubb |
| 167072 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd0 |
| 167073 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1 |
| 167074 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh0 |
| 167075 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1 |
| 167076 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq0 |
| 167077 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq1 |
| 167078 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs0 |
| 167079 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1 |
| 167080 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub -> FPR128_lo |
| 167081 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_4b |
| 167082 | 101, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 167083 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 167084 | 96, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3 -> ZPRMul2 |
| 167085 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_hi |
| 167086 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 167087 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 167088 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 167089 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 167090 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 167091 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 167092 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 167093 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 167094 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 167095 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 167096 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 167097 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 167098 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 167099 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 167100 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 167101 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 167102 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 167103 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 167104 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 167105 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 167106 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167107 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167108 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 167109 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 167110 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 167111 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 167112 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 167113 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 167114 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 167115 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 167116 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 167117 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 167118 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 167119 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 167120 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 167121 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 167122 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 167123 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 167124 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 167125 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 167126 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 167127 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 167128 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 167129 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 167130 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 167131 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 167132 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 167133 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 167134 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 167135 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 167136 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 167137 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 167138 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 167139 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 167140 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 167141 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 167142 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 167143 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 167144 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 167145 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 167146 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 167147 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 167148 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 167149 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 167150 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 167151 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 167152 | 110, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 167153 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_dsub3 -> DD |
| 167154 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 167155 | 118, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 167156 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 167157 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 167158 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 167159 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 167160 | 206, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 167161 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 167162 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 167163 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 167164 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 167165 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 167166 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 167167 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167168 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167169 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167170 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 167171 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 167172 | 302, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 167173 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 167174 | 185, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 167175 | 268, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 167176 | 155, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 167177 | 227, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 167178 | 138, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 167179 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 167180 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 167181 | }, |
| 167182 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 167183 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 167184 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:bsub_hi |
| 167185 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub -> FPR64_lo |
| 167186 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0 |
| 167187 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1 -> FPR64_lo |
| 167188 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2 -> FPR64 |
| 167189 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3 -> FPR64 |
| 167190 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_hi |
| 167191 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:hsub -> FPR16_lo |
| 167192 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:hsub_hi |
| 167193 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:psub |
| 167194 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:psub0 |
| 167195 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:psub1 |
| 167196 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0 |
| 167197 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1 -> FPR128_lo |
| 167198 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2 -> FPR128 |
| 167199 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub3 -> FPR128 |
| 167200 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167201 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:ssub_hi |
| 167202 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32 |
| 167203 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_hi |
| 167204 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sube32 |
| 167205 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sube64 |
| 167206 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:subo32 |
| 167207 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:subo64 |
| 167208 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_0 |
| 167209 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1 |
| 167210 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2 |
| 167211 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3 |
| 167212 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4 |
| 167213 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5 |
| 167214 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6 |
| 167215 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7 |
| 167216 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubb |
| 167217 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd0 |
| 167218 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1 |
| 167219 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh0 |
| 167220 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1 |
| 167221 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubq0 |
| 167222 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubq1 |
| 167223 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs0 |
| 167224 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1 |
| 167225 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub -> FPR128_lo |
| 167226 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_Lo |
| 167227 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1 -> ZPR_4b |
| 167228 | 101, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 167229 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub3 -> ZPR |
| 167230 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_hi |
| 167231 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 167232 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 167233 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 167234 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 167235 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 167236 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 167237 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 167238 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 167239 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 167240 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 167241 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 167242 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 167243 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 167244 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 167245 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 167246 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 167247 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 167248 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 167249 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 167250 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 167251 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167252 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167253 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 167254 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 167255 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 167256 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 167257 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167258 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 167259 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 167260 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 167261 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 167262 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 167263 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 167264 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 167265 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 167266 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 167267 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 167268 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 167269 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 167270 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 167271 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 167272 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 167273 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 167274 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 167275 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 167276 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 167277 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 167278 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 167279 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 167280 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 167281 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 167282 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 167283 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 167284 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 167285 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 167286 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 167287 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 167288 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 167289 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 167290 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 167291 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 167292 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 167293 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 167294 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 167295 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 167296 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 167297 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 167298 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_dsub3 -> DD |
| 167299 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167300 | 122, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 167301 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 167302 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 167303 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 167304 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 167305 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 167306 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 167307 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 167308 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 167309 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 167310 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 167311 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 167312 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167313 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167314 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167315 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 167316 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 167317 | 312, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 167318 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 167319 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 167320 | 269, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 167321 | 185, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 167322 | 268, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 167323 | 155, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 167324 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 167325 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 167326 | }, |
| 167327 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 167328 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:bsub -> FPR8 |
| 167329 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:bsub_hi |
| 167330 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub -> FPR64_lo |
| 167331 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0 |
| 167332 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1 -> FPR64_lo |
| 167333 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2 -> FPR64_lo |
| 167334 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3 -> FPR64 |
| 167335 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_hi |
| 167336 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:hsub -> FPR16_lo |
| 167337 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:hsub_hi |
| 167338 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:psub |
| 167339 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:psub0 |
| 167340 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:psub1 |
| 167341 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0 |
| 167342 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1 -> FPR128_lo |
| 167343 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2 -> FPR128_lo |
| 167344 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub3 -> FPR128 |
| 167345 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167346 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:ssub_hi |
| 167347 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32 |
| 167348 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_hi |
| 167349 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sube32 |
| 167350 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sube64 |
| 167351 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:subo32 |
| 167352 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:subo64 |
| 167353 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_0 |
| 167354 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1 |
| 167355 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2 |
| 167356 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3 |
| 167357 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4 |
| 167358 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5 |
| 167359 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6 |
| 167360 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7 |
| 167361 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubb |
| 167362 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd0 |
| 167363 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1 |
| 167364 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh0 |
| 167365 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1 |
| 167366 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubq0 |
| 167367 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubq1 |
| 167368 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs0 |
| 167369 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1 |
| 167370 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub -> FPR128_lo |
| 167371 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0 -> ZPR_4b |
| 167372 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1 -> ZPRMul2_Lo |
| 167373 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2 -> ZPR_4b |
| 167374 | 101, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub3 -> ZPRMul4 |
| 167375 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_hi |
| 167376 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq0 |
| 167377 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq1 |
| 167378 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd0 |
| 167379 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1 |
| 167380 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq0 |
| 167381 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq1 |
| 167382 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 167383 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 167384 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd0 |
| 167385 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1 |
| 167386 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq0 |
| 167387 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq1 |
| 167388 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs0 |
| 167389 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1 |
| 167390 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 167391 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 167392 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 167393 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 167394 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 167395 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 167396 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167397 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167398 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 167399 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub_hi |
| 167400 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 167401 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub_hi |
| 167402 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167403 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub_hi |
| 167404 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 167405 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub_hi |
| 167406 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 167407 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub_hi |
| 167408 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 167409 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub_hi |
| 167410 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 167411 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub_hi |
| 167412 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 167413 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub_hi |
| 167414 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167415 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub_hi |
| 167416 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:psub1_then_psub |
| 167417 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_then_dsub_hi |
| 167418 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub3_then_dsub_hi |
| 167419 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2_then_dsub_hi |
| 167420 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32 |
| 167421 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 167422 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32 |
| 167423 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 167424 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32 |
| 167425 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 167426 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32 |
| 167427 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 167428 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32 |
| 167429 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 167430 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32 |
| 167431 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 167432 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32 |
| 167433 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 167434 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32 |
| 167435 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32_hi |
| 167436 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_then_zsub_hi |
| 167437 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub3_then_zsub_hi |
| 167438 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2_then_zsub_hi |
| 167439 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1 |
| 167440 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 167441 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167442 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 167443 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 167444 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167445 | 125, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 167446 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167447 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1 |
| 167448 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 167449 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 167450 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 167451 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 167452 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 167453 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_0_x8sub_1 |
| 167454 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_x8sub_3 |
| 167455 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_x8sub_5 |
| 167456 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_x8sub_7 |
| 167457 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167458 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167459 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167460 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 167461 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 167462 | 317, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 167463 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 167464 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 167465 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 167466 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 167467 | 269, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 167468 | 185, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 167469 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub2 |
| 167470 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub3 |
| 167471 | }, |
| 167472 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 167473 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 167474 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:bsub_hi |
| 167475 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 167476 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0 |
| 167477 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 167478 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 167479 | 56, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3 -> FPR64 |
| 167480 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_hi |
| 167481 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 167482 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:hsub_hi |
| 167483 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub |
| 167484 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub0 |
| 167485 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1 |
| 167486 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0 |
| 167487 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 167488 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 167489 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3 -> FPR128 |
| 167490 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 167491 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:ssub_hi |
| 167492 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32 |
| 167493 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_hi |
| 167494 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube32 |
| 167495 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sube64 |
| 167496 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo32 |
| 167497 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64 |
| 167498 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0 |
| 167499 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1 |
| 167500 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2 |
| 167501 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3 |
| 167502 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4 |
| 167503 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5 |
| 167504 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6 |
| 167505 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7 |
| 167506 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubb |
| 167507 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd0 |
| 167508 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1 |
| 167509 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh0 |
| 167510 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1 |
| 167511 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq0 |
| 167512 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubq1 |
| 167513 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs0 |
| 167514 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1 |
| 167515 | 92, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 167516 | 104, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 167517 | 103, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 167518 | 99, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2 -> ZPRMul2_Hi |
| 167519 | 103, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3 -> ZPR_K |
| 167520 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_hi |
| 167521 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 167522 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 167523 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 167524 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 167525 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 167526 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 167527 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 167528 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 167529 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 167530 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 167531 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 167532 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 167533 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 167534 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 167535 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 167536 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 167537 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 167538 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 167539 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 167540 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 167541 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167542 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167543 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 167544 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 167545 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 167546 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 167547 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 167548 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 167549 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 167550 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 167551 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 167552 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 167553 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 167554 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 167555 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 167556 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 167557 | 8, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 167558 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 167559 | 40, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 167560 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 167561 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:psub1_then_psub |
| 167562 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 167563 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 167564 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 167565 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 167566 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 167567 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 167568 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 167569 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 167570 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 167571 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 167572 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 167573 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 167574 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 167575 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 167576 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 167577 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 167578 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 167579 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 167580 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 167581 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 167582 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 167583 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 167584 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 167585 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 167586 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 167587 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 167588 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD |
| 167589 | 75, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 167590 | 117, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 167591 | 110, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 167592 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 167593 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 167594 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 167595 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 167596 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ |
| 167597 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 167598 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 167599 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 167600 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 167601 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 167602 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167603 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167604 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167605 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 167606 | 128, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 167607 | 297, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 167608 | 206, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 167609 | 194, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 167610 | 279, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 167611 | 195, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 167612 | 281, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 167613 | 172, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 167614 | 190, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 167615 | 200, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 167616 | }, |
| 167617 | { // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 167618 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 167619 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 167620 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 167621 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 167622 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 167623 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 167624 | 65, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 167625 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 167626 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 167627 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 167628 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub |
| 167629 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub0 |
| 167630 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1 |
| 167631 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 167632 | 98, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 167633 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_lo |
| 167634 | 94, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_lo |
| 167635 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167636 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 167637 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 167638 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 167639 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube32 |
| 167640 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sube64 |
| 167641 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo32 |
| 167642 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64 |
| 167643 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 167644 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 167645 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 167646 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 167647 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 167648 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 167649 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 167650 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 167651 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubb |
| 167652 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 167653 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 167654 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 167655 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 167656 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 167657 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 167658 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 167659 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 167660 | 98, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 167661 | 108, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul4_and_ZPR_3b |
| 167662 | 102, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_3b |
| 167663 | 100, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul2_Lo |
| 167664 | 97, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPR_4b |
| 167665 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 167666 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 167667 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 167668 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 167669 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 167670 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 167671 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 167672 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 167673 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 167674 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 167675 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 167676 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 167677 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 167678 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 167679 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 167680 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 167681 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 167682 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 167683 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 167684 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 167685 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 167686 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167687 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167688 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 167689 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 167690 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 167691 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 167692 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167693 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 167694 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 167695 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 167696 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 167697 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 167698 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167699 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 167700 | 7, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 167701 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 167702 | 10, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 167703 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 167704 | 44, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167705 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 167706 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 167707 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 167708 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 167709 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 167710 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 167711 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 167712 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 167713 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 167714 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 167715 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 167716 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 167717 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 167718 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 167719 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 167720 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 167721 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 167722 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 167723 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 167724 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 167725 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 167726 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 167727 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 167728 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 167729 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 167730 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 167731 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167732 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167733 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167734 | 79, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167735 | 127, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 167736 | 116, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167737 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 167738 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 167739 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 167740 | 248, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 167741 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 167742 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 167743 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 167744 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 167745 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 167746 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 167747 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167748 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167749 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167750 | 0, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 167751 | 163, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 167752 | 374, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 167753 | 248, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 167754 | 193, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 167755 | 278, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 167756 | 188, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 167757 | 273, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 167758 | 173, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 167759 | 191, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 167760 | 191, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 167761 | }, |
| 167762 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 167763 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 167764 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 167765 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64 |
| 167766 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 167767 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 167768 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64_lo |
| 167769 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3 -> FPR64_lo |
| 167770 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 167771 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16 |
| 167772 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 167773 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub |
| 167774 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub0 |
| 167775 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1 |
| 167776 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 167777 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 167778 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 167779 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 167780 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32 |
| 167781 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 167782 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 167783 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 167784 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube32 |
| 167785 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube64 |
| 167786 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo32 |
| 167787 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64 |
| 167788 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 167789 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 167790 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 167791 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 167792 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 167793 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 167794 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 167795 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 167796 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubb |
| 167797 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 167798 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 167799 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 167800 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 167801 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 167802 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 167803 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 167804 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 167805 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128 |
| 167806 | 93, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPR |
| 167807 | 106, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPRMul2_and_ZPR_3b |
| 167808 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPR_3b |
| 167809 | 106, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3 -> ZPRMul2_and_ZPR_3b |
| 167810 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 167811 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 167812 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 167813 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 167814 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 167815 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 167816 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 167817 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 167818 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 167819 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 167820 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 167821 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 167822 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 167823 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 167824 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 167825 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 167826 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 167827 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 167828 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 167829 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 167830 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 167831 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167832 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167833 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 167834 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 167835 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 167836 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 167837 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167838 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 167839 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 167840 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 167841 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 167842 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 167843 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167844 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 167845 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 167846 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 167847 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 167848 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 167849 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167850 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 167851 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 167852 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 167853 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 167854 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 167855 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 167856 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 167857 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 167858 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 167859 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 167860 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 167861 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 167862 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 167863 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 167864 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 167865 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 167866 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 167867 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 167868 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 167869 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 167870 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 167871 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 167872 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 167873 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 167874 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 167875 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 167876 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167877 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167878 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 167879 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 167880 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 167881 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 167882 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 167883 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 167884 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 167885 | 248, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 167886 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 167887 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 167888 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 167889 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 167890 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 167891 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 167892 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 167893 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 167894 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 167895 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 167896 | 147, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 167897 | 362, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 167898 | 241, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 167899 | 182, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 167900 | 262, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 167901 | 173, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 167902 | 274, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 167903 | 188, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 167904 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 167905 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 167906 | }, |
| 167907 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 167908 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 167909 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub_hi |
| 167910 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 167911 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0 |
| 167912 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 167913 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 167914 | 65, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3 -> FPR64_lo |
| 167915 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_hi |
| 167916 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 167917 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub_hi |
| 167918 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub |
| 167919 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub0 |
| 167920 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1 |
| 167921 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0 |
| 167922 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 167923 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 167924 | 98, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3 -> FPR128_0to7 |
| 167925 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 167926 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub_hi |
| 167927 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32 |
| 167928 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_hi |
| 167929 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube32 |
| 167930 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube64 |
| 167931 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo32 |
| 167932 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64 |
| 167933 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0 |
| 167934 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1 |
| 167935 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2 |
| 167936 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3 |
| 167937 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4 |
| 167938 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5 |
| 167939 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6 |
| 167940 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7 |
| 167941 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubb |
| 167942 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd0 |
| 167943 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1 |
| 167944 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh0 |
| 167945 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1 |
| 167946 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq0 |
| 167947 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq1 |
| 167948 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs0 |
| 167949 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1 |
| 167950 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 167951 | 103, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 167952 | 93, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 167953 | 93, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2 -> ZPR |
| 167954 | 102, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3 -> ZPR_3b |
| 167955 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_hi |
| 167956 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 167957 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 167958 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 167959 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 167960 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 167961 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 167962 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 167963 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 167964 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 167965 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 167966 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 167967 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 167968 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 167969 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 167970 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 167971 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 167972 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 167973 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 167974 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 167975 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 167976 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 167977 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 167978 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 167979 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 167980 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 167981 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 167982 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 167983 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 167984 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 167985 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 167986 | 10, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16_lo |
| 167987 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 167988 | 44, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 167989 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 167990 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 167991 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 167992 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 167993 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 167994 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 167995 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 167996 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1_then_psub |
| 167997 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 167998 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 167999 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 168000 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 168001 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 168002 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 168003 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 168004 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 168005 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 168006 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 168007 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 168008 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 168009 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 168010 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 168011 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 168012 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 168013 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 168014 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 168015 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 168016 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 168017 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 168018 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 168019 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 168020 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 168021 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 168022 | 113, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 168023 | 77, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 168024 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 168025 | 121, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 168026 | 110, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 168027 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 168028 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 168029 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 168030 | 224, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 168031 | 147, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 168032 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 168033 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 168034 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 168035 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 168036 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 168037 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168038 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168039 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168040 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 168041 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 168042 | 327, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 168043 | 206, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 168044 | 156, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 168045 | 228, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K |
| 168046 | 129, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2 |
| 168047 | 226, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_qsub2_in_FPR128_0to7 |
| 168048 | 154, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 168049 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 168050 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 168051 | }, |
| 168052 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 168053 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 168054 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 168055 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 168056 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 168057 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 168058 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 168059 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 168060 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 168061 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 168062 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 168063 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub |
| 168064 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 168065 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 168066 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 168067 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 168068 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 168069 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 168070 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 168071 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 168072 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 168073 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 168074 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 168075 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 168076 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 168077 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 168078 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 168079 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 168080 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 168081 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 168082 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 168083 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 168084 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 168085 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 168086 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 168087 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 168088 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 168089 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 168090 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 168091 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 168092 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 168093 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 168094 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 168095 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 168096 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_K |
| 168097 | 99, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 168098 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 168099 | 96, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPRMul2 |
| 168100 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 168101 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 168102 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 168103 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 168104 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 168105 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 168106 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 168107 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 168108 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 168109 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 168110 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 168111 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 168112 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 168113 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 168114 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 168115 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 168116 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 168117 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 168118 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 168119 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 168120 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 168121 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168122 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168123 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 168124 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 168125 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 168126 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 168127 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 168128 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 168129 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 168130 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 168131 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 168132 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 168133 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 168134 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 168135 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 168136 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 168137 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 168138 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 168139 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 168140 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 168141 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 168142 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 168143 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 168144 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 168145 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 168146 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 168147 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 168148 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 168149 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 168150 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 168151 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 168152 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 168153 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 168154 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 168155 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 168156 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 168157 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 168158 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 168159 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 168160 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 168161 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 168162 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 168163 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 168164 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 168165 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 168166 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 168167 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 168168 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 168169 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 168170 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 168171 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 168172 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 168173 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 168174 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 168175 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 168176 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 168177 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 168178 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 168179 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 168180 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 168181 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 168182 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168183 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168184 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168185 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 168186 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 168187 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 168188 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 168189 | 187, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168190 | 270, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 168191 | 148, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 168192 | 229, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 168193 | 138, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 168194 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 168195 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 168196 | }, |
| 168197 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168198 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 168199 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 168200 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 168201 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 168202 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 168203 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 168204 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 168205 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 168206 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 168207 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 168208 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 168209 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 168210 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 168211 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 168212 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 168213 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 168214 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 168215 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 168216 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 168217 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 168218 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 168219 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 168220 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 168221 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 168222 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 168223 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 168224 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 168225 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 168226 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 168227 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 168228 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 168229 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 168230 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 168231 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 168232 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 168233 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 168234 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 168235 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 168236 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 168237 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 168238 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 168239 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 168240 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 168241 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi |
| 168242 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR |
| 168243 | 104, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 168244 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPR |
| 168245 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 168246 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 168247 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 168248 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 168249 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 168250 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 168251 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 168252 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 168253 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 168254 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 168255 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 168256 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 168257 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 168258 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 168259 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 168260 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 168261 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 168262 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 168263 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 168264 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 168265 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 168266 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168267 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168268 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 168269 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 168270 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 168271 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 168272 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 168273 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 168274 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 168275 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 168276 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 168277 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 168278 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 168279 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 168280 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 168281 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 168282 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 168283 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 168284 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 168285 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 168286 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 168287 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 168288 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 168289 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 168290 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 168291 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 168292 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 168293 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 168294 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 168295 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 168296 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 168297 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 168298 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 168299 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 168300 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 168301 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 168302 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 168303 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 168304 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 168305 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 168306 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 168307 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 168308 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 168309 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 168310 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 168311 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 168312 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 168313 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 168314 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 168315 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 168316 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 168317 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 168318 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 168319 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 168320 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 168321 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 168322 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 168323 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 168324 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 168325 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 168326 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 168327 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168328 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168329 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168330 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 168331 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 168332 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 168333 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 168334 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 168335 | 271, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168336 | 180, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168337 | 259, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 168338 | 170, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 168339 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 168340 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 168341 | }, |
| 168342 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168343 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 168344 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 168345 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 168346 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 168347 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 168348 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 168349 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 168350 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 168351 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 168352 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 168353 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 168354 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 168355 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 168356 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 168357 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 168358 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 168359 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 168360 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 168361 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 168362 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 168363 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 168364 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 168365 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 168366 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 168367 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 168368 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 168369 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 168370 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 168371 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 168372 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 168373 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 168374 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 168375 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 168376 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 168377 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 168378 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 168379 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 168380 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 168381 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 168382 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 168383 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 168384 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 168385 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 168386 | 107, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_and_ZPR_K |
| 168387 | 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPR_K |
| 168388 | 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 168389 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPR |
| 168390 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 168391 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 168392 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 168393 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 168394 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 168395 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 168396 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 168397 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 168398 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 168399 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 168400 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 168401 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 168402 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 168403 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 168404 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 168405 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 168406 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 168407 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 168408 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 168409 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 168410 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 168411 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168412 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168413 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 168414 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 168415 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 168416 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 168417 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 168418 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 168419 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 168420 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 168421 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 168422 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 168423 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 168424 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 168425 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 168426 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 168427 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 168428 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 168429 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 168430 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 168431 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 168432 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 168433 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 168434 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 168435 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 168436 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 168437 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 168438 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 168439 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 168440 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 168441 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 168442 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 168443 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 168444 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 168445 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 168446 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 168447 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 168448 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 168449 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 168450 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 168451 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 168452 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 168453 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 168454 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 168455 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 168456 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 168457 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 168458 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 168459 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 168460 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 168461 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 168462 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 168463 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 168464 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 168465 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 168466 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 168467 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 168468 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 168469 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 168470 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 168471 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 168472 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168473 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168474 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168475 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 168476 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 168477 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 168478 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 168479 | 172, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 168480 | 272, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168481 | 187, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168482 | 270, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 168483 | 148, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2Mul2_Hi |
| 168484 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 168485 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 168486 | }, |
| 168487 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168488 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 168489 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 168490 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 168491 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 168492 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 168493 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 168494 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 168495 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 168496 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 168497 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 168498 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 168499 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 168500 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 168501 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 168502 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 168503 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 168504 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 168505 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 168506 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 168507 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 168508 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 168509 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 168510 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 168511 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 168512 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 168513 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 168514 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 168515 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 168516 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 168517 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 168518 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 168519 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 168520 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 168521 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 168522 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 168523 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 168524 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 168525 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 168526 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 168527 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 168528 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 168529 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 168530 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 168531 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR |
| 168532 | 99, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_Hi |
| 168533 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPR |
| 168534 | 104, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPRMul2_Hi_and_ZPRMul4 |
| 168535 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 168536 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 168537 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 168538 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 168539 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 168540 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 168541 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 168542 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 168543 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 168544 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 168545 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 168546 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 168547 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 168548 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 168549 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 168550 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 168551 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 168552 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 168553 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 168554 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 168555 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 168556 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168557 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168558 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 168559 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 168560 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 168561 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 168562 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 168563 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 168564 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 168565 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 168566 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 168567 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 168568 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 168569 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 168570 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 168571 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 168572 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 168573 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 168574 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 168575 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 168576 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 168577 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 168578 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 168579 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 168580 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 168581 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 168582 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 168583 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 168584 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 168585 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 168586 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 168587 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 168588 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 168589 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 168590 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 168591 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 168592 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 168593 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 168594 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 168595 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 168596 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 168597 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 168598 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 168599 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 168600 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 168601 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 168602 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 168603 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 168604 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 168605 | 117, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 168606 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 168607 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 168608 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 168609 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 168610 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 168611 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 168612 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 168613 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 168614 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 168615 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 168616 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 168617 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168618 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168619 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168620 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 168621 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 168622 | 297, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 168623 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 168624 | 157, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168625 | 231, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 168626 | 148, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 168627 | 271, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168628 | 180, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 168629 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 168630 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 168631 | }, |
| 168632 | { // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168633 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 168634 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 168635 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 168636 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 168637 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 168638 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 168639 | 56, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 168640 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 168641 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 168642 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 168643 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub |
| 168644 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 168645 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 168646 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 168647 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 168648 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 168649 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 168650 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 168651 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 168652 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 168653 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 168654 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 168655 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 168656 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 168657 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 168658 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 168659 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 168660 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 168661 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 168662 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 168663 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 168664 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 168665 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 168666 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 168667 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 168668 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 168669 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 168670 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 168671 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 168672 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 168673 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 168674 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 168675 | 92, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 168676 | 93, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR |
| 168677 | 107, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_and_ZPR_K |
| 168678 | 103, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR_K |
| 168679 | 99, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 168680 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 168681 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 168682 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 168683 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 168684 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 168685 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 168686 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 168687 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 168688 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 168689 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 168690 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 168691 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 168692 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 168693 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 168694 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 168695 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 168696 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 168697 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 168698 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 168699 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 168700 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 168701 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168702 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168703 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 168704 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 168705 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 168706 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 168707 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 168708 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 168709 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 168710 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 168711 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 168712 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 168713 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 168714 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 168715 | 7, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 168716 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 168717 | 8, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 168718 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 168719 | 40, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 168720 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 168721 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 168722 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 168723 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 168724 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 168725 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 168726 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 168727 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 168728 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 168729 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 168730 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 168731 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 168732 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 168733 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 168734 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 168735 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 168736 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 168737 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 168738 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 168739 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 168740 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 168741 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 168742 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 168743 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 168744 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 168745 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 168746 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 168747 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 168748 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 168749 | 75, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 168750 | 117, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 168751 | 110, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 168752 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 168753 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 168754 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 168755 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 168756 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 168757 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 168758 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 168759 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 168760 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 168761 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 168762 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168763 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168764 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168765 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 168766 | 128, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 168767 | 297, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 168768 | 206, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 168769 | 183, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 168770 | 261, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 168771 | 172, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 168772 | 272, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168773 | 187, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 168774 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 168775 | 0, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 168776 | }, |
| 168777 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 168778 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 168779 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 168780 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 168781 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 168782 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 168783 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 168784 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 168785 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 168786 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 168787 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 168788 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 168789 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 168790 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 168791 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 168792 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 168793 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 168794 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_lo |
| 168795 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168796 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 168797 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 168798 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 168799 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 168800 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 168801 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 168802 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 168803 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 168804 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 168805 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 168806 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 168807 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 168808 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 168809 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 168810 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 168811 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 168812 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 168813 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 168814 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 168815 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 168816 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 168817 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 168818 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 168819 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 168820 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 168821 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPR_3b |
| 168822 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPRMul2_and_ZPR_3b |
| 168823 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPR_3b |
| 168824 | 100, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 -> ZPRMul2_Lo |
| 168825 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 168826 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 168827 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 168828 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 168829 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 168830 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 168831 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 168832 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 168833 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 168834 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 168835 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 168836 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 168837 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 168838 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 168839 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 168840 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 168841 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 168842 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 168843 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 168844 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 168845 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 168846 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168847 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168848 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 168849 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 168850 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 168851 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 168852 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168853 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 168854 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 168855 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 168856 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 168857 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 168858 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168859 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 168860 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 168861 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 168862 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 168863 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 168864 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168865 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 168866 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 168867 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 168868 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 168869 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 168870 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 168871 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 168872 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 168873 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 168874 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 168875 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 168876 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 168877 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 168878 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 168879 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 168880 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 168881 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 168882 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 168883 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 168884 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 168885 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 168886 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 168887 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 168888 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 168889 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 168890 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 168891 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 168892 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 168893 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 168894 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 168895 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 168896 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 168897 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 168898 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 168899 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 168900 | 242, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 168901 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 168902 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 168903 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 168904 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 168905 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 168906 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 168907 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 168908 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 168909 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 168910 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 168911 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 168912 | 363, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 168913 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 168914 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 168915 | 273, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 168916 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 168917 | 258, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 168918 | 184, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 168919 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 168920 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 168921 | }, |
| 168922 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 168923 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 168924 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:bsub_hi |
| 168925 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 168926 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0 |
| 168927 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 168928 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 168929 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 168930 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_hi |
| 168931 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 168932 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:hsub_hi |
| 168933 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub |
| 168934 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub0 |
| 168935 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1 |
| 168936 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0 |
| 168937 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 168938 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 168939 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 168940 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168941 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:ssub_hi |
| 168942 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32 |
| 168943 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_hi |
| 168944 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube32 |
| 168945 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sube64 |
| 168946 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo32 |
| 168947 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64 |
| 168948 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0 |
| 168949 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1 |
| 168950 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2 |
| 168951 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3 |
| 168952 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4 |
| 168953 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5 |
| 168954 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6 |
| 168955 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7 |
| 168956 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubb |
| 168957 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd0 |
| 168958 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1 |
| 168959 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh0 |
| 168960 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1 |
| 168961 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq0 |
| 168962 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubq1 |
| 168963 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs0 |
| 168964 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1 |
| 168965 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 168966 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul2_and_ZPR_3b |
| 168967 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 168968 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2 -> ZPRMul2_and_ZPR_3b |
| 168969 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 168970 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_hi |
| 168971 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 168972 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 168973 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 168974 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 168975 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 168976 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 168977 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 168978 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 168979 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 168980 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 168981 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 168982 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 168983 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 168984 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 168985 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 168986 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 168987 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 168988 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 168989 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 168990 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 168991 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 168992 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 168993 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 168994 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 168995 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 168996 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 168997 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 168998 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 168999 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 169000 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 169001 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 169002 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 169003 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169004 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 169005 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 169006 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 169007 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 169008 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 169009 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169010 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 169011 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 169012 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 169013 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 169014 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 169015 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 169016 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 169017 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 169018 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 169019 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 169020 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 169021 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 169022 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 169023 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 169024 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 169025 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 169026 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 169027 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 169028 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 169029 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 169030 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 169031 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 169032 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 169033 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 169034 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 169035 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 169036 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169037 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169038 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169039 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169040 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 169041 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169042 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 169043 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 169044 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169045 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 169046 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169047 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 169048 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 169049 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 169050 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 169051 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 169052 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169053 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169054 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169055 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 169056 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169057 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 169058 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 169059 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 169060 | 274, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 169061 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 169062 | 273, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 169063 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 169064 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 169065 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 169066 | }, |
| 169067 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169068 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 169069 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 169070 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 169071 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 169072 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 169073 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 169074 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64_lo |
| 169075 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 169076 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 169077 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 169078 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 169079 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 169080 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 169081 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 169082 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 169083 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 169084 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128_lo |
| 169085 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169086 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 169087 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 169088 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 169089 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 169090 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 169091 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 169092 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 169093 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 169094 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 169095 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 169096 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 169097 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 169098 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 169099 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 169100 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 169101 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 169102 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 169103 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 169104 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 169105 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 169106 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 169107 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 169108 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 169109 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 169110 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 169111 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR_4b |
| 169112 | 105, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 169113 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR_4b |
| 169114 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPRMul2_Lo |
| 169115 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 169116 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 169117 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 169118 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 169119 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 169120 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 169121 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 169122 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 169123 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 169124 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 169125 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 169126 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 169127 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 169128 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 169129 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 169130 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 169131 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 169132 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 169133 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 169134 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 169135 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 169136 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169137 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169138 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 169139 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 169140 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 169141 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 169142 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169143 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 169144 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 169145 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 169146 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 169147 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 169148 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169149 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 169150 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 169151 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 169152 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 169153 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 169154 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169155 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 169156 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 169157 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 169158 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 169159 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 169160 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 169161 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 169162 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 169163 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 169164 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 169165 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 169166 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 169167 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 169168 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 169169 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 169170 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 169171 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 169172 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 169173 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 169174 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 169175 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 169176 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 169177 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 169178 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 169179 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 169180 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 169181 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169182 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169183 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169184 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169185 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 169186 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169187 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 169188 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 169189 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169190 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169191 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169192 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 169193 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 169194 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 169195 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 169196 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 169197 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169198 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169199 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169200 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 169201 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169202 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 169203 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169204 | 189, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169205 | 275, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169206 | 171, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169207 | 256, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169208 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 169209 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 169210 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 169211 | }, |
| 169212 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169213 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 169214 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 169215 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64_lo |
| 169216 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 169217 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64_lo |
| 169218 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64_lo |
| 169219 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64_lo |
| 169220 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 169221 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16_lo |
| 169222 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 169223 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 169224 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 169225 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 169226 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 169227 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128_lo |
| 169228 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128_lo |
| 169229 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128_lo |
| 169230 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169231 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 169232 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 169233 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 169234 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 169235 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 169236 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 169237 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 169238 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 169239 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 169240 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 169241 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 169242 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 169243 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 169244 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 169245 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 169246 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 169247 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 169248 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 169249 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 169250 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 169251 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 169252 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 169253 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 169254 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 169255 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128_lo |
| 169256 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul2_Lo |
| 169257 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPR_4b |
| 169258 | 105, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 169259 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPR_4b |
| 169260 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 169261 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 169262 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 169263 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 169264 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 169265 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 169266 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 169267 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 169268 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 169269 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 169270 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 169271 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 169272 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 169273 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 169274 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 169275 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 169276 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 169277 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 169278 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 169279 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 169280 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 169281 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169282 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169283 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 169284 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 169285 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 169286 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 169287 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169288 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 169289 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 169290 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 169291 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 169292 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 169293 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169294 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 169295 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 169296 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 169297 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 169298 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 169299 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169300 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 169301 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 169302 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 169303 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 169304 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 169305 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 169306 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 169307 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 169308 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 169309 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 169310 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 169311 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 169312 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 169313 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 169314 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 169315 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 169316 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 169317 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 169318 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 169319 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 169320 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 169321 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 169322 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 169323 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 169324 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 169325 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 169326 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169327 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169328 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169329 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169330 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 169331 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169332 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 169333 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 169334 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169335 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169336 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169337 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 169338 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 169339 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 169340 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 169341 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 169342 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169343 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169344 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169345 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 169346 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169347 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 169348 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169349 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 169350 | 276, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169351 | 189, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169352 | 275, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169353 | 171, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 169354 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 169355 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 169356 | }, |
| 169357 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169358 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 169359 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 169360 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 169361 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 169362 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 169363 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64_lo |
| 169364 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 -> FPR64_lo |
| 169365 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 169366 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 169367 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 169368 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 169369 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 169370 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 169371 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 169372 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_lo |
| 169373 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128_lo |
| 169374 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 -> FPR128_lo |
| 169375 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169376 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 169377 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 169378 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 169379 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 169380 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 169381 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 169382 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 169383 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 169384 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 169385 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 169386 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 169387 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 169388 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 169389 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 169390 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 169391 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 169392 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 169393 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 169394 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 169395 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 169396 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 169397 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 169398 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 169399 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 169400 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_lo |
| 169401 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPR_4b |
| 169402 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul2_Lo |
| 169403 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPR_4b |
| 169404 | 105, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 -> ZPRMul2_Lo_and_ZPRMul4 |
| 169405 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 169406 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 169407 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 169408 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 169409 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 169410 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 169411 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 169412 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 169413 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 169414 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 169415 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 169416 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 169417 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 169418 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 169419 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 169420 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 169421 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 169422 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 169423 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 169424 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 169425 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 169426 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169427 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169428 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 169429 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 169430 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 169431 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 169432 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169433 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 169434 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 169435 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 169436 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 169437 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 169438 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169439 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 169440 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 169441 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 169442 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 169443 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 169444 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169445 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 169446 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 169447 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 169448 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 169449 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 169450 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 169451 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 169452 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 169453 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 169454 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 169455 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 169456 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 169457 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 169458 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 169459 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 169460 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 169461 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 169462 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 169463 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 169464 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 169465 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 169466 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 169467 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 169468 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 169469 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 169470 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 169471 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169472 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169473 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169474 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169475 | 127, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 169476 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169477 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 169478 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 169479 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169480 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169481 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169482 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 169483 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 169484 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 169485 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 169486 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 169487 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169488 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169489 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169490 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 169491 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 169492 | 320, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 169493 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 169494 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 169495 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 169496 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 169497 | 276, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169498 | 189, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 169499 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 |
| 169500 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 |
| 169501 | }, |
| 169502 | { // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 169503 | 7, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 169504 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:bsub_hi |
| 169505 | 56, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 169506 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub0 |
| 169507 | 56, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 169508 | 56, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 169509 | 56, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 169510 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub_hi |
| 169511 | 8, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 169512 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:hsub_hi |
| 169513 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:psub |
| 169514 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:psub0 |
| 169515 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:psub1 |
| 169516 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub0 |
| 169517 | 92, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 169518 | 92, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 169519 | 92, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 169520 | 40, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 169521 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:ssub_hi |
| 169522 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sub_32 |
| 169523 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_hi |
| 169524 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sube32 |
| 169525 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sube64 |
| 169526 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:subo32 |
| 169527 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:subo64 |
| 169528 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0 |
| 169529 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1 |
| 169530 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2 |
| 169531 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3 |
| 169532 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4 |
| 169533 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5 |
| 169534 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6 |
| 169535 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7 |
| 169536 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubb |
| 169537 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubd0 |
| 169538 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1 |
| 169539 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh0 |
| 169540 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1 |
| 169541 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubq0 |
| 169542 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubq1 |
| 169543 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs0 |
| 169544 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1 |
| 169545 | 92, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 169546 | 109, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub0 -> ZPRMul4_and_ZPR_K |
| 169547 | 103, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub1 -> ZPR_K |
| 169548 | 107, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub2 -> ZPRMul2_and_ZPR_K |
| 169549 | 103, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub3 -> ZPR_K |
| 169550 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub_hi |
| 169551 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 169552 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 169553 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 169554 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 169555 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 169556 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 169557 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 169558 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 169559 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 169560 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 169561 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 169562 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 169563 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 169564 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 169565 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 169566 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 169567 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 169568 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 169569 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 169570 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 169571 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169572 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169573 | 7, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 169574 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 169575 | 8, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 169576 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 169577 | 40, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 169578 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 169579 | 7, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 169580 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 169581 | 8, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 169582 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 169583 | 40, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 169584 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 169585 | 7, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 169586 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 169587 | 8, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 169588 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 169589 | 40, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 169590 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 169591 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:psub1_then_psub |
| 169592 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 169593 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 169594 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 169595 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 169596 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 169597 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 169598 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 169599 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 169600 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 169601 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 169602 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 169603 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 169604 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 169605 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 169606 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 169607 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 169608 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 169609 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 169610 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 169611 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 169612 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 169613 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 169614 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 169615 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 169616 | 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 169617 | 110, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 169618 | 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 169619 | 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 169620 | 117, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 169621 | 110, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 169622 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 169623 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 169624 | 128, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 169625 | 206, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 169626 | 128, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 169627 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 169628 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 169629 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 169630 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 169631 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 169632 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169633 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169634 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169635 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 169636 | 128, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 169637 | 297, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 169638 | 206, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 169639 | 194, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 169640 | 279, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 169641 | 195, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 169642 | 281, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 169643 | 172, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 169644 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 169645 | 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 169646 | }, |
| 169647 | { // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 169648 | 7, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:bsub -> FPR8 |
| 169649 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:bsub_hi |
| 169650 | 65, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub -> FPR64_lo |
| 169651 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub0 |
| 169652 | 65, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1 -> FPR64_lo |
| 169653 | 65, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2 -> FPR64_lo |
| 169654 | 65, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3 -> FPR64_lo |
| 169655 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub_hi |
| 169656 | 10, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:hsub -> FPR16_lo |
| 169657 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:hsub_hi |
| 169658 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:psub |
| 169659 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:psub0 |
| 169660 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:psub1 |
| 169661 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub0 |
| 169662 | 98, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub1 -> FPR128_0to7 |
| 169663 | 98, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub2 -> FPR128_0to7 |
| 169664 | 98, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub3 -> FPR128_0to7 |
| 169665 | 44, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169666 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:ssub_hi |
| 169667 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sub_32 |
| 169668 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sub_32_hi |
| 169669 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sube32 |
| 169670 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sube64 |
| 169671 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:subo32 |
| 169672 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:subo64 |
| 169673 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_0 |
| 169674 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_1 |
| 169675 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_2 |
| 169676 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_3 |
| 169677 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_4 |
| 169678 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_5 |
| 169679 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_6 |
| 169680 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_7 |
| 169681 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubb |
| 169682 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubd0 |
| 169683 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubd1 |
| 169684 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh0 |
| 169685 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1 |
| 169686 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubq0 |
| 169687 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubq1 |
| 169688 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs0 |
| 169689 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1 |
| 169690 | 98, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub -> FPR128_0to7 |
| 169691 | 108, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub0 -> ZPRMul4_and_ZPR_3b |
| 169692 | 102, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub1 -> ZPR_3b |
| 169693 | 106, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub2 -> ZPRMul2_and_ZPR_3b |
| 169694 | 102, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub3 -> ZPR_3b |
| 169695 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub_hi |
| 169696 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq0 |
| 169697 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubd1_then_zasubq1 |
| 169698 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd0 |
| 169699 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1 |
| 169700 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq0 |
| 169701 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubq1 |
| 169702 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq0 |
| 169703 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubs1_then_zasubd1_then_zasubq1 |
| 169704 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd0 |
| 169705 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1 |
| 169706 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq0 |
| 169707 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubq1 |
| 169708 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs0 |
| 169709 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1 |
| 169710 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq0 |
| 169711 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubd1_then_zasubq1 |
| 169712 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd0 |
| 169713 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1 |
| 169714 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq0 |
| 169715 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubq1 |
| 169716 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169717 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169718 | 7, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_bsub -> FPR8 |
| 169719 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_bsub_hi |
| 169720 | 10, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_hsub -> FPR16_lo |
| 169721 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_hsub_hi |
| 169722 | 44, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169723 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_then_ssub_hi |
| 169724 | 7, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_bsub -> FPR8 |
| 169725 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_bsub_hi |
| 169726 | 10, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_hsub -> FPR16_lo |
| 169727 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_hsub_hi |
| 169728 | 44, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169729 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub3_then_ssub_hi |
| 169730 | 7, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_bsub -> FPR8 |
| 169731 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_bsub_hi |
| 169732 | 10, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_hsub -> FPR16_lo |
| 169733 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_hsub_hi |
| 169734 | 44, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169735 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_then_ssub_hi |
| 169736 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:psub1_then_psub |
| 169737 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub1_then_dsub_hi |
| 169738 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub3_then_dsub_hi |
| 169739 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub2_then_dsub_hi |
| 169740 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32 |
| 169741 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_7_then_sub_32_hi |
| 169742 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32 |
| 169743 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_hi |
| 169744 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32 |
| 169745 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_5_then_sub_32_hi |
| 169746 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32 |
| 169747 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_hi |
| 169748 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32 |
| 169749 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_3_then_sub_32_hi |
| 169750 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32 |
| 169751 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_hi |
| 169752 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32 |
| 169753 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_1_then_sub_32_hi |
| 169754 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:subo64_then_sub_32 |
| 169755 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:subo64_then_sub_32_hi |
| 169756 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub1_then_zsub_hi |
| 169757 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub3_then_zsub_hi |
| 169758 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub2_then_zsub_hi |
| 169759 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub0_dsub1 |
| 169760 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub0_dsub1_dsub2 |
| 169761 | 79, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169762 | 116, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169763 | 79, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169764 | 79, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 169765 | 127, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 169766 | 116, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 169767 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub0_qsub1 |
| 169768 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub0_qsub1_qsub2 |
| 169769 | 163, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169770 | 248, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 169771 | 163, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169772 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sub_32_x8sub_1_then_sub_32 |
| 169773 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_0_x8sub_1 |
| 169774 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_x8sub_3 |
| 169775 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_x8sub_5 |
| 169776 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_x8sub_7 |
| 169777 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169778 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169779 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169780 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:sub_32_subo64_then_sub_32 |
| 169781 | 163, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 169782 | 374, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 169783 | 248, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 169784 | 193, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 169785 | 278, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 169786 | 188, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 169787 | 273, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 169788 | 173, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 169789 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub0_zsub2 |
| 169790 | 0, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7:zsub1_zsub3 |
| 169791 | }, |
| 169792 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 169793 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:bsub -> FPR8 |
| 169794 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:bsub_hi |
| 169795 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub -> FPR64 |
| 169796 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub0 |
| 169797 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 169798 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 169799 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 169800 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub_hi |
| 169801 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:hsub -> FPR16 |
| 169802 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:hsub_hi |
| 169803 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:psub |
| 169804 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:psub0 |
| 169805 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:psub1 |
| 169806 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub0 |
| 169807 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 169808 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 169809 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 169810 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:ssub -> FPR32 |
| 169811 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:ssub_hi |
| 169812 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sub_32 |
| 169813 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_hi |
| 169814 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sube32 |
| 169815 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sube64 |
| 169816 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:subo32 |
| 169817 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:subo64 |
| 169818 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_0 |
| 169819 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1 |
| 169820 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2 |
| 169821 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3 |
| 169822 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4 |
| 169823 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5 |
| 169824 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6 |
| 169825 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7 |
| 169826 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubb |
| 169827 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubd0 |
| 169828 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1 |
| 169829 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh0 |
| 169830 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1 |
| 169831 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubq0 |
| 169832 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubq1 |
| 169833 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs0 |
| 169834 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1 |
| 169835 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub -> FPR128 |
| 169836 | 99, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Hi |
| 169837 | 107, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_and_ZPR_K |
| 169838 | 99, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi |
| 169839 | 107, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_and_ZPR_K |
| 169840 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub_hi |
| 169841 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 169842 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 169843 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 169844 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 169845 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 169846 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 169847 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 169848 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 169849 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 169850 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 169851 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 169852 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 169853 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 169854 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 169855 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 169856 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 169857 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 169858 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 169859 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 169860 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 169861 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 169862 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 169863 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 169864 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 169865 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 169866 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 169867 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 169868 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 169869 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 169870 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 169871 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 169872 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 169873 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 169874 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 169875 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 169876 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 169877 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 169878 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 169879 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 169880 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 169881 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:psub1_then_psub |
| 169882 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 169883 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 169884 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 169885 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 169886 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 169887 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 169888 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 169889 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 169890 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 169891 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 169892 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 169893 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 169894 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 169895 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 169896 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 169897 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 169898 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 169899 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 169900 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 169901 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 169902 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 169903 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 169904 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1 |
| 169905 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 169906 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2 |
| 169907 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 |
| 169908 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub2_dsub3 |
| 169909 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1 |
| 169910 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 |
| 169911 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:dsub_dsub1_dsub2 |
| 169912 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1 |
| 169913 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 169914 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2 |
| 169915 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 |
| 169916 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:qsub2_qsub3 |
| 169917 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 169918 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 169919 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 169920 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 169921 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 169922 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 169923 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 169924 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 169925 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 169926 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1 |
| 169927 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 |
| 169928 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub_qsub1_qsub2 |
| 169929 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1 |
| 169930 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 |
| 169931 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2 |
| 169932 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 |
| 169933 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub2_zsub3 |
| 169934 | 175, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 169935 | 192, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 169936 | }, |
| 169937 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 169938 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:bsub -> FPR8 |
| 169939 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:bsub_hi |
| 169940 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub -> FPR64_lo |
| 169941 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub0 |
| 169942 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1 -> FPR64_lo |
| 169943 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2 -> FPR64_lo |
| 169944 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3 -> FPR64_lo |
| 169945 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub_hi |
| 169946 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:hsub -> FPR16_lo |
| 169947 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:hsub_hi |
| 169948 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:psub |
| 169949 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:psub0 |
| 169950 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:psub1 |
| 169951 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub0 |
| 169952 | 98, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub1 -> FPR128_0to7 |
| 169953 | 94, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub2 -> FPR128_lo |
| 169954 | 94, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub3 -> FPR128_lo |
| 169955 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 169956 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:ssub_hi |
| 169957 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sub_32 |
| 169958 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_hi |
| 169959 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sube32 |
| 169960 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sube64 |
| 169961 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:subo32 |
| 169962 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:subo64 |
| 169963 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_0 |
| 169964 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1 |
| 169965 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2 |
| 169966 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3 |
| 169967 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4 |
| 169968 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5 |
| 169969 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6 |
| 169970 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7 |
| 169971 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubb |
| 169972 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubd0 |
| 169973 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1 |
| 169974 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh0 |
| 169975 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1 |
| 169976 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubq0 |
| 169977 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubq1 |
| 169978 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs0 |
| 169979 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1 |
| 169980 | 98, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub -> FPR128_0to7 |
| 169981 | 106, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub0 -> ZPRMul2_and_ZPR_3b |
| 169982 | 106, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub1 -> ZPRMul2_and_ZPR_3b |
| 169983 | 100, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub2 -> ZPRMul2_Lo |
| 169984 | 100, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub3 -> ZPRMul2_Lo |
| 169985 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub_hi |
| 169986 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq0 |
| 169987 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubd1_then_zasubq1 |
| 169988 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd0 |
| 169989 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1 |
| 169990 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq0 |
| 169991 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubq1 |
| 169992 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq0 |
| 169993 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubs1_then_zasubd1_then_zasubq1 |
| 169994 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd0 |
| 169995 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1 |
| 169996 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq0 |
| 169997 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubq1 |
| 169998 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs0 |
| 169999 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1 |
| 170000 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq0 |
| 170001 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubd1_then_zasubq1 |
| 170002 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd0 |
| 170003 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1 |
| 170004 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq0 |
| 170005 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubq1 |
| 170006 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170007 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170008 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub -> FPR8 |
| 170009 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_bsub_hi |
| 170010 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub -> FPR16_lo |
| 170011 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_hsub_hi |
| 170012 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170013 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_then_ssub_hi |
| 170014 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub -> FPR8 |
| 170015 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_bsub_hi |
| 170016 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub -> FPR16_lo |
| 170017 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_hsub_hi |
| 170018 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170019 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub3_then_ssub_hi |
| 170020 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub -> FPR8 |
| 170021 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_bsub_hi |
| 170022 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub -> FPR16_lo |
| 170023 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_hsub_hi |
| 170024 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170025 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_then_ssub_hi |
| 170026 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:psub1_then_psub |
| 170027 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_then_dsub_hi |
| 170028 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub3_then_dsub_hi |
| 170029 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub2_then_dsub_hi |
| 170030 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32 |
| 170031 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_7_then_sub_32_hi |
| 170032 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32 |
| 170033 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_hi |
| 170034 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32 |
| 170035 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_5_then_sub_32_hi |
| 170036 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32 |
| 170037 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_hi |
| 170038 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32 |
| 170039 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_3_then_sub_32_hi |
| 170040 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32 |
| 170041 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_hi |
| 170042 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32 |
| 170043 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_1_then_sub_32_hi |
| 170044 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32 |
| 170045 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:subo64_then_sub_32_hi |
| 170046 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_then_zsub_hi |
| 170047 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub3_then_zsub_hi |
| 170048 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub2_then_zsub_hi |
| 170049 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1 |
| 170050 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub0_dsub1_dsub2 |
| 170051 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2 |
| 170052 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub1_dsub2_dsub3 |
| 170053 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub2_dsub3 |
| 170054 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1 |
| 170055 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2_dsub3 |
| 170056 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:dsub_dsub1_dsub2 |
| 170057 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1 |
| 170058 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub0_qsub1_qsub2 |
| 170059 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2 |
| 170060 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub1_qsub2_qsub3 |
| 170061 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:qsub2_qsub3 |
| 170062 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_x8sub_1_then_sub_32 |
| 170063 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_0_x8sub_1 |
| 170064 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_x8sub_3 |
| 170065 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_x8sub_5 |
| 170066 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_x8sub_7 |
| 170067 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170068 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170069 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170070 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:sub_32_subo64_then_sub_32 |
| 170071 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1 |
| 170072 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2_qsub3 |
| 170073 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub_qsub1_qsub2 |
| 170074 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1 |
| 170075 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub1_zsub2 |
| 170076 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2 |
| 170077 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub2_zsub3 |
| 170078 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub2_zsub3 |
| 170079 | 176, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 170080 | 176, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 170081 | }, |
| 170082 | { // ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 170083 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 170084 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:bsub_hi |
| 170085 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 170086 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub0 |
| 170087 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 170088 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 170089 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 170090 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub_hi |
| 170091 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 170092 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:hsub_hi |
| 170093 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:psub |
| 170094 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:psub0 |
| 170095 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:psub1 |
| 170096 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub0 |
| 170097 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 170098 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 170099 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 170100 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 170101 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:ssub_hi |
| 170102 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sub_32 |
| 170103 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sub_32_hi |
| 170104 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sube32 |
| 170105 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sube64 |
| 170106 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:subo32 |
| 170107 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:subo64 |
| 170108 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_0 |
| 170109 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_1 |
| 170110 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_2 |
| 170111 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_3 |
| 170112 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_4 |
| 170113 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_5 |
| 170114 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_6 |
| 170115 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_7 |
| 170116 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubb |
| 170117 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubd0 |
| 170118 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubd1 |
| 170119 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh0 |
| 170120 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1 |
| 170121 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubq0 |
| 170122 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubq1 |
| 170123 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs0 |
| 170124 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1 |
| 170125 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 170126 | 101, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub0 -> ZPRMul4 |
| 170127 | 101, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 170128 | 101, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 170129 | 101, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub3 -> ZPRMul4 |
| 170130 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub_hi |
| 170131 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 170132 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 170133 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 170134 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 170135 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 170136 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 170137 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 170138 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 170139 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 170140 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 170141 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 170142 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 170143 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 170144 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 170145 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 170146 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 170147 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 170148 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 170149 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 170150 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 170151 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170152 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170153 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 170154 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 170155 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 170156 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 170157 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 170158 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 170159 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 170160 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 170161 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 170162 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 170163 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 170164 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 170165 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 170166 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 170167 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 170168 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 170169 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 170170 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 170171 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 170172 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 170173 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 170174 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 170175 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 170176 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 170177 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 170178 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 170179 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 170180 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 170181 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 170182 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 170183 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 170184 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 170185 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 170186 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 170187 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 170188 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 170189 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 170190 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 170191 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 170192 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 170193 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 170194 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 170195 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 170196 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_dsub2 |
| 170197 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 |
| 170198 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub2_dsub3 |
| 170199 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub_dsub1 |
| 170200 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 170201 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 |
| 170202 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 170203 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 170204 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub1_qsub2 |
| 170205 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 |
| 170206 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:qsub2_qsub3 |
| 170207 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 170208 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 170209 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 170210 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 170211 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 170212 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170213 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170214 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170215 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 170216 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub_qsub1 |
| 170217 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 170218 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 |
| 170219 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub0_zsub1 |
| 170220 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 |
| 170221 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub1_zsub2 |
| 170222 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 |
| 170223 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub2_zsub3 |
| 170224 | 177, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 170225 | 177, // ZPR4Strided_with_zsub0_in_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 170226 | }, |
| 170227 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 170228 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 170229 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub_hi |
| 170230 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 170231 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0 |
| 170232 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 170233 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2 -> FPR64_lo |
| 170234 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3 -> FPR64_lo |
| 170235 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_hi |
| 170236 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 170237 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub_hi |
| 170238 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub |
| 170239 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub0 |
| 170240 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1 |
| 170241 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0 |
| 170242 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 170243 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2 -> FPR128_0to7 |
| 170244 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3 -> FPR128_0to7 |
| 170245 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 170246 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub_hi |
| 170247 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32 |
| 170248 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_hi |
| 170249 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube32 |
| 170250 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube64 |
| 170251 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo32 |
| 170252 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64 |
| 170253 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0 |
| 170254 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1 |
| 170255 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2 |
| 170256 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3 |
| 170257 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4 |
| 170258 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5 |
| 170259 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6 |
| 170260 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7 |
| 170261 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubb |
| 170262 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd0 |
| 170263 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1 |
| 170264 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh0 |
| 170265 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1 |
| 170266 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq0 |
| 170267 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq1 |
| 170268 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs0 |
| 170269 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1 |
| 170270 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 170271 | 103, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 170272 | 93, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1 -> ZPR |
| 170273 | 102, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2 -> ZPR_3b |
| 170274 | 102, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3 -> ZPR_3b |
| 170275 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_hi |
| 170276 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 170277 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 170278 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 170279 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 170280 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 170281 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 170282 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 170283 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 170284 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 170285 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 170286 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 170287 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 170288 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 170289 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 170290 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 170291 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 170292 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 170293 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 170294 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 170295 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 170296 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170297 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170298 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 170299 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 170300 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 170301 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 170302 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 170303 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 170304 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 170305 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 170306 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16_lo |
| 170307 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 170308 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170309 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 170310 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 170311 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 170312 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16_lo |
| 170313 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 170314 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170315 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 170316 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1_then_psub |
| 170317 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 170318 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 170319 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 170320 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 170321 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 170322 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 170323 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 170324 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 170325 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 170326 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 170327 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 170328 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 170329 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 170330 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 170331 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 170332 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 170333 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 170334 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 170335 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 170336 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 170337 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 170338 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 170339 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 170340 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 170341 | 77, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 170342 | 115, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 170343 | 79, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 170344 | 75, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 170345 | 124, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 170346 | 113, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 170347 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 170348 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 170349 | 147, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 170350 | 241, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 170351 | 163, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 170352 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 170353 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 170354 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 170355 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 170356 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 170357 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170358 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170359 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170360 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 170361 | 128, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 170362 | 352, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 170363 | 224, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 170364 | 156, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K |
| 170365 | 277, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 170366 | 154, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 170367 | 243, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 170368 | 164, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 170369 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 170370 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 170371 | }, |
| 170372 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 170373 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:bsub -> FPR8 |
| 170374 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:bsub_hi |
| 170375 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub -> FPR64 |
| 170376 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub0 |
| 170377 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1 -> FPR64 |
| 170378 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2 -> FPR64 |
| 170379 | 65, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3 -> FPR64_lo |
| 170380 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub_hi |
| 170381 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:hsub -> FPR16 |
| 170382 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:hsub_hi |
| 170383 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:psub |
| 170384 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:psub0 |
| 170385 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:psub1 |
| 170386 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub0 |
| 170387 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub1 -> FPR128 |
| 170388 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub2 -> FPR128 |
| 170389 | 98, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub3 -> FPR128_0to7 |
| 170390 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:ssub -> FPR32 |
| 170391 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:ssub_hi |
| 170392 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sub_32 |
| 170393 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_hi |
| 170394 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sube32 |
| 170395 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sube64 |
| 170396 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:subo32 |
| 170397 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:subo64 |
| 170398 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_0 |
| 170399 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1 |
| 170400 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2 |
| 170401 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3 |
| 170402 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4 |
| 170403 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5 |
| 170404 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6 |
| 170405 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7 |
| 170406 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubb |
| 170407 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubd0 |
| 170408 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1 |
| 170409 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh0 |
| 170410 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1 |
| 170411 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubq0 |
| 170412 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubq1 |
| 170413 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs0 |
| 170414 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1 |
| 170415 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub -> FPR128 |
| 170416 | 103, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub0 -> ZPR_K |
| 170417 | 103, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub1 -> ZPR_K |
| 170418 | 93, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub2 -> ZPR |
| 170419 | 102, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub3 -> ZPR_3b |
| 170420 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub_hi |
| 170421 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq0 |
| 170422 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubd1_then_zasubq1 |
| 170423 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd0 |
| 170424 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1 |
| 170425 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq0 |
| 170426 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubq1 |
| 170427 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 170428 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 170429 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd0 |
| 170430 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1 |
| 170431 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq0 |
| 170432 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubq1 |
| 170433 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs0 |
| 170434 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1 |
| 170435 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 170436 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 170437 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 170438 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 170439 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 170440 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 170441 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170442 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170443 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 170444 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_bsub_hi |
| 170445 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 170446 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_hsub_hi |
| 170447 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 170448 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_then_ssub_hi |
| 170449 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 170450 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_bsub_hi |
| 170451 | 10, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub -> FPR16_lo |
| 170452 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_hsub_hi |
| 170453 | 44, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170454 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub3_then_ssub_hi |
| 170455 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 170456 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_bsub_hi |
| 170457 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 170458 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_hsub_hi |
| 170459 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 170460 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_then_ssub_hi |
| 170461 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:psub1_then_psub |
| 170462 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_then_dsub_hi |
| 170463 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub3_then_dsub_hi |
| 170464 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub2_then_dsub_hi |
| 170465 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32 |
| 170466 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 170467 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32 |
| 170468 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 170469 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32 |
| 170470 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 170471 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32 |
| 170472 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 170473 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32 |
| 170474 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 170475 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32 |
| 170476 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 170477 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32 |
| 170478 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 170479 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32 |
| 170480 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:subo64_then_sub_32_hi |
| 170481 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_then_zsub_hi |
| 170482 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub3_then_zsub_hi |
| 170483 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub2_then_zsub_hi |
| 170484 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1 |
| 170485 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub0_dsub1_dsub2 |
| 170486 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2 -> DD |
| 170487 | 113, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 170488 | 77, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 170489 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1 -> DD |
| 170490 | 121, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 170491 | 110, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 170492 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1 |
| 170493 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub0_qsub1_qsub2 |
| 170494 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2 -> QQ |
| 170495 | 224, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 170496 | 147, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 170497 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 170498 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_0_x8sub_1 |
| 170499 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_x8sub_3 |
| 170500 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_x8sub_5 |
| 170501 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_x8sub_7 |
| 170502 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170503 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170504 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170505 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 170506 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1 -> QQ |
| 170507 | 327, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 170508 | 206, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 170509 | 169, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 170510 | 249, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 170511 | 156, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K |
| 170512 | 277, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 170513 | 154, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_qsub1_in_FPR128_0to7 |
| 170514 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub0_zsub2 |
| 170515 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K:zsub1_zsub3 |
| 170516 | }, |
| 170517 | { // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 170518 | 7, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:bsub -> FPR8 |
| 170519 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:bsub_hi |
| 170520 | 56, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub -> FPR64 |
| 170521 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0 |
| 170522 | 56, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1 -> FPR64 |
| 170523 | 56, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2 -> FPR64 |
| 170524 | 65, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3 -> FPR64_lo |
| 170525 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_hi |
| 170526 | 8, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:hsub -> FPR16 |
| 170527 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:hsub_hi |
| 170528 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub |
| 170529 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub0 |
| 170530 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub1 |
| 170531 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0 |
| 170532 | 92, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1 -> FPR128 |
| 170533 | 92, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2 -> FPR128 |
| 170534 | 98, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3 -> FPR128_0to7 |
| 170535 | 40, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:ssub -> FPR32 |
| 170536 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:ssub_hi |
| 170537 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32 |
| 170538 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_hi |
| 170539 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sube32 |
| 170540 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sube64 |
| 170541 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo32 |
| 170542 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64 |
| 170543 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0 |
| 170544 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1 |
| 170545 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2 |
| 170546 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3 |
| 170547 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4 |
| 170548 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5 |
| 170549 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6 |
| 170550 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7 |
| 170551 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubb |
| 170552 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd0 |
| 170553 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1 |
| 170554 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh0 |
| 170555 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1 |
| 170556 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq0 |
| 170557 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubq1 |
| 170558 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs0 |
| 170559 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1 |
| 170560 | 92, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub -> FPR128 |
| 170561 | 103, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0 -> ZPR_K |
| 170562 | 96, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1 -> ZPRMul2 |
| 170563 | 93, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2 -> ZPR |
| 170564 | 106, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3 -> ZPRMul2_and_ZPR_3b |
| 170565 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_hi |
| 170566 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq0 |
| 170567 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubd1_then_zasubq1 |
| 170568 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd0 |
| 170569 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1 |
| 170570 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq0 |
| 170571 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubq1 |
| 170572 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq0 |
| 170573 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubs1_then_zasubd1_then_zasubq1 |
| 170574 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd0 |
| 170575 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1 |
| 170576 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq0 |
| 170577 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubq1 |
| 170578 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs0 |
| 170579 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1 |
| 170580 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq0 |
| 170581 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubd1_then_zasubq1 |
| 170582 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd0 |
| 170583 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1 |
| 170584 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq0 |
| 170585 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubq1 |
| 170586 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170587 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170588 | 7, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub -> FPR8 |
| 170589 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_bsub_hi |
| 170590 | 8, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub -> FPR16 |
| 170591 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_hsub_hi |
| 170592 | 40, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub -> FPR32 |
| 170593 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_then_ssub_hi |
| 170594 | 7, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub -> FPR8 |
| 170595 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_bsub_hi |
| 170596 | 10, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub -> FPR16_lo |
| 170597 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_hsub_hi |
| 170598 | 44, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 170599 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub3_then_ssub_hi |
| 170600 | 7, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub -> FPR8 |
| 170601 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_bsub_hi |
| 170602 | 8, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub -> FPR16 |
| 170603 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_hsub_hi |
| 170604 | 40, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub -> FPR32 |
| 170605 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_then_ssub_hi |
| 170606 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:psub1_then_psub |
| 170607 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_then_dsub_hi |
| 170608 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub3_then_dsub_hi |
| 170609 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_then_dsub_hi |
| 170610 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32 |
| 170611 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_7_then_sub_32_hi |
| 170612 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32 |
| 170613 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_hi |
| 170614 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32 |
| 170615 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_5_then_sub_32_hi |
| 170616 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32 |
| 170617 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_hi |
| 170618 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32 |
| 170619 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_3_then_sub_32_hi |
| 170620 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32 |
| 170621 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_hi |
| 170622 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32 |
| 170623 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_1_then_sub_32_hi |
| 170624 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32 |
| 170625 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:subo64_then_sub_32_hi |
| 170626 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_then_zsub_hi |
| 170627 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub3_then_zsub_hi |
| 170628 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_then_zsub_hi |
| 170629 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1 |
| 170630 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub0_dsub1_dsub2 |
| 170631 | 75, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2 -> DD |
| 170632 | 113, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 170633 | 77, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 170634 | 75, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1 -> DD |
| 170635 | 121, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 170636 | 110, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:dsub_dsub1_dsub2 -> DDD |
| 170637 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1 |
| 170638 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub0_qsub1_qsub2 |
| 170639 | 128, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2 -> QQ |
| 170640 | 224, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 170641 | 147, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 170642 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_x8sub_1_then_sub_32 |
| 170643 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_0_x8sub_1 |
| 170644 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_x8sub_3 |
| 170645 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_x8sub_5 |
| 170646 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_x8sub_7 |
| 170647 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170648 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170649 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170650 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:sub_32_subo64_then_sub_32 |
| 170651 | 128, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1 -> QQ |
| 170652 | 327, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 170653 | 206, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub_qsub1_qsub2 -> QQQ |
| 170654 | 179, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 170655 | 252, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 170656 | 134, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2 -> ZPR2Mul2 |
| 170657 | 265, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 170658 | 182, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 170659 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub0_zsub2 |
| 170660 | 0, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2:zsub1_zsub3 |
| 170661 | }, |
| 170662 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 170663 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 170664 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:bsub_hi |
| 170665 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 170666 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0 |
| 170667 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1 -> FPR64 |
| 170668 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2 -> FPR64 |
| 170669 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3 -> FPR64 |
| 170670 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_hi |
| 170671 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 170672 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:hsub_hi |
| 170673 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub |
| 170674 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub0 |
| 170675 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1 |
| 170676 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0 |
| 170677 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1 -> FPR128 |
| 170678 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2 -> FPR128 |
| 170679 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3 -> FPR128 |
| 170680 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 170681 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:ssub_hi |
| 170682 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32 |
| 170683 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_hi |
| 170684 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube32 |
| 170685 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sube64 |
| 170686 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo32 |
| 170687 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64 |
| 170688 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0 |
| 170689 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1 |
| 170690 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2 |
| 170691 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3 |
| 170692 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4 |
| 170693 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5 |
| 170694 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6 |
| 170695 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7 |
| 170696 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubb |
| 170697 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd0 |
| 170698 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1 |
| 170699 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh0 |
| 170700 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1 |
| 170701 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq0 |
| 170702 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubq1 |
| 170703 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs0 |
| 170704 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1 |
| 170705 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 170706 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 170707 | 107, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul2_and_ZPR_K |
| 170708 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2 -> ZPR_K |
| 170709 | 101, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3 -> ZPRMul4 |
| 170710 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_hi |
| 170711 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 170712 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 170713 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 170714 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 170715 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 170716 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 170717 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 170718 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 170719 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 170720 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 170721 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 170722 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 170723 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 170724 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 170725 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 170726 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 170727 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 170728 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 170729 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 170730 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 170731 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170732 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170733 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 170734 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 170735 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16 |
| 170736 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 170737 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32 |
| 170738 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 170739 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 170740 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 170741 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16 |
| 170742 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 170743 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32 |
| 170744 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 170745 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 170746 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 170747 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16 |
| 170748 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 170749 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32 |
| 170750 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 170751 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:psub1_then_psub |
| 170752 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 170753 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 170754 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 170755 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 170756 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 170757 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 170758 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 170759 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 170760 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 170761 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 170762 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 170763 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 170764 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 170765 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 170766 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 170767 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 170768 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 170769 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 170770 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 170771 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 170772 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 170773 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 170774 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 170775 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 170776 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD |
| 170777 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 170778 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD |
| 170779 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD |
| 170780 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 170781 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 170782 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 170783 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 170784 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ |
| 170785 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 170786 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ |
| 170787 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 170788 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 170789 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 170790 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 170791 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 170792 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170793 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170794 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170795 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 170796 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ |
| 170797 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 170798 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 170799 | 195, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 170800 | 281, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 170801 | 172, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 170802 | 282, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 170803 | 196, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 170804 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 170805 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 170806 | }, |
| 170807 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 170808 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 170809 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:bsub_hi |
| 170810 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 170811 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0 |
| 170812 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 170813 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 170814 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3 -> FPR64 |
| 170815 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_hi |
| 170816 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 170817 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:hsub_hi |
| 170818 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:psub |
| 170819 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:psub0 |
| 170820 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:psub1 |
| 170821 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0 |
| 170822 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 170823 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 170824 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3 -> FPR128 |
| 170825 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 170826 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:ssub_hi |
| 170827 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32 |
| 170828 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_hi |
| 170829 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sube32 |
| 170830 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sube64 |
| 170831 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:subo32 |
| 170832 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:subo64 |
| 170833 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0 |
| 170834 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1 |
| 170835 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2 |
| 170836 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3 |
| 170837 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4 |
| 170838 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5 |
| 170839 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6 |
| 170840 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7 |
| 170841 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubb |
| 170842 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd0 |
| 170843 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1 |
| 170844 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh0 |
| 170845 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1 |
| 170846 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq0 |
| 170847 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq1 |
| 170848 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs0 |
| 170849 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1 |
| 170850 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 170851 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_K |
| 170852 | 101, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul4 |
| 170853 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2 -> ZPR |
| 170854 | 96, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3 -> ZPRMul2 |
| 170855 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_hi |
| 170856 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 170857 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 170858 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 170859 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 170860 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 170861 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 170862 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 170863 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 170864 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 170865 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 170866 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 170867 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 170868 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 170869 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 170870 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 170871 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 170872 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 170873 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 170874 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 170875 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 170876 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 170877 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 170878 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 170879 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 170880 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 170881 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 170882 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 170883 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 170884 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 170885 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 170886 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 170887 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 170888 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 170889 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 170890 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 170891 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 170892 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 170893 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 170894 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 170895 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 170896 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 170897 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 170898 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 170899 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 170900 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 170901 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 170902 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 170903 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 170904 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 170905 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 170906 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 170907 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 170908 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 170909 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 170910 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 170911 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 170912 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 170913 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 170914 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 170915 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 170916 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 170917 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 170918 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 170919 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 170920 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 170921 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 170922 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 170923 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_dsub3 -> DD |
| 170924 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 170925 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 170926 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 170927 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 170928 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 170929 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 170930 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 170931 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 170932 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 170933 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 170934 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 170935 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 170936 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 170937 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 170938 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 170939 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 170940 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 170941 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 170942 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 170943 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 170944 | 196, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 170945 | 280, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 170946 | 155, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 170947 | 227, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4 |
| 170948 | 138, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 170949 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 170950 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 170951 | }, |
| 170952 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 170953 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub -> FPR8 |
| 170954 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub_hi |
| 170955 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub -> FPR64 |
| 170956 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0 |
| 170957 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 170958 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 170959 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 170960 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_hi |
| 170961 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub -> FPR16 |
| 170962 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub_hi |
| 170963 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub |
| 170964 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub0 |
| 170965 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1 |
| 170966 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0 |
| 170967 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 170968 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 170969 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 170970 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub -> FPR32 |
| 170971 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub_hi |
| 170972 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32 |
| 170973 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_hi |
| 170974 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sube32 |
| 170975 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sube64 |
| 170976 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo32 |
| 170977 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64 |
| 170978 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0 |
| 170979 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1 |
| 170980 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2 |
| 170981 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3 |
| 170982 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4 |
| 170983 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5 |
| 170984 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6 |
| 170985 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7 |
| 170986 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubb |
| 170987 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd0 |
| 170988 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1 |
| 170989 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh0 |
| 170990 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1 |
| 170991 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq0 |
| 170992 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq1 |
| 170993 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs0 |
| 170994 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1 |
| 170995 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub -> FPR128 |
| 170996 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0 -> ZPR_K |
| 170997 | 99, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi |
| 170998 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 170999 | 99, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 171000 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_hi |
| 171001 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 171002 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 171003 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 171004 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 171005 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 171006 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 171007 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 171008 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 171009 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 171010 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 171011 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 171012 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 171013 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 171014 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 171015 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 171016 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 171017 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 171018 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 171019 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 171020 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 171021 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171022 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171023 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 171024 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 171025 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 171026 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 171027 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 171028 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 171029 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 171030 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 171031 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 171032 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 171033 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 171034 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 171035 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 171036 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 171037 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 171038 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 171039 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 171040 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 171041 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1_then_psub |
| 171042 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 171043 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 171044 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 171045 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 171046 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 171047 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 171048 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 171049 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 171050 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 171051 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 171052 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 171053 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 171054 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 171055 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 171056 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 171057 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 171058 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 171059 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 171060 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 171061 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 171062 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 171063 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 171064 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1 |
| 171065 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 171066 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 171067 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 171068 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 171069 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 171070 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 171071 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 171072 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1 |
| 171073 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 171074 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 171075 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 171076 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 171077 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 171078 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 171079 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 171080 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 171081 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 171082 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171083 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171084 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171085 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 171086 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 171087 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 171088 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 171089 | 187, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 171090 | 270, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 171091 | 148, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 171092 | 244, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 171093 | 157, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 171094 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub2 |
| 171095 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub3 |
| 171096 | }, |
| 171097 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 171098 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 171099 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:bsub_hi |
| 171100 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub -> FPR64 |
| 171101 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0 |
| 171102 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1 -> FPR64 |
| 171103 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2 -> FPR64 |
| 171104 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3 -> FPR64 |
| 171105 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_hi |
| 171106 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub -> FPR16 |
| 171107 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:hsub_hi |
| 171108 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub |
| 171109 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub0 |
| 171110 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1 |
| 171111 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0 |
| 171112 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1 -> FPR128 |
| 171113 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2 -> FPR128 |
| 171114 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3 -> FPR128 |
| 171115 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub -> FPR32 |
| 171116 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:ssub_hi |
| 171117 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32 |
| 171118 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_hi |
| 171119 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube32 |
| 171120 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sube64 |
| 171121 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo32 |
| 171122 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64 |
| 171123 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0 |
| 171124 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1 |
| 171125 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2 |
| 171126 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3 |
| 171127 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4 |
| 171128 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5 |
| 171129 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6 |
| 171130 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7 |
| 171131 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubb |
| 171132 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd0 |
| 171133 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1 |
| 171134 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh0 |
| 171135 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1 |
| 171136 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq0 |
| 171137 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubq1 |
| 171138 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs0 |
| 171139 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1 |
| 171140 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub -> FPR128 |
| 171141 | 107, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_K |
| 171142 | 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1 -> ZPR_K |
| 171143 | 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2 -> ZPRMul4 |
| 171144 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3 -> ZPR |
| 171145 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_hi |
| 171146 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 171147 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 171148 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 171149 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 171150 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 171151 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 171152 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 171153 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 171154 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 171155 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 171156 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 171157 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 171158 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 171159 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 171160 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 171161 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 171162 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 171163 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 171164 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 171165 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 171166 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171167 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171168 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 171169 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 171170 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 171171 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 171172 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 171173 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 171174 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 171175 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 171176 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 171177 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 171178 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 171179 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 171180 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 171181 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 171182 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 171183 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 171184 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 171185 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 171186 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 171187 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 171188 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 171189 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 171190 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 171191 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 171192 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 171193 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 171194 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 171195 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 171196 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 171197 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 171198 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 171199 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 171200 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 171201 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 171202 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 171203 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 171204 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 171205 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 171206 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 171207 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 171208 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 171209 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 171210 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 171211 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD |
| 171212 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 171213 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub2_dsub3 -> DD |
| 171214 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD |
| 171215 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 171216 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 171217 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 171218 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 171219 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 171220 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 171221 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 171222 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 171223 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 171224 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 171225 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 171226 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 171227 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171228 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171229 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171230 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 171231 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ |
| 171232 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 171233 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 171234 | 172, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 171235 | 282, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 171236 | 196, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 171237 | 280, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 171238 | 155, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4 |
| 171239 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 171240 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 171241 | }, |
| 171242 | { // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171243 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 171244 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 171245 | 56, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 171246 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 171247 | 65, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 171248 | 65, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 171249 | 65, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 171250 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 171251 | 8, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 171252 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 171253 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 171254 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 171255 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 171256 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 171257 | 98, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 171258 | 98, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 171259 | 98, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 171260 | 40, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 171261 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 171262 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 171263 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 171264 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 171265 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 171266 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 171267 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 171268 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 171269 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 171270 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 171271 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 171272 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 171273 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 171274 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 171275 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 171276 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 171277 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 171278 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 171279 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 171280 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 171281 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 171282 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 171283 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 171284 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 171285 | 92, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 171286 | 93, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR |
| 171287 | 108, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 171288 | 102, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR_3b |
| 171289 | 106, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPRMul2_and_ZPR_3b |
| 171290 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 171291 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 171292 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 171293 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 171294 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 171295 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 171296 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 171297 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 171298 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 171299 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 171300 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 171301 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 171302 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 171303 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 171304 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 171305 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 171306 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 171307 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 171308 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 171309 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 171310 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 171311 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171312 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171313 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 171314 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 171315 | 10, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 171316 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 171317 | 44, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171318 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 171319 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 171320 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 171321 | 10, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 171322 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 171323 | 44, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171324 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 171325 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 171326 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 171327 | 10, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 171328 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 171329 | 44, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171330 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 171331 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 171332 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 171333 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 171334 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 171335 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 171336 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 171337 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 171338 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 171339 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 171340 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 171341 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 171342 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 171343 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 171344 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 171345 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 171346 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 171347 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 171348 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 171349 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 171350 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 171351 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 171352 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 171353 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 171354 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 171355 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 171356 | 79, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 171357 | 116, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 171358 | 79, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 171359 | 77, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 171360 | 126, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 171361 | 115, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 171362 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 171363 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 171364 | 163, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 171365 | 248, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 171366 | 163, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 171367 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 171368 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 171369 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 171370 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 171371 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 171372 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171373 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171374 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171375 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 171376 | 147, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 171377 | 362, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 171378 | 241, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 171379 | 197, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171380 | 283, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171381 | 193, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 171382 | 278, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 171383 | 188, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 171384 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 171385 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 171386 | }, |
| 171387 | { // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 171388 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 171389 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 171390 | 56, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 171391 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0 |
| 171392 | 56, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 171393 | 56, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 171394 | 56, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3 -> FPR64 |
| 171395 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 171396 | 8, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 171397 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 171398 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:psub |
| 171399 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:psub0 |
| 171400 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1 |
| 171401 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0 |
| 171402 | 92, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 171403 | 92, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 171404 | 92, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3 -> FPR128 |
| 171405 | 40, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 171406 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 171407 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32 |
| 171408 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 171409 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sube32 |
| 171410 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sube64 |
| 171411 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:subo32 |
| 171412 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64 |
| 171413 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 171414 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 171415 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 171416 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 171417 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 171418 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 171419 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 171420 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 171421 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubb |
| 171422 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 171423 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 171424 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 171425 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 171426 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 171427 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 171428 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 171429 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 171430 | 92, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 171431 | 93, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPR |
| 171432 | 109, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_K |
| 171433 | 103, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPR_K |
| 171434 | 107, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3 -> ZPRMul2_and_ZPR_K |
| 171435 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 171436 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 171437 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 171438 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 171439 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 171440 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 171441 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 171442 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 171443 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 171444 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 171445 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 171446 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 171447 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 171448 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 171449 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 171450 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 171451 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 171452 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 171453 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 171454 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 171455 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 171456 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171457 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171458 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 171459 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 171460 | 8, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 171461 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 171462 | 40, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 171463 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 171464 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub -> FPR8 |
| 171465 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 171466 | 8, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub -> FPR16 |
| 171467 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 171468 | 40, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub -> FPR32 |
| 171469 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 171470 | 7, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 171471 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 171472 | 8, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 171473 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 171474 | 40, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 171475 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 171476 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 171477 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 171478 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 171479 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 171480 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 171481 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 171482 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 171483 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 171484 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 171485 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 171486 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 171487 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 171488 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 171489 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 171490 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 171491 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 171492 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 171493 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 171494 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 171495 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 171496 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 171497 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 171498 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 171499 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 171500 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 171501 | 75, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 171502 | 110, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 171503 | 75, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 -> DD |
| 171504 | 75, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 171505 | 117, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 171506 | 110, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 171507 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 171508 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 171509 | 128, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 171510 | 206, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 171511 | 128, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 -> QQ |
| 171512 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 171513 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 171514 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 171515 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 171516 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 171517 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171518 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171519 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171520 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 171521 | 128, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 171522 | 297, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 171523 | 206, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 171524 | 198, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 171525 | 284, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 171526 | 194, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 171527 | 279, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 171528 | 195, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 171529 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 171530 | 0, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 171531 | }, |
| 171532 | { // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 171533 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 171534 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 171535 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 171536 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 171537 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64 |
| 171538 | 65, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 171539 | 65, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 171540 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 171541 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 171542 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 171543 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub |
| 171544 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub0 |
| 171545 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1 |
| 171546 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 171547 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128 |
| 171548 | 98, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 171549 | 98, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 171550 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 171551 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 171552 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 171553 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 171554 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube32 |
| 171555 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube64 |
| 171556 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo32 |
| 171557 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64 |
| 171558 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 171559 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 171560 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 171561 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 171562 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 171563 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 171564 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 171565 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 171566 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubb |
| 171567 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 171568 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 171569 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 171570 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 171571 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 171572 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 171573 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 171574 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 171575 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 171576 | 96, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul2 |
| 171577 | 93, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR |
| 171578 | 108, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul4_and_ZPR_3b |
| 171579 | 102, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPR_3b |
| 171580 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 171581 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 171582 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 171583 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 171584 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 171585 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 171586 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 171587 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 171588 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 171589 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 171590 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 171591 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 171592 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 171593 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 171594 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 171595 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 171596 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 171597 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 171598 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 171599 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 171600 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 171601 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171602 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171603 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 171604 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 171605 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16 |
| 171606 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 171607 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32 |
| 171608 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 171609 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 171610 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 171611 | 10, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 171612 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 171613 | 44, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171614 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 171615 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 171616 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 171617 | 10, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 171618 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 171619 | 44, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171620 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 171621 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 171622 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 171623 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 171624 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 171625 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 171626 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 171627 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 171628 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 171629 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 171630 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 171631 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 171632 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 171633 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 171634 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 171635 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 171636 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 171637 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 171638 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 171639 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 171640 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 171641 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 171642 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 171643 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 171644 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 171645 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 171646 | 77, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 171647 | 115, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 171648 | 79, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 171649 | 75, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD |
| 171650 | 124, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 171651 | 113, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 171652 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 171653 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 171654 | 147, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 171655 | 241, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 171656 | 163, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 171657 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 171658 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 171659 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 171660 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 171661 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 171662 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171663 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171664 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171665 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 171666 | 128, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ |
| 171667 | 352, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 171668 | 224, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 171669 | 134, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2 |
| 171670 | 285, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 171671 | 197, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171672 | 283, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171673 | 193, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 171674 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 171675 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 171676 | }, |
| 171677 | { // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 171678 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 171679 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 171680 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 171681 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0 |
| 171682 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 171683 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 171684 | 56, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3 -> FPR64 |
| 171685 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 171686 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 171687 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 171688 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:psub |
| 171689 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:psub0 |
| 171690 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:psub1 |
| 171691 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0 |
| 171692 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 171693 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 171694 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub3 -> FPR128 |
| 171695 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 171696 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 171697 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32 |
| 171698 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 171699 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sube32 |
| 171700 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sube64 |
| 171701 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:subo32 |
| 171702 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64 |
| 171703 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 171704 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 171705 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 171706 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 171707 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 171708 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 171709 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 171710 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 171711 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubb |
| 171712 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 171713 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 171714 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 171715 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 171716 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 171717 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 171718 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 171719 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 171720 | 92, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 171721 | 99, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPRMul2_Hi |
| 171722 | 93, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPR |
| 171723 | 109, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPRMul4_and_ZPR_K |
| 171724 | 103, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub3 -> ZPR_K |
| 171725 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 171726 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 171727 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 171728 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 171729 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 171730 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 171731 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 171732 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 171733 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 171734 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 171735 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 171736 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 171737 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 171738 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 171739 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 171740 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 171741 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 171742 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 171743 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 171744 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 171745 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 171746 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171747 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171748 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 171749 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 171750 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 171751 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 171752 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 171753 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 171754 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub -> FPR8 |
| 171755 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 171756 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub -> FPR16 |
| 171757 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 171758 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub -> FPR32 |
| 171759 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 171760 | 7, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 171761 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 171762 | 8, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 171763 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 171764 | 40, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 171765 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 171766 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 171767 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 171768 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 171769 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 171770 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 171771 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 171772 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 171773 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 171774 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 171775 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 171776 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 171777 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 171778 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 171779 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 171780 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 171781 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 171782 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 171783 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 171784 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 171785 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 171786 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 171787 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 171788 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 171789 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 171790 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 171791 | 75, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 171792 | 110, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 171793 | 75, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 -> DD |
| 171794 | 75, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 171795 | 117, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 171796 | 110, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 171797 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 171798 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 171799 | 128, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 171800 | 206, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 171801 | 128, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 -> QQ |
| 171802 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 171803 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 171804 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 171805 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 171806 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 171807 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171808 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171809 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171810 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 171811 | 128, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 171812 | 297, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 171813 | 206, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 171814 | 148, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2Mul2_Hi |
| 171815 | 286, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 171816 | 198, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 171817 | 284, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 171818 | 194, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 171819 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 171820 | 0, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 171821 | }, |
| 171822 | { // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 171823 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 171824 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 171825 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64 |
| 171826 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 171827 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64 |
| 171828 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64 |
| 171829 | 65, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 171830 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 171831 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16 |
| 171832 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 171833 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub |
| 171834 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub0 |
| 171835 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub1 |
| 171836 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 171837 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128 |
| 171838 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128 |
| 171839 | 98, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 171840 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32 |
| 171841 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 171842 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 171843 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 171844 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sube32 |
| 171845 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sube64 |
| 171846 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo32 |
| 171847 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64 |
| 171848 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 171849 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 171850 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 171851 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 171852 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 171853 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 171854 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 171855 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 171856 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubb |
| 171857 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 171858 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 171859 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 171860 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 171861 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 171862 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 171863 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 171864 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 171865 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128 |
| 171866 | 93, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR |
| 171867 | 96, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul2 |
| 171868 | 93, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR |
| 171869 | 108, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPRMul4_and_ZPR_3b |
| 171870 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 171871 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 171872 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 171873 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 171874 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 171875 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 171876 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 171877 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 171878 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 171879 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 171880 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 171881 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 171882 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 171883 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 171884 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 171885 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 171886 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 171887 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 171888 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 171889 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 171890 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 171891 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 171892 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 171893 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 171894 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 171895 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16 |
| 171896 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 171897 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32 |
| 171898 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 171899 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 171900 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 171901 | 10, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 171902 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 171903 | 44, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 171904 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 171905 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 171906 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 171907 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16 |
| 171908 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 171909 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32 |
| 171910 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 171911 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 171912 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 171913 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 171914 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 171915 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 171916 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 171917 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 171918 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 171919 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 171920 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 171921 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 171922 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 171923 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 171924 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 171925 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 171926 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 171927 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 171928 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 171929 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 171930 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 171931 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 171932 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 171933 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 171934 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 171935 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 171936 | 75, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD |
| 171937 | 113, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 171938 | 77, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 171939 | 75, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD |
| 171940 | 121, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 171941 | 110, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD |
| 171942 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 171943 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 171944 | 128, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ |
| 171945 | 224, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 171946 | 147, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 171947 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 171948 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 171949 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 171950 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 171951 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 171952 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 171953 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 171954 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 171955 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 171956 | 128, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ |
| 171957 | 327, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 171958 | 206, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ |
| 171959 | 138, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2 |
| 171960 | 214, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2 |
| 171961 | 134, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2 |
| 171962 | 285, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 171963 | 197, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 171964 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 171965 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 171966 | }, |
| 171967 | { // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 171968 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:bsub -> FPR8 |
| 171969 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:bsub_hi |
| 171970 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub -> FPR64 |
| 171971 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub0 |
| 171972 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1 -> FPR64 |
| 171973 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2 -> FPR64 |
| 171974 | 56, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3 -> FPR64 |
| 171975 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub_hi |
| 171976 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:hsub -> FPR16 |
| 171977 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:hsub_hi |
| 171978 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:psub |
| 171979 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:psub0 |
| 171980 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:psub1 |
| 171981 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub0 |
| 171982 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub1 -> FPR128 |
| 171983 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub2 -> FPR128 |
| 171984 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub3 -> FPR128 |
| 171985 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:ssub -> FPR32 |
| 171986 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:ssub_hi |
| 171987 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sub_32 |
| 171988 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sub_32_hi |
| 171989 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sube32 |
| 171990 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sube64 |
| 171991 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:subo32 |
| 171992 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:subo64 |
| 171993 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_0 |
| 171994 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_1 |
| 171995 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_2 |
| 171996 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_3 |
| 171997 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_4 |
| 171998 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_5 |
| 171999 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_6 |
| 172000 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_7 |
| 172001 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubb |
| 172002 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubd0 |
| 172003 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubd1 |
| 172004 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh0 |
| 172005 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1 |
| 172006 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubq0 |
| 172007 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubq1 |
| 172008 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs0 |
| 172009 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1 |
| 172010 | 92, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub -> FPR128 |
| 172011 | 93, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub0 -> ZPR |
| 172012 | 99, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub1 -> ZPRMul2_Hi |
| 172013 | 93, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub2 -> ZPR |
| 172014 | 109, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub3 -> ZPRMul4_and_ZPR_K |
| 172015 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub_hi |
| 172016 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq0 |
| 172017 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubd1_then_zasubq1 |
| 172018 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd0 |
| 172019 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1 |
| 172020 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq0 |
| 172021 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubq1 |
| 172022 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 172023 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 172024 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd0 |
| 172025 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1 |
| 172026 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq0 |
| 172027 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubq1 |
| 172028 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs0 |
| 172029 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1 |
| 172030 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 172031 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 172032 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 172033 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 172034 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 172035 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 172036 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172037 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172038 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub -> FPR8 |
| 172039 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_bsub_hi |
| 172040 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub -> FPR16 |
| 172041 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_hsub_hi |
| 172042 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub -> FPR32 |
| 172043 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_then_ssub_hi |
| 172044 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub -> FPR8 |
| 172045 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_bsub_hi |
| 172046 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub -> FPR16 |
| 172047 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_hsub_hi |
| 172048 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub -> FPR32 |
| 172049 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub3_then_ssub_hi |
| 172050 | 7, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub -> FPR8 |
| 172051 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_bsub_hi |
| 172052 | 8, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub -> FPR16 |
| 172053 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_hsub_hi |
| 172054 | 40, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub -> FPR32 |
| 172055 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_then_ssub_hi |
| 172056 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:psub1_then_psub |
| 172057 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub1_then_dsub_hi |
| 172058 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub3_then_dsub_hi |
| 172059 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub2_then_dsub_hi |
| 172060 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32 |
| 172061 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_7_then_sub_32_hi |
| 172062 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32 |
| 172063 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_hi |
| 172064 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32 |
| 172065 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_5_then_sub_32_hi |
| 172066 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32 |
| 172067 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_hi |
| 172068 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32 |
| 172069 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_3_then_sub_32_hi |
| 172070 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32 |
| 172071 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_hi |
| 172072 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32 |
| 172073 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_1_then_sub_32_hi |
| 172074 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32 |
| 172075 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:subo64_then_sub_32_hi |
| 172076 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub1_then_zsub_hi |
| 172077 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub3_then_zsub_hi |
| 172078 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub2_then_zsub_hi |
| 172079 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub0_dsub1 |
| 172080 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub0_dsub1_dsub2 |
| 172081 | 75, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_dsub2 -> DD |
| 172082 | 110, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub1_dsub2_dsub3 -> DDD |
| 172083 | 75, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub2_dsub3 -> DD |
| 172084 | 75, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub_dsub1 -> DD |
| 172085 | 117, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 172086 | 110, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:dsub_dsub1_dsub2 -> DDD |
| 172087 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub0_qsub1 |
| 172088 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub0_qsub1_qsub2 |
| 172089 | 128, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub1_qsub2 -> QQ |
| 172090 | 206, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub1_qsub2_qsub3 -> QQQ |
| 172091 | 128, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:qsub2_qsub3 -> QQ |
| 172092 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 172093 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_0_x8sub_1 |
| 172094 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_2_x8sub_3 |
| 172095 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_4_x8sub_5 |
| 172096 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_6_x8sub_7 |
| 172097 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172098 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172099 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172100 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:sub_32_subo64_then_sub_32 |
| 172101 | 128, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub_qsub1 -> QQ |
| 172102 | 297, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 172103 | 206, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub_qsub1_qsub2 -> QQQ |
| 172104 | 157, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 172105 | 231, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 172106 | 148, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub1_zsub2 -> ZPR2Mul2_Hi |
| 172107 | 286, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 172108 | 198, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 172109 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub0_zsub2 |
| 172110 | 0, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K:zsub1_zsub3 |
| 172111 | }, |
| 172112 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 172113 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:bsub -> FPR8 |
| 172114 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:bsub_hi |
| 172115 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub -> FPR64_lo |
| 172116 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0 |
| 172117 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1 -> FPR64_lo |
| 172118 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2 -> FPR64_lo |
| 172119 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3 -> FPR64_lo |
| 172120 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_hi |
| 172121 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:hsub -> FPR16_lo |
| 172122 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:hsub_hi |
| 172123 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:psub |
| 172124 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:psub0 |
| 172125 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:psub1 |
| 172126 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0 |
| 172127 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1 -> FPR128_lo |
| 172128 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2 -> FPR128_lo |
| 172129 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3 -> FPR128_lo |
| 172130 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172131 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:ssub_hi |
| 172132 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32 |
| 172133 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_hi |
| 172134 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sube32 |
| 172135 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sube64 |
| 172136 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:subo32 |
| 172137 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:subo64 |
| 172138 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0 |
| 172139 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1 |
| 172140 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2 |
| 172141 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3 |
| 172142 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4 |
| 172143 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5 |
| 172144 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6 |
| 172145 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7 |
| 172146 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubb |
| 172147 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd0 |
| 172148 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1 |
| 172149 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh0 |
| 172150 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1 |
| 172151 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq0 |
| 172152 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubq1 |
| 172153 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs0 |
| 172154 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1 |
| 172155 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub -> FPR128_0to7 |
| 172156 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0 -> ZPR_3b |
| 172157 | 105, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1 -> ZPRMul2_Lo_and_ZPRMul4 |
| 172158 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2 -> ZPR_4b |
| 172159 | 100, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3 -> ZPRMul2_Lo |
| 172160 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_hi |
| 172161 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq0 |
| 172162 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubd1_then_zasubq1 |
| 172163 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd0 |
| 172164 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1 |
| 172165 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq0 |
| 172166 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubq1 |
| 172167 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 172168 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 172169 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd0 |
| 172170 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1 |
| 172171 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq0 |
| 172172 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubq1 |
| 172173 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs0 |
| 172174 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1 |
| 172175 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 172176 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 172177 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 172178 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 172179 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 172180 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 172181 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172182 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172183 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 172184 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_bsub_hi |
| 172185 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 172186 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_hsub_hi |
| 172187 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172188 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_then_ssub_hi |
| 172189 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 172190 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_bsub_hi |
| 172191 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 172192 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_hsub_hi |
| 172193 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172194 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub3_then_ssub_hi |
| 172195 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 172196 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_bsub_hi |
| 172197 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 172198 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_hsub_hi |
| 172199 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172200 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_then_ssub_hi |
| 172201 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:psub1_then_psub |
| 172202 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_then_dsub_hi |
| 172203 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub3_then_dsub_hi |
| 172204 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_then_dsub_hi |
| 172205 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32 |
| 172206 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 172207 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32 |
| 172208 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 172209 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32 |
| 172210 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 172211 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32 |
| 172212 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 172213 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32 |
| 172214 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 172215 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32 |
| 172216 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 172217 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32 |
| 172218 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 172219 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32 |
| 172220 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:subo64_then_sub_32_hi |
| 172221 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_then_zsub_hi |
| 172222 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub3_then_zsub_hi |
| 172223 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_then_zsub_hi |
| 172224 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1 |
| 172225 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 172226 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172227 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172228 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172229 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172230 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 172231 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172232 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1 |
| 172233 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 172234 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 172235 | 220, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 172236 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 172237 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 172238 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_0_x8sub_1 |
| 172239 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_x8sub_3 |
| 172240 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_x8sub_5 |
| 172241 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_x8sub_7 |
| 172242 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172243 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172244 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172245 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 172246 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7 |
| 172247 | 324, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7 |
| 172248 | 222, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 172249 | 199, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 172250 | 287, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 172251 | 171, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 172252 | 256, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 172253 | 165, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 172254 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub0_zsub2 |
| 172255 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4:zsub1_zsub3 |
| 172256 | }, |
| 172257 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 172258 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:bsub -> FPR8 |
| 172259 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:bsub_hi |
| 172260 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub -> FPR64_lo |
| 172261 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0 |
| 172262 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1 -> FPR64_lo |
| 172263 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2 -> FPR64_lo |
| 172264 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3 -> FPR64_lo |
| 172265 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_hi |
| 172266 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:hsub -> FPR16_lo |
| 172267 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:hsub_hi |
| 172268 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:psub |
| 172269 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:psub0 |
| 172270 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:psub1 |
| 172271 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0 |
| 172272 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1 -> FPR128_0to7 |
| 172273 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2 -> FPR128_lo |
| 172274 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub3 -> FPR128_lo |
| 172275 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172276 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:ssub_hi |
| 172277 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32 |
| 172278 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_hi |
| 172279 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sube32 |
| 172280 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sube64 |
| 172281 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:subo32 |
| 172282 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:subo64 |
| 172283 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_0 |
| 172284 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1 |
| 172285 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2 |
| 172286 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3 |
| 172287 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4 |
| 172288 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5 |
| 172289 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6 |
| 172290 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7 |
| 172291 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubb |
| 172292 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd0 |
| 172293 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1 |
| 172294 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh0 |
| 172295 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1 |
| 172296 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubq0 |
| 172297 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubq1 |
| 172298 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs0 |
| 172299 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1 |
| 172300 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub -> FPR128_0to7 |
| 172301 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_3b |
| 172302 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1 -> ZPR_3b |
| 172303 | 105, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 172304 | 97, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub3 -> ZPR_4b |
| 172305 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_hi |
| 172306 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq0 |
| 172307 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubd1_then_zasubq1 |
| 172308 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd0 |
| 172309 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1 |
| 172310 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq0 |
| 172311 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubq1 |
| 172312 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 172313 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 172314 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd0 |
| 172315 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1 |
| 172316 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq0 |
| 172317 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubq1 |
| 172318 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs0 |
| 172319 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1 |
| 172320 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 172321 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 172322 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 172323 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 172324 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 172325 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 172326 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172327 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172328 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 172329 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_bsub_hi |
| 172330 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 172331 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_hsub_hi |
| 172332 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172333 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_then_ssub_hi |
| 172334 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 172335 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_bsub_hi |
| 172336 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 172337 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_hsub_hi |
| 172338 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172339 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub3_then_ssub_hi |
| 172340 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 172341 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_bsub_hi |
| 172342 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 172343 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_hsub_hi |
| 172344 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172345 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_then_ssub_hi |
| 172346 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:psub1_then_psub |
| 172347 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_then_dsub_hi |
| 172348 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub3_then_dsub_hi |
| 172349 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2_then_dsub_hi |
| 172350 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32 |
| 172351 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 172352 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32 |
| 172353 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 172354 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32 |
| 172355 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 172356 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32 |
| 172357 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 172358 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32 |
| 172359 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 172360 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32 |
| 172361 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 172362 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32 |
| 172363 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 172364 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32 |
| 172365 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:subo64_then_sub_32_hi |
| 172366 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_then_zsub_hi |
| 172367 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub3_then_zsub_hi |
| 172368 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2_then_zsub_hi |
| 172369 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1 |
| 172370 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 172371 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172372 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172373 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172374 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172375 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 172376 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172377 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1 |
| 172378 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 172379 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7 |
| 172380 | 222, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7 |
| 172381 | 140, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 172382 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 172383 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_0_x8sub_1 |
| 172384 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_x8sub_3 |
| 172385 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_x8sub_5 |
| 172386 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_x8sub_7 |
| 172387 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172388 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172389 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172390 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 172391 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172392 | 353, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 172393 | 242, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 172394 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 172395 | 288, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 172396 | 199, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 172397 | 287, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 172398 | 171, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 172399 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub0_zsub2 |
| 172400 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4:zsub1_zsub3 |
| 172401 | }, |
| 172402 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 172403 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub -> FPR8 |
| 172404 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:bsub_hi |
| 172405 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub -> FPR64_lo |
| 172406 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0 |
| 172407 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1 -> FPR64_lo |
| 172408 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2 -> FPR64_lo |
| 172409 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3 -> FPR64_lo |
| 172410 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_hi |
| 172411 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub -> FPR16_lo |
| 172412 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:hsub_hi |
| 172413 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub |
| 172414 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub0 |
| 172415 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1 |
| 172416 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0 |
| 172417 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 172418 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 172419 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 172420 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172421 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:ssub_hi |
| 172422 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32 |
| 172423 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_hi |
| 172424 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube32 |
| 172425 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sube64 |
| 172426 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo32 |
| 172427 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64 |
| 172428 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0 |
| 172429 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1 |
| 172430 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2 |
| 172431 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3 |
| 172432 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4 |
| 172433 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5 |
| 172434 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6 |
| 172435 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7 |
| 172436 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubb |
| 172437 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd0 |
| 172438 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1 |
| 172439 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh0 |
| 172440 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1 |
| 172441 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq0 |
| 172442 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubq1 |
| 172443 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs0 |
| 172444 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1 |
| 172445 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub -> FPR128_0to7 |
| 172446 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0 -> ZPR_3b |
| 172447 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1 -> ZPRMul2_and_ZPR_3b |
| 172448 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2 -> ZPR_3b |
| 172449 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3 -> ZPRMul2_and_ZPR_3b |
| 172450 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_hi |
| 172451 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq0 |
| 172452 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubd1_then_zasubq1 |
| 172453 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd0 |
| 172454 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1 |
| 172455 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq0 |
| 172456 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubq1 |
| 172457 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 172458 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 172459 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd0 |
| 172460 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1 |
| 172461 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq0 |
| 172462 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubq1 |
| 172463 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs0 |
| 172464 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1 |
| 172465 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 172466 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 172467 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 172468 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 172469 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 172470 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 172471 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172472 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172473 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 172474 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_bsub_hi |
| 172475 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 172476 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_hsub_hi |
| 172477 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172478 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_then_ssub_hi |
| 172479 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 172480 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_bsub_hi |
| 172481 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 172482 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_hsub_hi |
| 172483 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172484 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub3_then_ssub_hi |
| 172485 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 172486 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_bsub_hi |
| 172487 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 172488 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_hsub_hi |
| 172489 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172490 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_then_ssub_hi |
| 172491 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:psub1_then_psub |
| 172492 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_then_dsub_hi |
| 172493 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub3_then_dsub_hi |
| 172494 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_then_dsub_hi |
| 172495 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32 |
| 172496 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 172497 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32 |
| 172498 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 172499 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32 |
| 172500 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 172501 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32 |
| 172502 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 172503 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32 |
| 172504 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 172505 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32 |
| 172506 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 172507 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32 |
| 172508 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 172509 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32 |
| 172510 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:subo64_then_sub_32_hi |
| 172511 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_then_zsub_hi |
| 172512 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub3_then_zsub_hi |
| 172513 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_then_zsub_hi |
| 172514 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1 |
| 172515 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 172516 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172517 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172518 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172519 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172520 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 172521 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172522 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1 |
| 172523 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 172524 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172525 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 172526 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172527 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 172528 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_0_x8sub_1 |
| 172529 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_x8sub_3 |
| 172530 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_x8sub_5 |
| 172531 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_x8sub_7 |
| 172532 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172533 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172534 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172535 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 172536 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172537 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 172538 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 172539 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 172540 | 273, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 172541 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 172542 | 274, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 172543 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 172544 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub0_zsub2 |
| 172545 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b:zsub1_zsub3 |
| 172546 | }, |
| 172547 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 172548 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:bsub -> FPR8 |
| 172549 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:bsub_hi |
| 172550 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub -> FPR64_lo |
| 172551 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0 |
| 172552 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1 -> FPR64_lo |
| 172553 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2 -> FPR64_lo |
| 172554 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3 -> FPR64_lo |
| 172555 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_hi |
| 172556 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:hsub -> FPR16_lo |
| 172557 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:hsub_hi |
| 172558 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:psub |
| 172559 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:psub0 |
| 172560 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:psub1 |
| 172561 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0 |
| 172562 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1 -> FPR128_0to7 |
| 172563 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2 -> FPR128_0to7 |
| 172564 | 94, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub3 -> FPR128_lo |
| 172565 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172566 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:ssub_hi |
| 172567 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32 |
| 172568 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_hi |
| 172569 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sube32 |
| 172570 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sube64 |
| 172571 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:subo32 |
| 172572 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:subo64 |
| 172573 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_0 |
| 172574 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1 |
| 172575 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2 |
| 172576 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3 |
| 172577 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4 |
| 172578 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5 |
| 172579 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6 |
| 172580 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7 |
| 172581 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubb |
| 172582 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd0 |
| 172583 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1 |
| 172584 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh0 |
| 172585 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1 |
| 172586 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubq0 |
| 172587 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubq1 |
| 172588 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs0 |
| 172589 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1 |
| 172590 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub -> FPR128_0to7 |
| 172591 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0 -> ZPR_3b |
| 172592 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1 -> ZPRMul2_and_ZPR_3b |
| 172593 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2 -> ZPR_3b |
| 172594 | 105, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub3 -> ZPRMul2_Lo_and_ZPRMul4 |
| 172595 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_hi |
| 172596 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq0 |
| 172597 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubd1_then_zasubq1 |
| 172598 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd0 |
| 172599 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1 |
| 172600 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq0 |
| 172601 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubq1 |
| 172602 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 172603 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 172604 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd0 |
| 172605 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1 |
| 172606 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq0 |
| 172607 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubq1 |
| 172608 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs0 |
| 172609 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1 |
| 172610 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 172611 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 172612 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 172613 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 172614 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 172615 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 172616 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172617 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172618 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 172619 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_bsub_hi |
| 172620 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 172621 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_hsub_hi |
| 172622 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172623 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_then_ssub_hi |
| 172624 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 172625 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_bsub_hi |
| 172626 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 172627 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_hsub_hi |
| 172628 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172629 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub3_then_ssub_hi |
| 172630 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 172631 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_bsub_hi |
| 172632 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 172633 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_hsub_hi |
| 172634 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172635 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_then_ssub_hi |
| 172636 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:psub1_then_psub |
| 172637 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_then_dsub_hi |
| 172638 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub3_then_dsub_hi |
| 172639 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2_then_dsub_hi |
| 172640 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32 |
| 172641 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 172642 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32 |
| 172643 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 172644 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32 |
| 172645 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 172646 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32 |
| 172647 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 172648 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32 |
| 172649 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 172650 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32 |
| 172651 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 172652 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32 |
| 172653 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 172654 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32 |
| 172655 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:subo64_then_sub_32_hi |
| 172656 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_then_zsub_hi |
| 172657 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub3_then_zsub_hi |
| 172658 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2_then_zsub_hi |
| 172659 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1 |
| 172660 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 172661 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172662 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172663 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172664 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 172665 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 172666 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 172667 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1 |
| 172668 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 172669 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172670 | 242, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 172671 | 146, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7 |
| 172672 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 172673 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_0_x8sub_1 |
| 172674 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_x8sub_3 |
| 172675 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_x8sub_5 |
| 172676 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_x8sub_7 |
| 172677 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172678 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172679 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172680 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 172681 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 172682 | 363, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 172683 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 172684 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 172685 | 273, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 172686 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 172687 | 288, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 172688 | 199, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 172689 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub0_zsub2 |
| 172690 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4:zsub1_zsub3 |
| 172691 | }, |
| 172692 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 172693 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub -> FPR8 |
| 172694 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:bsub_hi |
| 172695 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 172696 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0 |
| 172697 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 172698 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 172699 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 172700 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_hi |
| 172701 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 172702 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:hsub_hi |
| 172703 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub |
| 172704 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub0 |
| 172705 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1 |
| 172706 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0 |
| 172707 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 172708 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 172709 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 172710 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 172711 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:ssub_hi |
| 172712 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32 |
| 172713 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_hi |
| 172714 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sube32 |
| 172715 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sube64 |
| 172716 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo32 |
| 172717 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64 |
| 172718 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0 |
| 172719 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1 |
| 172720 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2 |
| 172721 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3 |
| 172722 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4 |
| 172723 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5 |
| 172724 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6 |
| 172725 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7 |
| 172726 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubb |
| 172727 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd0 |
| 172728 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1 |
| 172729 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh0 |
| 172730 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1 |
| 172731 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq0 |
| 172732 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubq1 |
| 172733 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs0 |
| 172734 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1 |
| 172735 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 172736 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0 -> ZPR_4b |
| 172737 | 96, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1 -> ZPRMul2 |
| 172738 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 172739 | 99, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 172740 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_hi |
| 172741 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 172742 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 172743 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 172744 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 172745 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 172746 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 172747 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 172748 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 172749 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 172750 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 172751 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 172752 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 172753 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 172754 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 172755 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 172756 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 172757 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 172758 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 172759 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 172760 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 172761 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172762 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172763 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 172764 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 172765 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 172766 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 172767 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 172768 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 172769 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 172770 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 172771 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 172772 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 172773 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 172774 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 172775 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 172776 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 172777 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 172778 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 172779 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 172780 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 172781 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:psub1_then_psub |
| 172782 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 172783 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 172784 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 172785 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 172786 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 172787 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 172788 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 172789 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 172790 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 172791 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 172792 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 172793 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 172794 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 172795 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 172796 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 172797 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 172798 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 172799 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 172800 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 172801 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 172802 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 172803 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 172804 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1 |
| 172805 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 172806 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 172807 | 110, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 172808 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 172809 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 172810 | 118, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 172811 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 172812 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1 |
| 172813 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 172814 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 172815 | 206, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 172816 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 172817 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 172818 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 172819 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 172820 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 172821 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 172822 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172823 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172824 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172825 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 172826 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 172827 | 302, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 172828 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 172829 | 162, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 172830 | 240, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 172831 | 134, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2 |
| 172832 | 235, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 172833 | 157, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 172834 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub0_zsub2 |
| 172835 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi:zsub1_zsub3 |
| 172836 | }, |
| 172837 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 172838 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 172839 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 172840 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 172841 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 172842 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 172843 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 172844 | 56, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 172845 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 172846 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 172847 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 172848 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 172849 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 172850 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 172851 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 172852 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 172853 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 172854 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 172855 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 172856 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 172857 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 172858 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 172859 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 172860 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 172861 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 172862 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 172863 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 172864 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 172865 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 172866 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 172867 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 172868 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 172869 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 172870 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 172871 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 172872 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 172873 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 172874 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 172875 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 172876 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 172877 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 172878 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 172879 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 172880 | 92, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 172881 | 104, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_Hi_and_ZPRMul4 |
| 172882 | 109, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul4_and_ZPR_K |
| 172883 | 104, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 172884 | 109, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPRMul4_and_ZPR_K |
| 172885 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 172886 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 172887 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 172888 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 172889 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 172890 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 172891 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 172892 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 172893 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 172894 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 172895 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 172896 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 172897 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 172898 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 172899 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 172900 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 172901 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 172902 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 172903 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 172904 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 172905 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 172906 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 172907 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 172908 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 172909 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 172910 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 172911 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 172912 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 172913 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 172914 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 172915 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 172916 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 172917 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 172918 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 172919 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 172920 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 172921 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 172922 | 8, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 172923 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 172924 | 40, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 172925 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 172926 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 172927 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 172928 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 172929 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 172930 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 172931 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 172932 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 172933 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 172934 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 172935 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 172936 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 172937 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 172938 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 172939 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 172940 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 172941 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 172942 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 172943 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 172944 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 172945 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 172946 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 172947 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 172948 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 172949 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 172950 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 172951 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 |
| 172952 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 172953 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 |
| 172954 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 |
| 172955 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 172956 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 |
| 172957 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 172958 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 172959 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 |
| 172960 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 172961 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 |
| 172962 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 172963 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 172964 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 172965 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 172966 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 172967 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 172968 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 172969 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 172970 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 172971 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 |
| 172972 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 172973 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 |
| 172974 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 |
| 172975 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 172976 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 |
| 172977 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 172978 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 |
| 172979 | 190, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 172980 | 200, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 172981 | }, |
| 172982 | { // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 172983 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub -> FPR8 |
| 172984 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:bsub_hi |
| 172985 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub -> FPR64_lo |
| 172986 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0 |
| 172987 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1 -> FPR64_lo |
| 172988 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2 -> FPR64_lo |
| 172989 | 65, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3 -> FPR64_lo |
| 172990 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_hi |
| 172991 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub -> FPR16_lo |
| 172992 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:hsub_hi |
| 172993 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub |
| 172994 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub0 |
| 172995 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1 |
| 172996 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0 |
| 172997 | 98, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1 -> FPR128_0to7 |
| 172998 | 94, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2 -> FPR128_lo |
| 172999 | 94, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3 -> FPR128_lo |
| 173000 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173001 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:ssub_hi |
| 173002 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32 |
| 173003 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_hi |
| 173004 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube32 |
| 173005 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sube64 |
| 173006 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo32 |
| 173007 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64 |
| 173008 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0 |
| 173009 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1 |
| 173010 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2 |
| 173011 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3 |
| 173012 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4 |
| 173013 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5 |
| 173014 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6 |
| 173015 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7 |
| 173016 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubb |
| 173017 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd0 |
| 173018 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1 |
| 173019 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh0 |
| 173020 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1 |
| 173021 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq0 |
| 173022 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubq1 |
| 173023 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs0 |
| 173024 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1 |
| 173025 | 98, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub -> FPR128_0to7 |
| 173026 | 108, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0 -> ZPRMul4_and_ZPR_3b |
| 173027 | 108, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1 -> ZPRMul4_and_ZPR_3b |
| 173028 | 105, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2 -> ZPRMul2_Lo_and_ZPRMul4 |
| 173029 | 105, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3 -> ZPRMul2_Lo_and_ZPRMul4 |
| 173030 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_hi |
| 173031 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq0 |
| 173032 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubd1_then_zasubq1 |
| 173033 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd0 |
| 173034 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1 |
| 173035 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq0 |
| 173036 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubq1 |
| 173037 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 173038 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 173039 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd0 |
| 173040 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1 |
| 173041 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq0 |
| 173042 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubq1 |
| 173043 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs0 |
| 173044 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1 |
| 173045 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 173046 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 173047 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 173048 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 173049 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 173050 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 173051 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173052 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173053 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 173054 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_bsub_hi |
| 173055 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 173056 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_hsub_hi |
| 173057 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173058 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_then_ssub_hi |
| 173059 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 173060 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_bsub_hi |
| 173061 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub -> FPR16_lo |
| 173062 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_hsub_hi |
| 173063 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173064 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub3_then_ssub_hi |
| 173065 | 7, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 173066 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_bsub_hi |
| 173067 | 10, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 173068 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_hsub_hi |
| 173069 | 44, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173070 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_then_ssub_hi |
| 173071 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:psub1_then_psub |
| 173072 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_then_dsub_hi |
| 173073 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub3_then_dsub_hi |
| 173074 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_then_dsub_hi |
| 173075 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32 |
| 173076 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 173077 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32 |
| 173078 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 173079 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32 |
| 173080 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 173081 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32 |
| 173082 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 173083 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32 |
| 173084 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 173085 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32 |
| 173086 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 173087 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32 |
| 173088 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 173089 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32 |
| 173090 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:subo64_then_sub_32_hi |
| 173091 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_then_zsub_hi |
| 173092 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub3_then_zsub_hi |
| 173093 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_then_zsub_hi |
| 173094 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1 |
| 173095 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 173096 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2 |
| 173097 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub1_dsub2_dsub3 |
| 173098 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub2_dsub3 |
| 173099 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1 |
| 173100 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 |
| 173101 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:dsub_dsub1_dsub2 |
| 173102 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1 |
| 173103 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 173104 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2 |
| 173105 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub1_qsub2_qsub3 |
| 173106 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:qsub2_qsub3 |
| 173107 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 173108 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_0_x8sub_1 |
| 173109 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_x8sub_3 |
| 173110 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_x8sub_5 |
| 173111 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_x8sub_7 |
| 173112 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173113 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173114 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173115 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 173116 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1 |
| 173117 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 |
| 173118 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub_qsub1_qsub2 |
| 173119 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1 |
| 173120 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub1_zsub2 |
| 173121 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2 |
| 173122 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub2_zsub3 |
| 173123 | 0, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub2_zsub3 |
| 173124 | 191, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub0_zsub2 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 173125 | 191, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4:zsub1_zsub3 -> ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 173126 | }, |
| 173127 | { // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 173128 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub -> FPR8 |
| 173129 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:bsub_hi |
| 173130 | 56, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub -> FPR64 |
| 173131 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0 |
| 173132 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1 -> FPR64_lo |
| 173133 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2 -> FPR64_lo |
| 173134 | 65, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3 -> FPR64_lo |
| 173135 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_hi |
| 173136 | 8, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub -> FPR16 |
| 173137 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:hsub_hi |
| 173138 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub |
| 173139 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub0 |
| 173140 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1 |
| 173141 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0 |
| 173142 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1 -> FPR128_0to7 |
| 173143 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2 -> FPR128_0to7 |
| 173144 | 98, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3 -> FPR128_0to7 |
| 173145 | 40, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub -> FPR32 |
| 173146 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:ssub_hi |
| 173147 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32 |
| 173148 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_hi |
| 173149 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube32 |
| 173150 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sube64 |
| 173151 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo32 |
| 173152 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64 |
| 173153 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0 |
| 173154 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1 |
| 173155 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2 |
| 173156 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3 |
| 173157 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4 |
| 173158 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5 |
| 173159 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6 |
| 173160 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7 |
| 173161 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubb |
| 173162 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd0 |
| 173163 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1 |
| 173164 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh0 |
| 173165 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1 |
| 173166 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq0 |
| 173167 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubq1 |
| 173168 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs0 |
| 173169 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1 |
| 173170 | 92, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub -> FPR128 |
| 173171 | 103, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0 -> ZPR_K |
| 173172 | 108, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1 -> ZPRMul4_and_ZPR_3b |
| 173173 | 102, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2 -> ZPR_3b |
| 173174 | 106, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3 -> ZPRMul2_and_ZPR_3b |
| 173175 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_hi |
| 173176 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq0 |
| 173177 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubd1_then_zasubq1 |
| 173178 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd0 |
| 173179 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1 |
| 173180 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq0 |
| 173181 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubq1 |
| 173182 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq0 |
| 173183 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubs1_then_zasubd1_then_zasubq1 |
| 173184 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd0 |
| 173185 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1 |
| 173186 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq0 |
| 173187 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubq1 |
| 173188 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs0 |
| 173189 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1 |
| 173190 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq0 |
| 173191 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubd1_then_zasubq1 |
| 173192 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd0 |
| 173193 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1 |
| 173194 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq0 |
| 173195 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubq1 |
| 173196 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173197 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173198 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub -> FPR8 |
| 173199 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_bsub_hi |
| 173200 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub -> FPR16_lo |
| 173201 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_hsub_hi |
| 173202 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173203 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_then_ssub_hi |
| 173204 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub -> FPR8 |
| 173205 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_bsub_hi |
| 173206 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub -> FPR16_lo |
| 173207 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_hsub_hi |
| 173208 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173209 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub3_then_ssub_hi |
| 173210 | 7, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub -> FPR8 |
| 173211 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_bsub_hi |
| 173212 | 10, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub -> FPR16_lo |
| 173213 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_hsub_hi |
| 173214 | 44, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173215 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_then_ssub_hi |
| 173216 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:psub1_then_psub |
| 173217 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_then_dsub_hi |
| 173218 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub3_then_dsub_hi |
| 173219 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_then_dsub_hi |
| 173220 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32 |
| 173221 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_7_then_sub_32_hi |
| 173222 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32 |
| 173223 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_hi |
| 173224 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32 |
| 173225 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_5_then_sub_32_hi |
| 173226 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32 |
| 173227 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_hi |
| 173228 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32 |
| 173229 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_3_then_sub_32_hi |
| 173230 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32 |
| 173231 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_hi |
| 173232 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32 |
| 173233 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_1_then_sub_32_hi |
| 173234 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32 |
| 173235 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:subo64_then_sub_32_hi |
| 173236 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_then_zsub_hi |
| 173237 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub3_then_zsub_hi |
| 173238 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_then_zsub_hi |
| 173239 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1 |
| 173240 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub0_dsub1_dsub2 |
| 173241 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 173242 | 116, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 173243 | 79, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 173244 | 77, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1 -> DD_with_dsub1_in_FPR64_lo |
| 173245 | 126, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 173246 | 115, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:dsub_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 173247 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1 |
| 173248 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub0_qsub1_qsub2 |
| 173249 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 173250 | 248, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 173251 | 163, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 173252 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_x8sub_1_then_sub_32 |
| 173253 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_0_x8sub_1 |
| 173254 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_x8sub_3 |
| 173255 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_x8sub_5 |
| 173256 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_x8sub_7 |
| 173257 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173258 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173259 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173260 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:sub_32_subo64_then_sub_32 |
| 173261 | 147, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1 -> QQ_with_qsub1_in_FPR128_0to7 |
| 173262 | 362, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 173263 | 241, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub_qsub1_qsub2 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 173264 | 201, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 173265 | 289, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub1_zsub2 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 173266 | 193, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 173267 | 278, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 173268 | 188, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 173269 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub0_zsub2 |
| 173270 | 0, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K:zsub1_zsub3 |
| 173271 | }, |
| 173272 | { // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 173273 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub -> FPR8 |
| 173274 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:bsub_hi |
| 173275 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub -> FPR64 |
| 173276 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0 |
| 173277 | 56, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1 -> FPR64 |
| 173278 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2 -> FPR64_lo |
| 173279 | 65, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3 -> FPR64_lo |
| 173280 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_hi |
| 173281 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub -> FPR16 |
| 173282 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:hsub_hi |
| 173283 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub |
| 173284 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub0 |
| 173285 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1 |
| 173286 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0 |
| 173287 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1 -> FPR128 |
| 173288 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2 -> FPR128_0to7 |
| 173289 | 98, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3 -> FPR128_0to7 |
| 173290 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub -> FPR32 |
| 173291 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:ssub_hi |
| 173292 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32 |
| 173293 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_hi |
| 173294 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube32 |
| 173295 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sube64 |
| 173296 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo32 |
| 173297 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64 |
| 173298 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0 |
| 173299 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1 |
| 173300 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2 |
| 173301 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3 |
| 173302 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4 |
| 173303 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5 |
| 173304 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6 |
| 173305 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7 |
| 173306 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubb |
| 173307 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd0 |
| 173308 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1 |
| 173309 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh0 |
| 173310 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1 |
| 173311 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq0 |
| 173312 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubq1 |
| 173313 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs0 |
| 173314 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1 |
| 173315 | 92, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub -> FPR128 |
| 173316 | 107, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0 -> ZPRMul2_and_ZPR_K |
| 173317 | 103, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1 -> ZPR_K |
| 173318 | 108, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2 -> ZPRMul4_and_ZPR_3b |
| 173319 | 102, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3 -> ZPR_3b |
| 173320 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_hi |
| 173321 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq0 |
| 173322 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubd1_then_zasubq1 |
| 173323 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd0 |
| 173324 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1 |
| 173325 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq0 |
| 173326 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubq1 |
| 173327 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 173328 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 173329 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd0 |
| 173330 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1 |
| 173331 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq0 |
| 173332 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubq1 |
| 173333 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs0 |
| 173334 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1 |
| 173335 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 173336 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 173337 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 173338 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 173339 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 173340 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 173341 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173342 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173343 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub -> FPR8 |
| 173344 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_bsub_hi |
| 173345 | 8, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub -> FPR16 |
| 173346 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_hsub_hi |
| 173347 | 40, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub -> FPR32 |
| 173348 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_then_ssub_hi |
| 173349 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub -> FPR8 |
| 173350 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_bsub_hi |
| 173351 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub -> FPR16_lo |
| 173352 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_hsub_hi |
| 173353 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173354 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub3_then_ssub_hi |
| 173355 | 7, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub -> FPR8 |
| 173356 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_bsub_hi |
| 173357 | 10, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub -> FPR16_lo |
| 173358 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_hsub_hi |
| 173359 | 44, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173360 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_then_ssub_hi |
| 173361 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:psub1_then_psub |
| 173362 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_then_dsub_hi |
| 173363 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub3_then_dsub_hi |
| 173364 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_then_dsub_hi |
| 173365 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32 |
| 173366 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_7_then_sub_32_hi |
| 173367 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32 |
| 173368 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_hi |
| 173369 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32 |
| 173370 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_5_then_sub_32_hi |
| 173371 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32 |
| 173372 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_hi |
| 173373 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32 |
| 173374 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_3_then_sub_32_hi |
| 173375 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32 |
| 173376 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_hi |
| 173377 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32 |
| 173378 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_1_then_sub_32_hi |
| 173379 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32 |
| 173380 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:subo64_then_sub_32_hi |
| 173381 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_then_zsub_hi |
| 173382 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub3_then_zsub_hi |
| 173383 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_then_zsub_hi |
| 173384 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1 |
| 173385 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub0_dsub1_dsub2 |
| 173386 | 77, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo |
| 173387 | 115, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 173388 | 79, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 173389 | 75, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1 -> DD |
| 173390 | 124, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 173391 | 113, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo |
| 173392 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1 |
| 173393 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub0_qsub1_qsub2 |
| 173394 | 147, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_0to7 |
| 173395 | 241, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub1_qsub2_qsub3 -> QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 173396 | 163, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 173397 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 173398 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_0_x8sub_1 |
| 173399 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_x8sub_3 |
| 173400 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_x8sub_5 |
| 173401 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_x8sub_7 |
| 173402 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173403 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173404 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173405 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:sub_32_subo64_then_sub_32 |
| 173406 | 128, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1 -> QQ |
| 173407 | 352, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 173408 | 224, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 173409 | 172, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173410 | 290, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 173411 | 201, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 173412 | 289, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 173413 | 193, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 173414 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub0_zsub2 |
| 173415 | 0, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi:zsub1_zsub3 |
| 173416 | }, |
| 173417 | { // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 173418 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 173419 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 173420 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64 |
| 173421 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 173422 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 173423 | 56, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 173424 | 65, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64_lo |
| 173425 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 173426 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16 |
| 173427 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 173428 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub |
| 173429 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 173430 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 173431 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 173432 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 173433 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 173434 | 98, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128_0to7 |
| 173435 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32 |
| 173436 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 173437 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 173438 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 173439 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 173440 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 173441 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 173442 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 173443 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 173444 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 173445 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 173446 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 173447 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 173448 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 173449 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 173450 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 173451 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 173452 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 173453 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 173454 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 173455 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 173456 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 173457 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 173458 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 173459 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 173460 | 92, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128 |
| 173461 | 103, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_K |
| 173462 | 107, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_and_ZPR_K |
| 173463 | 103, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR_K |
| 173464 | 108, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPRMul4_and_ZPR_3b |
| 173465 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 173466 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 173467 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 173468 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 173469 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 173470 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 173471 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 173472 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 173473 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 173474 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 173475 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 173476 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 173477 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 173478 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 173479 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 173480 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 173481 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 173482 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 173483 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 173484 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 173485 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 173486 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173487 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173488 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 173489 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 173490 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 173491 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 173492 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 173493 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 173494 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 173495 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 173496 | 10, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16_lo |
| 173497 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 173498 | 44, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 173499 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 173500 | 7, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 173501 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 173502 | 8, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 173503 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 173504 | 40, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 173505 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 173506 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 173507 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 173508 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 173509 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 173510 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 173511 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 173512 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 173513 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 173514 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 173515 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 173516 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 173517 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 173518 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 173519 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 173520 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 173521 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 173522 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 173523 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 173524 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 173525 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 173526 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 173527 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 173528 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 173529 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 173530 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 173531 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 173532 | 113, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo |
| 173533 | 77, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo |
| 173534 | 75, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD |
| 173535 | 121, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo |
| 173536 | 110, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD |
| 173537 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 173538 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 173539 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 173540 | 224, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_0to7 |
| 173541 | 147, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_0to7 |
| 173542 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 173543 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 173544 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 173545 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 173546 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 173547 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173548 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173549 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173550 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 173551 | 128, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ |
| 173552 | 327, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_0to7 |
| 173553 | 206, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ |
| 173554 | 195, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 173555 | 281, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173556 | 172, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173557 | 290, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 173558 | 201, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 173559 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 173560 | 0, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 173561 | }, |
| 173562 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173563 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub -> FPR8 |
| 173564 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:bsub_hi |
| 173565 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub -> FPR64 |
| 173566 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0 |
| 173567 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1 -> FPR64 |
| 173568 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2 -> FPR64 |
| 173569 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3 -> FPR64 |
| 173570 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_hi |
| 173571 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub -> FPR16 |
| 173572 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:hsub_hi |
| 173573 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub |
| 173574 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub0 |
| 173575 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1 |
| 173576 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0 |
| 173577 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1 -> FPR128 |
| 173578 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2 -> FPR128 |
| 173579 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3 -> FPR128 |
| 173580 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub -> FPR32 |
| 173581 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:ssub_hi |
| 173582 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32 |
| 173583 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_hi |
| 173584 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube32 |
| 173585 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sube64 |
| 173586 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo32 |
| 173587 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64 |
| 173588 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0 |
| 173589 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1 |
| 173590 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2 |
| 173591 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3 |
| 173592 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4 |
| 173593 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5 |
| 173594 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6 |
| 173595 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7 |
| 173596 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubb |
| 173597 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd0 |
| 173598 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1 |
| 173599 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh0 |
| 173600 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1 |
| 173601 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq0 |
| 173602 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubq1 |
| 173603 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs0 |
| 173604 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1 |
| 173605 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub -> FPR128 |
| 173606 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0 -> ZPR_K |
| 173607 | 104, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 173608 | 93, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2 -> ZPR |
| 173609 | 99, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3 -> ZPRMul2_Hi |
| 173610 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_hi |
| 173611 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq0 |
| 173612 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubd1_then_zasubq1 |
| 173613 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd0 |
| 173614 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1 |
| 173615 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq0 |
| 173616 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubq1 |
| 173617 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 173618 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 173619 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd0 |
| 173620 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1 |
| 173621 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq0 |
| 173622 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubq1 |
| 173623 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs0 |
| 173624 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1 |
| 173625 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 173626 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 173627 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 173628 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 173629 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 173630 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 173631 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173632 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173633 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 173634 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_bsub_hi |
| 173635 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 173636 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_hsub_hi |
| 173637 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 173638 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_then_ssub_hi |
| 173639 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 173640 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_bsub_hi |
| 173641 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 173642 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_hsub_hi |
| 173643 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 173644 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub3_then_ssub_hi |
| 173645 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 173646 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_bsub_hi |
| 173647 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 173648 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_hsub_hi |
| 173649 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 173650 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_then_ssub_hi |
| 173651 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:psub1_then_psub |
| 173652 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_then_dsub_hi |
| 173653 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub3_then_dsub_hi |
| 173654 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_then_dsub_hi |
| 173655 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32 |
| 173656 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_7_then_sub_32_hi |
| 173657 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32 |
| 173658 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_hi |
| 173659 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32 |
| 173660 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_5_then_sub_32_hi |
| 173661 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32 |
| 173662 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_hi |
| 173663 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32 |
| 173664 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_3_then_sub_32_hi |
| 173665 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32 |
| 173666 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_hi |
| 173667 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32 |
| 173668 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_1_then_sub_32_hi |
| 173669 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32 |
| 173670 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:subo64_then_sub_32_hi |
| 173671 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_then_zsub_hi |
| 173672 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub3_then_zsub_hi |
| 173673 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_then_zsub_hi |
| 173674 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1 |
| 173675 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub0_dsub1_dsub2 |
| 173676 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2 -> DD |
| 173677 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 173678 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub2_dsub3 -> DD |
| 173679 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1 -> DD |
| 173680 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 173681 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 173682 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1 |
| 173683 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub0_qsub1_qsub2 |
| 173684 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2 -> QQ |
| 173685 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 173686 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:qsub2_qsub3 -> QQ |
| 173687 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 173688 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_0_x8sub_1 |
| 173689 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_x8sub_3 |
| 173690 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_x8sub_5 |
| 173691 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_x8sub_7 |
| 173692 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173693 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173694 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173695 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:sub_32_subo64_then_sub_32 |
| 173696 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1 -> QQ |
| 173697 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 173698 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 173699 | 202, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173700 | 291, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173701 | 170, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173702 | 254, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173703 | 157, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 173704 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub0_zsub2 |
| 173705 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4:zsub1_zsub3 |
| 173706 | }, |
| 173707 | { // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173708 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 173709 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 173710 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 173711 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 173712 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 173713 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 173714 | 56, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 173715 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 173716 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 173717 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 173718 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 173719 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 173720 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 173721 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 173722 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 173723 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 173724 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 173725 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 173726 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 173727 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 173728 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 173729 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 173730 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 173731 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 173732 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 173733 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 173734 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 173735 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 173736 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 173737 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 173738 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 173739 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 173740 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 173741 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 173742 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 173743 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 173744 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 173745 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 173746 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 173747 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 173748 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 173749 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 173750 | 92, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 173751 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR_K |
| 173752 | 107, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_and_ZPR_K |
| 173753 | 103, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPR_K |
| 173754 | 104, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPRMul2_Hi_and_ZPRMul4 |
| 173755 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 173756 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 173757 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 173758 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 173759 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 173760 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 173761 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 173762 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 173763 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 173764 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 173765 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 173766 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 173767 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 173768 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 173769 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 173770 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 173771 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 173772 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 173773 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 173774 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 173775 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 173776 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173777 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173778 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 173779 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 173780 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 173781 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 173782 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 173783 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 173784 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 173785 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 173786 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 173787 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 173788 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 173789 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 173790 | 7, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 173791 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 173792 | 8, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 173793 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 173794 | 40, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 173795 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 173796 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 173797 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 173798 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 173799 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 173800 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 173801 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 173802 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 173803 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 173804 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 173805 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 173806 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 173807 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 173808 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 173809 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 173810 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 173811 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 173812 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 173813 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 173814 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 173815 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 173816 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 173817 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 173818 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 173819 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 173820 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 173821 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 173822 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 173823 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 173824 | 75, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 173825 | 117, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 173826 | 110, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 173827 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 173828 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 173829 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 173830 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 173831 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 173832 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 173833 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 173834 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 173835 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 173836 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 173837 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173838 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173839 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173840 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 173841 | 128, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 173842 | 297, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 173843 | 206, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 173844 | 195, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 173845 | 281, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173846 | 172, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173847 | 292, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173848 | 202, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173849 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 173850 | 0, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 173851 | }, |
| 173852 | { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173853 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 173854 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 173855 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64 |
| 173856 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 173857 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64 |
| 173858 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64 |
| 173859 | 56, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 173860 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 173861 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16 |
| 173862 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 173863 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 173864 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 173865 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 173866 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 173867 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128 |
| 173868 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128 |
| 173869 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 173870 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32 |
| 173871 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 173872 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 173873 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 173874 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 173875 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 173876 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 173877 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 173878 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 173879 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 173880 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 173881 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 173882 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 173883 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 173884 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 173885 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 173886 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 173887 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 173888 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 173889 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 173890 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 173891 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 173892 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 173893 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 173894 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 173895 | 92, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128 |
| 173896 | 107, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPRMul2_and_ZPR_K |
| 173897 | 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPR_K |
| 173898 | 104, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 173899 | 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPR |
| 173900 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 173901 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 173902 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 173903 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 173904 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 173905 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 173906 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 173907 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 173908 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 173909 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 173910 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 173911 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 173912 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 173913 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 173914 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 173915 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 173916 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 173917 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 173918 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 173919 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 173920 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 173921 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 173922 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 173923 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 173924 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 173925 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16 |
| 173926 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 173927 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32 |
| 173928 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 173929 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 173930 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 173931 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 173932 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 173933 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 173934 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 173935 | 7, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 173936 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 173937 | 8, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16 |
| 173938 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 173939 | 40, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32 |
| 173940 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 173941 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 173942 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 173943 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 173944 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 173945 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 173946 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 173947 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 173948 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 173949 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 173950 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 173951 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 173952 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 173953 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 173954 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 173955 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 173956 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 173957 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 173958 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 173959 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 173960 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 173961 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 173962 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 173963 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 173964 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 173965 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 173966 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD |
| 173967 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD |
| 173968 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD |
| 173969 | 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD |
| 173970 | 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD |
| 173971 | 110, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD |
| 173972 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 173973 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 173974 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ |
| 173975 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ |
| 173976 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ |
| 173977 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 173978 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 173979 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 173980 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 173981 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 173982 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 173983 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 173984 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 173985 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 173986 | 128, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ |
| 173987 | 297, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ |
| 173988 | 206, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ |
| 173989 | 172, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 173990 | 292, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173991 | 202, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 173992 | 291, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173993 | 170, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 173994 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 173995 | 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 173996 | }, |
| 173997 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 173998 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 173999 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 174000 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 174001 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 174002 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 174003 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 174004 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 174005 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 174006 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 174007 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 174008 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub |
| 174009 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub0 |
| 174010 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1 |
| 174011 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 174012 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 174013 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 174014 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 174015 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174016 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 174017 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 174018 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 174019 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube32 |
| 174020 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sube64 |
| 174021 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo32 |
| 174022 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64 |
| 174023 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 174024 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 174025 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 174026 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 174027 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 174028 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 174029 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 174030 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 174031 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubb |
| 174032 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 174033 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 174034 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 174035 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 174036 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 174037 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 174038 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 174039 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 174040 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 174041 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR_3b |
| 174042 | 108, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul4_and_ZPR_3b |
| 174043 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR_3b |
| 174044 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPRMul2_and_ZPR_3b |
| 174045 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 174046 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 174047 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 174048 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 174049 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 174050 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 174051 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 174052 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 174053 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 174054 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 174055 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 174056 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 174057 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 174058 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 174059 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 174060 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 174061 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 174062 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 174063 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 174064 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 174065 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 174066 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174067 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174068 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 174069 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 174070 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 174071 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 174072 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174073 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 174074 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 174075 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 174076 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 174077 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 174078 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174079 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 174080 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 174081 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 174082 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 174083 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 174084 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174085 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 174086 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 174087 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 174088 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 174089 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 174090 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 174091 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 174092 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 174093 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 174094 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 174095 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 174096 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 174097 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 174098 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 174099 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 174100 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 174101 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 174102 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 174103 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 174104 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 174105 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 174106 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 174107 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 174108 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 174109 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 174110 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 174111 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174112 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174113 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174114 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174115 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 174116 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174117 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 174118 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 174119 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174120 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174121 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174122 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 174123 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 174124 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 174125 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 174126 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 174127 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174128 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174129 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174130 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 174131 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174132 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 174133 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174134 | 203, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 174135 | 293, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 174136 | 193, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 174137 | 278, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 174138 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 174139 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 174140 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 174141 | }, |
| 174142 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 174143 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 174144 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 174145 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 174146 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 174147 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 174148 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 174149 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 174150 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 174151 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 174152 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 174153 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub |
| 174154 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub0 |
| 174155 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1 |
| 174156 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 174157 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 174158 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 174159 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 174160 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174161 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 174162 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 174163 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 174164 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube32 |
| 174165 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sube64 |
| 174166 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo32 |
| 174167 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64 |
| 174168 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 174169 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 174170 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 174171 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 174172 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 174173 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 174174 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 174175 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 174176 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubb |
| 174177 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 174178 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 174179 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 174180 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 174181 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 174182 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 174183 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 174184 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 174185 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 174186 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPRMul2_and_ZPR_3b |
| 174187 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPR_3b |
| 174188 | 108, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPRMul4_and_ZPR_3b |
| 174189 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPR_3b |
| 174190 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 174191 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 174192 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 174193 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 174194 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 174195 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 174196 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 174197 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 174198 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 174199 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 174200 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 174201 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 174202 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 174203 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 174204 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 174205 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 174206 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 174207 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 174208 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 174209 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 174210 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 174211 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174212 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174213 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 174214 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 174215 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 174216 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 174217 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174218 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 174219 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 174220 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 174221 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 174222 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 174223 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174224 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 174225 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 174226 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 174227 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 174228 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 174229 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174230 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 174231 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 174232 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 174233 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 174234 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 174235 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 174236 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 174237 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 174238 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 174239 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 174240 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 174241 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 174242 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 174243 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 174244 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 174245 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 174246 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 174247 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 174248 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 174249 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 174250 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 174251 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 174252 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 174253 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 174254 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 174255 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 174256 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174257 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174258 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174259 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174260 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 174261 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174262 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 174263 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 174264 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174265 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174266 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174267 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 174268 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 174269 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 174270 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 174271 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 174272 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174273 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174274 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174275 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 174276 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174277 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 174278 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174279 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 174280 | 294, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 174281 | 203, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 174282 | 293, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 174283 | 193, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 174284 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 174285 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 174286 | }, |
| 174287 | { // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 174288 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:bsub -> FPR8 |
| 174289 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:bsub_hi |
| 174290 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub -> FPR64_lo |
| 174291 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0 |
| 174292 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1 -> FPR64_lo |
| 174293 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2 -> FPR64_lo |
| 174294 | 65, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3 -> FPR64_lo |
| 174295 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_hi |
| 174296 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:hsub -> FPR16_lo |
| 174297 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:hsub_hi |
| 174298 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub |
| 174299 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub0 |
| 174300 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub1 |
| 174301 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0 |
| 174302 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1 -> FPR128_0to7 |
| 174303 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2 -> FPR128_0to7 |
| 174304 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub3 -> FPR128_0to7 |
| 174305 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174306 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:ssub_hi |
| 174307 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32 |
| 174308 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_hi |
| 174309 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sube32 |
| 174310 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sube64 |
| 174311 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo32 |
| 174312 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64 |
| 174313 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_0 |
| 174314 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1 |
| 174315 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2 |
| 174316 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3 |
| 174317 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4 |
| 174318 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5 |
| 174319 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6 |
| 174320 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7 |
| 174321 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubb |
| 174322 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd0 |
| 174323 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1 |
| 174324 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh0 |
| 174325 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1 |
| 174326 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubq0 |
| 174327 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubq1 |
| 174328 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs0 |
| 174329 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1 |
| 174330 | 98, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub -> FPR128_0to7 |
| 174331 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0 -> ZPR_3b |
| 174332 | 106, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1 -> ZPRMul2_and_ZPR_3b |
| 174333 | 102, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2 -> ZPR_3b |
| 174334 | 108, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub3 -> ZPRMul4_and_ZPR_3b |
| 174335 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_hi |
| 174336 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq0 |
| 174337 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubd1_then_zasubq1 |
| 174338 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd0 |
| 174339 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1 |
| 174340 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq0 |
| 174341 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubq1 |
| 174342 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 |
| 174343 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 |
| 174344 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd0 |
| 174345 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1 |
| 174346 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq0 |
| 174347 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubq1 |
| 174348 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs0 |
| 174349 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1 |
| 174350 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 |
| 174351 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 |
| 174352 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 |
| 174353 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 |
| 174354 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 |
| 174355 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 |
| 174356 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174357 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174358 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub -> FPR8 |
| 174359 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_bsub_hi |
| 174360 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub -> FPR16_lo |
| 174361 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_hsub_hi |
| 174362 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174363 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_then_ssub_hi |
| 174364 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub -> FPR8 |
| 174365 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_bsub_hi |
| 174366 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub -> FPR16_lo |
| 174367 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_hsub_hi |
| 174368 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174369 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub3_then_ssub_hi |
| 174370 | 7, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub -> FPR8 |
| 174371 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_bsub_hi |
| 174372 | 10, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub -> FPR16_lo |
| 174373 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_hsub_hi |
| 174374 | 44, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174375 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_then_ssub_hi |
| 174376 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:psub1_then_psub |
| 174377 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_then_dsub_hi |
| 174378 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub3_then_dsub_hi |
| 174379 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2_then_dsub_hi |
| 174380 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32 |
| 174381 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_7_then_sub_32_hi |
| 174382 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32 |
| 174383 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_hi |
| 174384 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32 |
| 174385 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_5_then_sub_32_hi |
| 174386 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32 |
| 174387 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_hi |
| 174388 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32 |
| 174389 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_3_then_sub_32_hi |
| 174390 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32 |
| 174391 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_hi |
| 174392 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32 |
| 174393 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_1_then_sub_32_hi |
| 174394 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32 |
| 174395 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:subo64_then_sub_32_hi |
| 174396 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_then_zsub_hi |
| 174397 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub3_then_zsub_hi |
| 174398 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2_then_zsub_hi |
| 174399 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1 |
| 174400 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub0_dsub1_dsub2 |
| 174401 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174402 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174403 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174404 | 79, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174405 | 127, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 174406 | 116, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174407 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1 |
| 174408 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub0_qsub1_qsub2 |
| 174409 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174410 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174411 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174412 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_x8sub_1_then_sub_32 |
| 174413 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_0_x8sub_1 |
| 174414 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_x8sub_3 |
| 174415 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_x8sub_5 |
| 174416 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_x8sub_7 |
| 174417 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174418 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174419 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174420 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:sub_32_subo64_then_sub_32 |
| 174421 | 163, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 174422 | 374, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 174423 | 248, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 174424 | 188, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 174425 | 273, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 174426 | 173, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 174427 | 294, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 174428 | 203, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 174429 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub0_zsub2 |
| 174430 | 0, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b:zsub1_zsub3 |
| 174431 | }, |
| 174432 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 174433 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub -> FPR8 |
| 174434 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:bsub_hi |
| 174435 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 174436 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0 |
| 174437 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1 -> FPR64 |
| 174438 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 174439 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 174440 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_hi |
| 174441 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 174442 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:hsub_hi |
| 174443 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub |
| 174444 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub0 |
| 174445 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1 |
| 174446 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0 |
| 174447 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1 -> FPR128 |
| 174448 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 174449 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 174450 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174451 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:ssub_hi |
| 174452 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32 |
| 174453 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_hi |
| 174454 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube32 |
| 174455 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sube64 |
| 174456 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo32 |
| 174457 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64 |
| 174458 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0 |
| 174459 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1 |
| 174460 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2 |
| 174461 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3 |
| 174462 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4 |
| 174463 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5 |
| 174464 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6 |
| 174465 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7 |
| 174466 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubb |
| 174467 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd0 |
| 174468 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1 |
| 174469 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh0 |
| 174470 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1 |
| 174471 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq0 |
| 174472 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubq1 |
| 174473 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs0 |
| 174474 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1 |
| 174475 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 174476 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0 -> ZPR_4b |
| 174477 | 104, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1 -> ZPRMul2_Hi_and_ZPRMul4 |
| 174478 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2 -> ZPR |
| 174479 | 99, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3 -> ZPRMul2_Hi |
| 174480 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_hi |
| 174481 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 174482 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 174483 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 174484 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 174485 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 174486 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 174487 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 174488 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 174489 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 174490 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 174491 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 174492 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 174493 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 174494 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 174495 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 174496 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 174497 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 174498 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 174499 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 174500 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 174501 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174502 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174503 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 174504 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 174505 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16 |
| 174506 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 174507 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32 |
| 174508 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 174509 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 174510 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 174511 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 174512 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 174513 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 174514 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 174515 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 174516 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 174517 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 174518 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 174519 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 174520 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 174521 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:psub1_then_psub |
| 174522 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 174523 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 174524 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 174525 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 174526 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 174527 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 174528 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 174529 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 174530 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 174531 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 174532 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 174533 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 174534 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 174535 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 174536 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 174537 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 174538 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 174539 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 174540 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 174541 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 174542 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 174543 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 174544 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1 |
| 174545 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 174546 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2 -> DD |
| 174547 | 110, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD |
| 174548 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 174549 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo |
| 174550 | 118, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo |
| 174551 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo |
| 174552 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1 |
| 174553 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 174554 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ |
| 174555 | 206, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ |
| 174556 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 174557 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 174558 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 174559 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 174560 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 174561 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 174562 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174563 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174564 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174565 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 174566 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo |
| 174567 | 302, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo |
| 174568 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo |
| 174569 | 204, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 174570 | 295, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 174571 | 170, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 174572 | 254, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 174573 | 157, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 174574 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub0_zsub2 |
| 174575 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi:zsub1_zsub3 |
| 174576 | }, |
| 174577 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 174578 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:bsub -> FPR8 |
| 174579 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:bsub_hi |
| 174580 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub -> FPR64_lo |
| 174581 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0 |
| 174582 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1 -> FPR64_lo |
| 174583 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2 -> FPR64 |
| 174584 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3 -> FPR64 |
| 174585 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_hi |
| 174586 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:hsub -> FPR16_lo |
| 174587 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:hsub_hi |
| 174588 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:psub |
| 174589 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:psub0 |
| 174590 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:psub1 |
| 174591 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0 |
| 174592 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1 -> FPR128_lo |
| 174593 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2 -> FPR128 |
| 174594 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub3 -> FPR128 |
| 174595 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174596 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:ssub_hi |
| 174597 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32 |
| 174598 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_hi |
| 174599 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sube32 |
| 174600 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sube64 |
| 174601 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:subo32 |
| 174602 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64 |
| 174603 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_0 |
| 174604 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1 |
| 174605 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2 |
| 174606 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3 |
| 174607 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4 |
| 174608 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5 |
| 174609 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6 |
| 174610 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7 |
| 174611 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubb |
| 174612 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd0 |
| 174613 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1 |
| 174614 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh0 |
| 174615 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1 |
| 174616 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubq0 |
| 174617 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubq1 |
| 174618 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs0 |
| 174619 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1 |
| 174620 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub -> FPR128_lo |
| 174621 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0 -> ZPRMul2_Lo |
| 174622 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1 -> ZPR_4b |
| 174623 | 104, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2 -> ZPRMul2_Hi_and_ZPRMul4 |
| 174624 | 93, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub3 -> ZPR |
| 174625 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_hi |
| 174626 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq0 |
| 174627 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubd1_then_zasubq1 |
| 174628 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd0 |
| 174629 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1 |
| 174630 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq0 |
| 174631 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubq1 |
| 174632 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq0 |
| 174633 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubs1_then_zasubd1_then_zasubq1 |
| 174634 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd0 |
| 174635 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1 |
| 174636 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq0 |
| 174637 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubq1 |
| 174638 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs0 |
| 174639 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1 |
| 174640 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq0 |
| 174641 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubd1_then_zasubq1 |
| 174642 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd0 |
| 174643 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1 |
| 174644 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq0 |
| 174645 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubq1 |
| 174646 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174647 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174648 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub -> FPR8 |
| 174649 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_bsub_hi |
| 174650 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub -> FPR16_lo |
| 174651 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_hsub_hi |
| 174652 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174653 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_then_ssub_hi |
| 174654 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub -> FPR8 |
| 174655 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_bsub_hi |
| 174656 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub -> FPR16 |
| 174657 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_hsub_hi |
| 174658 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub -> FPR32 |
| 174659 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub3_then_ssub_hi |
| 174660 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub -> FPR8 |
| 174661 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_bsub_hi |
| 174662 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub -> FPR16 |
| 174663 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_hsub_hi |
| 174664 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub -> FPR32 |
| 174665 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_then_ssub_hi |
| 174666 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:psub1_then_psub |
| 174667 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_then_dsub_hi |
| 174668 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub3_then_dsub_hi |
| 174669 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2_then_dsub_hi |
| 174670 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32 |
| 174671 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_7_then_sub_32_hi |
| 174672 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32 |
| 174673 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_hi |
| 174674 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32 |
| 174675 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_5_then_sub_32_hi |
| 174676 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32 |
| 174677 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_hi |
| 174678 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32 |
| 174679 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_3_then_sub_32_hi |
| 174680 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32 |
| 174681 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_hi |
| 174682 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32 |
| 174683 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_1_then_sub_32_hi |
| 174684 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32 |
| 174685 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:subo64_then_sub_32_hi |
| 174686 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_then_zsub_hi |
| 174687 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub3_then_zsub_hi |
| 174688 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2_then_zsub_hi |
| 174689 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1 |
| 174690 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub0_dsub1_dsub2 |
| 174691 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo |
| 174692 | 111, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo |
| 174693 | 75, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub2_dsub3 -> DD |
| 174694 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174695 | 122, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 174696 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 174697 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1 |
| 174698 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub0_qsub1_qsub2 |
| 174699 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo |
| 174700 | 210, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo |
| 174701 | 128, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:qsub2_qsub3 -> QQ |
| 174702 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_x8sub_1_then_sub_32 |
| 174703 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_0_x8sub_1 |
| 174704 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_x8sub_3 |
| 174705 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_x8sub_5 |
| 174706 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_x8sub_7 |
| 174707 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174708 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174709 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174710 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:sub_32_subo64_then_sub_32 |
| 174711 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 174712 | 312, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 174713 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 174714 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1 -> ZPR2Mul2_Lo |
| 174715 | 296, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 174716 | 204, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 174717 | 295, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 174718 | 170, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub2_zsub3 -> ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 174719 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub0_zsub2 |
| 174720 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi:zsub1_zsub3 |
| 174721 | }, |
| 174722 | { // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 174723 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub -> FPR8 |
| 174724 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:bsub_hi |
| 174725 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub -> FPR64_lo |
| 174726 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0 |
| 174727 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1 -> FPR64_lo |
| 174728 | 65, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2 -> FPR64_lo |
| 174729 | 56, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3 -> FPR64 |
| 174730 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_hi |
| 174731 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub -> FPR16_lo |
| 174732 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:hsub_hi |
| 174733 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub |
| 174734 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub0 |
| 174735 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1 |
| 174736 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0 |
| 174737 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1 -> FPR128_lo |
| 174738 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2 -> FPR128_lo |
| 174739 | 92, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3 -> FPR128 |
| 174740 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174741 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:ssub_hi |
| 174742 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32 |
| 174743 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_hi |
| 174744 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube32 |
| 174745 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sube64 |
| 174746 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo32 |
| 174747 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64 |
| 174748 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0 |
| 174749 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1 |
| 174750 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2 |
| 174751 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3 |
| 174752 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4 |
| 174753 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5 |
| 174754 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6 |
| 174755 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7 |
| 174756 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubb |
| 174757 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd0 |
| 174758 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1 |
| 174759 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh0 |
| 174760 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1 |
| 174761 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq0 |
| 174762 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubq1 |
| 174763 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs0 |
| 174764 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1 |
| 174765 | 94, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub -> FPR128_lo |
| 174766 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0 -> ZPR_4b |
| 174767 | 100, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1 -> ZPRMul2_Lo |
| 174768 | 97, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2 -> ZPR_4b |
| 174769 | 104, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3 -> ZPRMul2_Hi_and_ZPRMul4 |
| 174770 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_hi |
| 174771 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq0 |
| 174772 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubd1_then_zasubq1 |
| 174773 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd0 |
| 174774 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1 |
| 174775 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq0 |
| 174776 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubq1 |
| 174777 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq0 |
| 174778 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubs1_then_zasubd1_then_zasubq1 |
| 174779 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd0 |
| 174780 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1 |
| 174781 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq0 |
| 174782 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubq1 |
| 174783 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs0 |
| 174784 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1 |
| 174785 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq0 |
| 174786 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubd1_then_zasubq1 |
| 174787 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd0 |
| 174788 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1 |
| 174789 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq0 |
| 174790 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubq1 |
| 174791 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174792 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174793 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub -> FPR8 |
| 174794 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_bsub_hi |
| 174795 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub -> FPR16_lo |
| 174796 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_hsub_hi |
| 174797 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174798 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_then_ssub_hi |
| 174799 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub -> FPR8 |
| 174800 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_bsub_hi |
| 174801 | 8, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub -> FPR16 |
| 174802 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_hsub_hi |
| 174803 | 40, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub -> FPR32 |
| 174804 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub3_then_ssub_hi |
| 174805 | 7, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub -> FPR8 |
| 174806 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_bsub_hi |
| 174807 | 10, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub -> FPR16_lo |
| 174808 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_hsub_hi |
| 174809 | 44, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo |
| 174810 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_then_ssub_hi |
| 174811 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:psub1_then_psub |
| 174812 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_then_dsub_hi |
| 174813 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub3_then_dsub_hi |
| 174814 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_then_dsub_hi |
| 174815 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32 |
| 174816 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_7_then_sub_32_hi |
| 174817 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32 |
| 174818 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_hi |
| 174819 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32 |
| 174820 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_5_then_sub_32_hi |
| 174821 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32 |
| 174822 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_hi |
| 174823 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32 |
| 174824 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_3_then_sub_32_hi |
| 174825 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32 |
| 174826 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_hi |
| 174827 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32 |
| 174828 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_1_then_sub_32_hi |
| 174829 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32 |
| 174830 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:subo64_then_sub_32_hi |
| 174831 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_then_zsub_hi |
| 174832 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub3_then_zsub_hi |
| 174833 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_then_zsub_hi |
| 174834 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1 |
| 174835 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub0_dsub1_dsub2 |
| 174836 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174837 | 114, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 174838 | 76, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo |
| 174839 | 79, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 174840 | 125, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 174841 | 116, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:dsub_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 174842 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1 |
| 174843 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub0_qsub1_qsub2 |
| 174844 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 174845 | 217, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub1_qsub2_qsub3 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 174846 | 133, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:qsub2_qsub3 -> QQ_with_qsub0_in_FPR128_lo |
| 174847 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_x8sub_1_then_sub_32 |
| 174848 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_0_x8sub_1 |
| 174849 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_x8sub_3 |
| 174850 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_x8sub_5 |
| 174851 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_x8sub_7 |
| 174852 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 174853 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 174854 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 174855 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:sub_32_subo64_then_sub_32 |
| 174856 | 140, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1 -> QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 174857 | 317, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2_qsub3 -> QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 174858 | 220, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub_qsub1_qsub2 -> QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 174859 | 165, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 174860 | 246, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 174861 | 149, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2 -> ZPR2Mul2_Lo |
| 174862 | 296, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 174863 | 204, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub2_zsub3 -> ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 174864 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub0_zsub2 |
| 174865 | 0, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4:zsub1_zsub3 |
| 174866 | }, |
| 174867 | { // GPR64x8Class |
| 174868 | 0, // GPR64x8Class:bsub |
| 174869 | 0, // GPR64x8Class:bsub_hi |
| 174870 | 0, // GPR64x8Class:dsub |
| 174871 | 0, // GPR64x8Class:dsub0 |
| 174872 | 0, // GPR64x8Class:dsub1 |
| 174873 | 0, // GPR64x8Class:dsub2 |
| 174874 | 0, // GPR64x8Class:dsub3 |
| 174875 | 0, // GPR64x8Class:dsub_hi |
| 174876 | 0, // GPR64x8Class:hsub |
| 174877 | 0, // GPR64x8Class:hsub_hi |
| 174878 | 0, // GPR64x8Class:psub |
| 174879 | 0, // GPR64x8Class:psub0 |
| 174880 | 0, // GPR64x8Class:psub1 |
| 174881 | 0, // GPR64x8Class:qsub0 |
| 174882 | 0, // GPR64x8Class:qsub1 |
| 174883 | 0, // GPR64x8Class:qsub2 |
| 174884 | 0, // GPR64x8Class:qsub3 |
| 174885 | 0, // GPR64x8Class:ssub |
| 174886 | 0, // GPR64x8Class:ssub_hi |
| 174887 | 43, // GPR64x8Class:sub_32 -> GPR32common |
| 174888 | 0, // GPR64x8Class:sub_32_hi |
| 174889 | 0, // GPR64x8Class:sube32 |
| 174890 | 0, // GPR64x8Class:sube64 |
| 174891 | 0, // GPR64x8Class:subo32 |
| 174892 | 0, // GPR64x8Class:subo64 |
| 174893 | 59, // GPR64x8Class:x8sub_0 -> GPR64common |
| 174894 | 59, // GPR64x8Class:x8sub_1 -> GPR64common |
| 174895 | 59, // GPR64x8Class:x8sub_2 -> GPR64common |
| 174896 | 59, // GPR64x8Class:x8sub_3 -> GPR64common |
| 174897 | 59, // GPR64x8Class:x8sub_4 -> GPR64common |
| 174898 | 59, // GPR64x8Class:x8sub_5 -> GPR64common |
| 174899 | 59, // GPR64x8Class:x8sub_6 -> GPR64common |
| 174900 | 59, // GPR64x8Class:x8sub_7 -> GPR64common |
| 174901 | 0, // GPR64x8Class:zasubb |
| 174902 | 0, // GPR64x8Class:zasubd0 |
| 174903 | 0, // GPR64x8Class:zasubd1 |
| 174904 | 0, // GPR64x8Class:zasubh0 |
| 174905 | 0, // GPR64x8Class:zasubh1 |
| 174906 | 0, // GPR64x8Class:zasubq0 |
| 174907 | 0, // GPR64x8Class:zasubq1 |
| 174908 | 0, // GPR64x8Class:zasubs0 |
| 174909 | 0, // GPR64x8Class:zasubs1 |
| 174910 | 0, // GPR64x8Class:zsub |
| 174911 | 0, // GPR64x8Class:zsub0 |
| 174912 | 0, // GPR64x8Class:zsub1 |
| 174913 | 0, // GPR64x8Class:zsub2 |
| 174914 | 0, // GPR64x8Class:zsub3 |
| 174915 | 0, // GPR64x8Class:zsub_hi |
| 174916 | 0, // GPR64x8Class:zasubd1_then_zasubq0 |
| 174917 | 0, // GPR64x8Class:zasubd1_then_zasubq1 |
| 174918 | 0, // GPR64x8Class:zasubs1_then_zasubd0 |
| 174919 | 0, // GPR64x8Class:zasubs1_then_zasubd1 |
| 174920 | 0, // GPR64x8Class:zasubs1_then_zasubq0 |
| 174921 | 0, // GPR64x8Class:zasubs1_then_zasubq1 |
| 174922 | 0, // GPR64x8Class:zasubs1_then_zasubd1_then_zasubq0 |
| 174923 | 0, // GPR64x8Class:zasubs1_then_zasubd1_then_zasubq1 |
| 174924 | 0, // GPR64x8Class:zasubh1_then_zasubd0 |
| 174925 | 0, // GPR64x8Class:zasubh1_then_zasubd1 |
| 174926 | 0, // GPR64x8Class:zasubh1_then_zasubq0 |
| 174927 | 0, // GPR64x8Class:zasubh1_then_zasubq1 |
| 174928 | 0, // GPR64x8Class:zasubh1_then_zasubs0 |
| 174929 | 0, // GPR64x8Class:zasubh1_then_zasubs1 |
| 174930 | 0, // GPR64x8Class:zasubh1_then_zasubd1_then_zasubq0 |
| 174931 | 0, // GPR64x8Class:zasubh1_then_zasubd1_then_zasubq1 |
| 174932 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd0 |
| 174933 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1 |
| 174934 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubq0 |
| 174935 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubq1 |
| 174936 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 174937 | 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 174938 | 0, // GPR64x8Class:dsub1_then_bsub |
| 174939 | 0, // GPR64x8Class:dsub1_then_bsub_hi |
| 174940 | 0, // GPR64x8Class:dsub1_then_hsub |
| 174941 | 0, // GPR64x8Class:dsub1_then_hsub_hi |
| 174942 | 0, // GPR64x8Class:dsub1_then_ssub |
| 174943 | 0, // GPR64x8Class:dsub1_then_ssub_hi |
| 174944 | 0, // GPR64x8Class:dsub3_then_bsub |
| 174945 | 0, // GPR64x8Class:dsub3_then_bsub_hi |
| 174946 | 0, // GPR64x8Class:dsub3_then_hsub |
| 174947 | 0, // GPR64x8Class:dsub3_then_hsub_hi |
| 174948 | 0, // GPR64x8Class:dsub3_then_ssub |
| 174949 | 0, // GPR64x8Class:dsub3_then_ssub_hi |
| 174950 | 0, // GPR64x8Class:dsub2_then_bsub |
| 174951 | 0, // GPR64x8Class:dsub2_then_bsub_hi |
| 174952 | 0, // GPR64x8Class:dsub2_then_hsub |
| 174953 | 0, // GPR64x8Class:dsub2_then_hsub_hi |
| 174954 | 0, // GPR64x8Class:dsub2_then_ssub |
| 174955 | 0, // GPR64x8Class:dsub2_then_ssub_hi |
| 174956 | 0, // GPR64x8Class:psub1_then_psub |
| 174957 | 0, // GPR64x8Class:qsub1_then_dsub_hi |
| 174958 | 0, // GPR64x8Class:qsub3_then_dsub_hi |
| 174959 | 0, // GPR64x8Class:qsub2_then_dsub_hi |
| 174960 | 43, // GPR64x8Class:x8sub_7_then_sub_32 -> GPR32common |
| 174961 | 0, // GPR64x8Class:x8sub_7_then_sub_32_hi |
| 174962 | 43, // GPR64x8Class:x8sub_6_then_sub_32 -> GPR32common |
| 174963 | 0, // GPR64x8Class:x8sub_6_then_sub_32_hi |
| 174964 | 43, // GPR64x8Class:x8sub_5_then_sub_32 -> GPR32common |
| 174965 | 0, // GPR64x8Class:x8sub_5_then_sub_32_hi |
| 174966 | 43, // GPR64x8Class:x8sub_4_then_sub_32 -> GPR32common |
| 174967 | 0, // GPR64x8Class:x8sub_4_then_sub_32_hi |
| 174968 | 43, // GPR64x8Class:x8sub_3_then_sub_32 -> GPR32common |
| 174969 | 0, // GPR64x8Class:x8sub_3_then_sub_32_hi |
| 174970 | 43, // GPR64x8Class:x8sub_2_then_sub_32 -> GPR32common |
| 174971 | 0, // GPR64x8Class:x8sub_2_then_sub_32_hi |
| 174972 | 43, // GPR64x8Class:x8sub_1_then_sub_32 -> GPR32common |
| 174973 | 0, // GPR64x8Class:x8sub_1_then_sub_32_hi |
| 174974 | 0, // GPR64x8Class:subo64_then_sub_32 |
| 174975 | 0, // GPR64x8Class:subo64_then_sub_32_hi |
| 174976 | 0, // GPR64x8Class:zsub1_then_zsub_hi |
| 174977 | 0, // GPR64x8Class:zsub3_then_zsub_hi |
| 174978 | 0, // GPR64x8Class:zsub2_then_zsub_hi |
| 174979 | 0, // GPR64x8Class:dsub0_dsub1 |
| 174980 | 0, // GPR64x8Class:dsub0_dsub1_dsub2 |
| 174981 | 0, // GPR64x8Class:dsub1_dsub2 |
| 174982 | 0, // GPR64x8Class:dsub1_dsub2_dsub3 |
| 174983 | 0, // GPR64x8Class:dsub2_dsub3 |
| 174984 | 0, // GPR64x8Class:dsub_dsub1 |
| 174985 | 0, // GPR64x8Class:dsub_dsub1_dsub2_dsub3 |
| 174986 | 0, // GPR64x8Class:dsub_dsub1_dsub2 |
| 174987 | 0, // GPR64x8Class:qsub0_qsub1 |
| 174988 | 0, // GPR64x8Class:qsub0_qsub1_qsub2 |
| 174989 | 0, // GPR64x8Class:qsub1_qsub2 |
| 174990 | 0, // GPR64x8Class:qsub1_qsub2_qsub3 |
| 174991 | 0, // GPR64x8Class:qsub2_qsub3 |
| 174992 | 51, // GPR64x8Class:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 174993 | 80, // GPR64x8Class:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 174994 | 80, // GPR64x8Class:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 174995 | 80, // GPR64x8Class:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 174996 | 80, // GPR64x8Class:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 174997 | 51, // GPR64x8Class:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 174998 | 51, // GPR64x8Class:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 174999 | 51, // GPR64x8Class:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175000 | 0, // GPR64x8Class:sub_32_subo64_then_sub_32 |
| 175001 | 0, // GPR64x8Class:zsub_qsub1 |
| 175002 | 0, // GPR64x8Class:zsub_qsub1_qsub2_qsub3 |
| 175003 | 0, // GPR64x8Class:zsub_qsub1_qsub2 |
| 175004 | 0, // GPR64x8Class:zsub0_zsub1 |
| 175005 | 0, // GPR64x8Class:zsub0_zsub1_zsub2 |
| 175006 | 0, // GPR64x8Class:zsub1_zsub2 |
| 175007 | 0, // GPR64x8Class:zsub1_zsub2_zsub3 |
| 175008 | 0, // GPR64x8Class:zsub2_zsub3 |
| 175009 | 0, // GPR64x8Class:zsub0_zsub2 |
| 175010 | 0, // GPR64x8Class:zsub1_zsub3 |
| 175011 | }, |
| 175012 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 175013 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:bsub |
| 175014 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:bsub_hi |
| 175015 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub |
| 175016 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0 |
| 175017 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1 |
| 175018 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2 |
| 175019 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3 |
| 175020 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_hi |
| 175021 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:hsub |
| 175022 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:hsub_hi |
| 175023 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub |
| 175024 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub0 |
| 175025 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub1 |
| 175026 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0 |
| 175027 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1 |
| 175028 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2 |
| 175029 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3 |
| 175030 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:ssub |
| 175031 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:ssub_hi |
| 175032 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32 -> GPR32common |
| 175033 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32_hi |
| 175034 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sube32 |
| 175035 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sube64 |
| 175036 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo32 |
| 175037 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo64 |
| 175038 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 175039 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 175040 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2 -> GPR64common |
| 175041 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_3 -> GPR64common |
| 175042 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4 -> GPR64common |
| 175043 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_5 -> GPR64common |
| 175044 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6 -> GPR64common |
| 175045 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_7 -> GPR64common |
| 175046 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubb |
| 175047 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd0 |
| 175048 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1 |
| 175049 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh0 |
| 175050 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1 |
| 175051 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubq0 |
| 175052 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubq1 |
| 175053 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs0 |
| 175054 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1 |
| 175055 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub |
| 175056 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0 |
| 175057 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1 |
| 175058 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2 |
| 175059 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3 |
| 175060 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_hi |
| 175061 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1_then_zasubq0 |
| 175062 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1_then_zasubq1 |
| 175063 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd0 |
| 175064 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1 |
| 175065 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubq0 |
| 175066 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubq1 |
| 175067 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175068 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175069 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd0 |
| 175070 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1 |
| 175071 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubq0 |
| 175072 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubq1 |
| 175073 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs0 |
| 175074 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1 |
| 175075 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175076 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175077 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175078 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175079 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175080 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175081 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175082 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175083 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_bsub |
| 175084 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_bsub_hi |
| 175085 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_hsub |
| 175086 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_hsub_hi |
| 175087 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_ssub |
| 175088 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_ssub_hi |
| 175089 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_bsub |
| 175090 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_bsub_hi |
| 175091 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_hsub |
| 175092 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_hsub_hi |
| 175093 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_ssub |
| 175094 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_ssub_hi |
| 175095 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_bsub |
| 175096 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_bsub_hi |
| 175097 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_hsub |
| 175098 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_hsub_hi |
| 175099 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_ssub |
| 175100 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_ssub_hi |
| 175101 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub1_then_psub |
| 175102 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_dsub_hi |
| 175103 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3_then_dsub_hi |
| 175104 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_dsub_hi |
| 175105 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175106 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175107 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175108 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175109 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175110 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175111 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175112 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175113 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175114 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175115 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175116 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175117 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175118 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175119 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo64_then_sub_32 |
| 175120 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo64_then_sub_32_hi |
| 175121 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_zsub_hi |
| 175122 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_zsub_hi |
| 175123 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_zsub_hi |
| 175124 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0_dsub1 |
| 175125 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175126 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_dsub2 |
| 175127 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175128 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_dsub3 |
| 175129 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_dsub1 |
| 175130 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175131 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_dsub1_dsub2 |
| 175132 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0_qsub1 |
| 175133 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175134 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_qsub2 |
| 175135 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175136 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_qsub3 |
| 175137 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175138 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175139 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175140 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175141 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175142 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175143 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175144 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175145 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175146 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_qsub1 |
| 175147 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175148 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_qsub1_qsub2 |
| 175149 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub1 |
| 175150 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175151 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub2 |
| 175152 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175153 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_zsub3 |
| 175154 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub2 |
| 175155 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub3 |
| 175156 | }, |
| 175157 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 175158 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub |
| 175159 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub_hi |
| 175160 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub |
| 175161 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 |
| 175162 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 |
| 175163 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 |
| 175164 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 |
| 175165 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_hi |
| 175166 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub |
| 175167 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub_hi |
| 175168 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub |
| 175169 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 |
| 175170 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 |
| 175171 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 |
| 175172 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 |
| 175173 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 |
| 175174 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 |
| 175175 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub |
| 175176 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub_hi |
| 175177 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common |
| 175178 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_hi |
| 175179 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 |
| 175180 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 |
| 175181 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 |
| 175182 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 |
| 175183 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> GPR64common |
| 175184 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common |
| 175185 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 175186 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 175187 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common |
| 175188 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common |
| 175189 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common |
| 175190 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common |
| 175191 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb |
| 175192 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 |
| 175193 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 |
| 175194 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 |
| 175195 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 |
| 175196 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 |
| 175197 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 |
| 175198 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 |
| 175199 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 |
| 175200 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub |
| 175201 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 |
| 175202 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 |
| 175203 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 |
| 175204 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 |
| 175205 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi |
| 175206 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 |
| 175207 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 |
| 175208 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 |
| 175209 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 |
| 175210 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 |
| 175211 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 |
| 175212 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175213 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175214 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 |
| 175215 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 |
| 175216 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 |
| 175217 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 |
| 175218 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 |
| 175219 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 |
| 175220 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175221 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175222 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175223 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175224 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175225 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175226 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175227 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175228 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub |
| 175229 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub_hi |
| 175230 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub |
| 175231 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub_hi |
| 175232 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub |
| 175233 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub_hi |
| 175234 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub |
| 175235 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub_hi |
| 175236 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub |
| 175237 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub_hi |
| 175238 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub |
| 175239 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub_hi |
| 175240 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub |
| 175241 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub_hi |
| 175242 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub |
| 175243 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub_hi |
| 175244 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub |
| 175245 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub_hi |
| 175246 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1_then_psub |
| 175247 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_hi |
| 175248 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub_hi |
| 175249 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_hi |
| 175250 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175251 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175252 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175253 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175254 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175255 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175256 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175257 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175258 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175259 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175260 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175261 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175262 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175263 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175264 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 |
| 175265 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32_hi |
| 175266 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi |
| 175267 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi |
| 175268 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi |
| 175269 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 |
| 175270 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175271 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 |
| 175272 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175273 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 |
| 175274 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1 |
| 175275 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175276 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2 |
| 175277 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 |
| 175278 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175279 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 |
| 175280 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175281 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 |
| 175282 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175283 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175284 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175285 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175286 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175287 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175288 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175289 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175290 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175291 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1 |
| 175292 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175293 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2 |
| 175294 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 |
| 175295 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175296 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 |
| 175297 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175298 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 |
| 175299 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 |
| 175300 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 |
| 175301 | }, |
| 175302 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 175303 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 175304 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 175305 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 175306 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 175307 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 175308 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 175309 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 175310 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 175311 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 175312 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 175313 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 175314 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 175315 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 175316 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 175317 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 175318 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 175319 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 175320 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 175321 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 175322 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 175323 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 175324 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 175325 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 175326 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 175327 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 175328 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common |
| 175329 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common |
| 175330 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common |
| 175331 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common |
| 175332 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 175333 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 175334 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 175335 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 175336 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 175337 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 175338 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 175339 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 175340 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 175341 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 175342 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 175343 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 175344 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 175345 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 175346 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 175347 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 175348 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 175349 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 175350 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 175351 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 175352 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 175353 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 175354 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 175355 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 175356 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 175357 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175358 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175359 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 175360 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 175361 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 175362 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 175363 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 175364 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 175365 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175366 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175367 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175368 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175369 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175370 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175371 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175372 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175373 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 175374 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 175375 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 175376 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 175377 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 175378 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 175379 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 175380 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 175381 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 175382 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 175383 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 175384 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 175385 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 175386 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 175387 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 175388 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 175389 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 175390 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 175391 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 175392 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 175393 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 175394 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 175395 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175396 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175397 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175398 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175399 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175400 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175401 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175402 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175403 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175404 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175405 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175406 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175407 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175408 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175409 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 175410 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 175411 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 175412 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 175413 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 175414 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 175415 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175416 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 175417 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175418 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 175419 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 175420 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175421 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 175422 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 175423 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175424 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 175425 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175426 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 175427 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175428 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175429 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175430 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175431 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175432 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175433 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175434 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175435 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175436 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 175437 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175438 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 175439 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 175440 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175441 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 175442 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175443 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 175444 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 175445 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 175446 | }, |
| 175447 | { // GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 175448 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 175449 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 175450 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 175451 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 175452 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 175453 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 175454 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 175455 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 175456 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 175457 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 175458 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 175459 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 175460 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 175461 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 175462 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 175463 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 175464 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 175465 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 175466 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 175467 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 175468 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 175469 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 175470 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 175471 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 175472 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 175473 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common |
| 175474 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 175475 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 175476 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 175477 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 175478 | 59, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 175479 | 61, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 175480 | 61, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 175481 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 175482 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 175483 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 175484 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 175485 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 175486 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 175487 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 175488 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 175489 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 175490 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 175491 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 175492 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 175493 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 175494 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 175495 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 175496 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 175497 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 175498 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 175499 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 175500 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 175501 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 175502 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175503 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175504 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 175505 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 175506 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 175507 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 175508 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 175509 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 175510 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175511 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175512 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175513 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175514 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175515 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175516 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175517 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175518 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 175519 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 175520 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 175521 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 175522 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 175523 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 175524 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 175525 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 175526 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 175527 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 175528 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 175529 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 175530 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 175531 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 175532 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 175533 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 175534 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 175535 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 175536 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 175537 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 175538 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 175539 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 175540 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175541 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175542 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175543 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175544 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175545 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175546 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175547 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175548 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175549 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175550 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175551 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175552 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175553 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175554 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 175555 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 175556 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 175557 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 175558 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 175559 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 175560 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175561 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 175562 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175563 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 175564 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 175565 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175566 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 175567 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 175568 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175569 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 175570 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175571 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 175572 | 51, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175573 | 80, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175574 | 80, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175575 | 80, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175576 | 82, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175577 | 51, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175578 | 51, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175579 | 51, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175580 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175581 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 175582 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175583 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 175584 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 175585 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175586 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 175587 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175588 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 175589 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 175590 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 175591 | }, |
| 175592 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 175593 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub |
| 175594 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub_hi |
| 175595 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub |
| 175596 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 |
| 175597 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 |
| 175598 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 |
| 175599 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 |
| 175600 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_hi |
| 175601 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub |
| 175602 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub_hi |
| 175603 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub |
| 175604 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 |
| 175605 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 |
| 175606 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 |
| 175607 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 |
| 175608 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 |
| 175609 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 |
| 175610 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub |
| 175611 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub_hi |
| 175612 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common |
| 175613 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_hi |
| 175614 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 |
| 175615 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 |
| 175616 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 |
| 175617 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 |
| 175618 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 175619 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 175620 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 175621 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 175622 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common |
| 175623 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common |
| 175624 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common |
| 175625 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common |
| 175626 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb |
| 175627 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 |
| 175628 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 |
| 175629 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 |
| 175630 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 |
| 175631 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 |
| 175632 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 |
| 175633 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 |
| 175634 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 |
| 175635 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub |
| 175636 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 |
| 175637 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 |
| 175638 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 |
| 175639 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 |
| 175640 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi |
| 175641 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 |
| 175642 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 |
| 175643 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 |
| 175644 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 |
| 175645 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 |
| 175646 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 |
| 175647 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175648 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175649 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 |
| 175650 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 |
| 175651 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 |
| 175652 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 |
| 175653 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 |
| 175654 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 |
| 175655 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175656 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175657 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175658 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175659 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175660 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175661 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175662 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175663 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub |
| 175664 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub_hi |
| 175665 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub |
| 175666 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub_hi |
| 175667 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub |
| 175668 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub_hi |
| 175669 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub |
| 175670 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub_hi |
| 175671 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub |
| 175672 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub_hi |
| 175673 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub |
| 175674 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub_hi |
| 175675 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub |
| 175676 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub_hi |
| 175677 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub |
| 175678 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub_hi |
| 175679 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub |
| 175680 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub_hi |
| 175681 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1_then_psub |
| 175682 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_hi |
| 175683 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub_hi |
| 175684 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_hi |
| 175685 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175686 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175687 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175688 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175689 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175690 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175691 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175692 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175693 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175694 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175695 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175696 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175697 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175698 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175699 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 |
| 175700 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32_hi |
| 175701 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi |
| 175702 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi |
| 175703 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi |
| 175704 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 |
| 175705 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175706 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 |
| 175707 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175708 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 |
| 175709 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1 |
| 175710 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175711 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2 |
| 175712 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 |
| 175713 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175714 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 |
| 175715 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175716 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 |
| 175717 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175718 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175719 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175720 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175721 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175722 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175723 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175724 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175725 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175726 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1 |
| 175727 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175728 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2 |
| 175729 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 |
| 175730 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175731 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 |
| 175732 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175733 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 |
| 175734 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 |
| 175735 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 |
| 175736 | }, |
| 175737 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 175738 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 175739 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 175740 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 175741 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 175742 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 175743 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 175744 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 175745 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 175746 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 175747 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 175748 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 175749 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 175750 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 175751 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 175752 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 175753 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 175754 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 175755 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 175756 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 175757 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 175758 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 175759 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 175760 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 175761 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 175762 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 175763 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 175764 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 175765 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common |
| 175766 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common |
| 175767 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 175768 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 175769 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 175770 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 175771 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 175772 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 175773 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 175774 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 175775 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 175776 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 175777 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 175778 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 175779 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 175780 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 175781 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 175782 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 175783 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 175784 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 175785 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 175786 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 175787 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 175788 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 175789 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 175790 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 175791 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 175792 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175793 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175794 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 175795 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 175796 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 175797 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 175798 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 175799 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 175800 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175801 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175802 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175803 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175804 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175805 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175806 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175807 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175808 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 175809 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 175810 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 175811 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 175812 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 175813 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 175814 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 175815 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 175816 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 175817 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 175818 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 175819 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 175820 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 175821 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 175822 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 175823 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 175824 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 175825 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 175826 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 175827 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 175828 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 175829 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 175830 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175831 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175832 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175833 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175834 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175835 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175836 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175837 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175838 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175839 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175840 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175841 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175842 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175843 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175844 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 175845 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 175846 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 175847 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 175848 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 175849 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 175850 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175851 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 175852 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175853 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 175854 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 175855 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 175856 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 175857 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 175858 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 175859 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 175860 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 175861 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 175862 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175863 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175864 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175865 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 175866 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 175867 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175868 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175869 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 175870 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 175871 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 175872 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 175873 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 175874 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 175875 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 175876 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 175877 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 175878 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 175879 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 175880 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 175881 | }, |
| 175882 | { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 175883 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 175884 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 175885 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 175886 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 175887 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 175888 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 175889 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 175890 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 175891 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 175892 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 175893 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 175894 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 175895 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 175896 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 175897 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 175898 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 175899 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 175900 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 175901 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 175902 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 175903 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 175904 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 175905 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 175906 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 175907 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 175908 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 175909 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 175910 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 175911 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 175912 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 175913 | 59, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 175914 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 175915 | 61, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 175916 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 175917 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 175918 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 175919 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 175920 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 175921 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 175922 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 175923 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 175924 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 175925 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 175926 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 175927 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 175928 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 175929 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 175930 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 175931 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 175932 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 175933 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 175934 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 175935 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 175936 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 175937 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 175938 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 175939 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 175940 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 175941 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 175942 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 175943 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 175944 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 175945 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 175946 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 175947 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 175948 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 175949 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 175950 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 175951 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 175952 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 175953 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 175954 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 175955 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 175956 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 175957 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 175958 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 175959 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 175960 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 175961 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 175962 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 175963 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 175964 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 175965 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 175966 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 175967 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 175968 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 175969 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 175970 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 175971 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 175972 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 175973 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 175974 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 175975 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 175976 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 175977 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 175978 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 175979 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 175980 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 175981 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 175982 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 175983 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 175984 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 175985 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 175986 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 175987 | 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 175988 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 175989 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 175990 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 175991 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 175992 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 175993 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 175994 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 175995 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 175996 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 175997 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 175998 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 175999 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 176000 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176001 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 176002 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 176003 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176004 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 176005 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176006 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 176007 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176008 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176009 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176010 | 80, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176011 | 82, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176012 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176013 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176014 | 51, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176015 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176016 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 176017 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176018 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 176019 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 176020 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176021 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 176022 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176023 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 176024 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 176025 | 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 176026 | }, |
| 176027 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 176028 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:bsub |
| 176029 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:bsub_hi |
| 176030 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub |
| 176031 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0 |
| 176032 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1 |
| 176033 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2 |
| 176034 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3 |
| 176035 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_hi |
| 176036 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:hsub |
| 176037 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:hsub_hi |
| 176038 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub |
| 176039 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub0 |
| 176040 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub1 |
| 176041 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0 |
| 176042 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1 |
| 176043 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2 |
| 176044 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3 |
| 176045 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:ssub |
| 176046 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:ssub_hi |
| 176047 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32 -> GPR32common |
| 176048 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32_hi |
| 176049 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sube32 |
| 176050 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sube64 |
| 176051 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo32 |
| 176052 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo64 |
| 176053 | 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_0 -> tcGPR64 |
| 176054 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_1 -> GPR64common |
| 176055 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2 -> GPR64common |
| 176056 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_3 -> GPR64common |
| 176057 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4 -> GPR64common |
| 176058 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_5 -> GPR64common |
| 176059 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6 -> GPR64common |
| 176060 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_7 -> GPR64common |
| 176061 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubb |
| 176062 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd0 |
| 176063 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1 |
| 176064 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh0 |
| 176065 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1 |
| 176066 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubq0 |
| 176067 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubq1 |
| 176068 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs0 |
| 176069 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1 |
| 176070 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub |
| 176071 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0 |
| 176072 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1 |
| 176073 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2 |
| 176074 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3 |
| 176075 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_hi |
| 176076 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1_then_zasubq0 |
| 176077 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1_then_zasubq1 |
| 176078 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd0 |
| 176079 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1 |
| 176080 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubq0 |
| 176081 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubq1 |
| 176082 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 176083 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 176084 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd0 |
| 176085 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1 |
| 176086 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubq0 |
| 176087 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubq1 |
| 176088 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs0 |
| 176089 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1 |
| 176090 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 176091 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 176092 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 176093 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 176094 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 176095 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 176096 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176097 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176098 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_bsub |
| 176099 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_bsub_hi |
| 176100 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_hsub |
| 176101 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_hsub_hi |
| 176102 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_ssub |
| 176103 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_ssub_hi |
| 176104 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_bsub |
| 176105 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_bsub_hi |
| 176106 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_hsub |
| 176107 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_hsub_hi |
| 176108 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_ssub |
| 176109 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_ssub_hi |
| 176110 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_bsub |
| 176111 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_bsub_hi |
| 176112 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_hsub |
| 176113 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_hsub_hi |
| 176114 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_ssub |
| 176115 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_ssub_hi |
| 176116 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub1_then_psub |
| 176117 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_dsub_hi |
| 176118 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3_then_dsub_hi |
| 176119 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_dsub_hi |
| 176120 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_7_then_sub_32 -> GPR32common |
| 176121 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_7_then_sub_32_hi |
| 176122 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_then_sub_32 -> GPR32common |
| 176123 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_then_sub_32_hi |
| 176124 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_5_then_sub_32 -> GPR32common |
| 176125 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_5_then_sub_32_hi |
| 176126 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_then_sub_32 -> GPR32common |
| 176127 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_then_sub_32_hi |
| 176128 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_3_then_sub_32 -> GPR32common |
| 176129 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_3_then_sub_32_hi |
| 176130 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_then_sub_32 -> GPR32common |
| 176131 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_then_sub_32_hi |
| 176132 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_1_then_sub_32 -> GPR32common |
| 176133 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_1_then_sub_32_hi |
| 176134 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo64_then_sub_32 |
| 176135 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo64_then_sub_32_hi |
| 176136 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_zsub_hi |
| 176137 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_zsub_hi |
| 176138 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_zsub_hi |
| 176139 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0_dsub1 |
| 176140 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0_dsub1_dsub2 |
| 176141 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_dsub2 |
| 176142 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_dsub2_dsub3 |
| 176143 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_dsub3 |
| 176144 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_dsub1 |
| 176145 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_dsub1_dsub2_dsub3 |
| 176146 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_dsub1_dsub2 |
| 176147 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0_qsub1 |
| 176148 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0_qsub1_qsub2 |
| 176149 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_qsub2 |
| 176150 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_qsub2_qsub3 |
| 176151 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_qsub3 |
| 176152 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176153 | 83, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 176154 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176155 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176156 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176157 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176158 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176159 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176160 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32_subo64_then_sub_32 |
| 176161 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_qsub1 |
| 176162 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_qsub1_qsub2_qsub3 |
| 176163 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_qsub1_qsub2 |
| 176164 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub1 |
| 176165 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub1_zsub2 |
| 176166 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub2 |
| 176167 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub2_zsub3 |
| 176168 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_zsub3 |
| 176169 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub2 |
| 176170 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub3 |
| 176171 | }, |
| 176172 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 176173 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 176174 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 176175 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 176176 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 176177 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 176178 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 176179 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 176180 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 176181 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 176182 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 176183 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 176184 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 176185 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 176186 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 176187 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 176188 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 176189 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 176190 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 176191 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 176192 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 176193 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 176194 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 176195 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 176196 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 176197 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 176198 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common |
| 176199 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common |
| 176200 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 176201 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 176202 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 176203 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 176204 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 176205 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 176206 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 176207 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 176208 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 176209 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 176210 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 176211 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 176212 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 176213 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 176214 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 176215 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 176216 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 176217 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 176218 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 176219 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 176220 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 176221 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 176222 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 176223 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 176224 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 176225 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 176226 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 176227 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176228 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176229 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 176230 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 176231 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 176232 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 176233 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 176234 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 176235 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176236 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176237 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176238 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176239 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176240 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176241 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176242 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176243 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 176244 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 176245 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 176246 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 176247 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 176248 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 176249 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 176250 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 176251 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 176252 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 176253 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 176254 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 176255 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 176256 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 176257 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 176258 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 176259 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 176260 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 176261 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 176262 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 176263 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 176264 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 176265 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176266 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176267 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176268 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176269 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176270 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176271 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176272 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176273 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176274 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 176275 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 176276 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 176277 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 176278 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 176279 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 176280 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 176281 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 176282 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 176283 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 176284 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 176285 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 176286 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 176287 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 176288 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 176289 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 176290 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176291 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 176292 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 176293 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176294 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 176295 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176296 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 176297 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176298 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176299 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176300 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176301 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176302 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176303 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176304 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176305 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176306 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 176307 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176308 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 176309 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 176310 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176311 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 176312 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176313 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 176314 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 176315 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 176316 | }, |
| 176317 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 176318 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 176319 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 176320 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 176321 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 176322 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 176323 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 176324 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 176325 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 176326 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 176327 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 176328 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 176329 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 176330 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 176331 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 176332 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 176333 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 176334 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 176335 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 176336 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 176337 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 176338 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 176339 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 176340 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 176341 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 176342 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 176343 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common |
| 176344 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 176345 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 176346 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 176347 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 176348 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 176349 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 176350 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 176351 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 176352 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 176353 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 176354 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 176355 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 176356 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 176357 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 176358 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 176359 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 176360 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 176361 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 176362 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 176363 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 176364 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 176365 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 176366 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 176367 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 176368 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 176369 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 176370 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 176371 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 176372 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176373 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176374 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 176375 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 176376 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 176377 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 176378 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 176379 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 176380 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176381 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176382 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176383 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176384 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176385 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176386 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176387 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176388 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 176389 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 176390 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 176391 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 176392 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 176393 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 176394 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 176395 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 176396 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 176397 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 176398 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 176399 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 176400 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 176401 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 176402 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 176403 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 176404 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 176405 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 176406 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 176407 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 176408 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 176409 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 176410 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176411 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176412 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176413 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176414 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176415 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176416 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176417 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176418 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176419 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 176420 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 176421 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 176422 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 176423 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 176424 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 176425 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 176426 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 176427 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 176428 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 176429 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 176430 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 176431 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 176432 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 176433 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 176434 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 176435 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176436 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 176437 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 176438 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176439 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 176440 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176441 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 176442 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176443 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176444 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176445 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176446 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176447 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176448 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176449 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176450 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176451 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 176452 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176453 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 176454 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 176455 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176456 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 176457 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176458 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 176459 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 176460 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 176461 | }, |
| 176462 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 176463 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 176464 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 176465 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 176466 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 176467 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 176468 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 176469 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 176470 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 176471 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 176472 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 176473 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 176474 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 176475 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 176476 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 176477 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 176478 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 176479 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 176480 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 176481 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 176482 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 176483 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 176484 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 176485 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 176486 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 176487 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 176488 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common |
| 176489 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 176490 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 176491 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 176492 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 176493 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 176494 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 176495 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 176496 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 176497 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 176498 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 176499 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 176500 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 176501 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 176502 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 176503 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 176504 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 176505 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 176506 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 176507 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 176508 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 176509 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 176510 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 176511 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 176512 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 176513 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 176514 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 176515 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 176516 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 176517 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176518 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176519 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 176520 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 176521 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 176522 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 176523 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 176524 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 176525 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176526 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176527 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176528 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176529 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176530 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176531 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176532 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176533 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 176534 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 176535 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 176536 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 176537 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 176538 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 176539 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 176540 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 176541 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 176542 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 176543 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 176544 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 176545 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 176546 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 176547 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 176548 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 176549 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 176550 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 176551 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 176552 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 176553 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 176554 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 176555 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176556 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176557 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176558 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176559 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176560 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176561 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176562 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176563 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176564 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 176565 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 176566 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 176567 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 176568 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 176569 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 176570 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 176571 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 176572 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 176573 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 176574 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 176575 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 176576 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 176577 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 176578 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 176579 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 176580 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176581 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 176582 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 176583 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176584 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 176585 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176586 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 176587 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176588 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176589 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176590 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176591 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176592 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176593 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176594 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176595 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176596 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 176597 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176598 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 176599 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 176600 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176601 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 176602 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176603 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 176604 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 176605 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 176606 | }, |
| 176607 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 176608 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub |
| 176609 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub_hi |
| 176610 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub |
| 176611 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 |
| 176612 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 |
| 176613 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 |
| 176614 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 |
| 176615 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_hi |
| 176616 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub |
| 176617 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub_hi |
| 176618 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub |
| 176619 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 |
| 176620 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 |
| 176621 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 |
| 176622 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 |
| 176623 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 |
| 176624 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 |
| 176625 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub |
| 176626 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub_hi |
| 176627 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common |
| 176628 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_hi |
| 176629 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 |
| 176630 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 |
| 176631 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 |
| 176632 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 |
| 176633 | 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 176634 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common |
| 176635 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 176636 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 176637 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common |
| 176638 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common |
| 176639 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common |
| 176640 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common |
| 176641 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb |
| 176642 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 |
| 176643 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 |
| 176644 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 |
| 176645 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 |
| 176646 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 |
| 176647 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 |
| 176648 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 |
| 176649 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 |
| 176650 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub |
| 176651 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 |
| 176652 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 |
| 176653 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 |
| 176654 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 |
| 176655 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi |
| 176656 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 |
| 176657 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 |
| 176658 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 |
| 176659 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 |
| 176660 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 |
| 176661 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 |
| 176662 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176663 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176664 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 |
| 176665 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 |
| 176666 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 |
| 176667 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 |
| 176668 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 |
| 176669 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 |
| 176670 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176671 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176672 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176673 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176674 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176675 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176676 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176677 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176678 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub |
| 176679 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub_hi |
| 176680 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub |
| 176681 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub_hi |
| 176682 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub |
| 176683 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub_hi |
| 176684 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub |
| 176685 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub_hi |
| 176686 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub |
| 176687 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub_hi |
| 176688 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub |
| 176689 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub_hi |
| 176690 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub |
| 176691 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub_hi |
| 176692 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub |
| 176693 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub_hi |
| 176694 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub |
| 176695 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub_hi |
| 176696 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1_then_psub |
| 176697 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_hi |
| 176698 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub_hi |
| 176699 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_hi |
| 176700 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176701 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176702 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176703 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176704 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176705 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176706 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176707 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176708 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176709 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 176710 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 176711 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 176712 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 176713 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 176714 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 |
| 176715 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32_hi |
| 176716 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi |
| 176717 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi |
| 176718 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi |
| 176719 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 |
| 176720 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 |
| 176721 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 |
| 176722 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 |
| 176723 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 |
| 176724 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1 |
| 176725 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176726 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2 |
| 176727 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 |
| 176728 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176729 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 |
| 176730 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176731 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 |
| 176732 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176733 | 83, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 176734 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176735 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176736 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176737 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176738 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176739 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176740 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176741 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1 |
| 176742 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176743 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2 |
| 176744 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 |
| 176745 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176746 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 |
| 176747 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176748 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 |
| 176749 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 |
| 176750 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 |
| 176751 | }, |
| 176752 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 176753 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 176754 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 176755 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 176756 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 176757 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 176758 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 176759 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 176760 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 176761 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 176762 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 176763 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 176764 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 176765 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 176766 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 176767 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 176768 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 176769 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 176770 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 176771 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 176772 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 176773 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 176774 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 176775 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 176776 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 176777 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 176778 | 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 176779 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common |
| 176780 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common |
| 176781 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common |
| 176782 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 176783 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 176784 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 176785 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 176786 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 176787 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 176788 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 176789 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 176790 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 176791 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 176792 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 176793 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 176794 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 176795 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 176796 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 176797 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 176798 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 176799 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 176800 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 176801 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 176802 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 176803 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 176804 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 176805 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 176806 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 176807 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176808 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176809 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 176810 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 176811 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 176812 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 176813 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 176814 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 176815 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176816 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176817 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176818 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176819 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176820 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176821 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176822 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176823 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 176824 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 176825 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 176826 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 176827 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 176828 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 176829 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 176830 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 176831 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 176832 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 176833 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 176834 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 176835 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 176836 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 176837 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 176838 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 176839 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 176840 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 176841 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 176842 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 176843 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 176844 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 176845 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176846 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176847 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176848 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176849 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176850 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176851 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176852 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176853 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176854 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 176855 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 176856 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 176857 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 176858 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 176859 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 176860 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 176861 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 176862 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 176863 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 176864 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 176865 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 176866 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 176867 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 176868 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 176869 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 176870 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 176871 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 176872 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 176873 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 176874 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 176875 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 176876 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 176877 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176878 | 83, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 176879 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176880 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 176881 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 176882 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176883 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176884 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 176885 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 176886 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 176887 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 176888 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 176889 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 176890 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 176891 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 176892 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 176893 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 176894 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 176895 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 176896 | }, |
| 176897 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 176898 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 176899 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 176900 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 176901 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 176902 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 176903 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 176904 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 176905 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 176906 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 176907 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 176908 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 176909 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 176910 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 176911 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 176912 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 176913 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 176914 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 176915 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 176916 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 176917 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 176918 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 176919 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 176920 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 176921 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 176922 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 176923 | 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 176924 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 176925 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 176926 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 176927 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 176928 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 176929 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 176930 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 176931 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 176932 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 176933 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 176934 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 176935 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 176936 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 176937 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 176938 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 176939 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 176940 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 176941 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 176942 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 176943 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 176944 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 176945 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 176946 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 176947 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 176948 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 176949 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 176950 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 176951 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 176952 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 176953 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 176954 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 176955 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 176956 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 176957 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 176958 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 176959 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 176960 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 176961 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 176962 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 176963 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 176964 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 176965 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 176966 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 176967 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 176968 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 176969 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 176970 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 176971 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 176972 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 176973 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 176974 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 176975 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 176976 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 176977 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 176978 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 176979 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 176980 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 176981 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 176982 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 176983 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 176984 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 176985 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 176986 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 176987 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 176988 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 176989 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 176990 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 176991 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 176992 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 176993 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 176994 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 176995 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 176996 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 176997 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 176998 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 176999 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 177000 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 177001 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 177002 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 177003 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 177004 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 177005 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 177006 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 177007 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 177008 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 177009 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 177010 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 177011 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 177012 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 177013 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 177014 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 177015 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 177016 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 177017 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 177018 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 177019 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 177020 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 177021 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 177022 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177023 | 83, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 177024 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177025 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177026 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177027 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177028 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177029 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177030 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 177031 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 177032 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 177033 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 177034 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 177035 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 177036 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 177037 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 177038 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 177039 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 177040 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 177041 | }, |
| 177042 | { // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 177043 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:bsub |
| 177044 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:bsub_hi |
| 177045 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub |
| 177046 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub0 |
| 177047 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1 |
| 177048 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2 |
| 177049 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3 |
| 177050 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub_hi |
| 177051 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:hsub |
| 177052 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:hsub_hi |
| 177053 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:psub |
| 177054 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:psub0 |
| 177055 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:psub1 |
| 177056 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub0 |
| 177057 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub1 |
| 177058 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub2 |
| 177059 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub3 |
| 177060 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:ssub |
| 177061 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:ssub_hi |
| 177062 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sub_32 -> GPR32common |
| 177063 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sub_32_hi |
| 177064 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sube32 |
| 177065 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sube64 |
| 177066 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:subo32 |
| 177067 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:subo64 |
| 177068 | 64, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_0 -> tcGPRnotx16x17 |
| 177069 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_1 -> GPR64common_and_GPR64noip |
| 177070 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_2 -> GPR64common |
| 177071 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_3 -> GPR64common |
| 177072 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_4 -> GPR64common |
| 177073 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_5 -> GPR64common |
| 177074 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_6 -> GPR64common |
| 177075 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_7 -> GPR64common |
| 177076 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubb |
| 177077 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubd0 |
| 177078 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubd1 |
| 177079 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh0 |
| 177080 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1 |
| 177081 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubq0 |
| 177082 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubq1 |
| 177083 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs0 |
| 177084 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1 |
| 177085 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub |
| 177086 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub0 |
| 177087 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub1 |
| 177088 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub2 |
| 177089 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub3 |
| 177090 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub_hi |
| 177091 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubd1_then_zasubq0 |
| 177092 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubd1_then_zasubq1 |
| 177093 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubd0 |
| 177094 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubd1 |
| 177095 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubq0 |
| 177096 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubq1 |
| 177097 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 177098 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 177099 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubd0 |
| 177100 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubd1 |
| 177101 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubq0 |
| 177102 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubq1 |
| 177103 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs0 |
| 177104 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1 |
| 177105 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 177106 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 177107 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 177108 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 177109 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 177110 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 177111 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177112 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177113 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_bsub |
| 177114 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_bsub_hi |
| 177115 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_hsub |
| 177116 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_hsub_hi |
| 177117 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_ssub |
| 177118 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_then_ssub_hi |
| 177119 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_bsub |
| 177120 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_bsub_hi |
| 177121 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_hsub |
| 177122 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_hsub_hi |
| 177123 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_ssub |
| 177124 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub3_then_ssub_hi |
| 177125 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_bsub |
| 177126 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_bsub_hi |
| 177127 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_hsub |
| 177128 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_hsub_hi |
| 177129 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_ssub |
| 177130 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_then_ssub_hi |
| 177131 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:psub1_then_psub |
| 177132 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub1_then_dsub_hi |
| 177133 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub3_then_dsub_hi |
| 177134 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub2_then_dsub_hi |
| 177135 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_7_then_sub_32 -> GPR32common |
| 177136 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 177137 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_6_then_sub_32 -> GPR32common |
| 177138 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 177139 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_5_then_sub_32 -> GPR32common |
| 177140 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 177141 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_4_then_sub_32 -> GPR32common |
| 177142 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 177143 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_3_then_sub_32 -> GPR32common |
| 177144 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 177145 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_2_then_sub_32 -> GPR32common |
| 177146 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 177147 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_1_then_sub_32 -> GPR32common |
| 177148 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 177149 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:subo64_then_sub_32 |
| 177150 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:subo64_then_sub_32_hi |
| 177151 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub1_then_zsub_hi |
| 177152 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub3_then_zsub_hi |
| 177153 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub2_then_zsub_hi |
| 177154 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub0_dsub1 |
| 177155 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub0_dsub1_dsub2 |
| 177156 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_dsub2 |
| 177157 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub1_dsub2_dsub3 |
| 177158 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub2_dsub3 |
| 177159 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub_dsub1 |
| 177160 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 177161 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:dsub_dsub1_dsub2 |
| 177162 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub0_qsub1 |
| 177163 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub0_qsub1_qsub2 |
| 177164 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub1_qsub2 |
| 177165 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub1_qsub2_qsub3 |
| 177166 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:qsub2_qsub3 |
| 177167 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177168 | 84, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 177169 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177170 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177171 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177172 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177173 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177174 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177175 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:sub_32_subo64_then_sub_32 |
| 177176 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub_qsub1 |
| 177177 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 177178 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub_qsub1_qsub2 |
| 177179 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub0_zsub1 |
| 177180 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub0_zsub1_zsub2 |
| 177181 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub1_zsub2 |
| 177182 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub1_zsub2_zsub3 |
| 177183 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub2_zsub3 |
| 177184 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub0_zsub2 |
| 177185 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16:zsub1_zsub3 |
| 177186 | }, |
| 177187 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 177188 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:bsub |
| 177189 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:bsub_hi |
| 177190 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub |
| 177191 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0 |
| 177192 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1 |
| 177193 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2 |
| 177194 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3 |
| 177195 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_hi |
| 177196 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:hsub |
| 177197 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:hsub_hi |
| 177198 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub |
| 177199 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub0 |
| 177200 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub1 |
| 177201 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0 |
| 177202 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1 |
| 177203 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2 |
| 177204 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3 |
| 177205 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:ssub |
| 177206 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:ssub_hi |
| 177207 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32 -> GPR32common |
| 177208 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32_hi |
| 177209 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sube32 |
| 177210 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sube64 |
| 177211 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo32 |
| 177212 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo64 |
| 177213 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_0 -> tcGPR64 |
| 177214 | 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_1 -> tcGPRnotx16 |
| 177215 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2 -> tcGPR64 |
| 177216 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_3 -> GPR64common |
| 177217 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4 -> GPR64common |
| 177218 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_5 -> GPR64common |
| 177219 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6 -> GPR64common |
| 177220 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_7 -> GPR64common |
| 177221 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubb |
| 177222 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd0 |
| 177223 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1 |
| 177224 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh0 |
| 177225 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1 |
| 177226 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubq0 |
| 177227 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubq1 |
| 177228 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs0 |
| 177229 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1 |
| 177230 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub |
| 177231 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0 |
| 177232 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1 |
| 177233 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2 |
| 177234 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3 |
| 177235 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_hi |
| 177236 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1_then_zasubq0 |
| 177237 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1_then_zasubq1 |
| 177238 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd0 |
| 177239 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1 |
| 177240 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubq0 |
| 177241 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubq1 |
| 177242 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 |
| 177243 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 |
| 177244 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd0 |
| 177245 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1 |
| 177246 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubq0 |
| 177247 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubq1 |
| 177248 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs0 |
| 177249 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1 |
| 177250 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 |
| 177251 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 |
| 177252 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 |
| 177253 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 |
| 177254 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 |
| 177255 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 |
| 177256 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177257 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177258 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_bsub |
| 177259 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_bsub_hi |
| 177260 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_hsub |
| 177261 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_hsub_hi |
| 177262 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_ssub |
| 177263 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_ssub_hi |
| 177264 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_bsub |
| 177265 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_bsub_hi |
| 177266 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_hsub |
| 177267 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_hsub_hi |
| 177268 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_ssub |
| 177269 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_ssub_hi |
| 177270 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_bsub |
| 177271 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_bsub_hi |
| 177272 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_hsub |
| 177273 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_hsub_hi |
| 177274 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_ssub |
| 177275 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_ssub_hi |
| 177276 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub1_then_psub |
| 177277 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_dsub_hi |
| 177278 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3_then_dsub_hi |
| 177279 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_dsub_hi |
| 177280 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_7_then_sub_32 -> GPR32common |
| 177281 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_7_then_sub_32_hi |
| 177282 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_then_sub_32 -> GPR32common |
| 177283 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_then_sub_32_hi |
| 177284 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_5_then_sub_32 -> GPR32common |
| 177285 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_5_then_sub_32_hi |
| 177286 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_then_sub_32 -> GPR32common |
| 177287 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_then_sub_32_hi |
| 177288 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_3_then_sub_32 -> GPR32common |
| 177289 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_3_then_sub_32_hi |
| 177290 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_then_sub_32 -> GPR32common |
| 177291 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_then_sub_32_hi |
| 177292 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_1_then_sub_32 -> GPR32common |
| 177293 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_1_then_sub_32_hi |
| 177294 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo64_then_sub_32 |
| 177295 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo64_then_sub_32_hi |
| 177296 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_zsub_hi |
| 177297 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_zsub_hi |
| 177298 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_zsub_hi |
| 177299 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0_dsub1 |
| 177300 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0_dsub1_dsub2 |
| 177301 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_dsub2 |
| 177302 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_dsub2_dsub3 |
| 177303 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_dsub3 |
| 177304 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_dsub1 |
| 177305 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_dsub1_dsub2_dsub3 |
| 177306 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_dsub1_dsub2 |
| 177307 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0_qsub1 |
| 177308 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0_qsub1_qsub2 |
| 177309 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_qsub2 |
| 177310 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_qsub2_qsub3 |
| 177311 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_qsub3 |
| 177312 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177313 | 85, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 177314 | 83, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 177315 | 80, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177316 | 80, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177317 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177318 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177319 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177320 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32_subo64_then_sub_32 |
| 177321 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_qsub1 |
| 177322 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_qsub1_qsub2_qsub3 |
| 177323 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_qsub1_qsub2 |
| 177324 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub1 |
| 177325 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub1_zsub2 |
| 177326 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub2 |
| 177327 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub2_zsub3 |
| 177328 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_zsub3 |
| 177329 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub2 |
| 177330 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub3 |
| 177331 | }, |
| 177332 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 177333 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 177334 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 177335 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 177336 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 177337 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 177338 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 177339 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 177340 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 177341 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 177342 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 177343 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 177344 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 177345 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 177346 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 177347 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 177348 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 177349 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 177350 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 177351 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 177352 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 177353 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 177354 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 177355 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 177356 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 177357 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 177358 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 177359 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 177360 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 177361 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 177362 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 177363 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 177364 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 177365 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 177366 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 177367 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 177368 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 177369 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 177370 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 177371 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 177372 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 177373 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 177374 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 177375 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 177376 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 177377 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 177378 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 177379 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 177380 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 177381 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 177382 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 177383 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 177384 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 177385 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 177386 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 177387 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 177388 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 177389 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 177390 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 177391 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 177392 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 177393 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 177394 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 177395 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 177396 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 177397 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 177398 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 177399 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 177400 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 177401 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177402 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177403 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 177404 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 177405 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 177406 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 177407 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 177408 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 177409 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 177410 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 177411 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 177412 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 177413 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 177414 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 177415 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 177416 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 177417 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 177418 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 177419 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 177420 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 177421 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 177422 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 177423 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 177424 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 177425 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 177426 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 177427 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 177428 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 177429 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 177430 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 177431 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 177432 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 177433 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 177434 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 177435 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 177436 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 177437 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 177438 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 177439 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 177440 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 177441 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 177442 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 177443 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 177444 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 177445 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 177446 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 177447 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 177448 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 177449 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 177450 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 177451 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 177452 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 177453 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 177454 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 177455 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 177456 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 177457 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177458 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177459 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177460 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177461 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177462 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177463 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177464 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177465 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 177466 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 177467 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 177468 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 177469 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 177470 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 177471 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 177472 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 177473 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 177474 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 177475 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 177476 | }, |
| 177477 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 177478 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 177479 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 177480 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 177481 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 177482 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 177483 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 177484 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 177485 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 177486 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 177487 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 177488 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 177489 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 177490 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 177491 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 177492 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 177493 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 177494 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 177495 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 177496 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 177497 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 177498 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 177499 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 177500 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 177501 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 177502 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 177503 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 177504 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 177505 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 177506 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 177507 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 177508 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 177509 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 177510 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 177511 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 177512 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 177513 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 177514 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 177515 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 177516 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 177517 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 177518 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 177519 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 177520 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 177521 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 177522 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 177523 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 177524 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 177525 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 177526 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 177527 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 177528 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 177529 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 177530 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 177531 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 177532 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 177533 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 177534 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 177535 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 177536 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 177537 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 177538 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 177539 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 177540 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 177541 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 177542 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 177543 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 177544 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 177545 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 177546 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177547 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177548 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 177549 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 177550 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 177551 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 177552 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 177553 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 177554 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 177555 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 177556 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 177557 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 177558 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 177559 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 177560 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 177561 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 177562 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 177563 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 177564 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 177565 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 177566 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 177567 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 177568 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 177569 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 177570 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 177571 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 177572 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 177573 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 177574 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 177575 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 177576 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 177577 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 177578 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 177579 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 177580 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 177581 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 177582 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 177583 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 177584 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 177585 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 177586 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 177587 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 177588 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 177589 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 177590 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 177591 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 177592 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 177593 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 177594 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 177595 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 177596 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 177597 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 177598 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 177599 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 177600 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 177601 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 177602 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177603 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177604 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177605 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177606 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177607 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177608 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177609 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177610 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 177611 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 177612 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 177613 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 177614 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 177615 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 177616 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 177617 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 177618 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 177619 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 177620 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 177621 | }, |
| 177622 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 177623 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 177624 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 177625 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 177626 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 177627 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 177628 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 177629 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 177630 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 177631 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 177632 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 177633 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 177634 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 177635 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 177636 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 177637 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 177638 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 177639 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 177640 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 177641 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 177642 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 177643 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 177644 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 177645 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 177646 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 177647 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 177648 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 177649 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 177650 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 177651 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 177652 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 177653 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 177654 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 177655 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 177656 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 177657 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 177658 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 177659 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 177660 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 177661 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 177662 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 177663 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 177664 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 177665 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 177666 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 177667 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 177668 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 177669 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 177670 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 177671 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 177672 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 177673 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 177674 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 177675 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 177676 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 177677 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 177678 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 177679 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 177680 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 177681 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 177682 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 177683 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 177684 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 177685 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 177686 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 177687 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 177688 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 177689 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 177690 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 177691 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177692 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177693 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 177694 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 177695 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 177696 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 177697 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 177698 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 177699 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 177700 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 177701 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 177702 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 177703 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 177704 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 177705 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 177706 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 177707 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 177708 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 177709 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 177710 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 177711 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 177712 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 177713 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 177714 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 177715 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 177716 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 177717 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 177718 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 177719 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 177720 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 177721 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 177722 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 177723 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 177724 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 177725 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 177726 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 177727 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 177728 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 177729 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 177730 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 177731 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 177732 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 177733 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 177734 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 177735 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 177736 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 177737 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 177738 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 177739 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 177740 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 177741 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 177742 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 177743 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 177744 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 177745 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 177746 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 177747 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177748 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177749 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177750 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177751 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177752 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177753 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177754 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177755 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 177756 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 177757 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 177758 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 177759 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 177760 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 177761 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 177762 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 177763 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 177764 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 177765 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 177766 | }, |
| 177767 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 177768 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 177769 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 177770 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 177771 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 177772 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 177773 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 177774 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 177775 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 177776 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 177777 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 177778 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 177779 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 177780 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 177781 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 177782 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 177783 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 177784 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 177785 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 177786 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 177787 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 177788 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 177789 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 177790 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 177791 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 177792 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 177793 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common |
| 177794 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 177795 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 177796 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 177797 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 177798 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 177799 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 177800 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 177801 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 177802 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 177803 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 177804 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 177805 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 177806 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 177807 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 177808 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 177809 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 177810 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 177811 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 177812 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 177813 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 177814 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 177815 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 177816 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 177817 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 177818 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 177819 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 177820 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 177821 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 177822 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 177823 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 177824 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 177825 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 177826 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 177827 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 177828 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 177829 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 177830 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 177831 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 177832 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 177833 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 177834 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 177835 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 177836 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177837 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177838 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 177839 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 177840 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 177841 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 177842 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 177843 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 177844 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 177845 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 177846 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 177847 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 177848 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 177849 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 177850 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 177851 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 177852 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 177853 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 177854 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 177855 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 177856 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 177857 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 177858 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 177859 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 177860 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 177861 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 177862 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 177863 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 177864 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 177865 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 177866 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 177867 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 177868 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 177869 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 177870 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 177871 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 177872 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 177873 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 177874 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 177875 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 177876 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 177877 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 177878 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 177879 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 177880 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 177881 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 177882 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 177883 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 177884 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 177885 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 177886 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 177887 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 177888 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 177889 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 177890 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 177891 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 177892 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177893 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 177894 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177895 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177896 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 177897 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177898 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177899 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 177900 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 177901 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 177902 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 177903 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 177904 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 177905 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 177906 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 177907 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 177908 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 177909 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 177910 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 177911 | }, |
| 177912 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 177913 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub |
| 177914 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub_hi |
| 177915 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub |
| 177916 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 |
| 177917 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 |
| 177918 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 |
| 177919 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 |
| 177920 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_hi |
| 177921 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub |
| 177922 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub_hi |
| 177923 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub |
| 177924 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 |
| 177925 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 |
| 177926 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 |
| 177927 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 |
| 177928 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 |
| 177929 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 |
| 177930 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub |
| 177931 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub_hi |
| 177932 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common |
| 177933 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_hi |
| 177934 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 |
| 177935 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 |
| 177936 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 |
| 177937 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 |
| 177938 | 64, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 177939 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 177940 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 177941 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 177942 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common |
| 177943 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common |
| 177944 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common |
| 177945 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common |
| 177946 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb |
| 177947 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 |
| 177948 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 |
| 177949 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 |
| 177950 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 |
| 177951 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 |
| 177952 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 |
| 177953 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 |
| 177954 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 |
| 177955 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub |
| 177956 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 |
| 177957 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 |
| 177958 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 |
| 177959 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 |
| 177960 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi |
| 177961 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 |
| 177962 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 |
| 177963 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 |
| 177964 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 |
| 177965 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 |
| 177966 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 |
| 177967 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 177968 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 177969 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 |
| 177970 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 |
| 177971 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 |
| 177972 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 |
| 177973 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 |
| 177974 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 |
| 177975 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 177976 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 177977 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 177978 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 177979 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 177980 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 177981 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 177982 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 177983 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub |
| 177984 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub_hi |
| 177985 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub |
| 177986 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub_hi |
| 177987 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub |
| 177988 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub_hi |
| 177989 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub |
| 177990 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub_hi |
| 177991 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub |
| 177992 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub_hi |
| 177993 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub |
| 177994 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub_hi |
| 177995 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub |
| 177996 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub_hi |
| 177997 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub |
| 177998 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub_hi |
| 177999 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub |
| 178000 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub_hi |
| 178001 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1_then_psub |
| 178002 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_hi |
| 178003 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub_hi |
| 178004 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_hi |
| 178005 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178006 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178007 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178008 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178009 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178010 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178011 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178012 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178013 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178014 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178015 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178016 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178017 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178018 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178019 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 |
| 178020 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32_hi |
| 178021 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi |
| 178022 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi |
| 178023 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi |
| 178024 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 |
| 178025 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178026 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 |
| 178027 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178028 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 |
| 178029 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1 |
| 178030 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178031 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_dsub1_dsub2 |
| 178032 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 |
| 178033 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178034 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 |
| 178035 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178036 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 |
| 178037 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178038 | 84, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 178039 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178040 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178041 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178042 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178043 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178044 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178045 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178046 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1 |
| 178047 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178048 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_qsub1_qsub2 |
| 178049 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 |
| 178050 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178051 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 |
| 178052 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178053 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 |
| 178054 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 |
| 178055 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 |
| 178056 | }, |
| 178057 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 178058 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 178059 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 178060 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 178061 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 178062 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 178063 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 178064 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 178065 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 178066 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 178067 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 178068 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 178069 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 178070 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 178071 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 178072 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 178073 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 178074 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 178075 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 178076 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 178077 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 178078 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 178079 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 178080 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 178081 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 178082 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 178083 | 64, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 178084 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 178085 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common |
| 178086 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common |
| 178087 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 178088 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 178089 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 178090 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 178091 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 178092 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 178093 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 178094 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 178095 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 178096 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 178097 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 178098 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 178099 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 178100 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 178101 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 178102 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 178103 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 178104 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 178105 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 178106 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 178107 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 178108 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 178109 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 178110 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 178111 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 178112 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178113 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178114 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 178115 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 178116 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 178117 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 178118 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 178119 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 178120 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178121 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178122 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178123 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178124 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178125 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178126 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178127 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178128 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 178129 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 178130 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 178131 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 178132 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 178133 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 178134 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 178135 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 178136 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 178137 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 178138 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 178139 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 178140 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 178141 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 178142 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 178143 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 178144 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 178145 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 178146 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 178147 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 178148 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 178149 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 178150 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178151 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178152 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178153 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178154 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178155 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178156 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178157 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178158 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178159 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178160 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178161 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178162 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178163 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178164 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 178165 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 178166 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 178167 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 178168 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 178169 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 178170 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178171 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 178172 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178173 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 178174 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 178175 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178176 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 178177 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 178178 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178179 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 178180 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178181 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 178182 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178183 | 84, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 178184 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178185 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178186 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178187 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178188 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178189 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178190 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178191 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 178192 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178193 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 178194 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 178195 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178196 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 178197 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178198 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 178199 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 178200 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 178201 | }, |
| 178202 | { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 178203 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 178204 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 178205 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 178206 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 178207 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 178208 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 178209 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 178210 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 178211 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 178212 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 178213 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 178214 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 178215 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 178216 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 178217 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 178218 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 178219 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 178220 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 178221 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 178222 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 178223 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 178224 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 178225 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 178226 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 178227 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 178228 | 64, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 178229 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 178230 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 178231 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 178232 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 178233 | 59, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 178234 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 178235 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 178236 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 178237 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 178238 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 178239 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 178240 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 178241 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 178242 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 178243 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 178244 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 178245 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 178246 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 178247 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 178248 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 178249 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 178250 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 178251 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 178252 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 178253 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 178254 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 178255 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 178256 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 178257 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178258 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178259 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 178260 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 178261 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 178262 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 178263 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 178264 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 178265 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178266 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178267 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178268 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178269 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178270 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178271 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178272 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178273 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 178274 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 178275 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 178276 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 178277 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 178278 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 178279 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 178280 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 178281 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 178282 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 178283 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 178284 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 178285 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 178286 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 178287 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 178288 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 178289 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 178290 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 178291 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 178292 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 178293 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 178294 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 178295 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178296 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178297 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178298 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178299 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178300 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178301 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178302 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178303 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178304 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178305 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178306 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178307 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178308 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178309 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 178310 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 178311 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 178312 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 178313 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 178314 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 178315 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178316 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 178317 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178318 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 178319 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 178320 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178321 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 178322 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 178323 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178324 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 178325 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178326 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 178327 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178328 | 84, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 178329 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178330 | 80, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178331 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178332 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178333 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178334 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178335 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178336 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 178337 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178338 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 178339 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 178340 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178341 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 178342 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178343 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 178344 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 178345 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 178346 | }, |
| 178347 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 178348 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 178349 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 178350 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 178351 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 178352 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 178353 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 178354 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 178355 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 178356 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 178357 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 178358 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 178359 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 178360 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 178361 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 178362 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 178363 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 178364 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 178365 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 178366 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 178367 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 178368 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 178369 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 178370 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 178371 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 178372 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 178373 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 178374 | 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 178375 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> tcGPR64 |
| 178376 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common |
| 178377 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 178378 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 178379 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 178380 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 178381 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 178382 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 178383 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 178384 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 178385 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 178386 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 178387 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 178388 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 178389 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 178390 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 178391 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 178392 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 178393 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 178394 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 178395 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 178396 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 178397 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 178398 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 178399 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 178400 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 178401 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 178402 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178403 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178404 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 178405 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 178406 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 178407 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 178408 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 178409 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 178410 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178411 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178412 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178413 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178414 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178415 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178416 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178417 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178418 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 178419 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 178420 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 178421 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 178422 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 178423 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 178424 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 178425 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 178426 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 178427 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 178428 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 178429 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 178430 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 178431 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 178432 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 178433 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 178434 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 178435 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 178436 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 178437 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 178438 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 178439 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 178440 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178441 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178442 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178443 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178444 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178445 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178446 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178447 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178448 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178449 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178450 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178451 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178452 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178453 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178454 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 178455 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 178456 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 178457 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 178458 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 178459 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 178460 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178461 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 178462 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178463 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 178464 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 178465 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178466 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 178467 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 178468 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178469 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 178470 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178471 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 178472 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178473 | 85, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 178474 | 83, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 178475 | 82, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178476 | 80, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178477 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178478 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178479 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178480 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178481 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 178482 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178483 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 178484 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 178485 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178486 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 178487 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178488 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 178489 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 178490 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 178491 | }, |
| 178492 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 178493 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 178494 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 178495 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 178496 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 178497 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 178498 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 178499 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 178500 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 178501 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 178502 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 178503 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 178504 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 178505 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 178506 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 178507 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 178508 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 178509 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 178510 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 178511 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 178512 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 178513 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 178514 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 178515 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 178516 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 178517 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 178518 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 178519 | 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 178520 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 |
| 178521 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 178522 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 178523 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 178524 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 178525 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 178526 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 178527 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 178528 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 178529 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 178530 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 178531 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 178532 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 178533 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 178534 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 178535 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 178536 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 178537 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 178538 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 178539 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 178540 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 178541 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 178542 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 178543 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 178544 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 178545 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 178546 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 178547 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178548 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178549 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 178550 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 178551 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 178552 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 178553 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 178554 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 178555 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178556 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178557 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178558 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178559 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178560 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178561 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178562 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178563 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 178564 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 178565 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 178566 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 178567 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 178568 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 178569 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 178570 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 178571 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 178572 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 178573 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 178574 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 178575 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 178576 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 178577 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 178578 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 178579 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 178580 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 178581 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 178582 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 178583 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 178584 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 178585 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178586 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178587 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178588 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178589 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178590 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178591 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178592 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178593 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178594 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178595 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178596 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178597 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178598 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178599 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 178600 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 178601 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 178602 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 178603 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 178604 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 178605 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178606 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 178607 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178608 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 178609 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 178610 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178611 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 178612 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 178613 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178614 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 178615 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178616 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 178617 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178618 | 85, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 178619 | 83, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 178620 | 80, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178621 | 82, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178622 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178623 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178624 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178625 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178626 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 178627 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178628 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 178629 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 178630 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178631 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 178632 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178633 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 178634 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 178635 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 178636 | }, |
| 178637 | { // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 178638 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:bsub |
| 178639 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:bsub_hi |
| 178640 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub |
| 178641 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub0 |
| 178642 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1 |
| 178643 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2 |
| 178644 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3 |
| 178645 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub_hi |
| 178646 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:hsub |
| 178647 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:hsub_hi |
| 178648 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:psub |
| 178649 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:psub0 |
| 178650 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:psub1 |
| 178651 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub0 |
| 178652 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub1 |
| 178653 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub2 |
| 178654 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub3 |
| 178655 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:ssub |
| 178656 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:ssub_hi |
| 178657 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sub_32 -> GPR32common |
| 178658 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sub_32_hi |
| 178659 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sube32 |
| 178660 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sube64 |
| 178661 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:subo32 |
| 178662 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:subo64 |
| 178663 | 64, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_0 -> tcGPRnotx16x17 |
| 178664 | 64, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_1 -> tcGPRnotx16x17 |
| 178665 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_2 -> tcGPR64 |
| 178666 | 63, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_3 -> tcGPRnotx16 |
| 178667 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_4 -> tcGPR64 |
| 178668 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_5 -> GPR64common |
| 178669 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_6 -> GPR64common |
| 178670 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_7 -> GPR64common |
| 178671 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubb |
| 178672 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubd0 |
| 178673 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubd1 |
| 178674 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh0 |
| 178675 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1 |
| 178676 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubq0 |
| 178677 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubq1 |
| 178678 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs0 |
| 178679 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1 |
| 178680 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub |
| 178681 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub0 |
| 178682 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub1 |
| 178683 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub2 |
| 178684 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub3 |
| 178685 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub_hi |
| 178686 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 178687 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 178688 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 178689 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 178690 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 178691 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 178692 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 178693 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 178694 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 178695 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 178696 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 178697 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 178698 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 178699 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 178700 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 178701 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 178702 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 178703 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 178704 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 178705 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 178706 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178707 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178708 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_bsub |
| 178709 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_bsub_hi |
| 178710 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_hsub |
| 178711 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_hsub_hi |
| 178712 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_ssub |
| 178713 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_then_ssub_hi |
| 178714 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_bsub |
| 178715 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_bsub_hi |
| 178716 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_hsub |
| 178717 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_hsub_hi |
| 178718 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_ssub |
| 178719 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub3_then_ssub_hi |
| 178720 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_bsub |
| 178721 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_bsub_hi |
| 178722 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_hsub |
| 178723 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_hsub_hi |
| 178724 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_ssub |
| 178725 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_then_ssub_hi |
| 178726 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:psub1_then_psub |
| 178727 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub1_then_dsub_hi |
| 178728 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub3_then_dsub_hi |
| 178729 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub2_then_dsub_hi |
| 178730 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 178731 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 178732 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 178733 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 178734 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 178735 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 178736 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 178737 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 178738 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 178739 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 178740 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 178741 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 178742 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_1_then_sub_32 -> GPR32common |
| 178743 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 178744 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:subo64_then_sub_32 |
| 178745 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:subo64_then_sub_32_hi |
| 178746 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub1_then_zsub_hi |
| 178747 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub3_then_zsub_hi |
| 178748 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub2_then_zsub_hi |
| 178749 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub0_dsub1 |
| 178750 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 178751 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_dsub2 |
| 178752 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 178753 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub2_dsub3 |
| 178754 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub_dsub1 |
| 178755 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 178756 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 178757 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub0_qsub1 |
| 178758 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 178759 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub1_qsub2 |
| 178760 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 178761 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:qsub2_qsub3 |
| 178762 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178763 | 86, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 178764 | 85, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 178765 | 83, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 178766 | 80, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178767 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178768 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178769 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178770 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:sub_32_subo64_then_sub_32 |
| 178771 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub_qsub1 |
| 178772 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 178773 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 178774 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub0_zsub1 |
| 178775 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 178776 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub1_zsub2 |
| 178777 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 178778 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub2_zsub3 |
| 178779 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub0_zsub2 |
| 178780 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17:zsub1_zsub3 |
| 178781 | }, |
| 178782 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 178783 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 178784 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 178785 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 178786 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 178787 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 178788 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 178789 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 178790 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 178791 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 178792 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 178793 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 178794 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 178795 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 178796 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 178797 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 178798 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 178799 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 178800 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 178801 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 178802 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 178803 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 178804 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 178805 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 178806 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 178807 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 178808 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 178809 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common |
| 178810 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 178811 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 178812 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 178813 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 178814 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 178815 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 178816 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 178817 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 178818 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 178819 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 178820 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 178821 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 178822 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 178823 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 178824 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 178825 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 178826 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 178827 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 178828 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 178829 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 178830 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 178831 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 178832 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 178833 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 178834 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 178835 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 178836 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 178837 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178838 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178839 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 178840 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 178841 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 178842 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 178843 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 178844 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 178845 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178846 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178847 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178848 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178849 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178850 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178851 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178852 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178853 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 178854 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 178855 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 178856 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 178857 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 178858 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 178859 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 178860 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 178861 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 178862 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 178863 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 178864 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 178865 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 178866 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 178867 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 178868 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 178869 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 178870 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 178871 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 178872 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 178873 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 178874 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 178875 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 178876 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 178877 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 178878 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 178879 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 178880 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 178881 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 178882 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 178883 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 178884 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 178885 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 178886 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 178887 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 178888 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 178889 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 178890 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 178891 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 178892 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 178893 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 178894 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 178895 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 178896 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 178897 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 178898 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 178899 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 178900 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 178901 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 178902 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 178903 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 178904 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 178905 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 178906 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 178907 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178908 | 83, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 178909 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178910 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 178911 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 178912 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178913 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178914 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 178915 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 178916 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 178917 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 178918 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 178919 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 178920 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 178921 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 178922 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 178923 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 178924 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 178925 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 178926 | }, |
| 178927 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 178928 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 178929 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 178930 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 178931 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 178932 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 178933 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 178934 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 178935 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 178936 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 178937 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 178938 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 178939 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 178940 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 178941 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 178942 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 178943 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 178944 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 178945 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 178946 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 178947 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 178948 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 178949 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 178950 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 178951 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 178952 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 178953 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 178954 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 178955 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 178956 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 178957 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 178958 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 178959 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 178960 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 178961 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 178962 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 178963 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 178964 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 178965 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 178966 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 178967 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 178968 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 178969 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 178970 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 178971 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 178972 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 178973 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 178974 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 178975 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 178976 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 178977 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 178978 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 178979 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 178980 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 178981 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 178982 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 178983 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 178984 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 178985 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 178986 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 178987 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 178988 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 178989 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 178990 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 178991 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 178992 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 178993 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 178994 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 178995 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 178996 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 178997 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 178998 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 178999 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 179000 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 179001 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 179002 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 179003 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 179004 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 179005 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 179006 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 179007 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 179008 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 179009 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 179010 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 179011 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 179012 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 179013 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 179014 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 179015 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 179016 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 179017 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 179018 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 179019 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 179020 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179021 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179022 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179023 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179024 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179025 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179026 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179027 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179028 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179029 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179030 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179031 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179032 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179033 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179034 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 179035 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 179036 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 179037 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 179038 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 179039 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 179040 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179041 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 179042 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179043 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 179044 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 179045 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179046 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 179047 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 179048 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179049 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 179050 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179051 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 179052 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179053 | 83, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 179054 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179055 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179056 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179057 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179058 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179059 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179060 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179061 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 179062 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179063 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 179064 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 179065 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179066 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 179067 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179068 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 179069 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 179070 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 179071 | }, |
| 179072 | { // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 179073 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:bsub |
| 179074 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:bsub_hi |
| 179075 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub |
| 179076 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub0 |
| 179077 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1 |
| 179078 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2 |
| 179079 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3 |
| 179080 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub_hi |
| 179081 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:hsub |
| 179082 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:hsub_hi |
| 179083 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:psub |
| 179084 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:psub0 |
| 179085 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:psub1 |
| 179086 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub0 |
| 179087 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub1 |
| 179088 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub2 |
| 179089 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub3 |
| 179090 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:ssub |
| 179091 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:ssub_hi |
| 179092 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sub_32 -> GPR32common |
| 179093 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sub_32_hi |
| 179094 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sube32 |
| 179095 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sube64 |
| 179096 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:subo32 |
| 179097 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:subo64 |
| 179098 | 62, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_0 -> tcGPR64 |
| 179099 | 63, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_1 -> tcGPRnotx16 |
| 179100 | 64, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_2 -> tcGPRnotx16x17 |
| 179101 | 61, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_3 -> GPR64common_and_GPR64noip |
| 179102 | 59, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_4 -> GPR64common |
| 179103 | 59, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_5 -> GPR64common |
| 179104 | 59, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_6 -> GPR64common |
| 179105 | 59, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_7 -> GPR64common |
| 179106 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubb |
| 179107 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubd0 |
| 179108 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubd1 |
| 179109 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh0 |
| 179110 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1 |
| 179111 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubq0 |
| 179112 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubq1 |
| 179113 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs0 |
| 179114 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1 |
| 179115 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub |
| 179116 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub0 |
| 179117 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub1 |
| 179118 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub2 |
| 179119 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub3 |
| 179120 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub_hi |
| 179121 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubd1_then_zasubq0 |
| 179122 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubd1_then_zasubq1 |
| 179123 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubd0 |
| 179124 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubd1 |
| 179125 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubq0 |
| 179126 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubq1 |
| 179127 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 179128 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 179129 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubd0 |
| 179130 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubd1 |
| 179131 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubq0 |
| 179132 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubq1 |
| 179133 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs0 |
| 179134 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1 |
| 179135 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 179136 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 179137 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 179138 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 179139 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 179140 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 179141 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179142 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179143 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_bsub |
| 179144 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_bsub_hi |
| 179145 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_hsub |
| 179146 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_hsub_hi |
| 179147 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_ssub |
| 179148 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_then_ssub_hi |
| 179149 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_bsub |
| 179150 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_bsub_hi |
| 179151 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_hsub |
| 179152 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_hsub_hi |
| 179153 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_ssub |
| 179154 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub3_then_ssub_hi |
| 179155 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_bsub |
| 179156 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_bsub_hi |
| 179157 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_hsub |
| 179158 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_hsub_hi |
| 179159 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_ssub |
| 179160 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_then_ssub_hi |
| 179161 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:psub1_then_psub |
| 179162 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub1_then_dsub_hi |
| 179163 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub3_then_dsub_hi |
| 179164 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub2_then_dsub_hi |
| 179165 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_7_then_sub_32 -> GPR32common |
| 179166 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 179167 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_6_then_sub_32 -> GPR32common |
| 179168 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 179169 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_5_then_sub_32 -> GPR32common |
| 179170 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 179171 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_4_then_sub_32 -> GPR32common |
| 179172 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 179173 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_3_then_sub_32 -> GPR32common |
| 179174 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 179175 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_2_then_sub_32 -> GPR32common |
| 179176 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 179177 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_1_then_sub_32 -> GPR32common |
| 179178 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 179179 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:subo64_then_sub_32 |
| 179180 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:subo64_then_sub_32_hi |
| 179181 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub1_then_zsub_hi |
| 179182 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub3_then_zsub_hi |
| 179183 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub2_then_zsub_hi |
| 179184 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub0_dsub1 |
| 179185 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub0_dsub1_dsub2 |
| 179186 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_dsub2 |
| 179187 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub1_dsub2_dsub3 |
| 179188 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub2_dsub3 |
| 179189 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub_dsub1 |
| 179190 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 179191 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:dsub_dsub1_dsub2 |
| 179192 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub0_qsub1 |
| 179193 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub0_qsub1_qsub2 |
| 179194 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub1_qsub2 |
| 179195 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub1_qsub2_qsub3 |
| 179196 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:qsub2_qsub3 |
| 179197 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179198 | 85, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 179199 | 84, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 179200 | 80, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179201 | 80, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179202 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179203 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179204 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179205 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:sub_32_subo64_then_sub_32 |
| 179206 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub_qsub1 |
| 179207 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 179208 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub_qsub1_qsub2 |
| 179209 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub0_zsub1 |
| 179210 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub0_zsub1_zsub2 |
| 179211 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub1_zsub2 |
| 179212 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub1_zsub2_zsub3 |
| 179213 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub2_zsub3 |
| 179214 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub0_zsub2 |
| 179215 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16:zsub1_zsub3 |
| 179216 | }, |
| 179217 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 179218 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 179219 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 179220 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 179221 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 179222 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 179223 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 179224 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 179225 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 179226 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 179227 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 179228 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 179229 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 179230 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 179231 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 179232 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 179233 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 179234 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 179235 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 179236 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 179237 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 179238 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 179239 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 179240 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 179241 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 179242 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 179243 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 179244 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 179245 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 179246 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 179247 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 179248 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 179249 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 179250 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 179251 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 179252 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 179253 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 179254 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 179255 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 179256 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 179257 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 179258 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 179259 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 179260 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 179261 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 179262 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 179263 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 179264 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 179265 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 179266 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 179267 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 179268 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 179269 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 179270 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 179271 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 179272 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179273 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179274 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 179275 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 179276 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 179277 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 179278 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 179279 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 179280 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 179281 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 179282 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 179283 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 179284 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 179285 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 179286 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179287 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179288 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 179289 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 179290 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 179291 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 179292 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 179293 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 179294 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 179295 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 179296 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 179297 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 179298 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 179299 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 179300 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 179301 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 179302 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 179303 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 179304 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 179305 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 179306 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 179307 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 179308 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 179309 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 179310 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179311 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179312 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179313 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179314 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179315 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179316 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179317 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179318 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179319 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179320 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179321 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179322 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179323 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179324 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 179325 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 179326 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 179327 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 179328 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 179329 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 179330 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179331 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 179332 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179333 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 179334 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 179335 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179336 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 179337 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 179338 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179339 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 179340 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179341 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 179342 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179343 | 83, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 179344 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179345 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179346 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179347 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179348 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179349 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179350 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179351 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 179352 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179353 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 179354 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 179355 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179356 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 179357 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179358 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 179359 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 179360 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 179361 | }, |
| 179362 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 179363 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 179364 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 179365 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 179366 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 179367 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 179368 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 179369 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 179370 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 179371 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 179372 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 179373 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 179374 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 179375 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 179376 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 179377 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 179378 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 179379 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 179380 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 179381 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 179382 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 179383 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 179384 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 179385 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 179386 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 179387 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 179388 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip |
| 179389 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 179390 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 179391 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 179392 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 179393 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 179394 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 179395 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 179396 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 179397 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 179398 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 179399 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 179400 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 179401 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 179402 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 179403 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 179404 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 179405 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 179406 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 179407 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 179408 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 179409 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 179410 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 179411 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 179412 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 179413 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 179414 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 179415 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 179416 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 179417 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179418 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179419 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 179420 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 179421 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 179422 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 179423 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 179424 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 179425 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 179426 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 179427 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 179428 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 179429 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 179430 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 179431 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179432 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179433 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 179434 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 179435 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 179436 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 179437 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 179438 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 179439 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 179440 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 179441 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 179442 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 179443 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 179444 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 179445 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 179446 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 179447 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 179448 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 179449 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 179450 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 179451 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 179452 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 179453 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 179454 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 179455 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179456 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179457 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179458 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179459 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179460 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179461 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179462 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179463 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179464 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179465 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179466 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179467 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179468 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179469 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 179470 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 179471 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 179472 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 179473 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 179474 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 179475 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179476 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 179477 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179478 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 179479 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 179480 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179481 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 179482 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 179483 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179484 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 179485 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179486 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 179487 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179488 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179489 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179490 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179491 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179492 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179493 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179494 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179495 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179496 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 179497 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179498 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 179499 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 179500 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179501 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 179502 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179503 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 179504 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 179505 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 179506 | }, |
| 179507 | { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 179508 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 179509 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 179510 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 179511 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 179512 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 179513 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 179514 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 179515 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 179516 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 179517 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 179518 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 179519 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 179520 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 179521 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 179522 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 179523 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 179524 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 179525 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 179526 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 179527 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 179528 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 179529 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 179530 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 179531 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 179532 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 179533 | 64, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 179534 | 64, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16x17 |
| 179535 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 |
| 179536 | 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> tcGPRnotx16 |
| 179537 | 62, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> tcGPR64 |
| 179538 | 59, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 179539 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 179540 | 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 179541 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 179542 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 179543 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 179544 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 179545 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 179546 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 179547 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 179548 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 179549 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 179550 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 179551 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 179552 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 179553 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 179554 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 179555 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 179556 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 179557 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 179558 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 179559 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 179560 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 179561 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 179562 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179563 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179564 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 179565 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 179566 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 179567 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 179568 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 179569 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 179570 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 179571 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 179572 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 179573 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 179574 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 179575 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 179576 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179577 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179578 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 179579 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 179580 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 179581 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 179582 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 179583 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 179584 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 179585 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 179586 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 179587 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 179588 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 179589 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 179590 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 179591 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 179592 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 179593 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 179594 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 179595 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 179596 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 179597 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 179598 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 179599 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 179600 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179601 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179602 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179603 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179604 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179605 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179606 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179607 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179608 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179609 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179610 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179611 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179612 | 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179613 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179614 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 179615 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 179616 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 179617 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 179618 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 179619 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 179620 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179621 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 179622 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179623 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 179624 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 179625 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179626 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 179627 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 179628 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179629 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 179630 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179631 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 179632 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179633 | 86, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 179634 | 85, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 179635 | 83, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 179636 | 82, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179637 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179638 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179639 | 51, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179640 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179641 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 179642 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179643 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 179644 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 179645 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179646 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 179647 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179648 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 179649 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 179650 | 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 179651 | }, |
| 179652 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 179653 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 179654 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 179655 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 179656 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 179657 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 179658 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 179659 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 179660 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 179661 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 179662 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 179663 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 179664 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 179665 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 179666 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 179667 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 179668 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 179669 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 179670 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 179671 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 179672 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 179673 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 179674 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 179675 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 179676 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 179677 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 179678 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 179679 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 179680 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 179681 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 179682 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 179683 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 179684 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 179685 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 179686 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 179687 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 179688 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 179689 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 179690 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 179691 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 179692 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 179693 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 179694 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 179695 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 179696 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 179697 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 179698 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 179699 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 179700 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 179701 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 179702 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 179703 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 179704 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 179705 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 179706 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 179707 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179708 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179709 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 179710 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 179711 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 179712 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 179713 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 179714 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 179715 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 179716 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 179717 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 179718 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 179719 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 179720 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 179721 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179722 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179723 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 179724 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 179725 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 179726 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 179727 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 179728 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 179729 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 179730 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 179731 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 179732 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 179733 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 179734 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 179735 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 179736 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 179737 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 179738 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 179739 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 179740 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 179741 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 179742 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 179743 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 179744 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 179745 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179746 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179747 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179748 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179749 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179750 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179751 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179752 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179753 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179754 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179755 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179756 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179757 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179758 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179759 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 179760 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 179761 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 179762 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 179763 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 179764 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 179765 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179766 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 179767 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179768 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 179769 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 179770 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179771 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 179772 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 179773 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179774 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 179775 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179776 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 179777 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179778 | 84, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 179779 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179780 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179781 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179782 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179783 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179784 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179785 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179786 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 179787 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179788 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 179789 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 179790 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179791 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 179792 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179793 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 179794 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 179795 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 179796 | }, |
| 179797 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 179798 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 179799 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 179800 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 179801 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 179802 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 179803 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 179804 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 179805 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 179806 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 179807 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 179808 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 179809 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 179810 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 179811 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 179812 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 179813 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 179814 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 179815 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 179816 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 179817 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 179818 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 179819 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 179820 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 179821 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 179822 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 179823 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 179824 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 179825 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 179826 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 179827 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 179828 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 179829 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 179830 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 179831 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 179832 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 179833 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 179834 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 179835 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 179836 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 179837 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 179838 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 179839 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 179840 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 179841 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 179842 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 179843 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 179844 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 179845 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 179846 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 179847 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 179848 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 179849 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 179850 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 179851 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 179852 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179853 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179854 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 179855 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 179856 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 179857 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 179858 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 179859 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 179860 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 179861 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 179862 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 179863 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 179864 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 179865 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 179866 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 179867 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 179868 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 179869 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 179870 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 179871 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 179872 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 179873 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 179874 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 179875 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 179876 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 179877 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 179878 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 179879 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 179880 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 179881 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 179882 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 179883 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 179884 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 179885 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 179886 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 179887 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 179888 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 179889 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 179890 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 179891 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 179892 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 179893 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 179894 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 179895 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 179896 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 179897 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 179898 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 179899 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 179900 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 179901 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 179902 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 179903 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 179904 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 179905 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 179906 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 179907 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 179908 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 179909 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 179910 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 179911 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 179912 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 179913 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 179914 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 179915 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 179916 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 179917 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 179918 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 179919 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 179920 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 179921 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 179922 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179923 | 84, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 179924 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179925 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 179926 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 179927 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179928 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179929 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 179930 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 179931 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 179932 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 179933 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 179934 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 179935 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 179936 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 179937 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 179938 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 179939 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 179940 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 179941 | }, |
| 179942 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 179943 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub |
| 179944 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub_hi |
| 179945 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub |
| 179946 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 |
| 179947 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 |
| 179948 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 |
| 179949 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 |
| 179950 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_hi |
| 179951 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub |
| 179952 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub_hi |
| 179953 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub |
| 179954 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 |
| 179955 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 |
| 179956 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 |
| 179957 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 |
| 179958 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 |
| 179959 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 |
| 179960 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub |
| 179961 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub_hi |
| 179962 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common |
| 179963 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_hi |
| 179964 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 |
| 179965 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 |
| 179966 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 |
| 179967 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 |
| 179968 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 179969 | 63, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 179970 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> tcGPRnotx16x17 |
| 179971 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 179972 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 179973 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 179974 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common |
| 179975 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common |
| 179976 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb |
| 179977 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 |
| 179978 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 |
| 179979 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 |
| 179980 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 |
| 179981 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 |
| 179982 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 |
| 179983 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 |
| 179984 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 |
| 179985 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub |
| 179986 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 |
| 179987 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 |
| 179988 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 |
| 179989 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 |
| 179990 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi |
| 179991 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 |
| 179992 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 |
| 179993 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 |
| 179994 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 |
| 179995 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 |
| 179996 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 |
| 179997 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 179998 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 179999 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 |
| 180000 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 |
| 180001 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 |
| 180002 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 |
| 180003 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 |
| 180004 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 |
| 180005 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 180006 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 180007 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 180008 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 180009 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 180010 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 180011 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180012 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180013 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub |
| 180014 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub_hi |
| 180015 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub |
| 180016 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub_hi |
| 180017 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub |
| 180018 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub_hi |
| 180019 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub |
| 180020 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub_hi |
| 180021 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub |
| 180022 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub_hi |
| 180023 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub |
| 180024 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub_hi |
| 180025 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub |
| 180026 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub_hi |
| 180027 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub |
| 180028 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub_hi |
| 180029 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub |
| 180030 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub_hi |
| 180031 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1_then_psub |
| 180032 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_hi |
| 180033 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub_hi |
| 180034 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_hi |
| 180035 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 180036 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 180037 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 180038 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 180039 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 180040 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 180041 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 180042 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 180043 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 180044 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 180045 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 180046 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 180047 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 180048 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 180049 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 |
| 180050 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32_hi |
| 180051 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi |
| 180052 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi |
| 180053 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi |
| 180054 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 |
| 180055 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 |
| 180056 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 |
| 180057 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 |
| 180058 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 |
| 180059 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1 |
| 180060 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 180061 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_dsub1_dsub2 |
| 180062 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 |
| 180063 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 |
| 180064 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 |
| 180065 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 |
| 180066 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 |
| 180067 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180068 | 85, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 180069 | 84, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 180070 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180071 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 180072 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180073 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180074 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180075 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 180076 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1 |
| 180077 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 180078 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_qsub1_qsub2 |
| 180079 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 |
| 180080 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 |
| 180081 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 |
| 180082 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 |
| 180083 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 |
| 180084 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 |
| 180085 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 |
| 180086 | }, |
| 180087 | { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 180088 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 180089 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 180090 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 180091 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 180092 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 180093 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 180094 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 180095 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 180096 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 180097 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 180098 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 180099 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 180100 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 180101 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 180102 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 180103 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 180104 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 180105 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 180106 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 180107 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 180108 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 180109 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 180110 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 180111 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 180112 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 180113 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 180114 | 63, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 180115 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPRnotx16x17 |
| 180116 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 180117 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common |
| 180118 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common |
| 180119 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 180120 | 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 180121 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 180122 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 180123 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 180124 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 180125 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 180126 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 180127 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 180128 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 180129 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 180130 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 180131 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 180132 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 180133 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 180134 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 180135 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 180136 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 180137 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 180138 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 180139 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 180140 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 180141 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 180142 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 180143 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 180144 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 180145 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 180146 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 180147 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 180148 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 180149 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 180150 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 180151 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 180152 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 180153 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 180154 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 180155 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 180156 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180157 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180158 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 180159 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 180160 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 180161 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 180162 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 180163 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 180164 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 180165 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 180166 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 180167 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 180168 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 180169 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 180170 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 180171 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 180172 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 180173 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 180174 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 180175 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 180176 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 180177 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 180178 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 180179 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 180180 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 180181 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 180182 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 180183 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 180184 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 180185 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 180186 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 180187 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 180188 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 180189 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 180190 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 180191 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 180192 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 180193 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 180194 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 180195 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 180196 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 180197 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 180198 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 180199 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 180200 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 180201 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 180202 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 180203 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 180204 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 180205 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 180206 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 180207 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 180208 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 180209 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 180210 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 180211 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 180212 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180213 | 85, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 180214 | 84, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 180215 | 80, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 180216 | 82, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180217 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180218 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180219 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180220 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 180221 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 180222 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 180223 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 180224 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 180225 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 180226 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 180227 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 180228 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 180229 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 180230 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 180231 | }, |
| 180232 | { // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 180233 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:bsub |
| 180234 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:bsub_hi |
| 180235 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub |
| 180236 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub0 |
| 180237 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1 |
| 180238 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2 |
| 180239 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3 |
| 180240 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub_hi |
| 180241 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:hsub |
| 180242 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:hsub_hi |
| 180243 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:psub |
| 180244 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:psub0 |
| 180245 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:psub1 |
| 180246 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub0 |
| 180247 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub1 |
| 180248 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub2 |
| 180249 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub3 |
| 180250 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:ssub |
| 180251 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:ssub_hi |
| 180252 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sub_32 -> GPR32common |
| 180253 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sub_32_hi |
| 180254 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sube32 |
| 180255 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sube64 |
| 180256 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:subo32 |
| 180257 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:subo64 |
| 180258 | 64, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_0 -> tcGPRnotx16x17 |
| 180259 | 64, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_1 -> tcGPRnotx16x17 |
| 180260 | 64, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_2 -> tcGPRnotx16x17 |
| 180261 | 64, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_3 -> tcGPRnotx16x17 |
| 180262 | 62, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_4 -> tcGPR64 |
| 180263 | 63, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_5 -> tcGPRnotx16 |
| 180264 | 62, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_6 -> tcGPR64 |
| 180265 | 59, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_7 -> GPR64common |
| 180266 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubb |
| 180267 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubd0 |
| 180268 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubd1 |
| 180269 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh0 |
| 180270 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1 |
| 180271 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubq0 |
| 180272 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubq1 |
| 180273 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs0 |
| 180274 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1 |
| 180275 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub |
| 180276 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub0 |
| 180277 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub1 |
| 180278 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub2 |
| 180279 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub3 |
| 180280 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub_hi |
| 180281 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 180282 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 180283 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 180284 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 180285 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 180286 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 180287 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 180288 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 180289 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 180290 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 180291 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 180292 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 180293 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 180294 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 180295 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 180296 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 180297 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 180298 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 180299 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 180300 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 180301 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180302 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180303 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_bsub |
| 180304 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_bsub_hi |
| 180305 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_hsub |
| 180306 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_hsub_hi |
| 180307 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_ssub |
| 180308 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_then_ssub_hi |
| 180309 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_bsub |
| 180310 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_bsub_hi |
| 180311 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_hsub |
| 180312 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_hsub_hi |
| 180313 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_ssub |
| 180314 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub3_then_ssub_hi |
| 180315 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_bsub |
| 180316 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_bsub_hi |
| 180317 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_hsub |
| 180318 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_hsub_hi |
| 180319 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_ssub |
| 180320 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_then_ssub_hi |
| 180321 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:psub1_then_psub |
| 180322 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub1_then_dsub_hi |
| 180323 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub3_then_dsub_hi |
| 180324 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub2_then_dsub_hi |
| 180325 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 180326 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 180327 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 180328 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 180329 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 180330 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 180331 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 180332 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 180333 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 180334 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 180335 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 180336 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 180337 | 43, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_1_then_sub_32 -> GPR32common |
| 180338 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 180339 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:subo64_then_sub_32 |
| 180340 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:subo64_then_sub_32_hi |
| 180341 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub1_then_zsub_hi |
| 180342 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub3_then_zsub_hi |
| 180343 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub2_then_zsub_hi |
| 180344 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub0_dsub1 |
| 180345 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 180346 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_dsub2 |
| 180347 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 180348 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub2_dsub3 |
| 180349 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub_dsub1 |
| 180350 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 180351 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 180352 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub0_qsub1 |
| 180353 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 180354 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub1_qsub2 |
| 180355 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 180356 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:qsub2_qsub3 |
| 180357 | 51, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180358 | 86, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 180359 | 86, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 180360 | 85, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 180361 | 83, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 180362 | 51, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180363 | 51, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180364 | 51, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180365 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:sub_32_subo64_then_sub_32 |
| 180366 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub_qsub1 |
| 180367 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 180368 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 180369 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub0_zsub1 |
| 180370 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 180371 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub1_zsub2 |
| 180372 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 180373 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub2_zsub3 |
| 180374 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub0_zsub2 |
| 180375 | 0, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17:zsub1_zsub3 |
| 180376 | }, |
| 180377 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 180378 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 180379 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 180380 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 180381 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 180382 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 180383 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 180384 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 180385 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 180386 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 180387 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 180388 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 180389 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 180390 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 180391 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 180392 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 180393 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 180394 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 180395 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 180396 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 180397 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 180398 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 180399 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 180400 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 180401 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 180402 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 180403 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 180404 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 180405 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common |
| 180406 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 180407 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 180408 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 180409 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 180410 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 180411 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 180412 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 180413 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 180414 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 180415 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 180416 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 180417 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 180418 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 180419 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 180420 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 180421 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 180422 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 180423 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 180424 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 180425 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 180426 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 180427 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 180428 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 180429 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 180430 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 180431 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 180432 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 180433 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 180434 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 180435 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 180436 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 180437 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 180438 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 180439 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 180440 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 180441 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 180442 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 180443 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 180444 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 180445 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 180446 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180447 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180448 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 180449 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 180450 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 180451 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 180452 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 180453 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 180454 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 180455 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 180456 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 180457 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 180458 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 180459 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 180460 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 180461 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 180462 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 180463 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 180464 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 180465 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 180466 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 180467 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 180468 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 180469 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 180470 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 180471 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 180472 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 180473 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 180474 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 180475 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 180476 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 180477 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 180478 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 180479 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 180480 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 180481 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 180482 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 180483 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 180484 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 180485 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 180486 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 180487 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 180488 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 180489 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 180490 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 180491 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 180492 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 180493 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 180494 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 180495 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 180496 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 180497 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 180498 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 180499 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 180500 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 180501 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 180502 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180503 | 84, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 180504 | 80, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 180505 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180506 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180507 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180508 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180509 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180510 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 180511 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 180512 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 180513 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 180514 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 180515 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 180516 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 180517 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 180518 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 180519 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 180520 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 180521 | }, |
| 180522 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 180523 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 180524 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 180525 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 180526 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 180527 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 180528 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 180529 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 180530 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 180531 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 180532 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 180533 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 180534 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 180535 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 180536 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 180537 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 180538 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 180539 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 180540 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 180541 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 180542 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 180543 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 180544 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 180545 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 180546 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 180547 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 180548 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 180549 | 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 180550 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 |
| 180551 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common |
| 180552 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 180553 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 180554 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 180555 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 180556 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 180557 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 180558 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 180559 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 180560 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 180561 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 180562 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 180563 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 180564 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 180565 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 180566 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 180567 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 180568 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 180569 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 180570 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 180571 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 180572 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 180573 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 180574 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 180575 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 180576 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 180577 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 180578 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 180579 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 180580 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 180581 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 180582 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 180583 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 180584 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 180585 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 180586 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 180587 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 180588 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 180589 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 180590 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 180591 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180592 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180593 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 180594 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 180595 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 180596 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 180597 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 180598 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 180599 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 180600 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 180601 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 180602 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 180603 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 180604 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 180605 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 180606 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 180607 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 180608 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 180609 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 180610 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 180611 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 180612 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 180613 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 180614 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 180615 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 180616 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 180617 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 180618 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 180619 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 180620 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 180621 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 180622 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 180623 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 180624 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 180625 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 180626 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 180627 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 180628 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 180629 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 180630 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 180631 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 180632 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 180633 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 180634 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 180635 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 180636 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 180637 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 180638 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 180639 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 180640 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 180641 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 180642 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 180643 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 180644 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 180645 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 180646 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 180647 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180648 | 85, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 180649 | 83, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 180650 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180651 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180652 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180653 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180654 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180655 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 180656 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 180657 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 180658 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 180659 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 180660 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 180661 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 180662 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 180663 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 180664 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 180665 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 180666 | }, |
| 180667 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 180668 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 180669 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 180670 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 180671 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 180672 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 180673 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 180674 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 180675 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 180676 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 180677 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 180678 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 180679 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 180680 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 180681 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 180682 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 180683 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 180684 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 180685 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 180686 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 180687 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 180688 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 180689 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 180690 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 180691 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 180692 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 180693 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 180694 | 59, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common |
| 180695 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 180696 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 180697 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 180698 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 180699 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 180700 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 180701 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 180702 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 180703 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 180704 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 180705 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 180706 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 180707 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 180708 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 180709 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 180710 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 180711 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 180712 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 180713 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 180714 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 180715 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 180716 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 180717 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 180718 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 180719 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 180720 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 180721 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 180722 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 180723 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 180724 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 180725 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 180726 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 180727 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 180728 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 180729 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 180730 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 180731 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 180732 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 180733 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 180734 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 180735 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 180736 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180737 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180738 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 180739 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 180740 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 180741 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 180742 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 180743 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 180744 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 180745 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 180746 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 180747 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 180748 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 180749 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 180750 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 180751 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 180752 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 180753 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 180754 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 180755 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 180756 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 180757 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 180758 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 180759 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 180760 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 180761 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 180762 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 180763 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 180764 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 180765 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 180766 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 180767 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 180768 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 180769 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 180770 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 180771 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 180772 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 180773 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 180774 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 180775 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 180776 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 180777 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 180778 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 180779 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 180780 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 180781 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 180782 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 180783 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 180784 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 180785 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 180786 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 180787 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 180788 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 180789 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 180790 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 180791 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 180792 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180793 | 83, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 180794 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180795 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180796 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 180797 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180798 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180799 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180800 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 180801 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 180802 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 180803 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 180804 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 180805 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 180806 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 180807 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 180808 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 180809 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 180810 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 180811 | }, |
| 180812 | { // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 180813 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:bsub |
| 180814 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:bsub_hi |
| 180815 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub |
| 180816 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub0 |
| 180817 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1 |
| 180818 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2 |
| 180819 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3 |
| 180820 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub_hi |
| 180821 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:hsub |
| 180822 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:hsub_hi |
| 180823 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:psub |
| 180824 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:psub0 |
| 180825 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:psub1 |
| 180826 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub0 |
| 180827 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub1 |
| 180828 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub2 |
| 180829 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub3 |
| 180830 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:ssub |
| 180831 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:ssub_hi |
| 180832 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sub_32 -> GPR32common |
| 180833 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sub_32_hi |
| 180834 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sube32 |
| 180835 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sube64 |
| 180836 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:subo32 |
| 180837 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:subo64 |
| 180838 | 64, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_0 -> tcGPRnotx16x17 |
| 180839 | 64, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_1 -> tcGPRnotx16x17 |
| 180840 | 62, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_2 -> tcGPR64 |
| 180841 | 63, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_3 -> tcGPRnotx16 |
| 180842 | 64, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_4 -> tcGPRnotx16x17 |
| 180843 | 61, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_5 -> GPR64common_and_GPR64noip |
| 180844 | 59, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_6 -> GPR64common |
| 180845 | 59, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_7 -> GPR64common |
| 180846 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubb |
| 180847 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubd0 |
| 180848 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubd1 |
| 180849 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh0 |
| 180850 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1 |
| 180851 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubq0 |
| 180852 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubq1 |
| 180853 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs0 |
| 180854 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1 |
| 180855 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub |
| 180856 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub0 |
| 180857 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub1 |
| 180858 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub2 |
| 180859 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub3 |
| 180860 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub_hi |
| 180861 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubd1_then_zasubq0 |
| 180862 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubd1_then_zasubq1 |
| 180863 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubd0 |
| 180864 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubd1 |
| 180865 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubq0 |
| 180866 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubq1 |
| 180867 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 180868 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 180869 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubd0 |
| 180870 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubd1 |
| 180871 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubq0 |
| 180872 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubq1 |
| 180873 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs0 |
| 180874 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1 |
| 180875 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 180876 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 180877 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 180878 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 180879 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 180880 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 180881 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 180882 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 180883 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_bsub |
| 180884 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_bsub_hi |
| 180885 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_hsub |
| 180886 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_hsub_hi |
| 180887 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_ssub |
| 180888 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_then_ssub_hi |
| 180889 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_bsub |
| 180890 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_bsub_hi |
| 180891 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_hsub |
| 180892 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_hsub_hi |
| 180893 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_ssub |
| 180894 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub3_then_ssub_hi |
| 180895 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_bsub |
| 180896 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_bsub_hi |
| 180897 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_hsub |
| 180898 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_hsub_hi |
| 180899 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_ssub |
| 180900 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_then_ssub_hi |
| 180901 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:psub1_then_psub |
| 180902 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub1_then_dsub_hi |
| 180903 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub3_then_dsub_hi |
| 180904 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub2_then_dsub_hi |
| 180905 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_7_then_sub_32 -> GPR32common |
| 180906 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 180907 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_6_then_sub_32 -> GPR32common |
| 180908 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 180909 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_5_then_sub_32 -> GPR32common |
| 180910 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 180911 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_4_then_sub_32 -> GPR32common |
| 180912 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 180913 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_3_then_sub_32 -> GPR32common |
| 180914 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 180915 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_2_then_sub_32 -> GPR32common |
| 180916 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 180917 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_1_then_sub_32 -> GPR32common |
| 180918 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 180919 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:subo64_then_sub_32 |
| 180920 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:subo64_then_sub_32_hi |
| 180921 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub1_then_zsub_hi |
| 180922 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub3_then_zsub_hi |
| 180923 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub2_then_zsub_hi |
| 180924 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub0_dsub1 |
| 180925 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub0_dsub1_dsub2 |
| 180926 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_dsub2 |
| 180927 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub1_dsub2_dsub3 |
| 180928 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub2_dsub3 |
| 180929 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub_dsub1 |
| 180930 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 180931 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:dsub_dsub1_dsub2 |
| 180932 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub0_qsub1 |
| 180933 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub0_qsub1_qsub2 |
| 180934 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub1_qsub2 |
| 180935 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub1_qsub2_qsub3 |
| 180936 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:qsub2_qsub3 |
| 180937 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180938 | 86, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 180939 | 85, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 180940 | 84, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 180941 | 80, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common |
| 180942 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180943 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180944 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 180945 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:sub_32_subo64_then_sub_32 |
| 180946 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub_qsub1 |
| 180947 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 180948 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub_qsub1_qsub2 |
| 180949 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub0_zsub1 |
| 180950 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub0_zsub1_zsub2 |
| 180951 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub1_zsub2 |
| 180952 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub1_zsub2_zsub3 |
| 180953 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub2_zsub3 |
| 180954 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub0_zsub2 |
| 180955 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16:zsub1_zsub3 |
| 180956 | }, |
| 180957 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 180958 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 180959 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 180960 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 180961 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 180962 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 180963 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 180964 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 180965 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 180966 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 180967 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 180968 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 180969 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 180970 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 180971 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 180972 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 180973 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 180974 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 180975 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 180976 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 180977 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 180978 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 180979 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 180980 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 180981 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 180982 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 180983 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 180984 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16x17 |
| 180985 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 |
| 180986 | 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> tcGPRnotx16 |
| 180987 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> tcGPRnotx16x17 |
| 180988 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 180989 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 180990 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 180991 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 180992 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 180993 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 180994 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 180995 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 180996 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 180997 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 180998 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 180999 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 181000 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 181001 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 181002 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 181003 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 181004 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 181005 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 181006 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 181007 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 181008 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 181009 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 181010 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 181011 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 181012 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 181013 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 181014 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 181015 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 181016 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 181017 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 181018 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 181019 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 181020 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 181021 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 181022 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 181023 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 181024 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 181025 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 181026 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181027 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181028 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 181029 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 181030 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 181031 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 181032 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 181033 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 181034 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 181035 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 181036 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 181037 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 181038 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 181039 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 181040 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 181041 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 181042 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 181043 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 181044 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 181045 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 181046 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 181047 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 181048 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 181049 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 181050 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 181051 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 181052 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 181053 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 181054 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 181055 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 181056 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 181057 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 181058 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 181059 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 181060 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 181061 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 181062 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 181063 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 181064 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 181065 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 181066 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 181067 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 181068 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 181069 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 181070 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 181071 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 181072 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 181073 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 181074 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 181075 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 181076 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 181077 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 181078 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 181079 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 181080 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 181081 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 181082 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181083 | 86, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181084 | 85, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 181085 | 84, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 181086 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181087 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181088 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181089 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181090 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 181091 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 181092 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 181093 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 181094 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 181095 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 181096 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 181097 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 181098 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 181099 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 181100 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 181101 | }, |
| 181102 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 181103 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 181104 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 181105 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 181106 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 181107 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 181108 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 181109 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 181110 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 181111 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 181112 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 181113 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 181114 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 181115 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 181116 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 181117 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 181118 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 181119 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 181120 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 181121 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 181122 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 181123 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 181124 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 181125 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 181126 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 181127 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 181128 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPRnotx16x17 |
| 181129 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip |
| 181130 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip |
| 181131 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 181132 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 181133 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 181134 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 181135 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 181136 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 181137 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 181138 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 181139 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 181140 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 181141 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 181142 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 181143 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 181144 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 181145 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 181146 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 181147 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 181148 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 181149 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 181150 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 181151 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 181152 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 181153 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 181154 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 181155 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 181156 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 181157 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 181158 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 181159 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 181160 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 181161 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 181162 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 181163 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 181164 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 181165 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 181166 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 181167 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 181168 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 181169 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 181170 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 181171 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181172 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181173 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 181174 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 181175 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 181176 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 181177 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 181178 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 181179 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 181180 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 181181 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 181182 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 181183 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 181184 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 181185 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 181186 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 181187 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 181188 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 181189 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 181190 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 181191 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 181192 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 181193 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 181194 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 181195 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 181196 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 181197 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 181198 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 181199 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 181200 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 181201 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 181202 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 181203 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 181204 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 181205 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 181206 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 181207 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 181208 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 181209 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 181210 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 181211 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 181212 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 181213 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 181214 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 181215 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 181216 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 181217 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 181218 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 181219 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 181220 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 181221 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 181222 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 181223 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 181224 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 181225 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 181226 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 181227 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181228 | 84, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 181229 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181230 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181231 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181232 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181233 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181234 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181235 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 181236 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 181237 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 181238 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 181239 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 181240 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 181241 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 181242 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 181243 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 181244 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 181245 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 181246 | }, |
| 181247 | { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 181248 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub |
| 181249 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub_hi |
| 181250 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub |
| 181251 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 |
| 181252 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 |
| 181253 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 |
| 181254 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 |
| 181255 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_hi |
| 181256 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub |
| 181257 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub_hi |
| 181258 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub |
| 181259 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 |
| 181260 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 |
| 181261 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 |
| 181262 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 |
| 181263 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 |
| 181264 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 |
| 181265 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub |
| 181266 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub_hi |
| 181267 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common |
| 181268 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_hi |
| 181269 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 |
| 181270 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 |
| 181271 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 |
| 181272 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 |
| 181273 | 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 |
| 181274 | 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPRnotx16 |
| 181275 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPRnotx16x17 |
| 181276 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip |
| 181277 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip |
| 181278 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip |
| 181279 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip |
| 181280 | 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip |
| 181281 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb |
| 181282 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 |
| 181283 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 |
| 181284 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 |
| 181285 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 |
| 181286 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 |
| 181287 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 |
| 181288 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 |
| 181289 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 |
| 181290 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub |
| 181291 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 |
| 181292 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 |
| 181293 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 |
| 181294 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 |
| 181295 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi |
| 181296 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 |
| 181297 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 |
| 181298 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 |
| 181299 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 |
| 181300 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 |
| 181301 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 |
| 181302 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 |
| 181303 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 |
| 181304 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 |
| 181305 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 |
| 181306 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 |
| 181307 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 |
| 181308 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 |
| 181309 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 |
| 181310 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 |
| 181311 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 |
| 181312 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 |
| 181313 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 |
| 181314 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 |
| 181315 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 |
| 181316 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181317 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181318 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub |
| 181319 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub_hi |
| 181320 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub |
| 181321 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub_hi |
| 181322 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub |
| 181323 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub_hi |
| 181324 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub |
| 181325 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub_hi |
| 181326 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub |
| 181327 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub_hi |
| 181328 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub |
| 181329 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub_hi |
| 181330 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub |
| 181331 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub_hi |
| 181332 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub |
| 181333 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub_hi |
| 181334 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub |
| 181335 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub_hi |
| 181336 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1_then_psub |
| 181337 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_hi |
| 181338 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub_hi |
| 181339 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_hi |
| 181340 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common |
| 181341 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32_hi |
| 181342 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common |
| 181343 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_hi |
| 181344 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common |
| 181345 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32_hi |
| 181346 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common |
| 181347 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_hi |
| 181348 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common |
| 181349 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32_hi |
| 181350 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common |
| 181351 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_hi |
| 181352 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common |
| 181353 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32_hi |
| 181354 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 |
| 181355 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32_hi |
| 181356 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi |
| 181357 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi |
| 181358 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi |
| 181359 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 |
| 181360 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 |
| 181361 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 |
| 181362 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 |
| 181363 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 |
| 181364 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1 |
| 181365 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2_dsub3 |
| 181366 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_dsub1_dsub2 |
| 181367 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 |
| 181368 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 |
| 181369 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 |
| 181370 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 |
| 181371 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 |
| 181372 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181373 | 85, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 181374 | 84, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 181375 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181376 | 82, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 181377 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181378 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181379 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181380 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 |
| 181381 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1 |
| 181382 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2_qsub3 |
| 181383 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_qsub1_qsub2 |
| 181384 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 |
| 181385 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 |
| 181386 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 |
| 181387 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 |
| 181388 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 |
| 181389 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 |
| 181390 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 |
| 181391 | }, |
| 181392 | { // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 181393 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:bsub |
| 181394 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:bsub_hi |
| 181395 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub |
| 181396 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub0 |
| 181397 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1 |
| 181398 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2 |
| 181399 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3 |
| 181400 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub_hi |
| 181401 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:hsub |
| 181402 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:hsub_hi |
| 181403 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:psub |
| 181404 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:psub0 |
| 181405 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:psub1 |
| 181406 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub0 |
| 181407 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub1 |
| 181408 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub2 |
| 181409 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub3 |
| 181410 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:ssub |
| 181411 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:ssub_hi |
| 181412 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sub_32 -> GPR32common |
| 181413 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sub_32_hi |
| 181414 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sube32 |
| 181415 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sube64 |
| 181416 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:subo32 |
| 181417 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:subo64 |
| 181418 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_0 -> tcGPRnotx16x17 |
| 181419 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_1 -> tcGPRnotx16x17 |
| 181420 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_2 -> tcGPRnotx16x17 |
| 181421 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_3 -> tcGPRnotx16x17 |
| 181422 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_4 -> tcGPRnotx16x17 |
| 181423 | 64, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_5 -> tcGPRnotx16x17 |
| 181424 | 62, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_6 -> tcGPR64 |
| 181425 | 63, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_7 -> tcGPRnotx16 |
| 181426 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubb |
| 181427 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubd0 |
| 181428 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubd1 |
| 181429 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh0 |
| 181430 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1 |
| 181431 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubq0 |
| 181432 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubq1 |
| 181433 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs0 |
| 181434 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1 |
| 181435 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub |
| 181436 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub0 |
| 181437 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub1 |
| 181438 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub2 |
| 181439 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub3 |
| 181440 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub_hi |
| 181441 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 181442 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 181443 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 181444 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 181445 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 181446 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 181447 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 181448 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 181449 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 181450 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 181451 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 181452 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 181453 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 181454 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 181455 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 181456 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 181457 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 181458 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 181459 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 181460 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 181461 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181462 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181463 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_bsub |
| 181464 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_bsub_hi |
| 181465 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_hsub |
| 181466 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_hsub_hi |
| 181467 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_ssub |
| 181468 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_then_ssub_hi |
| 181469 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_bsub |
| 181470 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_bsub_hi |
| 181471 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_hsub |
| 181472 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_hsub_hi |
| 181473 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_ssub |
| 181474 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub3_then_ssub_hi |
| 181475 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_bsub |
| 181476 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_bsub_hi |
| 181477 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_hsub |
| 181478 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_hsub_hi |
| 181479 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_ssub |
| 181480 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_then_ssub_hi |
| 181481 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:psub1_then_psub |
| 181482 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub1_then_dsub_hi |
| 181483 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub3_then_dsub_hi |
| 181484 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub2_then_dsub_hi |
| 181485 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 181486 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 181487 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 181488 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 181489 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 181490 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 181491 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 181492 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 181493 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 181494 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 181495 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 181496 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 181497 | 43, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_1_then_sub_32 -> GPR32common |
| 181498 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 181499 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:subo64_then_sub_32 |
| 181500 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:subo64_then_sub_32_hi |
| 181501 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub1_then_zsub_hi |
| 181502 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub3_then_zsub_hi |
| 181503 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub2_then_zsub_hi |
| 181504 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub0_dsub1 |
| 181505 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 181506 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_dsub2 |
| 181507 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 181508 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub2_dsub3 |
| 181509 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub_dsub1 |
| 181510 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 181511 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 181512 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub0_qsub1 |
| 181513 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 181514 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub1_qsub2 |
| 181515 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 181516 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:qsub2_qsub3 |
| 181517 | 51, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181518 | 86, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181519 | 86, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181520 | 86, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181521 | 85, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 181522 | 51, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181523 | 51, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181524 | 51, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181525 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:sub_32_subo64_then_sub_32 |
| 181526 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub_qsub1 |
| 181527 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 181528 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 181529 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub0_zsub1 |
| 181530 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 181531 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub1_zsub2 |
| 181532 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 181533 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub2_zsub3 |
| 181534 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub0_zsub2 |
| 181535 | 0, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17:zsub1_zsub3 |
| 181536 | }, |
| 181537 | { // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 181538 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:bsub |
| 181539 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:bsub_hi |
| 181540 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub |
| 181541 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub0 |
| 181542 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1 |
| 181543 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2 |
| 181544 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3 |
| 181545 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub_hi |
| 181546 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:hsub |
| 181547 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:hsub_hi |
| 181548 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:psub |
| 181549 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:psub0 |
| 181550 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:psub1 |
| 181551 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub0 |
| 181552 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub1 |
| 181553 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub2 |
| 181554 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub3 |
| 181555 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:ssub |
| 181556 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:ssub_hi |
| 181557 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sub_32 -> GPR32common |
| 181558 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sub_32_hi |
| 181559 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sube32 |
| 181560 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sube64 |
| 181561 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:subo32 |
| 181562 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:subo64 |
| 181563 | 64, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_0 -> tcGPRnotx16x17 |
| 181564 | 64, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_1 -> tcGPRnotx16x17 |
| 181565 | 64, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_2 -> tcGPRnotx16x17 |
| 181566 | 64, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_3 -> tcGPRnotx16x17 |
| 181567 | 62, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_4 -> tcGPR64 |
| 181568 | 63, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_5 -> tcGPRnotx16 |
| 181569 | 64, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_6 -> tcGPRnotx16x17 |
| 181570 | 61, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_7 -> GPR64common_and_GPR64noip |
| 181571 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubb |
| 181572 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubd0 |
| 181573 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubd1 |
| 181574 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh0 |
| 181575 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1 |
| 181576 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubq0 |
| 181577 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubq1 |
| 181578 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs0 |
| 181579 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1 |
| 181580 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub |
| 181581 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub0 |
| 181582 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub1 |
| 181583 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub2 |
| 181584 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub3 |
| 181585 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub_hi |
| 181586 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubd1_then_zasubq0 |
| 181587 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubd1_then_zasubq1 |
| 181588 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubd0 |
| 181589 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubd1 |
| 181590 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubq0 |
| 181591 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubq1 |
| 181592 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq0 |
| 181593 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubs1_then_zasubd1_then_zasubq1 |
| 181594 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubd0 |
| 181595 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubd1 |
| 181596 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubq0 |
| 181597 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubq1 |
| 181598 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs0 |
| 181599 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1 |
| 181600 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq0 |
| 181601 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubd1_then_zasubq1 |
| 181602 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd0 |
| 181603 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1 |
| 181604 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq0 |
| 181605 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubq1 |
| 181606 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181607 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181608 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_bsub |
| 181609 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_bsub_hi |
| 181610 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_hsub |
| 181611 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_hsub_hi |
| 181612 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_ssub |
| 181613 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_then_ssub_hi |
| 181614 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_bsub |
| 181615 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_bsub_hi |
| 181616 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_hsub |
| 181617 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_hsub_hi |
| 181618 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_ssub |
| 181619 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub3_then_ssub_hi |
| 181620 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_bsub |
| 181621 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_bsub_hi |
| 181622 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_hsub |
| 181623 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_hsub_hi |
| 181624 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_ssub |
| 181625 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_then_ssub_hi |
| 181626 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:psub1_then_psub |
| 181627 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub1_then_dsub_hi |
| 181628 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub3_then_dsub_hi |
| 181629 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub2_then_dsub_hi |
| 181630 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_7_then_sub_32 -> GPR32common |
| 181631 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_7_then_sub_32_hi |
| 181632 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_6_then_sub_32 -> GPR32common |
| 181633 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_6_then_sub_32_hi |
| 181634 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_5_then_sub_32 -> GPR32common |
| 181635 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_5_then_sub_32_hi |
| 181636 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_4_then_sub_32 -> GPR32common |
| 181637 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_4_then_sub_32_hi |
| 181638 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_3_then_sub_32 -> GPR32common |
| 181639 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_3_then_sub_32_hi |
| 181640 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_2_then_sub_32 -> GPR32common |
| 181641 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_2_then_sub_32_hi |
| 181642 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_1_then_sub_32 -> GPR32common |
| 181643 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_1_then_sub_32_hi |
| 181644 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:subo64_then_sub_32 |
| 181645 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:subo64_then_sub_32_hi |
| 181646 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub1_then_zsub_hi |
| 181647 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub3_then_zsub_hi |
| 181648 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub2_then_zsub_hi |
| 181649 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub0_dsub1 |
| 181650 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub0_dsub1_dsub2 |
| 181651 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_dsub2 |
| 181652 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub1_dsub2_dsub3 |
| 181653 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub2_dsub3 |
| 181654 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub_dsub1 |
| 181655 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub_dsub1_dsub2_dsub3 |
| 181656 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:dsub_dsub1_dsub2 |
| 181657 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub0_qsub1 |
| 181658 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub0_qsub1_qsub2 |
| 181659 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub1_qsub2 |
| 181660 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub1_qsub2_qsub3 |
| 181661 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:qsub2_qsub3 |
| 181662 | 51, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181663 | 86, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181664 | 86, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181665 | 85, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 181666 | 84, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 181667 | 51, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181668 | 51, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181669 | 51, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181670 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:sub_32_subo64_then_sub_32 |
| 181671 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub_qsub1 |
| 181672 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub_qsub1_qsub2_qsub3 |
| 181673 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub_qsub1_qsub2 |
| 181674 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub0_zsub1 |
| 181675 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub0_zsub1_zsub2 |
| 181676 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub1_zsub2 |
| 181677 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub1_zsub2_zsub3 |
| 181678 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub2_zsub3 |
| 181679 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub0_zsub2 |
| 181680 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16:zsub1_zsub3 |
| 181681 | }, |
| 181682 | { // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 181683 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:bsub |
| 181684 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:bsub_hi |
| 181685 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub |
| 181686 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub0 |
| 181687 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1 |
| 181688 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2 |
| 181689 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3 |
| 181690 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub_hi |
| 181691 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:hsub |
| 181692 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:hsub_hi |
| 181693 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:psub |
| 181694 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:psub0 |
| 181695 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:psub1 |
| 181696 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub0 |
| 181697 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub1 |
| 181698 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub2 |
| 181699 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub3 |
| 181700 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:ssub |
| 181701 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:ssub_hi |
| 181702 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sub_32 -> GPR32common |
| 181703 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sub_32_hi |
| 181704 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sube32 |
| 181705 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sube64 |
| 181706 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:subo32 |
| 181707 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:subo64 |
| 181708 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_0 -> tcGPRnotx16x17 |
| 181709 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_1 -> tcGPRnotx16x17 |
| 181710 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_2 -> tcGPRnotx16x17 |
| 181711 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_3 -> tcGPRnotx16x17 |
| 181712 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_4 -> tcGPRnotx16x17 |
| 181713 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_5 -> tcGPRnotx16x17 |
| 181714 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_6 -> tcGPRnotx16x17 |
| 181715 | 64, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_7 -> tcGPRnotx16x17 |
| 181716 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubb |
| 181717 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubd0 |
| 181718 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubd1 |
| 181719 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh0 |
| 181720 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1 |
| 181721 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubq0 |
| 181722 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubq1 |
| 181723 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs0 |
| 181724 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1 |
| 181725 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub |
| 181726 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub0 |
| 181727 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub1 |
| 181728 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub2 |
| 181729 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub3 |
| 181730 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub_hi |
| 181731 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubd1_then_zasubq0 |
| 181732 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubd1_then_zasubq1 |
| 181733 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubd0 |
| 181734 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubd1 |
| 181735 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubq0 |
| 181736 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubq1 |
| 181737 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 181738 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 181739 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubd0 |
| 181740 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubd1 |
| 181741 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubq0 |
| 181742 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubq1 |
| 181743 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs0 |
| 181744 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1 |
| 181745 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 181746 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 181747 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 181748 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 181749 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 181750 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 181751 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181752 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181753 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_bsub |
| 181754 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_bsub_hi |
| 181755 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_hsub |
| 181756 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_hsub_hi |
| 181757 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_ssub |
| 181758 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_then_ssub_hi |
| 181759 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_bsub |
| 181760 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_bsub_hi |
| 181761 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_hsub |
| 181762 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_hsub_hi |
| 181763 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_ssub |
| 181764 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub3_then_ssub_hi |
| 181765 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_bsub |
| 181766 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_bsub_hi |
| 181767 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_hsub |
| 181768 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_hsub_hi |
| 181769 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_ssub |
| 181770 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_then_ssub_hi |
| 181771 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:psub1_then_psub |
| 181772 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub1_then_dsub_hi |
| 181773 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub3_then_dsub_hi |
| 181774 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub2_then_dsub_hi |
| 181775 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 181776 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_7_then_sub_32_hi |
| 181777 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 181778 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_6_then_sub_32_hi |
| 181779 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 181780 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_5_then_sub_32_hi |
| 181781 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 181782 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_4_then_sub_32_hi |
| 181783 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 181784 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_3_then_sub_32_hi |
| 181785 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 181786 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_2_then_sub_32_hi |
| 181787 | 43, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_1_then_sub_32 -> GPR32common |
| 181788 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_1_then_sub_32_hi |
| 181789 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:subo64_then_sub_32 |
| 181790 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:subo64_then_sub_32_hi |
| 181791 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub1_then_zsub_hi |
| 181792 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub3_then_zsub_hi |
| 181793 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub2_then_zsub_hi |
| 181794 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub0_dsub1 |
| 181795 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub0_dsub1_dsub2 |
| 181796 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_dsub2 |
| 181797 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub1_dsub2_dsub3 |
| 181798 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub2_dsub3 |
| 181799 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub_dsub1 |
| 181800 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub_dsub1_dsub2_dsub3 |
| 181801 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:dsub_dsub1_dsub2 |
| 181802 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub0_qsub1 |
| 181803 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub0_qsub1_qsub2 |
| 181804 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub1_qsub2 |
| 181805 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub1_qsub2_qsub3 |
| 181806 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:qsub2_qsub3 |
| 181807 | 51, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181808 | 86, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181809 | 86, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181810 | 86, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181811 | 86, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181812 | 51, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181813 | 51, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181814 | 51, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181815 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:sub_32_subo64_then_sub_32 |
| 181816 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub_qsub1 |
| 181817 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub_qsub1_qsub2_qsub3 |
| 181818 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub_qsub1_qsub2 |
| 181819 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub0_zsub1 |
| 181820 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub0_zsub1_zsub2 |
| 181821 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub1_zsub2 |
| 181822 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub1_zsub2_zsub3 |
| 181823 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub2_zsub3 |
| 181824 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub0_zsub2 |
| 181825 | 0, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17:zsub1_zsub3 |
| 181826 | }, |
| 181827 | { // GPR64x8Class_with_sub_32_in_GPR32arg |
| 181828 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:bsub |
| 181829 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:bsub_hi |
| 181830 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub |
| 181831 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0 |
| 181832 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1 |
| 181833 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2 |
| 181834 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3 |
| 181835 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_hi |
| 181836 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:hsub |
| 181837 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:hsub_hi |
| 181838 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub |
| 181839 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub0 |
| 181840 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub1 |
| 181841 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0 |
| 181842 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1 |
| 181843 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2 |
| 181844 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3 |
| 181845 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:ssub |
| 181846 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:ssub_hi |
| 181847 | 45, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32 -> GPR32arg |
| 181848 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32_hi |
| 181849 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sube32 |
| 181850 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sube64 |
| 181851 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo32 |
| 181852 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo64 |
| 181853 | 66, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_0 -> GPR64arg |
| 181854 | 66, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_1 -> GPR64arg |
| 181855 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2 -> tcGPRnotx16x17 |
| 181856 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_3 -> tcGPRnotx16x17 |
| 181857 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4 -> tcGPRnotx16x17 |
| 181858 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_5 -> tcGPRnotx16x17 |
| 181859 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6 -> tcGPRnotx16x17 |
| 181860 | 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_7 -> tcGPRnotx16x17 |
| 181861 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubb |
| 181862 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd0 |
| 181863 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1 |
| 181864 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh0 |
| 181865 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1 |
| 181866 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubq0 |
| 181867 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubq1 |
| 181868 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs0 |
| 181869 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1 |
| 181870 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub |
| 181871 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0 |
| 181872 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1 |
| 181873 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2 |
| 181874 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3 |
| 181875 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_hi |
| 181876 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1_then_zasubq0 |
| 181877 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1_then_zasubq1 |
| 181878 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd0 |
| 181879 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1 |
| 181880 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubq0 |
| 181881 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubq1 |
| 181882 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq0 |
| 181883 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq1 |
| 181884 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd0 |
| 181885 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1 |
| 181886 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubq0 |
| 181887 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubq1 |
| 181888 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs0 |
| 181889 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1 |
| 181890 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq0 |
| 181891 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq1 |
| 181892 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd0 |
| 181893 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1 |
| 181894 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq0 |
| 181895 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq1 |
| 181896 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 181897 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 181898 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_bsub |
| 181899 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_bsub_hi |
| 181900 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_hsub |
| 181901 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_hsub_hi |
| 181902 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_ssub |
| 181903 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_ssub_hi |
| 181904 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_bsub |
| 181905 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_bsub_hi |
| 181906 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_hsub |
| 181907 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_hsub_hi |
| 181908 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_ssub |
| 181909 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_ssub_hi |
| 181910 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_bsub |
| 181911 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_bsub_hi |
| 181912 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_hsub |
| 181913 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_hsub_hi |
| 181914 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_ssub |
| 181915 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_ssub_hi |
| 181916 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub1_then_psub |
| 181917 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_dsub_hi |
| 181918 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3_then_dsub_hi |
| 181919 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_dsub_hi |
| 181920 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_7_then_sub_32 -> GPR32common |
| 181921 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_7_then_sub_32_hi |
| 181922 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32 -> GPR32common |
| 181923 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32_hi |
| 181924 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_5_then_sub_32 -> GPR32common |
| 181925 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_5_then_sub_32_hi |
| 181926 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32 -> GPR32common |
| 181927 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32_hi |
| 181928 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_3_then_sub_32 -> GPR32common |
| 181929 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_3_then_sub_32_hi |
| 181930 | 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32 -> GPR32common |
| 181931 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32_hi |
| 181932 | 45, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_1_then_sub_32 -> GPR32arg |
| 181933 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_1_then_sub_32_hi |
| 181934 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo64_then_sub_32 |
| 181935 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo64_then_sub_32_hi |
| 181936 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_zsub_hi |
| 181937 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_zsub_hi |
| 181938 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_zsub_hi |
| 181939 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0_dsub1 |
| 181940 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0_dsub1_dsub2 |
| 181941 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_dsub2 |
| 181942 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_dsub2_dsub3 |
| 181943 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_dsub3 |
| 181944 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_dsub1 |
| 181945 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_dsub1_dsub2_dsub3 |
| 181946 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_dsub1_dsub2 |
| 181947 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0_qsub1 |
| 181948 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0_qsub1_qsub2 |
| 181949 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_qsub2 |
| 181950 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_qsub2_qsub3 |
| 181951 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_qsub3 |
| 181952 | 52, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 181953 | 87, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 181954 | 86, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181955 | 86, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181956 | 86, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 181957 | 51, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181958 | 51, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181959 | 51, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 181960 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32_subo64_then_sub_32 |
| 181961 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_qsub1 |
| 181962 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_qsub1_qsub2_qsub3 |
| 181963 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_qsub1_qsub2 |
| 181964 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub1 |
| 181965 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub1_zsub2 |
| 181966 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub2 |
| 181967 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub2_zsub3 |
| 181968 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_zsub3 |
| 181969 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub2 |
| 181970 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub3 |
| 181971 | }, |
| 181972 | { // MPR32 |
| 181973 | 0, // MPR32:bsub |
| 181974 | 0, // MPR32:bsub_hi |
| 181975 | 0, // MPR32:dsub |
| 181976 | 0, // MPR32:dsub0 |
| 181977 | 0, // MPR32:dsub1 |
| 181978 | 0, // MPR32:dsub2 |
| 181979 | 0, // MPR32:dsub3 |
| 181980 | 0, // MPR32:dsub_hi |
| 181981 | 0, // MPR32:hsub |
| 181982 | 0, // MPR32:hsub_hi |
| 181983 | 0, // MPR32:psub |
| 181984 | 0, // MPR32:psub0 |
| 181985 | 0, // MPR32:psub1 |
| 181986 | 0, // MPR32:qsub0 |
| 181987 | 0, // MPR32:qsub1 |
| 181988 | 0, // MPR32:qsub2 |
| 181989 | 0, // MPR32:qsub3 |
| 181990 | 0, // MPR32:ssub |
| 181991 | 0, // MPR32:ssub_hi |
| 181992 | 0, // MPR32:sub_32 |
| 181993 | 0, // MPR32:sub_32_hi |
| 181994 | 0, // MPR32:sube32 |
| 181995 | 0, // MPR32:sube64 |
| 181996 | 0, // MPR32:subo32 |
| 181997 | 0, // MPR32:subo64 |
| 181998 | 0, // MPR32:x8sub_0 |
| 181999 | 0, // MPR32:x8sub_1 |
| 182000 | 0, // MPR32:x8sub_2 |
| 182001 | 0, // MPR32:x8sub_3 |
| 182002 | 0, // MPR32:x8sub_4 |
| 182003 | 0, // MPR32:x8sub_5 |
| 182004 | 0, // MPR32:x8sub_6 |
| 182005 | 0, // MPR32:x8sub_7 |
| 182006 | 0, // MPR32:zasubb |
| 182007 | 205, // MPR32:zasubd0 -> MPR64 |
| 182008 | 205, // MPR32:zasubd1 -> MPR64 |
| 182009 | 0, // MPR32:zasubh0 |
| 182010 | 0, // MPR32:zasubh1 |
| 182011 | 95, // MPR32:zasubq0 -> MPR128 |
| 182012 | 95, // MPR32:zasubq1 -> MPR128 |
| 182013 | 0, // MPR32:zasubs0 |
| 182014 | 0, // MPR32:zasubs1 |
| 182015 | 0, // MPR32:zsub |
| 182016 | 0, // MPR32:zsub0 |
| 182017 | 0, // MPR32:zsub1 |
| 182018 | 0, // MPR32:zsub2 |
| 182019 | 0, // MPR32:zsub3 |
| 182020 | 0, // MPR32:zsub_hi |
| 182021 | 95, // MPR32:zasubd1_then_zasubq0 -> MPR128 |
| 182022 | 95, // MPR32:zasubd1_then_zasubq1 -> MPR128 |
| 182023 | 0, // MPR32:zasubs1_then_zasubd0 |
| 182024 | 0, // MPR32:zasubs1_then_zasubd1 |
| 182025 | 0, // MPR32:zasubs1_then_zasubq0 |
| 182026 | 0, // MPR32:zasubs1_then_zasubq1 |
| 182027 | 0, // MPR32:zasubs1_then_zasubd1_then_zasubq0 |
| 182028 | 0, // MPR32:zasubs1_then_zasubd1_then_zasubq1 |
| 182029 | 0, // MPR32:zasubh1_then_zasubd0 |
| 182030 | 0, // MPR32:zasubh1_then_zasubd1 |
| 182031 | 0, // MPR32:zasubh1_then_zasubq0 |
| 182032 | 0, // MPR32:zasubh1_then_zasubq1 |
| 182033 | 0, // MPR32:zasubh1_then_zasubs0 |
| 182034 | 0, // MPR32:zasubh1_then_zasubs1 |
| 182035 | 0, // MPR32:zasubh1_then_zasubd1_then_zasubq0 |
| 182036 | 0, // MPR32:zasubh1_then_zasubd1_then_zasubq1 |
| 182037 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubd0 |
| 182038 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1 |
| 182039 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubq0 |
| 182040 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubq1 |
| 182041 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182042 | 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182043 | 0, // MPR32:dsub1_then_bsub |
| 182044 | 0, // MPR32:dsub1_then_bsub_hi |
| 182045 | 0, // MPR32:dsub1_then_hsub |
| 182046 | 0, // MPR32:dsub1_then_hsub_hi |
| 182047 | 0, // MPR32:dsub1_then_ssub |
| 182048 | 0, // MPR32:dsub1_then_ssub_hi |
| 182049 | 0, // MPR32:dsub3_then_bsub |
| 182050 | 0, // MPR32:dsub3_then_bsub_hi |
| 182051 | 0, // MPR32:dsub3_then_hsub |
| 182052 | 0, // MPR32:dsub3_then_hsub_hi |
| 182053 | 0, // MPR32:dsub3_then_ssub |
| 182054 | 0, // MPR32:dsub3_then_ssub_hi |
| 182055 | 0, // MPR32:dsub2_then_bsub |
| 182056 | 0, // MPR32:dsub2_then_bsub_hi |
| 182057 | 0, // MPR32:dsub2_then_hsub |
| 182058 | 0, // MPR32:dsub2_then_hsub_hi |
| 182059 | 0, // MPR32:dsub2_then_ssub |
| 182060 | 0, // MPR32:dsub2_then_ssub_hi |
| 182061 | 0, // MPR32:psub1_then_psub |
| 182062 | 0, // MPR32:qsub1_then_dsub_hi |
| 182063 | 0, // MPR32:qsub3_then_dsub_hi |
| 182064 | 0, // MPR32:qsub2_then_dsub_hi |
| 182065 | 0, // MPR32:x8sub_7_then_sub_32 |
| 182066 | 0, // MPR32:x8sub_7_then_sub_32_hi |
| 182067 | 0, // MPR32:x8sub_6_then_sub_32 |
| 182068 | 0, // MPR32:x8sub_6_then_sub_32_hi |
| 182069 | 0, // MPR32:x8sub_5_then_sub_32 |
| 182070 | 0, // MPR32:x8sub_5_then_sub_32_hi |
| 182071 | 0, // MPR32:x8sub_4_then_sub_32 |
| 182072 | 0, // MPR32:x8sub_4_then_sub_32_hi |
| 182073 | 0, // MPR32:x8sub_3_then_sub_32 |
| 182074 | 0, // MPR32:x8sub_3_then_sub_32_hi |
| 182075 | 0, // MPR32:x8sub_2_then_sub_32 |
| 182076 | 0, // MPR32:x8sub_2_then_sub_32_hi |
| 182077 | 0, // MPR32:x8sub_1_then_sub_32 |
| 182078 | 0, // MPR32:x8sub_1_then_sub_32_hi |
| 182079 | 0, // MPR32:subo64_then_sub_32 |
| 182080 | 0, // MPR32:subo64_then_sub_32_hi |
| 182081 | 0, // MPR32:zsub1_then_zsub_hi |
| 182082 | 0, // MPR32:zsub3_then_zsub_hi |
| 182083 | 0, // MPR32:zsub2_then_zsub_hi |
| 182084 | 0, // MPR32:dsub0_dsub1 |
| 182085 | 0, // MPR32:dsub0_dsub1_dsub2 |
| 182086 | 0, // MPR32:dsub1_dsub2 |
| 182087 | 0, // MPR32:dsub1_dsub2_dsub3 |
| 182088 | 0, // MPR32:dsub2_dsub3 |
| 182089 | 0, // MPR32:dsub_dsub1 |
| 182090 | 0, // MPR32:dsub_dsub1_dsub2_dsub3 |
| 182091 | 0, // MPR32:dsub_dsub1_dsub2 |
| 182092 | 0, // MPR32:qsub0_qsub1 |
| 182093 | 0, // MPR32:qsub0_qsub1_qsub2 |
| 182094 | 0, // MPR32:qsub1_qsub2 |
| 182095 | 0, // MPR32:qsub1_qsub2_qsub3 |
| 182096 | 0, // MPR32:qsub2_qsub3 |
| 182097 | 0, // MPR32:sub_32_x8sub_1_then_sub_32 |
| 182098 | 0, // MPR32:x8sub_0_x8sub_1 |
| 182099 | 0, // MPR32:x8sub_2_x8sub_3 |
| 182100 | 0, // MPR32:x8sub_4_x8sub_5 |
| 182101 | 0, // MPR32:x8sub_6_x8sub_7 |
| 182102 | 0, // MPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 182103 | 0, // MPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 182104 | 0, // MPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 182105 | 0, // MPR32:sub_32_subo64_then_sub_32 |
| 182106 | 0, // MPR32:zsub_qsub1 |
| 182107 | 0, // MPR32:zsub_qsub1_qsub2_qsub3 |
| 182108 | 0, // MPR32:zsub_qsub1_qsub2 |
| 182109 | 0, // MPR32:zsub0_zsub1 |
| 182110 | 0, // MPR32:zsub0_zsub1_zsub2 |
| 182111 | 0, // MPR32:zsub1_zsub2 |
| 182112 | 0, // MPR32:zsub1_zsub2_zsub3 |
| 182113 | 0, // MPR32:zsub2_zsub3 |
| 182114 | 0, // MPR32:zsub0_zsub2 |
| 182115 | 0, // MPR32:zsub1_zsub3 |
| 182116 | }, |
| 182117 | { // GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 182118 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:bsub |
| 182119 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:bsub_hi |
| 182120 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub |
| 182121 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0 |
| 182122 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1 |
| 182123 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2 |
| 182124 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3 |
| 182125 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_hi |
| 182126 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:hsub |
| 182127 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:hsub_hi |
| 182128 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub |
| 182129 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub0 |
| 182130 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub1 |
| 182131 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0 |
| 182132 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1 |
| 182133 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2 |
| 182134 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3 |
| 182135 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:ssub |
| 182136 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:ssub_hi |
| 182137 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32 -> GPR32arg |
| 182138 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32_hi |
| 182139 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sube32 |
| 182140 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sube64 |
| 182141 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo32 |
| 182142 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo64 |
| 182143 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_0 -> GPR64arg |
| 182144 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_1 -> GPR64arg |
| 182145 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2 -> GPR64arg |
| 182146 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_3 -> GPR64arg |
| 182147 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4 -> tcGPRnotx16x17 |
| 182148 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_5 -> tcGPRnotx16x17 |
| 182149 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6 -> tcGPRnotx16x17 |
| 182150 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_7 -> tcGPRnotx16x17 |
| 182151 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubb |
| 182152 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd0 |
| 182153 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1 |
| 182154 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh0 |
| 182155 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1 |
| 182156 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubq0 |
| 182157 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubq1 |
| 182158 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs0 |
| 182159 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1 |
| 182160 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub |
| 182161 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0 |
| 182162 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1 |
| 182163 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2 |
| 182164 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3 |
| 182165 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_hi |
| 182166 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1_then_zasubq0 |
| 182167 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1_then_zasubq1 |
| 182168 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd0 |
| 182169 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1 |
| 182170 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubq0 |
| 182171 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubq1 |
| 182172 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 |
| 182173 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 |
| 182174 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd0 |
| 182175 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1 |
| 182176 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubq0 |
| 182177 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubq1 |
| 182178 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs0 |
| 182179 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1 |
| 182180 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 |
| 182181 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 |
| 182182 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 |
| 182183 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 |
| 182184 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 |
| 182185 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 |
| 182186 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182187 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182188 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_bsub |
| 182189 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_bsub_hi |
| 182190 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_hsub |
| 182191 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_hsub_hi |
| 182192 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_ssub |
| 182193 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_ssub_hi |
| 182194 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_bsub |
| 182195 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_bsub_hi |
| 182196 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_hsub |
| 182197 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_hsub_hi |
| 182198 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_ssub |
| 182199 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_ssub_hi |
| 182200 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_bsub |
| 182201 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_bsub_hi |
| 182202 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_hsub |
| 182203 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_hsub_hi |
| 182204 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_ssub |
| 182205 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_ssub_hi |
| 182206 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub1_then_psub |
| 182207 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_dsub_hi |
| 182208 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3_then_dsub_hi |
| 182209 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_dsub_hi |
| 182210 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32common |
| 182211 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_7_then_sub_32_hi |
| 182212 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32common |
| 182213 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_then_sub_32_hi |
| 182214 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32common |
| 182215 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_5_then_sub_32_hi |
| 182216 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32common |
| 182217 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_then_sub_32_hi |
| 182218 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg |
| 182219 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_3_then_sub_32_hi |
| 182220 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg |
| 182221 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_then_sub_32_hi |
| 182222 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg |
| 182223 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_1_then_sub_32_hi |
| 182224 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo64_then_sub_32 |
| 182225 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo64_then_sub_32_hi |
| 182226 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_zsub_hi |
| 182227 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_zsub_hi |
| 182228 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_zsub_hi |
| 182229 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0_dsub1 |
| 182230 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0_dsub1_dsub2 |
| 182231 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_dsub2 |
| 182232 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_dsub2_dsub3 |
| 182233 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_dsub3 |
| 182234 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_dsub1 |
| 182235 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_dsub1_dsub2_dsub3 |
| 182236 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_dsub1_dsub2 |
| 182237 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0_qsub1 |
| 182238 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0_qsub1_qsub2 |
| 182239 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_qsub2 |
| 182240 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_qsub2_qsub3 |
| 182241 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_qsub3 |
| 182242 | 52, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 182243 | 87, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 182244 | 87, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 182245 | 86, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182246 | 86, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182247 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182248 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182249 | 52, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 182250 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32_subo64_then_sub_32 |
| 182251 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_qsub1 |
| 182252 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_qsub1_qsub2_qsub3 |
| 182253 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_qsub1_qsub2 |
| 182254 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub1 |
| 182255 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub1_zsub2 |
| 182256 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub2 |
| 182257 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub2_zsub3 |
| 182258 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_zsub3 |
| 182259 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub2 |
| 182260 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub3 |
| 182261 | }, |
| 182262 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182263 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:bsub |
| 182264 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:bsub_hi |
| 182265 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub |
| 182266 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 |
| 182267 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 |
| 182268 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 |
| 182269 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 |
| 182270 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_hi |
| 182271 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:hsub |
| 182272 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:hsub_hi |
| 182273 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub |
| 182274 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 |
| 182275 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 |
| 182276 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 |
| 182277 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 |
| 182278 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 |
| 182279 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 |
| 182280 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:ssub |
| 182281 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:ssub_hi |
| 182282 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 |
| 182283 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_hi |
| 182284 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 |
| 182285 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 |
| 182286 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 |
| 182287 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 |
| 182288 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182289 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182290 | 62, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 -> tcGPR64 |
| 182291 | 63, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 -> tcGPRnotx16 |
| 182292 | 62, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 -> tcGPR64 |
| 182293 | 59, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 -> GPR64common |
| 182294 | 61, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 -> GPR64common_and_GPR64noip |
| 182295 | 61, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 -> GPR64common_and_GPR64noip |
| 182296 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb |
| 182297 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 |
| 182298 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 |
| 182299 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 |
| 182300 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 |
| 182301 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 |
| 182302 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 |
| 182303 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 |
| 182304 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 |
| 182305 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub |
| 182306 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 |
| 182307 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 |
| 182308 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 |
| 182309 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 |
| 182310 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi |
| 182311 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 182312 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 182313 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 182314 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 182315 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 182316 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 182317 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 182318 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 182319 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 182320 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 182321 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 182322 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 182323 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 182324 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 182325 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 182326 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 182327 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 182328 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 182329 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 182330 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 182331 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182332 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182333 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 182334 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 182335 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 182336 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 182337 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 182338 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 182339 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 182340 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 182341 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 182342 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 182343 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 182344 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 182345 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 182346 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 182347 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 182348 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 182349 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 182350 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 182351 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub1_then_psub |
| 182352 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 182353 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 182354 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 182355 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 -> GPR32common |
| 182356 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 182357 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 -> GPR32common |
| 182358 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 182359 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 -> GPR32common |
| 182360 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 182361 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 -> GPR32common |
| 182362 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 182363 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 -> GPR32common |
| 182364 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 182365 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 -> GPR32common |
| 182366 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 182367 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182368 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 182369 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 |
| 182370 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 182371 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 182372 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 182373 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 182374 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 182375 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 182376 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 182377 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 182378 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 182379 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1 |
| 182380 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 182381 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 182382 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 182383 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 182384 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 182385 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 182386 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 182387 | 53, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 182388 | 88, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182389 | 85, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 182390 | 83, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 182391 | 82, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 182392 | 51, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182393 | 51, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182394 | 51, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182395 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 |
| 182396 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1 |
| 182397 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 182398 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 182399 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 182400 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 182401 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 182402 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 182403 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 182404 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 182405 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 182406 | }, |
| 182407 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182408 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 182409 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 182410 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 182411 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 182412 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 182413 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 182414 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 182415 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 182416 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 182417 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 182418 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 182419 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 182420 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 182421 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 182422 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 182423 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 182424 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 182425 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 182426 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 182427 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 |
| 182428 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 182429 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 182430 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 182431 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 182432 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 182433 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182434 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182435 | 64, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> tcGPRnotx16x17 |
| 182436 | 64, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> tcGPRnotx16x17 |
| 182437 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182438 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182439 | 62, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> tcGPR64 |
| 182440 | 63, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> tcGPRnotx16 |
| 182441 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 182442 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 182443 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 182444 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 182445 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 182446 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 182447 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 182448 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 182449 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 182450 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 182451 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 182452 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 182453 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 182454 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 182455 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 182456 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 182457 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 182458 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 182459 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 182460 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 182461 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 182462 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 182463 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 182464 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 182465 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 182466 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 182467 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 182468 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 182469 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 182470 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 182471 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 182472 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 182473 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 182474 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 182475 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 182476 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182477 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182478 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 182479 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 182480 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 182481 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 182482 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 182483 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 182484 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 182485 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 182486 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 182487 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 182488 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 182489 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 182490 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 182491 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 182492 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 182493 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 182494 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 182495 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 182496 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 182497 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 182498 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 182499 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 182500 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> GPR32common |
| 182501 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 182502 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> GPR32common |
| 182503 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 182504 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182505 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 182506 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182507 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 182508 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32common |
| 182509 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 182510 | 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32common |
| 182511 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 182512 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 182513 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 182514 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 182515 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 182516 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 182517 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 182518 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 182519 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 182520 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 182521 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 182522 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 182523 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 182524 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 182525 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 182526 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 182527 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 182528 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 182529 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 182530 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 182531 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 182532 | 54, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 182533 | 89, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182534 | 86, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182535 | 88, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182536 | 85, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 182537 | 51, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182538 | 53, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 182539 | 51, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182540 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 182541 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 182542 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 182543 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 182544 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 182545 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 182546 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 182547 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 182548 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 182549 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 182550 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 182551 | }, |
| 182552 | { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182553 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub |
| 182554 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub_hi |
| 182555 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub |
| 182556 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 |
| 182557 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 |
| 182558 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 |
| 182559 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 |
| 182560 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_hi |
| 182561 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub |
| 182562 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub_hi |
| 182563 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub |
| 182564 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 |
| 182565 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 |
| 182566 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 |
| 182567 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 |
| 182568 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 |
| 182569 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 |
| 182570 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub |
| 182571 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub_hi |
| 182572 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> GPR32common |
| 182573 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_hi |
| 182574 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 |
| 182575 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 |
| 182576 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 |
| 182577 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 |
| 182578 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 -> tcGPRnotx16x17 |
| 182579 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 -> tcGPRnotx16x17 |
| 182580 | 68, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182581 | 68, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182582 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 -> tcGPR64 |
| 182583 | 63, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 -> tcGPRnotx16 |
| 182584 | 62, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 -> tcGPR64 |
| 182585 | 59, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 -> GPR64common |
| 182586 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb |
| 182587 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 |
| 182588 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 |
| 182589 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 |
| 182590 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 |
| 182591 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 |
| 182592 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 |
| 182593 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 |
| 182594 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 |
| 182595 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub |
| 182596 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 |
| 182597 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 |
| 182598 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 |
| 182599 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 |
| 182600 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi |
| 182601 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 |
| 182602 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 |
| 182603 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 |
| 182604 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 |
| 182605 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 |
| 182606 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 |
| 182607 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 |
| 182608 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 |
| 182609 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 |
| 182610 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 |
| 182611 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 |
| 182612 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 |
| 182613 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 |
| 182614 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 |
| 182615 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 |
| 182616 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 |
| 182617 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 |
| 182618 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 |
| 182619 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 |
| 182620 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 |
| 182621 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182622 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182623 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub |
| 182624 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub_hi |
| 182625 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub |
| 182626 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub_hi |
| 182627 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub |
| 182628 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub_hi |
| 182629 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub |
| 182630 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub_hi |
| 182631 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub |
| 182632 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub_hi |
| 182633 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub |
| 182634 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub_hi |
| 182635 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub |
| 182636 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub_hi |
| 182637 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub |
| 182638 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub_hi |
| 182639 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub |
| 182640 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub_hi |
| 182641 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1_then_psub |
| 182642 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_hi |
| 182643 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub_hi |
| 182644 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_hi |
| 182645 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 -> GPR32common |
| 182646 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32_hi |
| 182647 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 -> GPR32common |
| 182648 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_hi |
| 182649 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 -> GPR32common |
| 182650 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32_hi |
| 182651 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 -> GPR32common |
| 182652 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_hi |
| 182653 | 46, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182654 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32_hi |
| 182655 | 46, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182656 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_hi |
| 182657 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 -> GPR32common |
| 182658 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32_hi |
| 182659 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 |
| 182660 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32_hi |
| 182661 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi |
| 182662 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi |
| 182663 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi |
| 182664 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 |
| 182665 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 |
| 182666 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 |
| 182667 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 |
| 182668 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 |
| 182669 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1 |
| 182670 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2_dsub3 |
| 182671 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_dsub1_dsub2 |
| 182672 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 |
| 182673 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 |
| 182674 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 |
| 182675 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 |
| 182676 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 |
| 182677 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182678 | 86, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182679 | 88, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182680 | 85, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 |
| 182681 | 83, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPR64 |
| 182682 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182683 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182684 | 53, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 182685 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 |
| 182686 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1 |
| 182687 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2_qsub3 |
| 182688 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_qsub1_qsub2 |
| 182689 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 |
| 182690 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 |
| 182691 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 |
| 182692 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 |
| 182693 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 |
| 182694 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 |
| 182695 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 |
| 182696 | }, |
| 182697 | { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182698 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 182699 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 182700 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 182701 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 182702 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 182703 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 182704 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 182705 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 182706 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 182707 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 182708 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 182709 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 182710 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 182711 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 182712 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 182713 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 182714 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 182715 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 182716 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 182717 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32common |
| 182718 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 182719 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 182720 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 182721 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 182722 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 182723 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> tcGPRnotx16x17 |
| 182724 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> tcGPRnotx16x17 |
| 182725 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182726 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182727 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> tcGPRnotx16x17 |
| 182728 | 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> tcGPRnotx16x17 |
| 182729 | 68, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182730 | 68, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182731 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 182732 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 182733 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 182734 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 182735 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 182736 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 182737 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 182738 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 182739 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 182740 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 182741 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 182742 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 182743 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 182744 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 182745 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 182746 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 182747 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 182748 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 182749 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 182750 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 182751 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 182752 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 182753 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 182754 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 182755 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 182756 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 182757 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 182758 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 182759 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 182760 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 182761 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 182762 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 182763 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 182764 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 182765 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 182766 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182767 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182768 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 182769 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 182770 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 182771 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 182772 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 182773 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 182774 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 182775 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 182776 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 182777 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 182778 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 182779 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 182780 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 182781 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 182782 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 182783 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 182784 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 182785 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 182786 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 182787 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 182788 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 182789 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 182790 | 46, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182791 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 182792 | 46, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 182793 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 182794 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32common |
| 182795 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 182796 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32common |
| 182797 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 182798 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 182799 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 182800 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 182801 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 182802 | 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32common |
| 182803 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 182804 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 182805 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 182806 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 182807 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 182808 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 182809 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 182810 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 182811 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 182812 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 182813 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 182814 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 182815 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 182816 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 182817 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 182818 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 182819 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 182820 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 182821 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 182822 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182823 | 86, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182824 | 89, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182825 | 86, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182826 | 88, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 182827 | 53, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 182828 | 51, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182829 | 54, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 182830 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 182831 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 182832 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 182833 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 182834 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 182835 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 182836 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 182837 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 182838 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 182839 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 182840 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 182841 | }, |
| 182842 | { // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182843 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 182844 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 182845 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 182846 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 182847 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 182848 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 182849 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 182850 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 182851 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 182852 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 182853 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 182854 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 182855 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 182856 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 182857 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 182858 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 182859 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 182860 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 182861 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 182862 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg |
| 182863 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 182864 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 182865 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 182866 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 182867 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 182868 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg |
| 182869 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg |
| 182870 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> tcGPRnotx16x17 |
| 182871 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> tcGPRnotx16x17 |
| 182872 | 69, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182873 | 69, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182874 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> tcGPRnotx16x17 |
| 182875 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> tcGPRnotx16x17 |
| 182876 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 182877 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 182878 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 182879 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 182880 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 182881 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 182882 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 182883 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 182884 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 182885 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 182886 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 182887 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 182888 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 182889 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 182890 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 182891 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 182892 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 182893 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 182894 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 182895 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 182896 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 182897 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 182898 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 182899 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 182900 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 182901 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 182902 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 182903 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 182904 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 182905 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 182906 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 182907 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 182908 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 182909 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 182910 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 182911 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 182912 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 182913 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 182914 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 182915 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 182916 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 182917 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 182918 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 182919 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 182920 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 182921 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 182922 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 182923 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 182924 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 182925 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 182926 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 182927 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 182928 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 182929 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 182930 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 182931 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 182932 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 182933 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 182934 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 182935 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> GPR32common |
| 182936 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 182937 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> GPR32common |
| 182938 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 182939 | 47, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 182940 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 182941 | 47, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 182942 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 182943 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32common |
| 182944 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 182945 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32common |
| 182946 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 182947 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg |
| 182948 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 182949 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 182950 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 182951 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 182952 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 182953 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 182954 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 182955 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 182956 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 182957 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 182958 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 182959 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 182960 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 182961 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 182962 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 182963 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 182964 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 182965 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 182966 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 182967 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 182968 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 182969 | 86, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182970 | 89, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 182971 | 86, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 182972 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182973 | 54, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 182974 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 182975 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 182976 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 182977 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 182978 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 182979 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 182980 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 182981 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 182982 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 182983 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 182984 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 182985 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 182986 | }, |
| 182987 | { // GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 182988 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:bsub |
| 182989 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:bsub_hi |
| 182990 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub |
| 182991 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0 |
| 182992 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1 |
| 182993 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2 |
| 182994 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3 |
| 182995 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_hi |
| 182996 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:hsub |
| 182997 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:hsub_hi |
| 182998 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub |
| 182999 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub0 |
| 183000 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub1 |
| 183001 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0 |
| 183002 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1 |
| 183003 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2 |
| 183004 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3 |
| 183005 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:ssub |
| 183006 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:ssub_hi |
| 183007 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32 -> GPR32arg |
| 183008 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32_hi |
| 183009 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sube32 |
| 183010 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sube64 |
| 183011 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo32 |
| 183012 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo64 |
| 183013 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_0 -> GPR64arg |
| 183014 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_1 -> GPR64arg |
| 183015 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2 -> GPR64arg |
| 183016 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_3 -> GPR64arg |
| 183017 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4 -> GPR64arg |
| 183018 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_5 -> GPR64arg |
| 183019 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6 -> tcGPRnotx16x17 |
| 183020 | 64, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_7 -> tcGPRnotx16x17 |
| 183021 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubb |
| 183022 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd0 |
| 183023 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1 |
| 183024 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh0 |
| 183025 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1 |
| 183026 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubq0 |
| 183027 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubq1 |
| 183028 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs0 |
| 183029 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1 |
| 183030 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub |
| 183031 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0 |
| 183032 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1 |
| 183033 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2 |
| 183034 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3 |
| 183035 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_hi |
| 183036 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1_then_zasubq0 |
| 183037 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1_then_zasubq1 |
| 183038 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd0 |
| 183039 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1 |
| 183040 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubq0 |
| 183041 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubq1 |
| 183042 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 |
| 183043 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 |
| 183044 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd0 |
| 183045 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1 |
| 183046 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubq0 |
| 183047 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubq1 |
| 183048 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs0 |
| 183049 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1 |
| 183050 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 |
| 183051 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 |
| 183052 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 |
| 183053 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 |
| 183054 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 |
| 183055 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 |
| 183056 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183057 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183058 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_bsub |
| 183059 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_bsub_hi |
| 183060 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_hsub |
| 183061 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_hsub_hi |
| 183062 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_ssub |
| 183063 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_ssub_hi |
| 183064 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_bsub |
| 183065 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_bsub_hi |
| 183066 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_hsub |
| 183067 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_hsub_hi |
| 183068 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_ssub |
| 183069 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_ssub_hi |
| 183070 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_bsub |
| 183071 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_bsub_hi |
| 183072 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_hsub |
| 183073 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_hsub_hi |
| 183074 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_ssub |
| 183075 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_ssub_hi |
| 183076 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub1_then_psub |
| 183077 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_dsub_hi |
| 183078 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3_then_dsub_hi |
| 183079 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_dsub_hi |
| 183080 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32common |
| 183081 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_7_then_sub_32_hi |
| 183082 | 43, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32common |
| 183083 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_then_sub_32_hi |
| 183084 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32arg |
| 183085 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_5_then_sub_32_hi |
| 183086 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32arg |
| 183087 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_then_sub_32_hi |
| 183088 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg |
| 183089 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_3_then_sub_32_hi |
| 183090 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg |
| 183091 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_then_sub_32_hi |
| 183092 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg |
| 183093 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_1_then_sub_32_hi |
| 183094 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo64_then_sub_32 |
| 183095 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo64_then_sub_32_hi |
| 183096 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_zsub_hi |
| 183097 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_zsub_hi |
| 183098 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_zsub_hi |
| 183099 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0_dsub1 |
| 183100 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0_dsub1_dsub2 |
| 183101 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_dsub2 |
| 183102 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_dsub2_dsub3 |
| 183103 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_dsub3 |
| 183104 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_dsub1 |
| 183105 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_dsub1_dsub2_dsub3 |
| 183106 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_dsub1_dsub2 |
| 183107 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0_qsub1 |
| 183108 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0_qsub1_qsub2 |
| 183109 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_qsub2 |
| 183110 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_qsub2_qsub3 |
| 183111 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_qsub3 |
| 183112 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183113 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183114 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183115 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183116 | 86, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 183117 | 51, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183118 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183119 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183120 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32_subo64_then_sub_32 |
| 183121 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_qsub1 |
| 183122 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_qsub1_qsub2_qsub3 |
| 183123 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_qsub1_qsub2 |
| 183124 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub1 |
| 183125 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub1_zsub2 |
| 183126 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub2 |
| 183127 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub2_zsub3 |
| 183128 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_zsub3 |
| 183129 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub2 |
| 183130 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub3 |
| 183131 | }, |
| 183132 | { // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183133 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 183134 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 183135 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 183136 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 183137 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 183138 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 183139 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 183140 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 183141 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 183142 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 183143 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 183144 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 183145 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 183146 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 183147 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 183148 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 183149 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 183150 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 183151 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 183152 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg |
| 183153 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 183154 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 183155 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 183156 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 183157 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 183158 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg |
| 183159 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg |
| 183160 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg |
| 183161 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg |
| 183162 | 64, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> tcGPRnotx16x17 |
| 183163 | 64, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> tcGPRnotx16x17 |
| 183164 | 69, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183165 | 69, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183166 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 183167 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 183168 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 183169 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 183170 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 183171 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 183172 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 183173 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 183174 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 183175 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 183176 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 183177 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 183178 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 183179 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 183180 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 183181 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 183182 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 183183 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 183184 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 183185 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 183186 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 183187 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 183188 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 183189 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 183190 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 183191 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 183192 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 183193 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 183194 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 183195 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 183196 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 183197 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 183198 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 183199 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 183200 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 183201 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183202 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183203 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 183204 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 183205 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 183206 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 183207 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 183208 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 183209 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 183210 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 183211 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 183212 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 183213 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 183214 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 183215 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 183216 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 183217 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 183218 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 183219 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 183220 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 183221 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 183222 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 183223 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 183224 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 183225 | 47, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183226 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 183227 | 47, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183228 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 183229 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32common |
| 183230 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 183231 | 43, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32common |
| 183232 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 183233 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg |
| 183234 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 183235 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg |
| 183236 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 183237 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg |
| 183238 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 183239 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 183240 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 183241 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 183242 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 183243 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 183244 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 183245 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 183246 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 183247 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 183248 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 183249 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 183250 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 183251 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 183252 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 183253 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 183254 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 183255 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 183256 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 183257 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183258 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183259 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183260 | 86, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 183261 | 89, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183262 | 54, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183263 | 51, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183264 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183265 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 183266 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 183267 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 183268 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 183269 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 183270 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 183271 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 183272 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 183273 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 183274 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 183275 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 183276 | }, |
| 183277 | { // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183278 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 183279 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 183280 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 183281 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 183282 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 183283 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 183284 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 183285 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 183286 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 183287 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 183288 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 183289 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 183290 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 183291 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 183292 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 183293 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 183294 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 183295 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 183296 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 183297 | 45, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg |
| 183298 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 183299 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 183300 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 183301 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 183302 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 183303 | 66, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg |
| 183304 | 66, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg |
| 183305 | 69, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183306 | 69, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183307 | 69, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183308 | 69, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183309 | 68, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183310 | 68, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183311 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 183312 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 183313 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 183314 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 183315 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 183316 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 183317 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 183318 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 183319 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 183320 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 183321 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 183322 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 183323 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 183324 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 183325 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 183326 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 183327 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 183328 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 183329 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 183330 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 183331 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 183332 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 183333 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 183334 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 183335 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 183336 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 183337 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 183338 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 183339 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 183340 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 183341 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 183342 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 183343 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 183344 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 183345 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 183346 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183347 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183348 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 183349 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 183350 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 183351 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 183352 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 183353 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 183354 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 183355 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 183356 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 183357 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 183358 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 183359 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 183360 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 183361 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 183362 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 183363 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 183364 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 183365 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 183366 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 183367 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 183368 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 183369 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 183370 | 46, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183371 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 183372 | 46, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183373 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 183374 | 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183375 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 183376 | 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183377 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 183378 | 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183379 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 183380 | 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183381 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 183382 | 45, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg |
| 183383 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 183384 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 183385 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 183386 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 183387 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 183388 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 183389 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 183390 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 183391 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 183392 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 183393 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 183394 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 183395 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 183396 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 183397 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 183398 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 183399 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 183400 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 183401 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 183402 | 52, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183403 | 87, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183404 | 89, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183405 | 89, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183406 | 88, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183407 | 53, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 183408 | 54, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183409 | 54, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183410 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 183411 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 183412 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 183413 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 183414 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 183415 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 183416 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 183417 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 183418 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 183419 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 183420 | 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 183421 | }, |
| 183422 | { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183423 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 183424 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 183425 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 183426 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 183427 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 183428 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 183429 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 183430 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 183431 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 183432 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 183433 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 183434 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 183435 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 183436 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 183437 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 183438 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 183439 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 183440 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 183441 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 183442 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 |
| 183443 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 183444 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 183445 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 183446 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 183447 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 183448 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183449 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183450 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183451 | 69, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183452 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183453 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183454 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183455 | 68, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183456 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 183457 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 183458 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 183459 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 183460 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 183461 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 183462 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 183463 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 183464 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 183465 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 183466 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 183467 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 183468 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 183469 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 183470 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 183471 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 183472 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 183473 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 183474 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 183475 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 183476 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 183477 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 183478 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 183479 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 183480 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 183481 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 183482 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 183483 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 183484 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 183485 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 183486 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 183487 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 183488 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 183489 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 183490 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 183491 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183492 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183493 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 183494 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 183495 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 183496 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 183497 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 183498 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 183499 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 183500 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 183501 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 183502 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 183503 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 183504 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 183505 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 183506 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 183507 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 183508 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 183509 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 183510 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 183511 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 183512 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 183513 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 183514 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 183515 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183516 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 183517 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183518 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 183519 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183520 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 183521 | 46, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183522 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 183523 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183524 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 183525 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183526 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 183527 | 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183528 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 183529 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 183530 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 183531 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 183532 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 183533 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 183534 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 183535 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 183536 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 183537 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 183538 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 183539 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 183540 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 183541 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 183542 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 183543 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 183544 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 183545 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 183546 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 183547 | 54, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183548 | 89, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183549 | 89, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183550 | 88, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183551 | 88, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183552 | 53, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 183553 | 53, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 183554 | 54, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183555 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 183556 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 183557 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 183558 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 183559 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 183560 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 183561 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 183562 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 183563 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 183564 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 183565 | 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 183566 | }, |
| 183567 | { // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 183568 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:bsub |
| 183569 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:bsub_hi |
| 183570 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub |
| 183571 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub0 |
| 183572 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1 |
| 183573 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2 |
| 183574 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3 |
| 183575 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub_hi |
| 183576 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:hsub |
| 183577 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:hsub_hi |
| 183578 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:psub |
| 183579 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:psub0 |
| 183580 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:psub1 |
| 183581 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub0 |
| 183582 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub1 |
| 183583 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub2 |
| 183584 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub3 |
| 183585 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:ssub |
| 183586 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:ssub_hi |
| 183587 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sub_32 -> GPR32common |
| 183588 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sub_32_hi |
| 183589 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sube32 |
| 183590 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sube64 |
| 183591 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:subo32 |
| 183592 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:subo64 |
| 183593 | 71, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_0 -> tcGPRx16x17 |
| 183594 | 74, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_1 -> tcGPRx17 |
| 183595 | 64, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_2 -> tcGPRnotx16x17 |
| 183596 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_3 -> GPR64common_and_GPR64noip |
| 183597 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_4 -> GPR64common_and_GPR64noip |
| 183598 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_5 -> GPR64common_and_GPR64noip |
| 183599 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_6 -> GPR64common_and_GPR64noip |
| 183600 | 61, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_7 -> GPR64common_and_GPR64noip |
| 183601 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubb |
| 183602 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubd0 |
| 183603 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubd1 |
| 183604 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh0 |
| 183605 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1 |
| 183606 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubq0 |
| 183607 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubq1 |
| 183608 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs0 |
| 183609 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1 |
| 183610 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub |
| 183611 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub0 |
| 183612 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub1 |
| 183613 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub2 |
| 183614 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub3 |
| 183615 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub_hi |
| 183616 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubd1_then_zasubq0 |
| 183617 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubd1_then_zasubq1 |
| 183618 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubd0 |
| 183619 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubd1 |
| 183620 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubq0 |
| 183621 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubq1 |
| 183622 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 183623 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 183624 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubd0 |
| 183625 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubd1 |
| 183626 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubq0 |
| 183627 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubq1 |
| 183628 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs0 |
| 183629 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1 |
| 183630 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 183631 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 183632 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 183633 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 183634 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 183635 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 183636 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183637 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183638 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_bsub |
| 183639 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_bsub_hi |
| 183640 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_hsub |
| 183641 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_hsub_hi |
| 183642 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_ssub |
| 183643 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_then_ssub_hi |
| 183644 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_bsub |
| 183645 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_bsub_hi |
| 183646 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_hsub |
| 183647 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_hsub_hi |
| 183648 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_ssub |
| 183649 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub3_then_ssub_hi |
| 183650 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_bsub |
| 183651 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_bsub_hi |
| 183652 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_hsub |
| 183653 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_hsub_hi |
| 183654 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_ssub |
| 183655 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_then_ssub_hi |
| 183656 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:psub1_then_psub |
| 183657 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub1_then_dsub_hi |
| 183658 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub3_then_dsub_hi |
| 183659 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub2_then_dsub_hi |
| 183660 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 183661 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 183662 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 183663 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 183664 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 183665 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 183666 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 183667 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 183668 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 183669 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 183670 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 183671 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 183672 | 43, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_1_then_sub_32 -> GPR32common |
| 183673 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 183674 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:subo64_then_sub_32 |
| 183675 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:subo64_then_sub_32_hi |
| 183676 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub1_then_zsub_hi |
| 183677 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub3_then_zsub_hi |
| 183678 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub2_then_zsub_hi |
| 183679 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub0_dsub1 |
| 183680 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub0_dsub1_dsub2 |
| 183681 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_dsub2 |
| 183682 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub1_dsub2_dsub3 |
| 183683 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub2_dsub3 |
| 183684 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub_dsub1 |
| 183685 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 183686 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:dsub_dsub1_dsub2 |
| 183687 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub0_qsub1 |
| 183688 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub0_qsub1_qsub2 |
| 183689 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub1_qsub2 |
| 183690 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub1_qsub2_qsub3 |
| 183691 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:qsub2_qsub3 |
| 183692 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183693 | 90, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 183694 | 84, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 183695 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 183696 | 82, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 183697 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183698 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183699 | 51, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183700 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:sub_32_subo64_then_sub_32 |
| 183701 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub_qsub1 |
| 183702 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 183703 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub_qsub1_qsub2 |
| 183704 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub0_zsub1 |
| 183705 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub0_zsub1_zsub2 |
| 183706 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub1_zsub2 |
| 183707 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub1_zsub2_zsub3 |
| 183708 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub2_zsub3 |
| 183709 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub0_zsub2 |
| 183710 | 0, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17:zsub1_zsub3 |
| 183711 | }, |
| 183712 | { // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183713 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 183714 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 183715 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 183716 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 183717 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 183718 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 183719 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 183720 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 183721 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 183722 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 183723 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 183724 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 183725 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 183726 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 183727 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 183728 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 183729 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 183730 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 183731 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 183732 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg |
| 183733 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 183734 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 183735 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 183736 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 183737 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 183738 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg |
| 183739 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg |
| 183740 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg |
| 183741 | 66, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg |
| 183742 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183743 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183744 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183745 | 69, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183746 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 183747 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 183748 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 183749 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 183750 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 183751 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 183752 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 183753 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 183754 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 183755 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 183756 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 183757 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 183758 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 183759 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 183760 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 183761 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 183762 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 183763 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 183764 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 183765 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 183766 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 183767 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 183768 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 183769 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 183770 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 183771 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 183772 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 183773 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 183774 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 183775 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 183776 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 183777 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 183778 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 183779 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 183780 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 183781 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183782 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183783 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 183784 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 183785 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 183786 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 183787 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 183788 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 183789 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 183790 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 183791 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 183792 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 183793 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 183794 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 183795 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 183796 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 183797 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 183798 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 183799 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 183800 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 183801 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 183802 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 183803 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 183804 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 183805 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183806 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 183807 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183808 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 183809 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183810 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 183811 | 47, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 183812 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 183813 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg |
| 183814 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 183815 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg |
| 183816 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 183817 | 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg |
| 183818 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 183819 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 183820 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 183821 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 183822 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 183823 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 183824 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 183825 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 183826 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 183827 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 183828 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 183829 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 183830 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 183831 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 183832 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 183833 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 183834 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 183835 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 183836 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 183837 | 52, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183838 | 87, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183839 | 87, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 183840 | 89, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183841 | 89, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 183842 | 54, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183843 | 54, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 183844 | 52, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 183845 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 183846 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 183847 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 183848 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 183849 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 183850 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 183851 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 183852 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 183853 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 183854 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 183855 | 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 183856 | }, |
| 183857 | { // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 183858 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:bsub |
| 183859 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:bsub_hi |
| 183860 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub |
| 183861 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub0 |
| 183862 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1 |
| 183863 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2 |
| 183864 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3 |
| 183865 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub_hi |
| 183866 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:hsub |
| 183867 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:hsub_hi |
| 183868 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:psub |
| 183869 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:psub0 |
| 183870 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:psub1 |
| 183871 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub0 |
| 183872 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub1 |
| 183873 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub2 |
| 183874 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub3 |
| 183875 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:ssub |
| 183876 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:ssub_hi |
| 183877 | 46, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sub_32 -> MatrixIndexGPR32_12_15 |
| 183878 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sub_32_hi |
| 183879 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sube32 |
| 183880 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sube64 |
| 183881 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:subo32 |
| 183882 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:subo64 |
| 183883 | 68, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183884 | 68, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183885 | 71, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_2 -> tcGPRx16x17 |
| 183886 | 74, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_3 -> tcGPRx17 |
| 183887 | 64, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_4 -> tcGPRnotx16x17 |
| 183888 | 61, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_5 -> GPR64common_and_GPR64noip |
| 183889 | 61, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_6 -> GPR64common_and_GPR64noip |
| 183890 | 61, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_7 -> GPR64common_and_GPR64noip |
| 183891 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubb |
| 183892 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubd0 |
| 183893 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubd1 |
| 183894 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh0 |
| 183895 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1 |
| 183896 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubq0 |
| 183897 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubq1 |
| 183898 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs0 |
| 183899 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1 |
| 183900 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub |
| 183901 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub0 |
| 183902 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub1 |
| 183903 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub2 |
| 183904 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub3 |
| 183905 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub_hi |
| 183906 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubd1_then_zasubq0 |
| 183907 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubd1_then_zasubq1 |
| 183908 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubd0 |
| 183909 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubd1 |
| 183910 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubq0 |
| 183911 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubq1 |
| 183912 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 183913 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 183914 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubd0 |
| 183915 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubd1 |
| 183916 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubq0 |
| 183917 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubq1 |
| 183918 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs0 |
| 183919 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1 |
| 183920 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 183921 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 183922 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 183923 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 183924 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 183925 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 183926 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 183927 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 183928 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_bsub |
| 183929 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_bsub_hi |
| 183930 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_hsub |
| 183931 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_hsub_hi |
| 183932 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_ssub |
| 183933 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_then_ssub_hi |
| 183934 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_bsub |
| 183935 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_bsub_hi |
| 183936 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_hsub |
| 183937 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_hsub_hi |
| 183938 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_ssub |
| 183939 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub3_then_ssub_hi |
| 183940 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_bsub |
| 183941 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_bsub_hi |
| 183942 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_hsub |
| 183943 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_hsub_hi |
| 183944 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_ssub |
| 183945 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_then_ssub_hi |
| 183946 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:psub1_then_psub |
| 183947 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub1_then_dsub_hi |
| 183948 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub3_then_dsub_hi |
| 183949 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub2_then_dsub_hi |
| 183950 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 183951 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 183952 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 183953 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 183954 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 183955 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 183956 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 183957 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 183958 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_3_then_sub_32 -> GPR32common |
| 183959 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 183960 | 43, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_2_then_sub_32 -> GPR32common |
| 183961 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 183962 | 46, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 183963 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 183964 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:subo64_then_sub_32 |
| 183965 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:subo64_then_sub_32_hi |
| 183966 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub1_then_zsub_hi |
| 183967 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub3_then_zsub_hi |
| 183968 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub2_then_zsub_hi |
| 183969 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub0_dsub1 |
| 183970 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub0_dsub1_dsub2 |
| 183971 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_dsub2 |
| 183972 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub1_dsub2_dsub3 |
| 183973 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub2_dsub3 |
| 183974 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub_dsub1 |
| 183975 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 183976 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:dsub_dsub1_dsub2 |
| 183977 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub0_qsub1 |
| 183978 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub0_qsub1_qsub2 |
| 183979 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub1_qsub2 |
| 183980 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub1_qsub2_qsub3 |
| 183981 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:qsub2_qsub3 |
| 183982 | 53, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 183983 | 88, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 183984 | 90, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 183985 | 84, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 183986 | 82, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 183987 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183988 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183989 | 51, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 183990 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:sub_32_subo64_then_sub_32 |
| 183991 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub_qsub1 |
| 183992 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 183993 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub_qsub1_qsub2 |
| 183994 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub0_zsub1 |
| 183995 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub0_zsub1_zsub2 |
| 183996 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub1_zsub2 |
| 183997 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub1_zsub2_zsub3 |
| 183998 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub2_zsub3 |
| 183999 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub0_zsub2 |
| 184000 | 0, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17:zsub1_zsub3 |
| 184001 | }, |
| 184002 | { // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184003 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub |
| 184004 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub_hi |
| 184005 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub |
| 184006 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 |
| 184007 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 |
| 184008 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 |
| 184009 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 |
| 184010 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_hi |
| 184011 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub |
| 184012 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub_hi |
| 184013 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub |
| 184014 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 |
| 184015 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 |
| 184016 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 |
| 184017 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 |
| 184018 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 |
| 184019 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 |
| 184020 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub |
| 184021 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub_hi |
| 184022 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg |
| 184023 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_hi |
| 184024 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 |
| 184025 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 |
| 184026 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 |
| 184027 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 |
| 184028 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg |
| 184029 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg |
| 184030 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg |
| 184031 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg |
| 184032 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64arg |
| 184033 | 66, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64arg |
| 184034 | 69, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184035 | 69, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184036 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb |
| 184037 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 |
| 184038 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 |
| 184039 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 |
| 184040 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 |
| 184041 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 |
| 184042 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 |
| 184043 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 |
| 184044 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 |
| 184045 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub |
| 184046 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 |
| 184047 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 |
| 184048 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 |
| 184049 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 |
| 184050 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi |
| 184051 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 |
| 184052 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 |
| 184053 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 |
| 184054 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 |
| 184055 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 |
| 184056 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 |
| 184057 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 |
| 184058 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 |
| 184059 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 |
| 184060 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 |
| 184061 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 |
| 184062 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 |
| 184063 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 |
| 184064 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 |
| 184065 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 |
| 184066 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 |
| 184067 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 |
| 184068 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 |
| 184069 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 |
| 184070 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 |
| 184071 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184072 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184073 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub |
| 184074 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub_hi |
| 184075 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub |
| 184076 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub_hi |
| 184077 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub |
| 184078 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub_hi |
| 184079 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub |
| 184080 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub_hi |
| 184081 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub |
| 184082 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub_hi |
| 184083 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub |
| 184084 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub_hi |
| 184085 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub |
| 184086 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub_hi |
| 184087 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub |
| 184088 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub_hi |
| 184089 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub |
| 184090 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub_hi |
| 184091 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1_then_psub |
| 184092 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_hi |
| 184093 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub_hi |
| 184094 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_hi |
| 184095 | 47, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 184096 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32_hi |
| 184097 | 47, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 184098 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_hi |
| 184099 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32arg |
| 184100 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32_hi |
| 184101 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32arg |
| 184102 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_hi |
| 184103 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg |
| 184104 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32_hi |
| 184105 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg |
| 184106 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_hi |
| 184107 | 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg |
| 184108 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32_hi |
| 184109 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 |
| 184110 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32_hi |
| 184111 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi |
| 184112 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi |
| 184113 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi |
| 184114 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 |
| 184115 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 |
| 184116 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 |
| 184117 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 |
| 184118 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 |
| 184119 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1 |
| 184120 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2_dsub3 |
| 184121 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_dsub1_dsub2 |
| 184122 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 |
| 184123 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 |
| 184124 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 |
| 184125 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 |
| 184126 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 |
| 184127 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184128 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184129 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184130 | 87, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184131 | 89, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184132 | 54, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 184133 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184134 | 52, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184135 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 |
| 184136 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1 |
| 184137 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2_qsub3 |
| 184138 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_qsub1_qsub2 |
| 184139 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 |
| 184140 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 |
| 184141 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 |
| 184142 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 |
| 184143 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 |
| 184144 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 |
| 184145 | 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 |
| 184146 | }, |
| 184147 | { // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 184148 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:bsub |
| 184149 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:bsub_hi |
| 184150 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub |
| 184151 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub0 |
| 184152 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1 |
| 184153 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2 |
| 184154 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3 |
| 184155 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub_hi |
| 184156 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:hsub |
| 184157 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:hsub_hi |
| 184158 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:psub |
| 184159 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:psub0 |
| 184160 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:psub1 |
| 184161 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub0 |
| 184162 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub1 |
| 184163 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub2 |
| 184164 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub3 |
| 184165 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:ssub |
| 184166 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:ssub_hi |
| 184167 | 46, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sub_32 -> MatrixIndexGPR32_12_15 |
| 184168 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sub_32_hi |
| 184169 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sube32 |
| 184170 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sube64 |
| 184171 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:subo32 |
| 184172 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:subo64 |
| 184173 | 68, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184174 | 68, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184175 | 68, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184176 | 68, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184177 | 71, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_4 -> tcGPRx16x17 |
| 184178 | 74, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_5 -> tcGPRx17 |
| 184179 | 64, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_6 -> tcGPRnotx16x17 |
| 184180 | 61, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_7 -> GPR64common_and_GPR64noip |
| 184181 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubb |
| 184182 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubd0 |
| 184183 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubd1 |
| 184184 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh0 |
| 184185 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1 |
| 184186 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubq0 |
| 184187 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubq1 |
| 184188 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs0 |
| 184189 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1 |
| 184190 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub |
| 184191 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub0 |
| 184192 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub1 |
| 184193 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub2 |
| 184194 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub3 |
| 184195 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub_hi |
| 184196 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubd1_then_zasubq0 |
| 184197 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubd1_then_zasubq1 |
| 184198 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubd0 |
| 184199 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubd1 |
| 184200 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubq0 |
| 184201 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubq1 |
| 184202 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 184203 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 184204 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubd0 |
| 184205 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubd1 |
| 184206 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubq0 |
| 184207 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubq1 |
| 184208 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs0 |
| 184209 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1 |
| 184210 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 184211 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 184212 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 184213 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 184214 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 184215 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 184216 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184217 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184218 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_bsub |
| 184219 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_bsub_hi |
| 184220 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_hsub |
| 184221 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_hsub_hi |
| 184222 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_ssub |
| 184223 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_then_ssub_hi |
| 184224 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_bsub |
| 184225 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_bsub_hi |
| 184226 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_hsub |
| 184227 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_hsub_hi |
| 184228 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_ssub |
| 184229 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub3_then_ssub_hi |
| 184230 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_bsub |
| 184231 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_bsub_hi |
| 184232 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_hsub |
| 184233 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_hsub_hi |
| 184234 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_ssub |
| 184235 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_then_ssub_hi |
| 184236 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:psub1_then_psub |
| 184237 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub1_then_dsub_hi |
| 184238 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub3_then_dsub_hi |
| 184239 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub2_then_dsub_hi |
| 184240 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 184241 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 184242 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 184243 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 184244 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_5_then_sub_32 -> GPR32common |
| 184245 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 184246 | 43, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_4_then_sub_32 -> GPR32common |
| 184247 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 184248 | 46, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184249 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 184250 | 46, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184251 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 184252 | 46, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184253 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 184254 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:subo64_then_sub_32 |
| 184255 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:subo64_then_sub_32_hi |
| 184256 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub1_then_zsub_hi |
| 184257 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub3_then_zsub_hi |
| 184258 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub2_then_zsub_hi |
| 184259 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub0_dsub1 |
| 184260 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub0_dsub1_dsub2 |
| 184261 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_dsub2 |
| 184262 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub1_dsub2_dsub3 |
| 184263 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub2_dsub3 |
| 184264 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub_dsub1 |
| 184265 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 184266 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:dsub_dsub1_dsub2 |
| 184267 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub0_qsub1 |
| 184268 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub0_qsub1_qsub2 |
| 184269 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub1_qsub2 |
| 184270 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub1_qsub2_qsub3 |
| 184271 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:qsub2_qsub3 |
| 184272 | 53, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 184273 | 88, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184274 | 88, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184275 | 90, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 184276 | 84, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 184277 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184278 | 51, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184279 | 53, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 184280 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:sub_32_subo64_then_sub_32 |
| 184281 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub_qsub1 |
| 184282 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 184283 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub_qsub1_qsub2 |
| 184284 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub0_zsub1 |
| 184285 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub0_zsub1_zsub2 |
| 184286 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub1_zsub2 |
| 184287 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub1_zsub2_zsub3 |
| 184288 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub2_zsub3 |
| 184289 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub0_zsub2 |
| 184290 | 0, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17:zsub1_zsub3 |
| 184291 | }, |
| 184292 | { // GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 184293 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:bsub |
| 184294 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:bsub_hi |
| 184295 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub |
| 184296 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0 |
| 184297 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1 |
| 184298 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2 |
| 184299 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3 |
| 184300 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_hi |
| 184301 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:hsub |
| 184302 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:hsub_hi |
| 184303 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub |
| 184304 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub0 |
| 184305 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub1 |
| 184306 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0 |
| 184307 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1 |
| 184308 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2 |
| 184309 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3 |
| 184310 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:ssub |
| 184311 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:ssub_hi |
| 184312 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32 -> GPR32arg |
| 184313 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32_hi |
| 184314 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sube32 |
| 184315 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sube64 |
| 184316 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo32 |
| 184317 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo64 |
| 184318 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_0 -> GPR64arg |
| 184319 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_1 -> GPR64arg |
| 184320 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2 -> GPR64arg |
| 184321 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_3 -> GPR64arg |
| 184322 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4 -> GPR64arg |
| 184323 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_5 -> GPR64arg |
| 184324 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6 -> GPR64arg |
| 184325 | 66, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_7 -> GPR64arg |
| 184326 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubb |
| 184327 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd0 |
| 184328 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1 |
| 184329 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh0 |
| 184330 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1 |
| 184331 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubq0 |
| 184332 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubq1 |
| 184333 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs0 |
| 184334 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1 |
| 184335 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub |
| 184336 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0 |
| 184337 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1 |
| 184338 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2 |
| 184339 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3 |
| 184340 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_hi |
| 184341 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1_then_zasubq0 |
| 184342 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1_then_zasubq1 |
| 184343 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd0 |
| 184344 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1 |
| 184345 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubq0 |
| 184346 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubq1 |
| 184347 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 |
| 184348 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 |
| 184349 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd0 |
| 184350 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1 |
| 184351 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubq0 |
| 184352 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubq1 |
| 184353 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs0 |
| 184354 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1 |
| 184355 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 |
| 184356 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 |
| 184357 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 |
| 184358 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 |
| 184359 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 |
| 184360 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 |
| 184361 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184362 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184363 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_bsub |
| 184364 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_bsub_hi |
| 184365 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_hsub |
| 184366 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_hsub_hi |
| 184367 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_ssub |
| 184368 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_ssub_hi |
| 184369 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_bsub |
| 184370 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_bsub_hi |
| 184371 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_hsub |
| 184372 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_hsub_hi |
| 184373 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_ssub |
| 184374 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_ssub_hi |
| 184375 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_bsub |
| 184376 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_bsub_hi |
| 184377 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_hsub |
| 184378 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_hsub_hi |
| 184379 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_ssub |
| 184380 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_ssub_hi |
| 184381 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub1_then_psub |
| 184382 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_dsub_hi |
| 184383 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3_then_dsub_hi |
| 184384 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_dsub_hi |
| 184385 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32arg |
| 184386 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_7_then_sub_32_hi |
| 184387 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32arg |
| 184388 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_then_sub_32_hi |
| 184389 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32arg |
| 184390 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_5_then_sub_32_hi |
| 184391 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32arg |
| 184392 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_then_sub_32_hi |
| 184393 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg |
| 184394 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_3_then_sub_32_hi |
| 184395 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg |
| 184396 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_then_sub_32_hi |
| 184397 | 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg |
| 184398 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_1_then_sub_32_hi |
| 184399 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo64_then_sub_32 |
| 184400 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo64_then_sub_32_hi |
| 184401 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_zsub_hi |
| 184402 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_zsub_hi |
| 184403 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_zsub_hi |
| 184404 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0_dsub1 |
| 184405 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0_dsub1_dsub2 |
| 184406 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_dsub2 |
| 184407 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_dsub2_dsub3 |
| 184408 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_dsub3 |
| 184409 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_dsub1 |
| 184410 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_dsub1_dsub2_dsub3 |
| 184411 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_dsub1_dsub2 |
| 184412 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0_qsub1 |
| 184413 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0_qsub1_qsub2 |
| 184414 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_qsub2 |
| 184415 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_qsub2_qsub3 |
| 184416 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_qsub3 |
| 184417 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184418 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184419 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184420 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184421 | 87, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64arg |
| 184422 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184423 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184424 | 52, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg |
| 184425 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32_subo64_then_sub_32 |
| 184426 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_qsub1 |
| 184427 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_qsub1_qsub2_qsub3 |
| 184428 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_qsub1_qsub2 |
| 184429 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub1 |
| 184430 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub1_zsub2 |
| 184431 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub2 |
| 184432 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub2_zsub3 |
| 184433 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_zsub3 |
| 184434 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub2 |
| 184435 | 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub3 |
| 184436 | }, |
| 184437 | { // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 184438 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:bsub |
| 184439 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:bsub_hi |
| 184440 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub |
| 184441 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub0 |
| 184442 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1 |
| 184443 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2 |
| 184444 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3 |
| 184445 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub_hi |
| 184446 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:hsub |
| 184447 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:hsub_hi |
| 184448 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:psub |
| 184449 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:psub0 |
| 184450 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:psub1 |
| 184451 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub0 |
| 184452 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub1 |
| 184453 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub2 |
| 184454 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub3 |
| 184455 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:ssub |
| 184456 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:ssub_hi |
| 184457 | 47, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sub_32 -> MatrixIndexGPR32_8_11 |
| 184458 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sub_32_hi |
| 184459 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sube32 |
| 184460 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sube64 |
| 184461 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:subo32 |
| 184462 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:subo64 |
| 184463 | 69, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184464 | 69, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184465 | 68, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184466 | 68, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184467 | 68, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184468 | 68, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184469 | 71, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_6 -> tcGPRx16x17 |
| 184470 | 74, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_7 -> tcGPRx17 |
| 184471 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubb |
| 184472 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubd0 |
| 184473 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubd1 |
| 184474 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh0 |
| 184475 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1 |
| 184476 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubq0 |
| 184477 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubq1 |
| 184478 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs0 |
| 184479 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1 |
| 184480 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub |
| 184481 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub0 |
| 184482 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub1 |
| 184483 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub2 |
| 184484 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub3 |
| 184485 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub_hi |
| 184486 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubd1_then_zasubq0 |
| 184487 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubd1_then_zasubq1 |
| 184488 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubd0 |
| 184489 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubd1 |
| 184490 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubq0 |
| 184491 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubq1 |
| 184492 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq0 |
| 184493 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubs1_then_zasubd1_then_zasubq1 |
| 184494 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubd0 |
| 184495 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubd1 |
| 184496 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubq0 |
| 184497 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubq1 |
| 184498 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs0 |
| 184499 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1 |
| 184500 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq0 |
| 184501 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubd1_then_zasubq1 |
| 184502 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd0 |
| 184503 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1 |
| 184504 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq0 |
| 184505 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubq1 |
| 184506 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184507 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184508 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_bsub |
| 184509 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_bsub_hi |
| 184510 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_hsub |
| 184511 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_hsub_hi |
| 184512 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_ssub |
| 184513 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_then_ssub_hi |
| 184514 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_bsub |
| 184515 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_bsub_hi |
| 184516 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_hsub |
| 184517 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_hsub_hi |
| 184518 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_ssub |
| 184519 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub3_then_ssub_hi |
| 184520 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_bsub |
| 184521 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_bsub_hi |
| 184522 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_hsub |
| 184523 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_hsub_hi |
| 184524 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_ssub |
| 184525 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_then_ssub_hi |
| 184526 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:psub1_then_psub |
| 184527 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub1_then_dsub_hi |
| 184528 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub3_then_dsub_hi |
| 184529 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub2_then_dsub_hi |
| 184530 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_7_then_sub_32 -> GPR32common |
| 184531 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_7_then_sub_32_hi |
| 184532 | 43, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_6_then_sub_32 -> GPR32common |
| 184533 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_6_then_sub_32_hi |
| 184534 | 46, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184535 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_5_then_sub_32_hi |
| 184536 | 46, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184537 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_4_then_sub_32_hi |
| 184538 | 46, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184539 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_3_then_sub_32_hi |
| 184540 | 46, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 |
| 184541 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_2_then_sub_32_hi |
| 184542 | 47, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 |
| 184543 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_1_then_sub_32_hi |
| 184544 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:subo64_then_sub_32 |
| 184545 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:subo64_then_sub_32_hi |
| 184546 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub1_then_zsub_hi |
| 184547 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub3_then_zsub_hi |
| 184548 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub2_then_zsub_hi |
| 184549 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub0_dsub1 |
| 184550 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub0_dsub1_dsub2 |
| 184551 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_dsub2 |
| 184552 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub1_dsub2_dsub3 |
| 184553 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub2_dsub3 |
| 184554 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub_dsub1 |
| 184555 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub_dsub1_dsub2_dsub3 |
| 184556 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:dsub_dsub1_dsub2 |
| 184557 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub0_qsub1 |
| 184558 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub0_qsub1_qsub2 |
| 184559 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub1_qsub2 |
| 184560 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub1_qsub2_qsub3 |
| 184561 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:qsub2_qsub3 |
| 184562 | 54, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 184563 | 89, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 184564 | 88, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184565 | 88, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 184566 | 90, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 184567 | 51, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184568 | 53, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 184569 | 53, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 184570 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:sub_32_subo64_then_sub_32 |
| 184571 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub_qsub1 |
| 184572 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub_qsub1_qsub2_qsub3 |
| 184573 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub_qsub1_qsub2 |
| 184574 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub0_zsub1 |
| 184575 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub0_zsub1_zsub2 |
| 184576 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub1_zsub2 |
| 184577 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub1_zsub2_zsub3 |
| 184578 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub2_zsub3 |
| 184579 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub0_zsub2 |
| 184580 | 0, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17:zsub1_zsub3 |
| 184581 | }, |
| 184582 | { // GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 184583 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:bsub |
| 184584 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:bsub_hi |
| 184585 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub |
| 184586 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0 |
| 184587 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1 |
| 184588 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2 |
| 184589 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3 |
| 184590 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_hi |
| 184591 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:hsub |
| 184592 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:hsub_hi |
| 184593 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub |
| 184594 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub0 |
| 184595 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub1 |
| 184596 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0 |
| 184597 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1 |
| 184598 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2 |
| 184599 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3 |
| 184600 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:ssub |
| 184601 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:ssub_hi |
| 184602 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32 -> GPR32common |
| 184603 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32_hi |
| 184604 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sube32 |
| 184605 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sube64 |
| 184606 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo32 |
| 184607 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo64 |
| 184608 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_0 -> GPR64common_and_GPR64noip |
| 184609 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_1 -> GPR64common_and_GPR64noip |
| 184610 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2 -> GPR64common_and_GPR64noip |
| 184611 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_3 -> GPR64common_and_GPR64noip |
| 184612 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4 -> GPR64common_and_GPR64noip |
| 184613 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_5 -> GPR64common_and_GPR64noip |
| 184614 | 61, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6 -> GPR64common_and_GPR64noip |
| 184615 | 72, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_7 -> FIXED_REGS_and_GPR64 |
| 184616 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubb |
| 184617 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd0 |
| 184618 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1 |
| 184619 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh0 |
| 184620 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1 |
| 184621 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubq0 |
| 184622 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubq1 |
| 184623 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs0 |
| 184624 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1 |
| 184625 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub |
| 184626 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0 |
| 184627 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1 |
| 184628 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2 |
| 184629 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3 |
| 184630 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_hi |
| 184631 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1_then_zasubq0 |
| 184632 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1_then_zasubq1 |
| 184633 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd0 |
| 184634 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1 |
| 184635 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubq0 |
| 184636 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubq1 |
| 184637 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 |
| 184638 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 |
| 184639 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd0 |
| 184640 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1 |
| 184641 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubq0 |
| 184642 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubq1 |
| 184643 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs0 |
| 184644 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1 |
| 184645 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 |
| 184646 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 |
| 184647 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 |
| 184648 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 |
| 184649 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 |
| 184650 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 |
| 184651 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184652 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184653 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_bsub |
| 184654 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_bsub_hi |
| 184655 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_hsub |
| 184656 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_hsub_hi |
| 184657 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_ssub |
| 184658 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_ssub_hi |
| 184659 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_bsub |
| 184660 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_bsub_hi |
| 184661 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_hsub |
| 184662 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_hsub_hi |
| 184663 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_ssub |
| 184664 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_ssub_hi |
| 184665 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_bsub |
| 184666 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_bsub_hi |
| 184667 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_hsub |
| 184668 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_hsub_hi |
| 184669 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_ssub |
| 184670 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_ssub_hi |
| 184671 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub1_then_psub |
| 184672 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_dsub_hi |
| 184673 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3_then_dsub_hi |
| 184674 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_dsub_hi |
| 184675 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_7_then_sub_32 -> GPR32common |
| 184676 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_7_then_sub_32_hi |
| 184677 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_then_sub_32 -> GPR32common |
| 184678 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_then_sub_32_hi |
| 184679 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_5_then_sub_32 -> GPR32common |
| 184680 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_5_then_sub_32_hi |
| 184681 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_then_sub_32 -> GPR32common |
| 184682 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_then_sub_32_hi |
| 184683 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_3_then_sub_32 -> GPR32common |
| 184684 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_3_then_sub_32_hi |
| 184685 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_then_sub_32 -> GPR32common |
| 184686 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_then_sub_32_hi |
| 184687 | 43, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_1_then_sub_32 -> GPR32common |
| 184688 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_1_then_sub_32_hi |
| 184689 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo64_then_sub_32 |
| 184690 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo64_then_sub_32_hi |
| 184691 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_zsub_hi |
| 184692 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_zsub_hi |
| 184693 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_zsub_hi |
| 184694 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0_dsub1 |
| 184695 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0_dsub1_dsub2 |
| 184696 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_dsub2 |
| 184697 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_dsub2_dsub3 |
| 184698 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_dsub3 |
| 184699 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_dsub1 |
| 184700 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_dsub1_dsub2_dsub3 |
| 184701 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_dsub1_dsub2 |
| 184702 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0_qsub1 |
| 184703 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0_qsub1_qsub2 |
| 184704 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_qsub2 |
| 184705 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_qsub2_qsub3 |
| 184706 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_qsub3 |
| 184707 | 51, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184708 | 82, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 184709 | 82, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 184710 | 82, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip |
| 184711 | 91, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 184712 | 51, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184713 | 51, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184714 | 51, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common |
| 184715 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32_subo64_then_sub_32 |
| 184716 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_qsub1 |
| 184717 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_qsub1_qsub2_qsub3 |
| 184718 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_qsub1_qsub2 |
| 184719 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub1 |
| 184720 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub1_zsub2 |
| 184721 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub2 |
| 184722 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub2_zsub3 |
| 184723 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_zsub3 |
| 184724 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub2 |
| 184725 | 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub3 |
| 184726 | }, |
| 184727 | { // ZTR |
| 184728 | 0, // ZTR:bsub |
| 184729 | 0, // ZTR:bsub_hi |
| 184730 | 0, // ZTR:dsub |
| 184731 | 0, // ZTR:dsub0 |
| 184732 | 0, // ZTR:dsub1 |
| 184733 | 0, // ZTR:dsub2 |
| 184734 | 0, // ZTR:dsub3 |
| 184735 | 0, // ZTR:dsub_hi |
| 184736 | 0, // ZTR:hsub |
| 184737 | 0, // ZTR:hsub_hi |
| 184738 | 0, // ZTR:psub |
| 184739 | 0, // ZTR:psub0 |
| 184740 | 0, // ZTR:psub1 |
| 184741 | 0, // ZTR:qsub0 |
| 184742 | 0, // ZTR:qsub1 |
| 184743 | 0, // ZTR:qsub2 |
| 184744 | 0, // ZTR:qsub3 |
| 184745 | 0, // ZTR:ssub |
| 184746 | 0, // ZTR:ssub_hi |
| 184747 | 0, // ZTR:sub_32 |
| 184748 | 0, // ZTR:sub_32_hi |
| 184749 | 0, // ZTR:sube32 |
| 184750 | 0, // ZTR:sube64 |
| 184751 | 0, // ZTR:subo32 |
| 184752 | 0, // ZTR:subo64 |
| 184753 | 0, // ZTR:x8sub_0 |
| 184754 | 0, // ZTR:x8sub_1 |
| 184755 | 0, // ZTR:x8sub_2 |
| 184756 | 0, // ZTR:x8sub_3 |
| 184757 | 0, // ZTR:x8sub_4 |
| 184758 | 0, // ZTR:x8sub_5 |
| 184759 | 0, // ZTR:x8sub_6 |
| 184760 | 0, // ZTR:x8sub_7 |
| 184761 | 0, // ZTR:zasubb |
| 184762 | 0, // ZTR:zasubd0 |
| 184763 | 0, // ZTR:zasubd1 |
| 184764 | 0, // ZTR:zasubh0 |
| 184765 | 0, // ZTR:zasubh1 |
| 184766 | 0, // ZTR:zasubq0 |
| 184767 | 0, // ZTR:zasubq1 |
| 184768 | 0, // ZTR:zasubs0 |
| 184769 | 0, // ZTR:zasubs1 |
| 184770 | 0, // ZTR:zsub |
| 184771 | 0, // ZTR:zsub0 |
| 184772 | 0, // ZTR:zsub1 |
| 184773 | 0, // ZTR:zsub2 |
| 184774 | 0, // ZTR:zsub3 |
| 184775 | 0, // ZTR:zsub_hi |
| 184776 | 0, // ZTR:zasubd1_then_zasubq0 |
| 184777 | 0, // ZTR:zasubd1_then_zasubq1 |
| 184778 | 0, // ZTR:zasubs1_then_zasubd0 |
| 184779 | 0, // ZTR:zasubs1_then_zasubd1 |
| 184780 | 0, // ZTR:zasubs1_then_zasubq0 |
| 184781 | 0, // ZTR:zasubs1_then_zasubq1 |
| 184782 | 0, // ZTR:zasubs1_then_zasubd1_then_zasubq0 |
| 184783 | 0, // ZTR:zasubs1_then_zasubd1_then_zasubq1 |
| 184784 | 0, // ZTR:zasubh1_then_zasubd0 |
| 184785 | 0, // ZTR:zasubh1_then_zasubd1 |
| 184786 | 0, // ZTR:zasubh1_then_zasubq0 |
| 184787 | 0, // ZTR:zasubh1_then_zasubq1 |
| 184788 | 0, // ZTR:zasubh1_then_zasubs0 |
| 184789 | 0, // ZTR:zasubh1_then_zasubs1 |
| 184790 | 0, // ZTR:zasubh1_then_zasubd1_then_zasubq0 |
| 184791 | 0, // ZTR:zasubh1_then_zasubd1_then_zasubq1 |
| 184792 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubd0 |
| 184793 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1 |
| 184794 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubq0 |
| 184795 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubq1 |
| 184796 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184797 | 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184798 | 0, // ZTR:dsub1_then_bsub |
| 184799 | 0, // ZTR:dsub1_then_bsub_hi |
| 184800 | 0, // ZTR:dsub1_then_hsub |
| 184801 | 0, // ZTR:dsub1_then_hsub_hi |
| 184802 | 0, // ZTR:dsub1_then_ssub |
| 184803 | 0, // ZTR:dsub1_then_ssub_hi |
| 184804 | 0, // ZTR:dsub3_then_bsub |
| 184805 | 0, // ZTR:dsub3_then_bsub_hi |
| 184806 | 0, // ZTR:dsub3_then_hsub |
| 184807 | 0, // ZTR:dsub3_then_hsub_hi |
| 184808 | 0, // ZTR:dsub3_then_ssub |
| 184809 | 0, // ZTR:dsub3_then_ssub_hi |
| 184810 | 0, // ZTR:dsub2_then_bsub |
| 184811 | 0, // ZTR:dsub2_then_bsub_hi |
| 184812 | 0, // ZTR:dsub2_then_hsub |
| 184813 | 0, // ZTR:dsub2_then_hsub_hi |
| 184814 | 0, // ZTR:dsub2_then_ssub |
| 184815 | 0, // ZTR:dsub2_then_ssub_hi |
| 184816 | 0, // ZTR:psub1_then_psub |
| 184817 | 0, // ZTR:qsub1_then_dsub_hi |
| 184818 | 0, // ZTR:qsub3_then_dsub_hi |
| 184819 | 0, // ZTR:qsub2_then_dsub_hi |
| 184820 | 0, // ZTR:x8sub_7_then_sub_32 |
| 184821 | 0, // ZTR:x8sub_7_then_sub_32_hi |
| 184822 | 0, // ZTR:x8sub_6_then_sub_32 |
| 184823 | 0, // ZTR:x8sub_6_then_sub_32_hi |
| 184824 | 0, // ZTR:x8sub_5_then_sub_32 |
| 184825 | 0, // ZTR:x8sub_5_then_sub_32_hi |
| 184826 | 0, // ZTR:x8sub_4_then_sub_32 |
| 184827 | 0, // ZTR:x8sub_4_then_sub_32_hi |
| 184828 | 0, // ZTR:x8sub_3_then_sub_32 |
| 184829 | 0, // ZTR:x8sub_3_then_sub_32_hi |
| 184830 | 0, // ZTR:x8sub_2_then_sub_32 |
| 184831 | 0, // ZTR:x8sub_2_then_sub_32_hi |
| 184832 | 0, // ZTR:x8sub_1_then_sub_32 |
| 184833 | 0, // ZTR:x8sub_1_then_sub_32_hi |
| 184834 | 0, // ZTR:subo64_then_sub_32 |
| 184835 | 0, // ZTR:subo64_then_sub_32_hi |
| 184836 | 0, // ZTR:zsub1_then_zsub_hi |
| 184837 | 0, // ZTR:zsub3_then_zsub_hi |
| 184838 | 0, // ZTR:zsub2_then_zsub_hi |
| 184839 | 0, // ZTR:dsub0_dsub1 |
| 184840 | 0, // ZTR:dsub0_dsub1_dsub2 |
| 184841 | 0, // ZTR:dsub1_dsub2 |
| 184842 | 0, // ZTR:dsub1_dsub2_dsub3 |
| 184843 | 0, // ZTR:dsub2_dsub3 |
| 184844 | 0, // ZTR:dsub_dsub1 |
| 184845 | 0, // ZTR:dsub_dsub1_dsub2_dsub3 |
| 184846 | 0, // ZTR:dsub_dsub1_dsub2 |
| 184847 | 0, // ZTR:qsub0_qsub1 |
| 184848 | 0, // ZTR:qsub0_qsub1_qsub2 |
| 184849 | 0, // ZTR:qsub1_qsub2 |
| 184850 | 0, // ZTR:qsub1_qsub2_qsub3 |
| 184851 | 0, // ZTR:qsub2_qsub3 |
| 184852 | 0, // ZTR:sub_32_x8sub_1_then_sub_32 |
| 184853 | 0, // ZTR:x8sub_0_x8sub_1 |
| 184854 | 0, // ZTR:x8sub_2_x8sub_3 |
| 184855 | 0, // ZTR:x8sub_4_x8sub_5 |
| 184856 | 0, // ZTR:x8sub_6_x8sub_7 |
| 184857 | 0, // ZTR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 184858 | 0, // ZTR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 184859 | 0, // ZTR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 184860 | 0, // ZTR:sub_32_subo64_then_sub_32 |
| 184861 | 0, // ZTR:zsub_qsub1 |
| 184862 | 0, // ZTR:zsub_qsub1_qsub2_qsub3 |
| 184863 | 0, // ZTR:zsub_qsub1_qsub2 |
| 184864 | 0, // ZTR:zsub0_zsub1 |
| 184865 | 0, // ZTR:zsub0_zsub1_zsub2 |
| 184866 | 0, // ZTR:zsub1_zsub2 |
| 184867 | 0, // ZTR:zsub1_zsub2_zsub3 |
| 184868 | 0, // ZTR:zsub2_zsub3 |
| 184869 | 0, // ZTR:zsub0_zsub2 |
| 184870 | 0, // ZTR:zsub1_zsub3 |
| 184871 | }, |
| 184872 | { // MPR16 |
| 184873 | 0, // MPR16:bsub |
| 184874 | 0, // MPR16:bsub_hi |
| 184875 | 0, // MPR16:dsub |
| 184876 | 0, // MPR16:dsub0 |
| 184877 | 0, // MPR16:dsub1 |
| 184878 | 0, // MPR16:dsub2 |
| 184879 | 0, // MPR16:dsub3 |
| 184880 | 0, // MPR16:dsub_hi |
| 184881 | 0, // MPR16:hsub |
| 184882 | 0, // MPR16:hsub_hi |
| 184883 | 0, // MPR16:psub |
| 184884 | 0, // MPR16:psub0 |
| 184885 | 0, // MPR16:psub1 |
| 184886 | 0, // MPR16:qsub0 |
| 184887 | 0, // MPR16:qsub1 |
| 184888 | 0, // MPR16:qsub2 |
| 184889 | 0, // MPR16:qsub3 |
| 184890 | 0, // MPR16:ssub |
| 184891 | 0, // MPR16:ssub_hi |
| 184892 | 0, // MPR16:sub_32 |
| 184893 | 0, // MPR16:sub_32_hi |
| 184894 | 0, // MPR16:sube32 |
| 184895 | 0, // MPR16:sube64 |
| 184896 | 0, // MPR16:subo32 |
| 184897 | 0, // MPR16:subo64 |
| 184898 | 0, // MPR16:x8sub_0 |
| 184899 | 0, // MPR16:x8sub_1 |
| 184900 | 0, // MPR16:x8sub_2 |
| 184901 | 0, // MPR16:x8sub_3 |
| 184902 | 0, // MPR16:x8sub_4 |
| 184903 | 0, // MPR16:x8sub_5 |
| 184904 | 0, // MPR16:x8sub_6 |
| 184905 | 0, // MPR16:x8sub_7 |
| 184906 | 0, // MPR16:zasubb |
| 184907 | 205, // MPR16:zasubd0 -> MPR64 |
| 184908 | 205, // MPR16:zasubd1 -> MPR64 |
| 184909 | 0, // MPR16:zasubh0 |
| 184910 | 0, // MPR16:zasubh1 |
| 184911 | 95, // MPR16:zasubq0 -> MPR128 |
| 184912 | 95, // MPR16:zasubq1 -> MPR128 |
| 184913 | 508, // MPR16:zasubs0 -> MPR32 |
| 184914 | 508, // MPR16:zasubs1 -> MPR32 |
| 184915 | 0, // MPR16:zsub |
| 184916 | 0, // MPR16:zsub0 |
| 184917 | 0, // MPR16:zsub1 |
| 184918 | 0, // MPR16:zsub2 |
| 184919 | 0, // MPR16:zsub3 |
| 184920 | 0, // MPR16:zsub_hi |
| 184921 | 95, // MPR16:zasubd1_then_zasubq0 -> MPR128 |
| 184922 | 95, // MPR16:zasubd1_then_zasubq1 -> MPR128 |
| 184923 | 205, // MPR16:zasubs1_then_zasubd0 -> MPR64 |
| 184924 | 205, // MPR16:zasubs1_then_zasubd1 -> MPR64 |
| 184925 | 95, // MPR16:zasubs1_then_zasubq0 -> MPR128 |
| 184926 | 95, // MPR16:zasubs1_then_zasubq1 -> MPR128 |
| 184927 | 95, // MPR16:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 |
| 184928 | 95, // MPR16:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 |
| 184929 | 0, // MPR16:zasubh1_then_zasubd0 |
| 184930 | 0, // MPR16:zasubh1_then_zasubd1 |
| 184931 | 0, // MPR16:zasubh1_then_zasubq0 |
| 184932 | 0, // MPR16:zasubh1_then_zasubq1 |
| 184933 | 0, // MPR16:zasubh1_then_zasubs0 |
| 184934 | 0, // MPR16:zasubh1_then_zasubs1 |
| 184935 | 0, // MPR16:zasubh1_then_zasubd1_then_zasubq0 |
| 184936 | 0, // MPR16:zasubh1_then_zasubd1_then_zasubq1 |
| 184937 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubd0 |
| 184938 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1 |
| 184939 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubq0 |
| 184940 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubq1 |
| 184941 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 |
| 184942 | 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 |
| 184943 | 0, // MPR16:dsub1_then_bsub |
| 184944 | 0, // MPR16:dsub1_then_bsub_hi |
| 184945 | 0, // MPR16:dsub1_then_hsub |
| 184946 | 0, // MPR16:dsub1_then_hsub_hi |
| 184947 | 0, // MPR16:dsub1_then_ssub |
| 184948 | 0, // MPR16:dsub1_then_ssub_hi |
| 184949 | 0, // MPR16:dsub3_then_bsub |
| 184950 | 0, // MPR16:dsub3_then_bsub_hi |
| 184951 | 0, // MPR16:dsub3_then_hsub |
| 184952 | 0, // MPR16:dsub3_then_hsub_hi |
| 184953 | 0, // MPR16:dsub3_then_ssub |
| 184954 | 0, // MPR16:dsub3_then_ssub_hi |
| 184955 | 0, // MPR16:dsub2_then_bsub |
| 184956 | 0, // MPR16:dsub2_then_bsub_hi |
| 184957 | 0, // MPR16:dsub2_then_hsub |
| 184958 | 0, // MPR16:dsub2_then_hsub_hi |
| 184959 | 0, // MPR16:dsub2_then_ssub |
| 184960 | 0, // MPR16:dsub2_then_ssub_hi |
| 184961 | 0, // MPR16:psub1_then_psub |
| 184962 | 0, // MPR16:qsub1_then_dsub_hi |
| 184963 | 0, // MPR16:qsub3_then_dsub_hi |
| 184964 | 0, // MPR16:qsub2_then_dsub_hi |
| 184965 | 0, // MPR16:x8sub_7_then_sub_32 |
| 184966 | 0, // MPR16:x8sub_7_then_sub_32_hi |
| 184967 | 0, // MPR16:x8sub_6_then_sub_32 |
| 184968 | 0, // MPR16:x8sub_6_then_sub_32_hi |
| 184969 | 0, // MPR16:x8sub_5_then_sub_32 |
| 184970 | 0, // MPR16:x8sub_5_then_sub_32_hi |
| 184971 | 0, // MPR16:x8sub_4_then_sub_32 |
| 184972 | 0, // MPR16:x8sub_4_then_sub_32_hi |
| 184973 | 0, // MPR16:x8sub_3_then_sub_32 |
| 184974 | 0, // MPR16:x8sub_3_then_sub_32_hi |
| 184975 | 0, // MPR16:x8sub_2_then_sub_32 |
| 184976 | 0, // MPR16:x8sub_2_then_sub_32_hi |
| 184977 | 0, // MPR16:x8sub_1_then_sub_32 |
| 184978 | 0, // MPR16:x8sub_1_then_sub_32_hi |
| 184979 | 0, // MPR16:subo64_then_sub_32 |
| 184980 | 0, // MPR16:subo64_then_sub_32_hi |
| 184981 | 0, // MPR16:zsub1_then_zsub_hi |
| 184982 | 0, // MPR16:zsub3_then_zsub_hi |
| 184983 | 0, // MPR16:zsub2_then_zsub_hi |
| 184984 | 0, // MPR16:dsub0_dsub1 |
| 184985 | 0, // MPR16:dsub0_dsub1_dsub2 |
| 184986 | 0, // MPR16:dsub1_dsub2 |
| 184987 | 0, // MPR16:dsub1_dsub2_dsub3 |
| 184988 | 0, // MPR16:dsub2_dsub3 |
| 184989 | 0, // MPR16:dsub_dsub1 |
| 184990 | 0, // MPR16:dsub_dsub1_dsub2_dsub3 |
| 184991 | 0, // MPR16:dsub_dsub1_dsub2 |
| 184992 | 0, // MPR16:qsub0_qsub1 |
| 184993 | 0, // MPR16:qsub0_qsub1_qsub2 |
| 184994 | 0, // MPR16:qsub1_qsub2 |
| 184995 | 0, // MPR16:qsub1_qsub2_qsub3 |
| 184996 | 0, // MPR16:qsub2_qsub3 |
| 184997 | 0, // MPR16:sub_32_x8sub_1_then_sub_32 |
| 184998 | 0, // MPR16:x8sub_0_x8sub_1 |
| 184999 | 0, // MPR16:x8sub_2_x8sub_3 |
| 185000 | 0, // MPR16:x8sub_4_x8sub_5 |
| 185001 | 0, // MPR16:x8sub_6_x8sub_7 |
| 185002 | 0, // MPR16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 185003 | 0, // MPR16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 185004 | 0, // MPR16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 185005 | 0, // MPR16:sub_32_subo64_then_sub_32 |
| 185006 | 0, // MPR16:zsub_qsub1 |
| 185007 | 0, // MPR16:zsub_qsub1_qsub2_qsub3 |
| 185008 | 0, // MPR16:zsub_qsub1_qsub2 |
| 185009 | 0, // MPR16:zsub0_zsub1 |
| 185010 | 0, // MPR16:zsub0_zsub1_zsub2 |
| 185011 | 0, // MPR16:zsub1_zsub2 |
| 185012 | 0, // MPR16:zsub1_zsub2_zsub3 |
| 185013 | 0, // MPR16:zsub2_zsub3 |
| 185014 | 0, // MPR16:zsub0_zsub2 |
| 185015 | 0, // MPR16:zsub1_zsub3 |
| 185016 | }, |
| 185017 | { // MPR |
| 185018 | 0, // MPR:bsub |
| 185019 | 0, // MPR:bsub_hi |
| 185020 | 0, // MPR:dsub |
| 185021 | 0, // MPR:dsub0 |
| 185022 | 0, // MPR:dsub1 |
| 185023 | 0, // MPR:dsub2 |
| 185024 | 0, // MPR:dsub3 |
| 185025 | 0, // MPR:dsub_hi |
| 185026 | 0, // MPR:hsub |
| 185027 | 0, // MPR:hsub_hi |
| 185028 | 0, // MPR:psub |
| 185029 | 0, // MPR:psub0 |
| 185030 | 0, // MPR:psub1 |
| 185031 | 0, // MPR:qsub0 |
| 185032 | 0, // MPR:qsub1 |
| 185033 | 0, // MPR:qsub2 |
| 185034 | 0, // MPR:qsub3 |
| 185035 | 0, // MPR:ssub |
| 185036 | 0, // MPR:ssub_hi |
| 185037 | 0, // MPR:sub_32 |
| 185038 | 0, // MPR:sub_32_hi |
| 185039 | 0, // MPR:sube32 |
| 185040 | 0, // MPR:sube64 |
| 185041 | 0, // MPR:subo32 |
| 185042 | 0, // MPR:subo64 |
| 185043 | 0, // MPR:x8sub_0 |
| 185044 | 0, // MPR:x8sub_1 |
| 185045 | 0, // MPR:x8sub_2 |
| 185046 | 0, // MPR:x8sub_3 |
| 185047 | 0, // MPR:x8sub_4 |
| 185048 | 0, // MPR:x8sub_5 |
| 185049 | 0, // MPR:x8sub_6 |
| 185050 | 0, // MPR:x8sub_7 |
| 185051 | 530, // MPR:zasubb -> MPR8 |
| 185052 | 205, // MPR:zasubd0 -> MPR64 |
| 185053 | 205, // MPR:zasubd1 -> MPR64 |
| 185054 | 528, // MPR:zasubh0 -> MPR16 |
| 185055 | 528, // MPR:zasubh1 -> MPR16 |
| 185056 | 95, // MPR:zasubq0 -> MPR128 |
| 185057 | 95, // MPR:zasubq1 -> MPR128 |
| 185058 | 508, // MPR:zasubs0 -> MPR32 |
| 185059 | 508, // MPR:zasubs1 -> MPR32 |
| 185060 | 0, // MPR:zsub |
| 185061 | 0, // MPR:zsub0 |
| 185062 | 0, // MPR:zsub1 |
| 185063 | 0, // MPR:zsub2 |
| 185064 | 0, // MPR:zsub3 |
| 185065 | 0, // MPR:zsub_hi |
| 185066 | 95, // MPR:zasubd1_then_zasubq0 -> MPR128 |
| 185067 | 95, // MPR:zasubd1_then_zasubq1 -> MPR128 |
| 185068 | 205, // MPR:zasubs1_then_zasubd0 -> MPR64 |
| 185069 | 205, // MPR:zasubs1_then_zasubd1 -> MPR64 |
| 185070 | 95, // MPR:zasubs1_then_zasubq0 -> MPR128 |
| 185071 | 95, // MPR:zasubs1_then_zasubq1 -> MPR128 |
| 185072 | 95, // MPR:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185073 | 95, // MPR:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185074 | 205, // MPR:zasubh1_then_zasubd0 -> MPR64 |
| 185075 | 205, // MPR:zasubh1_then_zasubd1 -> MPR64 |
| 185076 | 95, // MPR:zasubh1_then_zasubq0 -> MPR128 |
| 185077 | 95, // MPR:zasubh1_then_zasubq1 -> MPR128 |
| 185078 | 508, // MPR:zasubh1_then_zasubs0 -> MPR32 |
| 185079 | 508, // MPR:zasubh1_then_zasubs1 -> MPR32 |
| 185080 | 95, // MPR:zasubh1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185081 | 95, // MPR:zasubh1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185082 | 205, // MPR:zasubh1_then_zasubs1_then_zasubd0 -> MPR64 |
| 185083 | 205, // MPR:zasubh1_then_zasubs1_then_zasubd1 -> MPR64 |
| 185084 | 95, // MPR:zasubh1_then_zasubs1_then_zasubq0 -> MPR128 |
| 185085 | 95, // MPR:zasubh1_then_zasubs1_then_zasubq1 -> MPR128 |
| 185086 | 95, // MPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185087 | 95, // MPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185088 | 0, // MPR:dsub1_then_bsub |
| 185089 | 0, // MPR:dsub1_then_bsub_hi |
| 185090 | 0, // MPR:dsub1_then_hsub |
| 185091 | 0, // MPR:dsub1_then_hsub_hi |
| 185092 | 0, // MPR:dsub1_then_ssub |
| 185093 | 0, // MPR:dsub1_then_ssub_hi |
| 185094 | 0, // MPR:dsub3_then_bsub |
| 185095 | 0, // MPR:dsub3_then_bsub_hi |
| 185096 | 0, // MPR:dsub3_then_hsub |
| 185097 | 0, // MPR:dsub3_then_hsub_hi |
| 185098 | 0, // MPR:dsub3_then_ssub |
| 185099 | 0, // MPR:dsub3_then_ssub_hi |
| 185100 | 0, // MPR:dsub2_then_bsub |
| 185101 | 0, // MPR:dsub2_then_bsub_hi |
| 185102 | 0, // MPR:dsub2_then_hsub |
| 185103 | 0, // MPR:dsub2_then_hsub_hi |
| 185104 | 0, // MPR:dsub2_then_ssub |
| 185105 | 0, // MPR:dsub2_then_ssub_hi |
| 185106 | 0, // MPR:psub1_then_psub |
| 185107 | 0, // MPR:qsub1_then_dsub_hi |
| 185108 | 0, // MPR:qsub3_then_dsub_hi |
| 185109 | 0, // MPR:qsub2_then_dsub_hi |
| 185110 | 0, // MPR:x8sub_7_then_sub_32 |
| 185111 | 0, // MPR:x8sub_7_then_sub_32_hi |
| 185112 | 0, // MPR:x8sub_6_then_sub_32 |
| 185113 | 0, // MPR:x8sub_6_then_sub_32_hi |
| 185114 | 0, // MPR:x8sub_5_then_sub_32 |
| 185115 | 0, // MPR:x8sub_5_then_sub_32_hi |
| 185116 | 0, // MPR:x8sub_4_then_sub_32 |
| 185117 | 0, // MPR:x8sub_4_then_sub_32_hi |
| 185118 | 0, // MPR:x8sub_3_then_sub_32 |
| 185119 | 0, // MPR:x8sub_3_then_sub_32_hi |
| 185120 | 0, // MPR:x8sub_2_then_sub_32 |
| 185121 | 0, // MPR:x8sub_2_then_sub_32_hi |
| 185122 | 0, // MPR:x8sub_1_then_sub_32 |
| 185123 | 0, // MPR:x8sub_1_then_sub_32_hi |
| 185124 | 0, // MPR:subo64_then_sub_32 |
| 185125 | 0, // MPR:subo64_then_sub_32_hi |
| 185126 | 0, // MPR:zsub1_then_zsub_hi |
| 185127 | 0, // MPR:zsub3_then_zsub_hi |
| 185128 | 0, // MPR:zsub2_then_zsub_hi |
| 185129 | 0, // MPR:dsub0_dsub1 |
| 185130 | 0, // MPR:dsub0_dsub1_dsub2 |
| 185131 | 0, // MPR:dsub1_dsub2 |
| 185132 | 0, // MPR:dsub1_dsub2_dsub3 |
| 185133 | 0, // MPR:dsub2_dsub3 |
| 185134 | 0, // MPR:dsub_dsub1 |
| 185135 | 0, // MPR:dsub_dsub1_dsub2_dsub3 |
| 185136 | 0, // MPR:dsub_dsub1_dsub2 |
| 185137 | 0, // MPR:qsub0_qsub1 |
| 185138 | 0, // MPR:qsub0_qsub1_qsub2 |
| 185139 | 0, // MPR:qsub1_qsub2 |
| 185140 | 0, // MPR:qsub1_qsub2_qsub3 |
| 185141 | 0, // MPR:qsub2_qsub3 |
| 185142 | 0, // MPR:sub_32_x8sub_1_then_sub_32 |
| 185143 | 0, // MPR:x8sub_0_x8sub_1 |
| 185144 | 0, // MPR:x8sub_2_x8sub_3 |
| 185145 | 0, // MPR:x8sub_4_x8sub_5 |
| 185146 | 0, // MPR:x8sub_6_x8sub_7 |
| 185147 | 0, // MPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 185148 | 0, // MPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 185149 | 0, // MPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 185150 | 0, // MPR:sub_32_subo64_then_sub_32 |
| 185151 | 0, // MPR:zsub_qsub1 |
| 185152 | 0, // MPR:zsub_qsub1_qsub2_qsub3 |
| 185153 | 0, // MPR:zsub_qsub1_qsub2 |
| 185154 | 0, // MPR:zsub0_zsub1 |
| 185155 | 0, // MPR:zsub0_zsub1_zsub2 |
| 185156 | 0, // MPR:zsub1_zsub2 |
| 185157 | 0, // MPR:zsub1_zsub2_zsub3 |
| 185158 | 0, // MPR:zsub2_zsub3 |
| 185159 | 0, // MPR:zsub0_zsub2 |
| 185160 | 0, // MPR:zsub1_zsub3 |
| 185161 | }, |
| 185162 | { // MPR8 |
| 185163 | 0, // MPR8:bsub |
| 185164 | 0, // MPR8:bsub_hi |
| 185165 | 0, // MPR8:dsub |
| 185166 | 0, // MPR8:dsub0 |
| 185167 | 0, // MPR8:dsub1 |
| 185168 | 0, // MPR8:dsub2 |
| 185169 | 0, // MPR8:dsub3 |
| 185170 | 0, // MPR8:dsub_hi |
| 185171 | 0, // MPR8:hsub |
| 185172 | 0, // MPR8:hsub_hi |
| 185173 | 0, // MPR8:psub |
| 185174 | 0, // MPR8:psub0 |
| 185175 | 0, // MPR8:psub1 |
| 185176 | 0, // MPR8:qsub0 |
| 185177 | 0, // MPR8:qsub1 |
| 185178 | 0, // MPR8:qsub2 |
| 185179 | 0, // MPR8:qsub3 |
| 185180 | 0, // MPR8:ssub |
| 185181 | 0, // MPR8:ssub_hi |
| 185182 | 0, // MPR8:sub_32 |
| 185183 | 0, // MPR8:sub_32_hi |
| 185184 | 0, // MPR8:sube32 |
| 185185 | 0, // MPR8:sube64 |
| 185186 | 0, // MPR8:subo32 |
| 185187 | 0, // MPR8:subo64 |
| 185188 | 0, // MPR8:x8sub_0 |
| 185189 | 0, // MPR8:x8sub_1 |
| 185190 | 0, // MPR8:x8sub_2 |
| 185191 | 0, // MPR8:x8sub_3 |
| 185192 | 0, // MPR8:x8sub_4 |
| 185193 | 0, // MPR8:x8sub_5 |
| 185194 | 0, // MPR8:x8sub_6 |
| 185195 | 0, // MPR8:x8sub_7 |
| 185196 | 0, // MPR8:zasubb |
| 185197 | 205, // MPR8:zasubd0 -> MPR64 |
| 185198 | 205, // MPR8:zasubd1 -> MPR64 |
| 185199 | 528, // MPR8:zasubh0 -> MPR16 |
| 185200 | 528, // MPR8:zasubh1 -> MPR16 |
| 185201 | 95, // MPR8:zasubq0 -> MPR128 |
| 185202 | 95, // MPR8:zasubq1 -> MPR128 |
| 185203 | 508, // MPR8:zasubs0 -> MPR32 |
| 185204 | 508, // MPR8:zasubs1 -> MPR32 |
| 185205 | 0, // MPR8:zsub |
| 185206 | 0, // MPR8:zsub0 |
| 185207 | 0, // MPR8:zsub1 |
| 185208 | 0, // MPR8:zsub2 |
| 185209 | 0, // MPR8:zsub3 |
| 185210 | 0, // MPR8:zsub_hi |
| 185211 | 95, // MPR8:zasubd1_then_zasubq0 -> MPR128 |
| 185212 | 95, // MPR8:zasubd1_then_zasubq1 -> MPR128 |
| 185213 | 205, // MPR8:zasubs1_then_zasubd0 -> MPR64 |
| 185214 | 205, // MPR8:zasubs1_then_zasubd1 -> MPR64 |
| 185215 | 95, // MPR8:zasubs1_then_zasubq0 -> MPR128 |
| 185216 | 95, // MPR8:zasubs1_then_zasubq1 -> MPR128 |
| 185217 | 95, // MPR8:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185218 | 95, // MPR8:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185219 | 205, // MPR8:zasubh1_then_zasubd0 -> MPR64 |
| 185220 | 205, // MPR8:zasubh1_then_zasubd1 -> MPR64 |
| 185221 | 95, // MPR8:zasubh1_then_zasubq0 -> MPR128 |
| 185222 | 95, // MPR8:zasubh1_then_zasubq1 -> MPR128 |
| 185223 | 508, // MPR8:zasubh1_then_zasubs0 -> MPR32 |
| 185224 | 508, // MPR8:zasubh1_then_zasubs1 -> MPR32 |
| 185225 | 95, // MPR8:zasubh1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185226 | 95, // MPR8:zasubh1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185227 | 205, // MPR8:zasubh1_then_zasubs1_then_zasubd0 -> MPR64 |
| 185228 | 205, // MPR8:zasubh1_then_zasubs1_then_zasubd1 -> MPR64 |
| 185229 | 95, // MPR8:zasubh1_then_zasubs1_then_zasubq0 -> MPR128 |
| 185230 | 95, // MPR8:zasubh1_then_zasubs1_then_zasubq1 -> MPR128 |
| 185231 | 95, // MPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR128 |
| 185232 | 95, // MPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR128 |
| 185233 | 0, // MPR8:dsub1_then_bsub |
| 185234 | 0, // MPR8:dsub1_then_bsub_hi |
| 185235 | 0, // MPR8:dsub1_then_hsub |
| 185236 | 0, // MPR8:dsub1_then_hsub_hi |
| 185237 | 0, // MPR8:dsub1_then_ssub |
| 185238 | 0, // MPR8:dsub1_then_ssub_hi |
| 185239 | 0, // MPR8:dsub3_then_bsub |
| 185240 | 0, // MPR8:dsub3_then_bsub_hi |
| 185241 | 0, // MPR8:dsub3_then_hsub |
| 185242 | 0, // MPR8:dsub3_then_hsub_hi |
| 185243 | 0, // MPR8:dsub3_then_ssub |
| 185244 | 0, // MPR8:dsub3_then_ssub_hi |
| 185245 | 0, // MPR8:dsub2_then_bsub |
| 185246 | 0, // MPR8:dsub2_then_bsub_hi |
| 185247 | 0, // MPR8:dsub2_then_hsub |
| 185248 | 0, // MPR8:dsub2_then_hsub_hi |
| 185249 | 0, // MPR8:dsub2_then_ssub |
| 185250 | 0, // MPR8:dsub2_then_ssub_hi |
| 185251 | 0, // MPR8:psub1_then_psub |
| 185252 | 0, // MPR8:qsub1_then_dsub_hi |
| 185253 | 0, // MPR8:qsub3_then_dsub_hi |
| 185254 | 0, // MPR8:qsub2_then_dsub_hi |
| 185255 | 0, // MPR8:x8sub_7_then_sub_32 |
| 185256 | 0, // MPR8:x8sub_7_then_sub_32_hi |
| 185257 | 0, // MPR8:x8sub_6_then_sub_32 |
| 185258 | 0, // MPR8:x8sub_6_then_sub_32_hi |
| 185259 | 0, // MPR8:x8sub_5_then_sub_32 |
| 185260 | 0, // MPR8:x8sub_5_then_sub_32_hi |
| 185261 | 0, // MPR8:x8sub_4_then_sub_32 |
| 185262 | 0, // MPR8:x8sub_4_then_sub_32_hi |
| 185263 | 0, // MPR8:x8sub_3_then_sub_32 |
| 185264 | 0, // MPR8:x8sub_3_then_sub_32_hi |
| 185265 | 0, // MPR8:x8sub_2_then_sub_32 |
| 185266 | 0, // MPR8:x8sub_2_then_sub_32_hi |
| 185267 | 0, // MPR8:x8sub_1_then_sub_32 |
| 185268 | 0, // MPR8:x8sub_1_then_sub_32_hi |
| 185269 | 0, // MPR8:subo64_then_sub_32 |
| 185270 | 0, // MPR8:subo64_then_sub_32_hi |
| 185271 | 0, // MPR8:zsub1_then_zsub_hi |
| 185272 | 0, // MPR8:zsub3_then_zsub_hi |
| 185273 | 0, // MPR8:zsub2_then_zsub_hi |
| 185274 | 0, // MPR8:dsub0_dsub1 |
| 185275 | 0, // MPR8:dsub0_dsub1_dsub2 |
| 185276 | 0, // MPR8:dsub1_dsub2 |
| 185277 | 0, // MPR8:dsub1_dsub2_dsub3 |
| 185278 | 0, // MPR8:dsub2_dsub3 |
| 185279 | 0, // MPR8:dsub_dsub1 |
| 185280 | 0, // MPR8:dsub_dsub1_dsub2_dsub3 |
| 185281 | 0, // MPR8:dsub_dsub1_dsub2 |
| 185282 | 0, // MPR8:qsub0_qsub1 |
| 185283 | 0, // MPR8:qsub0_qsub1_qsub2 |
| 185284 | 0, // MPR8:qsub1_qsub2 |
| 185285 | 0, // MPR8:qsub1_qsub2_qsub3 |
| 185286 | 0, // MPR8:qsub2_qsub3 |
| 185287 | 0, // MPR8:sub_32_x8sub_1_then_sub_32 |
| 185288 | 0, // MPR8:x8sub_0_x8sub_1 |
| 185289 | 0, // MPR8:x8sub_2_x8sub_3 |
| 185290 | 0, // MPR8:x8sub_4_x8sub_5 |
| 185291 | 0, // MPR8:x8sub_6_x8sub_7 |
| 185292 | 0, // MPR8:x8sub_6_then_sub_32_x8sub_7_then_sub_32 |
| 185293 | 0, // MPR8:x8sub_4_then_sub_32_x8sub_5_then_sub_32 |
| 185294 | 0, // MPR8:x8sub_2_then_sub_32_x8sub_3_then_sub_32 |
| 185295 | 0, // MPR8:sub_32_subo64_then_sub_32 |
| 185296 | 0, // MPR8:zsub_qsub1 |
| 185297 | 0, // MPR8:zsub_qsub1_qsub2_qsub3 |
| 185298 | 0, // MPR8:zsub_qsub1_qsub2 |
| 185299 | 0, // MPR8:zsub0_zsub1 |
| 185300 | 0, // MPR8:zsub0_zsub1_zsub2 |
| 185301 | 0, // MPR8:zsub1_zsub2 |
| 185302 | 0, // MPR8:zsub1_zsub2_zsub3 |
| 185303 | 0, // MPR8:zsub2_zsub3 |
| 185304 | 0, // MPR8:zsub0_zsub2 |
| 185305 | 0, // MPR8:zsub1_zsub3 |
| 185306 | }, |
| 185307 | }; |
| 185308 | assert(RC && "Missing regclass"); |
| 185309 | if (!Idx) return RC; |
| 185310 | --Idx; |
| 185311 | assert(Idx < 143 && "Bad subreg"); |
| 185312 | unsigned TV = Table[RC->getID()][Idx]; |
| 185313 | return TV ? getRegClass(TV - 1) : nullptr; |
| 185314 | } |
| 185315 | |
| 185316 | /// Get the weight in units of pressure for this register class. |
| 185317 | const RegClassWeight &AArch64GenRegisterInfo:: |
| 185318 | getRegClassWeight(const TargetRegisterClass *RC) const { |
| 185319 | static const RegClassWeight RCWeightTable[] = { |
| 185320 | {0, 0}, // W_HI_DummyRC |
| 185321 | {0, 0}, // B_HI_DummyRC |
| 185322 | {0, 0}, // D_HI_DummyRC |
| 185323 | {0, 0}, // H_HI_DummyRC |
| 185324 | {0, 0}, // Q_HI_DummyRC |
| 185325 | {0, 0}, // S_HI_DummyRC |
| 185326 | {1, 32}, // FPR8 |
| 185327 | {1, 32}, // FPR16 |
| 185328 | {1, 16}, // PPRorPNR |
| 185329 | {1, 16}, // FPR16_lo |
| 185330 | {1, 16}, // PNR |
| 185331 | {1, 16}, // PPR |
| 185332 | {1, 8}, // PNR_3b |
| 185333 | {1, 8}, // PNR_p8to15 |
| 185334 | {1, 8}, // PPRMul2 |
| 185335 | {1, 8}, // PPR_3b |
| 185336 | {1, 8}, // PPR_p8to15 |
| 185337 | {1, 4}, // PPRMul2_and_PPR_3b |
| 185338 | {1, 4}, // PPRMul2_and_PPR_p8to15 |
| 185339 | {2, 16}, // PPR2 |
| 185340 | {2, 16}, // PPR2Mul2 |
| 185341 | {2, 16}, // PPR2_with_psub1_in_PPRMul2 |
| 185342 | {2, 9}, // PPR2_with_psub1_in_PPR_3b |
| 185343 | {2, 9}, // PPR2_with_psub1_in_PPR_p8to15 |
| 185344 | {2, 9}, // PPR2_with_psub_in_PNR_3b |
| 185345 | {2, 9}, // PPR2_with_psub_in_PNR_p8to15 |
| 185346 | {2, 8}, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3b |
| 185347 | {2, 8}, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 |
| 185348 | {2, 8}, // PPR2Mul2_and_PPR2_with_psub_in_PNR_3b |
| 185349 | {2, 8}, // PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15 |
| 185350 | {2, 8}, // PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 185351 | {2, 8}, // PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 185352 | {2, 8}, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2 |
| 185353 | {2, 8}, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2 |
| 185354 | {2, 6}, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3b |
| 185355 | {2, 6}, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15 |
| 185356 | {2, 2}, // PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 185357 | {2, 2}, // PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 185358 | {1, 33}, // GPR32all |
| 185359 | {1, 32}, // FPR32 |
| 185360 | {1, 32}, // GPR32 |
| 185361 | {1, 32}, // GPR32sp |
| 185362 | {1, 31}, // GPR32common |
| 185363 | {1, 16}, // FPR32_with_hsub_in_FPR16_lo |
| 185364 | {1, 8}, // GPR32arg |
| 185365 | {1, 4}, // MatrixIndexGPR32_12_15 |
| 185366 | {1, 4}, // MatrixIndexGPR32_8_11 |
| 185367 | {0, 0}, // CCR |
| 185368 | {1, 1}, // GPR32sponly |
| 185369 | {2, 32}, // WSeqPairsClass |
| 185370 | {2, 30}, // WSeqPairsClass_with_subo32_in_GPR32common |
| 185371 | {2, 8}, // WSeqPairsClass_with_sube32_in_GPR32arg |
| 185372 | {2, 4}, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 |
| 185373 | {2, 4}, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 |
| 185374 | {1, 33}, // GPR64all |
| 185375 | {1, 32}, // FPR64 |
| 185376 | {1, 32}, // GPR64 |
| 185377 | {1, 32}, // GPR64sp |
| 185378 | {1, 31}, // GPR64common |
| 185379 | {1, 29}, // GPR64noip |
| 185380 | {1, 28}, // GPR64common_and_GPR64noip |
| 185381 | {1, 19}, // tcGPR64 |
| 185382 | {1, 18}, // tcGPRnotx16 |
| 185383 | {1, 17}, // tcGPRnotx16x17 |
| 185384 | {1, 16}, // FPR64_lo |
| 185385 | {1, 8}, // GPR64arg |
| 185386 | {1, 4}, // FIXED_REGS |
| 185387 | {1, 4}, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 185388 | {1, 4}, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185389 | {1, 2}, // FIXED_REGS_with_sub_32 |
| 185390 | {1, 2}, // tcGPRx16x17 |
| 185391 | {1, 1}, // FIXED_REGS_and_GPR64 |
| 185392 | {1, 1}, // GPR64sponly |
| 185393 | {1, 1}, // tcGPRx17 |
| 185394 | {2, 32}, // DD |
| 185395 | {2, 17}, // DD_with_dsub0_in_FPR64_lo |
| 185396 | {2, 17}, // DD_with_dsub1_in_FPR64_lo |
| 185397 | {2, 32}, // XSeqPairsClass |
| 185398 | {2, 16}, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo |
| 185399 | {2, 30}, // XSeqPairsClass_with_subo64_in_GPR64common |
| 185400 | {2, 30}, // XSeqPairsClass_with_subo64_in_GPR64noip |
| 185401 | {2, 28}, // XSeqPairsClass_with_sube64_in_GPR64noip |
| 185402 | {2, 20}, // XSeqPairsClass_with_sube64_in_tcGPR64 |
| 185403 | {2, 18}, // XSeqPairsClass_with_sube64_in_tcGPRnotx16 |
| 185404 | {2, 18}, // XSeqPairsClass_with_subo64_in_tcGPR64 |
| 185405 | {2, 16}, // XSeqPairsClass_with_subo64_in_tcGPRnotx16x17 |
| 185406 | {2, 8}, // XSeqPairsClass_with_sube64_in_GPR64arg |
| 185407 | {2, 4}, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 185408 | {2, 4}, // XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185409 | {2, 2}, // XSeqPairsClass_with_sube64_in_tcGPRx16x17 |
| 185410 | {2, 2}, // XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 185411 | {1, 32}, // FPR128 |
| 185412 | {1, 32}, // ZPR |
| 185413 | {1, 16}, // FPR128_lo |
| 185414 | {0, 0}, // MPR128 |
| 185415 | {1, 16}, // ZPRMul2 |
| 185416 | {1, 16}, // ZPR_4b |
| 185417 | {1, 8}, // FPR128_0to7 |
| 185418 | {1, 8}, // ZPRMul2_Hi |
| 185419 | {1, 8}, // ZPRMul2_Lo |
| 185420 | {1, 8}, // ZPRMul4 |
| 185421 | {1, 8}, // ZPR_3b |
| 185422 | {1, 8}, // ZPR_K |
| 185423 | {1, 4}, // ZPRMul2_Hi_and_ZPRMul4 |
| 185424 | {1, 4}, // ZPRMul2_Lo_and_ZPRMul4 |
| 185425 | {1, 4}, // ZPRMul2_and_ZPR_3b |
| 185426 | {1, 4}, // ZPRMul2_and_ZPR_K |
| 185427 | {1, 2}, // ZPRMul4_and_ZPR_3b |
| 185428 | {1, 2}, // ZPRMul4_and_ZPR_K |
| 185429 | {3, 32}, // DDD |
| 185430 | {3, 18}, // DDD_with_dsub0_in_FPR64_lo |
| 185431 | {3, 18}, // DDD_with_dsub1_in_FPR64_lo |
| 185432 | {3, 18}, // DDD_with_dsub2_in_FPR64_lo |
| 185433 | {3, 17}, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo |
| 185434 | {3, 17}, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 185435 | {3, 16}, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo |
| 185436 | {4, 32}, // DDDD |
| 185437 | {4, 19}, // DDDD_with_dsub0_in_FPR64_lo |
| 185438 | {4, 19}, // DDDD_with_dsub1_in_FPR64_lo |
| 185439 | {4, 19}, // DDDD_with_dsub2_in_FPR64_lo |
| 185440 | {4, 19}, // DDDD_with_dsub3_in_FPR64_lo |
| 185441 | {4, 18}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo |
| 185442 | {4, 18}, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 185443 | {4, 18}, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 185444 | {4, 17}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo |
| 185445 | {4, 17}, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 185446 | {4, 16}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo |
| 185447 | {2, 32}, // QQ |
| 185448 | {2, 32}, // ZPR2 |
| 185449 | {2, 32}, // ZPR2StridedOrContiguous |
| 185450 | {2, 32}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 185451 | {2, 17}, // QQ_with_dsub1_in_FPR64_lo |
| 185452 | {2, 17}, // QQ_with_qsub0_in_FPR128_lo |
| 185453 | {2, 32}, // ZPR2Mul2 |
| 185454 | {2, 32}, // ZPR2Strided |
| 185455 | {2, 16}, // ZPR2StridedOrContiguous_with_dsub_in_FPR64_lo |
| 185456 | {2, 17}, // ZPR2_with_dsub1_in_FPR64_lo |
| 185457 | {2, 32}, // ZPR2_with_zsub1_in_ZPRMul2 |
| 185458 | {2, 17}, // ZPR2_with_zsub_in_FPR128_lo |
| 185459 | {2, 16}, // QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_lo |
| 185460 | {2, 16}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_lo |
| 185461 | {2, 16}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 185462 | {2, 16}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 185463 | {2, 16}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 185464 | {2, 16}, // ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 185465 | {2, 9}, // QQ_with_qsub0_in_FPR128_0to7 |
| 185466 | {2, 9}, // QQ_with_qsub1_in_FPR128_0to7 |
| 185467 | {2, 16}, // ZPR2Mul2_Hi |
| 185468 | {2, 16}, // ZPR2Mul2_Lo |
| 185469 | {2, 12}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 185470 | {2, 8}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPR_K |
| 185471 | {2, 16}, // ZPR2Strided_with_dsub_in_FPR64_lo |
| 185472 | {2, 16}, // ZPR2Strided_with_zsub0_in_ZPRMul2 |
| 185473 | {2, 9}, // ZPR2_with_qsub1_in_FPR128_0to7 |
| 185474 | {2, 16}, // ZPR2_with_zsub0_in_ZPRMul4 |
| 185475 | {2, 10}, // ZPR2_with_zsub0_in_ZPR_K |
| 185476 | {2, 16}, // ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185477 | {2, 16}, // ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 185478 | {2, 16}, // ZPR2_with_zsub1_in_ZPRMul4 |
| 185479 | {2, 10}, // ZPR2_with_zsub1_in_ZPR_K |
| 185480 | {2, 9}, // ZPR2_with_zsub_in_FPR128_0to7 |
| 185481 | {2, 16}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 185482 | {2, 8}, // QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7 |
| 185483 | {2, 8}, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7 |
| 185484 | {2, 14}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo |
| 185485 | {2, 8}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185486 | {2, 8}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185487 | {2, 8}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 185488 | {2, 8}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_K |
| 185489 | {2, 8}, // ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185490 | {2, 8}, // ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185491 | {2, 8}, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185492 | {2, 8}, // ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185493 | {2, 6}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 185494 | {2, 8}, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi |
| 185495 | {2, 8}, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo |
| 185496 | {2, 8}, // ZPR2Strided_with_zsub0_in_ZPRMul4 |
| 185497 | {2, 8}, // ZPR2Strided_with_zsub0_in_ZPR_K |
| 185498 | {2, 8}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 185499 | {2, 8}, // ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185500 | {2, 8}, // ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185501 | {2, 8}, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 185502 | {2, 8}, // ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 185503 | {2, 8}, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 185504 | {2, 8}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 185505 | {2, 4}, // ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 185506 | {2, 6}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185507 | {2, 6}, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3b |
| 185508 | {2, 6}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185509 | {2, 4}, // ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185510 | {2, 4}, // ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185511 | {2, 4}, // ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_K |
| 185512 | {2, 4}, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 185513 | {2, 4}, // ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 185514 | {2, 4}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_K |
| 185515 | {2, 4}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 185516 | {2, 4}, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185517 | {2, 4}, // ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 185518 | {2, 4}, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 185519 | {2, 2}, // ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 185520 | {2, 2}, // ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_K |
| 185521 | {2, 2}, // ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185522 | {2, 2}, // ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185523 | {2, 2}, // ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185524 | {0, 0}, // MPR64 |
| 185525 | {3, 32}, // QQQ |
| 185526 | {3, 32}, // ZPR3 |
| 185527 | {3, 18}, // QQQ_with_dsub1_in_FPR64_lo |
| 185528 | {3, 18}, // QQQ_with_dsub2_in_FPR64_lo |
| 185529 | {3, 18}, // QQQ_with_qsub0_in_FPR128_lo |
| 185530 | {3, 18}, // ZPR3_with_dsub1_in_FPR64_lo |
| 185531 | {3, 18}, // ZPR3_with_dsub2_in_FPR64_lo |
| 185532 | {3, 32}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 |
| 185533 | {3, 32}, // ZPR3_with_zsub1_in_ZPRMul2 |
| 185534 | {3, 18}, // ZPR3_with_zsub_in_FPR128_lo |
| 185535 | {3, 17}, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 185536 | {3, 17}, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_lo |
| 185537 | {3, 17}, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 185538 | {3, 17}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_lo |
| 185539 | {3, 16}, // QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_lo |
| 185540 | {3, 16}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_lo |
| 185541 | {3, 10}, // QQQ_with_qsub0_in_FPR128_0to7 |
| 185542 | {3, 10}, // QQQ_with_qsub1_in_FPR128_0to7 |
| 185543 | {3, 10}, // QQQ_with_qsub2_in_FPR128_0to7 |
| 185544 | {3, 10}, // ZPR3_with_qsub1_in_FPR128_0to7 |
| 185545 | {3, 10}, // ZPR3_with_qsub2_in_FPR128_0to7 |
| 185546 | {3, 24}, // ZPR3_with_zsub0_in_ZPRMul4 |
| 185547 | {3, 12}, // ZPR3_with_zsub0_in_ZPR_K |
| 185548 | {3, 17}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 185549 | {3, 17}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 185550 | {3, 17}, // ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 185551 | {3, 17}, // ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 185552 | {3, 24}, // ZPR3_with_zsub1_in_ZPRMul4 |
| 185553 | {3, 12}, // ZPR3_with_zsub1_in_ZPR_K |
| 185554 | {3, 17}, // ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 185555 | {3, 17}, // ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 185556 | {3, 24}, // ZPR3_with_zsub2_in_ZPRMul4 |
| 185557 | {3, 12}, // ZPR3_with_zsub2_in_ZPR_K |
| 185558 | {3, 10}, // ZPR3_with_zsub_in_FPR128_0to7 |
| 185559 | {3, 17}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 185560 | {3, 9}, // QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 185561 | {3, 9}, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7 |
| 185562 | {3, 9}, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 185563 | {3, 15}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 185564 | {3, 9}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub1_in_FPR128_0to7 |
| 185565 | {3, 15}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Lo |
| 185566 | {3, 15}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo |
| 185567 | {3, 8}, // QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7 |
| 185568 | {3, 10}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_K |
| 185569 | {3, 10}, // ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 185570 | {3, 8}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_qsub2_in_FPR128_0to7 |
| 185571 | {3, 10}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 185572 | {3, 8}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_K |
| 185573 | {3, 12}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185574 | {3, 12}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 185575 | {3, 12}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185576 | {3, 10}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185577 | {3, 9}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185578 | {3, 12}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185579 | {3, 12}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185580 | {3, 10}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185581 | {3, 9}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185582 | {3, 12}, // ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185583 | {3, 12}, // ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185584 | {3, 9}, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 185585 | {3, 10}, // ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_K |
| 185586 | {3, 9}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul2 |
| 185587 | {3, 12}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 185588 | {3, 12}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 185589 | {3, 8}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 185590 | {3, 9}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185591 | {3, 8}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185592 | {3, 7}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185593 | {3, 7}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3b |
| 185594 | {3, 9}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185595 | {3, 9}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185596 | {3, 4}, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 185597 | {3, 6}, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 185598 | {3, 6}, // ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_K |
| 185599 | {3, 6}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 185600 | {3, 6}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185601 | {3, 6}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 185602 | {3, 6}, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185603 | {3, 6}, // ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 185604 | {3, 6}, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 185605 | {3, 6}, // ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 185606 | {3, 6}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 185607 | {3, 6}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 185608 | {3, 3}, // ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_K |
| 185609 | {3, 3}, // ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 185610 | {3, 3}, // ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185611 | {3, 3}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185612 | {3, 3}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185613 | {3, 3}, // ZPR3_with_zsub_in_FPR128_0to7_and_ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 185614 | {3, 3}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_Hi |
| 185615 | {3, 3}, // ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 185616 | {4, 32}, // QQQQ |
| 185617 | {4, 32}, // ZPR4 |
| 185618 | {4, 19}, // QQQQ_with_dsub1_in_FPR64_lo |
| 185619 | {4, 19}, // QQQQ_with_dsub2_in_FPR64_lo |
| 185620 | {4, 19}, // QQQQ_with_dsub3_in_FPR64_lo |
| 185621 | {4, 19}, // QQQQ_with_qsub0_in_FPR128_lo |
| 185622 | {4, 32}, // ZPR4StridedOrContiguous |
| 185623 | {4, 19}, // ZPR4_with_dsub1_in_FPR64_lo |
| 185624 | {4, 19}, // ZPR4_with_dsub2_in_FPR64_lo |
| 185625 | {4, 19}, // ZPR4_with_dsub3_in_FPR64_lo |
| 185626 | {4, 32}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 |
| 185627 | {4, 32}, // ZPR4_with_zsub1_in_ZPRMul2 |
| 185628 | {4, 19}, // ZPR4_with_zsub_in_FPR128_lo |
| 185629 | {4, 18}, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 185630 | {4, 18}, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 185631 | {4, 18}, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_lo |
| 185632 | {4, 18}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 185633 | {4, 18}, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 185634 | {4, 18}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_lo |
| 185635 | {4, 17}, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 185636 | {4, 17}, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_lo |
| 185637 | {4, 17}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 185638 | {4, 17}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_lo |
| 185639 | {4, 16}, // QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_lo |
| 185640 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_lo |
| 185641 | {4, 32}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2 |
| 185642 | {4, 32}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 185643 | {4, 11}, // QQQQ_with_qsub0_in_FPR128_0to7 |
| 185644 | {4, 11}, // QQQQ_with_qsub1_in_FPR128_0to7 |
| 185645 | {4, 11}, // QQQQ_with_qsub2_in_FPR128_0to7 |
| 185646 | {4, 11}, // QQQQ_with_qsub3_in_FPR128_0to7 |
| 185647 | {4, 32}, // ZPR4Mul4 |
| 185648 | {4, 32}, // ZPR4Strided |
| 185649 | {4, 16}, // ZPR4StridedOrContiguous_with_dsub_in_FPR64_lo |
| 185650 | {4, 11}, // ZPR4_with_qsub1_in_FPR128_0to7 |
| 185651 | {4, 11}, // ZPR4_with_qsub2_in_FPR128_0to7 |
| 185652 | {4, 11}, // ZPR4_with_qsub3_in_FPR128_0to7 |
| 185653 | {4, 14}, // ZPR4_with_zsub0_in_ZPR_K |
| 185654 | {4, 18}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 185655 | {4, 18}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo |
| 185656 | {4, 18}, // ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 185657 | {4, 18}, // ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 185658 | {4, 32}, // ZPR4_with_zsub1_in_ZPRMul4 |
| 185659 | {4, 14}, // ZPR4_with_zsub1_in_ZPR_K |
| 185660 | {4, 18}, // ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 185661 | {4, 18}, // ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 185662 | {4, 32}, // ZPR4_with_zsub2_in_ZPRMul4 |
| 185663 | {4, 14}, // ZPR4_with_zsub2_in_ZPR_K |
| 185664 | {4, 18}, // ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 185665 | {4, 18}, // ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 185666 | {4, 32}, // ZPR4_with_zsub3_in_ZPRMul4 |
| 185667 | {4, 14}, // ZPR4_with_zsub3_in_ZPR_K |
| 185668 | {4, 11}, // ZPR4_with_zsub_in_FPR128_0to7 |
| 185669 | {4, 18}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 185670 | {4, 10}, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 185671 | {4, 10}, // QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 185672 | {4, 10}, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7 |
| 185673 | {4, 10}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 185674 | {4, 16}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 185675 | {4, 10}, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 185676 | {4, 16}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 185677 | {4, 16}, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi |
| 185678 | {4, 10}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub1_in_FPR128_0to7 |
| 185679 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Lo |
| 185680 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Lo |
| 185681 | {4, 9}, // QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 185682 | {4, 9}, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7 |
| 185683 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi |
| 185684 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo |
| 185685 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 185686 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7 |
| 185687 | {4, 9}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 185688 | {4, 12}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_K |
| 185689 | {4, 12}, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 185690 | {4, 12}, // ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 185691 | {4, 9}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub2_in_FPR128_0to7 |
| 185692 | {4, 14}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo |
| 185693 | {4, 8}, // QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7 |
| 185694 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185695 | {4, 16}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185696 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7 |
| 185697 | {4, 12}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 185698 | {4, 12}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 185699 | {4, 16}, // ZPR4Strided_with_dsub_in_FPR64_lo |
| 185700 | {4, 16}, // ZPR4Strided_with_zsub0_in_ZPRMul2 |
| 185701 | {4, 16}, // ZPR4Strided_with_zsub1_in_ZPR_K |
| 185702 | {4, 12}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 185703 | {4, 10}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_K |
| 185704 | {4, 16}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185705 | {4, 16}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185706 | {4, 12}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185707 | {4, 10}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185708 | {4, 16}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 185709 | {4, 16}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185710 | {4, 16}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185711 | {4, 12}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185712 | {4, 10}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185713 | {4, 16}, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 185714 | {4, 10}, // ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_K |
| 185715 | {4, 16}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185716 | {4, 16}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185717 | {4, 12}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185718 | {4, 10}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185719 | {4, 16}, // ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185720 | {4, 16}, // ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185721 | {4, 10}, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 185722 | {4, 12}, // ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_K |
| 185723 | {4, 10}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul2 |
| 185724 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 185725 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 185726 | {4, 16}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 185727 | {4, 10}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 185728 | {4, 10}, // ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3b |
| 185729 | {4, 8}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 185730 | {4, 6}, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 185731 | {4, 10}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 185732 | {4, 12}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185733 | {4, 10}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185734 | {4, 12}, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185735 | {4, 10}, // ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi |
| 185736 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185737 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7 |
| 185738 | {4, 12}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185739 | {4, 12}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185740 | {4, 12}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185741 | {4, 8}, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_K |
| 185742 | {4, 8}, // ZPR4Mul4_and_ZPR4_with_zsub_in_FPR128_0to7 |
| 185743 | {4, 8}, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi |
| 185744 | {4, 8}, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo |
| 185745 | {4, 8}, // ZPR4Strided_with_zsub0_in_ZPRMul4 |
| 185746 | {4, 5}, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 185747 | {4, 5}, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_K |
| 185748 | {4, 6}, // ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2 |
| 185749 | {4, 8}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_K |
| 185750 | {4, 8}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 185751 | {4, 6}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 185752 | {4, 8}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 185753 | {4, 8}, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185754 | {4, 8}, // ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_K |
| 185755 | {4, 8}, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 185756 | {4, 8}, // ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_K |
| 185757 | {4, 8}, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 185758 | {4, 8}, // ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 185759 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 185760 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4 |
| 185761 | {4, 6}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3b |
| 185762 | {4, 8}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4 |
| 185763 | {4, 6}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 185764 | {4, 4}, // ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185765 | {4, 4}, // ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4 |
| 185766 | {4, 4}, // ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_K |
| 185767 | {4, 4}, // ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi |
| 185768 | {4, 4}, // ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 185769 | {4, 4}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 185770 | {4, 4}, // ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185771 | {4, 4}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185772 | {4, 4}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3b |
| 185773 | {4, 4}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3b |
| 185774 | {4, 4}, // ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3b |
| 185775 | {4, 4}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 185776 | {4, 4}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 185777 | {4, 4}, // ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4 |
| 185778 | {8, 30}, // GPR64x8Class |
| 185779 | {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip |
| 185780 | {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 185781 | {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185782 | {8, 30}, // GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185783 | {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 185784 | {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185785 | {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185786 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 185787 | {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185788 | {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185789 | {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185790 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 185791 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185792 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185793 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPRnotx16 |
| 185794 | {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64 |
| 185795 | {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185796 | {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185797 | {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185798 | {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185799 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip |
| 185800 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185801 | {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185802 | {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185803 | {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185804 | {8, 22}, // GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17 |
| 185805 | {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185806 | {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185807 | {8, 24}, // GPR64x8Class_with_x8sub_2_in_tcGPRnotx16 |
| 185808 | {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185809 | {8, 28}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185810 | {8, 22}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185811 | {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185812 | {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185813 | {8, 24}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip |
| 185814 | {8, 24}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185815 | {8, 20}, // GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17 |
| 185816 | {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185817 | {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185818 | {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185819 | {8, 22}, // GPR64x8Class_with_x8sub_4_in_tcGPRnotx16 |
| 185820 | {8, 22}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185821 | {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185822 | {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip |
| 185823 | {8, 18}, // GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17 |
| 185824 | {8, 20}, // GPR64x8Class_with_x8sub_6_in_tcGPRnotx16 |
| 185825 | {8, 16}, // GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17 |
| 185826 | {8, 14}, // GPR64x8Class_with_sub_32_in_GPR32arg |
| 185827 | {0, 0}, // MPR32 |
| 185828 | {8, 12}, // GPR64x8Class_with_x8sub_2_in_GPR64arg |
| 185829 | {8, 10}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 185830 | {8, 10}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185831 | {8, 10}, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 |
| 185832 | {8, 10}, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185833 | {8, 10}, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185834 | {8, 10}, // GPR64x8Class_with_x8sub_4_in_GPR64arg |
| 185835 | {8, 10}, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185836 | {8, 8}, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185837 | {8, 8}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185838 | {8, 8}, // GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 185839 | {8, 8}, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185840 | {8, 8}, // GPR64x8Class_with_x8sub_2_in_tcGPRx16x17 |
| 185841 | {8, 8}, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 |
| 185842 | {8, 8}, // GPR64x8Class_with_x8sub_4_in_tcGPRx16x17 |
| 185843 | {8, 8}, // GPR64x8Class_with_x8sub_6_in_GPR64arg |
| 185844 | {8, 8}, // GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 185845 | {8, 8}, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 185846 | {1, 1}, // ZTR |
| 185847 | {0, 0}, // MPR16 |
| 185848 | {0, 0}, // MPR |
| 185849 | {0, 0}, // MPR8 |
| 185850 | }; |
| 185851 | return RCWeightTable[RC->getID()]; |
| 185852 | } |
| 185853 | |
| 185854 | /// Get the weight in units of pressure for this register unit. |
| 185855 | unsigned AArch64GenRegisterInfo:: |
| 185856 | getRegUnitWeight(unsigned RegUnit) const { |
| 185857 | assert(RegUnit < 297 && "invalid register unit"); |
| 185858 | // All register units have unit weight. |
| 185859 | return 1; |
| 185860 | } |
| 185861 | |
| 185862 | |
| 185863 | // Get the number of dimensions of register pressure. |
| 185864 | unsigned AArch64GenRegisterInfo::getNumRegPressureSets() const { |
| 185865 | return 190; |
| 185866 | } |
| 185867 | |
| 185868 | // Get the name of this register unit pressure set. |
| 185869 | const char *AArch64GenRegisterInfo:: |
| 185870 | getRegPressureSetName(unsigned Idx) const { |
| 185871 | static const char *PressureNameTable[] = { |
| 185872 | "ZTR", |
| 185873 | "PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15", |
| 185874 | "PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b", |
| 185875 | "tcGPRx17", |
| 185876 | "XSeqPairsClass_with_subo64_in_FIXED_REGS", |
| 185877 | "MatrixIndexGPR32_12_15", |
| 185878 | "MatrixIndexGPR32_8_11", |
| 185879 | "ZPRMul4_and_ZPR_K", |
| 185880 | "PPRMul2_and_PPR_3b", |
| 185881 | "PPRMul2_and_PPR_p8to15", |
| 185882 | "FIXED_REGS", |
| 185883 | "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185884 | "ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185885 | "ZPRMul2_Hi", |
| 185886 | "ZPRMul2_Lo", |
| 185887 | "ZPRMul4", |
| 185888 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185889 | "ZPRMul2_Lo_and_ZPRMul4", |
| 185890 | "ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185891 | "GPR64x8Class_with_x8sub_0_in_tcGPRx16x17", |
| 185892 | "GPR64x8Class_with_x8sub_7_in_FIXED_REGS", |
| 185893 | "PPRMul2", |
| 185894 | "PPRMul2_with_PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b", |
| 185895 | "ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185896 | "PNR_3b", |
| 185897 | "PNR_p8to15", |
| 185898 | "ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185899 | "ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185900 | "FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", |
| 185901 | "ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185902 | "ZPRMul2_Hi_with_ZPRMul4", |
| 185903 | "ZPRMul2_Hi_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185904 | "ZPRMul2_Lo_with_ZPRMul4", |
| 185905 | "ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185906 | "ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4", |
| 185907 | "ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185908 | "ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185909 | "ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4", |
| 185910 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185911 | "ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185912 | "PPRMul2_with_PNR_3b", |
| 185913 | "PPRMul2_with_PNR_p8to15", |
| 185914 | "ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185915 | "ZPRMul2_Lo_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185916 | "ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185917 | "ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185918 | "ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185919 | "ZPRMul2_Lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185920 | "ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185921 | "ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K", |
| 185922 | "ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185923 | "ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185924 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185925 | "FPR128_0to7_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 185926 | "GPR64x8Class_with_x8sub_0_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", |
| 185927 | "ZPRMul2_Hi_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4", |
| 185928 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4", |
| 185929 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185930 | "ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 185931 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185932 | "QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185933 | "QQQQ_with_qsub3_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185934 | "PPRorPNR", |
| 185935 | "ZPRMul2", |
| 185936 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4", |
| 185937 | "ZPR2_with_zsub1_in_ZPRMul4", |
| 185938 | "ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b", |
| 185939 | "ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4", |
| 185940 | "ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4", |
| 185941 | "ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4", |
| 185942 | "ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4", |
| 185943 | "ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185944 | "ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185945 | "ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 185946 | "ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4", |
| 185947 | "ZPRMul4_with_FPR128_0to7", |
| 185948 | "ZPRMul4_with_QQ_with_qsub1_in_FPR128_0to7", |
| 185949 | "ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 185950 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185951 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 185952 | "FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185953 | "ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185954 | "GPR64x8Class_with_x8sub_6_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_0_in_tcGPRx16x17", |
| 185955 | "ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7", |
| 185956 | "ZPRMul4_with_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185957 | "ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185958 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185959 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185960 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185961 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 185962 | "ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185963 | "ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185964 | "ZPRMul2_Hi_with_QQQ_with_qsub2_in_FPR128_0to7", |
| 185965 | "ZPRMul4_with_ZPR_K", |
| 185966 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 185967 | "GPR64x8Class_with_x8sub_6_in_tcGPRx16x17", |
| 185968 | "ZPRMul2_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185969 | "ZPRMul2_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185970 | "ZPRMul2_Hi_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 185971 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185972 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185973 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4", |
| 185974 | "ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 185975 | "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4", |
| 185976 | "ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 185977 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K", |
| 185978 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185979 | "ZPRMul2_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185980 | "ZPRMul2_with_ZPRMul2_Lo_and_ZPRMul4", |
| 185981 | "ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185982 | "ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185983 | "ZPRMul2_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4", |
| 185984 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185985 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185986 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4", |
| 185987 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185988 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4", |
| 185989 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 185990 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4", |
| 185991 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 185992 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 185993 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 185994 | "ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K", |
| 185995 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 185996 | "ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4", |
| 185997 | "ZPRMul2_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 185998 | "ZPRMul2_with_ZPR_K", |
| 185999 | "ZPRMul4_with_FPR16_lo", |
| 186000 | "ZPRMul4_with_DD_with_dsub1_in_FPR64_lo", |
| 186001 | "ZPRMul4_with_ZPR4_with_zsub2_in_ZPRMul2_Hi", |
| 186002 | "ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186003 | "FPR16_lo", |
| 186004 | "ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K", |
| 186005 | "ZPR2_with_zsub1_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7", |
| 186006 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 186007 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7", |
| 186008 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4", |
| 186009 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 186010 | "ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4", |
| 186011 | "ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K", |
| 186012 | "ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 186013 | "FPR128_0to7_with_ZPR_K", |
| 186014 | "ZPRMul2_Hi_with_QQQQ_with_qsub3_in_FPR128_0to7", |
| 186015 | "ZPR_K", |
| 186016 | "ZPRMul4_with_DDD_with_dsub2_in_FPR64_lo", |
| 186017 | "DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 186018 | "DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 186019 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 186020 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR_K", |
| 186021 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4", |
| 186022 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4", |
| 186023 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 186024 | "ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K", |
| 186025 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K", |
| 186026 | "ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 186027 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 186028 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4", |
| 186029 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K", |
| 186030 | "FPR16_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4", |
| 186031 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR_K", |
| 186032 | "ZPRMul2_with_ZPR4_with_zsub1_in_ZPR_K", |
| 186033 | "ZPRMul2_with_ZPR4_with_zsub1_in_ZPRMul2_Hi", |
| 186034 | "ZPRMul2_with_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186035 | "FPR16_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4", |
| 186036 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K", |
| 186037 | "ZPR3_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186038 | "ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K", |
| 186039 | "GPR64x8Class_with_x8sub_0_in_tcGPR64", |
| 186040 | "ZPRMul2_with_FPR16_lo", |
| 186041 | "FPR16_lo_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K", |
| 186042 | "DD_with_dsub1_in_FPR64_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4", |
| 186043 | "DDD_with_dsub2_in_FPR64_lo_with_ZPR2_with_zsub1_in_ZPRMul4", |
| 186044 | "ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K", |
| 186045 | "ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186046 | "ZPR3_with_zsub1_in_ZPRMul4_with_ZPR_K", |
| 186047 | "FPR128_0to7_with_ZPR4_with_zsub1_in_ZPR_K", |
| 186048 | "QQ_with_qsub1_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi", |
| 186049 | "QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186050 | "FPR16_lo_with_ZPR3_with_zsub1_in_ZPRMul4", |
| 186051 | "FPR16_lo_with_ZPR3_with_zsub2_in_ZPRMul4", |
| 186052 | "DDD_with_dsub2_in_FPR64_lo_with_ZPR3_with_zsub1_in_ZPRMul4", |
| 186053 | "DDDD_with_dsub3_in_FPR64_lo_with_ZPR3_with_zsub2_in_ZPRMul4", |
| 186054 | "QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi", |
| 186055 | "ZPR3_with_zsub0_in_ZPRMul4_with_ZPR_K", |
| 186056 | "ZPRMul2_Hi_with_ZPR3_with_zsub1_in_ZPRMul4", |
| 186057 | "ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K", |
| 186058 | "ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi", |
| 186059 | "GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", |
| 186060 | "FPR8", |
| 186061 | "GPR32", |
| 186062 | }; |
| 186063 | return PressureNameTable[Idx]; |
| 186064 | } |
| 186065 | |
| 186066 | // Get the register unit pressure limit for this dimension. |
| 186067 | // This limit must be adjusted dynamically for reserved registers. |
| 186068 | unsigned AArch64GenRegisterInfo:: |
| 186069 | getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const { |
| 186070 | static const uint8_t PressureLimitTable[] = { |
| 186071 | 1, // 0: ZTR |
| 186072 | 2, // 1: PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15 |
| 186073 | 2, // 2: PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 186074 | 2, // 3: tcGPRx17 |
| 186075 | 2, // 4: XSeqPairsClass_with_subo64_in_FIXED_REGS |
| 186076 | 4, // 5: MatrixIndexGPR32_12_15 |
| 186077 | 4, // 6: MatrixIndexGPR32_8_11 |
| 186078 | 4, // 7: ZPRMul4_and_ZPR_K |
| 186079 | 5, // 8: PPRMul2_and_PPR_3b |
| 186080 | 5, // 9: PPRMul2_and_PPR_p8to15 |
| 186081 | 5, // 10: FIXED_REGS |
| 186082 | 6, // 11: ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186083 | 6, // 12: ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186084 | 8, // 13: ZPRMul2_Hi |
| 186085 | 8, // 14: ZPRMul2_Lo |
| 186086 | 8, // 15: ZPRMul4 |
| 186087 | 8, // 16: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186088 | 8, // 17: ZPRMul2_Lo_and_ZPRMul4 |
| 186089 | 8, // 18: ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186090 | 8, // 19: GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 186091 | 8, // 20: GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 186092 | 9, // 21: PPRMul2 |
| 186093 | 9, // 22: PPRMul2_with_PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3b |
| 186094 | 9, // 23: ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186095 | 10, // 24: PNR_3b |
| 186096 | 10, // 25: PNR_p8to15 |
| 186097 | 10, // 26: ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186098 | 10, // 27: ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186099 | 11, // 28: FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 186100 | 11, // 29: ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186101 | 12, // 30: ZPRMul2_Hi_with_ZPRMul4 |
| 186102 | 12, // 31: ZPRMul2_Hi_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186103 | 12, // 32: ZPRMul2_Lo_with_ZPRMul4 |
| 186104 | 12, // 33: ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186105 | 12, // 34: ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4 |
| 186106 | 12, // 35: ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186107 | 12, // 36: ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186108 | 12, // 37: ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 186109 | 12, // 38: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186110 | 12, // 39: ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186111 | 13, // 40: PPRMul2_with_PNR_3b |
| 186112 | 13, // 41: PPRMul2_with_PNR_p8to15 |
| 186113 | 13, // 42: ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186114 | 13, // 43: ZPRMul2_Lo_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186115 | 13, // 44: ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186116 | 13, // 45: ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186117 | 13, // 46: ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186118 | 14, // 47: ZPRMul2_Lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186119 | 14, // 48: ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186120 | 14, // 49: ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 186121 | 14, // 50: ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186122 | 14, // 51: ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186123 | 14, // 52: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186124 | 14, // 53: FPR128_0to7_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186125 | 14, // 54: GPR64x8Class_with_x8sub_0_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 186126 | 15, // 55: ZPRMul2_Hi_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 186127 | 15, // 56: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 186128 | 15, // 57: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186129 | 15, // 58: ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186130 | 15, // 59: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186131 | 15, // 60: QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186132 | 15, // 61: QQQQ_with_qsub3_in_FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186133 | 16, // 62: PPRorPNR |
| 186134 | 16, // 63: ZPRMul2 |
| 186135 | 16, // 64: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 186136 | 16, // 65: ZPR2_with_zsub1_in_ZPRMul4 |
| 186137 | 16, // 66: ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b |
| 186138 | 16, // 67: ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 186139 | 16, // 68: ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 186140 | 16, // 69: ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 186141 | 16, // 70: ZPRMul4_with_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 186142 | 16, // 71: ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186143 | 16, // 72: ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186144 | 16, // 73: ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186145 | 16, // 74: ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 186146 | 16, // 75: ZPRMul4_with_FPR128_0to7 |
| 186147 | 16, // 76: ZPRMul4_with_QQ_with_qsub1_in_FPR128_0to7 |
| 186148 | 16, // 77: ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186149 | 16, // 78: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186150 | 16, // 79: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186151 | 16, // 80: FPR128_0to7_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186152 | 16, // 81: ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186153 | 16, // 82: GPR64x8Class_with_x8sub_6_in_tcGPRx16x17_with_GPR64x8Class_with_x8sub_0_in_tcGPRx16x17 |
| 186154 | 17, // 83: ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 |
| 186155 | 17, // 84: ZPRMul4_with_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186156 | 17, // 85: ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186157 | 17, // 86: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186158 | 17, // 87: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186159 | 17, // 88: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186160 | 17, // 89: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186161 | 17, // 90: ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186162 | 17, // 91: ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186163 | 18, // 92: ZPRMul2_Hi_with_QQQ_with_qsub2_in_FPR128_0to7 |
| 186164 | 18, // 93: ZPRMul4_with_ZPR_K |
| 186165 | 18, // 94: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186166 | 18, // 95: GPR64x8Class_with_x8sub_6_in_tcGPRx16x17 |
| 186167 | 19, // 96: ZPRMul2_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186168 | 19, // 97: ZPRMul2_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186169 | 19, // 98: ZPRMul2_Hi_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186170 | 19, // 99: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186171 | 19, // 100: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186172 | 19, // 101: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 186173 | 19, // 102: ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186174 | 19, // 103: ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4 |
| 186175 | 19, // 104: ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186176 | 19, // 105: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 186177 | 19, // 106: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186178 | 20, // 107: ZPRMul2_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186179 | 20, // 108: ZPRMul2_with_ZPRMul2_Lo_and_ZPRMul4 |
| 186180 | 20, // 109: ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186181 | 20, // 110: ZPRMul2_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186182 | 20, // 111: ZPRMul2_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 186183 | 20, // 112: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186184 | 20, // 113: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186185 | 20, // 114: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4 |
| 186186 | 20, // 115: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186187 | 20, // 116: ZPR2_with_zsub1_in_ZPRMul4_with_ZPRMul2_Lo_and_ZPRMul4 |
| 186188 | 20, // 117: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186189 | 20, // 118: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186190 | 20, // 119: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186191 | 20, // 120: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186192 | 20, // 121: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186193 | 21, // 122: ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K |
| 186194 | 21, // 123: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186195 | 21, // 124: ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 186196 | 22, // 125: ZPRMul2_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186197 | 22, // 126: ZPRMul2_with_ZPR_K |
| 186198 | 22, // 127: ZPRMul4_with_FPR16_lo |
| 186199 | 22, // 128: ZPRMul4_with_DD_with_dsub1_in_FPR64_lo |
| 186200 | 22, // 129: ZPRMul4_with_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 186201 | 22, // 130: ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186202 | 22, // 131: FPR16_lo |
| 186203 | 22, // 132: ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K |
| 186204 | 22, // 133: ZPR2_with_zsub1_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 |
| 186205 | 22, // 134: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186206 | 22, // 135: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQ_with_qsub2_in_FPR128_0to7 |
| 186207 | 22, // 136: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 186208 | 22, // 137: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186209 | 22, // 138: ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4 |
| 186210 | 22, // 139: ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR_K |
| 186211 | 22, // 140: ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186212 | 22, // 141: FPR128_0to7_with_ZPR_K |
| 186213 | 22, // 142: ZPRMul2_Hi_with_QQQQ_with_qsub3_in_FPR128_0to7 |
| 186214 | 22, // 143: ZPR_K |
| 186215 | 23, // 144: ZPRMul4_with_DDD_with_dsub2_in_FPR64_lo |
| 186216 | 23, // 145: DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186217 | 23, // 146: DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186218 | 23, // 147: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186219 | 23, // 148: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3b_with_ZPR_K |
| 186220 | 23, // 149: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4 |
| 186221 | 23, // 150: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4 |
| 186222 | 23, // 151: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186223 | 23, // 152: ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K |
| 186224 | 23, // 153: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR_K |
| 186225 | 23, // 154: ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186226 | 23, // 155: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186227 | 23, // 156: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4 |
| 186228 | 23, // 157: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_K |
| 186229 | 24, // 158: FPR16_lo_with_ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4 |
| 186230 | 24, // 159: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR_K |
| 186231 | 25, // 160: ZPRMul2_with_ZPR4_with_zsub1_in_ZPR_K |
| 186232 | 25, // 161: ZPRMul2_with_ZPR4_with_zsub1_in_ZPRMul2_Hi |
| 186233 | 25, // 162: ZPRMul2_with_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186234 | 25, // 163: FPR16_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 186235 | 25, // 164: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K |
| 186236 | 25, // 165: ZPR3_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186237 | 25, // 166: ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K |
| 186238 | 26, // 167: GPR64x8Class_with_x8sub_0_in_tcGPR64 |
| 186239 | 26, // 168: ZPRMul2_with_FPR16_lo |
| 186240 | 26, // 169: FPR16_lo_with_ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_K |
| 186241 | 26, // 170: DD_with_dsub1_in_FPR64_lo_with_ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4 |
| 186242 | 26, // 171: DDD_with_dsub2_in_FPR64_lo_with_ZPR2_with_zsub1_in_ZPRMul4 |
| 186243 | 26, // 172: ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_with_ZPR4_with_zsub1_in_ZPR_K |
| 186244 | 26, // 173: ZPR2_with_zsub1_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186245 | 28, // 174: ZPR3_with_zsub1_in_ZPRMul4_with_ZPR_K |
| 186246 | 28, // 175: FPR128_0to7_with_ZPR4_with_zsub1_in_ZPR_K |
| 186247 | 28, // 176: QQ_with_qsub1_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 186248 | 28, // 177: QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186249 | 29, // 178: FPR16_lo_with_ZPR3_with_zsub1_in_ZPRMul4 |
| 186250 | 29, // 179: FPR16_lo_with_ZPR3_with_zsub2_in_ZPRMul4 |
| 186251 | 29, // 180: DDD_with_dsub2_in_FPR64_lo_with_ZPR3_with_zsub1_in_ZPRMul4 |
| 186252 | 29, // 181: DDDD_with_dsub3_in_FPR64_lo_with_ZPR3_with_zsub2_in_ZPRMul4 |
| 186253 | 29, // 182: QQQ_with_qsub2_in_FPR128_0to7_with_ZPR4_with_zsub2_in_ZPRMul2_Hi |
| 186254 | 29, // 183: ZPR3_with_zsub0_in_ZPRMul4_with_ZPR_K |
| 186255 | 29, // 184: ZPRMul2_Hi_with_ZPR3_with_zsub1_in_ZPRMul4 |
| 186256 | 29, // 185: ZPR3_with_zsub2_in_ZPRMul4_with_ZPR_K |
| 186257 | 29, // 186: ZPR3_with_zsub2_in_ZPRMul4_with_ZPR4_with_zsub3_in_ZPRMul2_Hi |
| 186258 | 30, // 187: GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS |
| 186259 | 32, // 188: FPR8 |
| 186260 | 35, // 189: GPR32 |
| 186261 | }; |
| 186262 | return PressureLimitTable[Idx]; |
| 186263 | } |
| 186264 | |
| 186265 | /// Table of pressure sets per register class or unit. |
| 186266 | static const int RCSetsTable[] = { |
| 186267 | /* 0 */ 0, -1, |
| 186268 | /* 2 */ 24, 40, 62, -1, |
| 186269 | /* 6 */ 25, 41, 62, -1, |
| 186270 | /* 10 */ 21, 22, 40, 41, 62, -1, |
| 186271 | /* 16 */ 8, 21, 22, 24, 40, 41, 62, -1, |
| 186272 | /* 24 */ 9, 21, 22, 25, 40, 41, 62, -1, |
| 186273 | /* 32 */ 1, 9, 21, 24, 25, 40, 41, 62, -1, |
| 186274 | /* 41 */ 2, 8, 22, 24, 25, 40, 41, 62, -1, |
| 186275 | /* 50 */ 2, 8, 21, 22, 24, 25, 40, 41, 62, -1, |
| 186276 | /* 60 */ 1, 9, 21, 22, 24, 25, 40, 41, 62, -1, |
| 186277 | /* 70 */ 127, 131, 158, 163, 168, 169, 178, 179, 188, -1, |
| 186278 | /* 80 */ 128, 131, 158, 168, 169, 170, 178, 179, 180, 188, -1, |
| 186279 | /* 91 */ 127, 128, 131, 158, 163, 168, 169, 170, 178, 179, 180, 188, -1, |
| 186280 | /* 104 */ 131, 144, 146, 170, 171, 180, 181, 188, -1, |
| 186281 | /* 113 */ 131, 144, 145, 168, 170, 171, 179, 180, 181, 188, -1, |
| 186282 | /* 124 */ 131, 144, 145, 146, 168, 170, 171, 179, 180, 181, 188, -1, |
| 186283 | /* 136 */ 128, 131, 144, 145, 158, 168, 169, 170, 171, 178, 179, 180, 181, 188, -1, |
| 186284 | /* 151 */ 128, 131, 144, 145, 146, 158, 168, 169, 170, 171, 178, 179, 180, 181, 188, -1, |
| 186285 | /* 167 */ 127, 128, 131, 144, 145, 158, 163, 168, 169, 170, 171, 178, 179, 180, 181, 188, -1, |
| 186286 | /* 184 */ 127, 128, 131, 144, 145, 146, 158, 163, 168, 169, 170, 171, 178, 179, 180, 181, 188, -1, |
| 186287 | /* 202 */ 53, 75, 80, 127, 128, 131, 141, 144, 145, 146, 158, 163, 168, 169, 170, 171, 175, 178, 179, 180, 181, 188, -1, |
| 186288 | /* 225 */ 53, 76, 79, 80, 128, 131, 141, 142, 144, 145, 146, 158, 168, 169, 170, 171, 175, 176, 178, 179, 180, 181, 188, -1, |
| 186289 | /* 249 */ 53, 75, 76, 79, 80, 127, 128, 131, 141, 142, 144, 145, 146, 158, 163, 168, 169, 170, 171, 175, 176, 178, 179, 180, 181, 188, -1, |
| 186290 | /* 276 */ 53, 58, 61, 79, 83, 94, 125, 131, 133, 135, 137, 141, 142, 144, 146, 148, 170, 171, 175, 176, 177, 180, 181, 182, 188, -1, |
| 186291 | /* 302 */ 53, 58, 60, 79, 83, 92, 125, 131, 133, 135, 141, 142, 144, 145, 146, 148, 168, 170, 171, 175, 176, 177, 179, 180, 181, 182, 188, -1, |
| 186292 | /* 330 */ 53, 58, 60, 61, 79, 83, 92, 94, 125, 131, 133, 135, 137, 141, 142, 144, 145, 146, 148, 168, 170, 171, 175, 176, 177, 179, 180, 181, 182, 188, -1, |
| 186293 | /* 361 */ 53, 58, 60, 61, 79, 83, 92, 94, 125, 131, 133, 135, 137, 141, 142, 144, 145, 146, 148, 153, 168, 170, 171, 174, 175, 176, 177, 179, 180, 181, 182, 188, -1, |
| 186294 | /* 394 */ 66, 86, 125, 127, 128, 131, 144, 145, 146, 147, 148, 158, 163, 168, 169, 170, 171, 178, 179, 180, 181, 182, 188, -1, |
| 186295 | /* 418 */ 58, 66, 75, 76, 79, 83, 86, 125, 127, 128, 131, 133, 144, 145, 146, 147, 148, 158, 163, 168, 169, 170, 171, 178, 179, 180, 181, 182, 188, -1, |
| 186296 | /* 448 */ 53, 58, 60, 76, 79, 80, 83, 86, 92, 125, 128, 131, 133, 135, 141, 142, 144, 145, 146, 148, 158, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 188, -1, |
| 186297 | /* 483 */ 53, 58, 60, 61, 76, 79, 80, 83, 86, 92, 94, 125, 128, 131, 133, 135, 137, 141, 142, 144, 145, 146, 148, 158, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 188, -1, |
| 186298 | /* 521 */ 53, 58, 60, 66, 75, 76, 79, 80, 83, 86, 92, 125, 127, 128, 131, 133, 135, 141, 142, 144, 145, 146, 147, 148, 158, 163, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 188, -1, |
| 186299 | /* 561 */ 53, 58, 60, 61, 66, 75, 76, 79, 80, 83, 86, 92, 94, 125, 127, 128, 131, 133, 135, 137, 141, 142, 144, 145, 146, 147, 148, 158, 163, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 188, -1, |
| 186300 | /* 604 */ 53, 58, 60, 61, 66, 75, 76, 79, 80, 83, 86, 88, 92, 94, 125, 127, 128, 131, 133, 135, 137, 141, 142, 144, 145, 146, 147, 148, 153, 158, 163, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 188, -1, |
| 186301 | /* 650 */ 165, 183, 188, -1, |
| 186302 | /* 654 */ 68, 78, 87, 108, 127, 128, 131, 144, 145, 146, 151, 152, 158, 163, 165, 168, 169, 170, 171, 178, 179, 180, 181, 183, 188, -1, |
| 186303 | /* 680 */ 53, 58, 60, 61, 66, 68, 75, 76, 78, 79, 80, 83, 86, 87, 92, 94, 108, 125, 127, 128, 131, 133, 135, 137, 141, 142, 144, 145, 146, 147, 148, 151, 152, 158, 163, 165, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 183, 188, -1, |
| 186304 | /* 731 */ 174, 178, 180, 184, 188, -1, |
| 186305 | /* 737 */ 52, 73, 89, 98, 105, 114, 119, 123, 127, 128, 131, 134, 138, 155, 156, 158, 163, 168, 169, 170, 174, 178, 179, 180, 184, 188, -1, |
| 186306 | /* 764 */ 70, 79, 88, 89, 113, 116, 128, 131, 144, 145, 146, 153, 154, 158, 168, 169, 170, 171, 174, 178, 179, 180, 181, 184, 188, -1, |
| 186307 | /* 790 */ 52, 70, 73, 79, 88, 89, 98, 105, 113, 114, 116, 119, 123, 127, 128, 131, 134, 138, 144, 145, 146, 153, 154, 155, 156, 158, 163, 168, 169, 170, 171, 174, 178, 179, 180, 181, 184, 188, -1, |
| 186308 | /* 829 */ 52, 53, 70, 73, 75, 76, 79, 80, 88, 89, 98, 105, 113, 114, 116, 119, 123, 127, 128, 131, 134, 138, 141, 142, 144, 145, 146, 153, 154, 155, 156, 158, 163, 168, 169, 170, 171, 174, 175, 176, 178, 179, 180, 181, 184, 188, -1, |
| 186309 | /* 876 */ 53, 58, 60, 61, 70, 76, 79, 80, 83, 86, 88, 89, 92, 94, 113, 116, 125, 128, 131, 133, 135, 137, 141, 142, 144, 145, 146, 148, 153, 154, 158, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 184, 188, -1, |
| 186310 | /* 923 */ 52, 53, 58, 60, 61, 66, 70, 73, 75, 76, 79, 80, 83, 86, 88, 89, 92, 94, 98, 105, 113, 114, 116, 119, 123, 125, 127, 128, 131, 133, 134, 135, 137, 138, 141, 142, 144, 145, 146, 147, 148, 153, 154, 155, 156, 158, 163, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 184, 188, -1, |
| 186311 | /* 986 */ 64, 99, 100, 112, 113, 114, 132, 163, 165, 170, 172, 174, 178, 180, 183, 184, 188, -1, |
| 186312 | /* 1004 */ 17, 34, 46, 50, 64, 68, 70, 78, 79, 87, 88, 89, 99, 100, 108, 112, 113, 114, 116, 127, 128, 131, 132, 144, 145, 146, 151, 152, 153, 154, 158, 163, 165, 168, 169, 170, 171, 172, 174, 178, 179, 180, 181, 183, 184, 188, -1, |
| 186313 | /* 1051 */ 17, 34, 46, 50, 52, 53, 64, 68, 70, 73, 75, 76, 78, 79, 80, 87, 88, 89, 98, 99, 100, 105, 108, 112, 113, 114, 116, 119, 123, 127, 128, 131, 132, 134, 138, 141, 142, 144, 145, 146, 151, 152, 153, 154, 155, 156, 158, 163, 165, 168, 169, 170, 171, 172, 174, 175, 176, 178, 179, 180, 181, 183, 184, 188, -1, |
| 186314 | /* 1116 */ 17, 34, 46, 50, 58, 64, 66, 68, 70, 75, 76, 78, 79, 83, 86, 87, 88, 89, 99, 100, 108, 112, 113, 114, 116, 125, 127, 128, 131, 132, 133, 144, 145, 146, 147, 148, 151, 152, 153, 154, 158, 163, 165, 168, 169, 170, 171, 172, 174, 178, 179, 180, 181, 182, 183, 184, 188, -1, |
| 186315 | /* 1174 */ 17, 34, 46, 50, 53, 58, 60, 61, 64, 66, 68, 70, 75, 76, 78, 79, 80, 83, 86, 87, 88, 89, 92, 94, 99, 100, 108, 112, 113, 114, 116, 125, 127, 128, 131, 132, 133, 135, 137, 141, 142, 144, 145, 146, 147, 148, 151, 152, 153, 154, 158, 163, 165, 168, 169, 170, 171, 172, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 188, -1, |
| 186316 | /* 1245 */ 17, 34, 46, 50, 52, 53, 58, 60, 61, 64, 66, 68, 70, 73, 75, 76, 78, 79, 80, 83, 86, 87, 88, 89, 92, 94, 98, 99, 100, 105, 108, 112, 113, 114, 116, 119, 123, 125, 127, 128, 131, 132, 133, 134, 135, 137, 138, 141, 142, 144, 145, 146, 147, 148, 151, 152, 153, 154, 155, 156, 158, 163, 165, 168, 169, 170, 171, 172, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 188, -1, |
| 186317 | /* 1326 */ 53, 58, 61, 79, 83, 94, 125, 131, 133, 135, 137, 139, 141, 142, 144, 146, 148, 153, 159, 166, 170, 171, 174, 175, 176, 177, 180, 181, 182, 185, 188, -1, |
| 186318 | /* 1358 */ 53, 58, 60, 61, 66, 75, 76, 79, 80, 83, 86, 88, 91, 92, 94, 106, 120, 125, 127, 128, 131, 133, 135, 137, 139, 141, 142, 144, 145, 146, 147, 148, 153, 158, 159, 163, 166, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 185, 188, -1, |
| 186319 | /* 1411 */ 93, 126, 132, 139, 141, 143, 148, 152, 153, 159, 160, 166, 174, 175, 176, 177, 182, 183, 185, 188, -1, |
| 186320 | /* 1432 */ 27, 29, 47, 48, 50, 51, 60, 61, 80, 86, 87, 88, 90, 91, 93, 106, 120, 126, 132, 139, 141, 143, 145, 146, 148, 152, 153, 158, 159, 160, 166, 174, 175, 176, 177, 182, 183, 185, 188, -1, |
| 186321 | /* 1472 */ 53, 58, 61, 79, 83, 93, 94, 125, 126, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 146, 148, 152, 153, 159, 160, 166, 170, 171, 174, 175, 176, 177, 180, 181, 182, 183, 185, 188, -1, |
| 186322 | /* 1511 */ 53, 58, 60, 61, 79, 83, 91, 92, 93, 94, 125, 126, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 145, 146, 148, 152, 153, 159, 160, 166, 168, 170, 171, 174, 175, 176, 177, 179, 180, 181, 182, 183, 185, 188, -1, |
| 186323 | /* 1556 */ 27, 29, 47, 48, 50, 51, 53, 58, 60, 61, 76, 79, 80, 83, 86, 87, 88, 90, 91, 92, 93, 94, 106, 120, 125, 126, 128, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 145, 146, 148, 152, 153, 158, 159, 160, 166, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 185, 188, -1, |
| 186324 | /* 1619 */ 122, 143, 160, 164, 172, 175, 176, 177, 182, 183, 184, 185, 188, -1, |
| 186325 | /* 1633 */ 122, 143, 159, 160, 164, 172, 174, 175, 176, 177, 182, 183, 184, 185, 188, -1, |
| 186326 | /* 1649 */ 93, 122, 126, 132, 139, 141, 143, 148, 152, 153, 159, 160, 164, 166, 172, 174, 175, 176, 177, 182, 183, 184, 185, 188, -1, |
| 186327 | /* 1674 */ 27, 29, 47, 48, 50, 51, 60, 61, 80, 86, 87, 88, 90, 91, 93, 106, 120, 122, 126, 132, 137, 139, 141, 143, 145, 146, 148, 152, 153, 158, 159, 160, 164, 166, 172, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 188, -1, |
| 186328 | /* 1721 */ 53, 58, 61, 79, 83, 93, 94, 122, 125, 126, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 146, 148, 152, 153, 154, 159, 160, 164, 166, 170, 171, 172, 174, 175, 176, 177, 180, 181, 182, 183, 184, 185, 188, -1, |
| 186329 | /* 1765 */ 53, 58, 60, 61, 79, 83, 91, 92, 93, 94, 122, 125, 126, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 145, 146, 148, 152, 153, 154, 159, 160, 164, 166, 168, 170, 171, 172, 174, 175, 176, 177, 179, 180, 181, 182, 183, 184, 185, 188, -1, |
| 186330 | /* 1815 */ 27, 29, 47, 48, 50, 51, 53, 58, 60, 61, 70, 76, 79, 80, 83, 86, 87, 88, 89, 90, 91, 92, 93, 94, 106, 113, 116, 120, 122, 125, 126, 128, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 145, 146, 148, 152, 153, 154, 158, 159, 160, 164, 166, 168, 169, 170, 171, 172, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 188, -1, |
| 186331 | /* 1887 */ 17, 27, 29, 34, 46, 47, 48, 50, 51, 53, 58, 60, 61, 64, 66, 68, 70, 75, 76, 78, 79, 80, 83, 86, 87, 88, 89, 90, 91, 92, 93, 94, 99, 100, 106, 108, 112, 113, 114, 116, 120, 122, 125, 126, 127, 128, 131, 132, 133, 135, 137, 139, 141, 142, 143, 144, 145, 146, 147, 148, 151, 152, 153, 154, 158, 159, 160, 163, 164, 165, 166, 168, 169, 170, 171, 172, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 188, -1, |
| 186332 | /* 1977 */ 130, 143, 162, 172, 173, 177, 183, 184, 186, 188, -1, |
| 186333 | /* 1988 */ 12, 23, 31, 38, 39, 43, 45, 46, 52, 57, 59, 78, 81, 89, 97, 100, 121, 127, 130, 131, 138, 143, 158, 162, 163, 165, 168, 169, 172, 173, 177, 178, 179, 183, 184, 186, 188, -1, |
| 186334 | /* 2026 */ 12, 23, 31, 38, 39, 43, 45, 46, 52, 57, 59, 78, 81, 89, 97, 100, 121, 127, 128, 130, 131, 138, 143, 144, 145, 151, 158, 162, 163, 165, 168, 169, 170, 171, 172, 173, 177, 178, 179, 180, 181, 183, 184, 186, 188, -1, |
| 186335 | /* 2072 */ 12, 17, 23, 31, 34, 38, 39, 43, 45, 46, 50, 52, 57, 59, 64, 68, 70, 73, 78, 79, 81, 87, 88, 89, 97, 98, 99, 100, 105, 108, 112, 113, 114, 116, 119, 121, 123, 127, 128, 130, 131, 132, 134, 138, 143, 144, 145, 146, 151, 152, 153, 154, 155, 156, 158, 162, 163, 165, 168, 169, 170, 171, 172, 173, 174, 177, 178, 179, 180, 181, 183, 184, 186, 188, -1, |
| 186336 | /* 2147 */ 179, 181, 185, 186, 188, -1, |
| 186337 | /* 2153 */ 58, 72, 91, 110, 118, 131, 139, 140, 144, 145, 146, 149, 166, 168, 170, 171, 179, 180, 181, 185, 186, 188, -1, |
| 186338 | /* 2176 */ 59, 74, 101, 106, 111, 124, 127, 128, 131, 136, 144, 145, 150, 157, 158, 163, 166, 168, 169, 170, 171, 178, 179, 180, 181, 185, 186, 188, -1, |
| 186339 | /* 2205 */ 58, 59, 72, 74, 91, 101, 106, 110, 111, 118, 124, 127, 128, 131, 136, 139, 140, 144, 145, 146, 149, 150, 157, 158, 163, 166, 168, 169, 170, 171, 178, 179, 180, 181, 185, 186, 188, -1, |
| 186340 | /* 2243 */ 53, 58, 60, 61, 72, 79, 83, 91, 92, 94, 110, 118, 125, 131, 133, 135, 137, 139, 140, 141, 142, 144, 145, 146, 148, 149, 153, 159, 166, 168, 170, 171, 174, 175, 176, 177, 179, 180, 181, 182, 185, 186, 188, -1, |
| 186341 | /* 2287 */ 53, 58, 59, 60, 66, 72, 74, 75, 76, 79, 80, 83, 86, 91, 92, 101, 106, 110, 111, 118, 124, 125, 127, 128, 131, 133, 135, 136, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 157, 158, 163, 166, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 185, 186, 188, -1, |
| 186342 | /* 2346 */ 53, 58, 59, 60, 61, 66, 72, 74, 75, 76, 79, 80, 83, 86, 88, 91, 92, 94, 101, 106, 110, 111, 118, 120, 124, 125, 127, 128, 131, 133, 135, 136, 137, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 153, 157, 158, 159, 163, 166, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 185, 186, 188, -1, |
| 186343 | /* 2413 */ 63, 96, 97, 107, 108, 109, 110, 111, 125, 126, 160, 161, 162, 165, 168, 179, 181, 182, 183, 185, 186, 188, -1, |
| 186344 | /* 2436 */ 14, 32, 43, 47, 63, 66, 68, 74, 78, 86, 87, 96, 97, 106, 107, 108, 109, 110, 111, 125, 126, 127, 128, 131, 144, 145, 146, 147, 148, 151, 152, 158, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 178, 179, 180, 181, 182, 183, 185, 186, 188, -1, |
| 186345 | /* 2488 */ 14, 32, 43, 47, 53, 58, 59, 63, 66, 68, 72, 74, 75, 78, 80, 86, 87, 91, 96, 97, 101, 106, 107, 108, 109, 110, 111, 118, 124, 125, 126, 127, 128, 131, 136, 139, 140, 141, 144, 145, 146, 147, 148, 149, 150, 151, 152, 157, 158, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 175, 178, 179, 180, 181, 182, 183, 185, 186, 188, -1, |
| 186346 | /* 2558 */ 14, 32, 43, 47, 53, 58, 60, 61, 63, 66, 68, 72, 74, 75, 76, 78, 79, 80, 83, 86, 87, 91, 92, 94, 96, 97, 106, 107, 108, 109, 110, 111, 118, 125, 126, 127, 128, 131, 133, 135, 137, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 151, 152, 158, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 183, 185, 186, 188, -1, |
| 186347 | /* 2635 */ 14, 32, 43, 47, 53, 58, 59, 60, 61, 63, 66, 68, 72, 74, 75, 76, 78, 79, 80, 83, 86, 87, 91, 92, 94, 96, 97, 101, 106, 107, 108, 109, 110, 111, 118, 124, 125, 126, 127, 128, 131, 133, 135, 136, 137, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 157, 158, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 175, 176, 177, 178, 179, 180, 181, 182, 183, 185, 186, 188, -1, |
| 186348 | /* 2718 */ 14, 27, 29, 32, 43, 47, 48, 50, 51, 53, 58, 59, 60, 61, 63, 66, 68, 72, 74, 75, 76, 78, 79, 80, 83, 86, 87, 88, 90, 91, 92, 93, 94, 96, 97, 101, 106, 107, 108, 109, 110, 111, 118, 120, 124, 125, 126, 127, 128, 131, 132, 133, 135, 136, 137, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 157, 158, 159, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 185, 186, 188, -1, |
| 186349 | /* 2815 */ 65, 115, 116, 117, 118, 119, 120, 121, 133, 159, 164, 171, 173, 174, 178, 179, 180, 181, 184, 185, 186, 188, -1, |
| 186350 | /* 2838 */ 26, 36, 58, 65, 70, 72, 79, 88, 89, 91, 102, 106, 110, 113, 115, 116, 117, 118, 119, 120, 121, 128, 131, 133, 139, 140, 144, 145, 146, 149, 153, 154, 158, 159, 164, 166, 168, 169, 170, 171, 173, 174, 178, 179, 180, 181, 184, 185, 186, 188, -1, |
| 186351 | /* 2889 */ 26, 37, 52, 55, 56, 59, 65, 73, 74, 89, 98, 101, 103, 104, 105, 106, 111, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 127, 128, 131, 133, 134, 136, 138, 144, 145, 150, 155, 156, 157, 158, 159, 163, 164, 166, 168, 169, 170, 171, 173, 174, 178, 179, 180, 181, 184, 185, 186, 188, -1, |
| 186352 | /* 2949 */ 26, 36, 37, 52, 55, 56, 58, 59, 65, 70, 72, 73, 74, 79, 88, 89, 91, 98, 101, 102, 103, 104, 105, 106, 110, 111, 113, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 127, 128, 131, 133, 134, 136, 138, 139, 140, 144, 145, 146, 149, 150, 153, 154, 155, 156, 157, 158, 159, 163, 164, 166, 168, 169, 170, 171, 173, 174, 178, 179, 180, 181, 184, 185, 186, 188, -1, |
| 186353 | /* 3025 */ 26, 36, 53, 58, 60, 61, 65, 70, 72, 76, 79, 80, 83, 86, 88, 89, 91, 92, 94, 102, 106, 110, 113, 115, 116, 117, 118, 119, 120, 121, 125, 128, 131, 133, 135, 137, 139, 140, 141, 142, 144, 145, 146, 148, 149, 153, 154, 158, 159, 164, 166, 168, 169, 170, 171, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 184, 185, 186, 188, -1, |
| 186354 | /* 3095 */ 26, 36, 37, 52, 53, 55, 56, 58, 59, 60, 65, 66, 70, 72, 73, 74, 75, 76, 79, 80, 83, 86, 88, 89, 91, 92, 98, 101, 102, 103, 104, 105, 106, 110, 111, 113, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 125, 127, 128, 131, 133, 134, 135, 136, 138, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 153, 154, 155, 156, 157, 158, 159, 163, 164, 166, 168, 169, 170, 171, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 184, 185, 186, 188, -1, |
| 186355 | /* 3190 */ 26, 36, 37, 52, 53, 55, 56, 58, 59, 60, 61, 65, 66, 70, 72, 73, 74, 75, 76, 79, 80, 83, 86, 88, 89, 91, 92, 94, 98, 101, 102, 103, 104, 105, 106, 110, 111, 113, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 125, 127, 128, 131, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 153, 154, 155, 156, 157, 158, 159, 163, 164, 166, 168, 169, 170, 171, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 184, 185, 186, 188, -1, |
| 186356 | /* 3288 */ 129, 143, 161, 172, 173, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186357 | /* 3302 */ 129, 130, 143, 161, 162, 172, 173, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186358 | /* 3318 */ 129, 143, 161, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186359 | /* 3334 */ 122, 129, 143, 160, 161, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186360 | /* 3352 */ 77, 81, 102, 104, 122, 126, 129, 140, 142, 143, 154, 155, 157, 160, 161, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186361 | /* 3380 */ 129, 130, 143, 161, 162, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186362 | /* 3398 */ 84, 122, 129, 130, 143, 160, 161, 162, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186363 | /* 3419 */ 85, 122, 129, 130, 143, 156, 160, 161, 162, 164, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186364 | /* 3441 */ 57, 67, 103, 107, 122, 129, 130, 134, 135, 143, 149, 150, 160, 161, 162, 164, 165, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186365 | /* 3470 */ 39, 49, 85, 105, 122, 129, 130, 143, 156, 160, 161, 162, 164, 169, 172, 173, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186366 | /* 3496 */ 122, 129, 143, 159, 160, 161, 164, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186367 | /* 3516 */ 122, 129, 130, 143, 159, 160, 161, 162, 164, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186368 | /* 3538 */ 93, 122, 126, 129, 132, 139, 141, 143, 148, 152, 153, 159, 160, 161, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186369 | /* 3567 */ 77, 93, 102, 122, 126, 129, 132, 139, 140, 141, 142, 143, 148, 152, 153, 154, 159, 160, 161, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186370 | /* 3601 */ 77, 81, 93, 102, 104, 122, 126, 129, 132, 140, 142, 143, 154, 155, 157, 159, 160, 161, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186371 | /* 3634 */ 77, 81, 93, 102, 104, 122, 126, 129, 132, 139, 140, 141, 142, 143, 148, 152, 153, 154, 155, 157, 159, 160, 161, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186372 | /* 3672 */ 11, 27, 44, 84, 85, 93, 96, 99, 122, 126, 129, 130, 132, 139, 141, 143, 148, 152, 153, 156, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186373 | /* 3711 */ 11, 27, 44, 84, 85, 90, 93, 96, 99, 122, 126, 129, 130, 132, 139, 141, 143, 148, 152, 153, 156, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186374 | /* 3751 */ 77, 81, 93, 102, 104, 122, 126, 129, 130, 132, 139, 140, 141, 142, 143, 148, 152, 153, 154, 155, 157, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186375 | /* 3791 */ 11, 27, 44, 77, 81, 84, 85, 93, 96, 99, 102, 104, 122, 126, 129, 130, 132, 139, 140, 141, 142, 143, 148, 152, 153, 154, 155, 156, 157, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186376 | /* 3839 */ 11, 27, 29, 44, 47, 48, 50, 51, 60, 61, 80, 84, 85, 86, 87, 88, 90, 91, 93, 96, 99, 106, 120, 122, 126, 129, 130, 132, 139, 141, 143, 145, 146, 148, 152, 153, 156, 158, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186377 | /* 3896 */ 57, 67, 77, 81, 93, 102, 103, 104, 107, 122, 126, 129, 130, 132, 134, 135, 139, 140, 141, 142, 143, 148, 149, 150, 152, 153, 154, 155, 157, 159, 160, 161, 162, 164, 165, 166, 172, 173, 174, 175, 176, 177, 182, 183, 184, 185, 186, 188, -1, |
| 186378 | /* 3945 */ 12, 23, 31, 38, 39, 43, 45, 46, 52, 57, 59, 78, 81, 89, 97, 98, 100, 103, 105, 121, 127, 129, 130, 131, 134, 138, 143, 150, 155, 156, 158, 161, 162, 163, 164, 165, 168, 169, 172, 173, 175, 176, 177, 178, 179, 182, 183, 184, 185, 186, 188, -1, |
| 186379 | /* 3997 */ 69, 112, 115, 123, 129, 130, 136, 137, 143, 161, 162, 164, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186380 | /* 4024 */ 69, 84, 112, 115, 122, 123, 129, 130, 136, 137, 143, 159, 160, 161, 162, 164, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186381 | /* 4055 */ 11, 27, 29, 44, 47, 48, 50, 51, 60, 61, 69, 80, 84, 85, 86, 87, 88, 90, 91, 93, 96, 99, 106, 112, 115, 120, 122, 123, 126, 129, 130, 132, 136, 137, 139, 141, 143, 145, 146, 148, 152, 153, 156, 158, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186382 | /* 4120 */ 16, 33, 38, 56, 57, 64, 67, 69, 94, 99, 100, 101, 103, 107, 112, 113, 114, 115, 122, 123, 129, 130, 132, 134, 135, 136, 137, 143, 149, 150, 160, 161, 162, 163, 164, 165, 170, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186383 | /* 4172 */ 16, 33, 38, 56, 57, 64, 67, 69, 77, 81, 84, 93, 94, 99, 100, 101, 102, 103, 104, 107, 112, 113, 114, 115, 122, 123, 126, 129, 130, 132, 134, 135, 136, 137, 139, 140, 141, 142, 143, 148, 149, 150, 152, 153, 154, 155, 157, 159, 160, 161, 162, 163, 164, 165, 166, 170, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186384 | /* 4243 */ 11, 16, 27, 33, 38, 44, 56, 57, 64, 67, 69, 77, 81, 84, 85, 93, 94, 96, 99, 100, 101, 102, 103, 104, 107, 112, 113, 114, 115, 122, 123, 126, 129, 130, 132, 134, 135, 136, 137, 139, 140, 141, 142, 143, 148, 149, 150, 152, 153, 154, 155, 156, 157, 159, 160, 161, 162, 163, 164, 165, 166, 170, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186385 | /* 4320 */ 11, 16, 27, 29, 33, 38, 39, 44, 47, 48, 49, 50, 51, 56, 57, 60, 61, 64, 67, 69, 80, 84, 85, 86, 87, 88, 90, 91, 93, 94, 96, 99, 100, 101, 103, 105, 106, 107, 112, 113, 114, 115, 120, 122, 123, 126, 129, 130, 132, 134, 135, 136, 137, 139, 141, 143, 145, 146, 148, 149, 150, 152, 153, 156, 158, 159, 160, 161, 162, 163, 164, 165, 166, 169, 170, 172, 173, 174, 175, 176, 177, 178, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186386 | /* 4410 */ 12, 23, 31, 38, 39, 43, 45, 46, 52, 57, 59, 78, 81, 89, 97, 100, 101, 121, 127, 128, 129, 130, 131, 136, 138, 143, 150, 158, 161, 162, 163, 165, 168, 169, 170, 172, 173, 176, 177, 178, 179, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186387 | /* 4459 */ 12, 23, 31, 38, 39, 43, 45, 46, 52, 56, 57, 59, 69, 73, 78, 81, 89, 97, 98, 100, 101, 103, 105, 112, 114, 115, 119, 121, 123, 127, 128, 129, 130, 131, 134, 136, 137, 138, 143, 150, 155, 156, 158, 161, 162, 163, 164, 165, 168, 169, 170, 172, 173, 174, 175, 176, 177, 178, 179, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186388 | /* 4526 */ 12, 16, 23, 31, 33, 38, 39, 43, 45, 46, 49, 52, 56, 57, 59, 64, 67, 69, 73, 78, 81, 85, 89, 94, 97, 98, 99, 100, 101, 103, 105, 107, 112, 113, 114, 115, 119, 121, 122, 123, 127, 128, 129, 130, 131, 132, 134, 135, 136, 137, 138, 143, 149, 150, 155, 156, 158, 160, 161, 162, 163, 164, 165, 168, 169, 170, 172, 173, 174, 175, 176, 177, 178, 179, 180, 182, 183, 184, 185, 186, 188, -1, |
| 186389 | /* 4608 */ 42, 71, 90, 109, 117, 124, 129, 130, 138, 143, 147, 151, 161, 162, 172, 173, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186390 | /* 4635 */ 122, 129, 143, 160, 161, 164, 172, 173, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186391 | /* 4655 */ 42, 71, 84, 85, 90, 109, 117, 122, 124, 129, 130, 138, 143, 147, 151, 156, 160, 161, 162, 164, 172, 173, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186392 | /* 4689 */ 13, 30, 31, 42, 55, 57, 63, 67, 77, 81, 92, 96, 97, 98, 102, 103, 104, 107, 108, 109, 110, 111, 122, 125, 126, 129, 130, 134, 135, 140, 142, 143, 149, 150, 154, 155, 157, 160, 161, 162, 164, 165, 168, 172, 173, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186393 | /* 4746 */ 39, 42, 49, 71, 84, 85, 90, 105, 109, 117, 122, 124, 129, 130, 138, 143, 147, 151, 156, 160, 161, 162, 164, 169, 172, 173, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186394 | /* 4784 */ 77, 93, 102, 122, 126, 129, 132, 139, 140, 141, 142, 143, 148, 152, 153, 154, 159, 160, 161, 164, 166, 172, 173, 174, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186395 | /* 4820 */ 11, 27, 42, 44, 71, 77, 81, 84, 85, 90, 93, 96, 99, 102, 104, 109, 117, 122, 124, 126, 129, 130, 132, 138, 139, 140, 141, 142, 143, 147, 148, 151, 152, 153, 154, 155, 156, 157, 159, 160, 161, 162, 164, 166, 172, 173, 174, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186396 | /* 4879 */ 13, 30, 31, 42, 55, 57, 63, 67, 77, 81, 92, 93, 96, 97, 98, 102, 103, 104, 107, 108, 109, 110, 111, 122, 125, 126, 129, 130, 132, 134, 135, 139, 140, 141, 142, 143, 148, 149, 150, 152, 153, 154, 155, 157, 159, 160, 161, 162, 164, 165, 166, 168, 172, 173, 174, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186397 | /* 4946 */ 11, 13, 27, 30, 31, 42, 44, 55, 57, 63, 67, 71, 77, 81, 84, 85, 90, 92, 93, 96, 97, 98, 99, 102, 103, 104, 107, 108, 109, 110, 111, 117, 122, 124, 125, 126, 129, 130, 132, 134, 135, 138, 139, 140, 141, 142, 143, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 159, 160, 161, 162, 164, 165, 166, 168, 172, 173, 174, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186398 | /* 5027 */ 11, 13, 27, 29, 30, 31, 39, 42, 44, 47, 48, 49, 50, 51, 55, 57, 60, 61, 63, 67, 71, 77, 80, 81, 84, 85, 86, 87, 88, 90, 91, 92, 93, 96, 97, 98, 99, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 117, 120, 122, 124, 125, 126, 129, 130, 132, 134, 135, 138, 139, 140, 141, 142, 143, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 164, 165, 166, 168, 169, 172, 173, 174, 175, 176, 177, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186399 | /* 5129 */ 12, 13, 23, 30, 31, 38, 39, 42, 43, 45, 46, 49, 52, 55, 57, 59, 63, 67, 71, 77, 78, 81, 84, 85, 89, 90, 92, 96, 97, 98, 100, 102, 103, 104, 105, 107, 108, 109, 110, 111, 117, 121, 122, 124, 125, 126, 127, 129, 130, 131, 134, 135, 138, 140, 142, 143, 147, 149, 150, 151, 154, 155, 156, 157, 158, 160, 161, 162, 163, 164, 165, 168, 169, 172, 173, 175, 176, 177, 178, 179, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186400 | /* 5217 */ 53, 58, 61, 77, 79, 83, 93, 94, 102, 122, 125, 126, 129, 131, 132, 133, 135, 137, 139, 140, 141, 142, 143, 144, 146, 148, 149, 152, 153, 154, 159, 160, 161, 164, 166, 170, 171, 172, 173, 174, 175, 176, 177, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186401 | /* 5269 */ 16, 33, 38, 53, 56, 57, 58, 61, 64, 67, 69, 77, 79, 81, 83, 84, 93, 94, 99, 100, 101, 102, 103, 104, 107, 112, 113, 114, 115, 122, 123, 125, 126, 129, 130, 131, 132, 133, 134, 135, 136, 137, 139, 140, 141, 142, 143, 144, 146, 148, 149, 150, 152, 153, 154, 155, 157, 159, 160, 161, 162, 163, 164, 165, 166, 170, 171, 172, 173, 174, 175, 176, 177, 178, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186402 | /* 5352 */ 53, 58, 60, 61, 72, 77, 79, 83, 91, 92, 93, 94, 102, 110, 118, 122, 125, 126, 129, 131, 132, 133, 135, 137, 139, 140, 141, 142, 143, 144, 145, 146, 148, 149, 152, 153, 154, 159, 160, 161, 164, 166, 168, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186403 | /* 5413 */ 13, 30, 31, 42, 53, 55, 57, 58, 60, 61, 63, 67, 72, 77, 79, 81, 83, 91, 92, 93, 94, 96, 97, 98, 102, 103, 104, 107, 108, 109, 110, 111, 118, 122, 125, 126, 129, 130, 131, 132, 133, 134, 135, 137, 139, 140, 141, 142, 143, 144, 145, 146, 148, 149, 150, 152, 153, 154, 155, 157, 159, 160, 161, 162, 164, 165, 166, 168, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186404 | /* 5499 */ 15, 30, 32, 33, 34, 35, 36, 37, 44, 45, 48, 49, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 83, 84, 85, 93, 96, 97, 99, 100, 102, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 127, 128, 129, 130, 132, 133, 140, 144, 147, 149, 151, 154, 159, 160, 161, 162, 163, 164, 165, 166, 168, 170, 171, 172, 173, 174, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186405 | /* 5590 */ 14, 15, 17, 26, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 58, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 83, 84, 85, 86, 87, 88, 89, 91, 93, 96, 97, 99, 100, 102, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 127, 128, 129, 130, 131, 132, 133, 139, 140, 144, 145, 146, 147, 148, 149, 151, 152, 153, 154, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186406 | /* 5706 */ 14, 15, 17, 26, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 52, 55, 56, 58, 59, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 83, 84, 85, 86, 87, 88, 89, 91, 93, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 136, 138, 139, 140, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186407 | /* 5840 */ 12, 23, 31, 38, 39, 42, 43, 45, 46, 52, 57, 59, 71, 74, 78, 81, 89, 90, 97, 100, 101, 106, 109, 111, 117, 121, 124, 127, 128, 129, 130, 131, 136, 138, 143, 144, 145, 147, 150, 151, 157, 158, 161, 162, 163, 165, 166, 168, 169, 170, 171, 172, 173, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186408 | /* 5906 */ 12, 14, 23, 31, 32, 38, 39, 42, 43, 45, 46, 47, 52, 57, 59, 63, 66, 68, 71, 74, 78, 81, 86, 87, 89, 90, 96, 97, 100, 101, 106, 107, 108, 109, 110, 111, 117, 121, 124, 125, 126, 127, 128, 129, 130, 131, 136, 138, 143, 144, 145, 146, 147, 148, 150, 151, 152, 157, 158, 160, 161, 162, 163, 165, 166, 168, 169, 170, 171, 172, 173, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186409 | /* 5990 */ 18, 35, 42, 51, 65, 69, 71, 90, 109, 112, 115, 116, 117, 118, 119, 120, 121, 123, 124, 129, 130, 133, 136, 137, 138, 143, 147, 151, 156, 159, 161, 162, 164, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186410 | /* 6041 */ 27, 29, 47, 48, 50, 51, 60, 61, 65, 77, 80, 86, 87, 88, 90, 91, 93, 102, 106, 115, 116, 117, 118, 119, 120, 121, 122, 126, 129, 132, 133, 137, 139, 140, 141, 142, 143, 145, 146, 148, 152, 153, 154, 158, 159, 160, 161, 164, 166, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186411 | /* 6108 */ 11, 18, 27, 29, 35, 42, 44, 47, 48, 50, 51, 60, 61, 65, 69, 71, 77, 80, 81, 84, 85, 86, 87, 88, 90, 91, 93, 96, 99, 102, 104, 106, 109, 112, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 126, 129, 130, 132, 133, 136, 137, 138, 139, 140, 141, 142, 143, 145, 146, 147, 148, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 164, 166, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186412 | /* 6201 */ 18, 35, 39, 42, 49, 51, 65, 69, 71, 84, 85, 90, 105, 109, 112, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 129, 130, 133, 136, 137, 138, 143, 147, 151, 156, 159, 160, 161, 162, 164, 169, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186413 | /* 6260 */ 7, 13, 15, 16, 18, 23, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 42, 44, 45, 48, 49, 51, 55, 56, 57, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 81, 83, 84, 85, 90, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 132, 133, 134, 135, 136, 137, 138, 140, 142, 143, 144, 147, 149, 150, 151, 154, 155, 156, 157, 159, 160, 161, 162, 163, 164, 165, 166, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186414 | /* 6388 */ 7, 11, 13, 15, 16, 18, 23, 27, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 42, 44, 45, 47, 48, 49, 50, 51, 55, 56, 57, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 80, 81, 83, 84, 85, 86, 87, 88, 90, 91, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186415 | /* 6536 */ 26, 27, 29, 36, 47, 48, 50, 51, 53, 58, 60, 61, 65, 70, 72, 76, 77, 79, 80, 83, 86, 87, 88, 89, 90, 91, 92, 93, 94, 102, 106, 110, 113, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 128, 129, 131, 132, 133, 135, 137, 139, 140, 141, 142, 143, 144, 145, 146, 148, 149, 152, 153, 154, 158, 159, 160, 161, 164, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186416 | /* 6626 */ 26, 27, 29, 36, 47, 48, 50, 51, 53, 58, 60, 61, 65, 70, 72, 76, 77, 79, 80, 81, 83, 86, 87, 88, 89, 90, 91, 92, 93, 94, 102, 104, 106, 110, 113, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 128, 129, 131, 132, 133, 135, 137, 139, 140, 141, 142, 143, 144, 145, 146, 148, 149, 152, 153, 154, 155, 157, 158, 159, 160, 161, 164, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186417 | /* 6720 */ 12, 18, 23, 26, 31, 35, 37, 38, 39, 42, 43, 45, 46, 51, 52, 55, 56, 57, 59, 65, 69, 71, 73, 74, 78, 81, 89, 90, 97, 98, 100, 101, 103, 104, 105, 106, 109, 111, 112, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 127, 128, 129, 130, 131, 133, 134, 136, 137, 138, 143, 144, 145, 147, 150, 151, 155, 156, 157, 158, 159, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186418 | /* 6817 */ 12, 18, 23, 26, 31, 35, 37, 38, 39, 42, 43, 45, 46, 51, 52, 55, 56, 57, 59, 65, 69, 71, 73, 74, 78, 81, 89, 90, 97, 98, 100, 101, 103, 104, 105, 106, 109, 111, 112, 114, 115, 116, 117, 118, 119, 120, 121, 123, 124, 127, 128, 129, 130, 131, 133, 134, 136, 137, 138, 143, 144, 145, 146, 147, 150, 151, 155, 156, 157, 158, 159, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186419 | /* 6915 */ 7, 13, 15, 16, 18, 23, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 42, 44, 45, 48, 49, 51, 55, 56, 57, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 81, 83, 84, 85, 90, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186420 | /* 7051 */ 14, 15, 17, 26, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 53, 58, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 83, 84, 85, 86, 87, 88, 89, 91, 92, 93, 94, 96, 97, 99, 100, 102, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 127, 128, 129, 130, 131, 132, 133, 135, 137, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 151, 152, 153, 154, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186421 | /* 7180 */ 14, 15, 17, 26, 27, 29, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 51, 53, 58, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 96, 97, 99, 100, 102, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 125, 126, 127, 128, 129, 130, 131, 132, 133, 135, 137, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 151, 152, 153, 154, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186422 | /* 7314 */ 7, 12, 13, 15, 16, 18, 23, 26, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 42, 43, 44, 45, 46, 48, 49, 51, 52, 55, 56, 57, 59, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 81, 83, 84, 85, 89, 90, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 140, 142, 143, 144, 145, 147, 149, 150, 151, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186423 | /* 7457 */ 14, 15, 17, 26, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 55, 56, 58, 59, 60, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 83, 84, 85, 86, 87, 88, 89, 91, 92, 93, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 138, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186424 | /* 7601 */ 14, 15, 17, 26, 30, 32, 33, 34, 35, 36, 37, 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 55, 56, 58, 59, 60, 61, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 83, 84, 85, 86, 87, 88, 89, 91, 92, 93, 94, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 188, -1, |
| 186425 | /* 7748 */ 10, 28, 189, -1, |
| 186426 | /* 7752 */ 4, 10, 20, 28, 54, 187, 189, -1, |
| 186427 | /* 7760 */ 20, 28, 54, 167, 187, 189, -1, |
| 186428 | /* 7767 */ 19, 54, 82, 167, 187, 189, -1, |
| 186429 | /* 7774 */ 19, 20, 28, 54, 82, 167, 187, 189, -1, |
| 186430 | /* 7783 */ 5, 82, 95, 167, 187, 189, -1, |
| 186431 | /* 7790 */ 6, 82, 95, 167, 187, 189, -1, |
| 186432 | /* 7797 */ 3, 19, 54, 82, 95, 167, 187, 189, -1, |
| 186433 | }; |
| 186434 | |
| 186435 | /// Get the dimensions of register pressure impacted by this register class. |
| 186436 | /// Returns a -1 terminated array of pressure set IDs |
| 186437 | const int *AArch64GenRegisterInfo:: |
| 186438 | getRegClassPressureSets(const TargetRegisterClass *RC) const { |
| 186439 | static const uint16_t RCSetStartTable[] = { |
| 186440 | 1,1,1,1,1,1,78,78,4,184,4,4,2,6,10,2,6,16,24,4,4,4,2,6,2,6,2,6,2,6,2,6,2,6,2,6,32,41,7750,78,7750,7750,7750,184,7763,7783,7790,1,7748,7750,7757,7763,7783,7790,7750,78,7750,7750,7750,7750,7757,7763,7763,7763,184,7763,7748,7783,7790,7748,7797,7752,7748,7797,78,167,151,7750,184,7757,7750,7757,7763,7763,7763,7763,7763,7783,7790,7797,7752,78,78,184,1,2413,184,561,4689,2436,5499,561,3634,6260,5590,2558,4879,7051,6915,78,91,136,124,167,151,184,78,70,80,113,104,91,136,124,167,151,184,78,78,78,78,151,167,78,78,184,151,78,167,184,184,3334,184,986,184,521,483,3334,184,394,3634,184,2413,483,986,3567,3380,151,2815,3496,521,167,561,561,184,4120,1004,3634,3634,4120,1004,3634,561,1116,4689,2436,5499,3634,3567,5990,2838,483,3516,521,2889,4172,3751,561,2949,6260,5590,4879,1174,4172,3896,6041,3025,6201,3095,6915,6536,6108,3190,6720,1,78,78,136,124,91,136,124,78,78,91,151,167,151,167,184,184,249,448,330,448,330,650,1649,3334,167,3318,151,731,3496,3302,124,2147,3334,249,91,483,521,483,3399,521,184,184,561,3567,3496,561,1649,3634,3441,4635,654,3567,521,3997,764,3496,483,4608,2153,330,3399,249,737,2176,3538,4655,3751,561,561,790,2205,1765,680,3896,1674,3634,4784,876,4024,2243,4746,829,2287,1815,5352,4055,4820,923,2346,4459,5840,78,78,80,113,104,70,78,80,113,104,78,78,70,136,124,91,136,124,91,151,167,151,167,184,184,78,78,202,225,302,276,78,78,184,225,302,276,1411,1619,91,3318,136,78,1633,3288,124,78,3334,1977,104,78,3334,202,70,448,330,249,448,151,330,3334,3380,249,167,184,483,521,3334,184,3334,184,483,1649,3496,3334,521,184,561,3334,184,561,3352,394,184,2413,3334,1411,3567,3334,184,1649,249,1619,3380,151,3496,448,3334,3496,3302,124,3334,330,1977,104,276,3399,202,70,91,167,3601,418,483,1472,3538,3398,3538,3419,3516,521,561,184,184,184,3634,561,4689,2436,5499,1511,1721,1472,3567,1432,3672,1649,483,3516,361,3398,1326,3470,202,249,561,521,1988,6260,5590,1556,1765,5217,3839,3791,3711,561,604,1358,3945,4410,2026,7757,7757,7757,7757,7757,7757,7757,7757,7763,7757,7757,7757,7763,7763,7763,7763,7763,7757,7757,7757,7757,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7757,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,7763,1,7763,7784,7784,7784,7785,7785,7763,7763,7785,7784,7767,7785,7784,7763,7784,7763,7784,7754,0,1,1,1,}; |
| 186441 | return &RCSetsTable[RCSetStartTable[RC->getID()]]; |
| 186442 | } |
| 186443 | |
| 186444 | /// Get the dimensions of register pressure impacted by this register unit. |
| 186445 | /// Returns a -1 terminated array of pressure set IDs |
| 186446 | const int *AArch64GenRegisterInfo:: |
| 186447 | getRegUnitPressureSets(unsigned RegUnit) const { |
| 186448 | assert(RegUnit < 297 && "invalid register unit"); |
| 186449 | static const uint16_t RUSetStartTable[] = { |
| 186450 | 7748,7752,1,1,1,1,7750,1,1,7748,1,7748,7750,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,7180,1887,2718,3190,7601,1245,2635,3190,7457,1051,2488,2949,5706,2072,5906,6817,7314,4526,5129,6201,6915,4243,4946,6108,6388,4320,5027,6201,6915,5269,5413,6626,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,50,2,16,2,16,2,16,32,60,6,24,6,24,6,24,41,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,7763,7763,7763,7763,7785,7785,7785,7785,7790,7790,7790,7790,7783,7783,7783,7783,7797,7797,7798,7798,7798,7798,7774,7774,7760,7760,7754,7754,7752,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,}; |
| 186451 | return &RCSetsTable[RUSetStartTable[RegUnit]]; |
| 186452 | } |
| 186453 | |
| 186454 | extern const MCRegisterDesc AArch64RegDesc[]; |
| 186455 | extern const int16_t AArch64RegDiffLists[]; |
| 186456 | extern const LaneBitmask AArch64LaneMaskLists[]; |
| 186457 | extern const char AArch64RegStrings[]; |
| 186458 | extern const char AArch64RegClassStrings[]; |
| 186459 | extern const MCPhysReg AArch64RegUnitRoots[][2]; |
| 186460 | extern const uint16_t AArch64SubRegIdxLists[]; |
| 186461 | extern const uint16_t AArch64RegEncodingTable[]; |
| 186462 | // AArch64 Dwarf<->LLVM register mappings. |
| 186463 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0Dwarf2L[]; |
| 186464 | extern const unsigned AArch64DwarfFlavour0Dwarf2LSize; |
| 186465 | |
| 186466 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0Dwarf2L[]; |
| 186467 | extern const unsigned AArch64EHFlavour0Dwarf2LSize; |
| 186468 | |
| 186469 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0L2Dwarf[]; |
| 186470 | extern const unsigned AArch64DwarfFlavour0L2DwarfSize; |
| 186471 | |
| 186472 | extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0L2Dwarf[]; |
| 186473 | extern const unsigned AArch64EHFlavour0L2DwarfSize; |
| 186474 | |
| 186475 | AArch64GenRegisterInfo:: |
| 186476 | AArch64GenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour, |
| 186477 | unsigned PC, unsigned HwMode) |
| 186478 | : TargetRegisterInfo(&AArch64RegInfoDesc, RegisterClasses, RegisterClasses+530, |
| 186479 | SubRegIndexNameTable, SubRegIdxRangeTable, SubRegIndexLaneMaskTable, |
| 186480 | LaneBitmask(0xFFFFFFFFF80003C0), RegClassInfos, VTLists, HwMode) { |
| 186481 | InitMCRegisterInfo(AArch64RegDesc, 895, RA, PC, |
| 186482 | AArch64MCRegisterClasses, 530, |
| 186483 | AArch64RegUnitRoots, |
| 186484 | 297, |
| 186485 | AArch64RegDiffLists, |
| 186486 | AArch64LaneMaskLists, |
| 186487 | AArch64RegStrings, |
| 186488 | AArch64RegClassStrings, |
| 186489 | AArch64SubRegIdxLists, |
| 186490 | 144, |
| 186491 | AArch64RegEncodingTable); |
| 186492 | |
| 186493 | switch (DwarfFlavour) { |
| 186494 | default: |
| 186495 | llvm_unreachable("Unknown DWARF flavour"); |
| 186496 | case 0: |
| 186497 | mapDwarfRegsToLLVMRegs(AArch64DwarfFlavour0Dwarf2L, AArch64DwarfFlavour0Dwarf2LSize, false); |
| 186498 | break; |
| 186499 | } |
| 186500 | switch (EHFlavour) { |
| 186501 | default: |
| 186502 | llvm_unreachable("Unknown DWARF flavour"); |
| 186503 | case 0: |
| 186504 | mapDwarfRegsToLLVMRegs(AArch64EHFlavour0Dwarf2L, AArch64EHFlavour0Dwarf2LSize, true); |
| 186505 | break; |
| 186506 | } |
| 186507 | switch (DwarfFlavour) { |
| 186508 | default: |
| 186509 | llvm_unreachable("Unknown DWARF flavour"); |
| 186510 | case 0: |
| 186511 | mapLLVMRegsToDwarfRegs(AArch64DwarfFlavour0L2Dwarf, AArch64DwarfFlavour0L2DwarfSize, false); |
| 186512 | break; |
| 186513 | } |
| 186514 | switch (EHFlavour) { |
| 186515 | default: |
| 186516 | llvm_unreachable("Unknown DWARF flavour"); |
| 186517 | case 0: |
| 186518 | mapLLVMRegsToDwarfRegs(AArch64EHFlavour0L2Dwarf, AArch64EHFlavour0L2DwarfSize, true); |
| 186519 | break; |
| 186520 | } |
| 186521 | } |
| 186522 | |
| 186523 | static const MCPhysReg CSR_AArch64_AAPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186524 | static const uint32_t CSR_AArch64_AAPCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186525 | static const MCPhysReg CSR_AArch64_AAPCS_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; |
| 186526 | static const uint32_t CSR_AArch64_AAPCS_SCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ffc, 0x00000ffe, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0xc0000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017e0060, 0x0000007c, 0x00000000, 0x00000000, 0x00000000, }; |
| 186527 | static const MCPhysReg CSR_AArch64_AAPCS_SwiftError_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186528 | static const uint32_t CSR_AArch64_AAPCS_SwiftError_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fd8, 0x00000fec, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fd, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x01780000, 0x00000070, 0x00000000, 0x00000000, 0x00000000, }; |
| 186529 | static const MCPhysReg CSR_AArch64_AAPCS_SwiftError_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; |
| 186530 | static const uint32_t CSR_AArch64_AAPCS_SwiftError_SCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fdc, 0x00000fee, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0xc0000000, 0x03f807fd, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017a0000, 0x00000074, 0x00000000, 0x00000000, 0x00000000, }; |
| 186531 | static const MCPhysReg CSR_AArch64_AAPCS_SwiftTail_SaveList[] = { AArch64::X19, AArch64::X21, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186532 | static const uint32_t CSR_AArch64_AAPCS_SwiftTail_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fa8, 0x00000fd4, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fa, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01700000, 0x00000060, 0x00000000, 0x00000000, 0x00000000, }; |
| 186533 | static const MCPhysReg CSR_AArch64_AAPCS_ThisReturn_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, 0 }; |
| 186534 | static const uint32_t CSR_AArch64_AAPCS_ThisReturn_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00010000, 0x0000fff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80001000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186535 | static const MCPhysReg CSR_AArch64_AAPCS_X18_SaveList[] = { AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186536 | static const uint32_t CSR_AArch64_AAPCS_X18_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ffc, 0x00000ffe, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0xc0000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017e0060, 0x0000007c, 0x00000000, 0x00000000, 0x00000000, }; |
| 186537 | static const MCPhysReg CSR_AArch64_AAVPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, 0 }; |
| 186538 | static const uint32_t CSR_AArch64_AAVPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0x000000ff, 0xff000000, 0xff0000ff, 0x000000ff, 0x00007ff8, 0x00000ffc, 0x00000000, 0xfff00000, 0xfff0000f, 0xfff0000f, 0x0000000f, 0xfff00000, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x00000001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186539 | static const MCPhysReg CSR_AArch64_AAVPCS_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::X18, 0 }; |
| 186540 | static const uint32_t CSR_AArch64_AAVPCS_SCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0x000000ff, 0xff000000, 0xff0000ff, 0x000000ff, 0x00007ffc, 0x00000ffe, 0x00000000, 0xfff00000, 0xfff0000f, 0xfff0000f, 0x0000000f, 0xfff00000, 0xc000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x00000001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017e0060, 0x0000007c, 0x00000000, 0x00000000, 0x00000000, }; |
| 186541 | static const MCPhysReg CSR_AArch64_AllRegs_SaveList[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186542 | static const uint32_t CSR_AArch64_AllRegs_RegMask[] = { 0xffff7d44, 0xffffffff, 0xffffffff, 0x0000ffff, 0xffff0000, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000fff, 0x00000000, 0xfffff000, 0xffffffff, 0xffffffff, 0x00000fff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xf80007ff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff7fff7f, 0x0000007f, 0x00000000, 0x00000000, 0x00000000, }; |
| 186543 | static const MCPhysReg CSR_AArch64_AllRegs_SCS_SaveList[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186544 | static const uint32_t CSR_AArch64_AllRegs_SCS_RegMask[] = { 0xffff7d44, 0xffffffff, 0xffffffff, 0x0000ffff, 0xffff0000, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000fff, 0x00000000, 0xfffff000, 0xffffffff, 0xffffffff, 0x00000fff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xf80007ff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff7fff7f, 0x0000007f, 0x00000000, 0x00000000, 0x00000000, }; |
| 186545 | static const MCPhysReg CSR_AArch64_NoRegs_SaveList[] = { 0 }; |
| 186546 | static const uint32_t CSR_AArch64_NoRegs_RegMask[] = { 0x00007000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 186547 | static const MCPhysReg CSR_AArch64_NoRegs_SCS_SaveList[] = { AArch64::X18, 0 }; |
| 186548 | static const uint32_t CSR_AArch64_NoRegs_SCS_RegMask[] = { 0x00007000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 186549 | static const MCPhysReg CSR_AArch64_NoneRegs_SaveList[] = { AArch64::LR, AArch64::FP, 0 }; |
| 186550 | static const uint32_t CSR_AArch64_NoneRegs_RegMask[] = { 0x00007044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00006000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 186551 | static const MCPhysReg CSR_AArch64_NoneRegs_SCS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X18, 0 }; |
| 186552 | static const uint32_t CSR_AArch64_NoneRegs_SCS_RegMask[] = { 0x00007044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00006004, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 186553 | static const MCPhysReg CSR_AArch64_RT_AllRegs_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186554 | static const uint32_t CSR_AArch64_RT_AllRegs_RegMask[] = { 0xff007044, 0xff00ffff, 0xff00ffff, 0x0000ffff, 0xff000000, 0xff00ffff, 0xfe00ffff, 0x7f007ff8, 0x00000ffc, 0x00000000, 0xfff00000, 0xfff00fff, 0xfff00fff, 0x00000fff, 0xfff00000, 0x8fe00fff, 0xfff807ff, 0xfff803ff, 0xfff800ff, 0x000001ff, 0x03fffff8, 0x00fffff8, 0x09fffff8, 0xc17ce040, 0x00000079, 0x00000000, 0x00000000, 0x00000000, }; |
| 186555 | static const MCPhysReg CSR_AArch64_RT_AllRegs_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, AArch64::X18, 0 }; |
| 186556 | static const uint32_t CSR_AArch64_RT_AllRegs_SCS_RegMask[] = { 0xff007044, 0xff00ffff, 0xff00ffff, 0x0000ffff, 0xff000000, 0xff00ffff, 0xfe00ffff, 0x7f007ffc, 0x00000ffe, 0x00000000, 0xfff00000, 0xfff00fff, 0xfff00fff, 0x00000fff, 0xfff00000, 0xcfe00fff, 0xfff807ff, 0xfff803ff, 0xfff800ff, 0x000001ff, 0x03fffff8, 0x00fffff8, 0x09fffff8, 0xc17ee060, 0x0000007d, 0x00000000, 0x00000000, 0x00000000, }; |
| 186557 | static const MCPhysReg CSR_AArch64_RT_MostRegs_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, 0 }; |
| 186558 | static const uint32_t CSR_AArch64_RT_MostRegs_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0xfe000000, 0x7f007ff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x8fe00000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xc17ce040, 0x00000079, 0x00000000, 0x00000000, 0x00000000, }; |
| 186559 | static const MCPhysReg CSR_AArch64_RT_MostRegs_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, 0 }; |
| 186560 | static const uint32_t CSR_AArch64_RT_MostRegs_SCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0xfe000000, 0x7f007ffc, 0x00000ffe, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0xcfe00000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xc17ee060, 0x0000007d, 0x00000000, 0x00000000, 0x00000000, }; |
| 186561 | static const MCPhysReg CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_SaveList[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; |
| 186562 | static const uint32_t CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_RegMask[] = { 0xffff7044, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3fffffff, 0x1ffffff8, 0xfffffffc, 0x00000fff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x83ffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff7c7f40, 0xfffffff8, 0xffffffff, 0xffffffff, 0x7fffffff, }; |
| 186563 | static const MCPhysReg CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1_SaveList[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; |
| 186564 | static const uint32_t CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1_RegMask[] = { 0xffff7044, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffeffff, 0x7fff7ff8, 0xfffffffc, 0x00000fff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x8fffefff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xefffffff, 0xfd7cfe41, 0xfffffff9, 0xffffffff, 0xffffffff, 0x7fffffff, }; |
| 186565 | static const MCPhysReg CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_SaveList[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; |
| 186566 | static const uint32_t CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_RegMask[] = { 0xffff7044, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xfffcffff, 0x7ffe7ff8, 0xfffffffc, 0x00000fff, 0xfffff000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x8fffcfff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xefffffff, 0xfd7cfe41, 0xfffffff9, 0xffffffff, 0xffffffff, 0x7fffffff, }; |
| 186567 | static const MCPhysReg CSR_AArch64_SMStartStop_SaveList[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; |
| 186568 | static const uint32_t CSR_AArch64_SMStartStop_RegMask[] = { 0x00007044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0xffffffff, 0x00000fff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfffff000, 0x000007ff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf8000000, 0xff7fff7f, 0x0000007f, 0x00000000, 0x00000000, 0x00000000, }; |
| 186569 | static const MCPhysReg CSR_AArch64_SVE_AAPCS_SaveList[] = { AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; |
| 186570 | static const uint32_t CSR_AArch64_SVE_AAPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0xfff000ff, 0xff00fff0, 0xff0000ff, 0x000000ff, 0x00007ff8, 0xfff00ffc, 0x0000000f, 0xfff00000, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x03ff8001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x3fff8078, 0x0fff8000, 0x1fff8000, 0x00000000, }; |
| 186571 | static const MCPhysReg CSR_AArch64_SVE_AAPCS_SCS_SaveList[] = { AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::X18, 0 }; |
| 186572 | static const uint32_t CSR_AArch64_SVE_AAPCS_SCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0xfff000ff, 0xff00fff0, 0xff0000ff, 0x000000ff, 0x00007ffc, 0xfff00ffe, 0x0000000f, 0xfff00000, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0xc000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x03ff8001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017e0060, 0x3fff807c, 0x0fff8000, 0x1fff8000, 0x00000000, }; |
| 186573 | static const MCPhysReg CSR_AArch64_StackProbe_Windows_SaveList[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::SP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186574 | static const uint32_t CSR_AArch64_StackProbe_Windows_RegMask[] = { 0xffff7d04, 0xffffffff, 0xffffffff, 0x0000ffff, 0xffff0000, 0xffffffff, 0xffffffff, 0x7fffbffc, 0x00000ffe, 0x00000000, 0xfffff000, 0xffffffff, 0xffffffff, 0x00000fff, 0xfffff000, 0xcfffffff, 0xfffffbff, 0xffffffff, 0xffffffff, 0xf80007ff, 0xffffffff, 0xffffffff, 0xffffffff, 0xff7eff61, 0x0000007d, 0x00000000, 0x00000000, 0x00000000, }; |
| 186575 | static const MCPhysReg CSR_AArch64_TLS_ELF_SaveList[] = { AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186576 | static const uint32_t CSR_AArch64_TLS_ELF_RegMask[] = { 0xffff7004, 0xffffffff, 0xffffffff, 0x0000ffff, 0xffff0000, 0xffffffff, 0xfffeffff, 0xffff3fff, 0x00000fff, 0x00000000, 0xfffff000, 0xffffffff, 0xffffffff, 0x00000fff, 0xfffff000, 0xffffefff, 0xfffffbff, 0xffffffff, 0xffffffff, 0xf80007ff, 0xffffffff, 0xffffffff, 0xefffffff, 0xfd7ffe7f, 0x0000007f, 0x00000000, 0x00000000, 0x00000000, }; |
| 186577 | static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186578 | static const uint32_t CSR_Darwin_AArch64_AAPCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186579 | static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SwiftError_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186580 | static const uint32_t CSR_Darwin_AArch64_AAPCS_SwiftError_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fd8, 0x00000fec, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fd, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x01780000, 0x00000070, 0x00000000, 0x00000000, 0x00000000, }; |
| 186581 | static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SwiftTail_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X21, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186582 | static const uint32_t CSR_Darwin_AArch64_AAPCS_SwiftTail_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fa8, 0x00000fd4, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fa, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01700000, 0x00000060, 0x00000000, 0x00000000, 0x00000000, }; |
| 186583 | static const MCPhysReg CSR_Darwin_AArch64_AAPCS_ThisReturn_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, 0 }; |
| 186584 | static const uint32_t CSR_Darwin_AArch64_AAPCS_ThisReturn_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00010000, 0x0000fff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80001000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186585 | static const MCPhysReg CSR_Darwin_AArch64_AAPCS_Win64_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; |
| 186586 | static const uint32_t CSR_Darwin_AArch64_AAPCS_Win64_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ffc, 0x00000ffe, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0xc0000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017e0060, 0x0000007c, 0x00000000, 0x00000000, 0x00000000, }; |
| 186587 | static const MCPhysReg CSR_Darwin_AArch64_AAVPCS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, 0 }; |
| 186588 | static const uint32_t CSR_Darwin_AArch64_AAVPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0x000000ff, 0xff000000, 0xff0000ff, 0x000000ff, 0x00007ff8, 0x00000ffc, 0x00000000, 0xfff00000, 0xfff0000f, 0xfff0000f, 0x0000000f, 0xfff00000, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x00000001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186589 | static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, 0 }; |
| 186590 | static const uint32_t CSR_Darwin_AArch64_CXX_TLS_RegMask[] = { 0xffff7044, 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0xffff0000, 0x7dfeffff, 0x3eff7ff8, 0x00000ffc, 0x00000000, 0xfffff000, 0x00000fff, 0xfffff000, 0x00000fff, 0xfffff000, 0x87dfefff, 0xffffffff, 0xffffffff, 0xffffffff, 0x000007ff, 0x00000000, 0x00000000, 0x08000000, 0xdd7c6e40, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186591 | static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_PE_SaveList[] = { AArch64::LR, AArch64::FP, 0 }; |
| 186592 | static const uint32_t CSR_Darwin_AArch64_CXX_TLS_PE_RegMask[] = { 0x00007044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00006000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; |
| 186593 | static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_ViaCopy_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, 0 }; |
| 186594 | static const uint32_t CSR_Darwin_AArch64_CXX_TLS_ViaCopy_RegMask[] = { 0xffff7000, 0xffffffff, 0xffffffff, 0x0000ffff, 0x00000000, 0xffff0000, 0x7dfeffff, 0x3eff1ff8, 0x00000ffc, 0x00000000, 0xfffff000, 0x00000fff, 0xfffff000, 0x00000fff, 0xfffff000, 0x87dfefff, 0xfffff9ff, 0xffffffff, 0xffffffff, 0x000007ff, 0x00000000, 0x00000000, 0x00000000, 0xdc3c6e40, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186595 | static const MCPhysReg CSR_Darwin_AArch64_RT_AllRegs_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186596 | static const uint32_t CSR_Darwin_AArch64_RT_AllRegs_RegMask[] = { 0xff007044, 0xff00ffff, 0xff00ffff, 0x0000ffff, 0xff000000, 0xff00ffff, 0xfe00ffff, 0x7f007ff8, 0x00000ffc, 0x00000000, 0xfff00000, 0xfff00fff, 0xfff00fff, 0x00000fff, 0xfff00000, 0x8fe00fff, 0xfff807ff, 0xfff803ff, 0xfff800ff, 0x000001ff, 0x03fffff8, 0x00fffff8, 0x09fffff8, 0xc17ce040, 0x00000079, 0x00000000, 0x00000000, 0x00000000, }; |
| 186597 | static const MCPhysReg CSR_Darwin_AArch64_RT_MostRegs_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, 0 }; |
| 186598 | static const uint32_t CSR_Darwin_AArch64_RT_MostRegs_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0xfe000000, 0x7f007ff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x8fe00000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xc17ce040, 0x00000079, 0x00000000, 0x00000000, 0x00000000, }; |
| 186599 | static const MCPhysReg CSR_Darwin_AArch64_SVE_AAPCS_SaveList[] = { AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, 0 }; |
| 186600 | static const uint32_t CSR_Darwin_AArch64_SVE_AAPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0xfff000ff, 0xff00fff0, 0xff0000ff, 0x000000ff, 0x00007ff8, 0xfff00ffc, 0x0000000f, 0xfff00000, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x03ff8001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x3fff8078, 0x0fff8000, 0x1fff8000, 0x00000000, }; |
| 186601 | static const MCPhysReg CSR_Darwin_AArch64_TLS_SaveList[] = { AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; |
| 186602 | static const uint32_t CSR_Darwin_AArch64_TLS_RegMask[] = { 0xffff7004, 0xffffffff, 0xffffffff, 0x0000ffff, 0xffff0000, 0xffffffff, 0xfffeffff, 0x7fff3ffc, 0x00000ffe, 0x00000000, 0xfffff000, 0xffffffff, 0xffffffff, 0x00000fff, 0xfffff000, 0xcfffefff, 0xfffffbff, 0xffffffff, 0xffffffff, 0xf80007ff, 0xffffffff, 0xffffffff, 0xefffffff, 0xfd7efe61, 0x0000007d, 0x00000000, 0x00000000, 0x00000000, }; |
| 186603 | static const MCPhysReg CSR_Win_AArch64_AAPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186604 | static const uint32_t CSR_Win_AArch64_AAPCS_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007ff8, 0x00000ffc, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807ff, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186605 | static const MCPhysReg CSR_Win_AArch64_AAPCS_SwiftError_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186606 | static const uint32_t CSR_Win_AArch64_AAPCS_SwiftError_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fd8, 0x00000fec, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fd, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x01780000, 0x00000070, 0x00000000, 0x00000000, 0x00000000, }; |
| 186607 | static const MCPhysReg CSR_Win_AArch64_AAPCS_SwiftTail_SaveList[] = { AArch64::X19, AArch64::X21, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; |
| 186608 | static const uint32_t CSR_Win_AArch64_AAPCS_SwiftTail_RegMask[] = { 0xff007044, 0xff000000, 0xff000000, 0x00000000, 0x00000000, 0xff000000, 0x00000000, 0x00007fa8, 0x00000fd4, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x00000000, 0x0ff00000, 0x80000000, 0x03f807fa, 0x00f80000, 0x01f80000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01700000, 0x00000060, 0x00000000, 0x00000000, 0x00000000, }; |
| 186609 | static const MCPhysReg CSR_Win_AArch64_AAVPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, 0 }; |
| 186610 | static const uint32_t CSR_Win_AArch64_AAVPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0x000000ff, 0xff000000, 0xff0000ff, 0x000000ff, 0x00007ff8, 0x00000ffc, 0x00000000, 0xfff00000, 0xfff0000f, 0xfff0000f, 0x0000000f, 0xfff00000, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x00000001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186611 | static const MCPhysReg CSR_Win_AArch64_Arm64EC_Thunk_SaveList[] = { AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, 0 }; |
| 186612 | static const uint32_t CSR_Win_AArch64_Arm64EC_Thunk_RegMask[] = { 0xffc07044, 0xffc00000, 0xffc00000, 0x00000000, 0xffc00000, 0xffc00000, 0x00000000, 0x00007ff8, 0x00000ffc, 0x00000000, 0x0ffc0000, 0x0ffc0000, 0x0ffc0000, 0x00000000, 0x0ffc0000, 0x80000000, 0x03fe07ff, 0x00fe0000, 0x01fe0000, 0x00000000, 0x000003fe, 0x000000fe, 0x080001fe, 0x017c0040, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186613 | static const MCPhysReg CSR_Win_AArch64_CFGuard_Check_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, 0 }; |
| 186614 | static const uint32_t CSR_Win_AArch64_CFGuard_Check_RegMask[] = { 0xffff7044, 0xffff0000, 0xffff0000, 0x00000000, 0x00ff0000, 0xffff0000, 0x01ff0000, 0x00fffff8, 0x00000ffc, 0x00000000, 0x0ffff000, 0x000ff000, 0x0ffff000, 0x00000000, 0x0ffff000, 0x801ff000, 0x03ffffff, 0x00fff800, 0x01fff800, 0xf8000000, 0xf8000003, 0xf8000000, 0x18000001, 0x1f7c0f40, 0x00000078, 0x00000000, 0x00000000, 0x00000000, }; |
| 186615 | static const MCPhysReg CSR_Win_AArch64_SVE_AAPCS_SaveList[] = { AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, 0 }; |
| 186616 | static const uint32_t CSR_Win_AArch64_SVE_AAPCS_RegMask[] = { 0xff007044, 0xff0000ff, 0xff0000ff, 0xfff000ff, 0xff00fff0, 0xff0000ff, 0x000000ff, 0x00007ff8, 0xfff00ffc, 0x0000000f, 0xfff00000, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0xfff0000f, 0x8000000f, 0xfff807ff, 0xfff80003, 0xfff80000, 0x03ff8001, 0x0003fff8, 0x0000fff8, 0x0801fff8, 0x017c0040, 0x3fff8078, 0x0fff8000, 0x1fff8000, 0x00000000, }; |
| 186617 | |
| 186618 | |
| 186619 | ArrayRef<const uint32_t *> AArch64GenRegisterInfo::getRegMasks() const { |
| 186620 | static const uint32_t *const Masks[] = { |
| 186621 | CSR_AArch64_AAPCS_RegMask, |
| 186622 | CSR_AArch64_AAPCS_SCS_RegMask, |
| 186623 | CSR_AArch64_AAPCS_SwiftError_RegMask, |
| 186624 | CSR_AArch64_AAPCS_SwiftError_SCS_RegMask, |
| 186625 | CSR_AArch64_AAPCS_SwiftTail_RegMask, |
| 186626 | CSR_AArch64_AAPCS_ThisReturn_RegMask, |
| 186627 | CSR_AArch64_AAPCS_X18_RegMask, |
| 186628 | CSR_AArch64_AAVPCS_RegMask, |
| 186629 | CSR_AArch64_AAVPCS_SCS_RegMask, |
| 186630 | CSR_AArch64_AllRegs_RegMask, |
| 186631 | CSR_AArch64_AllRegs_SCS_RegMask, |
| 186632 | CSR_AArch64_NoRegs_RegMask, |
| 186633 | CSR_AArch64_NoRegs_SCS_RegMask, |
| 186634 | CSR_AArch64_NoneRegs_RegMask, |
| 186635 | CSR_AArch64_NoneRegs_SCS_RegMask, |
| 186636 | CSR_AArch64_RT_AllRegs_RegMask, |
| 186637 | CSR_AArch64_RT_AllRegs_SCS_RegMask, |
| 186638 | CSR_AArch64_RT_MostRegs_RegMask, |
| 186639 | CSR_AArch64_RT_MostRegs_SCS_RegMask, |
| 186640 | CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_RegMask, |
| 186641 | CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1_RegMask, |
| 186642 | CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_RegMask, |
| 186643 | CSR_AArch64_SMStartStop_RegMask, |
| 186644 | CSR_AArch64_SVE_AAPCS_RegMask, |
| 186645 | CSR_AArch64_SVE_AAPCS_SCS_RegMask, |
| 186646 | CSR_AArch64_StackProbe_Windows_RegMask, |
| 186647 | CSR_AArch64_TLS_ELF_RegMask, |
| 186648 | CSR_Darwin_AArch64_AAPCS_RegMask, |
| 186649 | CSR_Darwin_AArch64_AAPCS_SwiftError_RegMask, |
| 186650 | CSR_Darwin_AArch64_AAPCS_SwiftTail_RegMask, |
| 186651 | CSR_Darwin_AArch64_AAPCS_ThisReturn_RegMask, |
| 186652 | CSR_Darwin_AArch64_AAPCS_Win64_RegMask, |
| 186653 | CSR_Darwin_AArch64_AAVPCS_RegMask, |
| 186654 | CSR_Darwin_AArch64_CXX_TLS_RegMask, |
| 186655 | CSR_Darwin_AArch64_CXX_TLS_PE_RegMask, |
| 186656 | CSR_Darwin_AArch64_CXX_TLS_ViaCopy_RegMask, |
| 186657 | CSR_Darwin_AArch64_RT_AllRegs_RegMask, |
| 186658 | CSR_Darwin_AArch64_RT_MostRegs_RegMask, |
| 186659 | CSR_Darwin_AArch64_SVE_AAPCS_RegMask, |
| 186660 | CSR_Darwin_AArch64_TLS_RegMask, |
| 186661 | CSR_Win_AArch64_AAPCS_RegMask, |
| 186662 | CSR_Win_AArch64_AAPCS_SwiftError_RegMask, |
| 186663 | CSR_Win_AArch64_AAPCS_SwiftTail_RegMask, |
| 186664 | CSR_Win_AArch64_AAVPCS_RegMask, |
| 186665 | CSR_Win_AArch64_Arm64EC_Thunk_RegMask, |
| 186666 | CSR_Win_AArch64_CFGuard_Check_RegMask, |
| 186667 | CSR_Win_AArch64_SVE_AAPCS_RegMask, |
| 186668 | }; |
| 186669 | return ArrayRef(Masks); |
| 186670 | } |
| 186671 | |
| 186672 | bool AArch64GenRegisterInfo:: |
| 186673 | isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 186674 | return |
| 186675 | AArch64::GPR64RegClass.contains(PhysReg) || |
| 186676 | AArch64::GPR32RegClass.contains(PhysReg) || |
| 186677 | false; |
| 186678 | } |
| 186679 | |
| 186680 | bool AArch64GenRegisterInfo:: |
| 186681 | isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const { |
| 186682 | return |
| 186683 | AArch64::GPR64RegClass.hasSubClassEq(RC) || |
| 186684 | AArch64::GPR32RegClass.hasSubClassEq(RC) || |
| 186685 | false; |
| 186686 | } |
| 186687 | |
| 186688 | bool AArch64GenRegisterInfo:: |
| 186689 | isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 186690 | return |
| 186691 | AArch64::CCRRegClass.contains(PhysReg) || |
| 186692 | AArch64::FIXED_REGSRegClass.contains(PhysReg) || |
| 186693 | false; |
| 186694 | } |
| 186695 | |
| 186696 | bool AArch64GenRegisterInfo:: |
| 186697 | isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const { |
| 186698 | return |
| 186699 | false; |
| 186700 | } |
| 186701 | |
| 186702 | bool AArch64GenRegisterInfo:: |
| 186703 | isConstantPhysReg(MCRegister PhysReg) const { |
| 186704 | return |
| 186705 | PhysReg == AArch64::WZR || |
| 186706 | PhysReg == AArch64::XZR || |
| 186707 | false; |
| 186708 | } |
| 186709 | |
| 186710 | ArrayRef<const char *> AArch64GenRegisterInfo::getRegMaskNames() const { |
| 186711 | static const char *Names[] = { |
| 186712 | "CSR_AArch64_AAPCS", |
| 186713 | "CSR_AArch64_AAPCS_SCS", |
| 186714 | "CSR_AArch64_AAPCS_SwiftError", |
| 186715 | "CSR_AArch64_AAPCS_SwiftError_SCS", |
| 186716 | "CSR_AArch64_AAPCS_SwiftTail", |
| 186717 | "CSR_AArch64_AAPCS_ThisReturn", |
| 186718 | "CSR_AArch64_AAPCS_X18", |
| 186719 | "CSR_AArch64_AAVPCS", |
| 186720 | "CSR_AArch64_AAVPCS_SCS", |
| 186721 | "CSR_AArch64_AllRegs", |
| 186722 | "CSR_AArch64_AllRegs_SCS", |
| 186723 | "CSR_AArch64_NoRegs", |
| 186724 | "CSR_AArch64_NoRegs_SCS", |
| 186725 | "CSR_AArch64_NoneRegs", |
| 186726 | "CSR_AArch64_NoneRegs_SCS", |
| 186727 | "CSR_AArch64_RT_AllRegs", |
| 186728 | "CSR_AArch64_RT_AllRegs_SCS", |
| 186729 | "CSR_AArch64_RT_MostRegs", |
| 186730 | "CSR_AArch64_RT_MostRegs_SCS", |
| 186731 | "CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0", |
| 186732 | "CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1", |
| 186733 | "CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2", |
| 186734 | "CSR_AArch64_SMStartStop", |
| 186735 | "CSR_AArch64_SVE_AAPCS", |
| 186736 | "CSR_AArch64_SVE_AAPCS_SCS", |
| 186737 | "CSR_AArch64_StackProbe_Windows", |
| 186738 | "CSR_AArch64_TLS_ELF", |
| 186739 | "CSR_Darwin_AArch64_AAPCS", |
| 186740 | "CSR_Darwin_AArch64_AAPCS_SwiftError", |
| 186741 | "CSR_Darwin_AArch64_AAPCS_SwiftTail", |
| 186742 | "CSR_Darwin_AArch64_AAPCS_ThisReturn", |
| 186743 | "CSR_Darwin_AArch64_AAPCS_Win64", |
| 186744 | "CSR_Darwin_AArch64_AAVPCS", |
| 186745 | "CSR_Darwin_AArch64_CXX_TLS", |
| 186746 | "CSR_Darwin_AArch64_CXX_TLS_PE", |
| 186747 | "CSR_Darwin_AArch64_CXX_TLS_ViaCopy", |
| 186748 | "CSR_Darwin_AArch64_RT_AllRegs", |
| 186749 | "CSR_Darwin_AArch64_RT_MostRegs", |
| 186750 | "CSR_Darwin_AArch64_SVE_AAPCS", |
| 186751 | "CSR_Darwin_AArch64_TLS", |
| 186752 | "CSR_Win_AArch64_AAPCS", |
| 186753 | "CSR_Win_AArch64_AAPCS_SwiftError", |
| 186754 | "CSR_Win_AArch64_AAPCS_SwiftTail", |
| 186755 | "CSR_Win_AArch64_AAVPCS", |
| 186756 | "CSR_Win_AArch64_Arm64EC_Thunk", |
| 186757 | "CSR_Win_AArch64_CFGuard_Check", |
| 186758 | "CSR_Win_AArch64_SVE_AAPCS", |
| 186759 | }; |
| 186760 | return ArrayRef(Names); |
| 186761 | } |
| 186762 | |
| 186763 | const AArch64FrameLowering * |
| 186764 | AArch64GenRegisterInfo::getFrameLowering(const MachineFunction &MF) { |
| 186765 | return static_cast<const AArch64FrameLowering *>( |
| 186766 | MF.getSubtarget().getFrameLowering()); |
| 186767 | } |
| 186768 | |
| 186769 | } // end namespace llvm |
| 186770 | |
| 186771 | #endif // GET_REGINFO_TARGET_DESC |
| 186772 | |
| 186773 |
Generated while processing llvm_projects/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp
Generated on 2025-Jul-04 from project llvm_projects revision main-0ba59587f
Powered by 
Code Browser 2.1
Generator usage only permitted with license.